2013-05-16 Marc Glisse <marc.glisse@inria.fr>
[official-gcc.git] / gcc / reorg.c
blob9422664a6fa231b60a91a3050f4302d1c68f0fa5
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2013 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
59 Three techniques for filling delay slots have been implemented so far:
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "tm.h"
107 #include "diagnostic-core.h"
108 #include "rtl.h"
109 #include "tm_p.h"
110 #include "expr.h"
111 #include "function.h"
112 #include "insn-config.h"
113 #include "conditions.h"
114 #include "hard-reg-set.h"
115 #include "basic-block.h"
116 #include "regs.h"
117 #include "recog.h"
118 #include "flags.h"
119 #include "obstack.h"
120 #include "insn-attr.h"
121 #include "resource.h"
122 #include "except.h"
123 #include "params.h"
124 #include "target.h"
125 #include "tree-pass.h"
126 #include "emit-rtl.h"
128 #ifdef DELAY_SLOTS
130 #ifndef ANNUL_IFTRUE_SLOTS
131 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
132 #endif
133 #ifndef ANNUL_IFFALSE_SLOTS
134 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
135 #endif
138 /* First, some functions that were used before GCC got a control flow graph.
139 These functions are now only used here in reorg.c, and have therefore
140 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
142 /* Return the last label to mark the same position as LABEL. Return LABEL
143 itself if it is null or any return rtx. */
145 static rtx
146 skip_consecutive_labels (rtx label)
148 rtx insn;
150 if (label && ANY_RETURN_P (label))
151 return label;
153 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
154 if (LABEL_P (insn))
155 label = insn;
157 return label;
160 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
161 and REG_CC_USER notes so we can find it. */
163 static void
164 link_cc0_insns (rtx insn)
166 rtx user = next_nonnote_insn (insn);
168 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
169 user = XVECEXP (PATTERN (user), 0, 0);
171 add_reg_note (user, REG_CC_SETTER, insn);
172 add_reg_note (insn, REG_CC_USER, user);
175 /* Insns which have delay slots that have not yet been filled. */
177 static struct obstack unfilled_slots_obstack;
178 static rtx *unfilled_firstobj;
180 /* Define macros to refer to the first and last slot containing unfilled
181 insns. These are used because the list may move and its address
182 should be recomputed at each use. */
184 #define unfilled_slots_base \
185 ((rtx *) obstack_base (&unfilled_slots_obstack))
187 #define unfilled_slots_next \
188 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
190 /* Points to the label before the end of the function, or before a
191 return insn. */
192 static rtx function_return_label;
193 /* Likewise for a simple_return. */
194 static rtx function_simple_return_label;
196 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
197 not always monotonically increase. */
198 static int *uid_to_ruid;
200 /* Highest valid index in `uid_to_ruid'. */
201 static int max_uid;
203 static int stop_search_p (rtx, int);
204 static int resource_conflicts_p (struct resources *, struct resources *);
205 static int insn_references_resource_p (rtx, struct resources *, bool);
206 static int insn_sets_resource_p (rtx, struct resources *, bool);
207 static rtx find_end_label (rtx);
208 static rtx emit_delay_sequence (rtx, rtx, int);
209 static rtx add_to_delay_list (rtx, rtx);
210 static rtx delete_from_delay_slot (rtx);
211 static void delete_scheduled_jump (rtx);
212 static void note_delay_statistics (int, int);
213 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
214 static rtx optimize_skip (rtx);
215 #endif
216 static int get_jump_flags (rtx, rtx);
217 static int mostly_true_jump (rtx);
218 static rtx get_branch_condition (rtx, rtx);
219 static int condition_dominates_p (rtx, rtx);
220 static int redirect_with_delay_slots_safe_p (rtx, rtx, rtx);
221 static int redirect_with_delay_list_safe_p (rtx, rtx, rtx);
222 static int check_annul_list_true_false (int, rtx);
223 static rtx steal_delay_list_from_target (rtx, rtx, rtx, rtx,
224 struct resources *,
225 struct resources *,
226 struct resources *,
227 int, int *, int *, rtx *);
228 static rtx steal_delay_list_from_fallthrough (rtx, rtx, rtx, rtx,
229 struct resources *,
230 struct resources *,
231 struct resources *,
232 int, int *, int *);
233 static void try_merge_delay_insns (rtx, rtx);
234 static rtx redundant_insn (rtx, rtx, rtx);
235 static int own_thread_p (rtx, rtx, int);
236 static void update_block (rtx, rtx);
237 static int reorg_redirect_jump (rtx, rtx);
238 static void update_reg_dead_notes (rtx, rtx);
239 static void fix_reg_dead_note (rtx, rtx);
240 static void update_reg_unused_notes (rtx, rtx);
241 static void fill_simple_delay_slots (int);
242 static rtx fill_slots_from_thread (rtx, rtx, rtx, rtx,
243 int, int, int, int,
244 int *, rtx);
245 static void fill_eager_delay_slots (void);
246 static void relax_delay_slots (rtx);
247 static void make_return_insns (rtx);
249 /* A wrapper around next_active_insn which takes care to return ret_rtx
250 unchanged. */
252 static rtx
253 first_active_target_insn (rtx insn)
255 if (ANY_RETURN_P (insn))
256 return insn;
257 return next_active_insn (insn);
260 /* Return true iff INSN is a simplejump, or any kind of return insn. */
262 static bool
263 simplejump_or_return_p (rtx insn)
265 return (JUMP_P (insn)
266 && (simplejump_p (insn) || ANY_RETURN_P (PATTERN (insn))));
269 /* Return TRUE if this insn should stop the search for insn to fill delay
270 slots. LABELS_P indicates that labels should terminate the search.
271 In all cases, jumps terminate the search. */
273 static int
274 stop_search_p (rtx insn, int labels_p)
276 if (insn == 0)
277 return 1;
279 /* If the insn can throw an exception that is caught within the function,
280 it may effectively perform a jump from the viewpoint of the function.
281 Therefore act like for a jump. */
282 if (can_throw_internal (insn))
283 return 1;
285 switch (GET_CODE (insn))
287 case NOTE:
288 case CALL_INSN:
289 return 0;
291 case CODE_LABEL:
292 return labels_p;
294 case JUMP_INSN:
295 case BARRIER:
296 return 1;
298 case INSN:
299 /* OK unless it contains a delay slot or is an `asm' insn of some type.
300 We don't know anything about these. */
301 return (GET_CODE (PATTERN (insn)) == SEQUENCE
302 || GET_CODE (PATTERN (insn)) == ASM_INPUT
303 || asm_noperands (PATTERN (insn)) >= 0);
305 default:
306 gcc_unreachable ();
310 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
311 resource set contains a volatile memory reference. Otherwise, return FALSE. */
313 static int
314 resource_conflicts_p (struct resources *res1, struct resources *res2)
316 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
317 || res1->volatil || res2->volatil)
318 return 1;
320 return hard_reg_set_intersect_p (res1->regs, res2->regs);
323 /* Return TRUE if any resource marked in RES, a `struct resources', is
324 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
325 routine is using those resources.
327 We compute this by computing all the resources referenced by INSN and
328 seeing if this conflicts with RES. It might be faster to directly check
329 ourselves, and this is the way it used to work, but it means duplicating
330 a large block of complex code. */
332 static int
333 insn_references_resource_p (rtx insn, struct resources *res,
334 bool include_delayed_effects)
336 struct resources insn_res;
338 CLEAR_RESOURCE (&insn_res);
339 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
340 return resource_conflicts_p (&insn_res, res);
343 /* Return TRUE if INSN modifies resources that are marked in RES.
344 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
345 included. CC0 is only modified if it is explicitly set; see comments
346 in front of mark_set_resources for details. */
348 static int
349 insn_sets_resource_p (rtx insn, struct resources *res,
350 bool include_delayed_effects)
352 struct resources insn_sets;
354 CLEAR_RESOURCE (&insn_sets);
355 mark_set_resources (insn, &insn_sets, 0,
356 (include_delayed_effects
357 ? MARK_SRC_DEST_CALL
358 : MARK_SRC_DEST));
359 return resource_conflicts_p (&insn_sets, res);
362 /* Find a label at the end of the function or before a RETURN. If there
363 is none, try to make one. If that fails, returns 0.
365 The property of such a label is that it is placed just before the
366 epilogue or a bare RETURN insn, so that another bare RETURN can be
367 turned into a jump to the label unconditionally. In particular, the
368 label cannot be placed before a RETURN insn with a filled delay slot.
370 ??? There may be a problem with the current implementation. Suppose
371 we start with a bare RETURN insn and call find_end_label. It may set
372 function_return_label just before the RETURN. Suppose the machinery
373 is able to fill the delay slot of the RETURN insn afterwards. Then
374 function_return_label is no longer valid according to the property
375 described above and find_end_label will still return it unmodified.
376 Note that this is probably mitigated by the following observation:
377 once function_return_label is made, it is very likely the target of
378 a jump, so filling the delay slot of the RETURN will be much more
379 difficult.
380 KIND is either simple_return_rtx or ret_rtx, indicating which type of
381 return we're looking for. */
383 static rtx
384 find_end_label (rtx kind)
386 rtx insn;
387 rtx *plabel;
389 if (kind == ret_rtx)
390 plabel = &function_return_label;
391 else
393 gcc_assert (kind == simple_return_rtx);
394 plabel = &function_simple_return_label;
397 /* If we found one previously, return it. */
398 if (*plabel)
399 return *plabel;
401 /* Otherwise, see if there is a label at the end of the function. If there
402 is, it must be that RETURN insns aren't needed, so that is our return
403 label and we don't have to do anything else. */
405 insn = get_last_insn ();
406 while (NOTE_P (insn)
407 || (NONJUMP_INSN_P (insn)
408 && (GET_CODE (PATTERN (insn)) == USE
409 || GET_CODE (PATTERN (insn)) == CLOBBER)))
410 insn = PREV_INSN (insn);
412 /* When a target threads its epilogue we might already have a
413 suitable return insn. If so put a label before it for the
414 function_return_label. */
415 if (BARRIER_P (insn)
416 && JUMP_P (PREV_INSN (insn))
417 && PATTERN (PREV_INSN (insn)) == kind)
419 rtx temp = PREV_INSN (PREV_INSN (insn));
420 rtx label = gen_label_rtx ();
421 LABEL_NUSES (label) = 0;
423 /* Put the label before any USE insns that may precede the RETURN
424 insn. */
425 while (GET_CODE (temp) == USE)
426 temp = PREV_INSN (temp);
428 emit_label_after (label, temp);
429 *plabel = label;
432 else if (LABEL_P (insn))
433 *plabel = insn;
434 else
436 rtx label = gen_label_rtx ();
437 LABEL_NUSES (label) = 0;
438 /* If the basic block reorder pass moves the return insn to
439 some other place try to locate it again and put our
440 function_return_label there. */
441 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
442 insn = PREV_INSN (insn);
443 if (insn)
445 insn = PREV_INSN (insn);
447 /* Put the label before any USE insns that may precede the
448 RETURN insn. */
449 while (GET_CODE (insn) == USE)
450 insn = PREV_INSN (insn);
452 emit_label_after (label, insn);
454 else
456 #ifdef HAVE_epilogue
457 if (HAVE_epilogue
458 #ifdef HAVE_return
459 && ! HAVE_return
460 #endif
462 /* The RETURN insn has its delay slot filled so we cannot
463 emit the label just before it. Since we already have
464 an epilogue and cannot emit a new RETURN, we cannot
465 emit the label at all. */
466 return NULL_RTX;
467 #endif /* HAVE_epilogue */
469 /* Otherwise, make a new label and emit a RETURN and BARRIER,
470 if needed. */
471 emit_label (label);
472 #ifdef HAVE_return
473 if (HAVE_return)
475 /* The return we make may have delay slots too. */
476 rtx insn = gen_return ();
477 insn = emit_jump_insn (insn);
478 set_return_jump_label (insn);
479 emit_barrier ();
480 if (num_delay_slots (insn) > 0)
481 obstack_ptr_grow (&unfilled_slots_obstack, insn);
483 #endif
485 *plabel = label;
488 /* Show one additional use for this label so it won't go away until
489 we are done. */
490 ++LABEL_NUSES (*plabel);
492 return *plabel;
495 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
496 the pattern of INSN with the SEQUENCE.
498 Returns the SEQUENCE that replaces INSN. */
500 static rtx
501 emit_delay_sequence (rtx insn, rtx list, int length)
503 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
504 rtvec seqv = rtvec_alloc (length + 1);
505 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
506 rtx seq_insn = make_insn_raw (seq);
508 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
509 not have a location, but one of the delayed insns does, we pick up a
510 location from there later. */
511 INSN_LOCATION (seq_insn) = INSN_LOCATION (insn);
513 /* Unlink INSN from the insn chain, so that we can put it into
514 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
515 rtx after = PREV_INSN (insn);
516 remove_insn (insn);
517 NEXT_INSN (insn) = PREV_INSN (insn) = NULL;
519 /* Build our SEQUENCE and rebuild the insn chain. */
520 int i = 1;
521 start_sequence ();
522 XVECEXP (seq, 0, 0) = emit_insn (insn);
523 for (rtx li = list; li; li = XEXP (li, 1), i++)
525 rtx tem = XEXP (li, 0);
526 rtx note, next;
528 /* Show that this copy of the insn isn't deleted. */
529 INSN_DELETED_P (tem) = 0;
531 /* Unlink insn from its original place, and re-emit it into
532 the sequence. */
533 NEXT_INSN (tem) = PREV_INSN (tem) = NULL;
534 XVECEXP (seq, 0, i) = emit_insn (tem);
536 /* SPARC assembler, for instance, emit warning when debug info is output
537 into the delay slot. */
538 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
539 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
540 INSN_LOCATION (tem) = 0;
542 for (note = REG_NOTES (tem); note; note = next)
544 next = XEXP (note, 1);
545 switch (REG_NOTE_KIND (note))
547 case REG_DEAD:
548 /* Remove any REG_DEAD notes because we can't rely on them now
549 that the insn has been moved. */
550 remove_note (tem, note);
551 break;
553 case REG_LABEL_OPERAND:
554 case REG_LABEL_TARGET:
555 /* Keep the label reference count up to date. */
556 if (LABEL_P (XEXP (note, 0)))
557 LABEL_NUSES (XEXP (note, 0)) ++;
558 break;
560 default:
561 break;
565 end_sequence ();
566 gcc_assert (i == length + 1);
568 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
569 add_insn_after (seq_insn, after, NULL);
571 return seq_insn;
574 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
575 be in the order in which the insns are to be executed. */
577 static rtx
578 add_to_delay_list (rtx insn, rtx delay_list)
580 /* If we have an empty list, just make a new list element. If
581 INSN has its block number recorded, clear it since we may
582 be moving the insn to a new block. */
584 if (delay_list == 0)
586 clear_hashed_info_for_insn (insn);
587 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
590 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
591 list. */
592 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
594 return delay_list;
597 /* Delete INSN from the delay slot of the insn that it is in, which may
598 produce an insn with no delay slots. Return the new insn. */
600 static rtx
601 delete_from_delay_slot (rtx insn)
603 rtx trial, seq_insn, seq, prev;
604 rtx delay_list = 0;
605 int i;
606 int had_barrier = 0;
608 /* We first must find the insn containing the SEQUENCE with INSN in its
609 delay slot. Do this by finding an insn, TRIAL, where
610 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
612 for (trial = insn;
613 PREV_INSN (NEXT_INSN (trial)) == trial;
614 trial = NEXT_INSN (trial))
617 seq_insn = PREV_INSN (NEXT_INSN (trial));
618 seq = PATTERN (seq_insn);
620 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
621 had_barrier = 1;
623 /* Create a delay list consisting of all the insns other than the one
624 we are deleting (unless we were the only one). */
625 if (XVECLEN (seq, 0) > 2)
626 for (i = 1; i < XVECLEN (seq, 0); i++)
627 if (XVECEXP (seq, 0, i) != insn)
628 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
630 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
631 list, and rebuild the delay list if non-empty. */
632 prev = PREV_INSN (seq_insn);
633 trial = XVECEXP (seq, 0, 0);
634 delete_related_insns (seq_insn);
635 add_insn_after (trial, prev, NULL);
637 /* If there was a barrier after the old SEQUENCE, remit it. */
638 if (had_barrier)
639 emit_barrier_after (trial);
641 /* If there are any delay insns, remit them. Otherwise clear the
642 annul flag. */
643 if (delay_list)
644 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
645 else if (JUMP_P (trial))
646 INSN_ANNULLED_BRANCH_P (trial) = 0;
648 INSN_FROM_TARGET_P (insn) = 0;
650 /* Show we need to fill this insn again. */
651 obstack_ptr_grow (&unfilled_slots_obstack, trial);
653 return trial;
656 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
657 the insn that sets CC0 for it and delete it too. */
659 static void
660 delete_scheduled_jump (rtx insn)
662 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
663 delete the insn that sets the condition code, but it is hard to find it.
664 Since this case is rare anyway, don't bother trying; there would likely
665 be other insns that became dead anyway, which we wouldn't know to
666 delete. */
668 #ifdef HAVE_cc0
669 if (reg_mentioned_p (cc0_rtx, insn))
671 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
673 /* If a reg-note was found, it points to an insn to set CC0. This
674 insn is in the delay list of some other insn. So delete it from
675 the delay list it was in. */
676 if (note)
678 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
679 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
680 delete_from_delay_slot (XEXP (note, 0));
682 else
684 /* The insn setting CC0 is our previous insn, but it may be in
685 a delay slot. It will be the last insn in the delay slot, if
686 it is. */
687 rtx trial = previous_insn (insn);
688 if (NOTE_P (trial))
689 trial = prev_nonnote_insn (trial);
690 if (sets_cc0_p (PATTERN (trial)) != 1
691 || FIND_REG_INC_NOTE (trial, NULL_RTX))
692 return;
693 if (PREV_INSN (NEXT_INSN (trial)) == trial)
694 delete_related_insns (trial);
695 else
696 delete_from_delay_slot (trial);
699 #endif
701 delete_related_insns (insn);
704 /* Counters for delay-slot filling. */
706 #define NUM_REORG_FUNCTIONS 2
707 #define MAX_DELAY_HISTOGRAM 3
708 #define MAX_REORG_PASSES 2
710 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
712 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
714 static int reorg_pass_number;
716 static void
717 note_delay_statistics (int slots_filled, int index)
719 num_insns_needing_delays[index][reorg_pass_number]++;
720 if (slots_filled > MAX_DELAY_HISTOGRAM)
721 slots_filled = MAX_DELAY_HISTOGRAM;
722 num_filled_delays[index][slots_filled][reorg_pass_number]++;
725 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
727 /* Optimize the following cases:
729 1. When a conditional branch skips over only one instruction,
730 use an annulling branch and put that insn in the delay slot.
731 Use either a branch that annuls when the condition if true or
732 invert the test with a branch that annuls when the condition is
733 false. This saves insns, since otherwise we must copy an insn
734 from the L1 target.
736 (orig) (skip) (otherwise)
737 Bcc.n L1 Bcc',a L1 Bcc,a L1'
738 insn insn insn2
739 L1: L1: L1:
740 insn2 insn2 insn2
741 insn3 insn3 L1':
742 insn3
744 2. When a conditional branch skips over only one instruction,
745 and after that, it unconditionally branches somewhere else,
746 perform the similar optimization. This saves executing the
747 second branch in the case where the inverted condition is true.
749 Bcc.n L1 Bcc',a L2
750 insn insn
751 L1: L1:
752 Bra L2 Bra L2
754 INSN is a JUMP_INSN.
756 This should be expanded to skip over N insns, where N is the number
757 of delay slots required. */
759 static rtx
760 optimize_skip (rtx insn)
762 rtx trial = next_nonnote_insn (insn);
763 rtx next_trial = next_active_insn (trial);
764 rtx delay_list = 0;
765 int flags;
767 flags = get_jump_flags (insn, JUMP_LABEL (insn));
769 if (trial == 0
770 || !NONJUMP_INSN_P (trial)
771 || GET_CODE (PATTERN (trial)) == SEQUENCE
772 || recog_memoized (trial) < 0
773 || (! eligible_for_annul_false (insn, 0, trial, flags)
774 && ! eligible_for_annul_true (insn, 0, trial, flags))
775 || can_throw_internal (trial))
776 return 0;
778 /* There are two cases where we are just executing one insn (we assume
779 here that a branch requires only one insn; this should be generalized
780 at some point): Where the branch goes around a single insn or where
781 we have one insn followed by a branch to the same label we branch to.
782 In both of these cases, inverting the jump and annulling the delay
783 slot give the same effect in fewer insns. */
784 if (next_trial == next_active_insn (JUMP_LABEL (insn))
785 || (next_trial != 0
786 && simplejump_or_return_p (next_trial)
787 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
789 if (eligible_for_annul_false (insn, 0, trial, flags))
791 if (invert_jump (insn, JUMP_LABEL (insn), 1))
792 INSN_FROM_TARGET_P (trial) = 1;
793 else if (! eligible_for_annul_true (insn, 0, trial, flags))
794 return 0;
797 delay_list = add_to_delay_list (trial, NULL_RTX);
798 next_trial = next_active_insn (trial);
799 update_block (trial, trial);
800 delete_related_insns (trial);
802 /* Also, if we are targeting an unconditional
803 branch, thread our jump to the target of that branch. Don't
804 change this into a RETURN here, because it may not accept what
805 we have in the delay slot. We'll fix this up later. */
806 if (next_trial && simplejump_or_return_p (next_trial))
808 rtx target_label = JUMP_LABEL (next_trial);
809 if (ANY_RETURN_P (target_label))
810 target_label = find_end_label (target_label);
812 if (target_label)
814 /* Recompute the flags based on TARGET_LABEL since threading
815 the jump to TARGET_LABEL may change the direction of the
816 jump (which may change the circumstances in which the
817 delay slot is nullified). */
818 flags = get_jump_flags (insn, target_label);
819 if (eligible_for_annul_true (insn, 0, trial, flags))
820 reorg_redirect_jump (insn, target_label);
824 INSN_ANNULLED_BRANCH_P (insn) = 1;
827 return delay_list;
829 #endif
831 /* Encode and return branch direction and prediction information for
832 INSN assuming it will jump to LABEL.
834 Non conditional branches return no direction information and
835 are predicted as very likely taken. */
837 static int
838 get_jump_flags (rtx insn, rtx label)
840 int flags;
842 /* get_jump_flags can be passed any insn with delay slots, these may
843 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
844 direction information, and only if they are conditional jumps.
846 If LABEL is a return, then there is no way to determine the branch
847 direction. */
848 if (JUMP_P (insn)
849 && (condjump_p (insn) || condjump_in_parallel_p (insn))
850 && !ANY_RETURN_P (label)
851 && INSN_UID (insn) <= max_uid
852 && INSN_UID (label) <= max_uid)
853 flags
854 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
855 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
856 /* No valid direction information. */
857 else
858 flags = 0;
860 return flags;
863 /* Return truth value of the statement that this branch
864 is mostly taken. If we think that the branch is extremely likely
865 to be taken, we return 2. If the branch is slightly more likely to be
866 taken, return 1. If the branch is slightly less likely to be taken,
867 return 0 and if the branch is highly unlikely to be taken, return -1. */
869 static int
870 mostly_true_jump (rtx jump_insn)
872 /* If branch probabilities are available, then use that number since it
873 always gives a correct answer. */
874 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
875 if (note)
877 int prob = INTVAL (XEXP (note, 0));
879 if (prob >= REG_BR_PROB_BASE * 9 / 10)
880 return 2;
881 else if (prob >= REG_BR_PROB_BASE / 2)
882 return 1;
883 else if (prob >= REG_BR_PROB_BASE / 10)
884 return 0;
885 else
886 return -1;
889 /* If there is no note, assume branches are not taken.
890 This should be rare. */
891 return 0;
894 /* Return the condition under which INSN will branch to TARGET. If TARGET
895 is zero, return the condition under which INSN will return. If INSN is
896 an unconditional branch, return const_true_rtx. If INSN isn't a simple
897 type of jump, or it doesn't go to TARGET, return 0. */
899 static rtx
900 get_branch_condition (rtx insn, rtx target)
902 rtx pat = PATTERN (insn);
903 rtx src;
905 if (condjump_in_parallel_p (insn))
906 pat = XVECEXP (pat, 0, 0);
908 if (ANY_RETURN_P (pat) && pat == target)
909 return const_true_rtx;
911 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
912 return 0;
914 src = SET_SRC (pat);
915 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
916 return const_true_rtx;
918 else if (GET_CODE (src) == IF_THEN_ELSE
919 && XEXP (src, 2) == pc_rtx
920 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
921 && XEXP (XEXP (src, 1), 0) == target)
922 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
923 return XEXP (src, 0);
925 else if (GET_CODE (src) == IF_THEN_ELSE
926 && XEXP (src, 1) == pc_rtx
927 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
928 && XEXP (XEXP (src, 2), 0) == target)
929 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
931 enum rtx_code rev;
932 rev = reversed_comparison_code (XEXP (src, 0), insn);
933 if (rev != UNKNOWN)
934 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
935 XEXP (XEXP (src, 0), 0),
936 XEXP (XEXP (src, 0), 1));
939 return 0;
942 /* Return nonzero if CONDITION is more strict than the condition of
943 INSN, i.e., if INSN will always branch if CONDITION is true. */
945 static int
946 condition_dominates_p (rtx condition, rtx insn)
948 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
949 enum rtx_code code = GET_CODE (condition);
950 enum rtx_code other_code;
952 if (rtx_equal_p (condition, other_condition)
953 || other_condition == const_true_rtx)
954 return 1;
956 else if (condition == const_true_rtx || other_condition == 0)
957 return 0;
959 other_code = GET_CODE (other_condition);
960 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
961 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
962 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
963 return 0;
965 return comparison_dominates_p (code, other_code);
968 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
969 any insns already in the delay slot of JUMP. */
971 static int
972 redirect_with_delay_slots_safe_p (rtx jump, rtx newlabel, rtx seq)
974 int flags, i;
975 rtx pat = PATTERN (seq);
977 /* Make sure all the delay slots of this jump would still
978 be valid after threading the jump. If they are still
979 valid, then return nonzero. */
981 flags = get_jump_flags (jump, newlabel);
982 for (i = 1; i < XVECLEN (pat, 0); i++)
983 if (! (
984 #ifdef ANNUL_IFFALSE_SLOTS
985 (INSN_ANNULLED_BRANCH_P (jump)
986 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
987 ? eligible_for_annul_false (jump, i - 1,
988 XVECEXP (pat, 0, i), flags) :
989 #endif
990 #ifdef ANNUL_IFTRUE_SLOTS
991 (INSN_ANNULLED_BRANCH_P (jump)
992 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
993 ? eligible_for_annul_true (jump, i - 1,
994 XVECEXP (pat, 0, i), flags) :
995 #endif
996 eligible_for_delay (jump, i - 1, XVECEXP (pat, 0, i), flags)))
997 break;
999 return (i == XVECLEN (pat, 0));
1002 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1003 any insns we wish to place in the delay slot of JUMP. */
1005 static int
1006 redirect_with_delay_list_safe_p (rtx jump, rtx newlabel, rtx delay_list)
1008 int flags, i;
1009 rtx li;
1011 /* Make sure all the insns in DELAY_LIST would still be
1012 valid after threading the jump. If they are still
1013 valid, then return nonzero. */
1015 flags = get_jump_flags (jump, newlabel);
1016 for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++)
1017 if (! (
1018 #ifdef ANNUL_IFFALSE_SLOTS
1019 (INSN_ANNULLED_BRANCH_P (jump)
1020 && INSN_FROM_TARGET_P (XEXP (li, 0)))
1021 ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) :
1022 #endif
1023 #ifdef ANNUL_IFTRUE_SLOTS
1024 (INSN_ANNULLED_BRANCH_P (jump)
1025 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1026 ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) :
1027 #endif
1028 eligible_for_delay (jump, i, XEXP (li, 0), flags)))
1029 break;
1031 return (li == NULL);
1034 /* DELAY_LIST is a list of insns that have already been placed into delay
1035 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1036 If not, return 0; otherwise return 1. */
1038 static int
1039 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1041 rtx temp;
1043 if (delay_list)
1045 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1047 rtx trial = XEXP (temp, 0);
1049 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1050 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1051 return 0;
1055 return 1;
1058 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1059 the condition tested by INSN is CONDITION and the resources shown in
1060 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1061 from SEQ's delay list, in addition to whatever insns it may execute
1062 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1063 needed while searching for delay slot insns. Return the concatenated
1064 delay list if possible, otherwise, return 0.
1066 SLOTS_TO_FILL is the total number of slots required by INSN, and
1067 PSLOTS_FILLED points to the number filled so far (also the number of
1068 insns in DELAY_LIST). It is updated with the number that have been
1069 filled from the SEQUENCE, if any.
1071 PANNUL_P points to a nonzero value if we already know that we need
1072 to annul INSN. If this routine determines that annulling is needed,
1073 it may set that value nonzero.
1075 PNEW_THREAD points to a location that is to receive the place at which
1076 execution should continue. */
1078 static rtx
1079 steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
1080 rtx delay_list, struct resources *sets,
1081 struct resources *needed,
1082 struct resources *other_needed,
1083 int slots_to_fill, int *pslots_filled,
1084 int *pannul_p, rtx *pnew_thread)
1086 rtx temp;
1087 int slots_remaining = slots_to_fill - *pslots_filled;
1088 int total_slots_filled = *pslots_filled;
1089 rtx new_delay_list = 0;
1090 int must_annul = *pannul_p;
1091 int used_annul = 0;
1092 int i;
1093 struct resources cc_set;
1095 /* We can't do anything if there are more delay slots in SEQ than we
1096 can handle, or if we don't know that it will be a taken branch.
1097 We know that it will be a taken branch if it is either an unconditional
1098 branch or a conditional branch with a stricter branch condition.
1100 Also, exit if the branch has more than one set, since then it is computing
1101 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1102 ??? It may be possible to move other sets into INSN in addition to
1103 moving the instructions in the delay slots.
1105 We can not steal the delay list if one of the instructions in the
1106 current delay_list modifies the condition codes and the jump in the
1107 sequence is a conditional jump. We can not do this because we can
1108 not change the direction of the jump because the condition codes
1109 will effect the direction of the jump in the sequence. */
1111 CLEAR_RESOURCE (&cc_set);
1112 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1114 rtx trial = XEXP (temp, 0);
1116 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1117 if (insn_references_resource_p (XVECEXP (seq , 0, 0), &cc_set, false))
1118 return delay_list;
1121 if (XVECLEN (seq, 0) - 1 > slots_remaining
1122 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0))
1123 || ! single_set (XVECEXP (seq, 0, 0)))
1124 return delay_list;
1126 #ifdef MD_CAN_REDIRECT_BRANCH
1127 /* On some targets, branches with delay slots can have a limited
1128 displacement. Give the back end a chance to tell us we can't do
1129 this. */
1130 if (! MD_CAN_REDIRECT_BRANCH (insn, XVECEXP (seq, 0, 0)))
1131 return delay_list;
1132 #endif
1134 for (i = 1; i < XVECLEN (seq, 0); i++)
1136 rtx trial = XVECEXP (seq, 0, i);
1137 int flags;
1139 if (insn_references_resource_p (trial, sets, false)
1140 || insn_sets_resource_p (trial, needed, false)
1141 || insn_sets_resource_p (trial, sets, false)
1142 #ifdef HAVE_cc0
1143 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1144 delay list. */
1145 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1146 #endif
1147 /* If TRIAL is from the fallthrough code of an annulled branch insn
1148 in SEQ, we cannot use it. */
1149 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1150 && ! INSN_FROM_TARGET_P (trial)))
1151 return delay_list;
1153 /* If this insn was already done (usually in a previous delay slot),
1154 pretend we put it in our delay slot. */
1155 if (redundant_insn (trial, insn, new_delay_list))
1156 continue;
1158 /* We will end up re-vectoring this branch, so compute flags
1159 based on jumping to the new label. */
1160 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1162 if (! must_annul
1163 && ((condition == const_true_rtx
1164 || (! insn_sets_resource_p (trial, other_needed, false)
1165 && ! may_trap_or_fault_p (PATTERN (trial)))))
1166 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1167 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1168 && (must_annul = 1,
1169 check_annul_list_true_false (0, delay_list)
1170 && check_annul_list_true_false (0, new_delay_list)
1171 && eligible_for_annul_false (insn, total_slots_filled,
1172 trial, flags)))
1174 if (must_annul)
1175 used_annul = 1;
1176 temp = copy_delay_slot_insn (trial);
1177 INSN_FROM_TARGET_P (temp) = 1;
1178 new_delay_list = add_to_delay_list (temp, new_delay_list);
1179 total_slots_filled++;
1181 if (--slots_remaining == 0)
1182 break;
1184 else
1185 return delay_list;
1188 /* Show the place to which we will be branching. */
1189 *pnew_thread = first_active_target_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1191 /* Add any new insns to the delay list and update the count of the
1192 number of slots filled. */
1193 *pslots_filled = total_slots_filled;
1194 if (used_annul)
1195 *pannul_p = 1;
1197 if (delay_list == 0)
1198 return new_delay_list;
1200 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1201 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1203 return delay_list;
1206 /* Similar to steal_delay_list_from_target except that SEQ is on the
1207 fallthrough path of INSN. Here we only do something if the delay insn
1208 of SEQ is an unconditional branch. In that case we steal its delay slot
1209 for INSN since unconditional branches are much easier to fill. */
1211 static rtx
1212 steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx seq,
1213 rtx delay_list, struct resources *sets,
1214 struct resources *needed,
1215 struct resources *other_needed,
1216 int slots_to_fill, int *pslots_filled,
1217 int *pannul_p)
1219 int i;
1220 int flags;
1221 int must_annul = *pannul_p;
1222 int used_annul = 0;
1224 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1226 /* We can't do anything if SEQ's delay insn isn't an
1227 unconditional branch. */
1229 if (! simplejump_or_return_p (XVECEXP (seq, 0, 0)))
1230 return delay_list;
1232 for (i = 1; i < XVECLEN (seq, 0); i++)
1234 rtx trial = XVECEXP (seq, 0, i);
1236 /* If TRIAL sets CC0, stealing it will move it too far from the use
1237 of CC0. */
1238 if (insn_references_resource_p (trial, sets, false)
1239 || insn_sets_resource_p (trial, needed, false)
1240 || insn_sets_resource_p (trial, sets, false)
1241 #ifdef HAVE_cc0
1242 || sets_cc0_p (PATTERN (trial))
1243 #endif
1246 break;
1248 /* If this insn was already done, we don't need it. */
1249 if (redundant_insn (trial, insn, delay_list))
1251 delete_from_delay_slot (trial);
1252 continue;
1255 if (! must_annul
1256 && ((condition == const_true_rtx
1257 || (! insn_sets_resource_p (trial, other_needed, false)
1258 && ! may_trap_or_fault_p (PATTERN (trial)))))
1259 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1260 : (must_annul || delay_list == NULL) && (must_annul = 1,
1261 check_annul_list_true_false (1, delay_list)
1262 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1264 if (must_annul)
1265 used_annul = 1;
1266 delete_from_delay_slot (trial);
1267 delay_list = add_to_delay_list (trial, delay_list);
1269 if (++(*pslots_filled) == slots_to_fill)
1270 break;
1272 else
1273 break;
1276 if (used_annul)
1277 *pannul_p = 1;
1278 return delay_list;
1281 /* Try merging insns starting at THREAD which match exactly the insns in
1282 INSN's delay list.
1284 If all insns were matched and the insn was previously annulling, the
1285 annul bit will be cleared.
1287 For each insn that is merged, if the branch is or will be non-annulling,
1288 we delete the merged insn. */
1290 static void
1291 try_merge_delay_insns (rtx insn, rtx thread)
1293 rtx trial, next_trial;
1294 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1295 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1296 int slot_number = 1;
1297 int num_slots = XVECLEN (PATTERN (insn), 0);
1298 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1299 struct resources set, needed;
1300 rtx merged_insns = 0;
1301 int i;
1302 int flags;
1304 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1306 CLEAR_RESOURCE (&needed);
1307 CLEAR_RESOURCE (&set);
1309 /* If this is not an annulling branch, take into account anything needed in
1310 INSN's delay slot. This prevents two increments from being incorrectly
1311 folded into one. If we are annulling, this would be the correct
1312 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1313 will essentially disable this optimization. This method is somewhat of
1314 a kludge, but I don't see a better way.) */
1315 if (! annul_p)
1316 for (i = 1 ; i < num_slots; i++)
1317 if (XVECEXP (PATTERN (insn), 0, i))
1318 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1319 true);
1321 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1323 rtx pat = PATTERN (trial);
1324 rtx oldtrial = trial;
1326 next_trial = next_nonnote_insn (trial);
1328 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1329 if (NONJUMP_INSN_P (trial)
1330 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1331 continue;
1333 if (GET_CODE (next_to_match) == GET_CODE (trial)
1334 #ifdef HAVE_cc0
1335 /* We can't share an insn that sets cc0. */
1336 && ! sets_cc0_p (pat)
1337 #endif
1338 && ! insn_references_resource_p (trial, &set, true)
1339 && ! insn_sets_resource_p (trial, &set, true)
1340 && ! insn_sets_resource_p (trial, &needed, true)
1341 && (trial = try_split (pat, trial, 0)) != 0
1342 /* Update next_trial, in case try_split succeeded. */
1343 && (next_trial = next_nonnote_insn (trial))
1344 /* Likewise THREAD. */
1345 && (thread = oldtrial == thread ? trial : thread)
1346 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1347 /* Have to test this condition if annul condition is different
1348 from (and less restrictive than) non-annulling one. */
1349 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1352 if (! annul_p)
1354 update_block (trial, thread);
1355 if (trial == thread)
1356 thread = next_active_insn (thread);
1358 delete_related_insns (trial);
1359 INSN_FROM_TARGET_P (next_to_match) = 0;
1361 else
1362 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1364 if (++slot_number == num_slots)
1365 break;
1367 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1370 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1371 mark_referenced_resources (trial, &needed, true);
1374 /* See if we stopped on a filled insn. If we did, try to see if its
1375 delay slots match. */
1376 if (slot_number != num_slots
1377 && trial && NONJUMP_INSN_P (trial)
1378 && GET_CODE (PATTERN (trial)) == SEQUENCE
1379 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1380 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1382 rtx pat = PATTERN (trial);
1383 rtx filled_insn = XVECEXP (pat, 0, 0);
1385 /* Account for resources set/needed by the filled insn. */
1386 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1387 mark_referenced_resources (filled_insn, &needed, true);
1389 for (i = 1; i < XVECLEN (pat, 0); i++)
1391 rtx dtrial = XVECEXP (pat, 0, i);
1393 if (! insn_references_resource_p (dtrial, &set, true)
1394 && ! insn_sets_resource_p (dtrial, &set, true)
1395 && ! insn_sets_resource_p (dtrial, &needed, true)
1396 #ifdef HAVE_cc0
1397 && ! sets_cc0_p (PATTERN (dtrial))
1398 #endif
1399 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1400 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1402 if (! annul_p)
1404 rtx new_rtx;
1406 update_block (dtrial, thread);
1407 new_rtx = delete_from_delay_slot (dtrial);
1408 if (INSN_DELETED_P (thread))
1409 thread = new_rtx;
1410 INSN_FROM_TARGET_P (next_to_match) = 0;
1412 else
1413 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1414 merged_insns);
1416 if (++slot_number == num_slots)
1417 break;
1419 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1421 else
1423 /* Keep track of the set/referenced resources for the delay
1424 slots of any trial insns we encounter. */
1425 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1426 mark_referenced_resources (dtrial, &needed, true);
1431 /* If all insns in the delay slot have been matched and we were previously
1432 annulling the branch, we need not any more. In that case delete all the
1433 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1434 the delay list so that we know that it isn't only being used at the
1435 target. */
1436 if (slot_number == num_slots && annul_p)
1438 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1440 if (GET_MODE (merged_insns) == SImode)
1442 rtx new_rtx;
1444 update_block (XEXP (merged_insns, 0), thread);
1445 new_rtx = delete_from_delay_slot (XEXP (merged_insns, 0));
1446 if (INSN_DELETED_P (thread))
1447 thread = new_rtx;
1449 else
1451 update_block (XEXP (merged_insns, 0), thread);
1452 delete_related_insns (XEXP (merged_insns, 0));
1456 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1458 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1459 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1463 /* See if INSN is redundant with an insn in front of TARGET. Often this
1464 is called when INSN is a candidate for a delay slot of TARGET.
1465 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1466 of INSN. Often INSN will be redundant with an insn in a delay slot of
1467 some previous insn. This happens when we have a series of branches to the
1468 same label; in that case the first insn at the target might want to go
1469 into each of the delay slots.
1471 If we are not careful, this routine can take up a significant fraction
1472 of the total compilation time (4%), but only wins rarely. Hence we
1473 speed this routine up by making two passes. The first pass goes back
1474 until it hits a label and sees if it finds an insn with an identical
1475 pattern. Only in this (relatively rare) event does it check for
1476 data conflicts.
1478 We do not split insns we encounter. This could cause us not to find a
1479 redundant insn, but the cost of splitting seems greater than the possible
1480 gain in rare cases. */
1482 static rtx
1483 redundant_insn (rtx insn, rtx target, rtx delay_list)
1485 rtx target_main = target;
1486 rtx ipat = PATTERN (insn);
1487 rtx trial, pat;
1488 struct resources needed, set;
1489 int i;
1490 unsigned insns_to_search;
1492 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1493 are allowed to not actually assign to such a register. */
1494 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1495 return 0;
1497 /* Scan backwards looking for a match. */
1498 for (trial = PREV_INSN (target),
1499 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1500 trial && insns_to_search > 0;
1501 trial = PREV_INSN (trial))
1503 if (LABEL_P (trial))
1504 return 0;
1506 if (!INSN_P (trial))
1507 continue;
1508 --insns_to_search;
1510 pat = PATTERN (trial);
1511 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1512 continue;
1514 if (GET_CODE (pat) == SEQUENCE)
1516 /* Stop for a CALL and its delay slots because it is difficult to
1517 track its resource needs correctly. */
1518 if (CALL_P (XVECEXP (pat, 0, 0)))
1519 return 0;
1521 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1522 slots because it is difficult to track its resource needs
1523 correctly. */
1525 #ifdef INSN_SETS_ARE_DELAYED
1526 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1527 return 0;
1528 #endif
1530 #ifdef INSN_REFERENCES_ARE_DELAYED
1531 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1532 return 0;
1533 #endif
1535 /* See if any of the insns in the delay slot match, updating
1536 resource requirements as we go. */
1537 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1538 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
1539 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat)
1540 && ! find_reg_note (XVECEXP (pat, 0, i), REG_UNUSED, NULL_RTX))
1541 break;
1543 /* If found a match, exit this loop early. */
1544 if (i > 0)
1545 break;
1548 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1549 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1550 break;
1553 /* If we didn't find an insn that matches, return 0. */
1554 if (trial == 0)
1555 return 0;
1557 /* See what resources this insn sets and needs. If they overlap, or
1558 if this insn references CC0, it can't be redundant. */
1560 CLEAR_RESOURCE (&needed);
1561 CLEAR_RESOURCE (&set);
1562 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1563 mark_referenced_resources (insn, &needed, true);
1565 /* If TARGET is a SEQUENCE, get the main insn. */
1566 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1567 target_main = XVECEXP (PATTERN (target), 0, 0);
1569 if (resource_conflicts_p (&needed, &set)
1570 #ifdef HAVE_cc0
1571 || reg_mentioned_p (cc0_rtx, ipat)
1572 #endif
1573 /* The insn requiring the delay may not set anything needed or set by
1574 INSN. */
1575 || insn_sets_resource_p (target_main, &needed, true)
1576 || insn_sets_resource_p (target_main, &set, true))
1577 return 0;
1579 /* Insns we pass may not set either NEEDED or SET, so merge them for
1580 simpler tests. */
1581 needed.memory |= set.memory;
1582 IOR_HARD_REG_SET (needed.regs, set.regs);
1584 /* This insn isn't redundant if it conflicts with an insn that either is
1585 or will be in a delay slot of TARGET. */
1587 while (delay_list)
1589 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1590 return 0;
1591 delay_list = XEXP (delay_list, 1);
1594 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1595 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1596 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1597 true))
1598 return 0;
1600 /* Scan backwards until we reach a label or an insn that uses something
1601 INSN sets or sets something insn uses or sets. */
1603 for (trial = PREV_INSN (target),
1604 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1605 trial && !LABEL_P (trial) && insns_to_search > 0;
1606 trial = PREV_INSN (trial))
1608 if (!INSN_P (trial))
1609 continue;
1610 --insns_to_search;
1612 pat = PATTERN (trial);
1613 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1614 continue;
1616 if (GET_CODE (pat) == SEQUENCE)
1618 bool annul_p = false;
1619 rtx control = XVECEXP (pat, 0, 0);
1621 /* If this is a CALL_INSN and its delay slots, it is hard to track
1622 the resource needs properly, so give up. */
1623 if (CALL_P (control))
1624 return 0;
1626 /* If this is an INSN or JUMP_INSN with delayed effects, it
1627 is hard to track the resource needs properly, so give up. */
1629 #ifdef INSN_SETS_ARE_DELAYED
1630 if (INSN_SETS_ARE_DELAYED (control))
1631 return 0;
1632 #endif
1634 #ifdef INSN_REFERENCES_ARE_DELAYED
1635 if (INSN_REFERENCES_ARE_DELAYED (control))
1636 return 0;
1637 #endif
1639 if (JUMP_P (control))
1640 annul_p = INSN_ANNULLED_BRANCH_P (control);
1642 /* See if any of the insns in the delay slot match, updating
1643 resource requirements as we go. */
1644 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1646 rtx candidate = XVECEXP (pat, 0, i);
1648 /* If an insn will be annulled if the branch is false, it isn't
1649 considered as a possible duplicate insn. */
1650 if (rtx_equal_p (PATTERN (candidate), ipat)
1651 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1653 /* Show that this insn will be used in the sequel. */
1654 INSN_FROM_TARGET_P (candidate) = 0;
1655 return candidate;
1658 /* Unless this is an annulled insn from the target of a branch,
1659 we must stop if it sets anything needed or set by INSN. */
1660 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1661 && insn_sets_resource_p (candidate, &needed, true))
1662 return 0;
1665 /* If the insn requiring the delay slot conflicts with INSN, we
1666 must stop. */
1667 if (insn_sets_resource_p (control, &needed, true))
1668 return 0;
1670 else
1672 /* See if TRIAL is the same as INSN. */
1673 pat = PATTERN (trial);
1674 if (rtx_equal_p (pat, ipat))
1675 return trial;
1677 /* Can't go any further if TRIAL conflicts with INSN. */
1678 if (insn_sets_resource_p (trial, &needed, true))
1679 return 0;
1683 return 0;
1686 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1687 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1688 is nonzero, we are allowed to fall into this thread; otherwise, we are
1689 not.
1691 If LABEL is used more than one or we pass a label other than LABEL before
1692 finding an active insn, we do not own this thread. */
1694 static int
1695 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1697 rtx active_insn;
1698 rtx insn;
1700 /* We don't own the function end. */
1701 if (thread == 0 || ANY_RETURN_P (thread))
1702 return 0;
1704 /* Get the first active insn, or THREAD, if it is an active insn. */
1705 active_insn = next_active_insn (PREV_INSN (thread));
1707 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
1708 if (LABEL_P (insn)
1709 && (insn != label || LABEL_NUSES (insn) != 1))
1710 return 0;
1712 if (allow_fallthrough)
1713 return 1;
1715 /* Ensure that we reach a BARRIER before any insn or label. */
1716 for (insn = prev_nonnote_insn (thread);
1717 insn == 0 || !BARRIER_P (insn);
1718 insn = prev_nonnote_insn (insn))
1719 if (insn == 0
1720 || LABEL_P (insn)
1721 || (NONJUMP_INSN_P (insn)
1722 && GET_CODE (PATTERN (insn)) != USE
1723 && GET_CODE (PATTERN (insn)) != CLOBBER))
1724 return 0;
1726 return 1;
1729 /* Called when INSN is being moved from a location near the target of a jump.
1730 We leave a marker of the form (use (INSN)) immediately in front
1731 of WHERE for mark_target_live_regs. These markers will be deleted when
1732 reorg finishes.
1734 We used to try to update the live status of registers if WHERE is at
1735 the start of a basic block, but that can't work since we may remove a
1736 BARRIER in relax_delay_slots. */
1738 static void
1739 update_block (rtx insn, rtx where)
1741 /* Ignore if this was in a delay slot and it came from the target of
1742 a branch. */
1743 if (INSN_FROM_TARGET_P (insn))
1744 return;
1746 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1748 /* INSN might be making a value live in a block where it didn't use to
1749 be. So recompute liveness information for this block. */
1751 incr_ticks_for_insn (insn);
1754 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1755 the basic block containing the jump. */
1757 static int
1758 reorg_redirect_jump (rtx jump, rtx nlabel)
1760 incr_ticks_for_insn (jump);
1761 return redirect_jump (jump, nlabel, 1);
1764 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1765 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1766 that reference values used in INSN. If we find one, then we move the
1767 REG_DEAD note to INSN.
1769 This is needed to handle the case where a later insn (after INSN) has a
1770 REG_DEAD note for a register used by INSN, and this later insn subsequently
1771 gets moved before a CODE_LABEL because it is a redundant insn. In this
1772 case, mark_target_live_regs may be confused into thinking the register
1773 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1775 static void
1776 update_reg_dead_notes (rtx insn, rtx delayed_insn)
1778 rtx p, link, next;
1780 for (p = next_nonnote_insn (insn); p != delayed_insn;
1781 p = next_nonnote_insn (p))
1782 for (link = REG_NOTES (p); link; link = next)
1784 next = XEXP (link, 1);
1786 if (REG_NOTE_KIND (link) != REG_DEAD
1787 || !REG_P (XEXP (link, 0)))
1788 continue;
1790 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1792 /* Move the REG_DEAD note from P to INSN. */
1793 remove_note (p, link);
1794 XEXP (link, 1) = REG_NOTES (insn);
1795 REG_NOTES (insn) = link;
1800 /* Called when an insn redundant with start_insn is deleted. If there
1801 is a REG_DEAD note for the target of start_insn between start_insn
1802 and stop_insn, then the REG_DEAD note needs to be deleted since the
1803 value no longer dies there.
1805 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1806 confused into thinking the register is dead. */
1808 static void
1809 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1811 rtx p, link, next;
1813 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1814 p = next_nonnote_insn (p))
1815 for (link = REG_NOTES (p); link; link = next)
1817 next = XEXP (link, 1);
1819 if (REG_NOTE_KIND (link) != REG_DEAD
1820 || !REG_P (XEXP (link, 0)))
1821 continue;
1823 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1825 remove_note (p, link);
1826 return;
1831 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1833 This handles the case of udivmodXi4 instructions which optimize their
1834 output depending on whether any REG_UNUSED notes are present.
1835 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1836 does. */
1838 static void
1839 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1841 rtx link, next;
1843 for (link = REG_NOTES (insn); link; link = next)
1845 next = XEXP (link, 1);
1847 if (REG_NOTE_KIND (link) != REG_UNUSED
1848 || !REG_P (XEXP (link, 0)))
1849 continue;
1851 if (! find_regno_note (redundant_insn, REG_UNUSED,
1852 REGNO (XEXP (link, 0))))
1853 remove_note (insn, link);
1857 /* Return the label before INSN, or put a new label there. */
1859 static rtx
1860 get_label_before (rtx insn)
1862 rtx label;
1864 /* Find an existing label at this point
1865 or make a new one if there is none. */
1866 label = prev_nonnote_insn (insn);
1868 if (label == 0 || !LABEL_P (label))
1870 rtx prev = PREV_INSN (insn);
1872 label = gen_label_rtx ();
1873 emit_label_after (label, prev);
1874 LABEL_NUSES (label) = 0;
1876 return label;
1879 /* Scan a function looking for insns that need a delay slot and find insns to
1880 put into the delay slot.
1882 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1883 as calls). We do these first since we don't want jump insns (that are
1884 easier to fill) to get the only insns that could be used for non-jump insns.
1885 When it is zero, only try to fill JUMP_INSNs.
1887 When slots are filled in this manner, the insns (including the
1888 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1889 it is possible to tell whether a delay slot has really been filled
1890 or not. `final' knows how to deal with this, by communicating
1891 through FINAL_SEQUENCE. */
1893 static void
1894 fill_simple_delay_slots (int non_jumps_p)
1896 rtx insn, pat, trial, next_trial;
1897 int i;
1898 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1899 struct resources needed, set;
1900 int slots_to_fill, slots_filled;
1901 rtx delay_list;
1903 for (i = 0; i < num_unfilled_slots; i++)
1905 int flags;
1906 /* Get the next insn to fill. If it has already had any slots assigned,
1907 we can't do anything with it. Maybe we'll improve this later. */
1909 insn = unfilled_slots_base[i];
1910 if (insn == 0
1911 || INSN_DELETED_P (insn)
1912 || (NONJUMP_INSN_P (insn)
1913 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1914 || (JUMP_P (insn) && non_jumps_p)
1915 || (!JUMP_P (insn) && ! non_jumps_p))
1916 continue;
1918 /* It may have been that this insn used to need delay slots, but
1919 now doesn't; ignore in that case. This can happen, for example,
1920 on the HP PA RISC, where the number of delay slots depends on
1921 what insns are nearby. */
1922 slots_to_fill = num_delay_slots (insn);
1924 /* Some machine description have defined instructions to have
1925 delay slots only in certain circumstances which may depend on
1926 nearby insns (which change due to reorg's actions).
1928 For example, the PA port normally has delay slots for unconditional
1929 jumps.
1931 However, the PA port claims such jumps do not have a delay slot
1932 if they are immediate successors of certain CALL_INSNs. This
1933 allows the port to favor filling the delay slot of the call with
1934 the unconditional jump. */
1935 if (slots_to_fill == 0)
1936 continue;
1938 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1939 says how many. After initialization, first try optimizing
1941 call _foo call _foo
1942 nop add %o7,.-L1,%o7
1943 b,a L1
1946 If this case applies, the delay slot of the call is filled with
1947 the unconditional jump. This is done first to avoid having the
1948 delay slot of the call filled in the backward scan. Also, since
1949 the unconditional jump is likely to also have a delay slot, that
1950 insn must exist when it is subsequently scanned.
1952 This is tried on each insn with delay slots as some machines
1953 have insns which perform calls, but are not represented as
1954 CALL_INSNs. */
1956 slots_filled = 0;
1957 delay_list = 0;
1959 if (JUMP_P (insn))
1960 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1961 else
1962 flags = get_jump_flags (insn, NULL_RTX);
1964 if ((trial = next_active_insn (insn))
1965 && JUMP_P (trial)
1966 && simplejump_p (trial)
1967 && eligible_for_delay (insn, slots_filled, trial, flags)
1968 && no_labels_between_p (insn, trial)
1969 && ! can_throw_internal (trial))
1971 rtx *tmp;
1972 slots_filled++;
1973 delay_list = add_to_delay_list (trial, delay_list);
1975 /* TRIAL may have had its delay slot filled, then unfilled. When
1976 the delay slot is unfilled, TRIAL is placed back on the unfilled
1977 slots obstack. Unfortunately, it is placed on the end of the
1978 obstack, not in its original location. Therefore, we must search
1979 from entry i + 1 to the end of the unfilled slots obstack to
1980 try and find TRIAL. */
1981 tmp = &unfilled_slots_base[i + 1];
1982 while (*tmp != trial && tmp != unfilled_slots_next)
1983 tmp++;
1985 /* Remove the unconditional jump from consideration for delay slot
1986 filling and unthread it. */
1987 if (*tmp == trial)
1988 *tmp = 0;
1990 rtx next = NEXT_INSN (trial);
1991 rtx prev = PREV_INSN (trial);
1992 if (prev)
1993 NEXT_INSN (prev) = next;
1994 if (next)
1995 PREV_INSN (next) = prev;
1999 /* Now, scan backwards from the insn to search for a potential
2000 delay-slot candidate. Stop searching when a label or jump is hit.
2002 For each candidate, if it is to go into the delay slot (moved
2003 forward in execution sequence), it must not need or set any resources
2004 that were set by later insns and must not set any resources that
2005 are needed for those insns.
2007 The delay slot insn itself sets resources unless it is a call
2008 (in which case the called routine, not the insn itself, is doing
2009 the setting). */
2011 if (slots_filled < slots_to_fill)
2013 CLEAR_RESOURCE (&needed);
2014 CLEAR_RESOURCE (&set);
2015 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2016 mark_referenced_resources (insn, &needed, false);
2018 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2019 trial = next_trial)
2021 next_trial = prev_nonnote_insn (trial);
2023 /* This must be an INSN or CALL_INSN. */
2024 pat = PATTERN (trial);
2026 /* Stand-alone USE and CLOBBER are just for flow. */
2027 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2028 continue;
2030 /* Check for resource conflict first, to avoid unnecessary
2031 splitting. */
2032 if (! insn_references_resource_p (trial, &set, true)
2033 && ! insn_sets_resource_p (trial, &set, true)
2034 && ! insn_sets_resource_p (trial, &needed, true)
2035 #ifdef HAVE_cc0
2036 /* Can't separate set of cc0 from its use. */
2037 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2038 #endif
2039 && ! can_throw_internal (trial))
2041 trial = try_split (pat, trial, 1);
2042 next_trial = prev_nonnote_insn (trial);
2043 if (eligible_for_delay (insn, slots_filled, trial, flags))
2045 /* In this case, we are searching backward, so if we
2046 find insns to put on the delay list, we want
2047 to put them at the head, rather than the
2048 tail, of the list. */
2050 update_reg_dead_notes (trial, insn);
2051 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2052 trial, delay_list);
2053 update_block (trial, trial);
2054 delete_related_insns (trial);
2055 if (slots_to_fill == ++slots_filled)
2056 break;
2057 continue;
2061 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2062 mark_referenced_resources (trial, &needed, true);
2066 /* If all needed slots haven't been filled, we come here. */
2068 /* Try to optimize case of jumping around a single insn. */
2069 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2070 if (slots_filled != slots_to_fill
2071 && delay_list == 0
2072 && JUMP_P (insn)
2073 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2074 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2076 delay_list = optimize_skip (insn);
2077 if (delay_list)
2078 slots_filled += 1;
2080 #endif
2082 /* Try to get insns from beyond the insn needing the delay slot.
2083 These insns can neither set or reference resources set in insns being
2084 skipped, cannot set resources in the insn being skipped, and, if this
2085 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2086 call might not return).
2088 There used to be code which continued past the target label if
2089 we saw all uses of the target label. This code did not work,
2090 because it failed to account for some instructions which were
2091 both annulled and marked as from the target. This can happen as a
2092 result of optimize_skip. Since this code was redundant with
2093 fill_eager_delay_slots anyways, it was just deleted. */
2095 if (slots_filled != slots_to_fill
2096 /* If this instruction could throw an exception which is
2097 caught in the same function, then it's not safe to fill
2098 the delay slot with an instruction from beyond this
2099 point. For example, consider:
2101 int i = 2;
2103 try {
2104 f();
2105 i = 3;
2106 } catch (...) {}
2108 return i;
2110 Even though `i' is a local variable, we must be sure not
2111 to put `i = 3' in the delay slot if `f' might throw an
2112 exception.
2114 Presumably, we should also check to see if we could get
2115 back to this function via `setjmp'. */
2116 && ! can_throw_internal (insn)
2117 && !JUMP_P (insn))
2119 int maybe_never = 0;
2120 rtx pat, trial_delay;
2122 CLEAR_RESOURCE (&needed);
2123 CLEAR_RESOURCE (&set);
2124 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2125 mark_referenced_resources (insn, &needed, true);
2127 if (CALL_P (insn))
2128 maybe_never = 1;
2130 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2131 trial = next_trial)
2133 next_trial = next_nonnote_insn (trial);
2135 /* This must be an INSN or CALL_INSN. */
2136 pat = PATTERN (trial);
2138 /* Stand-alone USE and CLOBBER are just for flow. */
2139 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2140 continue;
2142 /* If this already has filled delay slots, get the insn needing
2143 the delay slots. */
2144 if (GET_CODE (pat) == SEQUENCE)
2145 trial_delay = XVECEXP (pat, 0, 0);
2146 else
2147 trial_delay = trial;
2149 /* Stop our search when seeing a jump. */
2150 if (JUMP_P (trial_delay))
2151 break;
2153 /* See if we have a resource problem before we try to split. */
2154 if (GET_CODE (pat) != SEQUENCE
2155 && ! insn_references_resource_p (trial, &set, true)
2156 && ! insn_sets_resource_p (trial, &set, true)
2157 && ! insn_sets_resource_p (trial, &needed, true)
2158 #ifdef HAVE_cc0
2159 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2160 #endif
2161 && ! (maybe_never && may_trap_or_fault_p (pat))
2162 && (trial = try_split (pat, trial, 0))
2163 && eligible_for_delay (insn, slots_filled, trial, flags)
2164 && ! can_throw_internal(trial))
2166 next_trial = next_nonnote_insn (trial);
2167 delay_list = add_to_delay_list (trial, delay_list);
2168 #ifdef HAVE_cc0
2169 if (reg_mentioned_p (cc0_rtx, pat))
2170 link_cc0_insns (trial);
2171 #endif
2172 delete_related_insns (trial);
2173 if (slots_to_fill == ++slots_filled)
2174 break;
2175 continue;
2178 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2179 mark_referenced_resources (trial, &needed, true);
2181 /* Ensure we don't put insns between the setting of cc and the
2182 comparison by moving a setting of cc into an earlier delay
2183 slot since these insns could clobber the condition code. */
2184 set.cc = 1;
2186 /* If this is a call, we might not get here. */
2187 if (CALL_P (trial_delay))
2188 maybe_never = 1;
2191 /* If there are slots left to fill and our search was stopped by an
2192 unconditional branch, try the insn at the branch target. We can
2193 redirect the branch if it works.
2195 Don't do this if the insn at the branch target is a branch. */
2196 if (slots_to_fill != slots_filled
2197 && trial
2198 && jump_to_label_p (trial)
2199 && simplejump_p (trial)
2200 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2201 && ! (NONJUMP_INSN_P (next_trial)
2202 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2203 && !JUMP_P (next_trial)
2204 && ! insn_references_resource_p (next_trial, &set, true)
2205 && ! insn_sets_resource_p (next_trial, &set, true)
2206 && ! insn_sets_resource_p (next_trial, &needed, true)
2207 #ifdef HAVE_cc0
2208 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2209 #endif
2210 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2211 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2212 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2213 && ! can_throw_internal (trial))
2215 /* See comment in relax_delay_slots about necessity of using
2216 next_real_insn here. */
2217 rtx new_label = next_real_insn (next_trial);
2219 if (new_label != 0)
2220 new_label = get_label_before (new_label);
2221 else
2222 new_label = find_end_label (simple_return_rtx);
2224 if (new_label)
2226 delay_list
2227 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2228 delay_list);
2229 slots_filled++;
2230 reorg_redirect_jump (trial, new_label);
2235 /* If this is an unconditional jump, then try to get insns from the
2236 target of the jump. */
2237 if (JUMP_P (insn)
2238 && simplejump_p (insn)
2239 && slots_filled != slots_to_fill)
2240 delay_list
2241 = fill_slots_from_thread (insn, const_true_rtx,
2242 next_active_insn (JUMP_LABEL (insn)),
2243 NULL, 1, 1,
2244 own_thread_p (JUMP_LABEL (insn),
2245 JUMP_LABEL (insn), 0),
2246 slots_to_fill, &slots_filled,
2247 delay_list);
2249 if (delay_list)
2250 unfilled_slots_base[i]
2251 = emit_delay_sequence (insn, delay_list, slots_filled);
2253 if (slots_to_fill == slots_filled)
2254 unfilled_slots_base[i] = 0;
2256 note_delay_statistics (slots_filled, 0);
2260 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2261 return the ultimate label reached by any such chain of jumps.
2262 Return a suitable return rtx if the chain ultimately leads to a
2263 return instruction.
2264 If LABEL is not followed by a jump, return LABEL.
2265 If the chain loops or we can't find end, return LABEL,
2266 since that tells caller to avoid changing the insn.
2267 If the returned label is obtained by following a REG_CROSSING_JUMP
2268 jump, set *CROSSING to true, otherwise set it to false. */
2270 static rtx
2271 follow_jumps (rtx label, rtx jump, bool *crossing)
2273 rtx insn;
2274 rtx next;
2275 rtx value = label;
2276 int depth;
2278 *crossing = false;
2279 if (ANY_RETURN_P (label))
2280 return label;
2281 for (depth = 0;
2282 (depth < 10
2283 && (insn = next_active_insn (value)) != 0
2284 && JUMP_P (insn)
2285 && JUMP_LABEL (insn) != NULL_RTX
2286 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2287 || ANY_RETURN_P (PATTERN (insn)))
2288 && (next = NEXT_INSN (insn))
2289 && BARRIER_P (next));
2290 depth++)
2292 rtx this_label = JUMP_LABEL (insn);
2293 rtx tem;
2295 /* If we have found a cycle, make the insn jump to itself. */
2296 if (this_label == label)
2297 return label;
2298 if (ANY_RETURN_P (this_label))
2299 return this_label;
2300 tem = next_active_insn (this_label);
2301 if (tem && JUMP_TABLE_DATA_P (tem))
2302 break;
2304 if (!targetm.can_follow_jump (jump, insn))
2305 break;
2306 if (!*crossing)
2307 *crossing
2308 = find_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX) != NULL_RTX;
2309 value = this_label;
2311 if (depth == 10)
2312 return label;
2313 return value;
2316 /* Try to find insns to place in delay slots.
2318 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2319 or is an unconditional branch if CONDITION is const_true_rtx.
2320 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2322 THREAD is a flow-of-control, either the insns to be executed if the
2323 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2325 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2326 to see if any potential delay slot insns set things needed there.
2328 LIKELY is nonzero if it is extremely likely that the branch will be
2329 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2330 end of a loop back up to the top.
2332 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2333 thread. I.e., it is the fallthrough code of our jump or the target of the
2334 jump when we are the only jump going there.
2336 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2337 case, we can only take insns from the head of the thread for our delay
2338 slot. We then adjust the jump to point after the insns we have taken. */
2340 static rtx
2341 fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
2342 rtx opposite_thread, int likely, int thread_if_true,
2343 int own_thread, int slots_to_fill,
2344 int *pslots_filled, rtx delay_list)
2346 rtx new_thread;
2347 struct resources opposite_needed, set, needed;
2348 rtx trial;
2349 int lose = 0;
2350 int must_annul = 0;
2351 int flags;
2353 /* Validate our arguments. */
2354 gcc_assert(condition != const_true_rtx || thread_if_true);
2355 gcc_assert(own_thread || thread_if_true);
2357 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2359 /* If our thread is the end of subroutine, we can't get any delay
2360 insns from that. */
2361 if (thread == NULL_RTX || ANY_RETURN_P (thread))
2362 return delay_list;
2364 /* If this is an unconditional branch, nothing is needed at the
2365 opposite thread. Otherwise, compute what is needed there. */
2366 if (condition == const_true_rtx)
2367 CLEAR_RESOURCE (&opposite_needed);
2368 else
2369 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2371 /* If the insn at THREAD can be split, do it here to avoid having to
2372 update THREAD and NEW_THREAD if it is done in the loop below. Also
2373 initialize NEW_THREAD. */
2375 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2377 /* Scan insns at THREAD. We are looking for an insn that can be removed
2378 from THREAD (it neither sets nor references resources that were set
2379 ahead of it and it doesn't set anything needs by the insns ahead of
2380 it) and that either can be placed in an annulling insn or aren't
2381 needed at OPPOSITE_THREAD. */
2383 CLEAR_RESOURCE (&needed);
2384 CLEAR_RESOURCE (&set);
2386 /* If we do not own this thread, we must stop as soon as we find
2387 something that we can't put in a delay slot, since all we can do
2388 is branch into THREAD at a later point. Therefore, labels stop
2389 the search if this is not the `true' thread. */
2391 for (trial = thread;
2392 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2393 trial = next_nonnote_insn (trial))
2395 rtx pat, old_trial;
2397 /* If we have passed a label, we no longer own this thread. */
2398 if (LABEL_P (trial))
2400 own_thread = 0;
2401 continue;
2404 pat = PATTERN (trial);
2405 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2406 continue;
2408 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2409 don't separate or copy insns that set and use CC0. */
2410 if (! insn_references_resource_p (trial, &set, true)
2411 && ! insn_sets_resource_p (trial, &set, true)
2412 && ! insn_sets_resource_p (trial, &needed, true)
2413 #ifdef HAVE_cc0
2414 && ! (reg_mentioned_p (cc0_rtx, pat)
2415 && (! own_thread || ! sets_cc0_p (pat)))
2416 #endif
2417 && ! can_throw_internal (trial))
2419 rtx prior_insn;
2421 /* If TRIAL is redundant with some insn before INSN, we don't
2422 actually need to add it to the delay list; we can merely pretend
2423 we did. */
2424 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2426 fix_reg_dead_note (prior_insn, insn);
2427 if (own_thread)
2429 update_block (trial, thread);
2430 if (trial == thread)
2432 thread = next_active_insn (thread);
2433 if (new_thread == trial)
2434 new_thread = thread;
2437 delete_related_insns (trial);
2439 else
2441 update_reg_unused_notes (prior_insn, trial);
2442 new_thread = next_active_insn (trial);
2445 continue;
2448 /* There are two ways we can win: If TRIAL doesn't set anything
2449 needed at the opposite thread and can't trap, or if it can
2450 go into an annulled delay slot. */
2451 if (!must_annul
2452 && (condition == const_true_rtx
2453 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2454 && ! may_trap_or_fault_p (pat)
2455 && ! RTX_FRAME_RELATED_P (trial))))
2457 old_trial = trial;
2458 trial = try_split (pat, trial, 0);
2459 if (new_thread == old_trial)
2460 new_thread = trial;
2461 if (thread == old_trial)
2462 thread = trial;
2463 pat = PATTERN (trial);
2464 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2465 goto winner;
2467 else if (0
2468 #ifdef ANNUL_IFTRUE_SLOTS
2469 || ! thread_if_true
2470 #endif
2471 #ifdef ANNUL_IFFALSE_SLOTS
2472 || thread_if_true
2473 #endif
2476 old_trial = trial;
2477 trial = try_split (pat, trial, 0);
2478 if (new_thread == old_trial)
2479 new_thread = trial;
2480 if (thread == old_trial)
2481 thread = trial;
2482 pat = PATTERN (trial);
2483 if ((must_annul || delay_list == NULL) && (thread_if_true
2484 ? check_annul_list_true_false (0, delay_list)
2485 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2486 : check_annul_list_true_false (1, delay_list)
2487 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2489 rtx temp;
2491 must_annul = 1;
2492 winner:
2494 #ifdef HAVE_cc0
2495 if (reg_mentioned_p (cc0_rtx, pat))
2496 link_cc0_insns (trial);
2497 #endif
2499 /* If we own this thread, delete the insn. If this is the
2500 destination of a branch, show that a basic block status
2501 may have been updated. In any case, mark the new
2502 starting point of this thread. */
2503 if (own_thread)
2505 rtx note;
2507 update_block (trial, thread);
2508 if (trial == thread)
2510 thread = next_active_insn (thread);
2511 if (new_thread == trial)
2512 new_thread = thread;
2515 /* We are moving this insn, not deleting it. We must
2516 temporarily increment the use count on any referenced
2517 label lest it be deleted by delete_related_insns. */
2518 for (note = REG_NOTES (trial);
2519 note != NULL_RTX;
2520 note = XEXP (note, 1))
2521 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2522 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2524 /* REG_LABEL_OPERAND could be
2525 NOTE_INSN_DELETED_LABEL too. */
2526 if (LABEL_P (XEXP (note, 0)))
2527 LABEL_NUSES (XEXP (note, 0))++;
2528 else
2529 gcc_assert (REG_NOTE_KIND (note)
2530 == REG_LABEL_OPERAND);
2532 if (jump_to_label_p (trial))
2533 LABEL_NUSES (JUMP_LABEL (trial))++;
2535 delete_related_insns (trial);
2537 for (note = REG_NOTES (trial);
2538 note != NULL_RTX;
2539 note = XEXP (note, 1))
2540 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2541 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2543 /* REG_LABEL_OPERAND could be
2544 NOTE_INSN_DELETED_LABEL too. */
2545 if (LABEL_P (XEXP (note, 0)))
2546 LABEL_NUSES (XEXP (note, 0))--;
2547 else
2548 gcc_assert (REG_NOTE_KIND (note)
2549 == REG_LABEL_OPERAND);
2551 if (jump_to_label_p (trial))
2552 LABEL_NUSES (JUMP_LABEL (trial))--;
2554 else
2555 new_thread = next_active_insn (trial);
2557 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2558 if (thread_if_true)
2559 INSN_FROM_TARGET_P (temp) = 1;
2561 delay_list = add_to_delay_list (temp, delay_list);
2563 if (slots_to_fill == ++(*pslots_filled))
2565 /* Even though we have filled all the slots, we
2566 may be branching to a location that has a
2567 redundant insn. Skip any if so. */
2568 while (new_thread && ! own_thread
2569 && ! insn_sets_resource_p (new_thread, &set, true)
2570 && ! insn_sets_resource_p (new_thread, &needed,
2571 true)
2572 && ! insn_references_resource_p (new_thread,
2573 &set, true)
2574 && (prior_insn
2575 = redundant_insn (new_thread, insn,
2576 delay_list)))
2578 /* We know we do not own the thread, so no need
2579 to call update_block and delete_insn. */
2580 fix_reg_dead_note (prior_insn, insn);
2581 update_reg_unused_notes (prior_insn, new_thread);
2582 new_thread = next_active_insn (new_thread);
2584 break;
2587 continue;
2592 /* This insn can't go into a delay slot. */
2593 lose = 1;
2594 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2595 mark_referenced_resources (trial, &needed, true);
2597 /* Ensure we don't put insns between the setting of cc and the comparison
2598 by moving a setting of cc into an earlier delay slot since these insns
2599 could clobber the condition code. */
2600 set.cc = 1;
2602 /* If this insn is a register-register copy and the next insn has
2603 a use of our destination, change it to use our source. That way,
2604 it will become a candidate for our delay slot the next time
2605 through this loop. This case occurs commonly in loops that
2606 scan a list.
2608 We could check for more complex cases than those tested below,
2609 but it doesn't seem worth it. It might also be a good idea to try
2610 to swap the two insns. That might do better.
2612 We can't do this if the next insn modifies our destination, because
2613 that would make the replacement into the insn invalid. We also can't
2614 do this if it modifies our source, because it might be an earlyclobber
2615 operand. This latter test also prevents updating the contents of
2616 a PRE_INC. We also can't do this if there's overlap of source and
2617 destination. Overlap may happen for larger-than-register-size modes. */
2619 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2620 && REG_P (SET_SRC (pat))
2621 && REG_P (SET_DEST (pat))
2622 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2624 rtx next = next_nonnote_insn (trial);
2626 if (next && NONJUMP_INSN_P (next)
2627 && GET_CODE (PATTERN (next)) != USE
2628 && ! reg_set_p (SET_DEST (pat), next)
2629 && ! reg_set_p (SET_SRC (pat), next)
2630 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2631 && ! modified_in_p (SET_DEST (pat), next))
2632 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2636 /* If we stopped on a branch insn that has delay slots, see if we can
2637 steal some of the insns in those slots. */
2638 if (trial && NONJUMP_INSN_P (trial)
2639 && GET_CODE (PATTERN (trial)) == SEQUENCE
2640 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2642 /* If this is the `true' thread, we will want to follow the jump,
2643 so we can only do this if we have taken everything up to here. */
2644 if (thread_if_true && trial == new_thread)
2646 delay_list
2647 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
2648 delay_list, &set, &needed,
2649 &opposite_needed, slots_to_fill,
2650 pslots_filled, &must_annul,
2651 &new_thread);
2652 /* If we owned the thread and are told that it branched
2653 elsewhere, make sure we own the thread at the new location. */
2654 if (own_thread && trial != new_thread)
2655 own_thread = own_thread_p (new_thread, new_thread, 0);
2657 else if (! thread_if_true)
2658 delay_list
2659 = steal_delay_list_from_fallthrough (insn, condition,
2660 PATTERN (trial),
2661 delay_list, &set, &needed,
2662 &opposite_needed, slots_to_fill,
2663 pslots_filled, &must_annul);
2666 /* If we haven't found anything for this delay slot and it is very
2667 likely that the branch will be taken, see if the insn at our target
2668 increments or decrements a register with an increment that does not
2669 depend on the destination register. If so, try to place the opposite
2670 arithmetic insn after the jump insn and put the arithmetic insn in the
2671 delay slot. If we can't do this, return. */
2672 if (delay_list == 0 && likely
2673 && new_thread && !ANY_RETURN_P (new_thread)
2674 && NONJUMP_INSN_P (new_thread)
2675 && !RTX_FRAME_RELATED_P (new_thread)
2676 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2677 && asm_noperands (PATTERN (new_thread)) < 0)
2679 rtx pat = PATTERN (new_thread);
2680 rtx dest;
2681 rtx src;
2683 trial = new_thread;
2684 pat = PATTERN (trial);
2686 if (!NONJUMP_INSN_P (trial)
2687 || GET_CODE (pat) != SET
2688 || ! eligible_for_delay (insn, 0, trial, flags)
2689 || can_throw_internal (trial))
2690 return 0;
2692 dest = SET_DEST (pat), src = SET_SRC (pat);
2693 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2694 && rtx_equal_p (XEXP (src, 0), dest)
2695 && (!FLOAT_MODE_P (GET_MODE (src))
2696 || flag_unsafe_math_optimizations)
2697 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2698 && ! side_effects_p (pat))
2700 rtx other = XEXP (src, 1);
2701 rtx new_arith;
2702 rtx ninsn;
2704 /* If this is a constant adjustment, use the same code with
2705 the negated constant. Otherwise, reverse the sense of the
2706 arithmetic. */
2707 if (CONST_INT_P (other))
2708 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2709 negate_rtx (GET_MODE (src), other));
2710 else
2711 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2712 GET_MODE (src), dest, other);
2714 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2715 insn);
2717 if (recog_memoized (ninsn) < 0
2718 || (extract_insn (ninsn), ! constrain_operands (1)))
2720 delete_related_insns (ninsn);
2721 return 0;
2724 if (own_thread)
2726 update_block (trial, thread);
2727 if (trial == thread)
2729 thread = next_active_insn (thread);
2730 if (new_thread == trial)
2731 new_thread = thread;
2733 delete_related_insns (trial);
2735 else
2736 new_thread = next_active_insn (trial);
2738 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2739 if (thread_if_true)
2740 INSN_FROM_TARGET_P (ninsn) = 1;
2742 delay_list = add_to_delay_list (ninsn, NULL_RTX);
2743 (*pslots_filled)++;
2747 if (delay_list && must_annul)
2748 INSN_ANNULLED_BRANCH_P (insn) = 1;
2750 /* If we are to branch into the middle of this thread, find an appropriate
2751 label or make a new one if none, and redirect INSN to it. If we hit the
2752 end of the function, use the end-of-function label. */
2753 if (new_thread != thread)
2755 rtx label;
2756 bool crossing = false;
2758 gcc_assert (thread_if_true);
2760 if (new_thread && simplejump_or_return_p (new_thread)
2761 && redirect_with_delay_list_safe_p (insn,
2762 JUMP_LABEL (new_thread),
2763 delay_list))
2764 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn, &crossing);
2766 if (ANY_RETURN_P (new_thread))
2767 label = find_end_label (new_thread);
2768 else if (LABEL_P (new_thread))
2769 label = new_thread;
2770 else
2771 label = get_label_before (new_thread);
2773 if (label)
2775 reorg_redirect_jump (insn, label);
2776 if (crossing)
2777 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
2781 return delay_list;
2784 /* Make another attempt to find insns to place in delay slots.
2786 We previously looked for insns located in front of the delay insn
2787 and, for non-jump delay insns, located behind the delay insn.
2789 Here only try to schedule jump insns and try to move insns from either
2790 the target or the following insns into the delay slot. If annulling is
2791 supported, we will be likely to do this. Otherwise, we can do this only
2792 if safe. */
2794 static void
2795 fill_eager_delay_slots (void)
2797 rtx insn;
2798 int i;
2799 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2801 for (i = 0; i < num_unfilled_slots; i++)
2803 rtx condition;
2804 rtx target_label, insn_at_target, fallthrough_insn;
2805 rtx delay_list = 0;
2806 int own_target;
2807 int own_fallthrough;
2808 int prediction, slots_to_fill, slots_filled;
2810 insn = unfilled_slots_base[i];
2811 if (insn == 0
2812 || INSN_DELETED_P (insn)
2813 || !JUMP_P (insn)
2814 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2815 continue;
2817 slots_to_fill = num_delay_slots (insn);
2818 /* Some machine description have defined instructions to have
2819 delay slots only in certain circumstances which may depend on
2820 nearby insns (which change due to reorg's actions).
2822 For example, the PA port normally has delay slots for unconditional
2823 jumps.
2825 However, the PA port claims such jumps do not have a delay slot
2826 if they are immediate successors of certain CALL_INSNs. This
2827 allows the port to favor filling the delay slot of the call with
2828 the unconditional jump. */
2829 if (slots_to_fill == 0)
2830 continue;
2832 slots_filled = 0;
2833 target_label = JUMP_LABEL (insn);
2834 condition = get_branch_condition (insn, target_label);
2836 if (condition == 0)
2837 continue;
2839 /* Get the next active fallthrough and target insns and see if we own
2840 them. Then see whether the branch is likely true. We don't need
2841 to do a lot of this for unconditional branches. */
2843 insn_at_target = first_active_target_insn (target_label);
2844 own_target = own_thread_p (target_label, target_label, 0);
2846 if (condition == const_true_rtx)
2848 own_fallthrough = 0;
2849 fallthrough_insn = 0;
2850 prediction = 2;
2852 else
2854 fallthrough_insn = next_active_insn (insn);
2855 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
2856 prediction = mostly_true_jump (insn);
2859 /* If this insn is expected to branch, first try to get insns from our
2860 target, then our fallthrough insns. If it is not expected to branch,
2861 try the other order. */
2863 if (prediction > 0)
2865 delay_list
2866 = fill_slots_from_thread (insn, condition, insn_at_target,
2867 fallthrough_insn, prediction == 2, 1,
2868 own_target,
2869 slots_to_fill, &slots_filled, delay_list);
2871 if (delay_list == 0 && own_fallthrough)
2873 /* Even though we didn't find anything for delay slots,
2874 we might have found a redundant insn which we deleted
2875 from the thread that was filled. So we have to recompute
2876 the next insn at the target. */
2877 target_label = JUMP_LABEL (insn);
2878 insn_at_target = first_active_target_insn (target_label);
2880 delay_list
2881 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2882 insn_at_target, 0, 0,
2883 own_fallthrough,
2884 slots_to_fill, &slots_filled,
2885 delay_list);
2888 else
2890 if (own_fallthrough)
2891 delay_list
2892 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2893 insn_at_target, 0, 0,
2894 own_fallthrough,
2895 slots_to_fill, &slots_filled,
2896 delay_list);
2898 if (delay_list == 0)
2899 delay_list
2900 = fill_slots_from_thread (insn, condition, insn_at_target,
2901 next_active_insn (insn), 0, 1,
2902 own_target,
2903 slots_to_fill, &slots_filled,
2904 delay_list);
2907 if (delay_list)
2908 unfilled_slots_base[i]
2909 = emit_delay_sequence (insn, delay_list, slots_filled);
2911 if (slots_to_fill == slots_filled)
2912 unfilled_slots_base[i] = 0;
2914 note_delay_statistics (slots_filled, 1);
2918 static void delete_computation (rtx insn);
2920 /* Recursively delete prior insns that compute the value (used only by INSN
2921 which the caller is deleting) stored in the register mentioned by NOTE
2922 which is a REG_DEAD note associated with INSN. */
2924 static void
2925 delete_prior_computation (rtx note, rtx insn)
2927 rtx our_prev;
2928 rtx reg = XEXP (note, 0);
2930 for (our_prev = prev_nonnote_insn (insn);
2931 our_prev && (NONJUMP_INSN_P (our_prev)
2932 || CALL_P (our_prev));
2933 our_prev = prev_nonnote_insn (our_prev))
2935 rtx pat = PATTERN (our_prev);
2937 /* If we reach a CALL which is not calling a const function
2938 or the callee pops the arguments, then give up. */
2939 if (CALL_P (our_prev)
2940 && (! RTL_CONST_CALL_P (our_prev)
2941 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
2942 break;
2944 /* If we reach a SEQUENCE, it is too complex to try to
2945 do anything with it, so give up. We can be run during
2946 and after reorg, so SEQUENCE rtl can legitimately show
2947 up here. */
2948 if (GET_CODE (pat) == SEQUENCE)
2949 break;
2951 if (GET_CODE (pat) == USE
2952 && NONJUMP_INSN_P (XEXP (pat, 0)))
2953 /* reorg creates USEs that look like this. We leave them
2954 alone because reorg needs them for its own purposes. */
2955 break;
2957 if (reg_set_p (reg, pat))
2959 if (side_effects_p (pat) && !CALL_P (our_prev))
2960 break;
2962 if (GET_CODE (pat) == PARALLEL)
2964 /* If we find a SET of something else, we can't
2965 delete the insn. */
2967 int i;
2969 for (i = 0; i < XVECLEN (pat, 0); i++)
2971 rtx part = XVECEXP (pat, 0, i);
2973 if (GET_CODE (part) == SET
2974 && SET_DEST (part) != reg)
2975 break;
2978 if (i == XVECLEN (pat, 0))
2979 delete_computation (our_prev);
2981 else if (GET_CODE (pat) == SET
2982 && REG_P (SET_DEST (pat)))
2984 int dest_regno = REGNO (SET_DEST (pat));
2985 int dest_endregno = END_REGNO (SET_DEST (pat));
2986 int regno = REGNO (reg);
2987 int endregno = END_REGNO (reg);
2989 if (dest_regno >= regno
2990 && dest_endregno <= endregno)
2991 delete_computation (our_prev);
2993 /* We may have a multi-word hard register and some, but not
2994 all, of the words of the register are needed in subsequent
2995 insns. Write REG_UNUSED notes for those parts that were not
2996 needed. */
2997 else if (dest_regno <= regno
2998 && dest_endregno >= endregno)
3000 int i;
3002 add_reg_note (our_prev, REG_UNUSED, reg);
3004 for (i = dest_regno; i < dest_endregno; i++)
3005 if (! find_regno_note (our_prev, REG_UNUSED, i))
3006 break;
3008 if (i == dest_endregno)
3009 delete_computation (our_prev);
3013 break;
3016 /* If PAT references the register that dies here, it is an
3017 additional use. Hence any prior SET isn't dead. However, this
3018 insn becomes the new place for the REG_DEAD note. */
3019 if (reg_overlap_mentioned_p (reg, pat))
3021 XEXP (note, 1) = REG_NOTES (our_prev);
3022 REG_NOTES (our_prev) = note;
3023 break;
3028 /* Delete INSN and recursively delete insns that compute values used only
3029 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3031 Look at all our REG_DEAD notes. If a previous insn does nothing other
3032 than set a register that dies in this insn, we can delete that insn
3033 as well.
3035 On machines with CC0, if CC0 is used in this insn, we may be able to
3036 delete the insn that set it. */
3038 static void
3039 delete_computation (rtx insn)
3041 rtx note, next;
3043 #ifdef HAVE_cc0
3044 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3046 rtx prev = prev_nonnote_insn (insn);
3047 /* We assume that at this stage
3048 CC's are always set explicitly
3049 and always immediately before the jump that
3050 will use them. So if the previous insn
3051 exists to set the CC's, delete it
3052 (unless it performs auto-increments, etc.). */
3053 if (prev && NONJUMP_INSN_P (prev)
3054 && sets_cc0_p (PATTERN (prev)))
3056 if (sets_cc0_p (PATTERN (prev)) > 0
3057 && ! side_effects_p (PATTERN (prev)))
3058 delete_computation (prev);
3059 else
3060 /* Otherwise, show that cc0 won't be used. */
3061 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3064 #endif
3066 for (note = REG_NOTES (insn); note; note = next)
3068 next = XEXP (note, 1);
3070 if (REG_NOTE_KIND (note) != REG_DEAD
3071 /* Verify that the REG_NOTE is legitimate. */
3072 || !REG_P (XEXP (note, 0)))
3073 continue;
3075 delete_prior_computation (note, insn);
3078 delete_related_insns (insn);
3081 /* If all INSN does is set the pc, delete it,
3082 and delete the insn that set the condition codes for it
3083 if that's what the previous thing was. */
3085 static void
3086 delete_jump (rtx insn)
3088 rtx set = single_set (insn);
3090 if (set && GET_CODE (SET_DEST (set)) == PC)
3091 delete_computation (insn);
3094 static rtx
3095 label_before_next_insn (rtx x, rtx scan_limit)
3097 rtx insn = next_active_insn (x);
3098 while (insn)
3100 insn = PREV_INSN (insn);
3101 if (insn == scan_limit || insn == NULL_RTX)
3102 return NULL_RTX;
3103 if (LABEL_P (insn))
3104 break;
3106 return insn;
3110 /* Once we have tried two ways to fill a delay slot, make a pass over the
3111 code to try to improve the results and to do such things as more jump
3112 threading. */
3114 static void
3115 relax_delay_slots (rtx first)
3117 rtx insn, next, pat;
3118 rtx trial, delay_insn, target_label;
3120 /* Look at every JUMP_INSN and see if we can improve it. */
3121 for (insn = first; insn; insn = next)
3123 rtx other;
3124 bool crossing;
3126 next = next_active_insn (insn);
3128 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3129 the next insn, or jumps to a label that is not the last of a
3130 group of consecutive labels. */
3131 if (JUMP_P (insn)
3132 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3133 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3135 target_label
3136 = skip_consecutive_labels (follow_jumps (target_label, insn,
3137 &crossing));
3138 if (ANY_RETURN_P (target_label))
3139 target_label = find_end_label (target_label);
3141 if (target_label && next_active_insn (target_label) == next
3142 && ! condjump_in_parallel_p (insn))
3144 delete_jump (insn);
3145 continue;
3148 if (target_label && target_label != JUMP_LABEL (insn))
3150 reorg_redirect_jump (insn, target_label);
3151 if (crossing)
3152 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
3155 /* See if this jump conditionally branches around an unconditional
3156 jump. If so, invert this jump and point it to the target of the
3157 second jump. */
3158 if (next && simplejump_or_return_p (next)
3159 && any_condjump_p (insn)
3160 && target_label
3161 && next_active_insn (target_label) == next_active_insn (next)
3162 && no_labels_between_p (insn, next))
3164 rtx label = JUMP_LABEL (next);
3166 /* Be careful how we do this to avoid deleting code or
3167 labels that are momentarily dead. See similar optimization
3168 in jump.c.
3170 We also need to ensure we properly handle the case when
3171 invert_jump fails. */
3173 ++LABEL_NUSES (target_label);
3174 if (!ANY_RETURN_P (label))
3175 ++LABEL_NUSES (label);
3177 if (invert_jump (insn, label, 1))
3179 delete_related_insns (next);
3180 next = insn;
3183 if (!ANY_RETURN_P (label))
3184 --LABEL_NUSES (label);
3186 if (--LABEL_NUSES (target_label) == 0)
3187 delete_related_insns (target_label);
3189 continue;
3193 /* If this is an unconditional jump and the previous insn is a
3194 conditional jump, try reversing the condition of the previous
3195 insn and swapping our targets. The next pass might be able to
3196 fill the slots.
3198 Don't do this if we expect the conditional branch to be true, because
3199 we would then be making the more common case longer. */
3201 if (simplejump_or_return_p (insn)
3202 && (other = prev_active_insn (insn)) != 0
3203 && any_condjump_p (other)
3204 && no_labels_between_p (other, insn)
3205 && 0 > mostly_true_jump (other))
3207 rtx other_target = JUMP_LABEL (other);
3208 target_label = JUMP_LABEL (insn);
3210 if (invert_jump (other, target_label, 0))
3211 reorg_redirect_jump (insn, other_target);
3214 /* Now look only at cases where we have a filled delay slot. */
3215 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3216 continue;
3218 pat = PATTERN (insn);
3219 delay_insn = XVECEXP (pat, 0, 0);
3221 /* See if the first insn in the delay slot is redundant with some
3222 previous insn. Remove it from the delay slot if so; then set up
3223 to reprocess this insn. */
3224 if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))
3226 delete_from_delay_slot (XVECEXP (pat, 0, 1));
3227 next = prev_active_insn (next);
3228 continue;
3231 /* See if we have a RETURN insn with a filled delay slot followed
3232 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3233 the first RETURN (but not its delay insn). This gives the same
3234 effect in fewer instructions.
3236 Only do so if optimizing for size since this results in slower, but
3237 smaller code. */
3238 if (optimize_function_for_size_p (cfun)
3239 && ANY_RETURN_P (PATTERN (delay_insn))
3240 && next
3241 && JUMP_P (next)
3242 && PATTERN (next) == PATTERN (delay_insn))
3244 rtx after;
3245 int i;
3247 /* Delete the RETURN and just execute the delay list insns.
3249 We do this by deleting the INSN containing the SEQUENCE, then
3250 re-emitting the insns separately, and then deleting the RETURN.
3251 This allows the count of the jump target to be properly
3252 decremented.
3254 Note that we need to change the INSN_UID of the re-emitted insns
3255 since it is used to hash the insns for mark_target_live_regs and
3256 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3258 Clear the from target bit, since these insns are no longer
3259 in delay slots. */
3260 for (i = 0; i < XVECLEN (pat, 0); i++)
3261 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3263 trial = PREV_INSN (insn);
3264 delete_related_insns (insn);
3265 gcc_assert (GET_CODE (pat) == SEQUENCE);
3266 add_insn_after (delay_insn, trial, NULL);
3267 after = delay_insn;
3268 for (i = 1; i < XVECLEN (pat, 0); i++)
3269 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3270 delete_scheduled_jump (delay_insn);
3271 continue;
3274 /* Now look only at the cases where we have a filled JUMP_INSN. */
3275 if (!JUMP_P (delay_insn)
3276 || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn)))
3277 continue;
3279 target_label = JUMP_LABEL (delay_insn);
3280 if (target_label && ANY_RETURN_P (target_label))
3281 continue;
3283 /* If this jump goes to another unconditional jump, thread it, but
3284 don't convert a jump into a RETURN here. */
3285 trial = skip_consecutive_labels (follow_jumps (target_label, delay_insn,
3286 &crossing));
3287 if (ANY_RETURN_P (trial))
3288 trial = find_end_label (trial);
3290 if (trial && trial != target_label
3291 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3293 reorg_redirect_jump (delay_insn, trial);
3294 target_label = trial;
3295 if (crossing)
3296 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
3299 /* If the first insn at TARGET_LABEL is redundant with a previous
3300 insn, redirect the jump to the following insn and process again.
3301 We use next_real_insn instead of next_active_insn so we
3302 don't skip USE-markers, or we'll end up with incorrect
3303 liveness info. */
3304 trial = next_real_insn (target_label);
3305 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3306 && redundant_insn (trial, insn, 0)
3307 && ! can_throw_internal (trial))
3309 /* Figure out where to emit the special USE insn so we don't
3310 later incorrectly compute register live/death info. */
3311 rtx tmp = next_active_insn (trial);
3312 if (tmp == 0)
3313 tmp = find_end_label (simple_return_rtx);
3315 if (tmp)
3317 /* Insert the special USE insn and update dataflow info. */
3318 update_block (trial, tmp);
3320 /* Now emit a label before the special USE insn, and
3321 redirect our jump to the new label. */
3322 target_label = get_label_before (PREV_INSN (tmp));
3323 reorg_redirect_jump (delay_insn, target_label);
3324 next = insn;
3325 continue;
3329 /* Similarly, if it is an unconditional jump with one insn in its
3330 delay list and that insn is redundant, thread the jump. */
3331 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
3332 && XVECLEN (PATTERN (trial), 0) == 2
3333 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
3334 && simplejump_or_return_p (XVECEXP (PATTERN (trial), 0, 0))
3335 && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
3337 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
3338 if (ANY_RETURN_P (target_label))
3339 target_label = find_end_label (target_label);
3341 if (target_label
3342 && redirect_with_delay_slots_safe_p (delay_insn, target_label,
3343 insn))
3345 reorg_redirect_jump (delay_insn, target_label);
3346 next = insn;
3347 continue;
3351 /* See if we have a simple (conditional) jump that is useless. */
3352 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3353 && ! condjump_in_parallel_p (delay_insn)
3354 && prev_active_insn (target_label) == insn
3355 && ! BARRIER_P (prev_nonnote_insn (target_label))
3356 #ifdef HAVE_cc0
3357 /* If the last insn in the delay slot sets CC0 for some insn,
3358 various code assumes that it is in a delay slot. We could
3359 put it back where it belonged and delete the register notes,
3360 but it doesn't seem worthwhile in this uncommon case. */
3361 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3362 REG_CC_USER, NULL_RTX)
3363 #endif
3366 rtx after;
3367 int i;
3369 /* All this insn does is execute its delay list and jump to the
3370 following insn. So delete the jump and just execute the delay
3371 list insns.
3373 We do this by deleting the INSN containing the SEQUENCE, then
3374 re-emitting the insns separately, and then deleting the jump.
3375 This allows the count of the jump target to be properly
3376 decremented.
3378 Note that we need to change the INSN_UID of the re-emitted insns
3379 since it is used to hash the insns for mark_target_live_regs and
3380 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3382 Clear the from target bit, since these insns are no longer
3383 in delay slots. */
3384 for (i = 0; i < XVECLEN (pat, 0); i++)
3385 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3387 trial = PREV_INSN (insn);
3388 delete_related_insns (insn);
3389 gcc_assert (GET_CODE (pat) == SEQUENCE);
3390 add_insn_after (delay_insn, trial, NULL);
3391 after = delay_insn;
3392 for (i = 1; i < XVECLEN (pat, 0); i++)
3393 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3394 delete_scheduled_jump (delay_insn);
3395 continue;
3398 /* See if this is an unconditional jump around a single insn which is
3399 identical to the one in its delay slot. In this case, we can just
3400 delete the branch and the insn in its delay slot. */
3401 if (next && NONJUMP_INSN_P (next)
3402 && label_before_next_insn (next, insn) == target_label
3403 && simplejump_p (insn)
3404 && XVECLEN (pat, 0) == 2
3405 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
3407 delete_related_insns (insn);
3408 continue;
3411 /* See if this jump (with its delay slots) conditionally branches
3412 around an unconditional jump (without delay slots). If so, invert
3413 this jump and point it to the target of the second jump. We cannot
3414 do this for annulled jumps, though. Again, don't convert a jump to
3415 a RETURN here. */
3416 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3417 && any_condjump_p (delay_insn)
3418 && next && simplejump_or_return_p (next)
3419 && next_active_insn (target_label) == next_active_insn (next)
3420 && no_labels_between_p (insn, next))
3422 rtx label = JUMP_LABEL (next);
3423 rtx old_label = JUMP_LABEL (delay_insn);
3425 if (ANY_RETURN_P (label))
3426 label = find_end_label (label);
3428 /* find_end_label can generate a new label. Check this first. */
3429 if (label
3430 && no_labels_between_p (insn, next)
3431 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3433 /* Be careful how we do this to avoid deleting code or labels
3434 that are momentarily dead. See similar optimization in
3435 jump.c */
3436 if (old_label)
3437 ++LABEL_NUSES (old_label);
3439 if (invert_jump (delay_insn, label, 1))
3441 int i;
3443 /* Must update the INSN_FROM_TARGET_P bits now that
3444 the branch is reversed, so that mark_target_live_regs
3445 will handle the delay slot insn correctly. */
3446 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3448 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3449 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3452 delete_related_insns (next);
3453 next = insn;
3456 if (old_label && --LABEL_NUSES (old_label) == 0)
3457 delete_related_insns (old_label);
3458 continue;
3462 /* If we own the thread opposite the way this insn branches, see if we
3463 can merge its delay slots with following insns. */
3464 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3465 && own_thread_p (NEXT_INSN (insn), 0, 1))
3466 try_merge_delay_insns (insn, next);
3467 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3468 && own_thread_p (target_label, target_label, 0))
3469 try_merge_delay_insns (insn, next_active_insn (target_label));
3471 /* If we get here, we haven't deleted INSN. But we may have deleted
3472 NEXT, so recompute it. */
3473 next = next_active_insn (insn);
3478 /* Look for filled jumps to the end of function label. We can try to convert
3479 them into RETURN insns if the insns in the delay slot are valid for the
3480 RETURN as well. */
3482 static void
3483 make_return_insns (rtx first)
3485 rtx insn, jump_insn, pat;
3486 rtx real_return_label = function_return_label;
3487 rtx real_simple_return_label = function_simple_return_label;
3488 int slots, i;
3490 /* See if there is a RETURN insn in the function other than the one we
3491 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3492 into a RETURN to jump to it. */
3493 for (insn = first; insn; insn = NEXT_INSN (insn))
3494 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3496 rtx t = get_label_before (insn);
3497 if (PATTERN (insn) == ret_rtx)
3498 real_return_label = t;
3499 else
3500 real_simple_return_label = t;
3501 break;
3504 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3505 was equal to END_OF_FUNCTION_LABEL. */
3506 if (real_return_label)
3507 LABEL_NUSES (real_return_label)++;
3508 if (real_simple_return_label)
3509 LABEL_NUSES (real_simple_return_label)++;
3511 /* Clear the list of insns to fill so we can use it. */
3512 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3514 for (insn = first; insn; insn = NEXT_INSN (insn))
3516 int flags;
3517 rtx kind, real_label;
3519 /* Only look at filled JUMP_INSNs that go to the end of function
3520 label. */
3521 if (!NONJUMP_INSN_P (insn)
3522 || GET_CODE (PATTERN (insn)) != SEQUENCE
3523 || !jump_to_label_p (XVECEXP (PATTERN (insn), 0, 0)))
3524 continue;
3526 if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) == function_return_label)
3528 kind = ret_rtx;
3529 real_label = real_return_label;
3531 else if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0))
3532 == function_simple_return_label)
3534 kind = simple_return_rtx;
3535 real_label = real_simple_return_label;
3537 else
3538 continue;
3540 pat = PATTERN (insn);
3541 jump_insn = XVECEXP (pat, 0, 0);
3543 /* If we can't make the jump into a RETURN, try to redirect it to the best
3544 RETURN and go on to the next insn. */
3545 if (!reorg_redirect_jump (jump_insn, kind))
3547 /* Make sure redirecting the jump will not invalidate the delay
3548 slot insns. */
3549 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3550 reorg_redirect_jump (jump_insn, real_label);
3551 continue;
3554 /* See if this RETURN can accept the insns current in its delay slot.
3555 It can if it has more or an equal number of slots and the contents
3556 of each is valid. */
3558 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3559 slots = num_delay_slots (jump_insn);
3560 if (slots >= XVECLEN (pat, 0) - 1)
3562 for (i = 1; i < XVECLEN (pat, 0); i++)
3563 if (! (
3564 #ifdef ANNUL_IFFALSE_SLOTS
3565 (INSN_ANNULLED_BRANCH_P (jump_insn)
3566 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3567 ? eligible_for_annul_false (jump_insn, i - 1,
3568 XVECEXP (pat, 0, i), flags) :
3569 #endif
3570 #ifdef ANNUL_IFTRUE_SLOTS
3571 (INSN_ANNULLED_BRANCH_P (jump_insn)
3572 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3573 ? eligible_for_annul_true (jump_insn, i - 1,
3574 XVECEXP (pat, 0, i), flags) :
3575 #endif
3576 eligible_for_delay (jump_insn, i - 1,
3577 XVECEXP (pat, 0, i), flags)))
3578 break;
3580 else
3581 i = 0;
3583 if (i == XVECLEN (pat, 0))
3584 continue;
3586 /* We have to do something with this insn. If it is an unconditional
3587 RETURN, delete the SEQUENCE and output the individual insns,
3588 followed by the RETURN. Then set things up so we try to find
3589 insns for its delay slots, if it needs some. */
3590 if (ANY_RETURN_P (PATTERN (jump_insn)))
3592 rtx prev = PREV_INSN (insn);
3594 delete_related_insns (insn);
3595 for (i = 1; i < XVECLEN (pat, 0); i++)
3596 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3598 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3599 emit_barrier_after (insn);
3601 if (slots)
3602 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3604 else
3605 /* It is probably more efficient to keep this with its current
3606 delay slot as a branch to a RETURN. */
3607 reorg_redirect_jump (jump_insn, real_label);
3610 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3611 new delay slots we have created. */
3612 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3613 delete_related_insns (real_return_label);
3614 if (real_simple_return_label != NULL_RTX
3615 && --LABEL_NUSES (real_simple_return_label) == 0)
3616 delete_related_insns (real_simple_return_label);
3618 fill_simple_delay_slots (1);
3619 fill_simple_delay_slots (0);
3622 /* Try to find insns to place in delay slots. */
3624 static void
3625 dbr_schedule (rtx first)
3627 rtx insn, next, epilogue_insn = 0;
3628 int i;
3629 bool need_return_insns;
3631 /* If the current function has no insns other than the prologue and
3632 epilogue, then do not try to fill any delay slots. */
3633 if (n_basic_blocks == NUM_FIXED_BLOCKS)
3634 return;
3636 /* Find the highest INSN_UID and allocate and initialize our map from
3637 INSN_UID's to position in code. */
3638 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3640 if (INSN_UID (insn) > max_uid)
3641 max_uid = INSN_UID (insn);
3642 if (NOTE_P (insn)
3643 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3644 epilogue_insn = insn;
3647 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3648 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3649 uid_to_ruid[INSN_UID (insn)] = i;
3651 /* Initialize the list of insns that need filling. */
3652 if (unfilled_firstobj == 0)
3654 gcc_obstack_init (&unfilled_slots_obstack);
3655 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3658 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3660 rtx target;
3662 /* Skip vector tables. We can't get attributes for them. */
3663 if (JUMP_TABLE_DATA_P (insn))
3664 continue;
3666 if (JUMP_P (insn))
3667 INSN_ANNULLED_BRANCH_P (insn) = 0;
3668 INSN_FROM_TARGET_P (insn) = 0;
3670 if (num_delay_slots (insn) > 0)
3671 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3673 /* Ensure all jumps go to the last of a set of consecutive labels. */
3674 if (JUMP_P (insn)
3675 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3676 && !ANY_RETURN_P (JUMP_LABEL (insn))
3677 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3678 != JUMP_LABEL (insn)))
3679 redirect_jump (insn, target, 1);
3682 init_resource_info (epilogue_insn);
3684 /* Show we haven't computed an end-of-function label yet. */
3685 function_return_label = function_simple_return_label = NULL_RTX;
3687 /* Initialize the statistics for this function. */
3688 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3689 memset (num_filled_delays, 0, sizeof num_filled_delays);
3691 /* Now do the delay slot filling. Try everything twice in case earlier
3692 changes make more slots fillable. */
3694 for (reorg_pass_number = 0;
3695 reorg_pass_number < MAX_REORG_PASSES;
3696 reorg_pass_number++)
3698 fill_simple_delay_slots (1);
3699 fill_simple_delay_slots (0);
3700 fill_eager_delay_slots ();
3701 relax_delay_slots (first);
3704 /* If we made an end of function label, indicate that it is now
3705 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3706 If it is now unused, delete it. */
3707 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3708 delete_related_insns (function_return_label);
3709 if (function_simple_return_label
3710 && --LABEL_NUSES (function_simple_return_label) == 0)
3711 delete_related_insns (function_simple_return_label);
3713 need_return_insns = false;
3714 #ifdef HAVE_return
3715 need_return_insns |= HAVE_return && function_return_label != 0;
3716 #endif
3717 #ifdef HAVE_simple_return
3718 need_return_insns |= HAVE_simple_return && function_simple_return_label != 0;
3719 #endif
3720 if (need_return_insns)
3721 make_return_insns (first);
3723 /* Delete any USE insns made by update_block; subsequent passes don't need
3724 them or know how to deal with them. */
3725 for (insn = first; insn; insn = next)
3727 next = NEXT_INSN (insn);
3729 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3730 && INSN_P (XEXP (PATTERN (insn), 0)))
3731 next = delete_related_insns (insn);
3734 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3736 /* It is not clear why the line below is needed, but it does seem to be. */
3737 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3739 if (dump_file)
3741 int i, j, need_comma;
3742 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3743 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3745 for (reorg_pass_number = 0;
3746 reorg_pass_number < MAX_REORG_PASSES;
3747 reorg_pass_number++)
3749 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3750 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3752 need_comma = 0;
3753 fprintf (dump_file, ";; Reorg function #%d\n", i);
3755 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3756 num_insns_needing_delays[i][reorg_pass_number]);
3758 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3759 if (num_filled_delays[i][j][reorg_pass_number])
3761 if (need_comma)
3762 fprintf (dump_file, ", ");
3763 need_comma = 1;
3764 fprintf (dump_file, "%d got %d delays",
3765 num_filled_delays[i][j][reorg_pass_number], j);
3767 fprintf (dump_file, "\n");
3770 memset (total_delay_slots, 0, sizeof total_delay_slots);
3771 memset (total_annul_slots, 0, sizeof total_annul_slots);
3772 for (insn = first; insn; insn = NEXT_INSN (insn))
3774 if (! INSN_DELETED_P (insn)
3775 && NONJUMP_INSN_P (insn)
3776 && GET_CODE (PATTERN (insn)) != USE
3777 && GET_CODE (PATTERN (insn)) != CLOBBER)
3779 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3781 rtx control;
3782 j = XVECLEN (PATTERN (insn), 0) - 1;
3783 if (j > MAX_DELAY_HISTOGRAM)
3784 j = MAX_DELAY_HISTOGRAM;
3785 control = XVECEXP (PATTERN (insn), 0, 0);
3786 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3787 total_annul_slots[j]++;
3788 else
3789 total_delay_slots[j]++;
3791 else if (num_delay_slots (insn) > 0)
3792 total_delay_slots[0]++;
3795 fprintf (dump_file, ";; Reorg totals: ");
3796 need_comma = 0;
3797 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3799 if (total_delay_slots[j])
3801 if (need_comma)
3802 fprintf (dump_file, ", ");
3803 need_comma = 1;
3804 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3807 fprintf (dump_file, "\n");
3808 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3809 fprintf (dump_file, ";; Reorg annuls: ");
3810 need_comma = 0;
3811 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3813 if (total_annul_slots[j])
3815 if (need_comma)
3816 fprintf (dump_file, ", ");
3817 need_comma = 1;
3818 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3821 fprintf (dump_file, "\n");
3822 #endif
3823 fprintf (dump_file, "\n");
3826 free_resource_info ();
3827 free (uid_to_ruid);
3828 crtl->dbr_scheduled_p = true;
3830 #endif /* DELAY_SLOTS */
3832 static bool
3833 gate_handle_delay_slots (void)
3835 #ifdef DELAY_SLOTS
3836 /* At -O0 dataflow info isn't updated after RA. */
3837 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3838 #else
3839 return 0;
3840 #endif
3843 /* Run delay slot optimization. */
3844 static unsigned int
3845 rest_of_handle_delay_slots (void)
3847 #ifdef DELAY_SLOTS
3848 dbr_schedule (get_insns ());
3849 #endif
3850 return 0;
3853 struct rtl_opt_pass pass_delay_slots =
3856 RTL_PASS,
3857 "dbr", /* name */
3858 OPTGROUP_NONE, /* optinfo_flags */
3859 gate_handle_delay_slots, /* gate */
3860 rest_of_handle_delay_slots, /* execute */
3861 NULL, /* sub */
3862 NULL, /* next */
3863 0, /* static_pass_number */
3864 TV_DBR_SCHED, /* tv_id */
3865 0, /* properties_required */
3866 0, /* properties_provided */
3867 0, /* properties_destroyed */
3868 0, /* todo_flags_start */
3869 0 /* todo_flags_finish */
3873 /* Machine dependent reorg pass. */
3874 static bool
3875 gate_handle_machine_reorg (void)
3877 return targetm.machine_dependent_reorg != 0;
3881 static unsigned int
3882 rest_of_handle_machine_reorg (void)
3884 targetm.machine_dependent_reorg ();
3885 return 0;
3888 struct rtl_opt_pass pass_machine_reorg =
3891 RTL_PASS,
3892 "mach", /* name */
3893 OPTGROUP_NONE, /* optinfo_flags */
3894 gate_handle_machine_reorg, /* gate */
3895 rest_of_handle_machine_reorg, /* execute */
3896 NULL, /* sub */
3897 NULL, /* next */
3898 0, /* static_pass_number */
3899 TV_MACH_DEP, /* tv_id */
3900 0, /* properties_required */
3901 0, /* properties_provided */
3902 0, /* properties_destroyed */
3903 0, /* todo_flags_start */
3904 0 /* todo_flags_finish */