1 // locks.h - Thread synchronization primitives. ARM implementation.
3 /* Copyright (C) 2007 Free Software Foundation
5 This file is part of libgcj.
7 This software is copyrighted work licensed under the terms of the
8 Libgcj License. Please consult the file "LIBGCJ_LICENSE" for
11 #ifndef __SYSDEP_LOCKS_H__
12 #define __SYSDEP_LOCKS_H__
14 typedef size_t obj_addr_t
; /* Integer type big enough for object */
16 #if (__ARM_EABI__ && __linux)
18 // Atomically replace *addr by new_val if it was initially equal to old.
19 // Return true if the comparison succeeded.
20 // Assumed to have acquire semantics, i.e. later memory operations
21 // cannot execute before the compare_and_swap finishes.
23 compare_and_swap(volatile obj_addr_t
*addr
,
27 return __sync_bool_compare_and_swap(addr
, old
, new_val
);
30 // Set *addr to new_val with release semantics, i.e. making sure
31 // that prior loads and stores complete before this
34 release_set(volatile obj_addr_t
*addr
, obj_addr_t new_val
)
40 // Compare_and_swap with release semantics instead of acquire semantics.
41 // On many architecture, the operation makes both guarantees, so the
42 // implementation can be the same.
44 compare_and_swap_release(volatile obj_addr_t
*addr
,
48 return __sync_bool_compare_and_swap(addr
, old
, new_val
);
51 // Ensure that subsequent instructions do not execute on stale
52 // data that was loaded from memory before the barrier.
53 // On X86, the hardware ensures that reads are properly ordered.
60 // Ensure that prior stores to memory are completed with respect to other
70 /* Atomic compare and exchange. These sequences are not actually
71 atomic; there is a race if *ADDR != OLD_VAL and we are preempted
72 between the two swaps. However, they are very close to atomic, and
73 are the best that a pre-ARMv6 implementation can do without
74 operating system support. LinuxThreads has been using these
75 sequences for many years. */
78 compare_and_swap(volatile obj_addr_t
*addr
,
82 volatile obj_addr_t result
, tmp
;
84 "0: ldr %[tmp],[%[addr]]\n"
85 " cmp %[tmp],%[old_val]\n"
86 " movne %[result],#0\n"
88 " swp %[result],%[new_val],[%[addr]]\n"
89 " cmp %[tmp],%[result]\n"
90 " swpne %[tmp],%[result],[%[addr]]\n"
94 : [result
] "=&r" (result
), [tmp
] "=&r" (tmp
)
95 : [addr
] "r" (addr
), [new_val
] "r" (new_val
), [old_val
] "r" (old_val
)
102 release_set(volatile obj_addr_t
*addr
, obj_addr_t new_val
)
104 __asm__
__volatile__("" : : : "memory");
109 compare_and_swap_release(volatile obj_addr_t
*addr
,
113 return compare_and_swap(addr
, old
, new_val
);
116 // Ensure that subsequent instructions do not execute on stale
117 // data that was loaded from memory before the barrier.
121 __asm__
__volatile__("" : : : "memory");
124 // Ensure that prior stores to memory are completed with respect to other
129 __asm__
__volatile__("" : : : "memory");