gcc/testsuite/gcc.target/aarch64/umaddl_combine_1.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O2 -mcpu=cortex-a53" } */
   3
   4 enum reg_class
   5 {
   6   NO_REGS,
   7   AD_REGS,
   8   ALL_REGS, LIM_REG_CLASSES
   9 };
  10
  11 extern enum reg_class
  12   reg_class_subclasses[((int) LIM_REG_CLASSES)][((int) LIM_REG_CLASSES)];
  13
  14 void
  15 init_reg_sets_1 (unsigned int i)
  16 {
  17   unsigned int j;
  18   {
  19     for (j = i + 1; j < ((int) LIM_REG_CLASSES); j++)
  20       {
  21         enum reg_class *p;
  22         p = &reg_class_subclasses[j][0];
  23         while (*p != LIM_REG_CLASSES)
  24           p++;
  25       }
  26   }
  27 }
  28
  29 /* { dg-final { scan-assembler-not "umull\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */