[AArch64] Fix SVE testsuite failures for ILP32 (PR 83846)
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / var_stride_8.c
blob5224a5f3caae55d530ee349baa8a55737f1cf647
1 /* { dg-do compile } */
2 /* { dg-options "-O2 -ftree-vectorize" } */
4 #define TYPE long
5 #define SIZE 257
7 void
8 f (TYPE *x, TYPE *y, long n __attribute__((unused)), long m)
10 for (int i = 0; i < SIZE; ++i)
11 x[i] += y[i * m];
14 /* { dg-final { scan-assembler {\tld1d\tz[0-9]+} } } */
15 /* { dg-final { scan-assembler {\tst1d\tz[0-9]+} } } */
16 /* { dg-final { scan-assembler {\tldr\tx[0-9]+} } } */
17 /* { dg-final { scan-assembler {\tstr\tx[0-9]+} } } */
18 /* Should multiply by (257-1)*8 rather than (VF-1)*8. */
19 /* { dg-final { scan-assembler-times {\tadd\tx[0-9]+, x0, 2048} 1 } } */
20 /* { dg-final { scan-assembler-times {lsl\tx[0-9]+, x[0-9]+, 11} 1 } } */
21 /* { dg-final { scan-assembler {\tcmp\tx[0-9]+, 0} } } */
22 /* { dg-final { scan-assembler-not {\tcmp\tw[0-9]+, 0} } } */
23 /* { dg-final { scan-assembler-times {\tcsel\tx[0-9]+} 2 } } */
24 /* Two range checks only; doesn't matter whether n is zero. */
25 /* { dg-final { scan-assembler {\tcmp\t} } } */
26 /* { dg-final { scan-assembler-times {\tccmp\t} 1 } } */