[AArch64] Fix SVE testsuite failures for ILP32 (PR 83846)
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / spill_4.c
blob29e1a49dc848ec73e4decb98875aa05514d81088
1 /* { dg-do compile } */
2 /* { dg-options "-O2 -ftree-vectorize" } */
4 #include <stdint.h>
6 void consumer (void *);
8 #define TEST_LOOP(TYPE, VAL) \
9 void \
10 multi_loop_##TYPE (TYPE *x) \
11 { \
12 for (int i = 0; i < 100; ++i) \
13 x[i] += VAL; \
14 consumer (x); \
15 for (int i = 0; i < 100; ++i) \
16 x[i] += VAL; \
17 consumer (x); \
18 for (int i = 0; i < 100; ++i) \
19 x[i] += VAL; \
20 consumer (x); \
23 TEST_LOOP (uint16_t, 0x1234);
24 TEST_LOOP (uint32_t, 0x12345);
25 TEST_LOOP (uint64_t, 0x123456);
27 /* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.h,} 3 } } */
28 /* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s,} 3 } } */
29 /* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d,} 3 } } */
30 /* { dg-final { scan-assembler-times {\tld1rh\tz[0-9]+\.h,} 3 } } */
31 /* { dg-final { scan-assembler-times {\tld1rw\tz[0-9]+\.s,} 3 } } */
32 /* { dg-final { scan-assembler-times {\tld1rd\tz[0-9]+\.d,} 3 } } */
33 /* { dg-final { scan-assembler-not {\tldr\tz[0-9]} } } */
34 /* { dg-final { scan-assembler-not {\tstr\tz[0-9]} } } */
35 /* { dg-final { scan-assembler-not {\tldr\tp[0-9]} } } */
36 /* { dg-final { scan-assembler-not {\tstr\tp[0-9]} } } */