[AArch64] Fix SVE testsuite failures for ILP32 (PR 83846)
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / spill_3.c
blob8cb904ed0fb9caad6fcdce5f8658f23aed79d869
1 /* { dg-do compile } */
2 /* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=scalable" } */
4 #include <stdint.h>
6 void consumer (void *);
8 #define TEST_LOOP(TYPE) \
9 void \
10 multi_loop_##TYPE (TYPE *x, TYPE val1, TYPE val2, int n) \
11 { \
12 for (int i = 0; i < n; ++i) \
13 { \
14 x[i * 2] += val1; \
15 x[i * 2 + 1] += val2; \
16 } \
17 consumer (x); \
18 for (int i = 0; i < n; ++i) \
19 { \
20 x[i * 2] += val1; \
21 x[i * 2 + 1] += val2; \
22 } \
23 consumer (x); \
24 for (int i = 0; i < n; ++i) \
25 { \
26 x[i * 2] += val1; \
27 x[i * 2 + 1] += val2; \
28 } \
29 consumer (x); \
32 /* One iteration is enough. */
33 TEST_LOOP (uint8_t);
34 TEST_LOOP (uint16_t);
35 /* Two iterations are enough. Complete unrolling makes sense
36 even at -O2. */
37 TEST_LOOP (uint32_t);
38 /* Four iterations are needed; ought to stay a loop. */
39 TEST_LOOP (uint64_t);
41 /* { dg-final { scan-assembler {\tld1b\tz[0-9]\.b} } } */
42 /* { dg-final { scan-assembler {\tld1h\tz[0-9]\.h} } } */
43 /* { dg-final { scan-assembler {\tld1w\tz[0-9]\.s} } } */
44 /* { dg-final { scan-assembler {\tld1d\tz[0-9]\.d} } } */
45 /* { dg-final { scan-assembler-not {\tldr\tz[0-9]} } } */
46 /* { dg-final { scan-assembler-not {\tstr\tz[0-9]} } } */
47 /* { dg-final { scan-assembler-not {\tldr\tp[0-9]} } } */
48 /* { dg-final { scan-assembler-not {\tstr\tp[0-9]} } } */