[AArch64] Fix SVE testsuite failures for ILP32 (PR 83846)
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / scatter_store_1.c
blob65be5e63a95c54233d71c6e3408d49cd8fcd767e
1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O2 -ftree-vectorize --save-temps" } */
4 #include <stdint.h>
6 #ifndef INDEX32
7 #define INDEX32 int32_t
8 #define INDEX64 int64_t
9 #endif
11 #define TEST_LOOP(DATA_TYPE, BITS) \
12 void __attribute__ ((noinline, noclone)) \
13 f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
14 INDEX##BITS *indices, int n) \
15 { \
16 for (int i = 9; i < n; ++i) \
17 dest[indices[i]] = src[i] + 1; \
20 #define TEST_ALL(T) \
21 T (int32_t, 32) \
22 T (uint32_t, 32) \
23 T (float, 32) \
24 T (int64_t, 64) \
25 T (uint64_t, 64) \
26 T (double, 64)
28 TEST_ALL (TEST_LOOP)
30 /* { dg-final { scan-assembler-times {\tst1w\tz[0-9]+\.s, p[0-7], \[x[0-9]+, z[0-9]+.s, sxtw 2\]\n} 3 } } */
31 /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d, p[0-7], \[x[0-9]+, z[0-9]+.d, lsl 3\]\n} 3 } } */