2015-06-11 Paul Thomas <pault@gcc.gnu.org>
[official-gcc.git] / gcc / lra-spills.c
blob2b3e088b2786a9abeb50d61e97f34c476f3d7d24
1 /* Change pseudos by memory.
2 Copyright (C) 2010-2015 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
22 /* This file contains code for a pass to change spilled pseudos into
23 memory.
25 The pass creates necessary stack slots and assigns spilled pseudos
26 to the stack slots in following way:
28 for all spilled pseudos P most frequently used first do
29 for all stack slots S do
30 if P doesn't conflict with pseudos assigned to S then
31 assign S to P and goto to the next pseudo process
32 end
33 end
34 create new stack slot S and assign P to S
35 end
37 The actual algorithm is bit more complicated because of different
38 pseudo sizes.
40 After that the code changes spilled pseudos (except ones created
41 from scratches) by corresponding stack slot memory in RTL.
43 If at least one stack slot was created, we need to run more passes
44 because we have new addresses which should be checked and because
45 the old address displacements might change and address constraints
46 (or insn memory constraints) might not be satisfied any more.
48 For some targets, the pass can spill some pseudos into hard
49 registers of different class (usually into vector registers)
50 instead of spilling them into memory if it is possible and
51 profitable. Spilling GENERAL_REGS pseudo into SSE registers for
52 Intel Corei7 is an example of such optimization. And this is
53 actually recommended by Intel optimization guide.
55 The file also contains code for final change of pseudos on hard
56 regs correspondingly assigned to them. */
58 #include "config.h"
59 #include "system.h"
60 #include "coretypes.h"
61 #include "tm.h"
62 #include "rtl.h"
63 #include "tm_p.h"
64 #include "insn-config.h"
65 #include "recog.h"
66 #include "output.h"
67 #include "regs.h"
68 #include "hard-reg-set.h"
69 #include "flags.h"
70 #include "input.h"
71 #include "function.h"
72 #include "symtab.h"
73 #include "alias.h"
74 #include "tree.h"
75 #include "expmed.h"
76 #include "dojump.h"
77 #include "explow.h"
78 #include "calls.h"
79 #include "emit-rtl.h"
80 #include "varasm.h"
81 #include "stmt.h"
82 #include "expr.h"
83 #include "predict.h"
84 #include "dominance.h"
85 #include "cfg.h"
86 #include "cfgrtl.h"
87 #include "basic-block.h"
88 #include "except.h"
89 #include "timevar.h"
90 #include "target.h"
91 #include "alloc-pool.h"
92 #include "lra-int.h"
93 #include "ira.h"
94 #include "df.h"
97 /* Max regno at the start of the pass. */
98 static int regs_num;
100 /* Map spilled regno -> hard regno used instead of memory for
101 spilling. */
102 static rtx *spill_hard_reg;
104 /* The structure describes stack slot of a spilled pseudo. */
105 struct pseudo_slot
107 /* Number (0, 1, ...) of the stack slot to which given pseudo
108 belongs. */
109 int slot_num;
110 /* First or next slot with the same slot number. */
111 struct pseudo_slot *next, *first;
112 /* Memory representing the spilled pseudo. */
113 rtx mem;
116 /* The stack slots for each spilled pseudo. Indexed by regnos. */
117 static struct pseudo_slot *pseudo_slots;
119 /* The structure describes a register or a stack slot which can be
120 used for several spilled pseudos. */
121 struct slot
123 /* First pseudo with given stack slot. */
124 int regno;
125 /* Hard reg into which the slot pseudos are spilled. The value is
126 negative for pseudos spilled into memory. */
127 int hard_regno;
128 /* Memory representing the all stack slot. It can be different from
129 memory representing a pseudo belonging to give stack slot because
130 pseudo can be placed in a part of the corresponding stack slot.
131 The value is NULL for pseudos spilled into a hard reg. */
132 rtx mem;
133 /* Combined live ranges of all pseudos belonging to given slot. It
134 is used to figure out that a new spilled pseudo can use given
135 stack slot. */
136 lra_live_range_t live_ranges;
139 /* Array containing info about the stack slots. The array element is
140 indexed by the stack slot number in the range [0..slots_num). */
141 static struct slot *slots;
142 /* The number of the stack slots currently existing. */
143 static int slots_num;
145 /* Set up memory of the spilled pseudo I. The function can allocate
146 the corresponding stack slot if it is not done yet. */
147 static void
148 assign_mem_slot (int i)
150 rtx x = NULL_RTX;
151 machine_mode mode = GET_MODE (regno_reg_rtx[i]);
152 unsigned int inherent_size = PSEUDO_REGNO_BYTES (i);
153 unsigned int inherent_align = GET_MODE_ALIGNMENT (mode);
154 unsigned int max_ref_width = GET_MODE_SIZE (lra_reg_info[i].biggest_mode);
155 unsigned int total_size = MAX (inherent_size, max_ref_width);
156 unsigned int min_align = max_ref_width * BITS_PER_UNIT;
157 int adjust = 0;
159 lra_assert (regno_reg_rtx[i] != NULL_RTX && REG_P (regno_reg_rtx[i])
160 && lra_reg_info[i].nrefs != 0 && reg_renumber[i] < 0);
162 x = slots[pseudo_slots[i].slot_num].mem;
164 /* We can use a slot already allocated because it is guaranteed the
165 slot provides both enough inherent space and enough total
166 space. */
167 if (x)
169 /* Each pseudo has an inherent size which comes from its own mode,
170 and a total size which provides room for paradoxical subregs
171 which refer to the pseudo reg in wider modes. We allocate a new
172 slot, making sure that it has enough inherent space and total
173 space. */
174 else
176 rtx stack_slot;
178 /* No known place to spill from => no slot to reuse. */
179 x = assign_stack_local (mode, total_size,
180 min_align > inherent_align
181 || total_size > inherent_size ? -1 : 0);
182 stack_slot = x;
183 /* Cancel the big-endian correction done in assign_stack_local.
184 Get the address of the beginning of the slot. This is so we
185 can do a big-endian correction unconditionally below. */
186 if (BYTES_BIG_ENDIAN)
188 adjust = inherent_size - total_size;
189 if (adjust)
190 stack_slot
191 = adjust_address_nv (x,
192 mode_for_size (total_size * BITS_PER_UNIT,
193 MODE_INT, 1),
194 adjust);
196 slots[pseudo_slots[i].slot_num].mem = stack_slot;
199 /* On a big endian machine, the "address" of the slot is the address
200 of the low part that fits its inherent mode. */
201 if (BYTES_BIG_ENDIAN && inherent_size < total_size)
202 adjust += (total_size - inherent_size);
204 x = adjust_address_nv (x, GET_MODE (regno_reg_rtx[i]), adjust);
206 /* Set all of the memory attributes as appropriate for a spill. */
207 set_mem_attrs_for_spill (x);
208 pseudo_slots[i].mem = x;
211 /* Sort pseudos according their usage frequencies. */
212 static int
213 regno_freq_compare (const void *v1p, const void *v2p)
215 const int regno1 = *(const int *) v1p;
216 const int regno2 = *(const int *) v2p;
217 int diff;
219 if ((diff = lra_reg_info[regno2].freq - lra_reg_info[regno1].freq) != 0)
220 return diff;
221 return regno1 - regno2;
224 /* Sort pseudos according to their slots, putting the slots in the order
225 that they should be allocated. Slots with lower numbers have the highest
226 priority and should get the smallest displacement from the stack or
227 frame pointer (whichever is being used).
229 The first allocated slot is always closest to the frame pointer,
230 so prefer lower slot numbers when frame_pointer_needed. If the stack
231 and frame grow in the same direction, then the first allocated slot is
232 always closest to the initial stack pointer and furthest away from the
233 final stack pointer, so allocate higher numbers first when using the
234 stack pointer in that case. The reverse is true if the stack and
235 frame grow in opposite directions. */
236 static int
237 pseudo_reg_slot_compare (const void *v1p, const void *v2p)
239 const int regno1 = *(const int *) v1p;
240 const int regno2 = *(const int *) v2p;
241 int diff, slot_num1, slot_num2;
242 int total_size1, total_size2;
244 slot_num1 = pseudo_slots[regno1].slot_num;
245 slot_num2 = pseudo_slots[regno2].slot_num;
246 if ((diff = slot_num1 - slot_num2) != 0)
247 return (frame_pointer_needed
248 || (!FRAME_GROWS_DOWNWARD) == STACK_GROWS_DOWNWARD ? diff : -diff);
249 total_size1 = GET_MODE_SIZE (lra_reg_info[regno1].biggest_mode);
250 total_size2 = GET_MODE_SIZE (lra_reg_info[regno2].biggest_mode);
251 if ((diff = total_size2 - total_size1) != 0)
252 return diff;
253 return regno1 - regno2;
256 /* Assign spill hard registers to N pseudos in PSEUDO_REGNOS which is
257 sorted in order of highest frequency first. Put the pseudos which
258 did not get a spill hard register at the beginning of array
259 PSEUDO_REGNOS. Return the number of such pseudos. */
260 static int
261 assign_spill_hard_regs (int *pseudo_regnos, int n)
263 int i, k, p, regno, res, spill_class_size, hard_regno, nr;
264 enum reg_class rclass, spill_class;
265 machine_mode mode;
266 lra_live_range_t r;
267 rtx_insn *insn;
268 rtx set;
269 basic_block bb;
270 HARD_REG_SET conflict_hard_regs;
271 bitmap_head ok_insn_bitmap;
272 bitmap setjump_crosses = regstat_get_setjmp_crosses ();
273 /* Hard registers which can not be used for any purpose at given
274 program point because they are unallocatable or already allocated
275 for other pseudos. */
276 HARD_REG_SET *reserved_hard_regs;
278 if (! lra_reg_spill_p)
279 return n;
280 /* Set up reserved hard regs for every program point. */
281 reserved_hard_regs = XNEWVEC (HARD_REG_SET, lra_live_max_point);
282 for (p = 0; p < lra_live_max_point; p++)
283 COPY_HARD_REG_SET (reserved_hard_regs[p], lra_no_alloc_regs);
284 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
285 if (lra_reg_info[i].nrefs != 0
286 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
287 for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
288 for (p = r->start; p <= r->finish; p++)
289 add_to_hard_reg_set (&reserved_hard_regs[p],
290 lra_reg_info[i].biggest_mode, hard_regno);
291 bitmap_initialize (&ok_insn_bitmap, &reg_obstack);
292 FOR_EACH_BB_FN (bb, cfun)
293 FOR_BB_INSNS (bb, insn)
294 if (DEBUG_INSN_P (insn)
295 || ((set = single_set (insn)) != NULL_RTX
296 && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set))))
297 bitmap_set_bit (&ok_insn_bitmap, INSN_UID (insn));
298 for (res = i = 0; i < n; i++)
300 regno = pseudo_regnos[i];
301 rclass = lra_get_allocno_class (regno);
302 if (bitmap_bit_p (setjump_crosses, regno)
303 || (spill_class
304 = ((enum reg_class)
305 targetm.spill_class ((reg_class_t) rclass,
306 PSEUDO_REGNO_MODE (regno)))) == NO_REGS
307 || bitmap_intersect_compl_p (&lra_reg_info[regno].insn_bitmap,
308 &ok_insn_bitmap))
310 pseudo_regnos[res++] = regno;
311 continue;
313 lra_assert (spill_class != NO_REGS);
314 COPY_HARD_REG_SET (conflict_hard_regs,
315 lra_reg_info[regno].conflict_hard_regs);
316 for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
317 for (p = r->start; p <= r->finish; p++)
318 IOR_HARD_REG_SET (conflict_hard_regs, reserved_hard_regs[p]);
319 spill_class_size = ira_class_hard_regs_num[spill_class];
320 mode = lra_reg_info[regno].biggest_mode;
321 for (k = 0; k < spill_class_size; k++)
323 hard_regno = ira_class_hard_regs[spill_class][k];
324 if (! overlaps_hard_reg_set_p (conflict_hard_regs, mode, hard_regno))
325 break;
327 if (k >= spill_class_size)
329 /* There is no available regs -- assign memory later. */
330 pseudo_regnos[res++] = regno;
331 continue;
333 if (lra_dump_file != NULL)
334 fprintf (lra_dump_file, " Spill r%d into hr%d\n", regno, hard_regno);
335 /* Update reserved_hard_regs. */
336 for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
337 for (p = r->start; p <= r->finish; p++)
338 add_to_hard_reg_set (&reserved_hard_regs[p],
339 lra_reg_info[regno].biggest_mode, hard_regno);
340 spill_hard_reg[regno]
341 = gen_raw_REG (PSEUDO_REGNO_MODE (regno), hard_regno);
342 for (nr = 0;
343 nr < hard_regno_nregs[hard_regno][lra_reg_info[regno].biggest_mode];
344 nr++)
345 /* Just loop. */
346 df_set_regs_ever_live (hard_regno + nr, true);
348 bitmap_clear (&ok_insn_bitmap);
349 free (reserved_hard_regs);
350 return res;
353 /* Add pseudo REGNO to slot SLOT_NUM. */
354 static void
355 add_pseudo_to_slot (int regno, int slot_num)
357 struct pseudo_slot *first;
359 if (slots[slot_num].regno < 0)
361 /* It is the first pseudo in the slot. */
362 slots[slot_num].regno = regno;
363 pseudo_slots[regno].first = &pseudo_slots[regno];
364 pseudo_slots[regno].next = NULL;
366 else
368 first = pseudo_slots[regno].first = &pseudo_slots[slots[slot_num].regno];
369 pseudo_slots[regno].next = first->next;
370 first->next = &pseudo_slots[regno];
372 pseudo_slots[regno].mem = NULL_RTX;
373 pseudo_slots[regno].slot_num = slot_num;
374 slots[slot_num].live_ranges
375 = lra_merge_live_ranges (slots[slot_num].live_ranges,
376 lra_copy_live_range_list
377 (lra_reg_info[regno].live_ranges));
380 /* Assign stack slot numbers to pseudos in array PSEUDO_REGNOS of
381 length N. Sort pseudos in PSEUDO_REGNOS for subsequent assigning
382 memory stack slots. */
383 static void
384 assign_stack_slot_num_and_sort_pseudos (int *pseudo_regnos, int n)
386 int i, j, regno;
388 slots_num = 0;
389 /* Assign stack slot numbers to spilled pseudos, use smaller numbers
390 for most frequently used pseudos. */
391 for (i = 0; i < n; i++)
393 regno = pseudo_regnos[i];
394 if (! flag_ira_share_spill_slots)
395 j = slots_num;
396 else
398 for (j = 0; j < slots_num; j++)
399 if (slots[j].hard_regno < 0
400 && ! (lra_intersected_live_ranges_p
401 (slots[j].live_ranges,
402 lra_reg_info[regno].live_ranges)))
403 break;
405 if (j >= slots_num)
407 /* New slot. */
408 slots[j].live_ranges = NULL;
409 slots[j].regno = slots[j].hard_regno = -1;
410 slots[j].mem = NULL_RTX;
411 slots_num++;
413 add_pseudo_to_slot (regno, j);
415 /* Sort regnos according to their slot numbers. */
416 qsort (pseudo_regnos, n, sizeof (int), pseudo_reg_slot_compare);
419 /* Recursively process LOC in INSN and change spilled pseudos to the
420 corresponding memory or spilled hard reg. Ignore spilled pseudos
421 created from the scratches. */
422 static void
423 remove_pseudos (rtx *loc, rtx_insn *insn)
425 int i;
426 rtx hard_reg;
427 const char *fmt;
428 enum rtx_code code;
430 if (*loc == NULL_RTX)
431 return;
432 code = GET_CODE (*loc);
433 if (code == REG && (i = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
434 && lra_get_regno_hard_regno (i) < 0
435 /* We do not want to assign memory for former scratches because
436 it might result in an address reload for some targets. In
437 any case we transform such pseudos not getting hard registers
438 into scratches back. */
439 && ! lra_former_scratch_p (i))
441 if ((hard_reg = spill_hard_reg[i]) != NULL_RTX)
442 *loc = copy_rtx (hard_reg);
443 else
445 rtx x = lra_eliminate_regs_1 (insn, pseudo_slots[i].mem,
446 GET_MODE (pseudo_slots[i].mem),
447 false, false, 0, true);
448 *loc = x != pseudo_slots[i].mem ? x : copy_rtx (x);
450 return;
453 fmt = GET_RTX_FORMAT (code);
454 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
456 if (fmt[i] == 'e')
457 remove_pseudos (&XEXP (*loc, i), insn);
458 else if (fmt[i] == 'E')
460 int j;
462 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--)
463 remove_pseudos (&XVECEXP (*loc, i, j), insn);
468 /* Convert spilled pseudos into their stack slots or spill hard regs,
469 put insns to process on the constraint stack (that is all insns in
470 which pseudos were changed to memory or spill hard regs). */
471 static void
472 spill_pseudos (void)
474 basic_block bb;
475 rtx_insn *insn;
476 int i;
477 bitmap_head spilled_pseudos, changed_insns;
479 bitmap_initialize (&spilled_pseudos, &reg_obstack);
480 bitmap_initialize (&changed_insns, &reg_obstack);
481 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
483 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
484 && ! lra_former_scratch_p (i))
486 bitmap_set_bit (&spilled_pseudos, i);
487 bitmap_ior_into (&changed_insns, &lra_reg_info[i].insn_bitmap);
490 FOR_EACH_BB_FN (bb, cfun)
492 FOR_BB_INSNS (bb, insn)
493 if (bitmap_bit_p (&changed_insns, INSN_UID (insn)))
495 rtx *link_loc, link;
496 remove_pseudos (&PATTERN (insn), insn);
497 if (CALL_P (insn))
498 remove_pseudos (&CALL_INSN_FUNCTION_USAGE (insn), insn);
499 for (link_loc = &REG_NOTES (insn);
500 (link = *link_loc) != NULL_RTX;
501 link_loc = &XEXP (link, 1))
503 switch (REG_NOTE_KIND (link))
505 case REG_FRAME_RELATED_EXPR:
506 case REG_CFA_DEF_CFA:
507 case REG_CFA_ADJUST_CFA:
508 case REG_CFA_OFFSET:
509 case REG_CFA_REGISTER:
510 case REG_CFA_EXPRESSION:
511 case REG_CFA_RESTORE:
512 case REG_CFA_SET_VDRAP:
513 remove_pseudos (&XEXP (link, 0), insn);
514 break;
515 default:
516 break;
519 if (lra_dump_file != NULL)
520 fprintf (lra_dump_file,
521 "Changing spilled pseudos to memory in insn #%u\n",
522 INSN_UID (insn));
523 lra_push_insn (insn);
524 if (lra_reg_spill_p || targetm.different_addr_displacement_p ())
525 lra_set_used_insn_alternative (insn, -1);
527 else if (CALL_P (insn))
528 /* Presence of any pseudo in CALL_INSN_FUNCTION_USAGE does
529 not affect value of insn_bitmap of the corresponding
530 lra_reg_info. That is because we don't need to reload
531 pseudos in CALL_INSN_FUNCTION_USAGEs. So if we process
532 only insns in the insn_bitmap of given pseudo here, we
533 can miss the pseudo in some
534 CALL_INSN_FUNCTION_USAGEs. */
535 remove_pseudos (&CALL_INSN_FUNCTION_USAGE (insn), insn);
536 bitmap_and_compl_into (df_get_live_in (bb), &spilled_pseudos);
537 bitmap_and_compl_into (df_get_live_out (bb), &spilled_pseudos);
539 bitmap_clear (&spilled_pseudos);
540 bitmap_clear (&changed_insns);
543 /* Return true if we need to change some pseudos into memory. */
544 bool
545 lra_need_for_spills_p (void)
547 int i; max_regno = max_reg_num ();
549 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
550 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
551 && ! lra_former_scratch_p (i))
552 return true;
553 return false;
556 /* Change spilled pseudos into memory or spill hard regs. Put changed
557 insns on the constraint stack (these insns will be considered on
558 the next constraint pass). The changed insns are all insns in
559 which pseudos were changed. */
560 void
561 lra_spill (void)
563 int i, n, curr_regno;
564 int *pseudo_regnos;
566 regs_num = max_reg_num ();
567 spill_hard_reg = XNEWVEC (rtx, regs_num);
568 pseudo_regnos = XNEWVEC (int, regs_num);
569 for (n = 0, i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
570 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
571 /* We do not want to assign memory for former scratches. */
572 && ! lra_former_scratch_p (i))
574 spill_hard_reg[i] = NULL_RTX;
575 pseudo_regnos[n++] = i;
577 lra_assert (n > 0);
578 pseudo_slots = XNEWVEC (struct pseudo_slot, regs_num);
579 slots = XNEWVEC (struct slot, regs_num);
580 /* Sort regnos according their usage frequencies. */
581 qsort (pseudo_regnos, n, sizeof (int), regno_freq_compare);
582 n = assign_spill_hard_regs (pseudo_regnos, n);
583 assign_stack_slot_num_and_sort_pseudos (pseudo_regnos, n);
584 for (i = 0; i < n; i++)
585 if (pseudo_slots[pseudo_regnos[i]].mem == NULL_RTX)
586 assign_mem_slot (pseudo_regnos[i]);
587 if (n > 0 && crtl->stack_alignment_needed)
588 /* If we have a stack frame, we must align it now. The stack size
589 may be a part of the offset computation for register
590 elimination. */
591 assign_stack_local (BLKmode, 0, crtl->stack_alignment_needed);
592 if (lra_dump_file != NULL)
594 for (i = 0; i < slots_num; i++)
596 fprintf (lra_dump_file, " Slot %d regnos (width = %d):", i,
597 GET_MODE_SIZE (GET_MODE (slots[i].mem)));
598 for (curr_regno = slots[i].regno;;
599 curr_regno = pseudo_slots[curr_regno].next - pseudo_slots)
601 fprintf (lra_dump_file, " %d", curr_regno);
602 if (pseudo_slots[curr_regno].next == NULL)
603 break;
605 fprintf (lra_dump_file, "\n");
608 spill_pseudos ();
609 free (slots);
610 free (pseudo_slots);
611 free (pseudo_regnos);
612 free (spill_hard_reg);
615 /* Apply alter_subreg for subregs of regs in *LOC. Use FINAL_P for
616 alter_subreg calls. Return true if any subreg of reg is
617 processed. */
618 static bool
619 alter_subregs (rtx *loc, bool final_p)
621 int i;
622 rtx x = *loc;
623 bool res;
624 const char *fmt;
625 enum rtx_code code;
627 if (x == NULL_RTX)
628 return false;
629 code = GET_CODE (x);
630 if (code == SUBREG && REG_P (SUBREG_REG (x)))
632 lra_assert (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER);
633 alter_subreg (loc, final_p);
634 return true;
636 fmt = GET_RTX_FORMAT (code);
637 res = false;
638 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
640 if (fmt[i] == 'e')
642 if (alter_subregs (&XEXP (x, i), final_p))
643 res = true;
645 else if (fmt[i] == 'E')
647 int j;
649 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
650 if (alter_subregs (&XVECEXP (x, i, j), final_p))
651 res = true;
654 return res;
657 /* Return true if REGNO is used for return in the current
658 function. */
659 static bool
660 return_regno_p (unsigned int regno)
662 rtx outgoing = crtl->return_rtx;
664 if (! outgoing)
665 return false;
667 if (REG_P (outgoing))
668 return REGNO (outgoing) == regno;
669 else if (GET_CODE (outgoing) == PARALLEL)
671 int i;
673 for (i = 0; i < XVECLEN (outgoing, 0); i++)
675 rtx x = XEXP (XVECEXP (outgoing, 0, i), 0);
677 if (REG_P (x) && REGNO (x) == regno)
678 return true;
681 return false;
684 /* Final change of pseudos got hard registers into the corresponding
685 hard registers and removing temporary clobbers. */
686 void
687 lra_final_code_change (void)
689 int i, hard_regno;
690 basic_block bb;
691 rtx_insn *insn, *curr;
692 int max_regno = max_reg_num ();
694 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
695 if (lra_reg_info[i].nrefs != 0
696 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
697 SET_REGNO (regno_reg_rtx[i], hard_regno);
698 FOR_EACH_BB_FN (bb, cfun)
699 FOR_BB_INSNS_SAFE (bb, insn, curr)
700 if (INSN_P (insn))
702 rtx pat = PATTERN (insn);
704 if (GET_CODE (pat) == CLOBBER && LRA_TEMP_CLOBBER_P (pat))
706 /* Remove clobbers temporarily created in LRA. We don't
707 need them anymore and don't want to waste compiler
708 time processing them in a few subsequent passes. */
709 lra_invalidate_insn_data (insn);
710 delete_insn (insn);
711 continue;
714 /* IRA can generate move insns involving pseudos. It is
715 better remove them earlier to speed up compiler a bit.
716 It is also better to do it here as they might not pass
717 final RTL check in LRA, (e.g. insn moving a control
718 register into itself). So remove an useless move insn
719 unless next insn is USE marking the return reg (we should
720 save this as some subsequent optimizations assume that
721 such original insns are saved). */
722 if (NONJUMP_INSN_P (insn) && GET_CODE (pat) == SET
723 && REG_P (SET_SRC (pat)) && REG_P (SET_DEST (pat))
724 && REGNO (SET_SRC (pat)) == REGNO (SET_DEST (pat))
725 && ! return_regno_p (REGNO (SET_SRC (pat))))
727 lra_invalidate_insn_data (insn);
728 delete_insn (insn);
729 continue;
732 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
733 struct lra_static_insn_data *static_id = id->insn_static_data;
734 bool insn_change_p = false;
736 for (i = id->insn_static_data->n_operands - 1; i >= 0; i--)
737 if ((DEBUG_INSN_P (insn) || ! static_id->operand[i].is_operator)
738 && alter_subregs (id->operand_loc[i], ! DEBUG_INSN_P (insn)))
740 lra_update_dup (id, i);
741 insn_change_p = true;
743 if (insn_change_p)
744 lra_update_operator_dups (id);