1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
42 #include "basic-block.h"
47 #include "stringpool.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "langhooks.h"
61 struct target_rtl default_target_rtl
;
63 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
66 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
68 /* Commonly used modes. */
70 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
71 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
72 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
73 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
75 /* Datastructures maintained for currently processed function in RTL form. */
77 struct rtl_data x_rtl
;
79 /* Indexed by pseudo register number, gives the rtx for that pseudo.
80 Allocated in parallel with regno_pointer_align.
81 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
82 with length attribute nested in top level structures. */
86 /* This is *not* reset after each function. It gives each CODE_LABEL
87 in the entire compilation a unique label number. */
89 static GTY(()) int label_num
= 1;
91 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
92 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
93 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
94 is set only for MODE_INT and MODE_VECTOR_INT modes. */
96 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
100 REAL_VALUE_TYPE dconst0
;
101 REAL_VALUE_TYPE dconst1
;
102 REAL_VALUE_TYPE dconst2
;
103 REAL_VALUE_TYPE dconstm1
;
104 REAL_VALUE_TYPE dconsthalf
;
106 /* Record fixed-point constant 0 and 1. */
107 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
108 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
110 /* We make one copy of (const_int C) where C is in
111 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
112 to save space during the compilation and simplify comparisons of
115 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
117 /* Standard pieces of rtx, to be substituted directly into things. */
120 rtx simple_return_rtx
;
123 /* A hash table storing CONST_INTs whose absolute value is greater
124 than MAX_SAVED_CONST_INT. */
126 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
127 htab_t const_int_htab
;
129 /* A hash table storing memory attribute structures. */
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
131 htab_t mem_attrs_htab
;
133 /* A hash table storing register attribute structures. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
135 htab_t reg_attrs_htab
;
137 /* A hash table storing all CONST_DOUBLEs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
139 htab_t const_double_htab
;
141 /* A hash table storing all CONST_FIXEDs. */
142 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
143 htab_t const_fixed_htab
;
145 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
146 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
147 #define first_label_num (crtl->emit.x_first_label_num)
149 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
150 static void set_used_decls (tree
);
151 static void mark_label_nuses (rtx
);
152 static hashval_t
const_int_htab_hash (const void *);
153 static int const_int_htab_eq (const void *, const void *);
154 static hashval_t
const_double_htab_hash (const void *);
155 static int const_double_htab_eq (const void *, const void *);
156 static rtx
lookup_const_double (rtx
);
157 static hashval_t
const_fixed_htab_hash (const void *);
158 static int const_fixed_htab_eq (const void *, const void *);
159 static rtx
lookup_const_fixed (rtx
);
160 static hashval_t
mem_attrs_htab_hash (const void *);
161 static int mem_attrs_htab_eq (const void *, const void *);
162 static hashval_t
reg_attrs_htab_hash (const void *);
163 static int reg_attrs_htab_eq (const void *, const void *);
164 static reg_attrs
*get_reg_attrs (tree
, int);
165 static rtx
gen_const_vector (enum machine_mode
, int);
166 static void copy_rtx_if_shared_1 (rtx
*orig
);
168 /* Probability of the conditional branch currently proceeded by try_split.
169 Set to -1 otherwise. */
170 int split_branch_probability
= -1;
172 /* Returns a hash code for X (which is a really a CONST_INT). */
175 const_int_htab_hash (const void *x
)
177 return (hashval_t
) INTVAL ((const_rtx
) x
);
180 /* Returns nonzero if the value represented by X (which is really a
181 CONST_INT) is the same as that given by Y (which is really a
185 const_int_htab_eq (const void *x
, const void *y
)
187 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
190 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
192 const_double_htab_hash (const void *x
)
194 const_rtx
const value
= (const_rtx
) x
;
197 if (GET_MODE (value
) == VOIDmode
)
198 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
201 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
202 /* MODE is used in the comparison, so it should be in the hash. */
203 h
^= GET_MODE (value
);
208 /* Returns nonzero if the value represented by X (really a ...)
209 is the same as that represented by Y (really a ...) */
211 const_double_htab_eq (const void *x
, const void *y
)
213 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
215 if (GET_MODE (a
) != GET_MODE (b
))
217 if (GET_MODE (a
) == VOIDmode
)
218 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
219 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
221 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
222 CONST_DOUBLE_REAL_VALUE (b
));
225 /* Returns a hash code for X (which is really a CONST_FIXED). */
228 const_fixed_htab_hash (const void *x
)
230 const_rtx
const value
= (const_rtx
) x
;
233 h
= fixed_hash (CONST_FIXED_VALUE (value
));
234 /* MODE is used in the comparison, so it should be in the hash. */
235 h
^= GET_MODE (value
);
239 /* Returns nonzero if the value represented by X (really a ...)
240 is the same as that represented by Y (really a ...). */
243 const_fixed_htab_eq (const void *x
, const void *y
)
245 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
247 if (GET_MODE (a
) != GET_MODE (b
))
249 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
252 /* Returns a hash code for X (which is a really a mem_attrs *). */
255 mem_attrs_htab_hash (const void *x
)
257 const mem_attrs
*const p
= (const mem_attrs
*) x
;
259 return (p
->alias
^ (p
->align
* 1000)
260 ^ (p
->addrspace
* 4000)
261 ^ ((p
->offset_known_p
? p
->offset
: 0) * 50000)
262 ^ ((p
->size_known_p
? p
->size
: 0) * 2500000)
263 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
266 /* Return true if the given memory attributes are equal. */
269 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
271 return (p
->alias
== q
->alias
272 && p
->offset_known_p
== q
->offset_known_p
273 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
274 && p
->size_known_p
== q
->size_known_p
275 && (!p
->size_known_p
|| p
->size
== q
->size
)
276 && p
->align
== q
->align
277 && p
->addrspace
== q
->addrspace
278 && (p
->expr
== q
->expr
279 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
280 && operand_equal_p (p
->expr
, q
->expr
, 0))));
283 /* Returns nonzero if the value represented by X (which is really a
284 mem_attrs *) is the same as that given by Y (which is also really a
288 mem_attrs_htab_eq (const void *x
, const void *y
)
290 return mem_attrs_eq_p ((const mem_attrs
*) x
, (const mem_attrs
*) y
);
293 /* Set MEM's memory attributes so that they are the same as ATTRS. */
296 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
300 /* If everything is the default, we can just clear the attributes. */
301 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
307 slot
= htab_find_slot (mem_attrs_htab
, attrs
, INSERT
);
310 *slot
= ggc_alloc_mem_attrs ();
311 memcpy (*slot
, attrs
, sizeof (mem_attrs
));
314 MEM_ATTRS (mem
) = (mem_attrs
*) *slot
;
317 /* Returns a hash code for X (which is a really a reg_attrs *). */
320 reg_attrs_htab_hash (const void *x
)
322 const reg_attrs
*const p
= (const reg_attrs
*) x
;
324 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
327 /* Returns nonzero if the value represented by X (which is really a
328 reg_attrs *) is the same as that given by Y (which is also really a
332 reg_attrs_htab_eq (const void *x
, const void *y
)
334 const reg_attrs
*const p
= (const reg_attrs
*) x
;
335 const reg_attrs
*const q
= (const reg_attrs
*) y
;
337 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
339 /* Allocate a new reg_attrs structure and insert it into the hash table if
340 one identical to it is not already in the table. We are doing this for
344 get_reg_attrs (tree decl
, int offset
)
349 /* If everything is the default, we can just return zero. */
350 if (decl
== 0 && offset
== 0)
354 attrs
.offset
= offset
;
356 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
359 *slot
= ggc_alloc_reg_attrs ();
360 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
363 return (reg_attrs
*) *slot
;
368 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
369 and to block register equivalences to be seen across this insn. */
374 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
375 MEM_VOLATILE_P (x
) = true;
381 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
382 don't attempt to share with the various global pieces of rtl (such as
383 frame_pointer_rtx). */
386 gen_raw_REG (enum machine_mode mode
, int regno
)
388 rtx x
= gen_rtx_raw_REG (mode
, regno
);
389 ORIGINAL_REGNO (x
) = regno
;
393 /* There are some RTL codes that require special attention; the generation
394 functions do the raw handling. If you add to this list, modify
395 special_rtx in gengenrtl.c as well. */
398 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
402 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
403 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
405 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
406 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
407 return const_true_rtx
;
410 /* Look up the CONST_INT in the hash table. */
411 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
412 (hashval_t
) arg
, INSERT
);
414 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
420 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
422 return GEN_INT (trunc_int_for_mode (c
, mode
));
425 /* CONST_DOUBLEs might be created from pairs of integers, or from
426 REAL_VALUE_TYPEs. Also, their length is known only at run time,
427 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
429 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
430 hash table. If so, return its counterpart; otherwise add it
431 to the hash table and return it. */
433 lookup_const_double (rtx real
)
435 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
442 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
443 VALUE in mode MODE. */
445 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
447 rtx real
= rtx_alloc (CONST_DOUBLE
);
448 PUT_MODE (real
, mode
);
452 return lookup_const_double (real
);
455 /* Determine whether FIXED, a CONST_FIXED, already exists in the
456 hash table. If so, return its counterpart; otherwise add it
457 to the hash table and return it. */
460 lookup_const_fixed (rtx fixed
)
462 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
469 /* Return a CONST_FIXED rtx for a fixed-point value specified by
470 VALUE in mode MODE. */
473 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
475 rtx fixed
= rtx_alloc (CONST_FIXED
);
476 PUT_MODE (fixed
, mode
);
480 return lookup_const_fixed (fixed
);
483 /* Constructs double_int from rtx CST. */
486 rtx_to_double_int (const_rtx cst
)
490 if (CONST_INT_P (cst
))
491 r
= double_int::from_shwi (INTVAL (cst
));
492 else if (CONST_DOUBLE_AS_INT_P (cst
))
494 r
.low
= CONST_DOUBLE_LOW (cst
);
495 r
.high
= CONST_DOUBLE_HIGH (cst
);
504 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
508 immed_double_int_const (double_int i
, enum machine_mode mode
)
510 return immed_double_const (i
.low
, i
.high
, mode
);
513 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
514 of ints: I0 is the low-order word and I1 is the high-order word.
515 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
516 implied upper bits are copies of the high bit of i1. The value
517 itself is neither signed nor unsigned. Do not use this routine for
518 non-integer modes; convert to REAL_VALUE_TYPE and use
519 CONST_DOUBLE_FROM_REAL_VALUE. */
522 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
527 /* There are the following cases (note that there are no modes with
528 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
530 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
532 2) If the value of the integer fits into HOST_WIDE_INT anyway
533 (i.e., i1 consists only from copies of the sign bit, and sign
534 of i0 and i1 are the same), then we return a CONST_INT for i0.
535 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
536 if (mode
!= VOIDmode
)
538 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
539 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
540 /* We can get a 0 for an error mark. */
541 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
542 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
544 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
545 return gen_int_mode (i0
, mode
);
548 /* If this integer fits in one word, return a CONST_INT. */
549 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
552 /* We use VOIDmode for integers. */
553 value
= rtx_alloc (CONST_DOUBLE
);
554 PUT_MODE (value
, VOIDmode
);
556 CONST_DOUBLE_LOW (value
) = i0
;
557 CONST_DOUBLE_HIGH (value
) = i1
;
559 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
560 XWINT (value
, i
) = 0;
562 return lookup_const_double (value
);
566 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
568 /* In case the MD file explicitly references the frame pointer, have
569 all such references point to the same frame pointer. This is
570 used during frame pointer elimination to distinguish the explicit
571 references to these registers from pseudos that happened to be
574 If we have eliminated the frame pointer or arg pointer, we will
575 be using it as a normal register, for example as a spill
576 register. In such cases, we might be accessing it in a mode that
577 is not Pmode and therefore cannot use the pre-allocated rtx.
579 Also don't do this when we are making new REGs in reload, since
580 we don't want to get confused with the real pointers. */
582 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
584 if (regno
== FRAME_POINTER_REGNUM
585 && (!reload_completed
|| frame_pointer_needed
))
586 return frame_pointer_rtx
;
587 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
588 if (regno
== HARD_FRAME_POINTER_REGNUM
589 && (!reload_completed
|| frame_pointer_needed
))
590 return hard_frame_pointer_rtx
;
592 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
593 if (regno
== ARG_POINTER_REGNUM
)
594 return arg_pointer_rtx
;
596 #ifdef RETURN_ADDRESS_POINTER_REGNUM
597 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
598 return return_address_pointer_rtx
;
600 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
601 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
602 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
603 return pic_offset_table_rtx
;
604 if (regno
== STACK_POINTER_REGNUM
)
605 return stack_pointer_rtx
;
609 /* If the per-function register table has been set up, try to re-use
610 an existing entry in that table to avoid useless generation of RTL.
612 This code is disabled for now until we can fix the various backends
613 which depend on having non-shared hard registers in some cases. Long
614 term we want to re-enable this code as it can significantly cut down
615 on the amount of useless RTL that gets generated.
617 We'll also need to fix some code that runs after reload that wants to
618 set ORIGINAL_REGNO. */
623 && regno
< FIRST_PSEUDO_REGISTER
624 && reg_raw_mode
[regno
] == mode
)
625 return regno_reg_rtx
[regno
];
628 return gen_raw_REG (mode
, regno
);
632 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
634 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
636 /* This field is not cleared by the mere allocation of the rtx, so
643 /* Generate a memory referring to non-trapping constant memory. */
646 gen_const_mem (enum machine_mode mode
, rtx addr
)
648 rtx mem
= gen_rtx_MEM (mode
, addr
);
649 MEM_READONLY_P (mem
) = 1;
650 MEM_NOTRAP_P (mem
) = 1;
654 /* Generate a MEM referring to fixed portions of the frame, e.g., register
658 gen_frame_mem (enum machine_mode mode
, rtx addr
)
660 rtx mem
= gen_rtx_MEM (mode
, addr
);
661 MEM_NOTRAP_P (mem
) = 1;
662 set_mem_alias_set (mem
, get_frame_alias_set ());
666 /* Generate a MEM referring to a temporary use of the stack, not part
667 of the fixed stack frame. For example, something which is pushed
668 by a target splitter. */
670 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
672 rtx mem
= gen_rtx_MEM (mode
, addr
);
673 MEM_NOTRAP_P (mem
) = 1;
674 if (!cfun
->calls_alloca
)
675 set_mem_alias_set (mem
, get_frame_alias_set ());
679 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
680 this construct would be valid, and false otherwise. */
683 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
684 const_rtx reg
, unsigned int offset
)
686 unsigned int isize
= GET_MODE_SIZE (imode
);
687 unsigned int osize
= GET_MODE_SIZE (omode
);
689 /* All subregs must be aligned. */
690 if (offset
% osize
!= 0)
693 /* The subreg offset cannot be outside the inner object. */
697 /* ??? This should not be here. Temporarily continue to allow word_mode
698 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
699 Generally, backends are doing something sketchy but it'll take time to
701 if (omode
== word_mode
)
703 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
704 is the culprit here, and not the backends. */
705 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
707 /* Allow component subregs of complex and vector. Though given the below
708 extraction rules, it's not always clear what that means. */
709 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
710 && GET_MODE_INNER (imode
) == omode
)
712 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
713 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
714 represent this. It's questionable if this ought to be represented at
715 all -- why can't this all be hidden in post-reload splitters that make
716 arbitrarily mode changes to the registers themselves. */
717 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
719 /* Subregs involving floating point modes are not allowed to
720 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
721 (subreg:SI (reg:DF) 0) isn't. */
722 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
724 if (! (isize
== osize
725 /* LRA can use subreg to store a floating point value in
726 an integer mode. Although the floating point and the
727 integer modes need the same number of hard registers,
728 the size of floating point mode can be less than the
729 integer mode. LRA also uses subregs for a register
730 should be used in different mode in on insn. */
735 /* Paradoxical subregs must have offset zero. */
739 /* This is a normal subreg. Verify that the offset is representable. */
741 /* For hard registers, we already have most of these rules collected in
742 subreg_offset_representable_p. */
743 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
745 unsigned int regno
= REGNO (reg
);
747 #ifdef CANNOT_CHANGE_MODE_CLASS
748 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
749 && GET_MODE_INNER (imode
) == omode
)
751 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
755 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
758 /* For pseudo registers, we want most of the same checks. Namely:
759 If the register no larger than a word, the subreg must be lowpart.
760 If the register is larger than a word, the subreg must be the lowpart
761 of a subword. A subreg does *not* perform arbitrary bit extraction.
762 Given that we've already checked mode/offset alignment, we only have
763 to check subword subregs here. */
764 if (osize
< UNITS_PER_WORD
765 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
767 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
768 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
769 if (offset
% UNITS_PER_WORD
!= low_off
)
776 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
778 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
779 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
782 /* Generate a SUBREG representing the least-significant part of REG if MODE
783 is smaller than mode of REG, otherwise paradoxical SUBREG. */
786 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
788 enum machine_mode inmode
;
790 inmode
= GET_MODE (reg
);
791 if (inmode
== VOIDmode
)
793 return gen_rtx_SUBREG (mode
, reg
,
794 subreg_lowpart_offset (mode
, inmode
));
798 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
801 gen_rtvec (int n
, ...)
809 /* Don't allocate an empty rtvec... */
816 rt_val
= rtvec_alloc (n
);
818 for (i
= 0; i
< n
; i
++)
819 rt_val
->elem
[i
] = va_arg (p
, rtx
);
826 gen_rtvec_v (int n
, rtx
*argp
)
831 /* Don't allocate an empty rtvec... */
835 rt_val
= rtvec_alloc (n
);
837 for (i
= 0; i
< n
; i
++)
838 rt_val
->elem
[i
] = *argp
++;
843 /* Return the number of bytes between the start of an OUTER_MODE
844 in-memory value and the start of an INNER_MODE in-memory value,
845 given that the former is a lowpart of the latter. It may be a
846 paradoxical lowpart, in which case the offset will be negative
847 on big-endian targets. */
850 byte_lowpart_offset (enum machine_mode outer_mode
,
851 enum machine_mode inner_mode
)
853 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
854 return subreg_lowpart_offset (outer_mode
, inner_mode
);
856 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
859 /* Generate a REG rtx for a new pseudo register of mode MODE.
860 This pseudo is assigned the next sequential register number. */
863 gen_reg_rtx (enum machine_mode mode
)
866 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
868 gcc_assert (can_create_pseudo_p ());
870 /* If a virtual register with bigger mode alignment is generated,
871 increase stack alignment estimation because it might be spilled
873 if (SUPPORTS_STACK_ALIGNMENT
874 && crtl
->stack_alignment_estimated
< align
875 && !crtl
->stack_realign_processed
)
877 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
878 if (crtl
->stack_alignment_estimated
< min_align
)
879 crtl
->stack_alignment_estimated
= min_align
;
882 if (generating_concat_p
883 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
884 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
886 /* For complex modes, don't make a single pseudo.
887 Instead, make a CONCAT of two pseudos.
888 This allows noncontiguous allocation of the real and imaginary parts,
889 which makes much better code. Besides, allocating DCmode
890 pseudos overstrains reload on some machines like the 386. */
891 rtx realpart
, imagpart
;
892 enum machine_mode partmode
= GET_MODE_INNER (mode
);
894 realpart
= gen_reg_rtx (partmode
);
895 imagpart
= gen_reg_rtx (partmode
);
896 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
899 /* Do not call gen_reg_rtx with uninitialized crtl. */
900 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
902 /* Make sure regno_pointer_align, and regno_reg_rtx are large
903 enough to have an element for this pseudo reg number. */
905 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
907 int old_size
= crtl
->emit
.regno_pointer_align_length
;
911 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
912 memset (tmp
+ old_size
, 0, old_size
);
913 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
915 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
916 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
917 regno_reg_rtx
= new1
;
919 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
922 val
= gen_raw_REG (mode
, reg_rtx_no
);
923 regno_reg_rtx
[reg_rtx_no
++] = val
;
927 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
930 reg_is_parm_p (rtx reg
)
934 gcc_assert (REG_P (reg
));
935 decl
= REG_EXPR (reg
);
936 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
939 /* Update NEW with the same attributes as REG, but with OFFSET added
940 to the REG_OFFSET. */
943 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
945 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
946 REG_OFFSET (reg
) + offset
);
949 /* Generate a register with same attributes as REG, but with OFFSET
950 added to the REG_OFFSET. */
953 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
956 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
958 update_reg_offset (new_rtx
, reg
, offset
);
962 /* Generate a new pseudo-register with the same attributes as REG, but
963 with OFFSET added to the REG_OFFSET. */
966 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
968 rtx new_rtx
= gen_reg_rtx (mode
);
970 update_reg_offset (new_rtx
, reg
, offset
);
974 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
975 new register is a (possibly paradoxical) lowpart of the old one. */
978 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
980 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
981 PUT_MODE (reg
, mode
);
984 /* Copy REG's attributes from X, if X has any attributes. If REG and X
985 have different modes, REG is a (possibly paradoxical) lowpart of X. */
988 set_reg_attrs_from_value (rtx reg
, rtx x
)
991 bool can_be_reg_pointer
= true;
993 /* Don't call mark_reg_pointer for incompatible pointer sign
995 while (GET_CODE (x
) == SIGN_EXTEND
996 || GET_CODE (x
) == ZERO_EXTEND
997 || GET_CODE (x
) == TRUNCATE
998 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1000 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1001 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1002 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1003 can_be_reg_pointer
= false;
1008 /* Hard registers can be reused for multiple purposes within the same
1009 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1010 on them is wrong. */
1011 if (HARD_REGISTER_P (reg
))
1014 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1017 if (MEM_OFFSET_KNOWN_P (x
))
1018 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1019 MEM_OFFSET (x
) + offset
);
1020 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1021 mark_reg_pointer (reg
, 0);
1026 update_reg_offset (reg
, x
, offset
);
1027 if (can_be_reg_pointer
&& REG_POINTER (x
))
1028 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1032 /* Generate a REG rtx for a new pseudo register, copying the mode
1033 and attributes from X. */
1036 gen_reg_rtx_and_attrs (rtx x
)
1038 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1039 set_reg_attrs_from_value (reg
, x
);
1043 /* Set the register attributes for registers contained in PARM_RTX.
1044 Use needed values from memory attributes of MEM. */
1047 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1049 if (REG_P (parm_rtx
))
1050 set_reg_attrs_from_value (parm_rtx
, mem
);
1051 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1053 /* Check for a NULL entry in the first slot, used to indicate that the
1054 parameter goes both on the stack and in registers. */
1055 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1056 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1058 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1059 if (REG_P (XEXP (x
, 0)))
1060 REG_ATTRS (XEXP (x
, 0))
1061 = get_reg_attrs (MEM_EXPR (mem
),
1062 INTVAL (XEXP (x
, 1)));
1067 /* Set the REG_ATTRS for registers in value X, given that X represents
1071 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1073 if (GET_CODE (x
) == SUBREG
)
1075 gcc_assert (subreg_lowpart_p (x
));
1080 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1082 if (GET_CODE (x
) == CONCAT
)
1084 if (REG_P (XEXP (x
, 0)))
1085 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1086 if (REG_P (XEXP (x
, 1)))
1087 REG_ATTRS (XEXP (x
, 1))
1088 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1090 if (GET_CODE (x
) == PARALLEL
)
1094 /* Check for a NULL entry, used to indicate that the parameter goes
1095 both on the stack and in registers. */
1096 if (XEXP (XVECEXP (x
, 0, 0), 0))
1101 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1103 rtx y
= XVECEXP (x
, 0, i
);
1104 if (REG_P (XEXP (y
, 0)))
1105 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1110 /* Assign the RTX X to declaration T. */
1113 set_decl_rtl (tree t
, rtx x
)
1115 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1117 set_reg_attrs_for_decl_rtl (t
, x
);
1120 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1121 if the ABI requires the parameter to be passed by reference. */
1124 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1126 DECL_INCOMING_RTL (t
) = x
;
1127 if (x
&& !by_reference_p
)
1128 set_reg_attrs_for_decl_rtl (t
, x
);
1131 /* Identify REG (which may be a CONCAT) as a user register. */
1134 mark_user_reg (rtx reg
)
1136 if (GET_CODE (reg
) == CONCAT
)
1138 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1139 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1143 gcc_assert (REG_P (reg
));
1144 REG_USERVAR_P (reg
) = 1;
1148 /* Identify REG as a probable pointer register and show its alignment
1149 as ALIGN, if nonzero. */
1152 mark_reg_pointer (rtx reg
, int align
)
1154 if (! REG_POINTER (reg
))
1156 REG_POINTER (reg
) = 1;
1159 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1161 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1162 /* We can no-longer be sure just how aligned this pointer is. */
1163 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1166 /* Return 1 plus largest pseudo reg number used in the current function. */
1174 /* Return 1 + the largest label number used so far in the current function. */
1177 max_label_num (void)
1182 /* Return first label number used in this function (if any were used). */
1185 get_first_label_num (void)
1187 return first_label_num
;
1190 /* If the rtx for label was created during the expansion of a nested
1191 function, then first_label_num won't include this label number.
1192 Fix this now so that array indices work later. */
1195 maybe_set_first_label_num (rtx x
)
1197 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1198 first_label_num
= CODE_LABEL_NUMBER (x
);
1201 /* Return a value representing some low-order bits of X, where the number
1202 of low-order bits is given by MODE. Note that no conversion is done
1203 between floating-point and fixed-point values, rather, the bit
1204 representation is returned.
1206 This function handles the cases in common between gen_lowpart, below,
1207 and two variants in cse.c and combine.c. These are the cases that can
1208 be safely handled at all points in the compilation.
1210 If this is not a case we can handle, return 0. */
1213 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1215 int msize
= GET_MODE_SIZE (mode
);
1218 enum machine_mode innermode
;
1220 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1221 so we have to make one up. Yuk. */
1222 innermode
= GET_MODE (x
);
1224 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1225 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1226 else if (innermode
== VOIDmode
)
1227 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1229 xsize
= GET_MODE_SIZE (innermode
);
1231 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1233 if (innermode
== mode
)
1236 /* MODE must occupy no more words than the mode of X. */
1237 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1238 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1241 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1242 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1245 offset
= subreg_lowpart_offset (mode
, innermode
);
1247 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1248 && (GET_MODE_CLASS (mode
) == MODE_INT
1249 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1251 /* If we are getting the low-order part of something that has been
1252 sign- or zero-extended, we can either just use the object being
1253 extended or make a narrower extension. If we want an even smaller
1254 piece than the size of the object being extended, call ourselves
1257 This case is used mostly by combine and cse. */
1259 if (GET_MODE (XEXP (x
, 0)) == mode
)
1261 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1262 return gen_lowpart_common (mode
, XEXP (x
, 0));
1263 else if (msize
< xsize
)
1264 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1266 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1267 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1268 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1269 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1271 /* Otherwise, we can't do this. */
1276 gen_highpart (enum machine_mode mode
, rtx x
)
1278 unsigned int msize
= GET_MODE_SIZE (mode
);
1281 /* This case loses if X is a subreg. To catch bugs early,
1282 complain if an invalid MODE is used even in other cases. */
1283 gcc_assert (msize
<= UNITS_PER_WORD
1284 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1286 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1287 subreg_highpart_offset (mode
, GET_MODE (x
)));
1288 gcc_assert (result
);
1290 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1291 the target if we have a MEM. gen_highpart must return a valid operand,
1292 emitting code if necessary to do so. */
1295 result
= validize_mem (result
);
1296 gcc_assert (result
);
1302 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1303 be VOIDmode constant. */
1305 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1307 if (GET_MODE (exp
) != VOIDmode
)
1309 gcc_assert (GET_MODE (exp
) == innermode
);
1310 return gen_highpart (outermode
, exp
);
1312 return simplify_gen_subreg (outermode
, exp
, innermode
,
1313 subreg_highpart_offset (outermode
, innermode
));
1316 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1319 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1321 unsigned int offset
= 0;
1322 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1326 if (WORDS_BIG_ENDIAN
)
1327 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1328 if (BYTES_BIG_ENDIAN
)
1329 offset
+= difference
% UNITS_PER_WORD
;
1335 /* Return offset in bytes to get OUTERMODE high part
1336 of the value in mode INNERMODE stored in memory in target format. */
1338 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1340 unsigned int offset
= 0;
1341 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1343 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1347 if (! WORDS_BIG_ENDIAN
)
1348 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1349 if (! BYTES_BIG_ENDIAN
)
1350 offset
+= difference
% UNITS_PER_WORD
;
1356 /* Return 1 iff X, assumed to be a SUBREG,
1357 refers to the least significant part of its containing reg.
1358 If X is not a SUBREG, always return 1 (it is its own low part!). */
1361 subreg_lowpart_p (const_rtx x
)
1363 if (GET_CODE (x
) != SUBREG
)
1365 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1368 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1369 == SUBREG_BYTE (x
));
1372 /* Return true if X is a paradoxical subreg, false otherwise. */
1374 paradoxical_subreg_p (const_rtx x
)
1376 if (GET_CODE (x
) != SUBREG
)
1378 return (GET_MODE_PRECISION (GET_MODE (x
))
1379 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1382 /* Return subword OFFSET of operand OP.
1383 The word number, OFFSET, is interpreted as the word number starting
1384 at the low-order address. OFFSET 0 is the low-order word if not
1385 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1387 If we cannot extract the required word, we return zero. Otherwise,
1388 an rtx corresponding to the requested word will be returned.
1390 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1391 reload has completed, a valid address will always be returned. After
1392 reload, if a valid address cannot be returned, we return zero.
1394 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1395 it is the responsibility of the caller.
1397 MODE is the mode of OP in case it is a CONST_INT.
1399 ??? This is still rather broken for some cases. The problem for the
1400 moment is that all callers of this thing provide no 'goal mode' to
1401 tell us to work with. This exists because all callers were written
1402 in a word based SUBREG world.
1403 Now use of this function can be deprecated by simplify_subreg in most
1408 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1410 if (mode
== VOIDmode
)
1411 mode
= GET_MODE (op
);
1413 gcc_assert (mode
!= VOIDmode
);
1415 /* If OP is narrower than a word, fail. */
1417 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1420 /* If we want a word outside OP, return zero. */
1422 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1425 /* Form a new MEM at the requested address. */
1428 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1430 if (! validate_address
)
1433 else if (reload_completed
)
1435 if (! strict_memory_address_addr_space_p (word_mode
,
1437 MEM_ADDR_SPACE (op
)))
1441 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1444 /* Rest can be handled by simplify_subreg. */
1445 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1448 /* Similar to `operand_subword', but never return 0. If we can't
1449 extract the required subword, put OP into a register and try again.
1450 The second attempt must succeed. We always validate the address in
1453 MODE is the mode of OP, in case it is CONST_INT. */
1456 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1458 rtx result
= operand_subword (op
, offset
, 1, mode
);
1463 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1465 /* If this is a register which can not be accessed by words, copy it
1466 to a pseudo register. */
1468 op
= copy_to_reg (op
);
1470 op
= force_reg (mode
, op
);
1473 result
= operand_subword (op
, offset
, 1, mode
);
1474 gcc_assert (result
);
1479 /* Returns 1 if both MEM_EXPR can be considered equal
1483 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1488 if (! expr1
|| ! expr2
)
1491 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1494 return operand_equal_p (expr1
, expr2
, 0);
1497 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1498 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1502 get_mem_align_offset (rtx mem
, unsigned int align
)
1505 unsigned HOST_WIDE_INT offset
;
1507 /* This function can't use
1508 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1509 || (MAX (MEM_ALIGN (mem),
1510 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1514 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1516 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1517 for <variable>. get_inner_reference doesn't handle it and
1518 even if it did, the alignment in that case needs to be determined
1519 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1520 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1521 isn't sufficiently aligned, the object it is in might be. */
1522 gcc_assert (MEM_P (mem
));
1523 expr
= MEM_EXPR (mem
);
1524 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1527 offset
= MEM_OFFSET (mem
);
1530 if (DECL_ALIGN (expr
) < align
)
1533 else if (INDIRECT_REF_P (expr
))
1535 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1538 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1542 tree inner
= TREE_OPERAND (expr
, 0);
1543 tree field
= TREE_OPERAND (expr
, 1);
1544 tree byte_offset
= component_ref_field_offset (expr
);
1545 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1548 || !tree_fits_uhwi_p (byte_offset
)
1549 || !tree_fits_uhwi_p (bit_offset
))
1552 offset
+= tree_to_uhwi (byte_offset
);
1553 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1555 if (inner
== NULL_TREE
)
1557 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1558 < (unsigned int) align
)
1562 else if (DECL_P (inner
))
1564 if (DECL_ALIGN (inner
) < align
)
1568 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1576 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1579 /* Given REF (a MEM) and T, either the type of X or the expression
1580 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1581 if we are making a new object of this type. BITPOS is nonzero if
1582 there is an offset outstanding on T that will be applied later. */
1585 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1586 HOST_WIDE_INT bitpos
)
1588 HOST_WIDE_INT apply_bitpos
= 0;
1590 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1593 /* It can happen that type_for_mode was given a mode for which there
1594 is no language-level type. In which case it returns NULL, which
1599 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1600 if (type
== error_mark_node
)
1603 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1604 wrong answer, as it assumes that DECL_RTL already has the right alias
1605 info. Callers should not set DECL_RTL until after the call to
1606 set_mem_attributes. */
1607 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1609 memset (&attrs
, 0, sizeof (attrs
));
1611 /* Get the alias set from the expression or type (perhaps using a
1612 front-end routine) and use it. */
1613 attrs
.alias
= get_alias_set (t
);
1615 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1616 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1618 /* Default values from pre-existing memory attributes if present. */
1619 refattrs
= MEM_ATTRS (ref
);
1622 /* ??? Can this ever happen? Calling this routine on a MEM that
1623 already carries memory attributes should probably be invalid. */
1624 attrs
.expr
= refattrs
->expr
;
1625 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1626 attrs
.offset
= refattrs
->offset
;
1627 attrs
.size_known_p
= refattrs
->size_known_p
;
1628 attrs
.size
= refattrs
->size
;
1629 attrs
.align
= refattrs
->align
;
1632 /* Otherwise, default values from the mode of the MEM reference. */
1635 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1636 gcc_assert (!defattrs
->expr
);
1637 gcc_assert (!defattrs
->offset_known_p
);
1639 /* Respect mode size. */
1640 attrs
.size_known_p
= defattrs
->size_known_p
;
1641 attrs
.size
= defattrs
->size
;
1642 /* ??? Is this really necessary? We probably should always get
1643 the size from the type below. */
1645 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1646 if T is an object, always compute the object alignment below. */
1648 attrs
.align
= defattrs
->align
;
1650 attrs
.align
= BITS_PER_UNIT
;
1651 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1652 e.g. if the type carries an alignment attribute. Should we be
1653 able to simply always use TYPE_ALIGN? */
1656 /* We can set the alignment from the type if we are making an object,
1657 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1658 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1659 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1661 /* If the size is known, we can set that. */
1662 tree new_size
= TYPE_SIZE_UNIT (type
);
1664 /* The address-space is that of the type. */
1665 as
= TYPE_ADDR_SPACE (type
);
1667 /* If T is not a type, we may be able to deduce some more information about
1673 if (TREE_THIS_VOLATILE (t
))
1674 MEM_VOLATILE_P (ref
) = 1;
1676 /* Now remove any conversions: they don't change what the underlying
1677 object is. Likewise for SAVE_EXPR. */
1678 while (CONVERT_EXPR_P (t
)
1679 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1680 || TREE_CODE (t
) == SAVE_EXPR
)
1681 t
= TREE_OPERAND (t
, 0);
1683 /* Note whether this expression can trap. */
1684 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1686 base
= get_base_address (t
);
1690 && TREE_READONLY (base
)
1691 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1692 && !TREE_THIS_VOLATILE (base
))
1693 MEM_READONLY_P (ref
) = 1;
1695 /* Mark static const strings readonly as well. */
1696 if (TREE_CODE (base
) == STRING_CST
1697 && TREE_READONLY (base
)
1698 && TREE_STATIC (base
))
1699 MEM_READONLY_P (ref
) = 1;
1701 /* Address-space information is on the base object. */
1702 if (TREE_CODE (base
) == MEM_REF
1703 || TREE_CODE (base
) == TARGET_MEM_REF
)
1704 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1707 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1710 /* If this expression uses it's parent's alias set, mark it such
1711 that we won't change it. */
1712 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1713 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1715 /* If this is a decl, set the attributes of the MEM from it. */
1719 attrs
.offset_known_p
= true;
1721 apply_bitpos
= bitpos
;
1722 new_size
= DECL_SIZE_UNIT (t
);
1725 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1726 else if (CONSTANT_CLASS_P (t
))
1729 /* If this is a field reference, record it. */
1730 else if (TREE_CODE (t
) == COMPONENT_REF
)
1733 attrs
.offset_known_p
= true;
1735 apply_bitpos
= bitpos
;
1736 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1737 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1740 /* If this is an array reference, look for an outer field reference. */
1741 else if (TREE_CODE (t
) == ARRAY_REF
)
1743 tree off_tree
= size_zero_node
;
1744 /* We can't modify t, because we use it at the end of the
1750 tree index
= TREE_OPERAND (t2
, 1);
1751 tree low_bound
= array_ref_low_bound (t2
);
1752 tree unit_size
= array_ref_element_size (t2
);
1754 /* We assume all arrays have sizes that are a multiple of a byte.
1755 First subtract the lower bound, if any, in the type of the
1756 index, then convert to sizetype and multiply by the size of
1757 the array element. */
1758 if (! integer_zerop (low_bound
))
1759 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1762 off_tree
= size_binop (PLUS_EXPR
,
1763 size_binop (MULT_EXPR
,
1764 fold_convert (sizetype
,
1768 t2
= TREE_OPERAND (t2
, 0);
1770 while (TREE_CODE (t2
) == ARRAY_REF
);
1773 || TREE_CODE (t2
) == COMPONENT_REF
)
1776 attrs
.offset_known_p
= false;
1777 if (tree_fits_uhwi_p (off_tree
))
1779 attrs
.offset_known_p
= true;
1780 attrs
.offset
= tree_to_uhwi (off_tree
);
1781 apply_bitpos
= bitpos
;
1784 /* Else do not record a MEM_EXPR. */
1787 /* If this is an indirect reference, record it. */
1788 else if (TREE_CODE (t
) == MEM_REF
1789 || TREE_CODE (t
) == TARGET_MEM_REF
)
1792 attrs
.offset_known_p
= true;
1794 apply_bitpos
= bitpos
;
1797 /* Compute the alignment. */
1798 unsigned int obj_align
;
1799 unsigned HOST_WIDE_INT obj_bitpos
;
1800 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1801 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1802 if (obj_bitpos
!= 0)
1803 obj_align
= (obj_bitpos
& -obj_bitpos
);
1804 attrs
.align
= MAX (attrs
.align
, obj_align
);
1807 if (tree_fits_uhwi_p (new_size
))
1809 attrs
.size_known_p
= true;
1810 attrs
.size
= tree_to_uhwi (new_size
);
1813 /* If we modified OFFSET based on T, then subtract the outstanding
1814 bit position offset. Similarly, increase the size of the accessed
1815 object to contain the negative offset. */
1818 gcc_assert (attrs
.offset_known_p
);
1819 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1820 if (attrs
.size_known_p
)
1821 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1824 /* Now set the attributes we computed above. */
1825 attrs
.addrspace
= as
;
1826 set_mem_attrs (ref
, &attrs
);
1830 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1832 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1835 /* Set the alias set of MEM to SET. */
1838 set_mem_alias_set (rtx mem
, alias_set_type set
)
1840 struct mem_attrs attrs
;
1842 /* If the new and old alias sets don't conflict, something is wrong. */
1843 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1844 attrs
= *get_mem_attrs (mem
);
1846 set_mem_attrs (mem
, &attrs
);
1849 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1852 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1854 struct mem_attrs attrs
;
1856 attrs
= *get_mem_attrs (mem
);
1857 attrs
.addrspace
= addrspace
;
1858 set_mem_attrs (mem
, &attrs
);
1861 /* Set the alignment of MEM to ALIGN bits. */
1864 set_mem_align (rtx mem
, unsigned int align
)
1866 struct mem_attrs attrs
;
1868 attrs
= *get_mem_attrs (mem
);
1869 attrs
.align
= align
;
1870 set_mem_attrs (mem
, &attrs
);
1873 /* Set the expr for MEM to EXPR. */
1876 set_mem_expr (rtx mem
, tree expr
)
1878 struct mem_attrs attrs
;
1880 attrs
= *get_mem_attrs (mem
);
1882 set_mem_attrs (mem
, &attrs
);
1885 /* Set the offset of MEM to OFFSET. */
1888 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1890 struct mem_attrs attrs
;
1892 attrs
= *get_mem_attrs (mem
);
1893 attrs
.offset_known_p
= true;
1894 attrs
.offset
= offset
;
1895 set_mem_attrs (mem
, &attrs
);
1898 /* Clear the offset of MEM. */
1901 clear_mem_offset (rtx mem
)
1903 struct mem_attrs attrs
;
1905 attrs
= *get_mem_attrs (mem
);
1906 attrs
.offset_known_p
= false;
1907 set_mem_attrs (mem
, &attrs
);
1910 /* Set the size of MEM to SIZE. */
1913 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
1915 struct mem_attrs attrs
;
1917 attrs
= *get_mem_attrs (mem
);
1918 attrs
.size_known_p
= true;
1920 set_mem_attrs (mem
, &attrs
);
1923 /* Clear the size of MEM. */
1926 clear_mem_size (rtx mem
)
1928 struct mem_attrs attrs
;
1930 attrs
= *get_mem_attrs (mem
);
1931 attrs
.size_known_p
= false;
1932 set_mem_attrs (mem
, &attrs
);
1935 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1936 and its address changed to ADDR. (VOIDmode means don't change the mode.
1937 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1938 returned memory location is required to be valid. The memory
1939 attributes are not changed. */
1942 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1947 gcc_assert (MEM_P (memref
));
1948 as
= MEM_ADDR_SPACE (memref
);
1949 if (mode
== VOIDmode
)
1950 mode
= GET_MODE (memref
);
1952 addr
= XEXP (memref
, 0);
1953 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1954 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
1957 /* Don't validate address for LRA. LRA can make the address valid
1958 by itself in most efficient way. */
1959 if (validate
&& !lra_in_progress
)
1961 if (reload_in_progress
|| reload_completed
)
1962 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
1964 addr
= memory_address_addr_space (mode
, addr
, as
);
1967 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1970 new_rtx
= gen_rtx_MEM (mode
, addr
);
1971 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1975 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1976 way we are changing MEMREF, so we only preserve the alias set. */
1979 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1981 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1);
1982 enum machine_mode mmode
= GET_MODE (new_rtx
);
1983 struct mem_attrs attrs
, *defattrs
;
1985 attrs
= *get_mem_attrs (memref
);
1986 defattrs
= mode_mem_attrs
[(int) mmode
];
1987 attrs
.expr
= NULL_TREE
;
1988 attrs
.offset_known_p
= false;
1989 attrs
.size_known_p
= defattrs
->size_known_p
;
1990 attrs
.size
= defattrs
->size
;
1991 attrs
.align
= defattrs
->align
;
1993 /* If there are no changes, just return the original memory reference. */
1994 if (new_rtx
== memref
)
1996 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
1999 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2000 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2003 set_mem_attrs (new_rtx
, &attrs
);
2007 /* Return a memory reference like MEMREF, but with its mode changed
2008 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2009 nonzero, the memory address is forced to be valid.
2010 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2011 and the caller is responsible for adjusting MEMREF base register.
2012 If ADJUST_OBJECT is zero, the underlying object associated with the
2013 memory reference is left unchanged and the caller is responsible for
2014 dealing with it. Otherwise, if the new memory reference is outside
2015 the underlying object, even partially, then the object is dropped.
2016 SIZE, if nonzero, is the size of an access in cases where MODE
2017 has no inherent size. */
2020 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2021 int validate
, int adjust_address
, int adjust_object
,
2024 rtx addr
= XEXP (memref
, 0);
2026 enum machine_mode address_mode
;
2028 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2029 unsigned HOST_WIDE_INT max_align
;
2030 #ifdef POINTERS_EXTEND_UNSIGNED
2031 enum machine_mode pointer_mode
2032 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2035 /* VOIDmode means no mode change for change_address_1. */
2036 if (mode
== VOIDmode
)
2037 mode
= GET_MODE (memref
);
2039 /* Take the size of non-BLKmode accesses from the mode. */
2040 defattrs
= mode_mem_attrs
[(int) mode
];
2041 if (defattrs
->size_known_p
)
2042 size
= defattrs
->size
;
2044 /* If there are no changes, just return the original memory reference. */
2045 if (mode
== GET_MODE (memref
) && !offset
2046 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2047 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2051 /* ??? Prefer to create garbage instead of creating shared rtl.
2052 This may happen even if offset is nonzero -- consider
2053 (plus (plus reg reg) const_int) -- so do this always. */
2054 addr
= copy_rtx (addr
);
2056 /* Convert a possibly large offset to a signed value within the
2057 range of the target address space. */
2058 address_mode
= get_address_mode (memref
);
2059 pbits
= GET_MODE_BITSIZE (address_mode
);
2060 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2062 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2063 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2069 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2070 object, we can merge it into the LO_SUM. */
2071 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2073 && (unsigned HOST_WIDE_INT
) offset
2074 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2075 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2076 plus_constant (address_mode
,
2077 XEXP (addr
, 1), offset
));
2078 #ifdef POINTERS_EXTEND_UNSIGNED
2079 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2080 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2081 the fact that pointers are not allowed to overflow. */
2082 else if (POINTERS_EXTEND_UNSIGNED
> 0
2083 && GET_CODE (addr
) == ZERO_EXTEND
2084 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2085 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2086 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2087 plus_constant (pointer_mode
,
2088 XEXP (addr
, 0), offset
));
2091 addr
= plus_constant (address_mode
, addr
, offset
);
2094 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2096 /* If the address is a REG, change_address_1 rightfully returns memref,
2097 but this would destroy memref's MEM_ATTRS. */
2098 if (new_rtx
== memref
&& offset
!= 0)
2099 new_rtx
= copy_rtx (new_rtx
);
2101 /* Conservatively drop the object if we don't know where we start from. */
2102 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2104 attrs
.expr
= NULL_TREE
;
2108 /* Compute the new values of the memory attributes due to this adjustment.
2109 We add the offsets and update the alignment. */
2110 if (attrs
.offset_known_p
)
2112 attrs
.offset
+= offset
;
2114 /* Drop the object if the new left end is not within its bounds. */
2115 if (adjust_object
&& attrs
.offset
< 0)
2117 attrs
.expr
= NULL_TREE
;
2122 /* Compute the new alignment by taking the MIN of the alignment and the
2123 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2127 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2128 attrs
.align
= MIN (attrs
.align
, max_align
);
2133 /* Drop the object if the new right end is not within its bounds. */
2134 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2136 attrs
.expr
= NULL_TREE
;
2139 attrs
.size_known_p
= true;
2142 else if (attrs
.size_known_p
)
2144 gcc_assert (!adjust_object
);
2145 attrs
.size
-= offset
;
2146 /* ??? The store_by_pieces machinery generates negative sizes,
2147 so don't assert for that here. */
2150 set_mem_attrs (new_rtx
, &attrs
);
2155 /* Return a memory reference like MEMREF, but with its mode changed
2156 to MODE and its address changed to ADDR, which is assumed to be
2157 MEMREF offset by OFFSET bytes. If VALIDATE is
2158 nonzero, the memory address is forced to be valid. */
2161 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2162 HOST_WIDE_INT offset
, int validate
)
2164 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2165 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2168 /* Return a memory reference like MEMREF, but whose address is changed by
2169 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2170 known to be in OFFSET (possibly 1). */
2173 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2175 rtx new_rtx
, addr
= XEXP (memref
, 0);
2176 enum machine_mode address_mode
;
2177 struct mem_attrs attrs
, *defattrs
;
2179 attrs
= *get_mem_attrs (memref
);
2180 address_mode
= get_address_mode (memref
);
2181 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2183 /* At this point we don't know _why_ the address is invalid. It
2184 could have secondary memory references, multiplies or anything.
2186 However, if we did go and rearrange things, we can wind up not
2187 being able to recognize the magic around pic_offset_table_rtx.
2188 This stuff is fragile, and is yet another example of why it is
2189 bad to expose PIC machinery too early. */
2190 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2192 && GET_CODE (addr
) == PLUS
2193 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2195 addr
= force_reg (GET_MODE (addr
), addr
);
2196 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2199 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2200 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2202 /* If there are no changes, just return the original memory reference. */
2203 if (new_rtx
== memref
)
2206 /* Update the alignment to reflect the offset. Reset the offset, which
2208 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2209 attrs
.offset_known_p
= false;
2210 attrs
.size_known_p
= defattrs
->size_known_p
;
2211 attrs
.size
= defattrs
->size
;
2212 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2213 set_mem_attrs (new_rtx
, &attrs
);
2217 /* Return a memory reference like MEMREF, but with its address changed to
2218 ADDR. The caller is asserting that the actual piece of memory pointed
2219 to is the same, just the form of the address is being changed, such as
2220 by putting something into a register. */
2223 replace_equiv_address (rtx memref
, rtx addr
)
2225 /* change_address_1 copies the memory attribute structure without change
2226 and that's exactly what we want here. */
2227 update_temp_slot_address (XEXP (memref
, 0), addr
);
2228 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2231 /* Likewise, but the reference is not required to be valid. */
2234 replace_equiv_address_nv (rtx memref
, rtx addr
)
2236 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2239 /* Return a memory reference like MEMREF, but with its mode widened to
2240 MODE and offset by OFFSET. This would be used by targets that e.g.
2241 cannot issue QImode memory operations and have to use SImode memory
2242 operations plus masking logic. */
2245 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2247 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2248 struct mem_attrs attrs
;
2249 unsigned int size
= GET_MODE_SIZE (mode
);
2251 /* If there are no changes, just return the original memory reference. */
2252 if (new_rtx
== memref
)
2255 attrs
= *get_mem_attrs (new_rtx
);
2257 /* If we don't know what offset we were at within the expression, then
2258 we can't know if we've overstepped the bounds. */
2259 if (! attrs
.offset_known_p
)
2260 attrs
.expr
= NULL_TREE
;
2264 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2266 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2267 tree offset
= component_ref_field_offset (attrs
.expr
);
2269 if (! DECL_SIZE_UNIT (field
))
2271 attrs
.expr
= NULL_TREE
;
2275 /* Is the field at least as large as the access? If so, ok,
2276 otherwise strip back to the containing structure. */
2277 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2278 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2279 && attrs
.offset
>= 0)
2282 if (! tree_fits_uhwi_p (offset
))
2284 attrs
.expr
= NULL_TREE
;
2288 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2289 attrs
.offset
+= tree_to_uhwi (offset
);
2290 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2293 /* Similarly for the decl. */
2294 else if (DECL_P (attrs
.expr
)
2295 && DECL_SIZE_UNIT (attrs
.expr
)
2296 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2297 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2298 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2302 /* The widened memory access overflows the expression, which means
2303 that it could alias another expression. Zap it. */
2304 attrs
.expr
= NULL_TREE
;
2310 attrs
.offset_known_p
= false;
2312 /* The widened memory may alias other stuff, so zap the alias set. */
2313 /* ??? Maybe use get_alias_set on any remaining expression. */
2315 attrs
.size_known_p
= true;
2317 set_mem_attrs (new_rtx
, &attrs
);
2321 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2322 static GTY(()) tree spill_slot_decl
;
2325 get_spill_slot_decl (bool force_build_p
)
2327 tree d
= spill_slot_decl
;
2329 struct mem_attrs attrs
;
2331 if (d
|| !force_build_p
)
2334 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2335 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2336 DECL_ARTIFICIAL (d
) = 1;
2337 DECL_IGNORED_P (d
) = 1;
2339 spill_slot_decl
= d
;
2341 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2342 MEM_NOTRAP_P (rd
) = 1;
2343 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2344 attrs
.alias
= new_alias_set ();
2346 set_mem_attrs (rd
, &attrs
);
2347 SET_DECL_RTL (d
, rd
);
2352 /* Given MEM, a result from assign_stack_local, fill in the memory
2353 attributes as appropriate for a register allocator spill slot.
2354 These slots are not aliasable by other memory. We arrange for
2355 them all to use a single MEM_EXPR, so that the aliasing code can
2356 work properly in the case of shared spill slots. */
2359 set_mem_attrs_for_spill (rtx mem
)
2361 struct mem_attrs attrs
;
2364 attrs
= *get_mem_attrs (mem
);
2365 attrs
.expr
= get_spill_slot_decl (true);
2366 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2367 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2369 /* We expect the incoming memory to be of the form:
2370 (mem:MODE (plus (reg sfp) (const_int offset)))
2371 with perhaps the plus missing for offset = 0. */
2372 addr
= XEXP (mem
, 0);
2373 attrs
.offset_known_p
= true;
2375 if (GET_CODE (addr
) == PLUS
2376 && CONST_INT_P (XEXP (addr
, 1)))
2377 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2379 set_mem_attrs (mem
, &attrs
);
2380 MEM_NOTRAP_P (mem
) = 1;
2383 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2386 gen_label_rtx (void)
2388 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2389 NULL
, label_num
++, NULL
);
2392 /* For procedure integration. */
2394 /* Install new pointers to the first and last insns in the chain.
2395 Also, set cur_insn_uid to one higher than the last in use.
2396 Used for an inline-procedure after copying the insn chain. */
2399 set_new_first_and_last_insn (rtx first
, rtx last
)
2403 set_first_insn (first
);
2404 set_last_insn (last
);
2407 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2409 int debug_count
= 0;
2411 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2412 cur_debug_insn_uid
= 0;
2414 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2415 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2416 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2419 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2420 if (DEBUG_INSN_P (insn
))
2425 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2427 cur_debug_insn_uid
++;
2430 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2431 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2436 /* Go through all the RTL insn bodies and copy any invalid shared
2437 structure. This routine should only be called once. */
2440 unshare_all_rtl_1 (rtx insn
)
2442 /* Unshare just about everything else. */
2443 unshare_all_rtl_in_chain (insn
);
2445 /* Make sure the addresses of stack slots found outside the insn chain
2446 (such as, in DECL_RTL of a variable) are not shared
2447 with the insn chain.
2449 This special care is necessary when the stack slot MEM does not
2450 actually appear in the insn chain. If it does appear, its address
2451 is unshared from all else at that point. */
2452 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2455 /* Go through all the RTL insn bodies and copy any invalid shared
2456 structure, again. This is a fairly expensive thing to do so it
2457 should be done sparingly. */
2460 unshare_all_rtl_again (rtx insn
)
2465 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2468 reset_used_flags (PATTERN (p
));
2469 reset_used_flags (REG_NOTES (p
));
2471 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2474 /* Make sure that virtual stack slots are not shared. */
2475 set_used_decls (DECL_INITIAL (cfun
->decl
));
2477 /* Make sure that virtual parameters are not shared. */
2478 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2479 set_used_flags (DECL_RTL (decl
));
2481 reset_used_flags (stack_slot_list
);
2483 unshare_all_rtl_1 (insn
);
2487 unshare_all_rtl (void)
2489 unshare_all_rtl_1 (get_insns ());
2494 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2495 Recursively does the same for subexpressions. */
2498 verify_rtx_sharing (rtx orig
, rtx insn
)
2503 const char *format_ptr
;
2508 code
= GET_CODE (x
);
2510 /* These types may be freely shared. */
2526 /* SCRATCH must be shared because they represent distinct values. */
2529 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2530 clobbers or clobbers of hard registers that originated as pseudos.
2531 This is needed to allow safe register renaming. */
2532 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2533 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2538 if (shared_const_p (orig
))
2543 /* A MEM is allowed to be shared if its address is constant. */
2544 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2545 || reload_completed
|| reload_in_progress
)
2554 /* This rtx may not be shared. If it has already been seen,
2555 replace it with a copy of itself. */
2556 #ifdef ENABLE_CHECKING
2557 if (RTX_FLAG (x
, used
))
2559 error ("invalid rtl sharing found in the insn");
2561 error ("shared rtx");
2563 internal_error ("internal consistency failure");
2566 gcc_assert (!RTX_FLAG (x
, used
));
2568 RTX_FLAG (x
, used
) = 1;
2570 /* Now scan the subexpressions recursively. */
2572 format_ptr
= GET_RTX_FORMAT (code
);
2574 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2576 switch (*format_ptr
++)
2579 verify_rtx_sharing (XEXP (x
, i
), insn
);
2583 if (XVEC (x
, i
) != NULL
)
2586 int len
= XVECLEN (x
, i
);
2588 for (j
= 0; j
< len
; j
++)
2590 /* We allow sharing of ASM_OPERANDS inside single
2592 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2593 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2595 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2597 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2606 /* Reset used-flags for INSN. */
2609 reset_insn_used_flags (rtx insn
)
2611 gcc_assert (INSN_P (insn
));
2612 reset_used_flags (PATTERN (insn
));
2613 reset_used_flags (REG_NOTES (insn
));
2615 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2618 /* Go through all the RTL insn bodies and clear all the USED bits. */
2621 reset_all_used_flags (void)
2625 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2628 rtx pat
= PATTERN (p
);
2629 if (GET_CODE (pat
) != SEQUENCE
)
2630 reset_insn_used_flags (p
);
2633 gcc_assert (REG_NOTES (p
) == NULL
);
2634 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2635 reset_insn_used_flags (XVECEXP (pat
, 0, i
));
2640 /* Verify sharing in INSN. */
2643 verify_insn_sharing (rtx insn
)
2645 gcc_assert (INSN_P (insn
));
2646 reset_used_flags (PATTERN (insn
));
2647 reset_used_flags (REG_NOTES (insn
));
2649 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2652 /* Go through all the RTL insn bodies and check that there is no unexpected
2653 sharing in between the subexpressions. */
2656 verify_rtl_sharing (void)
2660 timevar_push (TV_VERIFY_RTL_SHARING
);
2662 reset_all_used_flags ();
2664 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2667 rtx pat
= PATTERN (p
);
2668 if (GET_CODE (pat
) != SEQUENCE
)
2669 verify_insn_sharing (p
);
2671 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2672 verify_insn_sharing (XVECEXP (pat
, 0, i
));
2675 reset_all_used_flags ();
2677 timevar_pop (TV_VERIFY_RTL_SHARING
);
2680 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2681 Assumes the mark bits are cleared at entry. */
2684 unshare_all_rtl_in_chain (rtx insn
)
2686 for (; insn
; insn
= NEXT_INSN (insn
))
2689 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2690 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2692 CALL_INSN_FUNCTION_USAGE (insn
)
2693 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2697 /* Go through all virtual stack slots of a function and mark them as
2698 shared. We never replace the DECL_RTLs themselves with a copy,
2699 but expressions mentioned into a DECL_RTL cannot be shared with
2700 expressions in the instruction stream.
2702 Note that reload may convert pseudo registers into memories in-place.
2703 Pseudo registers are always shared, but MEMs never are. Thus if we
2704 reset the used flags on MEMs in the instruction stream, we must set
2705 them again on MEMs that appear in DECL_RTLs. */
2708 set_used_decls (tree blk
)
2713 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2714 if (DECL_RTL_SET_P (t
))
2715 set_used_flags (DECL_RTL (t
));
2717 /* Now process sub-blocks. */
2718 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2722 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2723 Recursively does the same for subexpressions. Uses
2724 copy_rtx_if_shared_1 to reduce stack space. */
2727 copy_rtx_if_shared (rtx orig
)
2729 copy_rtx_if_shared_1 (&orig
);
2733 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2734 use. Recursively does the same for subexpressions. */
2737 copy_rtx_if_shared_1 (rtx
*orig1
)
2743 const char *format_ptr
;
2747 /* Repeat is used to turn tail-recursion into iteration. */
2754 code
= GET_CODE (x
);
2756 /* These types may be freely shared. */
2772 /* SCRATCH must be shared because they represent distinct values. */
2775 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2776 clobbers or clobbers of hard registers that originated as pseudos.
2777 This is needed to allow safe register renaming. */
2778 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2779 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2784 if (shared_const_p (x
))
2794 /* The chain of insns is not being copied. */
2801 /* This rtx may not be shared. If it has already been seen,
2802 replace it with a copy of itself. */
2804 if (RTX_FLAG (x
, used
))
2806 x
= shallow_copy_rtx (x
);
2809 RTX_FLAG (x
, used
) = 1;
2811 /* Now scan the subexpressions recursively.
2812 We can store any replaced subexpressions directly into X
2813 since we know X is not shared! Any vectors in X
2814 must be copied if X was copied. */
2816 format_ptr
= GET_RTX_FORMAT (code
);
2817 length
= GET_RTX_LENGTH (code
);
2820 for (i
= 0; i
< length
; i
++)
2822 switch (*format_ptr
++)
2826 copy_rtx_if_shared_1 (last_ptr
);
2827 last_ptr
= &XEXP (x
, i
);
2831 if (XVEC (x
, i
) != NULL
)
2834 int len
= XVECLEN (x
, i
);
2836 /* Copy the vector iff I copied the rtx and the length
2838 if (copied
&& len
> 0)
2839 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2841 /* Call recursively on all inside the vector. */
2842 for (j
= 0; j
< len
; j
++)
2845 copy_rtx_if_shared_1 (last_ptr
);
2846 last_ptr
= &XVECEXP (x
, i
, j
);
2861 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2864 mark_used_flags (rtx x
, int flag
)
2868 const char *format_ptr
;
2871 /* Repeat is used to turn tail-recursion into iteration. */
2876 code
= GET_CODE (x
);
2878 /* These types may be freely shared so we needn't do any resetting
2902 /* The chain of insns is not being copied. */
2909 RTX_FLAG (x
, used
) = flag
;
2911 format_ptr
= GET_RTX_FORMAT (code
);
2912 length
= GET_RTX_LENGTH (code
);
2914 for (i
= 0; i
< length
; i
++)
2916 switch (*format_ptr
++)
2924 mark_used_flags (XEXP (x
, i
), flag
);
2928 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2929 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
2935 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2936 to look for shared sub-parts. */
2939 reset_used_flags (rtx x
)
2941 mark_used_flags (x
, 0);
2944 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2945 to look for shared sub-parts. */
2948 set_used_flags (rtx x
)
2950 mark_used_flags (x
, 1);
2953 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2954 Return X or the rtx for the pseudo reg the value of X was copied into.
2955 OTHER must be valid as a SET_DEST. */
2958 make_safe_from (rtx x
, rtx other
)
2961 switch (GET_CODE (other
))
2964 other
= SUBREG_REG (other
);
2966 case STRICT_LOW_PART
:
2969 other
= XEXP (other
, 0);
2978 && GET_CODE (x
) != SUBREG
)
2980 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2981 || reg_mentioned_p (other
, x
))))
2983 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2984 emit_move_insn (temp
, x
);
2990 /* Emission of insns (adding them to the doubly-linked list). */
2992 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2995 get_last_insn_anywhere (void)
2997 struct sequence_stack
*stack
;
2998 if (get_last_insn ())
2999 return get_last_insn ();
3000 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3001 if (stack
->last
!= 0)
3006 /* Return the first nonnote insn emitted in current sequence or current
3007 function. This routine looks inside SEQUENCEs. */
3010 get_first_nonnote_insn (void)
3012 rtx insn
= get_insns ();
3017 for (insn
= next_insn (insn
);
3018 insn
&& NOTE_P (insn
);
3019 insn
= next_insn (insn
))
3023 if (NONJUMP_INSN_P (insn
)
3024 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3025 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3032 /* Return the last nonnote insn emitted in current sequence or current
3033 function. This routine looks inside SEQUENCEs. */
3036 get_last_nonnote_insn (void)
3038 rtx insn
= get_last_insn ();
3043 for (insn
= previous_insn (insn
);
3044 insn
&& NOTE_P (insn
);
3045 insn
= previous_insn (insn
))
3049 if (NONJUMP_INSN_P (insn
)
3050 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3051 insn
= XVECEXP (PATTERN (insn
), 0,
3052 XVECLEN (PATTERN (insn
), 0) - 1);
3059 /* Return the number of actual (non-debug) insns emitted in this
3063 get_max_insn_count (void)
3065 int n
= cur_insn_uid
;
3067 /* The table size must be stable across -g, to avoid codegen
3068 differences due to debug insns, and not be affected by
3069 -fmin-insn-uid, to avoid excessive table size and to simplify
3070 debugging of -fcompare-debug failures. */
3071 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3072 n
-= cur_debug_insn_uid
;
3074 n
-= MIN_NONDEBUG_INSN_UID
;
3080 /* Return the next insn. If it is a SEQUENCE, return the first insn
3084 next_insn (rtx insn
)
3088 insn
= NEXT_INSN (insn
);
3089 if (insn
&& NONJUMP_INSN_P (insn
)
3090 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3091 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3097 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3101 previous_insn (rtx insn
)
3105 insn
= PREV_INSN (insn
);
3106 if (insn
&& NONJUMP_INSN_P (insn
)
3107 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3108 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3114 /* Return the next insn after INSN that is not a NOTE. This routine does not
3115 look inside SEQUENCEs. */
3118 next_nonnote_insn (rtx insn
)
3122 insn
= NEXT_INSN (insn
);
3123 if (insn
== 0 || !NOTE_P (insn
))
3130 /* Return the next insn after INSN that is not a NOTE, but stop the
3131 search before we enter another basic block. This routine does not
3132 look inside SEQUENCEs. */
3135 next_nonnote_insn_bb (rtx insn
)
3139 insn
= NEXT_INSN (insn
);
3140 if (insn
== 0 || !NOTE_P (insn
))
3142 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3149 /* Return the previous insn before INSN that is not a NOTE. This routine does
3150 not look inside SEQUENCEs. */
3153 prev_nonnote_insn (rtx insn
)
3157 insn
= PREV_INSN (insn
);
3158 if (insn
== 0 || !NOTE_P (insn
))
3165 /* Return the previous insn before INSN that is not a NOTE, but stop
3166 the search before we enter another basic block. This routine does
3167 not look inside SEQUENCEs. */
3170 prev_nonnote_insn_bb (rtx insn
)
3174 insn
= PREV_INSN (insn
);
3175 if (insn
== 0 || !NOTE_P (insn
))
3177 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3184 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3185 routine does not look inside SEQUENCEs. */
3188 next_nondebug_insn (rtx insn
)
3192 insn
= NEXT_INSN (insn
);
3193 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3200 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3201 This routine does not look inside SEQUENCEs. */
3204 prev_nondebug_insn (rtx insn
)
3208 insn
= PREV_INSN (insn
);
3209 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3216 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3217 This routine does not look inside SEQUENCEs. */
3220 next_nonnote_nondebug_insn (rtx insn
)
3224 insn
= NEXT_INSN (insn
);
3225 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3232 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3233 This routine does not look inside SEQUENCEs. */
3236 prev_nonnote_nondebug_insn (rtx insn
)
3240 insn
= PREV_INSN (insn
);
3241 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3248 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3249 or 0, if there is none. This routine does not look inside
3253 next_real_insn (rtx insn
)
3257 insn
= NEXT_INSN (insn
);
3258 if (insn
== 0 || INSN_P (insn
))
3265 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3266 or 0, if there is none. This routine does not look inside
3270 prev_real_insn (rtx insn
)
3274 insn
= PREV_INSN (insn
);
3275 if (insn
== 0 || INSN_P (insn
))
3282 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3283 This routine does not look inside SEQUENCEs. */
3286 last_call_insn (void)
3290 for (insn
= get_last_insn ();
3291 insn
&& !CALL_P (insn
);
3292 insn
= PREV_INSN (insn
))
3298 /* Find the next insn after INSN that really does something. This routine
3299 does not look inside SEQUENCEs. After reload this also skips over
3300 standalone USE and CLOBBER insn. */
3303 active_insn_p (const_rtx insn
)
3305 return (CALL_P (insn
) || JUMP_P (insn
)
3306 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3307 || (NONJUMP_INSN_P (insn
)
3308 && (! reload_completed
3309 || (GET_CODE (PATTERN (insn
)) != USE
3310 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3314 next_active_insn (rtx insn
)
3318 insn
= NEXT_INSN (insn
);
3319 if (insn
== 0 || active_insn_p (insn
))
3326 /* Find the last insn before INSN that really does something. This routine
3327 does not look inside SEQUENCEs. After reload this also skips over
3328 standalone USE and CLOBBER insn. */
3331 prev_active_insn (rtx insn
)
3335 insn
= PREV_INSN (insn
);
3336 if (insn
== 0 || active_insn_p (insn
))
3344 /* Return the next insn that uses CC0 after INSN, which is assumed to
3345 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3346 applied to the result of this function should yield INSN).
3348 Normally, this is simply the next insn. However, if a REG_CC_USER note
3349 is present, it contains the insn that uses CC0.
3351 Return 0 if we can't find the insn. */
3354 next_cc0_user (rtx insn
)
3356 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3359 return XEXP (note
, 0);
3361 insn
= next_nonnote_insn (insn
);
3362 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3363 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3365 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3371 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3372 note, it is the previous insn. */
3375 prev_cc0_setter (rtx insn
)
3377 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3380 return XEXP (note
, 0);
3382 insn
= prev_nonnote_insn (insn
);
3383 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3390 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3393 find_auto_inc (rtx
*xp
, void *data
)
3396 rtx reg
= (rtx
) data
;
3398 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3401 switch (GET_CODE (x
))
3409 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3420 /* Increment the label uses for all labels present in rtx. */
3423 mark_label_nuses (rtx x
)
3429 code
= GET_CODE (x
);
3430 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3431 LABEL_NUSES (XEXP (x
, 0))++;
3433 fmt
= GET_RTX_FORMAT (code
);
3434 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3437 mark_label_nuses (XEXP (x
, i
));
3438 else if (fmt
[i
] == 'E')
3439 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3440 mark_label_nuses (XVECEXP (x
, i
, j
));
3445 /* Try splitting insns that can be split for better scheduling.
3446 PAT is the pattern which might split.
3447 TRIAL is the insn providing PAT.
3448 LAST is nonzero if we should return the last insn of the sequence produced.
3450 If this routine succeeds in splitting, it returns the first or last
3451 replacement insn depending on the value of LAST. Otherwise, it
3452 returns TRIAL. If the insn to be returned can be split, it will be. */
3455 try_split (rtx pat
, rtx trial
, int last
)
3457 rtx before
= PREV_INSN (trial
);
3458 rtx after
= NEXT_INSN (trial
);
3459 int has_barrier
= 0;
3462 rtx insn_last
, insn
;
3465 /* We're not good at redistributing frame information. */
3466 if (RTX_FRAME_RELATED_P (trial
))
3469 if (any_condjump_p (trial
)
3470 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3471 split_branch_probability
= XINT (note
, 0);
3472 probability
= split_branch_probability
;
3474 seq
= split_insns (pat
, trial
);
3476 split_branch_probability
= -1;
3478 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3479 We may need to handle this specially. */
3480 if (after
&& BARRIER_P (after
))
3483 after
= NEXT_INSN (after
);
3489 /* Avoid infinite loop if any insn of the result matches
3490 the original pattern. */
3494 if (INSN_P (insn_last
)
3495 && rtx_equal_p (PATTERN (insn_last
), pat
))
3497 if (!NEXT_INSN (insn_last
))
3499 insn_last
= NEXT_INSN (insn_last
);
3502 /* We will be adding the new sequence to the function. The splitters
3503 may have introduced invalid RTL sharing, so unshare the sequence now. */
3504 unshare_all_rtl_in_chain (seq
);
3507 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3511 mark_jump_label (PATTERN (insn
), insn
, 0);
3513 if (probability
!= -1
3514 && any_condjump_p (insn
)
3515 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3517 /* We can preserve the REG_BR_PROB notes only if exactly
3518 one jump is created, otherwise the machine description
3519 is responsible for this step using
3520 split_branch_probability variable. */
3521 gcc_assert (njumps
== 1);
3522 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3527 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3528 in SEQ and copy any additional information across. */
3531 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3536 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3537 target may have explicitly specified. */
3538 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3541 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3543 /* If the old call was a sibling call, the new one must
3545 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3547 /* If the new call is the last instruction in the sequence,
3548 it will effectively replace the old call in-situ. Otherwise
3549 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3550 so that it comes immediately after the new call. */
3551 if (NEXT_INSN (insn
))
3552 for (next
= NEXT_INSN (trial
);
3553 next
&& NOTE_P (next
);
3554 next
= NEXT_INSN (next
))
3555 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3558 add_insn_after (next
, insn
, NULL
);
3564 /* Copy notes, particularly those related to the CFG. */
3565 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3567 switch (REG_NOTE_KIND (note
))
3570 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3576 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3579 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3583 case REG_NON_LOCAL_GOTO
:
3584 case REG_CROSSING_JUMP
:
3585 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3588 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3594 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3596 rtx reg
= XEXP (note
, 0);
3597 if (!FIND_REG_INC_NOTE (insn
, reg
)
3598 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3599 add_reg_note (insn
, REG_INC
, reg
);
3605 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3613 /* If there are LABELS inside the split insns increment the
3614 usage count so we don't delete the label. */
3618 while (insn
!= NULL_RTX
)
3620 /* JUMP_P insns have already been "marked" above. */
3621 if (NONJUMP_INSN_P (insn
))
3622 mark_label_nuses (PATTERN (insn
));
3624 insn
= PREV_INSN (insn
);
3628 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3630 delete_insn (trial
);
3632 emit_barrier_after (tem
);
3634 /* Recursively call try_split for each new insn created; by the
3635 time control returns here that insn will be fully split, so
3636 set LAST and continue from the insn after the one returned.
3637 We can't use next_active_insn here since AFTER may be a note.
3638 Ignore deleted insns, which can be occur if not optimizing. */
3639 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3640 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3641 tem
= try_split (PATTERN (tem
), tem
, 1);
3643 /* Return either the first or the last insn, depending on which was
3646 ? (after
? PREV_INSN (after
) : get_last_insn ())
3647 : NEXT_INSN (before
);
3650 /* Make and return an INSN rtx, initializing all its slots.
3651 Store PATTERN in the pattern slots. */
3654 make_insn_raw (rtx pattern
)
3658 insn
= rtx_alloc (INSN
);
3660 INSN_UID (insn
) = cur_insn_uid
++;
3661 PATTERN (insn
) = pattern
;
3662 INSN_CODE (insn
) = -1;
3663 REG_NOTES (insn
) = NULL
;
3664 INSN_LOCATION (insn
) = curr_insn_location ();
3665 BLOCK_FOR_INSN (insn
) = NULL
;
3667 #ifdef ENABLE_RTL_CHECKING
3670 && (returnjump_p (insn
)
3671 || (GET_CODE (insn
) == SET
3672 && SET_DEST (insn
) == pc_rtx
)))
3674 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3682 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3685 make_debug_insn_raw (rtx pattern
)
3689 insn
= rtx_alloc (DEBUG_INSN
);
3690 INSN_UID (insn
) = cur_debug_insn_uid
++;
3691 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3692 INSN_UID (insn
) = cur_insn_uid
++;
3694 PATTERN (insn
) = pattern
;
3695 INSN_CODE (insn
) = -1;
3696 REG_NOTES (insn
) = NULL
;
3697 INSN_LOCATION (insn
) = curr_insn_location ();
3698 BLOCK_FOR_INSN (insn
) = NULL
;
3703 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3706 make_jump_insn_raw (rtx pattern
)
3710 insn
= rtx_alloc (JUMP_INSN
);
3711 INSN_UID (insn
) = cur_insn_uid
++;
3713 PATTERN (insn
) = pattern
;
3714 INSN_CODE (insn
) = -1;
3715 REG_NOTES (insn
) = NULL
;
3716 JUMP_LABEL (insn
) = NULL
;
3717 INSN_LOCATION (insn
) = curr_insn_location ();
3718 BLOCK_FOR_INSN (insn
) = NULL
;
3723 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3726 make_call_insn_raw (rtx pattern
)
3730 insn
= rtx_alloc (CALL_INSN
);
3731 INSN_UID (insn
) = cur_insn_uid
++;
3733 PATTERN (insn
) = pattern
;
3734 INSN_CODE (insn
) = -1;
3735 REG_NOTES (insn
) = NULL
;
3736 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3737 INSN_LOCATION (insn
) = curr_insn_location ();
3738 BLOCK_FOR_INSN (insn
) = NULL
;
3743 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3746 make_note_raw (enum insn_note subtype
)
3748 /* Some notes are never created this way at all. These notes are
3749 only created by patching out insns. */
3750 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3751 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3753 rtx note
= rtx_alloc (NOTE
);
3754 INSN_UID (note
) = cur_insn_uid
++;
3755 NOTE_KIND (note
) = subtype
;
3756 BLOCK_FOR_INSN (note
) = NULL
;
3757 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3761 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3762 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3763 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3766 link_insn_into_chain (rtx insn
, rtx prev
, rtx next
)
3768 PREV_INSN (insn
) = prev
;
3769 NEXT_INSN (insn
) = next
;
3772 NEXT_INSN (prev
) = insn
;
3773 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3775 rtx sequence
= PATTERN (prev
);
3776 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3781 PREV_INSN (next
) = insn
;
3782 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3783 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3786 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3788 rtx sequence
= PATTERN (insn
);
3789 PREV_INSN (XVECEXP (sequence
, 0, 0)) = prev
;
3790 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3794 /* Add INSN to the end of the doubly-linked list.
3795 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3800 rtx prev
= get_last_insn ();
3801 link_insn_into_chain (insn
, prev
, NULL
);
3802 if (NULL
== get_insns ())
3803 set_first_insn (insn
);
3804 set_last_insn (insn
);
3807 /* Add INSN into the doubly-linked list after insn AFTER. */
3810 add_insn_after_nobb (rtx insn
, rtx after
)
3812 rtx next
= NEXT_INSN (after
);
3814 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3816 link_insn_into_chain (insn
, after
, next
);
3820 if (get_last_insn () == after
)
3821 set_last_insn (insn
);
3824 struct sequence_stack
*stack
= seq_stack
;
3825 /* Scan all pending sequences too. */
3826 for (; stack
; stack
= stack
->next
)
3827 if (after
== stack
->last
)
3836 /* Add INSN into the doubly-linked list before insn BEFORE. */
3839 add_insn_before_nobb (rtx insn
, rtx before
)
3841 rtx prev
= PREV_INSN (before
);
3843 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3845 link_insn_into_chain (insn
, prev
, before
);
3849 if (get_insns () == before
)
3850 set_first_insn (insn
);
3853 struct sequence_stack
*stack
= seq_stack
;
3854 /* Scan all pending sequences too. */
3855 for (; stack
; stack
= stack
->next
)
3856 if (before
== stack
->first
)
3858 stack
->first
= insn
;
3867 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
3868 If BB is NULL, an attempt is made to infer the bb from before.
3870 This and the next function should be the only functions called
3871 to insert an insn once delay slots have been filled since only
3872 they know how to update a SEQUENCE. */
3875 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3877 add_insn_after_nobb (insn
, after
);
3878 if (!BARRIER_P (after
)
3879 && !BARRIER_P (insn
)
3880 && (bb
= BLOCK_FOR_INSN (after
)))
3882 set_block_for_insn (insn
, bb
);
3884 df_insn_rescan (insn
);
3885 /* Should not happen as first in the BB is always
3886 either NOTE or LABEL. */
3887 if (BB_END (bb
) == after
3888 /* Avoid clobbering of structure when creating new BB. */
3889 && !BARRIER_P (insn
)
3890 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3895 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
3896 If BB is NULL, an attempt is made to infer the bb from before.
3898 This and the previous function should be the only functions called
3899 to insert an insn once delay slots have been filled since only
3900 they know how to update a SEQUENCE. */
3903 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3905 add_insn_before_nobb (insn
, before
);
3908 && !BARRIER_P (before
)
3909 && !BARRIER_P (insn
))
3910 bb
= BLOCK_FOR_INSN (before
);
3914 set_block_for_insn (insn
, bb
);
3916 df_insn_rescan (insn
);
3917 /* Should not happen as first in the BB is always either NOTE or
3919 gcc_assert (BB_HEAD (bb
) != insn
3920 /* Avoid clobbering of structure when creating new BB. */
3922 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3926 /* Replace insn with an deleted instruction note. */
3929 set_insn_deleted (rtx insn
)
3932 df_insn_delete (insn
);
3933 PUT_CODE (insn
, NOTE
);
3934 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3938 /* Unlink INSN from the insn chain.
3940 This function knows how to handle sequences.
3942 This function does not invalidate data flow information associated with
3943 INSN (i.e. does not call df_insn_delete). That makes this function
3944 usable for only disconnecting an insn from the chain, and re-emit it
3947 To later insert INSN elsewhere in the insn chain via add_insn and
3948 similar functions, PREV_INSN and NEXT_INSN must be nullified by
3949 the caller. Nullifying them here breaks many insn chain walks.
3951 To really delete an insn and related DF information, use delete_insn. */
3954 remove_insn (rtx insn
)
3956 rtx next
= NEXT_INSN (insn
);
3957 rtx prev
= PREV_INSN (insn
);
3962 NEXT_INSN (prev
) = next
;
3963 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3965 rtx sequence
= PATTERN (prev
);
3966 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3969 else if (get_insns () == insn
)
3972 PREV_INSN (next
) = NULL
;
3973 set_first_insn (next
);
3977 struct sequence_stack
*stack
= seq_stack
;
3978 /* Scan all pending sequences too. */
3979 for (; stack
; stack
= stack
->next
)
3980 if (insn
== stack
->first
)
3982 stack
->first
= next
;
3991 PREV_INSN (next
) = prev
;
3992 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3993 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3995 else if (get_last_insn () == insn
)
3996 set_last_insn (prev
);
3999 struct sequence_stack
*stack
= seq_stack
;
4000 /* Scan all pending sequences too. */
4001 for (; stack
; stack
= stack
->next
)
4002 if (insn
== stack
->last
)
4011 /* Fix up basic block boundaries, if necessary. */
4012 if (!BARRIER_P (insn
)
4013 && (bb
= BLOCK_FOR_INSN (insn
)))
4015 if (BB_HEAD (bb
) == insn
)
4017 /* Never ever delete the basic block note without deleting whole
4019 gcc_assert (!NOTE_P (insn
));
4020 BB_HEAD (bb
) = next
;
4022 if (BB_END (bb
) == insn
)
4027 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4030 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4032 gcc_assert (call_insn
&& CALL_P (call_insn
));
4034 /* Put the register usage information on the CALL. If there is already
4035 some usage information, put ours at the end. */
4036 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4040 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4041 link
= XEXP (link
, 1))
4044 XEXP (link
, 1) = call_fusage
;
4047 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4050 /* Delete all insns made since FROM.
4051 FROM becomes the new last instruction. */
4054 delete_insns_since (rtx from
)
4059 NEXT_INSN (from
) = 0;
4060 set_last_insn (from
);
4063 /* This function is deprecated, please use sequences instead.
4065 Move a consecutive bunch of insns to a different place in the chain.
4066 The insns to be moved are those between FROM and TO.
4067 They are moved to a new position after the insn AFTER.
4068 AFTER must not be FROM or TO or any insn in between.
4070 This function does not know about SEQUENCEs and hence should not be
4071 called after delay-slot filling has been done. */
4074 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
4076 #ifdef ENABLE_CHECKING
4078 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4079 gcc_assert (after
!= x
);
4080 gcc_assert (after
!= to
);
4083 /* Splice this bunch out of where it is now. */
4084 if (PREV_INSN (from
))
4085 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4087 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4088 if (get_last_insn () == to
)
4089 set_last_insn (PREV_INSN (from
));
4090 if (get_insns () == from
)
4091 set_first_insn (NEXT_INSN (to
));
4093 /* Make the new neighbors point to it and it to them. */
4094 if (NEXT_INSN (after
))
4095 PREV_INSN (NEXT_INSN (after
)) = to
;
4097 NEXT_INSN (to
) = NEXT_INSN (after
);
4098 PREV_INSN (from
) = after
;
4099 NEXT_INSN (after
) = from
;
4100 if (after
== get_last_insn ())
4104 /* Same as function above, but take care to update BB boundaries. */
4106 reorder_insns (rtx from
, rtx to
, rtx after
)
4108 rtx prev
= PREV_INSN (from
);
4109 basic_block bb
, bb2
;
4111 reorder_insns_nobb (from
, to
, after
);
4113 if (!BARRIER_P (after
)
4114 && (bb
= BLOCK_FOR_INSN (after
)))
4117 df_set_bb_dirty (bb
);
4119 if (!BARRIER_P (from
)
4120 && (bb2
= BLOCK_FOR_INSN (from
)))
4122 if (BB_END (bb2
) == to
)
4123 BB_END (bb2
) = prev
;
4124 df_set_bb_dirty (bb2
);
4127 if (BB_END (bb
) == after
)
4130 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4132 df_insn_change_bb (x
, bb
);
4137 /* Emit insn(s) of given code and pattern
4138 at a specified place within the doubly-linked list.
4140 All of the emit_foo global entry points accept an object
4141 X which is either an insn list or a PATTERN of a single
4144 There are thus a few canonical ways to generate code and
4145 emit it at a specific place in the instruction stream. For
4146 example, consider the instruction named SPOT and the fact that
4147 we would like to emit some instructions before SPOT. We might
4151 ... emit the new instructions ...
4152 insns_head = get_insns ();
4155 emit_insn_before (insns_head, SPOT);
4157 It used to be common to generate SEQUENCE rtl instead, but that
4158 is a relic of the past which no longer occurs. The reason is that
4159 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4160 generated would almost certainly die right after it was created. */
4163 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4164 rtx (*make_raw
) (rtx
))
4168 gcc_assert (before
);
4173 switch (GET_CODE (x
))
4185 rtx next
= NEXT_INSN (insn
);
4186 add_insn_before (insn
, before
, bb
);
4192 #ifdef ENABLE_RTL_CHECKING
4199 last
= (*make_raw
) (x
);
4200 add_insn_before (last
, before
, bb
);
4207 /* Make X be output before the instruction BEFORE. */
4210 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4212 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4215 /* Make an instruction with body X and code JUMP_INSN
4216 and output it before the instruction BEFORE. */
4219 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4221 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4222 make_jump_insn_raw
);
4225 /* Make an instruction with body X and code CALL_INSN
4226 and output it before the instruction BEFORE. */
4229 emit_call_insn_before_noloc (rtx x
, rtx before
)
4231 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4232 make_call_insn_raw
);
4235 /* Make an instruction with body X and code DEBUG_INSN
4236 and output it before the instruction BEFORE. */
4239 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4241 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4242 make_debug_insn_raw
);
4245 /* Make an insn of code BARRIER
4246 and output it before the insn BEFORE. */
4249 emit_barrier_before (rtx before
)
4251 rtx insn
= rtx_alloc (BARRIER
);
4253 INSN_UID (insn
) = cur_insn_uid
++;
4255 add_insn_before (insn
, before
, NULL
);
4259 /* Emit the label LABEL before the insn BEFORE. */
4262 emit_label_before (rtx label
, rtx before
)
4264 gcc_checking_assert (INSN_UID (label
) == 0);
4265 INSN_UID (label
) = cur_insn_uid
++;
4266 add_insn_before (label
, before
, NULL
);
4270 /* Helper for emit_insn_after, handles lists of instructions
4274 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4278 if (!bb
&& !BARRIER_P (after
))
4279 bb
= BLOCK_FOR_INSN (after
);
4283 df_set_bb_dirty (bb
);
4284 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4285 if (!BARRIER_P (last
))
4287 set_block_for_insn (last
, bb
);
4288 df_insn_rescan (last
);
4290 if (!BARRIER_P (last
))
4292 set_block_for_insn (last
, bb
);
4293 df_insn_rescan (last
);
4295 if (BB_END (bb
) == after
)
4299 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4302 after_after
= NEXT_INSN (after
);
4304 NEXT_INSN (after
) = first
;
4305 PREV_INSN (first
) = after
;
4306 NEXT_INSN (last
) = after_after
;
4308 PREV_INSN (after_after
) = last
;
4310 if (after
== get_last_insn ())
4311 set_last_insn (last
);
4317 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4318 rtx (*make_raw
)(rtx
))
4327 switch (GET_CODE (x
))
4336 last
= emit_insn_after_1 (x
, after
, bb
);
4339 #ifdef ENABLE_RTL_CHECKING
4346 last
= (*make_raw
) (x
);
4347 add_insn_after (last
, after
, bb
);
4354 /* Make X be output after the insn AFTER and set the BB of insn. If
4355 BB is NULL, an attempt is made to infer the BB from AFTER. */
4358 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4360 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4364 /* Make an insn of code JUMP_INSN with body X
4365 and output it after the insn AFTER. */
4368 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4370 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4373 /* Make an instruction with body X and code CALL_INSN
4374 and output it after the instruction AFTER. */
4377 emit_call_insn_after_noloc (rtx x
, rtx after
)
4379 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4382 /* Make an instruction with body X and code CALL_INSN
4383 and output it after the instruction AFTER. */
4386 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4388 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4391 /* Make an insn of code BARRIER
4392 and output it after the insn AFTER. */
4395 emit_barrier_after (rtx after
)
4397 rtx insn
= rtx_alloc (BARRIER
);
4399 INSN_UID (insn
) = cur_insn_uid
++;
4401 add_insn_after (insn
, after
, NULL
);
4405 /* Emit the label LABEL after the insn AFTER. */
4408 emit_label_after (rtx label
, rtx after
)
4410 gcc_checking_assert (INSN_UID (label
) == 0);
4411 INSN_UID (label
) = cur_insn_uid
++;
4412 add_insn_after (label
, after
, NULL
);
4416 /* Notes require a bit of special handling: Some notes need to have their
4417 BLOCK_FOR_INSN set, others should never have it set, and some should
4418 have it set or clear depending on the context. */
4420 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4421 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4422 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4425 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4429 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4430 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4433 /* Notes for var tracking and EH region markers can appear between or
4434 inside basic blocks. If the caller is emitting on the basic block
4435 boundary, do not set BLOCK_FOR_INSN on the new note. */
4436 case NOTE_INSN_VAR_LOCATION
:
4437 case NOTE_INSN_CALL_ARG_LOCATION
:
4438 case NOTE_INSN_EH_REGION_BEG
:
4439 case NOTE_INSN_EH_REGION_END
:
4440 return on_bb_boundary_p
;
4442 /* Otherwise, BLOCK_FOR_INSN must be set. */
4448 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4451 emit_note_after (enum insn_note subtype
, rtx after
)
4453 rtx note
= make_note_raw (subtype
);
4454 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4455 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4457 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4458 add_insn_after_nobb (note
, after
);
4460 add_insn_after (note
, after
, bb
);
4464 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4467 emit_note_before (enum insn_note subtype
, rtx before
)
4469 rtx note
= make_note_raw (subtype
);
4470 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4471 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4473 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4474 add_insn_before_nobb (note
, before
);
4476 add_insn_before (note
, before
, bb
);
4480 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4481 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4484 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4485 rtx (*make_raw
) (rtx
))
4487 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4489 if (pattern
== NULL_RTX
|| !loc
)
4492 after
= NEXT_INSN (after
);
4495 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4496 INSN_LOCATION (after
) = loc
;
4499 after
= NEXT_INSN (after
);
4504 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4505 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4509 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4510 rtx (*make_raw
) (rtx
))
4514 if (skip_debug_insns
)
4515 while (DEBUG_INSN_P (prev
))
4516 prev
= PREV_INSN (prev
);
4519 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4522 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4525 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4527 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4529 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4532 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4534 emit_insn_after (rtx pattern
, rtx after
)
4536 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4539 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4541 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4543 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4546 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4548 emit_jump_insn_after (rtx pattern
, rtx after
)
4550 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4553 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4555 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4557 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4560 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4562 emit_call_insn_after (rtx pattern
, rtx after
)
4564 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4567 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4569 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4571 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4574 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4576 emit_debug_insn_after (rtx pattern
, rtx after
)
4578 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4581 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4582 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4583 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4587 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4588 rtx (*make_raw
) (rtx
))
4590 rtx first
= PREV_INSN (before
);
4591 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4592 insnp
? before
: NULL_RTX
,
4595 if (pattern
== NULL_RTX
|| !loc
)
4599 first
= get_insns ();
4601 first
= NEXT_INSN (first
);
4604 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4605 INSN_LOCATION (first
) = loc
;
4608 first
= NEXT_INSN (first
);
4613 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4614 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4615 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4616 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4619 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4620 bool insnp
, rtx (*make_raw
) (rtx
))
4624 if (skip_debug_insns
)
4625 while (DEBUG_INSN_P (next
))
4626 next
= PREV_INSN (next
);
4629 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4632 return emit_pattern_before_noloc (pattern
, before
,
4633 insnp
? before
: NULL_RTX
,
4637 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4639 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4641 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4645 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4647 emit_insn_before (rtx pattern
, rtx before
)
4649 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4652 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4654 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4656 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4657 make_jump_insn_raw
);
4660 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4662 emit_jump_insn_before (rtx pattern
, rtx before
)
4664 return emit_pattern_before (pattern
, before
, true, false,
4665 make_jump_insn_raw
);
4668 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4670 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4672 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4673 make_call_insn_raw
);
4676 /* Like emit_call_insn_before_noloc,
4677 but set insn_location according to BEFORE. */
4679 emit_call_insn_before (rtx pattern
, rtx before
)
4681 return emit_pattern_before (pattern
, before
, true, false,
4682 make_call_insn_raw
);
4685 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4687 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4689 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4690 make_debug_insn_raw
);
4693 /* Like emit_debug_insn_before_noloc,
4694 but set insn_location according to BEFORE. */
4696 emit_debug_insn_before (rtx pattern
, rtx before
)
4698 return emit_pattern_before (pattern
, before
, false, false,
4699 make_debug_insn_raw
);
4702 /* Take X and emit it at the end of the doubly-linked
4705 Returns the last insn emitted. */
4710 rtx last
= get_last_insn ();
4716 switch (GET_CODE (x
))
4728 rtx next
= NEXT_INSN (insn
);
4735 #ifdef ENABLE_RTL_CHECKING
4736 case JUMP_TABLE_DATA
:
4743 last
= make_insn_raw (x
);
4751 /* Make an insn of code DEBUG_INSN with pattern X
4752 and add it to the end of the doubly-linked list. */
4755 emit_debug_insn (rtx x
)
4757 rtx last
= get_last_insn ();
4763 switch (GET_CODE (x
))
4775 rtx next
= NEXT_INSN (insn
);
4782 #ifdef ENABLE_RTL_CHECKING
4783 case JUMP_TABLE_DATA
:
4790 last
= make_debug_insn_raw (x
);
4798 /* Make an insn of code JUMP_INSN with pattern X
4799 and add it to the end of the doubly-linked list. */
4802 emit_jump_insn (rtx x
)
4804 rtx last
= NULL_RTX
, insn
;
4806 switch (GET_CODE (x
))
4818 rtx next
= NEXT_INSN (insn
);
4825 #ifdef ENABLE_RTL_CHECKING
4826 case JUMP_TABLE_DATA
:
4833 last
= make_jump_insn_raw (x
);
4841 /* Make an insn of code CALL_INSN with pattern X
4842 and add it to the end of the doubly-linked list. */
4845 emit_call_insn (rtx x
)
4849 switch (GET_CODE (x
))
4858 insn
= emit_insn (x
);
4861 #ifdef ENABLE_RTL_CHECKING
4863 case JUMP_TABLE_DATA
:
4869 insn
= make_call_insn_raw (x
);
4877 /* Add the label LABEL to the end of the doubly-linked list. */
4880 emit_label (rtx label
)
4882 gcc_checking_assert (INSN_UID (label
) == 0);
4883 INSN_UID (label
) = cur_insn_uid
++;
4888 /* Make an insn of code JUMP_TABLE_DATA
4889 and add it to the end of the doubly-linked list. */
4892 emit_jump_table_data (rtx table
)
4894 rtx jump_table_data
= rtx_alloc (JUMP_TABLE_DATA
);
4895 INSN_UID (jump_table_data
) = cur_insn_uid
++;
4896 PATTERN (jump_table_data
) = table
;
4897 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
4898 add_insn (jump_table_data
);
4899 return jump_table_data
;
4902 /* Make an insn of code BARRIER
4903 and add it to the end of the doubly-linked list. */
4908 rtx barrier
= rtx_alloc (BARRIER
);
4909 INSN_UID (barrier
) = cur_insn_uid
++;
4914 /* Emit a copy of note ORIG. */
4917 emit_note_copy (rtx orig
)
4919 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
4920 rtx note
= make_note_raw (kind
);
4921 NOTE_DATA (note
) = NOTE_DATA (orig
);
4926 /* Make an insn of code NOTE or type NOTE_NO
4927 and add it to the end of the doubly-linked list. */
4930 emit_note (enum insn_note kind
)
4932 rtx note
= make_note_raw (kind
);
4937 /* Emit a clobber of lvalue X. */
4940 emit_clobber (rtx x
)
4942 /* CONCATs should not appear in the insn stream. */
4943 if (GET_CODE (x
) == CONCAT
)
4945 emit_clobber (XEXP (x
, 0));
4946 return emit_clobber (XEXP (x
, 1));
4948 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
4951 /* Return a sequence of insns to clobber lvalue X. */
4965 /* Emit a use of rvalue X. */
4970 /* CONCATs should not appear in the insn stream. */
4971 if (GET_CODE (x
) == CONCAT
)
4973 emit_use (XEXP (x
, 0));
4974 return emit_use (XEXP (x
, 1));
4976 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
4979 /* Return a sequence of insns to use rvalue X. */
4993 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4994 note of this type already exists, remove it first. */
4997 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4999 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5005 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5006 has multiple sets (some callers assume single_set
5007 means the insn only has one set, when in fact it
5008 means the insn only has one * useful * set). */
5009 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
5015 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5016 It serves no useful purpose and breaks eliminate_regs. */
5017 if (GET_CODE (datum
) == ASM_OPERANDS
)
5022 XEXP (note
, 0) = datum
;
5023 df_notes_rescan (insn
);
5031 XEXP (note
, 0) = datum
;
5037 add_reg_note (insn
, kind
, datum
);
5043 df_notes_rescan (insn
);
5049 return REG_NOTES (insn
);
5052 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5054 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5056 rtx set
= single_set (insn
);
5058 if (set
&& SET_DEST (set
) == dst
)
5059 return set_unique_reg_note (insn
, kind
, datum
);
5063 /* Return an indication of which type of insn should have X as a body.
5064 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5066 static enum rtx_code
5067 classify_insn (rtx x
)
5071 if (GET_CODE (x
) == CALL
)
5073 if (ANY_RETURN_P (x
))
5075 if (GET_CODE (x
) == SET
)
5077 if (SET_DEST (x
) == pc_rtx
)
5079 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5084 if (GET_CODE (x
) == PARALLEL
)
5087 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5088 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5090 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5091 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5093 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5094 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5100 /* Emit the rtl pattern X as an appropriate kind of insn.
5101 If X is a label, it is simply added into the insn chain. */
5106 enum rtx_code code
= classify_insn (x
);
5111 return emit_label (x
);
5113 return emit_insn (x
);
5116 rtx insn
= emit_jump_insn (x
);
5117 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5118 return emit_barrier ();
5122 return emit_call_insn (x
);
5124 return emit_debug_insn (x
);
5130 /* Space for free sequence stack entries. */
5131 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5133 /* Begin emitting insns to a sequence. If this sequence will contain
5134 something that might cause the compiler to pop arguments to function
5135 calls (because those pops have previously been deferred; see
5136 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5137 before calling this function. That will ensure that the deferred
5138 pops are not accidentally emitted in the middle of this sequence. */
5141 start_sequence (void)
5143 struct sequence_stack
*tem
;
5145 if (free_sequence_stack
!= NULL
)
5147 tem
= free_sequence_stack
;
5148 free_sequence_stack
= tem
->next
;
5151 tem
= ggc_alloc_sequence_stack ();
5153 tem
->next
= seq_stack
;
5154 tem
->first
= get_insns ();
5155 tem
->last
= get_last_insn ();
5163 /* Set up the insn chain starting with FIRST as the current sequence,
5164 saving the previously current one. See the documentation for
5165 start_sequence for more information about how to use this function. */
5168 push_to_sequence (rtx first
)
5174 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5177 set_first_insn (first
);
5178 set_last_insn (last
);
5181 /* Like push_to_sequence, but take the last insn as an argument to avoid
5182 looping through the list. */
5185 push_to_sequence2 (rtx first
, rtx last
)
5189 set_first_insn (first
);
5190 set_last_insn (last
);
5193 /* Set up the outer-level insn chain
5194 as the current sequence, saving the previously current one. */
5197 push_topmost_sequence (void)
5199 struct sequence_stack
*stack
, *top
= NULL
;
5203 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5206 set_first_insn (top
->first
);
5207 set_last_insn (top
->last
);
5210 /* After emitting to the outer-level insn chain, update the outer-level
5211 insn chain, and restore the previous saved state. */
5214 pop_topmost_sequence (void)
5216 struct sequence_stack
*stack
, *top
= NULL
;
5218 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5221 top
->first
= get_insns ();
5222 top
->last
= get_last_insn ();
5227 /* After emitting to a sequence, restore previous saved state.
5229 To get the contents of the sequence just made, you must call
5230 `get_insns' *before* calling here.
5232 If the compiler might have deferred popping arguments while
5233 generating this sequence, and this sequence will not be immediately
5234 inserted into the instruction stream, use do_pending_stack_adjust
5235 before calling get_insns. That will ensure that the deferred
5236 pops are inserted into this sequence, and not into some random
5237 location in the instruction stream. See INHIBIT_DEFER_POP for more
5238 information about deferred popping of arguments. */
5243 struct sequence_stack
*tem
= seq_stack
;
5245 set_first_insn (tem
->first
);
5246 set_last_insn (tem
->last
);
5247 seq_stack
= tem
->next
;
5249 memset (tem
, 0, sizeof (*tem
));
5250 tem
->next
= free_sequence_stack
;
5251 free_sequence_stack
= tem
;
5254 /* Return 1 if currently emitting into a sequence. */
5257 in_sequence_p (void)
5259 return seq_stack
!= 0;
5262 /* Put the various virtual registers into REGNO_REG_RTX. */
5265 init_virtual_regs (void)
5267 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5268 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5269 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5270 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5271 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5272 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5273 = virtual_preferred_stack_boundary_rtx
;
5277 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5278 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5279 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5280 static int copy_insn_n_scratches
;
5282 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5283 copied an ASM_OPERANDS.
5284 In that case, it is the original input-operand vector. */
5285 static rtvec orig_asm_operands_vector
;
5287 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5288 copied an ASM_OPERANDS.
5289 In that case, it is the copied input-operand vector. */
5290 static rtvec copy_asm_operands_vector
;
5292 /* Likewise for the constraints vector. */
5293 static rtvec orig_asm_constraints_vector
;
5294 static rtvec copy_asm_constraints_vector
;
5296 /* Recursively create a new copy of an rtx for copy_insn.
5297 This function differs from copy_rtx in that it handles SCRATCHes and
5298 ASM_OPERANDs properly.
5299 Normally, this function is not used directly; use copy_insn as front end.
5300 However, you could first copy an insn pattern with copy_insn and then use
5301 this function afterwards to properly copy any REG_NOTEs containing
5305 copy_insn_1 (rtx orig
)
5310 const char *format_ptr
;
5315 code
= GET_CODE (orig
);
5330 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5331 clobbers or clobbers of hard registers that originated as pseudos.
5332 This is needed to allow safe register renaming. */
5333 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5334 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5339 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5340 if (copy_insn_scratch_in
[i
] == orig
)
5341 return copy_insn_scratch_out
[i
];
5345 if (shared_const_p (orig
))
5349 /* A MEM with a constant address is not sharable. The problem is that
5350 the constant address may need to be reloaded. If the mem is shared,
5351 then reloading one copy of this mem will cause all copies to appear
5352 to have been reloaded. */
5358 /* Copy the various flags, fields, and other information. We assume
5359 that all fields need copying, and then clear the fields that should
5360 not be copied. That is the sensible default behavior, and forces
5361 us to explicitly document why we are *not* copying a flag. */
5362 copy
= shallow_copy_rtx (orig
);
5364 /* We do not copy the USED flag, which is used as a mark bit during
5365 walks over the RTL. */
5366 RTX_FLAG (copy
, used
) = 0;
5368 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5371 RTX_FLAG (copy
, jump
) = 0;
5372 RTX_FLAG (copy
, call
) = 0;
5373 RTX_FLAG (copy
, frame_related
) = 0;
5376 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5378 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5379 switch (*format_ptr
++)
5382 if (XEXP (orig
, i
) != NULL
)
5383 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5388 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5389 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5390 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5391 XVEC (copy
, i
) = copy_asm_operands_vector
;
5392 else if (XVEC (orig
, i
) != NULL
)
5394 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5395 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5396 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5407 /* These are left unchanged. */
5414 if (code
== SCRATCH
)
5416 i
= copy_insn_n_scratches
++;
5417 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5418 copy_insn_scratch_in
[i
] = orig
;
5419 copy_insn_scratch_out
[i
] = copy
;
5421 else if (code
== ASM_OPERANDS
)
5423 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5424 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5425 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5426 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5432 /* Create a new copy of an rtx.
5433 This function differs from copy_rtx in that it handles SCRATCHes and
5434 ASM_OPERANDs properly.
5435 INSN doesn't really have to be a full INSN; it could be just the
5438 copy_insn (rtx insn
)
5440 copy_insn_n_scratches
= 0;
5441 orig_asm_operands_vector
= 0;
5442 orig_asm_constraints_vector
= 0;
5443 copy_asm_operands_vector
= 0;
5444 copy_asm_constraints_vector
= 0;
5445 return copy_insn_1 (insn
);
5448 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5449 on that assumption that INSN itself remains in its original place. */
5452 copy_delay_slot_insn (rtx insn
)
5454 /* Copy INSN with its rtx_code, all its notes, location etc. */
5455 insn
= copy_rtx (insn
);
5456 INSN_UID (insn
) = cur_insn_uid
++;
5460 /* Initialize data structures and variables in this file
5461 before generating rtl for each function. */
5466 set_first_insn (NULL
);
5467 set_last_insn (NULL
);
5468 if (MIN_NONDEBUG_INSN_UID
)
5469 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5472 cur_debug_insn_uid
= 1;
5473 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5474 first_label_num
= label_num
;
5477 /* Init the tables that describe all the pseudo regs. */
5479 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5481 crtl
->emit
.regno_pointer_align
5482 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5484 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5486 /* Put copies of all the hard registers into regno_reg_rtx. */
5487 memcpy (regno_reg_rtx
,
5488 initial_regno_reg_rtx
,
5489 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5491 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5492 init_virtual_regs ();
5494 /* Indicate that the virtual registers and stack locations are
5496 REG_POINTER (stack_pointer_rtx
) = 1;
5497 REG_POINTER (frame_pointer_rtx
) = 1;
5498 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5499 REG_POINTER (arg_pointer_rtx
) = 1;
5501 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5502 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5503 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5504 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5505 REG_POINTER (virtual_cfa_rtx
) = 1;
5507 #ifdef STACK_BOUNDARY
5508 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5509 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5510 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5511 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5513 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5514 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5515 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5516 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5517 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5520 #ifdef INIT_EXPANDERS
5525 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5528 gen_const_vector (enum machine_mode mode
, int constant
)
5533 enum machine_mode inner
;
5535 units
= GET_MODE_NUNITS (mode
);
5536 inner
= GET_MODE_INNER (mode
);
5538 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5540 v
= rtvec_alloc (units
);
5542 /* We need to call this function after we set the scalar const_tiny_rtx
5544 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5546 for (i
= 0; i
< units
; ++i
)
5547 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5549 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5553 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5554 all elements are zero, and the one vector when all elements are one. */
5556 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5558 enum machine_mode inner
= GET_MODE_INNER (mode
);
5559 int nunits
= GET_MODE_NUNITS (mode
);
5563 /* Check to see if all of the elements have the same value. */
5564 x
= RTVEC_ELT (v
, nunits
- 1);
5565 for (i
= nunits
- 2; i
>= 0; i
--)
5566 if (RTVEC_ELT (v
, i
) != x
)
5569 /* If the values are all the same, check to see if we can use one of the
5570 standard constant vectors. */
5573 if (x
== CONST0_RTX (inner
))
5574 return CONST0_RTX (mode
);
5575 else if (x
== CONST1_RTX (inner
))
5576 return CONST1_RTX (mode
);
5577 else if (x
== CONSTM1_RTX (inner
))
5578 return CONSTM1_RTX (mode
);
5581 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5584 /* Initialise global register information required by all functions. */
5587 init_emit_regs (void)
5590 enum machine_mode mode
;
5593 /* Reset register attributes */
5594 htab_empty (reg_attrs_htab
);
5596 /* We need reg_raw_mode, so initialize the modes now. */
5597 init_reg_modes_target ();
5599 /* Assign register numbers to the globally defined register rtx. */
5600 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5601 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5602 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5603 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5604 virtual_incoming_args_rtx
=
5605 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5606 virtual_stack_vars_rtx
=
5607 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5608 virtual_stack_dynamic_rtx
=
5609 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5610 virtual_outgoing_args_rtx
=
5611 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5612 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5613 virtual_preferred_stack_boundary_rtx
=
5614 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5616 /* Initialize RTL for commonly used hard registers. These are
5617 copied into regno_reg_rtx as we begin to compile each function. */
5618 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5619 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5621 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5622 return_address_pointer_rtx
5623 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5626 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5627 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5629 pic_offset_table_rtx
= NULL_RTX
;
5631 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5633 mode
= (enum machine_mode
) i
;
5634 attrs
= ggc_alloc_cleared_mem_attrs ();
5635 attrs
->align
= BITS_PER_UNIT
;
5636 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5637 if (mode
!= BLKmode
)
5639 attrs
->size_known_p
= true;
5640 attrs
->size
= GET_MODE_SIZE (mode
);
5641 if (STRICT_ALIGNMENT
)
5642 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5644 mode_mem_attrs
[i
] = attrs
;
5648 /* Create some permanent unique rtl objects shared between all functions. */
5651 init_emit_once (void)
5654 enum machine_mode mode
;
5655 enum machine_mode double_mode
;
5657 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5659 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5660 const_int_htab_eq
, NULL
);
5662 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5663 const_double_htab_eq
, NULL
);
5665 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5666 const_fixed_htab_eq
, NULL
);
5668 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5669 mem_attrs_htab_eq
, NULL
);
5670 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5671 reg_attrs_htab_eq
, NULL
);
5673 /* Compute the word and byte modes. */
5675 byte_mode
= VOIDmode
;
5676 word_mode
= VOIDmode
;
5677 double_mode
= VOIDmode
;
5679 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5681 mode
= GET_MODE_WIDER_MODE (mode
))
5683 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5684 && byte_mode
== VOIDmode
)
5687 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5688 && word_mode
== VOIDmode
)
5692 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5694 mode
= GET_MODE_WIDER_MODE (mode
))
5696 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5697 && double_mode
== VOIDmode
)
5701 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5703 #ifdef INIT_EXPANDERS
5704 /* This is to initialize {init|mark|free}_machine_status before the first
5705 call to push_function_context_to. This is needed by the Chill front
5706 end which calls push_function_context_to before the first call to
5707 init_function_start. */
5711 /* Create the unique rtx's for certain rtx codes and operand values. */
5713 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5714 tries to use these variables. */
5715 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5716 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5717 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5719 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5720 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5721 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5723 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5725 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5726 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5727 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5732 dconsthalf
= dconst1
;
5733 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5735 for (i
= 0; i
< 3; i
++)
5737 const REAL_VALUE_TYPE
*const r
=
5738 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5740 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5742 mode
= GET_MODE_WIDER_MODE (mode
))
5743 const_tiny_rtx
[i
][(int) mode
] =
5744 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5746 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5748 mode
= GET_MODE_WIDER_MODE (mode
))
5749 const_tiny_rtx
[i
][(int) mode
] =
5750 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5752 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5754 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5756 mode
= GET_MODE_WIDER_MODE (mode
))
5757 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5759 for (mode
= MIN_MODE_PARTIAL_INT
;
5760 mode
<= MAX_MODE_PARTIAL_INT
;
5761 mode
= (enum machine_mode
)((int)(mode
) + 1))
5762 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5765 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5767 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5769 mode
= GET_MODE_WIDER_MODE (mode
))
5770 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5772 for (mode
= MIN_MODE_PARTIAL_INT
;
5773 mode
<= MAX_MODE_PARTIAL_INT
;
5774 mode
= (enum machine_mode
)((int)(mode
) + 1))
5775 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5777 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5779 mode
= GET_MODE_WIDER_MODE (mode
))
5781 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5782 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5785 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5787 mode
= GET_MODE_WIDER_MODE (mode
))
5789 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5790 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5793 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5795 mode
= GET_MODE_WIDER_MODE (mode
))
5797 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5798 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5799 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5802 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5804 mode
= GET_MODE_WIDER_MODE (mode
))
5806 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5807 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5810 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5812 mode
= GET_MODE_WIDER_MODE (mode
))
5814 FCONST0 (mode
).data
.high
= 0;
5815 FCONST0 (mode
).data
.low
= 0;
5816 FCONST0 (mode
).mode
= mode
;
5817 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5818 FCONST0 (mode
), mode
);
5821 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5823 mode
= GET_MODE_WIDER_MODE (mode
))
5825 FCONST0 (mode
).data
.high
= 0;
5826 FCONST0 (mode
).data
.low
= 0;
5827 FCONST0 (mode
).mode
= mode
;
5828 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5829 FCONST0 (mode
), mode
);
5832 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5834 mode
= GET_MODE_WIDER_MODE (mode
))
5836 FCONST0 (mode
).data
.high
= 0;
5837 FCONST0 (mode
).data
.low
= 0;
5838 FCONST0 (mode
).mode
= mode
;
5839 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5840 FCONST0 (mode
), mode
);
5842 /* We store the value 1. */
5843 FCONST1 (mode
).data
.high
= 0;
5844 FCONST1 (mode
).data
.low
= 0;
5845 FCONST1 (mode
).mode
= mode
;
5847 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5848 HOST_BITS_PER_DOUBLE_INT
,
5849 SIGNED_FIXED_POINT_MODE_P (mode
));
5850 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5851 FCONST1 (mode
), mode
);
5854 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5856 mode
= GET_MODE_WIDER_MODE (mode
))
5858 FCONST0 (mode
).data
.high
= 0;
5859 FCONST0 (mode
).data
.low
= 0;
5860 FCONST0 (mode
).mode
= mode
;
5861 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5862 FCONST0 (mode
), mode
);
5864 /* We store the value 1. */
5865 FCONST1 (mode
).data
.high
= 0;
5866 FCONST1 (mode
).data
.low
= 0;
5867 FCONST1 (mode
).mode
= mode
;
5869 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5870 HOST_BITS_PER_DOUBLE_INT
,
5871 SIGNED_FIXED_POINT_MODE_P (mode
));
5872 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5873 FCONST1 (mode
), mode
);
5876 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5878 mode
= GET_MODE_WIDER_MODE (mode
))
5880 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5883 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5885 mode
= GET_MODE_WIDER_MODE (mode
))
5887 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5890 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5892 mode
= GET_MODE_WIDER_MODE (mode
))
5894 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5895 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5898 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5900 mode
= GET_MODE_WIDER_MODE (mode
))
5902 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5903 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5906 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5907 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5908 const_tiny_rtx
[0][i
] = const0_rtx
;
5910 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5911 if (STORE_FLAG_VALUE
== 1)
5912 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5914 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
5915 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
5916 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
5917 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
5920 /* Produce exact duplicate of insn INSN after AFTER.
5921 Care updating of libcall regions if present. */
5924 emit_copy_of_insn_after (rtx insn
, rtx after
)
5928 switch (GET_CODE (insn
))
5931 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5935 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5939 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
5943 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5944 if (CALL_INSN_FUNCTION_USAGE (insn
))
5945 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5946 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5947 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
5948 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
5949 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
5950 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
5951 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
5958 /* Update LABEL_NUSES. */
5959 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
5961 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
5963 /* If the old insn is frame related, then so is the new one. This is
5964 primarily needed for IA-64 unwind info which marks epilogue insns,
5965 which may be duplicated by the basic block reordering code. */
5966 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
5968 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5969 will make them. REG_LABEL_TARGETs are created there too, but are
5970 supposed to be sticky, so we copy them. */
5971 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5972 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
5974 if (GET_CODE (link
) == EXPR_LIST
)
5975 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
5976 copy_insn_1 (XEXP (link
, 0)));
5978 add_shallow_copy_of_reg_note (new_rtx
, link
);
5981 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
5985 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5987 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5989 if (hard_reg_clobbers
[mode
][regno
])
5990 return hard_reg_clobbers
[mode
][regno
];
5992 return (hard_reg_clobbers
[mode
][regno
] =
5993 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5996 location_t prologue_location
;
5997 location_t epilogue_location
;
5999 /* Hold current location information and last location information, so the
6000 datastructures are built lazily only when some instructions in given
6001 place are needed. */
6002 static location_t curr_location
;
6004 /* Allocate insn location datastructure. */
6006 insn_locations_init (void)
6008 prologue_location
= epilogue_location
= 0;
6009 curr_location
= UNKNOWN_LOCATION
;
6012 /* At the end of emit stage, clear current location. */
6014 insn_locations_finalize (void)
6016 epilogue_location
= curr_location
;
6017 curr_location
= UNKNOWN_LOCATION
;
6020 /* Set current location. */
6022 set_curr_insn_location (location_t location
)
6024 curr_location
= location
;
6027 /* Get current location. */
6029 curr_insn_location (void)
6031 return curr_location
;
6034 /* Return lexical scope block insn belongs to. */
6036 insn_scope (const_rtx insn
)
6038 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6041 /* Return line number of the statement that produced this insn. */
6043 insn_line (const_rtx insn
)
6045 return LOCATION_LINE (INSN_LOCATION (insn
));
6048 /* Return source file of the statement that produced this insn. */
6050 insn_file (const_rtx insn
)
6052 return LOCATION_FILE (INSN_LOCATION (insn
));
6055 /* Return true if memory model MODEL requires a pre-operation (release-style)
6056 barrier or a post-operation (acquire-style) barrier. While not universal,
6057 this function matches behavior of several targets. */
6060 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6062 switch (model
& MEMMODEL_MASK
)
6064 case MEMMODEL_RELAXED
:
6065 case MEMMODEL_CONSUME
:
6067 case MEMMODEL_RELEASE
:
6069 case MEMMODEL_ACQUIRE
:
6071 case MEMMODEL_ACQ_REL
:
6072 case MEMMODEL_SEQ_CST
:
6079 #include "gt-emit-rtl.h"