1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2013 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
59 Three techniques for filling delay slots have been implemented so far:
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
105 #include "coretypes.h"
107 #include "diagnostic-core.h"
111 #include "function.h"
112 #include "insn-config.h"
113 #include "conditions.h"
114 #include "hard-reg-set.h"
115 #include "basic-block.h"
120 #include "insn-attr.h"
121 #include "resource.h"
125 #include "tree-pass.h"
126 #include "emit-rtl.h"
130 #ifndef ANNUL_IFTRUE_SLOTS
131 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
133 #ifndef ANNUL_IFFALSE_SLOTS
134 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
138 /* First, some functions that were used before GCC got a control flow graph.
139 These functions are now only used here in reorg.c, and have therefore
140 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
142 /* Return the last label to mark the same position as LABEL. Return LABEL
143 itself if it is null or any return rtx. */
146 skip_consecutive_labels (rtx label
)
150 if (label
&& ANY_RETURN_P (label
))
153 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
161 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
162 and REG_CC_USER notes so we can find it. */
165 link_cc0_insns (rtx insn
)
167 rtx user
= next_nonnote_insn (insn
);
169 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
170 user
= XVECEXP (PATTERN (user
), 0, 0);
172 add_reg_note (user
, REG_CC_SETTER
, insn
);
173 add_reg_note (insn
, REG_CC_USER
, user
);
177 /* Insns which have delay slots that have not yet been filled. */
179 static struct obstack unfilled_slots_obstack
;
180 static rtx
*unfilled_firstobj
;
182 /* Define macros to refer to the first and last slot containing unfilled
183 insns. These are used because the list may move and its address
184 should be recomputed at each use. */
186 #define unfilled_slots_base \
187 ((rtx *) obstack_base (&unfilled_slots_obstack))
189 #define unfilled_slots_next \
190 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
192 /* Points to the label before the end of the function, or before a
194 static rtx function_return_label
;
195 /* Likewise for a simple_return. */
196 static rtx function_simple_return_label
;
198 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
199 not always monotonically increase. */
200 static int *uid_to_ruid
;
202 /* Highest valid index in `uid_to_ruid'. */
205 static int stop_search_p (rtx
, int);
206 static int resource_conflicts_p (struct resources
*, struct resources
*);
207 static int insn_references_resource_p (rtx
, struct resources
*, bool);
208 static int insn_sets_resource_p (rtx
, struct resources
*, bool);
209 static rtx
find_end_label (rtx
);
210 static rtx
emit_delay_sequence (rtx
, rtx
, int);
211 static rtx
add_to_delay_list (rtx
, rtx
);
212 static rtx
delete_from_delay_slot (rtx
);
213 static void delete_scheduled_jump (rtx
);
214 static void note_delay_statistics (int, int);
215 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
216 static rtx
optimize_skip (rtx
);
218 static int get_jump_flags (rtx
, rtx
);
219 static int mostly_true_jump (rtx
);
220 static rtx
get_branch_condition (rtx
, rtx
);
221 static int condition_dominates_p (rtx
, rtx
);
222 static int redirect_with_delay_slots_safe_p (rtx
, rtx
, rtx
);
223 static int redirect_with_delay_list_safe_p (rtx
, rtx
, rtx
);
224 static int check_annul_list_true_false (int, rtx
);
225 static rtx
steal_delay_list_from_target (rtx
, rtx
, rtx
, rtx
,
229 int, int *, int *, rtx
*);
230 static rtx
steal_delay_list_from_fallthrough (rtx
, rtx
, rtx
, rtx
,
235 static void try_merge_delay_insns (rtx
, rtx
);
236 static rtx
redundant_insn (rtx
, rtx
, rtx
);
237 static int own_thread_p (rtx
, rtx
, int);
238 static void update_block (rtx
, rtx
);
239 static int reorg_redirect_jump (rtx
, rtx
);
240 static void update_reg_dead_notes (rtx
, rtx
);
241 static void fix_reg_dead_note (rtx
, rtx
);
242 static void update_reg_unused_notes (rtx
, rtx
);
243 static void fill_simple_delay_slots (int);
244 static rtx
fill_slots_from_thread (rtx
, rtx
, rtx
, rtx
,
247 static void fill_eager_delay_slots (void);
248 static void relax_delay_slots (rtx
);
249 static void make_return_insns (rtx
);
251 /* A wrapper around next_active_insn which takes care to return ret_rtx
255 first_active_target_insn (rtx insn
)
257 if (ANY_RETURN_P (insn
))
259 return next_active_insn (insn
);
262 /* Return true iff INSN is a simplejump, or any kind of return insn. */
265 simplejump_or_return_p (rtx insn
)
267 return (JUMP_P (insn
)
268 && (simplejump_p (insn
) || ANY_RETURN_P (PATTERN (insn
))));
271 /* Return TRUE if this insn should stop the search for insn to fill delay
272 slots. LABELS_P indicates that labels should terminate the search.
273 In all cases, jumps terminate the search. */
276 stop_search_p (rtx insn
, int labels_p
)
281 /* If the insn can throw an exception that is caught within the function,
282 it may effectively perform a jump from the viewpoint of the function.
283 Therefore act like for a jump. */
284 if (can_throw_internal (insn
))
287 switch (GET_CODE (insn
))
301 /* OK unless it contains a delay slot or is an `asm' insn of some type.
302 We don't know anything about these. */
303 return (GET_CODE (PATTERN (insn
)) == SEQUENCE
304 || GET_CODE (PATTERN (insn
)) == ASM_INPUT
305 || asm_noperands (PATTERN (insn
)) >= 0);
312 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
313 resource set contains a volatile memory reference. Otherwise, return FALSE. */
316 resource_conflicts_p (struct resources
*res1
, struct resources
*res2
)
318 if ((res1
->cc
&& res2
->cc
) || (res1
->memory
&& res2
->memory
)
319 || res1
->volatil
|| res2
->volatil
)
322 return hard_reg_set_intersect_p (res1
->regs
, res2
->regs
);
325 /* Return TRUE if any resource marked in RES, a `struct resources', is
326 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
327 routine is using those resources.
329 We compute this by computing all the resources referenced by INSN and
330 seeing if this conflicts with RES. It might be faster to directly check
331 ourselves, and this is the way it used to work, but it means duplicating
332 a large block of complex code. */
335 insn_references_resource_p (rtx insn
, struct resources
*res
,
336 bool include_delayed_effects
)
338 struct resources insn_res
;
340 CLEAR_RESOURCE (&insn_res
);
341 mark_referenced_resources (insn
, &insn_res
, include_delayed_effects
);
342 return resource_conflicts_p (&insn_res
, res
);
345 /* Return TRUE if INSN modifies resources that are marked in RES.
346 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
347 included. CC0 is only modified if it is explicitly set; see comments
348 in front of mark_set_resources for details. */
351 insn_sets_resource_p (rtx insn
, struct resources
*res
,
352 bool include_delayed_effects
)
354 struct resources insn_sets
;
356 CLEAR_RESOURCE (&insn_sets
);
357 mark_set_resources (insn
, &insn_sets
, 0,
358 (include_delayed_effects
361 return resource_conflicts_p (&insn_sets
, res
);
364 /* Find a label at the end of the function or before a RETURN. If there
365 is none, try to make one. If that fails, returns 0.
367 The property of such a label is that it is placed just before the
368 epilogue or a bare RETURN insn, so that another bare RETURN can be
369 turned into a jump to the label unconditionally. In particular, the
370 label cannot be placed before a RETURN insn with a filled delay slot.
372 ??? There may be a problem with the current implementation. Suppose
373 we start with a bare RETURN insn and call find_end_label. It may set
374 function_return_label just before the RETURN. Suppose the machinery
375 is able to fill the delay slot of the RETURN insn afterwards. Then
376 function_return_label is no longer valid according to the property
377 described above and find_end_label will still return it unmodified.
378 Note that this is probably mitigated by the following observation:
379 once function_return_label is made, it is very likely the target of
380 a jump, so filling the delay slot of the RETURN will be much more
382 KIND is either simple_return_rtx or ret_rtx, indicating which type of
383 return we're looking for. */
386 find_end_label (rtx kind
)
392 plabel
= &function_return_label
;
395 gcc_assert (kind
== simple_return_rtx
);
396 plabel
= &function_simple_return_label
;
399 /* If we found one previously, return it. */
403 /* Otherwise, see if there is a label at the end of the function. If there
404 is, it must be that RETURN insns aren't needed, so that is our return
405 label and we don't have to do anything else. */
407 insn
= get_last_insn ();
409 || (NONJUMP_INSN_P (insn
)
410 && (GET_CODE (PATTERN (insn
)) == USE
411 || GET_CODE (PATTERN (insn
)) == CLOBBER
)))
412 insn
= PREV_INSN (insn
);
414 /* When a target threads its epilogue we might already have a
415 suitable return insn. If so put a label before it for the
416 function_return_label. */
418 && JUMP_P (PREV_INSN (insn
))
419 && PATTERN (PREV_INSN (insn
)) == kind
)
421 rtx temp
= PREV_INSN (PREV_INSN (insn
));
422 rtx label
= gen_label_rtx ();
423 LABEL_NUSES (label
) = 0;
425 /* Put the label before any USE insns that may precede the RETURN
427 while (GET_CODE (temp
) == USE
)
428 temp
= PREV_INSN (temp
);
430 emit_label_after (label
, temp
);
434 else if (LABEL_P (insn
))
438 rtx label
= gen_label_rtx ();
439 LABEL_NUSES (label
) = 0;
440 /* If the basic block reorder pass moves the return insn to
441 some other place try to locate it again and put our
442 function_return_label there. */
443 while (insn
&& ! (JUMP_P (insn
) && (PATTERN (insn
) == kind
)))
444 insn
= PREV_INSN (insn
);
447 insn
= PREV_INSN (insn
);
449 /* Put the label before any USE insns that may precede the
451 while (GET_CODE (insn
) == USE
)
452 insn
= PREV_INSN (insn
);
454 emit_label_after (label
, insn
);
464 /* The RETURN insn has its delay slot filled so we cannot
465 emit the label just before it. Since we already have
466 an epilogue and cannot emit a new RETURN, we cannot
467 emit the label at all. */
469 #endif /* HAVE_epilogue */
471 /* Otherwise, make a new label and emit a RETURN and BARRIER,
477 /* The return we make may have delay slots too. */
478 rtx insn
= gen_return ();
479 insn
= emit_jump_insn (insn
);
480 set_return_jump_label (insn
);
482 if (num_delay_slots (insn
) > 0)
483 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
490 /* Show one additional use for this label so it won't go away until
492 ++LABEL_NUSES (*plabel
);
497 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
498 the pattern of INSN with the SEQUENCE.
500 Returns the SEQUENCE that replaces INSN. */
503 emit_delay_sequence (rtx insn
, rtx list
, int length
)
505 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
506 rtvec seqv
= rtvec_alloc (length
+ 1);
507 rtx seq
= gen_rtx_SEQUENCE (VOIDmode
, seqv
);
508 rtx seq_insn
= make_insn_raw (seq
);
510 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
511 not have a location, but one of the delayed insns does, we pick up a
512 location from there later. */
513 INSN_LOCATION (seq_insn
) = INSN_LOCATION (insn
);
515 /* Unlink INSN from the insn chain, so that we can put it into
516 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
517 rtx after
= PREV_INSN (insn
);
519 NEXT_INSN (insn
) = PREV_INSN (insn
) = NULL
;
521 /* Build our SEQUENCE and rebuild the insn chain. */
524 XVECEXP (seq
, 0, 0) = emit_insn (insn
);
525 for (rtx li
= list
; li
; li
= XEXP (li
, 1), i
++)
527 rtx tem
= XEXP (li
, 0);
530 /* Show that this copy of the insn isn't deleted. */
531 INSN_DELETED_P (tem
) = 0;
533 /* Unlink insn from its original place, and re-emit it into
535 NEXT_INSN (tem
) = PREV_INSN (tem
) = NULL
;
536 XVECEXP (seq
, 0, i
) = emit_insn (tem
);
538 /* SPARC assembler, for instance, emit warning when debug info is output
539 into the delay slot. */
540 if (INSN_LOCATION (tem
) && !INSN_LOCATION (seq_insn
))
541 INSN_LOCATION (seq_insn
) = INSN_LOCATION (tem
);
542 INSN_LOCATION (tem
) = 0;
544 for (note
= REG_NOTES (tem
); note
; note
= next
)
546 next
= XEXP (note
, 1);
547 switch (REG_NOTE_KIND (note
))
550 /* Remove any REG_DEAD notes because we can't rely on them now
551 that the insn has been moved. */
552 remove_note (tem
, note
);
555 case REG_LABEL_OPERAND
:
556 case REG_LABEL_TARGET
:
557 /* Keep the label reference count up to date. */
558 if (LABEL_P (XEXP (note
, 0)))
559 LABEL_NUSES (XEXP (note
, 0)) ++;
568 gcc_assert (i
== length
+ 1);
570 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
571 add_insn_after (seq_insn
, after
, NULL
);
576 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
577 be in the order in which the insns are to be executed. */
580 add_to_delay_list (rtx insn
, rtx delay_list
)
582 /* If we have an empty list, just make a new list element. If
583 INSN has its block number recorded, clear it since we may
584 be moving the insn to a new block. */
588 clear_hashed_info_for_insn (insn
);
589 return gen_rtx_INSN_LIST (VOIDmode
, insn
, NULL_RTX
);
592 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
594 XEXP (delay_list
, 1) = add_to_delay_list (insn
, XEXP (delay_list
, 1));
599 /* Delete INSN from the delay slot of the insn that it is in, which may
600 produce an insn with no delay slots. Return the new insn. */
603 delete_from_delay_slot (rtx insn
)
605 rtx trial
, seq_insn
, seq
, prev
;
610 /* We first must find the insn containing the SEQUENCE with INSN in its
611 delay slot. Do this by finding an insn, TRIAL, where
612 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
615 PREV_INSN (NEXT_INSN (trial
)) == trial
;
616 trial
= NEXT_INSN (trial
))
619 seq_insn
= PREV_INSN (NEXT_INSN (trial
));
620 seq
= PATTERN (seq_insn
);
622 if (NEXT_INSN (seq_insn
) && BARRIER_P (NEXT_INSN (seq_insn
)))
625 /* Create a delay list consisting of all the insns other than the one
626 we are deleting (unless we were the only one). */
627 if (XVECLEN (seq
, 0) > 2)
628 for (i
= 1; i
< XVECLEN (seq
, 0); i
++)
629 if (XVECEXP (seq
, 0, i
) != insn
)
630 delay_list
= add_to_delay_list (XVECEXP (seq
, 0, i
), delay_list
);
632 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
633 list, and rebuild the delay list if non-empty. */
634 prev
= PREV_INSN (seq_insn
);
635 trial
= XVECEXP (seq
, 0, 0);
636 delete_related_insns (seq_insn
);
637 add_insn_after (trial
, prev
, NULL
);
639 /* If there was a barrier after the old SEQUENCE, remit it. */
641 emit_barrier_after (trial
);
643 /* If there are any delay insns, remit them. Otherwise clear the
646 trial
= emit_delay_sequence (trial
, delay_list
, XVECLEN (seq
, 0) - 2);
647 else if (JUMP_P (trial
))
648 INSN_ANNULLED_BRANCH_P (trial
) = 0;
650 INSN_FROM_TARGET_P (insn
) = 0;
652 /* Show we need to fill this insn again. */
653 obstack_ptr_grow (&unfilled_slots_obstack
, trial
);
658 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
659 the insn that sets CC0 for it and delete it too. */
662 delete_scheduled_jump (rtx insn
)
664 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
665 delete the insn that sets the condition code, but it is hard to find it.
666 Since this case is rare anyway, don't bother trying; there would likely
667 be other insns that became dead anyway, which we wouldn't know to
671 if (reg_mentioned_p (cc0_rtx
, insn
))
673 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
675 /* If a reg-note was found, it points to an insn to set CC0. This
676 insn is in the delay list of some other insn. So delete it from
677 the delay list it was in. */
680 if (! FIND_REG_INC_NOTE (XEXP (note
, 0), NULL_RTX
)
681 && sets_cc0_p (PATTERN (XEXP (note
, 0))) == 1)
682 delete_from_delay_slot (XEXP (note
, 0));
686 /* The insn setting CC0 is our previous insn, but it may be in
687 a delay slot. It will be the last insn in the delay slot, if
689 rtx trial
= previous_insn (insn
);
691 trial
= prev_nonnote_insn (trial
);
692 if (sets_cc0_p (PATTERN (trial
)) != 1
693 || FIND_REG_INC_NOTE (trial
, NULL_RTX
))
695 if (PREV_INSN (NEXT_INSN (trial
)) == trial
)
696 delete_related_insns (trial
);
698 delete_from_delay_slot (trial
);
703 delete_related_insns (insn
);
706 /* Counters for delay-slot filling. */
708 #define NUM_REORG_FUNCTIONS 2
709 #define MAX_DELAY_HISTOGRAM 3
710 #define MAX_REORG_PASSES 2
712 static int num_insns_needing_delays
[NUM_REORG_FUNCTIONS
][MAX_REORG_PASSES
];
714 static int num_filled_delays
[NUM_REORG_FUNCTIONS
][MAX_DELAY_HISTOGRAM
+1][MAX_REORG_PASSES
];
716 static int reorg_pass_number
;
719 note_delay_statistics (int slots_filled
, int index
)
721 num_insns_needing_delays
[index
][reorg_pass_number
]++;
722 if (slots_filled
> MAX_DELAY_HISTOGRAM
)
723 slots_filled
= MAX_DELAY_HISTOGRAM
;
724 num_filled_delays
[index
][slots_filled
][reorg_pass_number
]++;
727 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
729 /* Optimize the following cases:
731 1. When a conditional branch skips over only one instruction,
732 use an annulling branch and put that insn in the delay slot.
733 Use either a branch that annuls when the condition if true or
734 invert the test with a branch that annuls when the condition is
735 false. This saves insns, since otherwise we must copy an insn
738 (orig) (skip) (otherwise)
739 Bcc.n L1 Bcc',a L1 Bcc,a L1'
746 2. When a conditional branch skips over only one instruction,
747 and after that, it unconditionally branches somewhere else,
748 perform the similar optimization. This saves executing the
749 second branch in the case where the inverted condition is true.
758 This should be expanded to skip over N insns, where N is the number
759 of delay slots required. */
762 optimize_skip (rtx insn
)
764 rtx trial
= next_nonnote_insn (insn
);
765 rtx next_trial
= next_active_insn (trial
);
769 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
772 || !NONJUMP_INSN_P (trial
)
773 || GET_CODE (PATTERN (trial
)) == SEQUENCE
774 || recog_memoized (trial
) < 0
775 || (! eligible_for_annul_false (insn
, 0, trial
, flags
)
776 && ! eligible_for_annul_true (insn
, 0, trial
, flags
))
777 || can_throw_internal (trial
))
780 /* There are two cases where we are just executing one insn (we assume
781 here that a branch requires only one insn; this should be generalized
782 at some point): Where the branch goes around a single insn or where
783 we have one insn followed by a branch to the same label we branch to.
784 In both of these cases, inverting the jump and annulling the delay
785 slot give the same effect in fewer insns. */
786 if (next_trial
== next_active_insn (JUMP_LABEL (insn
))
788 && simplejump_or_return_p (next_trial
)
789 && JUMP_LABEL (insn
) == JUMP_LABEL (next_trial
)))
791 if (eligible_for_annul_false (insn
, 0, trial
, flags
))
793 if (invert_jump (insn
, JUMP_LABEL (insn
), 1))
794 INSN_FROM_TARGET_P (trial
) = 1;
795 else if (! eligible_for_annul_true (insn
, 0, trial
, flags
))
799 delay_list
= add_to_delay_list (trial
, NULL_RTX
);
800 next_trial
= next_active_insn (trial
);
801 update_block (trial
, trial
);
802 delete_related_insns (trial
);
804 /* Also, if we are targeting an unconditional
805 branch, thread our jump to the target of that branch. Don't
806 change this into a RETURN here, because it may not accept what
807 we have in the delay slot. We'll fix this up later. */
808 if (next_trial
&& simplejump_or_return_p (next_trial
))
810 rtx target_label
= JUMP_LABEL (next_trial
);
811 if (ANY_RETURN_P (target_label
))
812 target_label
= find_end_label (target_label
);
816 /* Recompute the flags based on TARGET_LABEL since threading
817 the jump to TARGET_LABEL may change the direction of the
818 jump (which may change the circumstances in which the
819 delay slot is nullified). */
820 flags
= get_jump_flags (insn
, target_label
);
821 if (eligible_for_annul_true (insn
, 0, trial
, flags
))
822 reorg_redirect_jump (insn
, target_label
);
826 INSN_ANNULLED_BRANCH_P (insn
) = 1;
833 /* Encode and return branch direction and prediction information for
834 INSN assuming it will jump to LABEL.
836 Non conditional branches return no direction information and
837 are predicted as very likely taken. */
840 get_jump_flags (rtx insn
, rtx label
)
844 /* get_jump_flags can be passed any insn with delay slots, these may
845 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
846 direction information, and only if they are conditional jumps.
848 If LABEL is a return, then there is no way to determine the branch
851 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
852 && !ANY_RETURN_P (label
)
853 && INSN_UID (insn
) <= max_uid
854 && INSN_UID (label
) <= max_uid
)
856 = (uid_to_ruid
[INSN_UID (label
)] > uid_to_ruid
[INSN_UID (insn
)])
857 ? ATTR_FLAG_forward
: ATTR_FLAG_backward
;
858 /* No valid direction information. */
865 /* Return truth value of the statement that this branch
866 is mostly taken. If we think that the branch is extremely likely
867 to be taken, we return 2. If the branch is slightly more likely to be
868 taken, return 1. If the branch is slightly less likely to be taken,
869 return 0 and if the branch is highly unlikely to be taken, return -1. */
872 mostly_true_jump (rtx jump_insn
)
874 /* If branch probabilities are available, then use that number since it
875 always gives a correct answer. */
876 rtx note
= find_reg_note (jump_insn
, REG_BR_PROB
, 0);
879 int prob
= XINT (note
, 0);
881 if (prob
>= REG_BR_PROB_BASE
* 9 / 10)
883 else if (prob
>= REG_BR_PROB_BASE
/ 2)
885 else if (prob
>= REG_BR_PROB_BASE
/ 10)
891 /* If there is no note, assume branches are not taken.
892 This should be rare. */
896 /* Return the condition under which INSN will branch to TARGET. If TARGET
897 is zero, return the condition under which INSN will return. If INSN is
898 an unconditional branch, return const_true_rtx. If INSN isn't a simple
899 type of jump, or it doesn't go to TARGET, return 0. */
902 get_branch_condition (rtx insn
, rtx target
)
904 rtx pat
= PATTERN (insn
);
907 if (condjump_in_parallel_p (insn
))
908 pat
= XVECEXP (pat
, 0, 0);
910 if (ANY_RETURN_P (pat
) && pat
== target
)
911 return const_true_rtx
;
913 if (GET_CODE (pat
) != SET
|| SET_DEST (pat
) != pc_rtx
)
917 if (GET_CODE (src
) == LABEL_REF
&& XEXP (src
, 0) == target
)
918 return const_true_rtx
;
920 else if (GET_CODE (src
) == IF_THEN_ELSE
921 && XEXP (src
, 2) == pc_rtx
922 && ((GET_CODE (XEXP (src
, 1)) == LABEL_REF
923 && XEXP (XEXP (src
, 1), 0) == target
)
924 || (ANY_RETURN_P (XEXP (src
, 1)) && XEXP (src
, 1) == target
)))
925 return XEXP (src
, 0);
927 else if (GET_CODE (src
) == IF_THEN_ELSE
928 && XEXP (src
, 1) == pc_rtx
929 && ((GET_CODE (XEXP (src
, 2)) == LABEL_REF
930 && XEXP (XEXP (src
, 2), 0) == target
)
931 || (ANY_RETURN_P (XEXP (src
, 2)) && XEXP (src
, 2) == target
)))
934 rev
= reversed_comparison_code (XEXP (src
, 0), insn
);
936 return gen_rtx_fmt_ee (rev
, GET_MODE (XEXP (src
, 0)),
937 XEXP (XEXP (src
, 0), 0),
938 XEXP (XEXP (src
, 0), 1));
944 /* Return nonzero if CONDITION is more strict than the condition of
945 INSN, i.e., if INSN will always branch if CONDITION is true. */
948 condition_dominates_p (rtx condition
, rtx insn
)
950 rtx other_condition
= get_branch_condition (insn
, JUMP_LABEL (insn
));
951 enum rtx_code code
= GET_CODE (condition
);
952 enum rtx_code other_code
;
954 if (rtx_equal_p (condition
, other_condition
)
955 || other_condition
== const_true_rtx
)
958 else if (condition
== const_true_rtx
|| other_condition
== 0)
961 other_code
= GET_CODE (other_condition
);
962 if (GET_RTX_LENGTH (code
) != 2 || GET_RTX_LENGTH (other_code
) != 2
963 || ! rtx_equal_p (XEXP (condition
, 0), XEXP (other_condition
, 0))
964 || ! rtx_equal_p (XEXP (condition
, 1), XEXP (other_condition
, 1)))
967 return comparison_dominates_p (code
, other_code
);
970 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
971 any insns already in the delay slot of JUMP. */
974 redirect_with_delay_slots_safe_p (rtx jump
, rtx newlabel
, rtx seq
)
977 rtx pat
= PATTERN (seq
);
979 /* Make sure all the delay slots of this jump would still
980 be valid after threading the jump. If they are still
981 valid, then return nonzero. */
983 flags
= get_jump_flags (jump
, newlabel
);
984 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
986 #ifdef ANNUL_IFFALSE_SLOTS
987 (INSN_ANNULLED_BRANCH_P (jump
)
988 && INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
989 ? eligible_for_annul_false (jump
, i
- 1,
990 XVECEXP (pat
, 0, i
), flags
) :
992 #ifdef ANNUL_IFTRUE_SLOTS
993 (INSN_ANNULLED_BRANCH_P (jump
)
994 && ! INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
995 ? eligible_for_annul_true (jump
, i
- 1,
996 XVECEXP (pat
, 0, i
), flags
) :
998 eligible_for_delay (jump
, i
- 1, XVECEXP (pat
, 0, i
), flags
)))
1001 return (i
== XVECLEN (pat
, 0));
1004 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1005 any insns we wish to place in the delay slot of JUMP. */
1008 redirect_with_delay_list_safe_p (rtx jump
, rtx newlabel
, rtx delay_list
)
1013 /* Make sure all the insns in DELAY_LIST would still be
1014 valid after threading the jump. If they are still
1015 valid, then return nonzero. */
1017 flags
= get_jump_flags (jump
, newlabel
);
1018 for (li
= delay_list
, i
= 0; li
; li
= XEXP (li
, 1), i
++)
1020 #ifdef ANNUL_IFFALSE_SLOTS
1021 (INSN_ANNULLED_BRANCH_P (jump
)
1022 && INSN_FROM_TARGET_P (XEXP (li
, 0)))
1023 ? eligible_for_annul_false (jump
, i
, XEXP (li
, 0), flags
) :
1025 #ifdef ANNUL_IFTRUE_SLOTS
1026 (INSN_ANNULLED_BRANCH_P (jump
)
1027 && ! INSN_FROM_TARGET_P (XEXP (li
, 0)))
1028 ? eligible_for_annul_true (jump
, i
, XEXP (li
, 0), flags
) :
1030 eligible_for_delay (jump
, i
, XEXP (li
, 0), flags
)))
1033 return (li
== NULL
);
1036 /* DELAY_LIST is a list of insns that have already been placed into delay
1037 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1038 If not, return 0; otherwise return 1. */
1041 check_annul_list_true_false (int annul_true_p
, rtx delay_list
)
1047 for (temp
= delay_list
; temp
; temp
= XEXP (temp
, 1))
1049 rtx trial
= XEXP (temp
, 0);
1051 if ((annul_true_p
&& INSN_FROM_TARGET_P (trial
))
1052 || (!annul_true_p
&& !INSN_FROM_TARGET_P (trial
)))
1060 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1061 the condition tested by INSN is CONDITION and the resources shown in
1062 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1063 from SEQ's delay list, in addition to whatever insns it may execute
1064 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1065 needed while searching for delay slot insns. Return the concatenated
1066 delay list if possible, otherwise, return 0.
1068 SLOTS_TO_FILL is the total number of slots required by INSN, and
1069 PSLOTS_FILLED points to the number filled so far (also the number of
1070 insns in DELAY_LIST). It is updated with the number that have been
1071 filled from the SEQUENCE, if any.
1073 PANNUL_P points to a nonzero value if we already know that we need
1074 to annul INSN. If this routine determines that annulling is needed,
1075 it may set that value nonzero.
1077 PNEW_THREAD points to a location that is to receive the place at which
1078 execution should continue. */
1081 steal_delay_list_from_target (rtx insn
, rtx condition
, rtx seq
,
1082 rtx delay_list
, struct resources
*sets
,
1083 struct resources
*needed
,
1084 struct resources
*other_needed
,
1085 int slots_to_fill
, int *pslots_filled
,
1086 int *pannul_p
, rtx
*pnew_thread
)
1089 int slots_remaining
= slots_to_fill
- *pslots_filled
;
1090 int total_slots_filled
= *pslots_filled
;
1091 rtx new_delay_list
= 0;
1092 int must_annul
= *pannul_p
;
1095 struct resources cc_set
;
1097 /* We can't do anything if there are more delay slots in SEQ than we
1098 can handle, or if we don't know that it will be a taken branch.
1099 We know that it will be a taken branch if it is either an unconditional
1100 branch or a conditional branch with a stricter branch condition.
1102 Also, exit if the branch has more than one set, since then it is computing
1103 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1104 ??? It may be possible to move other sets into INSN in addition to
1105 moving the instructions in the delay slots.
1107 We can not steal the delay list if one of the instructions in the
1108 current delay_list modifies the condition codes and the jump in the
1109 sequence is a conditional jump. We can not do this because we can
1110 not change the direction of the jump because the condition codes
1111 will effect the direction of the jump in the sequence. */
1113 CLEAR_RESOURCE (&cc_set
);
1114 for (temp
= delay_list
; temp
; temp
= XEXP (temp
, 1))
1116 rtx trial
= XEXP (temp
, 0);
1118 mark_set_resources (trial
, &cc_set
, 0, MARK_SRC_DEST_CALL
);
1119 if (insn_references_resource_p (XVECEXP (seq
, 0, 0), &cc_set
, false))
1123 if (XVECLEN (seq
, 0) - 1 > slots_remaining
1124 || ! condition_dominates_p (condition
, XVECEXP (seq
, 0, 0))
1125 || ! single_set (XVECEXP (seq
, 0, 0)))
1128 #ifdef MD_CAN_REDIRECT_BRANCH
1129 /* On some targets, branches with delay slots can have a limited
1130 displacement. Give the back end a chance to tell us we can't do
1132 if (! MD_CAN_REDIRECT_BRANCH (insn
, XVECEXP (seq
, 0, 0)))
1136 for (i
= 1; i
< XVECLEN (seq
, 0); i
++)
1138 rtx trial
= XVECEXP (seq
, 0, i
);
1141 if (insn_references_resource_p (trial
, sets
, false)
1142 || insn_sets_resource_p (trial
, needed
, false)
1143 || insn_sets_resource_p (trial
, sets
, false)
1145 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1147 || find_reg_note (trial
, REG_CC_USER
, NULL_RTX
)
1149 /* If TRIAL is from the fallthrough code of an annulled branch insn
1150 in SEQ, we cannot use it. */
1151 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq
, 0, 0))
1152 && ! INSN_FROM_TARGET_P (trial
)))
1155 /* If this insn was already done (usually in a previous delay slot),
1156 pretend we put it in our delay slot. */
1157 if (redundant_insn (trial
, insn
, new_delay_list
))
1160 /* We will end up re-vectoring this branch, so compute flags
1161 based on jumping to the new label. */
1162 flags
= get_jump_flags (insn
, JUMP_LABEL (XVECEXP (seq
, 0, 0)));
1165 && ((condition
== const_true_rtx
1166 || (! insn_sets_resource_p (trial
, other_needed
, false)
1167 && ! may_trap_or_fault_p (PATTERN (trial
)))))
1168 ? eligible_for_delay (insn
, total_slots_filled
, trial
, flags
)
1169 : (must_annul
|| (delay_list
== NULL
&& new_delay_list
== NULL
))
1171 check_annul_list_true_false (0, delay_list
)
1172 && check_annul_list_true_false (0, new_delay_list
)
1173 && eligible_for_annul_false (insn
, total_slots_filled
,
1178 temp
= copy_delay_slot_insn (trial
);
1179 INSN_FROM_TARGET_P (temp
) = 1;
1180 new_delay_list
= add_to_delay_list (temp
, new_delay_list
);
1181 total_slots_filled
++;
1183 if (--slots_remaining
== 0)
1190 /* Show the place to which we will be branching. */
1191 *pnew_thread
= first_active_target_insn (JUMP_LABEL (XVECEXP (seq
, 0, 0)));
1193 /* Add any new insns to the delay list and update the count of the
1194 number of slots filled. */
1195 *pslots_filled
= total_slots_filled
;
1199 if (delay_list
== 0)
1200 return new_delay_list
;
1202 for (temp
= new_delay_list
; temp
; temp
= XEXP (temp
, 1))
1203 delay_list
= add_to_delay_list (XEXP (temp
, 0), delay_list
);
1208 /* Similar to steal_delay_list_from_target except that SEQ is on the
1209 fallthrough path of INSN. Here we only do something if the delay insn
1210 of SEQ is an unconditional branch. In that case we steal its delay slot
1211 for INSN since unconditional branches are much easier to fill. */
1214 steal_delay_list_from_fallthrough (rtx insn
, rtx condition
, rtx seq
,
1215 rtx delay_list
, struct resources
*sets
,
1216 struct resources
*needed
,
1217 struct resources
*other_needed
,
1218 int slots_to_fill
, int *pslots_filled
,
1223 int must_annul
= *pannul_p
;
1226 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
1228 /* We can't do anything if SEQ's delay insn isn't an
1229 unconditional branch. */
1231 if (! simplejump_or_return_p (XVECEXP (seq
, 0, 0)))
1234 for (i
= 1; i
< XVECLEN (seq
, 0); i
++)
1236 rtx trial
= XVECEXP (seq
, 0, i
);
1238 /* If TRIAL sets CC0, stealing it will move it too far from the use
1240 if (insn_references_resource_p (trial
, sets
, false)
1241 || insn_sets_resource_p (trial
, needed
, false)
1242 || insn_sets_resource_p (trial
, sets
, false)
1244 || sets_cc0_p (PATTERN (trial
))
1250 /* If this insn was already done, we don't need it. */
1251 if (redundant_insn (trial
, insn
, delay_list
))
1253 delete_from_delay_slot (trial
);
1258 && ((condition
== const_true_rtx
1259 || (! insn_sets_resource_p (trial
, other_needed
, false)
1260 && ! may_trap_or_fault_p (PATTERN (trial
)))))
1261 ? eligible_for_delay (insn
, *pslots_filled
, trial
, flags
)
1262 : (must_annul
|| delay_list
== NULL
) && (must_annul
= 1,
1263 check_annul_list_true_false (1, delay_list
)
1264 && eligible_for_annul_true (insn
, *pslots_filled
, trial
, flags
)))
1268 delete_from_delay_slot (trial
);
1269 delay_list
= add_to_delay_list (trial
, delay_list
);
1271 if (++(*pslots_filled
) == slots_to_fill
)
1283 /* Try merging insns starting at THREAD which match exactly the insns in
1286 If all insns were matched and the insn was previously annulling, the
1287 annul bit will be cleared.
1289 For each insn that is merged, if the branch is or will be non-annulling,
1290 we delete the merged insn. */
1293 try_merge_delay_insns (rtx insn
, rtx thread
)
1295 rtx trial
, next_trial
;
1296 rtx delay_insn
= XVECEXP (PATTERN (insn
), 0, 0);
1297 int annul_p
= JUMP_P (delay_insn
) && INSN_ANNULLED_BRANCH_P (delay_insn
);
1298 int slot_number
= 1;
1299 int num_slots
= XVECLEN (PATTERN (insn
), 0);
1300 rtx next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1301 struct resources set
, needed
;
1302 rtx merged_insns
= 0;
1306 flags
= get_jump_flags (delay_insn
, JUMP_LABEL (delay_insn
));
1308 CLEAR_RESOURCE (&needed
);
1309 CLEAR_RESOURCE (&set
);
1311 /* If this is not an annulling branch, take into account anything needed in
1312 INSN's delay slot. This prevents two increments from being incorrectly
1313 folded into one. If we are annulling, this would be the correct
1314 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1315 will essentially disable this optimization. This method is somewhat of
1316 a kludge, but I don't see a better way.) */
1318 for (i
= 1 ; i
< num_slots
; i
++)
1319 if (XVECEXP (PATTERN (insn
), 0, i
))
1320 mark_referenced_resources (XVECEXP (PATTERN (insn
), 0, i
), &needed
,
1323 for (trial
= thread
; !stop_search_p (trial
, 1); trial
= next_trial
)
1325 rtx pat
= PATTERN (trial
);
1326 rtx oldtrial
= trial
;
1328 next_trial
= next_nonnote_insn (trial
);
1330 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1331 if (NONJUMP_INSN_P (trial
)
1332 && (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
))
1335 if (GET_CODE (next_to_match
) == GET_CODE (trial
)
1337 /* We can't share an insn that sets cc0. */
1338 && ! sets_cc0_p (pat
)
1340 && ! insn_references_resource_p (trial
, &set
, true)
1341 && ! insn_sets_resource_p (trial
, &set
, true)
1342 && ! insn_sets_resource_p (trial
, &needed
, true)
1343 && (trial
= try_split (pat
, trial
, 0)) != 0
1344 /* Update next_trial, in case try_split succeeded. */
1345 && (next_trial
= next_nonnote_insn (trial
))
1346 /* Likewise THREAD. */
1347 && (thread
= oldtrial
== thread
? trial
: thread
)
1348 && rtx_equal_p (PATTERN (next_to_match
), PATTERN (trial
))
1349 /* Have to test this condition if annul condition is different
1350 from (and less restrictive than) non-annulling one. */
1351 && eligible_for_delay (delay_insn
, slot_number
- 1, trial
, flags
))
1356 update_block (trial
, thread
);
1357 if (trial
== thread
)
1358 thread
= next_active_insn (thread
);
1360 delete_related_insns (trial
);
1361 INSN_FROM_TARGET_P (next_to_match
) = 0;
1364 merged_insns
= gen_rtx_INSN_LIST (VOIDmode
, trial
, merged_insns
);
1366 if (++slot_number
== num_slots
)
1369 next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1372 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
1373 mark_referenced_resources (trial
, &needed
, true);
1376 /* See if we stopped on a filled insn. If we did, try to see if its
1377 delay slots match. */
1378 if (slot_number
!= num_slots
1379 && trial
&& NONJUMP_INSN_P (trial
)
1380 && GET_CODE (PATTERN (trial
)) == SEQUENCE
1381 && !(JUMP_P (XVECEXP (PATTERN (trial
), 0, 0))
1382 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial
), 0, 0))))
1384 rtx pat
= PATTERN (trial
);
1385 rtx filled_insn
= XVECEXP (pat
, 0, 0);
1387 /* Account for resources set/needed by the filled insn. */
1388 mark_set_resources (filled_insn
, &set
, 0, MARK_SRC_DEST_CALL
);
1389 mark_referenced_resources (filled_insn
, &needed
, true);
1391 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
1393 rtx dtrial
= XVECEXP (pat
, 0, i
);
1395 if (! insn_references_resource_p (dtrial
, &set
, true)
1396 && ! insn_sets_resource_p (dtrial
, &set
, true)
1397 && ! insn_sets_resource_p (dtrial
, &needed
, true)
1399 && ! sets_cc0_p (PATTERN (dtrial
))
1401 && rtx_equal_p (PATTERN (next_to_match
), PATTERN (dtrial
))
1402 && eligible_for_delay (delay_insn
, slot_number
- 1, dtrial
, flags
))
1408 update_block (dtrial
, thread
);
1409 new_rtx
= delete_from_delay_slot (dtrial
);
1410 if (INSN_DELETED_P (thread
))
1412 INSN_FROM_TARGET_P (next_to_match
) = 0;
1415 merged_insns
= gen_rtx_INSN_LIST (SImode
, dtrial
,
1418 if (++slot_number
== num_slots
)
1421 next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1425 /* Keep track of the set/referenced resources for the delay
1426 slots of any trial insns we encounter. */
1427 mark_set_resources (dtrial
, &set
, 0, MARK_SRC_DEST_CALL
);
1428 mark_referenced_resources (dtrial
, &needed
, true);
1433 /* If all insns in the delay slot have been matched and we were previously
1434 annulling the branch, we need not any more. In that case delete all the
1435 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1436 the delay list so that we know that it isn't only being used at the
1438 if (slot_number
== num_slots
&& annul_p
)
1440 for (; merged_insns
; merged_insns
= XEXP (merged_insns
, 1))
1442 if (GET_MODE (merged_insns
) == SImode
)
1446 update_block (XEXP (merged_insns
, 0), thread
);
1447 new_rtx
= delete_from_delay_slot (XEXP (merged_insns
, 0));
1448 if (INSN_DELETED_P (thread
))
1453 update_block (XEXP (merged_insns
, 0), thread
);
1454 delete_related_insns (XEXP (merged_insns
, 0));
1458 INSN_ANNULLED_BRANCH_P (delay_insn
) = 0;
1460 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1461 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
)) = 0;
1465 /* See if INSN is redundant with an insn in front of TARGET. Often this
1466 is called when INSN is a candidate for a delay slot of TARGET.
1467 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1468 of INSN. Often INSN will be redundant with an insn in a delay slot of
1469 some previous insn. This happens when we have a series of branches to the
1470 same label; in that case the first insn at the target might want to go
1471 into each of the delay slots.
1473 If we are not careful, this routine can take up a significant fraction
1474 of the total compilation time (4%), but only wins rarely. Hence we
1475 speed this routine up by making two passes. The first pass goes back
1476 until it hits a label and sees if it finds an insn with an identical
1477 pattern. Only in this (relatively rare) event does it check for
1480 We do not split insns we encounter. This could cause us not to find a
1481 redundant insn, but the cost of splitting seems greater than the possible
1482 gain in rare cases. */
1485 redundant_insn (rtx insn
, rtx target
, rtx delay_list
)
1487 rtx target_main
= target
;
1488 rtx ipat
= PATTERN (insn
);
1490 struct resources needed
, set
;
1492 unsigned insns_to_search
;
1494 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1495 are allowed to not actually assign to such a register. */
1496 if (find_reg_note (insn
, REG_UNUSED
, NULL_RTX
) != 0)
1499 /* Scan backwards looking for a match. */
1500 for (trial
= PREV_INSN (target
),
1501 insns_to_search
= MAX_DELAY_SLOT_INSN_SEARCH
;
1502 trial
&& insns_to_search
> 0;
1503 trial
= PREV_INSN (trial
))
1505 if (LABEL_P (trial
))
1508 if (!INSN_P (trial
))
1512 pat
= PATTERN (trial
);
1513 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
1516 if (GET_CODE (pat
) == SEQUENCE
)
1518 /* Stop for a CALL and its delay slots because it is difficult to
1519 track its resource needs correctly. */
1520 if (CALL_P (XVECEXP (pat
, 0, 0)))
1523 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1524 slots because it is difficult to track its resource needs
1527 #ifdef INSN_SETS_ARE_DELAYED
1528 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat
, 0, 0)))
1532 #ifdef INSN_REFERENCES_ARE_DELAYED
1533 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat
, 0, 0)))
1537 /* See if any of the insns in the delay slot match, updating
1538 resource requirements as we go. */
1539 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; i
--)
1540 if (GET_CODE (XVECEXP (pat
, 0, i
)) == GET_CODE (insn
)
1541 && rtx_equal_p (PATTERN (XVECEXP (pat
, 0, i
)), ipat
)
1542 && ! find_reg_note (XVECEXP (pat
, 0, i
), REG_UNUSED
, NULL_RTX
))
1545 /* If found a match, exit this loop early. */
1550 else if (GET_CODE (trial
) == GET_CODE (insn
) && rtx_equal_p (pat
, ipat
)
1551 && ! find_reg_note (trial
, REG_UNUSED
, NULL_RTX
))
1555 /* If we didn't find an insn that matches, return 0. */
1559 /* See what resources this insn sets and needs. If they overlap, or
1560 if this insn references CC0, it can't be redundant. */
1562 CLEAR_RESOURCE (&needed
);
1563 CLEAR_RESOURCE (&set
);
1564 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
1565 mark_referenced_resources (insn
, &needed
, true);
1567 /* If TARGET is a SEQUENCE, get the main insn. */
1568 if (NONJUMP_INSN_P (target
) && GET_CODE (PATTERN (target
)) == SEQUENCE
)
1569 target_main
= XVECEXP (PATTERN (target
), 0, 0);
1571 if (resource_conflicts_p (&needed
, &set
)
1573 || reg_mentioned_p (cc0_rtx
, ipat
)
1575 /* The insn requiring the delay may not set anything needed or set by
1577 || insn_sets_resource_p (target_main
, &needed
, true)
1578 || insn_sets_resource_p (target_main
, &set
, true))
1581 /* Insns we pass may not set either NEEDED or SET, so merge them for
1583 needed
.memory
|= set
.memory
;
1584 IOR_HARD_REG_SET (needed
.regs
, set
.regs
);
1586 /* This insn isn't redundant if it conflicts with an insn that either is
1587 or will be in a delay slot of TARGET. */
1591 if (insn_sets_resource_p (XEXP (delay_list
, 0), &needed
, true))
1593 delay_list
= XEXP (delay_list
, 1);
1596 if (NONJUMP_INSN_P (target
) && GET_CODE (PATTERN (target
)) == SEQUENCE
)
1597 for (i
= 1; i
< XVECLEN (PATTERN (target
), 0); i
++)
1598 if (insn_sets_resource_p (XVECEXP (PATTERN (target
), 0, i
), &needed
,
1602 /* Scan backwards until we reach a label or an insn that uses something
1603 INSN sets or sets something insn uses or sets. */
1605 for (trial
= PREV_INSN (target
),
1606 insns_to_search
= MAX_DELAY_SLOT_INSN_SEARCH
;
1607 trial
&& !LABEL_P (trial
) && insns_to_search
> 0;
1608 trial
= PREV_INSN (trial
))
1610 if (!INSN_P (trial
))
1614 pat
= PATTERN (trial
);
1615 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
1618 if (GET_CODE (pat
) == SEQUENCE
)
1620 bool annul_p
= false;
1621 rtx control
= XVECEXP (pat
, 0, 0);
1623 /* If this is a CALL_INSN and its delay slots, it is hard to track
1624 the resource needs properly, so give up. */
1625 if (CALL_P (control
))
1628 /* If this is an INSN or JUMP_INSN with delayed effects, it
1629 is hard to track the resource needs properly, so give up. */
1631 #ifdef INSN_SETS_ARE_DELAYED
1632 if (INSN_SETS_ARE_DELAYED (control
))
1636 #ifdef INSN_REFERENCES_ARE_DELAYED
1637 if (INSN_REFERENCES_ARE_DELAYED (control
))
1641 if (JUMP_P (control
))
1642 annul_p
= INSN_ANNULLED_BRANCH_P (control
);
1644 /* See if any of the insns in the delay slot match, updating
1645 resource requirements as we go. */
1646 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; i
--)
1648 rtx candidate
= XVECEXP (pat
, 0, i
);
1650 /* If an insn will be annulled if the branch is false, it isn't
1651 considered as a possible duplicate insn. */
1652 if (rtx_equal_p (PATTERN (candidate
), ipat
)
1653 && ! (annul_p
&& INSN_FROM_TARGET_P (candidate
)))
1655 /* Show that this insn will be used in the sequel. */
1656 INSN_FROM_TARGET_P (candidate
) = 0;
1660 /* Unless this is an annulled insn from the target of a branch,
1661 we must stop if it sets anything needed or set by INSN. */
1662 if ((!annul_p
|| !INSN_FROM_TARGET_P (candidate
))
1663 && insn_sets_resource_p (candidate
, &needed
, true))
1667 /* If the insn requiring the delay slot conflicts with INSN, we
1669 if (insn_sets_resource_p (control
, &needed
, true))
1674 /* See if TRIAL is the same as INSN. */
1675 pat
= PATTERN (trial
);
1676 if (rtx_equal_p (pat
, ipat
))
1679 /* Can't go any further if TRIAL conflicts with INSN. */
1680 if (insn_sets_resource_p (trial
, &needed
, true))
1688 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1689 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1690 is nonzero, we are allowed to fall into this thread; otherwise, we are
1693 If LABEL is used more than one or we pass a label other than LABEL before
1694 finding an active insn, we do not own this thread. */
1697 own_thread_p (rtx thread
, rtx label
, int allow_fallthrough
)
1702 /* We don't own the function end. */
1703 if (thread
== 0 || ANY_RETURN_P (thread
))
1706 /* Get the first active insn, or THREAD, if it is an active insn. */
1707 active_insn
= next_active_insn (PREV_INSN (thread
));
1709 for (insn
= thread
; insn
!= active_insn
; insn
= NEXT_INSN (insn
))
1711 && (insn
!= label
|| LABEL_NUSES (insn
) != 1))
1714 if (allow_fallthrough
)
1717 /* Ensure that we reach a BARRIER before any insn or label. */
1718 for (insn
= prev_nonnote_insn (thread
);
1719 insn
== 0 || !BARRIER_P (insn
);
1720 insn
= prev_nonnote_insn (insn
))
1723 || (NONJUMP_INSN_P (insn
)
1724 && GET_CODE (PATTERN (insn
)) != USE
1725 && GET_CODE (PATTERN (insn
)) != CLOBBER
))
1731 /* Called when INSN is being moved from a location near the target of a jump.
1732 We leave a marker of the form (use (INSN)) immediately in front
1733 of WHERE for mark_target_live_regs. These markers will be deleted when
1736 We used to try to update the live status of registers if WHERE is at
1737 the start of a basic block, but that can't work since we may remove a
1738 BARRIER in relax_delay_slots. */
1741 update_block (rtx insn
, rtx where
)
1743 /* Ignore if this was in a delay slot and it came from the target of
1745 if (INSN_FROM_TARGET_P (insn
))
1748 emit_insn_before (gen_rtx_USE (VOIDmode
, insn
), where
);
1750 /* INSN might be making a value live in a block where it didn't use to
1751 be. So recompute liveness information for this block. */
1753 incr_ticks_for_insn (insn
);
1756 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1757 the basic block containing the jump. */
1760 reorg_redirect_jump (rtx jump
, rtx nlabel
)
1762 incr_ticks_for_insn (jump
);
1763 return redirect_jump (jump
, nlabel
, 1);
1766 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1767 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1768 that reference values used in INSN. If we find one, then we move the
1769 REG_DEAD note to INSN.
1771 This is needed to handle the case where a later insn (after INSN) has a
1772 REG_DEAD note for a register used by INSN, and this later insn subsequently
1773 gets moved before a CODE_LABEL because it is a redundant insn. In this
1774 case, mark_target_live_regs may be confused into thinking the register
1775 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1778 update_reg_dead_notes (rtx insn
, rtx delayed_insn
)
1782 for (p
= next_nonnote_insn (insn
); p
!= delayed_insn
;
1783 p
= next_nonnote_insn (p
))
1784 for (link
= REG_NOTES (p
); link
; link
= next
)
1786 next
= XEXP (link
, 1);
1788 if (REG_NOTE_KIND (link
) != REG_DEAD
1789 || !REG_P (XEXP (link
, 0)))
1792 if (reg_referenced_p (XEXP (link
, 0), PATTERN (insn
)))
1794 /* Move the REG_DEAD note from P to INSN. */
1795 remove_note (p
, link
);
1796 XEXP (link
, 1) = REG_NOTES (insn
);
1797 REG_NOTES (insn
) = link
;
1802 /* Called when an insn redundant with start_insn is deleted. If there
1803 is a REG_DEAD note for the target of start_insn between start_insn
1804 and stop_insn, then the REG_DEAD note needs to be deleted since the
1805 value no longer dies there.
1807 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1808 confused into thinking the register is dead. */
1811 fix_reg_dead_note (rtx start_insn
, rtx stop_insn
)
1815 for (p
= next_nonnote_insn (start_insn
); p
!= stop_insn
;
1816 p
= next_nonnote_insn (p
))
1817 for (link
= REG_NOTES (p
); link
; link
= next
)
1819 next
= XEXP (link
, 1);
1821 if (REG_NOTE_KIND (link
) != REG_DEAD
1822 || !REG_P (XEXP (link
, 0)))
1825 if (reg_set_p (XEXP (link
, 0), PATTERN (start_insn
)))
1827 remove_note (p
, link
);
1833 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1835 This handles the case of udivmodXi4 instructions which optimize their
1836 output depending on whether any REG_UNUSED notes are present.
1837 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1841 update_reg_unused_notes (rtx insn
, rtx redundant_insn
)
1845 for (link
= REG_NOTES (insn
); link
; link
= next
)
1847 next
= XEXP (link
, 1);
1849 if (REG_NOTE_KIND (link
) != REG_UNUSED
1850 || !REG_P (XEXP (link
, 0)))
1853 if (! find_regno_note (redundant_insn
, REG_UNUSED
,
1854 REGNO (XEXP (link
, 0))))
1855 remove_note (insn
, link
);
1859 static vec
<rtx
> sibling_labels
;
1861 /* Return the label before INSN, or put a new label there. If SIBLING is
1862 non-zero, it is another label associated with the new label (if any),
1863 typically the former target of the jump that will be redirected to
1867 get_label_before (rtx insn
, rtx sibling
)
1871 /* Find an existing label at this point
1872 or make a new one if there is none. */
1873 label
= prev_nonnote_insn (insn
);
1875 if (label
== 0 || !LABEL_P (label
))
1877 rtx prev
= PREV_INSN (insn
);
1879 label
= gen_label_rtx ();
1880 emit_label_after (label
, prev
);
1881 LABEL_NUSES (label
) = 0;
1884 sibling_labels
.safe_push (label
);
1885 sibling_labels
.safe_push (sibling
);
1891 /* Scan a function looking for insns that need a delay slot and find insns to
1892 put into the delay slot.
1894 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1895 as calls). We do these first since we don't want jump insns (that are
1896 easier to fill) to get the only insns that could be used for non-jump insns.
1897 When it is zero, only try to fill JUMP_INSNs.
1899 When slots are filled in this manner, the insns (including the
1900 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1901 it is possible to tell whether a delay slot has really been filled
1902 or not. `final' knows how to deal with this, by communicating
1903 through FINAL_SEQUENCE. */
1906 fill_simple_delay_slots (int non_jumps_p
)
1908 rtx insn
, pat
, trial
, next_trial
;
1910 int num_unfilled_slots
= unfilled_slots_next
- unfilled_slots_base
;
1911 struct resources needed
, set
;
1912 int slots_to_fill
, slots_filled
;
1915 for (i
= 0; i
< num_unfilled_slots
; i
++)
1918 /* Get the next insn to fill. If it has already had any slots assigned,
1919 we can't do anything with it. Maybe we'll improve this later. */
1921 insn
= unfilled_slots_base
[i
];
1923 || INSN_DELETED_P (insn
)
1924 || (NONJUMP_INSN_P (insn
)
1925 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1926 || (JUMP_P (insn
) && non_jumps_p
)
1927 || (!JUMP_P (insn
) && ! non_jumps_p
))
1930 /* It may have been that this insn used to need delay slots, but
1931 now doesn't; ignore in that case. This can happen, for example,
1932 on the HP PA RISC, where the number of delay slots depends on
1933 what insns are nearby. */
1934 slots_to_fill
= num_delay_slots (insn
);
1936 /* Some machine description have defined instructions to have
1937 delay slots only in certain circumstances which may depend on
1938 nearby insns (which change due to reorg's actions).
1940 For example, the PA port normally has delay slots for unconditional
1943 However, the PA port claims such jumps do not have a delay slot
1944 if they are immediate successors of certain CALL_INSNs. This
1945 allows the port to favor filling the delay slot of the call with
1946 the unconditional jump. */
1947 if (slots_to_fill
== 0)
1950 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1951 says how many. After initialization, first try optimizing
1954 nop add %o7,.-L1,%o7
1958 If this case applies, the delay slot of the call is filled with
1959 the unconditional jump. This is done first to avoid having the
1960 delay slot of the call filled in the backward scan. Also, since
1961 the unconditional jump is likely to also have a delay slot, that
1962 insn must exist when it is subsequently scanned.
1964 This is tried on each insn with delay slots as some machines
1965 have insns which perform calls, but are not represented as
1972 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
1974 flags
= get_jump_flags (insn
, NULL_RTX
);
1976 if ((trial
= next_active_insn (insn
))
1978 && simplejump_p (trial
)
1979 && eligible_for_delay (insn
, slots_filled
, trial
, flags
)
1980 && no_labels_between_p (insn
, trial
)
1981 && ! can_throw_internal (trial
))
1985 delay_list
= add_to_delay_list (trial
, delay_list
);
1987 /* TRIAL may have had its delay slot filled, then unfilled. When
1988 the delay slot is unfilled, TRIAL is placed back on the unfilled
1989 slots obstack. Unfortunately, it is placed on the end of the
1990 obstack, not in its original location. Therefore, we must search
1991 from entry i + 1 to the end of the unfilled slots obstack to
1992 try and find TRIAL. */
1993 tmp
= &unfilled_slots_base
[i
+ 1];
1994 while (*tmp
!= trial
&& tmp
!= unfilled_slots_next
)
1997 /* Remove the unconditional jump from consideration for delay slot
1998 filling and unthread it. */
2002 rtx next
= NEXT_INSN (trial
);
2003 rtx prev
= PREV_INSN (trial
);
2005 NEXT_INSN (prev
) = next
;
2007 PREV_INSN (next
) = prev
;
2011 /* Now, scan backwards from the insn to search for a potential
2012 delay-slot candidate. Stop searching when a label or jump is hit.
2014 For each candidate, if it is to go into the delay slot (moved
2015 forward in execution sequence), it must not need or set any resources
2016 that were set by later insns and must not set any resources that
2017 are needed for those insns.
2019 The delay slot insn itself sets resources unless it is a call
2020 (in which case the called routine, not the insn itself, is doing
2023 if (slots_filled
< slots_to_fill
)
2025 CLEAR_RESOURCE (&needed
);
2026 CLEAR_RESOURCE (&set
);
2027 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST
);
2028 mark_referenced_resources (insn
, &needed
, false);
2030 for (trial
= prev_nonnote_insn (insn
); ! stop_search_p (trial
, 1);
2033 next_trial
= prev_nonnote_insn (trial
);
2035 /* This must be an INSN or CALL_INSN. */
2036 pat
= PATTERN (trial
);
2038 /* Stand-alone USE and CLOBBER are just for flow. */
2039 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2042 /* Check for resource conflict first, to avoid unnecessary
2044 if (! insn_references_resource_p (trial
, &set
, true)
2045 && ! insn_sets_resource_p (trial
, &set
, true)
2046 && ! insn_sets_resource_p (trial
, &needed
, true)
2048 /* Can't separate set of cc0 from its use. */
2049 && ! (reg_mentioned_p (cc0_rtx
, pat
) && ! sets_cc0_p (pat
))
2051 && ! can_throw_internal (trial
))
2053 trial
= try_split (pat
, trial
, 1);
2054 next_trial
= prev_nonnote_insn (trial
);
2055 if (eligible_for_delay (insn
, slots_filled
, trial
, flags
))
2057 /* In this case, we are searching backward, so if we
2058 find insns to put on the delay list, we want
2059 to put them at the head, rather than the
2060 tail, of the list. */
2062 update_reg_dead_notes (trial
, insn
);
2063 delay_list
= gen_rtx_INSN_LIST (VOIDmode
,
2065 update_block (trial
, trial
);
2066 delete_related_insns (trial
);
2067 if (slots_to_fill
== ++slots_filled
)
2073 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2074 mark_referenced_resources (trial
, &needed
, true);
2078 /* If all needed slots haven't been filled, we come here. */
2080 /* Try to optimize case of jumping around a single insn. */
2081 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2082 if (slots_filled
!= slots_to_fill
2085 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
2086 && !ANY_RETURN_P (JUMP_LABEL (insn
)))
2088 delay_list
= optimize_skip (insn
);
2094 /* Try to get insns from beyond the insn needing the delay slot.
2095 These insns can neither set or reference resources set in insns being
2096 skipped, cannot set resources in the insn being skipped, and, if this
2097 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2098 call might not return).
2100 There used to be code which continued past the target label if
2101 we saw all uses of the target label. This code did not work,
2102 because it failed to account for some instructions which were
2103 both annulled and marked as from the target. This can happen as a
2104 result of optimize_skip. Since this code was redundant with
2105 fill_eager_delay_slots anyways, it was just deleted. */
2107 if (slots_filled
!= slots_to_fill
2108 /* If this instruction could throw an exception which is
2109 caught in the same function, then it's not safe to fill
2110 the delay slot with an instruction from beyond this
2111 point. For example, consider:
2122 Even though `i' is a local variable, we must be sure not
2123 to put `i = 3' in the delay slot if `f' might throw an
2126 Presumably, we should also check to see if we could get
2127 back to this function via `setjmp'. */
2128 && ! can_throw_internal (insn
)
2131 int maybe_never
= 0;
2132 rtx pat
, trial_delay
;
2134 CLEAR_RESOURCE (&needed
);
2135 CLEAR_RESOURCE (&set
);
2136 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
2137 mark_referenced_resources (insn
, &needed
, true);
2142 for (trial
= next_nonnote_insn (insn
); !stop_search_p (trial
, 1);
2145 next_trial
= next_nonnote_insn (trial
);
2147 /* This must be an INSN or CALL_INSN. */
2148 pat
= PATTERN (trial
);
2150 /* Stand-alone USE and CLOBBER are just for flow. */
2151 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2154 /* If this already has filled delay slots, get the insn needing
2156 if (GET_CODE (pat
) == SEQUENCE
)
2157 trial_delay
= XVECEXP (pat
, 0, 0);
2159 trial_delay
= trial
;
2161 /* Stop our search when seeing a jump. */
2162 if (JUMP_P (trial_delay
))
2165 /* See if we have a resource problem before we try to split. */
2166 if (GET_CODE (pat
) != SEQUENCE
2167 && ! insn_references_resource_p (trial
, &set
, true)
2168 && ! insn_sets_resource_p (trial
, &set
, true)
2169 && ! insn_sets_resource_p (trial
, &needed
, true)
2171 && ! (reg_mentioned_p (cc0_rtx
, pat
) && ! sets_cc0_p (pat
))
2173 && ! (maybe_never
&& may_trap_or_fault_p (pat
))
2174 && (trial
= try_split (pat
, trial
, 0))
2175 && eligible_for_delay (insn
, slots_filled
, trial
, flags
)
2176 && ! can_throw_internal (trial
))
2178 next_trial
= next_nonnote_insn (trial
);
2179 delay_list
= add_to_delay_list (trial
, delay_list
);
2181 if (reg_mentioned_p (cc0_rtx
, pat
))
2182 link_cc0_insns (trial
);
2184 delete_related_insns (trial
);
2185 if (slots_to_fill
== ++slots_filled
)
2190 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2191 mark_referenced_resources (trial
, &needed
, true);
2193 /* Ensure we don't put insns between the setting of cc and the
2194 comparison by moving a setting of cc into an earlier delay
2195 slot since these insns could clobber the condition code. */
2198 /* If this is a call, we might not get here. */
2199 if (CALL_P (trial_delay
))
2203 /* If there are slots left to fill and our search was stopped by an
2204 unconditional branch, try the insn at the branch target. We can
2205 redirect the branch if it works.
2207 Don't do this if the insn at the branch target is a branch. */
2208 if (slots_to_fill
!= slots_filled
2210 && jump_to_label_p (trial
)
2211 && simplejump_p (trial
)
2212 && (next_trial
= next_active_insn (JUMP_LABEL (trial
))) != 0
2213 && ! (NONJUMP_INSN_P (next_trial
)
2214 && GET_CODE (PATTERN (next_trial
)) == SEQUENCE
)
2215 && !JUMP_P (next_trial
)
2216 && ! insn_references_resource_p (next_trial
, &set
, true)
2217 && ! insn_sets_resource_p (next_trial
, &set
, true)
2218 && ! insn_sets_resource_p (next_trial
, &needed
, true)
2220 && ! reg_mentioned_p (cc0_rtx
, PATTERN (next_trial
))
2222 && ! (maybe_never
&& may_trap_or_fault_p (PATTERN (next_trial
)))
2223 && (next_trial
= try_split (PATTERN (next_trial
), next_trial
, 0))
2224 && eligible_for_delay (insn
, slots_filled
, next_trial
, flags
)
2225 && ! can_throw_internal (trial
))
2227 /* See comment in relax_delay_slots about necessity of using
2228 next_real_insn here. */
2229 rtx new_label
= next_real_insn (next_trial
);
2232 new_label
= get_label_before (new_label
, JUMP_LABEL (trial
));
2234 new_label
= find_end_label (simple_return_rtx
);
2239 = add_to_delay_list (copy_delay_slot_insn (next_trial
),
2242 reorg_redirect_jump (trial
, new_label
);
2247 /* If this is an unconditional jump, then try to get insns from the
2248 target of the jump. */
2250 && simplejump_p (insn
)
2251 && slots_filled
!= slots_to_fill
)
2253 = fill_slots_from_thread (insn
, const_true_rtx
,
2254 next_active_insn (JUMP_LABEL (insn
)),
2256 own_thread_p (JUMP_LABEL (insn
),
2257 JUMP_LABEL (insn
), 0),
2258 slots_to_fill
, &slots_filled
,
2262 unfilled_slots_base
[i
]
2263 = emit_delay_sequence (insn
, delay_list
, slots_filled
);
2265 if (slots_to_fill
== slots_filled
)
2266 unfilled_slots_base
[i
] = 0;
2268 note_delay_statistics (slots_filled
, 0);
2272 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2273 return the ultimate label reached by any such chain of jumps.
2274 Return a suitable return rtx if the chain ultimately leads to a
2276 If LABEL is not followed by a jump, return LABEL.
2277 If the chain loops or we can't find end, return LABEL,
2278 since that tells caller to avoid changing the insn.
2279 If the returned label is obtained by following a REG_CROSSING_JUMP
2280 jump, set *CROSSING to true, otherwise set it to false. */
2283 follow_jumps (rtx label
, rtx jump
, bool *crossing
)
2291 if (ANY_RETURN_P (label
))
2295 && (insn
= next_active_insn (value
)) != 0
2297 && JUMP_LABEL (insn
) != NULL_RTX
2298 && ((any_uncondjump_p (insn
) && onlyjump_p (insn
))
2299 || ANY_RETURN_P (PATTERN (insn
)))
2300 && (next
= NEXT_INSN (insn
))
2301 && BARRIER_P (next
));
2304 rtx this_label
= JUMP_LABEL (insn
);
2306 /* If we have found a cycle, make the insn jump to itself. */
2307 if (this_label
== label
)
2310 /* Cannot follow returns and cannot look through tablejumps. */
2311 if (ANY_RETURN_P (this_label
))
2313 if (NEXT_INSN (this_label
)
2314 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label
)))
2317 if (!targetm
.can_follow_jump (jump
, insn
))
2321 = find_reg_note (insn
, REG_CROSSING_JUMP
, NULL_RTX
) != NULL_RTX
;
2329 /* Try to find insns to place in delay slots.
2331 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2332 or is an unconditional branch if CONDITION is const_true_rtx.
2333 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2335 THREAD is a flow-of-control, either the insns to be executed if the
2336 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2338 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2339 to see if any potential delay slot insns set things needed there.
2341 LIKELY is nonzero if it is extremely likely that the branch will be
2342 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2343 end of a loop back up to the top.
2345 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2346 thread. I.e., it is the fallthrough code of our jump or the target of the
2347 jump when we are the only jump going there.
2349 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2350 case, we can only take insns from the head of the thread for our delay
2351 slot. We then adjust the jump to point after the insns we have taken. */
2354 fill_slots_from_thread (rtx insn
, rtx condition
, rtx thread
,
2355 rtx opposite_thread
, int likely
, int thread_if_true
,
2356 int own_thread
, int slots_to_fill
,
2357 int *pslots_filled
, rtx delay_list
)
2360 struct resources opposite_needed
, set
, needed
;
2366 /* Validate our arguments. */
2367 gcc_assert (condition
!= const_true_rtx
|| thread_if_true
);
2368 gcc_assert (own_thread
|| thread_if_true
);
2370 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
2372 /* If our thread is the end of subroutine, we can't get any delay
2374 if (thread
== NULL_RTX
|| ANY_RETURN_P (thread
))
2377 /* If this is an unconditional branch, nothing is needed at the
2378 opposite thread. Otherwise, compute what is needed there. */
2379 if (condition
== const_true_rtx
)
2380 CLEAR_RESOURCE (&opposite_needed
);
2382 mark_target_live_regs (get_insns (), opposite_thread
, &opposite_needed
);
2384 /* If the insn at THREAD can be split, do it here to avoid having to
2385 update THREAD and NEW_THREAD if it is done in the loop below. Also
2386 initialize NEW_THREAD. */
2388 new_thread
= thread
= try_split (PATTERN (thread
), thread
, 0);
2390 /* Scan insns at THREAD. We are looking for an insn that can be removed
2391 from THREAD (it neither sets nor references resources that were set
2392 ahead of it and it doesn't set anything needs by the insns ahead of
2393 it) and that either can be placed in an annulling insn or aren't
2394 needed at OPPOSITE_THREAD. */
2396 CLEAR_RESOURCE (&needed
);
2397 CLEAR_RESOURCE (&set
);
2399 /* If we do not own this thread, we must stop as soon as we find
2400 something that we can't put in a delay slot, since all we can do
2401 is branch into THREAD at a later point. Therefore, labels stop
2402 the search if this is not the `true' thread. */
2404 for (trial
= thread
;
2405 ! stop_search_p (trial
, ! thread_if_true
) && (! lose
|| own_thread
);
2406 trial
= next_nonnote_insn (trial
))
2410 /* If we have passed a label, we no longer own this thread. */
2411 if (LABEL_P (trial
))
2417 pat
= PATTERN (trial
);
2418 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2421 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2422 don't separate or copy insns that set and use CC0. */
2423 if (! insn_references_resource_p (trial
, &set
, true)
2424 && ! insn_sets_resource_p (trial
, &set
, true)
2425 && ! insn_sets_resource_p (trial
, &needed
, true)
2427 && ! (reg_mentioned_p (cc0_rtx
, pat
)
2428 && (! own_thread
|| ! sets_cc0_p (pat
)))
2430 && ! can_throw_internal (trial
))
2434 /* If TRIAL is redundant with some insn before INSN, we don't
2435 actually need to add it to the delay list; we can merely pretend
2437 if ((prior_insn
= redundant_insn (trial
, insn
, delay_list
)))
2439 fix_reg_dead_note (prior_insn
, insn
);
2442 update_block (trial
, thread
);
2443 if (trial
== thread
)
2445 thread
= next_active_insn (thread
);
2446 if (new_thread
== trial
)
2447 new_thread
= thread
;
2450 delete_related_insns (trial
);
2454 update_reg_unused_notes (prior_insn
, trial
);
2455 new_thread
= next_active_insn (trial
);
2461 /* There are two ways we can win: If TRIAL doesn't set anything
2462 needed at the opposite thread and can't trap, or if it can
2463 go into an annulled delay slot. */
2465 && (condition
== const_true_rtx
2466 || (! insn_sets_resource_p (trial
, &opposite_needed
, true)
2467 && ! may_trap_or_fault_p (pat
)
2468 && ! RTX_FRAME_RELATED_P (trial
))))
2471 trial
= try_split (pat
, trial
, 0);
2472 if (new_thread
== old_trial
)
2474 if (thread
== old_trial
)
2476 pat
= PATTERN (trial
);
2477 if (eligible_for_delay (insn
, *pslots_filled
, trial
, flags
))
2481 #ifdef ANNUL_IFTRUE_SLOTS
2484 #ifdef ANNUL_IFFALSE_SLOTS
2490 trial
= try_split (pat
, trial
, 0);
2491 if (new_thread
== old_trial
)
2493 if (thread
== old_trial
)
2495 pat
= PATTERN (trial
);
2496 if ((must_annul
|| delay_list
== NULL
) && (thread_if_true
2497 ? check_annul_list_true_false (0, delay_list
)
2498 && eligible_for_annul_false (insn
, *pslots_filled
, trial
, flags
)
2499 : check_annul_list_true_false (1, delay_list
)
2500 && eligible_for_annul_true (insn
, *pslots_filled
, trial
, flags
)))
2508 if (reg_mentioned_p (cc0_rtx
, pat
))
2509 link_cc0_insns (trial
);
2512 /* If we own this thread, delete the insn. If this is the
2513 destination of a branch, show that a basic block status
2514 may have been updated. In any case, mark the new
2515 starting point of this thread. */
2520 update_block (trial
, thread
);
2521 if (trial
== thread
)
2523 thread
= next_active_insn (thread
);
2524 if (new_thread
== trial
)
2525 new_thread
= thread
;
2528 /* We are moving this insn, not deleting it. We must
2529 temporarily increment the use count on any referenced
2530 label lest it be deleted by delete_related_insns. */
2531 for (note
= REG_NOTES (trial
);
2533 note
= XEXP (note
, 1))
2534 if (REG_NOTE_KIND (note
) == REG_LABEL_OPERAND
2535 || REG_NOTE_KIND (note
) == REG_LABEL_TARGET
)
2537 /* REG_LABEL_OPERAND could be
2538 NOTE_INSN_DELETED_LABEL too. */
2539 if (LABEL_P (XEXP (note
, 0)))
2540 LABEL_NUSES (XEXP (note
, 0))++;
2542 gcc_assert (REG_NOTE_KIND (note
)
2543 == REG_LABEL_OPERAND
);
2545 if (jump_to_label_p (trial
))
2546 LABEL_NUSES (JUMP_LABEL (trial
))++;
2548 delete_related_insns (trial
);
2550 for (note
= REG_NOTES (trial
);
2552 note
= XEXP (note
, 1))
2553 if (REG_NOTE_KIND (note
) == REG_LABEL_OPERAND
2554 || REG_NOTE_KIND (note
) == REG_LABEL_TARGET
)
2556 /* REG_LABEL_OPERAND could be
2557 NOTE_INSN_DELETED_LABEL too. */
2558 if (LABEL_P (XEXP (note
, 0)))
2559 LABEL_NUSES (XEXP (note
, 0))--;
2561 gcc_assert (REG_NOTE_KIND (note
)
2562 == REG_LABEL_OPERAND
);
2564 if (jump_to_label_p (trial
))
2565 LABEL_NUSES (JUMP_LABEL (trial
))--;
2568 new_thread
= next_active_insn (trial
);
2570 temp
= own_thread
? trial
: copy_delay_slot_insn (trial
);
2572 INSN_FROM_TARGET_P (temp
) = 1;
2574 delay_list
= add_to_delay_list (temp
, delay_list
);
2576 if (slots_to_fill
== ++(*pslots_filled
))
2578 /* Even though we have filled all the slots, we
2579 may be branching to a location that has a
2580 redundant insn. Skip any if so. */
2581 while (new_thread
&& ! own_thread
2582 && ! insn_sets_resource_p (new_thread
, &set
, true)
2583 && ! insn_sets_resource_p (new_thread
, &needed
,
2585 && ! insn_references_resource_p (new_thread
,
2588 = redundant_insn (new_thread
, insn
,
2591 /* We know we do not own the thread, so no need
2592 to call update_block and delete_insn. */
2593 fix_reg_dead_note (prior_insn
, insn
);
2594 update_reg_unused_notes (prior_insn
, new_thread
);
2595 new_thread
= next_active_insn (new_thread
);
2605 /* This insn can't go into a delay slot. */
2607 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2608 mark_referenced_resources (trial
, &needed
, true);
2610 /* Ensure we don't put insns between the setting of cc and the comparison
2611 by moving a setting of cc into an earlier delay slot since these insns
2612 could clobber the condition code. */
2615 /* If this insn is a register-register copy and the next insn has
2616 a use of our destination, change it to use our source. That way,
2617 it will become a candidate for our delay slot the next time
2618 through this loop. This case occurs commonly in loops that
2621 We could check for more complex cases than those tested below,
2622 but it doesn't seem worth it. It might also be a good idea to try
2623 to swap the two insns. That might do better.
2625 We can't do this if the next insn modifies our destination, because
2626 that would make the replacement into the insn invalid. We also can't
2627 do this if it modifies our source, because it might be an earlyclobber
2628 operand. This latter test also prevents updating the contents of
2629 a PRE_INC. We also can't do this if there's overlap of source and
2630 destination. Overlap may happen for larger-than-register-size modes. */
2632 if (NONJUMP_INSN_P (trial
) && GET_CODE (pat
) == SET
2633 && REG_P (SET_SRC (pat
))
2634 && REG_P (SET_DEST (pat
))
2635 && !reg_overlap_mentioned_p (SET_DEST (pat
), SET_SRC (pat
)))
2637 rtx next
= next_nonnote_insn (trial
);
2639 if (next
&& NONJUMP_INSN_P (next
)
2640 && GET_CODE (PATTERN (next
)) != USE
2641 && ! reg_set_p (SET_DEST (pat
), next
)
2642 && ! reg_set_p (SET_SRC (pat
), next
)
2643 && reg_referenced_p (SET_DEST (pat
), PATTERN (next
))
2644 && ! modified_in_p (SET_DEST (pat
), next
))
2645 validate_replace_rtx (SET_DEST (pat
), SET_SRC (pat
), next
);
2649 /* If we stopped on a branch insn that has delay slots, see if we can
2650 steal some of the insns in those slots. */
2651 if (trial
&& NONJUMP_INSN_P (trial
)
2652 && GET_CODE (PATTERN (trial
)) == SEQUENCE
2653 && JUMP_P (XVECEXP (PATTERN (trial
), 0, 0)))
2655 /* If this is the `true' thread, we will want to follow the jump,
2656 so we can only do this if we have taken everything up to here. */
2657 if (thread_if_true
&& trial
== new_thread
)
2660 = steal_delay_list_from_target (insn
, condition
, PATTERN (trial
),
2661 delay_list
, &set
, &needed
,
2662 &opposite_needed
, slots_to_fill
,
2663 pslots_filled
, &must_annul
,
2665 /* If we owned the thread and are told that it branched
2666 elsewhere, make sure we own the thread at the new location. */
2667 if (own_thread
&& trial
!= new_thread
)
2668 own_thread
= own_thread_p (new_thread
, new_thread
, 0);
2670 else if (! thread_if_true
)
2672 = steal_delay_list_from_fallthrough (insn
, condition
,
2674 delay_list
, &set
, &needed
,
2675 &opposite_needed
, slots_to_fill
,
2676 pslots_filled
, &must_annul
);
2679 /* If we haven't found anything for this delay slot and it is very
2680 likely that the branch will be taken, see if the insn at our target
2681 increments or decrements a register with an increment that does not
2682 depend on the destination register. If so, try to place the opposite
2683 arithmetic insn after the jump insn and put the arithmetic insn in the
2684 delay slot. If we can't do this, return. */
2685 if (delay_list
== 0 && likely
2686 && new_thread
&& !ANY_RETURN_P (new_thread
)
2687 && NONJUMP_INSN_P (new_thread
)
2688 && !RTX_FRAME_RELATED_P (new_thread
)
2689 && GET_CODE (PATTERN (new_thread
)) != ASM_INPUT
2690 && asm_noperands (PATTERN (new_thread
)) < 0)
2692 rtx pat
= PATTERN (new_thread
);
2697 pat
= PATTERN (trial
);
2699 if (!NONJUMP_INSN_P (trial
)
2700 || GET_CODE (pat
) != SET
2701 || ! eligible_for_delay (insn
, 0, trial
, flags
)
2702 || can_throw_internal (trial
))
2705 dest
= SET_DEST (pat
), src
= SET_SRC (pat
);
2706 if ((GET_CODE (src
) == PLUS
|| GET_CODE (src
) == MINUS
)
2707 && rtx_equal_p (XEXP (src
, 0), dest
)
2708 && (!FLOAT_MODE_P (GET_MODE (src
))
2709 || flag_unsafe_math_optimizations
)
2710 && ! reg_overlap_mentioned_p (dest
, XEXP (src
, 1))
2711 && ! side_effects_p (pat
))
2713 rtx other
= XEXP (src
, 1);
2717 /* If this is a constant adjustment, use the same code with
2718 the negated constant. Otherwise, reverse the sense of the
2720 if (CONST_INT_P (other
))
2721 new_arith
= gen_rtx_fmt_ee (GET_CODE (src
), GET_MODE (src
), dest
,
2722 negate_rtx (GET_MODE (src
), other
));
2724 new_arith
= gen_rtx_fmt_ee (GET_CODE (src
) == PLUS
? MINUS
: PLUS
,
2725 GET_MODE (src
), dest
, other
);
2727 ninsn
= emit_insn_after (gen_rtx_SET (VOIDmode
, dest
, new_arith
),
2730 if (recog_memoized (ninsn
) < 0
2731 || (extract_insn (ninsn
), ! constrain_operands (1)))
2733 delete_related_insns (ninsn
);
2739 update_block (trial
, thread
);
2740 if (trial
== thread
)
2742 thread
= next_active_insn (thread
);
2743 if (new_thread
== trial
)
2744 new_thread
= thread
;
2746 delete_related_insns (trial
);
2749 new_thread
= next_active_insn (trial
);
2751 ninsn
= own_thread
? trial
: copy_delay_slot_insn (trial
);
2753 INSN_FROM_TARGET_P (ninsn
) = 1;
2755 delay_list
= add_to_delay_list (ninsn
, NULL_RTX
);
2760 if (delay_list
&& must_annul
)
2761 INSN_ANNULLED_BRANCH_P (insn
) = 1;
2763 /* If we are to branch into the middle of this thread, find an appropriate
2764 label or make a new one if none, and redirect INSN to it. If we hit the
2765 end of the function, use the end-of-function label. */
2766 if (new_thread
!= thread
)
2769 bool crossing
= false;
2771 gcc_assert (thread_if_true
);
2773 if (new_thread
&& simplejump_or_return_p (new_thread
)
2774 && redirect_with_delay_list_safe_p (insn
,
2775 JUMP_LABEL (new_thread
),
2777 new_thread
= follow_jumps (JUMP_LABEL (new_thread
), insn
, &crossing
);
2779 if (ANY_RETURN_P (new_thread
))
2780 label
= find_end_label (new_thread
);
2781 else if (LABEL_P (new_thread
))
2784 label
= get_label_before (new_thread
, JUMP_LABEL (insn
));
2788 reorg_redirect_jump (insn
, label
);
2790 set_unique_reg_note (insn
, REG_CROSSING_JUMP
, NULL_RTX
);
2797 /* Make another attempt to find insns to place in delay slots.
2799 We previously looked for insns located in front of the delay insn
2800 and, for non-jump delay insns, located behind the delay insn.
2802 Here only try to schedule jump insns and try to move insns from either
2803 the target or the following insns into the delay slot. If annulling is
2804 supported, we will be likely to do this. Otherwise, we can do this only
2808 fill_eager_delay_slots (void)
2812 int num_unfilled_slots
= unfilled_slots_next
- unfilled_slots_base
;
2814 for (i
= 0; i
< num_unfilled_slots
; i
++)
2817 rtx target_label
, insn_at_target
, fallthrough_insn
;
2820 int own_fallthrough
;
2821 int prediction
, slots_to_fill
, slots_filled
;
2823 insn
= unfilled_slots_base
[i
];
2825 || INSN_DELETED_P (insn
)
2827 || ! (condjump_p (insn
) || condjump_in_parallel_p (insn
)))
2830 slots_to_fill
= num_delay_slots (insn
);
2831 /* Some machine description have defined instructions to have
2832 delay slots only in certain circumstances which may depend on
2833 nearby insns (which change due to reorg's actions).
2835 For example, the PA port normally has delay slots for unconditional
2838 However, the PA port claims such jumps do not have a delay slot
2839 if they are immediate successors of certain CALL_INSNs. This
2840 allows the port to favor filling the delay slot of the call with
2841 the unconditional jump. */
2842 if (slots_to_fill
== 0)
2846 target_label
= JUMP_LABEL (insn
);
2847 condition
= get_branch_condition (insn
, target_label
);
2852 /* Get the next active fallthrough and target insns and see if we own
2853 them. Then see whether the branch is likely true. We don't need
2854 to do a lot of this for unconditional branches. */
2856 insn_at_target
= first_active_target_insn (target_label
);
2857 own_target
= own_thread_p (target_label
, target_label
, 0);
2859 if (condition
== const_true_rtx
)
2861 own_fallthrough
= 0;
2862 fallthrough_insn
= 0;
2867 fallthrough_insn
= next_active_insn (insn
);
2868 own_fallthrough
= own_thread_p (NEXT_INSN (insn
), NULL_RTX
, 1);
2869 prediction
= mostly_true_jump (insn
);
2872 /* If this insn is expected to branch, first try to get insns from our
2873 target, then our fallthrough insns. If it is not expected to branch,
2874 try the other order. */
2879 = fill_slots_from_thread (insn
, condition
, insn_at_target
,
2880 fallthrough_insn
, prediction
== 2, 1,
2882 slots_to_fill
, &slots_filled
, delay_list
);
2884 if (delay_list
== 0 && own_fallthrough
)
2886 /* Even though we didn't find anything for delay slots,
2887 we might have found a redundant insn which we deleted
2888 from the thread that was filled. So we have to recompute
2889 the next insn at the target. */
2890 target_label
= JUMP_LABEL (insn
);
2891 insn_at_target
= first_active_target_insn (target_label
);
2894 = fill_slots_from_thread (insn
, condition
, fallthrough_insn
,
2895 insn_at_target
, 0, 0,
2897 slots_to_fill
, &slots_filled
,
2903 if (own_fallthrough
)
2905 = fill_slots_from_thread (insn
, condition
, fallthrough_insn
,
2906 insn_at_target
, 0, 0,
2908 slots_to_fill
, &slots_filled
,
2911 if (delay_list
== 0)
2913 = fill_slots_from_thread (insn
, condition
, insn_at_target
,
2914 next_active_insn (insn
), 0, 1,
2916 slots_to_fill
, &slots_filled
,
2921 unfilled_slots_base
[i
]
2922 = emit_delay_sequence (insn
, delay_list
, slots_filled
);
2924 if (slots_to_fill
== slots_filled
)
2925 unfilled_slots_base
[i
] = 0;
2927 note_delay_statistics (slots_filled
, 1);
2931 static void delete_computation (rtx insn
);
2933 /* Recursively delete prior insns that compute the value (used only by INSN
2934 which the caller is deleting) stored in the register mentioned by NOTE
2935 which is a REG_DEAD note associated with INSN. */
2938 delete_prior_computation (rtx note
, rtx insn
)
2941 rtx reg
= XEXP (note
, 0);
2943 for (our_prev
= prev_nonnote_insn (insn
);
2944 our_prev
&& (NONJUMP_INSN_P (our_prev
)
2945 || CALL_P (our_prev
));
2946 our_prev
= prev_nonnote_insn (our_prev
))
2948 rtx pat
= PATTERN (our_prev
);
2950 /* If we reach a CALL which is not calling a const function
2951 or the callee pops the arguments, then give up. */
2952 if (CALL_P (our_prev
)
2953 && (! RTL_CONST_CALL_P (our_prev
)
2954 || GET_CODE (pat
) != SET
|| GET_CODE (SET_SRC (pat
)) != CALL
))
2957 /* If we reach a SEQUENCE, it is too complex to try to
2958 do anything with it, so give up. We can be run during
2959 and after reorg, so SEQUENCE rtl can legitimately show
2961 if (GET_CODE (pat
) == SEQUENCE
)
2964 if (GET_CODE (pat
) == USE
2965 && NONJUMP_INSN_P (XEXP (pat
, 0)))
2966 /* reorg creates USEs that look like this. We leave them
2967 alone because reorg needs them for its own purposes. */
2970 if (reg_set_p (reg
, pat
))
2972 if (side_effects_p (pat
) && !CALL_P (our_prev
))
2975 if (GET_CODE (pat
) == PARALLEL
)
2977 /* If we find a SET of something else, we can't
2982 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
2984 rtx part
= XVECEXP (pat
, 0, i
);
2986 if (GET_CODE (part
) == SET
2987 && SET_DEST (part
) != reg
)
2991 if (i
== XVECLEN (pat
, 0))
2992 delete_computation (our_prev
);
2994 else if (GET_CODE (pat
) == SET
2995 && REG_P (SET_DEST (pat
)))
2997 int dest_regno
= REGNO (SET_DEST (pat
));
2998 int dest_endregno
= END_REGNO (SET_DEST (pat
));
2999 int regno
= REGNO (reg
);
3000 int endregno
= END_REGNO (reg
);
3002 if (dest_regno
>= regno
3003 && dest_endregno
<= endregno
)
3004 delete_computation (our_prev
);
3006 /* We may have a multi-word hard register and some, but not
3007 all, of the words of the register are needed in subsequent
3008 insns. Write REG_UNUSED notes for those parts that were not
3010 else if (dest_regno
<= regno
3011 && dest_endregno
>= endregno
)
3015 add_reg_note (our_prev
, REG_UNUSED
, reg
);
3017 for (i
= dest_regno
; i
< dest_endregno
; i
++)
3018 if (! find_regno_note (our_prev
, REG_UNUSED
, i
))
3021 if (i
== dest_endregno
)
3022 delete_computation (our_prev
);
3029 /* If PAT references the register that dies here, it is an
3030 additional use. Hence any prior SET isn't dead. However, this
3031 insn becomes the new place for the REG_DEAD note. */
3032 if (reg_overlap_mentioned_p (reg
, pat
))
3034 XEXP (note
, 1) = REG_NOTES (our_prev
);
3035 REG_NOTES (our_prev
) = note
;
3041 /* Delete INSN and recursively delete insns that compute values used only
3042 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3044 Look at all our REG_DEAD notes. If a previous insn does nothing other
3045 than set a register that dies in this insn, we can delete that insn
3048 On machines with CC0, if CC0 is used in this insn, we may be able to
3049 delete the insn that set it. */
3052 delete_computation (rtx insn
)
3057 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
3059 rtx prev
= prev_nonnote_insn (insn
);
3060 /* We assume that at this stage
3061 CC's are always set explicitly
3062 and always immediately before the jump that
3063 will use them. So if the previous insn
3064 exists to set the CC's, delete it
3065 (unless it performs auto-increments, etc.). */
3066 if (prev
&& NONJUMP_INSN_P (prev
)
3067 && sets_cc0_p (PATTERN (prev
)))
3069 if (sets_cc0_p (PATTERN (prev
)) > 0
3070 && ! side_effects_p (PATTERN (prev
)))
3071 delete_computation (prev
);
3073 /* Otherwise, show that cc0 won't be used. */
3074 add_reg_note (prev
, REG_UNUSED
, cc0_rtx
);
3079 for (note
= REG_NOTES (insn
); note
; note
= next
)
3081 next
= XEXP (note
, 1);
3083 if (REG_NOTE_KIND (note
) != REG_DEAD
3084 /* Verify that the REG_NOTE is legitimate. */
3085 || !REG_P (XEXP (note
, 0)))
3088 delete_prior_computation (note
, insn
);
3091 delete_related_insns (insn
);
3094 /* If all INSN does is set the pc, delete it,
3095 and delete the insn that set the condition codes for it
3096 if that's what the previous thing was. */
3099 delete_jump (rtx insn
)
3101 rtx set
= single_set (insn
);
3103 if (set
&& GET_CODE (SET_DEST (set
)) == PC
)
3104 delete_computation (insn
);
3108 label_before_next_insn (rtx x
, rtx scan_limit
)
3110 rtx insn
= next_active_insn (x
);
3113 insn
= PREV_INSN (insn
);
3114 if (insn
== scan_limit
|| insn
== NULL_RTX
)
3123 /* Once we have tried two ways to fill a delay slot, make a pass over the
3124 code to try to improve the results and to do such things as more jump
3128 relax_delay_slots (rtx first
)
3130 rtx insn
, next
, pat
;
3131 rtx trial
, delay_insn
, target_label
;
3133 /* Look at every JUMP_INSN and see if we can improve it. */
3134 for (insn
= first
; insn
; insn
= next
)
3139 next
= next_active_insn (insn
);
3141 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3142 the next insn, or jumps to a label that is not the last of a
3143 group of consecutive labels. */
3145 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
3146 && !ANY_RETURN_P (target_label
= JUMP_LABEL (insn
)))
3149 = skip_consecutive_labels (follow_jumps (target_label
, insn
,
3151 if (ANY_RETURN_P (target_label
))
3152 target_label
= find_end_label (target_label
);
3154 if (target_label
&& next_active_insn (target_label
) == next
3155 && ! condjump_in_parallel_p (insn
))
3161 if (target_label
&& target_label
!= JUMP_LABEL (insn
))
3163 reorg_redirect_jump (insn
, target_label
);
3165 set_unique_reg_note (insn
, REG_CROSSING_JUMP
, NULL_RTX
);
3168 /* See if this jump conditionally branches around an unconditional
3169 jump. If so, invert this jump and point it to the target of the
3171 if (next
&& simplejump_or_return_p (next
)
3172 && any_condjump_p (insn
)
3174 && next_active_insn (target_label
) == next_active_insn (next
)
3175 && no_labels_between_p (insn
, next
))
3177 rtx label
= JUMP_LABEL (next
);
3179 /* Be careful how we do this to avoid deleting code or
3180 labels that are momentarily dead. See similar optimization
3183 We also need to ensure we properly handle the case when
3184 invert_jump fails. */
3186 ++LABEL_NUSES (target_label
);
3187 if (!ANY_RETURN_P (label
))
3188 ++LABEL_NUSES (label
);
3190 if (invert_jump (insn
, label
, 1))
3192 delete_related_insns (next
);
3196 if (!ANY_RETURN_P (label
))
3197 --LABEL_NUSES (label
);
3199 if (--LABEL_NUSES (target_label
) == 0)
3200 delete_related_insns (target_label
);
3206 /* If this is an unconditional jump and the previous insn is a
3207 conditional jump, try reversing the condition of the previous
3208 insn and swapping our targets. The next pass might be able to
3211 Don't do this if we expect the conditional branch to be true, because
3212 we would then be making the more common case longer. */
3214 if (simplejump_or_return_p (insn
)
3215 && (other
= prev_active_insn (insn
)) != 0
3216 && any_condjump_p (other
)
3217 && no_labels_between_p (other
, insn
)
3218 && 0 > mostly_true_jump (other
))
3220 rtx other_target
= JUMP_LABEL (other
);
3221 target_label
= JUMP_LABEL (insn
);
3223 if (invert_jump (other
, target_label
, 0))
3224 reorg_redirect_jump (insn
, other_target
);
3227 /* Now look only at cases where we have a filled delay slot. */
3228 if (!NONJUMP_INSN_P (insn
) || GET_CODE (PATTERN (insn
)) != SEQUENCE
)
3231 pat
= PATTERN (insn
);
3232 delay_insn
= XVECEXP (pat
, 0, 0);
3234 /* See if the first insn in the delay slot is redundant with some
3235 previous insn. Remove it from the delay slot if so; then set up
3236 to reprocess this insn. */
3237 if (redundant_insn (XVECEXP (pat
, 0, 1), delay_insn
, 0))
3239 delete_from_delay_slot (XVECEXP (pat
, 0, 1));
3240 next
= prev_active_insn (next
);
3244 /* See if we have a RETURN insn with a filled delay slot followed
3245 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3246 the first RETURN (but not its delay insn). This gives the same
3247 effect in fewer instructions.
3249 Only do so if optimizing for size since this results in slower, but
3251 if (optimize_function_for_size_p (cfun
)
3252 && ANY_RETURN_P (PATTERN (delay_insn
))
3255 && PATTERN (next
) == PATTERN (delay_insn
))
3260 /* Delete the RETURN and just execute the delay list insns.
3262 We do this by deleting the INSN containing the SEQUENCE, then
3263 re-emitting the insns separately, and then deleting the RETURN.
3264 This allows the count of the jump target to be properly
3267 Note that we need to change the INSN_UID of the re-emitted insns
3268 since it is used to hash the insns for mark_target_live_regs and
3269 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3271 Clear the from target bit, since these insns are no longer
3273 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
3274 INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)) = 0;
3276 trial
= PREV_INSN (insn
);
3277 delete_related_insns (insn
);
3278 gcc_assert (GET_CODE (pat
) == SEQUENCE
);
3279 add_insn_after (delay_insn
, trial
, NULL
);
3281 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3282 after
= emit_copy_of_insn_after (XVECEXP (pat
, 0, i
), after
);
3283 delete_scheduled_jump (delay_insn
);
3287 /* Now look only at the cases where we have a filled JUMP_INSN. */
3288 if (!JUMP_P (delay_insn
)
3289 || !(condjump_p (delay_insn
) || condjump_in_parallel_p (delay_insn
)))
3292 target_label
= JUMP_LABEL (delay_insn
);
3293 if (target_label
&& ANY_RETURN_P (target_label
))
3296 /* If this jump goes to another unconditional jump, thread it, but
3297 don't convert a jump into a RETURN here. */
3298 trial
= skip_consecutive_labels (follow_jumps (target_label
, delay_insn
,
3300 if (ANY_RETURN_P (trial
))
3301 trial
= find_end_label (trial
);
3303 if (trial
&& trial
!= target_label
3304 && redirect_with_delay_slots_safe_p (delay_insn
, trial
, insn
))
3306 reorg_redirect_jump (delay_insn
, trial
);
3307 target_label
= trial
;
3309 set_unique_reg_note (insn
, REG_CROSSING_JUMP
, NULL_RTX
);
3312 /* If the first insn at TARGET_LABEL is redundant with a previous
3313 insn, redirect the jump to the following insn and process again.
3314 We use next_real_insn instead of next_active_insn so we
3315 don't skip USE-markers, or we'll end up with incorrect
3317 trial
= next_real_insn (target_label
);
3318 if (trial
&& GET_CODE (PATTERN (trial
)) != SEQUENCE
3319 && redundant_insn (trial
, insn
, 0)
3320 && ! can_throw_internal (trial
))
3322 /* Figure out where to emit the special USE insn so we don't
3323 later incorrectly compute register live/death info. */
3324 rtx tmp
= next_active_insn (trial
);
3326 tmp
= find_end_label (simple_return_rtx
);
3330 /* Insert the special USE insn and update dataflow info. */
3331 update_block (trial
, tmp
);
3333 /* Now emit a label before the special USE insn, and
3334 redirect our jump to the new label. */
3335 target_label
= get_label_before (PREV_INSN (tmp
), target_label
);
3336 reorg_redirect_jump (delay_insn
, target_label
);
3342 /* Similarly, if it is an unconditional jump with one insn in its
3343 delay list and that insn is redundant, thread the jump. */
3344 if (trial
&& GET_CODE (PATTERN (trial
)) == SEQUENCE
3345 && XVECLEN (PATTERN (trial
), 0) == 2
3346 && JUMP_P (XVECEXP (PATTERN (trial
), 0, 0))
3347 && simplejump_or_return_p (XVECEXP (PATTERN (trial
), 0, 0))
3348 && redundant_insn (XVECEXP (PATTERN (trial
), 0, 1), insn
, 0))
3350 target_label
= JUMP_LABEL (XVECEXP (PATTERN (trial
), 0, 0));
3351 if (ANY_RETURN_P (target_label
))
3352 target_label
= find_end_label (target_label
);
3355 && redirect_with_delay_slots_safe_p (delay_insn
, target_label
,
3358 reorg_redirect_jump (delay_insn
, target_label
);
3364 /* See if we have a simple (conditional) jump that is useless. */
3365 if (! INSN_ANNULLED_BRANCH_P (delay_insn
)
3366 && ! condjump_in_parallel_p (delay_insn
)
3367 && prev_active_insn (target_label
) == insn
3368 && ! BARRIER_P (prev_nonnote_insn (target_label
))
3370 /* If the last insn in the delay slot sets CC0 for some insn,
3371 various code assumes that it is in a delay slot. We could
3372 put it back where it belonged and delete the register notes,
3373 but it doesn't seem worthwhile in this uncommon case. */
3374 && ! find_reg_note (XVECEXP (pat
, 0, XVECLEN (pat
, 0) - 1),
3375 REG_CC_USER
, NULL_RTX
)
3382 /* All this insn does is execute its delay list and jump to the
3383 following insn. So delete the jump and just execute the delay
3386 We do this by deleting the INSN containing the SEQUENCE, then
3387 re-emitting the insns separately, and then deleting the jump.
3388 This allows the count of the jump target to be properly
3391 Note that we need to change the INSN_UID of the re-emitted insns
3392 since it is used to hash the insns for mark_target_live_regs and
3393 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3395 Clear the from target bit, since these insns are no longer
3397 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
3398 INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)) = 0;
3400 trial
= PREV_INSN (insn
);
3401 delete_related_insns (insn
);
3402 gcc_assert (GET_CODE (pat
) == SEQUENCE
);
3403 add_insn_after (delay_insn
, trial
, NULL
);
3405 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3406 after
= emit_copy_of_insn_after (XVECEXP (pat
, 0, i
), after
);
3407 delete_scheduled_jump (delay_insn
);
3411 /* See if this is an unconditional jump around a single insn which is
3412 identical to the one in its delay slot. In this case, we can just
3413 delete the branch and the insn in its delay slot. */
3414 if (next
&& NONJUMP_INSN_P (next
)
3415 && label_before_next_insn (next
, insn
) == target_label
3416 && simplejump_p (insn
)
3417 && XVECLEN (pat
, 0) == 2
3418 && rtx_equal_p (PATTERN (next
), PATTERN (XVECEXP (pat
, 0, 1))))
3420 delete_related_insns (insn
);
3424 /* See if this jump (with its delay slots) conditionally branches
3425 around an unconditional jump (without delay slots). If so, invert
3426 this jump and point it to the target of the second jump. We cannot
3427 do this for annulled jumps, though. Again, don't convert a jump to
3429 if (! INSN_ANNULLED_BRANCH_P (delay_insn
)
3430 && any_condjump_p (delay_insn
)
3431 && next
&& simplejump_or_return_p (next
)
3432 && next_active_insn (target_label
) == next_active_insn (next
)
3433 && no_labels_between_p (insn
, next
))
3435 rtx label
= JUMP_LABEL (next
);
3436 rtx old_label
= JUMP_LABEL (delay_insn
);
3438 if (ANY_RETURN_P (label
))
3439 label
= find_end_label (label
);
3441 /* find_end_label can generate a new label. Check this first. */
3443 && no_labels_between_p (insn
, next
)
3444 && redirect_with_delay_slots_safe_p (delay_insn
, label
, insn
))
3446 /* Be careful how we do this to avoid deleting code or labels
3447 that are momentarily dead. See similar optimization in
3450 ++LABEL_NUSES (old_label
);
3452 if (invert_jump (delay_insn
, label
, 1))
3456 /* Must update the INSN_FROM_TARGET_P bits now that
3457 the branch is reversed, so that mark_target_live_regs
3458 will handle the delay slot insn correctly. */
3459 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
3461 rtx slot
= XVECEXP (PATTERN (insn
), 0, i
);
3462 INSN_FROM_TARGET_P (slot
) = ! INSN_FROM_TARGET_P (slot
);
3465 delete_related_insns (next
);
3469 if (old_label
&& --LABEL_NUSES (old_label
) == 0)
3470 delete_related_insns (old_label
);
3475 /* If we own the thread opposite the way this insn branches, see if we
3476 can merge its delay slots with following insns. */
3477 if (INSN_FROM_TARGET_P (XVECEXP (pat
, 0, 1))
3478 && own_thread_p (NEXT_INSN (insn
), 0, 1))
3479 try_merge_delay_insns (insn
, next
);
3480 else if (! INSN_FROM_TARGET_P (XVECEXP (pat
, 0, 1))
3481 && own_thread_p (target_label
, target_label
, 0))
3482 try_merge_delay_insns (insn
, next_active_insn (target_label
));
3484 /* If we get here, we haven't deleted INSN. But we may have deleted
3485 NEXT, so recompute it. */
3486 next
= next_active_insn (insn
);
3491 /* Look for filled jumps to the end of function label. We can try to convert
3492 them into RETURN insns if the insns in the delay slot are valid for the
3496 make_return_insns (rtx first
)
3498 rtx insn
, jump_insn
, pat
;
3499 rtx real_return_label
= function_return_label
;
3500 rtx real_simple_return_label
= function_simple_return_label
;
3503 /* See if there is a RETURN insn in the function other than the one we
3504 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3505 into a RETURN to jump to it. */
3506 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3507 if (JUMP_P (insn
) && ANY_RETURN_P (PATTERN (insn
)))
3509 rtx t
= get_label_before (insn
, NULL_RTX
);
3510 if (PATTERN (insn
) == ret_rtx
)
3511 real_return_label
= t
;
3513 real_simple_return_label
= t
;
3517 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3518 was equal to END_OF_FUNCTION_LABEL. */
3519 if (real_return_label
)
3520 LABEL_NUSES (real_return_label
)++;
3521 if (real_simple_return_label
)
3522 LABEL_NUSES (real_simple_return_label
)++;
3524 /* Clear the list of insns to fill so we can use it. */
3525 obstack_free (&unfilled_slots_obstack
, unfilled_firstobj
);
3527 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3530 rtx kind
, real_label
;
3532 /* Only look at filled JUMP_INSNs that go to the end of function
3534 if (!NONJUMP_INSN_P (insn
)
3535 || GET_CODE (PATTERN (insn
)) != SEQUENCE
3536 || !jump_to_label_p (XVECEXP (PATTERN (insn
), 0, 0)))
3539 if (JUMP_LABEL (XVECEXP (PATTERN (insn
), 0, 0)) == function_return_label
)
3542 real_label
= real_return_label
;
3544 else if (JUMP_LABEL (XVECEXP (PATTERN (insn
), 0, 0))
3545 == function_simple_return_label
)
3547 kind
= simple_return_rtx
;
3548 real_label
= real_simple_return_label
;
3553 pat
= PATTERN (insn
);
3554 jump_insn
= XVECEXP (pat
, 0, 0);
3556 /* If we can't make the jump into a RETURN, try to redirect it to the best
3557 RETURN and go on to the next insn. */
3558 if (!reorg_redirect_jump (jump_insn
, kind
))
3560 /* Make sure redirecting the jump will not invalidate the delay
3562 if (redirect_with_delay_slots_safe_p (jump_insn
, real_label
, insn
))
3563 reorg_redirect_jump (jump_insn
, real_label
);
3567 /* See if this RETURN can accept the insns current in its delay slot.
3568 It can if it has more or an equal number of slots and the contents
3569 of each is valid. */
3571 flags
= get_jump_flags (jump_insn
, JUMP_LABEL (jump_insn
));
3572 slots
= num_delay_slots (jump_insn
);
3573 if (slots
>= XVECLEN (pat
, 0) - 1)
3575 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3577 #ifdef ANNUL_IFFALSE_SLOTS
3578 (INSN_ANNULLED_BRANCH_P (jump_insn
)
3579 && INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
3580 ? eligible_for_annul_false (jump_insn
, i
- 1,
3581 XVECEXP (pat
, 0, i
), flags
) :
3583 #ifdef ANNUL_IFTRUE_SLOTS
3584 (INSN_ANNULLED_BRANCH_P (jump_insn
)
3585 && ! INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
3586 ? eligible_for_annul_true (jump_insn
, i
- 1,
3587 XVECEXP (pat
, 0, i
), flags
) :
3589 eligible_for_delay (jump_insn
, i
- 1,
3590 XVECEXP (pat
, 0, i
), flags
)))
3596 if (i
== XVECLEN (pat
, 0))
3599 /* We have to do something with this insn. If it is an unconditional
3600 RETURN, delete the SEQUENCE and output the individual insns,
3601 followed by the RETURN. Then set things up so we try to find
3602 insns for its delay slots, if it needs some. */
3603 if (ANY_RETURN_P (PATTERN (jump_insn
)))
3605 rtx prev
= PREV_INSN (insn
);
3607 delete_related_insns (insn
);
3608 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3609 prev
= emit_insn_after (PATTERN (XVECEXP (pat
, 0, i
)), prev
);
3611 insn
= emit_jump_insn_after (PATTERN (jump_insn
), prev
);
3612 emit_barrier_after (insn
);
3615 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
3618 /* It is probably more efficient to keep this with its current
3619 delay slot as a branch to a RETURN. */
3620 reorg_redirect_jump (jump_insn
, real_label
);
3623 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3624 new delay slots we have created. */
3625 if (real_return_label
!= NULL_RTX
&& --LABEL_NUSES (real_return_label
) == 0)
3626 delete_related_insns (real_return_label
);
3627 if (real_simple_return_label
!= NULL_RTX
3628 && --LABEL_NUSES (real_simple_return_label
) == 0)
3629 delete_related_insns (real_simple_return_label
);
3631 fill_simple_delay_slots (1);
3632 fill_simple_delay_slots (0);
3635 /* Try to find insns to place in delay slots. */
3638 dbr_schedule (rtx first
)
3640 rtx insn
, next
, epilogue_insn
= 0;
3642 bool need_return_insns
;
3644 /* If the current function has no insns other than the prologue and
3645 epilogue, then do not try to fill any delay slots. */
3646 if (n_basic_blocks_for_fn (cfun
) == NUM_FIXED_BLOCKS
)
3649 /* Find the highest INSN_UID and allocate and initialize our map from
3650 INSN_UID's to position in code. */
3651 for (max_uid
= 0, insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3653 if (INSN_UID (insn
) > max_uid
)
3654 max_uid
= INSN_UID (insn
);
3656 && NOTE_KIND (insn
) == NOTE_INSN_EPILOGUE_BEG
)
3657 epilogue_insn
= insn
;
3660 uid_to_ruid
= XNEWVEC (int, max_uid
+ 1);
3661 for (i
= 0, insn
= first
; insn
; i
++, insn
= NEXT_INSN (insn
))
3662 uid_to_ruid
[INSN_UID (insn
)] = i
;
3664 /* Initialize the list of insns that need filling. */
3665 if (unfilled_firstobj
== 0)
3667 gcc_obstack_init (&unfilled_slots_obstack
);
3668 unfilled_firstobj
= XOBNEWVAR (&unfilled_slots_obstack
, rtx
, 0);
3671 for (insn
= next_active_insn (first
); insn
; insn
= next_active_insn (insn
))
3675 /* Skip vector tables. We can't get attributes for them. */
3676 if (JUMP_TABLE_DATA_P (insn
))
3680 INSN_ANNULLED_BRANCH_P (insn
) = 0;
3681 INSN_FROM_TARGET_P (insn
) = 0;
3683 if (num_delay_slots (insn
) > 0)
3684 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
3686 /* Ensure all jumps go to the last of a set of consecutive labels. */
3688 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
3689 && !ANY_RETURN_P (JUMP_LABEL (insn
))
3690 && ((target
= skip_consecutive_labels (JUMP_LABEL (insn
)))
3691 != JUMP_LABEL (insn
)))
3692 redirect_jump (insn
, target
, 1);
3695 init_resource_info (epilogue_insn
);
3697 /* Show we haven't computed an end-of-function label yet. */
3698 function_return_label
= function_simple_return_label
= NULL_RTX
;
3700 /* Initialize the statistics for this function. */
3701 memset (num_insns_needing_delays
, 0, sizeof num_insns_needing_delays
);
3702 memset (num_filled_delays
, 0, sizeof num_filled_delays
);
3704 /* Now do the delay slot filling. Try everything twice in case earlier
3705 changes make more slots fillable. */
3707 for (reorg_pass_number
= 0;
3708 reorg_pass_number
< MAX_REORG_PASSES
;
3709 reorg_pass_number
++)
3711 fill_simple_delay_slots (1);
3712 fill_simple_delay_slots (0);
3713 fill_eager_delay_slots ();
3714 relax_delay_slots (first
);
3717 /* If we made an end of function label, indicate that it is now
3718 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3719 If it is now unused, delete it. */
3720 if (function_return_label
&& --LABEL_NUSES (function_return_label
) == 0)
3721 delete_related_insns (function_return_label
);
3722 if (function_simple_return_label
3723 && --LABEL_NUSES (function_simple_return_label
) == 0)
3724 delete_related_insns (function_simple_return_label
);
3726 need_return_insns
= false;
3728 need_return_insns
|= HAVE_return
&& function_return_label
!= 0;
3730 #ifdef HAVE_simple_return
3731 need_return_insns
|= HAVE_simple_return
&& function_simple_return_label
!= 0;
3733 if (need_return_insns
)
3734 make_return_insns (first
);
3736 /* Delete any USE insns made by update_block; subsequent passes don't need
3737 them or know how to deal with them. */
3738 for (insn
= first
; insn
; insn
= next
)
3740 next
= NEXT_INSN (insn
);
3742 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == USE
3743 && INSN_P (XEXP (PATTERN (insn
), 0)))
3744 next
= delete_related_insns (insn
);
3747 obstack_free (&unfilled_slots_obstack
, unfilled_firstobj
);
3749 /* It is not clear why the line below is needed, but it does seem to be. */
3750 unfilled_firstobj
= XOBNEWVAR (&unfilled_slots_obstack
, rtx
, 0);
3754 int i
, j
, need_comma
;
3755 int total_delay_slots
[MAX_DELAY_HISTOGRAM
+ 1];
3756 int total_annul_slots
[MAX_DELAY_HISTOGRAM
+ 1];
3758 for (reorg_pass_number
= 0;
3759 reorg_pass_number
< MAX_REORG_PASSES
;
3760 reorg_pass_number
++)
3762 fprintf (dump_file
, ";; Reorg pass #%d:\n", reorg_pass_number
+ 1);
3763 for (i
= 0; i
< NUM_REORG_FUNCTIONS
; i
++)
3766 fprintf (dump_file
, ";; Reorg function #%d\n", i
);
3768 fprintf (dump_file
, ";; %d insns needing delay slots\n;; ",
3769 num_insns_needing_delays
[i
][reorg_pass_number
]);
3771 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3772 if (num_filled_delays
[i
][j
][reorg_pass_number
])
3775 fprintf (dump_file
, ", ");
3777 fprintf (dump_file
, "%d got %d delays",
3778 num_filled_delays
[i
][j
][reorg_pass_number
], j
);
3780 fprintf (dump_file
, "\n");
3783 memset (total_delay_slots
, 0, sizeof total_delay_slots
);
3784 memset (total_annul_slots
, 0, sizeof total_annul_slots
);
3785 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3787 if (! INSN_DELETED_P (insn
)
3788 && NONJUMP_INSN_P (insn
)
3789 && GET_CODE (PATTERN (insn
)) != USE
3790 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
3792 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3795 j
= XVECLEN (PATTERN (insn
), 0) - 1;
3796 if (j
> MAX_DELAY_HISTOGRAM
)
3797 j
= MAX_DELAY_HISTOGRAM
;
3798 control
= XVECEXP (PATTERN (insn
), 0, 0);
3799 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
3800 total_annul_slots
[j
]++;
3802 total_delay_slots
[j
]++;
3804 else if (num_delay_slots (insn
) > 0)
3805 total_delay_slots
[0]++;
3808 fprintf (dump_file
, ";; Reorg totals: ");
3810 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3812 if (total_delay_slots
[j
])
3815 fprintf (dump_file
, ", ");
3817 fprintf (dump_file
, "%d got %d delays", total_delay_slots
[j
], j
);
3820 fprintf (dump_file
, "\n");
3821 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3822 fprintf (dump_file
, ";; Reorg annuls: ");
3824 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3826 if (total_annul_slots
[j
])
3829 fprintf (dump_file
, ", ");
3831 fprintf (dump_file
, "%d got %d delays", total_annul_slots
[j
], j
);
3834 fprintf (dump_file
, "\n");
3836 fprintf (dump_file
, "\n");
3839 if (!sibling_labels
.is_empty ())
3841 update_alignments (sibling_labels
);
3842 sibling_labels
.release ();
3845 free_resource_info ();
3847 crtl
->dbr_scheduled_p
= true;
3849 #endif /* DELAY_SLOTS */
3852 gate_handle_delay_slots (void)
3855 /* At -O0 dataflow info isn't updated after RA. */
3856 return optimize
> 0 && flag_delayed_branch
&& !crtl
->dbr_scheduled_p
;
3862 /* Run delay slot optimization. */
3864 rest_of_handle_delay_slots (void)
3867 dbr_schedule (get_insns ());
3874 const pass_data pass_data_delay_slots
=
3876 RTL_PASS
, /* type */
3878 OPTGROUP_NONE
, /* optinfo_flags */
3879 true, /* has_gate */
3880 true, /* has_execute */
3881 TV_DBR_SCHED
, /* tv_id */
3882 0, /* properties_required */
3883 0, /* properties_provided */
3884 0, /* properties_destroyed */
3885 0, /* todo_flags_start */
3886 0, /* todo_flags_finish */
3889 class pass_delay_slots
: public rtl_opt_pass
3892 pass_delay_slots (gcc::context
*ctxt
)
3893 : rtl_opt_pass (pass_data_delay_slots
, ctxt
)
3896 /* opt_pass methods: */
3897 bool gate () { return gate_handle_delay_slots (); }
3898 unsigned int execute () { return rest_of_handle_delay_slots (); }
3900 }; // class pass_delay_slots
3905 make_pass_delay_slots (gcc::context
*ctxt
)
3907 return new pass_delay_slots (ctxt
);
3910 /* Machine dependent reorg pass. */
3912 gate_handle_machine_reorg (void)
3914 return targetm
.machine_dependent_reorg
!= 0;
3919 rest_of_handle_machine_reorg (void)
3921 targetm
.machine_dependent_reorg ();
3927 const pass_data pass_data_machine_reorg
=
3929 RTL_PASS
, /* type */
3931 OPTGROUP_NONE
, /* optinfo_flags */
3932 true, /* has_gate */
3933 true, /* has_execute */
3934 TV_MACH_DEP
, /* tv_id */
3935 0, /* properties_required */
3936 0, /* properties_provided */
3937 0, /* properties_destroyed */
3938 0, /* todo_flags_start */
3939 0, /* todo_flags_finish */
3942 class pass_machine_reorg
: public rtl_opt_pass
3945 pass_machine_reorg (gcc::context
*ctxt
)
3946 : rtl_opt_pass (pass_data_machine_reorg
, ctxt
)
3949 /* opt_pass methods: */
3950 bool gate () { return gate_handle_machine_reorg (); }
3951 unsigned int execute () { return rest_of_handle_machine_reorg (); }
3953 }; // class pass_machine_reorg
3958 make_pass_machine_reorg (gcc::context
*ctxt
)
3960 return new pass_machine_reorg (ctxt
);