1 2020-06-11 Martin Liska <mliska@suse.cz>
3 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
6 2020-06-11 Martin Liska <mliska@suse.cz>
9 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
12 2020-06-11 Martin Liska <mliska@suse.cz>
13 Jakub Jelinek <jakub@redhat.com>
16 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
17 by using Pmode instead of ptr_mode.
19 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
21 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
22 (vect_set_loop_control): ... this.
23 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
24 (vect_set_loop_masks_directly): Renamed to ...
25 (vect_set_loop_controls_directly): ... this. Also rename some
26 variables with ctrl instead of mask. Rename vect_set_loop_mask to
27 vect_set_loop_control.
28 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
29 Also rename some variables with ctrl instead of mask.
30 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
31 (release_vec_loop_controls): ... this. Rename rgroup_masks related
33 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
34 release_vec_loop_controls.
35 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
36 (vect_get_max_nscalars_per_iter): Likewise.
37 (vect_estimate_min_profitable_iters): Likewise.
38 (vect_record_loop_mask): Likewise.
39 (vect_get_loop_mask): Likewise.
40 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
41 (struct rgroup_controls): ... this. Also rename mask_type
42 to type and rename masks to controls.
44 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
46 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
47 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
48 (vect_gen_vector_loop_niters): Likewise.
49 (vect_do_peeling): Likewise.
50 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
51 fully_masked_p to using_partial_vectors_p.
52 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
53 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
54 (determine_peel_for_niter): Likewise.
55 (vect_estimate_min_profitable_iters): Likewise.
56 (vect_transform_loop): Likewise.
57 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
58 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
60 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
62 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
63 can_fully_mask_p to can_use_partial_vectors_p.
64 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
65 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
66 to saved_can_use_partial_vectors_p.
67 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
68 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
69 (vectorizable_live_operation): Likewise.
70 * tree-vect-stmts.c (permute_vec_elements): Likewise.
71 (check_load_store_masking): Likewise.
72 (vectorizable_operation): Likewise.
73 (vectorizable_store): Likewise.
74 (vectorizable_load): Likewise.
75 (vectorizable_condition): Likewise.
76 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
77 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
78 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
80 2020-06-11 Martin Liska <mliska@suse.cz>
82 * optc-save-gen.awk: Quote error string.
84 2020-06-11 Alexandre Oliva <oliva@adacore.com>
86 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
88 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
90 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
91 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
93 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
94 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
96 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
98 * config/riscv/predicates.md (gpr_save_operation): New.
99 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
100 (riscv_gpr_save_operation_p): Ditto.
101 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
102 Ignore USEs for gpr_save patter.
103 * config/riscv/riscv.c (gpr_save_reg_order): New.
104 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
105 (riscv_gen_gpr_save_insn): New.
106 (riscv_gpr_save_operation_p): Ditto.
107 * config/riscv/riscv.md (S3_REGNUM): New.
116 (gpr_save): Model USEs correctly.
118 2020-06-10 Martin Sebor <msebor@redhat.com>
122 * builtins.c (inform_access): New function.
123 (check_access): Call it. Add argument.
124 (addr_decl_size): Remove.
125 (get_range): New function.
126 (compute_objsize): New overload. Only use compute_builtin_object_size
127 with raw memory function.
128 (check_memop_access): Pass new argument to compute_objsize and
130 (expand_builtin_memchr, expand_builtin_strcat): Same.
131 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
132 (expand_builtin_stpncpy, check_strncat_sizes): Same.
133 (expand_builtin_strncat, expand_builtin_strncpy): Same.
134 (expand_builtin_memcmp): Same.
135 * builtins.h (check_nul_terminated_array): Declare extern.
136 (check_access): Add argument.
137 (struct access_ref, struct access_data): New structs.
138 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
139 (builtin_access::overlap): Call it.
140 * tree-object-size.c (decl_init_size): Declare extern.
141 (addr_object_size): Correct offset computation.
142 * tree-object-size.h (decl_init_size): Declare.
143 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
144 to maybe_warn_overflow when assigning to an SSA_NAME.
146 2020-06-10 Richard Biener <rguenther@suse.de>
148 * tree-vect-loop.c (vect_determine_vectorization_factor):
150 (_loop_vec_info::_loop_vec_info): Likewise.
151 (vect_update_vf_for_slp): Likewise.
152 (vect_analyze_loop_operations): Likewise.
153 (update_epilogue_loop_vinfo): Likewise.
154 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
155 (vect_pattern_recog): Likewise.
156 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
157 (_bb_vec_info::_bb_vec_info): Likewise.
158 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
161 2020-06-10 Richard Biener <rguenther@suse.de>
163 PR tree-optimization/95576
164 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
166 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
169 * config/aarch64/aarch64-sve-builtins.h
170 (sve_switcher::m_old_maximum_field_alignment): New member.
171 * config/aarch64/aarch64-sve-builtins.cc
172 (sve_switcher::sve_switcher): Save maximum_field_alignment in
173 m_old_maximum_field_alignment and clear maximum_field_alignment.
174 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
176 2020-06-10 Richard Biener <rguenther@suse.de>
178 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
180 (_stmt_vec_info::vec_stmts): Likewise.
181 (vec_info::stmt_vec_info_ro): New flag.
182 (vect_finish_replace_stmt): Adjust declaration.
183 (vect_finish_stmt_generation): Likewise.
184 (vectorizable_induction): Likewise.
185 (vect_transform_reduction): Likewise.
186 (vectorizable_lc_phi): Likewise.
187 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
188 allocate stmt infos for increments.
189 (vect_record_grouped_load_vectors): Adjust.
190 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
191 (vectorize_fold_left_reduction): Likewise.
192 (vect_transform_reduction): Likewise.
193 (vect_transform_cycle_phi): Likewise.
194 (vectorizable_lc_phi): Likewise.
195 (vectorizable_induction): Likewise.
196 (vectorizable_live_operation): Likewise.
197 (vect_transform_loop): Likewise.
198 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
199 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
200 (vect_get_slp_defs): Likewise.
201 (vect_transform_slp_perm_load): Likewise.
202 (vect_schedule_slp_instance): Likewise.
203 (vectorize_slp_instance_root_stmt): Likewise.
204 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
205 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
206 (vect_finish_replace_stmt): Do not return anything.
207 (vect_finish_stmt_generation): Likewise.
208 (vect_build_gather_load_calls): Adjust.
209 (vectorizable_bswap): Likewise.
210 (vectorizable_call): Likewise.
211 (vectorizable_simd_clone_call): Likewise.
212 (vect_create_vectorized_demotion_stmts): Likewise.
213 (vectorizable_conversion): Likewise.
214 (vectorizable_assignment): Likewise.
215 (vectorizable_shift): Likewise.
216 (vectorizable_operation): Likewise.
217 (vectorizable_scan_store): Likewise.
218 (vectorizable_store): Likewise.
219 (vectorizable_load): Likewise.
220 (vectorizable_condition): Likewise.
221 (vectorizable_comparison): Likewise.
222 (vect_transform_stmt): Likewise.
223 * tree-vectorizer.c (vec_info::vec_info): Initialize
225 (vec_info::replace_stmt): Copy over stmt UID rather than
226 unsetting/setting a stmt info allocating a new UID.
227 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
229 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
231 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
233 * gimple-ssa-evrp.c (class evrp_folder): New.
234 (class evrp_dom_walker): Remove.
235 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
236 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
237 * tree-ssa-copy.c (copy_folder::get_value): Same.
238 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
239 Pass stmt to get_value.
240 (substitute_and_fold_engine::replace_phi_args_in): Same.
241 (substitute_and_fold_dom_walker::after_dom_children): Call
243 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
244 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
245 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
246 call virtual functions for folding, pre_folding, and post folding.
247 Call get_value with PHI. Tweak dump.
248 * tree-ssa-propagate.h (class substitute_and_fold_engine):
249 New argument to get_value.
250 New virtual function pre_fold_bb.
251 New virtual function post_fold_bb.
252 New virtual function pre_fold_stmt.
253 New virtual function post_new_stmt.
254 New function propagate_into_phi_args.
255 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
256 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
258 (vr_values::fold_cond): New.
259 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
260 * vr-values.h (class vr_values): Add
261 simplify_cond_using_ranges_when_edge_is_known.
263 2020-06-10 Martin Liska <mliska@suse.cz>
266 * asan.c (asan_emit_stack_protection): Emit
267 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
270 2020-06-10 Tamar Christina <tamar.christina@arm.com>
272 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
274 2020-06-10 Richard Biener <rguenther@suse.de>
276 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
277 (vect_record_grouped_load_vectors): Likewise.
278 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
279 (vectorize_fold_left_reduction): Likewise.
280 (vect_transform_reduction): Likewise.
281 (vect_transform_cycle_phi): Likewise.
282 (vectorizable_lc_phi): Likewise.
283 (vectorizable_induction): Likewise.
284 (vectorizable_live_operation): Likewise.
285 (vect_transform_loop): Likewise.
286 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
288 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
289 (vect_get_vec_def_for_operand): Likewise.
290 (vect_get_vec_def_for_stmt_copy): Likewise.
291 (vect_get_vec_defs_for_stmt_copy): Likewise.
292 (vect_get_vec_defs_for_operand): New function.
293 (vect_get_vec_defs): Likewise.
294 (vect_build_gather_load_calls): Adjust.
295 (vect_get_gather_scatter_ops): Likewise.
296 (vectorizable_bswap): Likewise.
297 (vectorizable_call): Likewise.
298 (vectorizable_simd_clone_call): Likewise.
299 (vect_get_loop_based_defs): Remove.
300 (vect_create_vectorized_demotion_stmts): Adjust.
301 (vectorizable_conversion): Likewise.
302 (vectorizable_assignment): Likewise.
303 (vectorizable_shift): Likewise.
304 (vectorizable_operation): Likewise.
305 (vectorizable_scan_store): Likewise.
306 (vectorizable_store): Likewise.
307 (vectorizable_load): Likewise.
308 (vectorizable_condition): Likewise.
309 (vectorizable_comparison): Likewise.
310 (vect_transform_stmt): Adjust and remove no longer applicable
312 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
313 STMT_VINFO_VEC_STMTS.
314 (vec_info::free_stmt_vec_info): Relase it.
315 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
316 (_stmt_vec_info::vec_stmts): Add.
317 (STMT_VINFO_VEC_STMT): Remove.
318 (STMT_VINFO_VEC_STMTS): New.
319 (vect_get_vec_def_for_operand_1): Remove.
320 (vect_get_vec_def_for_operand): Likewise.
321 (vect_get_vec_defs_for_stmt_copy): Likewise.
322 (vect_get_vec_def_for_stmt_copy): Likewise.
323 (vect_get_vec_defs): New overloads.
324 (vect_get_vec_defs_for_operand): New.
325 (vect_get_slp_defs): Declare.
327 2020-06-10 Qian Chao <qianchao9@huawei.com>
329 PR tree-optimization/95569
330 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
332 2020-06-10 Martin Liska <mliska@suse.cz>
334 PR tree-optimization/92860
335 * optc-save-gen.awk: Generate new function cl_optimization_compare.
336 * opth-gen.awk: Generate declaration of the function.
338 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
340 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
341 'future' PowerPC platform.
342 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
343 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
344 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
346 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
347 (rs6000_clone_map): Add 'future' system target_clones support.
349 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
351 * Makefile.in (ZSTD_INC): Define.
352 (ZSTD_LIB): Include ZSTD_LDFLAGS.
353 (CFLAGS-lto-compress.o): Add ZSTD_INC.
354 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
356 * configure: Rebuilt.
358 2020-06-09 Jason Merrill <jason@redhat.com>
361 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
363 2020-06-09 Marco Elver <elver@google.com>
365 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
366 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
367 builtin for volatile instrumentation of reads/writes.
368 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
369 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
370 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
371 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
372 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
373 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
374 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
375 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
376 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
377 * tsan.c (get_memory_access_decl): Argument if access is
378 volatile. If param tsan-distinguish-volatile is non-zero, and
379 access if volatile, return volatile instrumentation decl.
380 (instrument_expr): Check if access is volatile.
382 2020-06-09 Richard Biener <rguenther@suse.de>
384 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
386 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
388 * omp-offload.c (add_decls_addresses_to_decl_constructor,
389 omp_finish_file): With in_lto_p, stream out all offload-table
390 items even if the symtab_node does not exist.
392 2020-06-09 Richard Biener <rguenther@suse.de>
394 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
396 2020-06-09 Martin Liska <mliska@suse.cz>
398 * gcov-dump.c (print_usage): Fix spacing for --raw option
401 2020-06-09 Martin Liska <mliska@suse.cz>
403 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
404 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
405 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
406 Handle all sanitizer options.
407 (can_inline_edge_p): Use renamed CIF_* enum value.
409 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
411 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
413 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
414 (@aarch64_bic<mode>): Enable unpacked BIC.
415 (*bic<mode>3): Enable unpacked BIC.
417 2020-06-09 Martin Liska <mliska@suse.cz>
419 PR gcov-profile/95365
420 * doc/gcov.texi: Compile and link one example in 2 steps.
422 2020-06-09 Jakub Jelinek <jakub@redhat.com>
424 PR tree-optimization/95527
425 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
427 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
429 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
430 'future' PowerPC platform.
431 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
432 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
433 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
435 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
436 (rs6000_clone_map): Add 'future' system target_clones support.
438 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
442 * omp-offload.c (add_decls_addresses_to_decl_constructor,
443 omp_finish_file): Skip removed items.
444 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
445 to this node for variables and functions.
447 2020-06-08 Jason Merrill <jason@redhat.com>
449 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
450 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
451 * configure: Regenerate.
453 2020-06-08 Martin Sebor <msebor@redhat.com>
455 * postreload.c (reload_cse_simplify_operands): Clear first array element
456 before using it. Assert a precondition.
458 2020-06-08 Jakub Jelinek <jakub@redhat.com>
461 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
462 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
463 type is vector boolean.
465 2020-06-08 Tamar Christina <tamar.christina@arm.com>
467 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
469 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
471 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
474 2020-06-08 Martin Liska <mliska@suse.cz>
476 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
477 in all vcond* patterns.
479 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
481 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
482 Define. No longer include <algorithm>.
484 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
486 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
487 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
488 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
489 (parityhi2, parityqi2): New expanders.
490 (parityhi2_cmp): Implement set parity flag with xorb insn.
491 (parityqi2_cmp): Implement set parity flag with testb insn.
492 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
494 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
497 * config/rs6000/rs6000.c (rs6000_option_override_internal):
498 Override flag_cunroll_grow_size.
500 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
502 * common.opt (flag_cunroll_grow_size): New flag.
503 * toplev.c (process_options): Set flag_cunroll_grow_size.
504 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
505 Use flag_cunroll_grow_size.
507 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
510 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
511 (ipa_odr_summary_write): Update streaming.
512 (ipa_odr_read_section): Update streaming.
514 2020-06-06 Alexandre Oliva <oliva@adacore.com>
517 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
519 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
520 Julian Brown <julian@codesourcery.com>
522 * gimplify.c (gimplify_adjust_omp_clauses): Remove
523 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
525 2020-06-05 Richard Biener <rguenther@suse.de>
527 PR tree-optimization/95539
528 * tree-vect-data-refs.c
529 (vect_slp_analyze_and_verify_instance_alignment): Use
530 SLP_TREE_REPRESENTATIVE for the data-ref check.
531 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
532 back to the first scalar stmt rather than the
533 SLP_TREE_REPRESENTATIVE to match previous behavior.
535 2020-06-05 Felix Yang <felix.yang@huawei.com>
538 * expr.c (emit_move_insn): Check src and dest of the copy to see
539 if one or both of them are subregs, try to remove the subregs when
540 innermode and outermode are equal in size and the mode change involves
541 an implicit round trip through memory.
543 2020-06-05 Jakub Jelinek <jakub@redhat.com>
546 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
547 define_insn_and_split patterns.
548 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
549 define_insn patterns.
551 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
553 * alloc-pool.h (object_allocator::remove_raw): New.
554 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
555 (occurrence::occurrence): Add.
556 (occurrence::~occurrence): Likewise.
557 (occurrence::new): Likewise.
558 (occurrence::delete): Likewise.
560 (insert_bb): Use new occurence (...) instead of occ_new.
561 (register_division_in): Likewise.
562 (free_bb): Use delete occ instead of manually removing
565 2020-06-05 Richard Biener <rguenther@suse.de>
568 * cfgexpand.c (expand_debug_expr): Avoid calling
569 set_mem_attributes_minus_bitpos when we were expanding
571 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
572 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
573 special-cases we do not want MEM_EXPRs for. Assert
574 we end up with reasonable MEM_EXPRs.
576 2020-06-05 Lili Cui <lili.cui@intel.com>
579 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
581 2020-06-04 Martin Sebor <msebor@redhat.com>
585 * attribs.c (init_attr_rdwr_indices): Move function here.
586 * attribs.h (rdwr_access_hash, rdwr_map): Define.
587 (attr_access): Add 'none'.
588 (init_attr_rdwr_indices): Declared function.
589 * builtins.c (warn_for_access)): New function.
590 (check_access): Call it.
591 * builtins.h (checK-access): Add an optional argument.
592 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
593 (init_attr_rdwr_indices): Declare extern.
594 (append_attrname): Handle attr_access::none.
595 (maybe_warn_rdwr_sizes): Same.
596 (initialize_argument_information): Update comments.
597 * doc/extend.texi (attribute access): Document 'none'.
598 * tree-ssa-uninit.c (struct wlimits): New.
599 (maybe_warn_operand): New function.
600 (maybe_warn_pass_by_reference): Same.
601 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
602 Also call for function calls.
603 (pass_late_warn_uninitialized::execute): Adjust comments.
604 (execute_early_warn_uninitialized): Same.
606 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
609 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
610 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
611 reload if the original insn has it too.
613 2020-06-04 Richard Biener <rguenther@suse.de>
615 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
616 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
618 2020-06-04 Martin Jambor <mjambor@suse.cz>
621 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
622 exceptions check to...
623 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
625 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
626 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
629 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
632 * config/arm/predicates.md (mve_scatter_memory): Define to
633 match (mem (reg)) for scatter store memory.
634 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
635 define_insn to define_expand.
636 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
637 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
638 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
639 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
640 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
641 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
642 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
643 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
644 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
645 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
646 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
647 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
648 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
649 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
650 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
651 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
652 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
653 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
654 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
655 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
656 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
658 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
659 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
660 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
661 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
662 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
663 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
664 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
665 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
666 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
667 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
668 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
669 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
670 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
671 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
672 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
673 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
674 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
675 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
676 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
677 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
679 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
681 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
683 (__arm_vbicq_n_s16): Likewise.
684 (__arm_vbicq_n_u32): Likewise.
685 (__arm_vbicq_n_s32): Likewise.
686 (__arm_vbicq): Modify polymorphic variant.
688 2020-06-04 Richard Biener <rguenther@suse.de>
690 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
691 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
692 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
693 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
694 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
696 (vect_get_slp_defs): ... here.
697 (vect_get_slp_vect_def): New function.
699 2020-06-04 Richard Biener <rguenther@suse.de>
701 * tree-vectorizer.h (_slp_tree::lanes): New.
702 (SLP_TREE_LANES): Likewise.
703 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
704 (vectorizable_reduction): Likewise.
705 (vect_transform_cycle_phi): Likewise.
706 (vectorizable_induction): Likewise.
707 (vectorizable_live_operation): Likewise.
708 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
709 (vect_create_new_slp_node): Likewise.
710 (slp_copy_subtree): Copy it.
711 (vect_optimize_slp): Use it.
712 (vect_slp_analyze_node_operations_1): Likewise.
713 (vect_slp_convert_to_external): Likewise.
714 (vect_bb_vectorization_profitable_p): Likewise.
715 * tree-vect-stmts.c (vectorizable_load): Likewise.
716 (get_vectype_for_scalar_type): Likewise.
718 2020-06-04 Richard Biener <rguenther@suse.de>
720 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
721 (vect_build_slp_tree_2): Simplify building all external op
723 (vect_slp_analyze_node_operations): Remove push/pop of
725 (vect_schedule_slp_instance): Likewise.
726 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
727 stmt_info, use the vect_is_simple_use overload combining
728 SLP and stmt_info analysis.
729 (vect_is_simple_cond): Likewise.
730 (vectorizable_store): Adjust.
731 (vectorizable_condition): Likewise.
732 (vect_is_simple_use): Fully handle invariant SLP nodes
733 here. Amend stmt_info operand extraction with COND_EXPR
735 * tree-vect-loop.c (vectorizable_reduction): Deal with
736 COND_EXPR representation ugliness.
738 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
741 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
742 Refine from *vcvtps2ph_store<mask_name>.
743 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
744 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
745 (*vcvtps2ph256<merge_mask_name>): New define_insn.
746 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
747 * config/i386/subst.md (merge_mask): New define_subst.
748 (merge_mask_name): New define_subst_attr.
749 (merge_mask_operand3): Ditto.
751 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
753 PR tree-optimization/89430
755 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
756 remove ssa_name_ver, store, offset fields.
757 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
758 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
759 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
762 2020-06-04 Andreas Schwab <schwab@suse.de>
765 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
767 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
769 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
770 (trunc<mode><pmov_dst_3_lower>2): Refine from
771 trunc<mode><pmov_dst_3>2.
773 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
775 * match.pd (tanh/sinh -> 1/cosh): New simplification.
777 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
780 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
781 is_lfs_stfs_insn and make it recognize lfs as well.
782 (prefixed_store_p): Use is_lfs_stfs_insn().
783 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
785 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
787 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
789 (odr_enums): New static var.
790 (struct odr_enum_val): New struct.
791 (class odr_enum): New struct.
792 (odr_enum_map): New hashtable.
793 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
794 (add_type_duplicate): Likewise.
795 (free_odr_warning_data): Do not free TYPE_VALUES.
796 (register_odr_enum): New function.
797 (ipa_odr_summary_write): New function.
798 (ipa_odr_read_section): New function.
799 (ipa_odr_summary_read): New function.
800 (class pass_ipa_odr): New pass.
801 (make_pass_ipa_odr): New function.
802 * ipa-utils.h (register_odr_enum): Declare.
803 * lto-section-in.c: (lto_section_name): Add odr_types section.
804 * lto-streamer.h (enum lto_section_type): Add odr_types section.
805 * passes.def: Add odr_types pass.
806 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
808 (hash_tree): Likewise.
809 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
811 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
813 * timevar.def (TV_IPA_ODR): New timervar.
814 * tree-pass.h (make_pass_ipa_odr): Declare.
815 * tree.c (free_lang_data_in_type): Regiser ODR types.
817 2020-06-03 Romain Naour <romain.naour@gmail.com>
819 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
822 2020-06-03 Richard Biener <rguenther@suse.de>
824 PR tree-optimization/95487
825 * tree-vect-stmts.c (vectorizable_store): Use a truth type
826 for the scatter mask.
828 2020-06-03 Richard Biener <rguenther@suse.de>
830 PR tree-optimization/95495
831 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
832 SLP_TREE_REPRESENTATIVE in the shift assertion.
834 2020-06-03 Tom Tromey <tromey@adacore.com>
836 * spellcheck.c (CASE_COST): New define.
837 (BASE_COST): New define.
838 (get_edit_distance): Recognize case changes.
839 (get_edit_distance_cutoff): Update.
840 (test_edit_distances): Update.
841 (get_old_cutoff): Update.
842 (test_find_closest_string): Add case sensitivity test.
844 2020-06-03 Richard Biener <rguenther@suse.de>
846 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
847 the cost vector to unset the visited flag on stmts.
849 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
851 * gimplify.c (omp_notice_variable): Use new hook.
852 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
853 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
854 (LANG_HOOKS_DECLS): Add it.
855 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
856 (lhd_omp_predetermined_mapping): New.
857 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
859 2020-06-03 Jan Hubicka <jh@suse.cz>
861 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
862 add LTO_first_tree_tag and LTO_first_gimple_tag.
863 (lto_tag_is_tree_code_p): Update.
864 (lto_tag_is_gimple_code_p): Update.
865 (lto_gimple_code_to_tag): Update.
866 (lto_tag_to_gimple_code): Update.
867 (lto_tree_code_to_tag): Update.
868 (lto_tag_to_tree_code): Update.
870 2020-06-02 Felix Yang <felix.yang@huawei.com>
873 * config/aarch64/aarch64.c (aarch64_short_vector_p):
874 Leave later code to report an error if SVE is disabled.
876 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
878 * config/aarch64/aarch64-cores.def (zeus): Define.
879 * config/aarch64/aarch64-tune.md: Regenerate.
880 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
882 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
885 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
887 (is_stfs_insn): New helper function.
889 2020-06-02 Jan Hubicka <jh@suse.cz>
891 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
893 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
895 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
897 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
898 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
899 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
901 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
904 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
905 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
907 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
909 * config/s390/s390.c (print_operand): Emit vector alignment
912 2020-06-02 Martin Liska <mliska@suse.cz>
914 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
915 as they have variable number of counters.
916 * gcov-dump.c (main): Add new option -r.
917 (print_usage): Likewise.
918 (tag_counters): All new raw format.
919 * gcov-io.h (struct gcov_kvp): New.
920 (GCOV_TOPN_VALUES): Remove.
921 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
922 (GCOV_TOPN_MEM_COUNTERS): New.
923 (GCOV_TOPN_DISK_COUNTERS): Likewise.
924 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
925 * ipa-profile.c (ipa_profile_generate_summary): Use
926 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
927 (ipa_profile_write_edge_summary): Likewise.
928 (ipa_profile_read_edge_summary): Likewise.
929 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
930 * profile.c (sort_hist_values): Sort variable number
932 (compute_value_histograms): Special case for TOP N counters
933 that have dynamic number of key-value pairs.
934 * value-prof.c (dump_histogram_value): Dump variable number
936 (stream_in_histogram_value): Stream in variable number
937 of key-value pairs for TOP N counter.
938 (get_nth_most_common_value): Deal with variable number
940 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
942 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
944 * doc/gcov-dump.texi: Document new -r option.
946 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
949 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
951 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
953 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
954 returns (const_int 0) for the destination, then emit nothing.
956 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
958 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
959 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
960 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
961 LTO_const_decl_ref, LTO_imported_decl_ref,
962 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
963 LTO_namelist_decl_ref; add LTO_global_stream_ref.
964 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
965 (lto_input_scc): Update.
966 (lto_input_tree_1): Update.
967 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
968 * lto-streamer.c (lto_tag_name): Update.
970 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
972 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
973 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
974 * lto-cgraph.c (lto_output_node): Likewise.
975 (lto_output_varpool_node): Likewise.
976 (output_offload_tables): Likewise.
977 (input_node): Likewise.
978 (input_varpool_node): Likewise.
979 (input_offload_tables): Likewise.
980 * lto-streamer-in.c (lto_input_tree_ref): Declare.
981 (lto_input_var_decl_ref): Declare.
982 (lto_input_fn_decl_ref): Declare.
983 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
984 (lto_output_var_decl_index): Rename to ..
985 (lto_output_var_decl_ref): ... this.
986 (lto_output_fn_decl_index): Rename to ...
987 (lto_output_fn_decl_ref): ... this.
988 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
989 (DEFINE_DECL_STREAM_FUNCS): Remove.
990 (lto_output_var_decl_index): Remove.
991 (lto_output_fn_decl_index): Remove.
992 (lto_output_var_decl_ref): Declare.
993 (lto_output_fn_decl_ref): Declare.
994 (lto_input_var_decl_ref): Declare.
995 (lto_input_fn_decl_ref): Declare.
997 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
999 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
1000 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
1001 dump infomation if there is no adjusted parameter.
1002 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
1004 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
1006 * Makefile.in (gimple-array-bounds.o): New.
1007 * tree-vrp.c: Move array bounds code...
1008 * gimple-array-bounds.cc: ...here...
1009 * gimple-array-bounds.h: ...and here.
1011 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
1013 * Makefile.in (OBJS): Add value-range-equiv.o.
1014 * tree-vrp.c (*value_range_equiv*): Move to...
1015 * value-range-equiv.cc: ...here.
1016 * tree-vrp.h (class value_range_equiv): Move to...
1017 * value-range-equiv.h: ...here.
1018 * vr-values.h: Include value-range-equiv.h.
1020 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
1023 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
1024 lattice for simple pass-through by-ref argument.
1026 2020-05-31 Jeff Law <law@redhat.com>
1028 * lra.c (add_auto_inc_notes): Remove function.
1029 * reload1.c (add_auto_inc_notes): Similarly. Move into...
1030 * rtlanal.c (add_auto_inc_notes): New function.
1031 * rtl.h (add_auto_inc_notes): Add prototype.
1032 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
1035 2020-05-31 Jan Hubicka <jh@suse.cz>
1037 * lto-section-out.c (lto_output_decl_index): Remove.
1038 (lto_output_field_decl_index): Move to lto-streamer-out.c
1039 (lto_output_fn_decl_index): Move to lto-streamer-out.c
1040 (lto_output_namespace_decl_index): Remove.
1041 (lto_output_var_decl_index): Remove.
1042 (lto_output_type_decl_index): Remove.
1043 (lto_output_type_ref_index): Remove.
1044 * lto-streamer-out.c (output_type_ref): Remove.
1045 (lto_get_index): New function.
1046 (lto_output_tree_ref): Remove.
1047 (lto_indexable_tree_ref): New function.
1048 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
1049 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
1050 (stream_write_tree_ref): Update.
1051 (lto_output_tree): Update.
1052 * lto-streamer.h (lto_output_decl_index): Remove prototype.
1053 (lto_output_field_decl_index): Remove prototype.
1054 (lto_output_namespace_decl_index): Remove prototype.
1055 (lto_output_type_decl_index): Remove prototype.
1056 (lto_output_type_ref_index): Remove prototype.
1057 (lto_output_var_decl_index): Move.
1058 (lto_output_fn_decl_index): Move
1060 2020-05-31 Jakub Jelinek <jakub@redhat.com>
1063 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
1066 2020-05-31 Jeff Law <law@redhat.com>
1068 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
1070 2020-05-31 Jim Wilson <jimw@sifive.com>
1072 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
1074 2020-05-30 Jonathan Yong <10walls@gmail.com>
1076 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
1077 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
1078 import library, but also contains some functions that invoke
1079 others in KERNEL32.DLL.
1081 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
1083 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
1084 (altivec_vmrglw_direct): Ditto.
1085 (altivec_vperm_<mode>_direct): Ditto.
1086 (altivec_vperm_v8hiv16qi): Ditto.
1087 (*altivec_vperm_<mode>_uns_internal): Ditto.
1088 (*altivec_vpermr_<mode>_internal): Ditto.
1089 (vperm_v8hiv4si): Ditto.
1090 (vperm_v16qiv8hi): Ditto.
1092 2020-05-29 Jan Hubicka <jh@suse.cz>
1094 * lto-streamer-in.c (streamer_read_chain): Move here from
1096 (stream_read_tree_ref): New.
1097 (lto_input_tree_1): Simplify.
1098 * lto-streamer-out.c (stream_write_tree_ref): New.
1099 (lto_write_tree_1): Simplify.
1100 (lto_output_tree_1): Simplify.
1101 (DFS::DFS_write_tree): Simplify.
1102 (streamer_write_chain): Move here from tree-stremaer-out.c.
1103 * lto-streamer.h (lto_output_tree_ref): Update prototype.
1104 (stream_read_tree_ref): Declare
1105 (stream_write_tree_ref): Declare
1106 * tree-streamer-in.c (streamer_read_chain): Update to use
1107 stream_read_tree_ref.
1108 (lto_input_ts_common_tree_pointers): Likewise.
1109 (lto_input_ts_vector_tree_pointers): Likewise.
1110 (lto_input_ts_poly_tree_pointers): Likewise.
1111 (lto_input_ts_complex_tree_pointers): Likewise.
1112 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
1113 (lto_input_ts_decl_common_tree_pointers): Likewise.
1114 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
1115 (lto_input_ts_field_decl_tree_pointers): Likewise.
1116 (lto_input_ts_function_decl_tree_pointers): Likewise.
1117 (lto_input_ts_type_common_tree_pointers): Likewise.
1118 (lto_input_ts_type_non_common_tree_pointers): Likewise.
1119 (lto_input_ts_list_tree_pointers): Likewise.
1120 (lto_input_ts_vec_tree_pointers): Likewise.
1121 (lto_input_ts_exp_tree_pointers): Likewise.
1122 (lto_input_ts_block_tree_pointers): Likewise.
1123 (lto_input_ts_binfo_tree_pointers): Likewise.
1124 (lto_input_ts_constructor_tree_pointers): Likewise.
1125 (lto_input_ts_omp_clause_tree_pointers): Likewise.
1126 * tree-streamer-out.c (streamer_write_chain): Update to use
1127 stream_write_tree_ref.
1128 (write_ts_common_tree_pointers): Likewise.
1129 (write_ts_vector_tree_pointers): Likewise.
1130 (write_ts_poly_tree_pointers): Likewise.
1131 (write_ts_complex_tree_pointers): Likewise.
1132 (write_ts_decl_minimal_tree_pointers): Likewise.
1133 (write_ts_decl_common_tree_pointers): Likewise.
1134 (write_ts_decl_non_common_tree_pointers): Likewise.
1135 (write_ts_decl_with_vis_tree_pointers): Likewise.
1136 (write_ts_field_decl_tree_pointers): Likewise.
1137 (write_ts_function_decl_tree_pointers): Likewise.
1138 (write_ts_type_common_tree_pointers): Likewise.
1139 (write_ts_type_non_common_tree_pointers): Likewise.
1140 (write_ts_list_tree_pointers): Likewise.
1141 (write_ts_vec_tree_pointers): Likewise.
1142 (write_ts_exp_tree_pointers): Likewise.
1143 (write_ts_block_tree_pointers): Likewise.
1144 (write_ts_binfo_tree_pointers): Likewise.
1145 (write_ts_constructor_tree_pointers): Likewise.
1146 (write_ts_omp_clause_tree_pointers): Likewise.
1147 (streamer_write_tree_body): Likewise.
1148 (streamer_write_integer_cst): Likewise.
1149 * tree-streamer.h (streamer_read_chain):Declare.
1150 (streamer_write_chain):Declare.
1151 (streamer_write_tree_body): Update prototype.
1152 (streamer_write_integer_cst): Update prototype.
1154 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
1157 * configure: Regenerated.
1159 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
1161 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
1162 (add<mode>3_vcc_zext_dup_exec): Likewise.
1163 (add<mode>3_vcc_zext_dup2): Likewise.
1164 (add<mode>3_vcc_zext_dup2_exec): Likewise.
1166 2020-05-29 Richard Biener <rguenther@suse.de>
1168 PR tree-optimization/95272
1169 * tree-vectorizer.h (_slp_tree::representative): Add.
1170 (SLP_TREE_REPRESENTATIVE): Likewise.
1171 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
1173 (vectorizable_live_operation): Use the representative to
1174 attach the reduction info to.
1175 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
1176 SLP_TREE_REPRESENTATIVE.
1177 (vect_create_new_slp_node): Likewise.
1178 (slp_copy_subtree): Copy it.
1179 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
1180 (vect_slp_analyze_node_operations_1): Pass the representative
1181 to vect_analyze_stmt.
1182 (vect_schedule_slp_instance): Pass the representative to
1183 vect_transform_stmt.
1185 2020-05-29 Richard Biener <rguenther@suse.de>
1187 PR tree-optimization/95356
1188 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
1189 node hacking during analysis.
1191 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
1194 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
1196 2020-05-29 Richard Biener <rguenther@suse.de>
1198 PR tree-optimization/95403
1199 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
1202 2020-05-29 Jakub Jelinek <jakub@redhat.com>
1205 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
1206 declare variant cgraph node removal callback.
1208 2020-05-29 Jakub Jelinek <jakub@redhat.com>
1211 * expr.c (store_expr): If expr_size is constant and significantly
1212 larger than TREE_STRING_LENGTH, set temp to just the
1213 TREE_STRING_LENGTH portion of the STRING_CST.
1215 2020-05-29 Richard Biener <rguenther@suse.de>
1217 PR tree-optimization/95393
1218 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
1219 to build the min/max expression so we simplify cases like
1220 MAX(0, s) immediately.
1222 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
1224 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
1225 for unpacked EOR, ORR, AND.
1227 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
1229 * Makefile.in: don't look for libiberty in the "pic" subdirectory
1230 when building for Mingw. Add dependency on xgcc with the proper
1233 2020-05-28 Jeff Law <law@redhat.com>
1235 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
1237 2020-05-28 Jeff Law <law@redhat.com>
1239 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
1240 make a nonzero adjustment to the memory offset.
1241 (b<ior,xor>hi_msx): Turn into a splitter.
1243 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
1245 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
1246 Fix off-by-one error.
1248 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
1250 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
1251 wb_candidate1 and wb_candidate2.
1252 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
1253 wb_candidate1 and wb_candidate2 if we decided not to use them.
1255 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
1258 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
1259 we have at least some CFI operations when using a frame pointer.
1260 Only redefine the CFA if we have CFI operations.
1262 2020-05-28 Richard Biener <rguenther@suse.de>
1264 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
1265 case for !SLP_TREE_VECTYPE.
1266 (vect_slp_analyze_node_operations): Adjust.
1268 2020-05-28 Richard Biener <rguenther@suse.de>
1270 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
1271 (SLP_TREE_VEC_DEFS): Likewise.
1272 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
1273 (_slp_tree::~_slp_tree): Likewise.
1274 (vect_mask_constant_operand_p): Remove unused function.
1275 (vect_get_constant_vectors): Rename to...
1276 (vect_create_constant_vectors): ... this. Take the
1277 invariant node as argument and code generate it. Remove
1278 dead code, remove temporary asserts. Pass a NULL stmt_info
1279 to vect_init_vector.
1280 (vect_get_slp_defs): Simplify.
1281 (vect_schedule_slp_instance): Code-generate externals and
1282 invariants using vect_create_constant_vectors.
1284 2020-05-28 Richard Biener <rguenther@suse.de>
1286 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
1287 Conditionalize stmt_info use, assert the new stmt cannot throw
1289 (vect_finish_stmt_generation): Adjust assert.
1291 2020-05-28 Richard Biener <rguenther@suse.de>
1293 PR tree-optimization/95273
1294 PR tree-optimization/95356
1295 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
1296 what we set the vector type of the shift operand SLP node
1299 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
1301 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
1304 2020-05-28 Martin Liska <mliska@suse.cz>
1307 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
1308 rename ipcp-unit-growth to ipa-cp-unit-growth.
1310 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
1312 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
1313 from *avx512vl_<code>v2div2qi_store and refine memory size of
1315 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
1316 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
1317 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
1318 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
1319 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
1320 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
1321 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
1322 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
1323 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
1324 (*avx512vl_<code>v2div2si2_store_1): Ditto.
1325 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
1326 (*avx512f_<code>v8div16qi2_store_1): Ditto.
1327 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
1328 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
1329 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
1330 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
1331 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
1332 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
1333 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
1334 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
1335 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
1336 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
1337 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
1338 (*avx512vl_<code>v2div2si2_store_2): Ditto.
1339 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
1340 (*avx512f_<code>v8div16qi2_store_2): Ditto.
1341 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
1342 * config/i386/i386-builtin-types.def: Adjust builtin type.
1343 * config/i386/i386-expand.c: Ditto.
1344 * config/i386/i386-builtin.def: Adjust builtin.
1345 * config/i386/avx512fintrin.h: Ditto.
1346 * config/i386/avx512vlbwintrin.h: Ditto.
1347 * config/i386/avx512vlintrin.h: Ditto.
1349 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
1351 PR gcov-profile/95332
1352 * gcov-io.c (gcov_var::endian): Move field.
1353 (from_file): Add IN_GCOV_TOOL check.
1354 * gcov-io.h (gcov_magic): Ditto.
1356 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
1358 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
1360 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
1362 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
1364 * builtin-types.def (BT_UINT128): New primitive type.
1365 (BT_FN_UINT128_UINT128): New function type.
1366 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
1367 * doc/extend.texi (__builtin_bswap128): Document it.
1368 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
1369 (is_inexpensive_builtin): Likewise.
1370 * fold-const-call.c (fold_const_call_ss): Likewise.
1371 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
1372 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
1373 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
1374 (vectorizable_call): Likewise.
1375 * optabs.c (expand_unop): Always use the double word path for it.
1376 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
1377 * tree.h (uint128_type_node): New global type.
1378 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
1380 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
1382 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
1383 (mmx_hsubv2sf3): Ditto.
1384 (mmx_haddsubv2sf3): New expander.
1385 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
1386 RTL template to model horizontal subtraction and addition.
1387 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
1390 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
1393 * config/i386/sse.md
1394 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
1395 Remove %q operand modifier from insn template.
1396 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
1398 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
1400 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
1401 Enable insn pattern for TARGET_MMX_WITH_SSE.
1402 (*mmx_movshdup): New insn pattern.
1403 (*mmx_movsldup): Ditto.
1404 (*mmx_movss): Ditto.
1405 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
1407 (expand_vec_perm_movs): Handle E_V2SFmode.
1408 (expand_vec_perm_even_odd): Ditto.
1409 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
1410 is already handled by standard shuffle patterns.
1412 2020-05-27 Richard Biener <rguenther@suse.de>
1414 PR tree-optimization/95295
1415 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
1416 merging stores from paths.
1418 2020-05-27 Richard Biener <rguenther@suse.de>
1420 PR tree-optimization/95356
1421 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
1422 type for the shift operand.
1424 2020-05-27 Richard Biener <rguenther@suse.de>
1426 PR tree-optimization/95335
1427 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
1428 lvisited for nodes made external.
1430 2020-05-27 Richard Biener <rguenther@suse.de>
1432 * dump-context.h (debug_dump_context): New class.
1433 (dump_context): Make it friend.
1434 * dumpfile.c (debug_dump_context::debug_dump_context):
1436 (debug_dump_context::~debug_dump_context): Likewise.
1437 * tree-vect-slp.c: Include dump-context.h.
1438 (vect_print_slp_tree): Dump a single SLP node.
1439 (debug): New overload for slp_tree.
1440 (vect_print_slp_graph): Rename from vect_print_slp_tree and
1442 (vect_analyze_slp_instance): Adjust.
1444 2020-05-27 Jakub Jelinek <jakub@redhat.com>
1447 * omp-general.c (omp_declare_variant_remove_hook): New function.
1448 (omp_resolve_declare_variant): Always return base if it is already
1449 declare_variant_alt magic decl itself. Register
1450 omp_declare_variant_remove_hook as cgraph node removal hook.
1452 2020-05-27 Jeff Law <law@redhat.com>
1454 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
1455 for the primary input operand.
1456 (tstsi_variable_bit_qi): Similarly.
1458 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
1460 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
1462 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
1465 * ipa-utils.h (odr_type_p): Also permit calls with
1466 only flag_generate_offload set.
1468 2020-05-26 Alexandre Oliva <oliva@adacore.com>
1470 * gcc.c (validate_switches): Add braced parameter. Adjust all
1471 callers. Expected and skip trailing brace only if braced.
1472 Return after handling one atom otherwise.
1473 (DUMPS_OPTIONS): New.
1474 (cpp_debug_options): Define in terms of it.
1476 2020-05-26 Richard Biener <rguenther@suse.de>
1478 PR tree-optimization/95327
1479 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
1480 when we are not using a scalar shift.
1482 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
1484 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
1485 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
1486 Handle E_V2SImode and E_V4HImode.
1487 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
1488 Assert that E_V2SImode is already handled.
1489 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
1490 is already handled by standard shuffle patterns.
1492 2020-05-26 Jan Hubicka <jh@suse.cz>
1494 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
1497 2020-05-26 Jakub Jelinek <jakub@redhat.com>
1500 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
1501 * omp-general.h (find_combined_omp_for): Declare.
1502 * omp-general.c: Include tree-iterator.h.
1503 (find_combined_omp_for): New function, moved from gimplify.c.
1505 2020-05-26 Alexandre Oliva <oliva@adacore.com>
1507 * common.opt (aux_base_name): Define.
1508 (dumpbase, dumpdir): Mark as Driver options.
1509 (-dumpbase, -dumpdir): Likewise.
1510 (dumpbase-ext, -dumpbase-ext): New.
1511 (auxbase, auxbase-strip): Drop.
1512 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
1514 (-o): Introduce the notion of primary output, mention it
1515 influences auxiliary and dump output names as well, add
1517 (-save-temps): Adjust, move examples into -dump*.
1518 (-save-temps=cwd, -save-temps=obj): Likewise.
1519 (-fdump-final-insns): Adjust.
1520 * dwarf2out.c (gen_producer_string): Drop auxbase and
1521 auxbase_strip; add dumpbase_ext.
1522 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
1523 (save_temps_prefix, save_temps_length): Drop.
1524 (save_temps_overrides_dumpdir): New.
1525 (dumpdir, dumpbase, dumpbase_ext): New.
1526 (dumpdir_length, dumpdir_trailing_dash_added): New.
1527 (outbase, outbase_length): New.
1528 (The Specs Language): Introduce %". Adjust %b and %B.
1529 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
1530 Precede object file with %w when it's the primary output.
1531 (cpp_debug_options): Do not pass on incoming -dumpdir,
1532 -dumpbase and -dumpbase-ext options; recompute them with
1534 (cc1_options): Drop auxbase with and without compare-debug;
1535 use cpp_debug_options instead of dumpbase. Mark asm output
1536 with %w when it's the primary output.
1537 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
1538 %:replace-exception. Add %:dumps.
1539 (driver_handle_option): Implement -save-temps=*/-dumpdir
1540 mutual overriding logic. Save dumpdir, dumpbase and
1541 dumpbase-ext options. Do not save output_file in
1543 (adds_single_suffix_p): New.
1544 (single_input_file_index): New.
1545 (process_command): Combine output dir, output base name, and
1546 dumpbase into dumpdir and outbase.
1547 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
1548 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
1549 and outbase instead of input_basename in %b, %B and in
1550 -save-temps aux files. Handle empty argument %".
1551 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
1552 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
1553 naming. Spec-quote the computed -fdump-final-insns file name.
1554 (debug_auxbase_opt): Drop.
1555 (compare_debug_self_opt_spec_function): Drop auxbase-strip
1557 (compare_debug_auxbase_opt_spec_function): Drop.
1558 (not_actual_file_p): New.
1559 (replace_extension_spec_func): Drop.
1560 (dumps_spec_func): New.
1561 (convert_white_space): Split-out parts into...
1562 (quote_string, whitespace_to_convert_p): ... these. New.
1563 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
1564 (driver::finalize): Release and reset new variables; drop
1566 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
1567 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
1568 empty string otherwise.
1569 (DUMPBASE_SUFFIX): Drop leading period.
1570 (debug_objcopy): Use concat.
1571 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
1572 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
1573 component. Simplify temp file names.
1574 * opts.c (finish_options): Drop aux base name handling.
1575 (common_handle_option): Drop auxbase-strip handling.
1576 * toplev.c (print_switch_values): Drop auxbase, add
1578 (process_options): Derive aux_base_name from dump_base_name
1580 (lang_dependent_init): Compute dump_base_ext along with
1581 dump_base_name. Disable stack usage and callgraph-info during
1582 lto generation and compare-debug recompilation.
1584 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
1585 Uroš Bizjak <ubizjak@gmail.com>
1589 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
1590 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
1591 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
1592 float<floatunssuffix>v2div2sf2.
1593 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
1594 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
1595 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
1596 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
1597 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
1598 * config/i386/i386-builtin.def: Ditto.
1599 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
1600 subregs when both omode and imode are vector mode and
1601 have the same inner mode.
1603 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
1605 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
1606 Only turn MEM_REFs into bit-field stores for small bit-field regions.
1607 (imm_store_chain_info::output_merged_store): Be prepared for sources
1608 with non-integral type in the bit-field insertion case.
1609 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
1610 the largest size for the bit-field case.
1612 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
1614 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
1615 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
1616 (*vec_dupv4hi): Redefine as define_insn.
1617 Remove alternative with general register input.
1618 (*vec_dupv2si): Ditto.
1620 2020-05-25 Richard Biener <rguenther@suse.de>
1622 PR tree-optimization/95309
1623 * tree-vect-slp.c (vect_get_constant_vectors): Move number
1624 of vector computation ...
1625 (vect_slp_analyze_node_operations): ... to analysis phase.
1627 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
1629 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
1630 * lto-streamer.h (streamer_debugging): New constant
1631 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
1632 streamer_debugging check.
1633 (streamer_get_pickled_tree): Likewise.
1634 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
1636 2020-05-25 Richard Biener <rguenther@suse.de>
1638 PR tree-optimization/95308
1639 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
1640 test for TARGET_MEM_REFs.
1642 2020-05-25 Richard Biener <rguenther@suse.de>
1644 PR tree-optimization/95295
1645 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
1646 RHSes and drop to full sm_other if they are not equal.
1648 2020-05-25 Richard Biener <rguenther@suse.de>
1650 PR tree-optimization/95271
1651 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
1652 children vector type.
1653 (vectorizable_call): Pass down slp ops.
1655 2020-05-25 Richard Biener <rguenther@suse.de>
1657 PR tree-optimization/95297
1658 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
1659 skip updating operand 1 vector type.
1661 2020-05-25 Richard Biener <rguenther@suse.de>
1663 PR tree-optimization/95284
1664 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
1667 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
1670 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
1671 (trunc<mode><sf2dfmode_lower>2) New expander.
1672 (extend<sf2dfmode_lower><mode>2): Ditto.
1674 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
1676 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
1677 ubsan_{data,type},ASAN symbols linker-visible.
1679 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
1681 * lto-streamer-out.c (DFS::DFS): Silence warning.
1683 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
1686 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
1687 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
1689 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
1691 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
1694 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
1696 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
1697 * lto-streamer-out.c (create_output_block): Fix whitespace
1698 (lto_write_tree_1): Add (debug) dump.
1699 (DFS::DFS): Add dump.
1700 (DFS::DFS_write_tree_body): Do not dump here.
1701 (lto_output_tree): Improve dumping; do not stream ref when not needed.
1702 (produce_asm_for_decls): Fix whitespace.
1703 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
1704 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
1706 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
1709 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
1710 (truncv32hiv32qi2): Ditto.
1711 (trunc<ssedoublemodelower><mode>2): Ditto.
1712 (trunc<mode><pmov_dst_3>2): Ditto.
1713 (trunc<mode><pmov_dst_mode_4>2): Ditto.
1714 (truncv2div2si2): Ditto.
1715 (truncv8div8qi2): Ditto.
1716 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
1717 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
1718 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
1719 *avx512vl_<code><mode>v<ssescalarnum>qi2.
1721 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
1724 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
1727 2020-05-22 Richard Biener <rguenther@suse.de>
1729 PR tree-optimization/95268
1730 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
1733 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
1735 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
1738 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
1740 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
1741 (lto_input_scc): Optimize streaming of entry lengths.
1742 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
1743 (DFS::DFS): Optimize stremaing of entry lengths
1745 2020-05-22 Richard Biener <rguenther@suse.de>
1748 * doc/invoke.texi (flto): Document behavior of diagnostic
1751 2020-05-22 Richard Biener <rguenther@suse.de>
1753 * tree-vectorizer.h (vect_is_simple_use): New overload.
1754 (vect_maybe_update_slp_op_vectype): New.
1755 * tree-vect-stmts.c (vect_is_simple_use): New overload
1756 accessing operands of SLP vs. non-SLP operation transparently.
1757 (vect_maybe_update_slp_op_vectype): New function updating
1758 the possibly shared SLP operands vector type.
1759 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
1760 using the new vect_is_simple_use overload; update SLP invariant
1761 operand nodes vector type.
1762 (vectorizable_comparison): Likewise.
1763 (vectorizable_call): Likewise.
1764 (vectorizable_conversion): Likewise.
1765 (vectorizable_shift): Likewise.
1766 (vectorizable_store): Likewise.
1767 (vectorizable_condition): Likewise.
1768 (vectorizable_assignment): Likewise.
1769 * tree-vect-loop.c (vectorizable_reduction): Likewise.
1770 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
1771 present SLP_TREE_VECTYPE and check it matches previous
1774 2020-05-22 Richard Biener <rguenther@suse.de>
1776 PR tree-optimization/95248
1777 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
1779 2020-05-22 Richard Biener <rguenther@suse.de>
1781 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
1782 (_slp_tree::~_slp_tree): Likewise.
1783 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
1785 (_slp_tree::~_slp_tree): Implement.
1786 (vect_free_slp_tree): Simplify.
1787 (vect_create_new_slp_node): Likewise. Add nops parameter.
1788 (vect_build_slp_tree_2): Adjust.
1789 (vect_analyze_slp_instance): Likewise.
1791 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1793 * adjust-alignment.c: Include memmodel.h.
1795 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
1798 * config/i386/cpuid.h: Use hexadecimal in comments.
1800 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
1803 * config/i386/i386-builtins.c (processor_features): Move
1804 F_AVX512VP2INTERSECT after F_AVX512BF16.
1805 (isa_names_table): Likewise.
1807 2020-05-21 Martin Liska <mliska@suse.cz>
1809 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
1810 Handle OPT_moutline_atomics.
1811 * config/aarch64/aarch64.c: Add outline-atomics to
1813 * doc/extend.texi: Document the newly added target attribute.
1815 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
1819 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
1820 operands 1 and 2 commutative. Manually swap operands.
1821 (*mmx_nabsv2sf2): Ditto.
1824 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
1826 * config/i386/i386.md (*<code>tf2_1):
1827 Mark operands 1 and 2 commutative.
1828 (*nabstf2_1): Ditto.
1829 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
1830 commutative. Do not swap operands.
1831 (*nabs<mode>2): Ditto.
1833 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
1836 * config/i386/sse.md (<code>v8qiv8hi2): Use
1837 simplify_gen_subreg instead of simplify_subreg.
1838 (<code>v8qiv8si2): Ditto.
1839 (<code>v4qiv4si2): Ditto.
1840 (<code>v4hiv4si2): Ditto.
1841 (<code>v8qiv8di2): Ditto.
1842 (<code>v4qiv4di2): Ditto.
1843 (<code>v2qiv2di2): Ditto.
1844 (<code>v4hiv4di2): Ditto.
1845 (<code>v2hiv2di2): Ditto.
1846 (<code>v2siv2di2): Ditto.
1848 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
1851 * config/i386/i386.md (*pushsi2_rex64):
1852 Use "e" constraint instead of "i".
1854 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
1856 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
1857 (lto_input_tree_1): Strenghten sanity check.
1858 (lto_input_tree): Update call of lto_input_scc.
1859 * lto-streamer-out.c: Include ipa-utils.h
1860 (create_output_block): Initialize local_trees if merigng is going
1862 (destroy_output_block): Destroy local_trees.
1863 (DFS): Add max_local_entry.
1864 (local_tree_p): New function.
1865 (DFS::DFS): Initialize and maintain it.
1866 (DFS::DFS_write_tree): Decide on streaming format.
1867 (lto_output_tree): Stream inline singleton SCCs
1868 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
1869 (struct output_block): Add local_trees.
1870 (lto_input_scc): Update prototype.
1872 2020-05-20 Patrick Palka <ppalka@redhat.com>
1875 * hash-table.h (hash_table::find_with_hash): Move up the call to
1878 2020-05-20 Martin Liska <mliska@suse.cz>
1880 * lto-compress.c (lto_compression_zstd): Fill up
1881 num_compressed_il_bytes.
1882 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
1884 2020-05-20 Richard Biener <rguenther@suse.de>
1886 PR tree-optimization/95219
1887 * tree-vect-loop.c (vectorizable_induction): Reduce
1888 group_size before computing the number of required IVs.
1890 2020-05-20 Richard Biener <rguenther@suse.de>
1893 * tree-inline.c (remap_gimple_stmt): Revert adjusting
1894 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
1896 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1897 Andre Vieira <andre.simoesdiasvieira@arm.com>
1900 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
1902 (mve_vector_mem_operand): Likewise.
1903 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
1904 the load from memory to a core register is legitimate for give mode.
1905 (mve_vector_mem_operand): Define function.
1906 (arm_print_operand): Modify comment.
1907 (arm_mode_base_reg_class): Define.
1908 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
1909 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
1910 * config/arm/constraints.md (Ux): Likewise.
1912 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
1913 add support for missing Vector Store Register and Vector Load Register.
1914 Add a new alternative to support load from memory to PC (or label) in
1916 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
1917 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
1918 mve_memory_operand and also modify the MVE instructions to emit.
1919 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
1920 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
1921 mve_memory_operand and also modify the MVE instructions to emit.
1922 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
1923 mve_memory_operand and also modify the MVE instructions to emit.
1924 (mve_vldrhq_z_fv8hf): Likewise.
1925 (mve_vldrhq_z_<supf><mode>): Likewise.
1926 (mve_vldrwq_fv4sf): Likewise.
1927 (mve_vldrwq_<supf>v4si): Likewise.
1928 (mve_vldrwq_z_fv4sf): Likewise.
1929 (mve_vldrwq_z_<supf>v4si): Likewise.
1930 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
1931 (mve_vld1q_<supf><mode>): Likewise.
1932 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
1934 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
1935 mve_memory_operand and also modify the MVE instructions to emit.
1936 (mve_vstrhq_p_<supf><mode>): Likewise.
1937 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
1939 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
1940 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
1941 instructions to emit.
1942 (mve_vstrwq_p_<supf>v4si): Likewise.
1943 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
1944 * config/arm/predicates.md (mve_memory_operand): Define.
1946 2020-05-30 Richard Biener <rguenther@suse.de>
1949 * c-fold.c (c_fully_fold_internal): Enhance guard on
1952 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
1955 * Makefile.in (OBJS): Add adjust-alignment.o.
1956 * adjust-alignment.c (pass_data_adjust_alignment): New.
1957 (pass_adjust_alignment): New.
1958 (pass_adjust_alignment::execute): New.
1959 (make_pass_adjust_alignment): New.
1960 * tree-pass.h (make_pass_adjust_alignment): New.
1961 * passes.def: Add pass_adjust_alignment.
1963 2020-05-19 Alex Coplan <alex.coplan@arm.com>
1966 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
1967 identity permutation.
1969 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1971 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
1972 msp430_small, msp430_large and size24plus DejaGNU effective
1974 Improve grammar in descriptions for size20plus and size32plus effective
1977 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
1979 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
1980 callee saved registers only in xBPF.
1981 (bpf_expand_prologue): Save callee saved registers only in xBPF.
1982 (bpf_expand_epilogue): Likewise for restoring.
1983 * doc/invoke.texi (eBPF Options): Document this is activated by
1986 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
1988 * config/bpf/bpf.opt (mxbpf): New option.
1989 * doc/invoke.texi (Option Summary): Add -mxbpf.
1990 (eBPF Options): Document -mxbbpf.
1992 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
1995 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
1996 (<code>v32qiv32hi2): Ditto.
1997 (<code>v8qiv8hi2): Ditto.
1998 (<code>v16qiv16si2): Ditto.
1999 (<code>v8qiv8si2): Ditto.
2000 (<code>v4qiv4si2): Ditto.
2001 (<code>v16hiv16si2): Ditto.
2002 (<code>v8hiv8si2): Ditto.
2003 (<code>v4hiv4si2): Ditto.
2004 (<code>v8qiv8di2): Ditto.
2005 (<code>v4qiv4di2): Ditto.
2006 (<code>v2qiv2di2): Ditto.
2007 (<code>v8hiv8di2): Ditto.
2008 (<code>v4hiv4di2): Ditto.
2009 (<code>v2hiv2di2): Ditto.
2010 (<code>v8siv8di2): Ditto.
2011 (<code>v4siv4di2): Ditto.
2012 (<code>v2siv2di2): Ditto.
2014 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
2016 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
2017 (riscv_implied_info): New.
2018 (riscv_subset_list): Add handle_implied_ext.
2019 (riscv_subset_list::to_string): New parameter version_p to
2020 control output format.
2021 (riscv_subset_list::handle_implied_ext): New.
2022 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
2023 (riscv_arch_str): New parameter version_p to control output format.
2024 (riscv_expand_arch): New.
2025 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
2027 * config/riscv/riscv.h (riscv_expand_arch): New,
2028 (EXTRA_SPEC_FUNCTIONS): Define.
2029 (ASM_SPEC): Transform -march= via riscv_expand_arch.
2031 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
2033 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
2034 parse_multiletter_ext.
2035 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
2036 adjust parsing order for 's' and 'x'.
2038 2020-05-19 Richard Biener <rguenther@suse.de>
2040 * tree-vectorizer.h (_slp_tree::vectype): Add field.
2041 (SLP_TREE_VECTYPE): New.
2042 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
2044 (vect_create_new_slp_node): Likewise.
2045 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
2047 (vect_slp_analyze_node_operations): Walk nodes children for
2049 (vect_get_constant_vectors): Use local scope op variable.
2050 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
2051 (vect_model_simple_cost): Adjust.
2052 (vect_model_store_cost): Likewise.
2053 (vectorizable_store): Likewise.
2055 2020-05-18 Martin Sebor <msebor@redhat.com>
2058 * tree-object-size.c (decl_init_size): New function.
2059 (addr_object_size): Call it.
2060 * tree.h (last_field): Declare.
2061 (first_field): Add attribute nonnull.
2063 2020-05-18 Martin Sebor <msebor@redhat.com>
2066 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
2067 * tree.c (component_ref_size): Correct the handling or array members
2069 Drop a pointless test.
2070 Rename a local variable.
2072 2020-05-18 Jason Merrill <jason@redhat.com>
2074 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
2075 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
2077 2020-05-14 Jason Merrill <jason@redhat.com>
2079 * doc/install.texi (Prerequisites): Update boostrap compiler
2080 requirement to C++11/GCC 4.8.
2082 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2084 PR tree-optimization/94952
2085 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
2086 Initialize variables bitpos, bitregion_start, and bitregion_end in
2087 order to silence warnings about use of uninitialized variables.
2089 2020-05-18 Carl Love <cel@us.ibm.com>
2092 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
2093 first_match_index_<mode>.
2094 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
2095 additional test cases with zero vector elements.
2097 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
2100 * config/i386/i386-expand.c (ix86_expand_int_movcc):
2101 Avoid reversing a non-trapping comparison to a trapping one.
2103 2020-05-18 Alex Coplan <alex.coplan@arm.com>
2105 * config/arm/arm.c (output_move_double): Fix codegen when loading into
2106 a register pair with an odd base register.
2108 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
2110 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
2111 Do not emit FLAGS_REG clobber for TFmode.
2112 * config/i386/i386.md (*<code>tf2_1): Rewrite as
2113 define_insn_and_split. Mark operands 1 and 2 commutative.
2114 (*nabstf2_1): Ditto.
2115 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
2116 Do not swap memory operands. Simplify RTX generation.
2117 (neg abs SSE splitter): Ditto.
2118 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
2119 commutative. Do not swap operands. Simplify RTX generation.
2120 (*nabs<mode>2): Ditto.
2122 2020-05-18 Richard Biener <rguenther@suse.de>
2124 * tree-vect-slp.c (vect_slp_bb): Start after labels.
2125 (vect_get_constant_vectors): Really place init stmt after scalar defs.
2126 * tree-vect-stmts.c (vect_init_vector_1): Insert before
2129 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
2131 * config/i386/driver-i386.c (host_detect_local_cpu): Support
2132 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
2135 2020-05-18 Richard Biener <rguenther@suse.de>
2138 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
2139 when inlining into a non-call EH function.
2141 2020-05-18 Richard Biener <rguenther@suse.de>
2143 PR tree-optimization/95172
2144 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
2145 eventually need the conditional processing.
2146 (execute_sm_exit): When processing an orderd sequence
2147 avoid doing any conditional processing.
2148 (hoist_memory_references): Pass down whether all edges
2149 have ordered processing for a ref to execute_sm.
2151 2020-05-17 Jeff Law <law@redhat.com>
2153 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
2154 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
2155 into a single pattern using pc_or_label_operand.
2156 * config/h8300/combiner.md (bit branch patterns): Likewise.
2157 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
2159 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
2162 * config/i386/i386-features.c (has_non_address_hard_reg):
2164 (pseudo_reg_set): This. Return the SET expression. Ignore
2165 pseudo register push.
2166 (general_scalar_to_vector_candidate_p): Combine single_set and
2167 has_non_address_hard_reg calls to pseudo_reg_set.
2168 (timode_scalar_to_vector_candidate_p): Likewise.
2169 * config/i386/i386.md (*pushv1ti2): New pattern.
2171 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2174 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2176 * tree-vrp.c (operand_less_p): Move to...
2177 * vr-values.c (operand_less_p): ...here.
2178 * tree-vrp.h (operand_less_p): Remove.
2180 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2182 * tree-vrp.c (operand_less_p): Move to...
2183 * vr-values.c (operand_less_p): ...here.
2184 * tree-vrp.h (operand_less_p): Remove.
2186 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2188 * tree-vrp.c (class vrp_insert): Remove prototype for
2191 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2193 * tree-vrp.c (class live_names): New.
2194 (live_on_edge): Move into live_names.
2195 (build_assert_expr_for): Move into vrp_insert.
2196 (find_assert_locations_in_bb): Rename from
2197 find_assert_locations_1.
2198 (process_assert_insertions_for): Move into vrp_insert.
2199 (compare_assert_loc): Same.
2200 (remove_range_assertions): Same.
2201 (dump_asserts_for): Rename to vrp_insert::dump.
2202 (debug_asserts_for): Rename to vrp_insert::debug.
2203 (dump_all_asserts): Rename to vrp_insert::dump.
2204 (debug_all_asserts): Rename to vrp_insert::debug.
2206 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2208 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
2209 check_array_ref, check_mem_ref, and search_for_addr_array
2211 (class array_bounds_checker): ...here.
2212 (class check_array_bounds_dom_walker): Adjust to use
2213 array_bounds_checker.
2214 (check_all_array_refs): Move into array_bounds_checker and rename
2216 (class vrp_folder): Make fold_predicate_in private.
2218 2020-05-15 Jeff Law <law@redhat.com>
2220 * config/h8300/h8300.md (SFI iterator): New iterator for
2222 * config/h8300/peepholes.md (memory comparison): Use mode
2223 iterator to consolidate 3 patterns into one.
2224 (stack allocation and stack store): Handle SFmode. Handle
2227 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
2229 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
2230 RS6000_BTM_POWERPC64.
2232 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
2234 * config/i386/i386.md (SWI48DWI): New mode iterator.
2235 (*push<mode>2): Allow XMM registers.
2236 (*pushdi2_rex64): Ditto.
2237 (*pushsi2_rex64): Ditto.
2239 (push XMM reg splitter): New splitter
2241 (*pushdf) Change "x" operand constraint to "v".
2242 (*pushsf_rex64): Ditto.
2245 2020-05-15 Richard Biener <rguenther@suse.de>
2247 PR tree-optimization/92260
2248 * tree-vect-slp.c (vect_get_constant_vectors): Compute
2249 the number of vector stmts in a canonical way.
2251 2020-05-15 Martin Liska <mliska@suse.cz>
2253 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
2256 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
2258 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
2260 2020-05-15 Richard Biener <rguenther@suse.de>
2262 PR tree-optimization/95133
2263 * gimple-ssa-split-paths.c
2264 (find_block_to_duplicate_for_splitting_paths): Check for
2267 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
2269 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
2271 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
2273 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
2276 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
2277 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
2280 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
2283 * config/i386/i386.md (isa): Add sse3_noavx.
2284 (enabled): Handle sse3_noavx.
2286 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
2287 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
2288 alternatives. Match commutative vec_select selector operands.
2289 (*mmx_haddv2sf3_low): New insn pattern.
2291 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
2292 (*mmx_hsubv2sf3_low): New insn pattern.
2294 2020-05-15 Richard Biener <rguenther@suse.de>
2296 PR tree-optimization/33315
2297 * tree-ssa-sink.c: Include tree-eh.h.
2298 (sink_stats): Add commoned member.
2299 (sink_common_stores_to_bb): New function implementing store
2300 commoning by sinking to the successor.
2301 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
2302 (pass_sink_code::execute): Likewise. Record commoned stores
2305 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
2307 PR rtl-optimization/37451, part of PR target/61837
2308 * loop-doloop.c (doloop_simplify_count): New function. Simplify
2309 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
2310 (doloop_modify): Call doloop_simplify_count.
2312 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
2315 * doc/sourcebuild.texi: Document effective target lgccjit.
2317 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
2319 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
2320 define_expand, and rename the original to ...
2321 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
2322 (add<mode>3_zext_dup_exec): Likewise, with ...
2323 (add<mode>3_vcc_zext_dup_exec): ... this.
2324 (add<mode>3_zext_dup2): Likewise, with ...
2325 (add<mode>3_zext_dup_exec): ... this.
2326 (add<mode>3_zext_dup2_exec): Likewise, with ...
2327 (add<mode>3_zext_dup2): ... this.
2328 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
2329 addv64di3_zext* calls to use addv64di3_vcc_zext*.
2331 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
2334 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
2335 (extendv2sfv2df2): Ditto.
2337 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
2339 * configure: Regenerated.
2341 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
2343 * config/arm/arm.c (reg_needs_saving_p): New function.
2344 (use_return_insn): Use reg_needs_saving_p.
2345 (arm_get_vfp_saved_size): Likewise.
2346 (arm_compute_frame_layout): Likewise.
2347 (arm_save_coproc_regs): Likewise.
2348 (thumb1_expand_epilogue): Likewise.
2349 (arm_expand_epilogue_apcs_frame): Likewise.
2350 (arm_expand_epilogue): Likewise.
2352 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
2354 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
2356 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
2359 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
2361 (floatv2siv2df2): New expander.
2362 (floatunsv2siv2df2): New insn pattern.
2364 (fix_truncv2dfv2si2): New expander.
2365 (fixuns_truncv2dfv2si2): New insn pattern.
2367 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
2370 * config/aarch64/aarch64-sve-builtins.cc
2371 (handle_arm_sve_vector_bits_attribute): Create a copy of the
2372 original type's TYPE_MAIN_VARIANT, then reapply all the differences
2373 between the original type and its main variant.
2375 2020-05-14 Richard Biener <rguenther@suse.de>
2378 * real.c (real_to_decimal_for_mode): Make sure we handle
2379 a zero with nonzero exponent.
2381 2020-05-14 Jakub Jelinek <jakub@redhat.com>
2383 * Makefile.in (GTFILES): Add omp-general.c.
2384 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
2385 calls_declare_variant_alt members and initialize them in the
2387 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
2388 calls to declare_variant_alt nodes.
2389 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
2390 and calls_declare_variant_alt.
2391 (input_overwrite_node): Read them back.
2392 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
2394 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
2396 (tree_function_versioning): Copy calls_declare_variant_alt bit.
2397 * omp-offload.c (execute_omp_device_lower): Call
2398 omp_resolve_declare_variant on direct function calls.
2399 (pass_omp_device_lower::gate): Also enable for
2400 calls_declare_variant_alt functions.
2401 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
2402 (omp_context_selector_matches): Handle the case when
2403 cfun->curr_properties has PROP_gimple_any bit set.
2404 (struct omp_declare_variant_entry): New type.
2405 (struct omp_declare_variant_base_entry): New type.
2406 (struct omp_declare_variant_hasher): New type.
2407 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
2409 (omp_declare_variants): New variable.
2410 (struct omp_declare_variant_alt_hasher): New type.
2411 (omp_declare_variant_alt_hasher::hash,
2412 omp_declare_variant_alt_hasher::equal): New methods.
2413 (omp_declare_variant_alt): New variables.
2414 (omp_resolve_late_declare_variant): New function.
2415 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
2416 when called late. Create a magic declare_variant_alt fndecl and
2417 cgraph node and return that if decision needs to be deferred until
2418 after gimplification.
2419 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
2423 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
2424 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
2425 entry block if info->after_stmt is NULL, otherwise add after that stmt
2426 and update it after adding each stmt.
2427 (ipa_simd_modify_function_body): Initialize info.after_stmt.
2429 * function.h (struct function): Add has_omp_target bit.
2430 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
2432 (omp_discover_declare_target_tgt_fn_r): ... this.
2433 (omp_discover_declare_target_var_r): Call
2434 omp_discover_declare_target_tgt_fn_r instead of
2435 omp_discover_declare_target_fn_r.
2436 (omp_discover_implicit_declare_target): Also queue functions with
2437 has_omp_target bit set, for those walk with
2438 omp_discover_declare_target_fn_r, for declare target to functions
2439 walk with omp_discover_declare_target_tgt_fn_r.
2441 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
2444 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
2445 Add SSE/AVX alternative. Change operand predicates from
2446 nonimmediate_operand to register_mmxmem_operand.
2447 Enable instruction pattern for TARGET_MMX_WITH_SSE.
2448 (fix_truncv2sfv2si2): New expander.
2449 (fixuns_truncv2sfv2si2): New insn pattern.
2451 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
2452 Add SSE/AVX alternative. Change operand predicates from
2453 nonimmediate_operand to register_mmxmem_operand.
2454 Enable instruction pattern for TARGET_MMX_WITH_SSE.
2455 (floatv2siv2sf2): New expander.
2456 (floatunsv2siv2sf2): New insn pattern.
2458 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
2460 (IX86_BUILTIN_PI2FD): Ditto.
2462 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
2464 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
2466 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
2469 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
2471 * config/s390/s390.c (allocate_stack_space): Add missing updates
2472 of last_probe_offset.
2474 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
2476 * config/s390/s390.md ("allocate_stack"): Call
2477 anti_adjust_stack_and_probe_stack_clash when stack clash
2478 protection is enabled.
2479 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
2480 prototype. Remove static.
2481 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
2484 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
2486 * config/rs6000/altivec.h (vec_extractl): New #define.
2487 (vec_extracth): Likewise.
2488 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
2489 (UNSPEC_EXTRACTR): Likewise.
2490 (vextractl<mode>): New expansion.
2491 (vextractl<mode>_internal): New insn.
2492 (vextractr<mode>): New expansion.
2493 (vextractr<mode>_internal): New insn.
2494 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
2495 New built-in function.
2496 (__builtin_altivec_vextduhvlx): Likewise.
2497 (__builtin_altivec_vextduwvlx): Likewise.
2498 (__builtin_altivec_vextddvlx): Likewise.
2499 (__builtin_altivec_vextdubvhx): Likewise.
2500 (__builtin_altivec_vextduhvhx): Likewise.
2501 (__builtin_altivec_vextduwvhx): Likewise.
2502 (__builtin_altivec_vextddvhx): Likewise.
2503 (__builtin_vec_extractl): New overloaded built-in function.
2504 (__builtin_vec_extracth): Likewise.
2505 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
2506 Define overloaded forms of __builtin_vec_extractl and
2507 __builtin_vec_extracth.
2508 (builtin_function_type): Add cases to mark arguments of new
2509 built-in functions as unsigned.
2510 (rs6000_common_init_builtins): Add
2511 opaque_ftype_opaque_opaque_opaque_opaque.
2512 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
2513 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
2514 for a Future Architecture): Add description of vec_extractl and
2515 vec_extractr built-in functions.
2517 2020-05-13 Richard Biener <rguenther@suse.de>
2519 * target.def (add_stmt_cost): Add new vectype parameter.
2520 * targhooks.c (default_add_stmt_cost): Adjust.
2521 * targhooks.h (default_add_stmt_cost): Likewise.
2522 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
2524 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
2525 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
2526 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
2528 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
2529 (dump_stmt_cost): Add new vectype parameter.
2530 (add_stmt_cost): Likewise.
2531 (record_stmt_cost): Likewise.
2532 (record_stmt_cost): Add overload with old signature.
2533 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
2535 (vect_get_known_peeling_cost): Likewise.
2536 (vect_estimate_min_profitable_iters): Likewise.
2537 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
2538 * tree-vect-stmts.c (record_stmt_cost): Likewise.
2539 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
2540 and pass down correct vectype and NULL stmt_info.
2541 (vect_model_simple_cost): Adjust.
2542 (vect_model_store_cost): Likewise.
2544 2020-05-13 Richard Biener <rguenther@suse.de>
2546 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
2547 (_slp_instance::group_size): Likewise.
2548 * tree-vect-loop.c (vectorizable_reduction): The group size
2549 is the number of lanes in the node.
2550 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
2551 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
2552 verify it matches the instance trees number of lanes.
2553 (vect_slp_analyze_node_operations_1): Use the numer of lanes
2554 in the node as group size.
2555 (vect_bb_vectorization_profitable_p): Use the instance root
2556 number of lanes for the size of life.
2557 (vect_schedule_slp_instance): Use the number of lanes as
2559 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
2560 parameter. Use the number of lanes of the load for the group
2561 size in the gap adjustment code.
2562 (vect_analyze_stmt): Adjust.
2563 (vect_transform_stmt): Likewise.
2565 2020-05-13 Jakub Jelinek <jakub@redhat.com>
2568 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
2569 if the last insn is a note.
2571 PR tree-optimization/95060
2572 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
2573 if it is the single use of the FMA internal builtin.
2575 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
2577 PR tree-optimization/94969
2578 * tree-data-dependence.c (constant_access_functions): Rename to...
2579 (invariant_access_functions): ...this. Add parameter. Check for
2580 invariant access function, rather than constant.
2581 (build_classic_dist_vector): Call above function.
2582 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
2584 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
2587 * doc/extend.texi (x86Operandmodifiers): Document more x86
2589 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
2591 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
2593 * tree-vrp.c (class vrp_insert): New.
2594 (insert_range_assertions): Move to class vrp_insert.
2595 (dump_all_asserts): Same as above.
2596 (dump_asserts_for): Same as above.
2597 (live): Same as above.
2598 (need_assert_for): Same as above.
2599 (live_on_edge): Same as above.
2600 (finish_register_edge_assert_for): Same as above.
2601 (find_switch_asserts): Same as above.
2602 (find_assert_locations): Same as above.
2603 (find_assert_locations_1): Same as above.
2604 (find_conditional_asserts): Same as above.
2605 (process_assert_insertions): Same as above.
2606 (register_new_assert_for): Same as above.
2607 (vrp_prop): New variable fun.
2608 (vrp_initialize): New parameter.
2609 (identify_jump_threads): Same as above.
2610 (execute_vrp): Same as above.
2613 2020-05-12 Keith Packard <keith.packard@sifive.com>
2615 * config/riscv/riscv.c (riscv_unique_section): New.
2616 (TARGET_ASM_UNIQUE_SECTION): New.
2618 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
2620 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
2621 * config/riscv/riscv-passes.def: New file.
2622 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
2623 * config/riscv/riscv-shorten-memrefs.c: New file.
2624 * config/riscv/riscv.c (tree-pass.h): New include.
2625 (riscv_compressed_reg_p): New Function
2626 (riscv_compressed_lw_offset_p): Likewise.
2627 (riscv_compressed_lw_address_p): Likewise.
2628 (riscv_shorten_lw_offset): Likewise.
2629 (riscv_legitimize_address): Attempt to convert base + large_offset
2630 to compressible new_base + small_offset.
2631 (riscv_address_cost): Make anticipated compressed load/stores
2632 cheaper for code size than uncompressed load/stores.
2633 (riscv_register_priority): Move compressed register check to
2634 riscv_compressed_reg_p.
2635 * config/riscv/riscv.h (C_S_BITS): Define.
2636 (CSW_MAX_OFFSET): Define.
2637 * config/riscv/riscv.opt (mshorten-memefs): New option.
2638 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
2639 (PASSES_EXTRA): Add riscv-passes.def.
2640 * doc/invoke.texi: Document -mshorten-memrefs.
2642 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
2643 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
2644 * doc/tm.texi: Regenerate.
2645 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
2646 * sched-deps.c (attempt_change): Use old address if it is cheaper than
2648 * target.def (new_address_profitable_p): New hook.
2649 * targhooks.c (default_new_address_profitable_p): New function.
2650 * targhooks.h (default_new_address_profitable_p): Declare.
2652 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
2655 * config/i386/mmx.md (copysignv2sf3): New expander.
2656 (xorsignv2sf3): Ditto.
2657 (signbitv2sf3): Ditto.
2659 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
2662 * config/i386/mmx.md (fmav2sf4): New insn pattern.
2667 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
2669 * Makefile.in (CET_HOST_FLAGS): New.
2670 (COMPILER): Add $(CET_HOST_FLAGS).
2671 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
2672 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
2674 * aclocal.m4: Regenerated.
2675 * configure: Likewise.
2677 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
2680 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
2681 (*mmx_<code>v2sf2): New insn_and_split pattern.
2682 (*mmx_nabsv2sf2): Ditto.
2683 (*mmx_andnotv2sf3): New insn pattern.
2684 (*mmx_<code>v2sf3): Ditto.
2685 * config/i386/i386.md (absneg_op): New code attribute.
2686 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
2687 (ix86_build_signbit_mask): Ditto.
2689 2020-05-12 Richard Biener <rguenther@suse.de>
2691 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
2694 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2696 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
2697 Update prototype to include "local" argument.
2698 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
2699 "local" argument. Handle local common decls.
2700 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
2701 msp430_output_aligned_decl_common call with 0 for "local" argument.
2702 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
2704 2020-05-12 Richard Biener <rguenther@suse.de>
2706 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
2708 2020-05-12 Martin Liska <mliska@suse.cz>
2712 * sanopt.c (sanitize_rewrite_addressable_params):
2713 Clear DECL_NOT_GIMPLE_REG_P for argument.
2715 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
2717 PR tree-optimization/94980
2718 * tree-vect-generic.c (expand_vector_comparison): Use
2719 vector_element_bits_tree to get the element size in bits,
2720 rather than using TYPE_SIZE.
2721 (expand_vector_condition, vector_element): Likewise.
2723 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
2725 PR tree-optimization/94980
2726 * tree-vect-generic.c (build_replicated_const): Take the number
2727 of bits as a parameter, instead of the type of the elements.
2728 (do_plus_minus): Update accordingly, using vector_element_bits
2729 to calculate the correct number of bits.
2730 (do_negate): Likewise.
2732 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
2734 PR tree-optimization/94980
2735 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
2736 * tree.c (vector_element_bits, vector_element_bits_tree): New.
2737 * match.pd: Use the new functions instead of determining the
2738 vector element size directly from TYPE_SIZE(_UNIT).
2739 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
2740 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
2741 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
2742 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
2743 (expand_vector_conversion): Likewise.
2744 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
2745 a divisor. Convert the dividend to bits to compensate.
2746 * tree-vect-loop.c (vectorizable_live_operation): Call
2747 vector_element_bits instead of open-coding it.
2749 2020-05-12 Jakub Jelinek <jakub@redhat.com>
2751 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
2752 * omp-offload.c: Include context.h.
2753 (omp_declare_target_fn_p, omp_declare_target_var_p,
2754 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
2755 omp_discover_implicit_declare_target): New functions.
2756 * cgraphunit.c (analyze_functions): Call
2757 omp_discover_implicit_declare_target.
2759 2020-05-12 Richard Biener <rguenther@suse.de>
2761 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
2762 literal constant &MEM[..] to a constant literal.
2764 2020-05-12 Richard Biener <rguenther@suse.de>
2766 PR tree-optimization/95045
2767 * dbgcnt.def (lim): Add debug-counter.
2768 * tree-ssa-loop-im.c: Include dbgcnt.h.
2769 (find_refs_for_sm): Use lim debug counter for store motion
2771 (do_store_motion): Rename form store_motion. Commit edge
2773 (store_motion_loop): ... here.
2774 (tree_ssa_lim): Adjust.
2776 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
2778 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
2779 (vec_ctzm): Rename to vec_cnttzm.
2780 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
2781 Change fourth operand for vec_ternarylogic to require
2782 compatibility with unsigned SImode rather than unsigned QImode.
2783 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
2784 Remove overloaded forms of vec_gnb that are no longer needed.
2785 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
2786 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
2787 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
2788 vec_gnb; move vec_ternarylogic documentation into this section
2789 and replace const unsigned char with const unsigned int as its
2792 2020-05-11 Carl Love <cel@us.ibm.com>
2794 * config/rs6000/altivec.h (vec_genpcvm): New #define.
2795 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
2797 (XXGENPCVM_V8HI): Likewise.
2798 (XXGENPCVM_V4SI): Likewise.
2799 (XXGENPCVM_V2DI): Likewise.
2800 (XXGENPCVM): New overloaded built-in instantiation.
2801 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
2802 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
2803 (altivec_expand_builtin): Add special handling for
2804 FUTURE_BUILTIN_VEC_XXGENPCVM.
2805 (builtin_function_type): Add handling for
2806 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
2807 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
2808 (UNSPEC_XXGENPCV): New constant.
2809 (xxgenpcvm_<mode>_internal): New insn.
2810 (xxgenpcvm_<mode>): New expansion.
2811 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
2813 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
2815 * config/rs6000/altivec.h (vec_strir): New #define.
2816 (vec_stril): Likewise.
2817 (vec_strir_p): Likewise.
2818 (vec_stril_p): Likewise.
2819 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
2820 (UNSPEC_VSTRIL): Likewise.
2821 (vstrir_<mode>): New expansion.
2822 (vstrir_code_<mode>): New insn.
2823 (vstrir_p_<mode>): New expansion.
2824 (vstrir_p_code_<mode>): New insn.
2825 (vstril_<mode>): New expansion.
2826 (vstril_code_<mode>): New insn.
2827 (vstril_p_<mode>): New expansion.
2828 (vstril_p_code_<mode>): New insn.
2829 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
2830 New built-in function.
2831 (__builtin_altivec_vstrihr): Likewise.
2832 (__builtin_altivec_vstribl): Likewise.
2833 (__builtin_altivec_vstrihl): Likewise.
2834 (__builtin_altivec_vstribr_p): Likewise.
2835 (__builtin_altivec_vstrihr_p): Likewise.
2836 (__builtin_altivec_vstribl_p): Likewise.
2837 (__builtin_altivec_vstrihl_p): Likewise.
2838 (__builtin_vec_strir): New overloaded built-in function.
2839 (__builtin_vec_stril): Likewise.
2840 (__builtin_vec_strir_p): Likewise.
2841 (__builtin_vec_stril_p): Likewise.
2842 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
2843 Define overloaded forms of __builtin_vec_strir,
2844 __builtin_vec_stril, __builtin_vec_strir_p, and
2845 __builtin_vec_stril_p.
2846 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
2847 for a Future Architecture): Add description of vec_stril,
2848 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
2850 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
2852 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
2853 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
2855 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
2856 * config/rs6000/rs6000-builtin.def: Add handling of new macro
2858 (BU_FUTURE_V_4): New macro. Use it.
2859 (BU_FUTURE_OVERLOAD_4): Likewise.
2860 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
2861 handling for quaternary built-in functions.
2862 (altivec_resolve_overloaded_builtin): Add special-case handling
2863 for __builtin_vec_xxeval.
2864 * config/rs6000/rs6000-call.c: Add handling of new macro
2865 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
2866 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
2867 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
2868 (altivec_overloaded_builtins): Add definitions for
2869 FUTURE_BUILTIN_VEC_XXEVAL.
2870 (bdesc_4arg): New array.
2871 (htm_expand_builtin): Add handling for quaternary built-in
2873 (rs6000_expand_quaternop_builtin): New function.
2874 (rs6000_expand_builtin): Add handling for quaternary built-in
2876 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
2877 for unsigned QImode and unsigned HImode.
2878 (builtin_quaternary_function_type): New function.
2879 (rs6000_common_init_builtins): Add handling of quaternary
2881 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
2883 (RS6000_BTC_PREDICATE): Change value of constant.
2884 (RS6000_BTC_ABS): Likewise.
2885 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
2886 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
2887 for a Future Architecture): Add description of vec_ternarylogic
2890 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
2892 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
2894 (__builtin_pextd): Likewise.
2895 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
2896 (UNSPEC_PEXTD): Likewise.
2899 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
2900 a Future Architecture): Add descriptions of __builtin_pdepd and
2901 __builtin_pextd functions.
2903 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
2905 * config/rs6000/altivec.h (vec_clrl): New #define.
2906 (vec_clrr): Likewise.
2907 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
2908 (UNSPEC_VCLRRB): Likewise.
2911 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
2913 (__builtin_altivec_vclrrb): Likewise.
2914 (__builtin_vec_clrl): New overloaded built-in function.
2915 (__builtin_vec_clrr): Likewise.
2916 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
2917 Define overloaded forms of __builtin_vec_clrl and
2919 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
2920 for a Future Architecture): Add descriptions of vec_clrl and
2923 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
2925 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
2926 built-in function definition.
2927 (__builtin_cnttzdm): Likewise.
2928 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
2929 (UNSPEC_CNTTZDM): Likewise.
2930 (cntlzdm): New insn.
2931 (cnttzdm): Likewise.
2932 * doc/extend.texi (Basic PowerPC Built-in Functions available for
2933 a Future Architecture): Add descriptions of __builtin_cntlzdm and
2934 __builtin_cnttzdm functions.
2936 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
2939 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
2941 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
2943 * config/rs6000/altivec.h (vec_cfuge): New #define.
2944 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
2945 (vcfuged): New insn.
2946 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
2947 New built-in function.
2948 * config/rs6000/rs6000-call.c (builtin_function_type): Add
2949 handling for FUTURE_BUILTIN_VCFUGED case.
2950 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
2951 for a Future Architecture): Add description of vec_cfuge built-in
2954 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
2956 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
2958 (BU_FUTURE_MISC_1): Likewise.
2959 (BU_FUTURE_MISC_2): Likewise.
2960 (BU_FUTURE_MISC_3): Likewise.
2961 (__builtin_cfuged): New built-in function definition.
2962 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
2964 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
2965 a Future Architecture): New subsubsection.
2967 2020-05-11 Richard Biener <rguenther@suse.de>
2969 PR tree-optimization/95049
2970 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
2971 between different constants.
2973 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
2975 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
2977 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
2978 Bill Schmidt <wschmidt@linux.ibm.com>
2980 * config/rs6000/altivec.h (vec_gnb): New #define.
2981 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
2983 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
2985 (BU_FUTURE_OVERLOAD_2): Likewise.
2986 (BU_FUTURE_OVERLOAD_3): Likewise.
2987 (__builtin_altivec_gnb): New built-in function.
2988 (__buiiltin_vec_gnb): New overloaded built-in function.
2989 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
2990 Define overloaded forms of __builtin_vec_gnb.
2991 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
2992 of __builtin_vec_gnb.
2993 (builtin_function_type): Mark return value and arguments unsigned
2994 for FUTURE_BUILTIN_VGNB.
2995 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
2996 for a Future Architecture): Add description of vec_gnb built-in
2999 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3000 Bill Schmidt <wschmidt@linux.ibm.com>
3002 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
3004 (vec_pext): Likewise.
3005 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
3006 (UNSPEC_VPEXTD): Likewise.
3009 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
3011 (__builtin_altivec_vpextd): Likewise.
3012 * config/rs6000/rs6000-call.c (builtin_function_type): Add
3013 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
3015 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
3016 for a Future Architecture): Add description of vec_pdep and
3017 vec_pext built-in functions.
3019 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3020 Bill Schmidt <wschmidt@linux.ibm.com>
3022 * config/rs6000/altivec.h (vec_clzm): New macro.
3023 (vec_ctzm): Likewise.
3024 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
3025 (UNSPEC_VCTZDM): Likewise.
3028 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
3029 (BU_FUTURE_V_1): Likewise.
3030 (BU_FUTURE_V_2): Likewise.
3031 (BU_FUTURE_V_3): Likewise.
3032 (__builtin_altivec_vclzdm): New builtin definition.
3033 (__builtin_altivec_vctzdm): Likewise.
3034 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
3035 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
3037 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
3038 value and parameter types to be unsigned for VCLZDM and VCTZDM.
3039 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
3040 support for TARGET_FUTURE flag.
3041 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
3042 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
3043 for a Future Architecture): New subsubsection.
3045 2020-05-11 Richard Biener <rguenther@suse.de>
3047 PR tree-optimization/94988
3048 PR tree-optimization/95025
3049 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
3050 (sm_seq_push_down): Take extra parameter denoting where we
3052 (execute_sm_exit): Re-issue sm_other stores in the correct
3054 (sm_seq_valid_bb): When always executed, allow sm_other to
3055 prevail inbetween sm_ord and record their stored value.
3056 (hoist_memory_references): Adjust refs_not_supported propagation
3057 and prune sm_other from the end of the ordered sequences.
3059 2020-05-11 Felix Yang <felix.yang@huawei.com>
3062 * config/aarch64/aarch64.md (mov<mode>):
3063 Bitcasts to the equivalent integer mode using gen_lowpart
3064 instead of doing FAIL for scalar floating point move.
3066 2020-05-11 Alex Coplan <alex.coplan@arm.com>
3068 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
3069 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
3070 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
3071 (*csinv3_uxtw_insn2): New.
3072 (*csinv3_uxtw_insn3): New.
3073 * config/aarch64/iterators.md (neg_not_cs): New.
3075 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
3078 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
3079 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
3080 (*mmx_addv2sf3): Ditto.
3081 (*mmx_subv2sf3): Ditto.
3082 (*mmx_mulv2sf3): Ditto.
3083 (*mmx_<code>v2sf3): Ditto.
3084 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
3086 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
3089 * config/i386/i386.c (ix86_vector_mode_supported_p):
3090 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
3091 * config/i386/mmx.md (*mov<mode>_internal): Do not set
3092 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
3094 (mmx_addv2sf3): Change operand predicates from
3095 nonimmediate_operand to register_mmxmem_operand.
3096 (addv2sf3): New expander.
3097 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
3098 predicates from nonimmediate_operand to register_mmxmem_operand.
3099 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3101 (mmx_subv2sf3): Change operand predicate from
3102 nonimmediate_operand to register_mmxmem_operand.
3103 (mmx_subrv2sf3): Ditto.
3104 (subv2sf3): New expander.
3105 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
3106 predicates from nonimmediate_operand to register_mmxmem_operand.
3107 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3109 (mmx_mulv2sf3): Change operand predicates from
3110 nonimmediate_operand to register_mmxmem_operand.
3111 (mulv2sf3): New expander.
3112 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
3113 predicates from nonimmediate_operand to register_mmxmem_operand.
3114 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3116 (mmx_<code>v2sf3): Change operand predicates from
3117 nonimmediate_operand to register_mmxmem_operand.
3118 (<code>v2sf3): New expander.
3119 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
3120 predicates from nonimmediate_operand to register_mmxmem_operand.
3121 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3122 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
3124 2020-05-11 Martin Liska <mliska@suse.cz>
3127 * common.opt: Fix typo in option description.
3129 2020-05-11 Martin Liska <mliska@suse.cz>
3131 PR gcov-profile/94928
3132 * gcov-io.h: Add caveat about coverage format parsing and
3133 possible outdated documentation.
3135 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
3137 PR tree-optimization/83403
3138 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
3139 determine_value_range, Add fold conversion of MULT_EXPR, fix the
3142 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
3144 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
3145 __ILP32__ for 32-bit targets.
3147 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
3149 * tree.h (expr_align): Delete.
3150 * tree.c (expr_align): Likewise.
3152 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
3154 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
3155 from end_of_function_needs.
3157 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
3158 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
3160 * config/cris/t-elfmulti: Remove crisv32 multilib.
3161 * config/cris: Remove shared-library and CRIS v32 support.
3163 Move trivially from cc0 to reg:CC model, removing most optimizations.
3164 * config/cris/cris.md: Remove all side-effect patterns and their
3165 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
3166 to all but post-reload control-flow and movem insns. Remove
3167 constraints on all modified expanders. Remove obsoleted cc0-related
3169 (attr "cc"): Remove alternative "rev".
3170 (mode_iterator BWDD, DI_, SI_): New.
3171 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
3172 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
3173 ("mstep_shift", "mstep_mul"): Remove patterns.
3174 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
3175 * config/cris/cris.c: Change all non-condition-code,
3176 non-control-flow emitted insns to add a parallel with clobber of
3177 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
3178 emit_insn to use of emit_move_insn, gen_add2_insn or
3179 cris_emit_insn, as convenient.
3180 (cris_reg_overlap_mentioned_p)
3181 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
3182 (cris_movem_load_rest_p): Don't assume all elements in a
3184 (cris_store_multiple_op_p): Ditto.
3185 (cris_emit_insn): New function.
3186 * cris/cris-protos.h (cris_emit_insn): Declare.
3189 * config/cris/cris.md (zcond): New code_iterator.
3190 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
3192 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
3194 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
3196 * config/cris/cris.md ("movsi"): For memory destination
3197 post-reload, generate clobberless variant. Similarly for a
3198 zero-source post-reload.
3199 ("*mov_tomem<mode>_split"): New split.
3200 ("*mov_tomem<mode>"): New insn.
3201 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
3202 "Q>m" for less-than-SImode.
3203 ("*mov_fromzero<mode>_split"): New split.
3204 ("*mov_fromzero<mode>"): New insn.
3206 Prepare for cmpelim pass to eliminate redundant compare insns.
3207 * config/cris/cris-modes.def: New file.
3208 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
3209 (cris_notice_update_cc): Remove left-over declaration.
3210 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
3211 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
3212 * config/cris/cris.h (SELECT_CC_MODE): Define.
3213 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
3215 (cond): New code_iterator.
3216 (nzcond): Replacement for incorrect ncond. All callers changed.
3217 (nzvccond): Replacement for ocond. All callers changed.
3218 (rnzcond): Replacement for rcond. All callers changed.
3219 (xCC): New code_attr.
3220 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
3222 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
3223 CCmode with iteration over NZVCSET.
3224 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
3226 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
3227 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
3228 ("*btst<mode>"): Similarly, from "*btst".
3229 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
3230 iterating over cond instead of matching the comparison with
3231 ordered_comparison_operator.
3232 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
3233 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
3235 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
3236 NZVCUSE. Remove FIXME.
3237 ("*b<nzcond:code>_reversed<mode>"): Similarly from
3238 "*b<ncond:code>_reversed", over NZUSE.
3239 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
3240 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
3241 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
3242 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
3243 depending on CC_NZmode vs. CCmode. Remove FIXME.
3244 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
3245 "*b<rcond:code>_reversed", over NZUSE.
3246 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
3247 iterating over cond instead of matching the comparison with
3248 ordered_comparison_operator.
3249 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
3250 iterating over NZUSE.
3251 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
3252 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
3253 depending on CC_NZmode vs. CCmode.
3254 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
3255 NZVCUSE. Remove FIXME.
3256 ("cc"): Comment on new use.
3257 ("cc_enabled"): New attribute.
3258 ("enabled"): Make default fall back to cc_enabled.
3259 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
3260 default_subst_attrs.
3261 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
3262 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
3263 "*movsi_internal". Correct contents of, and rename attribute
3264 "cc" to "cc<cccc><ccnz><ccnzvc>".
3265 ("anz", "anzvc", "acc"): New define_subst_attrs.
3266 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
3267 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
3268 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
3269 "movqi". Correct contents of, and rename "cc" attribute to
3270 "cc<cccc><ccnz><ccnzvc>".
3271 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
3272 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
3273 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
3274 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
3275 Rename from "extend<mode>si2".
3276 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
3277 Similar, from "zero_extend<mode>si2".
3278 ("*adddi3<setnz>"): Rename from "*adddi3".
3279 ("*subdi3<setnz>"): Similarly from "*subdi3".
3280 ("*addsi3<setnz>"): Similarly from "*addsi3".
3281 ("*subsi3<setnz>"): Similarly from "*subsi3".
3282 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
3283 "cc" attribute to "cc<ccnz>".
3284 ("*addqi3<setnz>"): Similarly from "*addqi3".
3285 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
3286 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
3288 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
3289 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
3290 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
3291 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
3292 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
3293 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
3294 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
3295 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
3297 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
3299 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
3301 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
3303 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
3305 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
3307 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
3308 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
3309 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
3310 (znnCC, rznnCC): New code_attrs.
3311 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
3312 obseolete comment. Add belt-and-suspenders mode-test to condition.
3313 Add fixme regarding remaining matched-but-not-generated case.
3314 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
3315 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
3316 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
3317 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
3318 Handle output of CC_ZnNmode.
3319 ("*b<nzcond:code>_reversed<mode>"): Ditto.
3321 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
3322 NEG too. Correct comment.
3323 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
3326 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
3328 * ira-color.c (update_costs_from_allocno): Remove
3329 conflict_cost_update_p argument. Propagate costs only along
3330 threads. Always do conflict cost update. Add printing debugging
3332 (update_costs_from_copies): Add printing debugging info.
3333 (restore_costs_from_copies): Ditto.
3334 (assign_hard_reg): Improve debug info.
3335 (push_only_colorable): Ditto. Call update_costs_from_prefs.
3336 (color_allocnos): Remove update_costs_from_prefs.
3338 2020-05-08 Richard Biener <rguenther@suse.de>
3340 * tree-vectorizer.h (vec_info::slp_loads): New.
3341 (vect_optimize_slp): Declare.
3342 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
3343 nothing when there are no loads.
3344 (vect_gather_slp_loads): Gather loads into a vector.
3345 (vect_supported_load_permutation_p): Remove.
3346 (vect_analyze_slp_instance): Do not verify permutation
3348 (vect_analyze_slp): Optimize permutations of reductions
3349 after all SLP instances have been gathered and gather
3351 (vect_optimize_slp): New function split out from
3352 vect_supported_load_permutation_p. Elide some permutations.
3353 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
3354 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
3355 * tree-vect-stmts.c (vectorizable_load): Check whether
3356 the load can be permuted. When generating code assert we can.
3358 2020-05-08 Richard Biener <rguenther@suse.de>
3360 * tree-ssa-sccvn.c (rpo_avail): Change type to
3361 eliminate_dom_walker *.
3362 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
3363 use the DOM walker availability.
3364 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
3365 with vn_valueize as valueization callback.
3366 (vn_reference_maybe_forwprop_address): Likewise.
3367 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
3368 array_ref_low_bound.
3370 2020-05-08 Jakub Jelinek <jakub@redhat.com>
3372 PR tree-optimization/94786
3373 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
3377 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
3381 * tree.c (get_narrower): Reuse the op temporary instead of
3384 PR tree-optimization/94783
3385 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
3388 PR tree-optimization/94956
3389 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
3390 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
3392 PR tree-optimization/94913
3393 * match.pd (A - B + -1 >= A to B >= A): New simplification.
3394 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
3395 true for TYPE_UNSIGNED integral types.
3398 PR rtl-optimization/94516
3399 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
3401 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
3402 Call df_notes_rescan if that argument is not true and returning true.
3403 * combine.c (adjust_for_new_dest): Pass true as second argument to
3404 remove_reg_equal_equiv_notes.
3405 * postreload.c (reload_combine_recognize_pattern): Don't call
3408 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
3410 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
3412 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
3413 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
3414 (*neg_ne_<mode>): Likewise.
3416 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
3418 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
3420 (*setbcr_<un>signed_<GPR:mode>): Likewise.
3421 (cstore<mode>4): Use setbc[r] if available.
3422 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
3423 (eq<mode>3): Use setbc for TARGET_FUTURE.
3424 (*eq<mode>3): Avoid for TARGET_FUTURE.
3425 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
3426 else for non-Pmode, use gen_eq and gen_xor.
3427 (*ne<mode>3): Avoid for TARGET_FUTURE.
3428 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
3430 2020-05-07 Jeff Law <law@redhat.com>
3432 * config/h8300/h8300.md: Move expanders and patterns into
3433 files based on functionality.
3434 * config/h8300/addsub.md: New file.
3435 * config/h8300/bitfield.md: New file
3436 * config/h8300/combiner.md: New file
3437 * config/h8300/divmod.md: New file
3438 * config/h8300/extensions.md: New file
3439 * config/h8300/jumpcall.md: New file
3440 * config/h8300/logical.md: New file
3441 * config/h8300/movepush.md: New file
3442 * config/h8300/multiply.md: New file
3443 * config/h8300/other.md: New file
3444 * config/h8300/proepi.md: New file
3445 * config/h8300/shiftrotate.md: New file
3446 * config/h8300/testcompare.md: New file
3448 * config/h8300/h8300.md (adds/subs splitters): Merge into single
3450 (negation expanders and patterns): Simplify and combine using
3452 (one_cmpl expanders and patterns): Likewise.
3453 (tablejump, indirect_jump patterns ): Likewise.
3454 (shift and rotate expanders and patterns): Likewise.
3455 (absolute value expander and pattern): Drop expander, rename pattern
3457 (peephole2 patterns): Move into...
3458 * config/h8300/peepholes.md: New file.
3460 * config/h8300/constraints.md (L and N): Simplify now that we're not
3461 longer supporting the original H8/300 chip.
3462 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
3463 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
3464 (shift_alg_hi, shift_alg_si): Similarly.
3465 (h8300_option_overrides): Similarly. Default to H8/300H. If
3466 compiling for H8/S, then turn off H8/300H. Do not update the
3467 shift_alg tables for H8/300 port.
3468 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
3470 (push, split_adds_subs, h8300_rtx_costs): Likewise.
3471 (h8300_print_operand, compute_mov_length): Likewise.
3472 (output_plussi, compute_plussi_length): Likewise.
3473 (compute_plussi_cc, output_logical_op): Likewise.
3474 (compute_logical_op_length, compute_logical_op_cc): Likewise.
3475 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
3476 (output_a_shift, compute_a_shift_length): Likewise.
3477 (output_a_rotate, compute_a_rotate_length): Likewise.
3478 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
3479 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
3480 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
3481 (attr_cpu, TARGET_H8300): Remove.
3482 (TARGET_DEFAULT): Update.
3483 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
3484 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
3485 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
3486 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
3487 * config/h8300/h8300.md: Simplify patterns throughout.
3488 * config/h8300/t-h8300: Update multilib configuration.
3490 * config/h8300/h8300.h (LINK_SPEC): Remove.
3491 (USER_LABEL_PREFIX): Likewise.
3493 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
3494 (h8300_option_override): Remove remnants of COFF support.
3496 2020-05-07 Alan Modra <amodra@gmail.com>
3498 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
3499 set_rtx_cost with set_src_cost.
3500 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
3502 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
3504 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
3505 redundant half vector handlings for no peeling gaps.
3507 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
3509 * tree-ssa-operands.c (operands_scanner): New class.
3510 (operands_bitmap_obstack): Remove.
3511 (n_initialized): Remove.
3512 (build_uses): Move to operands_scanner class.
3513 (build_vuse): Same as above.
3514 (build_vdef): Same as above.
3515 (verify_ssa_operands): Same as above.
3516 (finalize_ssa_uses): Same as above.
3517 (cleanup_build_arrays): Same as above.
3518 (finalize_ssa_stmt_operands): Same as above.
3519 (start_ssa_stmt_operands): Same as above.
3520 (append_use): Same as above.
3521 (append_vdef): Same as above.
3522 (add_virtual_operand): Same as above.
3523 (add_stmt_operand): Same as above.
3524 (get_mem_ref_operands): Same as above.
3525 (get_tmr_operands): Same as above.
3526 (maybe_add_call_vops): Same as above.
3527 (get_asm_stmt_operands): Same as above.
3528 (get_expr_operands): Same as above.
3529 (parse_ssa_operands): Same as above.
3530 (finalize_ssa_defs): Same as above.
3531 (build_ssa_operands): Same as above, plus create a C-like wrapper.
3532 (update_stmt_operands): Create an instance of operands_scanner.
3534 2020-05-07 Richard Biener <rguenther@suse.de>
3537 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
3538 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
3539 (refered_from_nonlocal_var): Likewise.
3540 (ipa_pta_execute): Likewise.
3542 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
3544 * gcc/tree-ssa-struct-alias.c: Fix comments
3546 2020-05-07 Martin Liska <mliska@suse.cz>
3548 * doc/invoke.texi: Fix 2 optindex entries.
3550 2020-05-07 Richard Biener <rguenther@suse.de>
3553 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
3554 (tree_decl_common::not_gimple_reg_flag): ... to this.
3555 * tree.h (DECL_GIMPLE_REG_P): Rename ...
3556 (DECL_NOT_GIMPLE_REG_P): ... to this.
3557 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
3558 (create_tmp_reg): Simplify.
3559 (create_tmp_reg_fn): Likewise.
3560 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
3561 * gimplify.c (create_tmp_from_val): Simplify.
3562 (gimplify_bind_expr): Likewise.
3563 (gimplify_compound_literal_expr): Likewise.
3564 (gimplify_function_tree): Likewise.
3565 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
3566 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
3567 (asan_add_global): Copy it.
3568 * cgraphunit.c (cgraph_node::expand_thunk): Force args
3570 * function.c (gimplify_parameters): Copy
3571 DECL_NOT_GIMPLE_REG_P.
3572 * ipa-param-manipulation.c
3573 (ipa_param_body_adjustments::common_initialization): Simplify.
3574 (ipa_param_body_adjustments::reset_debug_stmts): Copy
3575 DECL_NOT_GIMPLE_REG_P.
3576 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
3577 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
3578 * tree-cfg.c (make_blocks_1): Simplify.
3579 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
3580 * tree-eh.c (lower_eh_constructs_2): Simplify.
3581 * tree-inline.c (declare_return_variable): Adjust and
3583 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
3584 (copy_result_decl_to_var): Likewise.
3585 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
3586 * tree-nested.c (create_tmp_var_for): Simplify.
3587 * tree-parloops.c (separate_decls_in_region_name): Copy
3588 DECL_NOT_GIMPLE_REG_P.
3589 * tree-sra.c (create_access_replacement): Adjust and
3590 generalize partial def support.
3591 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
3592 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
3593 * tree-ssa.c (maybe_optimize_var): Handle clearing of
3594 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
3596 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
3597 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
3598 DECL_NOT_GIMPLE_REG_P.
3599 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
3600 * cfgexpand.c (avoid_type_punning_on_regs): New.
3601 (discover_nonconstant_array_refs): Call
3602 avoid_type_punning_on_regs to avoid unsupported mode punning.
3604 2020-05-07 Alex Coplan <alex.coplan@arm.com>
3606 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
3609 2020-05-07 Richard Biener <rguenther@suse.de>
3611 PR tree-optimization/57359
3612 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
3613 (in_mem_ref::dep_loop): Repurpose.
3614 (LOOP_DEP_BIT): Remove.
3615 (enum dep_kind): New.
3616 (enum dep_state): Likewise.
3617 (record_loop_dependence): New function to populate the
3619 (query_loop_dependence): New function to query the dependence
3621 (memory_accesses::refs_in_loop): Rename to ...
3622 (memory_accesses::refs_loaded_in_loop): ... this and change to
3624 (outermost_indep_loop): Adjust.
3625 (mem_ref_alloc): Likewise.
3626 (gather_mem_refs_stmt): Likewise.
3627 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
3628 (struct sm_aux): New.
3629 (execute_sm): Split code generation on exits, record state
3631 (enum sm_kind): New.
3632 (execute_sm_exit): Exit code generation part.
3633 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
3634 dependence checking on stores reached from exits.
3635 (sm_seq_valid_bb): New function gathering SM stores on exits.
3636 (hoist_memory_references): Re-implement.
3637 (refs_independent_p): Add tbaa_p parameter and pass it down.
3638 (record_dep_loop): Remove.
3639 (ref_indep_loop_p_1): Fold into ...
3640 (ref_indep_loop_p): ... this and generalize for three kinds
3641 of dependence queries.
3642 (can_sm_ref_p): Adjust according to hoist_memory_references
3644 (store_motion_loop): Don't do anything if the set of SM
3645 candidates is empty.
3646 (tree_ssa_lim_initialize): Adjust.
3647 (tree_ssa_lim_finalize): Likewise.
3649 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
3650 Pierre-Marie de Rodat <derodat@adacore.com>
3652 * dwarf2out.c (add_data_member_location_attribute): Take into account
3653 the variant part offset in the computation of the data bit offset.
3654 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
3655 in the call to field_byte_offset.
3656 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
3657 confusing assertion.
3658 (analyze_variant_discr): Deal with boolean subtypes.
3660 2020-05-07 Martin Liska <mliska@suse.cz>
3662 * lto-wrapper.c: Split arguments of MAKE environment
3665 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
3667 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
3668 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
3669 fenv_var and new_fenv_var.
3671 2020-05-06 Jakub Jelinek <jakub@redhat.com>
3674 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
3676 (avx512dq_vextract<shuffletype>64x2_1_maskm,
3677 avx512f_vextract<shuffletype>32x4_1_maskm,
3678 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
3679 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
3681 (*avx512dq_vextract<shuffletype>64x2_1,
3682 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
3683 define_insns. Even in the masked variant allow memory output but in
3684 that case use 0 rather than 0C constraint on the source of masked-out
3686 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
3688 (*avx512f_vextract<shuffletype>32x4_1,
3689 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
3690 Even in the masked variant allow memory output but in that case use
3691 0 rather than 0C constraint on the source of masked-out elts.
3692 (vec_extract_lo_<mode><mask_name>): Split into ...
3693 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
3694 define_insns. Even in the masked variant allow memory output but in
3695 that case use 0 rather than 0C constraint on the source of masked-out
3697 (vec_extract_hi_<mode><mask_name>): Split into ...
3698 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
3699 define_insns. Even in the masked variant allow memory output but in
3700 that case use 0 rather than 0C constraint on the source of masked-out
3703 2020-05-06 qing zhao <qing.zhao@oracle.com>
3706 * common.opt: Add -flarge-source-files.
3707 * doc/invoke.texi: Document it.
3708 * toplev.c (process_options): set line_table->default_range_bits
3709 to 0 when flag_large_source_files is true.
3711 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
3714 * config/i386/predicates.md (add_comparison_operator): New predicate.
3715 * config/i386/i386.md (compare->add splitter): New splitters.
3717 2020-05-06 Richard Biener <rguenther@suse.de>
3719 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
3720 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
3721 Remove slp_instance parameter, just iterate over all scalar stmts.
3722 (vect_slp_analyze_instance_dependence): Adjust and likewise.
3723 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
3725 (vect_schedule_slp): Just iterate over all scalar stmts.
3726 (vect_supported_load_permutation_p): Adjust.
3727 (vect_transform_slp_perm_load): Remove slp_instance parameter,
3728 instead use the number of lanes in the node as group size.
3729 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
3730 factor instead of slp_instance as parameter.
3731 (vectorizable_load): Adjust.
3733 2020-05-06 Andreas Schwab <schwab@suse.de>
3735 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
3736 (aarch64_get_extension_string_for_isa_flags): Don't declare.
3738 2020-05-06 Richard Biener <rguenther@suse.de>
3741 * cfgloopmanip.c (create_preheader): Require non-complex
3742 preheader edge for CP_SIMPLE_PREHEADERS.
3744 2020-05-06 Richard Biener <rguenther@suse.de>
3746 PR tree-optimization/94963
3747 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
3748 no-warning marking of the conditional store.
3749 (execute_sm): Instead mark the uninitialized state
3750 on loop entry to be not warned about.
3752 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
3754 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
3755 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
3756 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
3757 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
3759 * config/i386/i386-builtin.def: Add new builtins.
3760 * config/i386/i386-c.c (ix86_target_macros_internal): Define
3762 * config/i386/i386-options.c (ix86_target_string): Add
3764 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
3765 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
3767 * config/i386/i386.md (define_c_enum "unspec"): Add
3768 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
3769 (TSXLDTRK): New define_int_iterator.
3770 ("<tsxldtrk>"): New define_insn.
3771 * config/i386/i386.opt: Add -mtsxldtrk.
3772 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
3773 * config/i386/tsxldtrkintrin.h: New.
3774 * doc/invoke.texi: Document -mtsxldtrk.
3776 2020-05-06 Jakub Jelinek <jakub@redhat.com>
3778 PR tree-optimization/94921
3779 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
3782 2020-05-06 Richard Biener <rguenther@suse.de>
3784 PR tree-optimization/94965
3785 * tree-vect-stmts.c (vectorizable_load): Fix typo.
3787 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3789 * doc/install.texi: Replace Sun with Solaris as appropriate.
3790 (Tools/packages necessary for building GCC, Perl version between
3791 5.6.1 and 5.6.24): Remove Solaris 8 reference.
3792 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
3794 (Specific, i?86-*-solaris2*): Update version references for
3795 Solaris 11.3 and later. Remove gas 2.26 caveat.
3796 (Specific, *-*-solaris2*): Update version references for
3797 Solaris 11.3 and later. Remove boehm-gc reference.
3798 Document GMP, MPFR caveats on Solaris 11.3.
3799 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
3800 (Specific, sparc64-*-solaris2*): Likewise.
3801 Document --build requirement.
3803 2020-05-06 Jakub Jelinek <jakub@redhat.com>
3806 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
3807 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
3809 PR rtl-optimization/94873
3810 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
3811 note if SET_SRC (set) has side-effects.
3813 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
3814 Wei Xiao <wei3.xiao@intel.com>
3816 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
3817 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
3818 (ix86_handle_option): Handle -mserialize.
3819 * config.gcc (serializeintrin.h): New header file.
3820 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
3821 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
3823 * config/i386/i386-builtin.def: Add new builtin.
3824 * config/i386/i386-c.c (__SERIALIZE__): New macro.
3825 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
3827 * (ix86_valid_target_attribute_inner_p): Add target attribute
3829 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
3831 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
3832 (serialize): New define_insn.
3833 * config/i386/i386.opt (mserialize): New option
3834 * config/i386/immintrin.h: Include serailizeintrin.h.
3835 * config/i386/serializeintrin.h: New header file.
3836 * doc/invoke.texi: Add documents for -mserialize.
3838 2020-05-06 Richard Biener <rguenther@suse.de>
3840 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
3841 to/from pointer conversion checking.
3843 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
3845 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
3847 * config/rs6000/rs6000-c.c: Likewise.
3848 * config/rs6000/rs6000-call.c: Likewise.
3849 * config/rs6000/rs6000.c: Likewise.
3851 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3853 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
3854 (RTEMS_ENDFILE_SPEC): Likewise.
3855 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
3856 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
3857 (LIB_SPECS): Support -nodefaultlibs option.
3858 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
3859 (RTEMS_ENDFILE_SPEC): Likewise.
3860 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
3861 (RTEMS_ENDFILE_SPEC): Likewise.
3862 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
3863 (RTEMS_ENDFILE_SPEC): Likewise.
3865 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
3867 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
3868 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
3870 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
3872 * config/pru/pru.h: Mark R3.w0 as caller saved.
3874 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
3876 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
3877 and gen_doloop_begin_internal.
3878 (pru_reorg_loop): Use gen_pruloop with mode.
3879 * config/pru/pru.md: Use new @insn syntax.
3881 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
3883 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
3885 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
3887 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
3888 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
3889 (addqi3_cconly_overflow): Ditto.
3890 (umulv<mode>4): Ditto.
3891 (<s>mul<mode>3_highpart): Ditto.
3892 (tls_global_dynamic_32): Ditto.
3893 (tls_local_dynamic_base_32): Ditto.
3900 (*adddi_4): Remove "m" constraint from scratch operand.
3901 (*add<mode>_4): Ditto.
3903 2020-05-05 Jakub Jelinek <jakub@redhat.com>
3905 PR rtl-optimization/94516
3906 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
3907 with sp = reg, add REG_EQUAL note with sp + const.
3908 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
3909 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
3910 postreload sp = sp + const to sp = reg optimization if needed and
3912 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
3913 reg = sp insn with sp + const REG_EQUAL note. Adjust
3914 try_apply_stack_adjustment caller, call
3915 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
3916 (combine_stack_adjustments): Allocate and free LIVE bitmap,
3917 adjust combine_stack_adjustments_for_block caller.
3919 2020-05-05 Martin Liska <mliska@suse.cz>
3921 PR gcov-profile/93623
3922 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
3925 2020-05-05 Martin Liska <mliska@suse.cz>
3927 * opt-functions.awk (opt_args_non_empty): New function.
3928 * opt-read.awk: Use the function for various option arguments.
3930 2020-05-05 Martin Liska <mliska@suse.cz>
3933 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
3934 report warning when the jobserver is not detected.
3936 2020-05-05 Martin Liska <mliska@suse.cz>
3938 PR gcov-profile/94636
3939 * gcov.c (main): Print total lines summary at the end.
3940 (generate_results): Expect file_name always being non-null.
3941 Print newline after intermediate file is printed in order to align with
3942 what we do for normal files.
3944 2020-05-05 Martin Liska <mliska@suse.cz>
3946 * dumpfile.c (dump_switch_p): Change return type
3947 and print option suggestion.
3948 * dumpfile.h: Change return type.
3949 * opts-global.c (handle_common_deferred_options):
3950 Move error into dump_switch_p function.
3952 2020-05-05 Martin Liska <mliska@suse.cz>
3955 * alloc-pool.h: Use const for some arguments.
3956 * bitmap.h: Likewise.
3957 * mem-stats.h: Likewise.
3958 * sese.h (get_entry_bb): Likewise.
3959 (get_exit_bb): Likewise.
3961 2020-05-05 Richard Biener <rguenther@suse.de>
3963 * tree-vect-slp.c (struct vdhs_data): New.
3964 (vect_detect_hybrid_slp): New walker.
3965 (vect_detect_hybrid_slp): Rewrite.
3967 2020-05-05 Richard Biener <rguenther@suse.de>
3970 * tree-ssa-structalias.c (ipa_pta_execute): Use
3971 varpool_node::externally_visible_p ().
3972 (refered_from_nonlocal_var): Likewise.
3974 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
3976 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
3977 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
3978 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
3980 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
3982 * gimplify.c (gimplify_init_constructor): Do not put the constructor
3983 into static memory if it is not complete.
3985 2020-05-05 Richard Biener <rguenther@suse.de>
3987 PR tree-optimization/94949
3988 * tree-ssa-loop-im.c (execute_sm): Check whether we use
3989 the multithreaded model or always compute the stored value
3990 before eliding a load.
3992 2020-05-05 Alex Coplan <alex.coplan@arm.com>
3994 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
3996 2020-05-05 Jakub Jelinek <jakub@redhat.com>
3998 PR tree-optimization/94800
3999 * match.pd (X + (X << C) to X * (1 + (1 << C)),
4000 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
4004 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
4006 PR tree-optimization/94914
4007 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
4010 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
4012 * config/i386/i386.md (*testqi_ext_3): Use
4013 int_nonimmediate_operand instead of manual mode checks.
4014 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
4015 Use int_nonimmediate_operand predicate. Rewrite
4016 define_insn_and_split pattern to a combine pass splitter.
4018 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4020 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
4021 * configure: Regenerate.
4023 2020-05-05 Jakub Jelinek <jakub@redhat.com>
4026 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
4027 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
4028 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
4029 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
4031 2020-05-04 Clement Chigot <clement.chigot@atos.net>
4032 David Edelsohn <dje.gcc@gmail.com>
4034 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
4035 for fmodl, frexpl, ldexpl and modfl builtins.
4037 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
4040 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
4041 chosen lhs is different from the gcall lhs.
4042 (expand_mask_load_optab_fn): Likewise.
4043 (expand_gather_load_optab_fn): Likewise.
4045 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
4048 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
4049 (EQ compare->LTU compare splitter): New splitter.
4050 (NE compare->NEG splitter): Ditto.
4052 2020-05-04 Marek Polacek <polacek@redhat.com>
4055 2020-04-30 Marek Polacek <polacek@redhat.com>
4058 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
4059 (check_aligned_type): Check if TYPE_USER_ALIGN match.
4061 2020-05-04 Richard Biener <rguenther@suse.de>
4063 PR tree-optimization/93891
4064 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
4065 the original reference tree for assessing access alignment.
4067 2020-05-04 Richard Biener <rguenther@suse.de>
4069 PR tree-optimization/39612
4070 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
4071 (set_ref_loaded_in_loop): New.
4072 (mark_ref_loaded): Likewise.
4073 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
4074 (execute_sm): Avoid issueing a load when it was not there.
4075 (execute_sm_if_changed): Avoid issueing warnings for the
4078 2020-05-04 Martin Jambor <mjambor@suse.cz>
4081 * tree-inline.c (tree_function_versioning): Leave any type conversion
4082 of replacements to setup_one_parameter and its friend
4083 force_value_to_type.
4085 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
4088 * config/i386/predicates.md (shr_comparison_operator): New predicate.
4089 * config/i386/i386.md (compare->shr splitter): New splitters.
4091 2020-05-04 Jakub Jelinek <jakub@redhat.com>
4093 PR tree-optimization/94718
4094 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
4096 PR tree-optimization/94718
4097 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
4098 replace two nop conversions on bit_{and,ior,xor} argument
4099 and result with just one conversion on the result or another argument.
4101 PR tree-optimization/94718
4102 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
4103 -> (X ^ Y) & C eqne 0 optimization to ...
4104 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
4106 * opts.c (get_option_html_page): Instead of hardcoding a list of
4107 options common between C/C++ and Fortran only use gfortran/
4108 documentation for warnings that have CL_Fortran set but not
4111 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
4113 * config/i386/i386-expand.c (ix86_expand_int_movcc):
4114 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
4115 (emit_memmov): Ditto.
4116 (emit_memset): Ditto.
4117 (ix86_expand_strlensi_unroll_1): Ditto.
4118 (release_scratch_register_on_entry): Ditto.
4119 (gen_frame_set): Ditto.
4120 (ix86_emit_restore_reg_using_pop): Ditto.
4121 (ix86_emit_outlined_ms2sysv_restore): Ditto.
4122 (ix86_expand_epilogue): Ditto.
4123 (ix86_expand_split_stack_prologue): Ditto.
4124 * config/i386/i386.md (push immediate splitter): Ditto.
4128 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
4130 PR translation/93861
4131 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
4134 2020-05-02 Jakub Jelinek <jakub@redhat.com>
4136 * config/tilegx/tilegx.md
4137 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
4138 rather than just <n>.
4140 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
4143 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
4144 and crtl->patch_area_entry.
4145 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
4146 * opts.c (common_handle_option): Limit
4147 function_entry_patch_area_size and function_entry_patch_area_start
4148 to USHRT_MAX. Fix a typo in error message.
4149 * varasm.c (assemble_start_function): Use crtl->patch_area_size
4150 and crtl->patch_area_entry.
4151 * doc/invoke.texi: Document the maximum value for
4152 -fpatchable-function-entry.
4154 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
4156 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
4157 Override SUBTARGET_SHADOW_OFFSET macro.
4159 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
4161 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
4162 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
4163 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
4164 * config/i386/freebsd.h: Likewise.
4165 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
4166 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
4168 2020-04-30 Alexandre Oliva <oliva@adacore.com>
4170 * doc/sourcebuild.texi (Effective-Target Keywords): Document
4171 the newly-introduced fileio effective target.
4173 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
4175 PR rtl-optimization/94740
4176 * cse.c (cse_process_notes_1): Replace with...
4177 (cse_process_note_1): ...this new function, acting as a
4178 simplify_replace_fn_rtx callback to process_note. Handle only
4179 REGs and MEMs directly. Validate the MEM if cse_process_note
4180 changes its address.
4181 (cse_process_notes): Replace with...
4182 (cse_process_note): ...this new function.
4183 (cse_extended_basic_block): Update accordingly, iterating over
4184 the register notes and passing individual notes to cse_process_note.
4186 2020-04-30 Carl Love <cel@us.ibm.com>
4188 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
4190 2020-04-30 Martin Jambor <mjambor@suse.cz>
4193 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
4194 saved by the inliner and thunks which had their call inlined.
4195 * ipa-inline-transform.c (save_inline_function_body): Fill in
4196 former_clone_of of new body holders.
4198 2020-04-30 Jakub Jelinek <jakub@redhat.com>
4200 * BASE-VER: Set to 11.0.0.
4202 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
4204 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
4206 2020-04-30 Marek Polacek <polacek@redhat.com>
4209 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
4210 (check_aligned_type): Check if TYPE_USER_ALIGN match.
4212 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
4214 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
4215 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
4216 * doc/invoke.texi (moutline-atomics): Document as on by default.
4218 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
4221 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
4222 the check for NOTE_INSN_DELETED_LABEL.
4224 2020-04-30 Jakub Jelinek <jakub@redhat.com>
4226 * configure.ac (--with-documentation-root-url,
4227 --with-changes-root-url): Diagnose URL not ending with /,
4228 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
4229 * opts.h (get_changes_url): Remove.
4230 * opts.c (get_changes_url): Remove.
4231 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
4232 or -DCHANGES_ROOT_URL.
4233 * doc/install.texi (--with-documentation-root-url,
4234 --with-changes-root-url): Document.
4235 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
4236 get_changes_url and free, change url variable type to const char * and
4237 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
4238 * config/s390/s390.c (s390_function_arg_vector,
4239 s390_function_arg_float): Likewise.
4240 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
4242 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
4244 * config.in: Regenerate.
4245 * configure: Regenerate.
4247 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
4250 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
4252 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
4254 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
4255 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
4257 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
4259 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
4260 Change constraint for vlrl/vstrl to jb4.
4262 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4264 * var-tracking.c (vt_initialize): Move variables pre and post
4265 into inner block and initialize both in order to fix warning
4266 about uninitialized use. Remove unnecessary checks for
4267 frame_pointer_needed.
4269 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4271 * toplev.c (output_stack_usage_1): Ensure that first
4272 argument to fprintf is not null.
4274 2020-04-29 Jakub Jelinek <jakub@redhat.com>
4276 * configure.ac (-with-changes-root-url): New configure option,
4277 defaulting to https://gcc.gnu.org/.
4278 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
4280 * pretty-print.c (get_end_url_string): New function.
4281 (pp_format): Handle %{ and %} for URLs.
4282 (pp_begin_url): Use pp_string instead of pp_printf.
4283 (pp_end_url): Use get_end_url_string.
4284 * opts.h (get_changes_url): Declare.
4285 * opts.c (get_changes_url): New function.
4286 * config/rs6000/rs6000-call.c: Include opts.h.
4287 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
4288 of just in GCC 10.1 in diagnostics and add URL.
4289 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
4290 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
4292 * config/s390/s390.c (s390_function_arg_vector,
4293 s390_function_arg_float): Likewise.
4294 * configure: Regenerated.
4297 * config/s390/s390.c (s390_function_arg_vector,
4298 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
4299 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
4300 passed to the function rather than the type of the single element.
4301 Rename cxx17_empty_base_seen variable to empty_base_seen, change
4302 type to int, and adjust diagnostics depending on if the field
4303 has [[no_unique_attribute]] or not.
4306 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
4307 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
4308 used in casts into parens.
4309 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
4310 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
4311 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
4312 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
4313 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
4314 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
4315 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
4316 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
4317 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
4318 _mm256_mask_cmp_epu8_mask): Likewise.
4319 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
4320 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
4321 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
4322 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
4325 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
4326 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
4327 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
4328 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
4329 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
4330 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
4331 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
4332 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
4333 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
4334 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
4335 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
4336 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
4337 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
4339 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
4340 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
4341 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
4342 as mask vector containing -1.0 or -1.0f elts, but instead vector
4343 with all bits set using _mm*_cmpeq_p? with zero operands.
4344 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
4345 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
4346 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
4347 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
4348 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
4349 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
4350 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
4351 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
4352 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
4353 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
4354 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
4355 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
4356 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
4357 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
4358 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
4359 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
4360 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
4362 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
4363 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
4364 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
4365 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
4366 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
4367 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
4368 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
4369 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
4370 _mm512_mask_prefetch_i64scatter_ps): Likewise.
4371 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
4372 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
4373 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
4374 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
4375 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
4376 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
4377 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
4378 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
4379 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
4380 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
4381 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
4382 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
4383 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
4384 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
4385 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
4386 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
4387 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
4388 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
4389 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
4390 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
4391 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
4392 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
4393 _mm_mask_i64scatter_epi64): Likewise.
4395 2020-04-29 Jeff Law <law@redhat.com>
4397 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
4398 division instructions are 4 bytes long.
4400 2020-04-29 Jakub Jelinek <jakub@redhat.com>
4403 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
4404 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
4405 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
4406 take address of TARGET_EXPR of fenv_var with void_node initializer.
4409 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4411 PR tree-optimization/94774
4412 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
4415 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
4417 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
4418 * calls.c (cxx17_empty_base_field_p): New function. Check
4419 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
4422 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
4425 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
4426 Allow -fcf-protection with -mindirect-branch=thunk-extern and
4427 -mfunction-return=thunk-extern.
4428 * doc/invoke.texi: Update notes for -fcf-protection=branch with
4429 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
4431 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
4433 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
4435 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
4437 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
4438 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
4439 fenv_var and new_fenv_var.
4441 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
4443 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
4444 effective-target keyword.
4445 (arm_arch_v8a_hard_multilib): Likewise.
4446 (arm_arch_v8a_hard): Document new dg-add-options keyword.
4447 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
4448 code is deprecated and has not been updated to handle
4449 DECL_FIELD_ABI_IGNORED.
4450 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
4451 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
4452 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
4453 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
4454 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
4455 something actually is a HFA or HVA. Record whether we see a
4456 [[no_unique_address]] field that previous GCCs would not have
4457 ignored in this way.
4458 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
4459 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
4460 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
4461 diagnostic messages.
4462 (arm_needs_doubleword_align): Add a comment explaining why we
4463 consider even zero-sized fields.
4465 2020-04-29 Richard Biener <rguenther@suse.de>
4466 Li Zekun <lizekun1@huawei.com>
4469 * tree.c (component_ref_size): Guard against error_mark_node
4470 DECL_INITIAL as it happens with LTO.
4472 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
4474 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
4475 comment explaining why we consider even zero-sized fields.
4476 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
4477 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
4478 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
4479 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
4480 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
4481 something actually is a HFA or HVA. Record whether we see a
4482 [[no_unique_address]] field that previous GCCs would not have
4483 ignored in this way.
4484 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
4485 whether diagnostics should be suppressed. Update the calls to
4486 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
4487 [[no_unique_address]] case.
4488 (aarch64_return_in_msb): Update call accordingly, never silencing
4490 (aarch64_function_value): Likewise.
4491 (aarch64_return_in_memory_1): Likewise.
4492 (aarch64_init_cumulative_args): Likewise.
4493 (aarch64_gimplify_va_arg_expr): Likewise.
4494 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
4495 use it to decide whether arch64_vfp_is_call_or_return_candidate
4497 (aarch64_pass_by_reference): Update calls accordingly.
4498 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
4499 to decide whether arch64_vfp_is_call_or_return_candidate should be
4502 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
4505 * config/aarch64/aarch64-builtins.c
4506 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
4507 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
4510 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
4512 * configure.ac <$enable_offload_targets>: Do parsing as done
4514 * configure: Regenerate.
4516 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
4517 * configure: Regenerate.
4520 * rtlanal.c (set_noop_p): Handle non-constant selectors.
4523 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
4525 (TARGET_EXCEPT_UNWIND_INFO): Define.
4527 2020-04-29 Jakub Jelinek <jakub@redhat.com>
4530 * config/gcn/gcn.md (*mov<mode>_insn): Use
4531 'reg_overlap_mentioned_p' to check for overlap.
4534 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
4535 instead of cxx17_empty_base_field_p.
4538 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
4539 DECL_FIELD_ABI_IGNORED.
4540 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
4541 * calls.h (cxx17_empty_base_field_p): Change into a temporary
4542 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
4544 * calls.c (cxx17_empty_base_field_p): Remove.
4545 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
4546 DECL_FIELD_ABI_IGNORED.
4547 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
4548 * lto-streamer-out.c (hash_tree): Likewise.
4549 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
4550 cxx17_empty_base_seen to empty_base_seen, change type to int *,
4551 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
4552 cxx17_empty_base_field_p, if "no_unique_address" attribute is
4553 present, propagate that to the caller too.
4554 (rs6000_discover_homogeneous_aggregate): Adjust
4555 rs6000_aggregate_candidate caller, emit different diagnostics
4556 when c++17 empty base fields are present and when empty
4557 [[no_unique_address]] fields are present.
4558 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
4559 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
4562 2020-04-29 Richard Biener <rguenther@suse.de>
4564 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
4565 Just check whether the stmt stores.
4567 2020-04-28 Alexandre Oliva <oliva@adacore.com>
4570 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
4571 output operand in emulation. Don't overwrite pseudos.
4573 2020-04-28 Jeff Law <law@redhat.com>
4575 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
4576 multiply patterns are 4 bytes long.
4578 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
4580 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
4581 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
4583 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
4584 Jakub Jelinek <jakub@redhat.com>
4587 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
4588 base class artificial fields.
4589 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
4590 decision is different after this fix.
4592 2020-04-28 David Malcolm <dmalcolm@redhat.com>
4598 * doc/invoke.texi (Static Analyzer Options): Remove
4599 -Wanalyzer-use-of-uninitialized-value.
4600 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
4602 2020-04-28 Jakub Jelinek <jakub@redhat.com>
4604 PR tree-optimization/94809
4605 * tree.c (build_call_expr_internal_loc_array): Call
4606 process_call_operands.
4608 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
4610 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
4611 * config/aarch64/aarch64-tune.md: Regenerate.
4612 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
4613 (thunderx3t110_regmove_cost): Likewise.
4614 (thunderx3t110_vector_cost): Likewise.
4615 (thunderx3t110_prefetch_tune): Likewise.
4616 (thunderx3t110_tunings): Likewise.
4617 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
4619 * config/aarch64/thunderx3t110.md: New file.
4620 * config/aarch64/aarch64.md: Include thunderx3t110.md.
4621 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
4623 2020-04-28 Jakub Jelinek <jakub@redhat.com>
4626 * config/s390/s390.c (s390_function_arg_vector,
4627 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
4629 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
4631 PR tree-optimization/94727
4632 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
4633 operands are invariant booleans, use the mask type associated with the
4634 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
4635 (vectorizable_condition): Pass vectype unconditionally to
4636 vect_is_simple_cond.
4638 2020-04-27 Jakub Jelinek <jakub@redhat.com>
4641 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
4642 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
4643 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
4645 2020-04-27 David Malcolm <dmalcolm@redhat.com>
4648 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
4649 default value, so that it can by supplied by get_option_html_page.
4650 * configure: Regenerate.
4651 * opts.c: Include "selftest.h".
4652 (get_option_html_page): New function.
4653 (get_option_url): Use it. Reformat to place comments next to the
4654 expressions they refer to.
4655 (selftest::test_get_option_html_page): New.
4656 (selftest::opts_c_tests): New.
4657 * selftest-run-tests.c (selftest::run_tests): Call
4658 selftest::opts_c_tests.
4659 * selftest.h (selftest::opts_c_tests): New decl.
4661 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
4663 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
4664 UINTVAL to CONST_INTs.
4666 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4668 * config/arm/constraints.md (e): Remove constraint.
4669 (Te): Define constraint.
4670 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
4671 operand 0 from "e" to "Te".
4672 (vaddvaq_<supf><mode>): Likewise.
4673 (vaddvq_p_<supf><mode>): Likewise.
4674 (vmladavq_<supf><mode>): Likewise.
4675 (vmladavxq_s<mode>): Likewise.
4676 (vmlsdavq_s<mode>): Likewise.
4677 (vmlsdavxq_s<mode>): Likewise.
4678 (vaddvaq_p_<supf><mode>): Likewise.
4679 (vmladavaq_<supf><mode>): Likewise.
4680 (vmladavq_p_<supf><mode>): Likewise.
4681 (vmladavxq_p_s<mode>): Likewise.
4682 (vmlsdavq_p_s<mode>): Likewise.
4683 (vmlsdavxq_p_s<mode>): Likewise.
4684 (vmlsdavaxq_s<mode>): Likewise.
4685 (vmlsdavaq_s<mode>): Likewise.
4686 (vmladavaxq_s<mode>): Likewise.
4687 (vmladavaq_p_<supf><mode>): Likewise.
4688 (vmladavaxq_p_s<mode>): Likewise.
4689 (vmlsdavaq_p_s<mode>): Likewise.
4690 (vmlsdavaxq_p_s<mode>): Likewise.
4692 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
4694 * config/arm/arm.c (output_move_neon): Only get the first operand if
4697 2020-04-27 Felix Yang <felix.yang@huawei.com>
4699 PR tree-optimization/94784
4700 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
4701 assert around so that it checks that the two vectors have equal
4702 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
4703 types is a useless_type_conversion_p.
4705 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
4708 * dwarf2cfi.c (struct GTY): Add ra_mangled.
4709 (cfi_row_equal_p): Check ra_mangled.
4710 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
4711 this only handles the sparc logic now.
4712 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
4713 the aarch64 specific logic.
4714 (dwarf2out_frame_debug): Update to use the new subroutines.
4715 (change_cfi_row): Check ra_mangled.
4717 2020-04-27 Jakub Jelinek <jakub@redhat.com>
4720 * config/s390/s390.c (s390_function_arg_vector,
4721 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
4723 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
4725 * common/config/rs6000/rs6000-common.c
4726 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
4728 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
4731 2020-04-27 Martin Liska <mliska@suse.cz>
4734 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
4735 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
4737 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
4740 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
4742 (rs6000_emit_prologue_components):
4743 Check with frame_pointer_needed_indeed.
4744 (rs6000_emit_epilogue_components): Likewise.
4745 (rs6000_emit_prologue): Likewise.
4746 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
4748 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
4750 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
4751 stack frame when debugging and flag_compare_debug is enabled.
4753 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
4755 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
4756 enable PC-relative addressing for -mcpu=future.
4757 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
4758 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
4759 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
4760 suppress PC-relative addressing.
4761 (rs6000_option_override_internal): Split up error messages
4762 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
4765 2020-04-25 Jakub Jelinek <jakub@redhat.com>
4766 Richard Biener <rguenther@suse.de>
4768 PR tree-optimization/94734
4769 PR tree-optimization/89430
4770 * tree-ssa-phiopt.c: Include tree-eh.h.
4771 (cond_store_replacement): Return false if an automatic variable
4772 access could trap. If -fstore-data-races, don't return false
4773 just because an automatic variable is addressable.
4775 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
4777 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
4779 (add<mode>_sext_dup2_exec): Likewise.
4781 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
4784 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
4785 endian byteshift_val calculation.
4787 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
4789 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
4791 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
4793 * config/aarch64/arm_sve.h: Add a comment.
4795 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
4797 PR rtl-optimization/94708
4798 * combine.c (simplify_if_then_else): Add check for
4799 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
4801 2020-04-23 Martin Sebor <msebor@redhat.com>
4804 * common.opt (-Wno-frame-larger-than): New option.
4805 (-Wno-larger-than, -Wno-stack-usage): Same.
4807 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
4809 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
4811 (mov<mode>_exec): Likewise.
4812 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
4813 (<convop><mode><vndi>2_exec): Likewise.
4815 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
4817 PR tree-optimization/94717
4818 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
4819 of the stores doesn't have the same landing pad number as the first.
4820 (coalesce_immediate_stores): Do not try to coalesce the store using
4821 bswap if it doesn't have the same landing pad number as the first.
4823 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
4825 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
4826 Replace outdated link to ELFv2 ABI.
4828 2020-04-23 Jakub Jelinek <jakub@redhat.com>
4831 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
4835 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
4836 temporarily with non-final second operand and updating it later,
4837 push COMPOUND_EXPRs into a vector and process it in reverse,
4838 creating COMPOUND_EXPRs with the final operands.
4840 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
4843 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
4844 bti c and bti j handling.
4846 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
4847 Thomas Schwinge <thomas@codesourcery.com>
4851 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
4852 t_async and the wait arguments.
4854 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
4856 PR tree-optimization/94727
4857 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
4858 comparing invariant scalar booleans.
4860 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
4861 Jakub Jelinek <jakub@redhat.com>
4864 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
4865 empty base class artificial fields.
4866 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
4867 different after this fix.
4869 2020-04-23 Jakub Jelinek <jakub@redhat.com>
4872 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
4873 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
4874 if the same type has been diagnosed most recently already.
4876 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4878 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
4880 (__arm_vbicq_n_s16): Likewise.
4881 (__arm_vbicq_n_u32): Likewise.
4882 (__arm_vbicq_n_s32): Likewise.
4883 (__arm_vbicq): Likewise.
4884 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
4885 (__arm_vbicq_n_s32): Likewise.
4886 (__arm_vbicq_n_u16): Likewise.
4887 (__arm_vbicq_n_u32): Likewise.
4888 (__arm_vdupq_m_n_s8): Likewise.
4889 (__arm_vdupq_m_n_s16): Likewise.
4890 (__arm_vdupq_m_n_s32): Likewise.
4891 (__arm_vdupq_m_n_u8): Likewise.
4892 (__arm_vdupq_m_n_u16): Likewise.
4893 (__arm_vdupq_m_n_u32): Likewise.
4894 (__arm_vdupq_m_n_f16): Likewise.
4895 (__arm_vdupq_m_n_f32): Likewise.
4896 (__arm_vldrhq_gather_offset_s16): Likewise.
4897 (__arm_vldrhq_gather_offset_s32): Likewise.
4898 (__arm_vldrhq_gather_offset_u16): Likewise.
4899 (__arm_vldrhq_gather_offset_u32): Likewise.
4900 (__arm_vldrhq_gather_offset_f16): Likewise.
4901 (__arm_vldrhq_gather_offset_z_s16): Likewise.
4902 (__arm_vldrhq_gather_offset_z_s32): Likewise.
4903 (__arm_vldrhq_gather_offset_z_u16): Likewise.
4904 (__arm_vldrhq_gather_offset_z_u32): Likewise.
4905 (__arm_vldrhq_gather_offset_z_f16): Likewise.
4906 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
4907 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
4908 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
4909 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
4910 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
4911 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
4912 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
4913 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
4914 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
4915 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
4916 (__arm_vldrwq_gather_offset_s32): Likewise.
4917 (__arm_vldrwq_gather_offset_u32): Likewise.
4918 (__arm_vldrwq_gather_offset_f32): Likewise.
4919 (__arm_vldrwq_gather_offset_z_s32): Likewise.
4920 (__arm_vldrwq_gather_offset_z_u32): Likewise.
4921 (__arm_vldrwq_gather_offset_z_f32): Likewise.
4922 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
4923 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
4924 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
4925 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
4926 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
4927 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
4928 (__arm_vdwdupq_x_n_u8): Likewise.
4929 (__arm_vdwdupq_x_n_u16): Likewise.
4930 (__arm_vdwdupq_x_n_u32): Likewise.
4931 (__arm_viwdupq_x_n_u8): Likewise.
4932 (__arm_viwdupq_x_n_u16): Likewise.
4933 (__arm_viwdupq_x_n_u32): Likewise.
4934 (__arm_vidupq_x_n_u8): Likewise.
4935 (__arm_vddupq_x_n_u8): Likewise.
4936 (__arm_vidupq_x_n_u16): Likewise.
4937 (__arm_vddupq_x_n_u16): Likewise.
4938 (__arm_vidupq_x_n_u32): Likewise.
4939 (__arm_vddupq_x_n_u32): Likewise.
4940 (__arm_vldrdq_gather_offset_s64): Likewise.
4941 (__arm_vldrdq_gather_offset_u64): Likewise.
4942 (__arm_vldrdq_gather_offset_z_s64): Likewise.
4943 (__arm_vldrdq_gather_offset_z_u64): Likewise.
4944 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
4945 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
4946 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
4947 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
4948 (__arm_vidupq_m_n_u8): Likewise.
4949 (__arm_vidupq_m_n_u16): Likewise.
4950 (__arm_vidupq_m_n_u32): Likewise.
4951 (__arm_vddupq_m_n_u8): Likewise.
4952 (__arm_vddupq_m_n_u16): Likewise.
4953 (__arm_vddupq_m_n_u32): Likewise.
4954 (__arm_vidupq_n_u16): Likewise.
4955 (__arm_vidupq_n_u32): Likewise.
4956 (__arm_vidupq_n_u8): Likewise.
4957 (__arm_vddupq_n_u16): Likewise.
4958 (__arm_vddupq_n_u32): Likewise.
4959 (__arm_vddupq_n_u8): Likewise.
4961 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
4963 * doc/install.texi (D-Specific Options): Document
4964 --enable-libphobos-checking and --with-libphobos-druntime-only.
4966 2020-04-23 Jakub Jelinek <jakub@redhat.com>
4969 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
4970 cxx17_empty_base_seen argument. Pass it to recursive calls.
4971 Ignore cxx17_empty_base_field_p fields after setting
4972 *cxx17_empty_base_seen to true.
4973 (rs6000_discover_homogeneous_aggregate): Adjust
4974 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
4975 aggregates with C++17 empty base fields.
4978 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
4979 if last_decl is error_mark_node or has such a TREE_TYPE.
4982 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
4983 if last_decl is error_mark_node or has such a TREE_TYPE.
4985 2020-04-22 Felix Yang <felix.yang@huawei.com>
4988 * config/aarch64/aarch64.h (TARGET_SVE):
4989 Add && !TARGET_GENERAL_REGS_ONLY.
4990 (TARGET_SVE2): Add && TARGET_SVE.
4991 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
4992 TARGET_SVE2_SM4): Add && TARGET_SVE2.
4993 * config/aarch64/aarch64-sve-builtins.h
4994 (sve_switcher::m_old_general_regs_only): New member.
4995 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
4997 (reported_missing_registers_p): New variable.
4998 (check_required_extensions): Call check_required_registers before
4999 return if all required extenstions are present.
5000 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
5001 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
5002 global_options.x_target_flags.
5003 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
5004 global_options.x_target_flags if m_old_general_regs_only is true.
5006 2020-04-22 Zackery Spytz <zspytz@gmail.com>
5008 * doc/extend.exi: Add "free" to list of other builtin functions
5011 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
5014 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
5016 (store_quadpti): Ditto.
5017 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
5018 plq will be used and doesn't need it.
5019 (atomic_store<mode>): Ditto, for pstq.
5021 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
5023 * doc/invoke.texi: Update flags turned on by -O3.
5025 2020-04-22 Jakub Jelinek <jakub@redhat.com>
5028 * config/ia64/ia64.c (hfa_element_mode): Ignore
5029 cxx17_empty_base_field_p fields.
5032 * calls.h (cxx17_empty_base_field_p): Declare.
5033 * calls.c (cxx17_empty_base_field_p): Define.
5035 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
5037 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
5039 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
5040 Andre Vieira <andre.simoesdiasvieira@arm.com>
5041 Mihail Ionescu <mihail.ionescu@arm.com>
5043 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
5044 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
5045 (ALL_QUIRKS): Add quirk_no_asmcpu.
5046 (cortex-m55): Define new cpu.
5047 * config/arm/arm-tables.opt: Regenerate.
5048 * config/arm/arm-tune.md: Likewise.
5049 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
5051 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
5053 PR tree-optimization/94700
5054 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
5055 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
5056 of similarly-structured but distinct vector types.
5058 2020-04-21 Martin Sebor <msebor@redhat.com>
5061 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
5062 the computation of the lower bound of the source access size.
5063 (builtin_access::generic_overlap): Remove a hack for setting ranges
5066 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
5068 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
5069 (ASM_WEAKEN_DECL): New define.
5070 (HAVE_GAS_WEAKREF): Undefine.
5072 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
5074 PR tree-optimization/94683
5075 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
5076 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
5077 but distinct vector types.
5079 2020-04-21 Jakub Jelinek <jakub@redhat.com>
5082 * stor-layout.c (place_field, finalize_record_size): Don't emit
5083 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
5084 * ubsan.c (ubsan_get_type_descriptor_type,
5085 ubsan_get_source_location_type, ubsan_create_data): Set
5087 * asan.c (asan_global_struct): Likewise.
5089 2020-04-21 Duan bo <duanbo3@huawei.com>
5092 * config/aarch64/aarch64.c: Add an error message for option conflict.
5093 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
5094 incompatible with -fpic, -fPIC and -mabi=ilp32.
5096 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
5099 * omp-low.c (new_omp_context): Remove assignments to
5100 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
5102 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
5104 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
5105 ("popcountv2di2_vx"): Use simplify_gen_subreg.
5107 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
5110 * config/s390/s390-builtin-types.def: Add 3 new function modes.
5111 * config/s390/s390-builtins.def: Add mode dependent low-level
5112 builtin and map the overloaded builtins to these.
5113 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
5114 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
5116 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
5118 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
5119 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
5120 estimated VF and is no worse at double the estimated VF.
5122 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
5125 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
5126 order of arguments to rtx_vector_builder.
5127 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
5128 When extending the trailing constants to a full vector, replace any
5129 variables with zeros.
5131 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
5134 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
5137 2020-04-20 Martin Liska <mliska@suse.cz>
5139 * symtab.c (symtab_node::dump_references): Add space after
5141 (symtab_node::dump_referring): Likewise.
5143 2020-04-18 Jeff Law <law@redhat.com>
5146 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
5149 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
5151 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
5152 attributes): Document d_runtime_has_std_library.
5154 2020-04-17 Jeff Law <law@redhat.com>
5156 PR rtl-optimization/90275
5157 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
5158 when the destination has a REG_UNUSED note.
5160 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
5163 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
5166 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
5168 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
5169 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
5170 cost of load and store insns if one loop iteration has enough scalar
5171 elements to use an Advanced SIMD LDP or STP.
5172 (aarch64_add_stmt_cost): Update call accordingly.
5174 2020-04-17 Jakub Jelinek <jakub@redhat.com>
5175 Jeff Law <law@redhat.com>
5178 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
5179 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
5180 or pos + len >= 32, or pos + len is equal to operands[2] precision
5181 and operands[2] is not a register operand. During splitting perform
5182 SImode AND if operands[0] doesn't have CCZmode and pos + len is
5183 equal to mode precision.
5185 2020-04-17 Richard Biener <rguenther@suse.de>
5188 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
5190 * dwarf2out.c (dw_val_equal_p): Fix pasto in
5191 dw_val_class_vms_delta comparison.
5192 * optabs.c (expand_binop_directly): Fix pasto in commutation
5194 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
5197 2020-04-17 Jakub Jelinek <jakub@redhat.com>
5199 PR rtl-optimization/94618
5200 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
5201 insn is the BB_END of its block, but also when it is only followed
5202 by DEBUG_INSNs in its block.
5204 PR tree-optimization/94621
5205 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
5206 Move id->adjust_array_error_bounds check first in the condition.
5208 2020-04-17 Martin Liska <mliska@suse.cz>
5209 Jonathan Yong <10walls@gmail.com>
5211 PR gcov-profile/94570
5212 * coverage.c (coverage_init): Use separator properly.
5214 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
5216 PR rtl-optimization/93974
5217 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
5218 (rs6000_cannot_substitute_mem_equiv_p): New function.
5220 2020-04-16 Martin Jambor <mjambor@suse.cz>
5223 * ipa-inline.h (ipa_saved_clone_sources): Declare.
5224 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
5225 (save_inline_function_body): Link the new body holder with the
5227 * cgraph.c: Include ipa-inline.h.
5228 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
5229 the statement in ipa_saved_clone_sources.
5230 * cgraphunit.c: Include ipa-inline.h.
5231 (expand_all_functions): Free ipa_saved_clone_sources.
5233 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
5236 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
5237 the VNx16BI lowpart of the recursively-generated constant.
5239 2020-04-16 Martin Liska <mliska@suse.cz>
5240 Jakub Jelinek <jakub@redhat.com>
5243 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
5244 DECL_IS_REPLACEABLE_OPERATOR during cloning.
5245 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
5246 (propagate_necessity): Check operator names.
5248 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
5250 PR rtl-optimization/94605
5251 * early-remat.c (early_remat::process_block): Handle insns that
5252 set multiple candidate registers.
5253 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
5255 PR gcov-profile/93401
5256 * common.opt (profile-prefix-path): New option.
5257 * coverae.c: Include diagnostics.h.
5258 (coverage_init): Strip profile prefix path.
5259 * doc/invoke.texi (-fprofile-prefix-path): Document.
5261 2020-04-16 Richard Biener <rguenther@suse.de>
5264 * expr.c (emit_move_multi_word): Do not generate code when
5265 the destination part is undefined_operand_subword_p.
5266 * lower-subreg.c (resolve_clobber): Look through a paradoxica
5269 2020-04-16 Martin Jambor <mjambor@suse.cz>
5271 PR tree-optimization/94598
5272 * tree-sra.c (verify_sra_access_forest): Fix verification of total
5273 scalarization accesses under access to one-element arrays.
5275 2020-04-16 Jakub Jelinek <jakub@redhat.com>
5278 * function.c (assign_parm_find_data_types): Add workaround for
5279 BROKEN_VALUE_INITIALIZATION compilers.
5281 2020-04-16 Richard Biener <rguenther@suse.de>
5283 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
5286 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
5289 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
5290 Require OPTION_MASK_ISA_SSE2.
5292 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
5295 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
5296 Don't construct a dump_context temporary to call static method.
5298 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
5300 * config/aarch64/falkor-tag-collision-avoidance.c
5301 (valid_src_p): Check for aarch64_address_info type before
5302 accessing base field.
5304 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
5306 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
5307 (V_sz_elem2): Remove unused mode attribute.
5309 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
5311 * config/arm/arm.md (arm_movdi): Disallow for MVE.
5313 2020-04-15 Richard Biener <rguenther@suse.de>
5316 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
5317 alias_sets_conflict_p for pointers.
5319 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
5322 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
5323 (extendhisi2_internal): Add %v1 before the load instructions.
5325 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
5328 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
5329 use PC-relative addressing for TLS references.
5331 2020-04-14 Martin Jambor <mjambor@suse.cz>
5334 * ipa-sra.c: Include internal-fn.h.
5335 (enum isra_scan_context): Update comment.
5336 (scan_function): Treat calls to internal_functions like loads or stores.
5338 2020-04-14 Yang Yang <yangyang305@huawei.com>
5340 PR tree-optimization/94574
5341 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
5342 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
5344 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
5347 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
5349 2020-04-13 Martin Sebor <msebor@redhat.com>
5351 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
5352 -Wformat-truncation. Move -Wzero-length-bounds last.
5353 (-Wrestrict): Document positive form of option enabled by -Wall.
5355 2020-04-13 Zachary Spytz <zspytz@gmail.com>
5357 * doc/extend.texi: Add realloc to list of built-in functions
5358 are recognized by the compiler.
5360 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
5363 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
5364 pointer in word_mode for eh_return epilogues.
5366 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
5368 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
5369 memory references in %B, %C and %D operand selectors when the inner
5370 operand is a post increment address.
5372 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
5374 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
5375 reference by 4 bytes, and %D memory reference by 6 bytes.
5377 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
5380 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
5381 condition for V4SI, V8HI and V16QI modes.
5383 2020-04-11 Jakub Jelinek <jakub@redhat.com>
5387 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
5390 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
5394 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
5395 "#pragma omp declare target" has also been applied.
5397 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
5399 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
5400 when to emit the epilogue_helper insn.
5401 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
5404 2020-04-09 Jakub Jelinek <jakub@redhat.com>
5407 * cselib.h (cselib_record_sp_cfa_base_equiv,
5408 cselib_sp_derived_value_p): Declare.
5409 * cselib.c (cselib_record_sp_cfa_base_equiv,
5410 cselib_sp_derived_value_p): New functions.
5411 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
5412 cselib_sp_derived_value_p values.
5413 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
5414 start of extended basic blocks other than the first one
5415 for !frame_pointer_needed functions.
5417 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
5419 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
5420 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
5421 (aarch64_sve2048_hw): Document.
5422 * config/aarch64/aarch64-protos.h
5423 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
5424 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
5425 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
5426 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
5428 (find_type_suffix_for_scalar_type): Use it instead of comparing
5430 (function_resolver::infer_vector_or_tuple_type): Likewise.
5431 (function_resolver::require_vector_type): Likewise.
5432 (handle_arm_sve_vector_bits_attribute): New function.
5433 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
5434 (aarch64_attribute_table): Add arm_sve_vector_bits.
5435 (aarch64_return_in_memory_1):
5436 (pure_scalable_type_info::piece::get_rtx): New function.
5437 (pure_scalable_type_info::num_zr): Likewise.
5438 (pure_scalable_type_info::num_pr): Likewise.
5439 (pure_scalable_type_info::get_rtx): Likewise.
5440 (pure_scalable_type_info::analyze): Likewise.
5441 (pure_scalable_type_info::analyze_registers): Likewise.
5442 (pure_scalable_type_info::analyze_array): Likewise.
5443 (pure_scalable_type_info::analyze_record): Likewise.
5444 (pure_scalable_type_info::add_piece): Likewise.
5445 (aarch64_some_values_include_pst_objects_p): Likewise.
5446 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
5447 to analyze whether the type is returned in SVE registers.
5448 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
5449 is passed in SVE registers.
5450 (aarch64_pass_by_reference_1): New function, extracted from...
5451 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
5452 to analyze whether the type is a pure scalable type and, if so,
5453 whether it should be passed by reference.
5454 (aarch64_return_in_msb): Return false for pure scalable types.
5455 (aarch64_function_value_1): Fold back into...
5456 (aarch64_function_value): ...this function. Use
5457 pure_scalable_type_info to analyze whether the type is a pure
5458 scalable type and, if so, which registers it should use. Handle
5459 types that include pure scalable types but are not themselves
5460 pure scalable types.
5461 (aarch64_return_in_memory_1): New function, split out from...
5462 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
5463 to analyze whether the type is a pure scalable type and, if so,
5464 whether it should be returned by reference.
5465 (aarch64_layout_arg): Remove orig_mode argument. Use
5466 pure_scalable_type_info to analyze whether the type is a pure
5467 scalable type and, if so, which registers it should use. Handle
5468 types that include pure scalable types but are not themselves
5469 pure scalable types.
5470 (aarch64_function_arg): Update call accordingly.
5471 (aarch64_function_arg_advance): Likewise.
5472 (aarch64_pad_reg_upward): On big-endian targets, return false for
5473 pure scalable types that are smaller than 16 bytes.
5474 (aarch64_member_type_forces_blk): New function.
5475 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
5476 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
5477 correspond to built-in SVE types. Do not rely on a vector mode
5478 if the type includes an pure scalable type. When returning true,
5479 assert that the mode is not an SVE mode.
5480 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
5481 built-in types here. When returning true, assert that the type
5482 does not have an SVE mode.
5483 (aarch64_can_change_mode_class): Don't allow anything to change
5484 between a predicate mode and a non-predicate mode. Also don't
5485 allow changes between SVE vector modes and other modes that
5486 might be bigger than 128 bits.
5487 (aarch64_invalid_binary_op): Reject binary operations that mix
5488 SVE and GNU vector types.
5489 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
5491 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
5493 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
5494 "SVE sizeless type".
5495 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
5496 (sizeless_type_p): New functions.
5497 (register_builtin_types): Apply make_type_sizeless to the type.
5498 (register_tuple_type): Likewise.
5499 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
5501 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
5503 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
5506 2020-04-09 Martin Jambor <mjambor@suse.cz>
5507 Richard Biener <rguenther@suse.de>
5509 PR tree-optimization/94482
5510 * tree-sra.c (create_access_replacement): Dump new replacement with
5512 (sra_modify_expr): Fix handling of cases when the original EXPR writes
5513 to only part of the replacement.
5514 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
5515 the first operand of combinations into REAL/IMAGPART_EXPR and
5518 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
5520 * doc/sourcebuild.texi (check-function-bodies): Treat the third
5521 parameter as a list of option regexps and require each regexp
5524 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
5527 * config/aarch64/falkor-tag-collision-avoidance.c
5528 (valid_src_p): Fix missing rtx type check.
5530 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
5531 Richard Biener <rguenther@suse.de>
5533 PR tree-optimization/93674
5534 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
5535 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
5536 or non-mode precision type, add candidate in unsigned type with the
5539 2020-04-08 Clement Chigot <clement.chigot@atos.net>
5541 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
5542 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
5543 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
5545 2020-04-08 Jakub Jelinek <jakub@redhat.com>
5548 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
5550 * reload1.c (eliminate_regs_1): Avoid creating
5551 (plus (reg) (const_int 0)) in DEBUG_INSNs.
5553 PR tree-optimization/94524
5554 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
5555 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
5556 op1 rather than op1 itself at the end. Punt for signed modulo by
5557 most negative constant.
5558 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
5559 modulo by most negative constant.
5561 2020-04-08 Richard Biener <rguenther@suse.de>
5563 PR rtl-optimization/93946
5564 * cse.c (cse_insn): Record the tabled expression in
5565 src_related. Verify a redundant store removal is valid.
5567 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
5570 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
5571 ENDBR at function entry if function will be called indirectly.
5573 2020-04-08 Jakub Jelinek <jakub@redhat.com>
5576 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
5579 2020-04-08 Martin Liska <mliska@suse.cz>
5582 * gimple.c (gimple_call_operator_delete_p): Rename to...
5583 (gimple_call_replaceable_operator_delete_p): ... this.
5584 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
5585 * gimple.h (gimple_call_operator_delete_p): Rename to ...
5586 (gimple_call_replaceable_operator_delete_p): ... this.
5587 * tree-core.h (tree_function_decl): Add replaceable_operator
5589 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
5590 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
5591 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
5592 (eliminate_unnecessary_stmts): Likewise.
5593 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
5594 Pack DECL_IS_REPLACEABLE_OPERATOR.
5595 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
5596 Unpack the field here.
5597 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
5598 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
5599 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
5600 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
5601 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
5602 replaceable operator flags.
5604 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
5605 Matthew Malcomson <matthew.malcomson@arm.com>
5607 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
5608 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
5609 (CX_TERNARY_QUALIFIERS): Likewise.
5610 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
5611 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
5612 (arm_init_acle_builtins): Initialize CDE builtins.
5613 (arm_expand_acle_builtin): Check CDE constant operands.
5614 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
5615 of CDE constant operand.
5616 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
5618 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
5619 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
5620 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
5621 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
5622 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
5623 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
5624 * config/arm/arm_cde_builtins.def: New file.
5625 * config/arm/iterators.md (V_reg): New attribute of SI.
5626 * config/arm/predicates.md (const_int_coproc_operand): New.
5627 (const_int_vcde1_operand, const_int_vcde2_operand): New.
5628 (const_int_vcde3_operand): New.
5629 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
5630 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
5631 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
5632 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
5634 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
5636 * config.gcc: Add arm_cde.h.
5637 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
5638 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
5639 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
5640 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
5641 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
5642 * config/arm/arm.h (TARGET_CDE): New macro.
5643 * config/arm/arm_cde.h: New file.
5644 * doc/invoke.texi: Document CDE options +cdecp[0-7].
5645 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
5647 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
5649 2020-04-08 Jakub Jelinek <jakub@redhat.com>
5651 PR rtl-optimization/94516
5652 * postreload.c: Include rtl-iter.h.
5653 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
5654 looking for all MEMs with RTX_AUTOINC operand.
5655 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
5657 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
5659 * omp-grid.c (grid_eliminate_combined_simd_part): Use
5660 OMP_CLAUSE_CODE to access the omp clause code.
5662 2020-04-07 Jeff Law <law@redhat.com>
5664 PR rtl-optimization/92264
5665 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
5666 the destination is the stack pointer.
5668 2020-04-07 Jakub Jelinek <jakub@redhat.com>
5670 PR rtl-optimization/94291
5671 PR rtl-optimization/84169
5672 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
5673 must be a REG or SUBREG of REG; if it is not one of these, don't
5676 2020-04-07 Richard Biener <rguenther@suse.de>
5679 * gimplify.c (gimplify_addr_expr): Also consider generated
5682 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5684 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
5686 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5688 * config/arm/arm_mve.h: Cast some pointers to expected types.
5690 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5692 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
5693 same with '__arm_' prefix.
5695 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5697 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
5699 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5701 * config/arm/arm.c (arm_mve_immediate_check): Removed.
5702 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
5703 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
5704 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
5705 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
5706 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
5707 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
5709 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5711 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
5713 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5715 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
5716 * config/arm/mve/md: Fix v[id]wdup patterns.
5718 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5720 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
5721 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
5723 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5725 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
5726 and remove const_ptr enums.
5728 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5730 * config/arm/arm_mve.h (vsubq_n): Merge with...
5732 (vmulq_n): Merge with...
5734 (__ARM_mve_typeid): Simplify scalar and constant detection.
5736 2020-04-07 Jakub Jelinek <jakub@redhat.com>
5739 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
5740 for inter-lane permutation for 64-byte modes.
5743 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
5744 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
5745 Assume it is a REG after that instead of testing it and doing FAIL
5746 otherwise. Formatting fix.
5748 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
5750 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
5752 2020-04-07 Jakub Jelinek <jakub@redhat.com>
5755 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
5756 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
5758 2020-04-06 Jakub Jelinek <jakub@redhat.com>
5760 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
5761 + const0_rtx return the SP_DERIVED_VALUE_P.
5763 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
5765 PR rtl-optimization/92989
5766 * lra-lives.c (process_bb_lives): Do not treat eh_return data
5767 registers as being live at the beginning of the EH receiver.
5769 2020-04-05 Zachary Spytz <zspytz@gmail.com>
5771 * extend.texi: Add free to list of ISO C90 functions that
5772 are recognized by the compiler.
5774 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
5776 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
5779 * config/microblaze/microblaze.md (trap): Update output pattern.
5781 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
5782 Jakub Jelinek <jakub@redhat.com>
5785 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
5786 arrays, pointer-to-members, function types and qualifiers when
5787 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
5788 to emit type again on definition.
5790 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
5793 * ipa-fnsummary.c (vrp_will_run_p): New function.
5794 (fre_will_run_p): New function.
5795 (evaluate_properties_for_edge): Use it.
5796 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
5797 !optimize_debug to optimize_debug.
5799 2020-04-04 Jakub Jelinek <jakub@redhat.com>
5801 PR rtl-optimization/94468
5802 * cselib.c (references_value_p): Formatting fix.
5803 (cselib_useless_value_p): New function.
5804 (discard_useless_locs, discard_useless_values,
5805 cselib_invalidate_regno_val, cselib_invalidate_mem,
5806 cselib_record_set): Use it instead of
5807 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
5810 * tree-iterator.h (expr_single): Declare.
5811 * tree-iterator.c (expr_single): New function.
5812 * tree.h (protected_set_expr_location_if_unset): Declare.
5813 * tree.c (protected_set_expr_location): Use expr_single.
5814 (protected_set_expr_location_if_unset): New function.
5816 2020-04-03 Jeff Law <law@redhat.com>
5818 PR rtl-optimization/92264
5819 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
5820 reloading of auto-increment addressing modes.
5822 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
5825 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
5828 2020-04-03 Jeff Law <law@redhat.com>
5830 PR rtl-optimization/92264
5831 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
5832 post-increment addressing of source operands as well as residuals
5833 when computing any adjustments to the input pointer.
5835 2020-04-03 Jakub Jelinek <jakub@redhat.com>
5838 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
5839 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
5840 second half of first lane from first lane of second operand and
5841 first half of second lane from second lane of first operand.
5843 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
5845 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
5847 2020-04-03 Tamar Christina <tamar.christina@arm.com>
5850 * common/config/aarch64/aarch64-common.c
5851 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
5853 2020-04-03 Richard Biener <rguenther@suse.de>
5856 * tree.c (array_ref_low_bound): Deal with released SSA names
5859 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
5861 * config/gcn/gcn.c (print_operand): Handle unordered comparison
5863 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
5864 comparison operators.
5866 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
5868 PR tree-optimization/94443
5869 * tree-vect-loop.c (vectorizable_live_operation): Use
5870 gsi_insert_seq_before to replace gsi_insert_before.
5872 2020-04-03 Martin Liska <mliska@suse.cz>
5875 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
5876 Compare type attributes for gimple_call_fntypes.
5878 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
5880 * alias.c (get_alias_set): Fix comment typos.
5882 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
5885 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
5886 attribute checking used by TYPE.
5888 2020-04-02 Martin Jambor <mjambor@suse.cz>
5891 * ipa-sra.c (struct caller_issues): New fields candidate and
5892 call_from_outside_comdat.
5893 (check_for_caller_issues): Check for calls from outsied of
5894 candidate's same_comdat_group.
5895 (check_all_callers_for_issues): Set up issues.candidate, check result
5897 (mark_callers_calls_comdat_local): New function.
5898 (process_isra_node_results): Set calls_comdat_local of callers if
5901 2020-04-02 Richard Biener <rguenther@suse.de>
5904 * common.opt (ffinite-loops): Initialize to zero.
5905 * opts.c (default_options_table): Remove OPT_ffinite_loops
5907 * cfgloop.h (loop::finite_p): New member.
5908 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
5909 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
5911 * lto-streamer-in.c (input_cfg): Stream finite_p.
5912 * lto-streamer-out.c (output_cfg): Likewise.
5913 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
5914 from flag_finite_loops at CFG build time.
5915 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
5916 finite_p flag instead of flag_finite_loops.
5917 * doc/invoke.texi (ffinite-loops): Adjust documentation of
5920 2020-04-02 Richard Biener <rguenther@suse.de>
5923 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
5924 DW_TAG_imported_unit.
5926 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
5928 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
5929 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
5932 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
5934 PR tree-optimization/94401
5935 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
5936 access type when loading halves of vector to avoid peeling for gaps.
5938 2020-04-02 Jakub Jelinek <jakub@redhat.com>
5940 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
5941 between a string literal and MIPS_SYSVERSION_SPEC macro.
5943 2020-04-02 Martin Jambor <mjambor@suse.cz>
5945 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
5947 2020-04-02 Jakub Jelinek <jakub@redhat.com>
5949 PR rtl-optimization/92264
5950 * params.opt (-param=max-find-base-term-values=): Decrease default
5953 PR rtl-optimization/92264
5954 * rtl.h (struct rtx_def): Mention that call bit is used as
5955 SP_DERIVED_VALUE_P in cselib.c.
5956 * cselib.c (SP_DERIVED_VALUE_P): Define.
5957 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
5958 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
5959 val_rtx and sp based expression where offsets cancel each other.
5960 (preserve_constants_and_equivs): Formatting fix.
5961 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
5962 locs list for cfa_base_preserved_val if needed. Formatting fix.
5963 (autoinc_split): If the to be returned value is a REG, MEM or
5964 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
5965 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
5966 (rtx_equal_for_cselib_1): Call autoinc_split even if both
5967 expressions are PLUS in Pmode with CONST_INT second operands.
5968 Handle SP_DERIVED_VALUE_P cases.
5969 (cselib_hash_plus_const_int): New function.
5970 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
5971 second operand, as well as for PRE_DEC etc. that ought to be
5972 hashed the same way.
5973 (cselib_subst_to_values): Substitute PLUS with Pmode and
5974 CONST_INT operand if the first operand is a VALUE which has
5975 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
5976 SP_DERIVED_VALUE_P + adjusted offset.
5977 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
5978 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
5979 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
5980 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
5981 on the sp value before calling cselib_add_permanent_equiv on the
5983 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
5984 in the insn without REG_INC note.
5985 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
5986 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
5989 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
5990 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
5992 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5995 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
5996 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
5997 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
5998 intrinsic defintion by adding a new builtin call to writeback into base
6000 (__arm_vldrdq_gather_base_wb_u64): Likewise.
6001 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
6002 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
6003 (__arm_vldrwq_gather_base_wb_s32): Likewise.
6004 (__arm_vldrwq_gather_base_wb_u32): Likewise.
6005 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
6006 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
6007 (__arm_vldrwq_gather_base_wb_f32): Likewise.
6008 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
6009 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
6010 builtin's qualifier.
6011 (vldrdq_gather_base_wb_z_u): Likewise.
6012 (vldrwq_gather_base_wb_u): Likewise.
6013 (vldrdq_gather_base_wb_u): Likewise.
6014 (vldrwq_gather_base_wb_z_s): Likewise.
6015 (vldrwq_gather_base_wb_z_f): Likewise.
6016 (vldrdq_gather_base_wb_z_s): Likewise.
6017 (vldrwq_gather_base_wb_s): Likewise.
6018 (vldrwq_gather_base_wb_f): Likewise.
6019 (vldrdq_gather_base_wb_s): Likewise.
6020 (vldrwq_gather_base_nowb_z_u): Define builtin.
6021 (vldrdq_gather_base_nowb_z_u): Likewise.
6022 (vldrwq_gather_base_nowb_u): Likewise.
6023 (vldrdq_gather_base_nowb_u): Likewise.
6024 (vldrwq_gather_base_nowb_z_s): Likewise.
6025 (vldrwq_gather_base_nowb_z_f): Likewise.
6026 (vldrdq_gather_base_nowb_z_s): Likewise.
6027 (vldrwq_gather_base_nowb_s): Likewise.
6028 (vldrwq_gather_base_nowb_f): Likewise.
6029 (vldrdq_gather_base_nowb_s): Likewise.
6030 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
6032 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
6033 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
6034 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
6035 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
6036 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
6037 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
6038 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
6039 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
6040 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
6041 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
6042 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
6044 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
6046 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
6047 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
6048 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
6049 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
6050 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
6051 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
6052 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
6053 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
6054 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
6056 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
6057 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
6058 Remove constraints from expander.
6059 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
6060 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
6061 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
6062 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
6063 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
6064 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
6066 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
6068 PR rtl-optimization/94123
6069 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
6070 flag_split_wide_types_early.
6072 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
6074 * doc/extend.texi (Common Function Attributes): Fix typo.
6076 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
6079 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
6082 2020-04-01 Zackery Spytz <zspytz@gmail.com>
6084 * doc/extend.texi: Fix a typo in the documentation of the
6085 copy function attribute.
6087 2020-04-01 Jakub Jelinek <jakub@redhat.com>
6090 * tree-object-size.c (pass_object_sizes::execute): Don't call
6091 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
6092 call replace_call_with_value.
6094 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
6096 PR tree-optimization/94043
6097 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
6098 phi for vec_lhs and use it for lane extraction.
6100 2020-03-31 Felix Yang <felix.yang@huawei.com>
6102 PR tree-optimization/94398
6103 * tree-vect-stmts.c (vectorizable_store): Instead of calling
6104 vect_supportable_dr_alignment, set alignment_support_scheme to
6105 dr_unaligned_supported for gather-scatter accesses.
6106 (vectorizable_load): Likewise.
6108 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
6110 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
6112 (vnsi, VnSI, vndi, VnDI): New mode attributes.
6113 (mov<mode>): Use <VnDI> in place of V64DI.
6114 (mov<mode>_exec): Likewise.
6115 (mov<mode>_sgprbase): Likewise.
6116 (reload_out<mode>): Likewise.
6117 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
6118 (gather_load<mode>v64si): Rename to ...
6119 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
6120 and <VnDI> in place of V64DI.
6121 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
6122 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
6123 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
6124 (scatter_store<mode>v64si): Rename to ...
6125 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
6126 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
6127 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
6128 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
6129 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
6130 (ds_bpermute<mode>): Use <VnSI>.
6131 (addv64si3_vcc<exec_vcc>): Rename to ...
6132 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
6133 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
6134 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
6135 (addcv64si3<exec_vcc>): Rename to ...
6136 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
6137 (subv64si3_vcc<exec_vcc>): Rename to ...
6138 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
6139 (subcv64si3<exec_vcc>): Rename to ...
6140 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
6141 (addv64di3): Rename to ...
6142 (add<mode>3): ... this, and use V_DI.
6143 (addv64di3_exec): Rename to ...
6144 (add<mode>3_exec): ... this, and use V_DI.
6145 (subv64di3): Rename to ...
6146 (sub<mode>3): ... this, and use V_DI.
6147 (subv64di3_exec): Rename to ...
6148 (sub<mode>3_exec): ... this, and use V_DI.
6149 (addv64di3_zext): Rename to ...
6150 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
6151 (addv64di3_zext_exec): Rename to ...
6152 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
6153 (addv64di3_zext_dup): Rename to ...
6154 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
6155 (addv64di3_zext_dup_exec): Rename to ...
6156 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
6157 (addv64di3_zext_dup2): Rename to ...
6158 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
6159 (addv64di3_zext_dup2_exec): Rename to ...
6160 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
6161 (addv64di3_sext_dup2): Rename to ...
6162 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
6163 (addv64di3_sext_dup2_exec): Rename to ...
6164 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
6165 (<su>mulv64si3_highpart<exec>): Rename to ...
6166 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
6167 (mulv64di3): Rename to ...
6168 (mul<mode>3): ... this, and use V_DI and <VnSI>.
6169 (mulv64di3_exec): Rename to ...
6170 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
6171 (mulv64di3_zext): Rename to ...
6172 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
6173 (mulv64di3_zext_exec): Rename to ...
6174 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
6175 (mulv64di3_zext_dup2): Rename to ...
6176 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
6177 (mulv64di3_zext_dup2_exec): Rename to ...
6178 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
6179 (<expander>v64di3): Rename to ...
6180 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
6181 (<expander>v64di3_exec): Rename to ...
6182 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
6183 (<expander>v64si3<exec>): Rename to ...
6184 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
6185 (v<expander>v64si3<exec>): Rename to ...
6186 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
6187 (<expander>v64si3<exec>): Rename to ...
6188 (<expander><vnsi>3<exec>): ... this, and use V_SI.
6189 (subv64df3<exec>): Rename to ...
6190 (sub<mode>3<exec>): ... this, and use V_DF.
6191 (truncv64di<mode>2): Rename to ...
6192 (trunc<vndi><mode>2): ... this, and use <VnDI>.
6193 (truncv64di<mode>2_exec): Rename to ...
6194 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
6195 (<convop><mode>v64di2): Rename to ...
6196 (<convop><mode><vndi>2): ... this, and use <VnDI>.
6197 (<convop><mode>v64di2_exec): Rename to ...
6198 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
6199 (vec_cmp<u>v64qidi): Rename to ...
6200 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
6201 (vec_cmp<u>v64qidi_exec): Rename to ...
6202 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
6203 (vcond_mask_<mode>di): Use <VnDI>.
6204 (maskload<mode>di): Likewise.
6205 (maskstore<mode>di): Likewise.
6206 (mask_gather_load<mode>v64si): Rename to ...
6207 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
6208 (mask_scatter_store<mode>v64si): Rename to ...
6209 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
6210 (*<reduc_op>_dpp_shr_v64di): Rename to ...
6211 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
6212 (*plus_carry_in_dpp_shr_v64si): Rename to ...
6213 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
6214 (*plus_carry_dpp_shr_v64di): Rename to ...
6215 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
6216 (vec_seriesv64si): Rename to ...
6217 (vec_series<mode>): ... this, and use V_SI.
6218 (vec_seriesv64di): Rename to ...
6219 (vec_series<mode>): ... this, and use V_DI.
6221 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
6223 * config/arc/arc.c (arc_print_operand): Use
6224 HOST_WIDE_INT_PRINT_DEC macro.
6226 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
6228 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
6230 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6232 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
6234 (__arm_vbicq): Likewise.
6236 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
6238 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
6240 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6242 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
6243 common section of both MVE Integer and MVE Floating Point.
6245 (vaddlvq_p): Likewise.
6246 (vaddvaq): Likewise.
6247 (vaddvq_p): Likewise.
6248 (vcmpcsq): Likewise.
6249 (vmlsdavxq): Likewise.
6250 (vmlsdavq): Likewise.
6251 (vmladavxq): Likewise.
6252 (vmladavq): Likewise.
6254 (vminavq): Likewise.
6256 (vmaxavq): Likewise.
6257 (vmlaldavq): Likewise.
6258 (vcmphiq): Likewise.
6259 (vaddlvaq): Likewise.
6260 (vrmlaldavhq): Likewise.
6261 (vrmlaldavhxq): Likewise.
6262 (vrmlsldavhq): Likewise.
6263 (vrmlsldavhxq): Likewise.
6264 (vmlsldavxq): Likewise.
6265 (vmlsldavq): Likewise.
6267 (vrmlaldavhaq): Likewise.
6268 (vcmpgeq_m_n): Likewise.
6269 (vmlsdavxq_p): Likewise.
6270 (vmlsdavq_p): Likewise.
6271 (vmlsdavaxq): Likewise.
6272 (vmlsdavaq): Likewise.
6273 (vaddvaq_p): Likewise.
6274 (vcmpcsq_m_n): Likewise.
6275 (vcmpcsq_m): Likewise.
6276 (vmladavxq_p): Likewise.
6277 (vmladavq_p): Likewise.
6278 (vmladavaxq): Likewise.
6279 (vmladavaq): Likewise.
6280 (vminvq_p): Likewise.
6281 (vminavq_p): Likewise.
6282 (vmaxvq_p): Likewise.
6283 (vmaxavq_p): Likewise.
6284 (vcmphiq_m): Likewise.
6285 (vaddlvaq_p): Likewise.
6286 (vmlaldavaq): Likewise.
6287 (vmlaldavaxq): Likewise.
6288 (vmlaldavq_p): Likewise.
6289 (vmlaldavxq_p): Likewise.
6290 (vmlsldavaq): Likewise.
6291 (vmlsldavaxq): Likewise.
6292 (vmlsldavq_p): Likewise.
6293 (vmlsldavxq_p): Likewise.
6294 (vrmlaldavhaxq): Likewise.
6295 (vrmlaldavhq_p): Likewise.
6296 (vrmlaldavhxq_p): Likewise.
6297 (vrmlsldavhaq): Likewise.
6298 (vrmlsldavhaxq): Likewise.
6299 (vrmlsldavhq_p): Likewise.
6300 (vrmlsldavhxq_p): Likewise.
6301 (vabavq_p): Likewise.
6302 (vmladavaq_p): Likewise.
6303 (vstrbq_scatter_offset): Likewise.
6304 (vstrbq_p): Likewise.
6305 (vstrbq_scatter_offset_p): Likewise.
6306 (vstrdq_scatter_base_p): Likewise.
6307 (vstrdq_scatter_base): Likewise.
6308 (vstrdq_scatter_offset_p): Likewise.
6309 (vstrdq_scatter_offset): Likewise.
6310 (vstrdq_scatter_shifted_offset_p): Likewise.
6311 (vstrdq_scatter_shifted_offset): Likewise.
6312 (vmaxq_x): Likewise.
6313 (vminq_x): Likewise.
6314 (vmovlbq_x): Likewise.
6315 (vmovltq_x): Likewise.
6316 (vmulhq_x): Likewise.
6317 (vmullbq_int_x): Likewise.
6318 (vmullbq_poly_x): Likewise.
6319 (vmulltq_int_x): Likewise.
6320 (vmulltq_poly_x): Likewise.
6323 2020-03-31 Jakub Jelinek <jakub@redhat.com>
6326 * config/aarch64/constraints.md (Uph): New constraint.
6327 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
6328 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
6331 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
6332 Jakub Jelinek <jakub@redhat.com>
6335 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
6336 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
6338 2020-03-31 Jakub Jelinek <jakub@redhat.com>
6340 PR tree-optimization/94403
6341 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
6342 ENUMERAL_TYPE lhs_type.
6344 PR rtl-optimization/94344
6345 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
6346 conversions, either on both operands of |^+ or just one. Handle
6347 also extra same precision conversion on RSHIFT_EXPR first operand
6348 provided RSHIFT_EXPR is performed in unsigned type.
6350 2020-03-30 David Malcolm <dmalcolm@redhat.com>
6352 * lra.c (finish_insn_code_data_once): Set the array elements
6353 to NULL after freeing them.
6355 2020-03-30 Andreas Schwab <schwab@suse.de>
6357 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
6360 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
6362 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
6363 to skip defining builtins based on builtin_mask.
6365 2020-03-30 Jakub Jelinek <jakub@redhat.com>
6368 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
6369 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
6370 operand is a register. Don't enable masked variants for V*[QH]Imode.
6373 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
6374 <store_mask_constraint> instead of m in output operand constraint.
6375 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
6378 2020-03-30 Alan Modra <amodra@gmail.com>
6380 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
6381 (rs6000_indirect_call_template_1): Adjust to suit.
6382 * config/rs6000/rs6000.md (call_local): Merge call_local32,
6383 call_local64, and call_local_aix.
6384 (call_value_local): Simlarly.
6385 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
6386 and disable pattern when CALL_LONG.
6387 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
6388 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
6389 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
6391 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
6394 * doc/invoke.texi: Update -falign-functions, -falign-loops and
6395 -falign-jumps documentation.
6397 2020-03-29 Martin Liska <mliska@suse.cz>
6400 * cgraphunit.c (process_function_and_variable_attributes): Remove
6401 double 'attribute' words.
6403 2020-03-29 John David Anglin <dave.anglin@bell.net>
6405 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
6408 2020-03-28 Jakub Jelinek <jakub@redhat.com>
6411 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
6412 to true after setting size to integer_one_node.
6414 PR tree-optimization/94329
6415 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
6416 on the last stmt in a bb, make sure gsi_prev isn't done immediately
6419 2020-03-27 Alan Modra <amodra@gmail.com>
6422 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
6423 for PLT16_LO and PLT_PCREL.
6424 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
6425 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
6426 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
6428 2020-03-27 Martin Sebor <msebor@redhat.com>
6431 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
6433 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
6435 * config/gcn/gcn-valu.md:
6436 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
6437 (VEC_1REG_MODE): Delete.
6438 (VEC_1REG_ALT): Delete.
6439 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
6440 (VEC_1REG_INT_MODE): Delete.
6441 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
6442 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
6443 (VEC_2REG_MODE): Rename to V_2REG throughout.
6444 (VEC_REG_MODE): Rename to V_noHI throughout.
6445 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
6446 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
6447 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
6448 (VEC_INT_MODE): Delete.
6449 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
6450 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
6451 (FP_MODE): Delete and replace with FP throughout.
6452 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
6453 (VCMP_MODE): Rename to V_noQI throughout and move to top.
6454 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
6455 * config/gcn/gcn.md (FP): New mode iterator.
6456 (FP_1REG): New mode iterator.
6458 2020-03-27 David Malcolm <dmalcolm@redhat.com>
6460 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
6461 now emits two .dot files.
6462 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
6463 (graphviz_out::end_tr): Only close a TR, not a TD.
6464 (graphviz_out::begin_td): New.
6465 (graphviz_out::end_td): New.
6466 (graphviz_out::begin_trtd): New, replacing the old implementation
6467 of graphviz_out::begin_tr.
6468 (graphviz_out::end_tdtr): New, replacing the old implementation
6469 of graphviz_out::end_tr.
6470 * graphviz.h (graphviz_out::begin_td): New decl.
6471 (graphviz_out::end_td): New decl.
6472 (graphviz_out::begin_trtd): New decl.
6473 (graphviz_out::end_tdtr): New decl.
6475 2020-03-27 Richard Biener <rguenther@suse.de>
6478 * dwarf2out.c (should_emit_struct_debug): Return false for
6481 2020-03-27 Richard Biener <rguenther@suse.de>
6483 PR tree-optimization/94352
6484 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
6486 (ssa_propagation_engine::ssa_propagate): ... here after
6487 initializing curr_order.
6489 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
6491 PR tree-optimization/90332
6492 * tree-vect-stmts.c (vector_vector_composition_type): New function.
6493 (get_group_load_store_type): Adjust to call
6494 vector_vector_composition_type, extend it to construct with scalar
6496 (vectorizable_load): Likewise.
6498 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
6500 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
6501 (create_ddg_dep_no_link): Likewise.
6502 (add_cross_iteration_register_deps): Move debug instruction check.
6503 Other minor refactoring.
6504 (add_intra_loop_mem_dep): Do not check for debug instructions.
6505 (add_inter_loop_mem_dep): Likewise.
6506 (build_intra_loop_deps): Likewise.
6507 (create_ddg): Do not include debug insns into the graph.
6508 * ddg.h (struct ddg): Remove num_debug field.
6509 * modulo-sched.c (doloop_register_get): Adjust condition.
6510 (res_MII): Remove DDG num_debug field usage.
6511 (sms_schedule_by_order): Use assertion against debug insns.
6512 (ps_has_conflicts): Drop debug insn check.
6514 2020-03-26 Jakub Jelinek <jakub@redhat.com>
6517 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
6518 that contains exactly one non-DEBUG_BEGIN_STMT statement.
6521 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
6522 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
6523 a single non-debug stmt followed by one or more debug stmts.
6524 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
6525 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
6526 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
6527 gimple_seq_last to check if outer_stmt gbind could be reused and
6528 if yes and it is surrounded by any debug stmts, move them into the
6531 PR rtl-optimization/92264
6532 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
6533 for sp based values in !frame_pointer_needed
6534 && !ACCUMULATE_OUTGOING_ARGS functions.
6536 2020-03-26 Felix Yang <felix.yang@huawei.com>
6538 PR tree-optimization/94269
6539 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
6541 operation to single basic block.
6543 2020-03-25 Jeff Law <law@redhat.com>
6545 PR rtl-optimization/90275
6546 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
6549 2020-03-25 Jakub Jelinek <jakub@redhat.com>
6552 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
6553 mode rather than VOIDmode.
6555 2020-03-25 Martin Sebor <msebor@redhat.com>
6558 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
6559 even for alloca calls resulting from system macro expansion.
6560 Include inlining context in all warnings.
6562 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
6565 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
6566 FPRs to change between SDmode and DDmode.
6568 2020-03-25 Martin Sebor <msebor@redhat.com>
6570 PR tree-optimization/94131
6571 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
6573 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
6574 types have constant sizes.
6576 2020-03-25 Martin Liska <mliska@suse.cz>
6579 * configure.ac: Report error only when --with-zstd
6581 * configure: Regenerate.
6583 2020-03-25 Jakub Jelinek <jakub@redhat.com>
6586 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
6587 INSN_CODE (insn) to -1 when changing the pattern.
6589 2020-03-25 Martin Liska <mliska@suse.cz>
6593 * config/i386/i386-features.c (make_resolver_func): Drop
6594 public flag for resolver.
6595 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
6596 group for resolver and drop public flag if possible.
6597 * multiple_target.c (create_dispatcher_calls): Drop unique_name
6598 and resolution as we want to enable LTO privatization of the default
6601 2020-03-25 Martin Liska <mliska@suse.cz>
6604 * configure.ac: Respect --without-zstd and report
6605 error when we can't find header file with --with-zstd.
6606 * configure: Regenerate.
6608 2020-03-25 Jakub Jelinek <jakub@redhat.com>
6611 * varasm.c (output_constructor_array_range): If local->index
6612 RANGE_EXPR doesn't start at the current location in the constructor,
6613 skip needed number of bytes using assemble_zeros or assert we don't
6617 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
6618 counter instead of DECL_UID.
6620 PR tree-optimization/94300
6621 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
6622 is positive, make sure that off + size isn't larger than needed_len.
6624 2020-03-25 Richard Biener <rguenther@suse.de>
6625 Jakub Jelinek <jakub@redhat.com>
6628 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
6630 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
6632 * doc/sourcebuild.texi (ARM-specific attributes): Add
6634 (Features for dg-add-options): Add arm_fp_dp.
6636 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
6639 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
6641 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
6644 * omp-offload.c (omp_finish_file): Fix target-link handling if
6645 targetm_common.have_named_sections is false.
6647 2020-03-24 Jakub Jelinek <jakub@redhat.com>
6650 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
6654 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
6655 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
6656 If not after and at *incr_pos is a debug stmt, set stmt location to
6657 location of next non-debug stmt after it if any.
6660 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
6661 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
6662 worklist or set GF_PLF_2 just because it is used in a debug stmt in
6663 another bb. Formatting improvements.
6666 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
6667 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
6668 regardless of whether TREE_NO_WARNING is set on it or whether
6669 warn_unused_function is true or not.
6671 2020-03-23 Jeff Law <law@redhat.com>
6673 PR rtl-optimization/90275
6676 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
6677 (simplify_logical_relational_operation): Use it.
6679 2020-03-23 Jakub Jelinek <jakub@redhat.com>
6682 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
6683 ultimate rhs and if returned something different, reconstructing
6686 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
6688 * opts.c (print_filtered_help): Improve the help text for alias options.
6690 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6691 Andre Vieira <andre.simoesdiasvieira@arm.com>
6692 Mihail Ionescu <mihail.ionescu@arm.com>
6694 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
6695 (vshlcq_m_u8): Likewise.
6696 (vshlcq_m_s16): Likewise.
6697 (vshlcq_m_u16): Likewise.
6698 (vshlcq_m_s32): Likewise.
6699 (vshlcq_m_u32): Likewise.
6700 (__arm_vshlcq_m_s8): Define intrinsic.
6701 (__arm_vshlcq_m_u8): Likewise.
6702 (__arm_vshlcq_m_s16): Likewise.
6703 (__arm_vshlcq_m_u16): Likewise.
6704 (__arm_vshlcq_m_s32): Likewise.
6705 (__arm_vshlcq_m_u32): Likewise.
6706 (vshlcq_m): Define polymorphic variant.
6707 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
6708 Use builtin qualifier.
6709 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
6710 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
6711 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
6712 (mve_vshlcq_m_<supf><mode>): Likewise.
6714 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6716 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
6717 (UQSHL_QUALIFIERS): Likewise.
6718 (ASRL_QUALIFIERS): Likewise.
6719 (SQSHL_QUALIFIERS): Likewise.
6720 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
6722 (sqrshr): Define macro.
6723 (sqrshrl): Likewise.
6724 (sqrshrl_sat48): Likewise.
6730 (uqrshll): Likewise.
6731 (uqrshll_sat48): Likewise.
6738 (__arm_lsll): Define intrinsic.
6739 (__arm_asrl): Likewise.
6740 (__arm_uqrshll): Likewise.
6741 (__arm_uqrshll_sat48): Likewise.
6742 (__arm_sqrshrl): Likewise.
6743 (__arm_sqrshrl_sat48): Likewise.
6744 (__arm_uqshll): Likewise.
6745 (__arm_urshrl): Likewise.
6746 (__arm_srshrl): Likewise.
6747 (__arm_sqshll): Likewise.
6748 (__arm_uqrshl): Likewise.
6749 (__arm_sqrshr): Likewise.
6750 (__arm_uqshl): Likewise.
6751 (__arm_urshr): Likewise.
6752 (__arm_sqshl): Likewise.
6753 (__arm_srshr): Likewise.
6754 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
6756 (UQSHL_QUALIFIERS): Likewise.
6757 (ASRL_QUALIFIERS): Likewise.
6758 (SQSHL_QUALIFIERS): Likewise.
6759 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
6760 (mve_sqrshrl_sat<supf>_di): Likewise.
6761 (mve_uqrshl_si): Likewise.
6762 (mve_sqrshr_si): Likewise.
6763 (mve_uqshll_di): Likewise.
6764 (mve_urshrl_di): Likewise.
6765 (mve_uqshl_si): Likewise.
6766 (mve_urshr_si): Likewise.
6767 (mve_sqshl_si): Likewise.
6768 (mve_srshr_si): Likewise.
6769 (mve_srshrl_di): Likewise.
6770 (mve_sqshll_di): Likewise.
6772 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6773 Andre Vieira <andre.simoesdiasvieira@arm.com>
6774 Mihail Ionescu <mihail.ionescu@arm.com>
6776 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
6777 (vsetq_lane_f32): Likewise.
6778 (vsetq_lane_s16): Likewise.
6779 (vsetq_lane_s32): Likewise.
6780 (vsetq_lane_s8): Likewise.
6781 (vsetq_lane_s64): Likewise.
6782 (vsetq_lane_u8): Likewise.
6783 (vsetq_lane_u16): Likewise.
6784 (vsetq_lane_u32): Likewise.
6785 (vsetq_lane_u64): Likewise.
6786 (vgetq_lane_f16): Likewise.
6787 (vgetq_lane_f32): Likewise.
6788 (vgetq_lane_s16): Likewise.
6789 (vgetq_lane_s32): Likewise.
6790 (vgetq_lane_s8): Likewise.
6791 (vgetq_lane_s64): Likewise.
6792 (vgetq_lane_u8): Likewise.
6793 (vgetq_lane_u16): Likewise.
6794 (vgetq_lane_u32): Likewise.
6795 (vgetq_lane_u64): Likewise.
6796 (__ARM_NUM_LANES): Likewise.
6797 (__ARM_LANEQ): Likewise.
6798 (__ARM_CHECK_LANEQ): Likewise.
6799 (__arm_vsetq_lane_s16): Define intrinsic.
6800 (__arm_vsetq_lane_s32): Likewise.
6801 (__arm_vsetq_lane_s8): Likewise.
6802 (__arm_vsetq_lane_s64): Likewise.
6803 (__arm_vsetq_lane_u8): Likewise.
6804 (__arm_vsetq_lane_u16): Likewise.
6805 (__arm_vsetq_lane_u32): Likewise.
6806 (__arm_vsetq_lane_u64): Likewise.
6807 (__arm_vgetq_lane_s16): Likewise.
6808 (__arm_vgetq_lane_s32): Likewise.
6809 (__arm_vgetq_lane_s8): Likewise.
6810 (__arm_vgetq_lane_s64): Likewise.
6811 (__arm_vgetq_lane_u8): Likewise.
6812 (__arm_vgetq_lane_u16): Likewise.
6813 (__arm_vgetq_lane_u32): Likewise.
6814 (__arm_vgetq_lane_u64): Likewise.
6815 (__arm_vsetq_lane_f16): Likewise.
6816 (__arm_vsetq_lane_f32): Likewise.
6817 (__arm_vgetq_lane_f16): Likewise.
6818 (__arm_vgetq_lane_f32): Likewise.
6819 (vgetq_lane): Define polymorphic variant.
6820 (vsetq_lane): Likewise.
6821 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
6823 (mve_vec_extractv2didi): Likewise.
6824 (mve_vec_extract_sext_internal<mode>): Likewise.
6825 (mve_vec_extract_zext_internal<mode>): Likewise.
6826 (mve_vec_set<mode>_internal): Likewise.
6827 (mve_vec_setv2di_internal): Likewise.
6828 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
6830 (vec_extract<mode><V_elem_l>): Rename to
6831 "neon_vec_extract<mode><V_elem_l>".
6832 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
6833 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
6834 pattern common for MVE and NEON.
6835 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
6838 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
6840 * config/arm/mve.md (earlyclobber_32): New mode attribute.
6841 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
6842 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
6844 2020-03-23 Richard Biener <rguenther@suse.de>
6846 PR tree-optimization/94261
6847 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
6848 IL operand swapping code.
6849 (vect_slp_rearrange_stmts): Do not arrange isomorphic
6850 nodes that would need operation code adjustments.
6852 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
6854 * doc/install.texi (amdgcn-*-amdhsa): Renamed
6855 from amdgcn-unknown-amdhsa; change
6856 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
6858 2020-03-23 Richard Biener <rguenther@suse.de>
6861 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
6862 directly rather than also folding it via build_fold_addr_expr.
6864 2020-03-23 Richard Biener <rguenther@suse.de>
6866 PR tree-optimization/94266
6867 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
6868 addresses of TARGET_MEM_REFs.
6870 2020-03-23 Martin Liska <mliska@suse.cz>
6873 * symtab.c (symtab_node::clone_references): Save speculative_id
6874 as ref may be overwritten by create_reference.
6875 (symtab_node::clone_referring): Likewise.
6876 (symtab_node::clone_reference): Likewise.
6878 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
6880 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
6881 references to Darwin.
6882 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
6883 unconditionally and comment on why.
6885 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
6887 * config/darwin.c (darwin_mergeable_constant_section): Collect
6888 section anchor checks into the caller.
6889 (machopic_select_section): Collect section anchor checks into
6890 the determination of 'effective zero-size' objects. When the
6891 size is unknown, assume it is non-zero, and thus return the
6892 'generic' section for the DECL.
6894 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
6897 * config/darwin.opt: Amend options descriptions.
6899 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
6901 PR rtl-optimization/94052
6902 * lra-constraints.c (simplify_operand_subreg): Reload the inner
6903 register of a paradoxical subreg if simplify_subreg_regno fails
6904 to give a valid hard register for the outer mode.
6906 2020-03-20 Martin Jambor <mjambor@suse.cz>
6908 PR tree-optimization/93435
6909 * params.opt (sra-max-propagations): New parameter.
6910 * tree-sra.c (propagation_budget): New variable.
6911 (budget_for_propagation_access): New function.
6912 (propagate_subaccesses_from_rhs): Use it.
6913 (propagate_subaccesses_from_lhs): Likewise.
6914 (propagate_all_subaccesses): Set up and destroy propagation_budget.
6916 2020-03-20 Carl Love <cel@us.ibm.com>
6919 * config/rs6000/rs6000.c (rs6000_option_override_internal):
6920 Add check for TARGET_FPRND for Power 7 or newer.
6922 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
6925 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
6926 (cgraph_edge::redirect_callee): Move here; likewise.
6927 (cgraph_node::remove_callees): Update calls_comdat_local flag.
6928 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
6930 (cgraph_node::check_calls_comdat_local_p): New member function.
6931 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
6932 (cgraph_edge::redirect_callee): Move offline.
6933 * ipa-fnsummary.c (compute_fn_summary): Do not compute
6934 calls_comdat_local flag here.
6935 * ipa-inline-transform.c (inline_call): Fix updating of
6936 calls_comdat_local flag.
6937 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
6938 * symtab.c (symtab_node::add_to_same_comdat_group): Update
6939 calls_comdat_local flag.
6941 2020-03-20 Richard Biener <rguenther@suse.de>
6943 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
6944 from the possibly modified root.
6946 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6947 Andre Vieira <andre.simoesdiasvieira@arm.com>
6948 Mihail Ionescu <mihail.ionescu@arm.com>
6950 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
6951 (vst1q_p_s8): Likewise.
6952 (vst2q_s8): Likewise.
6953 (vst2q_u8): Likewise.
6954 (vld1q_z_u8): Likewise.
6955 (vld1q_z_s8): Likewise.
6956 (vld2q_s8): Likewise.
6957 (vld2q_u8): Likewise.
6958 (vld4q_s8): Likewise.
6959 (vld4q_u8): Likewise.
6960 (vst1q_p_u16): Likewise.
6961 (vst1q_p_s16): Likewise.
6962 (vst2q_s16): Likewise.
6963 (vst2q_u16): Likewise.
6964 (vld1q_z_u16): Likewise.
6965 (vld1q_z_s16): Likewise.
6966 (vld2q_s16): Likewise.
6967 (vld2q_u16): Likewise.
6968 (vld4q_s16): Likewise.
6969 (vld4q_u16): Likewise.
6970 (vst1q_p_u32): Likewise.
6971 (vst1q_p_s32): Likewise.
6972 (vst2q_s32): Likewise.
6973 (vst2q_u32): Likewise.
6974 (vld1q_z_u32): Likewise.
6975 (vld1q_z_s32): Likewise.
6976 (vld2q_s32): Likewise.
6977 (vld2q_u32): Likewise.
6978 (vld4q_s32): Likewise.
6979 (vld4q_u32): Likewise.
6980 (vld4q_f16): Likewise.
6981 (vld2q_f16): Likewise.
6982 (vld1q_z_f16): Likewise.
6983 (vst2q_f16): Likewise.
6984 (vst1q_p_f16): Likewise.
6985 (vld4q_f32): Likewise.
6986 (vld2q_f32): Likewise.
6987 (vld1q_z_f32): Likewise.
6988 (vst2q_f32): Likewise.
6989 (vst1q_p_f32): Likewise.
6990 (__arm_vst1q_p_u8): Define intrinsic.
6991 (__arm_vst1q_p_s8): Likewise.
6992 (__arm_vst2q_s8): Likewise.
6993 (__arm_vst2q_u8): Likewise.
6994 (__arm_vld1q_z_u8): Likewise.
6995 (__arm_vld1q_z_s8): Likewise.
6996 (__arm_vld2q_s8): Likewise.
6997 (__arm_vld2q_u8): Likewise.
6998 (__arm_vld4q_s8): Likewise.
6999 (__arm_vld4q_u8): Likewise.
7000 (__arm_vst1q_p_u16): Likewise.
7001 (__arm_vst1q_p_s16): Likewise.
7002 (__arm_vst2q_s16): Likewise.
7003 (__arm_vst2q_u16): Likewise.
7004 (__arm_vld1q_z_u16): Likewise.
7005 (__arm_vld1q_z_s16): Likewise.
7006 (__arm_vld2q_s16): Likewise.
7007 (__arm_vld2q_u16): Likewise.
7008 (__arm_vld4q_s16): Likewise.
7009 (__arm_vld4q_u16): Likewise.
7010 (__arm_vst1q_p_u32): Likewise.
7011 (__arm_vst1q_p_s32): Likewise.
7012 (__arm_vst2q_s32): Likewise.
7013 (__arm_vst2q_u32): Likewise.
7014 (__arm_vld1q_z_u32): Likewise.
7015 (__arm_vld1q_z_s32): Likewise.
7016 (__arm_vld2q_s32): Likewise.
7017 (__arm_vld2q_u32): Likewise.
7018 (__arm_vld4q_s32): Likewise.
7019 (__arm_vld4q_u32): Likewise.
7020 (__arm_vld4q_f16): Likewise.
7021 (__arm_vld2q_f16): Likewise.
7022 (__arm_vld1q_z_f16): Likewise.
7023 (__arm_vst2q_f16): Likewise.
7024 (__arm_vst1q_p_f16): Likewise.
7025 (__arm_vld4q_f32): Likewise.
7026 (__arm_vld2q_f32): Likewise.
7027 (__arm_vld1q_z_f32): Likewise.
7028 (__arm_vst2q_f32): Likewise.
7029 (__arm_vst1q_p_f32): Likewise.
7030 (vld1q_z): Define polymorphic variant.
7033 (vst1q_p): Likewise.
7035 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
7037 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
7038 (mve_vld2q<mode>): Likewise.
7039 (mve_vld4q<mode>): Likewise.
7041 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7042 Andre Vieira <andre.simoesdiasvieira@arm.com>
7043 Mihail Ionescu <mihail.ionescu@arm.com>
7045 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
7046 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
7047 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
7048 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
7049 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
7050 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
7051 * config/arm/arm_mve.h (vadciq_s32): Define macro.
7052 (vadciq_u32): Likewise.
7053 (vadciq_m_s32): Likewise.
7054 (vadciq_m_u32): Likewise.
7055 (vadcq_s32): Likewise.
7056 (vadcq_u32): Likewise.
7057 (vadcq_m_s32): Likewise.
7058 (vadcq_m_u32): Likewise.
7059 (vsbciq_s32): Likewise.
7060 (vsbciq_u32): Likewise.
7061 (vsbciq_m_s32): Likewise.
7062 (vsbciq_m_u32): Likewise.
7063 (vsbcq_s32): Likewise.
7064 (vsbcq_u32): Likewise.
7065 (vsbcq_m_s32): Likewise.
7066 (vsbcq_m_u32): Likewise.
7067 (__arm_vadciq_s32): Define intrinsic.
7068 (__arm_vadciq_u32): Likewise.
7069 (__arm_vadciq_m_s32): Likewise.
7070 (__arm_vadciq_m_u32): Likewise.
7071 (__arm_vadcq_s32): Likewise.
7072 (__arm_vadcq_u32): Likewise.
7073 (__arm_vadcq_m_s32): Likewise.
7074 (__arm_vadcq_m_u32): Likewise.
7075 (__arm_vsbciq_s32): Likewise.
7076 (__arm_vsbciq_u32): Likewise.
7077 (__arm_vsbciq_m_s32): Likewise.
7078 (__arm_vsbciq_m_u32): Likewise.
7079 (__arm_vsbcq_s32): Likewise.
7080 (__arm_vsbcq_u32): Likewise.
7081 (__arm_vsbcq_m_s32): Likewise.
7082 (__arm_vsbcq_m_u32): Likewise.
7083 (vadciq_m): Define polymorphic variant.
7085 (vadcq_m): Likewise.
7087 (vsbciq_m): Likewise.
7089 (vsbcq_m): Likewise.
7091 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
7093 (BINOP_UNONE_UNONE_UNONE): Likewise.
7094 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
7095 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
7096 * config/arm/mve.md (VADCIQ): Define iterator.
7097 (VADCIQ_M): Likewise.
7099 (VSBCQ_M): Likewise.
7101 (VSBCIQ_M): Likewise.
7103 (VADCQ_M): Likewise.
7104 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
7105 (mve_vadciq_<supf>v4si): Likewise.
7106 (mve_vadcq_m_<supf>v4si): Likewise.
7107 (mve_vadcq_<supf>v4si): Likewise.
7108 (mve_vsbciq_m_<supf>v4si): Likewise.
7109 (mve_vsbciq_<supf>v4si): Likewise.
7110 (mve_vsbcq_m_<supf>v4si): Likewise.
7111 (mve_vsbcq_<supf>v4si): Likewise.
7112 (get_fpscr_nzcvqc): Define isns.
7113 (set_fpscr_nzcvqc): Define isns.
7114 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
7115 (UNSPEC_SET_FPSCR_NZCVQC): Define.
7117 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7119 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
7120 (vddupq_x_n_u16): Likewise.
7121 (vddupq_x_n_u32): Likewise.
7122 (vddupq_x_wb_u8): Likewise.
7123 (vddupq_x_wb_u16): Likewise.
7124 (vddupq_x_wb_u32): Likewise.
7125 (vdwdupq_x_n_u8): Likewise.
7126 (vdwdupq_x_n_u16): Likewise.
7127 (vdwdupq_x_n_u32): Likewise.
7128 (vdwdupq_x_wb_u8): Likewise.
7129 (vdwdupq_x_wb_u16): Likewise.
7130 (vdwdupq_x_wb_u32): Likewise.
7131 (vidupq_x_n_u8): Likewise.
7132 (vidupq_x_n_u16): Likewise.
7133 (vidupq_x_n_u32): Likewise.
7134 (vidupq_x_wb_u8): Likewise.
7135 (vidupq_x_wb_u16): Likewise.
7136 (vidupq_x_wb_u32): Likewise.
7137 (viwdupq_x_n_u8): Likewise.
7138 (viwdupq_x_n_u16): Likewise.
7139 (viwdupq_x_n_u32): Likewise.
7140 (viwdupq_x_wb_u8): Likewise.
7141 (viwdupq_x_wb_u16): Likewise.
7142 (viwdupq_x_wb_u32): Likewise.
7143 (vdupq_x_n_s8): Likewise.
7144 (vdupq_x_n_s16): Likewise.
7145 (vdupq_x_n_s32): Likewise.
7146 (vdupq_x_n_u8): Likewise.
7147 (vdupq_x_n_u16): Likewise.
7148 (vdupq_x_n_u32): Likewise.
7149 (vminq_x_s8): Likewise.
7150 (vminq_x_s16): Likewise.
7151 (vminq_x_s32): Likewise.
7152 (vminq_x_u8): Likewise.
7153 (vminq_x_u16): Likewise.
7154 (vminq_x_u32): Likewise.
7155 (vmaxq_x_s8): Likewise.
7156 (vmaxq_x_s16): Likewise.
7157 (vmaxq_x_s32): Likewise.
7158 (vmaxq_x_u8): Likewise.
7159 (vmaxq_x_u16): Likewise.
7160 (vmaxq_x_u32): Likewise.
7161 (vabdq_x_s8): Likewise.
7162 (vabdq_x_s16): Likewise.
7163 (vabdq_x_s32): Likewise.
7164 (vabdq_x_u8): Likewise.
7165 (vabdq_x_u16): Likewise.
7166 (vabdq_x_u32): Likewise.
7167 (vabsq_x_s8): Likewise.
7168 (vabsq_x_s16): Likewise.
7169 (vabsq_x_s32): Likewise.
7170 (vaddq_x_s8): Likewise.
7171 (vaddq_x_s16): Likewise.
7172 (vaddq_x_s32): Likewise.
7173 (vaddq_x_n_s8): Likewise.
7174 (vaddq_x_n_s16): Likewise.
7175 (vaddq_x_n_s32): Likewise.
7176 (vaddq_x_u8): Likewise.
7177 (vaddq_x_u16): Likewise.
7178 (vaddq_x_u32): Likewise.
7179 (vaddq_x_n_u8): Likewise.
7180 (vaddq_x_n_u16): Likewise.
7181 (vaddq_x_n_u32): Likewise.
7182 (vclsq_x_s8): Likewise.
7183 (vclsq_x_s16): Likewise.
7184 (vclsq_x_s32): Likewise.
7185 (vclzq_x_s8): Likewise.
7186 (vclzq_x_s16): Likewise.
7187 (vclzq_x_s32): Likewise.
7188 (vclzq_x_u8): Likewise.
7189 (vclzq_x_u16): Likewise.
7190 (vclzq_x_u32): Likewise.
7191 (vnegq_x_s8): Likewise.
7192 (vnegq_x_s16): Likewise.
7193 (vnegq_x_s32): Likewise.
7194 (vmulhq_x_s8): Likewise.
7195 (vmulhq_x_s16): Likewise.
7196 (vmulhq_x_s32): Likewise.
7197 (vmulhq_x_u8): Likewise.
7198 (vmulhq_x_u16): Likewise.
7199 (vmulhq_x_u32): Likewise.
7200 (vmullbq_poly_x_p8): Likewise.
7201 (vmullbq_poly_x_p16): Likewise.
7202 (vmullbq_int_x_s8): Likewise.
7203 (vmullbq_int_x_s16): Likewise.
7204 (vmullbq_int_x_s32): Likewise.
7205 (vmullbq_int_x_u8): Likewise.
7206 (vmullbq_int_x_u16): Likewise.
7207 (vmullbq_int_x_u32): Likewise.
7208 (vmulltq_poly_x_p8): Likewise.
7209 (vmulltq_poly_x_p16): Likewise.
7210 (vmulltq_int_x_s8): Likewise.
7211 (vmulltq_int_x_s16): Likewise.
7212 (vmulltq_int_x_s32): Likewise.
7213 (vmulltq_int_x_u8): Likewise.
7214 (vmulltq_int_x_u16): Likewise.
7215 (vmulltq_int_x_u32): Likewise.
7216 (vmulq_x_s8): Likewise.
7217 (vmulq_x_s16): Likewise.
7218 (vmulq_x_s32): Likewise.
7219 (vmulq_x_n_s8): Likewise.
7220 (vmulq_x_n_s16): Likewise.
7221 (vmulq_x_n_s32): Likewise.
7222 (vmulq_x_u8): Likewise.
7223 (vmulq_x_u16): Likewise.
7224 (vmulq_x_u32): Likewise.
7225 (vmulq_x_n_u8): Likewise.
7226 (vmulq_x_n_u16): Likewise.
7227 (vmulq_x_n_u32): Likewise.
7228 (vsubq_x_s8): Likewise.
7229 (vsubq_x_s16): Likewise.
7230 (vsubq_x_s32): Likewise.
7231 (vsubq_x_n_s8): Likewise.
7232 (vsubq_x_n_s16): Likewise.
7233 (vsubq_x_n_s32): Likewise.
7234 (vsubq_x_u8): Likewise.
7235 (vsubq_x_u16): Likewise.
7236 (vsubq_x_u32): Likewise.
7237 (vsubq_x_n_u8): Likewise.
7238 (vsubq_x_n_u16): Likewise.
7239 (vsubq_x_n_u32): Likewise.
7240 (vcaddq_rot90_x_s8): Likewise.
7241 (vcaddq_rot90_x_s16): Likewise.
7242 (vcaddq_rot90_x_s32): Likewise.
7243 (vcaddq_rot90_x_u8): Likewise.
7244 (vcaddq_rot90_x_u16): Likewise.
7245 (vcaddq_rot90_x_u32): Likewise.
7246 (vcaddq_rot270_x_s8): Likewise.
7247 (vcaddq_rot270_x_s16): Likewise.
7248 (vcaddq_rot270_x_s32): Likewise.
7249 (vcaddq_rot270_x_u8): Likewise.
7250 (vcaddq_rot270_x_u16): Likewise.
7251 (vcaddq_rot270_x_u32): Likewise.
7252 (vhaddq_x_n_s8): Likewise.
7253 (vhaddq_x_n_s16): Likewise.
7254 (vhaddq_x_n_s32): Likewise.
7255 (vhaddq_x_n_u8): Likewise.
7256 (vhaddq_x_n_u16): Likewise.
7257 (vhaddq_x_n_u32): Likewise.
7258 (vhaddq_x_s8): Likewise.
7259 (vhaddq_x_s16): Likewise.
7260 (vhaddq_x_s32): Likewise.
7261 (vhaddq_x_u8): Likewise.
7262 (vhaddq_x_u16): Likewise.
7263 (vhaddq_x_u32): Likewise.
7264 (vhcaddq_rot90_x_s8): Likewise.
7265 (vhcaddq_rot90_x_s16): Likewise.
7266 (vhcaddq_rot90_x_s32): Likewise.
7267 (vhcaddq_rot270_x_s8): Likewise.
7268 (vhcaddq_rot270_x_s16): Likewise.
7269 (vhcaddq_rot270_x_s32): Likewise.
7270 (vhsubq_x_n_s8): Likewise.
7271 (vhsubq_x_n_s16): Likewise.
7272 (vhsubq_x_n_s32): Likewise.
7273 (vhsubq_x_n_u8): Likewise.
7274 (vhsubq_x_n_u16): Likewise.
7275 (vhsubq_x_n_u32): Likewise.
7276 (vhsubq_x_s8): Likewise.
7277 (vhsubq_x_s16): Likewise.
7278 (vhsubq_x_s32): Likewise.
7279 (vhsubq_x_u8): Likewise.
7280 (vhsubq_x_u16): Likewise.
7281 (vhsubq_x_u32): Likewise.
7282 (vrhaddq_x_s8): Likewise.
7283 (vrhaddq_x_s16): Likewise.
7284 (vrhaddq_x_s32): Likewise.
7285 (vrhaddq_x_u8): Likewise.
7286 (vrhaddq_x_u16): Likewise.
7287 (vrhaddq_x_u32): Likewise.
7288 (vrmulhq_x_s8): Likewise.
7289 (vrmulhq_x_s16): Likewise.
7290 (vrmulhq_x_s32): Likewise.
7291 (vrmulhq_x_u8): Likewise.
7292 (vrmulhq_x_u16): Likewise.
7293 (vrmulhq_x_u32): Likewise.
7294 (vandq_x_s8): Likewise.
7295 (vandq_x_s16): Likewise.
7296 (vandq_x_s32): Likewise.
7297 (vandq_x_u8): Likewise.
7298 (vandq_x_u16): Likewise.
7299 (vandq_x_u32): Likewise.
7300 (vbicq_x_s8): Likewise.
7301 (vbicq_x_s16): Likewise.
7302 (vbicq_x_s32): Likewise.
7303 (vbicq_x_u8): Likewise.
7304 (vbicq_x_u16): Likewise.
7305 (vbicq_x_u32): Likewise.
7306 (vbrsrq_x_n_s8): Likewise.
7307 (vbrsrq_x_n_s16): Likewise.
7308 (vbrsrq_x_n_s32): Likewise.
7309 (vbrsrq_x_n_u8): Likewise.
7310 (vbrsrq_x_n_u16): Likewise.
7311 (vbrsrq_x_n_u32): Likewise.
7312 (veorq_x_s8): Likewise.
7313 (veorq_x_s16): Likewise.
7314 (veorq_x_s32): Likewise.
7315 (veorq_x_u8): Likewise.
7316 (veorq_x_u16): Likewise.
7317 (veorq_x_u32): Likewise.
7318 (vmovlbq_x_s8): Likewise.
7319 (vmovlbq_x_s16): Likewise.
7320 (vmovlbq_x_u8): Likewise.
7321 (vmovlbq_x_u16): Likewise.
7322 (vmovltq_x_s8): Likewise.
7323 (vmovltq_x_s16): Likewise.
7324 (vmovltq_x_u8): Likewise.
7325 (vmovltq_x_u16): Likewise.
7326 (vmvnq_x_s8): Likewise.
7327 (vmvnq_x_s16): Likewise.
7328 (vmvnq_x_s32): Likewise.
7329 (vmvnq_x_u8): Likewise.
7330 (vmvnq_x_u16): Likewise.
7331 (vmvnq_x_u32): Likewise.
7332 (vmvnq_x_n_s16): Likewise.
7333 (vmvnq_x_n_s32): Likewise.
7334 (vmvnq_x_n_u16): Likewise.
7335 (vmvnq_x_n_u32): Likewise.
7336 (vornq_x_s8): Likewise.
7337 (vornq_x_s16): Likewise.
7338 (vornq_x_s32): Likewise.
7339 (vornq_x_u8): Likewise.
7340 (vornq_x_u16): Likewise.
7341 (vornq_x_u32): Likewise.
7342 (vorrq_x_s8): Likewise.
7343 (vorrq_x_s16): Likewise.
7344 (vorrq_x_s32): Likewise.
7345 (vorrq_x_u8): Likewise.
7346 (vorrq_x_u16): Likewise.
7347 (vorrq_x_u32): Likewise.
7348 (vrev16q_x_s8): Likewise.
7349 (vrev16q_x_u8): Likewise.
7350 (vrev32q_x_s8): Likewise.
7351 (vrev32q_x_s16): Likewise.
7352 (vrev32q_x_u8): Likewise.
7353 (vrev32q_x_u16): Likewise.
7354 (vrev64q_x_s8): Likewise.
7355 (vrev64q_x_s16): Likewise.
7356 (vrev64q_x_s32): Likewise.
7357 (vrev64q_x_u8): Likewise.
7358 (vrev64q_x_u16): Likewise.
7359 (vrev64q_x_u32): Likewise.
7360 (vrshlq_x_s8): Likewise.
7361 (vrshlq_x_s16): Likewise.
7362 (vrshlq_x_s32): Likewise.
7363 (vrshlq_x_u8): Likewise.
7364 (vrshlq_x_u16): Likewise.
7365 (vrshlq_x_u32): Likewise.
7366 (vshllbq_x_n_s8): Likewise.
7367 (vshllbq_x_n_s16): Likewise.
7368 (vshllbq_x_n_u8): Likewise.
7369 (vshllbq_x_n_u16): Likewise.
7370 (vshlltq_x_n_s8): Likewise.
7371 (vshlltq_x_n_s16): Likewise.
7372 (vshlltq_x_n_u8): Likewise.
7373 (vshlltq_x_n_u16): Likewise.
7374 (vshlq_x_s8): Likewise.
7375 (vshlq_x_s16): Likewise.
7376 (vshlq_x_s32): Likewise.
7377 (vshlq_x_u8): Likewise.
7378 (vshlq_x_u16): Likewise.
7379 (vshlq_x_u32): Likewise.
7380 (vshlq_x_n_s8): Likewise.
7381 (vshlq_x_n_s16): Likewise.
7382 (vshlq_x_n_s32): Likewise.
7383 (vshlq_x_n_u8): Likewise.
7384 (vshlq_x_n_u16): Likewise.
7385 (vshlq_x_n_u32): Likewise.
7386 (vrshrq_x_n_s8): Likewise.
7387 (vrshrq_x_n_s16): Likewise.
7388 (vrshrq_x_n_s32): Likewise.
7389 (vrshrq_x_n_u8): Likewise.
7390 (vrshrq_x_n_u16): Likewise.
7391 (vrshrq_x_n_u32): Likewise.
7392 (vshrq_x_n_s8): Likewise.
7393 (vshrq_x_n_s16): Likewise.
7394 (vshrq_x_n_s32): Likewise.
7395 (vshrq_x_n_u8): Likewise.
7396 (vshrq_x_n_u16): Likewise.
7397 (vshrq_x_n_u32): Likewise.
7398 (vdupq_x_n_f16): Likewise.
7399 (vdupq_x_n_f32): Likewise.
7400 (vminnmq_x_f16): Likewise.
7401 (vminnmq_x_f32): Likewise.
7402 (vmaxnmq_x_f16): Likewise.
7403 (vmaxnmq_x_f32): Likewise.
7404 (vabdq_x_f16): Likewise.
7405 (vabdq_x_f32): Likewise.
7406 (vabsq_x_f16): Likewise.
7407 (vabsq_x_f32): Likewise.
7408 (vaddq_x_f16): Likewise.
7409 (vaddq_x_f32): Likewise.
7410 (vaddq_x_n_f16): Likewise.
7411 (vaddq_x_n_f32): Likewise.
7412 (vnegq_x_f16): Likewise.
7413 (vnegq_x_f32): Likewise.
7414 (vmulq_x_f16): Likewise.
7415 (vmulq_x_f32): Likewise.
7416 (vmulq_x_n_f16): Likewise.
7417 (vmulq_x_n_f32): Likewise.
7418 (vsubq_x_f16): Likewise.
7419 (vsubq_x_f32): Likewise.
7420 (vsubq_x_n_f16): Likewise.
7421 (vsubq_x_n_f32): Likewise.
7422 (vcaddq_rot90_x_f16): Likewise.
7423 (vcaddq_rot90_x_f32): Likewise.
7424 (vcaddq_rot270_x_f16): Likewise.
7425 (vcaddq_rot270_x_f32): Likewise.
7426 (vcmulq_x_f16): Likewise.
7427 (vcmulq_x_f32): Likewise.
7428 (vcmulq_rot90_x_f16): Likewise.
7429 (vcmulq_rot90_x_f32): Likewise.
7430 (vcmulq_rot180_x_f16): Likewise.
7431 (vcmulq_rot180_x_f32): Likewise.
7432 (vcmulq_rot270_x_f16): Likewise.
7433 (vcmulq_rot270_x_f32): Likewise.
7434 (vcvtaq_x_s16_f16): Likewise.
7435 (vcvtaq_x_s32_f32): Likewise.
7436 (vcvtaq_x_u16_f16): Likewise.
7437 (vcvtaq_x_u32_f32): Likewise.
7438 (vcvtnq_x_s16_f16): Likewise.
7439 (vcvtnq_x_s32_f32): Likewise.
7440 (vcvtnq_x_u16_f16): Likewise.
7441 (vcvtnq_x_u32_f32): Likewise.
7442 (vcvtpq_x_s16_f16): Likewise.
7443 (vcvtpq_x_s32_f32): Likewise.
7444 (vcvtpq_x_u16_f16): Likewise.
7445 (vcvtpq_x_u32_f32): Likewise.
7446 (vcvtmq_x_s16_f16): Likewise.
7447 (vcvtmq_x_s32_f32): Likewise.
7448 (vcvtmq_x_u16_f16): Likewise.
7449 (vcvtmq_x_u32_f32): Likewise.
7450 (vcvtbq_x_f32_f16): Likewise.
7451 (vcvttq_x_f32_f16): Likewise.
7452 (vcvtq_x_f16_u16): Likewise.
7453 (vcvtq_x_f16_s16): Likewise.
7454 (vcvtq_x_f32_s32): Likewise.
7455 (vcvtq_x_f32_u32): Likewise.
7456 (vcvtq_x_n_f16_s16): Likewise.
7457 (vcvtq_x_n_f16_u16): Likewise.
7458 (vcvtq_x_n_f32_s32): Likewise.
7459 (vcvtq_x_n_f32_u32): Likewise.
7460 (vcvtq_x_s16_f16): Likewise.
7461 (vcvtq_x_s32_f32): Likewise.
7462 (vcvtq_x_u16_f16): Likewise.
7463 (vcvtq_x_u32_f32): Likewise.
7464 (vcvtq_x_n_s16_f16): Likewise.
7465 (vcvtq_x_n_s32_f32): Likewise.
7466 (vcvtq_x_n_u16_f16): Likewise.
7467 (vcvtq_x_n_u32_f32): Likewise.
7468 (vrndq_x_f16): Likewise.
7469 (vrndq_x_f32): Likewise.
7470 (vrndnq_x_f16): Likewise.
7471 (vrndnq_x_f32): Likewise.
7472 (vrndmq_x_f16): Likewise.
7473 (vrndmq_x_f32): Likewise.
7474 (vrndpq_x_f16): Likewise.
7475 (vrndpq_x_f32): Likewise.
7476 (vrndaq_x_f16): Likewise.
7477 (vrndaq_x_f32): Likewise.
7478 (vrndxq_x_f16): Likewise.
7479 (vrndxq_x_f32): Likewise.
7480 (vandq_x_f16): Likewise.
7481 (vandq_x_f32): Likewise.
7482 (vbicq_x_f16): Likewise.
7483 (vbicq_x_f32): Likewise.
7484 (vbrsrq_x_n_f16): Likewise.
7485 (vbrsrq_x_n_f32): Likewise.
7486 (veorq_x_f16): Likewise.
7487 (veorq_x_f32): Likewise.
7488 (vornq_x_f16): Likewise.
7489 (vornq_x_f32): Likewise.
7490 (vorrq_x_f16): Likewise.
7491 (vorrq_x_f32): Likewise.
7492 (vrev32q_x_f16): Likewise.
7493 (vrev64q_x_f16): Likewise.
7494 (vrev64q_x_f32): Likewise.
7495 (__arm_vddupq_x_n_u8): Define intrinsic.
7496 (__arm_vddupq_x_n_u16): Likewise.
7497 (__arm_vddupq_x_n_u32): Likewise.
7498 (__arm_vddupq_x_wb_u8): Likewise.
7499 (__arm_vddupq_x_wb_u16): Likewise.
7500 (__arm_vddupq_x_wb_u32): Likewise.
7501 (__arm_vdwdupq_x_n_u8): Likewise.
7502 (__arm_vdwdupq_x_n_u16): Likewise.
7503 (__arm_vdwdupq_x_n_u32): Likewise.
7504 (__arm_vdwdupq_x_wb_u8): Likewise.
7505 (__arm_vdwdupq_x_wb_u16): Likewise.
7506 (__arm_vdwdupq_x_wb_u32): Likewise.
7507 (__arm_vidupq_x_n_u8): Likewise.
7508 (__arm_vidupq_x_n_u16): Likewise.
7509 (__arm_vidupq_x_n_u32): Likewise.
7510 (__arm_vidupq_x_wb_u8): Likewise.
7511 (__arm_vidupq_x_wb_u16): Likewise.
7512 (__arm_vidupq_x_wb_u32): Likewise.
7513 (__arm_viwdupq_x_n_u8): Likewise.
7514 (__arm_viwdupq_x_n_u16): Likewise.
7515 (__arm_viwdupq_x_n_u32): Likewise.
7516 (__arm_viwdupq_x_wb_u8): Likewise.
7517 (__arm_viwdupq_x_wb_u16): Likewise.
7518 (__arm_viwdupq_x_wb_u32): Likewise.
7519 (__arm_vdupq_x_n_s8): Likewise.
7520 (__arm_vdupq_x_n_s16): Likewise.
7521 (__arm_vdupq_x_n_s32): Likewise.
7522 (__arm_vdupq_x_n_u8): Likewise.
7523 (__arm_vdupq_x_n_u16): Likewise.
7524 (__arm_vdupq_x_n_u32): Likewise.
7525 (__arm_vminq_x_s8): Likewise.
7526 (__arm_vminq_x_s16): Likewise.
7527 (__arm_vminq_x_s32): Likewise.
7528 (__arm_vminq_x_u8): Likewise.
7529 (__arm_vminq_x_u16): Likewise.
7530 (__arm_vminq_x_u32): Likewise.
7531 (__arm_vmaxq_x_s8): Likewise.
7532 (__arm_vmaxq_x_s16): Likewise.
7533 (__arm_vmaxq_x_s32): Likewise.
7534 (__arm_vmaxq_x_u8): Likewise.
7535 (__arm_vmaxq_x_u16): Likewise.
7536 (__arm_vmaxq_x_u32): Likewise.
7537 (__arm_vabdq_x_s8): Likewise.
7538 (__arm_vabdq_x_s16): Likewise.
7539 (__arm_vabdq_x_s32): Likewise.
7540 (__arm_vabdq_x_u8): Likewise.
7541 (__arm_vabdq_x_u16): Likewise.
7542 (__arm_vabdq_x_u32): Likewise.
7543 (__arm_vabsq_x_s8): Likewise.
7544 (__arm_vabsq_x_s16): Likewise.
7545 (__arm_vabsq_x_s32): Likewise.
7546 (__arm_vaddq_x_s8): Likewise.
7547 (__arm_vaddq_x_s16): Likewise.
7548 (__arm_vaddq_x_s32): Likewise.
7549 (__arm_vaddq_x_n_s8): Likewise.
7550 (__arm_vaddq_x_n_s16): Likewise.
7551 (__arm_vaddq_x_n_s32): Likewise.
7552 (__arm_vaddq_x_u8): Likewise.
7553 (__arm_vaddq_x_u16): Likewise.
7554 (__arm_vaddq_x_u32): Likewise.
7555 (__arm_vaddq_x_n_u8): Likewise.
7556 (__arm_vaddq_x_n_u16): Likewise.
7557 (__arm_vaddq_x_n_u32): Likewise.
7558 (__arm_vclsq_x_s8): Likewise.
7559 (__arm_vclsq_x_s16): Likewise.
7560 (__arm_vclsq_x_s32): Likewise.
7561 (__arm_vclzq_x_s8): Likewise.
7562 (__arm_vclzq_x_s16): Likewise.
7563 (__arm_vclzq_x_s32): Likewise.
7564 (__arm_vclzq_x_u8): Likewise.
7565 (__arm_vclzq_x_u16): Likewise.
7566 (__arm_vclzq_x_u32): Likewise.
7567 (__arm_vnegq_x_s8): Likewise.
7568 (__arm_vnegq_x_s16): Likewise.
7569 (__arm_vnegq_x_s32): Likewise.
7570 (__arm_vmulhq_x_s8): Likewise.
7571 (__arm_vmulhq_x_s16): Likewise.
7572 (__arm_vmulhq_x_s32): Likewise.
7573 (__arm_vmulhq_x_u8): Likewise.
7574 (__arm_vmulhq_x_u16): Likewise.
7575 (__arm_vmulhq_x_u32): Likewise.
7576 (__arm_vmullbq_poly_x_p8): Likewise.
7577 (__arm_vmullbq_poly_x_p16): Likewise.
7578 (__arm_vmullbq_int_x_s8): Likewise.
7579 (__arm_vmullbq_int_x_s16): Likewise.
7580 (__arm_vmullbq_int_x_s32): Likewise.
7581 (__arm_vmullbq_int_x_u8): Likewise.
7582 (__arm_vmullbq_int_x_u16): Likewise.
7583 (__arm_vmullbq_int_x_u32): Likewise.
7584 (__arm_vmulltq_poly_x_p8): Likewise.
7585 (__arm_vmulltq_poly_x_p16): Likewise.
7586 (__arm_vmulltq_int_x_s8): Likewise.
7587 (__arm_vmulltq_int_x_s16): Likewise.
7588 (__arm_vmulltq_int_x_s32): Likewise.
7589 (__arm_vmulltq_int_x_u8): Likewise.
7590 (__arm_vmulltq_int_x_u16): Likewise.
7591 (__arm_vmulltq_int_x_u32): Likewise.
7592 (__arm_vmulq_x_s8): Likewise.
7593 (__arm_vmulq_x_s16): Likewise.
7594 (__arm_vmulq_x_s32): Likewise.
7595 (__arm_vmulq_x_n_s8): Likewise.
7596 (__arm_vmulq_x_n_s16): Likewise.
7597 (__arm_vmulq_x_n_s32): Likewise.
7598 (__arm_vmulq_x_u8): Likewise.
7599 (__arm_vmulq_x_u16): Likewise.
7600 (__arm_vmulq_x_u32): Likewise.
7601 (__arm_vmulq_x_n_u8): Likewise.
7602 (__arm_vmulq_x_n_u16): Likewise.
7603 (__arm_vmulq_x_n_u32): Likewise.
7604 (__arm_vsubq_x_s8): Likewise.
7605 (__arm_vsubq_x_s16): Likewise.
7606 (__arm_vsubq_x_s32): Likewise.
7607 (__arm_vsubq_x_n_s8): Likewise.
7608 (__arm_vsubq_x_n_s16): Likewise.
7609 (__arm_vsubq_x_n_s32): Likewise.
7610 (__arm_vsubq_x_u8): Likewise.
7611 (__arm_vsubq_x_u16): Likewise.
7612 (__arm_vsubq_x_u32): Likewise.
7613 (__arm_vsubq_x_n_u8): Likewise.
7614 (__arm_vsubq_x_n_u16): Likewise.
7615 (__arm_vsubq_x_n_u32): Likewise.
7616 (__arm_vcaddq_rot90_x_s8): Likewise.
7617 (__arm_vcaddq_rot90_x_s16): Likewise.
7618 (__arm_vcaddq_rot90_x_s32): Likewise.
7619 (__arm_vcaddq_rot90_x_u8): Likewise.
7620 (__arm_vcaddq_rot90_x_u16): Likewise.
7621 (__arm_vcaddq_rot90_x_u32): Likewise.
7622 (__arm_vcaddq_rot270_x_s8): Likewise.
7623 (__arm_vcaddq_rot270_x_s16): Likewise.
7624 (__arm_vcaddq_rot270_x_s32): Likewise.
7625 (__arm_vcaddq_rot270_x_u8): Likewise.
7626 (__arm_vcaddq_rot270_x_u16): Likewise.
7627 (__arm_vcaddq_rot270_x_u32): Likewise.
7628 (__arm_vhaddq_x_n_s8): Likewise.
7629 (__arm_vhaddq_x_n_s16): Likewise.
7630 (__arm_vhaddq_x_n_s32): Likewise.
7631 (__arm_vhaddq_x_n_u8): Likewise.
7632 (__arm_vhaddq_x_n_u16): Likewise.
7633 (__arm_vhaddq_x_n_u32): Likewise.
7634 (__arm_vhaddq_x_s8): Likewise.
7635 (__arm_vhaddq_x_s16): Likewise.
7636 (__arm_vhaddq_x_s32): Likewise.
7637 (__arm_vhaddq_x_u8): Likewise.
7638 (__arm_vhaddq_x_u16): Likewise.
7639 (__arm_vhaddq_x_u32): Likewise.
7640 (__arm_vhcaddq_rot90_x_s8): Likewise.
7641 (__arm_vhcaddq_rot90_x_s16): Likewise.
7642 (__arm_vhcaddq_rot90_x_s32): Likewise.
7643 (__arm_vhcaddq_rot270_x_s8): Likewise.
7644 (__arm_vhcaddq_rot270_x_s16): Likewise.
7645 (__arm_vhcaddq_rot270_x_s32): Likewise.
7646 (__arm_vhsubq_x_n_s8): Likewise.
7647 (__arm_vhsubq_x_n_s16): Likewise.
7648 (__arm_vhsubq_x_n_s32): Likewise.
7649 (__arm_vhsubq_x_n_u8): Likewise.
7650 (__arm_vhsubq_x_n_u16): Likewise.
7651 (__arm_vhsubq_x_n_u32): Likewise.
7652 (__arm_vhsubq_x_s8): Likewise.
7653 (__arm_vhsubq_x_s16): Likewise.
7654 (__arm_vhsubq_x_s32): Likewise.
7655 (__arm_vhsubq_x_u8): Likewise.
7656 (__arm_vhsubq_x_u16): Likewise.
7657 (__arm_vhsubq_x_u32): Likewise.
7658 (__arm_vrhaddq_x_s8): Likewise.
7659 (__arm_vrhaddq_x_s16): Likewise.
7660 (__arm_vrhaddq_x_s32): Likewise.
7661 (__arm_vrhaddq_x_u8): Likewise.
7662 (__arm_vrhaddq_x_u16): Likewise.
7663 (__arm_vrhaddq_x_u32): Likewise.
7664 (__arm_vrmulhq_x_s8): Likewise.
7665 (__arm_vrmulhq_x_s16): Likewise.
7666 (__arm_vrmulhq_x_s32): Likewise.
7667 (__arm_vrmulhq_x_u8): Likewise.
7668 (__arm_vrmulhq_x_u16): Likewise.
7669 (__arm_vrmulhq_x_u32): Likewise.
7670 (__arm_vandq_x_s8): Likewise.
7671 (__arm_vandq_x_s16): Likewise.
7672 (__arm_vandq_x_s32): Likewise.
7673 (__arm_vandq_x_u8): Likewise.
7674 (__arm_vandq_x_u16): Likewise.
7675 (__arm_vandq_x_u32): Likewise.
7676 (__arm_vbicq_x_s8): Likewise.
7677 (__arm_vbicq_x_s16): Likewise.
7678 (__arm_vbicq_x_s32): Likewise.
7679 (__arm_vbicq_x_u8): Likewise.
7680 (__arm_vbicq_x_u16): Likewise.
7681 (__arm_vbicq_x_u32): Likewise.
7682 (__arm_vbrsrq_x_n_s8): Likewise.
7683 (__arm_vbrsrq_x_n_s16): Likewise.
7684 (__arm_vbrsrq_x_n_s32): Likewise.
7685 (__arm_vbrsrq_x_n_u8): Likewise.
7686 (__arm_vbrsrq_x_n_u16): Likewise.
7687 (__arm_vbrsrq_x_n_u32): Likewise.
7688 (__arm_veorq_x_s8): Likewise.
7689 (__arm_veorq_x_s16): Likewise.
7690 (__arm_veorq_x_s32): Likewise.
7691 (__arm_veorq_x_u8): Likewise.
7692 (__arm_veorq_x_u16): Likewise.
7693 (__arm_veorq_x_u32): Likewise.
7694 (__arm_vmovlbq_x_s8): Likewise.
7695 (__arm_vmovlbq_x_s16): Likewise.
7696 (__arm_vmovlbq_x_u8): Likewise.
7697 (__arm_vmovlbq_x_u16): Likewise.
7698 (__arm_vmovltq_x_s8): Likewise.
7699 (__arm_vmovltq_x_s16): Likewise.
7700 (__arm_vmovltq_x_u8): Likewise.
7701 (__arm_vmovltq_x_u16): Likewise.
7702 (__arm_vmvnq_x_s8): Likewise.
7703 (__arm_vmvnq_x_s16): Likewise.
7704 (__arm_vmvnq_x_s32): Likewise.
7705 (__arm_vmvnq_x_u8): Likewise.
7706 (__arm_vmvnq_x_u16): Likewise.
7707 (__arm_vmvnq_x_u32): Likewise.
7708 (__arm_vmvnq_x_n_s16): Likewise.
7709 (__arm_vmvnq_x_n_s32): Likewise.
7710 (__arm_vmvnq_x_n_u16): Likewise.
7711 (__arm_vmvnq_x_n_u32): Likewise.
7712 (__arm_vornq_x_s8): Likewise.
7713 (__arm_vornq_x_s16): Likewise.
7714 (__arm_vornq_x_s32): Likewise.
7715 (__arm_vornq_x_u8): Likewise.
7716 (__arm_vornq_x_u16): Likewise.
7717 (__arm_vornq_x_u32): Likewise.
7718 (__arm_vorrq_x_s8): Likewise.
7719 (__arm_vorrq_x_s16): Likewise.
7720 (__arm_vorrq_x_s32): Likewise.
7721 (__arm_vorrq_x_u8): Likewise.
7722 (__arm_vorrq_x_u16): Likewise.
7723 (__arm_vorrq_x_u32): Likewise.
7724 (__arm_vrev16q_x_s8): Likewise.
7725 (__arm_vrev16q_x_u8): Likewise.
7726 (__arm_vrev32q_x_s8): Likewise.
7727 (__arm_vrev32q_x_s16): Likewise.
7728 (__arm_vrev32q_x_u8): Likewise.
7729 (__arm_vrev32q_x_u16): Likewise.
7730 (__arm_vrev64q_x_s8): Likewise.
7731 (__arm_vrev64q_x_s16): Likewise.
7732 (__arm_vrev64q_x_s32): Likewise.
7733 (__arm_vrev64q_x_u8): Likewise.
7734 (__arm_vrev64q_x_u16): Likewise.
7735 (__arm_vrev64q_x_u32): Likewise.
7736 (__arm_vrshlq_x_s8): Likewise.
7737 (__arm_vrshlq_x_s16): Likewise.
7738 (__arm_vrshlq_x_s32): Likewise.
7739 (__arm_vrshlq_x_u8): Likewise.
7740 (__arm_vrshlq_x_u16): Likewise.
7741 (__arm_vrshlq_x_u32): Likewise.
7742 (__arm_vshllbq_x_n_s8): Likewise.
7743 (__arm_vshllbq_x_n_s16): Likewise.
7744 (__arm_vshllbq_x_n_u8): Likewise.
7745 (__arm_vshllbq_x_n_u16): Likewise.
7746 (__arm_vshlltq_x_n_s8): Likewise.
7747 (__arm_vshlltq_x_n_s16): Likewise.
7748 (__arm_vshlltq_x_n_u8): Likewise.
7749 (__arm_vshlltq_x_n_u16): Likewise.
7750 (__arm_vshlq_x_s8): Likewise.
7751 (__arm_vshlq_x_s16): Likewise.
7752 (__arm_vshlq_x_s32): Likewise.
7753 (__arm_vshlq_x_u8): Likewise.
7754 (__arm_vshlq_x_u16): Likewise.
7755 (__arm_vshlq_x_u32): Likewise.
7756 (__arm_vshlq_x_n_s8): Likewise.
7757 (__arm_vshlq_x_n_s16): Likewise.
7758 (__arm_vshlq_x_n_s32): Likewise.
7759 (__arm_vshlq_x_n_u8): Likewise.
7760 (__arm_vshlq_x_n_u16): Likewise.
7761 (__arm_vshlq_x_n_u32): Likewise.
7762 (__arm_vrshrq_x_n_s8): Likewise.
7763 (__arm_vrshrq_x_n_s16): Likewise.
7764 (__arm_vrshrq_x_n_s32): Likewise.
7765 (__arm_vrshrq_x_n_u8): Likewise.
7766 (__arm_vrshrq_x_n_u16): Likewise.
7767 (__arm_vrshrq_x_n_u32): Likewise.
7768 (__arm_vshrq_x_n_s8): Likewise.
7769 (__arm_vshrq_x_n_s16): Likewise.
7770 (__arm_vshrq_x_n_s32): Likewise.
7771 (__arm_vshrq_x_n_u8): Likewise.
7772 (__arm_vshrq_x_n_u16): Likewise.
7773 (__arm_vshrq_x_n_u32): Likewise.
7774 (__arm_vdupq_x_n_f16): Likewise.
7775 (__arm_vdupq_x_n_f32): Likewise.
7776 (__arm_vminnmq_x_f16): Likewise.
7777 (__arm_vminnmq_x_f32): Likewise.
7778 (__arm_vmaxnmq_x_f16): Likewise.
7779 (__arm_vmaxnmq_x_f32): Likewise.
7780 (__arm_vabdq_x_f16): Likewise.
7781 (__arm_vabdq_x_f32): Likewise.
7782 (__arm_vabsq_x_f16): Likewise.
7783 (__arm_vabsq_x_f32): Likewise.
7784 (__arm_vaddq_x_f16): Likewise.
7785 (__arm_vaddq_x_f32): Likewise.
7786 (__arm_vaddq_x_n_f16): Likewise.
7787 (__arm_vaddq_x_n_f32): Likewise.
7788 (__arm_vnegq_x_f16): Likewise.
7789 (__arm_vnegq_x_f32): Likewise.
7790 (__arm_vmulq_x_f16): Likewise.
7791 (__arm_vmulq_x_f32): Likewise.
7792 (__arm_vmulq_x_n_f16): Likewise.
7793 (__arm_vmulq_x_n_f32): Likewise.
7794 (__arm_vsubq_x_f16): Likewise.
7795 (__arm_vsubq_x_f32): Likewise.
7796 (__arm_vsubq_x_n_f16): Likewise.
7797 (__arm_vsubq_x_n_f32): Likewise.
7798 (__arm_vcaddq_rot90_x_f16): Likewise.
7799 (__arm_vcaddq_rot90_x_f32): Likewise.
7800 (__arm_vcaddq_rot270_x_f16): Likewise.
7801 (__arm_vcaddq_rot270_x_f32): Likewise.
7802 (__arm_vcmulq_x_f16): Likewise.
7803 (__arm_vcmulq_x_f32): Likewise.
7804 (__arm_vcmulq_rot90_x_f16): Likewise.
7805 (__arm_vcmulq_rot90_x_f32): Likewise.
7806 (__arm_vcmulq_rot180_x_f16): Likewise.
7807 (__arm_vcmulq_rot180_x_f32): Likewise.
7808 (__arm_vcmulq_rot270_x_f16): Likewise.
7809 (__arm_vcmulq_rot270_x_f32): Likewise.
7810 (__arm_vcvtaq_x_s16_f16): Likewise.
7811 (__arm_vcvtaq_x_s32_f32): Likewise.
7812 (__arm_vcvtaq_x_u16_f16): Likewise.
7813 (__arm_vcvtaq_x_u32_f32): Likewise.
7814 (__arm_vcvtnq_x_s16_f16): Likewise.
7815 (__arm_vcvtnq_x_s32_f32): Likewise.
7816 (__arm_vcvtnq_x_u16_f16): Likewise.
7817 (__arm_vcvtnq_x_u32_f32): Likewise.
7818 (__arm_vcvtpq_x_s16_f16): Likewise.
7819 (__arm_vcvtpq_x_s32_f32): Likewise.
7820 (__arm_vcvtpq_x_u16_f16): Likewise.
7821 (__arm_vcvtpq_x_u32_f32): Likewise.
7822 (__arm_vcvtmq_x_s16_f16): Likewise.
7823 (__arm_vcvtmq_x_s32_f32): Likewise.
7824 (__arm_vcvtmq_x_u16_f16): Likewise.
7825 (__arm_vcvtmq_x_u32_f32): Likewise.
7826 (__arm_vcvtbq_x_f32_f16): Likewise.
7827 (__arm_vcvttq_x_f32_f16): Likewise.
7828 (__arm_vcvtq_x_f16_u16): Likewise.
7829 (__arm_vcvtq_x_f16_s16): Likewise.
7830 (__arm_vcvtq_x_f32_s32): Likewise.
7831 (__arm_vcvtq_x_f32_u32): Likewise.
7832 (__arm_vcvtq_x_n_f16_s16): Likewise.
7833 (__arm_vcvtq_x_n_f16_u16): Likewise.
7834 (__arm_vcvtq_x_n_f32_s32): Likewise.
7835 (__arm_vcvtq_x_n_f32_u32): Likewise.
7836 (__arm_vcvtq_x_s16_f16): Likewise.
7837 (__arm_vcvtq_x_s32_f32): Likewise.
7838 (__arm_vcvtq_x_u16_f16): Likewise.
7839 (__arm_vcvtq_x_u32_f32): Likewise.
7840 (__arm_vcvtq_x_n_s16_f16): Likewise.
7841 (__arm_vcvtq_x_n_s32_f32): Likewise.
7842 (__arm_vcvtq_x_n_u16_f16): Likewise.
7843 (__arm_vcvtq_x_n_u32_f32): Likewise.
7844 (__arm_vrndq_x_f16): Likewise.
7845 (__arm_vrndq_x_f32): Likewise.
7846 (__arm_vrndnq_x_f16): Likewise.
7847 (__arm_vrndnq_x_f32): Likewise.
7848 (__arm_vrndmq_x_f16): Likewise.
7849 (__arm_vrndmq_x_f32): Likewise.
7850 (__arm_vrndpq_x_f16): Likewise.
7851 (__arm_vrndpq_x_f32): Likewise.
7852 (__arm_vrndaq_x_f16): Likewise.
7853 (__arm_vrndaq_x_f32): Likewise.
7854 (__arm_vrndxq_x_f16): Likewise.
7855 (__arm_vrndxq_x_f32): Likewise.
7856 (__arm_vandq_x_f16): Likewise.
7857 (__arm_vandq_x_f32): Likewise.
7858 (__arm_vbicq_x_f16): Likewise.
7859 (__arm_vbicq_x_f32): Likewise.
7860 (__arm_vbrsrq_x_n_f16): Likewise.
7861 (__arm_vbrsrq_x_n_f32): Likewise.
7862 (__arm_veorq_x_f16): Likewise.
7863 (__arm_veorq_x_f32): Likewise.
7864 (__arm_vornq_x_f16): Likewise.
7865 (__arm_vornq_x_f32): Likewise.
7866 (__arm_vorrq_x_f16): Likewise.
7867 (__arm_vorrq_x_f32): Likewise.
7868 (__arm_vrev32q_x_f16): Likewise.
7869 (__arm_vrev64q_x_f16): Likewise.
7870 (__arm_vrev64q_x_f32): Likewise.
7871 (vabdq_x): Define polymorphic variant.
7872 (vabsq_x): Likewise.
7873 (vaddq_x): Likewise.
7874 (vandq_x): Likewise.
7875 (vbicq_x): Likewise.
7876 (vbrsrq_x): Likewise.
7877 (vcaddq_rot270_x): Likewise.
7878 (vcaddq_rot90_x): Likewise.
7879 (vcmulq_rot180_x): Likewise.
7880 (vcmulq_rot270_x): Likewise.
7881 (vcmulq_x): Likewise.
7882 (vcvtq_x): Likewise.
7883 (vcvtq_x_n): Likewise.
7884 (vcvtnq_m): Likewise.
7885 (veorq_x): Likewise.
7886 (vmaxnmq_x): Likewise.
7887 (vminnmq_x): Likewise.
7888 (vmulq_x): Likewise.
7889 (vnegq_x): Likewise.
7890 (vornq_x): Likewise.
7891 (vorrq_x): Likewise.
7892 (vrev32q_x): Likewise.
7893 (vrev64q_x): Likewise.
7894 (vrndaq_x): Likewise.
7895 (vrndmq_x): Likewise.
7896 (vrndnq_x): Likewise.
7897 (vrndpq_x): Likewise.
7898 (vrndq_x): Likewise.
7899 (vrndxq_x): Likewise.
7900 (vsubq_x): Likewise.
7901 (vcmulq_rot90_x): Likewise.
7903 (vclsq_x): Likewise.
7904 (vclzq_x): Likewise.
7905 (vhaddq_x): Likewise.
7906 (vhcaddq_rot270_x): Likewise.
7907 (vhcaddq_rot90_x): Likewise.
7908 (vhsubq_x): Likewise.
7909 (vmaxq_x): Likewise.
7910 (vminq_x): Likewise.
7911 (vmovlbq_x): Likewise.
7912 (vmovltq_x): Likewise.
7913 (vmulhq_x): Likewise.
7914 (vmullbq_int_x): Likewise.
7915 (vmullbq_poly_x): Likewise.
7916 (vmulltq_int_x): Likewise.
7917 (vmulltq_poly_x): Likewise.
7918 (vmvnq_x): Likewise.
7919 (vrev16q_x): Likewise.
7920 (vrhaddq_x): Likewise.
7921 (vrmulhq_x): Likewise.
7922 (vrshlq_x): Likewise.
7923 (vrshrq_x): Likewise.
7924 (vshllbq_x): Likewise.
7925 (vshlltq_x): Likewise.
7926 (vshlq_x_n): Likewise.
7927 (vshlq_x): Likewise.
7928 (vdwdupq_x_u8): Likewise.
7929 (vdwdupq_x_u16): Likewise.
7930 (vdwdupq_x_u32): Likewise.
7931 (viwdupq_x_u8): Likewise.
7932 (viwdupq_x_u16): Likewise.
7933 (viwdupq_x_u32): Likewise.
7934 (vidupq_x_u8): Likewise.
7935 (vddupq_x_u8): Likewise.
7936 (vidupq_x_u16): Likewise.
7937 (vddupq_x_u16): Likewise.
7938 (vidupq_x_u32): Likewise.
7939 (vddupq_x_u32): Likewise.
7940 (vshrq_x): Likewise.
7942 2020-03-20 Richard Biener <rguenther@suse.de>
7944 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
7945 to vectorize for CTOR defs.
7947 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7948 Andre Vieira <andre.simoesdiasvieira@arm.com>
7949 Mihail Ionescu <mihail.ionescu@arm.com>
7951 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
7953 (LDRGBWBU_QUALIFIERS): Likewise.
7954 (LDRGBWBS_Z_QUALIFIERS): Likewise.
7955 (LDRGBWBU_Z_QUALIFIERS): Likewise.
7956 (STRSBWBS_QUALIFIERS): Likewise.
7957 (STRSBWBU_QUALIFIERS): Likewise.
7958 (STRSBWBS_P_QUALIFIERS): Likewise.
7959 (STRSBWBU_P_QUALIFIERS): Likewise.
7960 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
7961 (vldrdq_gather_base_wb_u64): Likewise.
7962 (vldrdq_gather_base_wb_z_s64): Likewise.
7963 (vldrdq_gather_base_wb_z_u64): Likewise.
7964 (vldrwq_gather_base_wb_f32): Likewise.
7965 (vldrwq_gather_base_wb_s32): Likewise.
7966 (vldrwq_gather_base_wb_u32): Likewise.
7967 (vldrwq_gather_base_wb_z_f32): Likewise.
7968 (vldrwq_gather_base_wb_z_s32): Likewise.
7969 (vldrwq_gather_base_wb_z_u32): Likewise.
7970 (vstrdq_scatter_base_wb_p_s64): Likewise.
7971 (vstrdq_scatter_base_wb_p_u64): Likewise.
7972 (vstrdq_scatter_base_wb_s64): Likewise.
7973 (vstrdq_scatter_base_wb_u64): Likewise.
7974 (vstrwq_scatter_base_wb_p_s32): Likewise.
7975 (vstrwq_scatter_base_wb_p_f32): Likewise.
7976 (vstrwq_scatter_base_wb_p_u32): Likewise.
7977 (vstrwq_scatter_base_wb_s32): Likewise.
7978 (vstrwq_scatter_base_wb_u32): Likewise.
7979 (vstrwq_scatter_base_wb_f32): Likewise.
7980 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
7981 (__arm_vldrdq_gather_base_wb_u64): Likewise.
7982 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
7983 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
7984 (__arm_vldrwq_gather_base_wb_s32): Likewise.
7985 (__arm_vldrwq_gather_base_wb_u32): Likewise.
7986 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
7987 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
7988 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
7989 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
7990 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
7991 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
7992 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
7993 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
7994 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
7995 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
7996 (__arm_vldrwq_gather_base_wb_f32): Likewise.
7997 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
7998 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
7999 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
8000 (vstrwq_scatter_base_wb): Define polymorphic variant.
8001 (vstrwq_scatter_base_wb_p): Likewise.
8002 (vstrdq_scatter_base_wb_p): Likewise.
8003 (vstrdq_scatter_base_wb): Likewise.
8004 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
8006 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
8008 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
8009 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
8010 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
8011 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
8012 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
8013 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
8014 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
8015 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
8016 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
8017 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
8018 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
8019 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
8020 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
8021 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
8022 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
8023 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
8024 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
8025 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
8026 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
8027 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
8028 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
8029 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
8030 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
8031 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
8032 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
8033 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
8034 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
8035 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
8036 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
8038 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8039 Andre Vieira <andre.simoesdiasvieira@arm.com>
8040 Mihail Ionescu <mihail.ionescu@arm.com>
8042 * config/arm/arm-builtins.c
8043 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
8045 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
8046 (vddupq_m_n_u32): Likewise.
8047 (vddupq_m_n_u16): Likewise.
8048 (vddupq_m_wb_u8): Likewise.
8049 (vddupq_m_wb_u16): Likewise.
8050 (vddupq_m_wb_u32): Likewise.
8051 (vddupq_n_u8): Likewise.
8052 (vddupq_n_u32): Likewise.
8053 (vddupq_n_u16): Likewise.
8054 (vddupq_wb_u8): Likewise.
8055 (vddupq_wb_u16): Likewise.
8056 (vddupq_wb_u32): Likewise.
8057 (vdwdupq_m_n_u8): Likewise.
8058 (vdwdupq_m_n_u32): Likewise.
8059 (vdwdupq_m_n_u16): Likewise.
8060 (vdwdupq_m_wb_u8): Likewise.
8061 (vdwdupq_m_wb_u32): Likewise.
8062 (vdwdupq_m_wb_u16): Likewise.
8063 (vdwdupq_n_u8): Likewise.
8064 (vdwdupq_n_u32): Likewise.
8065 (vdwdupq_n_u16): Likewise.
8066 (vdwdupq_wb_u8): Likewise.
8067 (vdwdupq_wb_u32): Likewise.
8068 (vdwdupq_wb_u16): Likewise.
8069 (vidupq_m_n_u8): Likewise.
8070 (vidupq_m_n_u32): Likewise.
8071 (vidupq_m_n_u16): Likewise.
8072 (vidupq_m_wb_u8): Likewise.
8073 (vidupq_m_wb_u16): Likewise.
8074 (vidupq_m_wb_u32): Likewise.
8075 (vidupq_n_u8): Likewise.
8076 (vidupq_n_u32): Likewise.
8077 (vidupq_n_u16): Likewise.
8078 (vidupq_wb_u8): Likewise.
8079 (vidupq_wb_u16): Likewise.
8080 (vidupq_wb_u32): Likewise.
8081 (viwdupq_m_n_u8): Likewise.
8082 (viwdupq_m_n_u32): Likewise.
8083 (viwdupq_m_n_u16): Likewise.
8084 (viwdupq_m_wb_u8): Likewise.
8085 (viwdupq_m_wb_u32): Likewise.
8086 (viwdupq_m_wb_u16): Likewise.
8087 (viwdupq_n_u8): Likewise.
8088 (viwdupq_n_u32): Likewise.
8089 (viwdupq_n_u16): Likewise.
8090 (viwdupq_wb_u8): Likewise.
8091 (viwdupq_wb_u32): Likewise.
8092 (viwdupq_wb_u16): Likewise.
8093 (__arm_vddupq_m_n_u8): Define intrinsic.
8094 (__arm_vddupq_m_n_u32): Likewise.
8095 (__arm_vddupq_m_n_u16): Likewise.
8096 (__arm_vddupq_m_wb_u8): Likewise.
8097 (__arm_vddupq_m_wb_u16): Likewise.
8098 (__arm_vddupq_m_wb_u32): Likewise.
8099 (__arm_vddupq_n_u8): Likewise.
8100 (__arm_vddupq_n_u32): Likewise.
8101 (__arm_vddupq_n_u16): Likewise.
8102 (__arm_vdwdupq_m_n_u8): Likewise.
8103 (__arm_vdwdupq_m_n_u32): Likewise.
8104 (__arm_vdwdupq_m_n_u16): Likewise.
8105 (__arm_vdwdupq_m_wb_u8): Likewise.
8106 (__arm_vdwdupq_m_wb_u32): Likewise.
8107 (__arm_vdwdupq_m_wb_u16): Likewise.
8108 (__arm_vdwdupq_n_u8): Likewise.
8109 (__arm_vdwdupq_n_u32): Likewise.
8110 (__arm_vdwdupq_n_u16): Likewise.
8111 (__arm_vdwdupq_wb_u8): Likewise.
8112 (__arm_vdwdupq_wb_u32): Likewise.
8113 (__arm_vdwdupq_wb_u16): Likewise.
8114 (__arm_vidupq_m_n_u8): Likewise.
8115 (__arm_vidupq_m_n_u32): Likewise.
8116 (__arm_vidupq_m_n_u16): Likewise.
8117 (__arm_vidupq_n_u8): Likewise.
8118 (__arm_vidupq_m_wb_u8): Likewise.
8119 (__arm_vidupq_m_wb_u16): Likewise.
8120 (__arm_vidupq_m_wb_u32): Likewise.
8121 (__arm_vidupq_n_u32): Likewise.
8122 (__arm_vidupq_n_u16): Likewise.
8123 (__arm_vidupq_wb_u8): Likewise.
8124 (__arm_vidupq_wb_u16): Likewise.
8125 (__arm_vidupq_wb_u32): Likewise.
8126 (__arm_vddupq_wb_u8): Likewise.
8127 (__arm_vddupq_wb_u16): Likewise.
8128 (__arm_vddupq_wb_u32): Likewise.
8129 (__arm_viwdupq_m_n_u8): Likewise.
8130 (__arm_viwdupq_m_n_u32): Likewise.
8131 (__arm_viwdupq_m_n_u16): Likewise.
8132 (__arm_viwdupq_m_wb_u8): Likewise.
8133 (__arm_viwdupq_m_wb_u32): Likewise.
8134 (__arm_viwdupq_m_wb_u16): Likewise.
8135 (__arm_viwdupq_n_u8): Likewise.
8136 (__arm_viwdupq_n_u32): Likewise.
8137 (__arm_viwdupq_n_u16): Likewise.
8138 (__arm_viwdupq_wb_u8): Likewise.
8139 (__arm_viwdupq_wb_u32): Likewise.
8140 (__arm_viwdupq_wb_u16): Likewise.
8141 (vidupq_m): Define polymorphic variant.
8142 (vddupq_m): Likewise.
8143 (vidupq_u16): Likewise.
8144 (vidupq_u32): Likewise.
8145 (vidupq_u8): Likewise.
8146 (vddupq_u16): Likewise.
8147 (vddupq_u32): Likewise.
8148 (vddupq_u8): Likewise.
8149 (viwdupq_m): Likewise.
8150 (viwdupq_u16): Likewise.
8151 (viwdupq_u32): Likewise.
8152 (viwdupq_u8): Likewise.
8153 (vdwdupq_m): Likewise.
8154 (vdwdupq_u16): Likewise.
8155 (vdwdupq_u32): Likewise.
8156 (vdwdupq_u8): Likewise.
8157 * config/arm/arm_mve_builtins.def
8158 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
8160 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
8161 (mve_vidupq_u<mode>_insn): Likewise.
8162 (mve_vidupq_m_n_u<mode>): Likewise.
8163 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
8164 (mve_vddupq_n_u<mode>): Likewise.
8165 (mve_vddupq_u<mode>_insn): Likewise.
8166 (mve_vddupq_m_n_u<mode>): Likewise.
8167 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
8168 (mve_vdwdupq_n_u<mode>): Likewise.
8169 (mve_vdwdupq_wb_u<mode>): Likewise.
8170 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
8171 (mve_vdwdupq_m_n_u<mode>): Likewise.
8172 (mve_vdwdupq_m_wb_u<mode>): Likewise.
8173 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
8174 (mve_viwdupq_n_u<mode>): Likewise.
8175 (mve_viwdupq_wb_u<mode>): Likewise.
8176 (mve_viwdupq_wb_u<mode>_insn): Likewise.
8177 (mve_viwdupq_m_n_u<mode>): Likewise.
8178 (mve_viwdupq_m_wb_u<mode>): Likewise.
8179 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
8181 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8183 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
8184 (vreinterpretq_s16_s64): Likewise.
8185 (vreinterpretq_s16_s8): Likewise.
8186 (vreinterpretq_s16_u16): Likewise.
8187 (vreinterpretq_s16_u32): Likewise.
8188 (vreinterpretq_s16_u64): Likewise.
8189 (vreinterpretq_s16_u8): Likewise.
8190 (vreinterpretq_s32_s16): Likewise.
8191 (vreinterpretq_s32_s64): Likewise.
8192 (vreinterpretq_s32_s8): Likewise.
8193 (vreinterpretq_s32_u16): Likewise.
8194 (vreinterpretq_s32_u32): Likewise.
8195 (vreinterpretq_s32_u64): Likewise.
8196 (vreinterpretq_s32_u8): Likewise.
8197 (vreinterpretq_s64_s16): Likewise.
8198 (vreinterpretq_s64_s32): Likewise.
8199 (vreinterpretq_s64_s8): Likewise.
8200 (vreinterpretq_s64_u16): Likewise.
8201 (vreinterpretq_s64_u32): Likewise.
8202 (vreinterpretq_s64_u64): Likewise.
8203 (vreinterpretq_s64_u8): Likewise.
8204 (vreinterpretq_s8_s16): Likewise.
8205 (vreinterpretq_s8_s32): Likewise.
8206 (vreinterpretq_s8_s64): Likewise.
8207 (vreinterpretq_s8_u16): Likewise.
8208 (vreinterpretq_s8_u32): Likewise.
8209 (vreinterpretq_s8_u64): Likewise.
8210 (vreinterpretq_s8_u8): Likewise.
8211 (vreinterpretq_u16_s16): Likewise.
8212 (vreinterpretq_u16_s32): Likewise.
8213 (vreinterpretq_u16_s64): Likewise.
8214 (vreinterpretq_u16_s8): Likewise.
8215 (vreinterpretq_u16_u32): Likewise.
8216 (vreinterpretq_u16_u64): Likewise.
8217 (vreinterpretq_u16_u8): Likewise.
8218 (vreinterpretq_u32_s16): Likewise.
8219 (vreinterpretq_u32_s32): Likewise.
8220 (vreinterpretq_u32_s64): Likewise.
8221 (vreinterpretq_u32_s8): Likewise.
8222 (vreinterpretq_u32_u16): Likewise.
8223 (vreinterpretq_u32_u64): Likewise.
8224 (vreinterpretq_u32_u8): Likewise.
8225 (vreinterpretq_u64_s16): Likewise.
8226 (vreinterpretq_u64_s32): Likewise.
8227 (vreinterpretq_u64_s64): Likewise.
8228 (vreinterpretq_u64_s8): Likewise.
8229 (vreinterpretq_u64_u16): Likewise.
8230 (vreinterpretq_u64_u32): Likewise.
8231 (vreinterpretq_u64_u8): Likewise.
8232 (vreinterpretq_u8_s16): Likewise.
8233 (vreinterpretq_u8_s32): Likewise.
8234 (vreinterpretq_u8_s64): Likewise.
8235 (vreinterpretq_u8_s8): Likewise.
8236 (vreinterpretq_u8_u16): Likewise.
8237 (vreinterpretq_u8_u32): Likewise.
8238 (vreinterpretq_u8_u64): Likewise.
8239 (vreinterpretq_s32_f16): Likewise.
8240 (vreinterpretq_s32_f32): Likewise.
8241 (vreinterpretq_u16_f16): Likewise.
8242 (vreinterpretq_u16_f32): Likewise.
8243 (vreinterpretq_u32_f16): Likewise.
8244 (vreinterpretq_u32_f32): Likewise.
8245 (vreinterpretq_u64_f16): Likewise.
8246 (vreinterpretq_u64_f32): Likewise.
8247 (vreinterpretq_u8_f16): Likewise.
8248 (vreinterpretq_u8_f32): Likewise.
8249 (vreinterpretq_f16_f32): Likewise.
8250 (vreinterpretq_f16_s16): Likewise.
8251 (vreinterpretq_f16_s32): Likewise.
8252 (vreinterpretq_f16_s64): Likewise.
8253 (vreinterpretq_f16_s8): Likewise.
8254 (vreinterpretq_f16_u16): Likewise.
8255 (vreinterpretq_f16_u32): Likewise.
8256 (vreinterpretq_f16_u64): Likewise.
8257 (vreinterpretq_f16_u8): Likewise.
8258 (vreinterpretq_f32_f16): Likewise.
8259 (vreinterpretq_f32_s16): Likewise.
8260 (vreinterpretq_f32_s32): Likewise.
8261 (vreinterpretq_f32_s64): Likewise.
8262 (vreinterpretq_f32_s8): Likewise.
8263 (vreinterpretq_f32_u16): Likewise.
8264 (vreinterpretq_f32_u32): Likewise.
8265 (vreinterpretq_f32_u64): Likewise.
8266 (vreinterpretq_f32_u8): Likewise.
8267 (vreinterpretq_s16_f16): Likewise.
8268 (vreinterpretq_s16_f32): Likewise.
8269 (vreinterpretq_s64_f16): Likewise.
8270 (vreinterpretq_s64_f32): Likewise.
8271 (vreinterpretq_s8_f16): Likewise.
8272 (vreinterpretq_s8_f32): Likewise.
8273 (vuninitializedq_u8): Likewise.
8274 (vuninitializedq_u16): Likewise.
8275 (vuninitializedq_u32): Likewise.
8276 (vuninitializedq_u64): Likewise.
8277 (vuninitializedq_s8): Likewise.
8278 (vuninitializedq_s16): Likewise.
8279 (vuninitializedq_s32): Likewise.
8280 (vuninitializedq_s64): Likewise.
8281 (vuninitializedq_f16): Likewise.
8282 (vuninitializedq_f32): Likewise.
8283 (__arm_vuninitializedq_u8): Define intrinsic.
8284 (__arm_vuninitializedq_u16): Likewise.
8285 (__arm_vuninitializedq_u32): Likewise.
8286 (__arm_vuninitializedq_u64): Likewise.
8287 (__arm_vuninitializedq_s8): Likewise.
8288 (__arm_vuninitializedq_s16): Likewise.
8289 (__arm_vuninitializedq_s32): Likewise.
8290 (__arm_vuninitializedq_s64): Likewise.
8291 (__arm_vreinterpretq_s16_s32): Likewise.
8292 (__arm_vreinterpretq_s16_s64): Likewise.
8293 (__arm_vreinterpretq_s16_s8): Likewise.
8294 (__arm_vreinterpretq_s16_u16): Likewise.
8295 (__arm_vreinterpretq_s16_u32): Likewise.
8296 (__arm_vreinterpretq_s16_u64): Likewise.
8297 (__arm_vreinterpretq_s16_u8): Likewise.
8298 (__arm_vreinterpretq_s32_s16): Likewise.
8299 (__arm_vreinterpretq_s32_s64): Likewise.
8300 (__arm_vreinterpretq_s32_s8): Likewise.
8301 (__arm_vreinterpretq_s32_u16): Likewise.
8302 (__arm_vreinterpretq_s32_u32): Likewise.
8303 (__arm_vreinterpretq_s32_u64): Likewise.
8304 (__arm_vreinterpretq_s32_u8): Likewise.
8305 (__arm_vreinterpretq_s64_s16): Likewise.
8306 (__arm_vreinterpretq_s64_s32): Likewise.
8307 (__arm_vreinterpretq_s64_s8): Likewise.
8308 (__arm_vreinterpretq_s64_u16): Likewise.
8309 (__arm_vreinterpretq_s64_u32): Likewise.
8310 (__arm_vreinterpretq_s64_u64): Likewise.
8311 (__arm_vreinterpretq_s64_u8): Likewise.
8312 (__arm_vreinterpretq_s8_s16): Likewise.
8313 (__arm_vreinterpretq_s8_s32): Likewise.
8314 (__arm_vreinterpretq_s8_s64): Likewise.
8315 (__arm_vreinterpretq_s8_u16): Likewise.
8316 (__arm_vreinterpretq_s8_u32): Likewise.
8317 (__arm_vreinterpretq_s8_u64): Likewise.
8318 (__arm_vreinterpretq_s8_u8): Likewise.
8319 (__arm_vreinterpretq_u16_s16): Likewise.
8320 (__arm_vreinterpretq_u16_s32): Likewise.
8321 (__arm_vreinterpretq_u16_s64): Likewise.
8322 (__arm_vreinterpretq_u16_s8): Likewise.
8323 (__arm_vreinterpretq_u16_u32): Likewise.
8324 (__arm_vreinterpretq_u16_u64): Likewise.
8325 (__arm_vreinterpretq_u16_u8): Likewise.
8326 (__arm_vreinterpretq_u32_s16): Likewise.
8327 (__arm_vreinterpretq_u32_s32): Likewise.
8328 (__arm_vreinterpretq_u32_s64): Likewise.
8329 (__arm_vreinterpretq_u32_s8): Likewise.
8330 (__arm_vreinterpretq_u32_u16): Likewise.
8331 (__arm_vreinterpretq_u32_u64): Likewise.
8332 (__arm_vreinterpretq_u32_u8): Likewise.
8333 (__arm_vreinterpretq_u64_s16): Likewise.
8334 (__arm_vreinterpretq_u64_s32): Likewise.
8335 (__arm_vreinterpretq_u64_s64): Likewise.
8336 (__arm_vreinterpretq_u64_s8): Likewise.
8337 (__arm_vreinterpretq_u64_u16): Likewise.
8338 (__arm_vreinterpretq_u64_u32): Likewise.
8339 (__arm_vreinterpretq_u64_u8): Likewise.
8340 (__arm_vreinterpretq_u8_s16): Likewise.
8341 (__arm_vreinterpretq_u8_s32): Likewise.
8342 (__arm_vreinterpretq_u8_s64): Likewise.
8343 (__arm_vreinterpretq_u8_s8): Likewise.
8344 (__arm_vreinterpretq_u8_u16): Likewise.
8345 (__arm_vreinterpretq_u8_u32): Likewise.
8346 (__arm_vreinterpretq_u8_u64): Likewise.
8347 (__arm_vuninitializedq_f16): Likewise.
8348 (__arm_vuninitializedq_f32): Likewise.
8349 (__arm_vreinterpretq_s32_f16): Likewise.
8350 (__arm_vreinterpretq_s32_f32): Likewise.
8351 (__arm_vreinterpretq_s16_f16): Likewise.
8352 (__arm_vreinterpretq_s16_f32): Likewise.
8353 (__arm_vreinterpretq_s64_f16): Likewise.
8354 (__arm_vreinterpretq_s64_f32): Likewise.
8355 (__arm_vreinterpretq_s8_f16): Likewise.
8356 (__arm_vreinterpretq_s8_f32): Likewise.
8357 (__arm_vreinterpretq_u16_f16): Likewise.
8358 (__arm_vreinterpretq_u16_f32): Likewise.
8359 (__arm_vreinterpretq_u32_f16): Likewise.
8360 (__arm_vreinterpretq_u32_f32): Likewise.
8361 (__arm_vreinterpretq_u64_f16): Likewise.
8362 (__arm_vreinterpretq_u64_f32): Likewise.
8363 (__arm_vreinterpretq_u8_f16): Likewise.
8364 (__arm_vreinterpretq_u8_f32): Likewise.
8365 (__arm_vreinterpretq_f16_f32): Likewise.
8366 (__arm_vreinterpretq_f16_s16): Likewise.
8367 (__arm_vreinterpretq_f16_s32): Likewise.
8368 (__arm_vreinterpretq_f16_s64): Likewise.
8369 (__arm_vreinterpretq_f16_s8): Likewise.
8370 (__arm_vreinterpretq_f16_u16): Likewise.
8371 (__arm_vreinterpretq_f16_u32): Likewise.
8372 (__arm_vreinterpretq_f16_u64): Likewise.
8373 (__arm_vreinterpretq_f16_u8): Likewise.
8374 (__arm_vreinterpretq_f32_f16): Likewise.
8375 (__arm_vreinterpretq_f32_s16): Likewise.
8376 (__arm_vreinterpretq_f32_s32): Likewise.
8377 (__arm_vreinterpretq_f32_s64): Likewise.
8378 (__arm_vreinterpretq_f32_s8): Likewise.
8379 (__arm_vreinterpretq_f32_u16): Likewise.
8380 (__arm_vreinterpretq_f32_u32): Likewise.
8381 (__arm_vreinterpretq_f32_u64): Likewise.
8382 (__arm_vreinterpretq_f32_u8): Likewise.
8383 (vuninitializedq): Define polymorphic variant.
8384 (vreinterpretq_f16): Likewise.
8385 (vreinterpretq_f32): Likewise.
8386 (vreinterpretq_s16): Likewise.
8387 (vreinterpretq_s32): Likewise.
8388 (vreinterpretq_s64): Likewise.
8389 (vreinterpretq_s8): Likewise.
8390 (vreinterpretq_u16): Likewise.
8391 (vreinterpretq_u32): Likewise.
8392 (vreinterpretq_u64): Likewise.
8393 (vreinterpretq_u8): Likewise.
8395 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8396 Andre Vieira <andre.simoesdiasvieira@arm.com>
8397 Mihail Ionescu <mihail.ionescu@arm.com>
8399 * config/arm/arm_mve.h (vaddq_s8): Define macro.
8400 (vaddq_s16): Likewise.
8401 (vaddq_s32): Likewise.
8402 (vaddq_u8): Likewise.
8403 (vaddq_u16): Likewise.
8404 (vaddq_u32): Likewise.
8405 (vaddq_f16): Likewise.
8406 (vaddq_f32): Likewise.
8407 (__arm_vaddq_s8): Define intrinsic.
8408 (__arm_vaddq_s16): Likewise.
8409 (__arm_vaddq_s32): Likewise.
8410 (__arm_vaddq_u8): Likewise.
8411 (__arm_vaddq_u16): Likewise.
8412 (__arm_vaddq_u32): Likewise.
8413 (__arm_vaddq_f16): Likewise.
8414 (__arm_vaddq_f32): Likewise.
8415 (vaddq): Define polymorphic variant.
8416 * config/arm/iterators.md (VNIM): Define mode iterator for common types
8417 Neon, IWMMXT and MVE.
8418 (VNINOTM): Likewise.
8419 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
8420 (mve_vaddq_f<mode>): Define RTL pattern.
8421 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
8422 (addv8hf3_neon): Define RTL pattern.
8423 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
8425 (addv8hf3): Define standard RTL pattern for MVE and Neon.
8426 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
8428 2020-03-20 Martin Liska <mliska@suse.cz>
8431 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
8432 build_ref_for_offset function was used and it transforms off to bytes
8435 2020-03-20 Richard Biener <rguenther@suse.de>
8437 PR tree-optimization/94266
8438 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
8439 type of the underlying object to adjust for the containing
8442 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
8444 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
8445 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
8446 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
8448 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
8450 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
8452 2020-03-20 Jakub Jelinek <jakub@redhat.com>
8454 PR tree-optimization/94224
8455 * gimple-ssa-store-merging.c
8456 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
8457 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
8460 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
8462 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
8464 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
8467 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
8468 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
8470 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
8473 * cgraphunit.c (process_function_and_variable_attributes): warn
8474 for flatten attribute on alias.
8475 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
8477 2020-03-19 Martin Liska <mliska@suse.cz>
8479 * lto-section-in.c: Add ext_symtab.
8480 * lto-streamer-out.c (write_symbol_extension_info): New.
8481 (produce_symtab_extension): New.
8482 (produce_asm_for_decls): Stream also produce_symtab_extension.
8483 * lto-streamer.h (enum lto_section_type): New section.
8485 2020-03-19 Jakub Jelinek <jakub@redhat.com>
8487 PR tree-optimization/94211
8488 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
8489 instead of estimate_num_insns for bb_seq (middle_bb). Rename
8490 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
8493 2020-03-19 Richard Biener <rguenther@suse.de>
8496 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
8497 and build_ref_for_offset.
8499 2020-03-19 Richard Biener <rguenther@suse.de>
8502 * fold-const.c (fold_binary_loc): Avoid using
8503 build_fold_addr_expr when we really want an ADDR_EXPR.
8505 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
8507 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
8510 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
8512 PR rtl-optimization/90275
8513 * cse.c (cse_insn): Delete no-op register moves too.
8515 2020-03-18 Martin Sebor <msebor@redhat.com>
8518 * cgraphunit.c (process_function_and_variable_attributes): Also
8519 complain about weakref function definitions and drop all effects
8522 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8523 Mihail Ionescu <mihail.ionescu@arm.com>
8524 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8526 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
8527 (vstrdq_scatter_base_p_u64): Likewise.
8528 (vstrdq_scatter_base_s64): Likewise.
8529 (vstrdq_scatter_base_u64): Likewise.
8530 (vstrdq_scatter_offset_p_s64): Likewise.
8531 (vstrdq_scatter_offset_p_u64): Likewise.
8532 (vstrdq_scatter_offset_s64): Likewise.
8533 (vstrdq_scatter_offset_u64): Likewise.
8534 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
8535 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
8536 (vstrdq_scatter_shifted_offset_s64): Likewise.
8537 (vstrdq_scatter_shifted_offset_u64): Likewise.
8538 (vstrhq_scatter_offset_f16): Likewise.
8539 (vstrhq_scatter_offset_p_f16): Likewise.
8540 (vstrhq_scatter_shifted_offset_f16): Likewise.
8541 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
8542 (vstrwq_scatter_base_f32): Likewise.
8543 (vstrwq_scatter_base_p_f32): Likewise.
8544 (vstrwq_scatter_offset_f32): Likewise.
8545 (vstrwq_scatter_offset_p_f32): Likewise.
8546 (vstrwq_scatter_offset_p_s32): Likewise.
8547 (vstrwq_scatter_offset_p_u32): Likewise.
8548 (vstrwq_scatter_offset_s32): Likewise.
8549 (vstrwq_scatter_offset_u32): Likewise.
8550 (vstrwq_scatter_shifted_offset_f32): Likewise.
8551 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
8552 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
8553 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
8554 (vstrwq_scatter_shifted_offset_s32): Likewise.
8555 (vstrwq_scatter_shifted_offset_u32): Likewise.
8556 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
8557 (__arm_vstrdq_scatter_base_p_u64): Likewise.
8558 (__arm_vstrdq_scatter_base_s64): Likewise.
8559 (__arm_vstrdq_scatter_base_u64): Likewise.
8560 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
8561 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
8562 (__arm_vstrdq_scatter_offset_s64): Likewise.
8563 (__arm_vstrdq_scatter_offset_u64): Likewise.
8564 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
8565 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
8566 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
8567 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
8568 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
8569 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
8570 (__arm_vstrwq_scatter_offset_s32): Likewise.
8571 (__arm_vstrwq_scatter_offset_u32): Likewise.
8572 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
8573 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
8574 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
8575 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
8576 (__arm_vstrhq_scatter_offset_f16): Likewise.
8577 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
8578 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
8579 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
8580 (__arm_vstrwq_scatter_base_f32): Likewise.
8581 (__arm_vstrwq_scatter_base_p_f32): Likewise.
8582 (__arm_vstrwq_scatter_offset_f32): Likewise.
8583 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
8584 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
8585 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
8586 (vstrhq_scatter_offset): Define polymorphic variant.
8587 (vstrhq_scatter_offset_p): Likewise.
8588 (vstrhq_scatter_shifted_offset): Likewise.
8589 (vstrhq_scatter_shifted_offset_p): Likewise.
8590 (vstrwq_scatter_base): Likewise.
8591 (vstrwq_scatter_base_p): Likewise.
8592 (vstrwq_scatter_offset): Likewise.
8593 (vstrwq_scatter_offset_p): Likewise.
8594 (vstrwq_scatter_shifted_offset): Likewise.
8595 (vstrwq_scatter_shifted_offset_p): Likewise.
8596 (vstrdq_scatter_base_p): Likewise.
8597 (vstrdq_scatter_base): Likewise.
8598 (vstrdq_scatter_offset_p): Likewise.
8599 (vstrdq_scatter_offset): Likewise.
8600 (vstrdq_scatter_shifted_offset_p): Likewise.
8601 (vstrdq_scatter_shifted_offset): Likewise.
8602 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
8603 (STRSBS_P): Likewise.
8605 (STRSBU_P): Likewise.
8607 (STRSS_P): Likewise.
8609 (STRSU_P): Likewise.
8610 * config/arm/constraints.md (Ri): Define.
8611 * config/arm/mve.md (VSTRDSBQ): Define iterator.
8612 (VSTRDSOQ): Likewise.
8613 (VSTRDSSOQ): Likewise.
8614 (VSTRWSOQ): Likewise.
8615 (VSTRWSSOQ): Likewise.
8616 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
8617 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
8618 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
8619 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
8620 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
8621 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
8622 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
8623 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
8624 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
8625 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
8626 (mve_vstrwq_scatter_base_fv4sf): Likewise.
8627 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
8628 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
8629 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
8630 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
8631 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
8632 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
8633 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
8634 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
8635 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
8636 * config/arm/predicates.md (Ri): Define predicate to check immediate
8637 is the range +/-1016 and multiple of 8.
8639 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8640 Mihail Ionescu <mihail.ionescu@arm.com>
8641 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8643 * config/arm/arm_mve.h (vst1q_f32): Define macro.
8644 (vst1q_f16): Likewise.
8645 (vst1q_s8): Likewise.
8646 (vst1q_s32): Likewise.
8647 (vst1q_s16): Likewise.
8648 (vst1q_u8): Likewise.
8649 (vst1q_u32): Likewise.
8650 (vst1q_u16): Likewise.
8651 (vstrhq_f16): Likewise.
8652 (vstrhq_scatter_offset_s32): Likewise.
8653 (vstrhq_scatter_offset_s16): Likewise.
8654 (vstrhq_scatter_offset_u32): Likewise.
8655 (vstrhq_scatter_offset_u16): Likewise.
8656 (vstrhq_scatter_offset_p_s32): Likewise.
8657 (vstrhq_scatter_offset_p_s16): Likewise.
8658 (vstrhq_scatter_offset_p_u32): Likewise.
8659 (vstrhq_scatter_offset_p_u16): Likewise.
8660 (vstrhq_scatter_shifted_offset_s32): Likewise.
8661 (vstrhq_scatter_shifted_offset_s16): Likewise.
8662 (vstrhq_scatter_shifted_offset_u32): Likewise.
8663 (vstrhq_scatter_shifted_offset_u16): Likewise.
8664 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
8665 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
8666 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
8667 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
8668 (vstrhq_s32): Likewise.
8669 (vstrhq_s16): Likewise.
8670 (vstrhq_u32): Likewise.
8671 (vstrhq_u16): Likewise.
8672 (vstrhq_p_f16): Likewise.
8673 (vstrhq_p_s32): Likewise.
8674 (vstrhq_p_s16): Likewise.
8675 (vstrhq_p_u32): Likewise.
8676 (vstrhq_p_u16): Likewise.
8677 (vstrwq_f32): Likewise.
8678 (vstrwq_s32): Likewise.
8679 (vstrwq_u32): Likewise.
8680 (vstrwq_p_f32): Likewise.
8681 (vstrwq_p_s32): Likewise.
8682 (vstrwq_p_u32): Likewise.
8683 (__arm_vst1q_s8): Define intrinsic.
8684 (__arm_vst1q_s32): Likewise.
8685 (__arm_vst1q_s16): Likewise.
8686 (__arm_vst1q_u8): Likewise.
8687 (__arm_vst1q_u32): Likewise.
8688 (__arm_vst1q_u16): Likewise.
8689 (__arm_vstrhq_scatter_offset_s32): Likewise.
8690 (__arm_vstrhq_scatter_offset_s16): Likewise.
8691 (__arm_vstrhq_scatter_offset_u32): Likewise.
8692 (__arm_vstrhq_scatter_offset_u16): Likewise.
8693 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
8694 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
8695 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
8696 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
8697 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
8698 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
8699 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
8700 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
8701 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
8702 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
8703 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
8704 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
8705 (__arm_vstrhq_s32): Likewise.
8706 (__arm_vstrhq_s16): Likewise.
8707 (__arm_vstrhq_u32): Likewise.
8708 (__arm_vstrhq_u16): Likewise.
8709 (__arm_vstrhq_p_s32): Likewise.
8710 (__arm_vstrhq_p_s16): Likewise.
8711 (__arm_vstrhq_p_u32): Likewise.
8712 (__arm_vstrhq_p_u16): Likewise.
8713 (__arm_vstrwq_s32): Likewise.
8714 (__arm_vstrwq_u32): Likewise.
8715 (__arm_vstrwq_p_s32): Likewise.
8716 (__arm_vstrwq_p_u32): Likewise.
8717 (__arm_vstrwq_p_f32): Likewise.
8718 (__arm_vstrwq_f32): Likewise.
8719 (__arm_vst1q_f32): Likewise.
8720 (__arm_vst1q_f16): Likewise.
8721 (__arm_vstrhq_f16): Likewise.
8722 (__arm_vstrhq_p_f16): Likewise.
8723 (vst1q): Define polymorphic variant.
8725 (vstrhq_p): Likewise.
8726 (vstrhq_scatter_offset_p): Likewise.
8727 (vstrhq_scatter_offset): Likewise.
8728 (vstrhq_scatter_shifted_offset_p): Likewise.
8729 (vstrhq_scatter_shifted_offset): Likewise.
8730 (vstrwq_p): Likewise.
8732 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
8735 (STRSS_P): Likewise.
8737 (STRSU_P): Likewise.
8740 * config/arm/mve.md (VST1Q): Define iterator.
8741 (VSTRHSOQ): Likewise.
8742 (VSTRHSSOQ): Likewise.
8745 (mve_vstrhq_fv8hf): Define RTL pattern.
8746 (mve_vstrhq_p_fv8hf): Likewise.
8747 (mve_vstrhq_p_<supf><mode>): Likewise.
8748 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
8749 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
8750 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
8751 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
8752 (mve_vstrhq_<supf><mode>): Likewise.
8753 (mve_vstrwq_fv4sf): Likewise.
8754 (mve_vstrwq_p_fv4sf): Likewise.
8755 (mve_vstrwq_p_<supf>v4si): Likewise.
8756 (mve_vstrwq_<supf>v4si): Likewise.
8757 (mve_vst1q_f<mode>): Define expand.
8758 (mve_vst1q_<supf><mode>): Likewise.
8760 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8761 Mihail Ionescu <mihail.ionescu@arm.com>
8762 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8764 * config/arm/arm_mve.h (vld1q_s8): Define macro.
8765 (vld1q_s32): Likewise.
8766 (vld1q_s16): Likewise.
8767 (vld1q_u8): Likewise.
8768 (vld1q_u32): Likewise.
8769 (vld1q_u16): Likewise.
8770 (vldrhq_gather_offset_s32): Likewise.
8771 (vldrhq_gather_offset_s16): Likewise.
8772 (vldrhq_gather_offset_u32): Likewise.
8773 (vldrhq_gather_offset_u16): Likewise.
8774 (vldrhq_gather_offset_z_s32): Likewise.
8775 (vldrhq_gather_offset_z_s16): Likewise.
8776 (vldrhq_gather_offset_z_u32): Likewise.
8777 (vldrhq_gather_offset_z_u16): Likewise.
8778 (vldrhq_gather_shifted_offset_s32): Likewise.
8779 (vldrhq_gather_shifted_offset_s16): Likewise.
8780 (vldrhq_gather_shifted_offset_u32): Likewise.
8781 (vldrhq_gather_shifted_offset_u16): Likewise.
8782 (vldrhq_gather_shifted_offset_z_s32): Likewise.
8783 (vldrhq_gather_shifted_offset_z_s16): Likewise.
8784 (vldrhq_gather_shifted_offset_z_u32): Likewise.
8785 (vldrhq_gather_shifted_offset_z_u16): Likewise.
8786 (vldrhq_s32): Likewise.
8787 (vldrhq_s16): Likewise.
8788 (vldrhq_u32): Likewise.
8789 (vldrhq_u16): Likewise.
8790 (vldrhq_z_s32): Likewise.
8791 (vldrhq_z_s16): Likewise.
8792 (vldrhq_z_u32): Likewise.
8793 (vldrhq_z_u16): Likewise.
8794 (vldrwq_s32): Likewise.
8795 (vldrwq_u32): Likewise.
8796 (vldrwq_z_s32): Likewise.
8797 (vldrwq_z_u32): Likewise.
8798 (vld1q_f32): Likewise.
8799 (vld1q_f16): Likewise.
8800 (vldrhq_f16): Likewise.
8801 (vldrhq_z_f16): Likewise.
8802 (vldrwq_f32): Likewise.
8803 (vldrwq_z_f32): Likewise.
8804 (__arm_vld1q_s8): Define intrinsic.
8805 (__arm_vld1q_s32): Likewise.
8806 (__arm_vld1q_s16): Likewise.
8807 (__arm_vld1q_u8): Likewise.
8808 (__arm_vld1q_u32): Likewise.
8809 (__arm_vld1q_u16): Likewise.
8810 (__arm_vldrhq_gather_offset_s32): Likewise.
8811 (__arm_vldrhq_gather_offset_s16): Likewise.
8812 (__arm_vldrhq_gather_offset_u32): Likewise.
8813 (__arm_vldrhq_gather_offset_u16): Likewise.
8814 (__arm_vldrhq_gather_offset_z_s32): Likewise.
8815 (__arm_vldrhq_gather_offset_z_s16): Likewise.
8816 (__arm_vldrhq_gather_offset_z_u32): Likewise.
8817 (__arm_vldrhq_gather_offset_z_u16): Likewise.
8818 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
8819 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
8820 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
8821 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
8822 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
8823 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
8824 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
8825 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
8826 (__arm_vldrhq_s32): Likewise.
8827 (__arm_vldrhq_s16): Likewise.
8828 (__arm_vldrhq_u32): Likewise.
8829 (__arm_vldrhq_u16): Likewise.
8830 (__arm_vldrhq_z_s32): Likewise.
8831 (__arm_vldrhq_z_s16): Likewise.
8832 (__arm_vldrhq_z_u32): Likewise.
8833 (__arm_vldrhq_z_u16): Likewise.
8834 (__arm_vldrwq_s32): Likewise.
8835 (__arm_vldrwq_u32): Likewise.
8836 (__arm_vldrwq_z_s32): Likewise.
8837 (__arm_vldrwq_z_u32): Likewise.
8838 (__arm_vld1q_f32): Likewise.
8839 (__arm_vld1q_f16): Likewise.
8840 (__arm_vldrwq_f32): Likewise.
8841 (__arm_vldrwq_z_f32): Likewise.
8842 (__arm_vldrhq_z_f16): Likewise.
8843 (__arm_vldrhq_f16): Likewise.
8844 (vld1q): Define polymorphic variant.
8845 (vldrhq_gather_offset): Likewise.
8846 (vldrhq_gather_offset_z): Likewise.
8847 (vldrhq_gather_shifted_offset): Likewise.
8848 (vldrhq_gather_shifted_offset_z): Likewise.
8849 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
8853 (LDRGU_Z): Likewise.
8855 (LDRGS_Z): Likewise.
8857 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
8858 (V_sz_elem1): Likewise.
8859 (VLD1Q): Define iterator.
8860 (VLDRHGOQ): Likewise.
8861 (VLDRHGSOQ): Likewise.
8864 (mve_vldrhq_fv8hf): Define RTL pattern.
8865 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
8866 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
8867 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
8868 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
8869 (mve_vldrhq_<supf><mode>): Likewise.
8870 (mve_vldrhq_z_fv8hf): Likewise.
8871 (mve_vldrhq_z_<supf><mode>): Likewise.
8872 (mve_vldrwq_fv4sf): Likewise.
8873 (mve_vldrwq_<supf>v4si): Likewise.
8874 (mve_vldrwq_z_fv4sf): Likewise.
8875 (mve_vldrwq_z_<supf>v4si): Likewise.
8876 (mve_vld1q_f<mode>): Define RTL expand pattern.
8877 (mve_vld1q_<supf><mode>): Likewise.
8879 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8880 Mihail Ionescu <mihail.ionescu@arm.com>
8881 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8883 * config/arm/arm_mve.h (vld1q_s8): Define macro.
8884 (vld1q_s32): Likewise.
8885 (vld1q_s16): Likewise.
8886 (vld1q_u8): Likewise.
8887 (vld1q_u32): Likewise.
8888 (vld1q_u16): Likewise.
8889 (vldrhq_gather_offset_s32): Likewise.
8890 (vldrhq_gather_offset_s16): Likewise.
8891 (vldrhq_gather_offset_u32): Likewise.
8892 (vldrhq_gather_offset_u16): Likewise.
8893 (vldrhq_gather_offset_z_s32): Likewise.
8894 (vldrhq_gather_offset_z_s16): Likewise.
8895 (vldrhq_gather_offset_z_u32): Likewise.
8896 (vldrhq_gather_offset_z_u16): Likewise.
8897 (vldrhq_gather_shifted_offset_s32): Likewise.
8898 (vldrhq_gather_shifted_offset_s16): Likewise.
8899 (vldrhq_gather_shifted_offset_u32): Likewise.
8900 (vldrhq_gather_shifted_offset_u16): Likewise.
8901 (vldrhq_gather_shifted_offset_z_s32): Likewise.
8902 (vldrhq_gather_shifted_offset_z_s16): Likewise.
8903 (vldrhq_gather_shifted_offset_z_u32): Likewise.
8904 (vldrhq_gather_shifted_offset_z_u16): Likewise.
8905 (vldrhq_s32): Likewise.
8906 (vldrhq_s16): Likewise.
8907 (vldrhq_u32): Likewise.
8908 (vldrhq_u16): Likewise.
8909 (vldrhq_z_s32): Likewise.
8910 (vldrhq_z_s16): Likewise.
8911 (vldrhq_z_u32): Likewise.
8912 (vldrhq_z_u16): Likewise.
8913 (vldrwq_s32): Likewise.
8914 (vldrwq_u32): Likewise.
8915 (vldrwq_z_s32): Likewise.
8916 (vldrwq_z_u32): Likewise.
8917 (vld1q_f32): Likewise.
8918 (vld1q_f16): Likewise.
8919 (vldrhq_f16): Likewise.
8920 (vldrhq_z_f16): Likewise.
8921 (vldrwq_f32): Likewise.
8922 (vldrwq_z_f32): Likewise.
8923 (__arm_vld1q_s8): Define intrinsic.
8924 (__arm_vld1q_s32): Likewise.
8925 (__arm_vld1q_s16): Likewise.
8926 (__arm_vld1q_u8): Likewise.
8927 (__arm_vld1q_u32): Likewise.
8928 (__arm_vld1q_u16): Likewise.
8929 (__arm_vldrhq_gather_offset_s32): Likewise.
8930 (__arm_vldrhq_gather_offset_s16): Likewise.
8931 (__arm_vldrhq_gather_offset_u32): Likewise.
8932 (__arm_vldrhq_gather_offset_u16): Likewise.
8933 (__arm_vldrhq_gather_offset_z_s32): Likewise.
8934 (__arm_vldrhq_gather_offset_z_s16): Likewise.
8935 (__arm_vldrhq_gather_offset_z_u32): Likewise.
8936 (__arm_vldrhq_gather_offset_z_u16): Likewise.
8937 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
8938 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
8939 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
8940 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
8941 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
8942 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
8943 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
8944 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
8945 (__arm_vldrhq_s32): Likewise.
8946 (__arm_vldrhq_s16): Likewise.
8947 (__arm_vldrhq_u32): Likewise.
8948 (__arm_vldrhq_u16): Likewise.
8949 (__arm_vldrhq_z_s32): Likewise.
8950 (__arm_vldrhq_z_s16): Likewise.
8951 (__arm_vldrhq_z_u32): Likewise.
8952 (__arm_vldrhq_z_u16): Likewise.
8953 (__arm_vldrwq_s32): Likewise.
8954 (__arm_vldrwq_u32): Likewise.
8955 (__arm_vldrwq_z_s32): Likewise.
8956 (__arm_vldrwq_z_u32): Likewise.
8957 (__arm_vld1q_f32): Likewise.
8958 (__arm_vld1q_f16): Likewise.
8959 (__arm_vldrwq_f32): Likewise.
8960 (__arm_vldrwq_z_f32): Likewise.
8961 (__arm_vldrhq_z_f16): Likewise.
8962 (__arm_vldrhq_f16): Likewise.
8963 (vld1q): Define polymorphic variant.
8964 (vldrhq_gather_offset): Likewise.
8965 (vldrhq_gather_offset_z): Likewise.
8966 (vldrhq_gather_shifted_offset): Likewise.
8967 (vldrhq_gather_shifted_offset_z): Likewise.
8968 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
8972 (LDRGU_Z): Likewise.
8974 (LDRGS_Z): Likewise.
8976 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
8977 (V_sz_elem1): Likewise.
8978 (VLD1Q): Define iterator.
8979 (VLDRHGOQ): Likewise.
8980 (VLDRHGSOQ): Likewise.
8983 (mve_vldrhq_fv8hf): Define RTL pattern.
8984 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
8985 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
8986 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
8987 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
8988 (mve_vldrhq_<supf><mode>): Likewise.
8989 (mve_vldrhq_z_fv8hf): Likewise.
8990 (mve_vldrhq_z_<supf><mode>): Likewise.
8991 (mve_vldrwq_fv4sf): Likewise.
8992 (mve_vldrwq_<supf>v4si): Likewise.
8993 (mve_vldrwq_z_fv4sf): Likewise.
8994 (mve_vldrwq_z_<supf>v4si): Likewise.
8995 (mve_vld1q_f<mode>): Define RTL expand pattern.
8996 (mve_vld1q_<supf><mode>): Likewise.
8998 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8999 Mihail Ionescu <mihail.ionescu@arm.com>
9000 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9002 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
9004 (LDRGBU_Z_QUALIFIERS): Likewise.
9005 (LDRGS_Z_QUALIFIERS): Likewise.
9006 (LDRGU_Z_QUALIFIERS): Likewise.
9007 (LDRS_Z_QUALIFIERS): Likewise.
9008 (LDRU_Z_QUALIFIERS): Likewise.
9009 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
9010 (vldrbq_gather_offset_z_u8): Likewise.
9011 (vldrbq_gather_offset_z_s32): Likewise.
9012 (vldrbq_gather_offset_z_u16): Likewise.
9013 (vldrbq_gather_offset_z_u32): Likewise.
9014 (vldrbq_gather_offset_z_s8): Likewise.
9015 (vldrbq_z_s16): Likewise.
9016 (vldrbq_z_u8): Likewise.
9017 (vldrbq_z_s8): Likewise.
9018 (vldrbq_z_s32): Likewise.
9019 (vldrbq_z_u16): Likewise.
9020 (vldrbq_z_u32): Likewise.
9021 (vldrwq_gather_base_z_u32): Likewise.
9022 (vldrwq_gather_base_z_s32): Likewise.
9023 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
9024 (__arm_vldrbq_gather_offset_z_s32): Likewise.
9025 (__arm_vldrbq_gather_offset_z_s16): Likewise.
9026 (__arm_vldrbq_gather_offset_z_u8): Likewise.
9027 (__arm_vldrbq_gather_offset_z_u32): Likewise.
9028 (__arm_vldrbq_gather_offset_z_u16): Likewise.
9029 (__arm_vldrbq_z_s8): Likewise.
9030 (__arm_vldrbq_z_s32): Likewise.
9031 (__arm_vldrbq_z_s16): Likewise.
9032 (__arm_vldrbq_z_u8): Likewise.
9033 (__arm_vldrbq_z_u32): Likewise.
9034 (__arm_vldrbq_z_u16): Likewise.
9035 (__arm_vldrwq_gather_base_z_s32): Likewise.
9036 (__arm_vldrwq_gather_base_z_u32): Likewise.
9037 (vldrbq_gather_offset_z): Define polymorphic variant.
9038 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
9040 (LDRGBU_Z_QUALIFIERS): Likewise.
9041 (LDRGS_Z_QUALIFIERS): Likewise.
9042 (LDRGU_Z_QUALIFIERS): Likewise.
9043 (LDRS_Z_QUALIFIERS): Likewise.
9044 (LDRU_Z_QUALIFIERS): Likewise.
9045 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
9047 (mve_vldrbq_z_<supf><mode>): Likewise.
9048 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
9050 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9051 Mihail Ionescu <mihail.ionescu@arm.com>
9052 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9054 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
9056 (STRU_P_QUALIFIERS): Likewise.
9057 (STRSU_P_QUALIFIERS): Likewise.
9058 (STRSS_P_QUALIFIERS): Likewise.
9059 (STRSBS_P_QUALIFIERS): Likewise.
9060 (STRSBU_P_QUALIFIERS): Likewise.
9061 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
9062 (vstrbq_p_s32): Likewise.
9063 (vstrbq_p_s16): Likewise.
9064 (vstrbq_p_u8): Likewise.
9065 (vstrbq_p_u32): Likewise.
9066 (vstrbq_p_u16): Likewise.
9067 (vstrbq_scatter_offset_p_s8): Likewise.
9068 (vstrbq_scatter_offset_p_s32): Likewise.
9069 (vstrbq_scatter_offset_p_s16): Likewise.
9070 (vstrbq_scatter_offset_p_u8): Likewise.
9071 (vstrbq_scatter_offset_p_u32): Likewise.
9072 (vstrbq_scatter_offset_p_u16): Likewise.
9073 (vstrwq_scatter_base_p_s32): Likewise.
9074 (vstrwq_scatter_base_p_u32): Likewise.
9075 (__arm_vstrbq_p_s8): Define intrinsic.
9076 (__arm_vstrbq_p_s32): Likewise.
9077 (__arm_vstrbq_p_s16): Likewise.
9078 (__arm_vstrbq_p_u8): Likewise.
9079 (__arm_vstrbq_p_u32): Likewise.
9080 (__arm_vstrbq_p_u16): Likewise.
9081 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
9082 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
9083 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
9084 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
9085 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
9086 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
9087 (__arm_vstrwq_scatter_base_p_s32): Likewise.
9088 (__arm_vstrwq_scatter_base_p_u32): Likewise.
9089 (vstrbq_p): Define polymorphic variant.
9090 (vstrbq_scatter_offset_p): Likewise.
9091 (vstrwq_scatter_base_p): Likewise.
9092 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
9094 (STRU_P_QUALIFIERS): Likewise.
9095 (STRSU_P_QUALIFIERS): Likewise.
9096 (STRSS_P_QUALIFIERS): Likewise.
9097 (STRSBS_P_QUALIFIERS): Likewise.
9098 (STRSBU_P_QUALIFIERS): Likewise.
9099 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
9101 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
9102 (mve_vstrbq_p_<supf><mode>): Likewise.
9104 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9105 Mihail Ionescu <mihail.ionescu@arm.com>
9106 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9108 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
9110 (LDRGS_QUALIFIERS): Likewise.
9111 (LDRS_QUALIFIERS): Likewise.
9112 (LDRU_QUALIFIERS): Likewise.
9113 (LDRGBS_QUALIFIERS): Likewise.
9114 (LDRGBU_QUALIFIERS): Likewise.
9115 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
9116 (vldrbq_gather_offset_s8): Likewise.
9117 (vldrbq_s8): Likewise.
9118 (vldrbq_u8): Likewise.
9119 (vldrbq_gather_offset_u16): Likewise.
9120 (vldrbq_gather_offset_s16): Likewise.
9121 (vldrbq_s16): Likewise.
9122 (vldrbq_u16): Likewise.
9123 (vldrbq_gather_offset_u32): Likewise.
9124 (vldrbq_gather_offset_s32): Likewise.
9125 (vldrbq_s32): Likewise.
9126 (vldrbq_u32): Likewise.
9127 (vldrwq_gather_base_s32): Likewise.
9128 (vldrwq_gather_base_u32): Likewise.
9129 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
9130 (__arm_vldrbq_gather_offset_s8): Likewise.
9131 (__arm_vldrbq_s8): Likewise.
9132 (__arm_vldrbq_u8): Likewise.
9133 (__arm_vldrbq_gather_offset_u16): Likewise.
9134 (__arm_vldrbq_gather_offset_s16): Likewise.
9135 (__arm_vldrbq_s16): Likewise.
9136 (__arm_vldrbq_u16): Likewise.
9137 (__arm_vldrbq_gather_offset_u32): Likewise.
9138 (__arm_vldrbq_gather_offset_s32): Likewise.
9139 (__arm_vldrbq_s32): Likewise.
9140 (__arm_vldrbq_u32): Likewise.
9141 (__arm_vldrwq_gather_base_s32): Likewise.
9142 (__arm_vldrwq_gather_base_u32): Likewise.
9143 (vldrbq_gather_offset): Define polymorphic variant.
9144 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
9146 (LDRGS_QUALIFIERS): Likewise.
9147 (LDRS_QUALIFIERS): Likewise.
9148 (LDRU_QUALIFIERS): Likewise.
9149 (LDRGBS_QUALIFIERS): Likewise.
9150 (LDRGBU_QUALIFIERS): Likewise.
9151 * config/arm/mve.md (VLDRBGOQ): Define iterator.
9153 (VLDRWGBQ): Likewise.
9154 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
9155 (mve_vldrbq_<supf><mode>): Likewise.
9156 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
9158 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9159 Mihail Ionescu <mihail.ionescu@arm.com>
9160 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9162 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
9163 (STRU_QUALIFIERS): Likewise.
9164 (STRSS_QUALIFIERS): Likewise.
9165 (STRSU_QUALIFIERS): Likewise.
9166 (STRSBS_QUALIFIERS): Likewise.
9167 (STRSBU_QUALIFIERS): Likewise.
9168 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
9169 (vstrbq_u8): Likewise.
9170 (vstrbq_u16): Likewise.
9171 (vstrbq_scatter_offset_s8): Likewise.
9172 (vstrbq_scatter_offset_u8): Likewise.
9173 (vstrbq_scatter_offset_u16): Likewise.
9174 (vstrbq_s16): Likewise.
9175 (vstrbq_u32): Likewise.
9176 (vstrbq_scatter_offset_s16): Likewise.
9177 (vstrbq_scatter_offset_u32): Likewise.
9178 (vstrbq_s32): Likewise.
9179 (vstrbq_scatter_offset_s32): Likewise.
9180 (vstrwq_scatter_base_s32): Likewise.
9181 (vstrwq_scatter_base_u32): Likewise.
9182 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
9183 (__arm_vstrbq_scatter_offset_s32): Likewise.
9184 (__arm_vstrbq_scatter_offset_s16): Likewise.
9185 (__arm_vstrbq_scatter_offset_u8): Likewise.
9186 (__arm_vstrbq_scatter_offset_u32): Likewise.
9187 (__arm_vstrbq_scatter_offset_u16): Likewise.
9188 (__arm_vstrbq_s8): Likewise.
9189 (__arm_vstrbq_s32): Likewise.
9190 (__arm_vstrbq_s16): Likewise.
9191 (__arm_vstrbq_u8): Likewise.
9192 (__arm_vstrbq_u32): Likewise.
9193 (__arm_vstrbq_u16): Likewise.
9194 (__arm_vstrwq_scatter_base_s32): Likewise.
9195 (__arm_vstrwq_scatter_base_u32): Likewise.
9196 (vstrbq): Define polymorphic variant.
9197 (vstrbq_scatter_offset): Likewise.
9198 (vstrwq_scatter_base): Likewise.
9199 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
9201 (STRU_QUALIFIERS): Likewise.
9202 (STRSS_QUALIFIERS): Likewise.
9203 (STRSU_QUALIFIERS): Likewise.
9204 (STRSBS_QUALIFIERS): Likewise.
9205 (STRSBU_QUALIFIERS): Likewise.
9206 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
9207 (VSTRWSBQ): Define iterators.
9208 (VSTRBSOQ): Likewise.
9210 (mve_vstrbq_<supf><mode>): Define RTL pattern.
9211 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
9212 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
9214 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9215 Mihail Ionescu <mihail.ionescu@arm.com>
9216 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9218 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
9219 (vabdq_m_f16): Likewise.
9220 (vaddq_m_f32): Likewise.
9221 (vaddq_m_f16): Likewise.
9222 (vaddq_m_n_f32): Likewise.
9223 (vaddq_m_n_f16): Likewise.
9224 (vandq_m_f32): Likewise.
9225 (vandq_m_f16): Likewise.
9226 (vbicq_m_f32): Likewise.
9227 (vbicq_m_f16): Likewise.
9228 (vbrsrq_m_n_f32): Likewise.
9229 (vbrsrq_m_n_f16): Likewise.
9230 (vcaddq_rot270_m_f32): Likewise.
9231 (vcaddq_rot270_m_f16): Likewise.
9232 (vcaddq_rot90_m_f32): Likewise.
9233 (vcaddq_rot90_m_f16): Likewise.
9234 (vcmlaq_m_f32): Likewise.
9235 (vcmlaq_m_f16): Likewise.
9236 (vcmlaq_rot180_m_f32): Likewise.
9237 (vcmlaq_rot180_m_f16): Likewise.
9238 (vcmlaq_rot270_m_f32): Likewise.
9239 (vcmlaq_rot270_m_f16): Likewise.
9240 (vcmlaq_rot90_m_f32): Likewise.
9241 (vcmlaq_rot90_m_f16): Likewise.
9242 (vcmulq_m_f32): Likewise.
9243 (vcmulq_m_f16): Likewise.
9244 (vcmulq_rot180_m_f32): Likewise.
9245 (vcmulq_rot180_m_f16): Likewise.
9246 (vcmulq_rot270_m_f32): Likewise.
9247 (vcmulq_rot270_m_f16): Likewise.
9248 (vcmulq_rot90_m_f32): Likewise.
9249 (vcmulq_rot90_m_f16): Likewise.
9250 (vcvtq_m_n_s32_f32): Likewise.
9251 (vcvtq_m_n_s16_f16): Likewise.
9252 (vcvtq_m_n_u32_f32): Likewise.
9253 (vcvtq_m_n_u16_f16): Likewise.
9254 (veorq_m_f32): Likewise.
9255 (veorq_m_f16): Likewise.
9256 (vfmaq_m_f32): Likewise.
9257 (vfmaq_m_f16): Likewise.
9258 (vfmaq_m_n_f32): Likewise.
9259 (vfmaq_m_n_f16): Likewise.
9260 (vfmasq_m_n_f32): Likewise.
9261 (vfmasq_m_n_f16): Likewise.
9262 (vfmsq_m_f32): Likewise.
9263 (vfmsq_m_f16): Likewise.
9264 (vmaxnmq_m_f32): Likewise.
9265 (vmaxnmq_m_f16): Likewise.
9266 (vminnmq_m_f32): Likewise.
9267 (vminnmq_m_f16): Likewise.
9268 (vmulq_m_f32): Likewise.
9269 (vmulq_m_f16): Likewise.
9270 (vmulq_m_n_f32): Likewise.
9271 (vmulq_m_n_f16): Likewise.
9272 (vornq_m_f32): Likewise.
9273 (vornq_m_f16): Likewise.
9274 (vorrq_m_f32): Likewise.
9275 (vorrq_m_f16): Likewise.
9276 (vsubq_m_f32): Likewise.
9277 (vsubq_m_f16): Likewise.
9278 (vsubq_m_n_f32): Likewise.
9279 (vsubq_m_n_f16): Likewise.
9280 (__attribute__): Likewise.
9281 (__arm_vabdq_m_f32): Likewise.
9282 (__arm_vabdq_m_f16): Likewise.
9283 (__arm_vaddq_m_f32): Likewise.
9284 (__arm_vaddq_m_f16): Likewise.
9285 (__arm_vaddq_m_n_f32): Likewise.
9286 (__arm_vaddq_m_n_f16): Likewise.
9287 (__arm_vandq_m_f32): Likewise.
9288 (__arm_vandq_m_f16): Likewise.
9289 (__arm_vbicq_m_f32): Likewise.
9290 (__arm_vbicq_m_f16): Likewise.
9291 (__arm_vbrsrq_m_n_f32): Likewise.
9292 (__arm_vbrsrq_m_n_f16): Likewise.
9293 (__arm_vcaddq_rot270_m_f32): Likewise.
9294 (__arm_vcaddq_rot270_m_f16): Likewise.
9295 (__arm_vcaddq_rot90_m_f32): Likewise.
9296 (__arm_vcaddq_rot90_m_f16): Likewise.
9297 (__arm_vcmlaq_m_f32): Likewise.
9298 (__arm_vcmlaq_m_f16): Likewise.
9299 (__arm_vcmlaq_rot180_m_f32): Likewise.
9300 (__arm_vcmlaq_rot180_m_f16): Likewise.
9301 (__arm_vcmlaq_rot270_m_f32): Likewise.
9302 (__arm_vcmlaq_rot270_m_f16): Likewise.
9303 (__arm_vcmlaq_rot90_m_f32): Likewise.
9304 (__arm_vcmlaq_rot90_m_f16): Likewise.
9305 (__arm_vcmulq_m_f32): Likewise.
9306 (__arm_vcmulq_m_f16): Likewise.
9307 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
9308 (__arm_vcmulq_rot180_m_f16): Likewise.
9309 (__arm_vcmulq_rot270_m_f32): Likewise.
9310 (__arm_vcmulq_rot270_m_f16): Likewise.
9311 (__arm_vcmulq_rot90_m_f32): Likewise.
9312 (__arm_vcmulq_rot90_m_f16): Likewise.
9313 (__arm_vcvtq_m_n_s32_f32): Likewise.
9314 (__arm_vcvtq_m_n_s16_f16): Likewise.
9315 (__arm_vcvtq_m_n_u32_f32): Likewise.
9316 (__arm_vcvtq_m_n_u16_f16): Likewise.
9317 (__arm_veorq_m_f32): Likewise.
9318 (__arm_veorq_m_f16): Likewise.
9319 (__arm_vfmaq_m_f32): Likewise.
9320 (__arm_vfmaq_m_f16): Likewise.
9321 (__arm_vfmaq_m_n_f32): Likewise.
9322 (__arm_vfmaq_m_n_f16): Likewise.
9323 (__arm_vfmasq_m_n_f32): Likewise.
9324 (__arm_vfmasq_m_n_f16): Likewise.
9325 (__arm_vfmsq_m_f32): Likewise.
9326 (__arm_vfmsq_m_f16): Likewise.
9327 (__arm_vmaxnmq_m_f32): Likewise.
9328 (__arm_vmaxnmq_m_f16): Likewise.
9329 (__arm_vminnmq_m_f32): Likewise.
9330 (__arm_vminnmq_m_f16): Likewise.
9331 (__arm_vmulq_m_f32): Likewise.
9332 (__arm_vmulq_m_f16): Likewise.
9333 (__arm_vmulq_m_n_f32): Likewise.
9334 (__arm_vmulq_m_n_f16): Likewise.
9335 (__arm_vornq_m_f32): Likewise.
9336 (__arm_vornq_m_f16): Likewise.
9337 (__arm_vorrq_m_f32): Likewise.
9338 (__arm_vorrq_m_f16): Likewise.
9339 (__arm_vsubq_m_f32): Likewise.
9340 (__arm_vsubq_m_f16): Likewise.
9341 (__arm_vsubq_m_n_f32): Likewise.
9342 (__arm_vsubq_m_n_f16): Likewise.
9343 (vabdq_m): Define polymorphic variant.
9344 (vaddq_m): Likewise.
9345 (vaddq_m_n): Likewise.
9346 (vandq_m): Likewise.
9347 (vbicq_m): Likewise.
9348 (vbrsrq_m_n): Likewise.
9349 (vcaddq_rot270_m): Likewise.
9350 (vcaddq_rot90_m): Likewise.
9351 (vcmlaq_m): Likewise.
9352 (vcmlaq_rot180_m): Likewise.
9353 (vcmlaq_rot270_m): Likewise.
9354 (vcmlaq_rot90_m): Likewise.
9355 (vcmulq_m): Likewise.
9356 (vcmulq_rot180_m): Likewise.
9357 (vcmulq_rot270_m): Likewise.
9358 (vcmulq_rot90_m): Likewise.
9359 (veorq_m): Likewise.
9360 (vfmaq_m): Likewise.
9361 (vfmaq_m_n): Likewise.
9362 (vfmasq_m_n): Likewise.
9363 (vfmsq_m): Likewise.
9364 (vmaxnmq_m): Likewise.
9365 (vminnmq_m): Likewise.
9366 (vmulq_m): Likewise.
9367 (vmulq_m_n): Likewise.
9368 (vornq_m): Likewise.
9369 (vsubq_m): Likewise.
9370 (vsubq_m_n): Likewise.
9371 (vorrq_m): Likewise.
9372 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
9374 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
9375 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
9376 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
9377 (mve_vaddq_m_f<mode>): Likewise.
9378 (mve_vaddq_m_n_f<mode>): Likewise.
9379 (mve_vandq_m_f<mode>): Likewise.
9380 (mve_vbicq_m_f<mode>): Likewise.
9381 (mve_vbrsrq_m_n_f<mode>): Likewise.
9382 (mve_vcaddq_rot270_m_f<mode>): Likewise.
9383 (mve_vcaddq_rot90_m_f<mode>): Likewise.
9384 (mve_vcmlaq_m_f<mode>): Likewise.
9385 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
9386 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
9387 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
9388 (mve_vcmulq_m_f<mode>): Likewise.
9389 (mve_vcmulq_rot180_m_f<mode>): Likewise.
9390 (mve_vcmulq_rot270_m_f<mode>): Likewise.
9391 (mve_vcmulq_rot90_m_f<mode>): Likewise.
9392 (mve_veorq_m_f<mode>): Likewise.
9393 (mve_vfmaq_m_f<mode>): Likewise.
9394 (mve_vfmaq_m_n_f<mode>): Likewise.
9395 (mve_vfmasq_m_n_f<mode>): Likewise.
9396 (mve_vfmsq_m_f<mode>): Likewise.
9397 (mve_vmaxnmq_m_f<mode>): Likewise.
9398 (mve_vminnmq_m_f<mode>): Likewise.
9399 (mve_vmulq_m_f<mode>): Likewise.
9400 (mve_vmulq_m_n_f<mode>): Likewise.
9401 (mve_vornq_m_f<mode>): Likewise.
9402 (mve_vorrq_m_f<mode>): Likewise.
9403 (mve_vsubq_m_f<mode>): Likewise.
9404 (mve_vsubq_m_n_f<mode>): Likewise.
9406 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9407 Mihail Ionescu <mihail.ionescu@arm.com>
9408 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9410 * config/arm/arm-protos.h (arm_mve_immediate_check):
9411 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
9412 mode and interger value.
9413 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
9414 (vmlaldavaq_p_s16): Likewise.
9415 (vmlaldavaq_p_u32): Likewise.
9416 (vmlaldavaq_p_u16): Likewise.
9417 (vmlaldavaxq_p_s32): Likewise.
9418 (vmlaldavaxq_p_s16): Likewise.
9419 (vmlaldavaxq_p_u32): Likewise.
9420 (vmlaldavaxq_p_u16): Likewise.
9421 (vmlsldavaq_p_s32): Likewise.
9422 (vmlsldavaq_p_s16): Likewise.
9423 (vmlsldavaxq_p_s32): Likewise.
9424 (vmlsldavaxq_p_s16): Likewise.
9425 (vmullbq_poly_m_p8): Likewise.
9426 (vmullbq_poly_m_p16): Likewise.
9427 (vmulltq_poly_m_p8): Likewise.
9428 (vmulltq_poly_m_p16): Likewise.
9429 (vqdmullbq_m_n_s32): Likewise.
9430 (vqdmullbq_m_n_s16): Likewise.
9431 (vqdmullbq_m_s32): Likewise.
9432 (vqdmullbq_m_s16): Likewise.
9433 (vqdmulltq_m_n_s32): Likewise.
9434 (vqdmulltq_m_n_s16): Likewise.
9435 (vqdmulltq_m_s32): Likewise.
9436 (vqdmulltq_m_s16): Likewise.
9437 (vqrshrnbq_m_n_s32): Likewise.
9438 (vqrshrnbq_m_n_s16): Likewise.
9439 (vqrshrnbq_m_n_u32): Likewise.
9440 (vqrshrnbq_m_n_u16): Likewise.
9441 (vqrshrntq_m_n_s32): Likewise.
9442 (vqrshrntq_m_n_s16): Likewise.
9443 (vqrshrntq_m_n_u32): Likewise.
9444 (vqrshrntq_m_n_u16): Likewise.
9445 (vqrshrunbq_m_n_s32): Likewise.
9446 (vqrshrunbq_m_n_s16): Likewise.
9447 (vqrshruntq_m_n_s32): Likewise.
9448 (vqrshruntq_m_n_s16): Likewise.
9449 (vqshrnbq_m_n_s32): Likewise.
9450 (vqshrnbq_m_n_s16): Likewise.
9451 (vqshrnbq_m_n_u32): Likewise.
9452 (vqshrnbq_m_n_u16): Likewise.
9453 (vqshrntq_m_n_s32): Likewise.
9454 (vqshrntq_m_n_s16): Likewise.
9455 (vqshrntq_m_n_u32): Likewise.
9456 (vqshrntq_m_n_u16): Likewise.
9457 (vqshrunbq_m_n_s32): Likewise.
9458 (vqshrunbq_m_n_s16): Likewise.
9459 (vqshruntq_m_n_s32): Likewise.
9460 (vqshruntq_m_n_s16): Likewise.
9461 (vrmlaldavhaq_p_s32): Likewise.
9462 (vrmlaldavhaq_p_u32): Likewise.
9463 (vrmlaldavhaxq_p_s32): Likewise.
9464 (vrmlsldavhaq_p_s32): Likewise.
9465 (vrmlsldavhaxq_p_s32): Likewise.
9466 (vrshrnbq_m_n_s32): Likewise.
9467 (vrshrnbq_m_n_s16): Likewise.
9468 (vrshrnbq_m_n_u32): Likewise.
9469 (vrshrnbq_m_n_u16): Likewise.
9470 (vrshrntq_m_n_s32): Likewise.
9471 (vrshrntq_m_n_s16): Likewise.
9472 (vrshrntq_m_n_u32): Likewise.
9473 (vrshrntq_m_n_u16): Likewise.
9474 (vshllbq_m_n_s8): Likewise.
9475 (vshllbq_m_n_s16): Likewise.
9476 (vshllbq_m_n_u8): Likewise.
9477 (vshllbq_m_n_u16): Likewise.
9478 (vshlltq_m_n_s8): Likewise.
9479 (vshlltq_m_n_s16): Likewise.
9480 (vshlltq_m_n_u8): Likewise.
9481 (vshlltq_m_n_u16): Likewise.
9482 (vshrnbq_m_n_s32): Likewise.
9483 (vshrnbq_m_n_s16): Likewise.
9484 (vshrnbq_m_n_u32): Likewise.
9485 (vshrnbq_m_n_u16): Likewise.
9486 (vshrntq_m_n_s32): Likewise.
9487 (vshrntq_m_n_s16): Likewise.
9488 (vshrntq_m_n_u32): Likewise.
9489 (vshrntq_m_n_u16): Likewise.
9490 (__arm_vmlaldavaq_p_s32): Define intrinsic.
9491 (__arm_vmlaldavaq_p_s16): Likewise.
9492 (__arm_vmlaldavaq_p_u32): Likewise.
9493 (__arm_vmlaldavaq_p_u16): Likewise.
9494 (__arm_vmlaldavaxq_p_s32): Likewise.
9495 (__arm_vmlaldavaxq_p_s16): Likewise.
9496 (__arm_vmlaldavaxq_p_u32): Likewise.
9497 (__arm_vmlaldavaxq_p_u16): Likewise.
9498 (__arm_vmlsldavaq_p_s32): Likewise.
9499 (__arm_vmlsldavaq_p_s16): Likewise.
9500 (__arm_vmlsldavaxq_p_s32): Likewise.
9501 (__arm_vmlsldavaxq_p_s16): Likewise.
9502 (__arm_vmullbq_poly_m_p8): Likewise.
9503 (__arm_vmullbq_poly_m_p16): Likewise.
9504 (__arm_vmulltq_poly_m_p8): Likewise.
9505 (__arm_vmulltq_poly_m_p16): Likewise.
9506 (__arm_vqdmullbq_m_n_s32): Likewise.
9507 (__arm_vqdmullbq_m_n_s16): Likewise.
9508 (__arm_vqdmullbq_m_s32): Likewise.
9509 (__arm_vqdmullbq_m_s16): Likewise.
9510 (__arm_vqdmulltq_m_n_s32): Likewise.
9511 (__arm_vqdmulltq_m_n_s16): Likewise.
9512 (__arm_vqdmulltq_m_s32): Likewise.
9513 (__arm_vqdmulltq_m_s16): Likewise.
9514 (__arm_vqrshrnbq_m_n_s32): Likewise.
9515 (__arm_vqrshrnbq_m_n_s16): Likewise.
9516 (__arm_vqrshrnbq_m_n_u32): Likewise.
9517 (__arm_vqrshrnbq_m_n_u16): Likewise.
9518 (__arm_vqrshrntq_m_n_s32): Likewise.
9519 (__arm_vqrshrntq_m_n_s16): Likewise.
9520 (__arm_vqrshrntq_m_n_u32): Likewise.
9521 (__arm_vqrshrntq_m_n_u16): Likewise.
9522 (__arm_vqrshrunbq_m_n_s32): Likewise.
9523 (__arm_vqrshrunbq_m_n_s16): Likewise.
9524 (__arm_vqrshruntq_m_n_s32): Likewise.
9525 (__arm_vqrshruntq_m_n_s16): Likewise.
9526 (__arm_vqshrnbq_m_n_s32): Likewise.
9527 (__arm_vqshrnbq_m_n_s16): Likewise.
9528 (__arm_vqshrnbq_m_n_u32): Likewise.
9529 (__arm_vqshrnbq_m_n_u16): Likewise.
9530 (__arm_vqshrntq_m_n_s32): Likewise.
9531 (__arm_vqshrntq_m_n_s16): Likewise.
9532 (__arm_vqshrntq_m_n_u32): Likewise.
9533 (__arm_vqshrntq_m_n_u16): Likewise.
9534 (__arm_vqshrunbq_m_n_s32): Likewise.
9535 (__arm_vqshrunbq_m_n_s16): Likewise.
9536 (__arm_vqshruntq_m_n_s32): Likewise.
9537 (__arm_vqshruntq_m_n_s16): Likewise.
9538 (__arm_vrmlaldavhaq_p_s32): Likewise.
9539 (__arm_vrmlaldavhaq_p_u32): Likewise.
9540 (__arm_vrmlaldavhaxq_p_s32): Likewise.
9541 (__arm_vrmlsldavhaq_p_s32): Likewise.
9542 (__arm_vrmlsldavhaxq_p_s32): Likewise.
9543 (__arm_vrshrnbq_m_n_s32): Likewise.
9544 (__arm_vrshrnbq_m_n_s16): Likewise.
9545 (__arm_vrshrnbq_m_n_u32): Likewise.
9546 (__arm_vrshrnbq_m_n_u16): Likewise.
9547 (__arm_vrshrntq_m_n_s32): Likewise.
9548 (__arm_vrshrntq_m_n_s16): Likewise.
9549 (__arm_vrshrntq_m_n_u32): Likewise.
9550 (__arm_vrshrntq_m_n_u16): Likewise.
9551 (__arm_vshllbq_m_n_s8): Likewise.
9552 (__arm_vshllbq_m_n_s16): Likewise.
9553 (__arm_vshllbq_m_n_u8): Likewise.
9554 (__arm_vshllbq_m_n_u16): Likewise.
9555 (__arm_vshlltq_m_n_s8): Likewise.
9556 (__arm_vshlltq_m_n_s16): Likewise.
9557 (__arm_vshlltq_m_n_u8): Likewise.
9558 (__arm_vshlltq_m_n_u16): Likewise.
9559 (__arm_vshrnbq_m_n_s32): Likewise.
9560 (__arm_vshrnbq_m_n_s16): Likewise.
9561 (__arm_vshrnbq_m_n_u32): Likewise.
9562 (__arm_vshrnbq_m_n_u16): Likewise.
9563 (__arm_vshrntq_m_n_s32): Likewise.
9564 (__arm_vshrntq_m_n_s16): Likewise.
9565 (__arm_vshrntq_m_n_u32): Likewise.
9566 (__arm_vshrntq_m_n_u16): Likewise.
9567 (vmullbq_poly_m): Define polymorphic variant.
9568 (vmulltq_poly_m): Likewise.
9569 (vshllbq_m): Likewise.
9570 (vshrntq_m_n): Likewise.
9571 (vshrnbq_m_n): Likewise.
9572 (vshlltq_m_n): Likewise.
9573 (vshllbq_m_n): Likewise.
9574 (vrshrntq_m_n): Likewise.
9575 (vrshrnbq_m_n): Likewise.
9576 (vqshruntq_m_n): Likewise.
9577 (vqshrunbq_m_n): Likewise.
9578 (vqdmullbq_m_n): Likewise.
9579 (vqdmullbq_m): Likewise.
9580 (vqdmulltq_m_n): Likewise.
9581 (vqdmulltq_m): Likewise.
9582 (vqrshrnbq_m_n): Likewise.
9583 (vqrshrntq_m_n): Likewise.
9584 (vqrshrunbq_m_n): Likewise.
9585 (vqrshruntq_m_n): Likewise.
9586 (vqshrnbq_m_n): Likewise.
9587 (vqshrntq_m_n): Likewise.
9588 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
9590 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
9591 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
9592 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
9593 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
9594 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
9595 (VMLALDAVAXQ_P): Likewise.
9596 (VQRSHRNBQ_M_N): Likewise.
9597 (VQRSHRNTQ_M_N): Likewise.
9598 (VQSHRNBQ_M_N): Likewise.
9599 (VQSHRNTQ_M_N): Likewise.
9600 (VRSHRNBQ_M_N): Likewise.
9601 (VRSHRNTQ_M_N): Likewise.
9602 (VSHLLBQ_M_N): Likewise.
9603 (VSHLLTQ_M_N): Likewise.
9604 (VSHRNBQ_M_N): Likewise.
9605 (VSHRNTQ_M_N): Likewise.
9606 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
9607 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
9608 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
9609 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
9610 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
9611 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
9612 (mve_vrmlaldavhaq_p_sv4si): Likewise.
9613 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
9614 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
9615 (mve_vshllbq_m_n_<supf><mode>): Likewise.
9616 (mve_vshlltq_m_n_<supf><mode>): Likewise.
9617 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
9618 (mve_vshrntq_m_n_<supf><mode>): Likewise.
9619 (mve_vmlsldavaq_p_s<mode>): Likewise.
9620 (mve_vmlsldavaxq_p_s<mode>): Likewise.
9621 (mve_vmullbq_poly_m_p<mode>): Likewise.
9622 (mve_vmulltq_poly_m_p<mode>): Likewise.
9623 (mve_vqdmullbq_m_n_s<mode>): Likewise.
9624 (mve_vqdmullbq_m_s<mode>): Likewise.
9625 (mve_vqdmulltq_m_n_s<mode>): Likewise.
9626 (mve_vqdmulltq_m_s<mode>): Likewise.
9627 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
9628 (mve_vqrshruntq_m_n_s<mode>): Likewise.
9629 (mve_vqshrunbq_m_n_s<mode>): Likewise.
9630 (mve_vqshruntq_m_n_s<mode>): Likewise.
9631 (mve_vrmlaldavhaq_p_uv4si): Likewise.
9632 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
9633 (mve_vrmlsldavhaq_p_sv4si): Likewise.
9634 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
9636 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9637 Mihail Ionescu <mihail.ionescu@arm.com>
9638 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9640 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
9641 (vabdq_m_s32): Likewise.
9642 (vabdq_m_s16): Likewise.
9643 (vabdq_m_u8): Likewise.
9644 (vabdq_m_u32): Likewise.
9645 (vabdq_m_u16): Likewise.
9646 (vaddq_m_n_s8): Likewise.
9647 (vaddq_m_n_s32): Likewise.
9648 (vaddq_m_n_s16): Likewise.
9649 (vaddq_m_n_u8): Likewise.
9650 (vaddq_m_n_u32): Likewise.
9651 (vaddq_m_n_u16): Likewise.
9652 (vaddq_m_s8): Likewise.
9653 (vaddq_m_s32): Likewise.
9654 (vaddq_m_s16): Likewise.
9655 (vaddq_m_u8): Likewise.
9656 (vaddq_m_u32): Likewise.
9657 (vaddq_m_u16): Likewise.
9658 (vandq_m_s8): Likewise.
9659 (vandq_m_s32): Likewise.
9660 (vandq_m_s16): Likewise.
9661 (vandq_m_u8): Likewise.
9662 (vandq_m_u32): Likewise.
9663 (vandq_m_u16): Likewise.
9664 (vbicq_m_s8): Likewise.
9665 (vbicq_m_s32): Likewise.
9666 (vbicq_m_s16): Likewise.
9667 (vbicq_m_u8): Likewise.
9668 (vbicq_m_u32): Likewise.
9669 (vbicq_m_u16): Likewise.
9670 (vbrsrq_m_n_s8): Likewise.
9671 (vbrsrq_m_n_s32): Likewise.
9672 (vbrsrq_m_n_s16): Likewise.
9673 (vbrsrq_m_n_u8): Likewise.
9674 (vbrsrq_m_n_u32): Likewise.
9675 (vbrsrq_m_n_u16): Likewise.
9676 (vcaddq_rot270_m_s8): Likewise.
9677 (vcaddq_rot270_m_s32): Likewise.
9678 (vcaddq_rot270_m_s16): Likewise.
9679 (vcaddq_rot270_m_u8): Likewise.
9680 (vcaddq_rot270_m_u32): Likewise.
9681 (vcaddq_rot270_m_u16): Likewise.
9682 (vcaddq_rot90_m_s8): Likewise.
9683 (vcaddq_rot90_m_s32): Likewise.
9684 (vcaddq_rot90_m_s16): Likewise.
9685 (vcaddq_rot90_m_u8): Likewise.
9686 (vcaddq_rot90_m_u32): Likewise.
9687 (vcaddq_rot90_m_u16): Likewise.
9688 (veorq_m_s8): Likewise.
9689 (veorq_m_s32): Likewise.
9690 (veorq_m_s16): Likewise.
9691 (veorq_m_u8): Likewise.
9692 (veorq_m_u32): Likewise.
9693 (veorq_m_u16): Likewise.
9694 (vhaddq_m_n_s8): Likewise.
9695 (vhaddq_m_n_s32): Likewise.
9696 (vhaddq_m_n_s16): Likewise.
9697 (vhaddq_m_n_u8): Likewise.
9698 (vhaddq_m_n_u32): Likewise.
9699 (vhaddq_m_n_u16): Likewise.
9700 (vhaddq_m_s8): Likewise.
9701 (vhaddq_m_s32): Likewise.
9702 (vhaddq_m_s16): Likewise.
9703 (vhaddq_m_u8): Likewise.
9704 (vhaddq_m_u32): Likewise.
9705 (vhaddq_m_u16): Likewise.
9706 (vhcaddq_rot270_m_s8): Likewise.
9707 (vhcaddq_rot270_m_s32): Likewise.
9708 (vhcaddq_rot270_m_s16): Likewise.
9709 (vhcaddq_rot90_m_s8): Likewise.
9710 (vhcaddq_rot90_m_s32): Likewise.
9711 (vhcaddq_rot90_m_s16): Likewise.
9712 (vhsubq_m_n_s8): Likewise.
9713 (vhsubq_m_n_s32): Likewise.
9714 (vhsubq_m_n_s16): Likewise.
9715 (vhsubq_m_n_u8): Likewise.
9716 (vhsubq_m_n_u32): Likewise.
9717 (vhsubq_m_n_u16): Likewise.
9718 (vhsubq_m_s8): Likewise.
9719 (vhsubq_m_s32): Likewise.
9720 (vhsubq_m_s16): Likewise.
9721 (vhsubq_m_u8): Likewise.
9722 (vhsubq_m_u32): Likewise.
9723 (vhsubq_m_u16): Likewise.
9724 (vmaxq_m_s8): Likewise.
9725 (vmaxq_m_s32): Likewise.
9726 (vmaxq_m_s16): Likewise.
9727 (vmaxq_m_u8): Likewise.
9728 (vmaxq_m_u32): Likewise.
9729 (vmaxq_m_u16): Likewise.
9730 (vminq_m_s8): Likewise.
9731 (vminq_m_s32): Likewise.
9732 (vminq_m_s16): Likewise.
9733 (vminq_m_u8): Likewise.
9734 (vminq_m_u32): Likewise.
9735 (vminq_m_u16): Likewise.
9736 (vmladavaq_p_s8): Likewise.
9737 (vmladavaq_p_s32): Likewise.
9738 (vmladavaq_p_s16): Likewise.
9739 (vmladavaq_p_u8): Likewise.
9740 (vmladavaq_p_u32): Likewise.
9741 (vmladavaq_p_u16): Likewise.
9742 (vmladavaxq_p_s8): Likewise.
9743 (vmladavaxq_p_s32): Likewise.
9744 (vmladavaxq_p_s16): Likewise.
9745 (vmlaq_m_n_s8): Likewise.
9746 (vmlaq_m_n_s32): Likewise.
9747 (vmlaq_m_n_s16): Likewise.
9748 (vmlaq_m_n_u8): Likewise.
9749 (vmlaq_m_n_u32): Likewise.
9750 (vmlaq_m_n_u16): Likewise.
9751 (vmlasq_m_n_s8): Likewise.
9752 (vmlasq_m_n_s32): Likewise.
9753 (vmlasq_m_n_s16): Likewise.
9754 (vmlasq_m_n_u8): Likewise.
9755 (vmlasq_m_n_u32): Likewise.
9756 (vmlasq_m_n_u16): Likewise.
9757 (vmlsdavaq_p_s8): Likewise.
9758 (vmlsdavaq_p_s32): Likewise.
9759 (vmlsdavaq_p_s16): Likewise.
9760 (vmlsdavaxq_p_s8): Likewise.
9761 (vmlsdavaxq_p_s32): Likewise.
9762 (vmlsdavaxq_p_s16): Likewise.
9763 (vmulhq_m_s8): Likewise.
9764 (vmulhq_m_s32): Likewise.
9765 (vmulhq_m_s16): Likewise.
9766 (vmulhq_m_u8): Likewise.
9767 (vmulhq_m_u32): Likewise.
9768 (vmulhq_m_u16): Likewise.
9769 (vmullbq_int_m_s8): Likewise.
9770 (vmullbq_int_m_s32): Likewise.
9771 (vmullbq_int_m_s16): Likewise.
9772 (vmullbq_int_m_u8): Likewise.
9773 (vmullbq_int_m_u32): Likewise.
9774 (vmullbq_int_m_u16): Likewise.
9775 (vmulltq_int_m_s8): Likewise.
9776 (vmulltq_int_m_s32): Likewise.
9777 (vmulltq_int_m_s16): Likewise.
9778 (vmulltq_int_m_u8): Likewise.
9779 (vmulltq_int_m_u32): Likewise.
9780 (vmulltq_int_m_u16): Likewise.
9781 (vmulq_m_n_s8): Likewise.
9782 (vmulq_m_n_s32): Likewise.
9783 (vmulq_m_n_s16): Likewise.
9784 (vmulq_m_n_u8): Likewise.
9785 (vmulq_m_n_u32): Likewise.
9786 (vmulq_m_n_u16): Likewise.
9787 (vmulq_m_s8): Likewise.
9788 (vmulq_m_s32): Likewise.
9789 (vmulq_m_s16): Likewise.
9790 (vmulq_m_u8): Likewise.
9791 (vmulq_m_u32): Likewise.
9792 (vmulq_m_u16): Likewise.
9793 (vornq_m_s8): Likewise.
9794 (vornq_m_s32): Likewise.
9795 (vornq_m_s16): Likewise.
9796 (vornq_m_u8): Likewise.
9797 (vornq_m_u32): Likewise.
9798 (vornq_m_u16): Likewise.
9799 (vorrq_m_s8): Likewise.
9800 (vorrq_m_s32): Likewise.
9801 (vorrq_m_s16): Likewise.
9802 (vorrq_m_u8): Likewise.
9803 (vorrq_m_u32): Likewise.
9804 (vorrq_m_u16): Likewise.
9805 (vqaddq_m_n_s8): Likewise.
9806 (vqaddq_m_n_s32): Likewise.
9807 (vqaddq_m_n_s16): Likewise.
9808 (vqaddq_m_n_u8): Likewise.
9809 (vqaddq_m_n_u32): Likewise.
9810 (vqaddq_m_n_u16): Likewise.
9811 (vqaddq_m_s8): Likewise.
9812 (vqaddq_m_s32): Likewise.
9813 (vqaddq_m_s16): Likewise.
9814 (vqaddq_m_u8): Likewise.
9815 (vqaddq_m_u32): Likewise.
9816 (vqaddq_m_u16): Likewise.
9817 (vqdmladhq_m_s8): Likewise.
9818 (vqdmladhq_m_s32): Likewise.
9819 (vqdmladhq_m_s16): Likewise.
9820 (vqdmladhxq_m_s8): Likewise.
9821 (vqdmladhxq_m_s32): Likewise.
9822 (vqdmladhxq_m_s16): Likewise.
9823 (vqdmlahq_m_n_s8): Likewise.
9824 (vqdmlahq_m_n_s32): Likewise.
9825 (vqdmlahq_m_n_s16): Likewise.
9826 (vqdmlahq_m_n_u8): Likewise.
9827 (vqdmlahq_m_n_u32): Likewise.
9828 (vqdmlahq_m_n_u16): Likewise.
9829 (vqdmlsdhq_m_s8): Likewise.
9830 (vqdmlsdhq_m_s32): Likewise.
9831 (vqdmlsdhq_m_s16): Likewise.
9832 (vqdmlsdhxq_m_s8): Likewise.
9833 (vqdmlsdhxq_m_s32): Likewise.
9834 (vqdmlsdhxq_m_s16): Likewise.
9835 (vqdmulhq_m_n_s8): Likewise.
9836 (vqdmulhq_m_n_s32): Likewise.
9837 (vqdmulhq_m_n_s16): Likewise.
9838 (vqdmulhq_m_s8): Likewise.
9839 (vqdmulhq_m_s32): Likewise.
9840 (vqdmulhq_m_s16): Likewise.
9841 (vqrdmladhq_m_s8): Likewise.
9842 (vqrdmladhq_m_s32): Likewise.
9843 (vqrdmladhq_m_s16): Likewise.
9844 (vqrdmladhxq_m_s8): Likewise.
9845 (vqrdmladhxq_m_s32): Likewise.
9846 (vqrdmladhxq_m_s16): Likewise.
9847 (vqrdmlahq_m_n_s8): Likewise.
9848 (vqrdmlahq_m_n_s32): Likewise.
9849 (vqrdmlahq_m_n_s16): Likewise.
9850 (vqrdmlahq_m_n_u8): Likewise.
9851 (vqrdmlahq_m_n_u32): Likewise.
9852 (vqrdmlahq_m_n_u16): Likewise.
9853 (vqrdmlashq_m_n_s8): Likewise.
9854 (vqrdmlashq_m_n_s32): Likewise.
9855 (vqrdmlashq_m_n_s16): Likewise.
9856 (vqrdmlashq_m_n_u8): Likewise.
9857 (vqrdmlashq_m_n_u32): Likewise.
9858 (vqrdmlashq_m_n_u16): Likewise.
9859 (vqrdmlsdhq_m_s8): Likewise.
9860 (vqrdmlsdhq_m_s32): Likewise.
9861 (vqrdmlsdhq_m_s16): Likewise.
9862 (vqrdmlsdhxq_m_s8): Likewise.
9863 (vqrdmlsdhxq_m_s32): Likewise.
9864 (vqrdmlsdhxq_m_s16): Likewise.
9865 (vqrdmulhq_m_n_s8): Likewise.
9866 (vqrdmulhq_m_n_s32): Likewise.
9867 (vqrdmulhq_m_n_s16): Likewise.
9868 (vqrdmulhq_m_s8): Likewise.
9869 (vqrdmulhq_m_s32): Likewise.
9870 (vqrdmulhq_m_s16): Likewise.
9871 (vqrshlq_m_s8): Likewise.
9872 (vqrshlq_m_s32): Likewise.
9873 (vqrshlq_m_s16): Likewise.
9874 (vqrshlq_m_u8): Likewise.
9875 (vqrshlq_m_u32): Likewise.
9876 (vqrshlq_m_u16): Likewise.
9877 (vqshlq_m_n_s8): Likewise.
9878 (vqshlq_m_n_s32): Likewise.
9879 (vqshlq_m_n_s16): Likewise.
9880 (vqshlq_m_n_u8): Likewise.
9881 (vqshlq_m_n_u32): Likewise.
9882 (vqshlq_m_n_u16): Likewise.
9883 (vqshlq_m_s8): Likewise.
9884 (vqshlq_m_s32): Likewise.
9885 (vqshlq_m_s16): Likewise.
9886 (vqshlq_m_u8): Likewise.
9887 (vqshlq_m_u32): Likewise.
9888 (vqshlq_m_u16): Likewise.
9889 (vqsubq_m_n_s8): Likewise.
9890 (vqsubq_m_n_s32): Likewise.
9891 (vqsubq_m_n_s16): Likewise.
9892 (vqsubq_m_n_u8): Likewise.
9893 (vqsubq_m_n_u32): Likewise.
9894 (vqsubq_m_n_u16): Likewise.
9895 (vqsubq_m_s8): Likewise.
9896 (vqsubq_m_s32): Likewise.
9897 (vqsubq_m_s16): Likewise.
9898 (vqsubq_m_u8): Likewise.
9899 (vqsubq_m_u32): Likewise.
9900 (vqsubq_m_u16): Likewise.
9901 (vrhaddq_m_s8): Likewise.
9902 (vrhaddq_m_s32): Likewise.
9903 (vrhaddq_m_s16): Likewise.
9904 (vrhaddq_m_u8): Likewise.
9905 (vrhaddq_m_u32): Likewise.
9906 (vrhaddq_m_u16): Likewise.
9907 (vrmulhq_m_s8): Likewise.
9908 (vrmulhq_m_s32): Likewise.
9909 (vrmulhq_m_s16): Likewise.
9910 (vrmulhq_m_u8): Likewise.
9911 (vrmulhq_m_u32): Likewise.
9912 (vrmulhq_m_u16): Likewise.
9913 (vrshlq_m_s8): Likewise.
9914 (vrshlq_m_s32): Likewise.
9915 (vrshlq_m_s16): Likewise.
9916 (vrshlq_m_u8): Likewise.
9917 (vrshlq_m_u32): Likewise.
9918 (vrshlq_m_u16): Likewise.
9919 (vrshrq_m_n_s8): Likewise.
9920 (vrshrq_m_n_s32): Likewise.
9921 (vrshrq_m_n_s16): Likewise.
9922 (vrshrq_m_n_u8): Likewise.
9923 (vrshrq_m_n_u32): Likewise.
9924 (vrshrq_m_n_u16): Likewise.
9925 (vshlq_m_n_s8): Likewise.
9926 (vshlq_m_n_s32): Likewise.
9927 (vshlq_m_n_s16): Likewise.
9928 (vshlq_m_n_u8): Likewise.
9929 (vshlq_m_n_u32): Likewise.
9930 (vshlq_m_n_u16): Likewise.
9931 (vshrq_m_n_s8): Likewise.
9932 (vshrq_m_n_s32): Likewise.
9933 (vshrq_m_n_s16): Likewise.
9934 (vshrq_m_n_u8): Likewise.
9935 (vshrq_m_n_u32): Likewise.
9936 (vshrq_m_n_u16): Likewise.
9937 (vsliq_m_n_s8): Likewise.
9938 (vsliq_m_n_s32): Likewise.
9939 (vsliq_m_n_s16): Likewise.
9940 (vsliq_m_n_u8): Likewise.
9941 (vsliq_m_n_u32): Likewise.
9942 (vsliq_m_n_u16): Likewise.
9943 (vsubq_m_n_s8): Likewise.
9944 (vsubq_m_n_s32): Likewise.
9945 (vsubq_m_n_s16): Likewise.
9946 (vsubq_m_n_u8): Likewise.
9947 (vsubq_m_n_u32): Likewise.
9948 (vsubq_m_n_u16): Likewise.
9949 (__arm_vabdq_m_s8): Define intrinsic.
9950 (__arm_vabdq_m_s32): Likewise.
9951 (__arm_vabdq_m_s16): Likewise.
9952 (__arm_vabdq_m_u8): Likewise.
9953 (__arm_vabdq_m_u32): Likewise.
9954 (__arm_vabdq_m_u16): Likewise.
9955 (__arm_vaddq_m_n_s8): Likewise.
9956 (__arm_vaddq_m_n_s32): Likewise.
9957 (__arm_vaddq_m_n_s16): Likewise.
9958 (__arm_vaddq_m_n_u8): Likewise.
9959 (__arm_vaddq_m_n_u32): Likewise.
9960 (__arm_vaddq_m_n_u16): Likewise.
9961 (__arm_vaddq_m_s8): Likewise.
9962 (__arm_vaddq_m_s32): Likewise.
9963 (__arm_vaddq_m_s16): Likewise.
9964 (__arm_vaddq_m_u8): Likewise.
9965 (__arm_vaddq_m_u32): Likewise.
9966 (__arm_vaddq_m_u16): Likewise.
9967 (__arm_vandq_m_s8): Likewise.
9968 (__arm_vandq_m_s32): Likewise.
9969 (__arm_vandq_m_s16): Likewise.
9970 (__arm_vandq_m_u8): Likewise.
9971 (__arm_vandq_m_u32): Likewise.
9972 (__arm_vandq_m_u16): Likewise.
9973 (__arm_vbicq_m_s8): Likewise.
9974 (__arm_vbicq_m_s32): Likewise.
9975 (__arm_vbicq_m_s16): Likewise.
9976 (__arm_vbicq_m_u8): Likewise.
9977 (__arm_vbicq_m_u32): Likewise.
9978 (__arm_vbicq_m_u16): Likewise.
9979 (__arm_vbrsrq_m_n_s8): Likewise.
9980 (__arm_vbrsrq_m_n_s32): Likewise.
9981 (__arm_vbrsrq_m_n_s16): Likewise.
9982 (__arm_vbrsrq_m_n_u8): Likewise.
9983 (__arm_vbrsrq_m_n_u32): Likewise.
9984 (__arm_vbrsrq_m_n_u16): Likewise.
9985 (__arm_vcaddq_rot270_m_s8): Likewise.
9986 (__arm_vcaddq_rot270_m_s32): Likewise.
9987 (__arm_vcaddq_rot270_m_s16): Likewise.
9988 (__arm_vcaddq_rot270_m_u8): Likewise.
9989 (__arm_vcaddq_rot270_m_u32): Likewise.
9990 (__arm_vcaddq_rot270_m_u16): Likewise.
9991 (__arm_vcaddq_rot90_m_s8): Likewise.
9992 (__arm_vcaddq_rot90_m_s32): Likewise.
9993 (__arm_vcaddq_rot90_m_s16): Likewise.
9994 (__arm_vcaddq_rot90_m_u8): Likewise.
9995 (__arm_vcaddq_rot90_m_u32): Likewise.
9996 (__arm_vcaddq_rot90_m_u16): Likewise.
9997 (__arm_veorq_m_s8): Likewise.
9998 (__arm_veorq_m_s32): Likewise.
9999 (__arm_veorq_m_s16): Likewise.
10000 (__arm_veorq_m_u8): Likewise.
10001 (__arm_veorq_m_u32): Likewise.
10002 (__arm_veorq_m_u16): Likewise.
10003 (__arm_vhaddq_m_n_s8): Likewise.
10004 (__arm_vhaddq_m_n_s32): Likewise.
10005 (__arm_vhaddq_m_n_s16): Likewise.
10006 (__arm_vhaddq_m_n_u8): Likewise.
10007 (__arm_vhaddq_m_n_u32): Likewise.
10008 (__arm_vhaddq_m_n_u16): Likewise.
10009 (__arm_vhaddq_m_s8): Likewise.
10010 (__arm_vhaddq_m_s32): Likewise.
10011 (__arm_vhaddq_m_s16): Likewise.
10012 (__arm_vhaddq_m_u8): Likewise.
10013 (__arm_vhaddq_m_u32): Likewise.
10014 (__arm_vhaddq_m_u16): Likewise.
10015 (__arm_vhcaddq_rot270_m_s8): Likewise.
10016 (__arm_vhcaddq_rot270_m_s32): Likewise.
10017 (__arm_vhcaddq_rot270_m_s16): Likewise.
10018 (__arm_vhcaddq_rot90_m_s8): Likewise.
10019 (__arm_vhcaddq_rot90_m_s32): Likewise.
10020 (__arm_vhcaddq_rot90_m_s16): Likewise.
10021 (__arm_vhsubq_m_n_s8): Likewise.
10022 (__arm_vhsubq_m_n_s32): Likewise.
10023 (__arm_vhsubq_m_n_s16): Likewise.
10024 (__arm_vhsubq_m_n_u8): Likewise.
10025 (__arm_vhsubq_m_n_u32): Likewise.
10026 (__arm_vhsubq_m_n_u16): Likewise.
10027 (__arm_vhsubq_m_s8): Likewise.
10028 (__arm_vhsubq_m_s32): Likewise.
10029 (__arm_vhsubq_m_s16): Likewise.
10030 (__arm_vhsubq_m_u8): Likewise.
10031 (__arm_vhsubq_m_u32): Likewise.
10032 (__arm_vhsubq_m_u16): Likewise.
10033 (__arm_vmaxq_m_s8): Likewise.
10034 (__arm_vmaxq_m_s32): Likewise.
10035 (__arm_vmaxq_m_s16): Likewise.
10036 (__arm_vmaxq_m_u8): Likewise.
10037 (__arm_vmaxq_m_u32): Likewise.
10038 (__arm_vmaxq_m_u16): Likewise.
10039 (__arm_vminq_m_s8): Likewise.
10040 (__arm_vminq_m_s32): Likewise.
10041 (__arm_vminq_m_s16): Likewise.
10042 (__arm_vminq_m_u8): Likewise.
10043 (__arm_vminq_m_u32): Likewise.
10044 (__arm_vminq_m_u16): Likewise.
10045 (__arm_vmladavaq_p_s8): Likewise.
10046 (__arm_vmladavaq_p_s32): Likewise.
10047 (__arm_vmladavaq_p_s16): Likewise.
10048 (__arm_vmladavaq_p_u8): Likewise.
10049 (__arm_vmladavaq_p_u32): Likewise.
10050 (__arm_vmladavaq_p_u16): Likewise.
10051 (__arm_vmladavaxq_p_s8): Likewise.
10052 (__arm_vmladavaxq_p_s32): Likewise.
10053 (__arm_vmladavaxq_p_s16): Likewise.
10054 (__arm_vmlaq_m_n_s8): Likewise.
10055 (__arm_vmlaq_m_n_s32): Likewise.
10056 (__arm_vmlaq_m_n_s16): Likewise.
10057 (__arm_vmlaq_m_n_u8): Likewise.
10058 (__arm_vmlaq_m_n_u32): Likewise.
10059 (__arm_vmlaq_m_n_u16): Likewise.
10060 (__arm_vmlasq_m_n_s8): Likewise.
10061 (__arm_vmlasq_m_n_s32): Likewise.
10062 (__arm_vmlasq_m_n_s16): Likewise.
10063 (__arm_vmlasq_m_n_u8): Likewise.
10064 (__arm_vmlasq_m_n_u32): Likewise.
10065 (__arm_vmlasq_m_n_u16): Likewise.
10066 (__arm_vmlsdavaq_p_s8): Likewise.
10067 (__arm_vmlsdavaq_p_s32): Likewise.
10068 (__arm_vmlsdavaq_p_s16): Likewise.
10069 (__arm_vmlsdavaxq_p_s8): Likewise.
10070 (__arm_vmlsdavaxq_p_s32): Likewise.
10071 (__arm_vmlsdavaxq_p_s16): Likewise.
10072 (__arm_vmulhq_m_s8): Likewise.
10073 (__arm_vmulhq_m_s32): Likewise.
10074 (__arm_vmulhq_m_s16): Likewise.
10075 (__arm_vmulhq_m_u8): Likewise.
10076 (__arm_vmulhq_m_u32): Likewise.
10077 (__arm_vmulhq_m_u16): Likewise.
10078 (__arm_vmullbq_int_m_s8): Likewise.
10079 (__arm_vmullbq_int_m_s32): Likewise.
10080 (__arm_vmullbq_int_m_s16): Likewise.
10081 (__arm_vmullbq_int_m_u8): Likewise.
10082 (__arm_vmullbq_int_m_u32): Likewise.
10083 (__arm_vmullbq_int_m_u16): Likewise.
10084 (__arm_vmulltq_int_m_s8): Likewise.
10085 (__arm_vmulltq_int_m_s32): Likewise.
10086 (__arm_vmulltq_int_m_s16): Likewise.
10087 (__arm_vmulltq_int_m_u8): Likewise.
10088 (__arm_vmulltq_int_m_u32): Likewise.
10089 (__arm_vmulltq_int_m_u16): Likewise.
10090 (__arm_vmulq_m_n_s8): Likewise.
10091 (__arm_vmulq_m_n_s32): Likewise.
10092 (__arm_vmulq_m_n_s16): Likewise.
10093 (__arm_vmulq_m_n_u8): Likewise.
10094 (__arm_vmulq_m_n_u32): Likewise.
10095 (__arm_vmulq_m_n_u16): Likewise.
10096 (__arm_vmulq_m_s8): Likewise.
10097 (__arm_vmulq_m_s32): Likewise.
10098 (__arm_vmulq_m_s16): Likewise.
10099 (__arm_vmulq_m_u8): Likewise.
10100 (__arm_vmulq_m_u32): Likewise.
10101 (__arm_vmulq_m_u16): Likewise.
10102 (__arm_vornq_m_s8): Likewise.
10103 (__arm_vornq_m_s32): Likewise.
10104 (__arm_vornq_m_s16): Likewise.
10105 (__arm_vornq_m_u8): Likewise.
10106 (__arm_vornq_m_u32): Likewise.
10107 (__arm_vornq_m_u16): Likewise.
10108 (__arm_vorrq_m_s8): Likewise.
10109 (__arm_vorrq_m_s32): Likewise.
10110 (__arm_vorrq_m_s16): Likewise.
10111 (__arm_vorrq_m_u8): Likewise.
10112 (__arm_vorrq_m_u32): Likewise.
10113 (__arm_vorrq_m_u16): Likewise.
10114 (__arm_vqaddq_m_n_s8): Likewise.
10115 (__arm_vqaddq_m_n_s32): Likewise.
10116 (__arm_vqaddq_m_n_s16): Likewise.
10117 (__arm_vqaddq_m_n_u8): Likewise.
10118 (__arm_vqaddq_m_n_u32): Likewise.
10119 (__arm_vqaddq_m_n_u16): Likewise.
10120 (__arm_vqaddq_m_s8): Likewise.
10121 (__arm_vqaddq_m_s32): Likewise.
10122 (__arm_vqaddq_m_s16): Likewise.
10123 (__arm_vqaddq_m_u8): Likewise.
10124 (__arm_vqaddq_m_u32): Likewise.
10125 (__arm_vqaddq_m_u16): Likewise.
10126 (__arm_vqdmladhq_m_s8): Likewise.
10127 (__arm_vqdmladhq_m_s32): Likewise.
10128 (__arm_vqdmladhq_m_s16): Likewise.
10129 (__arm_vqdmladhxq_m_s8): Likewise.
10130 (__arm_vqdmladhxq_m_s32): Likewise.
10131 (__arm_vqdmladhxq_m_s16): Likewise.
10132 (__arm_vqdmlahq_m_n_s8): Likewise.
10133 (__arm_vqdmlahq_m_n_s32): Likewise.
10134 (__arm_vqdmlahq_m_n_s16): Likewise.
10135 (__arm_vqdmlahq_m_n_u8): Likewise.
10136 (__arm_vqdmlahq_m_n_u32): Likewise.
10137 (__arm_vqdmlahq_m_n_u16): Likewise.
10138 (__arm_vqdmlsdhq_m_s8): Likewise.
10139 (__arm_vqdmlsdhq_m_s32): Likewise.
10140 (__arm_vqdmlsdhq_m_s16): Likewise.
10141 (__arm_vqdmlsdhxq_m_s8): Likewise.
10142 (__arm_vqdmlsdhxq_m_s32): Likewise.
10143 (__arm_vqdmlsdhxq_m_s16): Likewise.
10144 (__arm_vqdmulhq_m_n_s8): Likewise.
10145 (__arm_vqdmulhq_m_n_s32): Likewise.
10146 (__arm_vqdmulhq_m_n_s16): Likewise.
10147 (__arm_vqdmulhq_m_s8): Likewise.
10148 (__arm_vqdmulhq_m_s32): Likewise.
10149 (__arm_vqdmulhq_m_s16): Likewise.
10150 (__arm_vqrdmladhq_m_s8): Likewise.
10151 (__arm_vqrdmladhq_m_s32): Likewise.
10152 (__arm_vqrdmladhq_m_s16): Likewise.
10153 (__arm_vqrdmladhxq_m_s8): Likewise.
10154 (__arm_vqrdmladhxq_m_s32): Likewise.
10155 (__arm_vqrdmladhxq_m_s16): Likewise.
10156 (__arm_vqrdmlahq_m_n_s8): Likewise.
10157 (__arm_vqrdmlahq_m_n_s32): Likewise.
10158 (__arm_vqrdmlahq_m_n_s16): Likewise.
10159 (__arm_vqrdmlahq_m_n_u8): Likewise.
10160 (__arm_vqrdmlahq_m_n_u32): Likewise.
10161 (__arm_vqrdmlahq_m_n_u16): Likewise.
10162 (__arm_vqrdmlashq_m_n_s8): Likewise.
10163 (__arm_vqrdmlashq_m_n_s32): Likewise.
10164 (__arm_vqrdmlashq_m_n_s16): Likewise.
10165 (__arm_vqrdmlashq_m_n_u8): Likewise.
10166 (__arm_vqrdmlashq_m_n_u32): Likewise.
10167 (__arm_vqrdmlashq_m_n_u16): Likewise.
10168 (__arm_vqrdmlsdhq_m_s8): Likewise.
10169 (__arm_vqrdmlsdhq_m_s32): Likewise.
10170 (__arm_vqrdmlsdhq_m_s16): Likewise.
10171 (__arm_vqrdmlsdhxq_m_s8): Likewise.
10172 (__arm_vqrdmlsdhxq_m_s32): Likewise.
10173 (__arm_vqrdmlsdhxq_m_s16): Likewise.
10174 (__arm_vqrdmulhq_m_n_s8): Likewise.
10175 (__arm_vqrdmulhq_m_n_s32): Likewise.
10176 (__arm_vqrdmulhq_m_n_s16): Likewise.
10177 (__arm_vqrdmulhq_m_s8): Likewise.
10178 (__arm_vqrdmulhq_m_s32): Likewise.
10179 (__arm_vqrdmulhq_m_s16): Likewise.
10180 (__arm_vqrshlq_m_s8): Likewise.
10181 (__arm_vqrshlq_m_s32): Likewise.
10182 (__arm_vqrshlq_m_s16): Likewise.
10183 (__arm_vqrshlq_m_u8): Likewise.
10184 (__arm_vqrshlq_m_u32): Likewise.
10185 (__arm_vqrshlq_m_u16): Likewise.
10186 (__arm_vqshlq_m_n_s8): Likewise.
10187 (__arm_vqshlq_m_n_s32): Likewise.
10188 (__arm_vqshlq_m_n_s16): Likewise.
10189 (__arm_vqshlq_m_n_u8): Likewise.
10190 (__arm_vqshlq_m_n_u32): Likewise.
10191 (__arm_vqshlq_m_n_u16): Likewise.
10192 (__arm_vqshlq_m_s8): Likewise.
10193 (__arm_vqshlq_m_s32): Likewise.
10194 (__arm_vqshlq_m_s16): Likewise.
10195 (__arm_vqshlq_m_u8): Likewise.
10196 (__arm_vqshlq_m_u32): Likewise.
10197 (__arm_vqshlq_m_u16): Likewise.
10198 (__arm_vqsubq_m_n_s8): Likewise.
10199 (__arm_vqsubq_m_n_s32): Likewise.
10200 (__arm_vqsubq_m_n_s16): Likewise.
10201 (__arm_vqsubq_m_n_u8): Likewise.
10202 (__arm_vqsubq_m_n_u32): Likewise.
10203 (__arm_vqsubq_m_n_u16): Likewise.
10204 (__arm_vqsubq_m_s8): Likewise.
10205 (__arm_vqsubq_m_s32): Likewise.
10206 (__arm_vqsubq_m_s16): Likewise.
10207 (__arm_vqsubq_m_u8): Likewise.
10208 (__arm_vqsubq_m_u32): Likewise.
10209 (__arm_vqsubq_m_u16): Likewise.
10210 (__arm_vrhaddq_m_s8): Likewise.
10211 (__arm_vrhaddq_m_s32): Likewise.
10212 (__arm_vrhaddq_m_s16): Likewise.
10213 (__arm_vrhaddq_m_u8): Likewise.
10214 (__arm_vrhaddq_m_u32): Likewise.
10215 (__arm_vrhaddq_m_u16): Likewise.
10216 (__arm_vrmulhq_m_s8): Likewise.
10217 (__arm_vrmulhq_m_s32): Likewise.
10218 (__arm_vrmulhq_m_s16): Likewise.
10219 (__arm_vrmulhq_m_u8): Likewise.
10220 (__arm_vrmulhq_m_u32): Likewise.
10221 (__arm_vrmulhq_m_u16): Likewise.
10222 (__arm_vrshlq_m_s8): Likewise.
10223 (__arm_vrshlq_m_s32): Likewise.
10224 (__arm_vrshlq_m_s16): Likewise.
10225 (__arm_vrshlq_m_u8): Likewise.
10226 (__arm_vrshlq_m_u32): Likewise.
10227 (__arm_vrshlq_m_u16): Likewise.
10228 (__arm_vrshrq_m_n_s8): Likewise.
10229 (__arm_vrshrq_m_n_s32): Likewise.
10230 (__arm_vrshrq_m_n_s16): Likewise.
10231 (__arm_vrshrq_m_n_u8): Likewise.
10232 (__arm_vrshrq_m_n_u32): Likewise.
10233 (__arm_vrshrq_m_n_u16): Likewise.
10234 (__arm_vshlq_m_n_s8): Likewise.
10235 (__arm_vshlq_m_n_s32): Likewise.
10236 (__arm_vshlq_m_n_s16): Likewise.
10237 (__arm_vshlq_m_n_u8): Likewise.
10238 (__arm_vshlq_m_n_u32): Likewise.
10239 (__arm_vshlq_m_n_u16): Likewise.
10240 (__arm_vshrq_m_n_s8): Likewise.
10241 (__arm_vshrq_m_n_s32): Likewise.
10242 (__arm_vshrq_m_n_s16): Likewise.
10243 (__arm_vshrq_m_n_u8): Likewise.
10244 (__arm_vshrq_m_n_u32): Likewise.
10245 (__arm_vshrq_m_n_u16): Likewise.
10246 (__arm_vsliq_m_n_s8): Likewise.
10247 (__arm_vsliq_m_n_s32): Likewise.
10248 (__arm_vsliq_m_n_s16): Likewise.
10249 (__arm_vsliq_m_n_u8): Likewise.
10250 (__arm_vsliq_m_n_u32): Likewise.
10251 (__arm_vsliq_m_n_u16): Likewise.
10252 (__arm_vsubq_m_n_s8): Likewise.
10253 (__arm_vsubq_m_n_s32): Likewise.
10254 (__arm_vsubq_m_n_s16): Likewise.
10255 (__arm_vsubq_m_n_u8): Likewise.
10256 (__arm_vsubq_m_n_u32): Likewise.
10257 (__arm_vsubq_m_n_u16): Likewise.
10258 (vqdmladhq_m): Define polymorphic variant.
10259 (vqdmladhxq_m): Likewise.
10260 (vqdmlsdhq_m): Likewise.
10261 (vqdmlsdhxq_m): Likewise.
10262 (vabdq_m): Likewise.
10263 (vandq_m): Likewise.
10264 (vbicq_m): Likewise.
10265 (vbrsrq_m_n): Likewise.
10266 (vcaddq_rot270_m): Likewise.
10267 (vcaddq_rot90_m): Likewise.
10268 (veorq_m): Likewise.
10269 (vmaxq_m): Likewise.
10270 (vminq_m): Likewise.
10271 (vmladavaq_p): Likewise.
10272 (vmlaq_m_n): Likewise.
10273 (vmlasq_m_n): Likewise.
10274 (vmulhq_m): Likewise.
10275 (vmullbq_int_m): Likewise.
10276 (vmulltq_int_m): Likewise.
10277 (vornq_m): Likewise.
10278 (vorrq_m): Likewise.
10279 (vqdmlahq_m_n): Likewise.
10280 (vqrdmlahq_m_n): Likewise.
10281 (vqrdmlashq_m_n): Likewise.
10282 (vqrshlq_m): Likewise.
10283 (vqshlq_m_n): Likewise.
10284 (vqshlq_m): Likewise.
10285 (vrhaddq_m): Likewise.
10286 (vrmulhq_m): Likewise.
10287 (vrshlq_m): Likewise.
10288 (vrshrq_m_n): Likewise.
10289 (vshlq_m_n): Likewise.
10290 (vshrq_m_n): Likewise.
10291 (vsliq_m): Likewise.
10292 (vaddq_m_n): Likewise.
10293 (vaddq_m): Likewise.
10294 (vhaddq_m_n): Likewise.
10295 (vhaddq_m): Likewise.
10296 (vhcaddq_rot270_m): Likewise.
10297 (vhcaddq_rot90_m): Likewise.
10298 (vhsubq_m): Likewise.
10299 (vhsubq_m_n): Likewise.
10300 (vmulq_m_n): Likewise.
10301 (vmulq_m): Likewise.
10302 (vqaddq_m_n): Likewise.
10303 (vqaddq_m): Likewise.
10304 (vqdmulhq_m_n): Likewise.
10305 (vqdmulhq_m): Likewise.
10306 (vsubq_m_n): Likewise.
10307 (vsliq_m_n): Likewise.
10308 (vqsubq_m_n): Likewise.
10309 (vqsubq_m): Likewise.
10310 (vqrdmulhq_m): Likewise.
10311 (vqrdmulhq_m_n): Likewise.
10312 (vqrdmlsdhxq_m): Likewise.
10313 (vqrdmlsdhq_m): Likewise.
10314 (vqrdmladhq_m): Likewise.
10315 (vqrdmladhxq_m): Likewise.
10316 (vmlsdavaxq_p): Likewise.
10317 (vmlsdavaq_p): Likewise.
10318 (vmladavaxq_p): Likewise.
10319 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
10321 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
10322 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
10323 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
10324 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
10325 * config/arm/mve.md (VHSUBQ_M): Define iterators.
10326 (VSLIQ_M_N): Likewise.
10327 (VQRDMLAHQ_M_N): Likewise.
10328 (VRSHLQ_M): Likewise.
10329 (VMINQ_M): Likewise.
10330 (VMULLBQ_INT_M): Likewise.
10331 (VMULHQ_M): Likewise.
10332 (VMULQ_M): Likewise.
10333 (VHSUBQ_M_N): Likewise.
10334 (VHADDQ_M_N): Likewise.
10335 (VORRQ_M): Likewise.
10336 (VRMULHQ_M): Likewise.
10337 (VQADDQ_M): Likewise.
10338 (VRSHRQ_M_N): Likewise.
10339 (VQSUBQ_M_N): Likewise.
10340 (VADDQ_M): Likewise.
10341 (VORNQ_M): Likewise.
10342 (VQDMLAHQ_M_N): Likewise.
10343 (VRHADDQ_M): Likewise.
10344 (VQSHLQ_M): Likewise.
10345 (VANDQ_M): Likewise.
10346 (VBICQ_M): Likewise.
10347 (VSHLQ_M_N): Likewise.
10348 (VCADDQ_ROT270_M): Likewise.
10349 (VQRSHLQ_M): Likewise.
10350 (VQADDQ_M_N): Likewise.
10351 (VADDQ_M_N): Likewise.
10352 (VMAXQ_M): Likewise.
10353 (VQSUBQ_M): Likewise.
10354 (VMLASQ_M_N): Likewise.
10355 (VMLADAVAQ_P): Likewise.
10356 (VBRSRQ_M_N): Likewise.
10357 (VMULQ_M_N): Likewise.
10358 (VCADDQ_ROT90_M): Likewise.
10359 (VMULLTQ_INT_M): Likewise.
10360 (VEORQ_M): Likewise.
10361 (VSHRQ_M_N): Likewise.
10362 (VSUBQ_M_N): Likewise.
10363 (VHADDQ_M): Likewise.
10364 (VABDQ_M): Likewise.
10365 (VQRDMLASHQ_M_N): Likewise.
10366 (VMLAQ_M_N): Likewise.
10367 (VQSHLQ_M_N): Likewise.
10368 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
10369 (mve_vaddq_m_n_<supf><mode>): Likewise.
10370 (mve_vaddq_m_<supf><mode>): Likewise.
10371 (mve_vandq_m_<supf><mode>): Likewise.
10372 (mve_vbicq_m_<supf><mode>): Likewise.
10373 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
10374 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
10375 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
10376 (mve_veorq_m_<supf><mode>): Likewise.
10377 (mve_vhaddq_m_n_<supf><mode>): Likewise.
10378 (mve_vhaddq_m_<supf><mode>): Likewise.
10379 (mve_vhsubq_m_n_<supf><mode>): Likewise.
10380 (mve_vhsubq_m_<supf><mode>): Likewise.
10381 (mve_vmaxq_m_<supf><mode>): Likewise.
10382 (mve_vminq_m_<supf><mode>): Likewise.
10383 (mve_vmladavaq_p_<supf><mode>): Likewise.
10384 (mve_vmlaq_m_n_<supf><mode>): Likewise.
10385 (mve_vmlasq_m_n_<supf><mode>): Likewise.
10386 (mve_vmulhq_m_<supf><mode>): Likewise.
10387 (mve_vmullbq_int_m_<supf><mode>): Likewise.
10388 (mve_vmulltq_int_m_<supf><mode>): Likewise.
10389 (mve_vmulq_m_n_<supf><mode>): Likewise.
10390 (mve_vmulq_m_<supf><mode>): Likewise.
10391 (mve_vornq_m_<supf><mode>): Likewise.
10392 (mve_vorrq_m_<supf><mode>): Likewise.
10393 (mve_vqaddq_m_n_<supf><mode>): Likewise.
10394 (mve_vqaddq_m_<supf><mode>): Likewise.
10395 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
10396 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
10397 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
10398 (mve_vqrshlq_m_<supf><mode>): Likewise.
10399 (mve_vqshlq_m_n_<supf><mode>): Likewise.
10400 (mve_vqshlq_m_<supf><mode>): Likewise.
10401 (mve_vqsubq_m_n_<supf><mode>): Likewise.
10402 (mve_vqsubq_m_<supf><mode>): Likewise.
10403 (mve_vrhaddq_m_<supf><mode>): Likewise.
10404 (mve_vrmulhq_m_<supf><mode>): Likewise.
10405 (mve_vrshlq_m_<supf><mode>): Likewise.
10406 (mve_vrshrq_m_n_<supf><mode>): Likewise.
10407 (mve_vshlq_m_n_<supf><mode>): Likewise.
10408 (mve_vshrq_m_n_<supf><mode>): Likewise.
10409 (mve_vsliq_m_n_<supf><mode>): Likewise.
10410 (mve_vsubq_m_n_<supf><mode>): Likewise.
10411 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
10412 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
10413 (mve_vmladavaxq_p_s<mode>): Likewise.
10414 (mve_vmlsdavaq_p_s<mode>): Likewise.
10415 (mve_vmlsdavaxq_p_s<mode>): Likewise.
10416 (mve_vqdmladhq_m_s<mode>): Likewise.
10417 (mve_vqdmladhxq_m_s<mode>): Likewise.
10418 (mve_vqdmlsdhq_m_s<mode>): Likewise.
10419 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
10420 (mve_vqdmulhq_m_n_s<mode>): Likewise.
10421 (mve_vqdmulhq_m_s<mode>): Likewise.
10422 (mve_vqrdmladhq_m_s<mode>): Likewise.
10423 (mve_vqrdmladhxq_m_s<mode>): Likewise.
10424 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
10425 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
10426 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
10427 (mve_vqrdmulhq_m_s<mode>): Likewise.
10429 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10430 Mihail Ionescu <mihail.ionescu@arm.com>
10431 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10433 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
10434 Define builtin qualifier.
10435 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10436 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10437 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
10438 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10439 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10440 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10441 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
10442 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
10443 (vsubq_m_s8): Likewise.
10444 (vcvtq_m_n_f16_u16): Likewise.
10445 (vqshluq_m_n_s8): Likewise.
10446 (vabavq_p_s8): Likewise.
10447 (vsriq_m_n_u8): Likewise.
10448 (vshlq_m_u8): Likewise.
10449 (vsubq_m_u8): Likewise.
10450 (vabavq_p_u8): Likewise.
10451 (vshlq_m_s8): Likewise.
10452 (vcvtq_m_n_f16_s16): Likewise.
10453 (vsriq_m_n_s16): Likewise.
10454 (vsubq_m_s16): Likewise.
10455 (vcvtq_m_n_f32_u32): Likewise.
10456 (vqshluq_m_n_s16): Likewise.
10457 (vabavq_p_s16): Likewise.
10458 (vsriq_m_n_u16): Likewise.
10459 (vshlq_m_u16): Likewise.
10460 (vsubq_m_u16): Likewise.
10461 (vabavq_p_u16): Likewise.
10462 (vshlq_m_s16): Likewise.
10463 (vcvtq_m_n_f32_s32): Likewise.
10464 (vsriq_m_n_s32): Likewise.
10465 (vsubq_m_s32): Likewise.
10466 (vqshluq_m_n_s32): Likewise.
10467 (vabavq_p_s32): Likewise.
10468 (vsriq_m_n_u32): Likewise.
10469 (vshlq_m_u32): Likewise.
10470 (vsubq_m_u32): Likewise.
10471 (vabavq_p_u32): Likewise.
10472 (vshlq_m_s32): Likewise.
10473 (__arm_vsriq_m_n_s8): Define intrinsic.
10474 (__arm_vsubq_m_s8): Likewise.
10475 (__arm_vqshluq_m_n_s8): Likewise.
10476 (__arm_vabavq_p_s8): Likewise.
10477 (__arm_vsriq_m_n_u8): Likewise.
10478 (__arm_vshlq_m_u8): Likewise.
10479 (__arm_vsubq_m_u8): Likewise.
10480 (__arm_vabavq_p_u8): Likewise.
10481 (__arm_vshlq_m_s8): Likewise.
10482 (__arm_vsriq_m_n_s16): Likewise.
10483 (__arm_vsubq_m_s16): Likewise.
10484 (__arm_vqshluq_m_n_s16): Likewise.
10485 (__arm_vabavq_p_s16): Likewise.
10486 (__arm_vsriq_m_n_u16): Likewise.
10487 (__arm_vshlq_m_u16): Likewise.
10488 (__arm_vsubq_m_u16): Likewise.
10489 (__arm_vabavq_p_u16): Likewise.
10490 (__arm_vshlq_m_s16): Likewise.
10491 (__arm_vsriq_m_n_s32): Likewise.
10492 (__arm_vsubq_m_s32): Likewise.
10493 (__arm_vqshluq_m_n_s32): Likewise.
10494 (__arm_vabavq_p_s32): Likewise.
10495 (__arm_vsriq_m_n_u32): Likewise.
10496 (__arm_vshlq_m_u32): Likewise.
10497 (__arm_vsubq_m_u32): Likewise.
10498 (__arm_vabavq_p_u32): Likewise.
10499 (__arm_vshlq_m_s32): Likewise.
10500 (__arm_vcvtq_m_n_f16_u16): Likewise.
10501 (__arm_vcvtq_m_n_f16_s16): Likewise.
10502 (__arm_vcvtq_m_n_f32_u32): Likewise.
10503 (__arm_vcvtq_m_n_f32_s32): Likewise.
10504 (vcvtq_m_n): Define polymorphic variant.
10505 (vqshluq_m_n): Likewise.
10506 (vshlq_m): Likewise.
10507 (vsriq_m_n): Likewise.
10508 (vsubq_m): Likewise.
10509 (vabavq_p): Likewise.
10510 * config/arm/arm_mve_builtins.def
10511 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
10512 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10513 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10514 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
10515 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10516 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10517 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10518 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
10519 * config/arm/mve.md (VABAVQ_P): Define iterator.
10520 (VSHLQ_M): Likewise.
10521 (VSRIQ_M_N): Likewise.
10522 (VSUBQ_M): Likewise.
10523 (VCVTQ_M_N_TO_F): Likewise.
10524 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
10525 (mve_vqshluq_m_n_s<mode>): Likewise.
10526 (mve_vshlq_m_<supf><mode>): Likewise.
10527 (mve_vsriq_m_n_<supf><mode>): Likewise.
10528 (mve_vsubq_m_<supf><mode>): Likewise.
10529 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
10531 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10532 Mihail Ionescu <mihail.ionescu@arm.com>
10533 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10535 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
10536 (vrmlsldavhaq_s32): Likewise.
10537 (vrmlsldavhaxq_s32): Likewise.
10538 (vaddlvaq_p_s32): Likewise.
10539 (vcvtbq_m_f16_f32): Likewise.
10540 (vcvtbq_m_f32_f16): Likewise.
10541 (vcvttq_m_f16_f32): Likewise.
10542 (vcvttq_m_f32_f16): Likewise.
10543 (vrev16q_m_s8): Likewise.
10544 (vrev32q_m_f16): Likewise.
10545 (vrmlaldavhq_p_s32): Likewise.
10546 (vrmlaldavhxq_p_s32): Likewise.
10547 (vrmlsldavhq_p_s32): Likewise.
10548 (vrmlsldavhxq_p_s32): Likewise.
10549 (vaddlvaq_p_u32): Likewise.
10550 (vrev16q_m_u8): Likewise.
10551 (vrmlaldavhq_p_u32): Likewise.
10552 (vmvnq_m_n_s16): Likewise.
10553 (vorrq_m_n_s16): Likewise.
10554 (vqrshrntq_n_s16): Likewise.
10555 (vqshrnbq_n_s16): Likewise.
10556 (vqshrntq_n_s16): Likewise.
10557 (vrshrnbq_n_s16): Likewise.
10558 (vrshrntq_n_s16): Likewise.
10559 (vshrnbq_n_s16): Likewise.
10560 (vshrntq_n_s16): Likewise.
10561 (vcmlaq_f16): Likewise.
10562 (vcmlaq_rot180_f16): Likewise.
10563 (vcmlaq_rot270_f16): Likewise.
10564 (vcmlaq_rot90_f16): Likewise.
10565 (vfmaq_f16): Likewise.
10566 (vfmaq_n_f16): Likewise.
10567 (vfmasq_n_f16): Likewise.
10568 (vfmsq_f16): Likewise.
10569 (vmlaldavaq_s16): Likewise.
10570 (vmlaldavaxq_s16): Likewise.
10571 (vmlsldavaq_s16): Likewise.
10572 (vmlsldavaxq_s16): Likewise.
10573 (vabsq_m_f16): Likewise.
10574 (vcvtmq_m_s16_f16): Likewise.
10575 (vcvtnq_m_s16_f16): Likewise.
10576 (vcvtpq_m_s16_f16): Likewise.
10577 (vcvtq_m_s16_f16): Likewise.
10578 (vdupq_m_n_f16): Likewise.
10579 (vmaxnmaq_m_f16): Likewise.
10580 (vmaxnmavq_p_f16): Likewise.
10581 (vmaxnmvq_p_f16): Likewise.
10582 (vminnmaq_m_f16): Likewise.
10583 (vminnmavq_p_f16): Likewise.
10584 (vminnmvq_p_f16): Likewise.
10585 (vmlaldavq_p_s16): Likewise.
10586 (vmlaldavxq_p_s16): Likewise.
10587 (vmlsldavq_p_s16): Likewise.
10588 (vmlsldavxq_p_s16): Likewise.
10589 (vmovlbq_m_s8): Likewise.
10590 (vmovltq_m_s8): Likewise.
10591 (vmovnbq_m_s16): Likewise.
10592 (vmovntq_m_s16): Likewise.
10593 (vnegq_m_f16): Likewise.
10594 (vpselq_f16): Likewise.
10595 (vqmovnbq_m_s16): Likewise.
10596 (vqmovntq_m_s16): Likewise.
10597 (vrev32q_m_s8): Likewise.
10598 (vrev64q_m_f16): Likewise.
10599 (vrndaq_m_f16): Likewise.
10600 (vrndmq_m_f16): Likewise.
10601 (vrndnq_m_f16): Likewise.
10602 (vrndpq_m_f16): Likewise.
10603 (vrndq_m_f16): Likewise.
10604 (vrndxq_m_f16): Likewise.
10605 (vcmpeqq_m_n_f16): Likewise.
10606 (vcmpgeq_m_f16): Likewise.
10607 (vcmpgeq_m_n_f16): Likewise.
10608 (vcmpgtq_m_f16): Likewise.
10609 (vcmpgtq_m_n_f16): Likewise.
10610 (vcmpleq_m_f16): Likewise.
10611 (vcmpleq_m_n_f16): Likewise.
10612 (vcmpltq_m_f16): Likewise.
10613 (vcmpltq_m_n_f16): Likewise.
10614 (vcmpneq_m_f16): Likewise.
10615 (vcmpneq_m_n_f16): Likewise.
10616 (vmvnq_m_n_u16): Likewise.
10617 (vorrq_m_n_u16): Likewise.
10618 (vqrshruntq_n_s16): Likewise.
10619 (vqshrunbq_n_s16): Likewise.
10620 (vqshruntq_n_s16): Likewise.
10621 (vcvtmq_m_u16_f16): Likewise.
10622 (vcvtnq_m_u16_f16): Likewise.
10623 (vcvtpq_m_u16_f16): Likewise.
10624 (vcvtq_m_u16_f16): Likewise.
10625 (vqmovunbq_m_s16): Likewise.
10626 (vqmovuntq_m_s16): Likewise.
10627 (vqrshrntq_n_u16): Likewise.
10628 (vqshrnbq_n_u16): Likewise.
10629 (vqshrntq_n_u16): Likewise.
10630 (vrshrnbq_n_u16): Likewise.
10631 (vrshrntq_n_u16): Likewise.
10632 (vshrnbq_n_u16): Likewise.
10633 (vshrntq_n_u16): Likewise.
10634 (vmlaldavaq_u16): Likewise.
10635 (vmlaldavaxq_u16): Likewise.
10636 (vmlaldavq_p_u16): Likewise.
10637 (vmlaldavxq_p_u16): Likewise.
10638 (vmovlbq_m_u8): Likewise.
10639 (vmovltq_m_u8): Likewise.
10640 (vmovnbq_m_u16): Likewise.
10641 (vmovntq_m_u16): Likewise.
10642 (vqmovnbq_m_u16): Likewise.
10643 (vqmovntq_m_u16): Likewise.
10644 (vrev32q_m_u8): Likewise.
10645 (vmvnq_m_n_s32): Likewise.
10646 (vorrq_m_n_s32): Likewise.
10647 (vqrshrntq_n_s32): Likewise.
10648 (vqshrnbq_n_s32): Likewise.
10649 (vqshrntq_n_s32): Likewise.
10650 (vrshrnbq_n_s32): Likewise.
10651 (vrshrntq_n_s32): Likewise.
10652 (vshrnbq_n_s32): Likewise.
10653 (vshrntq_n_s32): Likewise.
10654 (vcmlaq_f32): Likewise.
10655 (vcmlaq_rot180_f32): Likewise.
10656 (vcmlaq_rot270_f32): Likewise.
10657 (vcmlaq_rot90_f32): Likewise.
10658 (vfmaq_f32): Likewise.
10659 (vfmaq_n_f32): Likewise.
10660 (vfmasq_n_f32): Likewise.
10661 (vfmsq_f32): Likewise.
10662 (vmlaldavaq_s32): Likewise.
10663 (vmlaldavaxq_s32): Likewise.
10664 (vmlsldavaq_s32): Likewise.
10665 (vmlsldavaxq_s32): Likewise.
10666 (vabsq_m_f32): Likewise.
10667 (vcvtmq_m_s32_f32): Likewise.
10668 (vcvtnq_m_s32_f32): Likewise.
10669 (vcvtpq_m_s32_f32): Likewise.
10670 (vcvtq_m_s32_f32): Likewise.
10671 (vdupq_m_n_f32): Likewise.
10672 (vmaxnmaq_m_f32): Likewise.
10673 (vmaxnmavq_p_f32): Likewise.
10674 (vmaxnmvq_p_f32): Likewise.
10675 (vminnmaq_m_f32): Likewise.
10676 (vminnmavq_p_f32): Likewise.
10677 (vminnmvq_p_f32): Likewise.
10678 (vmlaldavq_p_s32): Likewise.
10679 (vmlaldavxq_p_s32): Likewise.
10680 (vmlsldavq_p_s32): Likewise.
10681 (vmlsldavxq_p_s32): Likewise.
10682 (vmovlbq_m_s16): Likewise.
10683 (vmovltq_m_s16): Likewise.
10684 (vmovnbq_m_s32): Likewise.
10685 (vmovntq_m_s32): Likewise.
10686 (vnegq_m_f32): Likewise.
10687 (vpselq_f32): Likewise.
10688 (vqmovnbq_m_s32): Likewise.
10689 (vqmovntq_m_s32): Likewise.
10690 (vrev32q_m_s16): Likewise.
10691 (vrev64q_m_f32): Likewise.
10692 (vrndaq_m_f32): Likewise.
10693 (vrndmq_m_f32): Likewise.
10694 (vrndnq_m_f32): Likewise.
10695 (vrndpq_m_f32): Likewise.
10696 (vrndq_m_f32): Likewise.
10697 (vrndxq_m_f32): Likewise.
10698 (vcmpeqq_m_n_f32): Likewise.
10699 (vcmpgeq_m_f32): Likewise.
10700 (vcmpgeq_m_n_f32): Likewise.
10701 (vcmpgtq_m_f32): Likewise.
10702 (vcmpgtq_m_n_f32): Likewise.
10703 (vcmpleq_m_f32): Likewise.
10704 (vcmpleq_m_n_f32): Likewise.
10705 (vcmpltq_m_f32): Likewise.
10706 (vcmpltq_m_n_f32): Likewise.
10707 (vcmpneq_m_f32): Likewise.
10708 (vcmpneq_m_n_f32): Likewise.
10709 (vmvnq_m_n_u32): Likewise.
10710 (vorrq_m_n_u32): Likewise.
10711 (vqrshruntq_n_s32): Likewise.
10712 (vqshrunbq_n_s32): Likewise.
10713 (vqshruntq_n_s32): Likewise.
10714 (vcvtmq_m_u32_f32): Likewise.
10715 (vcvtnq_m_u32_f32): Likewise.
10716 (vcvtpq_m_u32_f32): Likewise.
10717 (vcvtq_m_u32_f32): Likewise.
10718 (vqmovunbq_m_s32): Likewise.
10719 (vqmovuntq_m_s32): Likewise.
10720 (vqrshrntq_n_u32): Likewise.
10721 (vqshrnbq_n_u32): Likewise.
10722 (vqshrntq_n_u32): Likewise.
10723 (vrshrnbq_n_u32): Likewise.
10724 (vrshrntq_n_u32): Likewise.
10725 (vshrnbq_n_u32): Likewise.
10726 (vshrntq_n_u32): Likewise.
10727 (vmlaldavaq_u32): Likewise.
10728 (vmlaldavaxq_u32): Likewise.
10729 (vmlaldavq_p_u32): Likewise.
10730 (vmlaldavxq_p_u32): Likewise.
10731 (vmovlbq_m_u16): Likewise.
10732 (vmovltq_m_u16): Likewise.
10733 (vmovnbq_m_u32): Likewise.
10734 (vmovntq_m_u32): Likewise.
10735 (vqmovnbq_m_u32): Likewise.
10736 (vqmovntq_m_u32): Likewise.
10737 (vrev32q_m_u16): Likewise.
10738 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
10739 (__arm_vrmlsldavhaq_s32): Likewise.
10740 (__arm_vrmlsldavhaxq_s32): Likewise.
10741 (__arm_vaddlvaq_p_s32): Likewise.
10742 (__arm_vrev16q_m_s8): Likewise.
10743 (__arm_vrmlaldavhq_p_s32): Likewise.
10744 (__arm_vrmlaldavhxq_p_s32): Likewise.
10745 (__arm_vrmlsldavhq_p_s32): Likewise.
10746 (__arm_vrmlsldavhxq_p_s32): Likewise.
10747 (__arm_vaddlvaq_p_u32): Likewise.
10748 (__arm_vrev16q_m_u8): Likewise.
10749 (__arm_vrmlaldavhq_p_u32): Likewise.
10750 (__arm_vmvnq_m_n_s16): Likewise.
10751 (__arm_vorrq_m_n_s16): Likewise.
10752 (__arm_vqrshrntq_n_s16): Likewise.
10753 (__arm_vqshrnbq_n_s16): Likewise.
10754 (__arm_vqshrntq_n_s16): Likewise.
10755 (__arm_vrshrnbq_n_s16): Likewise.
10756 (__arm_vrshrntq_n_s16): Likewise.
10757 (__arm_vshrnbq_n_s16): Likewise.
10758 (__arm_vshrntq_n_s16): Likewise.
10759 (__arm_vmlaldavaq_s16): Likewise.
10760 (__arm_vmlaldavaxq_s16): Likewise.
10761 (__arm_vmlsldavaq_s16): Likewise.
10762 (__arm_vmlsldavaxq_s16): Likewise.
10763 (__arm_vmlaldavq_p_s16): Likewise.
10764 (__arm_vmlaldavxq_p_s16): Likewise.
10765 (__arm_vmlsldavq_p_s16): Likewise.
10766 (__arm_vmlsldavxq_p_s16): Likewise.
10767 (__arm_vmovlbq_m_s8): Likewise.
10768 (__arm_vmovltq_m_s8): Likewise.
10769 (__arm_vmovnbq_m_s16): Likewise.
10770 (__arm_vmovntq_m_s16): Likewise.
10771 (__arm_vqmovnbq_m_s16): Likewise.
10772 (__arm_vqmovntq_m_s16): Likewise.
10773 (__arm_vrev32q_m_s8): Likewise.
10774 (__arm_vmvnq_m_n_u16): Likewise.
10775 (__arm_vorrq_m_n_u16): Likewise.
10776 (__arm_vqrshruntq_n_s16): Likewise.
10777 (__arm_vqshrunbq_n_s16): Likewise.
10778 (__arm_vqshruntq_n_s16): Likewise.
10779 (__arm_vqmovunbq_m_s16): Likewise.
10780 (__arm_vqmovuntq_m_s16): Likewise.
10781 (__arm_vqrshrntq_n_u16): Likewise.
10782 (__arm_vqshrnbq_n_u16): Likewise.
10783 (__arm_vqshrntq_n_u16): Likewise.
10784 (__arm_vrshrnbq_n_u16): Likewise.
10785 (__arm_vrshrntq_n_u16): Likewise.
10786 (__arm_vshrnbq_n_u16): Likewise.
10787 (__arm_vshrntq_n_u16): Likewise.
10788 (__arm_vmlaldavaq_u16): Likewise.
10789 (__arm_vmlaldavaxq_u16): Likewise.
10790 (__arm_vmlaldavq_p_u16): Likewise.
10791 (__arm_vmlaldavxq_p_u16): Likewise.
10792 (__arm_vmovlbq_m_u8): Likewise.
10793 (__arm_vmovltq_m_u8): Likewise.
10794 (__arm_vmovnbq_m_u16): Likewise.
10795 (__arm_vmovntq_m_u16): Likewise.
10796 (__arm_vqmovnbq_m_u16): Likewise.
10797 (__arm_vqmovntq_m_u16): Likewise.
10798 (__arm_vrev32q_m_u8): Likewise.
10799 (__arm_vmvnq_m_n_s32): Likewise.
10800 (__arm_vorrq_m_n_s32): Likewise.
10801 (__arm_vqrshrntq_n_s32): Likewise.
10802 (__arm_vqshrnbq_n_s32): Likewise.
10803 (__arm_vqshrntq_n_s32): Likewise.
10804 (__arm_vrshrnbq_n_s32): Likewise.
10805 (__arm_vrshrntq_n_s32): Likewise.
10806 (__arm_vshrnbq_n_s32): Likewise.
10807 (__arm_vshrntq_n_s32): Likewise.
10808 (__arm_vmlaldavaq_s32): Likewise.
10809 (__arm_vmlaldavaxq_s32): Likewise.
10810 (__arm_vmlsldavaq_s32): Likewise.
10811 (__arm_vmlsldavaxq_s32): Likewise.
10812 (__arm_vmlaldavq_p_s32): Likewise.
10813 (__arm_vmlaldavxq_p_s32): Likewise.
10814 (__arm_vmlsldavq_p_s32): Likewise.
10815 (__arm_vmlsldavxq_p_s32): Likewise.
10816 (__arm_vmovlbq_m_s16): Likewise.
10817 (__arm_vmovltq_m_s16): Likewise.
10818 (__arm_vmovnbq_m_s32): Likewise.
10819 (__arm_vmovntq_m_s32): Likewise.
10820 (__arm_vqmovnbq_m_s32): Likewise.
10821 (__arm_vqmovntq_m_s32): Likewise.
10822 (__arm_vrev32q_m_s16): Likewise.
10823 (__arm_vmvnq_m_n_u32): Likewise.
10824 (__arm_vorrq_m_n_u32): Likewise.
10825 (__arm_vqrshruntq_n_s32): Likewise.
10826 (__arm_vqshrunbq_n_s32): Likewise.
10827 (__arm_vqshruntq_n_s32): Likewise.
10828 (__arm_vqmovunbq_m_s32): Likewise.
10829 (__arm_vqmovuntq_m_s32): Likewise.
10830 (__arm_vqrshrntq_n_u32): Likewise.
10831 (__arm_vqshrnbq_n_u32): Likewise.
10832 (__arm_vqshrntq_n_u32): Likewise.
10833 (__arm_vrshrnbq_n_u32): Likewise.
10834 (__arm_vrshrntq_n_u32): Likewise.
10835 (__arm_vshrnbq_n_u32): Likewise.
10836 (__arm_vshrntq_n_u32): Likewise.
10837 (__arm_vmlaldavaq_u32): Likewise.
10838 (__arm_vmlaldavaxq_u32): Likewise.
10839 (__arm_vmlaldavq_p_u32): Likewise.
10840 (__arm_vmlaldavxq_p_u32): Likewise.
10841 (__arm_vmovlbq_m_u16): Likewise.
10842 (__arm_vmovltq_m_u16): Likewise.
10843 (__arm_vmovnbq_m_u32): Likewise.
10844 (__arm_vmovntq_m_u32): Likewise.
10845 (__arm_vqmovnbq_m_u32): Likewise.
10846 (__arm_vqmovntq_m_u32): Likewise.
10847 (__arm_vrev32q_m_u16): Likewise.
10848 (__arm_vcvtbq_m_f16_f32): Likewise.
10849 (__arm_vcvtbq_m_f32_f16): Likewise.
10850 (__arm_vcvttq_m_f16_f32): Likewise.
10851 (__arm_vcvttq_m_f32_f16): Likewise.
10852 (__arm_vrev32q_m_f16): Likewise.
10853 (__arm_vcmlaq_f16): Likewise.
10854 (__arm_vcmlaq_rot180_f16): Likewise.
10855 (__arm_vcmlaq_rot270_f16): Likewise.
10856 (__arm_vcmlaq_rot90_f16): Likewise.
10857 (__arm_vfmaq_f16): Likewise.
10858 (__arm_vfmaq_n_f16): Likewise.
10859 (__arm_vfmasq_n_f16): Likewise.
10860 (__arm_vfmsq_f16): Likewise.
10861 (__arm_vabsq_m_f16): Likewise.
10862 (__arm_vcvtmq_m_s16_f16): Likewise.
10863 (__arm_vcvtnq_m_s16_f16): Likewise.
10864 (__arm_vcvtpq_m_s16_f16): Likewise.
10865 (__arm_vcvtq_m_s16_f16): Likewise.
10866 (__arm_vdupq_m_n_f16): Likewise.
10867 (__arm_vmaxnmaq_m_f16): Likewise.
10868 (__arm_vmaxnmavq_p_f16): Likewise.
10869 (__arm_vmaxnmvq_p_f16): Likewise.
10870 (__arm_vminnmaq_m_f16): Likewise.
10871 (__arm_vminnmavq_p_f16): Likewise.
10872 (__arm_vminnmvq_p_f16): Likewise.
10873 (__arm_vnegq_m_f16): Likewise.
10874 (__arm_vpselq_f16): Likewise.
10875 (__arm_vrev64q_m_f16): Likewise.
10876 (__arm_vrndaq_m_f16): Likewise.
10877 (__arm_vrndmq_m_f16): Likewise.
10878 (__arm_vrndnq_m_f16): Likewise.
10879 (__arm_vrndpq_m_f16): Likewise.
10880 (__arm_vrndq_m_f16): Likewise.
10881 (__arm_vrndxq_m_f16): Likewise.
10882 (__arm_vcmpeqq_m_n_f16): Likewise.
10883 (__arm_vcmpgeq_m_f16): Likewise.
10884 (__arm_vcmpgeq_m_n_f16): Likewise.
10885 (__arm_vcmpgtq_m_f16): Likewise.
10886 (__arm_vcmpgtq_m_n_f16): Likewise.
10887 (__arm_vcmpleq_m_f16): Likewise.
10888 (__arm_vcmpleq_m_n_f16): Likewise.
10889 (__arm_vcmpltq_m_f16): Likewise.
10890 (__arm_vcmpltq_m_n_f16): Likewise.
10891 (__arm_vcmpneq_m_f16): Likewise.
10892 (__arm_vcmpneq_m_n_f16): Likewise.
10893 (__arm_vcvtmq_m_u16_f16): Likewise.
10894 (__arm_vcvtnq_m_u16_f16): Likewise.
10895 (__arm_vcvtpq_m_u16_f16): Likewise.
10896 (__arm_vcvtq_m_u16_f16): Likewise.
10897 (__arm_vcmlaq_f32): Likewise.
10898 (__arm_vcmlaq_rot180_f32): Likewise.
10899 (__arm_vcmlaq_rot270_f32): Likewise.
10900 (__arm_vcmlaq_rot90_f32): Likewise.
10901 (__arm_vfmaq_f32): Likewise.
10902 (__arm_vfmaq_n_f32): Likewise.
10903 (__arm_vfmasq_n_f32): Likewise.
10904 (__arm_vfmsq_f32): Likewise.
10905 (__arm_vabsq_m_f32): Likewise.
10906 (__arm_vcvtmq_m_s32_f32): Likewise.
10907 (__arm_vcvtnq_m_s32_f32): Likewise.
10908 (__arm_vcvtpq_m_s32_f32): Likewise.
10909 (__arm_vcvtq_m_s32_f32): Likewise.
10910 (__arm_vdupq_m_n_f32): Likewise.
10911 (__arm_vmaxnmaq_m_f32): Likewise.
10912 (__arm_vmaxnmavq_p_f32): Likewise.
10913 (__arm_vmaxnmvq_p_f32): Likewise.
10914 (__arm_vminnmaq_m_f32): Likewise.
10915 (__arm_vminnmavq_p_f32): Likewise.
10916 (__arm_vminnmvq_p_f32): Likewise.
10917 (__arm_vnegq_m_f32): Likewise.
10918 (__arm_vpselq_f32): Likewise.
10919 (__arm_vrev64q_m_f32): Likewise.
10920 (__arm_vrndaq_m_f32): Likewise.
10921 (__arm_vrndmq_m_f32): Likewise.
10922 (__arm_vrndnq_m_f32): Likewise.
10923 (__arm_vrndpq_m_f32): Likewise.
10924 (__arm_vrndq_m_f32): Likewise.
10925 (__arm_vrndxq_m_f32): Likewise.
10926 (__arm_vcmpeqq_m_n_f32): Likewise.
10927 (__arm_vcmpgeq_m_f32): Likewise.
10928 (__arm_vcmpgeq_m_n_f32): Likewise.
10929 (__arm_vcmpgtq_m_f32): Likewise.
10930 (__arm_vcmpgtq_m_n_f32): Likewise.
10931 (__arm_vcmpleq_m_f32): Likewise.
10932 (__arm_vcmpleq_m_n_f32): Likewise.
10933 (__arm_vcmpltq_m_f32): Likewise.
10934 (__arm_vcmpltq_m_n_f32): Likewise.
10935 (__arm_vcmpneq_m_f32): Likewise.
10936 (__arm_vcmpneq_m_n_f32): Likewise.
10937 (__arm_vcvtmq_m_u32_f32): Likewise.
10938 (__arm_vcvtnq_m_u32_f32): Likewise.
10939 (__arm_vcvtpq_m_u32_f32): Likewise.
10940 (__arm_vcvtq_m_u32_f32): Likewise.
10941 (vcvtq_m): Define polymorphic variant.
10942 (vabsq_m): Likewise.
10943 (vcmlaq): Likewise.
10944 (vcmlaq_rot180): Likewise.
10945 (vcmlaq_rot270): Likewise.
10946 (vcmlaq_rot90): Likewise.
10947 (vcmpeqq_m_n): Likewise.
10948 (vcmpgeq_m_n): Likewise.
10949 (vrndxq_m): Likewise.
10950 (vrndq_m): Likewise.
10951 (vrndpq_m): Likewise.
10952 (vcmpgtq_m_n): Likewise.
10953 (vcmpgtq_m): Likewise.
10954 (vcmpleq_m): Likewise.
10955 (vcmpleq_m_n): Likewise.
10956 (vcmpltq_m_n): Likewise.
10957 (vcmpltq_m): Likewise.
10958 (vcmpneq_m): Likewise.
10959 (vcmpneq_m_n): Likewise.
10960 (vcvtbq_m): Likewise.
10961 (vcvttq_m): Likewise.
10962 (vcvtmq_m): Likewise.
10963 (vcvtnq_m): Likewise.
10964 (vcvtpq_m): Likewise.
10965 (vdupq_m_n): Likewise.
10966 (vfmaq_n): Likewise.
10968 (vfmasq_n): Likewise.
10970 (vmaxnmaq_m): Likewise.
10971 (vmaxnmavq_m): Likewise.
10972 (vmaxnmvq_m): Likewise.
10973 (vmaxnmavq_p): Likewise.
10974 (vmaxnmvq_p): Likewise.
10975 (vminnmaq_m): Likewise.
10976 (vminnmavq_p): Likewise.
10977 (vminnmvq_p): Likewise.
10978 (vrndnq_m): Likewise.
10979 (vrndaq_m): Likewise.
10980 (vrndmq_m): Likewise.
10981 (vrev64q_m): Likewise.
10982 (vrev32q_m): Likewise.
10983 (vpselq): Likewise.
10984 (vnegq_m): Likewise.
10985 (vcmpgeq_m): Likewise.
10986 (vshrntq_n): Likewise.
10987 (vrshrntq_n): Likewise.
10988 (vmovlbq_m): Likewise.
10989 (vmovnbq_m): Likewise.
10990 (vmovntq_m): Likewise.
10991 (vmvnq_m_n): Likewise.
10992 (vmvnq_m): Likewise.
10993 (vshrnbq_n): Likewise.
10994 (vrshrnbq_n): Likewise.
10995 (vqshruntq_n): Likewise.
10996 (vrev16q_m): Likewise.
10997 (vqshrunbq_n): Likewise.
10998 (vqshrntq_n): Likewise.
10999 (vqrshruntq_n): Likewise.
11000 (vqrshrntq_n): Likewise.
11001 (vqshrnbq_n): Likewise.
11002 (vqmovuntq_m): Likewise.
11003 (vqmovntq_m): Likewise.
11004 (vqmovnbq_m): Likewise.
11005 (vorrq_m_n): Likewise.
11006 (vmovltq_m): Likewise.
11007 (vqmovunbq_m): Likewise.
11008 (vaddlvaq_p): Likewise.
11009 (vmlaldavaq): Likewise.
11010 (vmlaldavaxq): Likewise.
11011 (vmlaldavq_p): Likewise.
11012 (vmlaldavxq_p): Likewise.
11013 (vmlsldavaq): Likewise.
11014 (vmlsldavaxq): Likewise.
11015 (vmlsldavq_p): Likewise.
11016 (vmlsldavxq_p): Likewise.
11017 (vrmlaldavhaxq): Likewise.
11018 (vrmlaldavhq_p): Likewise.
11019 (vrmlaldavhxq_p): Likewise.
11020 (vrmlsldavhaq): Likewise.
11021 (vrmlsldavhaxq): Likewise.
11022 (vrmlsldavhq_p): Likewise.
11023 (vrmlsldavhxq_p): Likewise.
11024 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
11026 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
11027 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
11028 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
11029 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
11030 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
11031 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
11032 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
11033 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
11034 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
11035 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
11036 (MVE_pred3): Likewise.
11037 (MVE_constraint1): Likewise.
11038 (MVE_pred1): Likewise.
11039 (VMLALDAVQ_P): Define iterator.
11040 (VQMOVNBQ_M): Likewise.
11041 (VMOVLTQ_M): Likewise.
11042 (VMOVNBQ_M): Likewise.
11043 (VRSHRNTQ_N): Likewise.
11044 (VORRQ_M_N): Likewise.
11045 (VREV32Q_M): Likewise.
11046 (VREV16Q_M): Likewise.
11047 (VQRSHRNTQ_N): Likewise.
11048 (VMOVNTQ_M): Likewise.
11049 (VMOVLBQ_M): Likewise.
11050 (VMLALDAVAQ): Likewise.
11051 (VQSHRNBQ_N): Likewise.
11052 (VSHRNBQ_N): Likewise.
11053 (VRSHRNBQ_N): Likewise.
11054 (VMLALDAVXQ_P): Likewise.
11055 (VQMOVNTQ_M): Likewise.
11056 (VMVNQ_M_N): Likewise.
11057 (VQSHRNTQ_N): Likewise.
11058 (VMLALDAVAXQ): Likewise.
11059 (VSHRNTQ_N): Likewise.
11060 (VCVTMQ_M): Likewise.
11061 (VCVTNQ_M): Likewise.
11062 (VCVTPQ_M): Likewise.
11063 (VCVTQ_M_N_FROM_F): Likewise.
11064 (VCVTQ_M_FROM_F): Likewise.
11065 (VRMLALDAVHQ_P): Likewise.
11066 (VADDLVAQ_P): Likewise.
11067 (mve_vrndq_m_f<mode>): Define RTL pattern.
11068 (mve_vabsq_m_f<mode>): Likewise.
11069 (mve_vaddlvaq_p_<supf>v4si): Likewise.
11070 (mve_vcmlaq_f<mode>): Likewise.
11071 (mve_vcmlaq_rot180_f<mode>): Likewise.
11072 (mve_vcmlaq_rot270_f<mode>): Likewise.
11073 (mve_vcmlaq_rot90_f<mode>): Likewise.
11074 (mve_vcmpeqq_m_n_f<mode>): Likewise.
11075 (mve_vcmpgeq_m_f<mode>): Likewise.
11076 (mve_vcmpgeq_m_n_f<mode>): Likewise.
11077 (mve_vcmpgtq_m_f<mode>): Likewise.
11078 (mve_vcmpgtq_m_n_f<mode>): Likewise.
11079 (mve_vcmpleq_m_f<mode>): Likewise.
11080 (mve_vcmpleq_m_n_f<mode>): Likewise.
11081 (mve_vcmpltq_m_f<mode>): Likewise.
11082 (mve_vcmpltq_m_n_f<mode>): Likewise.
11083 (mve_vcmpneq_m_f<mode>): Likewise.
11084 (mve_vcmpneq_m_n_f<mode>): Likewise.
11085 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
11086 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
11087 (mve_vcvttq_m_f16_f32v8hf): Likewise.
11088 (mve_vcvttq_m_f32_f16v4sf): Likewise.
11089 (mve_vdupq_m_n_f<mode>): Likewise.
11090 (mve_vfmaq_f<mode>): Likewise.
11091 (mve_vfmaq_n_f<mode>): Likewise.
11092 (mve_vfmasq_n_f<mode>): Likewise.
11093 (mve_vfmsq_f<mode>): Likewise.
11094 (mve_vmaxnmaq_m_f<mode>): Likewise.
11095 (mve_vmaxnmavq_p_f<mode>): Likewise.
11096 (mve_vmaxnmvq_p_f<mode>): Likewise.
11097 (mve_vminnmaq_m_f<mode>): Likewise.
11098 (mve_vminnmavq_p_f<mode>): Likewise.
11099 (mve_vminnmvq_p_f<mode>): Likewise.
11100 (mve_vmlaldavaq_<supf><mode>): Likewise.
11101 (mve_vmlaldavaxq_<supf><mode>): Likewise.
11102 (mve_vmlaldavq_p_<supf><mode>): Likewise.
11103 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
11104 (mve_vmlsldavaq_s<mode>): Likewise.
11105 (mve_vmlsldavaxq_s<mode>): Likewise.
11106 (mve_vmlsldavq_p_s<mode>): Likewise.
11107 (mve_vmlsldavxq_p_s<mode>): Likewise.
11108 (mve_vmovlbq_m_<supf><mode>): Likewise.
11109 (mve_vmovltq_m_<supf><mode>): Likewise.
11110 (mve_vmovnbq_m_<supf><mode>): Likewise.
11111 (mve_vmovntq_m_<supf><mode>): Likewise.
11112 (mve_vmvnq_m_n_<supf><mode>): Likewise.
11113 (mve_vnegq_m_f<mode>): Likewise.
11114 (mve_vorrq_m_n_<supf><mode>): Likewise.
11115 (mve_vpselq_f<mode>): Likewise.
11116 (mve_vqmovnbq_m_<supf><mode>): Likewise.
11117 (mve_vqmovntq_m_<supf><mode>): Likewise.
11118 (mve_vqmovunbq_m_s<mode>): Likewise.
11119 (mve_vqmovuntq_m_s<mode>): Likewise.
11120 (mve_vqrshrntq_n_<supf><mode>): Likewise.
11121 (mve_vqrshruntq_n_s<mode>): Likewise.
11122 (mve_vqshrnbq_n_<supf><mode>): Likewise.
11123 (mve_vqshrntq_n_<supf><mode>): Likewise.
11124 (mve_vqshrunbq_n_s<mode>): Likewise.
11125 (mve_vqshruntq_n_s<mode>): Likewise.
11126 (mve_vrev32q_m_fv8hf): Likewise.
11127 (mve_vrev32q_m_<supf><mode>): Likewise.
11128 (mve_vrev64q_m_f<mode>): Likewise.
11129 (mve_vrmlaldavhaxq_sv4si): Likewise.
11130 (mve_vrmlaldavhxq_p_sv4si): Likewise.
11131 (mve_vrmlsldavhaxq_sv4si): Likewise.
11132 (mve_vrmlsldavhq_p_sv4si): Likewise.
11133 (mve_vrmlsldavhxq_p_sv4si): Likewise.
11134 (mve_vrndaq_m_f<mode>): Likewise.
11135 (mve_vrndmq_m_f<mode>): Likewise.
11136 (mve_vrndnq_m_f<mode>): Likewise.
11137 (mve_vrndpq_m_f<mode>): Likewise.
11138 (mve_vrndxq_m_f<mode>): Likewise.
11139 (mve_vrshrnbq_n_<supf><mode>): Likewise.
11140 (mve_vrshrntq_n_<supf><mode>): Likewise.
11141 (mve_vshrnbq_n_<supf><mode>): Likewise.
11142 (mve_vshrntq_n_<supf><mode>): Likewise.
11143 (mve_vcvtmq_m_<supf><mode>): Likewise.
11144 (mve_vcvtpq_m_<supf><mode>): Likewise.
11145 (mve_vcvtnq_m_<supf><mode>): Likewise.
11146 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
11147 (mve_vrev16q_m_<supf>v16qi): Likewise.
11148 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
11149 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
11150 (mve_vrmlsldavhaq_sv4si): Likewise.
11152 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11153 Mihail Ionescu <mihail.ionescu@arm.com>
11154 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11156 * config/arm/arm_mve.h (vpselq_u8): Define macro.
11157 (vpselq_s8): Likewise.
11158 (vrev64q_m_u8): Likewise.
11159 (vqrdmlashq_n_u8): Likewise.
11160 (vqrdmlahq_n_u8): Likewise.
11161 (vqdmlahq_n_u8): Likewise.
11162 (vmvnq_m_u8): Likewise.
11163 (vmlasq_n_u8): Likewise.
11164 (vmlaq_n_u8): Likewise.
11165 (vmladavq_p_u8): Likewise.
11166 (vmladavaq_u8): Likewise.
11167 (vminvq_p_u8): Likewise.
11168 (vmaxvq_p_u8): Likewise.
11169 (vdupq_m_n_u8): Likewise.
11170 (vcmpneq_m_u8): Likewise.
11171 (vcmpneq_m_n_u8): Likewise.
11172 (vcmphiq_m_u8): Likewise.
11173 (vcmphiq_m_n_u8): Likewise.
11174 (vcmpeqq_m_u8): Likewise.
11175 (vcmpeqq_m_n_u8): Likewise.
11176 (vcmpcsq_m_u8): Likewise.
11177 (vcmpcsq_m_n_u8): Likewise.
11178 (vclzq_m_u8): Likewise.
11179 (vaddvaq_p_u8): Likewise.
11180 (vsriq_n_u8): Likewise.
11181 (vsliq_n_u8): Likewise.
11182 (vshlq_m_r_u8): Likewise.
11183 (vrshlq_m_n_u8): Likewise.
11184 (vqshlq_m_r_u8): Likewise.
11185 (vqrshlq_m_n_u8): Likewise.
11186 (vminavq_p_s8): Likewise.
11187 (vminaq_m_s8): Likewise.
11188 (vmaxavq_p_s8): Likewise.
11189 (vmaxaq_m_s8): Likewise.
11190 (vcmpneq_m_s8): Likewise.
11191 (vcmpneq_m_n_s8): Likewise.
11192 (vcmpltq_m_s8): Likewise.
11193 (vcmpltq_m_n_s8): Likewise.
11194 (vcmpleq_m_s8): Likewise.
11195 (vcmpleq_m_n_s8): Likewise.
11196 (vcmpgtq_m_s8): Likewise.
11197 (vcmpgtq_m_n_s8): Likewise.
11198 (vcmpgeq_m_s8): Likewise.
11199 (vcmpgeq_m_n_s8): Likewise.
11200 (vcmpeqq_m_s8): Likewise.
11201 (vcmpeqq_m_n_s8): Likewise.
11202 (vshlq_m_r_s8): Likewise.
11203 (vrshlq_m_n_s8): Likewise.
11204 (vrev64q_m_s8): Likewise.
11205 (vqshlq_m_r_s8): Likewise.
11206 (vqrshlq_m_n_s8): Likewise.
11207 (vqnegq_m_s8): Likewise.
11208 (vqabsq_m_s8): Likewise.
11209 (vnegq_m_s8): Likewise.
11210 (vmvnq_m_s8): Likewise.
11211 (vmlsdavxq_p_s8): Likewise.
11212 (vmlsdavq_p_s8): Likewise.
11213 (vmladavxq_p_s8): Likewise.
11214 (vmladavq_p_s8): Likewise.
11215 (vminvq_p_s8): Likewise.
11216 (vmaxvq_p_s8): Likewise.
11217 (vdupq_m_n_s8): Likewise.
11218 (vclzq_m_s8): Likewise.
11219 (vclsq_m_s8): Likewise.
11220 (vaddvaq_p_s8): Likewise.
11221 (vabsq_m_s8): Likewise.
11222 (vqrdmlsdhxq_s8): Likewise.
11223 (vqrdmlsdhq_s8): Likewise.
11224 (vqrdmlashq_n_s8): Likewise.
11225 (vqrdmlahq_n_s8): Likewise.
11226 (vqrdmladhxq_s8): Likewise.
11227 (vqrdmladhq_s8): Likewise.
11228 (vqdmlsdhxq_s8): Likewise.
11229 (vqdmlsdhq_s8): Likewise.
11230 (vqdmlahq_n_s8): Likewise.
11231 (vqdmladhxq_s8): Likewise.
11232 (vqdmladhq_s8): Likewise.
11233 (vmlsdavaxq_s8): Likewise.
11234 (vmlsdavaq_s8): Likewise.
11235 (vmlasq_n_s8): Likewise.
11236 (vmlaq_n_s8): Likewise.
11237 (vmladavaxq_s8): Likewise.
11238 (vmladavaq_s8): Likewise.
11239 (vsriq_n_s8): Likewise.
11240 (vsliq_n_s8): Likewise.
11241 (vpselq_u16): Likewise.
11242 (vpselq_s16): Likewise.
11243 (vrev64q_m_u16): Likewise.
11244 (vqrdmlashq_n_u16): Likewise.
11245 (vqrdmlahq_n_u16): Likewise.
11246 (vqdmlahq_n_u16): Likewise.
11247 (vmvnq_m_u16): Likewise.
11248 (vmlasq_n_u16): Likewise.
11249 (vmlaq_n_u16): Likewise.
11250 (vmladavq_p_u16): Likewise.
11251 (vmladavaq_u16): Likewise.
11252 (vminvq_p_u16): Likewise.
11253 (vmaxvq_p_u16): Likewise.
11254 (vdupq_m_n_u16): Likewise.
11255 (vcmpneq_m_u16): Likewise.
11256 (vcmpneq_m_n_u16): Likewise.
11257 (vcmphiq_m_u16): Likewise.
11258 (vcmphiq_m_n_u16): Likewise.
11259 (vcmpeqq_m_u16): Likewise.
11260 (vcmpeqq_m_n_u16): Likewise.
11261 (vcmpcsq_m_u16): Likewise.
11262 (vcmpcsq_m_n_u16): Likewise.
11263 (vclzq_m_u16): Likewise.
11264 (vaddvaq_p_u16): Likewise.
11265 (vsriq_n_u16): Likewise.
11266 (vsliq_n_u16): Likewise.
11267 (vshlq_m_r_u16): Likewise.
11268 (vrshlq_m_n_u16): Likewise.
11269 (vqshlq_m_r_u16): Likewise.
11270 (vqrshlq_m_n_u16): Likewise.
11271 (vminavq_p_s16): Likewise.
11272 (vminaq_m_s16): Likewise.
11273 (vmaxavq_p_s16): Likewise.
11274 (vmaxaq_m_s16): Likewise.
11275 (vcmpneq_m_s16): Likewise.
11276 (vcmpneq_m_n_s16): Likewise.
11277 (vcmpltq_m_s16): Likewise.
11278 (vcmpltq_m_n_s16): Likewise.
11279 (vcmpleq_m_s16): Likewise.
11280 (vcmpleq_m_n_s16): Likewise.
11281 (vcmpgtq_m_s16): Likewise.
11282 (vcmpgtq_m_n_s16): Likewise.
11283 (vcmpgeq_m_s16): Likewise.
11284 (vcmpgeq_m_n_s16): Likewise.
11285 (vcmpeqq_m_s16): Likewise.
11286 (vcmpeqq_m_n_s16): Likewise.
11287 (vshlq_m_r_s16): Likewise.
11288 (vrshlq_m_n_s16): Likewise.
11289 (vrev64q_m_s16): Likewise.
11290 (vqshlq_m_r_s16): Likewise.
11291 (vqrshlq_m_n_s16): Likewise.
11292 (vqnegq_m_s16): Likewise.
11293 (vqabsq_m_s16): Likewise.
11294 (vnegq_m_s16): Likewise.
11295 (vmvnq_m_s16): Likewise.
11296 (vmlsdavxq_p_s16): Likewise.
11297 (vmlsdavq_p_s16): Likewise.
11298 (vmladavxq_p_s16): Likewise.
11299 (vmladavq_p_s16): Likewise.
11300 (vminvq_p_s16): Likewise.
11301 (vmaxvq_p_s16): Likewise.
11302 (vdupq_m_n_s16): Likewise.
11303 (vclzq_m_s16): Likewise.
11304 (vclsq_m_s16): Likewise.
11305 (vaddvaq_p_s16): Likewise.
11306 (vabsq_m_s16): Likewise.
11307 (vqrdmlsdhxq_s16): Likewise.
11308 (vqrdmlsdhq_s16): Likewise.
11309 (vqrdmlashq_n_s16): Likewise.
11310 (vqrdmlahq_n_s16): Likewise.
11311 (vqrdmladhxq_s16): Likewise.
11312 (vqrdmladhq_s16): Likewise.
11313 (vqdmlsdhxq_s16): Likewise.
11314 (vqdmlsdhq_s16): Likewise.
11315 (vqdmlahq_n_s16): Likewise.
11316 (vqdmladhxq_s16): Likewise.
11317 (vqdmladhq_s16): Likewise.
11318 (vmlsdavaxq_s16): Likewise.
11319 (vmlsdavaq_s16): Likewise.
11320 (vmlasq_n_s16): Likewise.
11321 (vmlaq_n_s16): Likewise.
11322 (vmladavaxq_s16): Likewise.
11323 (vmladavaq_s16): Likewise.
11324 (vsriq_n_s16): Likewise.
11325 (vsliq_n_s16): Likewise.
11326 (vpselq_u32): Likewise.
11327 (vpselq_s32): Likewise.
11328 (vrev64q_m_u32): Likewise.
11329 (vqrdmlashq_n_u32): Likewise.
11330 (vqrdmlahq_n_u32): Likewise.
11331 (vqdmlahq_n_u32): Likewise.
11332 (vmvnq_m_u32): Likewise.
11333 (vmlasq_n_u32): Likewise.
11334 (vmlaq_n_u32): Likewise.
11335 (vmladavq_p_u32): Likewise.
11336 (vmladavaq_u32): Likewise.
11337 (vminvq_p_u32): Likewise.
11338 (vmaxvq_p_u32): Likewise.
11339 (vdupq_m_n_u32): Likewise.
11340 (vcmpneq_m_u32): Likewise.
11341 (vcmpneq_m_n_u32): Likewise.
11342 (vcmphiq_m_u32): Likewise.
11343 (vcmphiq_m_n_u32): Likewise.
11344 (vcmpeqq_m_u32): Likewise.
11345 (vcmpeqq_m_n_u32): Likewise.
11346 (vcmpcsq_m_u32): Likewise.
11347 (vcmpcsq_m_n_u32): Likewise.
11348 (vclzq_m_u32): Likewise.
11349 (vaddvaq_p_u32): Likewise.
11350 (vsriq_n_u32): Likewise.
11351 (vsliq_n_u32): Likewise.
11352 (vshlq_m_r_u32): Likewise.
11353 (vrshlq_m_n_u32): Likewise.
11354 (vqshlq_m_r_u32): Likewise.
11355 (vqrshlq_m_n_u32): Likewise.
11356 (vminavq_p_s32): Likewise.
11357 (vminaq_m_s32): Likewise.
11358 (vmaxavq_p_s32): Likewise.
11359 (vmaxaq_m_s32): Likewise.
11360 (vcmpneq_m_s32): Likewise.
11361 (vcmpneq_m_n_s32): Likewise.
11362 (vcmpltq_m_s32): Likewise.
11363 (vcmpltq_m_n_s32): Likewise.
11364 (vcmpleq_m_s32): Likewise.
11365 (vcmpleq_m_n_s32): Likewise.
11366 (vcmpgtq_m_s32): Likewise.
11367 (vcmpgtq_m_n_s32): Likewise.
11368 (vcmpgeq_m_s32): Likewise.
11369 (vcmpgeq_m_n_s32): Likewise.
11370 (vcmpeqq_m_s32): Likewise.
11371 (vcmpeqq_m_n_s32): Likewise.
11372 (vshlq_m_r_s32): Likewise.
11373 (vrshlq_m_n_s32): Likewise.
11374 (vrev64q_m_s32): Likewise.
11375 (vqshlq_m_r_s32): Likewise.
11376 (vqrshlq_m_n_s32): Likewise.
11377 (vqnegq_m_s32): Likewise.
11378 (vqabsq_m_s32): Likewise.
11379 (vnegq_m_s32): Likewise.
11380 (vmvnq_m_s32): Likewise.
11381 (vmlsdavxq_p_s32): Likewise.
11382 (vmlsdavq_p_s32): Likewise.
11383 (vmladavxq_p_s32): Likewise.
11384 (vmladavq_p_s32): Likewise.
11385 (vminvq_p_s32): Likewise.
11386 (vmaxvq_p_s32): Likewise.
11387 (vdupq_m_n_s32): Likewise.
11388 (vclzq_m_s32): Likewise.
11389 (vclsq_m_s32): Likewise.
11390 (vaddvaq_p_s32): Likewise.
11391 (vabsq_m_s32): Likewise.
11392 (vqrdmlsdhxq_s32): Likewise.
11393 (vqrdmlsdhq_s32): Likewise.
11394 (vqrdmlashq_n_s32): Likewise.
11395 (vqrdmlahq_n_s32): Likewise.
11396 (vqrdmladhxq_s32): Likewise.
11397 (vqrdmladhq_s32): Likewise.
11398 (vqdmlsdhxq_s32): Likewise.
11399 (vqdmlsdhq_s32): Likewise.
11400 (vqdmlahq_n_s32): Likewise.
11401 (vqdmladhxq_s32): Likewise.
11402 (vqdmladhq_s32): Likewise.
11403 (vmlsdavaxq_s32): Likewise.
11404 (vmlsdavaq_s32): Likewise.
11405 (vmlasq_n_s32): Likewise.
11406 (vmlaq_n_s32): Likewise.
11407 (vmladavaxq_s32): Likewise.
11408 (vmladavaq_s32): Likewise.
11409 (vsriq_n_s32): Likewise.
11410 (vsliq_n_s32): Likewise.
11411 (vpselq_u64): Likewise.
11412 (vpselq_s64): Likewise.
11413 (__arm_vpselq_u8): Define intrinsic.
11414 (__arm_vpselq_s8): Likewise.
11415 (__arm_vrev64q_m_u8): Likewise.
11416 (__arm_vqrdmlashq_n_u8): Likewise.
11417 (__arm_vqrdmlahq_n_u8): Likewise.
11418 (__arm_vqdmlahq_n_u8): Likewise.
11419 (__arm_vmvnq_m_u8): Likewise.
11420 (__arm_vmlasq_n_u8): Likewise.
11421 (__arm_vmlaq_n_u8): Likewise.
11422 (__arm_vmladavq_p_u8): Likewise.
11423 (__arm_vmladavaq_u8): Likewise.
11424 (__arm_vminvq_p_u8): Likewise.
11425 (__arm_vmaxvq_p_u8): Likewise.
11426 (__arm_vdupq_m_n_u8): Likewise.
11427 (__arm_vcmpneq_m_u8): Likewise.
11428 (__arm_vcmpneq_m_n_u8): Likewise.
11429 (__arm_vcmphiq_m_u8): Likewise.
11430 (__arm_vcmphiq_m_n_u8): Likewise.
11431 (__arm_vcmpeqq_m_u8): Likewise.
11432 (__arm_vcmpeqq_m_n_u8): Likewise.
11433 (__arm_vcmpcsq_m_u8): Likewise.
11434 (__arm_vcmpcsq_m_n_u8): Likewise.
11435 (__arm_vclzq_m_u8): Likewise.
11436 (__arm_vaddvaq_p_u8): Likewise.
11437 (__arm_vsriq_n_u8): Likewise.
11438 (__arm_vsliq_n_u8): Likewise.
11439 (__arm_vshlq_m_r_u8): Likewise.
11440 (__arm_vrshlq_m_n_u8): Likewise.
11441 (__arm_vqshlq_m_r_u8): Likewise.
11442 (__arm_vqrshlq_m_n_u8): Likewise.
11443 (__arm_vminavq_p_s8): Likewise.
11444 (__arm_vminaq_m_s8): Likewise.
11445 (__arm_vmaxavq_p_s8): Likewise.
11446 (__arm_vmaxaq_m_s8): Likewise.
11447 (__arm_vcmpneq_m_s8): Likewise.
11448 (__arm_vcmpneq_m_n_s8): Likewise.
11449 (__arm_vcmpltq_m_s8): Likewise.
11450 (__arm_vcmpltq_m_n_s8): Likewise.
11451 (__arm_vcmpleq_m_s8): Likewise.
11452 (__arm_vcmpleq_m_n_s8): Likewise.
11453 (__arm_vcmpgtq_m_s8): Likewise.
11454 (__arm_vcmpgtq_m_n_s8): Likewise.
11455 (__arm_vcmpgeq_m_s8): Likewise.
11456 (__arm_vcmpgeq_m_n_s8): Likewise.
11457 (__arm_vcmpeqq_m_s8): Likewise.
11458 (__arm_vcmpeqq_m_n_s8): Likewise.
11459 (__arm_vshlq_m_r_s8): Likewise.
11460 (__arm_vrshlq_m_n_s8): Likewise.
11461 (__arm_vrev64q_m_s8): Likewise.
11462 (__arm_vqshlq_m_r_s8): Likewise.
11463 (__arm_vqrshlq_m_n_s8): Likewise.
11464 (__arm_vqnegq_m_s8): Likewise.
11465 (__arm_vqabsq_m_s8): Likewise.
11466 (__arm_vnegq_m_s8): Likewise.
11467 (__arm_vmvnq_m_s8): Likewise.
11468 (__arm_vmlsdavxq_p_s8): Likewise.
11469 (__arm_vmlsdavq_p_s8): Likewise.
11470 (__arm_vmladavxq_p_s8): Likewise.
11471 (__arm_vmladavq_p_s8): Likewise.
11472 (__arm_vminvq_p_s8): Likewise.
11473 (__arm_vmaxvq_p_s8): Likewise.
11474 (__arm_vdupq_m_n_s8): Likewise.
11475 (__arm_vclzq_m_s8): Likewise.
11476 (__arm_vclsq_m_s8): Likewise.
11477 (__arm_vaddvaq_p_s8): Likewise.
11478 (__arm_vabsq_m_s8): Likewise.
11479 (__arm_vqrdmlsdhxq_s8): Likewise.
11480 (__arm_vqrdmlsdhq_s8): Likewise.
11481 (__arm_vqrdmlashq_n_s8): Likewise.
11482 (__arm_vqrdmlahq_n_s8): Likewise.
11483 (__arm_vqrdmladhxq_s8): Likewise.
11484 (__arm_vqrdmladhq_s8): Likewise.
11485 (__arm_vqdmlsdhxq_s8): Likewise.
11486 (__arm_vqdmlsdhq_s8): Likewise.
11487 (__arm_vqdmlahq_n_s8): Likewise.
11488 (__arm_vqdmladhxq_s8): Likewise.
11489 (__arm_vqdmladhq_s8): Likewise.
11490 (__arm_vmlsdavaxq_s8): Likewise.
11491 (__arm_vmlsdavaq_s8): Likewise.
11492 (__arm_vmlasq_n_s8): Likewise.
11493 (__arm_vmlaq_n_s8): Likewise.
11494 (__arm_vmladavaxq_s8): Likewise.
11495 (__arm_vmladavaq_s8): Likewise.
11496 (__arm_vsriq_n_s8): Likewise.
11497 (__arm_vsliq_n_s8): Likewise.
11498 (__arm_vpselq_u16): Likewise.
11499 (__arm_vpselq_s16): Likewise.
11500 (__arm_vrev64q_m_u16): Likewise.
11501 (__arm_vqrdmlashq_n_u16): Likewise.
11502 (__arm_vqrdmlahq_n_u16): Likewise.
11503 (__arm_vqdmlahq_n_u16): Likewise.
11504 (__arm_vmvnq_m_u16): Likewise.
11505 (__arm_vmlasq_n_u16): Likewise.
11506 (__arm_vmlaq_n_u16): Likewise.
11507 (__arm_vmladavq_p_u16): Likewise.
11508 (__arm_vmladavaq_u16): Likewise.
11509 (__arm_vminvq_p_u16): Likewise.
11510 (__arm_vmaxvq_p_u16): Likewise.
11511 (__arm_vdupq_m_n_u16): Likewise.
11512 (__arm_vcmpneq_m_u16): Likewise.
11513 (__arm_vcmpneq_m_n_u16): Likewise.
11514 (__arm_vcmphiq_m_u16): Likewise.
11515 (__arm_vcmphiq_m_n_u16): Likewise.
11516 (__arm_vcmpeqq_m_u16): Likewise.
11517 (__arm_vcmpeqq_m_n_u16): Likewise.
11518 (__arm_vcmpcsq_m_u16): Likewise.
11519 (__arm_vcmpcsq_m_n_u16): Likewise.
11520 (__arm_vclzq_m_u16): Likewise.
11521 (__arm_vaddvaq_p_u16): Likewise.
11522 (__arm_vsriq_n_u16): Likewise.
11523 (__arm_vsliq_n_u16): Likewise.
11524 (__arm_vshlq_m_r_u16): Likewise.
11525 (__arm_vrshlq_m_n_u16): Likewise.
11526 (__arm_vqshlq_m_r_u16): Likewise.
11527 (__arm_vqrshlq_m_n_u16): Likewise.
11528 (__arm_vminavq_p_s16): Likewise.
11529 (__arm_vminaq_m_s16): Likewise.
11530 (__arm_vmaxavq_p_s16): Likewise.
11531 (__arm_vmaxaq_m_s16): Likewise.
11532 (__arm_vcmpneq_m_s16): Likewise.
11533 (__arm_vcmpneq_m_n_s16): Likewise.
11534 (__arm_vcmpltq_m_s16): Likewise.
11535 (__arm_vcmpltq_m_n_s16): Likewise.
11536 (__arm_vcmpleq_m_s16): Likewise.
11537 (__arm_vcmpleq_m_n_s16): Likewise.
11538 (__arm_vcmpgtq_m_s16): Likewise.
11539 (__arm_vcmpgtq_m_n_s16): Likewise.
11540 (__arm_vcmpgeq_m_s16): Likewise.
11541 (__arm_vcmpgeq_m_n_s16): Likewise.
11542 (__arm_vcmpeqq_m_s16): Likewise.
11543 (__arm_vcmpeqq_m_n_s16): Likewise.
11544 (__arm_vshlq_m_r_s16): Likewise.
11545 (__arm_vrshlq_m_n_s16): Likewise.
11546 (__arm_vrev64q_m_s16): Likewise.
11547 (__arm_vqshlq_m_r_s16): Likewise.
11548 (__arm_vqrshlq_m_n_s16): Likewise.
11549 (__arm_vqnegq_m_s16): Likewise.
11550 (__arm_vqabsq_m_s16): Likewise.
11551 (__arm_vnegq_m_s16): Likewise.
11552 (__arm_vmvnq_m_s16): Likewise.
11553 (__arm_vmlsdavxq_p_s16): Likewise.
11554 (__arm_vmlsdavq_p_s16): Likewise.
11555 (__arm_vmladavxq_p_s16): Likewise.
11556 (__arm_vmladavq_p_s16): Likewise.
11557 (__arm_vminvq_p_s16): Likewise.
11558 (__arm_vmaxvq_p_s16): Likewise.
11559 (__arm_vdupq_m_n_s16): Likewise.
11560 (__arm_vclzq_m_s16): Likewise.
11561 (__arm_vclsq_m_s16): Likewise.
11562 (__arm_vaddvaq_p_s16): Likewise.
11563 (__arm_vabsq_m_s16): Likewise.
11564 (__arm_vqrdmlsdhxq_s16): Likewise.
11565 (__arm_vqrdmlsdhq_s16): Likewise.
11566 (__arm_vqrdmlashq_n_s16): Likewise.
11567 (__arm_vqrdmlahq_n_s16): Likewise.
11568 (__arm_vqrdmladhxq_s16): Likewise.
11569 (__arm_vqrdmladhq_s16): Likewise.
11570 (__arm_vqdmlsdhxq_s16): Likewise.
11571 (__arm_vqdmlsdhq_s16): Likewise.
11572 (__arm_vqdmlahq_n_s16): Likewise.
11573 (__arm_vqdmladhxq_s16): Likewise.
11574 (__arm_vqdmladhq_s16): Likewise.
11575 (__arm_vmlsdavaxq_s16): Likewise.
11576 (__arm_vmlsdavaq_s16): Likewise.
11577 (__arm_vmlasq_n_s16): Likewise.
11578 (__arm_vmlaq_n_s16): Likewise.
11579 (__arm_vmladavaxq_s16): Likewise.
11580 (__arm_vmladavaq_s16): Likewise.
11581 (__arm_vsriq_n_s16): Likewise.
11582 (__arm_vsliq_n_s16): Likewise.
11583 (__arm_vpselq_u32): Likewise.
11584 (__arm_vpselq_s32): Likewise.
11585 (__arm_vrev64q_m_u32): Likewise.
11586 (__arm_vqrdmlashq_n_u32): Likewise.
11587 (__arm_vqrdmlahq_n_u32): Likewise.
11588 (__arm_vqdmlahq_n_u32): Likewise.
11589 (__arm_vmvnq_m_u32): Likewise.
11590 (__arm_vmlasq_n_u32): Likewise.
11591 (__arm_vmlaq_n_u32): Likewise.
11592 (__arm_vmladavq_p_u32): Likewise.
11593 (__arm_vmladavaq_u32): Likewise.
11594 (__arm_vminvq_p_u32): Likewise.
11595 (__arm_vmaxvq_p_u32): Likewise.
11596 (__arm_vdupq_m_n_u32): Likewise.
11597 (__arm_vcmpneq_m_u32): Likewise.
11598 (__arm_vcmpneq_m_n_u32): Likewise.
11599 (__arm_vcmphiq_m_u32): Likewise.
11600 (__arm_vcmphiq_m_n_u32): Likewise.
11601 (__arm_vcmpeqq_m_u32): Likewise.
11602 (__arm_vcmpeqq_m_n_u32): Likewise.
11603 (__arm_vcmpcsq_m_u32): Likewise.
11604 (__arm_vcmpcsq_m_n_u32): Likewise.
11605 (__arm_vclzq_m_u32): Likewise.
11606 (__arm_vaddvaq_p_u32): Likewise.
11607 (__arm_vsriq_n_u32): Likewise.
11608 (__arm_vsliq_n_u32): Likewise.
11609 (__arm_vshlq_m_r_u32): Likewise.
11610 (__arm_vrshlq_m_n_u32): Likewise.
11611 (__arm_vqshlq_m_r_u32): Likewise.
11612 (__arm_vqrshlq_m_n_u32): Likewise.
11613 (__arm_vminavq_p_s32): Likewise.
11614 (__arm_vminaq_m_s32): Likewise.
11615 (__arm_vmaxavq_p_s32): Likewise.
11616 (__arm_vmaxaq_m_s32): Likewise.
11617 (__arm_vcmpneq_m_s32): Likewise.
11618 (__arm_vcmpneq_m_n_s32): Likewise.
11619 (__arm_vcmpltq_m_s32): Likewise.
11620 (__arm_vcmpltq_m_n_s32): Likewise.
11621 (__arm_vcmpleq_m_s32): Likewise.
11622 (__arm_vcmpleq_m_n_s32): Likewise.
11623 (__arm_vcmpgtq_m_s32): Likewise.
11624 (__arm_vcmpgtq_m_n_s32): Likewise.
11625 (__arm_vcmpgeq_m_s32): Likewise.
11626 (__arm_vcmpgeq_m_n_s32): Likewise.
11627 (__arm_vcmpeqq_m_s32): Likewise.
11628 (__arm_vcmpeqq_m_n_s32): Likewise.
11629 (__arm_vshlq_m_r_s32): Likewise.
11630 (__arm_vrshlq_m_n_s32): Likewise.
11631 (__arm_vrev64q_m_s32): Likewise.
11632 (__arm_vqshlq_m_r_s32): Likewise.
11633 (__arm_vqrshlq_m_n_s32): Likewise.
11634 (__arm_vqnegq_m_s32): Likewise.
11635 (__arm_vqabsq_m_s32): Likewise.
11636 (__arm_vnegq_m_s32): Likewise.
11637 (__arm_vmvnq_m_s32): Likewise.
11638 (__arm_vmlsdavxq_p_s32): Likewise.
11639 (__arm_vmlsdavq_p_s32): Likewise.
11640 (__arm_vmladavxq_p_s32): Likewise.
11641 (__arm_vmladavq_p_s32): Likewise.
11642 (__arm_vminvq_p_s32): Likewise.
11643 (__arm_vmaxvq_p_s32): Likewise.
11644 (__arm_vdupq_m_n_s32): Likewise.
11645 (__arm_vclzq_m_s32): Likewise.
11646 (__arm_vclsq_m_s32): Likewise.
11647 (__arm_vaddvaq_p_s32): Likewise.
11648 (__arm_vabsq_m_s32): Likewise.
11649 (__arm_vqrdmlsdhxq_s32): Likewise.
11650 (__arm_vqrdmlsdhq_s32): Likewise.
11651 (__arm_vqrdmlashq_n_s32): Likewise.
11652 (__arm_vqrdmlahq_n_s32): Likewise.
11653 (__arm_vqrdmladhxq_s32): Likewise.
11654 (__arm_vqrdmladhq_s32): Likewise.
11655 (__arm_vqdmlsdhxq_s32): Likewise.
11656 (__arm_vqdmlsdhq_s32): Likewise.
11657 (__arm_vqdmlahq_n_s32): Likewise.
11658 (__arm_vqdmladhxq_s32): Likewise.
11659 (__arm_vqdmladhq_s32): Likewise.
11660 (__arm_vmlsdavaxq_s32): Likewise.
11661 (__arm_vmlsdavaq_s32): Likewise.
11662 (__arm_vmlasq_n_s32): Likewise.
11663 (__arm_vmlaq_n_s32): Likewise.
11664 (__arm_vmladavaxq_s32): Likewise.
11665 (__arm_vmladavaq_s32): Likewise.
11666 (__arm_vsriq_n_s32): Likewise.
11667 (__arm_vsliq_n_s32): Likewise.
11668 (__arm_vpselq_u64): Likewise.
11669 (__arm_vpselq_s64): Likewise.
11670 (vcmpneq_m_n): Define polymorphic variant.
11671 (vcmpneq_m): Likewise.
11672 (vqrdmlsdhq): Likewise.
11673 (vqrdmlsdhxq): Likewise.
11674 (vqrshlq_m_n): Likewise.
11675 (vqshlq_m_r): Likewise.
11676 (vrev64q_m): Likewise.
11677 (vrshlq_m_n): Likewise.
11678 (vshlq_m_r): Likewise.
11679 (vsliq_n): Likewise.
11680 (vsriq_n): Likewise.
11681 (vqrdmlashq_n): Likewise.
11682 (vqrdmlahq): Likewise.
11683 (vqrdmladhxq): Likewise.
11684 (vqrdmladhq): Likewise.
11685 (vqnegq_m): Likewise.
11686 (vqdmlsdhxq): Likewise.
11687 (vabsq_m): Likewise.
11688 (vclsq_m): Likewise.
11689 (vclzq_m): Likewise.
11690 (vcmpgeq_m): Likewise.
11691 (vcmpgeq_m_n): Likewise.
11692 (vdupq_m_n): Likewise.
11693 (vmaxaq_m): Likewise.
11694 (vmlaq_n): Likewise.
11695 (vmlasq_n): Likewise.
11696 (vmvnq_m): Likewise.
11697 (vnegq_m): Likewise.
11698 (vpselq): Likewise.
11699 (vqdmlahq_n): Likewise.
11700 (vqrdmlahq_n): Likewise.
11701 (vqdmlsdhq): Likewise.
11702 (vqdmladhq): Likewise.
11703 (vqabsq_m): Likewise.
11704 (vminaq_m): Likewise.
11705 (vrmlaldavhaq): Likewise.
11706 (vmlsdavxq_p): Likewise.
11707 (vmlsdavq_p): Likewise.
11708 (vmlsdavaxq): Likewise.
11709 (vmlsdavaq): Likewise.
11710 (vaddvaq_p): Likewise.
11711 (vcmpcsq_m_n): Likewise.
11712 (vcmpcsq_m): Likewise.
11713 (vcmpeqq_m_n): Likewise.
11714 (vcmpeqq_m): Likewise.
11715 (vmladavxq_p): Likewise.
11716 (vmladavq_p): Likewise.
11717 (vmladavaxq): Likewise.
11718 (vmladavaq): Likewise.
11719 (vminvq_p): Likewise.
11720 (vminavq_p): Likewise.
11721 (vmaxvq_p): Likewise.
11722 (vmaxavq_p): Likewise.
11723 (vcmpltq_m_n): Likewise.
11724 (vcmpltq_m): Likewise.
11725 (vcmpleq_m): Likewise.
11726 (vcmpleq_m_n): Likewise.
11727 (vcmphiq_m_n): Likewise.
11728 (vcmphiq_m): Likewise.
11729 (vcmpgtq_m_n): Likewise.
11730 (vcmpgtq_m): Likewise.
11731 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
11733 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
11734 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
11735 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
11736 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
11737 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
11738 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
11739 * config/arm/constraints.md (Rc): Define constraint to check constant is
11740 in the range of 0 to 15.
11741 (Re): Define constraint to check constant is in the range of 0 to 31.
11742 * config/arm/mve.md (VADDVAQ_P): Define iterator.
11743 (VCLZQ_M): Likewise.
11744 (VCMPEQQ_M_N): Likewise.
11745 (VCMPEQQ_M): Likewise.
11746 (VCMPNEQ_M_N): Likewise.
11747 (VCMPNEQ_M): Likewise.
11748 (VDUPQ_M_N): Likewise.
11749 (VMAXVQ_P): Likewise.
11750 (VMINVQ_P): Likewise.
11751 (VMLADAVAQ): Likewise.
11752 (VMLADAVQ_P): Likewise.
11753 (VMLAQ_N): Likewise.
11754 (VMLASQ_N): Likewise.
11755 (VMVNQ_M): Likewise.
11756 (VPSELQ): Likewise.
11757 (VQDMLAHQ_N): Likewise.
11758 (VQRDMLAHQ_N): Likewise.
11759 (VQRDMLASHQ_N): Likewise.
11760 (VQRSHLQ_M_N): Likewise.
11761 (VQSHLQ_M_R): Likewise.
11762 (VREV64Q_M): Likewise.
11763 (VRSHLQ_M_N): Likewise.
11764 (VSHLQ_M_R): Likewise.
11765 (VSLIQ_N): Likewise.
11766 (VSRIQ_N): Likewise.
11767 (mve_vabsq_m_s<mode>): Define RTL pattern.
11768 (mve_vaddvaq_p_<supf><mode>): Likewise.
11769 (mve_vclsq_m_s<mode>): Likewise.
11770 (mve_vclzq_m_<supf><mode>): Likewise.
11771 (mve_vcmpcsq_m_n_u<mode>): Likewise.
11772 (mve_vcmpcsq_m_u<mode>): Likewise.
11773 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
11774 (mve_vcmpeqq_m_<supf><mode>): Likewise.
11775 (mve_vcmpgeq_m_n_s<mode>): Likewise.
11776 (mve_vcmpgeq_m_s<mode>): Likewise.
11777 (mve_vcmpgtq_m_n_s<mode>): Likewise.
11778 (mve_vcmpgtq_m_s<mode>): Likewise.
11779 (mve_vcmphiq_m_n_u<mode>): Likewise.
11780 (mve_vcmphiq_m_u<mode>): Likewise.
11781 (mve_vcmpleq_m_n_s<mode>): Likewise.
11782 (mve_vcmpleq_m_s<mode>): Likewise.
11783 (mve_vcmpltq_m_n_s<mode>): Likewise.
11784 (mve_vcmpltq_m_s<mode>): Likewise.
11785 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
11786 (mve_vcmpneq_m_<supf><mode>): Likewise.
11787 (mve_vdupq_m_n_<supf><mode>): Likewise.
11788 (mve_vmaxaq_m_s<mode>): Likewise.
11789 (mve_vmaxavq_p_s<mode>): Likewise.
11790 (mve_vmaxvq_p_<supf><mode>): Likewise.
11791 (mve_vminaq_m_s<mode>): Likewise.
11792 (mve_vminavq_p_s<mode>): Likewise.
11793 (mve_vminvq_p_<supf><mode>): Likewise.
11794 (mve_vmladavaq_<supf><mode>): Likewise.
11795 (mve_vmladavq_p_<supf><mode>): Likewise.
11796 (mve_vmladavxq_p_s<mode>): Likewise.
11797 (mve_vmlaq_n_<supf><mode>): Likewise.
11798 (mve_vmlasq_n_<supf><mode>): Likewise.
11799 (mve_vmlsdavq_p_s<mode>): Likewise.
11800 (mve_vmlsdavxq_p_s<mode>): Likewise.
11801 (mve_vmvnq_m_<supf><mode>): Likewise.
11802 (mve_vnegq_m_s<mode>): Likewise.
11803 (mve_vpselq_<supf><mode>): Likewise.
11804 (mve_vqabsq_m_s<mode>): Likewise.
11805 (mve_vqdmlahq_n_<supf><mode>): Likewise.
11806 (mve_vqnegq_m_s<mode>): Likewise.
11807 (mve_vqrdmladhq_s<mode>): Likewise.
11808 (mve_vqrdmladhxq_s<mode>): Likewise.
11809 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
11810 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
11811 (mve_vqrdmlsdhq_s<mode>): Likewise.
11812 (mve_vqrdmlsdhxq_s<mode>): Likewise.
11813 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
11814 (mve_vqshlq_m_r_<supf><mode>): Likewise.
11815 (mve_vrev64q_m_<supf><mode>): Likewise.
11816 (mve_vrshlq_m_n_<supf><mode>): Likewise.
11817 (mve_vshlq_m_r_<supf><mode>): Likewise.
11818 (mve_vsliq_n_<supf><mode>): Likewise.
11819 (mve_vsriq_n_<supf><mode>): Likewise.
11820 (mve_vqdmlsdhxq_s<mode>): Likewise.
11821 (mve_vqdmlsdhq_s<mode>): Likewise.
11822 (mve_vqdmladhxq_s<mode>): Likewise.
11823 (mve_vqdmladhq_s<mode>): Likewise.
11824 (mve_vmlsdavaxq_s<mode>): Likewise.
11825 (mve_vmlsdavaq_s<mode>): Likewise.
11826 (mve_vmladavaxq_s<mode>): Likewise.
11827 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
11828 matching constraint Rc.
11829 (mve_imm_31): Define predicate to check the matching constraint Re.
11831 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
11833 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
11834 (vec_cmp<mode>di_dup): Likewise.
11835 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
11837 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
11839 * config/gcn/gcn-valu.md (COND_MODE): Delete.
11840 (COND_INT_MODE): Delete.
11841 (cond_op): Add "mult".
11842 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
11843 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
11845 2020-03-18 Richard Biener <rguenther@suse.de>
11847 PR middle-end/94206
11848 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
11849 partial int modes or not mode-precision integer types for
11852 2020-03-18 Jakub Jelinek <jakub@redhat.com>
11854 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
11856 * config/arc/arc.c (frame_stack_add): Likewise.
11857 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
11859 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
11860 * tree-ssa-strlen.h (handle_printf_call): Likewise.
11861 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
11862 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
11864 2020-03-18 Duan bo <duanbo3@huawei.com>
11867 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
11868 (@ldr_got_tiny_<mode>): New pattern.
11869 (ldr_got_tiny_sidi): Likewise.
11870 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
11871 them to handle SYMBOL_TINY_GOT for ILP32.
11873 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
11875 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
11876 call-preserved for SVE PCS functions.
11877 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
11878 Optimize the case in which there are no following vector save slots.
11880 2020-03-18 Richard Biener <rguenther@suse.de>
11882 PR middle-end/94188
11883 * fold-const.c (build_fold_addr_expr): Convert address to
11885 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
11886 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
11887 to build the ADDR_EXPR which we don't really want to simplify.
11888 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
11889 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
11890 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
11891 (simplify_builtin_call): Strip useless type conversions.
11892 * tree-ssa-strlen.c (new_strinfo): Likewise.
11894 2020-03-17 Alexey Neyman <stilor@att.net>
11897 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
11898 the debug level is terse and the declaration is public. Do not
11899 generate type info.
11900 (dwarf2out_decl): Same.
11901 (add_type_attribute): Return immediately if debug level is
11904 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
11906 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
11908 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11909 Mihail Ionescu <mihail.ionescu@arm.com>
11910 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11912 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
11913 Define qualifier for ternary operands.
11914 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
11915 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
11916 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
11917 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
11918 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
11919 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11920 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
11921 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
11922 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
11923 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11924 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
11925 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11926 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
11927 * config/arm/arm_mve.h (vabavq_s8): Define macro.
11928 (vabavq_s16): Likewise.
11929 (vabavq_s32): Likewise.
11930 (vbicq_m_n_s16): Likewise.
11931 (vbicq_m_n_s32): Likewise.
11932 (vbicq_m_n_u16): Likewise.
11933 (vbicq_m_n_u32): Likewise.
11934 (vcmpeqq_m_f16): Likewise.
11935 (vcmpeqq_m_f32): Likewise.
11936 (vcvtaq_m_s16_f16): Likewise.
11937 (vcvtaq_m_u16_f16): Likewise.
11938 (vcvtaq_m_s32_f32): Likewise.
11939 (vcvtaq_m_u32_f32): Likewise.
11940 (vcvtq_m_f16_s16): Likewise.
11941 (vcvtq_m_f16_u16): Likewise.
11942 (vcvtq_m_f32_s32): Likewise.
11943 (vcvtq_m_f32_u32): Likewise.
11944 (vqrshrnbq_n_s16): Likewise.
11945 (vqrshrnbq_n_u16): Likewise.
11946 (vqrshrnbq_n_s32): Likewise.
11947 (vqrshrnbq_n_u32): Likewise.
11948 (vqrshrunbq_n_s16): Likewise.
11949 (vqrshrunbq_n_s32): Likewise.
11950 (vrmlaldavhaq_s32): Likewise.
11951 (vrmlaldavhaq_u32): Likewise.
11952 (vshlcq_s8): Likewise.
11953 (vshlcq_u8): Likewise.
11954 (vshlcq_s16): Likewise.
11955 (vshlcq_u16): Likewise.
11956 (vshlcq_s32): Likewise.
11957 (vshlcq_u32): Likewise.
11958 (vabavq_u8): Likewise.
11959 (vabavq_u16): Likewise.
11960 (vabavq_u32): Likewise.
11961 (__arm_vabavq_s8): Define intrinsic.
11962 (__arm_vabavq_s16): Likewise.
11963 (__arm_vabavq_s32): Likewise.
11964 (__arm_vabavq_u8): Likewise.
11965 (__arm_vabavq_u16): Likewise.
11966 (__arm_vabavq_u32): Likewise.
11967 (__arm_vbicq_m_n_s16): Likewise.
11968 (__arm_vbicq_m_n_s32): Likewise.
11969 (__arm_vbicq_m_n_u16): Likewise.
11970 (__arm_vbicq_m_n_u32): Likewise.
11971 (__arm_vqrshrnbq_n_s16): Likewise.
11972 (__arm_vqrshrnbq_n_u16): Likewise.
11973 (__arm_vqrshrnbq_n_s32): Likewise.
11974 (__arm_vqrshrnbq_n_u32): Likewise.
11975 (__arm_vqrshrunbq_n_s16): Likewise.
11976 (__arm_vqrshrunbq_n_s32): Likewise.
11977 (__arm_vrmlaldavhaq_s32): Likewise.
11978 (__arm_vrmlaldavhaq_u32): Likewise.
11979 (__arm_vshlcq_s8): Likewise.
11980 (__arm_vshlcq_u8): Likewise.
11981 (__arm_vshlcq_s16): Likewise.
11982 (__arm_vshlcq_u16): Likewise.
11983 (__arm_vshlcq_s32): Likewise.
11984 (__arm_vshlcq_u32): Likewise.
11985 (__arm_vcmpeqq_m_f16): Likewise.
11986 (__arm_vcmpeqq_m_f32): Likewise.
11987 (__arm_vcvtaq_m_s16_f16): Likewise.
11988 (__arm_vcvtaq_m_u16_f16): Likewise.
11989 (__arm_vcvtaq_m_s32_f32): Likewise.
11990 (__arm_vcvtaq_m_u32_f32): Likewise.
11991 (__arm_vcvtq_m_f16_s16): Likewise.
11992 (__arm_vcvtq_m_f16_u16): Likewise.
11993 (__arm_vcvtq_m_f32_s32): Likewise.
11994 (__arm_vcvtq_m_f32_u32): Likewise.
11995 (vcvtaq_m): Define polymorphic variant.
11996 (vcvtq_m): Likewise.
11997 (vabavq): Likewise.
11998 (vshlcq): Likewise.
11999 (vbicq_m_n): Likewise.
12000 (vqrshrnbq_n): Likewise.
12001 (vqrshrunbq_n): Likewise.
12002 * config/arm/arm_mve_builtins.def
12003 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
12004 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
12005 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
12006 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
12007 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
12008 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
12009 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
12010 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12011 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
12012 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12013 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
12014 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
12015 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
12016 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
12017 * config/arm/mve.md (VBICQ_M_N): Define iterator.
12018 (VCVTAQ_M): Likewise.
12019 (VCVTQ_M_TO_F): Likewise.
12020 (VQRSHRNBQ_N): Likewise.
12021 (VABAVQ): Likewise.
12022 (VSHLCQ): Likewise.
12023 (VRMLALDAVHAQ): Likewise.
12024 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
12025 (mve_vcmpeqq_m_f<mode>): Likewise.
12026 (mve_vcvtaq_m_<supf><mode>): Likewise.
12027 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
12028 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
12029 (mve_vqrshrunbq_n_s<mode>): Likewise.
12030 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
12031 (mve_vabavq_<supf><mode>): Likewise.
12032 (mve_vshlcq_<supf><mode>): Likewise.
12033 (mve_vshlcq_<supf><mode>): Likewise.
12034 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
12035 (mve_vshlcq_carry_<supf><mode>): Likewise.
12037 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12038 Mihail Ionescu <mihail.ionescu@arm.com>
12039 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12041 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
12042 (vqmovnbq_u16): Likewise.
12043 (vmulltq_poly_p8): Likewise.
12044 (vmullbq_poly_p8): Likewise.
12045 (vmovntq_u16): Likewise.
12046 (vmovnbq_u16): Likewise.
12047 (vmlaldavxq_u16): Likewise.
12048 (vmlaldavq_u16): Likewise.
12049 (vqmovuntq_s16): Likewise.
12050 (vqmovunbq_s16): Likewise.
12051 (vshlltq_n_u8): Likewise.
12052 (vshllbq_n_u8): Likewise.
12053 (vorrq_n_u16): Likewise.
12054 (vbicq_n_u16): Likewise.
12055 (vcmpneq_n_f16): Likewise.
12056 (vcmpneq_f16): Likewise.
12057 (vcmpltq_n_f16): Likewise.
12058 (vcmpltq_f16): Likewise.
12059 (vcmpleq_n_f16): Likewise.
12060 (vcmpleq_f16): Likewise.
12061 (vcmpgtq_n_f16): Likewise.
12062 (vcmpgtq_f16): Likewise.
12063 (vcmpgeq_n_f16): Likewise.
12064 (vcmpgeq_f16): Likewise.
12065 (vcmpeqq_n_f16): Likewise.
12066 (vcmpeqq_f16): Likewise.
12067 (vsubq_f16): Likewise.
12068 (vqmovntq_s16): Likewise.
12069 (vqmovnbq_s16): Likewise.
12070 (vqdmulltq_s16): Likewise.
12071 (vqdmulltq_n_s16): Likewise.
12072 (vqdmullbq_s16): Likewise.
12073 (vqdmullbq_n_s16): Likewise.
12074 (vorrq_f16): Likewise.
12075 (vornq_f16): Likewise.
12076 (vmulq_n_f16): Likewise.
12077 (vmulq_f16): Likewise.
12078 (vmovntq_s16): Likewise.
12079 (vmovnbq_s16): Likewise.
12080 (vmlsldavxq_s16): Likewise.
12081 (vmlsldavq_s16): Likewise.
12082 (vmlaldavxq_s16): Likewise.
12083 (vmlaldavq_s16): Likewise.
12084 (vminnmvq_f16): Likewise.
12085 (vminnmq_f16): Likewise.
12086 (vminnmavq_f16): Likewise.
12087 (vminnmaq_f16): Likewise.
12088 (vmaxnmvq_f16): Likewise.
12089 (vmaxnmq_f16): Likewise.
12090 (vmaxnmavq_f16): Likewise.
12091 (vmaxnmaq_f16): Likewise.
12092 (veorq_f16): Likewise.
12093 (vcmulq_rot90_f16): Likewise.
12094 (vcmulq_rot270_f16): Likewise.
12095 (vcmulq_rot180_f16): Likewise.
12096 (vcmulq_f16): Likewise.
12097 (vcaddq_rot90_f16): Likewise.
12098 (vcaddq_rot270_f16): Likewise.
12099 (vbicq_f16): Likewise.
12100 (vandq_f16): Likewise.
12101 (vaddq_n_f16): Likewise.
12102 (vabdq_f16): Likewise.
12103 (vshlltq_n_s8): Likewise.
12104 (vshllbq_n_s8): Likewise.
12105 (vorrq_n_s16): Likewise.
12106 (vbicq_n_s16): Likewise.
12107 (vqmovntq_u32): Likewise.
12108 (vqmovnbq_u32): Likewise.
12109 (vmulltq_poly_p16): Likewise.
12110 (vmullbq_poly_p16): Likewise.
12111 (vmovntq_u32): Likewise.
12112 (vmovnbq_u32): Likewise.
12113 (vmlaldavxq_u32): Likewise.
12114 (vmlaldavq_u32): Likewise.
12115 (vqmovuntq_s32): Likewise.
12116 (vqmovunbq_s32): Likewise.
12117 (vshlltq_n_u16): Likewise.
12118 (vshllbq_n_u16): Likewise.
12119 (vorrq_n_u32): Likewise.
12120 (vbicq_n_u32): Likewise.
12121 (vcmpneq_n_f32): Likewise.
12122 (vcmpneq_f32): Likewise.
12123 (vcmpltq_n_f32): Likewise.
12124 (vcmpltq_f32): Likewise.
12125 (vcmpleq_n_f32): Likewise.
12126 (vcmpleq_f32): Likewise.
12127 (vcmpgtq_n_f32): Likewise.
12128 (vcmpgtq_f32): Likewise.
12129 (vcmpgeq_n_f32): Likewise.
12130 (vcmpgeq_f32): Likewise.
12131 (vcmpeqq_n_f32): Likewise.
12132 (vcmpeqq_f32): Likewise.
12133 (vsubq_f32): Likewise.
12134 (vqmovntq_s32): Likewise.
12135 (vqmovnbq_s32): Likewise.
12136 (vqdmulltq_s32): Likewise.
12137 (vqdmulltq_n_s32): Likewise.
12138 (vqdmullbq_s32): Likewise.
12139 (vqdmullbq_n_s32): Likewise.
12140 (vorrq_f32): Likewise.
12141 (vornq_f32): Likewise.
12142 (vmulq_n_f32): Likewise.
12143 (vmulq_f32): Likewise.
12144 (vmovntq_s32): Likewise.
12145 (vmovnbq_s32): Likewise.
12146 (vmlsldavxq_s32): Likewise.
12147 (vmlsldavq_s32): Likewise.
12148 (vmlaldavxq_s32): Likewise.
12149 (vmlaldavq_s32): Likewise.
12150 (vminnmvq_f32): Likewise.
12151 (vminnmq_f32): Likewise.
12152 (vminnmavq_f32): Likewise.
12153 (vminnmaq_f32): Likewise.
12154 (vmaxnmvq_f32): Likewise.
12155 (vmaxnmq_f32): Likewise.
12156 (vmaxnmavq_f32): Likewise.
12157 (vmaxnmaq_f32): Likewise.
12158 (veorq_f32): Likewise.
12159 (vcmulq_rot90_f32): Likewise.
12160 (vcmulq_rot270_f32): Likewise.
12161 (vcmulq_rot180_f32): Likewise.
12162 (vcmulq_f32): Likewise.
12163 (vcaddq_rot90_f32): Likewise.
12164 (vcaddq_rot270_f32): Likewise.
12165 (vbicq_f32): Likewise.
12166 (vandq_f32): Likewise.
12167 (vaddq_n_f32): Likewise.
12168 (vabdq_f32): Likewise.
12169 (vshlltq_n_s16): Likewise.
12170 (vshllbq_n_s16): Likewise.
12171 (vorrq_n_s32): Likewise.
12172 (vbicq_n_s32): Likewise.
12173 (vrmlaldavhq_u32): Likewise.
12174 (vctp8q_m): Likewise.
12175 (vctp64q_m): Likewise.
12176 (vctp32q_m): Likewise.
12177 (vctp16q_m): Likewise.
12178 (vaddlvaq_u32): Likewise.
12179 (vrmlsldavhxq_s32): Likewise.
12180 (vrmlsldavhq_s32): Likewise.
12181 (vrmlaldavhxq_s32): Likewise.
12182 (vrmlaldavhq_s32): Likewise.
12183 (vcvttq_f16_f32): Likewise.
12184 (vcvtbq_f16_f32): Likewise.
12185 (vaddlvaq_s32): Likewise.
12186 (__arm_vqmovntq_u16): Define intrinsic.
12187 (__arm_vqmovnbq_u16): Likewise.
12188 (__arm_vmulltq_poly_p8): Likewise.
12189 (__arm_vmullbq_poly_p8): Likewise.
12190 (__arm_vmovntq_u16): Likewise.
12191 (__arm_vmovnbq_u16): Likewise.
12192 (__arm_vmlaldavxq_u16): Likewise.
12193 (__arm_vmlaldavq_u16): Likewise.
12194 (__arm_vqmovuntq_s16): Likewise.
12195 (__arm_vqmovunbq_s16): Likewise.
12196 (__arm_vshlltq_n_u8): Likewise.
12197 (__arm_vshllbq_n_u8): Likewise.
12198 (__arm_vorrq_n_u16): Likewise.
12199 (__arm_vbicq_n_u16): Likewise.
12200 (__arm_vcmpneq_n_f16): Likewise.
12201 (__arm_vcmpneq_f16): Likewise.
12202 (__arm_vcmpltq_n_f16): Likewise.
12203 (__arm_vcmpltq_f16): Likewise.
12204 (__arm_vcmpleq_n_f16): Likewise.
12205 (__arm_vcmpleq_f16): Likewise.
12206 (__arm_vcmpgtq_n_f16): Likewise.
12207 (__arm_vcmpgtq_f16): Likewise.
12208 (__arm_vcmpgeq_n_f16): Likewise.
12209 (__arm_vcmpgeq_f16): Likewise.
12210 (__arm_vcmpeqq_n_f16): Likewise.
12211 (__arm_vcmpeqq_f16): Likewise.
12212 (__arm_vsubq_f16): Likewise.
12213 (__arm_vqmovntq_s16): Likewise.
12214 (__arm_vqmovnbq_s16): Likewise.
12215 (__arm_vqdmulltq_s16): Likewise.
12216 (__arm_vqdmulltq_n_s16): Likewise.
12217 (__arm_vqdmullbq_s16): Likewise.
12218 (__arm_vqdmullbq_n_s16): Likewise.
12219 (__arm_vorrq_f16): Likewise.
12220 (__arm_vornq_f16): Likewise.
12221 (__arm_vmulq_n_f16): Likewise.
12222 (__arm_vmulq_f16): Likewise.
12223 (__arm_vmovntq_s16): Likewise.
12224 (__arm_vmovnbq_s16): Likewise.
12225 (__arm_vmlsldavxq_s16): Likewise.
12226 (__arm_vmlsldavq_s16): Likewise.
12227 (__arm_vmlaldavxq_s16): Likewise.
12228 (__arm_vmlaldavq_s16): Likewise.
12229 (__arm_vminnmvq_f16): Likewise.
12230 (__arm_vminnmq_f16): Likewise.
12231 (__arm_vminnmavq_f16): Likewise.
12232 (__arm_vminnmaq_f16): Likewise.
12233 (__arm_vmaxnmvq_f16): Likewise.
12234 (__arm_vmaxnmq_f16): Likewise.
12235 (__arm_vmaxnmavq_f16): Likewise.
12236 (__arm_vmaxnmaq_f16): Likewise.
12237 (__arm_veorq_f16): Likewise.
12238 (__arm_vcmulq_rot90_f16): Likewise.
12239 (__arm_vcmulq_rot270_f16): Likewise.
12240 (__arm_vcmulq_rot180_f16): Likewise.
12241 (__arm_vcmulq_f16): Likewise.
12242 (__arm_vcaddq_rot90_f16): Likewise.
12243 (__arm_vcaddq_rot270_f16): Likewise.
12244 (__arm_vbicq_f16): Likewise.
12245 (__arm_vandq_f16): Likewise.
12246 (__arm_vaddq_n_f16): Likewise.
12247 (__arm_vabdq_f16): Likewise.
12248 (__arm_vshlltq_n_s8): Likewise.
12249 (__arm_vshllbq_n_s8): Likewise.
12250 (__arm_vorrq_n_s16): Likewise.
12251 (__arm_vbicq_n_s16): Likewise.
12252 (__arm_vqmovntq_u32): Likewise.
12253 (__arm_vqmovnbq_u32): Likewise.
12254 (__arm_vmulltq_poly_p16): Likewise.
12255 (__arm_vmullbq_poly_p16): Likewise.
12256 (__arm_vmovntq_u32): Likewise.
12257 (__arm_vmovnbq_u32): Likewise.
12258 (__arm_vmlaldavxq_u32): Likewise.
12259 (__arm_vmlaldavq_u32): Likewise.
12260 (__arm_vqmovuntq_s32): Likewise.
12261 (__arm_vqmovunbq_s32): Likewise.
12262 (__arm_vshlltq_n_u16): Likewise.
12263 (__arm_vshllbq_n_u16): Likewise.
12264 (__arm_vorrq_n_u32): Likewise.
12265 (__arm_vbicq_n_u32): Likewise.
12266 (__arm_vcmpneq_n_f32): Likewise.
12267 (__arm_vcmpneq_f32): Likewise.
12268 (__arm_vcmpltq_n_f32): Likewise.
12269 (__arm_vcmpltq_f32): Likewise.
12270 (__arm_vcmpleq_n_f32): Likewise.
12271 (__arm_vcmpleq_f32): Likewise.
12272 (__arm_vcmpgtq_n_f32): Likewise.
12273 (__arm_vcmpgtq_f32): Likewise.
12274 (__arm_vcmpgeq_n_f32): Likewise.
12275 (__arm_vcmpgeq_f32): Likewise.
12276 (__arm_vcmpeqq_n_f32): Likewise.
12277 (__arm_vcmpeqq_f32): Likewise.
12278 (__arm_vsubq_f32): Likewise.
12279 (__arm_vqmovntq_s32): Likewise.
12280 (__arm_vqmovnbq_s32): Likewise.
12281 (__arm_vqdmulltq_s32): Likewise.
12282 (__arm_vqdmulltq_n_s32): Likewise.
12283 (__arm_vqdmullbq_s32): Likewise.
12284 (__arm_vqdmullbq_n_s32): Likewise.
12285 (__arm_vorrq_f32): Likewise.
12286 (__arm_vornq_f32): Likewise.
12287 (__arm_vmulq_n_f32): Likewise.
12288 (__arm_vmulq_f32): Likewise.
12289 (__arm_vmovntq_s32): Likewise.
12290 (__arm_vmovnbq_s32): Likewise.
12291 (__arm_vmlsldavxq_s32): Likewise.
12292 (__arm_vmlsldavq_s32): Likewise.
12293 (__arm_vmlaldavxq_s32): Likewise.
12294 (__arm_vmlaldavq_s32): Likewise.
12295 (__arm_vminnmvq_f32): Likewise.
12296 (__arm_vminnmq_f32): Likewise.
12297 (__arm_vminnmavq_f32): Likewise.
12298 (__arm_vminnmaq_f32): Likewise.
12299 (__arm_vmaxnmvq_f32): Likewise.
12300 (__arm_vmaxnmq_f32): Likewise.
12301 (__arm_vmaxnmavq_f32): Likewise.
12302 (__arm_vmaxnmaq_f32): Likewise.
12303 (__arm_veorq_f32): Likewise.
12304 (__arm_vcmulq_rot90_f32): Likewise.
12305 (__arm_vcmulq_rot270_f32): Likewise.
12306 (__arm_vcmulq_rot180_f32): Likewise.
12307 (__arm_vcmulq_f32): Likewise.
12308 (__arm_vcaddq_rot90_f32): Likewise.
12309 (__arm_vcaddq_rot270_f32): Likewise.
12310 (__arm_vbicq_f32): Likewise.
12311 (__arm_vandq_f32): Likewise.
12312 (__arm_vaddq_n_f32): Likewise.
12313 (__arm_vabdq_f32): Likewise.
12314 (__arm_vshlltq_n_s16): Likewise.
12315 (__arm_vshllbq_n_s16): Likewise.
12316 (__arm_vorrq_n_s32): Likewise.
12317 (__arm_vbicq_n_s32): Likewise.
12318 (__arm_vrmlaldavhq_u32): Likewise.
12319 (__arm_vctp8q_m): Likewise.
12320 (__arm_vctp64q_m): Likewise.
12321 (__arm_vctp32q_m): Likewise.
12322 (__arm_vctp16q_m): Likewise.
12323 (__arm_vaddlvaq_u32): Likewise.
12324 (__arm_vrmlsldavhxq_s32): Likewise.
12325 (__arm_vrmlsldavhq_s32): Likewise.
12326 (__arm_vrmlaldavhxq_s32): Likewise.
12327 (__arm_vrmlaldavhq_s32): Likewise.
12328 (__arm_vcvttq_f16_f32): Likewise.
12329 (__arm_vcvtbq_f16_f32): Likewise.
12330 (__arm_vaddlvaq_s32): Likewise.
12331 (vst4q): Define polymorphic variant.
12332 (vrndxq): Likewise.
12334 (vrndpq): Likewise.
12335 (vrndnq): Likewise.
12336 (vrndmq): Likewise.
12337 (vrndaq): Likewise.
12338 (vrev64q): Likewise.
12340 (vdupq_n): Likewise.
12342 (vrev32q): Likewise.
12343 (vcvtbq_f32): Likewise.
12344 (vcvttq_f32): Likewise.
12346 (vsubq_n): Likewise.
12347 (vbrsrq_n): Likewise.
12348 (vcvtq_n): Likewise.
12352 (vaddq_n): Likewise.
12356 (vmulq_n): Likewise.
12358 (vcaddq_rot270): Likewise.
12359 (vcmpeqq_n): Likewise.
12360 (vcmpeqq): Likewise.
12361 (vcaddq_rot90): Likewise.
12362 (vcmpgeq_n): Likewise.
12363 (vcmpgeq): Likewise.
12364 (vcmpgtq_n): Likewise.
12365 (vcmpgtq): Likewise.
12366 (vcmpgtq): Likewise.
12367 (vcmpleq_n): Likewise.
12368 (vcmpleq_n): Likewise.
12369 (vcmpleq): Likewise.
12370 (vcmpleq): Likewise.
12371 (vcmpltq_n): Likewise.
12372 (vcmpltq_n): Likewise.
12373 (vcmpltq): Likewise.
12374 (vcmpltq): Likewise.
12375 (vcmpneq_n): Likewise.
12376 (vcmpneq_n): Likewise.
12377 (vcmpneq): Likewise.
12378 (vcmpneq): Likewise.
12379 (vcmulq): Likewise.
12380 (vcmulq): Likewise.
12381 (vcmulq_rot180): Likewise.
12382 (vcmulq_rot180): Likewise.
12383 (vcmulq_rot270): Likewise.
12384 (vcmulq_rot270): Likewise.
12385 (vcmulq_rot90): Likewise.
12386 (vcmulq_rot90): Likewise.
12389 (vmaxnmaq): Likewise.
12390 (vmaxnmaq): Likewise.
12391 (vmaxnmavq): Likewise.
12392 (vmaxnmavq): Likewise.
12393 (vmaxnmq): Likewise.
12394 (vmaxnmq): Likewise.
12395 (vmaxnmvq): Likewise.
12396 (vmaxnmvq): Likewise.
12397 (vminnmaq): Likewise.
12398 (vminnmaq): Likewise.
12399 (vminnmavq): Likewise.
12400 (vminnmavq): Likewise.
12401 (vminnmq): Likewise.
12402 (vminnmq): Likewise.
12403 (vminnmvq): Likewise.
12404 (vminnmvq): Likewise.
12405 (vbicq_n): Likewise.
12406 (vqmovntq): Likewise.
12407 (vqmovntq): Likewise.
12408 (vqmovnbq): Likewise.
12409 (vqmovnbq): Likewise.
12410 (vmulltq_poly): Likewise.
12411 (vmulltq_poly): Likewise.
12412 (vmullbq_poly): Likewise.
12413 (vmullbq_poly): Likewise.
12414 (vmovntq): Likewise.
12415 (vmovntq): Likewise.
12416 (vmovnbq): Likewise.
12417 (vmovnbq): Likewise.
12418 (vmlaldavxq): Likewise.
12419 (vmlaldavxq): Likewise.
12420 (vqmovuntq): Likewise.
12421 (vqmovuntq): Likewise.
12422 (vshlltq_n): Likewise.
12423 (vshlltq_n): Likewise.
12424 (vshllbq_n): Likewise.
12425 (vshllbq_n): Likewise.
12426 (vorrq_n): Likewise.
12427 (vorrq_n): Likewise.
12428 (vmlaldavq): Likewise.
12429 (vmlaldavq): Likewise.
12430 (vqmovunbq): Likewise.
12431 (vqmovunbq): Likewise.
12432 (vqdmulltq_n): Likewise.
12433 (vqdmulltq_n): Likewise.
12434 (vqdmulltq): Likewise.
12435 (vqdmulltq): Likewise.
12436 (vqdmullbq_n): Likewise.
12437 (vqdmullbq_n): Likewise.
12438 (vqdmullbq): Likewise.
12439 (vqdmullbq): Likewise.
12440 (vaddlvaq): Likewise.
12441 (vaddlvaq): Likewise.
12442 (vrmlaldavhq): Likewise.
12443 (vrmlaldavhq): Likewise.
12444 (vrmlaldavhxq): Likewise.
12445 (vrmlaldavhxq): Likewise.
12446 (vrmlsldavhq): Likewise.
12447 (vrmlsldavhq): Likewise.
12448 (vrmlsldavhxq): Likewise.
12449 (vrmlsldavhxq): Likewise.
12450 (vmlsldavxq): Likewise.
12451 (vmlsldavxq): Likewise.
12452 (vmlsldavq): Likewise.
12453 (vmlsldavq): Likewise.
12454 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
12455 (BINOP_NONE_NONE_NONE): Likewise.
12456 (BINOP_UNONE_NONE_NONE): Likewise.
12457 (BINOP_UNONE_UNONE_IMM): Likewise.
12458 (BINOP_UNONE_UNONE_NONE): Likewise.
12459 (BINOP_UNONE_UNONE_UNONE): Likewise.
12460 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
12461 (mve_vaddlvaq_<supf>v4si): Likewise.
12462 (mve_vaddq_n_f<mode>): Likewise.
12463 (mve_vandq_f<mode>): Likewise.
12464 (mve_vbicq_f<mode>): Likewise.
12465 (mve_vbicq_n_<supf><mode>): Likewise.
12466 (mve_vcaddq_rot270_f<mode>): Likewise.
12467 (mve_vcaddq_rot90_f<mode>): Likewise.
12468 (mve_vcmpeqq_f<mode>): Likewise.
12469 (mve_vcmpeqq_n_f<mode>): Likewise.
12470 (mve_vcmpgeq_f<mode>): Likewise.
12471 (mve_vcmpgeq_n_f<mode>): Likewise.
12472 (mve_vcmpgtq_f<mode>): Likewise.
12473 (mve_vcmpgtq_n_f<mode>): Likewise.
12474 (mve_vcmpleq_f<mode>): Likewise.
12475 (mve_vcmpleq_n_f<mode>): Likewise.
12476 (mve_vcmpltq_f<mode>): Likewise.
12477 (mve_vcmpltq_n_f<mode>): Likewise.
12478 (mve_vcmpneq_f<mode>): Likewise.
12479 (mve_vcmpneq_n_f<mode>): Likewise.
12480 (mve_vcmulq_f<mode>): Likewise.
12481 (mve_vcmulq_rot180_f<mode>): Likewise.
12482 (mve_vcmulq_rot270_f<mode>): Likewise.
12483 (mve_vcmulq_rot90_f<mode>): Likewise.
12484 (mve_vctp<mode1>q_mhi): Likewise.
12485 (mve_vcvtbq_f16_f32v8hf): Likewise.
12486 (mve_vcvttq_f16_f32v8hf): Likewise.
12487 (mve_veorq_f<mode>): Likewise.
12488 (mve_vmaxnmaq_f<mode>): Likewise.
12489 (mve_vmaxnmavq_f<mode>): Likewise.
12490 (mve_vmaxnmq_f<mode>): Likewise.
12491 (mve_vmaxnmvq_f<mode>): Likewise.
12492 (mve_vminnmaq_f<mode>): Likewise.
12493 (mve_vminnmavq_f<mode>): Likewise.
12494 (mve_vminnmq_f<mode>): Likewise.
12495 (mve_vminnmvq_f<mode>): Likewise.
12496 (mve_vmlaldavq_<supf><mode>): Likewise.
12497 (mve_vmlaldavxq_<supf><mode>): Likewise.
12498 (mve_vmlsldavq_s<mode>): Likewise.
12499 (mve_vmlsldavxq_s<mode>): Likewise.
12500 (mve_vmovnbq_<supf><mode>): Likewise.
12501 (mve_vmovntq_<supf><mode>): Likewise.
12502 (mve_vmulq_f<mode>): Likewise.
12503 (mve_vmulq_n_f<mode>): Likewise.
12504 (mve_vornq_f<mode>): Likewise.
12505 (mve_vorrq_f<mode>): Likewise.
12506 (mve_vorrq_n_<supf><mode>): Likewise.
12507 (mve_vqdmullbq_n_s<mode>): Likewise.
12508 (mve_vqdmullbq_s<mode>): Likewise.
12509 (mve_vqdmulltq_n_s<mode>): Likewise.
12510 (mve_vqdmulltq_s<mode>): Likewise.
12511 (mve_vqmovnbq_<supf><mode>): Likewise.
12512 (mve_vqmovntq_<supf><mode>): Likewise.
12513 (mve_vqmovunbq_s<mode>): Likewise.
12514 (mve_vqmovuntq_s<mode>): Likewise.
12515 (mve_vrmlaldavhxq_sv4si): Likewise.
12516 (mve_vrmlsldavhq_sv4si): Likewise.
12517 (mve_vrmlsldavhxq_sv4si): Likewise.
12518 (mve_vshllbq_n_<supf><mode>): Likewise.
12519 (mve_vshlltq_n_<supf><mode>): Likewise.
12520 (mve_vsubq_f<mode>): Likewise.
12521 (mve_vmulltq_poly_p<mode>): Likewise.
12522 (mve_vmullbq_poly_p<mode>): Likewise.
12523 (mve_vrmlaldavhq_<supf>v4si): Likewise.
12525 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12526 Mihail Ionescu <mihail.ionescu@arm.com>
12527 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12529 * config/arm/arm_mve.h (vsubq_u8): Define macro.
12530 (vsubq_n_u8): Likewise.
12531 (vrmulhq_u8): Likewise.
12532 (vrhaddq_u8): Likewise.
12533 (vqsubq_u8): Likewise.
12534 (vqsubq_n_u8): Likewise.
12535 (vqaddq_u8): Likewise.
12536 (vqaddq_n_u8): Likewise.
12537 (vorrq_u8): Likewise.
12538 (vornq_u8): Likewise.
12539 (vmulq_u8): Likewise.
12540 (vmulq_n_u8): Likewise.
12541 (vmulltq_int_u8): Likewise.
12542 (vmullbq_int_u8): Likewise.
12543 (vmulhq_u8): Likewise.
12544 (vmladavq_u8): Likewise.
12545 (vminvq_u8): Likewise.
12546 (vminq_u8): Likewise.
12547 (vmaxvq_u8): Likewise.
12548 (vmaxq_u8): Likewise.
12549 (vhsubq_u8): Likewise.
12550 (vhsubq_n_u8): Likewise.
12551 (vhaddq_u8): Likewise.
12552 (vhaddq_n_u8): Likewise.
12553 (veorq_u8): Likewise.
12554 (vcmpneq_n_u8): Likewise.
12555 (vcmphiq_u8): Likewise.
12556 (vcmphiq_n_u8): Likewise.
12557 (vcmpeqq_u8): Likewise.
12558 (vcmpeqq_n_u8): Likewise.
12559 (vcmpcsq_u8): Likewise.
12560 (vcmpcsq_n_u8): Likewise.
12561 (vcaddq_rot90_u8): Likewise.
12562 (vcaddq_rot270_u8): Likewise.
12563 (vbicq_u8): Likewise.
12564 (vandq_u8): Likewise.
12565 (vaddvq_p_u8): Likewise.
12566 (vaddvaq_u8): Likewise.
12567 (vaddq_n_u8): Likewise.
12568 (vabdq_u8): Likewise.
12569 (vshlq_r_u8): Likewise.
12570 (vrshlq_u8): Likewise.
12571 (vrshlq_n_u8): Likewise.
12572 (vqshlq_u8): Likewise.
12573 (vqshlq_r_u8): Likewise.
12574 (vqrshlq_u8): Likewise.
12575 (vqrshlq_n_u8): Likewise.
12576 (vminavq_s8): Likewise.
12577 (vminaq_s8): Likewise.
12578 (vmaxavq_s8): Likewise.
12579 (vmaxaq_s8): Likewise.
12580 (vbrsrq_n_u8): Likewise.
12581 (vshlq_n_u8): Likewise.
12582 (vrshrq_n_u8): Likewise.
12583 (vqshlq_n_u8): Likewise.
12584 (vcmpneq_n_s8): Likewise.
12585 (vcmpltq_s8): Likewise.
12586 (vcmpltq_n_s8): Likewise.
12587 (vcmpleq_s8): Likewise.
12588 (vcmpleq_n_s8): Likewise.
12589 (vcmpgtq_s8): Likewise.
12590 (vcmpgtq_n_s8): Likewise.
12591 (vcmpgeq_s8): Likewise.
12592 (vcmpgeq_n_s8): Likewise.
12593 (vcmpeqq_s8): Likewise.
12594 (vcmpeqq_n_s8): Likewise.
12595 (vqshluq_n_s8): Likewise.
12596 (vaddvq_p_s8): Likewise.
12597 (vsubq_s8): Likewise.
12598 (vsubq_n_s8): Likewise.
12599 (vshlq_r_s8): Likewise.
12600 (vrshlq_s8): Likewise.
12601 (vrshlq_n_s8): Likewise.
12602 (vrmulhq_s8): Likewise.
12603 (vrhaddq_s8): Likewise.
12604 (vqsubq_s8): Likewise.
12605 (vqsubq_n_s8): Likewise.
12606 (vqshlq_s8): Likewise.
12607 (vqshlq_r_s8): Likewise.
12608 (vqrshlq_s8): Likewise.
12609 (vqrshlq_n_s8): Likewise.
12610 (vqrdmulhq_s8): Likewise.
12611 (vqrdmulhq_n_s8): Likewise.
12612 (vqdmulhq_s8): Likewise.
12613 (vqdmulhq_n_s8): Likewise.
12614 (vqaddq_s8): Likewise.
12615 (vqaddq_n_s8): Likewise.
12616 (vorrq_s8): Likewise.
12617 (vornq_s8): Likewise.
12618 (vmulq_s8): Likewise.
12619 (vmulq_n_s8): Likewise.
12620 (vmulltq_int_s8): Likewise.
12621 (vmullbq_int_s8): Likewise.
12622 (vmulhq_s8): Likewise.
12623 (vmlsdavxq_s8): Likewise.
12624 (vmlsdavq_s8): Likewise.
12625 (vmladavxq_s8): Likewise.
12626 (vmladavq_s8): Likewise.
12627 (vminvq_s8): Likewise.
12628 (vminq_s8): Likewise.
12629 (vmaxvq_s8): Likewise.
12630 (vmaxq_s8): Likewise.
12631 (vhsubq_s8): Likewise.
12632 (vhsubq_n_s8): Likewise.
12633 (vhcaddq_rot90_s8): Likewise.
12634 (vhcaddq_rot270_s8): Likewise.
12635 (vhaddq_s8): Likewise.
12636 (vhaddq_n_s8): Likewise.
12637 (veorq_s8): Likewise.
12638 (vcaddq_rot90_s8): Likewise.
12639 (vcaddq_rot270_s8): Likewise.
12640 (vbrsrq_n_s8): Likewise.
12641 (vbicq_s8): Likewise.
12642 (vandq_s8): Likewise.
12643 (vaddvaq_s8): Likewise.
12644 (vaddq_n_s8): Likewise.
12645 (vabdq_s8): Likewise.
12646 (vshlq_n_s8): Likewise.
12647 (vrshrq_n_s8): Likewise.
12648 (vqshlq_n_s8): Likewise.
12649 (vsubq_u16): Likewise.
12650 (vsubq_n_u16): Likewise.
12651 (vrmulhq_u16): Likewise.
12652 (vrhaddq_u16): Likewise.
12653 (vqsubq_u16): Likewise.
12654 (vqsubq_n_u16): Likewise.
12655 (vqaddq_u16): Likewise.
12656 (vqaddq_n_u16): Likewise.
12657 (vorrq_u16): Likewise.
12658 (vornq_u16): Likewise.
12659 (vmulq_u16): Likewise.
12660 (vmulq_n_u16): Likewise.
12661 (vmulltq_int_u16): Likewise.
12662 (vmullbq_int_u16): Likewise.
12663 (vmulhq_u16): Likewise.
12664 (vmladavq_u16): Likewise.
12665 (vminvq_u16): Likewise.
12666 (vminq_u16): Likewise.
12667 (vmaxvq_u16): Likewise.
12668 (vmaxq_u16): Likewise.
12669 (vhsubq_u16): Likewise.
12670 (vhsubq_n_u16): Likewise.
12671 (vhaddq_u16): Likewise.
12672 (vhaddq_n_u16): Likewise.
12673 (veorq_u16): Likewise.
12674 (vcmpneq_n_u16): Likewise.
12675 (vcmphiq_u16): Likewise.
12676 (vcmphiq_n_u16): Likewise.
12677 (vcmpeqq_u16): Likewise.
12678 (vcmpeqq_n_u16): Likewise.
12679 (vcmpcsq_u16): Likewise.
12680 (vcmpcsq_n_u16): Likewise.
12681 (vcaddq_rot90_u16): Likewise.
12682 (vcaddq_rot270_u16): Likewise.
12683 (vbicq_u16): Likewise.
12684 (vandq_u16): Likewise.
12685 (vaddvq_p_u16): Likewise.
12686 (vaddvaq_u16): Likewise.
12687 (vaddq_n_u16): Likewise.
12688 (vabdq_u16): Likewise.
12689 (vshlq_r_u16): Likewise.
12690 (vrshlq_u16): Likewise.
12691 (vrshlq_n_u16): Likewise.
12692 (vqshlq_u16): Likewise.
12693 (vqshlq_r_u16): Likewise.
12694 (vqrshlq_u16): Likewise.
12695 (vqrshlq_n_u16): Likewise.
12696 (vminavq_s16): Likewise.
12697 (vminaq_s16): Likewise.
12698 (vmaxavq_s16): Likewise.
12699 (vmaxaq_s16): Likewise.
12700 (vbrsrq_n_u16): Likewise.
12701 (vshlq_n_u16): Likewise.
12702 (vrshrq_n_u16): Likewise.
12703 (vqshlq_n_u16): Likewise.
12704 (vcmpneq_n_s16): Likewise.
12705 (vcmpltq_s16): Likewise.
12706 (vcmpltq_n_s16): Likewise.
12707 (vcmpleq_s16): Likewise.
12708 (vcmpleq_n_s16): Likewise.
12709 (vcmpgtq_s16): Likewise.
12710 (vcmpgtq_n_s16): Likewise.
12711 (vcmpgeq_s16): Likewise.
12712 (vcmpgeq_n_s16): Likewise.
12713 (vcmpeqq_s16): Likewise.
12714 (vcmpeqq_n_s16): Likewise.
12715 (vqshluq_n_s16): Likewise.
12716 (vaddvq_p_s16): Likewise.
12717 (vsubq_s16): Likewise.
12718 (vsubq_n_s16): Likewise.
12719 (vshlq_r_s16): Likewise.
12720 (vrshlq_s16): Likewise.
12721 (vrshlq_n_s16): Likewise.
12722 (vrmulhq_s16): Likewise.
12723 (vrhaddq_s16): Likewise.
12724 (vqsubq_s16): Likewise.
12725 (vqsubq_n_s16): Likewise.
12726 (vqshlq_s16): Likewise.
12727 (vqshlq_r_s16): Likewise.
12728 (vqrshlq_s16): Likewise.
12729 (vqrshlq_n_s16): Likewise.
12730 (vqrdmulhq_s16): Likewise.
12731 (vqrdmulhq_n_s16): Likewise.
12732 (vqdmulhq_s16): Likewise.
12733 (vqdmulhq_n_s16): Likewise.
12734 (vqaddq_s16): Likewise.
12735 (vqaddq_n_s16): Likewise.
12736 (vorrq_s16): Likewise.
12737 (vornq_s16): Likewise.
12738 (vmulq_s16): Likewise.
12739 (vmulq_n_s16): Likewise.
12740 (vmulltq_int_s16): Likewise.
12741 (vmullbq_int_s16): Likewise.
12742 (vmulhq_s16): Likewise.
12743 (vmlsdavxq_s16): Likewise.
12744 (vmlsdavq_s16): Likewise.
12745 (vmladavxq_s16): Likewise.
12746 (vmladavq_s16): Likewise.
12747 (vminvq_s16): Likewise.
12748 (vminq_s16): Likewise.
12749 (vmaxvq_s16): Likewise.
12750 (vmaxq_s16): Likewise.
12751 (vhsubq_s16): Likewise.
12752 (vhsubq_n_s16): Likewise.
12753 (vhcaddq_rot90_s16): Likewise.
12754 (vhcaddq_rot270_s16): Likewise.
12755 (vhaddq_s16): Likewise.
12756 (vhaddq_n_s16): Likewise.
12757 (veorq_s16): Likewise.
12758 (vcaddq_rot90_s16): Likewise.
12759 (vcaddq_rot270_s16): Likewise.
12760 (vbrsrq_n_s16): Likewise.
12761 (vbicq_s16): Likewise.
12762 (vandq_s16): Likewise.
12763 (vaddvaq_s16): Likewise.
12764 (vaddq_n_s16): Likewise.
12765 (vabdq_s16): Likewise.
12766 (vshlq_n_s16): Likewise.
12767 (vrshrq_n_s16): Likewise.
12768 (vqshlq_n_s16): Likewise.
12769 (vsubq_u32): Likewise.
12770 (vsubq_n_u32): Likewise.
12771 (vrmulhq_u32): Likewise.
12772 (vrhaddq_u32): Likewise.
12773 (vqsubq_u32): Likewise.
12774 (vqsubq_n_u32): Likewise.
12775 (vqaddq_u32): Likewise.
12776 (vqaddq_n_u32): Likewise.
12777 (vorrq_u32): Likewise.
12778 (vornq_u32): Likewise.
12779 (vmulq_u32): Likewise.
12780 (vmulq_n_u32): Likewise.
12781 (vmulltq_int_u32): Likewise.
12782 (vmullbq_int_u32): Likewise.
12783 (vmulhq_u32): Likewise.
12784 (vmladavq_u32): Likewise.
12785 (vminvq_u32): Likewise.
12786 (vminq_u32): Likewise.
12787 (vmaxvq_u32): Likewise.
12788 (vmaxq_u32): Likewise.
12789 (vhsubq_u32): Likewise.
12790 (vhsubq_n_u32): Likewise.
12791 (vhaddq_u32): Likewise.
12792 (vhaddq_n_u32): Likewise.
12793 (veorq_u32): Likewise.
12794 (vcmpneq_n_u32): Likewise.
12795 (vcmphiq_u32): Likewise.
12796 (vcmphiq_n_u32): Likewise.
12797 (vcmpeqq_u32): Likewise.
12798 (vcmpeqq_n_u32): Likewise.
12799 (vcmpcsq_u32): Likewise.
12800 (vcmpcsq_n_u32): Likewise.
12801 (vcaddq_rot90_u32): Likewise.
12802 (vcaddq_rot270_u32): Likewise.
12803 (vbicq_u32): Likewise.
12804 (vandq_u32): Likewise.
12805 (vaddvq_p_u32): Likewise.
12806 (vaddvaq_u32): Likewise.
12807 (vaddq_n_u32): Likewise.
12808 (vabdq_u32): Likewise.
12809 (vshlq_r_u32): Likewise.
12810 (vrshlq_u32): Likewise.
12811 (vrshlq_n_u32): Likewise.
12812 (vqshlq_u32): Likewise.
12813 (vqshlq_r_u32): Likewise.
12814 (vqrshlq_u32): Likewise.
12815 (vqrshlq_n_u32): Likewise.
12816 (vminavq_s32): Likewise.
12817 (vminaq_s32): Likewise.
12818 (vmaxavq_s32): Likewise.
12819 (vmaxaq_s32): Likewise.
12820 (vbrsrq_n_u32): Likewise.
12821 (vshlq_n_u32): Likewise.
12822 (vrshrq_n_u32): Likewise.
12823 (vqshlq_n_u32): Likewise.
12824 (vcmpneq_n_s32): Likewise.
12825 (vcmpltq_s32): Likewise.
12826 (vcmpltq_n_s32): Likewise.
12827 (vcmpleq_s32): Likewise.
12828 (vcmpleq_n_s32): Likewise.
12829 (vcmpgtq_s32): Likewise.
12830 (vcmpgtq_n_s32): Likewise.
12831 (vcmpgeq_s32): Likewise.
12832 (vcmpgeq_n_s32): Likewise.
12833 (vcmpeqq_s32): Likewise.
12834 (vcmpeqq_n_s32): Likewise.
12835 (vqshluq_n_s32): Likewise.
12836 (vaddvq_p_s32): Likewise.
12837 (vsubq_s32): Likewise.
12838 (vsubq_n_s32): Likewise.
12839 (vshlq_r_s32): Likewise.
12840 (vrshlq_s32): Likewise.
12841 (vrshlq_n_s32): Likewise.
12842 (vrmulhq_s32): Likewise.
12843 (vrhaddq_s32): Likewise.
12844 (vqsubq_s32): Likewise.
12845 (vqsubq_n_s32): Likewise.
12846 (vqshlq_s32): Likewise.
12847 (vqshlq_r_s32): Likewise.
12848 (vqrshlq_s32): Likewise.
12849 (vqrshlq_n_s32): Likewise.
12850 (vqrdmulhq_s32): Likewise.
12851 (vqrdmulhq_n_s32): Likewise.
12852 (vqdmulhq_s32): Likewise.
12853 (vqdmulhq_n_s32): Likewise.
12854 (vqaddq_s32): Likewise.
12855 (vqaddq_n_s32): Likewise.
12856 (vorrq_s32): Likewise.
12857 (vornq_s32): Likewise.
12858 (vmulq_s32): Likewise.
12859 (vmulq_n_s32): Likewise.
12860 (vmulltq_int_s32): Likewise.
12861 (vmullbq_int_s32): Likewise.
12862 (vmulhq_s32): Likewise.
12863 (vmlsdavxq_s32): Likewise.
12864 (vmlsdavq_s32): Likewise.
12865 (vmladavxq_s32): Likewise.
12866 (vmladavq_s32): Likewise.
12867 (vminvq_s32): Likewise.
12868 (vminq_s32): Likewise.
12869 (vmaxvq_s32): Likewise.
12870 (vmaxq_s32): Likewise.
12871 (vhsubq_s32): Likewise.
12872 (vhsubq_n_s32): Likewise.
12873 (vhcaddq_rot90_s32): Likewise.
12874 (vhcaddq_rot270_s32): Likewise.
12875 (vhaddq_s32): Likewise.
12876 (vhaddq_n_s32): Likewise.
12877 (veorq_s32): Likewise.
12878 (vcaddq_rot90_s32): Likewise.
12879 (vcaddq_rot270_s32): Likewise.
12880 (vbrsrq_n_s32): Likewise.
12881 (vbicq_s32): Likewise.
12882 (vandq_s32): Likewise.
12883 (vaddvaq_s32): Likewise.
12884 (vaddq_n_s32): Likewise.
12885 (vabdq_s32): Likewise.
12886 (vshlq_n_s32): Likewise.
12887 (vrshrq_n_s32): Likewise.
12888 (vqshlq_n_s32): Likewise.
12889 (__arm_vsubq_u8): Define intrinsic.
12890 (__arm_vsubq_n_u8): Likewise.
12891 (__arm_vrmulhq_u8): Likewise.
12892 (__arm_vrhaddq_u8): Likewise.
12893 (__arm_vqsubq_u8): Likewise.
12894 (__arm_vqsubq_n_u8): Likewise.
12895 (__arm_vqaddq_u8): Likewise.
12896 (__arm_vqaddq_n_u8): Likewise.
12897 (__arm_vorrq_u8): Likewise.
12898 (__arm_vornq_u8): Likewise.
12899 (__arm_vmulq_u8): Likewise.
12900 (__arm_vmulq_n_u8): Likewise.
12901 (__arm_vmulltq_int_u8): Likewise.
12902 (__arm_vmullbq_int_u8): Likewise.
12903 (__arm_vmulhq_u8): Likewise.
12904 (__arm_vmladavq_u8): Likewise.
12905 (__arm_vminvq_u8): Likewise.
12906 (__arm_vminq_u8): Likewise.
12907 (__arm_vmaxvq_u8): Likewise.
12908 (__arm_vmaxq_u8): Likewise.
12909 (__arm_vhsubq_u8): Likewise.
12910 (__arm_vhsubq_n_u8): Likewise.
12911 (__arm_vhaddq_u8): Likewise.
12912 (__arm_vhaddq_n_u8): Likewise.
12913 (__arm_veorq_u8): Likewise.
12914 (__arm_vcmpneq_n_u8): Likewise.
12915 (__arm_vcmphiq_u8): Likewise.
12916 (__arm_vcmphiq_n_u8): Likewise.
12917 (__arm_vcmpeqq_u8): Likewise.
12918 (__arm_vcmpeqq_n_u8): Likewise.
12919 (__arm_vcmpcsq_u8): Likewise.
12920 (__arm_vcmpcsq_n_u8): Likewise.
12921 (__arm_vcaddq_rot90_u8): Likewise.
12922 (__arm_vcaddq_rot270_u8): Likewise.
12923 (__arm_vbicq_u8): Likewise.
12924 (__arm_vandq_u8): Likewise.
12925 (__arm_vaddvq_p_u8): Likewise.
12926 (__arm_vaddvaq_u8): Likewise.
12927 (__arm_vaddq_n_u8): Likewise.
12928 (__arm_vabdq_u8): Likewise.
12929 (__arm_vshlq_r_u8): Likewise.
12930 (__arm_vrshlq_u8): Likewise.
12931 (__arm_vrshlq_n_u8): Likewise.
12932 (__arm_vqshlq_u8): Likewise.
12933 (__arm_vqshlq_r_u8): Likewise.
12934 (__arm_vqrshlq_u8): Likewise.
12935 (__arm_vqrshlq_n_u8): Likewise.
12936 (__arm_vminavq_s8): Likewise.
12937 (__arm_vminaq_s8): Likewise.
12938 (__arm_vmaxavq_s8): Likewise.
12939 (__arm_vmaxaq_s8): Likewise.
12940 (__arm_vbrsrq_n_u8): Likewise.
12941 (__arm_vshlq_n_u8): Likewise.
12942 (__arm_vrshrq_n_u8): Likewise.
12943 (__arm_vqshlq_n_u8): Likewise.
12944 (__arm_vcmpneq_n_s8): Likewise.
12945 (__arm_vcmpltq_s8): Likewise.
12946 (__arm_vcmpltq_n_s8): Likewise.
12947 (__arm_vcmpleq_s8): Likewise.
12948 (__arm_vcmpleq_n_s8): Likewise.
12949 (__arm_vcmpgtq_s8): Likewise.
12950 (__arm_vcmpgtq_n_s8): Likewise.
12951 (__arm_vcmpgeq_s8): Likewise.
12952 (__arm_vcmpgeq_n_s8): Likewise.
12953 (__arm_vcmpeqq_s8): Likewise.
12954 (__arm_vcmpeqq_n_s8): Likewise.
12955 (__arm_vqshluq_n_s8): Likewise.
12956 (__arm_vaddvq_p_s8): Likewise.
12957 (__arm_vsubq_s8): Likewise.
12958 (__arm_vsubq_n_s8): Likewise.
12959 (__arm_vshlq_r_s8): Likewise.
12960 (__arm_vrshlq_s8): Likewise.
12961 (__arm_vrshlq_n_s8): Likewise.
12962 (__arm_vrmulhq_s8): Likewise.
12963 (__arm_vrhaddq_s8): Likewise.
12964 (__arm_vqsubq_s8): Likewise.
12965 (__arm_vqsubq_n_s8): Likewise.
12966 (__arm_vqshlq_s8): Likewise.
12967 (__arm_vqshlq_r_s8): Likewise.
12968 (__arm_vqrshlq_s8): Likewise.
12969 (__arm_vqrshlq_n_s8): Likewise.
12970 (__arm_vqrdmulhq_s8): Likewise.
12971 (__arm_vqrdmulhq_n_s8): Likewise.
12972 (__arm_vqdmulhq_s8): Likewise.
12973 (__arm_vqdmulhq_n_s8): Likewise.
12974 (__arm_vqaddq_s8): Likewise.
12975 (__arm_vqaddq_n_s8): Likewise.
12976 (__arm_vorrq_s8): Likewise.
12977 (__arm_vornq_s8): Likewise.
12978 (__arm_vmulq_s8): Likewise.
12979 (__arm_vmulq_n_s8): Likewise.
12980 (__arm_vmulltq_int_s8): Likewise.
12981 (__arm_vmullbq_int_s8): Likewise.
12982 (__arm_vmulhq_s8): Likewise.
12983 (__arm_vmlsdavxq_s8): Likewise.
12984 (__arm_vmlsdavq_s8): Likewise.
12985 (__arm_vmladavxq_s8): Likewise.
12986 (__arm_vmladavq_s8): Likewise.
12987 (__arm_vminvq_s8): Likewise.
12988 (__arm_vminq_s8): Likewise.
12989 (__arm_vmaxvq_s8): Likewise.
12990 (__arm_vmaxq_s8): Likewise.
12991 (__arm_vhsubq_s8): Likewise.
12992 (__arm_vhsubq_n_s8): Likewise.
12993 (__arm_vhcaddq_rot90_s8): Likewise.
12994 (__arm_vhcaddq_rot270_s8): Likewise.
12995 (__arm_vhaddq_s8): Likewise.
12996 (__arm_vhaddq_n_s8): Likewise.
12997 (__arm_veorq_s8): Likewise.
12998 (__arm_vcaddq_rot90_s8): Likewise.
12999 (__arm_vcaddq_rot270_s8): Likewise.
13000 (__arm_vbrsrq_n_s8): Likewise.
13001 (__arm_vbicq_s8): Likewise.
13002 (__arm_vandq_s8): Likewise.
13003 (__arm_vaddvaq_s8): Likewise.
13004 (__arm_vaddq_n_s8): Likewise.
13005 (__arm_vabdq_s8): Likewise.
13006 (__arm_vshlq_n_s8): Likewise.
13007 (__arm_vrshrq_n_s8): Likewise.
13008 (__arm_vqshlq_n_s8): Likewise.
13009 (__arm_vsubq_u16): Likewise.
13010 (__arm_vsubq_n_u16): Likewise.
13011 (__arm_vrmulhq_u16): Likewise.
13012 (__arm_vrhaddq_u16): Likewise.
13013 (__arm_vqsubq_u16): Likewise.
13014 (__arm_vqsubq_n_u16): Likewise.
13015 (__arm_vqaddq_u16): Likewise.
13016 (__arm_vqaddq_n_u16): Likewise.
13017 (__arm_vorrq_u16): Likewise.
13018 (__arm_vornq_u16): Likewise.
13019 (__arm_vmulq_u16): Likewise.
13020 (__arm_vmulq_n_u16): Likewise.
13021 (__arm_vmulltq_int_u16): Likewise.
13022 (__arm_vmullbq_int_u16): Likewise.
13023 (__arm_vmulhq_u16): Likewise.
13024 (__arm_vmladavq_u16): Likewise.
13025 (__arm_vminvq_u16): Likewise.
13026 (__arm_vminq_u16): Likewise.
13027 (__arm_vmaxvq_u16): Likewise.
13028 (__arm_vmaxq_u16): Likewise.
13029 (__arm_vhsubq_u16): Likewise.
13030 (__arm_vhsubq_n_u16): Likewise.
13031 (__arm_vhaddq_u16): Likewise.
13032 (__arm_vhaddq_n_u16): Likewise.
13033 (__arm_veorq_u16): Likewise.
13034 (__arm_vcmpneq_n_u16): Likewise.
13035 (__arm_vcmphiq_u16): Likewise.
13036 (__arm_vcmphiq_n_u16): Likewise.
13037 (__arm_vcmpeqq_u16): Likewise.
13038 (__arm_vcmpeqq_n_u16): Likewise.
13039 (__arm_vcmpcsq_u16): Likewise.
13040 (__arm_vcmpcsq_n_u16): Likewise.
13041 (__arm_vcaddq_rot90_u16): Likewise.
13042 (__arm_vcaddq_rot270_u16): Likewise.
13043 (__arm_vbicq_u16): Likewise.
13044 (__arm_vandq_u16): Likewise.
13045 (__arm_vaddvq_p_u16): Likewise.
13046 (__arm_vaddvaq_u16): Likewise.
13047 (__arm_vaddq_n_u16): Likewise.
13048 (__arm_vabdq_u16): Likewise.
13049 (__arm_vshlq_r_u16): Likewise.
13050 (__arm_vrshlq_u16): Likewise.
13051 (__arm_vrshlq_n_u16): Likewise.
13052 (__arm_vqshlq_u16): Likewise.
13053 (__arm_vqshlq_r_u16): Likewise.
13054 (__arm_vqrshlq_u16): Likewise.
13055 (__arm_vqrshlq_n_u16): Likewise.
13056 (__arm_vminavq_s16): Likewise.
13057 (__arm_vminaq_s16): Likewise.
13058 (__arm_vmaxavq_s16): Likewise.
13059 (__arm_vmaxaq_s16): Likewise.
13060 (__arm_vbrsrq_n_u16): Likewise.
13061 (__arm_vshlq_n_u16): Likewise.
13062 (__arm_vrshrq_n_u16): Likewise.
13063 (__arm_vqshlq_n_u16): Likewise.
13064 (__arm_vcmpneq_n_s16): Likewise.
13065 (__arm_vcmpltq_s16): Likewise.
13066 (__arm_vcmpltq_n_s16): Likewise.
13067 (__arm_vcmpleq_s16): Likewise.
13068 (__arm_vcmpleq_n_s16): Likewise.
13069 (__arm_vcmpgtq_s16): Likewise.
13070 (__arm_vcmpgtq_n_s16): Likewise.
13071 (__arm_vcmpgeq_s16): Likewise.
13072 (__arm_vcmpgeq_n_s16): Likewise.
13073 (__arm_vcmpeqq_s16): Likewise.
13074 (__arm_vcmpeqq_n_s16): Likewise.
13075 (__arm_vqshluq_n_s16): Likewise.
13076 (__arm_vaddvq_p_s16): Likewise.
13077 (__arm_vsubq_s16): Likewise.
13078 (__arm_vsubq_n_s16): Likewise.
13079 (__arm_vshlq_r_s16): Likewise.
13080 (__arm_vrshlq_s16): Likewise.
13081 (__arm_vrshlq_n_s16): Likewise.
13082 (__arm_vrmulhq_s16): Likewise.
13083 (__arm_vrhaddq_s16): Likewise.
13084 (__arm_vqsubq_s16): Likewise.
13085 (__arm_vqsubq_n_s16): Likewise.
13086 (__arm_vqshlq_s16): Likewise.
13087 (__arm_vqshlq_r_s16): Likewise.
13088 (__arm_vqrshlq_s16): Likewise.
13089 (__arm_vqrshlq_n_s16): Likewise.
13090 (__arm_vqrdmulhq_s16): Likewise.
13091 (__arm_vqrdmulhq_n_s16): Likewise.
13092 (__arm_vqdmulhq_s16): Likewise.
13093 (__arm_vqdmulhq_n_s16): Likewise.
13094 (__arm_vqaddq_s16): Likewise.
13095 (__arm_vqaddq_n_s16): Likewise.
13096 (__arm_vorrq_s16): Likewise.
13097 (__arm_vornq_s16): Likewise.
13098 (__arm_vmulq_s16): Likewise.
13099 (__arm_vmulq_n_s16): Likewise.
13100 (__arm_vmulltq_int_s16): Likewise.
13101 (__arm_vmullbq_int_s16): Likewise.
13102 (__arm_vmulhq_s16): Likewise.
13103 (__arm_vmlsdavxq_s16): Likewise.
13104 (__arm_vmlsdavq_s16): Likewise.
13105 (__arm_vmladavxq_s16): Likewise.
13106 (__arm_vmladavq_s16): Likewise.
13107 (__arm_vminvq_s16): Likewise.
13108 (__arm_vminq_s16): Likewise.
13109 (__arm_vmaxvq_s16): Likewise.
13110 (__arm_vmaxq_s16): Likewise.
13111 (__arm_vhsubq_s16): Likewise.
13112 (__arm_vhsubq_n_s16): Likewise.
13113 (__arm_vhcaddq_rot90_s16): Likewise.
13114 (__arm_vhcaddq_rot270_s16): Likewise.
13115 (__arm_vhaddq_s16): Likewise.
13116 (__arm_vhaddq_n_s16): Likewise.
13117 (__arm_veorq_s16): Likewise.
13118 (__arm_vcaddq_rot90_s16): Likewise.
13119 (__arm_vcaddq_rot270_s16): Likewise.
13120 (__arm_vbrsrq_n_s16): Likewise.
13121 (__arm_vbicq_s16): Likewise.
13122 (__arm_vandq_s16): Likewise.
13123 (__arm_vaddvaq_s16): Likewise.
13124 (__arm_vaddq_n_s16): Likewise.
13125 (__arm_vabdq_s16): Likewise.
13126 (__arm_vshlq_n_s16): Likewise.
13127 (__arm_vrshrq_n_s16): Likewise.
13128 (__arm_vqshlq_n_s16): Likewise.
13129 (__arm_vsubq_u32): Likewise.
13130 (__arm_vsubq_n_u32): Likewise.
13131 (__arm_vrmulhq_u32): Likewise.
13132 (__arm_vrhaddq_u32): Likewise.
13133 (__arm_vqsubq_u32): Likewise.
13134 (__arm_vqsubq_n_u32): Likewise.
13135 (__arm_vqaddq_u32): Likewise.
13136 (__arm_vqaddq_n_u32): Likewise.
13137 (__arm_vorrq_u32): Likewise.
13138 (__arm_vornq_u32): Likewise.
13139 (__arm_vmulq_u32): Likewise.
13140 (__arm_vmulq_n_u32): Likewise.
13141 (__arm_vmulltq_int_u32): Likewise.
13142 (__arm_vmullbq_int_u32): Likewise.
13143 (__arm_vmulhq_u32): Likewise.
13144 (__arm_vmladavq_u32): Likewise.
13145 (__arm_vminvq_u32): Likewise.
13146 (__arm_vminq_u32): Likewise.
13147 (__arm_vmaxvq_u32): Likewise.
13148 (__arm_vmaxq_u32): Likewise.
13149 (__arm_vhsubq_u32): Likewise.
13150 (__arm_vhsubq_n_u32): Likewise.
13151 (__arm_vhaddq_u32): Likewise.
13152 (__arm_vhaddq_n_u32): Likewise.
13153 (__arm_veorq_u32): Likewise.
13154 (__arm_vcmpneq_n_u32): Likewise.
13155 (__arm_vcmphiq_u32): Likewise.
13156 (__arm_vcmphiq_n_u32): Likewise.
13157 (__arm_vcmpeqq_u32): Likewise.
13158 (__arm_vcmpeqq_n_u32): Likewise.
13159 (__arm_vcmpcsq_u32): Likewise.
13160 (__arm_vcmpcsq_n_u32): Likewise.
13161 (__arm_vcaddq_rot90_u32): Likewise.
13162 (__arm_vcaddq_rot270_u32): Likewise.
13163 (__arm_vbicq_u32): Likewise.
13164 (__arm_vandq_u32): Likewise.
13165 (__arm_vaddvq_p_u32): Likewise.
13166 (__arm_vaddvaq_u32): Likewise.
13167 (__arm_vaddq_n_u32): Likewise.
13168 (__arm_vabdq_u32): Likewise.
13169 (__arm_vshlq_r_u32): Likewise.
13170 (__arm_vrshlq_u32): Likewise.
13171 (__arm_vrshlq_n_u32): Likewise.
13172 (__arm_vqshlq_u32): Likewise.
13173 (__arm_vqshlq_r_u32): Likewise.
13174 (__arm_vqrshlq_u32): Likewise.
13175 (__arm_vqrshlq_n_u32): Likewise.
13176 (__arm_vminavq_s32): Likewise.
13177 (__arm_vminaq_s32): Likewise.
13178 (__arm_vmaxavq_s32): Likewise.
13179 (__arm_vmaxaq_s32): Likewise.
13180 (__arm_vbrsrq_n_u32): Likewise.
13181 (__arm_vshlq_n_u32): Likewise.
13182 (__arm_vrshrq_n_u32): Likewise.
13183 (__arm_vqshlq_n_u32): Likewise.
13184 (__arm_vcmpneq_n_s32): Likewise.
13185 (__arm_vcmpltq_s32): Likewise.
13186 (__arm_vcmpltq_n_s32): Likewise.
13187 (__arm_vcmpleq_s32): Likewise.
13188 (__arm_vcmpleq_n_s32): Likewise.
13189 (__arm_vcmpgtq_s32): Likewise.
13190 (__arm_vcmpgtq_n_s32): Likewise.
13191 (__arm_vcmpgeq_s32): Likewise.
13192 (__arm_vcmpgeq_n_s32): Likewise.
13193 (__arm_vcmpeqq_s32): Likewise.
13194 (__arm_vcmpeqq_n_s32): Likewise.
13195 (__arm_vqshluq_n_s32): Likewise.
13196 (__arm_vaddvq_p_s32): Likewise.
13197 (__arm_vsubq_s32): Likewise.
13198 (__arm_vsubq_n_s32): Likewise.
13199 (__arm_vshlq_r_s32): Likewise.
13200 (__arm_vrshlq_s32): Likewise.
13201 (__arm_vrshlq_n_s32): Likewise.
13202 (__arm_vrmulhq_s32): Likewise.
13203 (__arm_vrhaddq_s32): Likewise.
13204 (__arm_vqsubq_s32): Likewise.
13205 (__arm_vqsubq_n_s32): Likewise.
13206 (__arm_vqshlq_s32): Likewise.
13207 (__arm_vqshlq_r_s32): Likewise.
13208 (__arm_vqrshlq_s32): Likewise.
13209 (__arm_vqrshlq_n_s32): Likewise.
13210 (__arm_vqrdmulhq_s32): Likewise.
13211 (__arm_vqrdmulhq_n_s32): Likewise.
13212 (__arm_vqdmulhq_s32): Likewise.
13213 (__arm_vqdmulhq_n_s32): Likewise.
13214 (__arm_vqaddq_s32): Likewise.
13215 (__arm_vqaddq_n_s32): Likewise.
13216 (__arm_vorrq_s32): Likewise.
13217 (__arm_vornq_s32): Likewise.
13218 (__arm_vmulq_s32): Likewise.
13219 (__arm_vmulq_n_s32): Likewise.
13220 (__arm_vmulltq_int_s32): Likewise.
13221 (__arm_vmullbq_int_s32): Likewise.
13222 (__arm_vmulhq_s32): Likewise.
13223 (__arm_vmlsdavxq_s32): Likewise.
13224 (__arm_vmlsdavq_s32): Likewise.
13225 (__arm_vmladavxq_s32): Likewise.
13226 (__arm_vmladavq_s32): Likewise.
13227 (__arm_vminvq_s32): Likewise.
13228 (__arm_vminq_s32): Likewise.
13229 (__arm_vmaxvq_s32): Likewise.
13230 (__arm_vmaxq_s32): Likewise.
13231 (__arm_vhsubq_s32): Likewise.
13232 (__arm_vhsubq_n_s32): Likewise.
13233 (__arm_vhcaddq_rot90_s32): Likewise.
13234 (__arm_vhcaddq_rot270_s32): Likewise.
13235 (__arm_vhaddq_s32): Likewise.
13236 (__arm_vhaddq_n_s32): Likewise.
13237 (__arm_veorq_s32): Likewise.
13238 (__arm_vcaddq_rot90_s32): Likewise.
13239 (__arm_vcaddq_rot270_s32): Likewise.
13240 (__arm_vbrsrq_n_s32): Likewise.
13241 (__arm_vbicq_s32): Likewise.
13242 (__arm_vandq_s32): Likewise.
13243 (__arm_vaddvaq_s32): Likewise.
13244 (__arm_vaddq_n_s32): Likewise.
13245 (__arm_vabdq_s32): Likewise.
13246 (__arm_vshlq_n_s32): Likewise.
13247 (__arm_vrshrq_n_s32): Likewise.
13248 (__arm_vqshlq_n_s32): Likewise.
13249 (vsubq): Define polymorphic variant.
13250 (vsubq_n): Likewise.
13251 (vshlq_r): Likewise.
13252 (vrshlq_n): Likewise.
13253 (vrshlq): Likewise.
13254 (vrmulhq): Likewise.
13255 (vrhaddq): Likewise.
13256 (vqsubq_n): Likewise.
13257 (vqsubq): Likewise.
13258 (vqshlq): Likewise.
13259 (vqshlq_r): Likewise.
13260 (vqshluq): Likewise.
13261 (vrshrq_n): Likewise.
13262 (vshlq_n): Likewise.
13263 (vqshluq_n): Likewise.
13264 (vqshlq_n): Likewise.
13265 (vqrshlq_n): Likewise.
13266 (vqrshlq): Likewise.
13267 (vqrdmulhq_n): Likewise.
13268 (vqrdmulhq): Likewise.
13269 (vqdmulhq_n): Likewise.
13270 (vqdmulhq): Likewise.
13271 (vqaddq_n): Likewise.
13272 (vqaddq): Likewise.
13273 (vorrq_n): Likewise.
13276 (vmulq_n): Likewise.
13278 (vmulltq_int): Likewise.
13279 (vmullbq_int): Likewise.
13280 (vmulhq): Likewise.
13282 (vminaq): Likewise.
13284 (vmaxaq): Likewise.
13285 (vhsubq_n): Likewise.
13286 (vhsubq): Likewise.
13287 (vhcaddq_rot90): Likewise.
13288 (vhcaddq_rot270): Likewise.
13289 (vhaddq_n): Likewise.
13290 (vhaddq): Likewise.
13292 (vcaddq_rot90): Likewise.
13293 (vcaddq_rot270): Likewise.
13294 (vbrsrq_n): Likewise.
13295 (vbicq_n): Likewise.
13298 (vaddq_n): Likewise.
13301 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
13302 (BINOP_NONE_NONE_NONE): Likewise.
13303 (BINOP_NONE_NONE_UNONE): Likewise.
13304 (BINOP_UNONE_NONE_IMM): Likewise.
13305 (BINOP_UNONE_NONE_NONE): Likewise.
13306 (BINOP_UNONE_UNONE_IMM): Likewise.
13307 (BINOP_UNONE_UNONE_NONE): Likewise.
13308 (BINOP_UNONE_UNONE_UNONE): Likewise.
13309 * config/arm/constraints.md (Ra): Define constraint to check constant is
13310 in the range of 0 to 7.
13311 (Rg): Define constriant to check the constant is one among 1, 2, 4
13313 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
13314 (mve_vaddq_n_<supf>): Likewise.
13315 (mve_vaddvaq_<supf>): Likewise.
13316 (mve_vaddvq_p_<supf>): Likewise.
13317 (mve_vandq_<supf>): Likewise.
13318 (mve_vbicq_<supf>): Likewise.
13319 (mve_vbrsrq_n_<supf>): Likewise.
13320 (mve_vcaddq_rot270_<supf>): Likewise.
13321 (mve_vcaddq_rot90_<supf>): Likewise.
13322 (mve_vcmpcsq_n_u): Likewise.
13323 (mve_vcmpcsq_u): Likewise.
13324 (mve_vcmpeqq_n_<supf>): Likewise.
13325 (mve_vcmpeqq_<supf>): Likewise.
13326 (mve_vcmpgeq_n_s): Likewise.
13327 (mve_vcmpgeq_s): Likewise.
13328 (mve_vcmpgtq_n_s): Likewise.
13329 (mve_vcmpgtq_s): Likewise.
13330 (mve_vcmphiq_n_u): Likewise.
13331 (mve_vcmphiq_u): Likewise.
13332 (mve_vcmpleq_n_s): Likewise.
13333 (mve_vcmpleq_s): Likewise.
13334 (mve_vcmpltq_n_s): Likewise.
13335 (mve_vcmpltq_s): Likewise.
13336 (mve_vcmpneq_n_<supf>): Likewise.
13337 (mve_vddupq_n_u): Likewise.
13338 (mve_veorq_<supf>): Likewise.
13339 (mve_vhaddq_n_<supf>): Likewise.
13340 (mve_vhaddq_<supf>): Likewise.
13341 (mve_vhcaddq_rot270_s): Likewise.
13342 (mve_vhcaddq_rot90_s): Likewise.
13343 (mve_vhsubq_n_<supf>): Likewise.
13344 (mve_vhsubq_<supf>): Likewise.
13345 (mve_vidupq_n_u): Likewise.
13346 (mve_vmaxaq_s): Likewise.
13347 (mve_vmaxavq_s): Likewise.
13348 (mve_vmaxq_<supf>): Likewise.
13349 (mve_vmaxvq_<supf>): Likewise.
13350 (mve_vminaq_s): Likewise.
13351 (mve_vminavq_s): Likewise.
13352 (mve_vminq_<supf>): Likewise.
13353 (mve_vminvq_<supf>): Likewise.
13354 (mve_vmladavq_<supf>): Likewise.
13355 (mve_vmladavxq_s): Likewise.
13356 (mve_vmlsdavq_s): Likewise.
13357 (mve_vmlsdavxq_s): Likewise.
13358 (mve_vmulhq_<supf>): Likewise.
13359 (mve_vmullbq_int_<supf>): Likewise.
13360 (mve_vmulltq_int_<supf>): Likewise.
13361 (mve_vmulq_n_<supf>): Likewise.
13362 (mve_vmulq_<supf>): Likewise.
13363 (mve_vornq_<supf>): Likewise.
13364 (mve_vorrq_<supf>): Likewise.
13365 (mve_vqaddq_n_<supf>): Likewise.
13366 (mve_vqaddq_<supf>): Likewise.
13367 (mve_vqdmulhq_n_s): Likewise.
13368 (mve_vqdmulhq_s): Likewise.
13369 (mve_vqrdmulhq_n_s): Likewise.
13370 (mve_vqrdmulhq_s): Likewise.
13371 (mve_vqrshlq_n_<supf>): Likewise.
13372 (mve_vqrshlq_<supf>): Likewise.
13373 (mve_vqshlq_n_<supf>): Likewise.
13374 (mve_vqshlq_r_<supf>): Likewise.
13375 (mve_vqshlq_<supf>): Likewise.
13376 (mve_vqshluq_n_s): Likewise.
13377 (mve_vqsubq_n_<supf>): Likewise.
13378 (mve_vqsubq_<supf>): Likewise.
13379 (mve_vrhaddq_<supf>): Likewise.
13380 (mve_vrmulhq_<supf>): Likewise.
13381 (mve_vrshlq_n_<supf>): Likewise.
13382 (mve_vrshlq_<supf>): Likewise.
13383 (mve_vrshrq_n_<supf>): Likewise.
13384 (mve_vshlq_n_<supf>): Likewise.
13385 (mve_vshlq_r_<supf>): Likewise.
13386 (mve_vsubq_n_<supf>): Likewise.
13387 (mve_vsubq_<supf>): Likewise.
13388 * config/arm/predicates.md (mve_imm_7): Define predicate to check
13389 the matching constraint Ra.
13390 (mve_imm_selective_upto_8): Define predicate to check the matching
13393 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13394 Mihail Ionescu <mihail.ionescu@arm.com>
13395 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13397 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
13398 qualifier for binary operands.
13399 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
13400 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
13401 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
13402 (vaddlvq_p_u32): Likewise.
13403 (vcmpneq_s8): Likewise.
13404 (vcmpneq_s16): Likewise.
13405 (vcmpneq_s32): Likewise.
13406 (vcmpneq_u8): Likewise.
13407 (vcmpneq_u16): Likewise.
13408 (vcmpneq_u32): Likewise.
13409 (vshlq_s8): Likewise.
13410 (vshlq_s16): Likewise.
13411 (vshlq_s32): Likewise.
13412 (vshlq_u8): Likewise.
13413 (vshlq_u16): Likewise.
13414 (vshlq_u32): Likewise.
13415 (__arm_vaddlvq_p_s32): Define intrinsic.
13416 (__arm_vaddlvq_p_u32): Likewise.
13417 (__arm_vcmpneq_s8): Likewise.
13418 (__arm_vcmpneq_s16): Likewise.
13419 (__arm_vcmpneq_s32): Likewise.
13420 (__arm_vcmpneq_u8): Likewise.
13421 (__arm_vcmpneq_u16): Likewise.
13422 (__arm_vcmpneq_u32): Likewise.
13423 (__arm_vshlq_s8): Likewise.
13424 (__arm_vshlq_s16): Likewise.
13425 (__arm_vshlq_s32): Likewise.
13426 (__arm_vshlq_u8): Likewise.
13427 (__arm_vshlq_u16): Likewise.
13428 (__arm_vshlq_u32): Likewise.
13429 (vaddlvq_p): Define polymorphic variant.
13430 (vcmpneq): Likewise.
13432 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
13434 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
13435 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
13436 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
13437 (mve_vcmpneq_<supf><mode>): Likewise.
13438 (mve_vshlq_<supf><mode>): Likewise.
13440 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13441 Mihail Ionescu <mihail.ionescu@arm.com>
13442 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13444 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
13445 qualifier for binary operands.
13446 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13447 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
13448 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
13449 (vcvtq_n_s32_f32): Likewise.
13450 (vcvtq_n_u16_f16): Likewise.
13451 (vcvtq_n_u32_f32): Likewise.
13452 (vcreateq_u8): Likewise.
13453 (vcreateq_u16): Likewise.
13454 (vcreateq_u32): Likewise.
13455 (vcreateq_u64): Likewise.
13456 (vcreateq_s8): Likewise.
13457 (vcreateq_s16): Likewise.
13458 (vcreateq_s32): Likewise.
13459 (vcreateq_s64): Likewise.
13460 (vshrq_n_s8): Likewise.
13461 (vshrq_n_s16): Likewise.
13462 (vshrq_n_s32): Likewise.
13463 (vshrq_n_u8): Likewise.
13464 (vshrq_n_u16): Likewise.
13465 (vshrq_n_u32): Likewise.
13466 (__arm_vcreateq_u8): Define intrinsic.
13467 (__arm_vcreateq_u16): Likewise.
13468 (__arm_vcreateq_u32): Likewise.
13469 (__arm_vcreateq_u64): Likewise.
13470 (__arm_vcreateq_s8): Likewise.
13471 (__arm_vcreateq_s16): Likewise.
13472 (__arm_vcreateq_s32): Likewise.
13473 (__arm_vcreateq_s64): Likewise.
13474 (__arm_vshrq_n_s8): Likewise.
13475 (__arm_vshrq_n_s16): Likewise.
13476 (__arm_vshrq_n_s32): Likewise.
13477 (__arm_vshrq_n_u8): Likewise.
13478 (__arm_vshrq_n_u16): Likewise.
13479 (__arm_vshrq_n_u32): Likewise.
13480 (__arm_vcvtq_n_s16_f16): Likewise.
13481 (__arm_vcvtq_n_s32_f32): Likewise.
13482 (__arm_vcvtq_n_u16_f16): Likewise.
13483 (__arm_vcvtq_n_u32_f32): Likewise.
13484 (vshrq_n): Define polymorphic variant.
13485 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
13487 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13488 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
13489 * config/arm/constraints.md (Rb): Define constraint to check constant is
13490 in the range of 1 to 8.
13491 (Rf): Define constraint to check constant is in the range of 1 to 32.
13492 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
13493 (mve_vshrq_n_<supf><mode>): Likewise.
13494 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
13495 * config/arm/predicates.md (mve_imm_8): Define predicate to check
13496 the matching constraint Rb.
13497 (mve_imm_32): Define predicate to check the matching constraint Rf.
13499 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13500 Mihail Ionescu <mihail.ionescu@arm.com>
13501 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13503 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
13504 qualifier for binary operands.
13505 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
13506 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13507 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
13508 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
13509 (vsubq_n_f32): Likewise.
13510 (vbrsrq_n_f16): Likewise.
13511 (vbrsrq_n_f32): Likewise.
13512 (vcvtq_n_f16_s16): Likewise.
13513 (vcvtq_n_f32_s32): Likewise.
13514 (vcvtq_n_f16_u16): Likewise.
13515 (vcvtq_n_f32_u32): Likewise.
13516 (vcreateq_f16): Likewise.
13517 (vcreateq_f32): Likewise.
13518 (__arm_vsubq_n_f16): Define intrinsic.
13519 (__arm_vsubq_n_f32): Likewise.
13520 (__arm_vbrsrq_n_f16): Likewise.
13521 (__arm_vbrsrq_n_f32): Likewise.
13522 (__arm_vcvtq_n_f16_s16): Likewise.
13523 (__arm_vcvtq_n_f32_s32): Likewise.
13524 (__arm_vcvtq_n_f16_u16): Likewise.
13525 (__arm_vcvtq_n_f32_u32): Likewise.
13526 (__arm_vcreateq_f16): Likewise.
13527 (__arm_vcreateq_f32): Likewise.
13528 (vsubq): Define polymorphic variant.
13529 (vbrsrq): Likewise.
13530 (vcvtq_n): Likewise.
13531 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
13533 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
13534 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13535 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
13536 * config/arm/constraints.md (Rd): Define constraint to check constant is
13537 in the range of 1 to 16.
13538 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
13539 mve_vbrsrq_n_f<mode>: Likewise.
13540 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
13541 mve_vcreateq_f<mode>: Likewise.
13542 * config/arm/predicates.md (mve_imm_16): Define predicate to check
13543 the matching constraint Rd.
13545 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13546 Mihail Ionescu <mihail.ionescu@arm.com>
13547 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13549 * config/arm/arm-builtins.c (hi_UP): Define mode.
13550 * config/arm/arm.h (IS_VPR_REGNUM): Move.
13551 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
13552 (APSRQ_REGNUM): Modify.
13553 (APSRGE_REGNUM): Modify.
13554 * config/arm/arm_mve.h (vctp16q): Define macro.
13555 (vctp32q): Likewise.
13556 (vctp64q): Likewise.
13557 (vctp8q): Likewise.
13559 (__arm_vctp16q): Define intrinsic.
13560 (__arm_vctp32q): Likewise.
13561 (__arm_vctp64q): Likewise.
13562 (__arm_vctp8q): Likewise.
13563 (__arm_vpnot): Likewise.
13564 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
13566 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
13567 (mve_vpnothi): Likewise.
13569 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13570 Mihail Ionescu <mihail.ionescu@arm.com>
13571 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13573 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
13574 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
13575 (vdupq_n_s16): Likewise.
13576 (vdupq_n_s32): Likewise.
13577 (vabsq_s8): Likewise.
13578 (vabsq_s16): Likewise.
13579 (vabsq_s32): Likewise.
13580 (vclsq_s8): Likewise.
13581 (vclsq_s16): Likewise.
13582 (vclsq_s32): Likewise.
13583 (vclzq_s8): Likewise.
13584 (vclzq_s16): Likewise.
13585 (vclzq_s32): Likewise.
13586 (vnegq_s8): Likewise.
13587 (vnegq_s16): Likewise.
13588 (vnegq_s32): Likewise.
13589 (vaddlvq_s32): Likewise.
13590 (vaddvq_s8): Likewise.
13591 (vaddvq_s16): Likewise.
13592 (vaddvq_s32): Likewise.
13593 (vmovlbq_s8): Likewise.
13594 (vmovlbq_s16): Likewise.
13595 (vmovltq_s8): Likewise.
13596 (vmovltq_s16): Likewise.
13597 (vmvnq_s8): Likewise.
13598 (vmvnq_s16): Likewise.
13599 (vmvnq_s32): Likewise.
13600 (vrev16q_s8): Likewise.
13601 (vrev32q_s8): Likewise.
13602 (vrev32q_s16): Likewise.
13603 (vqabsq_s8): Likewise.
13604 (vqabsq_s16): Likewise.
13605 (vqabsq_s32): Likewise.
13606 (vqnegq_s8): Likewise.
13607 (vqnegq_s16): Likewise.
13608 (vqnegq_s32): Likewise.
13609 (vcvtaq_s16_f16): Likewise.
13610 (vcvtaq_s32_f32): Likewise.
13611 (vcvtnq_s16_f16): Likewise.
13612 (vcvtnq_s32_f32): Likewise.
13613 (vcvtpq_s16_f16): Likewise.
13614 (vcvtpq_s32_f32): Likewise.
13615 (vcvtmq_s16_f16): Likewise.
13616 (vcvtmq_s32_f32): Likewise.
13617 (vmvnq_u8): Likewise.
13618 (vmvnq_u16): Likewise.
13619 (vmvnq_u32): Likewise.
13620 (vdupq_n_u8): Likewise.
13621 (vdupq_n_u16): Likewise.
13622 (vdupq_n_u32): Likewise.
13623 (vclzq_u8): Likewise.
13624 (vclzq_u16): Likewise.
13625 (vclzq_u32): Likewise.
13626 (vaddvq_u8): Likewise.
13627 (vaddvq_u16): Likewise.
13628 (vaddvq_u32): Likewise.
13629 (vrev32q_u8): Likewise.
13630 (vrev32q_u16): Likewise.
13631 (vmovltq_u8): Likewise.
13632 (vmovltq_u16): Likewise.
13633 (vmovlbq_u8): Likewise.
13634 (vmovlbq_u16): Likewise.
13635 (vrev16q_u8): Likewise.
13636 (vaddlvq_u32): Likewise.
13637 (vcvtpq_u16_f16): Likewise.
13638 (vcvtpq_u32_f32): Likewise.
13639 (vcvtnq_u16_f16): Likewise.
13640 (vcvtmq_u16_f16): Likewise.
13641 (vcvtmq_u32_f32): Likewise.
13642 (vcvtaq_u16_f16): Likewise.
13643 (vcvtaq_u32_f32): Likewise.
13644 (__arm_vdupq_n_s8): Define intrinsic.
13645 (__arm_vdupq_n_s16): Likewise.
13646 (__arm_vdupq_n_s32): Likewise.
13647 (__arm_vabsq_s8): Likewise.
13648 (__arm_vabsq_s16): Likewise.
13649 (__arm_vabsq_s32): Likewise.
13650 (__arm_vclsq_s8): Likewise.
13651 (__arm_vclsq_s16): Likewise.
13652 (__arm_vclsq_s32): Likewise.
13653 (__arm_vclzq_s8): Likewise.
13654 (__arm_vclzq_s16): Likewise.
13655 (__arm_vclzq_s32): Likewise.
13656 (__arm_vnegq_s8): Likewise.
13657 (__arm_vnegq_s16): Likewise.
13658 (__arm_vnegq_s32): Likewise.
13659 (__arm_vaddlvq_s32): Likewise.
13660 (__arm_vaddvq_s8): Likewise.
13661 (__arm_vaddvq_s16): Likewise.
13662 (__arm_vaddvq_s32): Likewise.
13663 (__arm_vmovlbq_s8): Likewise.
13664 (__arm_vmovlbq_s16): Likewise.
13665 (__arm_vmovltq_s8): Likewise.
13666 (__arm_vmovltq_s16): Likewise.
13667 (__arm_vmvnq_s8): Likewise.
13668 (__arm_vmvnq_s16): Likewise.
13669 (__arm_vmvnq_s32): Likewise.
13670 (__arm_vrev16q_s8): Likewise.
13671 (__arm_vrev32q_s8): Likewise.
13672 (__arm_vrev32q_s16): Likewise.
13673 (__arm_vqabsq_s8): Likewise.
13674 (__arm_vqabsq_s16): Likewise.
13675 (__arm_vqabsq_s32): Likewise.
13676 (__arm_vqnegq_s8): Likewise.
13677 (__arm_vqnegq_s16): Likewise.
13678 (__arm_vqnegq_s32): Likewise.
13679 (__arm_vmvnq_u8): Likewise.
13680 (__arm_vmvnq_u16): Likewise.
13681 (__arm_vmvnq_u32): Likewise.
13682 (__arm_vdupq_n_u8): Likewise.
13683 (__arm_vdupq_n_u16): Likewise.
13684 (__arm_vdupq_n_u32): Likewise.
13685 (__arm_vclzq_u8): Likewise.
13686 (__arm_vclzq_u16): Likewise.
13687 (__arm_vclzq_u32): Likewise.
13688 (__arm_vaddvq_u8): Likewise.
13689 (__arm_vaddvq_u16): Likewise.
13690 (__arm_vaddvq_u32): Likewise.
13691 (__arm_vrev32q_u8): Likewise.
13692 (__arm_vrev32q_u16): Likewise.
13693 (__arm_vmovltq_u8): Likewise.
13694 (__arm_vmovltq_u16): Likewise.
13695 (__arm_vmovlbq_u8): Likewise.
13696 (__arm_vmovlbq_u16): Likewise.
13697 (__arm_vrev16q_u8): Likewise.
13698 (__arm_vaddlvq_u32): Likewise.
13699 (__arm_vcvtpq_u16_f16): Likewise.
13700 (__arm_vcvtpq_u32_f32): Likewise.
13701 (__arm_vcvtnq_u16_f16): Likewise.
13702 (__arm_vcvtmq_u16_f16): Likewise.
13703 (__arm_vcvtmq_u32_f32): Likewise.
13704 (__arm_vcvtaq_u16_f16): Likewise.
13705 (__arm_vcvtaq_u32_f32): Likewise.
13706 (__arm_vcvtaq_s16_f16): Likewise.
13707 (__arm_vcvtaq_s32_f32): Likewise.
13708 (__arm_vcvtnq_s16_f16): Likewise.
13709 (__arm_vcvtnq_s32_f32): Likewise.
13710 (__arm_vcvtpq_s16_f16): Likewise.
13711 (__arm_vcvtpq_s32_f32): Likewise.
13712 (__arm_vcvtmq_s16_f16): Likewise.
13713 (__arm_vcvtmq_s32_f32): Likewise.
13714 (vdupq_n): Define polymorphic variant.
13719 (vaddlvq): Likewise.
13720 (vaddvq): Likewise.
13721 (vmovlbq): Likewise.
13722 (vmovltq): Likewise.
13724 (vrev16q): Likewise.
13725 (vrev32q): Likewise.
13726 (vqabsq): Likewise.
13727 (vqnegq): Likewise.
13728 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
13729 (UNOP_SNONE_NONE): Likewise.
13730 (UNOP_UNONE_UNONE): Likewise.
13731 (UNOP_UNONE_NONE): Likewise.
13732 * config/arm/constraints.md (e): Define new constriant to allow only
13734 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
13735 (mve_vnegq_s<mode>): Likewise.
13736 (mve_vmvnq_<supf><mode>): Likewise.
13737 (mve_vdupq_n_<supf><mode>): Likewise.
13738 (mve_vclzq_<supf><mode>): Likewise.
13739 (mve_vclsq_s<mode>): Likewise.
13740 (mve_vaddvq_<supf><mode>): Likewise.
13741 (mve_vabsq_s<mode>): Likewise.
13742 (mve_vrev32q_<supf><mode>): Likewise.
13743 (mve_vmovltq_<supf><mode>): Likewise.
13744 (mve_vmovlbq_<supf><mode>): Likewise.
13745 (mve_vcvtpq_<supf><mode>): Likewise.
13746 (mve_vcvtnq_<supf><mode>): Likewise.
13747 (mve_vcvtmq_<supf><mode>): Likewise.
13748 (mve_vcvtaq_<supf><mode>): Likewise.
13749 (mve_vrev16q_<supf>v16qi): Likewise.
13750 (mve_vaddlvq_<supf>v4si): Likewise.
13752 2020-03-17 Jakub Jelinek <jakub@redhat.com>
13754 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
13756 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
13758 * read-rtl-function.c (find_param_by_name,
13759 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
13761 * spellcheck.c (get_edit_distance_cutoff): Likewise.
13762 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
13763 * tree.def (SWITCH_EXPR): Likewise.
13764 * selftest.c (assert_str_contains): Likewise.
13765 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
13767 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
13768 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
13769 * langhooks.h (struct lang_hooks_for_decls): Likewise.
13770 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
13771 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
13773 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
13774 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
13775 * tree.c (component_ref_size): Likewise.
13776 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
13777 * gimple-ssa-sprintf.c (get_string_length, format_string,
13778 format_directive): Likewise.
13779 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
13780 * input.c (string_concat_db::get_string_concatenation,
13781 test_lexer_string_locations_ucn4): Likewise.
13782 * cfgexpand.c (pass_expand::execute): Likewise.
13783 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
13784 maybe_diag_overlap): Likewise.
13785 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
13786 * shrink-wrap.c (spread_components): Likewise.
13787 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
13789 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
13791 * dwarf2out.c (dwarf2out_early_finish): Likewise.
13792 * gimple-ssa-store-merging.c: Likewise.
13793 * ira-costs.c (record_operand_costs): Likewise.
13794 * tree-vect-loop.c (vectorizable_reduction): Likewise.
13795 * target.def (dispatch): Likewise.
13796 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
13797 in documentation text.
13798 * doc/tm.texi: Regenerated.
13799 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
13800 duplicated word issue in a comment.
13801 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
13802 * config/i386/i386-features.c (remove_partial_avx_dependency):
13804 * config/msp430/msp430.c (msp430_select_section): Likewise.
13805 * config/gcn/gcn-run.c (load_image): Likewise.
13806 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
13807 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
13808 * config/aarch64/falkor-tag-collision-avoidance.c
13809 (single_dest_per_chain): Likewise.
13810 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
13811 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
13812 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
13813 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
13815 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
13816 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
13817 * config/rs6000/rs6000-logue.c
13818 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
13819 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
13820 Fix various other issues in the comment.
13822 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
13824 * config/arm/t-rmprofile: create new multilib for
13825 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
13828 2020-03-17 Jakub Jelinek <jakub@redhat.com>
13830 PR tree-optimization/94015
13831 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
13832 function where EXP is address of the bytes being stored rather than
13833 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
13834 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
13835 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
13836 calling native_encode_expr if host or target doesn't have 8-bit
13837 chars. Formatting fixes.
13838 (count_nonzero_bytes_addr): New function.
13840 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13841 Mihail Ionescu <mihail.ionescu@arm.com>
13842 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13844 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
13845 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
13846 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
13847 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
13848 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
13849 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
13850 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
13851 (vmvnq_n_s32): Likewise.
13852 (vrev64q_s8): Likewise.
13853 (vrev64q_s16): Likewise.
13854 (vrev64q_s32): Likewise.
13855 (vcvtq_s16_f16): Likewise.
13856 (vcvtq_s32_f32): Likewise.
13857 (vrev64q_u8): Likewise.
13858 (vrev64q_u16): Likewise.
13859 (vrev64q_u32): Likewise.
13860 (vmvnq_n_u16): Likewise.
13861 (vmvnq_n_u32): Likewise.
13862 (vcvtq_u16_f16): Likewise.
13863 (vcvtq_u32_f32): Likewise.
13864 (__arm_vmvnq_n_s16): Define intrinsic.
13865 (__arm_vmvnq_n_s32): Likewise.
13866 (__arm_vrev64q_s8): Likewise.
13867 (__arm_vrev64q_s16): Likewise.
13868 (__arm_vrev64q_s32): Likewise.
13869 (__arm_vrev64q_u8): Likewise.
13870 (__arm_vrev64q_u16): Likewise.
13871 (__arm_vrev64q_u32): Likewise.
13872 (__arm_vmvnq_n_u16): Likewise.
13873 (__arm_vmvnq_n_u32): Likewise.
13874 (__arm_vcvtq_s16_f16): Likewise.
13875 (__arm_vcvtq_s32_f32): Likewise.
13876 (__arm_vcvtq_u16_f16): Likewise.
13877 (__arm_vcvtq_u32_f32): Likewise.
13878 (vrev64q): Define polymorphic variant.
13879 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
13880 (UNOP_SNONE_NONE): Likewise.
13881 (UNOP_SNONE_IMM): Likewise.
13882 (UNOP_UNONE_UNONE): Likewise.
13883 (UNOP_UNONE_NONE): Likewise.
13884 (UNOP_UNONE_IMM): Likewise.
13885 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
13886 (mve_vcvtq_from_f_<supf><mode>): Likewise.
13887 (mve_vmvnq_n_<supf><mode>): Likewise.
13889 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13890 Mihail Ionescu <mihail.ionescu@arm.com>
13891 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13893 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
13894 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
13895 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
13896 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
13897 (vrndxq_f32): Likewise.
13898 (vrndq_f16) Likewise.
13899 (vrndq_f32): Likewise.
13900 (vrndpq_f16): Likewise.
13901 (vrndpq_f32): Likewise.
13902 (vrndnq_f16): Likewise.
13903 (vrndnq_f32): Likewise.
13904 (vrndmq_f16): Likewise.
13905 (vrndmq_f32): Likewise.
13906 (vrndaq_f16): Likewise.
13907 (vrndaq_f32): Likewise.
13908 (vrev64q_f16): Likewise.
13909 (vrev64q_f32): Likewise.
13910 (vnegq_f16): Likewise.
13911 (vnegq_f32): Likewise.
13912 (vdupq_n_f16): Likewise.
13913 (vdupq_n_f32): Likewise.
13914 (vabsq_f16): Likewise.
13915 (vabsq_f32): Likewise.
13916 (vrev32q_f16): Likewise.
13917 (vcvttq_f32_f16): Likewise.
13918 (vcvtbq_f32_f16): Likewise.
13919 (vcvtq_f16_s16): Likewise.
13920 (vcvtq_f32_s32): Likewise.
13921 (vcvtq_f16_u16): Likewise.
13922 (vcvtq_f32_u32): Likewise.
13923 (__arm_vrndxq_f16): Define intrinsic.
13924 (__arm_vrndxq_f32): Likewise.
13925 (__arm_vrndq_f16): Likewise.
13926 (__arm_vrndq_f32): Likewise.
13927 (__arm_vrndpq_f16): Likewise.
13928 (__arm_vrndpq_f32): Likewise.
13929 (__arm_vrndnq_f16): Likewise.
13930 (__arm_vrndnq_f32): Likewise.
13931 (__arm_vrndmq_f16): Likewise.
13932 (__arm_vrndmq_f32): Likewise.
13933 (__arm_vrndaq_f16): Likewise.
13934 (__arm_vrndaq_f32): Likewise.
13935 (__arm_vrev64q_f16): Likewise.
13936 (__arm_vrev64q_f32): Likewise.
13937 (__arm_vnegq_f16): Likewise.
13938 (__arm_vnegq_f32): Likewise.
13939 (__arm_vdupq_n_f16): Likewise.
13940 (__arm_vdupq_n_f32): Likewise.
13941 (__arm_vabsq_f16): Likewise.
13942 (__arm_vabsq_f32): Likewise.
13943 (__arm_vrev32q_f16): Likewise.
13944 (__arm_vcvttq_f32_f16): Likewise.
13945 (__arm_vcvtbq_f32_f16): Likewise.
13946 (__arm_vcvtq_f16_s16): Likewise.
13947 (__arm_vcvtq_f32_s32): Likewise.
13948 (__arm_vcvtq_f16_u16): Likewise.
13949 (__arm_vcvtq_f32_u32): Likewise.
13950 (vrndxq): Define polymorphic variants.
13952 (vrndpq): Likewise.
13953 (vrndnq): Likewise.
13954 (vrndmq): Likewise.
13955 (vrndaq): Likewise.
13956 (vrev64q): Likewise.
13959 (vrev32q): Likewise.
13960 (vcvtbq_f32): Likewise.
13961 (vcvttq_f32): Likewise.
13963 * config/arm/arm_mve_builtins.def (VAR2): Define.
13965 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
13966 (mve_vrndq_f<mode>): Likewise.
13967 (mve_vrndpq_f<mode>): Likewise.
13968 (mve_vrndnq_f<mode>): Likewise.
13969 (mve_vrndmq_f<mode>): Likewise.
13970 (mve_vrndaq_f<mode>): Likewise.
13971 (mve_vrev64q_f<mode>): Likewise.
13972 (mve_vnegq_f<mode>): Likewise.
13973 (mve_vdupq_n_f<mode>): Likewise.
13974 (mve_vabsq_f<mode>): Likewise.
13975 (mve_vrev32q_fv8hf): Likewise.
13976 (mve_vcvttq_f32_f16v4sf): Likewise.
13977 (mve_vcvtbq_f32_f16v4sf): Likewise.
13978 (mve_vcvtq_to_f_<supf><mode>): Likewise.
13980 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
13981 Mihail Ionescu <mihail.ionescu@arm.com>
13982 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13984 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
13986 (ARM_BUILTIN_MVE_PATTERN_START): Define.
13987 (arm_init_mve_builtins): Define function.
13988 (arm_init_builtins): Add TARGET_HAVE_MVE check.
13989 (arm_expand_builtin_1): Check the range of fcode.
13990 (arm_expand_mve_builtin): Define function to expand MVE builtins.
13991 (arm_expand_builtin): Check the range of fcode.
13992 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
13994 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
13995 (vst4q_s8): Define macro.
13996 (vst4q_s16): Likewise.
13997 (vst4q_s32): Likewise.
13998 (vst4q_u8): Likewise.
13999 (vst4q_u16): Likewise.
14000 (vst4q_u32): Likewise.
14001 (vst4q_f16): Likewise.
14002 (vst4q_f32): Likewise.
14003 (__arm_vst4q_s8): Define inline builtin.
14004 (__arm_vst4q_s16): Likewise.
14005 (__arm_vst4q_s32): Likewise.
14006 (__arm_vst4q_u8): Likewise.
14007 (__arm_vst4q_u16): Likewise.
14008 (__arm_vst4q_u32): Likewise.
14009 (__arm_vst4q_f16): Likewise.
14010 (__arm_vst4q_f32): Likewise.
14011 (__ARM_mve_typeid): Define macro with MVE types.
14012 (__ARM_mve_coerce): Define macro with _Generic feature.
14013 (vst4q): Define polymorphic variant for different vst4q builtins.
14014 * config/arm/arm_mve_builtins.def: New file.
14015 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
14017 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
14018 (unspec): Define unspec.
14019 (mve_vst4q<mode>): Define RTL pattern.
14020 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
14022 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
14024 (define_split): Allow OI mode split for MVE after reload.
14025 (define_split): Allow XI mode split for MVE after reload.
14026 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
14027 (arm-builtins.o): Likewise.
14029 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
14031 * c-typeck.c (process_init_element): Handle constructor_type with
14032 type size represented by POLY_INT_CST.
14034 2020-03-17 Jakub Jelinek <jakub@redhat.com>
14036 PR tree-optimization/94187
14037 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
14038 nchars - offset < nbytes.
14040 PR middle-end/94189
14041 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
14042 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
14043 for code-generation.
14045 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
14048 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
14049 after changing memory subreg.
14051 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14052 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14054 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
14055 emulator calls for dobule precision arithmetic operations for MVE.
14057 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14058 Mihail Ionescu <mihail.ionescu@arm.com>
14059 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14061 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
14062 feature bit is on and -mfpu=auto is passed as compiler option, do not
14063 generate error on not finding any matching fpu. Because in this case
14064 fpu is not required.
14065 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
14066 enabled for MVE and also for all VFP extensions.
14067 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
14069 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
14070 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
14071 along with feature bits mve_float.
14072 (mve): Modify add options in armv8.1-m.main arch for MVE.
14073 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
14075 * config/arm/arm.c (use_return_insn): Replace the
14076 check with TARGET_VFP_BASE.
14077 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
14079 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
14080 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
14082 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
14083 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
14085 (arm_compute_frame_layout): Likewise.
14086 (arm_save_coproc_regs): Likewise.
14087 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
14089 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
14090 with equivalent macro TARGET_VFP_BASE.
14091 (arm_expand_epilogue_apcs_frame): Likewise.
14092 (arm_expand_epilogue): Likewise.
14093 (arm_conditional_register_usage): Likewise.
14094 (arm_declare_function_name): Add check to skip printing .fpu directive
14095 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
14097 * config/arm/arm.h (TARGET_VFP_BASE): Define.
14098 * config/arm/arm.md (arch): Add "mve" to arch.
14099 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
14100 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
14101 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
14102 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
14104 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
14105 to not allow for MVE.
14106 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
14108 (VUNSPEC_GET_FPSCR): Define.
14109 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
14110 instructions which move to general-purpose Register from Floating-point
14111 Special register and vice-versa.
14112 (thumb2_movhi_fp16): Likewise.
14113 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
14114 with MCR and MRC instructions which set and get Floating-point Status
14115 and Control Register (FPSCR).
14116 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
14118 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
14119 float move patterns in MVE.
14120 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
14121 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
14122 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
14123 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
14124 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
14125 TARGET_VFP_BASE check.
14126 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
14127 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
14129 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
14130 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
14134 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14135 Mihail Ionescu <mihail.ionescu@arm.com>
14136 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14138 * config.gcc (arm_mve.h): Include mve intrinsics header file.
14139 * config/arm/aout.h (p0): Add new register name for MVE predicated
14141 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
14142 common to Neon and MVE.
14143 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
14144 (arm_init_simd_builtin_types): Disable poly types for MVE.
14145 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
14146 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
14147 ARM_BUILTIN_NEON_LANE_CHECK.
14148 (mve_dereference_pointer): Add function.
14149 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
14151 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
14152 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
14153 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
14154 with floating point enabled.
14155 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
14156 simd_immediate_valid_for_move.
14157 (simd_immediate_valid_for_move): Renamed from
14158 neon_immediate_valid_for_move function.
14159 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
14160 error if vfpv2 feature bit is disabled and mve feature bit is also
14161 disabled for HARD_FLOAT_ABI.
14162 (use_return_insn): Check to not push VFP regs for MVE.
14163 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
14165 (aapcs_vfp_allocate_return_reg): Likewise.
14166 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
14167 address operand for MVE.
14168 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
14169 (neon_valid_immediate): Rename to simd_valid_immediate.
14170 (simd_valid_immediate): Rename from neon_valid_immediate.
14171 (simd_valid_immediate): MVE check on size of vector is 128 bits.
14172 (neon_immediate_valid_for_move): Rename to
14173 simd_immediate_valid_for_move.
14174 (simd_immediate_valid_for_move): Rename from
14175 neon_immediate_valid_for_move.
14176 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
14178 (neon_make_constant): Modify call to neon_valid_immediate function.
14179 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
14181 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
14182 (arm_compute_frame_layout): Calculate space for saved VFP registers for
14184 (arm_save_coproc_regs): Save coproc registers for MVE.
14185 (arm_print_operand): Add case 'E' to print memory operands for MVE.
14186 (arm_print_operand_address): Check to print register number for MVE.
14187 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
14188 (arm_modes_tieable_p): Check to allow structure mode for MVE.
14189 (arm_regno_class): Add VPR_REGNUM check.
14190 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
14192 (arm_expand_epilogue): MVE check for enabling pop instructions in
14194 (arm_print_asm_arch_directives): Modify function to disable print of
14195 .arch_extension "mve" and "fp" for cases where MVE is enabled with
14197 (arm_vector_mode_supported_p): Check for modes available in MVE interger
14198 and MVE floating point.
14199 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
14201 (arm_conditional_register_usage): Enable usage of conditional regsiter
14203 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
14204 (arm_declare_function_name): Modify function to disable print of
14205 .arch_extension "mve" and "fp" for cases where MVE is enabled with
14207 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
14208 when target general registers are required.
14209 (TARGET_HAVE_MVE_FLOAT): Likewise.
14210 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
14212 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
14213 which indicate this is not available for across function calls.
14214 (FIRST_PSEUDO_REGISTER): Modify.
14215 (VALID_MVE_MODE): Define valid MVE mode.
14216 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
14217 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
14218 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
14219 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
14221 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
14222 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
14223 (enum reg_class): Add VPR_REG entry.
14224 (REG_CLASS_NAMES): Add VPR_REG entry.
14225 * config/arm/arm.md (VPR_REGNUM): Define.
14226 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
14227 "unconditional" instructions.
14228 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
14229 (movdf_soft_insn): Modify RTL to not allow for MVE.
14230 (vfp_pop_multiple_with_writeback): Enable for MVE.
14231 (include "mve.md"): Include mve.md file.
14232 * config/arm/arm_mve.h: Add MVE intrinsics head file.
14233 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
14234 for vector predicated operands.
14235 * config/arm/iterators.md (VNIM1): Define.
14236 (VNINOTM1): Define.
14237 (VHFBF_split): Define
14238 * config/arm/mve.md: New file.
14239 (mve_mov<mode>): Define RTL for move, store and load in MVE.
14240 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
14242 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
14243 simd_immediate_valid_for_move.
14244 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
14245 is common to MVE and NEON to vec-common.md file.
14246 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
14247 * config/arm/predicates.md (vpr_register_operand): Define.
14248 * config/arm/t-arm: Add mve.md file.
14249 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
14251 (mve_store): Add MVE instructions mve_store to attribute "type".
14252 (mve_load): Add MVE instructions mve_load to attribute "type".
14253 (is_mve_type): Define attribute.
14254 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
14255 standard move patterns in MVE along with NEON and IWMMXT with mode
14257 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
14258 and IWMMXT with mode iterator V8HF.
14259 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
14261 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
14262 simd_immediate_valid_for_move.
14265 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
14268 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
14269 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
14271 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
14273 2020-03-16 Jakub Jelinek <jakub@redhat.com>
14276 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
14279 PR tree-optimization/94166
14280 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
14281 as secondary comparison key.
14283 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
14285 PR tree-optimization/94125
14286 * tree-loop-distribution.c
14287 (loop_distribution::break_alias_scc_partitions): Update post order
14288 number for merged scc.
14290 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
14293 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
14295 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
14296 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
14297 and ext_sse_reg_operand check.
14299 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
14301 * common.opt: Avoid redundancy in the help text.
14302 * config/arc/arc.opt: Likewise.
14303 * config/cr16/cr16.opt: Likewise.
14305 2020-03-14 Jakub Jelinek <jakub@redhat.com>
14307 PR middle-end/93566
14308 * tree-nested.c (convert_nonlocal_omp_clauses,
14309 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
14310 with C/C++ array sections.
14312 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
14315 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
14316 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
14319 2020-03-14 Jakub Jelinek <jakub@redhat.com>
14321 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
14322 "a an" to "an" in a comment.
14323 * hsa-common.h (is_a_helper): Likewise.
14324 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
14325 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
14326 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
14328 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
14331 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
14332 64-bit value by 64 bits (UB).
14334 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
14336 PR rtl-optimization/92303
14337 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
14339 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
14341 PR rtl-optimization/94148
14342 PR rtl-optimization/94042
14343 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
14344 (df_worklist_propagate_forward): New parameter last_change_age, use
14345 that instead of bb->aux.
14346 (df_worklist_propagate_backward): Ditto.
14347 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
14349 2020-03-13 Richard Biener <rguenther@suse.de>
14351 PR tree-optimization/94163
14352 * tree-ssa-pre.c (create_expression_by_pieces): Check
14353 whether alignment would be zero.
14355 2020-03-13 Martin Liska <mliska@suse.cz>
14358 * lto-wrapper.c (run_gcc): Use concat for appending
14359 to collect_gcc_options.
14361 2020-03-13 Jakub Jelinek <jakub@redhat.com>
14364 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
14365 instead of GEN_INT.
14367 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
14370 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
14371 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
14372 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
14373 TARGET_AVX512VL and ext_sse_reg_operand check.
14375 2020-03-13 Bu Le <bule1@huawei.com>
14378 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
14379 (-param=aarch64-double-recp-precision=): New options.
14380 * doc/invoke.texi: Document them.
14381 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
14382 instead of hard-coding the choice of 1 for float and 2 for double.
14384 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
14386 PR rtl-optimization/94119
14387 * resource.h (clear_hashed_info_until_next_barrier): Declare.
14388 * resource.c (clear_hashed_info_until_next_barrier): New function.
14389 * reorg.c (add_to_delay_list): Fix formatting.
14390 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
14391 the next instruction after removing a BARRIER.
14393 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
14395 PR middle-end/92071
14396 * expmed.c (store_integral_bit_field): For fields larger than a word,
14397 call extract_bit_field on the value if the mode is BLKmode. Remove
14398 specific path for big-endian targets and tidy things up a little bit.
14400 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
14402 PR rtl-optimization/90275
14403 * cse.c (cse_insn): Delete no-op register moves too.
14405 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
14407 * config/rx/rx.md (CTRLREG_CPEN): Remove.
14408 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
14410 2020-03-12 Richard Biener <rguenther@suse.de>
14412 PR tree-optimization/94103
14413 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
14414 punning when the mode precision is not sufficient.
14416 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
14419 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
14420 MODE_V1DF and MODE_V2SF.
14421 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
14422 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
14425 2020-03-12 Jakub Jelinek <jakub@redhat.com>
14427 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
14428 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
14429 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
14430 * doc/tm.texi: Regenerated.
14432 PR tree-optimization/94130
14433 * tree-ssa-dse.c: Include gimplify.h.
14434 (increment_start_addr): If stmt has lhs, drop the lhs from call and
14435 set it after the call to the original value of the first argument.
14437 (decrement_count): Formatting fix.
14439 2020-03-11 Delia Burduv <delia.burduv@arm.com>
14441 * config/arm/arm-builtins.c
14442 (arm_init_simd_builtin_scalar_types): New.
14443 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
14444 (vld2q_bf16): Used new builtin type.
14445 (vld3_bf16): Used new builtin type.
14446 (vld3q_bf16): Used new builtin type.
14447 (vld4_bf16): Used new builtin type.
14448 (vld4q_bf16): Used new builtin type.
14449 (vld2_dup_bf16): Used new builtin type.
14450 (vld2q_dup_bf16): Used new builtin type.
14451 (vld3_dup_bf16): Used new builtin type.
14452 (vld3q_dup_bf16): Used new builtin type.
14453 (vld4_dup_bf16): Used new builtin type.
14454 (vld4q_dup_bf16): Used new builtin type.
14456 2020-03-11 Jakub Jelinek <jakub@redhat.com>
14459 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
14460 at the start to switch to data section. Don't print extra newline if
14461 .globl directive has not been emitted.
14463 2020-03-11 Richard Biener <rguenther@suse.de>
14465 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
14468 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
14470 PR middle-end/93961
14471 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
14472 whose type is a qualified union.
14474 2020-03-11 Jakub Jelinek <jakub@redhat.com>
14477 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
14478 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
14481 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
14483 (get_nth_most_common_value): Use abs_hwi instead of abs.
14485 PR middle-end/94111
14486 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
14487 is rvc_normal, otherwise use real_to_decimal to print the number to
14490 PR tree-optimization/94114
14491 * tree-loop-distribution.c (generate_memset_builtin): Call
14492 rewrite_to_non_trapping_overflow even on mem.
14493 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
14496 2020-03-10 Jeff Law <law@redhat.com>
14498 * config/bfin/bfin.md (movsi_insv): Add length attribute.
14500 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
14503 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
14504 NAN and SIGNED_ZEROR for smax/smin.
14506 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
14509 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
14510 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
14512 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
14514 * loop-iv.c (find_simple_exit): Make it static.
14515 * cfgloop.h: Remove the corresponding prototype.
14517 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
14519 * ddg.c (create_ddg): Fix intendation.
14520 (set_recurrence_length): Likewise.
14521 (create_ddg_all_sccs): Likewise.
14523 2020-03-10 Jakub Jelinek <jakub@redhat.com>
14526 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
14527 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
14530 2020-03-09 Jason Merrill <jason@redhat.com>
14532 * gdbinit.in (pgs): Fix typo in documentation.
14534 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
14538 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
14540 PR rtl-optimization/93564
14541 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
14542 do not honor reg alloc order.
14544 2020-03-09 Andrew Pinski <apinski@marvell.com>
14546 PR inline-asm/94095
14547 * doc/extend.texi (x86 Operand Modifiers): Fix column
14550 2020-03-09 Martin Liska <mliska@suse.cz>
14553 * config/rs6000/rs6000.c (rs6000_option_override_internal):
14554 Remove set of str_align_loops and str_align_jumps as these
14555 should be set in previous 2 conditions in the function.
14557 2020-03-09 Jakub Jelinek <jakub@redhat.com>
14559 PR rtl-optimization/94045
14560 * params.opt (-param=max-find-base-term-values=): New option.
14561 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
14562 in a single toplevel find_base_term call.
14564 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
14567 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
14568 * config/aarch64/aarch64-simd.md
14569 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
14570 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
14571 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
14572 * config/aarch64/arm_neon.h:
14573 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
14574 (vmlal_lane_u16): Likewise.
14575 (vmlal_lane_s32): Likewise.
14576 (vmlal_lane_u32): Likewise.
14577 (vmlal_laneq_s16): Likewise.
14578 (vmlal_laneq_u16): Likewise.
14579 (vmlal_laneq_s32): Likewise.
14580 (vmlal_laneq_u32): Likewise.
14581 (vmull_lane_s16): Likewise.
14582 (vmull_lane_u16): Likewise.
14583 (vmull_lane_s32): Likewise.
14584 (vmull_lane_u32): Likewise.
14585 (vmull_laneq_s16): Likewise.
14586 (vmull_laneq_u16): Likewise.
14587 (vmull_laneq_s32): Likewise.
14588 (vmull_laneq_u32): Likewise.
14589 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
14592 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
14594 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
14595 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
14596 (aarch64_mls_elt<mode>): Likewise.
14597 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
14598 (aarch64_fma4_elt<mode>): Likewise.
14599 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
14600 (aarch64_fma4_elt_to_64v2df): Likewise.
14601 (aarch64_fnma4_elt<mode>): Likewise.
14602 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
14603 (aarch64_fnma4_elt_to_64v2df): Likewise.
14605 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14607 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
14608 Specify movprfx attribute.
14609 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
14611 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
14614 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
14616 (TARGET_NO_FP_IN_TOC): Same.
14617 * config/rs6000/aix71.h: Same.
14618 * config/rs6000/aix72.h: Same.
14620 2020-03-06 Andrew Pinski <apinski@marvell.com>
14621 Jeff Law <law@redhat.com>
14623 PR rtl-optimization/93996
14624 * haifa-sched.c (remove_notes): Be more careful when adding
14627 2020-03-06 Delia Burduv <delia.burduv@arm.com>
14629 * config/arm/arm_neon.h (vld2_bf16): New.
14635 (vld2_dup_bf16): New.
14636 (vld2q_dup_bf16): New.
14637 (vld3_dup_bf16): New.
14638 (vld3q_dup_bf16): New.
14639 (vld4_dup_bf16): New.
14640 (vld4q_dup_bf16): New.
14641 * config/arm/arm_neon_builtins.def
14642 (vld2): Changed to VAR13 and added v4bf, v8bf
14643 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
14644 (vld3): Changed to VAR13 and added v4bf, v8bf
14645 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
14646 (vld4): Changed to VAR13 and added v4bf, v8bf
14647 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
14648 * config/arm/iterators.md (VDXBF2): New iterator.
14649 *config/arm/neon.md (neon_vld2): Use new iterators.
14650 (neon_vld2_dup<mode): Use new iterators.
14651 (neon_vld3<mode>): Likewise.
14652 (neon_vld3qa<mode>): Likewise.
14653 (neon_vld3qb<mode>): Likewise.
14654 (neon_vld3_dup<mode>): Likewise.
14655 (neon_vld4<mode>): Likewise.
14656 (neon_vld4qa<mode>): Likewise.
14657 (neon_vld4qb<mode>): Likewise.
14658 (neon_vld4_dup<mode>): Likewise.
14659 (neon_vld2_dupv8bf): New.
14660 (neon_vld3_dupv8bf): Likewise.
14661 (neon_vld4_dupv8bf): Likewise.
14663 2020-03-06 Delia Burduv <delia.burduv@arm.com>
14665 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
14666 (bfloat16x8x2_t): New typedef.
14667 (bfloat16x4x3_t): New typedef.
14668 (bfloat16x8x3_t): New typedef.
14669 (bfloat16x4x4_t): New typedef.
14670 (bfloat16x8x4_t): New typedef.
14677 * config/arm/arm-builtins.c (v2bf_UP): Define.
14679 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
14680 * config/arm/arm-modes.def (V2BF): New mode.
14681 * config/arm/arm-simd-builtin-types.def
14682 (Bfloat16x2_t): New entry.
14683 * config/arm/arm_neon_builtins.def
14684 (vst2): Changed to VAR13 and added v4bf, v8bf
14685 (vst3): Changed to VAR13 and added v4bf, v8bf
14686 (vst4): Changed to VAR13 and added v4bf, v8bf
14687 * config/arm/iterators.md (VDXBF): New iterator.
14688 (VQ2BF): New iterator.
14689 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
14690 (neon_vst2<mode>): Used new iterators.
14691 (neon_vst3<mode>): Used new iterators.
14692 (neon_vst3<mode>): Used new iterators.
14693 (neon_vst3qa<mode>): Used new iterators.
14694 (neon_vst3qb<mode>): Used new iterators.
14695 (neon_vst4<mode>): Used new iterators.
14696 (neon_vst4<mode>): Used new iterators.
14697 (neon_vst4qa<mode>): Used new iterators.
14698 (neon_vst4qb<mode>): Used new iterators.
14700 2020-03-06 Delia Burduv <delia.burduv@arm.com>
14702 * config/aarch64/aarch64-simd-builtins.def
14703 (bfcvtn): New built-in function.
14704 (bfcvtn_q): New built-in function.
14705 (bfcvtn2): New built-in function.
14706 (bfcvt): New built-in function.
14707 * config/aarch64/aarch64-simd.md
14708 (aarch64_bfcvtn<q><mode>): New pattern.
14709 (aarch64_bfcvtn2v8bf): New pattern.
14710 (aarch64_bfcvtbf): New pattern.
14711 * config/aarch64/arm_bf16.h (float32_t): New typedef.
14712 (vcvth_bf16_f32): New intrinsic.
14713 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
14714 (vcvtq_low_bf16_f32): New intrinsic.
14715 (vcvtq_high_bf16_f32): New intrinsic.
14716 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
14717 (UNSPEC_BFCVTN): New UNSPEC.
14718 (UNSPEC_BFCVTN2): New UNSPEC.
14719 (UNSPEC_BFCVT): New UNSPEC.
14720 * config/arm/types.md (bf_cvt): New type.
14722 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
14724 * config/s390/s390.md ("tabort"): Get rid of two consecutive
14725 blanks in format string.
14727 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
14731 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
14732 * config/i386/i386.c (ix86_get_ssemov): New function.
14733 (ix86_output_ssemov): Likewise.
14734 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
14735 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
14737 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
14738 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
14739 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
14740 (*movti_internal): Likewise.
14741 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
14743 2020-03-05 Jeff Law <law@redhat.com>
14745 PR tree-optimization/91890
14746 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
14747 Use gimple_or_expr_nonartificial_location.
14748 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
14749 Use gimple_or_expr_nonartificial_location.
14750 * gimple.c (gimple_or_expr_nonartificial_location): New function.
14751 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
14752 * tree-ssa-strlen.c (maybe_warn_overflow): Use
14753 gimple_or_expr_nonartificial_location.
14754 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
14755 (maybe_warn_pointless_strcmp): Likewise.
14757 2020-03-05 Jakub Jelinek <jakub@redhat.com>
14760 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
14761 SRC and MASK arguments to __m128 from __m128d.
14762 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
14764 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
14766 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
14767 argument to __m128i from __m128d.
14768 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
14770 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
14771 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
14774 2020-03-05 Delia Burduv <delia.burduv@arm.com>
14776 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
14777 (vbfmlalbq_f32): New.
14778 (vbfmlaltq_f32): New.
14779 (vbfmlalbq_lane_f32): New.
14780 (vbfmlaltq_lane_f32): New.
14781 (vbfmlalbq_laneq_f32): New.
14782 (vbfmlaltq_laneq_f32): New.
14783 * config/arm/arm_neon_builtins.def (vmmla): New.
14788 (vfmab_laneq): New.
14789 (vfmat_laneq): New.
14790 * config/arm/iterators.md (BF_MA): New int iterator.
14791 (bt): New int attribute.
14792 (VQXBF): Copy of VQX with V8BF.
14793 * config/arm/neon.md (neon_vmmlav8bf): New insn.
14794 (neon_vfma<bt>v8bf): New insn.
14795 (neon_vfma<bt>_lanev8bf): New insn.
14796 (neon_vfma<bt>_laneqv8bf): New expand.
14797 (neon_vget_high<mode>): Changed iterator to VQXBF.
14798 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
14799 (UNSPEC_BFMAB): New UNSPEC.
14800 (UNSPEC_BFMAT): New UNSPEC.
14802 2020-03-05 Jakub Jelinek <jakub@redhat.com>
14804 PR middle-end/93399
14805 * tree-pretty-print.h (pretty_print_string): Declare.
14806 * tree-pretty-print.c (pretty_print_string): Remove forward
14807 declaration, no longer static. Change nbytes parameter type
14808 from unsigned to size_t.
14809 * print-rtl.c (print_value) <case CONST_STRING>: Use
14810 pretty_print_string and for shrink way too long strings.
14812 2020-03-05 Richard Biener <rguenther@suse.de>
14813 Jakub Jelinek <jakub@redhat.com>
14815 PR tree-optimization/93582
14816 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
14817 last operand as signed when looking for memset offset. Formatting
14820 2020-03-04 Andrew Pinski <apinski@marvell.com>
14823 * value-prof.c (dump_histogram_value): Use std::abs.
14825 2020-03-04 Martin Sebor <msebor@redhat.com>
14827 PR tree-optimization/93986
14828 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
14829 operands to the same precision widest_int to avoid ICEs.
14831 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
14834 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
14835 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
14836 for OPTION_MASK_ALTIVEC.
14838 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
14840 * config.gcc: Include the glibc-stdint.h header for zTPF.
14842 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
14844 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
14845 direct FPR-GPR copies.
14846 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
14849 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
14851 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
14852 operands to the prologue_tpf expander.
14853 (s390_emit_epilogue): Likewise.
14854 (s390_option_override_internal): Do error checking and setup for
14856 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
14857 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
14858 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
14859 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
14860 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
14861 operands for the check flag and the branch target.
14862 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
14863 ("mtpf-trace-hook-prologue-target")
14864 ("mtpf-trace-hook-epilogue-check")
14865 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
14867 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
14868 options are for debugging purposes and will not be documented
14871 2020-03-04 Jakub Jelinek <jakub@redhat.com>
14874 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
14876 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
14877 argument. Change pd argument so that it can be modified. Turn
14878 constant non-CONSTRUCTOR store into non-constant if it is too large.
14879 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
14881 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
14884 2020-02-04 Richard Biener <rguenther@suse.de>
14886 PR tree-optimization/93964
14887 * graphite-isl-ast-to-gimple.c
14888 (gcc_expression_from_isl_ast_expr_id): Add intermediate
14889 conversion for pointer to integer converts.
14890 * graphite-scop-detection.c (assign_parameter_index_in_region):
14893 2020-03-04 Martin Liska <mliska@suse.cz>
14897 * doc/invoke.texi: Clarify --help=language and --help=common
14900 2020-03-04 Jakub Jelinek <jakub@redhat.com>
14902 PR tree-optimization/94001
14903 * tree-tailcall.c (process_assignment): Before comparing op1 to
14904 *ass_var, verify *ass_var is non-NULL.
14906 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
14909 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
14912 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
14914 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
14915 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
14916 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
14917 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
14918 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
14919 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
14920 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
14921 (V_bf_low, V_bf_cvt_m): New mode attributes.
14922 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
14923 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
14924 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
14925 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
14926 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
14928 2020-03-03 Jakub Jelinek <jakub@redhat.com>
14930 PR tree-optimization/93582
14931 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
14932 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
14933 members, initialize them in the constructor and if mask is non-NULL,
14934 artificially push_partial_def {} for the portions of the mask that
14936 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
14937 val and return (void *)-1. Formatting fix.
14938 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
14940 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
14941 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
14943 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
14945 (visit_stmt): Formatting fix.
14947 2020-03-03 Richard Biener <rguenther@suse.de>
14949 PR tree-optimization/93946
14950 * alias.h (refs_same_for_tbaa_p): Declare.
14951 * alias.c (refs_same_for_tbaa_p): New function.
14952 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
14954 * tree-ssa-scopedtables.h
14955 (avail_exprs_stack::lookup_avail_expr): Add output argument
14956 giving access to the hashtable entry.
14957 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
14959 * tree-ssa-dom.c: Include alias.h.
14960 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
14961 removing redundant store.
14962 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
14963 (ao_ref_init_from_vn_reference): Adjust prototype.
14964 (vn_reference_lookup_pieces): Likewise.
14965 (vn_reference_insert_pieces): Likewise.
14966 * tree-ssa-sccvn.c: Track base alias set in addition to alias
14968 (eliminate_dom_walker::eliminate_stmt): Also check base alias
14969 set when removing redundant stores.
14970 (visit_reference_op_store): Likewise.
14971 * dse.c (record_store): Adjust valdity check for redundant
14974 2020-03-03 Jakub Jelinek <jakub@redhat.com>
14977 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
14979 PR rtl-optimization/94002
14980 * explow.c (plus_constant): Punt if cst has VOIDmode and
14981 get_pool_mode is different from mode.
14983 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
14985 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
14986 address has an offset which fits the scalling constraint for a
14987 load/store operation.
14988 (legitimate_scaled_address_p): Update use
14989 leigitimate_small_data_address_p.
14990 (arc_print_operand): Likewise.
14991 (arc_legitimate_address_p): Likewise.
14992 (legitimate_small_data_address_p): Likewise.
14994 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
14996 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
14997 (fnmasf4_fpu): Likewise.
14999 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
15001 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
15003 (subdi3): Likewise.
15004 (adddi3_i): Remove pattern.
15005 (subdi3_i): Likewise.
15007 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
15009 * config/arc/arc.md (eh_return): Add length info.
15011 2020-03-02 David Malcolm <dmalcolm@redhat.com>
15013 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
15015 2020-03-02 David Malcolm <dmalcolm@redhat.com>
15017 * doc/invoke.texi (Static Analyzer Options): Add
15018 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
15021 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
15024 * config/i386/i386.md (movstrict<mode>): Allow only
15025 registers with VALID_INT_MODE_P modes.
15027 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
15029 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
15030 (reduc_insn): Use 'U' and 'B' operand codes.
15031 (reduc_<reduc_op>_scal_<mode>): Allow all types.
15032 (reduc_<reduc_op>_scal_v64di): Delete.
15033 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
15034 (*plus_carry_dpp_shr_v64si): Change to ...
15035 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
15036 (mov_from_lane63_v64di): Change to ...
15037 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
15038 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
15039 Support UNSPEC_MOV_DPP_SHR output formats.
15040 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
15041 Add "use_extends" reductions.
15042 (print_operand_address): Add 'I' and 'U' codes.
15043 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
15045 2020-03-02 Martin Liska <mliska@suse.cz>
15047 * lto-wrapper.c: Fix typo in comment about
15048 C++ standard version.
15050 2020-03-01 Martin Sebor <msebor@redhat.com>
15053 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
15055 2020-03-01 Martin Sebor <msebor@redhat.com>
15057 PR middle-end/93829
15058 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
15059 of a pointer in the outermost ADDR_EXPRs.
15061 2020-02-28 Jeff Law <law@redhat.com>
15063 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
15064 * config/v850/v850.c (v850_asm_trampoline_template): Update
15067 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
15070 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
15073 2020-02-28 Martin Liska <mliska@suse.cz>
15076 * configure.ac: Improve detection of ld_date by requiring
15077 either two dashes or none.
15078 * configure: Regenerate.
15080 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
15082 PR rtl-optimization/93564
15083 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
15084 do not honor reg alloc order.
15086 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
15089 * config/aarch64/aarch64.c (aarch64_override_options): Fix
15090 misleading warning string.
15092 2020-02-27 Martin Sebor <msebor@redhat.com>
15094 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
15096 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
15099 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
15100 Split the insn into two parts. This insn only does variable
15101 extract from a register.
15102 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
15103 variable extract from memory.
15104 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
15105 only does variable extract from a register.
15106 (vsx_extract_v4sf_var_load): New insn, do variable extract from
15108 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
15109 into two parts. This insn only does variable extract from a
15111 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
15112 do variable extract from memory.
15114 2020-02-27 Martin Jambor <mjambor@suse.cz>
15115 Feng Xue <fxue@os.amperecomputing.com>
15118 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
15119 new function calls_same_node_or_its_all_contexts_clone_p.
15120 (cgraph_edge_brings_value_p): Use it.
15121 (cgraph_edge_brings_value_p): Likewise.
15122 (self_recursive_pass_through_p): Return false if caller is a clone.
15123 (self_recursive_agg_pass_through_p): Likewise.
15125 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
15127 PR middle-end/92152
15128 * alias.c (ends_tbaa_access_path_p): Break out from ...
15129 (component_uses_parent_alias_set_from): ... here.
15130 * alias.h (ends_tbaa_access_path_p): Declare.
15131 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
15132 handle trailing arrays past end of tbaa access path.
15133 (aliasing_component_refs_p): ... here; likewise.
15134 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
15135 path; disambiguate also past end of it.
15136 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
15139 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
15141 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
15142 beginning of the file.
15143 (vcreate_bf16, vcombine_bf16): New.
15144 (vdup_n_bf16, vdupq_n_bf16): New.
15145 (vdup_lane_bf16, vdup_laneq_bf16): New.
15146 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
15147 (vduph_lane_bf16, vduph_laneq_bf16): New.
15148 (vset_lane_bf16, vsetq_lane_bf16): New.
15149 (vget_lane_bf16, vgetq_lane_bf16): New.
15150 (vget_high_bf16, vget_low_bf16): New.
15151 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
15152 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
15153 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
15154 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
15155 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
15156 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
15157 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
15158 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
15159 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
15160 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
15161 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
15162 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
15163 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
15164 (vreinterpretq_bf16_p128): New.
15165 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
15166 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
15167 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
15168 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
15169 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
15170 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
15171 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
15172 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
15173 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
15174 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
15175 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
15176 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
15177 (vreinterpretq_p128_bf16): New.
15178 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
15179 (V_elem): Likewise.
15180 (V_elem_l): Likewise.
15181 (VD_LANE): Likewise.
15183 (V_DOUBLE): Likewise.
15184 (VDQX): Add V4BF and V8BF.
15185 (V_two_elem, V_three_elem, V_four_elem): Likewise.
15187 (V_HALF): Likewise.
15188 (V_double_vector_mode): Likewise.
15189 (V_cmp_result): Likewise.
15190 (V_uf_sclr): Likewise.
15191 (V_sz_elem): Likewise.
15192 (Is_d_reg): Likewise.
15193 (V_mode_nunits): Likewise.
15194 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
15196 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
15198 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
15199 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
15200 (<expander><mode>3<exec>): Likewise.
15201 (<expander><mode>3): New.
15202 (v<expander><mode>3): New.
15203 (<expander><mode>3): New.
15204 (<expander><mode>3<exec>): Rename to ...
15205 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
15206 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
15208 2020-02-27 Alexandre Oliva <oliva@adacore.com>
15210 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
15213 2020-02-27 Richard Biener <rguenther@suse.de>
15215 PR tree-optimization/93508
15216 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
15217 non-_CHK variants. Valueize their length arguments.
15219 2020-02-27 Richard Biener <rguenther@suse.de>
15221 PR tree-optimization/93953
15222 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
15223 to the hash-map entry.
15225 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
15227 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
15229 2020-02-27 Mark Williams <mwilliams@fb.com>
15231 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
15232 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
15233 -ffile-prefix-map and -fmacro-prefix-map.
15234 * lto-streamer-out.c: Include file-prefix-map.h.
15235 (lto_output_location): Remap the file part of locations.
15237 2020-02-27 Jakub Jelinek <jakub@redhat.com>
15240 * gimplify.c (gimplify_init_constructor): Don't promote readonly
15241 DECL_REGISTER variables to TREE_STATIC.
15243 PR tree-optimization/93582
15244 PR tree-optimization/93945
15245 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
15246 non-zero INTEGER_CST second argument and ref->offset or ref->size
15247 not a multiple of BITS_PER_UNIT.
15249 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
15251 * doc/install.texi (Binaries): Update description of BullFreeware.
15253 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
15257 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
15258 C++ Language Options, Warning Options, and Static Analyzer
15259 Options lists. Document negative form of options enabled by
15260 default. Move some things around to more accurately sort
15261 warnings by category.
15262 (C++ Dialect Options, Warning Options, Static Analyzer
15263 Options): Document negative form of options when enabled by
15264 default. Move some things around to more accurately sort
15265 warnings by category. Add some missing index entries.
15266 Light copy-editing.
15268 2020-02-26 Carl Love <cel@us.ibm.com>
15271 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
15272 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
15273 for the vector unsigned short arguments. It is also listed as the
15274 name of the built-in for arguments vector unsigned short,
15275 vector unsigned int and vector unsigned long long built-ins. The
15276 name of the builtins for these arguments should be:
15277 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
15278 __builtin_crypto_vpmsumd respectively.
15280 2020-02-26 Richard Biener <rguenther@suse.de>
15282 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
15283 and load permutation.
15285 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
15287 PR middle-end/93843
15288 * optabs-tree.c (supportable_convert_operation): Reject types with
15291 2020-02-26 David Malcolm <dmalcolm@redhat.com>
15293 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
15295 2020-02-26 Jakub Jelinek <jakub@redhat.com>
15297 PR tree-optimization/93820
15298 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
15299 argument to ALL_INTEGER_CST_P boolean.
15300 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
15301 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
15302 adjacent INTEGER_CST store into merged_store->only_constants like
15305 2020-02-25 Jakub Jelinek <jakub@redhat.com>
15308 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
15310 * cfghooks.c (verify_flow_info): Likewise.
15311 * predict.c (combine_predictions_for_bb): Likewise.
15312 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
15313 sucessor -> successor.
15314 (find_traces_1_round): Fix comment typo, destinarion -> destination.
15315 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
15317 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
15318 message typo, sucessors -> successors.
15320 2020-02-25 Martin Sebor <msebor@redhat.com>
15322 * doc/extend.texi (attribute access): Correct an example.
15324 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
15326 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
15328 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
15329 (VAR15, VAR16): New.
15330 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
15331 (VD): Enable for V4BF.
15333 (VQ): Enable for V8BF.
15335 (VQ_NO2E): Likewise.
15336 (VDBL, Vdbl): Add V4BF.
15337 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
15338 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
15339 (bfloat16x8x2_t): Likewise.
15340 (bfloat16x4x3_t): Likewise.
15341 (bfloat16x8x3_t): Likewise.
15342 (bfloat16x4x4_t): Likewise.
15343 (bfloat16x8x4_t): Likewise.
15344 (vcombine_bf16): New.
15345 (vld1_bf16, vld1_bf16_x2): New.
15346 (vld1_bf16_x3, vld1_bf16_x4): New.
15347 (vld1q_bf16, vld1q_bf16_x2): New.
15348 (vld1q_bf16_x3, vld1q_bf16_x4): New.
15349 (vld1_lane_bf16): New.
15350 (vld1q_lane_bf16): New.
15351 (vld1_dup_bf16): New.
15352 (vld1q_dup_bf16): New.
15355 (vld2_dup_bf16): New.
15356 (vld2q_dup_bf16): New.
15359 (vld3_dup_bf16): New.
15360 (vld3q_dup_bf16): New.
15363 (vld4_dup_bf16): New.
15364 (vld4q_dup_bf16): New.
15365 (vst1_bf16, vst1_bf16_x2): New.
15366 (vst1_bf16_x3, vst1_bf16_x4): New.
15367 (vst1q_bf16, vst1q_bf16_x2): New.
15368 (vst1q_bf16_x3, vst1q_bf16_x4): New.
15369 (vst1_lane_bf16): New.
15370 (vst1q_lane_bf16): New.
15378 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
15380 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
15381 (VALL_F16): Likewise.
15382 (VALLDI_F16): Likewise.
15384 (Vetype): Likewise.
15385 (vswap_width_name): Likewise.
15386 (VSWAP_WIDTH): Likewise.
15390 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
15391 (vget_lane_bf16, vgetq_lane_bf16): New.
15392 (vcreate_bf16): New.
15393 (vdup_n_bf16, vdupq_n_bf16): New.
15394 (vdup_lane_bf16, vdup_laneq_bf16): New.
15395 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
15396 (vduph_lane_bf16, vduph_laneq_bf16): New.
15397 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
15398 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
15399 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
15400 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
15401 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
15402 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
15403 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
15404 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
15405 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
15406 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
15407 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
15408 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
15409 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
15410 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
15411 (vreinterpretq_bf16_p128): New.
15412 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
15413 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
15414 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
15415 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
15416 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
15417 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
15418 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
15419 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
15420 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
15421 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
15422 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
15423 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
15424 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
15425 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
15426 (vreinterpretq_p128_bf16): New.
15428 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
15430 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
15431 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
15432 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
15433 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
15434 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
15435 * config/arm/iterators.md (VSF2BF): New attribute.
15436 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
15437 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
15438 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
15440 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
15442 * config/arm/arm.md (required_for_purecode): New attribute.
15443 (enabled): Handle required_for_purecode.
15444 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
15445 work with -mpure-code.
15447 2020-02-25 Jakub Jelinek <jakub@redhat.com>
15449 PR rtl-optimization/93908
15450 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
15453 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
15455 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
15457 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
15459 * doc/install.texi (--enable-checking): Adjust wording.
15461 2020-02-25 Richard Biener <rguenther@suse.de>
15463 PR tree-optimization/93868
15464 * tree-vect-slp.c (slp_copy_subtree): New function.
15465 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
15466 re-arranging stmts in it.
15468 2020-02-25 Jakub Jelinek <jakub@redhat.com>
15470 PR middle-end/93874
15471 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
15472 dummy function and remove it at the end.
15474 PR translation/93864
15475 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
15476 paramter -> parameter.
15477 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
15478 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
15480 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
15482 * doc/install.texi (--enable-checking): Properly document current
15484 (--enable-stage1-checking): Minor clarification about bootstrap.
15486 2020-02-24 David Malcolm <dmalcolm@redhat.com>
15489 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
15490 -fanalyzer-checker=taint is also required.
15491 (-fanalyzer-checker=): Note that providing this option enables the
15492 given checker, and doing so may be required for checkers that are
15493 disabled by default.
15495 2020-02-24 David Malcolm <dmalcolm@redhat.com>
15497 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
15498 significant control flow events; add a "3" which shows all
15499 control flow events; the old "3" becomes "4".
15501 2020-02-24 Jakub Jelinek <jakub@redhat.com>
15503 PR tree-optimization/93582
15504 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
15505 pd.offset and pd.size to be counted in bits rather than bytes, add
15506 support for maxsizei that is not a multiple of BITS_PER_UNIT and
15507 handle bitfield stores and loads.
15508 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
15509 uncomparable quantities - bytes vs. bits. Allow push_partial_def
15510 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
15511 pd.offset/pd.size to be counted in bits rather than bytes.
15512 Formatting fix. Rename shadowed len variable to buflen.
15514 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
15515 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
15518 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
15519 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
15520 * opts-common.c (parse_options_from_collect_gcc_options): New function.
15521 (prepend_xassembler_to_collect_as_options): Likewise.
15522 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
15523 (prepend_xassembler_to_collect_as_options): Likewise.
15524 * lto-opts.c (lto_write_options): Stream assembler options
15525 in COLLECT_AS_OPTIONS.
15526 * lto-wrapper.c (xassembler_options_error): New static variable.
15527 (get_options_from_collect_gcc_options): Move parsing options code to
15528 parse_options_from_collect_gcc_options and call it.
15529 (merge_and_complain): Validate -Xassembler options.
15530 (append_compiler_options): Handle OPT_Xassembler.
15531 (run_gcc): Append command line -Xassembler options to
15532 collect_gcc_options.
15533 * doc/invoke.texi: Add documentation about using Xassembler
15536 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
15538 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
15540 (riscv_rtx_costs): Update cost model for LTGT.
15542 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
15544 PR rtl-optimization/93564
15545 * ira-color.c (struct update_cost_queue_elem): New member start.
15546 (queue_update_cost, get_next_update_cost): Add new arg start.
15547 (allocnos_conflict_p): New function.
15548 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
15549 Add checking conflicts with allocnos_conflict_p.
15550 (update_costs_from_prefs, restore_costs_from_copies): Adjust
15551 update_costs_from_allocno calls.
15552 (update_conflict_hard_regno_costs): Add checking conflicts with
15553 allocnos_conflict_p. Adjust calls of queue_update_cost and
15554 get_next_update_cost.
15555 (assign_hard_reg): Adjust calls of queue_update_cost. Add
15557 (bucket_allocno_compare_func): Restore previous version.
15559 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
15561 * config/pa/pa.c (pa_function_value): Fix check for word and
15562 double-word size when handling aggregate return values.
15563 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
15564 that homogeneous SFmode and DFmode aggregates are passed and returned
15565 in general registers.
15567 2020-02-21 Jakub Jelinek <jakub@redhat.com>
15569 PR translation/93759
15570 * opts.c (print_filtered_help): Translate help before appending
15571 messages to it rather than after that.
15573 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
15575 PR rtl-optimization/PR92989
15576 * lra-lives.c (process_bb_lives): Restore the original order
15577 of the bb liveness update. Call make_hard_regno_dead for each
15578 register clobbered at the start of an EH receiver.
15580 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
15583 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
15584 self-recursively generated.
15586 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
15589 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
15592 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
15594 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
15595 Document new target supports option.
15597 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
15599 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
15600 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
15601 * config/arm/iterators.md (MATMUL): New iterator.
15602 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
15603 (mmla_sfx): New attribute.
15604 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
15605 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
15606 (UNSPEC_MATMUL_US): New.
15608 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
15610 * config/arm/arm.md: Prevent scalar shifts from being used when big
15613 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
15614 Richard Biener <rguenther@suse.de>
15616 PR tree-optimization/93586
15617 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
15618 after mismatched array refs; do not sure type size information to
15619 recover from unmatched referneces with !flag_strict_aliasing_p.
15621 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
15623 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
15624 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
15625 (scatter_store<mode>): Rename to ...
15626 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
15627 (scatter<mode>_exec): Delete. Move contents ...
15628 (mask_scatter_store<mode>): ... here, and rename that to ...
15629 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
15630 Remove mode conversion.
15631 (mask_gather_load<mode>): Rename to ...
15632 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
15633 Remove mode conversion.
15634 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
15636 2020-02-21 Martin Jambor <mjambor@suse.cz>
15638 PR tree-optimization/93845
15639 * tree-sra.c (verify_sra_access_forest): Only test access size of
15642 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
15644 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
15645 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
15646 (addv64di3_exec): Likewise.
15647 (subv64di3): Likewise.
15648 (subv64di3_exec): Likewise.
15649 (addv64di3_zext): Likewise.
15650 (addv64di3_zext_exec): Likewise.
15651 (addv64di3_zext_dup): Likewise.
15652 (addv64di3_zext_dup_exec): Likewise.
15653 (addv64di3_zext_dup2): Likewise.
15654 (addv64di3_zext_dup2_exec): Likewise.
15655 (addv64di3_sext_dup2): Likewise.
15656 (addv64di3_sext_dup2_exec): Likewise.
15657 (<expander>v64di3): Likewise.
15658 (<expander>v64di3_exec): Likewise.
15659 (*<reduc_op>_dpp_shr_v64di): Likewise.
15660 (*plus_carry_dpp_shr_v64di): Likewise.
15661 * config/gcn/gcn.md (adddi3): Likewise.
15662 (addptrdi3): Likewise.
15663 (<expander>di3): Likewise.
15665 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
15667 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
15669 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
15671 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
15672 support. Use aarch64_emit_mult instead of emitting multiplication
15673 instructions directly.
15674 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
15675 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
15677 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
15679 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
15680 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
15681 instead of emitting multiplication instructions directly.
15682 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
15683 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
15684 (@aarch64_frecps<mode>): New expanders.
15686 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
15688 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
15689 on and produce uint64_ts rather than ints.
15690 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
15691 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
15693 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
15695 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
15696 an unused xmsk register when handling approximate rsqrt.
15698 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
15700 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
15701 flag_finite_math_only condition.
15703 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
15706 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
15707 to destination operand for shufps alternative.
15708 (*vec_extractv2si_1): Ditto.
15710 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
15713 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
15716 2020-02-20 Martin Liska <mliska@suse.cz>
15718 PR translation/93831
15719 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
15721 2020-02-20 Martin Liska <mliska@suse.cz>
15723 PR translation/93830
15724 * common/config/avr/avr-common.c: Remote trailing "|".
15726 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
15728 * collect2.c (maybe_run_lto_and_relink): Fix typo in
15731 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
15733 PR tree-optimization/93767
15734 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
15735 access-size bias from the offset calculations for negative strides.
15737 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
15739 * collect2.c (c_file, o_file): Make const again.
15740 (ldout,lderrout, dump_ld_file): Remove.
15741 (tool_cleanup): Avoid calling not signal-safe functions.
15742 (maybe_run_lto_and_relink): Avoid possible signal handler
15743 access to unintialzed memory (lto_o_files).
15744 (main): Avoid leaking temp files in $TMPDIR.
15745 Initialize c_file/o_file with concat, which avoids exposing
15746 uninitialized memory to signal handler, which calls unlink(!).
15747 Avoid calling maybe_unlink when the main function returns,
15748 since the atexit handler is already doing this.
15749 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
15751 2020-02-19 Martin Jambor <mjambor@suse.cz>
15753 PR tree-optimization/93776
15754 * tree-sra.c (create_access): Do not create zero size accesses.
15755 (get_access_for_expr): Do not search for zero sized accesses.
15757 2020-02-19 Martin Jambor <mjambor@suse.cz>
15759 PR tree-optimization/93667
15760 * tree-sra.c (scalarizable_type_p): Return false if record fields
15761 do not follow wach other.
15763 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
15765 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
15766 rather than fmv.x.s/fmv.s.x.
15768 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
15770 * config/aarch64/aarch64-simd-builtins.def
15771 (intrinsic_vec_smult_lo_): New.
15772 (intrinsic_vec_umult_lo_): Likewise.
15773 (vec_widen_smult_hi_): Likewise.
15774 (vec_widen_umult_hi_): Likewise.
15775 * config/aarch64/aarch64-simd.md
15776 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
15777 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
15778 (vmull_high_s16): Likewise.
15779 (vmull_high_s32): Likewise.
15780 (vmull_high_u8): Likewise.
15781 (vmull_high_u16): Likewise.
15782 (vmull_high_u32): Likewise.
15783 (vmull_s8): Likewise.
15784 (vmull_s16): Likewise.
15785 (vmull_s32): Likewise.
15786 (vmull_u8): Likewise.
15787 (vmull_u16): Likewise.
15788 (vmull_u32): Likewise.
15790 2020-02-18 Martin Liska <mliska@suse.cz>
15792 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
15793 bootstrap by missing removal of invalid sanity check.
15795 2020-02-18 Martin Liska <mliska@suse.cz>
15798 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
15799 Always compare LHS of gimple_assign.
15801 2020-02-18 Martin Liska <mliska@suse.cz>
15804 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
15805 and return type of functions.
15806 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
15807 Drop MALLOC attribute for void functions.
15808 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
15809 malloc_state for a new VOID clone.
15811 2020-02-18 Martin Liska <mliska@suse.cz>
15814 * common.opt: Add -fprofile-reproducibility.
15815 * doc/invoke.texi: Document it.
15816 * value-prof.c (dump_histogram_value):
15817 Document and support behavior for counters[0]
15818 being a negative value.
15819 (get_nth_most_common_value): Handle negative
15820 counters[0] in respect to flag_profile_reproducible.
15822 2020-02-18 Jakub Jelinek <jakub@redhat.com>
15825 * cgraph.c (verify_speculative_call): Use speculative_id instead of
15826 speculative_uid in messages. Remove trailing whitespace from error
15827 message. Use num_speculative_call_targets instead of
15828 num_speculative_targets in a message.
15829 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
15830 edge messages and stmt instead of cal_stmt in reference message.
15832 PR tree-optimization/93780
15833 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
15834 before calling build_vector_type.
15835 (execute_update_addresses_taken): Likewise.
15838 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
15839 typo, functoin -> function.
15840 * tree.c (free_lang_data_in_decl): Fix comment typo,
15841 functoin -> function.
15842 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
15844 2020-02-17 David Malcolm <dmalcolm@redhat.com>
15846 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
15848 (print_option_information): Don't call get_option_url if URLs
15851 2020-02-17 Alexandre Oliva <oliva@adacore.com>
15853 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
15854 handling of register_common-less targets.
15856 2020-02-17 Martin Liska <mliska@suse.cz>
15859 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
15861 2020-02-17 Martin Liska <mliska@suse.cz>
15863 PR translation/93755
15864 * config/rs6000/rs6000.c (rs6000_option_override_internal):
15867 2020-02-17 Martin Liska <mliska@suse.cz>
15870 * config/rx/elf.opt: Fix typo.
15872 2020-02-17 Richard Biener <rguenther@suse.de>
15875 * opts-global.c (print_ignored_options): Use inform and
15878 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
15881 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
15883 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
15886 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
15887 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
15889 2020-02-15 Jason Merrill <jason@redhat.com>
15891 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
15893 2020-02-15 Jakub Jelinek <jakub@redhat.com>
15895 PR tree-optimization/93744
15896 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
15897 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
15898 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
15899 sure @2 in the first and @1 in the other patterns has no side-effects.
15901 2020-02-15 David Malcolm <dmalcolm@redhat.com>
15902 Bernd Edlinger <bernd.edlinger@hotmail.de>
15906 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
15907 * configure.ac (--with-diagnostics-urls): New configuration
15908 option, based on --with-diagnostics-color.
15909 (DIAGNOSTICS_URLS_DEFAULT): New define.
15910 * config.h: Regenerate.
15911 * configure: Regenerate.
15912 * diagnostic.c (diagnostic_urls_init): Handle -1 for
15913 DIAGNOSTICS_URLS_DEFAULT from configure-time
15914 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
15915 and TERM_URLS environment variable.
15916 * diagnostic-url.h (diagnostic_url_format): New enum type.
15917 (diagnostic_urls_enabled_p): rename to...
15918 (determine_url_format): ... this, and change return type.
15919 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
15920 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
15921 the linux console, and mingw.
15922 (diagnostic_urls_enabled_p): rename to...
15923 (determine_url_format): ... this, and adjust.
15924 * pretty-print.h (pretty_printer::show_urls): rename to...
15925 (pretty_printer::url_format): ... this, and change to enum.
15926 * pretty-print.c (pretty_printer::pretty_printer,
15927 pp_begin_url, pp_end_url, test_urls): Adjust.
15928 * doc/install.texi (--with-diagnostics-urls): Document the new
15929 configuration option.
15930 (--with-diagnostics-color): Document the existing interaction
15931 with GCC_COLORS better.
15932 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
15933 vindex reference. Update description of defaults based on the above.
15934 (-fdiagnostics-color): Update description of how -fdiagnostics-color
15935 interacts with GCC_COLORS.
15937 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
15940 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
15941 conjunction with TARGET_GNU_TLS in early return.
15943 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
15945 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
15946 the mode is not wider than UNITS_PER_WORD.
15948 2020-02-14 Martin Jambor <mjambor@suse.cz>
15950 PR tree-optimization/93516
15951 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
15952 access of the same type as the parent.
15953 (propagate_subaccesses_from_lhs): Likewise.
15955 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
15958 * config/i386/avx512vbmi2intrin.h
15959 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
15960 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
15961 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
15962 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
15963 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
15964 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
15965 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
15966 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
15967 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
15968 of lacking a closing parenthesis.
15969 * config/i386/avx512vbmi2vlintrin.h
15970 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
15971 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
15972 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
15973 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
15974 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
15975 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
15976 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
15977 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
15978 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
15979 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
15980 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
15981 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
15982 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
15983 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
15984 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
15985 _mm_shldi_epi32, _mm_mask_shldi_epi32,
15986 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
15987 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
15989 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
15992 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
15993 the target function entry.
15995 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
15997 * common/config/arc/arc-common.c (arc_option_optimization_table):
15998 Disable if-conversion step when optimized for size.
16000 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
16002 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
16003 R12-R15 are always in ARCOMPACT16_REGS register class.
16004 * config/arc/arc.opt (mq-class): Deprecate.
16005 * config/arc/constraint.md ("q"): Remove dependency on mq-class
16007 * doc/invoke.texi (mq-class): Update text.
16008 * common/config/arc/arc-common.c (arc_option_optimization_table):
16011 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
16013 * config/arc/arc.c (arc_insn_cost): New function.
16014 (TARGET_INSN_COST): Define.
16015 * config/arc/arc.md (cost): New attribute.
16016 (add_n): Use arc_nonmemory_operand.
16017 (ashlsi3_insn): Likewise, also update constraints.
16018 (ashrsi3_insn): Likewise.
16019 (rotrsi3): Likewise.
16020 (add_shift): Likewise.
16021 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
16023 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
16025 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
16027 (umulsidi_600): Likewise.
16029 2020-02-13 Jakub Jelinek <jakub@redhat.com>
16032 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
16033 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
16034 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
16035 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
16036 pass __A to the builtin followed by __W instead of __A followed by
16038 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
16039 _mm512_mask_popcnt_epi64): Likewise.
16040 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
16041 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
16042 _mm256_mask_popcnt_epi64): Likewise.
16044 PR tree-optimization/93582
16045 * fold-const.h (shift_bytes_in_array_left,
16046 shift_bytes_in_array_right): Declare.
16047 * fold-const.c (shift_bytes_in_array_left,
16048 shift_bytes_in_array_right): New function, moved from
16049 gimple-ssa-store-merging.c, no longer static.
16050 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
16051 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
16052 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
16053 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
16054 shift_bytes_in_array.
16055 (verify_shift_bytes_in_array): Rename to ...
16056 (verify_shift_bytes_in_array_left): ... this. Use
16057 shift_bytes_in_array_left instead of shift_bytes_in_array.
16058 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
16059 instead of verify_shift_bytes_in_array.
16060 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
16061 / native_interpret_expr where the store covers all needed bits,
16062 punt on PDP-endian, otherwise allow all involved offsets and sizes
16063 not to be byte-aligned.
16066 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
16067 use const_0_to_255_operand predicate instead of immediate_operand.
16068 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
16069 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
16070 vgf2p8affineinvqb_<mode><mask_name>,
16071 vgf2p8affineqb_<mode><mask_name>): Drop mode from
16072 const_0_to_255_operand predicated operands.
16074 2020-02-12 Jeff Law <law@redhat.com>
16076 * config/h8300/h8300.md (comparison shortening peepholes): Use
16077 a mode iterator to merge the HImode and SImode peepholes.
16079 2020-02-12 Jakub Jelinek <jakub@redhat.com>
16081 PR middle-end/93663
16082 * real.c (is_even): Make static. Function comment fix.
16083 (is_halfway_below): Make static, don't assert R is not inf/nan,
16084 instead return false for those. Small formatting fixes.
16086 2020-02-12 Martin Sebor <msebor@redhat.com>
16088 PR middle-end/93646
16089 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
16090 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
16091 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
16092 (strlen_check_and_optimize_call): Adjust callee name.
16094 2020-02-12 Jeff Law <law@redhat.com>
16096 * config/h8300/h8300.md (comparison shortening peepholes): Drop
16097 (and (xor)) variant. Combine other two into single peephole.
16099 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
16101 PR rtl-optimization/93565
16102 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
16104 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
16106 * config/aarch64/aarch64-simd.md
16107 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
16108 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
16109 generating separate ADDV and zero_extend patterns.
16110 * config/aarch64/iterators.md (VDQV_E): New iterator.
16112 2020-02-12 Jeff Law <law@redhat.com>
16114 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
16115 expanders, splits, etc.
16116 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
16117 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
16118 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
16119 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
16120 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
16121 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
16122 function prototype.
16123 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
16125 2020-02-12 Jakub Jelinek <jakub@redhat.com>
16128 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
16129 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
16130 TARGET_AVX512DQ from condition.
16131 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
16132 instead of <mask_mode512bit_condition> in condition. If
16133 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
16135 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
16138 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
16141 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
16143 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
16145 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
16146 where strlen is more legible.
16147 (rs6000_builtin_vectorized_libmass): Ditto.
16148 (rs6000_print_options_internal): Ditto.
16150 2020-02-11 Martin Sebor <msebor@redhat.com>
16152 PR tree-optimization/93683
16153 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
16155 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
16157 * config/rs6000/predicates.md (cint34_operand): Rename the
16158 -mprefixed-addr option to be -mprefixed.
16159 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
16160 the -mprefixed-addr option to be -mprefixed.
16161 (OTHER_FUTURE_MASKS): Likewise.
16162 (POWERPC_MASKS): Likewise.
16163 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
16164 the -mprefixed-addr option to be -mprefixed. Change error
16165 messages to refer to -mprefixed.
16166 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
16168 (rs6000_legitimate_offset_address_p): Likewise.
16169 (rs6000_mode_dependent_address): Likewise.
16170 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
16171 "-mprefixed" for target attributes and pragmas.
16172 (address_to_insn_form): Rename the -mprefixed-addr option to be
16174 (rs6000_adjust_insn_length): Likewise.
16175 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
16176 -mprefixed-addr option to be -mprefixed.
16177 (ASM_OUTPUT_OPCODE): Likewise.
16178 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
16179 -mprefixed-addr option to be -mprefixed.
16180 * config/rs6000/rs6000.opt (-mprefixed): Rename the
16181 -mprefixed-addr option to be prefixed. Change the option from
16182 being undocumented to being documented.
16183 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
16184 -mprefixed option. Update the -mpcrel documentation to mention
16187 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
16189 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
16190 including FIRST_PSEUDO_REGISTER - 1.
16191 * ira-color.c (print_hard_reg_set): Ditto.
16193 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16195 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
16196 (USTERNOP_QUALIFIERS): New define.
16197 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
16198 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
16199 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
16200 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
16201 * config/arm/arm_neon.h (vusdot_s32): New.
16202 (vusdot_lane_s32): New.
16203 (vusdotq_lane_s32): New.
16204 (vsudot_lane_s32): New.
16205 (vsudotq_lane_s32): New.
16206 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
16207 * config/arm/iterators.md (DOTPROD_I8MM): New.
16208 (sup, opsuffix): Add <us/su>.
16209 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
16210 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
16212 2020-02-11 Richard Biener <rguenther@suse.de>
16214 PR tree-optimization/93661
16215 PR tree-optimization/93662
16216 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
16217 tree_to_poly_int64.
16218 * tree-sra.c (get_access_for_expr): Likewise.
16220 2020-02-10 Jakub Jelinek <jakub@redhat.com>
16223 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
16224 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
16225 Change condition from TARGET_AVX2 to TARGET_AVX.
16227 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
16230 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
16231 argument of strncmp.
16233 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
16235 Try to generate zero-based comparisons.
16236 * config/cris/cris.c (cris_reduce_compare): New function.
16237 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
16238 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
16239 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
16241 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
16244 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
16245 in Thumb state and also as a destination in Arm state. Add T16
16248 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
16250 * md.texi (Define Subst): Match closing paren in example.
16252 2020-02-10 Jakub Jelinek <jakub@redhat.com>
16256 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
16257 arguments of strncmp.
16259 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
16262 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
16263 but different source value.
16264 (adjust_callers_for_value_intersection): New function.
16265 (gather_edges_for_value): Adjust order of callers to let a
16266 non-self-recursive caller be the first element.
16267 (self_recursive_pass_through_p): Add a new parameter "simple", and
16268 check generalized self-recursive pass-through jump function.
16269 (self_recursive_agg_pass_through_p): Likewise.
16270 (find_more_scalar_values_for_callers_subset): Compute value from
16271 pass-through jump function for self-recursive.
16272 (intersect_with_plats): Cleanup previous implementation code for value
16273 itersection with self-recursive call edge.
16274 (intersect_with_agg_replacements): Likewise.
16275 (intersect_aggregates_with_edge): Deduce value from pass-through jump
16276 function for self-recursive call edge. Cleanup previous implementation
16277 code for value intersection with self-recursive call edge.
16278 (decide_whether_version_node): Remove dead callers and adjust order
16279 to let a non-self-recursive caller be the first element.
16281 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
16283 * recog.c: Move pass_split_before_sched2 code in front of
16284 pass_split_before_regstack.
16285 (pass_data_split_before_sched2): Rename pass to split3 from split4.
16286 (pass_data_split_before_regstack): Rename pass to split4 from split3.
16287 (rest_of_handle_split_before_sched2): Remove.
16288 (pass_split_before_sched2::execute): Unconditionally call
16290 (enable_split_before_sched2): New function.
16291 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
16292 (pass_split_before_regstack::gate): Ditto.
16293 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
16294 Update name check for renamed split4 pass.
16295 * config/sh/sh.c (register_sh_passes): Update pass insertion
16296 point for renamed split4 pass.
16298 2020-02-09 Jakub Jelinek <jakub@redhat.com>
16300 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
16301 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
16302 copying them around between host and target.
16304 2020-02-08 Andrew Pinski <apinski@marvell.com>
16307 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
16308 STRICT_ALIGNMENT also.
16310 2020-02-08 Jim Wilson <jimw@sifive.com>
16313 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
16315 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
16316 Jakub Jelinek <jakub@redhat.com>
16319 * config/i386/i386.h (CALL_USED_REGISTERS): Make
16320 xmm16-xmm31 call-used even in 64-bit ms-abi.
16322 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
16324 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
16325 (simd_ummla, simd_usmmla): Likewise.
16326 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
16327 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
16328 (vusmmlaq_s32): New.
16330 2020-02-07 Richard Biener <rguenther@suse.de>
16332 PR middle-end/93519
16333 * tree-inline.c (fold_marked_statements): Do a PRE walk,
16334 skipping unreachable regions.
16335 (optimize_inline_calls): Skip folding stmts when we didn't
16338 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
16341 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
16342 Don't return aggregates with only SFmode and DFmode in SSE
16344 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
16346 2020-02-07 Jakub Jelinek <jakub@redhat.com>
16349 * config/rs6000/rs6000-logue.c
16350 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
16351 if it fails, move rs into end_addr and retry. Add
16352 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
16353 the insn pattern doesn't describe well what exactly happens to
16357 * config/i386/predicates.md (avx_identity_operand): Remove.
16358 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
16359 (avx_<castmode><avxsizesuffix>_<castmode>,
16360 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
16361 a VEC_CONCAT of the operand and UNSPEC_CAST.
16362 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
16363 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
16367 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
16368 recog_data.insn if distance_non_agu_define changed it.
16370 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
16373 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
16374 we only had X-FORM (reg+reg) addressing for vectors. Also before
16375 ISA 3.0, we only had X-FORM addressing for scalars in the
16376 traditional Altivec registers.
16378 2020-02-06 <zhongyunde@huawei.com>
16379 Vladimir Makarov <vmakarov@redhat.com>
16381 PR rtl-optimization/93561
16382 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
16383 hard register range.
16385 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
16387 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
16390 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
16392 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
16393 where the low and the high 32 bits are equal to each other specially,
16394 with an rldimi instruction.
16396 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
16398 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
16400 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
16402 * config/arm/arm-tables.opt: Regenerate.
16404 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
16407 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
16408 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
16409 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
16411 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
16413 PR rtl-optimization/87763
16414 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
16416 2020-02-06 Delia Burduv <delia.burduv@arm.com>
16418 * config/aarch64/aarch64-simd-builtins.def
16419 (bfmlaq): New built-in function.
16420 (bfmlalb): New built-in function.
16421 (bfmlalt): New built-in function.
16422 (bfmlalb_lane): New built-in function.
16423 (bfmlalt_lane): New built-in function.
16424 * config/aarch64/aarch64-simd.md
16425 (aarch64_bfmmlaqv4sf): New pattern.
16426 (aarch64_bfmlal<bt>v4sf): New pattern.
16427 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
16428 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
16429 (vbfmlalbq_f32): New intrinsic.
16430 (vbfmlaltq_f32): New intrinsic.
16431 (vbfmlalbq_lane_f32): New intrinsic.
16432 (vbfmlaltq_lane_f32): New intrinsic.
16433 (vbfmlalbq_laneq_f32): New intrinsic.
16434 (vbfmlaltq_laneq_f32): New intrinsic.
16435 * config/aarch64/iterators.md (BF_MLA): New int iterator.
16436 (bt): New int attribute.
16438 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
16440 * config/i386/i386.md (*pushtf): Emit "#" instead of
16441 calling gcc_unreachable in insn output.
16444 (*pushsf_rex64): Ditto for alternatives other than 1.
16445 (*pushsf): Ditto for alternatives other than 1.
16447 2020-02-06 Martin Liska <mliska@suse.cz>
16449 PR gcov-profile/91971
16450 PR gcov-profile/93466
16451 * coverage.c (coverage_init): Revert mangling of
16452 path into filename. It can lead to huge filename length.
16453 Creation of subfolders seem more natural.
16455 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16458 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
16459 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
16460 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
16462 2020-02-06 Jakub Jelinek <jakub@redhat.com>
16465 * config/i386/predicates.md (avx_identity_operand): New predicate.
16466 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
16467 define_insn_and_split.
16470 * omp-low.c (use_pointer_for_field): For nested constructs, also
16471 look for map clauses on target construct.
16472 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
16473 taskreg_nesting_level.
16476 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
16477 shared clause, call omp_notice_variable on outer context if any.
16479 2020-02-05 Jason Merrill <jason@redhat.com>
16482 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
16483 non-zero address even if weak and not yet defined.
16485 2020-02-05 Martin Sebor <msebor@redhat.com>
16487 PR tree-optimization/92765
16488 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
16489 * tree-ssa-strlen.c (compute_string_length): Remove.
16490 (determine_min_objsize): Remove.
16491 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
16492 Avoid using type size as the upper bound on string length.
16493 (handle_builtin_string_cmp): Add an argument. Adjust.
16494 (strlen_check_and_optimize_call): Pass additional argument to
16495 handle_builtin_string_cmp.
16497 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
16499 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
16500 (*pushdi2_rex64 peephole2): Unconditionally split after
16501 epilogue_completed.
16502 (*ashl<mode>3_doubleword): Ditto.
16503 (*<shift_insn><mode>3_doubleword): Ditto.
16505 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
16508 * config/rs6000/rs6000.c (get_vector_offset): Fix
16510 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
16512 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
16514 2020-02-05 David Malcolm <dmalcolm@redhat.com>
16516 * doc/analyzer.texi
16517 (Special Functions for Debugging the Analyzer): Update description
16518 of __analyzer_dump_exploded_nodes.
16520 2020-02-05 Jakub Jelinek <jakub@redhat.com>
16523 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
16524 include sets and not clobbers in the vzeroupper pattern.
16525 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
16526 the parallel has 17 (64-bit) or 9 (32-bit) elts.
16527 (*avx_vzeroupper_1): New define_insn_and_split.
16530 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
16531 don't run when !optimize.
16532 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
16535 2020-02-05 Richard Biener <rguenther@suse.de>
16537 PR middle-end/90648
16538 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
16539 checks before matching calls.
16541 2020-02-05 Jakub Jelinek <jakub@redhat.com>
16543 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
16544 function comment typo.
16546 PR middle-end/93555
16547 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
16548 simd_clone_create failed when i == 0, adjust clone->nargs by
16551 2020-02-05 Martin Liska <mliska@suse.cz>
16554 * doc/invoke.texi: Document that one should
16555 not combine ASLR and -fpch.
16557 2020-02-04 Richard Biener <rguenther@suse.de>
16559 PR tree-optimization/93538
16560 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
16562 2020-02-04 Richard Biener <rguenther@suse.de>
16564 PR tree-optimization/91123
16565 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
16566 (vn_walk_cb_data::last_vuse): New member.
16567 (vn_walk_cb_data::saved_operands): Likewsie.
16568 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
16569 (vn_walk_cb_data::push_partial_def): Use finish.
16570 (vn_reference_lookup_2): Update last_vuse and use finish if
16571 we've saved operands.
16572 (vn_reference_lookup_3): Use finish and update calls to
16573 push_partial_defs everywhere. When translating through
16574 memcpy or aggregate copies save off operands and alias-set.
16575 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
16576 operation for redundant store removal.
16578 2020-02-04 Richard Biener <rguenther@suse.de>
16580 PR tree-optimization/92819
16581 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
16582 generating more stmts than before.
16584 2020-02-04 Martin Liska <mliska@suse.cz>
16586 * config/arm/arm.c (arm_gen_far_branch): Move the function
16587 outside of selftests.
16589 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
16591 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
16592 function to adjust PC-relative vector addresses.
16593 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
16594 handle vectors with PC-relative addresses.
16596 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
16598 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
16600 (hard_reg_and_mode_to_addr_mask): Delete.
16601 (rs6000_adjust_vec_address): If the original vector address
16602 was REG+REG or REG+OFFSET and the element is not zero, do the add
16603 of the elements in the original address before adding the offset
16604 for the vector element. Use address_to_insn_form to validate the
16605 address using the register being loaded, rather than guessing
16606 whether the address is a DS-FORM or DQ-FORM address.
16608 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
16610 * config/rs6000/rs6000.c (get_vector_offset): New helper function
16611 to calculate the offset in memory from the start of a vector of a
16612 particular element. Add code to keep the element number in
16613 bounds if the element number is variable.
16614 (rs6000_adjust_vec_address): Move calculation of offset of the
16615 vector element to get_vector_offset.
16616 (rs6000_split_vec_extract_var): Do not do the initial AND of
16617 element here, move the code to get_vector_offset.
16619 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
16621 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
16624 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
16626 * config/rs6000/constraints.md: Improve documentation.
16628 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
16631 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
16632 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
16634 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
16636 * config.gcc: Remove "carrizo" support.
16637 * config/gcn/gcn-opts.h (processor_type): Likewise.
16638 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
16639 * config/gcn/gcn.opt (gpu_type): Likewise.
16640 * config/gcn/t-omp-device: Likewise.
16642 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16645 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
16646 * config/arm/arm.c (arm_gen_far_branch): New function
16647 arm_gen_far_branch.
16648 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
16650 2020-02-03 Julian Brown <julian@codesourcery.com>
16651 Tobias Burnus <tobias@codesourcery.com>
16653 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
16655 2020-02-03 Jakub Jelinek <jakub@redhat.com>
16658 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
16659 valid RTL to sum up the lowest and second lowest bytes of the popcnt
16662 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
16664 PR rtl-optimization/91333
16665 * ira-color.c (struct allocno_color_data): Add member
16667 (init_allocno_threads): Set the member up.
16668 (bucket_allocno_compare_func): Add compare hard reg
16671 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
16673 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
16675 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
16676 * config.in: Regenerated.
16677 * configure: Regenerated.
16678 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
16679 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
16680 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
16682 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
16684 * configure: Regenerate.
16686 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
16688 PR rtl-optimization/91333
16689 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
16690 reg preferences comparison up.
16692 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
16694 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
16695 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
16696 aarch64-sve-builtins-base.h.
16697 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
16698 aarch64-sve-builtins-base.cc.
16699 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
16700 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
16701 (svcvtnt): Declare.
16702 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
16703 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
16704 (svcvtnt): New functions.
16705 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
16706 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
16707 (svcvtnt): New functions.
16708 (svcvt): Add a form that converts f32 to bf16.
16709 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
16710 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
16712 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
16713 Treat B as bfloat16_t.
16714 (ternary_bfloat_lane_base): New class.
16715 (ternary_bfloat_def): Likewise.
16716 (ternary_bfloat): New shape.
16717 (ternary_bfloat_lane_def): New class.
16718 (ternary_bfloat_lane): New shape.
16719 (ternary_bfloat_lanex2_def): New class.
16720 (ternary_bfloat_lanex2): New shape.
16721 (ternary_bfloat_opt_n_def): New class.
16722 (ternary_bfloat_opt_n): New shape.
16723 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
16724 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
16725 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
16726 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
16727 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
16728 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
16729 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
16730 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
16731 the pattern off the narrow mode instead of the wider one.
16732 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
16733 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
16734 (sve_fp_op): Handle them.
16735 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
16736 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
16738 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
16740 * config/aarch64/arm_sve.h: Include arm_bf16.h.
16741 * config/aarch64/aarch64-modes.def (BF): Move definition before
16742 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
16743 (SVE_MODES): Handle BF modes.
16744 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
16746 (aarch64_full_sve_mode): Likewise.
16747 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
16749 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
16750 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
16751 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
16752 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
16754 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
16756 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
16757 (TYPES_all_data): Add bf16.
16758 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
16759 (register_tuple_type): Increase buffer size.
16760 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
16761 (bf16): New type suffix.
16762 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
16763 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
16764 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
16765 Change type from all_data to all_arith.
16766 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
16767 (svminp): Likewise.
16769 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
16770 Matthew Malcomson <matthew.malcomson@arm.com>
16771 Richard Sandiford <richard.sandiford@arm.com>
16773 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
16774 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
16775 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
16776 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
16777 __ARM_FEATURE_MATMUL_FP64.
16778 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
16779 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
16780 be disabled at the same time.
16781 (f32mm): New extension.
16782 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
16783 (AARCH64_FL_F64MM): Bump to the next bit up.
16784 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
16785 (TARGET_SVE_F64MM): New macros.
16786 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
16787 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
16788 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
16789 (UNSPEC_ZIP2Q): New unspeccs.
16790 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
16791 (optab, sur, perm_insn): Handle the new unspecs.
16792 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
16793 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
16794 TARGET_SVE_F64MM instead of separate tests.
16795 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
16796 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
16797 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
16798 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
16799 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
16800 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
16801 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
16802 (TYPES_s_signed): New macro.
16803 (TYPES_s_integer): Use it.
16804 (TYPES_d_float): New macro.
16805 (TYPES_d_data): Use it.
16806 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
16807 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
16808 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
16809 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
16810 (svmmla): New shape.
16811 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
16812 template parameters.
16813 (ternary_resize2_lane_base): Likewise.
16814 (ternary_resize2_base): New class.
16815 (ternary_qq_lane_base): Likewise.
16816 (ternary_intq_uintq_lane_def): Likewise.
16817 (ternary_intq_uintq_lane): New shape.
16818 (ternary_intq_uintq_opt_n_def): New class
16819 (ternary_intq_uintq_opt_n): New shape.
16820 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
16821 (ternary_uintq_intq_def): New class.
16822 (ternary_uintq_intq): New shape.
16823 (ternary_uintq_intq_lane_def): New class.
16824 (ternary_uintq_intq_lane): New shape.
16825 (ternary_uintq_intq_opt_n_def): New class.
16826 (ternary_uintq_intq_opt_n): New shape.
16827 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
16828 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
16829 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
16830 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
16832 (svdotprod_lane_impl): ...this new class.
16833 (svmmla_impl, svusdot_impl): New classes.
16834 (svdot_lane): Update to use svdotprod_lane_impl.
16835 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
16836 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
16838 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
16839 function, with no types defined.
16840 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
16841 AARCH64_FL_I8MM functions.
16842 (svmmla): New AARCH64_FL_F32MM function.
16843 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
16844 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
16845 AARCH64_FL_F64MM function.
16846 (REQUIRED_EXTENSIONS):
16848 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
16850 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
16853 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
16855 * config/i386/i386.md (*movoi_internal_avx): Do not check for
16856 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
16857 (*movti_internal): Do not check for
16858 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
16859 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
16860 just after check for TARGET_AVX.
16861 (*movdf_internal): Ditto.
16862 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
16863 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
16864 * config/i386/sse.md (mov<mode>_internal): Only check
16865 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
16866 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
16867 (<sse>_andnot<mode>3<mask_name>): Move check for
16868 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
16869 (<code><mode>3<mask_name>): Ditto.
16870 (*andnot<mode>3): Ditto.
16871 (*andnottf3): Ditto.
16872 (*<code><mode>3): Ditto.
16873 (*<code>tf3): Ditto.
16874 (*andnot<VI:mode>3): Remove
16875 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
16876 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
16877 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
16878 (sse4_1_blendv<ssemodesuffix>): Ditto.
16879 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
16880 Explain that tune applies to 128bit instructions only.
16882 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
16884 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
16885 to definition of hsa_kernel_description. Parse assembly to find SGPR
16886 and VGPR count of kernel and store in hsa_kernel_description.
16888 2020-01-31 Tamar Christina <tamar.christina@arm.com>
16890 PR rtl-optimization/91838
16891 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
16892 to truncate if allowed or reject combination.
16894 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
16896 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
16897 (find_inv_vars_cb): Likewise.
16899 2020-01-31 David Malcolm <dmalcolm@redhat.com>
16901 * calls.c (special_function_p): Split out the check for DECL_NAME
16902 being non-NULL and fndecl being extern at file scope into a
16903 new maybe_special_function_p and call it. Drop check for fndecl
16904 being non-NULL that was after a usage of DECL_NAME (fndecl).
16905 * tree.h (maybe_special_function_p): New inline function.
16907 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
16909 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
16910 (mask_gather_load<mode>): ... here, and zero-initialize the
16912 (maskload<mode>di): Zero-initialize the destination.
16913 * config/gcn/gcn.c:
16915 2020-01-30 David Malcolm <dmalcolm@redhat.com>
16918 * doc/analyzer.texi (Limitations): Note that constraints on
16919 floating-point values are currently ignored.
16921 2020-01-30 Jakub Jelinek <jakub@redhat.com>
16924 * symtab.c (symtab_node::noninterposable_alias): If localalias
16925 already exists, but is not usable, append numbers after it until
16926 a unique name is found. Formatting fix.
16928 PR middle-end/93505
16929 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
16932 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
16934 * config/gcn/gcn.c (print_operand): Handle LTGT.
16935 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
16937 2020-01-30 Richard Biener <rguenther@suse.de>
16939 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
16940 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
16942 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
16944 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
16945 without a DECL in .data.rel.ro.local.
16947 2020-01-30 Jakub Jelinek <jakub@redhat.com>
16950 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
16954 * config/i386/sse.md
16955 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
16956 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
16957 any_extend code iterator instead of always zero_extend.
16958 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
16959 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
16960 Use any_extend code iterator instead of always zero_extend.
16961 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
16962 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
16963 Use any_extend code iterator instead of always zero_extend.
16964 (*sse2_pmovmskb_ext): New define_insn.
16965 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
16968 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
16969 (*popcountsi2_zext_falsedep): New define_insn.
16971 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
16973 * config.in: Regenerated.
16974 * configure: Regenerated.
16976 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
16979 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
16980 LLVM's assembler changed the default in version 9.
16982 2020-01-24 Jeff Law <law@redhat.com>
16984 PR tree-optimization/89689
16985 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
16987 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
16991 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
16993 PR rtl-optimization/87763
16994 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
16995 simplification to handle subregs as well as bare regs.
16996 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
16998 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
17001 * ira.c (ira): Revert use of simplified LRA algorithm.
17003 2020-01-29 Martin Jambor <mjambor@suse.cz>
17005 PR tree-optimization/92706
17006 * tree-sra.c (struct access): Fields first_link, last_link,
17007 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
17008 next_rhs_queued and grp_rhs_queued respectively, new fields
17009 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
17010 (struct assign_link): Field next renamed to next_rhs, new field
17011 next_lhs. Updated comment.
17012 (work_queue_head): Renamed to rhs_work_queue_head.
17013 (lhs_work_queue_head): New variable.
17014 (add_link_to_lhs): New function.
17015 (relink_to_new_repr): Also relink LHS lists.
17016 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
17017 (add_access_to_lhs_work_queue): New function.
17018 (pop_access_from_work_queue): Renamed to
17019 pop_access_from_rhs_work_queue.
17020 (pop_access_from_lhs_work_queue): New function.
17021 (build_accesses_from_assign): Also add links to LHS lists and to LHS
17023 (child_would_conflict_in_lacc): Renamed to
17024 child_would_conflict_in_acc. Adjusted parameter names.
17025 (create_artificial_child_access): New parameter set_grp_read, use it.
17026 (subtree_mark_written_and_enqueue): Renamed to
17027 subtree_mark_written_and_rhs_enqueue.
17028 (propagate_subaccesses_across_link): Renamed to
17029 propagate_subaccesses_from_rhs.
17030 (propagate_subaccesses_from_lhs): New function.
17031 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
17034 2020-01-29 Martin Jambor <mjambor@suse.cz>
17036 PR tree-optimization/92706
17037 * tree-sra.c (struct access): Adjust comment of
17038 grp_total_scalarization.
17039 (find_access_in_subtree): Look for single children spanning an entire
17041 (scalarizable_type_p): Allow register accesses, adjust callers.
17042 (completely_scalarize): Remove function.
17043 (scalarize_elem): Likewise.
17044 (create_total_scalarization_access): Likewise.
17045 (sort_and_splice_var_accesses): Do not track total scalarization
17047 (analyze_access_subtree): New parameter totally, adjust to new meaning
17048 of grp_total_scalarization.
17049 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
17050 (can_totally_scalarize_forest_p): New function.
17051 (create_total_scalarization_access): Likewise.
17052 (create_total_access_and_reshape): Likewise.
17053 (total_should_skip_creating_access): Likewise.
17054 (totally_scalarize_subtree): Likewise.
17055 (analyze_all_variable_accesses): Perform total scalarization after
17056 subaccess propagation using the new functions above.
17057 (initialize_constant_pool_replacements): Output initializers by
17058 traversing the access tree.
17060 2020-01-29 Martin Jambor <mjambor@suse.cz>
17062 * tree-sra.c (verify_sra_access_forest): New function.
17063 (verify_all_sra_access_forests): Likewise.
17064 (create_artificial_child_access): Set parent.
17065 (analyze_all_variable_accesses): Call the verifier.
17067 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17069 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
17070 if called on indirect edge.
17071 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
17072 speculative call if needed.
17074 2020-01-29 Richard Biener <rguenther@suse.de>
17076 PR tree-optimization/93428
17077 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
17078 permutation when the load node is created.
17079 (vect_analyze_slp_instance): Re-use it here.
17081 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17083 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
17085 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
17087 PR rtl-optimization/93272
17088 * ira-lives.c (process_out_of_region_eh_regs): New function.
17089 (process_bb_node_lives): Call it.
17091 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17093 * coverage.c (read_counts_file): Make error message lowercase.
17095 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17097 * profile-count.c (profile_quality_display_names): Fix ordering.
17099 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17102 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
17103 hash only when edge is first within the sequence.
17104 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
17105 (symbol_table::create_edge): Do not set target_prob.
17106 (cgraph_edge::remove_caller): Watch for speculative calls when updating
17107 the call site hash.
17108 (cgraph_edge::make_speculative): Drop target_prob parameter.
17109 (cgraph_edge::speculative_call_info): Remove.
17110 (cgraph_edge::first_speculative_call_target): New member function.
17111 (update_call_stmt_hash_for_removing_direct_edge): New function.
17112 (cgraph_edge::resolve_speculation): Rewrite to new API.
17113 (cgraph_edge::speculative_call_for_target): New member function.
17114 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
17115 multiple speculation targets.
17116 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
17118 (verify_speculative_call): Verify that targets form an interval.
17119 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
17120 (cgraph_edge::first_speculative_call_target): New member function.
17121 (cgraph_edge::next_speculative_call_target): New member function.
17122 (cgraph_edge::speculative_call_target_ref): New member function.
17123 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
17124 (cgraph_edge): Remove target_prob.
17125 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
17126 Fix handling of speculative calls.
17127 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
17128 * ipa-fnsummary.c (analyze_function_body): Likewise.
17129 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
17130 * ipa-profile.c (dump_histogram): Fix formating.
17131 (ipa_profile_generate_summary): Watch for overflows.
17132 (ipa_profile): Do not require probablity to be 1/2; update to new API.
17133 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
17134 (update_indirect_edges_after_inlining): Update to new API.
17135 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
17137 * profile-count.h: (profile_probability::adjusted): New.
17138 * tree-inline.c (copy_bb): Update to new speculative call API; fix
17139 updating of profile.
17140 * value-prof.c (gimple_ic_transform): Rename to ...
17141 (dump_ic_profile): ... this one; update dumping.
17142 (stream_in_histogram_value): Fix formating.
17143 (gimple_value_profile_transformations): Update.
17145 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
17148 * config/i386/i386.md (*movoi_internal_avx): Remove
17149 TARGET_SSE_TYPELESS_STORES check.
17150 (*movti_internal): Prefer TARGET_AVX over
17151 TARGET_SSE_TYPELESS_STORES.
17152 (*movtf_internal): Likewise.
17153 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
17154 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
17155 from TARGET_SSE_TYPELESS_STORES.
17157 2020-01-28 David Malcolm <dmalcolm@redhat.com>
17159 * diagnostic-core.h (warning_at): Rename overload to...
17160 (warning_meta): ...this.
17161 (emit_diagnostic_valist): Delete decl of overload taking
17162 diagnostic_metadata.
17163 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
17164 (warning_at): Rename overload taking diagnostic_metadata to...
17165 (warning_meta): ...this.
17167 2020-01-28 Richard Biener <rguenther@suse.de>
17169 PR tree-optimization/93439
17170 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
17171 * tree-cfg.c (move_sese_region_to_fn): ... here.
17172 (verify_types_in_gimple_reference): Verify used cliques are
17175 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
17178 * config/i386/i386-options.c (set_ix86_tune_features): Add an
17179 argument of a pointer to struct gcc_options and pass it to
17180 parse_mtune_ctrl_str.
17181 (ix86_function_specific_restore): Pass opts to
17182 set_ix86_tune_features.
17183 (ix86_option_override_internal): Likewise.
17184 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
17185 gcc_options and use it for x_ix86_tune_ctrl_string.
17187 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17189 PR rtl-optimization/87763
17190 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
17191 simplification to handle subregs as well as bare regs.
17192 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
17194 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17196 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
17197 for reduction chains that (now) include a call.
17199 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17201 PR tree-optimization/92822
17202 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
17203 out the don't-care elements of a vector whose significant elements
17204 are duplicates, make the don't-care elements duplicates too.
17206 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17208 PR tree-optimization/93434
17209 * tree-predcom.c (split_data_refs_to_components): Record which
17210 components have had aliasing loads removed. Prevent store-store
17211 commoning for all such components.
17213 2020-01-28 Jakub Jelinek <jakub@redhat.com>
17216 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
17217 -1 or is_vshift is true, use new_vector with number of elts npatterns
17218 rather than new_unary_operation.
17220 PR tree-optimization/93454
17221 * gimple-fold.c (fold_array_ctor_reference): Perform
17222 elt_size.to_uhwi () just once, instead of calling it in every
17223 iteration. Punt if that value is above size of the temporary
17224 buffer. Decrease third native_encode_expr argument when
17225 bufoff + elt_sz is above size of buf.
17227 2020-01-27 Joseph Myers <joseph@codesourcery.com>
17229 * config/mips/mips.c (mips_declare_object_name)
17230 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
17232 2020-01-27 Martin Liska <mliska@suse.cz>
17234 PR gcov-profile/93403
17235 * tree-profile.c (gimple_init_gcov_profiler): Generate
17236 both __gcov_indirect_call_profiler_v4 and
17237 __gcov_indirect_call_profiler_v4_atomic.
17239 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17242 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
17244 (@aarch64_split_simd_mov<mode>): Use it.
17245 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
17246 Leave the vec_extract patterns to handle 2-element vectors.
17247 (aarch64_simd_mov_from_<mode>high): Likewise.
17248 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
17249 (vec_extractv2dfv1df): Likewise.
17251 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17253 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
17254 jump conditions for *compare_condjump<GPI:mode>.
17256 2020-01-27 David Malcolm <dmalcolm@redhat.com>
17259 * digraph.cc (test_edge::test_edge): Specify template for base
17262 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
17264 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
17266 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
17268 * config/arc/arc-protos.h (gen_mlo): Remove.
17269 (gen_mhi): Likewise.
17270 * config/arc/arc.c (AUX_MULHI): Define.
17271 (arc_must_save_reister): Special handling for r58/59.
17272 (arc_compute_frame_size): Consider mlo/mhi registers.
17273 (arc_save_callee_saves): Emit fp/sp move only when emit_move
17275 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
17276 mlo/mhi name selection.
17277 (arc_restore_callee_saves): Don't early restore blink when ISR.
17278 (arc_expand_prologue): Add mlo/mhi saving.
17279 (arc_expand_epilogue): Add mlo/mhi restoring.
17282 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
17283 numbering when MUL64 option is used.
17284 (DWARF2_FRAME_REG_OUT): Define.
17285 * config/arc/arc.md (arc600_stall): New pattern.
17286 (VUNSPEC_ARC_ARC600_STALL): Define.
17287 (mulsi64): Use correct mlo/mhi registers.
17288 (mulsi_600): Clean it up.
17289 * config/arc/predicates.md (mlo_operand): Remove any dependency on
17291 (mhi_operand): Likewise.
17293 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
17294 Petro Karashchenko <petro.karashchenko@ring.com>
17296 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
17297 attributes if needed.
17298 (prepare_move_operands): Generate special unspec instruction for
17300 (arc_isuncached_mem_p): Propagate uncached attribute to each
17302 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
17303 (VUNSPEC_ARC_STDI): Likewise.
17304 (ALLI): New mode iterator.
17305 (mALLI): New mode attribute.
17306 (lddi): New instruction pattern.
17308 (stdidi_split): Split instruction for architectures which are not
17309 supporting ll64 option.
17310 (lddidi_split): Likewise.
17312 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17314 PR rtl-optimization/92989
17315 * lra-lives.c (process_bb_lives): Update the live-in set before
17316 processing additional clobbers.
17318 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17320 PR rtl-optimization/93170
17321 * cselib.c (cselib_invalidate_regno_val): New function, split out
17323 (cselib_invalidate_regno): ...here.
17324 (cselib_invalidated_by_call_p): New function.
17325 (cselib_process_insn): Iterate over all the hard-register entries in
17326 REG_VALUES and invalidate any that cross call-clobbered registers.
17328 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17330 * dojump.c (split_comparison): Use HONOR_NANS rather than
17331 HONOR_SNANS when splitting LTGT.
17333 2020-01-27 Martin Liska <mliska@suse.cz>
17336 * opts.c (print_filtered_help): Exclude language-specific
17337 options from --help=common unless enabled in all FEs.
17339 2020-01-27 Martin Liska <mliska@suse.cz>
17341 * opts.c (print_help): Exclude params from
17342 all except --help=param.
17344 2020-01-27 Martin Liska <mliska@suse.cz>
17347 * config/i386/i386-features.c (make_resolver_func):
17348 Align the code with ppc64 target implementation.
17349 Do not generate a unique name for resolver function.
17351 2020-01-27 Richard Biener <rguenther@suse.de>
17353 PR tree-optimization/93397
17354 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
17355 converted reduction chain SLP graph adjustment.
17357 2020-01-26 Marek Polacek <polacek@redhat.com>
17360 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
17363 2020-01-26 Jason Merrill <jason@redhat.com>
17366 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
17369 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
17371 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
17372 (rx_setmem): Likewise.
17374 2020-01-26 Jakub Jelinek <jakub@redhat.com>
17377 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
17378 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
17379 drop <di> from constraint of last operand.
17382 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
17383 TARGET_AVX2 and V4DFmode not in the split condition, but in the
17384 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
17386 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
17389 * ipa-cp.c (get_info_about_necessary_edges): Remove value
17392 2020-01-24 Jeff Law <law@redhat.com>
17394 PR tree-optimization/92788
17395 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
17398 2020-01-24 Jakub Jelinek <jakub@redhat.com>
17401 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
17402 *avx_vperm_broadcast_<mode>,
17403 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
17404 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
17405 Move before avx2_perm<mode>/avx512f_perm<mode>.
17408 * simplify-rtx.c (simplify_const_unary_operation,
17409 simplify_const_binary_operation): Punt for mode precision above
17410 MAX_BITSIZE_MODE_ANY_INT.
17412 2020-01-24 Andrew Pinski <apinski@marvell.com>
17414 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
17415 alu.shift_reg to 0.
17417 2020-01-24 Jeff Law <law@redhat.com>
17420 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
17421 for REGs. Call output_operand_lossage to get more reasonable
17424 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
17426 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
17427 gcn_fp_compare_operator.
17428 (vec_cmpu<mode>di): Use gcn_compare_operator.
17429 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
17430 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
17431 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
17432 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
17433 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
17434 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
17435 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
17436 gcn_fp_compare_operator.
17437 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
17438 gcn_fp_compare_operator.
17439 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
17440 gcn_fp_compare_operator.
17441 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
17442 gcn_fp_compare_operator.
17444 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
17446 * doc/install.texi (Cross-Compiler-Specific Options): Document
17447 `--with-toolexeclibdir' option.
17449 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
17451 * target.def (flags_regnum): Also mention effect on delay slot filling.
17452 * doc/tm.texi: Regenerate.
17454 2020-01-23 Jeff Law <law@redhat.com>
17456 PR translation/90162
17457 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
17459 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
17462 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
17465 2020-01-23 Jakub Jelinek <jakub@redhat.com>
17467 PR rtl-optimization/93402
17468 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
17471 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
17473 * config.in: Regenerated.
17474 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
17475 for TARGET_LIBC_GNUSTACK.
17476 * configure: Regenerated.
17477 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
17478 found to be 2.31 or greater.
17480 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
17482 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
17484 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
17485 (mips_asm_file_end): New function. Delegate to
17486 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
17487 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
17489 2020-01-23 Jakub Jelinek <jakub@redhat.com>
17492 * config/i386/i386-modes.def (POImode): New mode.
17493 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
17494 * config/i386/i386.md (DPWI): New mode attribute.
17495 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
17496 (QWI): Rename to...
17497 (QPWI): ... this. Use POI instead of OI for TImode.
17498 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
17499 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
17502 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
17505 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
17507 (speculation_tracker_rev): New pattern.
17508 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
17509 Use speculation_tracker_rev to track the inverse condition.
17511 2020-01-23 Richard Biener <rguenther@suse.de>
17513 PR tree-optimization/93381
17514 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
17515 alias-set of the def as argument and record the first one.
17516 (vn_walk_cb_data::first_set): New member.
17517 (vn_reference_lookup_3): Pass the alias-set of the current def
17518 to push_partial_def. Fix alias-set used in the aggregate copy
17520 (vn_reference_lookup): Consistently set *last_vuse_ptr.
17521 * real.c (clear_significand_below): Fix out-of-bound access.
17523 2020-01-23 Jakub Jelinek <jakub@redhat.com>
17526 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
17527 New define_insn patterns.
17529 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
17531 * doc/sourcebuild.texi (check-function-bodies): Add an
17532 optional target/xfail selector.
17534 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
17536 PR rtl-optimization/93124
17537 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
17538 bare USE and CLOBBER insns.
17540 2020-01-22 Andrew Pinski <apinski@marvell.com>
17542 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
17544 2020-01-22 David Malcolm <dmalcolm@redhat.com>
17547 * gdbinit.in (break-on-saved-diagnostic): Update for move of
17548 diagnostic_manager into "ana" namespace.
17549 * selftest-run-tests.c (selftest::run_tests): Update for move of
17550 selftest::run_analyzer_selftests to
17551 ana::selftest::run_analyzer_selftests.
17553 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
17555 * cfgexpand.c (union_stack_vars): Update the size.
17557 2020-01-22 Richard Biener <rguenther@suse.de>
17559 PR tree-optimization/93381
17560 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
17561 throughout, handle all conversions the same.
17563 2020-01-22 Jakub Jelinek <jakub@redhat.com>
17566 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
17567 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
17568 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
17569 Call force_reg on high_in2 unconditionally.
17571 2020-01-22 Martin Liska <mliska@suse.cz>
17573 PR tree-optimization/92924
17574 * profile.c (compute_value_histograms): Divide
17575 all counter values.
17577 2020-01-22 Jakub Jelinek <jakub@redhat.com>
17580 * output.h (assemble_name_resolve): Declare.
17581 * varasm.c (assemble_name_resolve): New function.
17582 (assemble_name): Use it.
17583 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
17585 2020-01-22 Joseph Myers <joseph@codesourcery.com>
17587 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
17588 update_web_docs_git instead of update_web_docs_svn.
17590 2020-01-21 Andrew Pinski <apinski@marvell.com>
17593 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
17594 as PTR mode. Have operand 1 as being modeless, it can be P mode.
17595 (*tlsgd_small_<mode>): Likewise.
17596 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
17597 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
17598 register. Convert that register back to dest using convert_mode.
17600 2020-01-21 Jim Wilson <jimw@sifive.com>
17602 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
17605 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
17606 Uros Bizjak <ubizjak@gmail.com>
17609 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
17611 (legitimize_tls_address): Do GNU2 TLS address computation in
17612 ptr_mode and zero-extend result to Pmode.
17613 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
17614 :P with :PTR and Pmode with ptr_mode.
17615 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
17616 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
17617 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
17619 2020-01-21 Jakub Jelinek <jakub@redhat.com>
17622 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
17623 the last two operands are CONST_INT_P before using them as such.
17625 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
17627 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
17628 to get the integer element types.
17630 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
17632 * config/aarch64/aarch64-sve-builtins.h
17633 (function_expander::convert_to_pmode): Declare.
17634 * config/aarch64/aarch64-sve-builtins.cc
17635 (function_expander::convert_to_pmode): New function.
17636 (function_expander::get_contiguous_base): Use it.
17637 (function_expander::prepare_gather_address_operands): Likewise.
17638 * config/aarch64/aarch64-sve-builtins-sve2.cc
17639 (svwhilerw_svwhilewr_impl::expand): Likewise.
17641 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
17644 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
17645 cfun->machine->label_is_assembled.
17646 (aarch64_print_patchable_function_entry): New.
17647 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
17648 * config/aarch64/aarch64.h (struct machine_function): New field,
17649 label_is_assembled.
17651 2020-01-21 David Malcolm <dmalcolm@redhat.com>
17654 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
17657 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
17660 * cgraph.c (cgraph_edge::resolve_speculation,
17661 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
17662 call_stmt_site_hash.
17664 2020-01-21 Martin Liska <mliska@suse.cz>
17666 * config/rs6000/rs6000.c (common_mode_defined): Remove
17669 2020-01-21 Richard Biener <rguenther@suse.de>
17671 PR tree-optimization/92328
17672 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
17673 type when value-numbering same-sized store by inserting a
17675 (eliminate_dom_walker::eliminate_stmt): When eliminating
17676 a redundant store handle bit-reinterpretation of the same value.
17678 2020-01-21 Andrew Pinski <apinski@marvel.com>
17681 * tree-into-ssa.c (prepare_block_for_update_1): Split out
17683 (prepare_block_for_update): This. Use a worklist instead of
17686 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
17688 * config/arm/arm.c (clear_operation_p):
17689 Initialise last_regno, skip first iteration
17690 based on the first_set value and use ints instead
17691 of the unnecessary HOST_WIDE_INTs.
17693 2020-01-21 Jakub Jelinek <jakub@redhat.com>
17696 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
17697 compare_mode other than SFmode or DFmode.
17699 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
17702 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
17703 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
17704 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
17706 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
17708 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
17710 2020-01-20 Andrew Pinski <apinski@marvell.com>
17712 PR middle-end/93242
17713 * targhooks.c (default_print_patchable_function_entry): Use
17714 output_asm_insn to emit the nop instruction.
17716 2020-01-20 Fangrui Song <maskray@google.com>
17718 PR middle-end/93194
17719 * targhooks.c (default_print_patchable_function_entry): Align to
17722 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
17725 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
17726 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
17727 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
17728 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
17729 (*tls_dynamic_gnu2_lea_64): Renamed to ...
17730 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
17731 Remove the {q} suffix from lea.
17732 (*tls_dynamic_gnu2_call_64): Renamed to ...
17733 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
17734 (*tls_dynamic_gnu2_combine_64): Renamed to ...
17735 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
17736 Pass Pmode to gen_tls_dynamic_gnu2_64.
17738 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
17740 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
17742 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
17744 * config/aarch64/aarch64-sve-builtins-base.cc
17745 (svld1ro_impl::memory_vector_mode): Remove parameter name.
17747 2020-01-20 Richard Biener <rguenther@suse.de>
17750 * dwarf2out.c (prune_unused_types): Unconditionally mark
17751 called function DIEs.
17753 2020-01-20 Martin Liska <mliska@suse.cz>
17755 PR tree-optimization/93199
17756 * tree-eh.c (struct leh_state): Add
17757 new field outer_non_cleanup.
17758 (cleanup_is_dead_in): Pass leh_state instead
17759 of eh_region. Add a checking that state->outer_non_cleanup
17760 points to outer non-clean up region.
17761 (lower_try_finally): Record outer_non_cleanup
17763 (lower_catch): Likewise.
17764 (lower_eh_filter): Likewise.
17765 (lower_eh_must_not_throw): Likewise.
17766 (lower_cleanup): Likewise.
17768 2020-01-20 Richard Biener <rguenther@suse.de>
17770 PR tree-optimization/93094
17771 * tree-vectorizer.h (vect_loop_versioning): Adjust.
17772 (vect_transform_loop): Likewise.
17773 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
17774 loop_vectorized_call to vect_transform_loop.
17775 * tree-vect-loop.c (vect_transform_loop): Pass down
17776 loop_vectorized_call to vect_loop_versioning.
17777 * tree-vect-loop-manip.c (vect_loop_versioning): Use
17778 the earlier discovered loop_vectorized_call.
17780 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
17782 * doc/contribute.texi: Update for SVN -> Git transition.
17783 * doc/install.texi: Likewise.
17785 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
17788 * cgraph.c (cgraph_edge::make_speculative): Increase number of
17789 speculative targets.
17790 (verify_speculative_call): New function
17791 (cgraph_node::verify_node): Use it.
17792 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
17795 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
17798 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
17799 (cgraph_edge::make_direct): Remove all indirect targets.
17800 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
17801 (cgraph_node::verify_node): Verify that only one call_stmt or
17802 lto_stmt_uid is set.
17803 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
17805 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
17806 (lto_output_ref): Simplify streaming of stmt.
17807 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
17809 2020-01-18 Tamar Christina <tamar.christina@arm.com>
17811 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
17812 Mark parameter unused.
17814 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
17816 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
17818 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
17820 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
17822 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
17824 * Makefile.in: Add coroutine-passes.o.
17825 * builtin-types.def (BT_CONST_SIZE): New.
17826 (BT_FN_BOOL_PTR): New.
17827 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
17828 * builtins.def (DEF_COROUTINE_BUILTIN): New.
17829 * coroutine-builtins.def: New file.
17830 * coroutine-passes.cc: New file.
17831 * function.h (struct GTY function): Add a bit to indicate that the
17832 function is a coroutine component.
17833 * internal-fn.c (expand_CO_FRAME): New.
17834 (expand_CO_YIELD): New.
17835 (expand_CO_SUSPN): New.
17836 (expand_CO_ACTOR): New.
17837 * internal-fn.def (CO_ACTOR): New.
17841 * passes.def: Add pass_coroutine_lower_builtins,
17842 pass_coroutine_early_expand_ifns.
17843 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
17844 (make_pass_coroutine_early_expand_ifns): New.
17845 * doc/invoke.texi: Document the fcoroutines command line
17848 2020-01-18 Jakub Jelinek <jakub@redhat.com>
17850 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
17853 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
17854 after checking the argument is a REG. Don't use REGNO (reg)
17855 again to set last_regno, reuse regno variable instead.
17857 2020-01-17 David Malcolm <dmalcolm@redhat.com>
17859 * doc/analyzer.texi (Limitations): Add note about NaN.
17861 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
17862 Sudakshina Das <sudi.das@arm.com>
17864 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
17865 and valid immediate.
17866 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
17867 (lshrdi3): Generate thumb2_lsrl for valid immediates.
17868 * config/arm/constraints.md (Pg): New.
17869 * config/arm/predicates.md (long_shift_imm): New.
17870 (arm_reg_or_long_shift_imm): Likewise.
17871 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
17872 (thumb2_lsll): Likewise.
17873 (thumb2_lsrl): New.
17875 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
17876 Sudakshina Das <sudi.das@arm.com>
17878 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
17879 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
17880 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
17881 register pairs for doubleword quantities for ARMv8.1M-Mainline.
17882 * config/arm/thumb2.md (thumb2_asrl): New.
17883 (thumb2_lsll): Likewise.
17885 2020-01-17 Jakub Jelinek <jakub@redhat.com>
17887 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
17890 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
17892 * gdbinit.in (help-gcc-hooks): New command.
17893 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
17894 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
17897 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
17899 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
17900 correct target macro.
17902 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
17904 * config/aarch64/aarch64-protos.h
17905 (aarch64_sve_ld1ro_operand_p): New.
17906 * config/aarch64/aarch64-sve-builtins-base.cc
17907 (class load_replicate): New.
17908 (class svld1ro_impl): New.
17909 (class svld1rq_impl): Change to inherit from load_replicate.
17910 (svld1ro): New sve intrinsic function base.
17911 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
17912 New DEF_SVE_FUNCTION.
17913 * config/aarch64/aarch64-sve-builtins-base.h
17914 (svld1ro): New decl.
17915 * config/aarch64/aarch64-sve-builtins.cc
17916 (function_expander::add_mem_operand): Modify assert to allow
17918 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
17920 * config/aarch64/aarch64.c
17921 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
17922 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
17923 (aarch64_sve_ld1ro_operand_p): New.
17924 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
17925 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
17926 * config/aarch64/predicates.md
17927 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
17929 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
17931 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
17932 Introduce this ACLE specified predefined macro.
17933 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
17934 (fp): Disabling this disables f64mm.
17935 (simd): Disabling this disables f64mm.
17936 (fp16): Disabling this disables f64mm.
17937 (sve): Disabling this disables f64mm.
17938 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
17939 (AARCH64_ISA_F64MM): New.
17940 (TARGET_F64MM): New.
17941 * doc/invoke.texi (f64mm): Document new option.
17943 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
17945 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
17946 (neoversen1_tunings): Likewise.
17948 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
17951 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
17952 Add assert to ensure prolog has been emitted.
17953 (aarch64_split_atomic_op): Likewise.
17954 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
17955 Use epilogue_completed rather than reload_completed.
17956 (aarch64_atomic_exchange<mode>): Likewise.
17957 (aarch64_atomic_<atomic_optab><mode>): Likewise.
17958 (atomic_nand<mode>): Likewise.
17959 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
17960 (atomic_fetch_nand<mode>): Likewise.
17961 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
17962 (atomic_nand_fetch<mode>): Likewise.
17964 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
17967 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
17969 (REVERSE_CONDITION): Delete.
17970 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
17971 (CCFP_CCFPE): Likewise.
17972 (e): New mode attribute.
17973 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
17974 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
17975 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
17976 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
17977 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
17978 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
17979 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
17980 name of generator from gen_ccmpdi to gen_ccmpccdi.
17981 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
17982 the previous comparison but aren't able to, use the new ccmp_rev
17985 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
17987 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
17988 than testing directly for INTEGER_CST.
17989 (gimplify_target_expr, gimplify_omp_depend): Likewise.
17991 2020-01-17 Jakub Jelinek <jakub@redhat.com>
17993 PR tree-optimization/93292
17994 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
17995 get_vectype_for_scalar_type returns NULL.
17997 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
17999 * params.opt (-param=max-predicted-iterations): Increase range from 0.
18000 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
18002 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
18004 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
18006 * params.opt: (max-predicted-iterations): Set bounds.
18007 * predict.c (real_almost_one, real_br_prob_base,
18008 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
18009 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
18010 probabilities; do not truncate to reg_br_prob_bases.
18011 (estimate_loops_at_level): Pass max_cyclic_prob.
18012 (estimate_loops): Compute max_cyclic_prob.
18013 (estimate_bb_frequencies): Do not initialize real_*; update calculation
18015 * profile-count.c (profile_probability::to_sreal): New.
18016 * profile-count.h (class sreal): Move up in file.
18017 (profile_probability::to_sreal): Declare.
18019 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18022 (arm_invalid_conversion): New function for target hook.
18023 (arm_invalid_unary_op): New function for target hook.
18024 (arm_invalid_binary_op): New function for target hook.
18026 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18028 * config.gcc: Add arm_bf16.h.
18029 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
18030 (arm_simd_builtin_std_type): Add BFmode.
18031 (arm_init_simd_builtin_types): Define element types for vector types.
18032 (arm_init_bf16_types): New function.
18033 (arm_init_builtins): Add arm_init_bf16_types function call.
18034 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
18035 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
18036 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
18037 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
18038 (arm_vector_mode_supported_p): Add V4BF, V8BF.
18039 (arm_mangle_type): Add __bf16.
18040 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
18041 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
18042 arm_bf16_ptr_type_node.
18043 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
18044 define_split between ARM registers.
18045 * config/arm/arm_bf16.h: New file.
18046 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
18047 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
18048 (VQXMOV): Add V8BF.
18049 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
18050 * config/arm/vfp.md: Add BFmode to movhf patterns.
18052 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
18053 Andre Vieira <andre.simoesdiasvieira@arm.com>
18055 * config/arm/arm-cpus.in (mve, mve_float): New features.
18056 (dsp, mve, mve.fp): New options.
18057 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
18058 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
18059 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
18061 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18062 Thomas Preud'homme <thomas.preudhomme@arm.com>
18064 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
18066 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
18067 error for using -mcmse when targeting Armv8.1-M Mainline.
18069 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18070 Thomas Preud'homme <thomas.preudhomme@arm.com>
18072 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
18073 address in r4 when targeting Armv8.1-M Mainline.
18074 (nonsecure_call_value_internal): Likewise.
18075 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
18076 a register match_operand again. Emit BLXNS when targeting
18077 Armv8.1-M Mainline.
18078 (nonsecure_call_value_reg_thumb2): Likewise.
18080 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18081 Thomas Preud'homme <thomas.preudhomme@arm.com>
18083 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
18084 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
18085 variable as true when floating-point ABI is not hard. Replace
18086 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
18087 Generate VLSTM and VLLDM instruction respectively before and
18088 after a function call to cmse_nonsecure_call function.
18089 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
18090 (VUNSPEC_VLLDM): Likewise.
18091 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
18092 (lazy_load_multiple_insn): Likewise.
18094 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18095 Thomas Preud'homme <thomas.preudhomme@arm.com>
18097 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
18098 (arm_emit_vfp_multi_reg_pop): Likewise.
18099 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
18100 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
18101 restore callee-saved VFP registers.
18103 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18104 Thomas Preud'homme <thomas.preudhomme@arm.com>
18106 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
18107 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
18108 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
18109 callee-saved GPRs as well as clear ip register before doing a nonsecure
18110 call then restore callee-saved GPRs after it when targeting
18111 Armv8.1-M Mainline.
18112 (arm_reorg): Adapt to function rename.
18114 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18115 Thomas Preud'homme <thomas.preudhomme@arm.com>
18117 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
18118 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
18119 clear_vfp_multiple pattern based on a new vfp parameter.
18120 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
18121 targeting Armv8.1-M Mainline.
18122 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
18123 unconditionally when targeting Armv8.1-M Mainline architecture. Check
18124 whether VFP registers are available before looking call_used_regs for a
18126 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
18127 of prototype of clear_operation_p.
18128 (clear_vfp_multiple_operation): New predicate.
18129 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
18130 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
18132 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18133 Thomas Preud'homme <thomas.preudhomme@arm.com>
18135 * config/arm/arm-protos.h (clear_operation_p): Declare.
18136 * config/arm/arm.c (clear_operation_p): New function.
18137 (cmse_clear_registers): Generate clear_multiple instruction pattern if
18138 targeting Armv8.1-M Mainline or successor.
18139 (output_return_instruction): Only output APSR register clearing if
18140 Armv8.1-M Mainline instructions not available.
18141 (thumb_exit): Likewise.
18142 * config/arm/predicates.md (clear_multiple_operation): New predicate.
18143 * config/arm/thumb2.md (clear_apsr): New define_insn.
18144 (clear_multiple): Likewise.
18145 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
18147 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18148 Thomas Preud'homme <thomas.preudhomme@arm.com>
18150 * config/arm/arm.c (fp_sysreg_names): Declare and define.
18151 (use_return_insn): Also return false for Armv8.1-M Mainline.
18152 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
18153 Mainline instructions are available.
18154 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
18155 when targeting Armv8.1-M Mainline Security Extensions.
18156 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
18157 Mainline entry function.
18158 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
18159 targeting Armv8.1-M Mainline or successor.
18160 (arm_expand_epilogue): Fix indentation of caller-saved register
18161 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
18163 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
18164 (FP_SYSREGS): Likewise.
18165 (enum vfp_sysregs_encoding): Define enum.
18166 (fp_sysreg_names): Declare.
18167 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
18168 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
18169 (pop_fpsysreg_insn): Likewise.
18171 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18172 Thomas Preud'homme <thomas.preudhomme@arm.com>
18174 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
18175 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
18176 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
18177 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
18178 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
18179 (ARMv8_1m_main): New feature group.
18180 (armv8.1-m.main): New architecture.
18181 * config/arm/arm-tables.opt: Regenerate.
18182 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
18183 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
18184 (arm_options_perform_arch_sanity_checks): Error out when targeting
18185 Armv8.1-M Mainline Security Extensions.
18186 * config/arm/arm.h (arm_arch8_1m_main): Declare.
18188 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18190 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
18191 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
18192 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
18193 aarch64_bfdot_laneq): New.
18194 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
18195 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
18196 vbfdotq_laneq_f32): New.
18197 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
18198 VBFMLA_W, VBF): New.
18199 (isquadop): Add V4BF, V8BF.
18201 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18203 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
18204 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
18205 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
18206 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
18207 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
18208 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
18209 usdot_laneq, sudot_lane,sudot_laneq): New.
18210 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
18211 (aarch64_<sur>dot_lane): New.
18212 * config/aarch64/arm_neon.h (vusdot_s32): New.
18213 (vusdotq_s32): New.
18214 (vusdot_lane_s32): New.
18215 (vsudot_lane_s32): New.
18216 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
18217 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
18219 2020-01-16 Martin Liska <mliska@suse.cz>
18221 * value-prof.c (dump_histogram_value): Fix
18222 obvious spacing issue.
18224 2020-01-16 Andrew Pinski <apinski@marvell.com>
18226 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
18227 !storage_order_barrier_p.
18229 2020-01-16 Andrew Pinski <apinski@marvell.com>
18231 * sched-int.h (_dep): Add unused bit-field field for the padding.
18232 * sched-deps.c (init_dep_1): Init unused field.
18234 2020-01-16 Andrew Pinski <apinski@marvell.com>
18236 * optabs.h (create_expand_operand): Initialize target field also.
18238 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
18240 PR tree-optimization/92429
18241 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
18242 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
18244 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
18247 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
18249 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
18250 aarch64_sve_int_mode to each mode.
18252 2020-01-15 David Malcolm <dmalcolm@redhat.com>
18254 * doc/analyzer.texi (Overview): Add note about
18255 -fdump-ipa-analyzer.
18257 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
18259 PR tree-optimization/93231
18260 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
18261 input_type is unsigned. Use tree_to_shwi for shift constant.
18262 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
18263 (simplify_count_trailing_zeroes): Add test to handle known non-zero
18264 inputs more efficiently.
18266 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
18268 * config/i386/i386.md (*movsf_internal): Do not require
18269 SSE2 ISA for alternatives 14 and 15.
18271 2020-01-15 Richard Biener <rguenther@suse.de>
18273 PR middle-end/93273
18274 * tree-eh.c (sink_clobbers): If we already visited the destination
18275 block do not defer insertion.
18276 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
18277 the purpose of defered insertion.
18279 2020-01-15 Jakub Jelinek <jakub@redhat.com>
18281 * BASE-VER: Bump to 10.0.1.
18283 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
18285 PR tree-optimization/93247
18286 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
18287 type of the stmt that we're going to vectorize.
18289 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
18291 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
18292 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
18295 2020-01-15 Martin Liska <mliska@suse.cz>
18297 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
18298 2 calls of streamer_read_hwi in a function call.
18300 2020-01-15 Richard Biener <rguenther@suse.de>
18302 * alias.c (record_alias_subset): Avoid redundant work when
18303 subset is already recorded.
18305 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18307 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
18308 the analyzer options provide CWE identifiers.
18310 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18312 * tree-diagnostic-path.cc (path_summary::event_range::print):
18313 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
18314 using get_pure_location.
18316 2020-01-15 Jakub Jelinek <jakub@redhat.com>
18318 PR tree-optimization/93262
18319 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
18320 perform head trimming only if the last argument is constant,
18321 either all ones, or larger or equal to head trim, in the latter
18322 case decrease the last argument by head_trim.
18324 PR tree-optimization/93249
18325 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
18326 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
18327 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
18328 perform head trim unless we can prove there are no '\0' chars
18329 from the source among the first head_trim chars.
18331 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18333 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
18335 2020-01-15 Jakub Jelinek <jakub@redhat.com>
18338 * config/i386/sse.md
18339 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
18340 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
18341 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
18342 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
18343 just a single alternative instead of two, make operands 1 and 2
18346 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
18349 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
18352 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18354 * Makefile.in (lang_opt_files): Add analyzer.opt.
18355 (ANALYZER_OBJS): New.
18356 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
18357 tristate.o and ANALYZER_OBJS.
18358 (TEXI_GCCINT_FILES): Add analyzer.texi.
18359 * common.opt (-fanalyzer): New driver option.
18360 * config.in: Regenerate.
18361 * configure: Regenerate.
18362 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
18363 (gccdepdir): Also create depdir for "analyzer" subdir.
18364 * digraph.cc: New file.
18365 * digraph.h: New file.
18366 * doc/analyzer.texi: New file.
18367 * doc/gccint.texi ("Static Analyzer") New menu item.
18368 (analyzer.texi): Include it.
18369 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
18370 ("Warning Options"): Add static analysis warnings to the list.
18371 (-Wno-analyzer-double-fclose): New option.
18372 (-Wno-analyzer-double-free): New option.
18373 (-Wno-analyzer-exposure-through-output-file): New option.
18374 (-Wno-analyzer-file-leak): New option.
18375 (-Wno-analyzer-free-of-non-heap): New option.
18376 (-Wno-analyzer-malloc-leak): New option.
18377 (-Wno-analyzer-possible-null-argument): New option.
18378 (-Wno-analyzer-possible-null-dereference): New option.
18379 (-Wno-analyzer-null-argument): New option.
18380 (-Wno-analyzer-null-dereference): New option.
18381 (-Wno-analyzer-stale-setjmp-buffer): New option.
18382 (-Wno-analyzer-tainted-array-index): New option.
18383 (-Wno-analyzer-use-after-free): New option.
18384 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
18385 (-Wno-analyzer-use-of-uninitialized-value): New option.
18386 (-Wanalyzer-too-complex): New option.
18387 (-fanalyzer-call-summaries): New warning.
18388 (-fanalyzer-checker=): New warning.
18389 (-fanalyzer-fine-grained): New warning.
18390 (-fno-analyzer-state-merge): New warning.
18391 (-fno-analyzer-state-purge): New warning.
18392 (-fanalyzer-transitivity): New warning.
18393 (-fanalyzer-verbose-edges): New warning.
18394 (-fanalyzer-verbose-state-changes): New warning.
18395 (-fanalyzer-verbosity=): New warning.
18396 (-fdump-analyzer): New warning.
18397 (-fdump-analyzer-callgraph): New warning.
18398 (-fdump-analyzer-exploded-graph): New warning.
18399 (-fdump-analyzer-exploded-nodes): New warning.
18400 (-fdump-analyzer-exploded-nodes-2): New warning.
18401 (-fdump-analyzer-exploded-nodes-3): New warning.
18402 (-fdump-analyzer-supergraph): New warning.
18403 * doc/sourcebuild.texi (dg-require-dot): New.
18404 (dg-check-dot): New.
18405 * gdbinit.in (break-on-saved-diagnostic): New command.
18406 * graphviz.cc: New file.
18407 * graphviz.h: New file.
18408 * ordered-hash-map-tests.cc: New file.
18409 * ordered-hash-map.h: New file.
18410 * passes.def (pass_analyzer): Add before
18411 pass_ipa_whole_program_visibility.
18412 * selftest-run-tests.c (selftest::run_tests): Call
18413 selftest::ordered_hash_map_tests_cc_tests.
18414 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
18416 * shortest-paths.h: New file.
18417 * timevar.def (TV_ANALYZER): New timevar.
18418 (TV_ANALYZER_SUPERGRAPH): Likewise.
18419 (TV_ANALYZER_STATE_PURGE): Likewise.
18420 (TV_ANALYZER_PLAN): Likewise.
18421 (TV_ANALYZER_SCC): Likewise.
18422 (TV_ANALYZER_WORKLIST): Likewise.
18423 (TV_ANALYZER_DUMP): Likewise.
18424 (TV_ANALYZER_DIAGNOSTICS): Likewise.
18425 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
18426 * tree-pass.h (make_pass_analyzer): New decl.
18427 * tristate.cc: New file.
18428 * tristate.h: New file.
18430 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
18433 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
18434 alternatives 9 and 10.
18436 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18438 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
18439 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
18440 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
18441 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
18442 (selftest::hash_map_tests_c_tests): Call it.
18443 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
18444 New static constant, using the value of = H::empty_zero_p.
18445 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
18446 from default_hash_traits <Value>.
18447 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
18449 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
18450 * hash-table.h (hash_table::alloc_entries): Guard the loop of
18451 calls to mark_empty with !Descriptor::empty_zero_p.
18452 (hash_table::empty_slow): Conditionalize the memset call with a
18453 check that Descriptor::empty_zero_p; otherwise, loop through the
18454 entries calling mark_empty on them.
18455 * hash-traits.h (int_hash::empty_zero_p): New static constant.
18456 (pointer_hash::empty_zero_p): Likewise.
18457 (pair_hash::empty_zero_p): Likewise.
18458 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
18460 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
18461 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
18462 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
18463 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
18464 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
18465 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
18466 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
18467 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
18468 * tree-vectorizer.h
18469 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
18472 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
18474 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
18475 fix typo on return value.
18477 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
18480 * cgraph.c (symbol_table::create_edge): Init speculative_id and
18482 (cgraph_edge::make_speculative): Add param for setting speculative_id
18484 (cgraph_edge::speculative_call_info): Update comments and find reference
18485 by speculative_id for multiple indirect targets.
18486 (cgraph_edge::resolve_speculation): Decrease the speculations
18487 for indirect edge, drop it's speculative if not direct target
18488 left. Update comments.
18489 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
18490 (cgraph_node::dump): Print num_speculative_call_targets.
18491 (cgraph_node::verify_node): Don't report error if speculative
18492 edge not include statement.
18493 (cgraph_edge::num_speculative_call_targets_p): New function.
18494 * cgraph.h (int common_target_id): Remove.
18495 (int common_target_probability): Remove.
18496 (num_speculative_call_targets): New variable.
18497 (make_speculative): Add param for setting speculative_id.
18498 (cgraph_edge::num_speculative_call_targets_p): New declare.
18499 (target_prob): New variable.
18500 (speculative_id): New variable.
18501 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
18502 call summaries for multiple speculative call targets.
18503 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
18504 * ipa-profile.c (struct speculative_call_target): New struct.
18505 (class speculative_call_summary): New class.
18506 (class speculative_call_summaries): New class.
18507 (call_sums): New variable.
18508 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
18509 (ipa_profile_write_edge_summary): New function.
18510 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
18511 (ipa_profile_dump_all_summaries): New function.
18512 (ipa_profile_read_edge_summary): New function.
18513 (ipa_profile_read_summary_section): New function.
18514 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
18515 (ipa_profile): Generate num_speculative_call_targets from
18517 * ipa-ref.h (speculative_id): New variable.
18518 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
18519 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
18520 common_target_probability. Stream out speculative_id and
18521 num_speculative_call_targets.
18522 (input_edge): Likewise.
18523 * predict.c (dump_prediction): Remove edges count assert to be
18525 * symtab.c (symtab_node::create_reference): Init speculative_id.
18526 (symtab_node::clone_references): Clone speculative_id.
18527 (symtab_node::clone_referring): Clone speculative_id.
18528 (symtab_node::clone_reference): Clone speculative_id.
18529 (symtab_node::clear_stmts_in_references): Clear speculative_id.
18530 * tree-inline.c (copy_bb): Duplicate all the speculative edges
18531 if indirect call contains multiple speculative targets.
18532 * value-prof.h (check_ic_target): Remove.
18533 * value-prof.c (gimple_value_profile_transformations):
18534 Use void function gimple_ic_transform.
18535 * value-prof.c (gimple_ic_transform): Handle topn case.
18536 Fix comment typos. Change it to a void function.
18538 2020-01-13 Andrew Pinski <apinski@marvell.com>
18540 * config/aarch64/aarch64-cores.def (octeontx2): New define.
18541 (octeontx2t98): New define.
18542 (octeontx2t96): New define.
18543 (octeontx2t93): New define.
18544 (octeontx2f95): New define.
18545 (octeontx2f95n): New define.
18546 (octeontx2f95mm): New define.
18547 * config/aarch64/aarch64-tune.md: Regenerate.
18548 * doc/invoke.texi (-mcpu=): Document the new cpu types.
18550 2020-01-13 Jason Merrill <jason@redhat.com>
18552 PR c++/33799 - destroy return value if local cleanup throws.
18553 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
18555 2020-01-13 Martin Liska <mliska@suse.cz>
18557 * ipa-cp.c (get_max_overall_size): Use newly
18558 renamed param param_ipa_cp_unit_growth.
18559 * params.opt: Remove legacy param name.
18561 2020-01-13 Martin Sebor <msebor@redhat.com>
18563 PR tree-optimization/93213
18564 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
18565 stores to be eliminated.
18567 2020-01-13 Martin Liska <mliska@suse.cz>
18569 * opts.c (print_help): Do not print CL_PARAM
18570 and CL_WARNING for CL_OPTIMIZATION.
18572 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
18575 * doc/invoke.texi (Warning Options): Add caveat about some warnings
18576 depending on optimization settings.
18578 2020-01-13 Jakub Jelinek <jakub@redhat.com>
18580 PR tree-optimization/90838
18581 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
18582 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
18583 argument rather than to initialize temporary for targets that
18584 don't use the mode argument at all. Initialize ctzval to avoid
18587 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
18589 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
18590 * tree-core.h: Document it.
18591 * gimplify.c (gimplify_omp_workshare): Set it.
18592 * omp-low.c (lower_omp_target): Use it.
18593 * tree-pretty-print.c (dump_omp_clause): Print it.
18595 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
18596 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
18598 2020-01-10 David Malcolm <dmalcolm@redhat.com>
18600 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
18601 * common.opt (fdiagnostics-path-format=): New option.
18602 (diagnostic_path_format): New enum.
18603 (fdiagnostics-show-path-depths): New option.
18604 * coretypes.h (diagnostic_event_id_t): New forward decl.
18605 * diagnostic-color.c (color_dict): Add "path".
18606 * diagnostic-event-id.h: New file.
18607 * diagnostic-format-json.cc (json_from_expanded_location): Make
18609 (json_end_diagnostic): Call context->make_json_for_path if it
18610 exists and the diagnostic has a path.
18611 (diagnostic_output_format_init): Clear context->print_path.
18612 * diagnostic-path.h: New file.
18613 * diagnostic-show-locus.c (colorizer::set_range): Special-case
18614 when printing a run of events in a diagnostic_path so that they
18615 all get the same color.
18616 (layout::m_diagnostic_path_p): New field.
18617 (layout::layout): Initialize it.
18618 (layout::print_any_labels): Don't colorize the label text for an
18619 event in a diagnostic_path.
18620 (gcc_rich_location::add_location_if_nearby): Add
18621 "restrict_to_current_line_spans" and "label" params. Pass the
18622 former to layout.maybe_add_location_range; pass the latter
18623 when calling add_range.
18624 * diagnostic.c: Include "diagnostic-path.h".
18625 (diagnostic_initialize): Initialize context->path_format and
18626 context->show_path_depths.
18627 (diagnostic_show_any_path): New function.
18628 (diagnostic_path::interprocedural_p): New function.
18629 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
18630 (simple_diagnostic_path::num_events): New function.
18631 (simple_diagnostic_path::get_event): New function.
18632 (simple_diagnostic_path::add_event): New function.
18633 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
18634 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
18635 (debug): New overload taking a diagnostic_path *.
18636 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
18637 * diagnostic.h (enum diagnostic_path_format): New enum.
18638 (json::value): New forward decl.
18639 (diagnostic_context::path_format): New field.
18640 (diagnostic_context::show_path_depths): New field.
18641 (diagnostic_context::print_path): New callback field.
18642 (diagnostic_context::make_json_for_path): New callback field.
18643 (diagnostic_show_any_path): New decl.
18644 (json_from_expanded_location): New decl.
18645 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
18646 (-fdiagnostics-show-path-depths): New option.
18647 (-fdiagnostics-color): Add "path" to description of default
18648 GCC_COLORS; describe it.
18649 (-fdiagnostics-format=json): Document how diagnostic paths are
18650 represented in the JSON output format.
18651 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
18652 Add optional params "restrict_to_current_line_spans" and "label".
18653 * opts.c (common_handle_option): Handle
18654 OPT_fdiagnostics_path_format_ and
18655 OPT_fdiagnostics_show_path_depths.
18656 * pretty-print.c: Include "diagnostic-event-id.h".
18657 (pp_format): Implement "%@" format code for printing
18658 diagnostic_event_id_t *.
18659 (selftest::test_pp_format): Add tests for "%@".
18660 * selftest-run-tests.c (selftest::run_tests): Call
18661 selftest::tree_diagnostic_path_cc_tests.
18662 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
18663 * toplev.c (general_init): Initialize global_dc->path_format and
18664 global_dc->show_path_depths.
18665 * tree-diagnostic-path.cc: New file.
18666 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
18667 non-static. Drop "diagnostic" param in favor of storing the
18668 original value of "where" and re-using it.
18669 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
18670 maybe_unwind_expanded_macro_loc.
18671 (tree_diagnostics_defaults): Initialize context->print_path and
18672 context->make_json_for_path.
18673 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
18675 (default_tree_make_json_for_path): New decl.
18676 (maybe_unwind_expanded_macro_loc): New decl.
18678 2020-01-10 Jakub Jelinek <jakub@redhat.com>
18680 PR tree-optimization/93210
18681 * fold-const.h (native_encode_initializer,
18682 can_native_interpret_type_p): Declare.
18683 * fold-const.c (native_encode_string): Fix up handling with off != -1,
18685 (native_encode_initializer): New function, moved from dwarf2out.c.
18686 Adjust to native_encode_expr compatible arguments, including dry-run
18687 and partial extraction modes. Don't handle STRING_CST.
18688 (can_native_interpret_type_p): No longer static.
18689 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
18690 offset / BITS_PER_UNIT fits into int and don't call it if
18691 can_native_interpret_type_p fails. If suboff is NULL and for
18692 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
18693 native_encode_initializer.
18694 (fold_const_aggregate_ref_1): Formatting fix.
18695 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
18696 (tree_add_const_value_attribute): Adjust caller.
18698 PR tree-optimization/90838
18699 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
18700 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
18701 CTZ_DEFINED_VALUE_AT_ZERO.
18703 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
18705 PR inline-asm/93027
18706 * lra-constraints.c (match_reload): Permit input operands have the
18707 same mode as output while other input operands have a different
18710 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
18712 PR tree-optimization/90838
18713 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
18714 (check_ctz_string): Likewise.
18715 (optimize_count_trailing_zeroes): Likewise.
18716 (simplify_count_trailing_zeroes): Likewise.
18717 (pass_forwprop::execute): Try ctz simplification.
18718 * match.pd: Add matching for ctz idioms.
18720 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18722 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
18724 (aarch64_invalid_unary_op): New function for target hook.
18725 (aarch64_invalid_binary_op): New function for target hook.
18727 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18729 * config.gcc: Add arm_bf16.h.
18730 * config/aarch64/aarch64-builtins.c
18731 (aarch64_simd_builtin_std_type): Add BFmode.
18732 (aarch64_init_simd_builtin_types): Define element types for vector
18734 (aarch64_init_bf16_types): New function.
18735 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
18736 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
18738 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
18739 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
18741 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
18742 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
18743 * config/aarch64/aarch64.c
18744 (aarch64_classify_vector_mode): Add support for BF types.
18745 (aarch64_gimplify_va_arg_expr): Add support for BF types.
18746 (aarch64_vq_mode): Add support for BF types.
18747 (aarch64_simd_container_mode): Add support for BF types.
18748 (aarch64_mangle_type): Add support for BF scalar type.
18749 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
18750 * config/aarch64/arm_bf16.h: New file.
18751 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
18752 * config/aarch64/iterators.md: Add BF types to mode attributes.
18753 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
18755 2020-01-10 Jason Merrill <jason@redhat.com>
18757 PR c++/93173 - incorrect tree sharing.
18758 * gimplify.c (copy_if_shared): No longer static.
18759 * gimplify.h: Declare it.
18761 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
18763 * doc/invoke.texi (-msve-vector-bits=): Document that
18764 -msve-vector-bits=128 now generates VL-specific code for
18765 little-endian targets.
18766 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
18767 build_vector_type_for_mode to construct the data vector types.
18768 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
18769 VL-specific code for -msve-vector-bits=128 on little-endian targets.
18770 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
18771 for 128-bit vectors.
18773 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
18775 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
18778 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
18780 * config/aarch64/aarch64-builtins.c
18781 (aarch64_builtin_vectorized_function): Check for specific vector modes,
18782 rather than checking the number of elements and the element mode.
18784 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
18786 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
18787 get_related_vectype_for_scalar_type rather than build_vector_type
18788 to create the index type for a conditional reduction.
18790 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
18792 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
18793 for any type of gather or scatter, including strided accesses.
18795 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
18797 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
18800 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
18802 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
18803 get_dr_vinfo_offset
18804 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
18805 parameter and its use to reset DR_OFFSET's.
18806 (vect_transform_loop): Remove orig_drs_init argument.
18807 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
18808 member of dr_vec_info rather than the offset of the associated
18809 data_reference's innermost_loop_behavior.
18810 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
18811 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
18812 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
18813 get_dr_vinfo_offset.
18814 (vectorizable_store): Likewise.
18815 (vectorizable_load): Likewise.
18817 2020-01-10 Richard Biener <rguenther@suse.de>
18819 * gimple-ssa-store-merging
18820 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
18822 2020-01-10 Martin Liska <mliska@suse.cz>
18825 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
18826 encapsulation that was there before r280040.
18828 2020-01-10 Richard Biener <rguenther@suse.de>
18830 PR middle-end/93199
18831 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
18832 sequences to avoid walking them again for secondary opportunities.
18833 (pass_lower_eh_dispatch::execute): Instead actually insert
18836 2020-01-10 Richard Biener <rguenther@suse.de>
18838 PR middle-end/93199
18839 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
18840 (cleanup_all_empty_eh): Walk landing pads in reverse order to
18841 avoid quadraticness.
18843 2020-01-10 Martin Jambor <mjambor@suse.cz>
18845 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
18846 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
18847 to get param_ipa_sra_max_replacements.
18848 (param_splitting_across_edge): Pass the caller to
18849 pull_accesses_from_callee.
18851 2020-01-10 Martin Jambor <mjambor@suse.cz>
18853 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
18854 * ipa-cp.c (max_new_size): Removed.
18855 (orig_overall_size): New variable.
18856 (get_max_overall_size): New function.
18857 (estimate_local_effects): Use it. Adjust dump.
18858 (decide_about_value): Likewise.
18859 (ipcp_propagate_stage): Do not calculate max_new_size, just store
18860 orig_overall_size. Adjust dump.
18861 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
18863 2020-01-10 Martin Jambor <mjambor@suse.cz>
18865 * params.opt (param_ipa_max_agg_items): Mark as Optimization
18866 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
18867 instead of param_ipa_max_agg_items.
18868 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
18869 optimization info for the callee.
18871 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
18873 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
18874 markers if debug_inline_points is false.
18876 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
18878 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
18880 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
18881 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
18882 aarch64-sve-builtins-sve2.h.
18883 (aarch64-sve-builtins-sve2.o): New rule.
18884 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
18885 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
18886 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
18887 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
18888 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
18889 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
18891 * config/aarch64/aarch64-sve.md: Update comments with SVE2
18892 instructions that are handled here.
18893 (@cond_asrd<mode>): Generalize to...
18894 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
18895 (*cond_asrd<mode>_2): Generalize to...
18896 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
18897 (*cond_asrd<mode>_z): Generalize to...
18898 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
18899 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
18900 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
18901 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
18902 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
18904 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
18905 (@aarch64_scatter_stnt<mode>): Likewise.
18906 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
18907 (@aarch64_mul_lane_<mode>): Likewise.
18908 (@aarch64_sve_suqadd<mode>_const): Likewise.
18909 (*<sur>h<addsub><mode>): Generalize to...
18910 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
18912 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
18913 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
18914 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
18915 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
18916 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
18917 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
18918 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
18919 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
18920 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
18921 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
18922 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
18923 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
18924 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
18925 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
18926 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
18927 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
18928 (@aarch64_sve2_xar<mode>): Likewise.
18929 (@aarch64_sve2_bcax<mode>): Likewise.
18930 (*aarch64_sve2_eor3<mode>): Rename to...
18931 (@aarch64_sve2_eor3<mode>): ...this.
18932 (@aarch64_sve2_bsl<mode>): New expander.
18933 (@aarch64_sve2_nbsl<mode>): Likewise.
18934 (@aarch64_sve2_bsl1n<mode>): Likewise.
18935 (@aarch64_sve2_bsl2n<mode>): Likewise.
18936 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
18937 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
18938 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
18939 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
18940 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
18941 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
18942 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
18943 (<su>mull<bt><Vwide>): Generalize to...
18944 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
18946 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
18947 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
18948 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
18949 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
18950 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
18951 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
18952 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
18953 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
18954 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
18955 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
18956 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
18957 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
18958 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
18959 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
18960 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
18961 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
18962 (<SHRNB:r>shrnb<mode>): Generalize to...
18963 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
18965 (<SHRNT:r>shrnt<mode>): Generalize to...
18966 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
18968 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
18969 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
18970 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
18971 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
18972 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
18973 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
18974 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
18975 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
18976 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
18977 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
18978 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
18979 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
18980 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
18981 (@aarch64_sve2_cvtnt<mode>): Likewise.
18982 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
18983 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
18984 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
18985 (@aarch64_sve2_cvtxnt<mode>): Likewise.
18986 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
18987 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
18988 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
18989 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
18990 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
18991 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
18992 (@aarch64_sve2_pmul<mode>): Likewise.
18993 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
18994 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
18995 (@aarch64_sve2_tbl2<mode>): Likewise.
18996 (@aarch64_sve2_tbx<mode>): Likewise.
18997 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
18998 (@aarch64_sve2_histcnt<mode>): Likewise.
18999 (@aarch64_sve2_histseg<mode>): Likewise.
19000 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
19001 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
19002 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
19003 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
19004 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
19005 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
19006 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
19007 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
19008 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
19009 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
19010 (SVE2_PMULL_PAIR_I): New mode iterators.
19011 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
19012 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
19013 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
19014 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
19015 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
19016 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
19017 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
19018 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
19019 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
19020 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
19021 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
19022 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
19023 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
19024 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
19025 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
19026 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
19027 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
19028 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
19029 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
19030 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
19031 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
19032 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
19033 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
19034 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
19035 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
19036 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
19037 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
19038 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
19039 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
19040 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
19041 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
19043 (VNARROW, Ventype): New mode attributes.
19044 (Vewtype): Handle VNx2DI. Fix typo in comment.
19045 (VDOUBLE): New mode attribute.
19046 (sve_lane_con): Handle VNx8HI.
19047 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
19048 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
19049 (sve_int_op, sve_int_op_rev): Handle the above codes.
19050 (sve_pred_int_rhs2_operand): Likewise.
19051 (MULLBT, SHRNB, SHRNT): Delete.
19052 (SVE_INT_SHIFT_IMM): New int iterator.
19053 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
19054 and UNSPEC_WHILEHS for TARGET_SVE2.
19055 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
19056 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
19057 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
19058 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
19059 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
19060 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
19061 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
19062 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
19063 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
19064 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
19065 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
19066 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
19067 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
19068 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
19069 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
19070 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
19071 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
19072 (optab): Handle the new unspecs.
19073 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
19075 (lr): Handle the new unspecs.
19077 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
19078 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
19079 (sve_int_qsub_op): New int attributes.
19080 (sve_fp_op, rot): Handle the new unspecs.
19081 * config/aarch64/aarch64-sve-builtins.h
19082 (function_resolver::require_matching_pointer_type): Declare.
19083 (function_resolver::resolve_unary): Add an optional boolean argument.
19084 (function_resolver::finish_opt_n_resolution): Add an optional
19085 type_suffix_index argument.
19086 (gimple_folder::redirect_call): Declare.
19087 (gimple_expander::prepare_gather_address_operands): Add an optional
19089 * config/aarch64/aarch64-sve-builtins.cc: Include
19090 aarch64-sve-builtins-sve2.h.
19091 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
19092 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
19093 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
19094 (TYPES_hsd_integer): Use TYPES_hsd_signed.
19095 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
19096 (TYPES_s_unsigned): Likewise.
19097 (TYPES_s_integer): Use TYPES_s_unsigned.
19098 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
19099 (TYPES_sd_integer): Use them.
19100 (TYPES_d_unsigned): New macro.
19101 (TYPES_d_integer): Use it.
19102 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
19103 (TYPES_cvt_narrow): Likewise.
19104 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
19105 (preds_mx): New variable.
19106 (function_builder::add_overloaded_function): Allow the new feature
19107 set to be more restrictive than the original one.
19108 (function_resolver::infer_pointer_type): Remove qualifiers from
19109 the pointer type before printing it.
19110 (function_resolver::require_matching_pointer_type): New function.
19111 (function_resolver::resolve_sv_displacement): Handle functions
19112 that don't support 32-bit vector indices or svint32_t vector offsets.
19113 (function_resolver::finish_opt_n_resolution): Take the inferred type
19114 as a separate argument.
19115 (function_resolver::resolve_unary): Optionally treat all forms in
19116 the same way as normal merging functions.
19117 (gimple_folder::redirect_call): New function.
19118 (function_expander::prepare_gather_address_operands): Add an argument
19119 that says whether scaled forms are available. If they aren't,
19120 handle scaling of vector indices and don't add the extension and
19122 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
19123 fall back to using cond_* instead.
19124 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
19125 Split out the member variables into...
19126 (rtx_code_function_base): ...this new base class.
19127 (rtx_code_function_rotated): Inherit rtx_code_function_base.
19128 (unspec_based_function): Split out the member variables into...
19129 (unspec_based_function_base): ...this new base class.
19130 (unspec_based_function_rotated): Inherit unspec_based_function_base.
19131 (unspec_based_function_exact_insn): New class.
19132 (unspec_based_add_function, unspec_based_add_lane_function)
19133 (unspec_based_lane_function, unspec_based_pred_function)
19134 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
19135 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
19136 (unspec_based_sub_function, unspec_based_sub_lane_function): New
19138 (unspec_based_fused_function): New class.
19139 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
19140 (unspec_based_fused_lane_function): New class.
19141 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
19143 (CODE_FOR_MODE1): New macro.
19144 (fixed_insn_function): New class.
19145 (while_comparison): Likewise.
19146 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
19147 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
19148 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
19149 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
19150 (load_gather_sv_restricted, shift_left_imm_long): Declare.
19151 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
19152 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
19153 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
19154 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
19155 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
19156 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
19157 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
19158 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
19159 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
19160 Also add an initial argument for unary_convert_narrowt, regardless
19161 of the predication type.
19162 (build_32_64): Allow loads and stores to specify MODE_none.
19163 (build_sv_index64, build_sv_uint_offset): New functions.
19164 (long_type_suffix): New function.
19165 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
19166 (binary_imm_long_base, load_gather_sv_base): Likewise.
19167 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
19168 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
19169 (unary_narrowb_base, unary_narrowt_base): Likewise.
19170 (binary_long_lane_def, binary_long_lane): New shape.
19171 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
19172 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
19173 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
19174 (binary_to_uint_def, binary_to_uint): Likewise.
19175 (binary_wide_def, binary_wide): Likewise.
19176 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
19177 (compare_def, compare): Likewise.
19178 (compare_ptr_def, compare_ptr): Likewise.
19179 (load_ext_gather_index_restricted_def,
19180 load_ext_gather_index_restricted): Likewise.
19181 (load_ext_gather_offset_restricted_def,
19182 load_ext_gather_offset_restricted): Likewise.
19183 (load_gather_sv_def): Inherit from load_gather_sv_base.
19184 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
19185 (shift_left_imm_def, shift_left_imm): Likewise.
19186 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
19187 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
19188 (store_scatter_index_restricted_def,
19189 store_scatter_index_restricted): Likewise.
19190 (store_scatter_offset_restricted_def,
19191 store_scatter_offset_restricted): Likewise.
19192 (tbl_tuple_def, tbl_tuple): Likewise.
19193 (ternary_long_lane_def, ternary_long_lane): Likewise.
19194 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
19195 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
19196 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
19197 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
19198 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
19199 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
19200 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
19201 (ternary_uint_def, ternary_uint): Likewise.
19202 (unary_convert): Fix typo in comment.
19203 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
19204 (unary_long_def, unary_long): Likewise.
19205 (unary_narrowb_def, unary_narrowb): Likewise.
19206 (unary_narrowt_def, unary_narrowt): Likewise.
19207 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
19208 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
19209 (unary_to_int_def, unary_to_int): Likewise.
19210 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
19211 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
19212 (svasrd_impl): Delete.
19213 (svcadd_impl::expand): Handle integer operations too.
19214 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
19215 new functions to derive the unspec numbers.
19216 (svmla_svmls_lane_impl): Replace with...
19217 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
19218 integer operations too.
19219 (svwhile_impl): Rename to...
19220 (svwhilelx_impl): ...this and inherit from while_comparison.
19221 (svasrd): Use unspec_based_function.
19222 (svmla_lane): Use svmla_lane_impl.
19223 (svmls_lane): Use svmls_lane_impl.
19224 (svrecpe, svrsqrte): Handle unsigned integer operations too.
19225 (svwhilele, svwhilelt): Use svwhilelx_impl.
19226 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
19227 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
19228 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
19229 * config/aarch64/aarch64-sve-builtins.def: Include
19230 aarch64-sve-builtins-sve2.def.
19232 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19234 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
19235 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
19236 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
19237 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
19238 immediates as well as vector ones.
19239 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
19240 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
19241 (aarch64_sve_qsub_immediate): Update calls accordingly.
19243 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19245 * config/aarch64/aarch64-sve2.md: Add banner comments.
19246 (<su>mulh<r>s<mode>3): Move further up file.
19247 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
19248 (*aarch64_sve2_sra<mode>): Move further down file.
19249 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
19251 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19253 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
19254 and UNSPEC_WHILEWR.
19255 (while_optab_cmp): Handle them.
19256 * config/aarch64/aarch64-sve.md
19257 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
19258 and add a "@" marker.
19259 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
19260 instead of gen_aarch64_sve2_while_ptest.
19261 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
19263 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19265 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
19266 (UNSPEC_WHILELE): ...this.
19267 (UNSPEC_WHILE_LO): Rename to...
19268 (UNSPEC_WHILELO): ...this.
19269 (UNSPEC_WHILE_LS): Rename to...
19270 (UNSPEC_WHILELS): ...this.
19271 (UNSPEC_WHILE_LT): Rename to...
19272 (UNSPEC_WHILELT): ...this.
19273 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
19274 (cmp_op, while_optab_cmp): Likewise.
19275 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
19276 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
19277 (svwhilelt): Likewise.
19279 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19281 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
19282 (unary_to_uint): Define.
19283 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
19284 (unary_count): Rename to...
19285 (unary_to_uint_def, unary_to_uint): ...this.
19286 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
19288 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19290 * config/aarch64/aarch64-sve-builtins-functions.h
19291 (code_for_mode_function): New class.
19292 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
19293 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
19294 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
19295 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
19296 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
19298 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19300 * config/aarch64/iterators.md (addsub): New code attribute.
19301 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
19303 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
19304 in the asm string and attributes. Fix indentation.
19305 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
19307 (@aarch64_sve_<optab><mode>): ...this.
19308 * config/aarch64/aarch64-sve-builtins.h
19309 (function_expander::expand_signed_unpred_op): Delete.
19310 * config/aarch64/aarch64-sve-builtins.cc
19311 (function_expander::expand_signed_unpred_op): Likewise.
19312 (function_expander::map_to_rtx_codes): If the optab isn't defined,
19313 try using code_for_aarch64_sve instead.
19314 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
19315 (svqsub_impl): Likewise.
19316 (svqadd, svqsub): Use rtx_code_function instead.
19318 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19320 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
19321 (HADDSUB, sur, addsub): Remove them.
19323 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19325 * tree-nrv.c (pass_return_slot::execute): Handle all internal
19326 functions the same way, rather than singling out those that
19327 aren't mapped directly to optabs.
19329 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19331 * target.def (compatible_vector_types_p): New target hook.
19332 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
19333 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
19334 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
19335 * doc/tm.texi: Regenerate.
19336 * gimple-expr.c: Include target.h.
19337 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
19338 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
19340 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
19341 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
19342 Use the original predicate if it already has a suitable type.
19344 2020-01-09 Martin Jambor <mjambor@suse.cz>
19346 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
19347 resolve_speculation and redirect_call_stmt_to_callee static. Change
19348 return type of set_call_stmt to cgraph_edge *.
19349 * auto-profile.c (afdo_indirect_call): Adjust call to
19350 redirect_call_stmt_to_callee.
19351 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
19352 make the this pointer explicit, adjust self-recursive calls and the
19353 call top make_direct. Return the resulting edge.
19354 (cgraph_edge::remove): Make this pointer explicit.
19355 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
19356 (cgraph_edge::make_direct): Likewise, adjust call to
19357 resolve_speculation.
19358 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
19359 call to set_call_stmt.
19360 (cgraph_update_edges_for_call_stmt_node): Update call to
19361 set_call_stmt and remove.
19362 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
19363 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
19364 (cgraph_node::create_edge_including_clones): Moved "first" definition
19365 of edge to the block where it was used. Adjusted calls to
19367 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
19368 cgraph_edge::remove.
19369 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
19370 make_direct and redirect_call_stmt_to_callee.
19371 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
19372 resolve_speculation and make_direct.
19373 * ipa-inline-transform.c (inline_transform): Adjust call to
19374 redirect_call_stmt_to_callee.
19375 (check_speculations_1):: Adjust call to resolve_speculation.
19376 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
19377 resolve-speculation.
19378 (inline_small_functions): Adjust call to resolve_speculation.
19379 (ipa_inline): Likewise.
19380 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
19382 * ipa-visibility.c (function_and_variable_visibility): Make iteration
19383 safe with regards to edge removal, adjust calls to
19384 redirect_call_stmt_to_callee.
19385 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
19386 and redirect_call_stmt_to_callee.
19387 * multiple_target.c (create_dispatcher_calls): Adjust call to
19388 redirect_call_stmt_to_callee
19389 (redirect_to_specific_clone): Likewise.
19390 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
19391 Adjust calls to cgraph_edge::remove.
19392 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
19393 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
19394 (expand_call_inline): Adjust call to cgraph_edge::remove.
19396 2020-01-09 Martin Liska <mliska@suse.cz>
19398 * params.opt: Set Optimization for
19399 param_max_speculative_devirt_maydefs.
19401 2020-01-09 Martin Sebor <msebor@redhat.com>
19403 PR middle-end/93200
19405 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
19407 2020-01-09 Martin Liska <mliska@suse.cz>
19409 * auto-profile.c (auto_profile): Use opt_for_fn
19411 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
19412 (propagate_vals_across_arith_jfunc): Likewise.
19413 (hint_time_bonus): Likewise.
19414 (incorporate_penalties): Likewise.
19415 (good_cloning_opportunity_p): Likewise.
19416 (perform_estimation_of_a_value): Likewise.
19417 (estimate_local_effects): Likewise.
19418 (ipcp_propagate_stage): Likewise.
19419 * ipa-fnsummary.c (decompose_param_expr): Likewise.
19420 (set_switch_stmt_execution_predicate): Likewise.
19421 (analyze_function_body): Likewise.
19422 * ipa-inline-analysis.c (offline_size): Likewise.
19423 * ipa-inline.c (early_inliner): Likewise.
19424 * ipa-prop.c (ipa_analyze_node): Likewise.
19425 (ipcp_transform_function): Likewise.
19426 * ipa-sra.c (process_scan_results): Likewise.
19427 (ipa_sra_summarize_function): Likewise.
19428 * params.opt: Rename ipcp-unit-growth to
19429 ipa-cp-unit-growth. Add Optimization for various
19430 IPA-related parameters.
19432 2020-01-09 Richard Biener <rguenther@suse.de>
19434 PR middle-end/93054
19435 * gimplify.c (gimplify_expr): Deal with NOP definitions.
19437 2020-01-09 Richard Biener <rguenther@suse.de>
19439 PR tree-optimization/93040
19440 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
19442 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
19444 * common/config/avr/avr-common.c (avr_option_optimization_table)
19445 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
19447 2020-01-09 Martin Liska <mliska@suse.cz>
19449 * cgraphclones.c (symbol_table::materialize_all_clones):
19450 Use cgraph_node::dump_name.
19452 2020-01-09 Jakub Jelinek <jakub@redhat.com>
19454 PR inline-asm/93202
19455 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
19456 output_operand_lossage instead of gcc_unreachable.
19457 * doc/md.texi (riscv f constraint): Fix typo.
19460 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
19461 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
19462 CONST_SCALAR_INT_P instead of CONST_INT_P.
19463 (*subv<mode>4_1): Rename to ...
19464 (subv<mode>4_1): ... this.
19465 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
19466 define_insn_and_split patterns.
19467 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
19470 2020-01-08 David Malcolm <dmalcolm@redhat.com>
19472 * vec.c (class selftest::count_dtor): New class.
19473 (selftest::test_auto_delete_vec): New test.
19474 (selftest::vec_c_tests): Call it.
19475 * vec.h (class auto_delete_vec): New class template.
19476 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
19478 2020-01-08 David Malcolm <dmalcolm@redhat.com>
19480 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
19482 2020-01-08 Jim Wilson <jimw@sifive.com>
19484 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
19485 use of TLS_MODEL_LOCAL_EXEC when not pic.
19487 2020-01-08 David Malcolm <dmalcolm@redhat.com>
19489 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
19492 2020-01-08 Jakub Jelinek <jakub@redhat.com>
19495 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
19496 *stack_protect_set_3 peephole2): Also check that the second
19497 insns source is general_operand.
19500 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
19501 predicate for output operand instead of register_operand.
19502 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
19503 memory destination and non-memory operands[2].
19505 2020-01-08 Martin Liska <mliska@suse.cz>
19507 * cgraph.c (cgraph_node::dump): Use ::dump_name or
19508 ::dump_asm_name instead of (::name or ::asm_name).
19509 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
19510 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
19511 (analyze_functions): Likewise.
19512 (expand_all_functions): Likewise.
19513 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
19514 (propagate_bits_across_jump_function): Likewise.
19515 (dump_profile_updates): Likewise.
19516 (ipcp_store_bits_results): Likewise.
19517 (ipcp_store_vr_results): Likewise.
19518 * ipa-devirt.c (dump_targets): Likewise.
19519 * ipa-fnsummary.c (analyze_function_body): Likewise.
19520 * ipa-hsa.c (check_warn_node_versionable): Likewise.
19521 (process_hsa_functions): Likewise.
19522 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
19523 (set_alias_uids): Likewise.
19524 * ipa-inline-transform.c (save_inline_function_body): Likewise.
19525 * ipa-inline.c (recursive_inlining): Likewise.
19526 (inline_to_all_callers_1): Likewise.
19527 (ipa_inline): Likewise.
19528 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
19529 (ipa_propagate_frequency): Likewise.
19530 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
19531 (remove_described_reference): Likewise.
19532 * ipa-pure-const.c (worse_state): Likewise.
19533 (check_retval_uses): Likewise.
19534 (analyze_function): Likewise.
19535 (propagate_pure_const): Likewise.
19536 (propagate_nothrow): Likewise.
19537 (dump_malloc_lattice): Likewise.
19538 (propagate_malloc): Likewise.
19539 (pass_local_pure_const::execute): Likewise.
19540 * ipa-visibility.c (optimize_weakref): Likewise.
19541 (function_and_variable_visibility): Likewise.
19542 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
19543 (ipa_discover_variable_flags): Likewise.
19544 * lto-streamer-out.c (output_function): Likewise.
19545 (output_constructor): Likewise.
19546 * tree-inline.c (copy_bb): Likewise.
19547 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
19548 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
19550 2020-01-08 Richard Biener <rguenther@suse.de>
19552 PR middle-end/93199
19553 * tree-eh.c (sink_clobbers): Update virtual operands for
19554 the first and last stmt only. Add a dry-run capability.
19555 (pass_lower_eh_dispatch::execute): Perform clobber sinking
19556 after CFG manipulations and in RPO order to catch all
19557 secondary opportunities reliably.
19559 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
19562 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
19564 2019-01-08 Richard Biener <rguenther@suse.de>
19566 PR middle-end/93199
19567 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
19568 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
19569 virtual operand, also updating SSA use.
19570 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
19571 Update stmt after resetting virtual operand.
19572 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
19573 * gimple-iterator.c (gsi_remove): When not removing the stmt
19574 permanently do not delink immediate uses or mark the stmt modified.
19576 2020-01-08 Martin Liska <mliska@suse.cz>
19578 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
19579 (ipa_call_context::estimate_size_and_time): Likewise.
19580 (inline_analyze_function): Likewise.
19582 2020-01-08 Martin Liska <mliska@suse.cz>
19584 * cgraph.c (cgraph_node::dump): Use systematically
19587 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
19589 Add -nodevicespecs option for avr.
19592 * config/avr/avr.opt (-nodevicespecs): New driver option.
19593 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
19594 "-specs=device-specs/..." if that option is not set.
19595 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
19597 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
19599 Implement 64-bit double functions for avr.
19602 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
19603 --with-double-comparison.
19604 * doc/install.texi: Document them.
19605 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
19606 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
19607 <WITH_DOUBLE_COMPARISON>: New built-in defines.
19608 * doc/invoke.texi (AVR Built-in Macros): Document them.
19609 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
19610 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
19611 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
19613 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
19616 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
19617 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
19618 when only building rm-profile multilibs.
19620 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
19623 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
19624 lattice for a value to check.
19625 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
19626 finite propagation in self-recursive scc.
19628 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
19630 * ipa-inline.c (caller_growth_limits): Restore the AND.
19632 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
19634 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
19635 (VEC_ALLREG_ALT): New iterator.
19636 (VEC_ALLREG_INT_MODE): New iterator.
19637 (VCMP_MODE): New iterator.
19638 (VCMP_MODE_INT): New iterator.
19639 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
19640 (vec_cmp<u>v64qidi): New define_expand.
19641 (vec_cmp<mode>di_exec): Use VCMP_MODE.
19642 (vec_cmpu<mode>di_exec): New define_expand.
19643 (vec_cmp<u>v64qidi_exec): New define_expand.
19644 (vec_cmp<mode>di_dup): Use VCMP_MODE.
19645 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
19646 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
19647 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
19648 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
19649 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
19650 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
19651 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
19652 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
19653 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
19655 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
19656 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
19658 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
19660 * config/gcn/constraints.md (DA): Update description and match.
19662 (Db): New constraint.
19663 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
19665 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
19666 Implement 'Db' mixed immediate type.
19667 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
19668 (addcv64si3_dup<exec_vcc>): Delete.
19669 (subcv64si3<exec_vcc>): Rework constraints.
19670 (addv64di3): Rework constraints.
19671 (addv64di3_exec): Rework constraints.
19672 (subv64di3): Rework constraints.
19673 (addv64di3_dup): Delete.
19674 (addv64di3_dup_exec): Delete.
19675 (addv64di3_zext): Rework constraints.
19676 (addv64di3_zext_exec): Rework constraints.
19677 (addv64di3_zext_dup): Rework constraints.
19678 (addv64di3_zext_dup_exec): Rework constraints.
19679 (addv64di3_zext_dup2): Rework constraints.
19680 (addv64di3_zext_dup2_exec): Rework constraints.
19681 (addv64di3_sext_dup2): Rework constraints.
19682 (addv64di3_sext_dup2_exec): Rework constraints.
19684 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
19686 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
19687 existing target checks.
19689 2020-01-07 Richard Biener <rguenther@suse.de>
19691 * doc/install.texi: Bump minimal supported MPC version.
19693 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
19695 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
19696 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
19697 * langhooks.c: Include stor-layout.h.
19698 (lhd_simulate_enum_decl): New function.
19699 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
19700 handle_arm_sve_h for the LTO frontend.
19701 (register_vector_type): Cope with null returns from pushdecl.
19703 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
19705 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
19706 (aarch64_sve::nvectors_if_data_type): Replace with...
19707 (aarch64_sve::builtin_type_p): ...this.
19708 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
19709 (find_vector_type): Delete.
19710 (add_sve_type_attribute): New function.
19711 (lookup_sve_type_attribute): Likewise.
19712 (register_builtin_types): Add an "SVE type" attribute to each type.
19713 (register_tuple_type): Likewise.
19714 (svbool_type_p, nvectors_if_data_type): Delete.
19715 (mangle_builtin_type): Use lookup_sve_type_attribute.
19716 (builtin_type_p): Likewise. Add an overload that returns the
19717 number of constituent vector and predicate registers.
19718 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
19719 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
19720 instead of aarch64_sve_argument_p.
19721 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
19722 (aarch64_pass_by_reference): Likewise.
19723 (aarch64_function_value_1): Likewise.
19724 (aarch64_return_in_memory): Likewise.
19725 (aarch64_layout_arg): Likewise.
19727 2020-01-07 Jakub Jelinek <jakub@redhat.com>
19729 PR tree-optimization/93156
19730 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
19731 least significant bit is always clear.
19733 PR tree-optimization/93118
19734 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
19735 simplifier with two intermediate conversions.
19737 2020-01-07 Martin Liska <mliska@suse.cz>
19739 * params.opt: Add Optimization for various parameters.
19741 2020-01-07 Martin Liska <mliska@suse.cz>
19744 * doc/extend.texi: Explain cloning for target_clone
19747 2020-01-07 Martin Liska <mliska@suse.cz>
19749 PR tree-optimization/92860
19750 * common.opt: Make in Optimization option
19751 as it is affected by -O0, which is an Optimization
19753 * tree-inline.c (tree_inlinable_function_p):
19754 Use opt_for_fn for warn_inline.
19755 (expand_call_inline): Likewise.
19757 2020-01-07 Martin Liska <mliska@suse.cz>
19759 PR tree-optimization/92860
19760 * common.opt: Make flag_ree as optimization
19763 2020-01-07 Martin Liska <mliska@suse.cz>
19765 PR optimization/92860
19766 * params.opt: Mark param_min_crossjump_insns with Optimization
19769 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
19771 * ipa-inline-analysis.c (estimate_growth): Fix typo.
19772 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
19774 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
19776 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
19777 helper function to return the valid addressing formats for a given
19778 hard register and mode.
19779 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
19781 * config/rs6000/constraints.md (Q constraint): Update
19783 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
19786 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
19787 Use 'Q' for doing vector extract from memory.
19788 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
19790 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
19791 doing vector extract from memory.
19792 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
19793 extract from memory.
19795 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
19796 for the offset being 34-bits when -mcpu=future is used.
19798 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
19800 * config/pa/pa.md: Revert change to use ordered_comparison_operator
19801 instead of cmpib_comparison_operator in cmpib patterns.
19802 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
19803 of cmpib_comparison_operator. Revise comment.
19805 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
19807 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
19808 in an IFN_DIV_POW2 node to be equal.
19810 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
19812 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
19813 (vect_check_scalar_mask): ...this.
19814 (vectorizable_store, vectorizable_load): Update call accordingly.
19815 (vectorizable_call): Use vect_check_scalar_mask to check the mask
19816 argument in calls to conditional internal functions.
19818 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
19820 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
19821 '0' matching inputs.
19822 (subv64di3_exec): Likewise.
19824 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
19826 * config/mips/mips.c (vr4130_align_insns): Fix typo.
19827 * doc/md.texi (movstr): Likewise.
19829 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
19831 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
19834 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
19836 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
19838 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
19839 to a temporary file and use move-if-change to update the real
19840 file where necessary.
19842 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
19844 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
19845 rather than Upa for CPY /M.
19847 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
19849 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
19852 2020-01-06 Martin Liska <mliska@suse.cz>
19854 PR tree-optimization/92860
19855 * params.opt: Mark param_max_combine_insns with Optimization
19858 2020-01-05 Jakub Jelinek <jakub@redhat.com>
19861 * config/i386/i386.md (SWIDWI): New mode iterator.
19862 (DWI, dwi): Add TImode variants.
19863 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
19864 <general_hilo_operand> instead of <general_operand>. Use
19865 CONST_SCALAR_INT_P instead of CONST_INT_P.
19866 (*addv<mode>4_1): Rename to ...
19867 (addv<mode>4_1): ... this.
19868 (QWI): New mode attribute.
19869 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
19870 define_insn_and_split patterns.
19871 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
19873 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
19874 <general_hilo_operand> instead of <general_operand>.
19875 (*addcarry<mode>_1): New define_insn.
19876 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
19878 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
19880 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
19881 Use "call" instead of "set".
19883 2020-01-03 Martin Jambor <mjambor@suse.cz>
19886 * ipa-cp.c (print_all_lattices): Skip functions without info.
19888 2020-01-03 Jakub Jelinek <jakub@redhat.com>
19891 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
19892 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
19893 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
19894 for 'e' simd clones.
19897 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
19899 (mprefer-vector-width=): Add Save.
19900 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
19901 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
19902 (ix86_debug_options, ix86_function_specific_print): Adjust
19903 ix86_target_string callers.
19904 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
19905 (ix86_valid_target_attribute_tree): Likewise.
19906 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
19907 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
19908 ix86_target_string caller.
19911 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
19912 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
19913 instead of gen_int_shift_amount + convert_modes.
19915 PR rtl-optimization/93088
19916 * loop-iv.c (find_single_def_src): Punt after looking through
19917 128 reg copies for regs with single definitions. Move definitions
19920 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
19922 * config/arm/arm-c.c (arm_cpu_builtins): Define
19923 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
19924 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
19925 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
19926 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
19927 * config/arm/arm-tables.opt: Regenerated.
19928 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
19929 arm_arch_i8mm and arm_arch_bf16 when enabled.
19930 * config/arm/arm.h (TARGET_I8MM): New macro.
19931 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
19932 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
19933 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
19934 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
19935 (v8_6_a_simd_variants): New.
19936 (v8_*_a_simd_variants): Add i8mm and bf16.
19937 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
19939 2020-01-02 Jakub Jelinek <jakub@redhat.com>
19942 * predict.c (compute_function_frequency): Don't call
19943 warn_function_cold on functions that already have cold attribute.
19945 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
19948 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
19949 COMDAT group function labels in .data.rel.ro.local section.
19950 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
19953 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
19954 comparison_operator in B and S integer comparisons. Likewise, use
19955 ordered_comparison_operator instead of cmpib_comparison_operator in
19957 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
19959 2020-01-01 Jakub Jelinek <jakub@redhat.com>
19961 Update copyright years.
19963 * gcc.c (process_command): Update copyright notice dates.
19964 * gcov-dump.c (print_version): Ditto.
19965 * gcov.c (print_version): Ditto.
19966 * gcov-tool.c (print_version): Ditto.
19967 * gengtype.c (create_file): Ditto.
19968 * doc/cpp.texi: Bump @copying's copyright year.
19969 * doc/cppinternals.texi: Ditto.
19970 * doc/gcc.texi: Ditto.
19971 * doc/gccint.texi: Ditto.
19972 * doc/gcov.texi: Ditto.
19973 * doc/install.texi: Ditto.
19974 * doc/invoke.texi: Ditto.
19976 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
19978 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
19981 2020-01-01 Jakub Jelinek <jakub@redhat.com>
19983 PR tree-optimization/93098
19984 * match.pd (popcount): For shift amounts, use integer_onep
19985 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
19986 tests. Make sure that precision is power of two larger than or equal
19987 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
19988 instead of ULL suffixed constants. Formatting fixes.
19990 Copyright (C) 2020 Free Software Foundation, Inc.
19992 Copying and distribution of this file, with or without modification,
19993 are permitted in any medium without royalty provided the copyright
19994 notice and this notice are preserved.