1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2019 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_pattern (rtx
, rtx
, rtx
, unsigned, unsigned,
77 HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
,
79 unsigned HOST_WIDE_INT
, bool);
80 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
81 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
82 static rtx_insn
*compress_float_constant (rtx
, rtx
);
83 static rtx
get_subtarget (rtx
);
84 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
85 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
86 machine_mode
, tree
, alias_set_type
, bool, bool);
88 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
90 static int is_aligning_offset (const_tree
, const_tree
);
91 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
92 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
94 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
96 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
98 static rtx
const_vector_from_tree (tree
);
99 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
100 static tree
tree_expr_size (const_tree
);
101 static HOST_WIDE_INT
int_expr_size (tree
);
102 static void convert_mode_scalar (rtx
, rtx
, int);
105 /* This is run to set up which modes can be used
106 directly in memory and to initialize the block move optab. It is run
107 at the beginning of compilation and when the target is reinitialized. */
110 init_expr_target (void)
117 /* Try indexing by frame ptr and try by stack ptr.
118 It is known that on the Convex the stack ptr isn't a valid index.
119 With luck, one or the other is valid on any machine. */
120 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
121 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
123 /* A scratch register we can modify in-place below to avoid
124 useless RTL allocations. */
125 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
127 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
128 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
129 PATTERN (insn
) = pat
;
131 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
132 mode
= (machine_mode
) ((int) mode
+ 1))
136 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
137 PUT_MODE (mem
, mode
);
138 PUT_MODE (mem1
, mode
);
140 /* See if there is some register that can be used in this mode and
141 directly loaded or stored from memory. */
143 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
144 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
145 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
148 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
151 set_mode_and_regno (reg
, mode
, regno
);
154 SET_DEST (pat
) = reg
;
155 if (recog (pat
, insn
, &num_clobbers
) >= 0)
156 direct_load
[(int) mode
] = 1;
158 SET_SRC (pat
) = mem1
;
159 SET_DEST (pat
) = reg
;
160 if (recog (pat
, insn
, &num_clobbers
) >= 0)
161 direct_load
[(int) mode
] = 1;
164 SET_DEST (pat
) = mem
;
165 if (recog (pat
, insn
, &num_clobbers
) >= 0)
166 direct_store
[(int) mode
] = 1;
169 SET_DEST (pat
) = mem1
;
170 if (recog (pat
, insn
, &num_clobbers
) >= 0)
171 direct_store
[(int) mode
] = 1;
175 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
177 opt_scalar_float_mode mode_iter
;
178 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
180 scalar_float_mode mode
= mode_iter
.require ();
181 scalar_float_mode srcmode
;
182 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
186 ic
= can_extend_p (mode
, srcmode
, 0);
187 if (ic
== CODE_FOR_nothing
)
190 PUT_MODE (mem
, srcmode
);
192 if (insn_operand_matches (ic
, 1, mem
))
193 float_extend_from_mem
[mode
][srcmode
] = true;
198 /* This is run at the start of compiling a function. */
203 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
206 /* Copy data from FROM to TO, where the machine modes are not the same.
207 Both modes may be integer, or both may be floating, or both may be
209 UNSIGNEDP should be nonzero if FROM is an unsigned type.
210 This causes zero-extension instead of sign-extension. */
213 convert_move (rtx to
, rtx from
, int unsignedp
)
215 machine_mode to_mode
= GET_MODE (to
);
216 machine_mode from_mode
= GET_MODE (from
);
218 gcc_assert (to_mode
!= BLKmode
);
219 gcc_assert (from_mode
!= BLKmode
);
221 /* If the source and destination are already the same, then there's
226 /* If FROM is a SUBREG that indicates that we have already done at least
227 the required extension, strip it. We don't handle such SUBREGs as
230 scalar_int_mode to_int_mode
;
231 if (GET_CODE (from
) == SUBREG
232 && SUBREG_PROMOTED_VAR_P (from
)
233 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
234 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
235 >= GET_MODE_PRECISION (to_int_mode
))
236 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
238 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
239 from_mode
= to_int_mode
;
242 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
244 if (to_mode
== from_mode
245 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
247 emit_move_insn (to
, from
);
251 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
253 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
254 GET_MODE_BITSIZE (to_mode
)));
256 if (VECTOR_MODE_P (to_mode
))
257 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
259 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
261 emit_move_insn (to
, from
);
265 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
267 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
268 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
272 convert_mode_scalar (to
, from
, unsignedp
);
275 /* Like convert_move, but deals only with scalar modes. */
278 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
280 /* Both modes should be scalar types. */
281 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
282 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
283 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
284 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
288 gcc_assert (to_real
== from_real
);
290 /* rtx code for making an equivalent value. */
291 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
292 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
300 gcc_assert ((GET_MODE_PRECISION (from_mode
)
301 != GET_MODE_PRECISION (to_mode
))
302 || (DECIMAL_FLOAT_MODE_P (from_mode
)
303 != DECIMAL_FLOAT_MODE_P (to_mode
)));
305 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
306 /* Conversion between decimal float and binary float, same size. */
307 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
308 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
313 /* Try converting directly if the insn is supported. */
315 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
316 if (code
!= CODE_FOR_nothing
)
318 emit_unop_insn (code
, to
, from
,
319 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
323 /* Otherwise use a libcall. */
324 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
326 /* Is this conversion implemented yet? */
327 gcc_assert (libcall
);
330 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
332 insns
= get_insns ();
334 emit_libcall_block (insns
, to
, value
,
335 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
337 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
341 /* Handle pointer conversion. */ /* SPEE 900220. */
342 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
346 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
353 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
356 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
362 /* Targets are expected to provide conversion insns between PxImode and
363 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
364 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
366 scalar_int_mode full_mode
367 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
369 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
370 != CODE_FOR_nothing
);
372 if (full_mode
!= from_mode
)
373 from
= convert_to_mode (full_mode
, from
, unsignedp
);
374 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
378 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
381 scalar_int_mode full_mode
382 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
383 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
384 enum insn_code icode
;
386 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
387 gcc_assert (icode
!= CODE_FOR_nothing
);
389 if (to_mode
== full_mode
)
391 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
395 new_from
= gen_reg_rtx (full_mode
);
396 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
398 /* else proceed to integer conversions below. */
399 from_mode
= full_mode
;
403 /* Make sure both are fixed-point modes or both are not. */
404 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
405 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
406 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
408 /* If we widen from_mode to to_mode and they are in the same class,
409 we won't saturate the result.
410 Otherwise, always saturate the result to play safe. */
411 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
412 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
413 expand_fixed_convert (to
, from
, 0, 0);
415 expand_fixed_convert (to
, from
, 0, 1);
419 /* Now both modes are integers. */
421 /* Handle expanding beyond a word. */
422 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
423 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
430 scalar_mode lowpart_mode
;
431 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
433 /* Try converting directly if the insn is supported. */
434 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
437 /* If FROM is a SUBREG, put it into a register. Do this
438 so that we always generate the same set of insns for
439 better cse'ing; if an intermediate assignment occurred,
440 we won't be doing the operation directly on the SUBREG. */
441 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
442 from
= force_reg (from_mode
, from
);
443 emit_unop_insn (code
, to
, from
, equiv_code
);
446 /* Next, try converting via full word. */
447 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
448 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
449 != CODE_FOR_nothing
))
451 rtx word_to
= gen_reg_rtx (word_mode
);
454 if (reg_overlap_mentioned_p (to
, from
))
455 from
= force_reg (from_mode
, from
);
458 convert_move (word_to
, from
, unsignedp
);
459 emit_unop_insn (code
, to
, word_to
, equiv_code
);
463 /* No special multiword conversion insn; do it by hand. */
466 /* Since we will turn this into a no conflict block, we must ensure
467 the source does not overlap the target so force it into an isolated
468 register when maybe so. Likewise for any MEM input, since the
469 conversion sequence might require several references to it and we
470 must ensure we're getting the same value every time. */
472 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
473 from
= force_reg (from_mode
, from
);
475 /* Get a copy of FROM widened to a word, if necessary. */
476 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
477 lowpart_mode
= word_mode
;
479 lowpart_mode
= from_mode
;
481 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
483 lowpart
= gen_lowpart (lowpart_mode
, to
);
484 emit_move_insn (lowpart
, lowfrom
);
486 /* Compute the value to put in each remaining word. */
488 fill_value
= const0_rtx
;
490 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
491 LT
, lowfrom
, const0_rtx
,
492 lowpart_mode
, 0, -1);
494 /* Fill the remaining words. */
495 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
497 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
498 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
500 gcc_assert (subword
);
502 if (fill_value
!= subword
)
503 emit_move_insn (subword
, fill_value
);
506 insns
= get_insns ();
513 /* Truncating multi-word to a word or less. */
514 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
515 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
518 && ! MEM_VOLATILE_P (from
)
519 && direct_load
[(int) to_mode
]
520 && ! mode_dependent_address_p (XEXP (from
, 0),
521 MEM_ADDR_SPACE (from
)))
523 || GET_CODE (from
) == SUBREG
))
524 from
= force_reg (from_mode
, from
);
525 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
529 /* Now follow all the conversions between integers
530 no more than a word long. */
532 /* For truncation, usually we can just refer to FROM in a narrower mode. */
533 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
534 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
537 && ! MEM_VOLATILE_P (from
)
538 && direct_load
[(int) to_mode
]
539 && ! mode_dependent_address_p (XEXP (from
, 0),
540 MEM_ADDR_SPACE (from
)))
542 || GET_CODE (from
) == SUBREG
))
543 from
= force_reg (from_mode
, from
);
544 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
545 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
546 from
= copy_to_reg (from
);
547 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
551 /* Handle extension. */
552 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
554 /* Convert directly if that works. */
555 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
558 emit_unop_insn (code
, to
, from
, equiv_code
);
566 /* Search for a mode to convert via. */
567 opt_scalar_mode intermediate_iter
;
568 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
570 scalar_mode intermediate
= intermediate_iter
.require ();
571 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
573 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
576 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
577 != CODE_FOR_nothing
))
579 convert_move (to
, convert_to_mode (intermediate
, from
,
580 unsignedp
), unsignedp
);
585 /* No suitable intermediate mode.
586 Generate what we need with shifts. */
587 shift_amount
= (GET_MODE_PRECISION (to_mode
)
588 - GET_MODE_PRECISION (from_mode
));
589 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
590 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
592 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
595 emit_move_insn (to
, tmp
);
600 /* Support special truncate insns for certain modes. */
601 if (convert_optab_handler (trunc_optab
, to_mode
,
602 from_mode
) != CODE_FOR_nothing
)
604 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
609 /* Handle truncation of volatile memrefs, and so on;
610 the things that couldn't be truncated directly,
611 and for which there was no special instruction.
613 ??? Code above formerly short-circuited this, for most integer
614 mode pairs, with a force_reg in from_mode followed by a recursive
615 call to this routine. Appears always to have been wrong. */
616 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
618 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
619 emit_move_insn (to
, temp
);
623 /* Mode combination is not recognized. */
627 /* Return an rtx for a value that would result
628 from converting X to mode MODE.
629 Both X and MODE may be floating, or both integer.
630 UNSIGNEDP is nonzero if X is an unsigned value.
631 This can be done by referring to a part of X in place
632 or by copying to a new temporary with conversion. */
635 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
637 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
640 /* Return an rtx for a value that would result
641 from converting X from mode OLDMODE to mode MODE.
642 Both modes may be floating, or both integer.
643 UNSIGNEDP is nonzero if X is an unsigned value.
645 This can be done by referring to a part of X in place
646 or by copying to a new temporary with conversion.
648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
651 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
654 scalar_int_mode int_mode
;
656 /* If FROM is a SUBREG that indicates that we have already done at least
657 the required extension, strip it. */
659 if (GET_CODE (x
) == SUBREG
660 && SUBREG_PROMOTED_VAR_P (x
)
661 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
662 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
663 >= GET_MODE_PRECISION (int_mode
))
664 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
665 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
667 if (GET_MODE (x
) != VOIDmode
)
668 oldmode
= GET_MODE (x
);
673 if (CONST_SCALAR_INT_P (x
)
674 && is_int_mode (mode
, &int_mode
))
676 /* If the caller did not tell us the old mode, then there is not
677 much to do with respect to canonicalization. We have to
678 assume that all the bits are significant. */
679 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
680 oldmode
= MAX_MODE_INT
;
681 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
682 GET_MODE_PRECISION (int_mode
),
683 unsignedp
? UNSIGNED
: SIGNED
);
684 return immed_wide_int_const (w
, int_mode
);
687 /* We can do this with a gen_lowpart if both desired and current modes
688 are integer, and this is either a constant integer, a register, or a
690 scalar_int_mode int_oldmode
;
691 if (is_int_mode (mode
, &int_mode
)
692 && is_int_mode (oldmode
, &int_oldmode
)
693 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
694 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
695 || CONST_POLY_INT_P (x
)
697 && (!HARD_REGISTER_P (x
)
698 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
699 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
700 return gen_lowpart (int_mode
, x
);
702 /* Converting from integer constant into mode is always equivalent to an
704 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
706 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
707 GET_MODE_BITSIZE (oldmode
)));
708 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
711 temp
= gen_reg_rtx (mode
);
712 convert_move (temp
, x
, unsignedp
);
716 /* Return the largest alignment we can use for doing a move (or store)
717 of MAX_PIECES. ALIGN is the largest alignment we could use. */
720 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
722 scalar_int_mode tmode
723 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
725 if (align
>= GET_MODE_ALIGNMENT (tmode
))
726 align
= GET_MODE_ALIGNMENT (tmode
);
729 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
730 opt_scalar_int_mode mode_iter
;
731 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
733 tmode
= mode_iter
.require ();
734 if (GET_MODE_SIZE (tmode
) > max_pieces
735 || targetm
.slow_unaligned_access (tmode
, align
))
740 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
746 /* Return the widest integer mode that is narrower than SIZE bytes. */
748 static scalar_int_mode
749 widest_int_mode_for_size (unsigned int size
)
751 scalar_int_mode result
= NARROWEST_INT_MODE
;
753 gcc_checking_assert (size
> 1);
755 opt_scalar_int_mode tmode
;
756 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
757 if (GET_MODE_SIZE (tmode
.require ()) < size
)
758 result
= tmode
.require ();
763 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
764 and should be performed piecewise. */
767 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
768 enum by_pieces_operation op
)
770 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
771 optimize_insn_for_speed_p ());
774 /* Determine whether the LEN bytes can be moved by using several move
775 instructions. Return nonzero if a call to move_by_pieces should
779 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
781 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
784 /* Return number of insns required to perform operation OP by pieces
785 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
787 unsigned HOST_WIDE_INT
788 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
789 unsigned int max_size
, by_pieces_operation op
)
791 unsigned HOST_WIDE_INT n_insns
= 0;
793 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
795 while (max_size
> 1 && l
> 0)
797 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
798 enum insn_code icode
;
800 unsigned int modesize
= GET_MODE_SIZE (mode
);
802 icode
= optab_handler (mov_optab
, mode
);
803 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
805 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
813 case COMPARE_BY_PIECES
:
814 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
815 int batch_ops
= 4 * batch
- 1;
816 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
817 n_insns
+= full
* batch_ops
;
818 if (n_pieces
% batch
!= 0)
831 /* Used when performing piecewise block operations, holds information
832 about one of the memory objects involved. The member functions
833 can be used to generate code for loading from the object and
834 updating the address when iterating. */
838 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
841 /* The address of the object. Can differ from that seen in the
842 MEM rtx if we copied the address to a register. */
844 /* Nonzero if the address on the object has an autoincrement already,
845 signifies whether that was an increment or decrement. */
846 signed char m_addr_inc
;
847 /* Nonzero if we intend to use autoinc without the address already
848 having autoinc form. We will insert add insns around each memory
849 reference, expecting later passes to form autoinc addressing modes.
850 The only supported options are predecrement and postincrement. */
851 signed char m_explicit_inc
;
852 /* True if we have either of the two possible cases of using
855 /* True if this is an address to be used for load operations rather
859 /* Optionally, a function to obtain constants for any given offset into
860 the objects, and data associated with it. */
861 by_pieces_constfn m_constfn
;
864 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
865 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
866 void increment_address (HOST_WIDE_INT
);
867 void maybe_predec (HOST_WIDE_INT
);
868 void maybe_postinc (HOST_WIDE_INT
);
869 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
876 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
877 true if the operation to be performed on this object is a load
878 rather than a store. For stores, OBJ can be NULL, in which case we
879 assume the operation is a stack push. For loads, the optional
880 CONSTFN and its associated CFNDATA can be used in place of the
883 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
885 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
891 rtx addr
= XEXP (obj
, 0);
892 rtx_code code
= GET_CODE (addr
);
894 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
895 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
898 m_addr_inc
= dec
? -1 : 1;
900 /* While we have always looked for these codes here, the code
901 implementing the memory operation has never handled them.
902 Support could be added later if necessary or beneficial. */
903 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
911 if (STACK_GROWS_DOWNWARD
)
917 gcc_assert (constfn
!= NULL
);
921 gcc_assert (is_load
);
924 /* Decide whether to use autoinc for an address involved in a memory op.
925 MODE is the mode of the accesses, REVERSE is true if we've decided to
926 perform the operation starting from the end, and LEN is the length of
927 the operation. Don't override an earlier decision to set m_auto. */
930 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
933 if (m_auto
|| m_obj
== NULL_RTX
)
936 bool use_predec
= (m_is_load
937 ? USE_LOAD_PRE_DECREMENT (mode
)
938 : USE_STORE_PRE_DECREMENT (mode
));
939 bool use_postinc
= (m_is_load
940 ? USE_LOAD_POST_INCREMENT (mode
)
941 : USE_STORE_POST_INCREMENT (mode
));
942 machine_mode addr_mode
= get_address_mode (m_obj
);
944 if (use_predec
&& reverse
)
946 m_addr
= copy_to_mode_reg (addr_mode
,
947 plus_constant (addr_mode
,
952 else if (use_postinc
&& !reverse
)
954 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
958 else if (CONSTANT_P (m_addr
))
959 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
962 /* Adjust the address to refer to the data at OFFSET in MODE. If we
963 are using autoincrement for this address, we don't add the offset,
964 but we still modify the MEM's properties. */
967 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
970 return m_constfn (m_cfndata
, offset
, mode
);
971 if (m_obj
== NULL_RTX
)
974 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
976 return adjust_address (m_obj
, mode
, offset
);
979 /* Emit an add instruction to increment the address by SIZE. */
982 pieces_addr::increment_address (HOST_WIDE_INT size
)
984 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
985 emit_insn (gen_add2_insn (m_addr
, amount
));
988 /* If we are supposed to decrement the address after each access, emit code
989 to do so now. Increment by SIZE (which has should have the correct sign
993 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
995 if (m_explicit_inc
>= 0)
997 gcc_assert (HAVE_PRE_DECREMENT
);
998 increment_address (size
);
1001 /* If we are supposed to decrement the address after each access, emit code
1002 to do so now. Increment by SIZE. */
1005 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1007 if (m_explicit_inc
<= 0)
1009 gcc_assert (HAVE_POST_INCREMENT
);
1010 increment_address (size
);
1013 /* This structure is used by do_op_by_pieces to describe the operation
1016 class op_by_pieces_d
1019 pieces_addr m_to
, m_from
;
1020 unsigned HOST_WIDE_INT m_len
;
1021 HOST_WIDE_INT m_offset
;
1022 unsigned int m_align
;
1023 unsigned int m_max_size
;
1026 /* Virtual functions, overriden by derived classes for the specific
1028 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1029 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1030 virtual void finish_mode (machine_mode
)
1035 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1036 unsigned HOST_WIDE_INT
, unsigned int);
1040 /* The constructor for an op_by_pieces_d structure. We require two
1041 objects named TO and FROM, which are identified as loads or stores
1042 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1043 and its associated FROM_CFN_DATA can be used to replace loads with
1044 constant values. LEN describes the length of the operation. */
1046 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1047 rtx from
, bool from_load
,
1048 by_pieces_constfn from_cfn
,
1049 void *from_cfn_data
,
1050 unsigned HOST_WIDE_INT len
,
1052 : m_to (to
, to_load
, NULL
, NULL
),
1053 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1054 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1056 int toi
= m_to
.get_addr_inc ();
1057 int fromi
= m_from
.get_addr_inc ();
1058 if (toi
>= 0 && fromi
>= 0)
1060 else if (toi
<= 0 && fromi
<= 0)
1065 m_offset
= m_reverse
? len
: 0;
1066 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1067 from
? MEM_ALIGN (from
) : align
);
1069 /* If copying requires more than two move insns,
1070 copy addresses to registers (to make displacements shorter)
1071 and use post-increment if available. */
1072 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1074 /* Find the mode of the largest comparison. */
1075 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1077 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1078 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1081 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1085 /* This function contains the main loop used for expanding a block
1086 operation. First move what we can in the largest integer mode,
1087 then go to successively smaller modes. For every access, call
1088 GENFUN with the two operands and the EXTRA_DATA. */
1091 op_by_pieces_d::run ()
1093 while (m_max_size
> 1 && m_len
> 0)
1095 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1097 if (prepare_mode (mode
, m_align
))
1099 unsigned int size
= GET_MODE_SIZE (mode
);
1100 rtx to1
= NULL_RTX
, from1
;
1102 while (m_len
>= size
)
1107 to1
= m_to
.adjust (mode
, m_offset
);
1108 from1
= m_from
.adjust (mode
, m_offset
);
1110 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1111 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1113 generate (to1
, from1
, mode
);
1115 m_to
.maybe_postinc (size
);
1116 m_from
.maybe_postinc (size
);
1127 m_max_size
= GET_MODE_SIZE (mode
);
1130 /* The code above should have handled everything. */
1131 gcc_assert (!m_len
);
1134 /* Derived class from op_by_pieces_d, providing support for block move
1137 class move_by_pieces_d
: public op_by_pieces_d
1139 insn_gen_fn m_gen_fun
;
1140 void generate (rtx
, rtx
, machine_mode
);
1141 bool prepare_mode (machine_mode
, unsigned int);
1144 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1146 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1149 rtx
finish_retmode (memop_ret
);
1152 /* Return true if MODE can be used for a set of copies, given an
1153 alignment ALIGN. Prepare whatever data is necessary for later
1154 calls to generate. */
1157 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1159 insn_code icode
= optab_handler (mov_optab
, mode
);
1160 m_gen_fun
= GEN_FCN (icode
);
1161 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1164 /* A callback used when iterating for a compare_by_pieces_operation.
1165 OP0 and OP1 are the values that have been loaded and should be
1166 compared in MODE. If OP0 is NULL, this means we should generate a
1167 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1168 gen function that should be used to generate the mode. */
1171 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1172 machine_mode mode ATTRIBUTE_UNUSED
)
1174 #ifdef PUSH_ROUNDING
1175 if (op0
== NULL_RTX
)
1177 emit_single_push_insn (mode
, op1
, NULL
);
1181 emit_insn (m_gen_fun (op0
, op1
));
1184 /* Perform the final adjustment at the end of a string to obtain the
1185 correct return value for the block operation.
1186 Return value is based on RETMODE argument. */
1189 move_by_pieces_d::finish_retmode (memop_ret retmode
)
1191 gcc_assert (!m_reverse
);
1192 if (retmode
== RETURN_END_MINUS_ONE
)
1194 m_to
.maybe_postinc (-1);
1197 return m_to
.adjust (QImode
, m_offset
);
1200 /* Generate several move instructions to copy LEN bytes from block FROM to
1201 block TO. (These are MEM rtx's with BLKmode).
1203 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1204 used to push FROM to the stack.
1206 ALIGN is maximum stack alignment we can assume.
1208 Return value is based on RETMODE argument. */
1211 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1212 unsigned int align
, memop_ret retmode
)
1214 #ifndef PUSH_ROUNDING
1219 move_by_pieces_d
data (to
, from
, len
, align
);
1223 if (retmode
!= RETURN_BEGIN
)
1224 return data
.finish_retmode (retmode
);
1229 /* Derived class from op_by_pieces_d, providing support for block move
1232 class store_by_pieces_d
: public op_by_pieces_d
1234 insn_gen_fn m_gen_fun
;
1235 void generate (rtx
, rtx
, machine_mode
);
1236 bool prepare_mode (machine_mode
, unsigned int);
1239 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1240 unsigned HOST_WIDE_INT len
, unsigned int align
)
1241 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1244 rtx
finish_retmode (memop_ret
);
1247 /* Return true if MODE can be used for a set of stores, given an
1248 alignment ALIGN. Prepare whatever data is necessary for later
1249 calls to generate. */
1252 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1254 insn_code icode
= optab_handler (mov_optab
, mode
);
1255 m_gen_fun
= GEN_FCN (icode
);
1256 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1259 /* A callback used when iterating for a store_by_pieces_operation.
1260 OP0 and OP1 are the values that have been loaded and should be
1261 compared in MODE. If OP0 is NULL, this means we should generate a
1262 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1263 gen function that should be used to generate the mode. */
1266 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1268 emit_insn (m_gen_fun (op0
, op1
));
1271 /* Perform the final adjustment at the end of a string to obtain the
1272 correct return value for the block operation.
1273 Return value is based on RETMODE argument. */
1276 store_by_pieces_d::finish_retmode (memop_ret retmode
)
1278 gcc_assert (!m_reverse
);
1279 if (retmode
== RETURN_END_MINUS_ONE
)
1281 m_to
.maybe_postinc (-1);
1284 return m_to
.adjust (QImode
, m_offset
);
1287 /* Determine whether the LEN bytes generated by CONSTFUN can be
1288 stored to memory using several move instructions. CONSTFUNDATA is
1289 a pointer which will be passed as argument in every CONSTFUN call.
1290 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1291 a memset operation and false if it's a copy of a constant string.
1292 Return nonzero if a call to store_by_pieces should succeed. */
1295 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1296 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1297 void *constfundata
, unsigned int align
, bool memsetp
)
1299 unsigned HOST_WIDE_INT l
;
1300 unsigned int max_size
;
1301 HOST_WIDE_INT offset
= 0;
1302 enum insn_code icode
;
1304 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1305 rtx cst ATTRIBUTE_UNUSED
;
1310 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1314 optimize_insn_for_speed_p ()))
1317 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1319 /* We would first store what we can in the largest integer mode, then go to
1320 successively smaller modes. */
1323 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1327 max_size
= STORE_MAX_PIECES
+ 1;
1328 while (max_size
> 1 && l
> 0)
1330 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1332 icode
= optab_handler (mov_optab
, mode
);
1333 if (icode
!= CODE_FOR_nothing
1334 && align
>= GET_MODE_ALIGNMENT (mode
))
1336 unsigned int size
= GET_MODE_SIZE (mode
);
1343 cst
= (*constfun
) (constfundata
, offset
, mode
);
1344 if (!targetm
.legitimate_constant_p (mode
, cst
))
1354 max_size
= GET_MODE_SIZE (mode
);
1357 /* The code above should have handled everything. */
1364 /* Generate several move instructions to store LEN bytes generated by
1365 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1366 pointer which will be passed as argument in every CONSTFUN call.
1367 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1368 a memset operation and false if it's a copy of a constant string.
1369 Return value is based on RETMODE argument. */
1372 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1373 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1374 void *constfundata
, unsigned int align
, bool memsetp
,
1379 gcc_assert (retmode
!= RETURN_END_MINUS_ONE
);
1383 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1385 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1386 optimize_insn_for_speed_p ()));
1388 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1391 if (retmode
!= RETURN_BEGIN
)
1392 return data
.finish_retmode (retmode
);
1397 /* Callback routine for clear_by_pieces.
1398 Return const0_rtx unconditionally. */
1401 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1406 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1407 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1410 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1415 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1419 /* Context used by compare_by_pieces_genfn. It stores the fail label
1420 to jump to in case of miscomparison, and for branch ratios greater than 1,
1421 it stores an accumulator and the current and maximum counts before
1422 emitting another branch. */
1424 class compare_by_pieces_d
: public op_by_pieces_d
1426 rtx_code_label
*m_fail_label
;
1428 int m_count
, m_batch
;
1430 void generate (rtx
, rtx
, machine_mode
);
1431 bool prepare_mode (machine_mode
, unsigned int);
1432 void finish_mode (machine_mode
);
1434 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1435 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1436 rtx_code_label
*fail_label
)
1437 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1439 m_fail_label
= fail_label
;
1443 /* A callback used when iterating for a compare_by_pieces_operation.
1444 OP0 and OP1 are the values that have been loaded and should be
1445 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1446 context structure. */
1449 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1453 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1454 true, OPTAB_LIB_WIDEN
);
1456 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1457 true, OPTAB_LIB_WIDEN
);
1458 m_accumulator
= temp
;
1460 if (++m_count
< m_batch
)
1464 op0
= m_accumulator
;
1466 m_accumulator
= NULL_RTX
;
1468 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1469 m_fail_label
, profile_probability::uninitialized ());
1472 /* Return true if MODE can be used for a set of moves and comparisons,
1473 given an alignment ALIGN. Prepare whatever data is necessary for
1474 later calls to generate. */
1477 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1479 insn_code icode
= optab_handler (mov_optab
, mode
);
1480 if (icode
== CODE_FOR_nothing
1481 || align
< GET_MODE_ALIGNMENT (mode
)
1482 || !can_compare_p (EQ
, mode
, ccp_jump
))
1484 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1487 m_accumulator
= NULL_RTX
;
1492 /* Called after expanding a series of comparisons in MODE. If we have
1493 accumulated results for which we haven't emitted a branch yet, do
1497 compare_by_pieces_d::finish_mode (machine_mode mode
)
1499 if (m_accumulator
!= NULL_RTX
)
1500 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1501 NULL_RTX
, NULL
, m_fail_label
,
1502 profile_probability::uninitialized ());
1505 /* Generate several move instructions to compare LEN bytes from blocks
1506 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1508 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1509 used to push FROM to the stack.
1511 ALIGN is maximum stack alignment we can assume.
1513 Optionally, the caller can pass a constfn and associated data in A1_CFN
1514 and A1_CFN_DATA. describing that the second operand being compared is a
1515 known constant and how to obtain its data. */
1518 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1519 rtx target
, unsigned int align
,
1520 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1522 rtx_code_label
*fail_label
= gen_label_rtx ();
1523 rtx_code_label
*end_label
= gen_label_rtx ();
1525 if (target
== NULL_RTX
1526 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1527 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1529 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1534 emit_move_insn (target
, const0_rtx
);
1535 emit_jump (end_label
);
1537 emit_label (fail_label
);
1538 emit_move_insn (target
, const1_rtx
);
1539 emit_label (end_label
);
1544 /* Emit code to move a block Y to a block X. This may be done with
1545 string-move instructions, with multiple scalar move instructions,
1546 or with a library call.
1548 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1549 SIZE is an rtx that says how long they are.
1550 ALIGN is the maximum alignment we can assume they have.
1551 METHOD describes what kind of copy this is, and what mechanisms may be used.
1552 MIN_SIZE is the minimal size of block to move
1553 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1554 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1556 Return the address of the new block, if memcpy is called and returns it,
1560 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1561 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1562 unsigned HOST_WIDE_INT min_size
,
1563 unsigned HOST_WIDE_INT max_size
,
1564 unsigned HOST_WIDE_INT probable_max_size
,
1565 bool bail_out_libcall
, bool *is_move_done
,
1573 *is_move_done
= true;
1576 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1581 case BLOCK_OP_NORMAL
:
1582 case BLOCK_OP_TAILCALL
:
1586 case BLOCK_OP_CALL_PARM
:
1587 may_use_call
= block_move_libcall_safe_for_call_parm ();
1589 /* Make inhibit_defer_pop nonzero around the library call
1590 to force it to pop the arguments right away. */
1594 case BLOCK_OP_NO_LIBCALL
:
1598 case BLOCK_OP_NO_LIBCALL_RET
:
1606 gcc_assert (MEM_P (x
) && MEM_P (y
));
1607 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1608 gcc_assert (align
>= BITS_PER_UNIT
);
1610 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1611 block copy is more efficient for other large modes, e.g. DCmode. */
1612 x
= adjust_address (x
, BLKmode
, 0);
1613 y
= adjust_address (y
, BLKmode
, 0);
1615 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1616 can be incorrect is coming from __builtin_memcpy. */
1617 poly_int64 const_size
;
1618 if (poly_int_rtx_p (size
, &const_size
))
1620 x
= shallow_copy_rtx (x
);
1621 y
= shallow_copy_rtx (y
);
1622 set_mem_size (x
, const_size
);
1623 set_mem_size (y
, const_size
);
1626 bool pieces_ok
= CONST_INT_P (size
)
1627 && can_move_by_pieces (INTVAL (size
), align
);
1628 bool pattern_ok
= false;
1630 if (!pieces_ok
|| might_overlap
)
1633 = emit_block_move_via_pattern (x
, y
, size
, align
,
1634 expected_align
, expected_size
,
1635 min_size
, max_size
, probable_max_size
,
1637 if (!pattern_ok
&& might_overlap
)
1639 /* Do not try any of the other methods below as they are not safe
1640 for overlapping moves. */
1641 *is_move_done
= false;
1649 move_by_pieces (x
, y
, INTVAL (size
), align
, RETURN_BEGIN
);
1650 else if (may_use_call
&& !might_overlap
1651 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1652 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1654 if (bail_out_libcall
)
1657 *is_move_done
= false;
1661 if (may_use_call
< 0)
1664 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1665 method
== BLOCK_OP_TAILCALL
);
1667 else if (might_overlap
)
1668 *is_move_done
= false;
1670 emit_block_move_via_loop (x
, y
, size
, align
);
1672 if (method
== BLOCK_OP_CALL_PARM
)
1679 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1681 unsigned HOST_WIDE_INT max
, min
= 0;
1682 if (GET_CODE (size
) == CONST_INT
)
1683 min
= max
= UINTVAL (size
);
1685 max
= GET_MODE_MASK (GET_MODE (size
));
1686 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1690 /* A subroutine of emit_block_move. Returns true if calling the
1691 block move libcall will not clobber any parameters which may have
1692 already been placed on the stack. */
1695 block_move_libcall_safe_for_call_parm (void)
1699 /* If arguments are pushed on the stack, then they're safe. */
1703 /* If registers go on the stack anyway, any argument is sure to clobber
1704 an outgoing argument. */
1705 #if defined (REG_PARM_STACK_SPACE)
1706 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1707 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1708 depend on its argument. */
1710 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1711 && REG_PARM_STACK_SPACE (fn
) != 0)
1715 /* If any argument goes in memory, then it might clobber an outgoing
1718 CUMULATIVE_ARGS args_so_far_v
;
1719 cumulative_args_t args_so_far
;
1722 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1723 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1724 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1726 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1727 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1729 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1730 function_arg_info
arg_info (mode
, /*named=*/true);
1731 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, arg_info
);
1732 if (!tmp
|| !REG_P (tmp
))
1734 if (targetm
.calls
.arg_partial_bytes (args_so_far
, arg_info
))
1736 targetm
.calls
.function_arg_advance (args_so_far
, arg_info
);
1742 /* A subroutine of emit_block_move. Expand a cpymem or movmem pattern;
1743 return true if successful.
1745 X is the destination of the copy or move.
1746 Y is the source of the copy or move.
1747 SIZE is the size of the block to be moved.
1749 MIGHT_OVERLAP indicates this originated with expansion of a
1750 builtin_memmove() and the source and destination blocks may
1755 emit_block_move_via_pattern (rtx x
, rtx y
, rtx size
, unsigned int align
,
1756 unsigned int expected_align
,
1757 HOST_WIDE_INT expected_size
,
1758 unsigned HOST_WIDE_INT min_size
,
1759 unsigned HOST_WIDE_INT max_size
,
1760 unsigned HOST_WIDE_INT probable_max_size
,
1763 if (expected_align
< align
)
1764 expected_align
= align
;
1765 if (expected_size
!= -1)
1767 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1768 expected_size
= probable_max_size
;
1769 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1770 expected_size
= min_size
;
1773 /* Since this is a move insn, we don't care about volatility. */
1774 temporary_volatile_ok
v (true);
1776 /* Try the most limited insn first, because there's no point
1777 including more than one in the machine description unless
1778 the more limited one has some advantage. */
1780 opt_scalar_int_mode mode_iter
;
1781 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1783 scalar_int_mode mode
= mode_iter
.require ();
1784 enum insn_code code
;
1786 code
= direct_optab_handler (movmem_optab
, mode
);
1788 code
= direct_optab_handler (cpymem_optab
, mode
);
1790 if (code
!= CODE_FOR_nothing
1791 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1792 here because if SIZE is less than the mode mask, as it is
1793 returned by the macro, it will definitely be less than the
1794 actual mode mask. Since SIZE is within the Pmode address
1795 space, we limit MODE to Pmode. */
1796 && ((CONST_INT_P (size
)
1797 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1798 <= (GET_MODE_MASK (mode
) >> 1)))
1799 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1800 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1802 class expand_operand ops
[9];
1805 /* ??? When called via emit_block_move_for_call, it'd be
1806 nice if there were some way to inform the backend, so
1807 that it doesn't fail the expansion because it thinks
1808 emitting the libcall would be more efficient. */
1809 nops
= insn_data
[(int) code
].n_generator_args
;
1810 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1812 create_fixed_operand (&ops
[0], x
);
1813 create_fixed_operand (&ops
[1], y
);
1814 /* The check above guarantees that this size conversion is valid. */
1815 create_convert_operand_to (&ops
[2], size
, mode
, true);
1816 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1819 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1820 create_integer_operand (&ops
[5], expected_size
);
1824 create_integer_operand (&ops
[6], min_size
);
1825 /* If we cannot represent the maximal size,
1826 make parameter NULL. */
1827 if ((HOST_WIDE_INT
) max_size
!= -1)
1828 create_integer_operand (&ops
[7], max_size
);
1830 create_fixed_operand (&ops
[7], NULL
);
1834 /* If we cannot represent the maximal size,
1835 make parameter NULL. */
1836 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1837 create_integer_operand (&ops
[8], probable_max_size
);
1839 create_fixed_operand (&ops
[8], NULL
);
1841 if (maybe_expand_insn (code
, nops
, ops
))
1849 /* A subroutine of emit_block_move. Copy the data via an explicit
1850 loop. This is used only when libcalls are forbidden. */
1851 /* ??? It'd be nice to copy in hunks larger than QImode. */
1854 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1855 unsigned int align ATTRIBUTE_UNUSED
)
1857 rtx_code_label
*cmp_label
, *top_label
;
1858 rtx iter
, x_addr
, y_addr
, tmp
;
1859 machine_mode x_addr_mode
= get_address_mode (x
);
1860 machine_mode y_addr_mode
= get_address_mode (y
);
1861 machine_mode iter_mode
;
1863 iter_mode
= GET_MODE (size
);
1864 if (iter_mode
== VOIDmode
)
1865 iter_mode
= word_mode
;
1867 top_label
= gen_label_rtx ();
1868 cmp_label
= gen_label_rtx ();
1869 iter
= gen_reg_rtx (iter_mode
);
1871 emit_move_insn (iter
, const0_rtx
);
1873 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1874 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1875 do_pending_stack_adjust ();
1877 emit_jump (cmp_label
);
1878 emit_label (top_label
);
1880 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1881 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1883 if (x_addr_mode
!= y_addr_mode
)
1884 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1885 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1887 x
= change_address (x
, QImode
, x_addr
);
1888 y
= change_address (y
, QImode
, y_addr
);
1890 emit_move_insn (x
, y
);
1892 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1893 true, OPTAB_LIB_WIDEN
);
1895 emit_move_insn (iter
, tmp
);
1897 emit_label (cmp_label
);
1899 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1901 profile_probability::guessed_always ()
1902 .apply_scale (9, 10));
1905 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1906 TAILCALL is true if this is a tail call. */
1909 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1910 rtx size
, bool tailcall
)
1912 rtx dst_addr
, src_addr
;
1913 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1914 machine_mode size_mode
;
1916 /* Since dst and src are passed to a libcall, mark the corresponding
1917 tree EXPR as addressable. */
1918 tree dst_expr
= MEM_EXPR (dst
);
1919 tree src_expr
= MEM_EXPR (src
);
1921 mark_addressable (dst_expr
);
1923 mark_addressable (src_expr
);
1925 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1926 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1927 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1929 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1930 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1931 src_tree
= make_tree (ptr_type_node
, src_addr
);
1933 size_mode
= TYPE_MODE (sizetype
);
1934 size
= convert_to_mode (size_mode
, size
, 1);
1935 size
= copy_to_mode_reg (size_mode
, size
);
1936 size_tree
= make_tree (sizetype
, size
);
1938 /* It is incorrect to use the libcall calling conventions for calls to
1939 memcpy/memmove/memcmp because they can be provided by the user. */
1940 tree fn
= builtin_decl_implicit (fncode
);
1941 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1942 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1944 return expand_call (call_expr
, NULL_RTX
, false);
1947 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1948 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1949 otherwise return null. */
1952 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1953 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1954 HOST_WIDE_INT align
)
1956 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1958 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1961 class expand_operand ops
[5];
1962 create_output_operand (&ops
[0], target
, insn_mode
);
1963 create_fixed_operand (&ops
[1], arg1_rtx
);
1964 create_fixed_operand (&ops
[2], arg2_rtx
);
1965 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1966 TYPE_UNSIGNED (arg3_type
));
1967 create_integer_operand (&ops
[4], align
);
1968 if (maybe_expand_insn (icode
, 5, ops
))
1969 return ops
[0].value
;
1973 /* Expand a block compare between X and Y with length LEN using the
1974 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1975 of the expression that was used to calculate the length. ALIGN
1976 gives the known minimum common alignment. */
1979 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1982 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1983 implementing memcmp because it will stop if it encounters two
1985 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1987 if (icode
== CODE_FOR_nothing
)
1990 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1993 /* Emit code to compare a block Y to a block X. This may be done with
1994 string-compare instructions, with multiple scalar instructions,
1995 or with a library call.
1997 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1998 they are. LEN_TYPE is the type of the expression that was used to
2001 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
2002 value of a normal memcmp call, instead we can just compare for equality.
2003 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
2006 Optionally, the caller can pass a constfn and associated data in Y_CFN
2007 and Y_CFN_DATA. describing that the second operand being compared is a
2008 known constant and how to obtain its data.
2009 Return the result of the comparison, or NULL_RTX if we failed to
2010 perform the operation. */
2013 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2014 bool equality_only
, by_pieces_constfn y_cfn
,
2019 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
2022 gcc_assert (MEM_P (x
) && MEM_P (y
));
2023 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
2024 gcc_assert (align
>= BITS_PER_UNIT
);
2026 x
= adjust_address (x
, BLKmode
, 0);
2027 y
= adjust_address (y
, BLKmode
, 0);
2030 && CONST_INT_P (len
)
2031 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
2032 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
2035 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2040 /* Copy all or part of a value X into registers starting at REGNO.
2041 The number of registers to be filled is NREGS. */
2044 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2049 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2050 x
= validize_mem (force_const_mem (mode
, x
));
2052 /* See if the machine can do this with a load multiple insn. */
2053 if (targetm
.have_load_multiple ())
2055 rtx_insn
*last
= get_last_insn ();
2056 rtx first
= gen_rtx_REG (word_mode
, regno
);
2057 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2064 delete_insns_since (last
);
2067 for (int i
= 0; i
< nregs
; i
++)
2068 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2069 operand_subword_force (x
, i
, mode
));
2072 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2073 The number of registers to be filled is NREGS. */
2076 move_block_from_reg (int regno
, rtx x
, int nregs
)
2081 /* See if the machine can do this with a store multiple insn. */
2082 if (targetm
.have_store_multiple ())
2084 rtx_insn
*last
= get_last_insn ();
2085 rtx first
= gen_rtx_REG (word_mode
, regno
);
2086 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2093 delete_insns_since (last
);
2096 for (int i
= 0; i
< nregs
; i
++)
2098 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2102 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2106 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2107 ORIG, where ORIG is a non-consecutive group of registers represented by
2108 a PARALLEL. The clone is identical to the original except in that the
2109 original set of registers is replaced by a new set of pseudo registers.
2110 The new set has the same modes as the original set. */
2113 gen_group_rtx (rtx orig
)
2118 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2120 length
= XVECLEN (orig
, 0);
2121 tmps
= XALLOCAVEC (rtx
, length
);
2123 /* Skip a NULL entry in first slot. */
2124 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2129 for (; i
< length
; i
++)
2131 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2132 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2134 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2137 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2140 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2141 except that values are placed in TMPS[i], and must later be moved
2142 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2145 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2150 machine_mode m
= GET_MODE (orig_src
);
2152 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2155 && !SCALAR_INT_MODE_P (m
)
2156 && !MEM_P (orig_src
)
2157 && GET_CODE (orig_src
) != CONCAT
)
2159 scalar_int_mode imode
;
2160 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2162 src
= gen_reg_rtx (imode
);
2163 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2167 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2168 emit_move_insn (src
, orig_src
);
2170 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2174 /* Check for a NULL entry, used to indicate that the parameter goes
2175 both on the stack and in registers. */
2176 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2181 /* Process the pieces. */
2182 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2184 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2185 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2186 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2187 poly_int64 shift
= 0;
2189 /* Handle trailing fragments that run over the size of the struct.
2190 It's the target's responsibility to make sure that the fragment
2191 cannot be strictly smaller in some cases and strictly larger
2193 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2194 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2196 /* Arrange to shift the fragment to where it belongs.
2197 extract_bit_field loads to the lsb of the reg. */
2199 #ifdef BLOCK_REG_PADDING
2200 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2201 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2206 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2207 bytelen
= ssize
- bytepos
;
2208 gcc_assert (maybe_gt (bytelen
, 0));
2211 /* If we won't be loading directly from memory, protect the real source
2212 from strange tricks we might play; but make sure that the source can
2213 be loaded directly into the destination. */
2215 if (!MEM_P (orig_src
)
2216 && (!CONSTANT_P (orig_src
)
2217 || (GET_MODE (orig_src
) != mode
2218 && GET_MODE (orig_src
) != VOIDmode
)))
2220 if (GET_MODE (orig_src
) == VOIDmode
)
2221 src
= gen_reg_rtx (mode
);
2223 src
= gen_reg_rtx (GET_MODE (orig_src
));
2225 emit_move_insn (src
, orig_src
);
2228 /* Optimize the access just a bit. */
2230 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2231 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2232 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2233 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2235 tmps
[i
] = gen_reg_rtx (mode
);
2236 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2238 else if (COMPLEX_MODE_P (mode
)
2239 && GET_MODE (src
) == mode
2240 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2241 /* Let emit_move_complex do the bulk of the work. */
2243 else if (GET_CODE (src
) == CONCAT
)
2245 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2246 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2250 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2251 && known_le (subpos
+ bytelen
, slen0
))
2253 /* The following assumes that the concatenated objects all
2254 have the same size. In this case, a simple calculation
2255 can be used to determine the object and the bit field
2257 tmps
[i
] = XEXP (src
, elt
);
2258 if (maybe_ne (subpos
, 0)
2259 || maybe_ne (subpos
+ bytelen
, slen0
)
2260 || (!CONSTANT_P (tmps
[i
])
2261 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2262 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2263 subpos
* BITS_PER_UNIT
,
2264 1, NULL_RTX
, mode
, mode
, false,
2271 gcc_assert (known_eq (bytepos
, 0));
2272 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2273 emit_move_insn (mem
, src
);
2274 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2275 0, 1, NULL_RTX
, mode
, mode
, false,
2279 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2280 SIMD register, which is currently broken. While we get GCC
2281 to emit proper RTL for these cases, let's dump to memory. */
2282 else if (VECTOR_MODE_P (GET_MODE (dst
))
2285 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2288 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2289 emit_move_insn (mem
, src
);
2290 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2292 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2293 && XVECLEN (dst
, 0) > 1)
2294 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2295 else if (CONSTANT_P (src
))
2297 if (known_eq (bytelen
, ssize
))
2303 /* TODO: const_wide_int can have sizes other than this... */
2304 gcc_assert (known_eq (2 * bytelen
, ssize
));
2305 split_double (src
, &first
, &second
);
2312 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2315 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2316 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2317 mode
, mode
, false, NULL
);
2319 if (maybe_ne (shift
, 0))
2320 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2325 /* Emit code to move a block SRC of type TYPE to a block DST,
2326 where DST is non-consecutive registers represented by a PARALLEL.
2327 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2331 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2336 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2337 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2339 /* Copy the extracted pieces into the proper (probable) hard regs. */
2340 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2342 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2345 emit_move_insn (d
, tmps
[i
]);
2349 /* Similar, but load SRC into new pseudos in a format that looks like
2350 PARALLEL. This can later be fed to emit_group_move to get things
2351 in the right place. */
2354 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2359 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2360 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2362 /* Convert the vector to look just like the original PARALLEL, except
2363 with the computed values. */
2364 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2366 rtx e
= XVECEXP (parallel
, 0, i
);
2367 rtx d
= XEXP (e
, 0);
2371 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2372 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2374 RTVEC_ELT (vec
, i
) = e
;
2377 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2380 /* Emit code to move a block SRC to block DST, where SRC and DST are
2381 non-consecutive groups of registers, each represented by a PARALLEL. */
2384 emit_group_move (rtx dst
, rtx src
)
2388 gcc_assert (GET_CODE (src
) == PARALLEL
2389 && GET_CODE (dst
) == PARALLEL
2390 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2392 /* Skip first entry if NULL. */
2393 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2394 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2395 XEXP (XVECEXP (src
, 0, i
), 0));
2398 /* Move a group of registers represented by a PARALLEL into pseudos. */
2401 emit_group_move_into_temps (rtx src
)
2403 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2406 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2408 rtx e
= XVECEXP (src
, 0, i
);
2409 rtx d
= XEXP (e
, 0);
2412 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2413 RTVEC_ELT (vec
, i
) = e
;
2416 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2419 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2420 where SRC is non-consecutive registers represented by a PARALLEL.
2421 SSIZE represents the total size of block ORIG_DST, or -1 if not
2425 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2429 int start
, finish
, i
;
2430 machine_mode m
= GET_MODE (orig_dst
);
2432 gcc_assert (GET_CODE (src
) == PARALLEL
);
2434 if (!SCALAR_INT_MODE_P (m
)
2435 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2437 scalar_int_mode imode
;
2438 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2440 dst
= gen_reg_rtx (imode
);
2441 emit_group_store (dst
, src
, type
, ssize
);
2442 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2446 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2447 emit_group_store (dst
, src
, type
, ssize
);
2449 emit_move_insn (orig_dst
, dst
);
2453 /* Check for a NULL entry, used to indicate that the parameter goes
2454 both on the stack and in registers. */
2455 if (XEXP (XVECEXP (src
, 0, 0), 0))
2459 finish
= XVECLEN (src
, 0);
2461 tmps
= XALLOCAVEC (rtx
, finish
);
2463 /* Copy the (probable) hard regs into pseudos. */
2464 for (i
= start
; i
< finish
; i
++)
2466 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2467 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2469 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2470 emit_move_insn (tmps
[i
], reg
);
2476 /* If we won't be storing directly into memory, protect the real destination
2477 from strange tricks we might play. */
2479 if (GET_CODE (dst
) == PARALLEL
)
2483 /* We can get a PARALLEL dst if there is a conditional expression in
2484 a return statement. In that case, the dst and src are the same,
2485 so no action is necessary. */
2486 if (rtx_equal_p (dst
, src
))
2489 /* It is unclear if we can ever reach here, but we may as well handle
2490 it. Allocate a temporary, and split this into a store/load to/from
2492 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2493 emit_group_store (temp
, src
, type
, ssize
);
2494 emit_group_load (dst
, temp
, type
, ssize
);
2497 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2499 machine_mode outer
= GET_MODE (dst
);
2505 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2506 dst
= gen_reg_rtx (outer
);
2508 /* Make life a bit easier for combine. */
2509 /* If the first element of the vector is the low part
2510 of the destination mode, use a paradoxical subreg to
2511 initialize the destination. */
2514 inner
= GET_MODE (tmps
[start
]);
2515 bytepos
= subreg_lowpart_offset (inner
, outer
);
2516 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2519 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2523 emit_move_insn (dst
, temp
);
2530 /* If the first element wasn't the low part, try the last. */
2532 && start
< finish
- 1)
2534 inner
= GET_MODE (tmps
[finish
- 1]);
2535 bytepos
= subreg_lowpart_offset (inner
, outer
);
2536 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2540 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2544 emit_move_insn (dst
, temp
);
2551 /* Otherwise, simply initialize the result to zero. */
2553 emit_move_insn (dst
, CONST0_RTX (outer
));
2556 /* Process the pieces. */
2557 for (i
= start
; i
< finish
; i
++)
2559 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2560 machine_mode mode
= GET_MODE (tmps
[i
]);
2561 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2562 poly_uint64 adj_bytelen
;
2565 /* Handle trailing fragments that run over the size of the struct.
2566 It's the target's responsibility to make sure that the fragment
2567 cannot be strictly smaller in some cases and strictly larger
2569 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2570 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2571 adj_bytelen
= ssize
- bytepos
;
2573 adj_bytelen
= bytelen
;
2575 if (GET_CODE (dst
) == CONCAT
)
2577 if (known_le (bytepos
+ adj_bytelen
,
2578 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2579 dest
= XEXP (dst
, 0);
2580 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2582 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2583 dest
= XEXP (dst
, 1);
2587 machine_mode dest_mode
= GET_MODE (dest
);
2588 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2590 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2592 if (GET_MODE_ALIGNMENT (dest_mode
)
2593 >= GET_MODE_ALIGNMENT (tmp_mode
))
2595 dest
= assign_stack_temp (dest_mode
,
2596 GET_MODE_SIZE (dest_mode
));
2597 emit_move_insn (adjust_address (dest
,
2605 dest
= assign_stack_temp (tmp_mode
,
2606 GET_MODE_SIZE (tmp_mode
));
2607 emit_move_insn (dest
, tmps
[i
]);
2608 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2614 /* Handle trailing fragments that run over the size of the struct. */
2615 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2617 /* store_bit_field always takes its value from the lsb.
2618 Move the fragment to the lsb if it's not already there. */
2620 #ifdef BLOCK_REG_PADDING
2621 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2622 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2628 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2629 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2633 /* Make sure not to write past the end of the struct. */
2634 store_bit_field (dest
,
2635 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2636 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2637 VOIDmode
, tmps
[i
], false);
2640 /* Optimize the access just a bit. */
2641 else if (MEM_P (dest
)
2642 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2643 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2644 && multiple_p (bytepos
* BITS_PER_UNIT
,
2645 GET_MODE_ALIGNMENT (mode
))
2646 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2647 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2650 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2651 0, 0, mode
, tmps
[i
], false);
2654 /* Copy from the pseudo into the (probable) hard reg. */
2655 if (orig_dst
!= dst
)
2656 emit_move_insn (orig_dst
, dst
);
2659 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2660 of the value stored in X. */
2663 maybe_emit_group_store (rtx x
, tree type
)
2665 machine_mode mode
= TYPE_MODE (type
);
2666 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2667 if (GET_CODE (x
) == PARALLEL
)
2669 rtx result
= gen_reg_rtx (mode
);
2670 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2676 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2678 This is used on targets that return BLKmode values in registers. */
2681 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2683 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2684 rtx src
= NULL
, dst
= NULL
;
2685 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2686 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2687 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2688 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2689 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2690 fixed_size_mode copy_mode
;
2692 /* BLKmode registers created in the back-end shouldn't have survived. */
2693 gcc_assert (mode
!= BLKmode
);
2695 /* If the structure doesn't take up a whole number of words, see whether
2696 SRCREG is padded on the left or on the right. If it's on the left,
2697 set PADDING_CORRECTION to the number of bits to skip.
2699 In most ABIs, the structure will be returned at the least end of
2700 the register, which translates to right padding on little-endian
2701 targets and left padding on big-endian targets. The opposite
2702 holds if the structure is returned at the most significant
2703 end of the register. */
2704 if (bytes
% UNITS_PER_WORD
!= 0
2705 && (targetm
.calls
.return_in_msb (type
)
2707 : BYTES_BIG_ENDIAN
))
2709 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2711 /* We can use a single move if we have an exact mode for the size. */
2712 else if (MEM_P (target
)
2713 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2714 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2715 && bytes
== GET_MODE_SIZE (mode
))
2717 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2721 /* And if we additionally have the same mode for a register. */
2722 else if (REG_P (target
)
2723 && GET_MODE (target
) == mode
2724 && bytes
== GET_MODE_SIZE (mode
))
2726 emit_move_insn (target
, srcreg
);
2730 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2731 into a new pseudo which is a full word. */
2732 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2734 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2738 /* Copy the structure BITSIZE bits at a time. If the target lives in
2739 memory, take care of not reading/writing past its end by selecting
2740 a copy mode suited to BITSIZE. This should always be possible given
2743 If the target lives in register, make sure not to select a copy mode
2744 larger than the mode of the register.
2746 We could probably emit more efficient code for machines which do not use
2747 strict alignment, but it doesn't seem worth the effort at the current
2750 copy_mode
= word_mode
;
2753 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2754 if (mem_mode
.exists ())
2755 copy_mode
= mem_mode
.require ();
2757 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2760 for (bitpos
= 0, xbitpos
= padding_correction
;
2761 bitpos
< bytes
* BITS_PER_UNIT
;
2762 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2764 /* We need a new source operand each time xbitpos is on a
2765 word boundary and when xbitpos == padding_correction
2766 (the first time through). */
2767 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2768 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2770 /* We need a new destination operand each time bitpos is on
2772 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2774 else if (bitpos
% BITS_PER_WORD
== 0)
2775 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2777 /* Use xbitpos for the source extraction (right justified) and
2778 bitpos for the destination store (left justified). */
2779 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2780 extract_bit_field (src
, bitsize
,
2781 xbitpos
% BITS_PER_WORD
, 1,
2782 NULL_RTX
, copy_mode
, copy_mode
,
2788 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2789 register if it contains any data, otherwise return null.
2791 This is used on targets that return BLKmode values in registers. */
2794 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2797 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2798 unsigned int bitsize
;
2799 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2800 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2801 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2802 fixed_size_mode dst_mode
;
2803 scalar_int_mode min_mode
;
2805 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2807 x
= expand_normal (src
);
2809 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2813 /* If the structure doesn't take up a whole number of words, see
2814 whether the register value should be padded on the left or on
2815 the right. Set PADDING_CORRECTION to the number of padding
2816 bits needed on the left side.
2818 In most ABIs, the structure will be returned at the least end of
2819 the register, which translates to right padding on little-endian
2820 targets and left padding on big-endian targets. The opposite
2821 holds if the structure is returned at the most significant
2822 end of the register. */
2823 if (bytes
% UNITS_PER_WORD
!= 0
2824 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2826 : BYTES_BIG_ENDIAN
))
2827 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2830 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2831 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2832 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2833 min_mode
= smallest_int_mode_for_size (bitsize
);
2835 /* Copy the structure BITSIZE bits at a time. */
2836 for (bitpos
= 0, xbitpos
= padding_correction
;
2837 bitpos
< bytes
* BITS_PER_UNIT
;
2838 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2840 /* We need a new destination pseudo each time xbitpos is
2841 on a word boundary and when xbitpos == padding_correction
2842 (the first time through). */
2843 if (xbitpos
% BITS_PER_WORD
== 0
2844 || xbitpos
== padding_correction
)
2846 /* Generate an appropriate register. */
2847 dst_word
= gen_reg_rtx (word_mode
);
2848 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2850 /* Clear the destination before we move anything into it. */
2851 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2854 /* Find the largest integer mode that can be used to copy all or as
2855 many bits as possible of the structure if the target supports larger
2856 copies. There are too many corner cases here w.r.t to alignments on
2857 the read/writes. So if there is any padding just use single byte
2859 opt_scalar_int_mode mode_iter
;
2860 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
2862 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
2864 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
2865 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
2866 && msize
<= BITS_PER_WORD
)
2873 /* We need a new source operand each time bitpos is on a word
2875 if (bitpos
% BITS_PER_WORD
== 0)
2876 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2878 /* Use bitpos for the source extraction (left justified) and
2879 xbitpos for the destination store (right justified). */
2880 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2882 extract_bit_field (src_word
, bitsize
,
2883 bitpos
% BITS_PER_WORD
, 1,
2884 NULL_RTX
, word_mode
, word_mode
,
2889 if (mode
== BLKmode
)
2891 /* Find the smallest integer mode large enough to hold the
2892 entire structure. */
2893 opt_scalar_int_mode mode_iter
;
2894 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2895 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2898 /* A suitable mode should have been found. */
2899 mode
= mode_iter
.require ();
2902 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2903 dst_mode
= word_mode
;
2906 dst
= gen_reg_rtx (dst_mode
);
2908 for (i
= 0; i
< n_regs
; i
++)
2909 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2911 if (mode
!= dst_mode
)
2912 dst
= gen_lowpart (mode
, dst
);
2917 /* Add a USE expression for REG to the (possibly empty) list pointed
2918 to by CALL_FUSAGE. REG must denote a hard register. */
2921 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2923 gcc_assert (REG_P (reg
));
2925 if (!HARD_REGISTER_P (reg
))
2929 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2932 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2933 to by CALL_FUSAGE. REG must denote a hard register. */
2936 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2938 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2941 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2944 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2945 starting at REGNO. All of these registers must be hard registers. */
2948 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2952 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2954 for (i
= 0; i
< nregs
; i
++)
2955 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2958 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2959 PARALLEL REGS. This is for calls that pass values in multiple
2960 non-contiguous locations. The Irix 6 ABI has examples of this. */
2963 use_group_regs (rtx
*call_fusage
, rtx regs
)
2967 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2969 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2971 /* A NULL entry means the parameter goes both on the stack and in
2972 registers. This can also be a MEM for targets that pass values
2973 partially on the stack and partially in registers. */
2974 if (reg
!= 0 && REG_P (reg
))
2975 use_reg (call_fusage
, reg
);
2979 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2980 assigment and the code of the expresion on the RHS is CODE. Return
2984 get_def_for_expr (tree name
, enum tree_code code
)
2988 if (TREE_CODE (name
) != SSA_NAME
)
2991 def_stmt
= get_gimple_for_ssa_name (name
);
2993 || gimple_assign_rhs_code (def_stmt
) != code
)
2999 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3000 assigment and the class of the expresion on the RHS is CLASS. Return
3004 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
3008 if (TREE_CODE (name
) != SSA_NAME
)
3011 def_stmt
= get_gimple_for_ssa_name (name
);
3013 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
3019 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
3020 its length in bytes. */
3023 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
3024 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3025 unsigned HOST_WIDE_INT min_size
,
3026 unsigned HOST_WIDE_INT max_size
,
3027 unsigned HOST_WIDE_INT probable_max_size
)
3029 machine_mode mode
= GET_MODE (object
);
3032 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
3034 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3035 just move a zero. Otherwise, do this a piece at a time. */
3036 poly_int64 size_val
;
3038 && poly_int_rtx_p (size
, &size_val
)
3039 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3041 rtx zero
= CONST0_RTX (mode
);
3044 emit_move_insn (object
, zero
);
3048 if (COMPLEX_MODE_P (mode
))
3050 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3053 write_complex_part (object
, zero
, 0);
3054 write_complex_part (object
, zero
, 1);
3060 if (size
== const0_rtx
)
3063 align
= MEM_ALIGN (object
);
3065 if (CONST_INT_P (size
)
3066 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3068 optimize_insn_for_speed_p ()))
3069 clear_by_pieces (object
, INTVAL (size
), align
);
3070 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3071 expected_align
, expected_size
,
3072 min_size
, max_size
, probable_max_size
))
3074 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3075 return set_storage_via_libcall (object
, size
, const0_rtx
,
3076 method
== BLOCK_OP_TAILCALL
);
3084 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3086 unsigned HOST_WIDE_INT max
, min
= 0;
3087 if (GET_CODE (size
) == CONST_INT
)
3088 min
= max
= UINTVAL (size
);
3090 max
= GET_MODE_MASK (GET_MODE (size
));
3091 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3095 /* A subroutine of clear_storage. Expand a call to memset.
3096 Return the return value of memset, 0 otherwise. */
3099 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3101 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3102 machine_mode size_mode
;
3104 object
= copy_addr_to_reg (XEXP (object
, 0));
3105 object_tree
= make_tree (ptr_type_node
, object
);
3107 if (!CONST_INT_P (val
))
3108 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3109 val_tree
= make_tree (integer_type_node
, val
);
3111 size_mode
= TYPE_MODE (sizetype
);
3112 size
= convert_to_mode (size_mode
, size
, 1);
3113 size
= copy_to_mode_reg (size_mode
, size
);
3114 size_tree
= make_tree (sizetype
, size
);
3116 /* It is incorrect to use the libcall calling conventions for calls to
3117 memset because it can be provided by the user. */
3118 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3119 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3120 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3122 return expand_call (call_expr
, NULL_RTX
, false);
3125 /* Expand a setmem pattern; return true if successful. */
3128 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3129 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3130 unsigned HOST_WIDE_INT min_size
,
3131 unsigned HOST_WIDE_INT max_size
,
3132 unsigned HOST_WIDE_INT probable_max_size
)
3134 /* Try the most limited insn first, because there's no point
3135 including more than one in the machine description unless
3136 the more limited one has some advantage. */
3138 if (expected_align
< align
)
3139 expected_align
= align
;
3140 if (expected_size
!= -1)
3142 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3143 expected_size
= max_size
;
3144 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3145 expected_size
= min_size
;
3148 opt_scalar_int_mode mode_iter
;
3149 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3151 scalar_int_mode mode
= mode_iter
.require ();
3152 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3154 if (code
!= CODE_FOR_nothing
3155 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3156 here because if SIZE is less than the mode mask, as it is
3157 returned by the macro, it will definitely be less than the
3158 actual mode mask. Since SIZE is within the Pmode address
3159 space, we limit MODE to Pmode. */
3160 && ((CONST_INT_P (size
)
3161 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3162 <= (GET_MODE_MASK (mode
) >> 1)))
3163 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3164 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3166 class expand_operand ops
[9];
3169 nops
= insn_data
[(int) code
].n_generator_args
;
3170 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3172 create_fixed_operand (&ops
[0], object
);
3173 /* The check above guarantees that this size conversion is valid. */
3174 create_convert_operand_to (&ops
[1], size
, mode
, true);
3175 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3176 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3179 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3180 create_integer_operand (&ops
[5], expected_size
);
3184 create_integer_operand (&ops
[6], min_size
);
3185 /* If we cannot represent the maximal size,
3186 make parameter NULL. */
3187 if ((HOST_WIDE_INT
) max_size
!= -1)
3188 create_integer_operand (&ops
[7], max_size
);
3190 create_fixed_operand (&ops
[7], NULL
);
3194 /* If we cannot represent the maximal size,
3195 make parameter NULL. */
3196 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3197 create_integer_operand (&ops
[8], probable_max_size
);
3199 create_fixed_operand (&ops
[8], NULL
);
3201 if (maybe_expand_insn (code
, nops
, ops
))
3210 /* Write to one of the components of the complex value CPLX. Write VAL to
3211 the real part if IMAG_P is false, and the imaginary part if its true. */
3214 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3220 if (GET_CODE (cplx
) == CONCAT
)
3222 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3226 cmode
= GET_MODE (cplx
);
3227 imode
= GET_MODE_INNER (cmode
);
3228 ibitsize
= GET_MODE_BITSIZE (imode
);
3230 /* For MEMs simplify_gen_subreg may generate an invalid new address
3231 because, e.g., the original address is considered mode-dependent
3232 by the target, which restricts simplify_subreg from invoking
3233 adjust_address_nv. Instead of preparing fallback support for an
3234 invalid address, we call adjust_address_nv directly. */
3237 emit_move_insn (adjust_address_nv (cplx
, imode
,
3238 imag_p
? GET_MODE_SIZE (imode
) : 0),
3243 /* If the sub-object is at least word sized, then we know that subregging
3244 will work. This special case is important, since store_bit_field
3245 wants to operate on integer modes, and there's rarely an OImode to
3246 correspond to TCmode. */
3247 if (ibitsize
>= BITS_PER_WORD
3248 /* For hard regs we have exact predicates. Assume we can split
3249 the original object if it spans an even number of hard regs.
3250 This special case is important for SCmode on 64-bit platforms
3251 where the natural size of floating-point regs is 32-bit. */
3253 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3254 && REG_NREGS (cplx
) % 2 == 0))
3256 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3257 imag_p
? GET_MODE_SIZE (imode
) : 0);
3260 emit_move_insn (part
, val
);
3264 /* simplify_gen_subreg may fail for sub-word MEMs. */
3265 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3268 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3272 /* Extract one of the components of the complex value CPLX. Extract the
3273 real part if IMAG_P is false, and the imaginary part if it's true. */
3276 read_complex_part (rtx cplx
, bool imag_p
)
3282 if (GET_CODE (cplx
) == CONCAT
)
3283 return XEXP (cplx
, imag_p
);
3285 cmode
= GET_MODE (cplx
);
3286 imode
= GET_MODE_INNER (cmode
);
3287 ibitsize
= GET_MODE_BITSIZE (imode
);
3289 /* Special case reads from complex constants that got spilled to memory. */
3290 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3292 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3293 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3295 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3296 if (CONSTANT_CLASS_P (part
))
3297 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3301 /* For MEMs simplify_gen_subreg may generate an invalid new address
3302 because, e.g., the original address is considered mode-dependent
3303 by the target, which restricts simplify_subreg from invoking
3304 adjust_address_nv. Instead of preparing fallback support for an
3305 invalid address, we call adjust_address_nv directly. */
3307 return adjust_address_nv (cplx
, imode
,
3308 imag_p
? GET_MODE_SIZE (imode
) : 0);
3310 /* If the sub-object is at least word sized, then we know that subregging
3311 will work. This special case is important, since extract_bit_field
3312 wants to operate on integer modes, and there's rarely an OImode to
3313 correspond to TCmode. */
3314 if (ibitsize
>= BITS_PER_WORD
3315 /* For hard regs we have exact predicates. Assume we can split
3316 the original object if it spans an even number of hard regs.
3317 This special case is important for SCmode on 64-bit platforms
3318 where the natural size of floating-point regs is 32-bit. */
3320 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3321 && REG_NREGS (cplx
) % 2 == 0))
3323 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3324 imag_p
? GET_MODE_SIZE (imode
) : 0);
3328 /* simplify_gen_subreg may fail for sub-word MEMs. */
3329 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3332 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3333 true, NULL_RTX
, imode
, imode
, false, NULL
);
3336 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3337 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3338 represented in NEW_MODE. If FORCE is true, this will never happen, as
3339 we'll force-create a SUBREG if needed. */
3342 emit_move_change_mode (machine_mode new_mode
,
3343 machine_mode old_mode
, rtx x
, bool force
)
3347 if (push_operand (x
, GET_MODE (x
)))
3349 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3350 MEM_COPY_ATTRIBUTES (ret
, x
);
3354 /* We don't have to worry about changing the address since the
3355 size in bytes is supposed to be the same. */
3356 if (reload_in_progress
)
3358 /* Copy the MEM to change the mode and move any
3359 substitutions from the old MEM to the new one. */
3360 ret
= adjust_address_nv (x
, new_mode
, 0);
3361 copy_replacements (x
, ret
);
3364 ret
= adjust_address (x
, new_mode
, 0);
3368 /* Note that we do want simplify_subreg's behavior of validating
3369 that the new mode is ok for a hard register. If we were to use
3370 simplify_gen_subreg, we would create the subreg, but would
3371 probably run into the target not being able to implement it. */
3372 /* Except, of course, when FORCE is true, when this is exactly what
3373 we want. Which is needed for CCmodes on some targets. */
3375 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3377 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3383 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3384 an integer mode of the same size as MODE. Returns the instruction
3385 emitted, or NULL if such a move could not be generated. */
3388 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3390 scalar_int_mode imode
;
3391 enum insn_code code
;
3393 /* There must exist a mode of the exact size we require. */
3394 if (!int_mode_for_mode (mode
).exists (&imode
))
3397 /* The target must support moves in this mode. */
3398 code
= optab_handler (mov_optab
, imode
);
3399 if (code
== CODE_FOR_nothing
)
3402 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3405 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3408 return emit_insn (GEN_FCN (code
) (x
, y
));
3411 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3412 Return an equivalent MEM that does not use an auto-increment. */
3415 emit_move_resolve_push (machine_mode mode
, rtx x
)
3417 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3420 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3421 #ifdef PUSH_ROUNDING
3422 adjust
= PUSH_ROUNDING (adjust
);
3424 if (code
== PRE_DEC
|| code
== POST_DEC
)
3426 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3428 rtx expr
= XEXP (XEXP (x
, 0), 1);
3430 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3431 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3432 if (GET_CODE (expr
) == MINUS
)
3434 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3438 /* Do not use anti_adjust_stack, since we don't want to update
3439 stack_pointer_delta. */
3440 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3441 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3442 0, OPTAB_LIB_WIDEN
);
3443 if (temp
!= stack_pointer_rtx
)
3444 emit_move_insn (stack_pointer_rtx
, temp
);
3451 temp
= stack_pointer_rtx
;
3456 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3462 return replace_equiv_address (x
, temp
);
3465 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3466 X is known to satisfy push_operand, and MODE is known to be complex.
3467 Returns the last instruction emitted. */
3470 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3472 scalar_mode submode
= GET_MODE_INNER (mode
);
3475 #ifdef PUSH_ROUNDING
3476 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3478 /* In case we output to the stack, but the size is smaller than the
3479 machine can push exactly, we need to use move instructions. */
3480 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3482 x
= emit_move_resolve_push (mode
, x
);
3483 return emit_move_insn (x
, y
);
3487 /* Note that the real part always precedes the imag part in memory
3488 regardless of machine's endianness. */
3489 switch (GET_CODE (XEXP (x
, 0)))
3503 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3504 read_complex_part (y
, imag_first
));
3505 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3506 read_complex_part (y
, !imag_first
));
3509 /* A subroutine of emit_move_complex. Perform the move from Y to X
3510 via two moves of the parts. Returns the last instruction emitted. */
3513 emit_move_complex_parts (rtx x
, rtx y
)
3515 /* Show the output dies here. This is necessary for SUBREGs
3516 of pseudos since we cannot track their lifetimes correctly;
3517 hard regs shouldn't appear here except as return values. */
3518 if (!reload_completed
&& !reload_in_progress
3519 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3522 write_complex_part (x
, read_complex_part (y
, false), false);
3523 write_complex_part (x
, read_complex_part (y
, true), true);
3525 return get_last_insn ();
3528 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3529 MODE is known to be complex. Returns the last instruction emitted. */
3532 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3536 /* Need to take special care for pushes, to maintain proper ordering
3537 of the data, and possibly extra padding. */
3538 if (push_operand (x
, mode
))
3539 return emit_move_complex_push (mode
, x
, y
);
3541 /* See if we can coerce the target into moving both values at once, except
3542 for floating point where we favor moving as parts if this is easy. */
3543 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3544 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3546 && HARD_REGISTER_P (x
)
3547 && REG_NREGS (x
) == 1)
3549 && HARD_REGISTER_P (y
)
3550 && REG_NREGS (y
) == 1))
3552 /* Not possible if the values are inherently not adjacent. */
3553 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3555 /* Is possible if both are registers (or subregs of registers). */
3556 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3558 /* If one of the operands is a memory, and alignment constraints
3559 are friendly enough, we may be able to do combined memory operations.
3560 We do not attempt this if Y is a constant because that combination is
3561 usually better with the by-parts thing below. */
3562 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3563 && (!STRICT_ALIGNMENT
3564 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3573 /* For memory to memory moves, optimal behavior can be had with the
3574 existing block move logic. */
3575 if (MEM_P (x
) && MEM_P (y
))
3577 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3578 BLOCK_OP_NO_LIBCALL
);
3579 return get_last_insn ();
3582 ret
= emit_move_via_integer (mode
, x
, y
, true);
3587 return emit_move_complex_parts (x
, y
);
3590 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3591 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3594 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3598 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3601 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3602 if (code
!= CODE_FOR_nothing
)
3604 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3605 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3606 return emit_insn (GEN_FCN (code
) (x
, y
));
3610 /* Otherwise, find the MODE_INT mode of the same width. */
3611 ret
= emit_move_via_integer (mode
, x
, y
, false);
3612 gcc_assert (ret
!= NULL
);
3616 /* Return true if word I of OP lies entirely in the
3617 undefined bits of a paradoxical subreg. */
3620 undefined_operand_subword_p (const_rtx op
, int i
)
3622 if (GET_CODE (op
) != SUBREG
)
3624 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3625 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3626 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3627 || known_le (offset
, -UNITS_PER_WORD
));
3630 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3631 MODE is any multi-word or full-word mode that lacks a move_insn
3632 pattern. Note that you will get better code if you define such
3633 patterns, even if they must turn into multiple assembler instructions. */
3636 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3638 rtx_insn
*last_insn
= 0;
3644 /* This function can only handle cases where the number of words is
3645 known at compile time. */
3646 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3647 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3649 /* If X is a push on the stack, do the push now and replace
3650 X with a reference to the stack pointer. */
3651 if (push_operand (x
, mode
))
3652 x
= emit_move_resolve_push (mode
, x
);
3654 /* If we are in reload, see if either operand is a MEM whose address
3655 is scheduled for replacement. */
3656 if (reload_in_progress
&& MEM_P (x
)
3657 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3658 x
= replace_equiv_address_nv (x
, inner
);
3659 if (reload_in_progress
&& MEM_P (y
)
3660 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3661 y
= replace_equiv_address_nv (y
, inner
);
3665 need_clobber
= false;
3666 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3668 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3671 /* Do not generate code for a move if it would come entirely
3672 from the undefined bits of a paradoxical subreg. */
3673 if (undefined_operand_subword_p (y
, i
))
3676 ypart
= operand_subword (y
, i
, 1, mode
);
3678 /* If we can't get a part of Y, put Y into memory if it is a
3679 constant. Otherwise, force it into a register. Then we must
3680 be able to get a part of Y. */
3681 if (ypart
== 0 && CONSTANT_P (y
))
3683 y
= use_anchored_address (force_const_mem (mode
, y
));
3684 ypart
= operand_subword (y
, i
, 1, mode
);
3686 else if (ypart
== 0)
3687 ypart
= operand_subword_force (y
, i
, mode
);
3689 gcc_assert (xpart
&& ypart
);
3691 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3693 last_insn
= emit_move_insn (xpart
, ypart
);
3699 /* Show the output dies here. This is necessary for SUBREGs
3700 of pseudos since we cannot track their lifetimes correctly;
3701 hard regs shouldn't appear here except as return values.
3702 We never want to emit such a clobber after reload. */
3704 && ! (reload_in_progress
|| reload_completed
)
3705 && need_clobber
!= 0)
3713 /* Low level part of emit_move_insn.
3714 Called just like emit_move_insn, but assumes X and Y
3715 are basically valid. */
3718 emit_move_insn_1 (rtx x
, rtx y
)
3720 machine_mode mode
= GET_MODE (x
);
3721 enum insn_code code
;
3723 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3725 code
= optab_handler (mov_optab
, mode
);
3726 if (code
!= CODE_FOR_nothing
)
3727 return emit_insn (GEN_FCN (code
) (x
, y
));
3729 /* Expand complex moves by moving real part and imag part. */
3730 if (COMPLEX_MODE_P (mode
))
3731 return emit_move_complex (mode
, x
, y
);
3733 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3734 || ALL_FIXED_POINT_MODE_P (mode
))
3736 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3738 /* If we can't find an integer mode, use multi words. */
3742 return emit_move_multi_word (mode
, x
, y
);
3745 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3746 return emit_move_ccmode (mode
, x
, y
);
3748 /* Try using a move pattern for the corresponding integer mode. This is
3749 only safe when simplify_subreg can convert MODE constants into integer
3750 constants. At present, it can only do this reliably if the value
3751 fits within a HOST_WIDE_INT. */
3753 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3755 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3759 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3764 return emit_move_multi_word (mode
, x
, y
);
3767 /* Generate code to copy Y into X.
3768 Both Y and X must have the same mode, except that
3769 Y can be a constant with VOIDmode.
3770 This mode cannot be BLKmode; use emit_block_move for that.
3772 Return the last instruction emitted. */
3775 emit_move_insn (rtx x
, rtx y
)
3777 machine_mode mode
= GET_MODE (x
);
3778 rtx y_cst
= NULL_RTX
;
3779 rtx_insn
*last_insn
;
3782 gcc_assert (mode
!= BLKmode
3783 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3788 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3789 && (last_insn
= compress_float_constant (x
, y
)))
3794 if (!targetm
.legitimate_constant_p (mode
, y
))
3796 y
= force_const_mem (mode
, y
);
3798 /* If the target's cannot_force_const_mem prevented the spill,
3799 assume that the target's move expanders will also take care
3800 of the non-legitimate constant. */
3804 y
= use_anchored_address (y
);
3808 /* If X or Y are memory references, verify that their addresses are valid
3811 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3813 && ! push_operand (x
, GET_MODE (x
))))
3814 x
= validize_mem (x
);
3817 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3818 MEM_ADDR_SPACE (y
)))
3819 y
= validize_mem (y
);
3821 gcc_assert (mode
!= BLKmode
);
3823 last_insn
= emit_move_insn_1 (x
, y
);
3825 if (y_cst
&& REG_P (x
)
3826 && (set
= single_set (last_insn
)) != NULL_RTX
3827 && SET_DEST (set
) == x
3828 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3829 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3834 /* Generate the body of an instruction to copy Y into X.
3835 It may be a list of insns, if one insn isn't enough. */
3838 gen_move_insn (rtx x
, rtx y
)
3843 emit_move_insn_1 (x
, y
);
3849 /* If Y is representable exactly in a narrower mode, and the target can
3850 perform the extension directly from constant or memory, then emit the
3851 move as an extension. */
3854 compress_float_constant (rtx x
, rtx y
)
3856 machine_mode dstmode
= GET_MODE (x
);
3857 machine_mode orig_srcmode
= GET_MODE (y
);
3858 machine_mode srcmode
;
3859 const REAL_VALUE_TYPE
*r
;
3860 int oldcost
, newcost
;
3861 bool speed
= optimize_insn_for_speed_p ();
3863 r
= CONST_DOUBLE_REAL_VALUE (y
);
3865 if (targetm
.legitimate_constant_p (dstmode
, y
))
3866 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3868 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3870 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3874 rtx_insn
*last_insn
;
3876 /* Skip if the target can't extend this way. */
3877 ic
= can_extend_p (dstmode
, srcmode
, 0);
3878 if (ic
== CODE_FOR_nothing
)
3881 /* Skip if the narrowed value isn't exact. */
3882 if (! exact_real_truncate (srcmode
, r
))
3885 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3887 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3889 /* Skip if the target needs extra instructions to perform
3891 if (!insn_operand_matches (ic
, 1, trunc_y
))
3893 /* This is valid, but may not be cheaper than the original. */
3894 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3896 if (oldcost
< newcost
)
3899 else if (float_extend_from_mem
[dstmode
][srcmode
])
3901 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3902 /* This is valid, but may not be cheaper than the original. */
3903 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3905 if (oldcost
< newcost
)
3907 trunc_y
= validize_mem (trunc_y
);
3912 /* For CSE's benefit, force the compressed constant pool entry
3913 into a new pseudo. This constant may be used in different modes,
3914 and if not, combine will put things back together for us. */
3915 trunc_y
= force_reg (srcmode
, trunc_y
);
3917 /* If x is a hard register, perform the extension into a pseudo,
3918 so that e.g. stack realignment code is aware of it. */
3920 if (REG_P (x
) && HARD_REGISTER_P (x
))
3921 target
= gen_reg_rtx (dstmode
);
3923 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3924 last_insn
= get_last_insn ();
3927 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3930 return emit_move_insn (x
, target
);
3937 /* Pushing data onto the stack. */
3939 /* Push a block of length SIZE (perhaps variable)
3940 and return an rtx to address the beginning of the block.
3941 The value may be virtual_outgoing_args_rtx.
3943 EXTRA is the number of bytes of padding to push in addition to SIZE.
3944 BELOW nonzero means this padding comes at low addresses;
3945 otherwise, the padding comes at high addresses. */
3948 push_block (rtx size
, poly_int64 extra
, int below
)
3952 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3953 if (CONSTANT_P (size
))
3954 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3955 else if (REG_P (size
) && known_eq (extra
, 0))
3956 anti_adjust_stack (size
);
3959 temp
= copy_to_mode_reg (Pmode
, size
);
3960 if (maybe_ne (extra
, 0))
3961 temp
= expand_binop (Pmode
, add_optab
, temp
,
3962 gen_int_mode (extra
, Pmode
),
3963 temp
, 0, OPTAB_LIB_WIDEN
);
3964 anti_adjust_stack (temp
);
3967 if (STACK_GROWS_DOWNWARD
)
3969 temp
= virtual_outgoing_args_rtx
;
3970 if (maybe_ne (extra
, 0) && below
)
3971 temp
= plus_constant (Pmode
, temp
, extra
);
3976 if (poly_int_rtx_p (size
, &csize
))
3977 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3978 -csize
- (below
? 0 : extra
));
3979 else if (maybe_ne (extra
, 0) && !below
)
3980 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3981 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3984 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3985 negate_rtx (Pmode
, size
));
3988 return memory_address (NARROWEST_INT_MODE
, temp
);
3991 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3994 mem_autoinc_base (rtx mem
)
3998 rtx addr
= XEXP (mem
, 0);
3999 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
4000 return XEXP (addr
, 0);
4005 /* A utility routine used here, in reload, and in try_split. The insns
4006 after PREV up to and including LAST are known to adjust the stack,
4007 with a final value of END_ARGS_SIZE. Iterate backward from LAST
4008 placing notes as appropriate. PREV may be NULL, indicating the
4009 entire insn sequence prior to LAST should be scanned.
4011 The set of allowed stack pointer modifications is small:
4012 (1) One or more auto-inc style memory references (aka pushes),
4013 (2) One or more addition/subtraction with the SP as destination,
4014 (3) A single move insn with the SP as destination,
4015 (4) A call_pop insn,
4016 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
4018 Insns in the sequence that do not modify the SP are ignored,
4019 except for noreturn calls.
4021 The return value is the amount of adjustment that can be trivially
4022 verified, via immediate operand or auto-inc. If the adjustment
4023 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
4026 find_args_size_adjust (rtx_insn
*insn
)
4031 pat
= PATTERN (insn
);
4034 /* Look for a call_pop pattern. */
4037 /* We have to allow non-call_pop patterns for the case
4038 of emit_single_push_insn of a TLS address. */
4039 if (GET_CODE (pat
) != PARALLEL
)
4042 /* All call_pop have a stack pointer adjust in the parallel.
4043 The call itself is always first, and the stack adjust is
4044 usually last, so search from the end. */
4045 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4047 set
= XVECEXP (pat
, 0, i
);
4048 if (GET_CODE (set
) != SET
)
4050 dest
= SET_DEST (set
);
4051 if (dest
== stack_pointer_rtx
)
4054 /* We'd better have found the stack pointer adjust. */
4057 /* Fall through to process the extracted SET and DEST
4058 as if it was a standalone insn. */
4060 else if (GET_CODE (pat
) == SET
)
4062 else if ((set
= single_set (insn
)) != NULL
)
4064 else if (GET_CODE (pat
) == PARALLEL
)
4066 /* ??? Some older ports use a parallel with a stack adjust
4067 and a store for a PUSH_ROUNDING pattern, rather than a
4068 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4069 /* ??? See h8300 and m68k, pushqi1. */
4070 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4072 set
= XVECEXP (pat
, 0, i
);
4073 if (GET_CODE (set
) != SET
)
4075 dest
= SET_DEST (set
);
4076 if (dest
== stack_pointer_rtx
)
4079 /* We do not expect an auto-inc of the sp in the parallel. */
4080 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4081 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4082 != stack_pointer_rtx
);
4090 dest
= SET_DEST (set
);
4092 /* Look for direct modifications of the stack pointer. */
4093 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4095 /* Look for a trivial adjustment, otherwise assume nothing. */
4096 /* Note that the SPU restore_stack_block pattern refers to
4097 the stack pointer in V4SImode. Consider that non-trivial. */
4099 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4100 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4102 /* ??? Reload can generate no-op moves, which will be cleaned
4103 up later. Recognize it and continue searching. */
4104 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4107 return HOST_WIDE_INT_MIN
;
4113 /* Otherwise only think about autoinc patterns. */
4114 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4117 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4118 != stack_pointer_rtx
);
4120 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4121 mem
= SET_SRC (set
);
4125 addr
= XEXP (mem
, 0);
4126 switch (GET_CODE (addr
))
4130 return GET_MODE_SIZE (GET_MODE (mem
));
4133 return -GET_MODE_SIZE (GET_MODE (mem
));
4136 addr
= XEXP (addr
, 1);
4137 gcc_assert (GET_CODE (addr
) == PLUS
);
4138 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4139 return rtx_to_poly_int64 (XEXP (addr
, 1));
4147 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4148 poly_int64 end_args_size
)
4150 poly_int64 args_size
= end_args_size
;
4151 bool saw_unknown
= false;
4154 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4156 if (!NONDEBUG_INSN_P (insn
))
4159 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4160 a call argument containing a TLS address that itself requires
4161 a call to __tls_get_addr. The handling of stack_pointer_delta
4162 in emit_single_push_insn is supposed to ensure that any such
4163 notes are already correct. */
4164 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4165 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4167 poly_int64 this_delta
= find_args_size_adjust (insn
);
4168 if (known_eq (this_delta
, 0))
4171 || ACCUMULATE_OUTGOING_ARGS
4172 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4176 gcc_assert (!saw_unknown
);
4177 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4181 add_args_size_note (insn
, args_size
);
4182 if (STACK_GROWS_DOWNWARD
)
4183 this_delta
= -poly_uint64 (this_delta
);
4186 args_size
= HOST_WIDE_INT_MIN
;
4188 args_size
-= this_delta
;
4194 #ifdef PUSH_ROUNDING
4195 /* Emit single push insn. */
4198 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4201 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4203 enum insn_code icode
;
4205 /* If there is push pattern, use it. Otherwise try old way of throwing
4206 MEM representing push operation to move expander. */
4207 icode
= optab_handler (push_optab
, mode
);
4208 if (icode
!= CODE_FOR_nothing
)
4210 class expand_operand ops
[1];
4212 create_input_operand (&ops
[0], x
, mode
);
4213 if (maybe_expand_insn (icode
, 1, ops
))
4216 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4217 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4218 /* If we are to pad downward, adjust the stack pointer first and
4219 then store X into the stack location using an offset. This is
4220 because emit_move_insn does not know how to pad; it does not have
4222 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4224 emit_move_insn (stack_pointer_rtx
,
4225 expand_binop (Pmode
,
4226 STACK_GROWS_DOWNWARD
? sub_optab
4229 gen_int_mode (rounded_size
, Pmode
),
4230 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4232 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4233 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4234 /* We have already decremented the stack pointer, so get the
4236 offset
+= rounded_size
;
4238 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4239 /* We have already incremented the stack pointer, so get the
4241 offset
-= rounded_size
;
4243 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4247 if (STACK_GROWS_DOWNWARD
)
4248 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4249 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4251 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4252 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4254 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4257 dest
= gen_rtx_MEM (mode
, dest_addr
);
4261 set_mem_attributes (dest
, type
, 1);
4263 if (cfun
->tail_call_marked
)
4264 /* Function incoming arguments may overlap with sibling call
4265 outgoing arguments and we cannot allow reordering of reads
4266 from function arguments with stores to outgoing arguments
4267 of sibling calls. */
4268 set_mem_alias_set (dest
, 0);
4270 emit_move_insn (dest
, x
);
4273 /* Emit and annotate a single push insn. */
4276 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4278 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4279 rtx_insn
*prev
= get_last_insn ();
4282 emit_single_push_insn_1 (mode
, x
, type
);
4284 /* Adjust stack_pointer_delta to describe the situation after the push
4285 we just performed. Note that we must do this after the push rather
4286 than before the push in case calculating X needs pushes and pops of
4287 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4288 for such pushes and pops must not include the effect of the future
4290 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4292 last
= get_last_insn ();
4294 /* Notice the common case where we emitted exactly one insn. */
4295 if (PREV_INSN (last
) == prev
)
4297 add_args_size_note (last
, stack_pointer_delta
);
4301 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4302 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4303 || known_eq (delta
, old_delta
));
4307 /* If reading SIZE bytes from X will end up reading from
4308 Y return the number of bytes that overlap. Return -1
4309 if there is no overlap or -2 if we can't determine
4310 (for example when X and Y have different base registers). */
4313 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4315 rtx tmp
= plus_constant (Pmode
, x
, size
);
4316 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4318 if (!CONST_INT_P (sub
))
4321 HOST_WIDE_INT val
= INTVAL (sub
);
4323 return IN_RANGE (val
, 1, size
) ? val
: -1;
4326 /* Generate code to push X onto the stack, assuming it has mode MODE and
4328 MODE is redundant except when X is a CONST_INT (since they don't
4330 SIZE is an rtx for the size of data to be copied (in bytes),
4331 needed only if X is BLKmode.
4332 Return true if successful. May return false if asked to push a
4333 partial argument during a sibcall optimization (as specified by
4334 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4337 ALIGN (in bits) is maximum alignment we can assume.
4339 If PARTIAL and REG are both nonzero, then copy that many of the first
4340 bytes of X into registers starting with REG, and push the rest of X.
4341 The amount of space pushed is decreased by PARTIAL bytes.
4342 REG must be a hard register in this case.
4343 If REG is zero but PARTIAL is not, take any all others actions for an
4344 argument partially in registers, but do not actually load any
4347 EXTRA is the amount in bytes of extra space to leave next to this arg.
4348 This is ignored if an argument block has already been allocated.
4350 On a machine that lacks real push insns, ARGS_ADDR is the address of
4351 the bottom of the argument block for this call. We use indexing off there
4352 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4353 argument block has not been preallocated.
4355 ARGS_SO_FAR is the size of args previously pushed for this call.
4357 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4358 for arguments passed in registers. If nonzero, it will be the number
4359 of bytes required. */
4362 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4363 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4364 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4365 rtx alignment_pad
, bool sibcall_p
)
4368 pad_direction stack_direction
4369 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4371 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4372 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4373 Default is below for small data on big-endian machines; else above. */
4374 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4376 /* Invert direction if stack is post-decrement.
4378 if (STACK_PUSH_CODE
== POST_DEC
)
4379 if (where_pad
!= PAD_NONE
)
4380 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4384 int nregs
= partial
/ UNITS_PER_WORD
;
4385 rtx
*tmp_regs
= NULL
;
4386 int overlapping
= 0;
4389 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4391 /* Copy a block into the stack, entirely or partially. */
4398 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4399 used
= partial
- offset
;
4401 if (mode
!= BLKmode
)
4403 /* A value is to be stored in an insufficiently aligned
4404 stack slot; copy via a suitably aligned slot if
4406 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4407 if (!MEM_P (xinner
))
4409 temp
= assign_temp (type
, 1, 1);
4410 emit_move_insn (temp
, xinner
);
4417 /* USED is now the # of bytes we need not copy to the stack
4418 because registers will take care of them. */
4421 xinner
= adjust_address (xinner
, BLKmode
, used
);
4423 /* If the partial register-part of the arg counts in its stack size,
4424 skip the part of stack space corresponding to the registers.
4425 Otherwise, start copying to the beginning of the stack space,
4426 by setting SKIP to 0. */
4427 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4429 #ifdef PUSH_ROUNDING
4430 /* Do it with several push insns if that doesn't take lots of insns
4431 and if there is no difficulty with push insns that skip bytes
4432 on the stack for alignment purposes. */
4435 && CONST_INT_P (size
)
4437 && MEM_ALIGN (xinner
) >= align
4438 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4439 /* Here we avoid the case of a structure whose weak alignment
4440 forces many pushes of a small amount of data,
4441 and such small pushes do rounding that causes trouble. */
4442 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4443 || align
>= BIGGEST_ALIGNMENT
4444 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4445 align
/ BITS_PER_UNIT
))
4446 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4448 /* Push padding now if padding above and stack grows down,
4449 or if padding below and stack grows up.
4450 But if space already allocated, this has already been done. */
4451 if (maybe_ne (extra
, 0)
4453 && where_pad
!= PAD_NONE
4454 && where_pad
!= stack_direction
)
4455 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4457 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
,
4461 #endif /* PUSH_ROUNDING */
4465 /* Otherwise make space on the stack and copy the data
4466 to the address of that space. */
4468 /* Deduct words put into registers from the size we must copy. */
4471 if (CONST_INT_P (size
))
4472 size
= GEN_INT (INTVAL (size
) - used
);
4474 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4475 gen_int_mode (used
, GET_MODE (size
)),
4476 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4479 /* Get the address of the stack space.
4480 In this case, we do not deal with EXTRA separately.
4481 A single stack adjust will do. */
4482 poly_int64 const_args_so_far
;
4485 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4488 else if (poly_int_rtx_p (args_so_far
, &const_args_so_far
))
4489 temp
= memory_address (BLKmode
,
4490 plus_constant (Pmode
, args_addr
,
4491 skip
+ const_args_so_far
));
4493 temp
= memory_address (BLKmode
,
4494 plus_constant (Pmode
,
4495 gen_rtx_PLUS (Pmode
,
4500 if (!ACCUMULATE_OUTGOING_ARGS
)
4502 /* If the source is referenced relative to the stack pointer,
4503 copy it to another register to stabilize it. We do not need
4504 to do this if we know that we won't be changing sp. */
4506 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4507 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4508 temp
= copy_to_reg (temp
);
4511 target
= gen_rtx_MEM (BLKmode
, temp
);
4513 /* We do *not* set_mem_attributes here, because incoming arguments
4514 may overlap with sibling call outgoing arguments and we cannot
4515 allow reordering of reads from function arguments with stores
4516 to outgoing arguments of sibling calls. We do, however, want
4517 to record the alignment of the stack slot. */
4518 /* ALIGN may well be better aligned than TYPE, e.g. due to
4519 PARM_BOUNDARY. Assume the caller isn't lying. */
4520 set_mem_align (target
, align
);
4522 /* If part should go in registers and pushing to that part would
4523 overwrite some of the values that need to go into regs, load the
4524 overlapping values into temporary pseudos to be moved into the hard
4525 regs at the end after the stack pushing has completed.
4526 We cannot load them directly into the hard regs here because
4527 they can be clobbered by the block move expansions.
4530 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4531 && GET_CODE (reg
) != PARALLEL
)
4533 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4534 if (overlapping
> 0)
4536 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4537 overlapping
/= UNITS_PER_WORD
;
4539 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4541 for (int i
= 0; i
< overlapping
; i
++)
4542 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4544 for (int i
= 0; i
< overlapping
; i
++)
4545 emit_move_insn (tmp_regs
[i
],
4546 operand_subword_force (target
, i
, mode
));
4548 else if (overlapping
== -1)
4550 /* Could not determine whether there is overlap.
4551 Fail the sibcall. */
4559 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4562 else if (partial
> 0)
4564 /* Scalar partly in registers. This case is only supported
4565 for fixed-wdth modes. */
4566 int num_words
= GET_MODE_SIZE (mode
).to_constant ();
4567 num_words
/= UNITS_PER_WORD
;
4570 /* # bytes of start of argument
4571 that we must make space for but need not store. */
4572 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4573 int args_offset
= INTVAL (args_so_far
);
4576 /* Push padding now if padding above and stack grows down,
4577 or if padding below and stack grows up.
4578 But if space already allocated, this has already been done. */
4579 if (maybe_ne (extra
, 0)
4581 && where_pad
!= PAD_NONE
4582 && where_pad
!= stack_direction
)
4583 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4585 /* If we make space by pushing it, we might as well push
4586 the real data. Otherwise, we can leave OFFSET nonzero
4587 and leave the space uninitialized. */
4591 /* Now NOT_STACK gets the number of words that we don't need to
4592 allocate on the stack. Convert OFFSET to words too. */
4593 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4594 offset
/= UNITS_PER_WORD
;
4596 /* If the partial register-part of the arg counts in its stack size,
4597 skip the part of stack space corresponding to the registers.
4598 Otherwise, start copying to the beginning of the stack space,
4599 by setting SKIP to 0. */
4600 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4602 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4603 x
= validize_mem (force_const_mem (mode
, x
));
4605 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4606 SUBREGs of such registers are not allowed. */
4607 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4608 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4609 x
= copy_to_reg (x
);
4611 /* Loop over all the words allocated on the stack for this arg. */
4612 /* We can do it by words, because any scalar bigger than a word
4613 has a size a multiple of a word. */
4614 for (i
= num_words
- 1; i
>= not_stack
; i
--)
4615 if (i
>= not_stack
+ offset
)
4616 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4617 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4619 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4621 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4629 /* Push padding now if padding above and stack grows down,
4630 or if padding below and stack grows up.
4631 But if space already allocated, this has already been done. */
4632 if (maybe_ne (extra
, 0)
4634 && where_pad
!= PAD_NONE
4635 && where_pad
!= stack_direction
)
4636 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4638 #ifdef PUSH_ROUNDING
4639 if (args_addr
== 0 && PUSH_ARGS
)
4640 emit_single_push_insn (mode
, x
, type
);
4644 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4645 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4647 /* We do *not* set_mem_attributes here, because incoming arguments
4648 may overlap with sibling call outgoing arguments and we cannot
4649 allow reordering of reads from function arguments with stores
4650 to outgoing arguments of sibling calls. We do, however, want
4651 to record the alignment of the stack slot. */
4652 /* ALIGN may well be better aligned than TYPE, e.g. due to
4653 PARM_BOUNDARY. Assume the caller isn't lying. */
4654 set_mem_align (dest
, align
);
4656 emit_move_insn (dest
, x
);
4660 /* Move the partial arguments into the registers and any overlapping
4661 values that we moved into the pseudos in tmp_regs. */
4662 if (partial
> 0 && reg
!= 0)
4664 /* Handle calls that pass values in multiple non-contiguous locations.
4665 The Irix 6 ABI has examples of this. */
4666 if (GET_CODE (reg
) == PARALLEL
)
4667 emit_group_load (reg
, x
, type
, -1);
4670 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4671 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4673 for (int i
= 0; i
< overlapping
; i
++)
4674 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4675 + nregs
- overlapping
+ i
),
4681 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4682 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4684 if (alignment_pad
&& args_addr
== 0)
4685 anti_adjust_stack (alignment_pad
);
4690 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4694 get_subtarget (rtx x
)
4698 /* Only registers can be subtargets. */
4700 /* Don't use hard regs to avoid extending their life. */
4701 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4705 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4706 FIELD is a bitfield. Returns true if the optimization was successful,
4707 and there's nothing else to do. */
4710 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4711 poly_uint64 pbitpos
,
4712 poly_uint64 pbitregion_start
,
4713 poly_uint64 pbitregion_end
,
4714 machine_mode mode1
, rtx str_rtx
,
4715 tree to
, tree src
, bool reverse
)
4717 /* str_mode is not guaranteed to be a scalar type. */
4718 machine_mode str_mode
= GET_MODE (str_rtx
);
4719 unsigned int str_bitsize
;
4724 enum tree_code code
;
4726 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4727 if (mode1
!= VOIDmode
4728 || !pbitsize
.is_constant (&bitsize
)
4729 || !pbitpos
.is_constant (&bitpos
)
4730 || !pbitregion_start
.is_constant (&bitregion_start
)
4731 || !pbitregion_end
.is_constant (&bitregion_end
)
4732 || bitsize
>= BITS_PER_WORD
4733 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4734 || str_bitsize
> BITS_PER_WORD
4735 || TREE_SIDE_EFFECTS (to
)
4736 || TREE_THIS_VOLATILE (to
))
4740 if (TREE_CODE (src
) != SSA_NAME
)
4742 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4745 srcstmt
= get_gimple_for_ssa_name (src
);
4747 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4750 code
= gimple_assign_rhs_code (srcstmt
);
4752 op0
= gimple_assign_rhs1 (srcstmt
);
4754 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4755 to find its initialization. Hopefully the initialization will
4756 be from a bitfield load. */
4757 if (TREE_CODE (op0
) == SSA_NAME
)
4759 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4761 /* We want to eventually have OP0 be the same as TO, which
4762 should be a bitfield. */
4764 || !is_gimple_assign (op0stmt
)
4765 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4767 op0
= gimple_assign_rhs1 (op0stmt
);
4770 op1
= gimple_assign_rhs2 (srcstmt
);
4772 if (!operand_equal_p (to
, op0
, 0))
4775 if (MEM_P (str_rtx
))
4777 unsigned HOST_WIDE_INT offset1
;
4779 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4780 str_bitsize
= BITS_PER_WORD
;
4782 scalar_int_mode best_mode
;
4783 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4784 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4786 str_mode
= best_mode
;
4787 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4790 bitpos
%= str_bitsize
;
4791 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4792 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4794 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4797 /* If the bit field covers the whole REG/MEM, store_field
4798 will likely generate better code. */
4799 if (bitsize
>= str_bitsize
)
4802 /* We can't handle fields split across multiple entities. */
4803 if (bitpos
+ bitsize
> str_bitsize
)
4806 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4807 bitpos
= str_bitsize
- bitpos
- bitsize
;
4813 /* For now, just optimize the case of the topmost bitfield
4814 where we don't need to do any masking and also
4815 1 bit bitfields where xor can be used.
4816 We might win by one instruction for the other bitfields
4817 too if insv/extv instructions aren't used, so that
4818 can be added later. */
4819 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4820 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4823 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4824 value
= convert_modes (str_mode
,
4825 TYPE_MODE (TREE_TYPE (op1
)), value
,
4826 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4828 /* We may be accessing data outside the field, which means
4829 we can alias adjacent data. */
4830 if (MEM_P (str_rtx
))
4832 str_rtx
= shallow_copy_rtx (str_rtx
);
4833 set_mem_alias_set (str_rtx
, 0);
4834 set_mem_expr (str_rtx
, 0);
4837 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4839 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4843 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4845 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4847 value
= flip_storage_order (str_mode
, value
);
4848 result
= expand_binop (str_mode
, binop
, str_rtx
,
4849 value
, str_rtx
, 1, OPTAB_WIDEN
);
4850 if (result
!= str_rtx
)
4851 emit_move_insn (str_rtx
, result
);
4856 if (TREE_CODE (op1
) != INTEGER_CST
)
4858 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4859 value
= convert_modes (str_mode
,
4860 TYPE_MODE (TREE_TYPE (op1
)), value
,
4861 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4863 /* We may be accessing data outside the field, which means
4864 we can alias adjacent data. */
4865 if (MEM_P (str_rtx
))
4867 str_rtx
= shallow_copy_rtx (str_rtx
);
4868 set_mem_alias_set (str_rtx
, 0);
4869 set_mem_expr (str_rtx
, 0);
4872 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4873 if (bitpos
+ bitsize
!= str_bitsize
)
4875 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4877 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4879 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4881 value
= flip_storage_order (str_mode
, value
);
4882 result
= expand_binop (str_mode
, binop
, str_rtx
,
4883 value
, str_rtx
, 1, OPTAB_WIDEN
);
4884 if (result
!= str_rtx
)
4885 emit_move_insn (str_rtx
, result
);
4895 /* In the C++ memory model, consecutive bit fields in a structure are
4896 considered one memory location.
4898 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4899 returns the bit range of consecutive bits in which this COMPONENT_REF
4900 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4901 and *OFFSET may be adjusted in the process.
4903 If the access does not need to be restricted, 0 is returned in both
4904 *BITSTART and *BITEND. */
4907 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
4908 poly_int64_pod
*bitpos
, tree
*offset
)
4910 poly_int64 bitoffset
;
4913 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4915 field
= TREE_OPERAND (exp
, 1);
4916 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4917 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4918 need to limit the range we can access. */
4921 *bitstart
= *bitend
= 0;
4925 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4926 part of a larger bit field, then the representative does not serve any
4927 useful purpose. This can occur in Ada. */
4928 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4931 poly_int64 rbitsize
, rbitpos
;
4933 int unsignedp
, reversep
, volatilep
= 0;
4934 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4935 &roffset
, &rmode
, &unsignedp
, &reversep
,
4937 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
4939 *bitstart
= *bitend
= 0;
4944 /* Compute the adjustment to bitpos from the offset of the field
4945 relative to the representative. DECL_FIELD_OFFSET of field and
4946 repr are the same by construction if they are not constants,
4947 see finish_bitfield_layout. */
4948 poly_uint64 field_offset
, repr_offset
;
4949 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
4950 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
4951 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
4954 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4955 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4957 /* If the adjustment is larger than bitpos, we would have a negative bit
4958 position for the lower bound and this may wreak havoc later. Adjust
4959 offset and bitpos to make the lower bound non-negative in that case. */
4960 if (maybe_gt (bitoffset
, *bitpos
))
4962 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
4963 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
4965 *bitpos
+= adjust_bits
;
4966 if (*offset
== NULL_TREE
)
4967 *offset
= size_int (-adjust_bytes
);
4969 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
4973 *bitstart
= *bitpos
- bitoffset
;
4975 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
4978 /* Returns true if BASE is a DECL that does not reside in memory and
4979 has non-BLKmode. DECL_RTL must not be a MEM; if
4980 DECL_RTL was not set yet, return false. */
4983 non_mem_decl_p (tree base
)
4986 || TREE_ADDRESSABLE (base
)
4987 || DECL_MODE (base
) == BLKmode
)
4990 if (!DECL_RTL_SET_P (base
))
4993 return (!MEM_P (DECL_RTL (base
)));
4996 /* Returns true if REF refers to an object that does not
4997 reside in memory and has non-BLKmode. */
5000 mem_ref_refers_to_non_mem_p (tree ref
)
5004 if (TREE_CODE (ref
) == MEM_REF
5005 || TREE_CODE (ref
) == TARGET_MEM_REF
)
5007 tree addr
= TREE_OPERAND (ref
, 0);
5009 if (TREE_CODE (addr
) != ADDR_EXPR
)
5012 base
= TREE_OPERAND (addr
, 0);
5017 return non_mem_decl_p (base
);
5020 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
5021 is true, try generating a nontemporal store. */
5024 expand_assignment (tree to
, tree from
, bool nontemporal
)
5030 enum insn_code icode
;
5032 /* Don't crash if the lhs of the assignment was erroneous. */
5033 if (TREE_CODE (to
) == ERROR_MARK
)
5035 expand_normal (from
);
5039 /* Optimize away no-op moves without side-effects. */
5040 if (operand_equal_p (to
, from
, 0))
5043 /* Handle misaligned stores. */
5044 mode
= TYPE_MODE (TREE_TYPE (to
));
5045 if ((TREE_CODE (to
) == MEM_REF
5046 || TREE_CODE (to
) == TARGET_MEM_REF
5049 && !mem_ref_refers_to_non_mem_p (to
)
5050 && ((align
= get_object_alignment (to
))
5051 < GET_MODE_ALIGNMENT (mode
))
5052 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5053 != CODE_FOR_nothing
)
5054 || targetm
.slow_unaligned_access (mode
, align
)))
5058 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5059 reg
= force_not_mem (reg
);
5060 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5061 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5062 reg
= flip_storage_order (mode
, reg
);
5064 if (icode
!= CODE_FOR_nothing
)
5066 class expand_operand ops
[2];
5068 create_fixed_operand (&ops
[0], mem
);
5069 create_input_operand (&ops
[1], reg
, mode
);
5070 /* The movmisalign<mode> pattern cannot fail, else the assignment
5071 would silently be omitted. */
5072 expand_insn (icode
, 2, ops
);
5075 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5080 /* Assignment of a structure component needs special treatment
5081 if the structure component's rtx is not simply a MEM.
5082 Assignment of an array element at a constant index, and assignment of
5083 an array element in an unaligned packed structure field, has the same
5084 problem. Same for (partially) storing into a non-memory object. */
5085 if (handled_component_p (to
)
5086 || (TREE_CODE (to
) == MEM_REF
5087 && (REF_REVERSE_STORAGE_ORDER (to
)
5088 || mem_ref_refers_to_non_mem_p (to
)))
5089 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5092 poly_int64 bitsize
, bitpos
;
5093 poly_uint64 bitregion_start
= 0;
5094 poly_uint64 bitregion_end
= 0;
5096 int unsignedp
, reversep
, volatilep
= 0;
5100 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5101 &unsignedp
, &reversep
, &volatilep
);
5103 /* Make sure bitpos is not negative, it can wreak havoc later. */
5104 if (maybe_lt (bitpos
, 0))
5106 gcc_assert (offset
== NULL_TREE
);
5107 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5108 bitpos
= num_trailing_bits (bitpos
);
5111 if (TREE_CODE (to
) == COMPONENT_REF
5112 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5113 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5114 /* The C++ memory model naturally applies to byte-aligned fields.
5115 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5116 BITSIZE are not byte-aligned, there is no need to limit the range
5117 we can access. This can occur with packed structures in Ada. */
5118 else if (maybe_gt (bitsize
, 0)
5119 && multiple_p (bitsize
, BITS_PER_UNIT
)
5120 && multiple_p (bitpos
, BITS_PER_UNIT
))
5122 bitregion_start
= bitpos
;
5123 bitregion_end
= bitpos
+ bitsize
- 1;
5126 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5128 /* If the field has a mode, we want to access it in the
5129 field's mode, not the computed mode.
5130 If a MEM has VOIDmode (external with incomplete type),
5131 use BLKmode for it instead. */
5134 if (mode1
!= VOIDmode
)
5135 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5136 else if (GET_MODE (to_rtx
) == VOIDmode
)
5137 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5142 machine_mode address_mode
;
5145 if (!MEM_P (to_rtx
))
5147 /* We can get constant negative offsets into arrays with broken
5148 user code. Translate this to a trap instead of ICEing. */
5149 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5150 expand_builtin_trap ();
5151 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5154 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5155 address_mode
= get_address_mode (to_rtx
);
5156 if (GET_MODE (offset_rtx
) != address_mode
)
5158 /* We cannot be sure that the RTL in offset_rtx is valid outside
5159 of a memory address context, so force it into a register
5160 before attempting to convert it to the desired mode. */
5161 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5162 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5165 /* If we have an expression in OFFSET_RTX and a non-zero
5166 byte offset in BITPOS, adding the byte offset before the
5167 OFFSET_RTX results in better intermediate code, which makes
5168 later rtl optimization passes perform better.
5170 We prefer intermediate code like this:
5172 r124:DI=r123:DI+0x18
5177 r124:DI=r123:DI+0x10
5178 [r124:DI+0x8]=r121:DI
5180 This is only done for aligned data values, as these can
5181 be expected to result in single move instructions. */
5183 if (mode1
!= VOIDmode
5184 && maybe_ne (bitpos
, 0)
5185 && maybe_gt (bitsize
, 0)
5186 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5187 && multiple_p (bitpos
, bitsize
)
5188 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5189 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5191 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5192 bitregion_start
= 0;
5193 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5194 bitregion_end
-= bitpos
;
5198 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5199 highest_pow2_factor_for_target (to
,
5203 /* No action is needed if the target is not a memory and the field
5204 lies completely outside that target. This can occur if the source
5205 code contains an out-of-bounds access to a small array. */
5207 && GET_MODE (to_rtx
) != BLKmode
5208 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5210 expand_normal (from
);
5213 /* Handle expand_expr of a complex value returning a CONCAT. */
5214 else if (GET_CODE (to_rtx
) == CONCAT
)
5216 machine_mode to_mode
= GET_MODE (to_rtx
);
5217 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5218 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5219 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5220 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5221 && known_eq (bitpos
, 0)
5222 && known_eq (bitsize
, mode_bitsize
))
5223 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5224 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5225 && known_eq (bitsize
, inner_bitsize
)
5226 && (known_eq (bitpos
, 0)
5227 || known_eq (bitpos
, inner_bitsize
)))
5228 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5229 false, nontemporal
, reversep
);
5230 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5231 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5232 bitregion_start
, bitregion_end
,
5233 mode1
, from
, get_alias_set (to
),
5234 nontemporal
, reversep
);
5235 else if (known_ge (bitpos
, inner_bitsize
))
5236 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5237 bitpos
- inner_bitsize
,
5238 bitregion_start
, bitregion_end
,
5239 mode1
, from
, get_alias_set (to
),
5240 nontemporal
, reversep
);
5241 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5243 result
= expand_normal (from
);
5244 if (GET_CODE (result
) == CONCAT
)
5246 to_mode
= GET_MODE_INNER (to_mode
);
5247 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5249 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5252 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5254 if (!from_real
|| !from_imag
)
5255 goto concat_store_slow
;
5256 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5257 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5263 from_rtx
= change_address (result
, to_mode
, NULL_RTX
);
5266 = simplify_gen_subreg (to_mode
, result
,
5267 TYPE_MODE (TREE_TYPE (from
)), 0);
5270 emit_move_insn (XEXP (to_rtx
, 0),
5271 read_complex_part (from_rtx
, false));
5272 emit_move_insn (XEXP (to_rtx
, 1),
5273 read_complex_part (from_rtx
, true));
5277 to_mode
= GET_MODE_INNER (to_mode
);
5279 = simplify_gen_subreg (to_mode
, result
,
5280 TYPE_MODE (TREE_TYPE (from
)),
5283 = simplify_gen_subreg (to_mode
, result
,
5284 TYPE_MODE (TREE_TYPE (from
)),
5285 GET_MODE_SIZE (to_mode
));
5286 if (!from_real
|| !from_imag
)
5287 goto concat_store_slow
;
5288 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5289 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5296 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5297 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5298 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5299 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5300 result
= store_field (temp
, bitsize
, bitpos
,
5301 bitregion_start
, bitregion_end
,
5302 mode1
, from
, get_alias_set (to
),
5303 nontemporal
, reversep
);
5304 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5305 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5308 /* For calls to functions returning variable length structures, if TO_RTX
5309 is not a MEM, go through a MEM because we must not create temporaries
5311 else if (!MEM_P (to_rtx
)
5312 && TREE_CODE (from
) == CALL_EXPR
5313 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5314 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) != INTEGER_CST
)
5316 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5317 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5318 result
= store_field (temp
, bitsize
, bitpos
, bitregion_start
,
5319 bitregion_end
, mode1
, from
, get_alias_set (to
),
5320 nontemporal
, reversep
);
5321 emit_move_insn (to_rtx
, temp
);
5327 /* If the field is at offset zero, we could have been given the
5328 DECL_RTX of the parent struct. Don't munge it. */
5329 to_rtx
= shallow_copy_rtx (to_rtx
);
5330 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5332 MEM_VOLATILE_P (to_rtx
) = 1;
5335 gcc_checking_assert (known_ge (bitpos
, 0));
5336 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5337 bitregion_start
, bitregion_end
,
5338 mode1
, to_rtx
, to
, from
,
5342 result
= store_field (to_rtx
, bitsize
, bitpos
,
5343 bitregion_start
, bitregion_end
,
5344 mode1
, from
, get_alias_set (to
),
5345 nontemporal
, reversep
);
5349 preserve_temp_slots (result
);
5354 /* If the rhs is a function call and its value is not an aggregate,
5355 call the function before we start to compute the lhs.
5356 This is needed for correct code for cases such as
5357 val = setjmp (buf) on machines where reference to val
5358 requires loading up part of an address in a separate insn.
5360 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5361 since it might be a promoted variable where the zero- or sign- extension
5362 needs to be done. Handling this in the normal way is safe because no
5363 computation is done before the call. The same is true for SSA names. */
5364 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5365 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5366 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5368 || TREE_CODE (to
) == PARM_DECL
5369 || TREE_CODE (to
) == RESULT_DECL
)
5370 && REG_P (DECL_RTL (to
)))
5371 || TREE_CODE (to
) == SSA_NAME
))
5376 value
= expand_normal (from
);
5379 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5381 /* Handle calls that return values in multiple non-contiguous locations.
5382 The Irix 6 ABI has examples of this. */
5383 if (GET_CODE (to_rtx
) == PARALLEL
)
5385 if (GET_CODE (value
) == PARALLEL
)
5386 emit_group_move (to_rtx
, value
);
5388 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5389 int_size_in_bytes (TREE_TYPE (from
)));
5391 else if (GET_CODE (value
) == PARALLEL
)
5392 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5393 int_size_in_bytes (TREE_TYPE (from
)));
5394 else if (GET_MODE (to_rtx
) == BLKmode
)
5396 /* Handle calls that return BLKmode values in registers. */
5398 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5400 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5404 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5405 value
= convert_memory_address_addr_space
5406 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5407 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5409 emit_move_insn (to_rtx
, value
);
5412 preserve_temp_slots (to_rtx
);
5417 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5418 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5420 /* Don't move directly into a return register. */
5421 if (TREE_CODE (to
) == RESULT_DECL
5422 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5428 /* If the source is itself a return value, it still is in a pseudo at
5429 this point so we can move it back to the return register directly. */
5431 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5432 && TREE_CODE (from
) != CALL_EXPR
)
5433 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5435 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5437 /* Handle calls that return values in multiple non-contiguous locations.
5438 The Irix 6 ABI has examples of this. */
5439 if (GET_CODE (to_rtx
) == PARALLEL
)
5441 if (GET_CODE (temp
) == PARALLEL
)
5442 emit_group_move (to_rtx
, temp
);
5444 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5445 int_size_in_bytes (TREE_TYPE (from
)));
5448 emit_move_insn (to_rtx
, temp
);
5450 preserve_temp_slots (to_rtx
);
5455 /* In case we are returning the contents of an object which overlaps
5456 the place the value is being stored, use a safe function when copying
5457 a value through a pointer into a structure value return block. */
5458 if (TREE_CODE (to
) == RESULT_DECL
5459 && TREE_CODE (from
) == INDIRECT_REF
5460 && ADDR_SPACE_GENERIC_P
5461 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5462 && refs_may_alias_p (to
, from
)
5463 && cfun
->returns_struct
5464 && !cfun
->returns_pcc_struct
)
5469 size
= expr_size (from
);
5470 from_rtx
= expand_normal (from
);
5472 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5474 preserve_temp_slots (to_rtx
);
5479 /* Compute FROM and store the value in the rtx we got. */
5482 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5483 preserve_temp_slots (result
);
5488 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5489 succeeded, false otherwise. */
5492 emit_storent_insn (rtx to
, rtx from
)
5494 class expand_operand ops
[2];
5495 machine_mode mode
= GET_MODE (to
);
5496 enum insn_code code
= optab_handler (storent_optab
, mode
);
5498 if (code
== CODE_FOR_nothing
)
5501 create_fixed_operand (&ops
[0], to
);
5502 create_input_operand (&ops
[1], from
, mode
);
5503 return maybe_expand_insn (code
, 2, ops
);
5506 /* Helper function for store_expr storing of STRING_CST. */
5509 string_cst_read_str (void *data
, HOST_WIDE_INT offset
, scalar_int_mode mode
)
5511 tree str
= (tree
) data
;
5513 gcc_assert (offset
>= 0);
5514 if (offset
>= TREE_STRING_LENGTH (str
))
5517 if ((unsigned HOST_WIDE_INT
) offset
+ GET_MODE_SIZE (mode
)
5518 > (unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (str
))
5520 char *p
= XALLOCAVEC (char, GET_MODE_SIZE (mode
));
5521 size_t l
= TREE_STRING_LENGTH (str
) - offset
;
5522 memcpy (p
, TREE_STRING_POINTER (str
) + offset
, l
);
5523 memset (p
+ l
, '\0', GET_MODE_SIZE (mode
) - l
);
5524 return c_readstr (p
, mode
, false);
5527 return c_readstr (TREE_STRING_POINTER (str
) + offset
, mode
, false);
5530 /* Generate code for computing expression EXP,
5531 and storing the value into TARGET.
5533 If the mode is BLKmode then we may return TARGET itself.
5534 It turns out that in BLKmode it doesn't cause a problem.
5535 because C has no operators that could combine two different
5536 assignments into the same BLKmode object with different values
5537 with no sequence point. Will other languages need this to
5540 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5541 stack, and block moves may need to be treated specially.
5543 If NONTEMPORAL is true, try using a nontemporal store instruction.
5545 If REVERSE is true, the store is to be done in reverse order. */
5548 store_expr (tree exp
, rtx target
, int call_param_p
,
5549 bool nontemporal
, bool reverse
)
5552 rtx alt_rtl
= NULL_RTX
;
5553 location_t loc
= curr_insn_location ();
5555 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5557 /* C++ can generate ?: expressions with a throw expression in one
5558 branch and an rvalue in the other. Here, we resolve attempts to
5559 store the throw expression's nonexistent result. */
5560 gcc_assert (!call_param_p
);
5561 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5564 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5566 /* Perform first part of compound expression, then assign from second
5568 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5569 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5570 return store_expr (TREE_OPERAND (exp
, 1), target
,
5571 call_param_p
, nontemporal
, reverse
);
5573 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5575 /* For conditional expression, get safe form of the target. Then
5576 test the condition, doing the appropriate assignment on either
5577 side. This avoids the creation of unnecessary temporaries.
5578 For non-BLKmode, it is more efficient not to do this. */
5580 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5582 do_pending_stack_adjust ();
5584 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5585 profile_probability::uninitialized ());
5586 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5587 nontemporal
, reverse
);
5588 emit_jump_insn (targetm
.gen_jump (lab2
));
5591 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5592 nontemporal
, reverse
);
5598 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5599 /* If this is a scalar in a register that is stored in a wider mode
5600 than the declared mode, compute the result into its declared mode
5601 and then convert to the wider mode. Our value is the computed
5604 rtx inner_target
= 0;
5605 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5606 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5608 /* We can do the conversion inside EXP, which will often result
5609 in some optimizations. Do the conversion in two steps: first
5610 change the signedness, if needed, then the extend. But don't
5611 do this if the type of EXP is a subtype of something else
5612 since then the conversion might involve more than just
5613 converting modes. */
5614 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5615 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5616 && GET_MODE_PRECISION (outer_mode
)
5617 == TYPE_PRECISION (TREE_TYPE (exp
)))
5619 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5620 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5622 /* Some types, e.g. Fortran's logical*4, won't have a signed
5623 version, so use the mode instead. */
5625 = (signed_or_unsigned_type_for
5626 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5628 ntype
= lang_hooks
.types
.type_for_mode
5629 (TYPE_MODE (TREE_TYPE (exp
)),
5630 SUBREG_PROMOTED_SIGN (target
));
5632 exp
= fold_convert_loc (loc
, ntype
, exp
);
5635 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5636 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5639 inner_target
= SUBREG_REG (target
);
5642 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5643 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5646 /* If TEMP is a VOIDmode constant, use convert_modes to make
5647 sure that we properly convert it. */
5648 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5650 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5651 temp
, SUBREG_PROMOTED_SIGN (target
));
5652 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5653 SUBREG_PROMOTED_SIGN (target
));
5656 convert_move (SUBREG_REG (target
), temp
,
5657 SUBREG_PROMOTED_SIGN (target
));
5661 else if ((TREE_CODE (exp
) == STRING_CST
5662 || (TREE_CODE (exp
) == MEM_REF
5663 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5664 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5666 && integer_zerop (TREE_OPERAND (exp
, 1))))
5667 && !nontemporal
&& !call_param_p
5670 /* Optimize initialization of an array with a STRING_CST. */
5671 HOST_WIDE_INT exp_len
, str_copy_len
;
5673 tree str
= TREE_CODE (exp
) == STRING_CST
5674 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5676 exp_len
= int_expr_size (exp
);
5680 if (TREE_STRING_LENGTH (str
) <= 0)
5683 if (can_store_by_pieces (exp_len
, string_cst_read_str
, (void *) str
,
5684 MEM_ALIGN (target
), false))
5686 store_by_pieces (target
, exp_len
, string_cst_read_str
, (void *) str
,
5687 MEM_ALIGN (target
), false, RETURN_BEGIN
);
5691 str_copy_len
= TREE_STRING_LENGTH (str
);
5692 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0)
5694 str_copy_len
+= STORE_MAX_PIECES
- 1;
5695 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5697 if (str_copy_len
>= exp_len
)
5700 if (!can_store_by_pieces (str_copy_len
, string_cst_read_str
,
5701 (void *) str
, MEM_ALIGN (target
), false))
5704 dest_mem
= store_by_pieces (target
, str_copy_len
, string_cst_read_str
,
5705 (void *) str
, MEM_ALIGN (target
), false,
5707 clear_storage (adjust_address_1 (dest_mem
, BLKmode
, 0, 1, 1, 0,
5708 exp_len
- str_copy_len
),
5709 GEN_INT (exp_len
- str_copy_len
), BLOCK_OP_NORMAL
);
5717 /* If we want to use a nontemporal or a reverse order store, force the
5718 value into a register first. */
5719 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5720 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5722 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5726 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5727 the same as that of TARGET, adjust the constant. This is needed, for
5728 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5729 only a word-sized value. */
5730 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5731 && TREE_CODE (exp
) != ERROR_MARK
5732 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5734 if (GET_MODE_CLASS (GET_MODE (target
))
5735 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5736 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5737 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5739 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5740 TYPE_MODE (TREE_TYPE (exp
)), 0);
5744 if (GET_MODE (temp
) == VOIDmode
)
5745 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5746 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5749 /* If value was not generated in the target, store it there.
5750 Convert the value to TARGET's type first if necessary and emit the
5751 pending incrementations that have been queued when expanding EXP.
5752 Note that we cannot emit the whole queue blindly because this will
5753 effectively disable the POST_INC optimization later.
5755 If TEMP and TARGET compare equal according to rtx_equal_p, but
5756 one or both of them are volatile memory refs, we have to distinguish
5758 - expand_expr has used TARGET. In this case, we must not generate
5759 another copy. This can be detected by TARGET being equal according
5761 - expand_expr has not used TARGET - that means that the source just
5762 happens to have the same RTX form. Since temp will have been created
5763 by expand_expr, it will compare unequal according to == .
5764 We must generate a copy in this case, to reach the correct number
5765 of volatile memory references. */
5767 if ((! rtx_equal_p (temp
, target
)
5768 || (temp
!= target
&& (side_effects_p (temp
)
5769 || side_effects_p (target
))))
5770 && TREE_CODE (exp
) != ERROR_MARK
5771 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5772 but TARGET is not valid memory reference, TEMP will differ
5773 from TARGET although it is really the same location. */
5775 && rtx_equal_p (alt_rtl
, target
)
5776 && !side_effects_p (alt_rtl
)
5777 && !side_effects_p (target
))
5778 /* If there's nothing to copy, don't bother. Don't call
5779 expr_size unless necessary, because some front-ends (C++)
5780 expr_size-hook must not be given objects that are not
5781 supposed to be bit-copied or bit-initialized. */
5782 && expr_size (exp
) != const0_rtx
)
5784 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5786 if (GET_MODE (target
) == BLKmode
)
5788 /* Handle calls that return BLKmode values in registers. */
5789 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5790 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5792 store_bit_field (target
,
5793 rtx_to_poly_int64 (expr_size (exp
))
5795 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5798 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5801 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5803 /* Handle copying a string constant into an array. The string
5804 constant may be shorter than the array. So copy just the string's
5805 actual length, and clear the rest. First get the size of the data
5806 type of the string, which is actually the size of the target. */
5807 rtx size
= expr_size (exp
);
5809 if (CONST_INT_P (size
)
5810 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5811 emit_block_move (target
, temp
, size
,
5813 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5816 machine_mode pointer_mode
5817 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5818 machine_mode address_mode
= get_address_mode (target
);
5820 /* Compute the size of the data to copy from the string. */
5822 = size_binop_loc (loc
, MIN_EXPR
,
5823 make_tree (sizetype
, size
),
5824 size_int (TREE_STRING_LENGTH (exp
)));
5826 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5828 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5829 rtx_code_label
*label
= 0;
5831 /* Copy that much. */
5832 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5833 TYPE_UNSIGNED (sizetype
));
5834 emit_block_move (target
, temp
, copy_size_rtx
,
5836 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5838 /* Figure out how much is left in TARGET that we have to clear.
5839 Do all calculations in pointer_mode. */
5840 poly_int64 const_copy_size
;
5841 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
5843 size
= plus_constant (address_mode
, size
, -const_copy_size
);
5844 target
= adjust_address (target
, BLKmode
, const_copy_size
);
5848 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5849 copy_size_rtx
, NULL_RTX
, 0,
5852 if (GET_MODE (copy_size_rtx
) != address_mode
)
5853 copy_size_rtx
= convert_to_mode (address_mode
,
5855 TYPE_UNSIGNED (sizetype
));
5857 target
= offset_address (target
, copy_size_rtx
,
5858 highest_pow2_factor (copy_size
));
5859 label
= gen_label_rtx ();
5860 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5861 GET_MODE (size
), 0, label
);
5864 if (size
!= const0_rtx
)
5865 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5871 /* Handle calls that return values in multiple non-contiguous locations.
5872 The Irix 6 ABI has examples of this. */
5873 else if (GET_CODE (target
) == PARALLEL
)
5875 if (GET_CODE (temp
) == PARALLEL
)
5876 emit_group_move (target
, temp
);
5878 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5879 int_size_in_bytes (TREE_TYPE (exp
)));
5881 else if (GET_CODE (temp
) == PARALLEL
)
5882 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5883 int_size_in_bytes (TREE_TYPE (exp
)));
5884 else if (GET_MODE (temp
) == BLKmode
)
5885 emit_block_move (target
, temp
, expr_size (exp
),
5887 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5888 /* If we emit a nontemporal store, there is nothing else to do. */
5889 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5894 temp
= flip_storage_order (GET_MODE (target
), temp
);
5895 temp
= force_operand (temp
, target
);
5897 emit_move_insn (target
, temp
);
5904 /* Return true if field F of structure TYPE is a flexible array. */
5907 flexible_array_member_p (const_tree f
, const_tree type
)
5912 return (DECL_CHAIN (f
) == NULL
5913 && TREE_CODE (tf
) == ARRAY_TYPE
5915 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5916 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5917 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5918 && int_size_in_bytes (type
) >= 0);
5921 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5922 must have in order for it to completely initialize a value of type TYPE.
5923 Return -1 if the number isn't known.
5925 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5927 static HOST_WIDE_INT
5928 count_type_elements (const_tree type
, bool for_ctor_p
)
5930 switch (TREE_CODE (type
))
5936 nelts
= array_type_nelts (type
);
5937 if (nelts
&& tree_fits_uhwi_p (nelts
))
5939 unsigned HOST_WIDE_INT n
;
5941 n
= tree_to_uhwi (nelts
) + 1;
5942 if (n
== 0 || for_ctor_p
)
5945 return n
* count_type_elements (TREE_TYPE (type
), false);
5947 return for_ctor_p
? -1 : 1;
5952 unsigned HOST_WIDE_INT n
;
5956 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5957 if (TREE_CODE (f
) == FIELD_DECL
)
5960 n
+= count_type_elements (TREE_TYPE (f
), false);
5961 else if (!flexible_array_member_p (f
, type
))
5962 /* Don't count flexible arrays, which are not supposed
5963 to be initialized. */
5971 case QUAL_UNION_TYPE
:
5976 gcc_assert (!for_ctor_p
);
5977 /* Estimate the number of scalars in each field and pick the
5978 maximum. Other estimates would do instead; the idea is simply
5979 to make sure that the estimate is not sensitive to the ordering
5982 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5983 if (TREE_CODE (f
) == FIELD_DECL
)
5985 m
= count_type_elements (TREE_TYPE (f
), false);
5986 /* If the field doesn't span the whole union, add an extra
5987 scalar for the rest. */
5988 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5989 TYPE_SIZE (type
)) != 1)
6002 unsigned HOST_WIDE_INT nelts
;
6003 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
6011 case FIXED_POINT_TYPE
:
6016 case REFERENCE_TYPE
:
6032 /* Helper for categorize_ctor_elements. Identical interface. */
6035 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6036 HOST_WIDE_INT
*p_unique_nz_elts
,
6037 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6039 unsigned HOST_WIDE_INT idx
;
6040 HOST_WIDE_INT nz_elts
, unique_nz_elts
, init_elts
, num_fields
;
6041 tree value
, purpose
, elt_type
;
6043 /* Whether CTOR is a valid constant initializer, in accordance with what
6044 initializer_constant_valid_p does. If inferred from the constructor
6045 elements, true until proven otherwise. */
6046 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
6047 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
6053 elt_type
= NULL_TREE
;
6055 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
6057 HOST_WIDE_INT mult
= 1;
6059 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
6061 tree lo_index
= TREE_OPERAND (purpose
, 0);
6062 tree hi_index
= TREE_OPERAND (purpose
, 1);
6064 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
6065 mult
= (tree_to_uhwi (hi_index
)
6066 - tree_to_uhwi (lo_index
) + 1);
6069 elt_type
= TREE_TYPE (value
);
6071 switch (TREE_CODE (value
))
6075 HOST_WIDE_INT nz
= 0, unz
= 0, ic
= 0;
6077 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &unz
,
6080 nz_elts
+= mult
* nz
;
6081 unique_nz_elts
+= unz
;
6082 init_elts
+= mult
* ic
;
6084 if (const_from_elts_p
&& const_p
)
6085 const_p
= const_elt_p
;
6092 if (!initializer_zerop (value
))
6101 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6102 unique_nz_elts
+= TREE_STRING_LENGTH (value
);
6103 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6107 if (!initializer_zerop (TREE_REALPART (value
)))
6112 if (!initializer_zerop (TREE_IMAGPART (value
)))
6117 init_elts
+= 2 * mult
;
6122 /* We can only construct constant-length vectors using
6124 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6125 for (unsigned int i
= 0; i
< nunits
; ++i
)
6127 tree v
= VECTOR_CST_ELT (value
, i
);
6128 if (!initializer_zerop (v
))
6140 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6141 nz_elts
+= mult
* tc
;
6142 unique_nz_elts
+= tc
;
6143 init_elts
+= mult
* tc
;
6145 if (const_from_elts_p
&& const_p
)
6147 = initializer_constant_valid_p (value
,
6149 TYPE_REVERSE_STORAGE_ORDER
6157 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6158 num_fields
, elt_type
))
6159 *p_complete
= false;
6161 *p_nz_elts
+= nz_elts
;
6162 *p_unique_nz_elts
+= unique_nz_elts
;
6163 *p_init_elts
+= init_elts
;
6168 /* Examine CTOR to discover:
6169 * how many scalar fields are set to nonzero values,
6170 and place it in *P_NZ_ELTS;
6171 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6172 high - low + 1 (this can be useful for callers to determine ctors
6173 that could be cheaply initialized with - perhaps nested - loops
6174 compared to copied from huge read-only data),
6175 and place it in *P_UNIQUE_NZ_ELTS;
6176 * how many scalar fields in total are in CTOR,
6177 and place it in *P_ELT_COUNT.
6178 * whether the constructor is complete -- in the sense that every
6179 meaningful byte is explicitly given a value --
6180 and place it in *P_COMPLETE.
6182 Return whether or not CTOR is a valid static constant initializer, the same
6183 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6186 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6187 HOST_WIDE_INT
*p_unique_nz_elts
,
6188 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6191 *p_unique_nz_elts
= 0;
6195 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_unique_nz_elts
,
6196 p_init_elts
, p_complete
);
6199 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6200 of which had type LAST_TYPE. Each element was itself a complete
6201 initializer, in the sense that every meaningful byte was explicitly
6202 given a value. Return true if the same is true for the constructor
6206 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6207 const_tree last_type
)
6209 if (TREE_CODE (type
) == UNION_TYPE
6210 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6215 gcc_assert (num_elts
== 1 && last_type
);
6217 /* ??? We could look at each element of the union, and find the
6218 largest element. Which would avoid comparing the size of the
6219 initialized element against any tail padding in the union.
6220 Doesn't seem worth the effort... */
6221 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6224 return count_type_elements (type
, true) == num_elts
;
6227 /* Return 1 if EXP contains mostly (3/4) zeros. */
6230 mostly_zeros_p (const_tree exp
)
6232 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6234 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6237 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6239 return !complete_p
|| nz_elts
< init_elts
/ 4;
6242 return initializer_zerop (exp
);
6245 /* Return 1 if EXP contains all zeros. */
6248 all_zeros_p (const_tree exp
)
6250 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6252 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6255 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6257 return nz_elts
== 0;
6260 return initializer_zerop (exp
);
6263 /* Helper function for store_constructor.
6264 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6265 CLEARED is as for store_constructor.
6266 ALIAS_SET is the alias set to use for any stores.
6267 If REVERSE is true, the store is to be done in reverse order.
6269 This provides a recursive shortcut back to store_constructor when it isn't
6270 necessary to go through store_field. This is so that we can pass through
6271 the cleared field to let store_constructor know that we may not have to
6272 clear a substructure if the outer structure has already been cleared. */
6275 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6276 poly_uint64 bitregion_start
,
6277 poly_uint64 bitregion_end
,
6279 tree exp
, int cleared
,
6280 alias_set_type alias_set
, bool reverse
)
6283 poly_uint64 bytesize
;
6284 if (TREE_CODE (exp
) == CONSTRUCTOR
6285 /* We can only call store_constructor recursively if the size and
6286 bit position are on a byte boundary. */
6287 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6288 && maybe_ne (bitsize
, 0U)
6289 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6290 /* If we have a nonzero bitpos for a register target, then we just
6291 let store_field do the bitfield handling. This is unlikely to
6292 generate unnecessary clear instructions anyways. */
6293 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6297 machine_mode target_mode
= GET_MODE (target
);
6298 if (target_mode
!= BLKmode
6299 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6300 target_mode
= BLKmode
;
6301 target
= adjust_address (target
, target_mode
, bytepos
);
6305 /* Update the alias set, if required. */
6306 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6307 && MEM_ALIAS_SET (target
) != 0)
6309 target
= copy_rtx (target
);
6310 set_mem_alias_set (target
, alias_set
);
6313 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6316 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6317 exp
, alias_set
, false, reverse
);
6321 /* Returns the number of FIELD_DECLs in TYPE. */
6324 fields_length (const_tree type
)
6326 tree t
= TYPE_FIELDS (type
);
6329 for (; t
; t
= DECL_CHAIN (t
))
6330 if (TREE_CODE (t
) == FIELD_DECL
)
6337 /* Store the value of constructor EXP into the rtx TARGET.
6338 TARGET is either a REG or a MEM; we know it cannot conflict, since
6339 safe_from_p has been called.
6340 CLEARED is true if TARGET is known to have been zero'd.
6341 SIZE is the number of bytes of TARGET we are allowed to modify: this
6342 may not be the same as the size of EXP if we are assigning to a field
6343 which has been packed to exclude padding bits.
6344 If REVERSE is true, the store is to be done in reverse order. */
6347 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6350 tree type
= TREE_TYPE (exp
);
6351 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6352 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6354 switch (TREE_CODE (type
))
6358 case QUAL_UNION_TYPE
:
6360 unsigned HOST_WIDE_INT idx
;
6363 /* The storage order is specified for every aggregate type. */
6364 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6366 /* If size is zero or the target is already cleared, do nothing. */
6367 if (known_eq (size
, 0) || cleared
)
6369 /* We either clear the aggregate or indicate the value is dead. */
6370 else if ((TREE_CODE (type
) == UNION_TYPE
6371 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6372 && ! CONSTRUCTOR_ELTS (exp
))
6373 /* If the constructor is empty, clear the union. */
6375 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6379 /* If we are building a static constructor into a register,
6380 set the initial value as zero so we can fold the value into
6381 a constant. But if more than one register is involved,
6382 this probably loses. */
6383 else if (REG_P (target
) && TREE_STATIC (exp
)
6384 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6385 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6387 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6391 /* If the constructor has fewer fields than the structure or
6392 if we are initializing the structure to mostly zeros, clear
6393 the whole structure first. Don't do this if TARGET is a
6394 register whose mode size isn't equal to SIZE since
6395 clear_storage can't handle this case. */
6396 else if (known_size_p (size
)
6397 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6398 || mostly_zeros_p (exp
))
6400 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6402 clear_storage (target
, gen_int_mode (size
, Pmode
),
6407 if (REG_P (target
) && !cleared
)
6408 emit_clobber (target
);
6410 /* Store each element of the constructor into the
6411 corresponding field of TARGET. */
6412 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6415 HOST_WIDE_INT bitsize
;
6416 HOST_WIDE_INT bitpos
= 0;
6418 rtx to_rtx
= target
;
6420 /* Just ignore missing fields. We cleared the whole
6421 structure, above, if any fields are missing. */
6425 if (cleared
&& initializer_zerop (value
))
6428 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6429 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6433 mode
= DECL_MODE (field
);
6434 if (DECL_BIT_FIELD (field
))
6437 offset
= DECL_FIELD_OFFSET (field
);
6438 if (tree_fits_shwi_p (offset
)
6439 && tree_fits_shwi_p (bit_position (field
)))
6441 bitpos
= int_bit_position (field
);
6447 /* If this initializes a field that is smaller than a
6448 word, at the start of a word, try to widen it to a full
6449 word. This special case allows us to output C++ member
6450 function initializations in a form that the optimizers
6452 if (WORD_REGISTER_OPERATIONS
6454 && bitsize
< BITS_PER_WORD
6455 && bitpos
% BITS_PER_WORD
== 0
6456 && GET_MODE_CLASS (mode
) == MODE_INT
6457 && TREE_CODE (value
) == INTEGER_CST
6459 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6461 type
= TREE_TYPE (value
);
6463 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6465 type
= lang_hooks
.types
.type_for_mode
6466 (word_mode
, TYPE_UNSIGNED (type
));
6467 value
= fold_convert (type
, value
);
6468 /* Make sure the bits beyond the original bitsize are zero
6469 so that we can correctly avoid extra zeroing stores in
6470 later constructor elements. */
6472 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6474 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6477 if (BYTES_BIG_ENDIAN
)
6479 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6480 build_int_cst (type
,
6481 BITS_PER_WORD
- bitsize
));
6482 bitsize
= BITS_PER_WORD
;
6486 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6487 && DECL_NONADDRESSABLE_P (field
))
6489 to_rtx
= copy_rtx (to_rtx
);
6490 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6493 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6494 0, bitregion_end
, mode
,
6496 get_alias_set (TREE_TYPE (field
)),
6504 unsigned HOST_WIDE_INT i
;
6507 tree elttype
= TREE_TYPE (type
);
6509 HOST_WIDE_INT minelt
= 0;
6510 HOST_WIDE_INT maxelt
= 0;
6512 /* The storage order is specified for every aggregate type. */
6513 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6515 domain
= TYPE_DOMAIN (type
);
6516 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6517 && TYPE_MAX_VALUE (domain
)
6518 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6519 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6521 /* If we have constant bounds for the range of the type, get them. */
6524 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6525 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6528 /* If the constructor has fewer elements than the array, clear
6529 the whole array first. Similarly if this is static
6530 constructor of a non-BLKmode object. */
6533 else if (REG_P (target
) && TREE_STATIC (exp
))
6537 unsigned HOST_WIDE_INT idx
;
6538 HOST_WIDE_INT count
= 0, zero_count
= 0;
6539 need_to_clear
= ! const_bounds_p
;
6541 /* This loop is a more accurate version of the loop in
6542 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6543 is also needed to check for missing elements. */
6544 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6546 HOST_WIDE_INT this_node_count
;
6551 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6553 tree lo_index
= TREE_OPERAND (index
, 0);
6554 tree hi_index
= TREE_OPERAND (index
, 1);
6556 if (! tree_fits_uhwi_p (lo_index
)
6557 || ! tree_fits_uhwi_p (hi_index
))
6563 this_node_count
= (tree_to_uhwi (hi_index
)
6564 - tree_to_uhwi (lo_index
) + 1);
6567 this_node_count
= 1;
6569 count
+= this_node_count
;
6570 if (mostly_zeros_p (value
))
6571 zero_count
+= this_node_count
;
6574 /* Clear the entire array first if there are any missing
6575 elements, or if the incidence of zero elements is >=
6578 && (count
< maxelt
- minelt
+ 1
6579 || 4 * zero_count
>= 3 * count
))
6583 if (need_to_clear
&& maybe_gt (size
, 0))
6586 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6588 clear_storage (target
, gen_int_mode (size
, Pmode
),
6593 if (!cleared
&& REG_P (target
))
6594 /* Inform later passes that the old value is dead. */
6595 emit_clobber (target
);
6597 /* Store each element of the constructor into the
6598 corresponding element of TARGET, determined by counting the
6600 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6604 HOST_WIDE_INT bitpos
;
6605 rtx xtarget
= target
;
6607 if (cleared
&& initializer_zerop (value
))
6610 mode
= TYPE_MODE (elttype
);
6611 if (mode
!= BLKmode
)
6612 bitsize
= GET_MODE_BITSIZE (mode
);
6613 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6616 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6618 tree lo_index
= TREE_OPERAND (index
, 0);
6619 tree hi_index
= TREE_OPERAND (index
, 1);
6620 rtx index_r
, pos_rtx
;
6621 HOST_WIDE_INT lo
, hi
, count
;
6624 /* If the range is constant and "small", unroll the loop. */
6626 && tree_fits_shwi_p (lo_index
)
6627 && tree_fits_shwi_p (hi_index
)
6628 && (lo
= tree_to_shwi (lo_index
),
6629 hi
= tree_to_shwi (hi_index
),
6630 count
= hi
- lo
+ 1,
6633 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6634 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6637 lo
-= minelt
; hi
-= minelt
;
6638 for (; lo
<= hi
; lo
++)
6640 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6643 && !MEM_KEEP_ALIAS_SET_P (target
)
6644 && TREE_CODE (type
) == ARRAY_TYPE
6645 && TYPE_NONALIASED_COMPONENT (type
))
6647 target
= copy_rtx (target
);
6648 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6651 store_constructor_field
6652 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6653 mode
, value
, cleared
,
6654 get_alias_set (elttype
), reverse
);
6659 rtx_code_label
*loop_start
= gen_label_rtx ();
6660 rtx_code_label
*loop_end
= gen_label_rtx ();
6663 expand_normal (hi_index
);
6665 index
= build_decl (EXPR_LOCATION (exp
),
6666 VAR_DECL
, NULL_TREE
, domain
);
6667 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6668 SET_DECL_RTL (index
, index_r
);
6669 store_expr (lo_index
, index_r
, 0, false, reverse
);
6671 /* Build the head of the loop. */
6672 do_pending_stack_adjust ();
6673 emit_label (loop_start
);
6675 /* Assign value to element index. */
6677 fold_convert (ssizetype
,
6678 fold_build2 (MINUS_EXPR
,
6681 TYPE_MIN_VALUE (domain
)));
6684 size_binop (MULT_EXPR
, position
,
6685 fold_convert (ssizetype
,
6686 TYPE_SIZE_UNIT (elttype
)));
6688 pos_rtx
= expand_normal (position
);
6689 xtarget
= offset_address (target
, pos_rtx
,
6690 highest_pow2_factor (position
));
6691 xtarget
= adjust_address (xtarget
, mode
, 0);
6692 if (TREE_CODE (value
) == CONSTRUCTOR
)
6693 store_constructor (value
, xtarget
, cleared
,
6694 exact_div (bitsize
, BITS_PER_UNIT
),
6697 store_expr (value
, xtarget
, 0, false, reverse
);
6699 /* Generate a conditional jump to exit the loop. */
6700 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6702 jumpif (exit_cond
, loop_end
,
6703 profile_probability::uninitialized ());
6705 /* Update the loop counter, and jump to the head of
6707 expand_assignment (index
,
6708 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6709 index
, integer_one_node
),
6712 emit_jump (loop_start
);
6714 /* Build the end of the loop. */
6715 emit_label (loop_end
);
6718 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6719 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6724 index
= ssize_int (1);
6727 index
= fold_convert (ssizetype
,
6728 fold_build2 (MINUS_EXPR
,
6731 TYPE_MIN_VALUE (domain
)));
6734 size_binop (MULT_EXPR
, index
,
6735 fold_convert (ssizetype
,
6736 TYPE_SIZE_UNIT (elttype
)));
6737 xtarget
= offset_address (target
,
6738 expand_normal (position
),
6739 highest_pow2_factor (position
));
6740 xtarget
= adjust_address (xtarget
, mode
, 0);
6741 store_expr (value
, xtarget
, 0, false, reverse
);
6746 bitpos
= ((tree_to_shwi (index
) - minelt
)
6747 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6749 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6751 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6752 && TREE_CODE (type
) == ARRAY_TYPE
6753 && TYPE_NONALIASED_COMPONENT (type
))
6755 target
= copy_rtx (target
);
6756 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6758 store_constructor_field (target
, bitsize
, bitpos
, 0,
6759 bitregion_end
, mode
, value
,
6760 cleared
, get_alias_set (elttype
),
6769 unsigned HOST_WIDE_INT idx
;
6770 constructor_elt
*ce
;
6773 insn_code icode
= CODE_FOR_nothing
;
6775 tree elttype
= TREE_TYPE (type
);
6776 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6777 machine_mode eltmode
= TYPE_MODE (elttype
);
6778 HOST_WIDE_INT bitsize
;
6779 HOST_WIDE_INT bitpos
;
6780 rtvec vector
= NULL
;
6782 unsigned HOST_WIDE_INT const_n_elts
;
6783 alias_set_type alias
;
6784 bool vec_vec_init_p
= false;
6785 machine_mode mode
= GET_MODE (target
);
6787 gcc_assert (eltmode
!= BLKmode
);
6789 /* Try using vec_duplicate_optab for uniform vectors. */
6790 if (!TREE_SIDE_EFFECTS (exp
)
6791 && VECTOR_MODE_P (mode
)
6792 && eltmode
== GET_MODE_INNER (mode
)
6793 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6794 != CODE_FOR_nothing
)
6795 && (elt
= uniform_vector_p (exp
)))
6797 class expand_operand ops
[2];
6798 create_output_operand (&ops
[0], target
, mode
);
6799 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6800 expand_insn (icode
, 2, ops
);
6801 if (!rtx_equal_p (target
, ops
[0].value
))
6802 emit_move_insn (target
, ops
[0].value
);
6806 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6808 && VECTOR_MODE_P (mode
)
6809 && n_elts
.is_constant (&const_n_elts
))
6811 machine_mode emode
= eltmode
;
6813 if (CONSTRUCTOR_NELTS (exp
)
6814 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6817 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6818 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6819 * TYPE_VECTOR_SUBPARTS (etype
),
6821 emode
= TYPE_MODE (etype
);
6823 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6824 if (icode
!= CODE_FOR_nothing
)
6826 unsigned int n
= const_n_elts
;
6828 if (emode
!= eltmode
)
6830 n
= CONSTRUCTOR_NELTS (exp
);
6831 vec_vec_init_p
= true;
6833 vector
= rtvec_alloc (n
);
6834 for (unsigned int k
= 0; k
< n
; k
++)
6835 RTVEC_ELT (vector
, k
) = CONST0_RTX (emode
);
6839 /* If the constructor has fewer elements than the vector,
6840 clear the whole array first. Similarly if this is static
6841 constructor of a non-BLKmode object. */
6844 else if (REG_P (target
) && TREE_STATIC (exp
))
6848 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6851 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6853 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6855 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6856 TYPE_SIZE (elttype
)));
6858 count
+= n_elts_here
;
6859 if (mostly_zeros_p (value
))
6860 zero_count
+= n_elts_here
;
6863 /* Clear the entire vector first if there are any missing elements,
6864 or if the incidence of zero elements is >= 75%. */
6865 need_to_clear
= (maybe_lt (count
, n_elts
)
6866 || 4 * zero_count
>= 3 * count
);
6869 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
6872 emit_move_insn (target
, CONST0_RTX (mode
));
6874 clear_storage (target
, gen_int_mode (size
, Pmode
),
6879 /* Inform later passes that the old value is dead. */
6880 if (!cleared
&& !vector
&& REG_P (target
))
6881 emit_move_insn (target
, CONST0_RTX (mode
));
6884 alias
= MEM_ALIAS_SET (target
);
6886 alias
= get_alias_set (elttype
);
6888 /* Store each element of the constructor into the corresponding
6889 element of TARGET, determined by counting the elements. */
6890 for (idx
= 0, i
= 0;
6891 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6892 idx
++, i
+= bitsize
/ elt_size
)
6894 HOST_WIDE_INT eltpos
;
6895 tree value
= ce
->value
;
6897 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6898 if (cleared
&& initializer_zerop (value
))
6902 eltpos
= tree_to_uhwi (ce
->index
);
6910 gcc_assert (ce
->index
== NULL_TREE
);
6911 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6915 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6916 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6920 machine_mode value_mode
6921 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6922 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6923 bitpos
= eltpos
* elt_size
;
6924 store_constructor_field (target
, bitsize
, bitpos
, 0,
6925 bitregion_end
, value_mode
,
6926 value
, cleared
, alias
, reverse
);
6931 emit_insn (GEN_FCN (icode
) (target
,
6932 gen_rtx_PARALLEL (mode
, vector
)));
6941 /* Store the value of EXP (an expression tree)
6942 into a subfield of TARGET which has mode MODE and occupies
6943 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6944 If MODE is VOIDmode, it means that we are storing into a bit-field.
6946 BITREGION_START is bitpos of the first bitfield in this region.
6947 BITREGION_END is the bitpos of the ending bitfield in this region.
6948 These two fields are 0, if the C++ memory model does not apply,
6949 or we are not interested in keeping track of bitfield regions.
6951 Always return const0_rtx unless we have something particular to
6954 ALIAS_SET is the alias set for the destination. This value will
6955 (in general) be different from that for TARGET, since TARGET is a
6956 reference to the containing structure.
6958 If NONTEMPORAL is true, try generating a nontemporal store.
6960 If REVERSE is true, the store is to be done in reverse order. */
6963 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
6964 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
6965 machine_mode mode
, tree exp
,
6966 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6968 if (TREE_CODE (exp
) == ERROR_MARK
)
6971 /* If we have nothing to store, do nothing unless the expression has
6972 side-effects. Don't do that for zero sized addressable lhs of
6974 if (known_eq (bitsize
, 0)
6975 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6976 || TREE_CODE (exp
) != CALL_EXPR
))
6977 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6979 if (GET_CODE (target
) == CONCAT
)
6981 /* We're storing into a struct containing a single __complex. */
6983 gcc_assert (known_eq (bitpos
, 0));
6984 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6987 /* If the structure is in a register or if the component
6988 is a bit field, we cannot use addressing to access it.
6989 Use bit-field techniques or SUBREG to store in it. */
6991 poly_int64 decl_bitsize
;
6992 if (mode
== VOIDmode
6993 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6994 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6995 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6997 || GET_CODE (target
) == SUBREG
6998 /* If the field isn't aligned enough to store as an ordinary memref,
6999 store it as a bit field. */
7001 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
7002 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
7003 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
7004 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
7005 || (known_size_p (bitsize
)
7007 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
7008 /* If the RHS and field are a constant size and the size of the
7009 RHS isn't the same size as the bitfield, we must use bitfield
7011 || (known_size_p (bitsize
)
7012 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
7013 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
7015 /* Except for initialization of full bytes from a CONSTRUCTOR, which
7016 we will handle specially below. */
7017 && !(TREE_CODE (exp
) == CONSTRUCTOR
7018 && multiple_p (bitsize
, BITS_PER_UNIT
))
7019 /* And except for bitwise copying of TREE_ADDRESSABLE types,
7020 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
7021 includes some extra padding. store_expr / expand_expr will in
7022 that case call get_inner_reference that will have the bitsize
7023 we check here and thus the block move will not clobber the
7024 padding that shouldn't be clobbered. In the future we could
7025 replace the TREE_ADDRESSABLE check with a check that
7026 get_base_address needs to live in memory. */
7027 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7028 || TREE_CODE (exp
) != COMPONENT_REF
7029 || !multiple_p (bitsize
, BITS_PER_UNIT
)
7030 || !multiple_p (bitpos
, BITS_PER_UNIT
)
7031 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
7033 || maybe_ne (decl_bitsize
, bitsize
)))
7034 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
7035 decl we must use bitfield operations. */
7036 || (known_size_p (bitsize
)
7037 && TREE_CODE (exp
) == MEM_REF
7038 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
7039 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7040 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7041 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
7046 /* If EXP is a NOP_EXPR of precision less than its mode, then that
7047 implies a mask operation. If the precision is the same size as
7048 the field we're storing into, that mask is redundant. This is
7049 particularly common with bit field assignments generated by the
7051 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
7054 tree type
= TREE_TYPE (exp
);
7055 if (INTEGRAL_TYPE_P (type
)
7056 && maybe_ne (TYPE_PRECISION (type
),
7057 GET_MODE_BITSIZE (TYPE_MODE (type
)))
7058 && known_eq (bitsize
, TYPE_PRECISION (type
)))
7060 tree op
= gimple_assign_rhs1 (nop_def
);
7061 type
= TREE_TYPE (op
);
7062 if (INTEGRAL_TYPE_P (type
)
7063 && known_ge (TYPE_PRECISION (type
), bitsize
))
7068 temp
= expand_normal (exp
);
7070 /* We don't support variable-sized BLKmode bitfields, since our
7071 handling of BLKmode is bound up with the ability to break
7072 things into words. */
7073 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
7075 /* Handle calls that return values in multiple non-contiguous locations.
7076 The Irix 6 ABI has examples of this. */
7077 if (GET_CODE (temp
) == PARALLEL
)
7079 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
7080 machine_mode temp_mode
= GET_MODE (temp
);
7081 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
7082 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
7083 rtx temp_target
= gen_reg_rtx (temp_mode
);
7084 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
7088 /* Handle calls that return BLKmode values in registers. */
7089 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
7091 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7092 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7096 /* If the value has aggregate type and an integral mode then, if BITSIZE
7097 is narrower than this mode and this is for big-endian data, we first
7098 need to put the value into the low-order bits for store_bit_field,
7099 except when MODE is BLKmode and BITSIZE larger than the word size
7100 (see the handling of fields larger than a word in store_bit_field).
7101 Moreover, the field may be not aligned on a byte boundary; in this
7102 case, if it has reverse storage order, it needs to be accessed as a
7103 scalar field with reverse storage order and we must first put the
7104 value into target order. */
7105 scalar_int_mode temp_mode
;
7106 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7107 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7109 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7111 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7114 temp
= flip_storage_order (temp_mode
, temp
);
7116 gcc_checking_assert (known_le (bitsize
, size
));
7117 if (maybe_lt (bitsize
, size
)
7118 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7119 /* Use of to_constant for BLKmode was checked above. */
7120 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7121 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7122 size
- bitsize
, NULL_RTX
, 1);
7125 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7126 if (mode
!= VOIDmode
&& mode
!= BLKmode
7127 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7128 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7130 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7131 and BITPOS must be aligned on a byte boundary. If so, we simply do
7132 a block copy. Likewise for a BLKmode-like TARGET. */
7133 if (GET_MODE (temp
) == BLKmode
7134 && (GET_MODE (target
) == BLKmode
7136 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7137 && multiple_p (bitpos
, BITS_PER_UNIT
)
7138 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7140 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7141 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7142 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7144 target
= adjust_address (target
, VOIDmode
, bytepos
);
7145 emit_block_move (target
, temp
,
7146 gen_int_mode (bytesize
, Pmode
),
7152 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7153 word size, we need to load the value (see again store_bit_field). */
7154 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7156 temp_mode
= smallest_int_mode_for_size (bitsize
);
7157 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7158 temp_mode
, false, NULL
);
7161 /* Store the value in the bitfield. */
7162 gcc_checking_assert (known_ge (bitpos
, 0));
7163 store_bit_field (target
, bitsize
, bitpos
,
7164 bitregion_start
, bitregion_end
,
7165 mode
, temp
, reverse
);
7171 /* Now build a reference to just the desired component. */
7172 rtx to_rtx
= adjust_address (target
, mode
,
7173 exact_div (bitpos
, BITS_PER_UNIT
));
7175 if (to_rtx
== target
)
7176 to_rtx
= copy_rtx (to_rtx
);
7178 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7179 set_mem_alias_set (to_rtx
, alias_set
);
7181 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7182 into a target smaller than its type; handle that case now. */
7183 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7185 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7186 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7190 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7194 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7195 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7196 codes and find the ultimate containing object, which we return.
7198 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7199 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7200 storage order of the field.
7201 If the position of the field is variable, we store a tree
7202 giving the variable offset (in units) in *POFFSET.
7203 This offset is in addition to the bit position.
7204 If the position is not variable, we store 0 in *POFFSET.
7206 If any of the extraction expressions is volatile,
7207 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7209 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7210 Otherwise, it is a mode that can be used to access the field.
7212 If the field describes a variable-sized object, *PMODE is set to
7213 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7214 this case, but the address of the object can be found. */
7217 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7218 poly_int64_pod
*pbitpos
, tree
*poffset
,
7219 machine_mode
*pmode
, int *punsignedp
,
7220 int *preversep
, int *pvolatilep
)
7223 machine_mode mode
= VOIDmode
;
7224 bool blkmode_bitfield
= false;
7225 tree offset
= size_zero_node
;
7226 poly_offset_int bit_offset
= 0;
7228 /* First get the mode, signedness, storage order and size. We do this from
7229 just the outermost expression. */
7231 if (TREE_CODE (exp
) == COMPONENT_REF
)
7233 tree field
= TREE_OPERAND (exp
, 1);
7234 size_tree
= DECL_SIZE (field
);
7235 if (flag_strict_volatile_bitfields
> 0
7236 && TREE_THIS_VOLATILE (exp
)
7237 && DECL_BIT_FIELD_TYPE (field
)
7238 && DECL_MODE (field
) != BLKmode
)
7239 /* Volatile bitfields should be accessed in the mode of the
7240 field's type, not the mode computed based on the bit
7242 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7243 else if (!DECL_BIT_FIELD (field
))
7245 mode
= DECL_MODE (field
);
7246 /* For vector fields re-check the target flags, as DECL_MODE
7247 could have been set with different target flags than
7248 the current function has. */
7250 && VECTOR_TYPE_P (TREE_TYPE (field
))
7251 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7252 mode
= TYPE_MODE (TREE_TYPE (field
));
7254 else if (DECL_MODE (field
) == BLKmode
)
7255 blkmode_bitfield
= true;
7257 *punsignedp
= DECL_UNSIGNED (field
);
7259 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7261 size_tree
= TREE_OPERAND (exp
, 1);
7262 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7263 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7265 /* For vector element types with the correct size of access or for
7266 vector typed accesses use the mode of the access type. */
7267 if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7268 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7269 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7270 || VECTOR_TYPE_P (TREE_TYPE (exp
)))
7271 mode
= TYPE_MODE (TREE_TYPE (exp
));
7275 mode
= TYPE_MODE (TREE_TYPE (exp
));
7276 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7278 if (mode
== BLKmode
)
7279 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7281 *pbitsize
= GET_MODE_BITSIZE (mode
);
7286 if (! tree_fits_uhwi_p (size_tree
))
7287 mode
= BLKmode
, *pbitsize
= -1;
7289 *pbitsize
= tree_to_uhwi (size_tree
);
7292 *preversep
= reverse_storage_order_for_component_p (exp
);
7294 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7295 and find the ultimate containing object. */
7298 switch (TREE_CODE (exp
))
7301 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7306 tree field
= TREE_OPERAND (exp
, 1);
7307 tree this_offset
= component_ref_field_offset (exp
);
7309 /* If this field hasn't been filled in yet, don't go past it.
7310 This should only happen when folding expressions made during
7311 type construction. */
7312 if (this_offset
== 0)
7315 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7316 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7318 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7323 case ARRAY_RANGE_REF
:
7325 tree index
= TREE_OPERAND (exp
, 1);
7326 tree low_bound
= array_ref_low_bound (exp
);
7327 tree unit_size
= array_ref_element_size (exp
);
7329 /* We assume all arrays have sizes that are a multiple of a byte.
7330 First subtract the lower bound, if any, in the type of the
7331 index, then convert to sizetype and multiply by the size of
7332 the array element. */
7333 if (! integer_zerop (low_bound
))
7334 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7337 offset
= size_binop (PLUS_EXPR
, offset
,
7338 size_binop (MULT_EXPR
,
7339 fold_convert (sizetype
, index
),
7348 bit_offset
+= *pbitsize
;
7351 case VIEW_CONVERT_EXPR
:
7355 /* Hand back the decl for MEM[&decl, off]. */
7356 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7358 tree off
= TREE_OPERAND (exp
, 1);
7359 if (!integer_zerop (off
))
7361 poly_offset_int boff
= mem_ref_offset (exp
);
7362 boff
<<= LOG2_BITS_PER_UNIT
;
7365 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7373 /* If any reference in the chain is volatile, the effect is volatile. */
7374 if (TREE_THIS_VOLATILE (exp
))
7377 exp
= TREE_OPERAND (exp
, 0);
7381 /* If OFFSET is constant, see if we can return the whole thing as a
7382 constant bit position. Make sure to handle overflow during
7384 if (poly_int_tree_p (offset
))
7386 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7387 TYPE_PRECISION (sizetype
));
7388 tem
<<= LOG2_BITS_PER_UNIT
;
7390 if (tem
.to_shwi (pbitpos
))
7391 *poffset
= offset
= NULL_TREE
;
7394 /* Otherwise, split it up. */
7397 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7398 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7400 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7401 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7402 offset
= size_binop (PLUS_EXPR
, offset
,
7403 build_int_cst (sizetype
, bytes
.force_shwi ()));
7409 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7410 if (mode
== VOIDmode
7412 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7413 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7421 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7423 static unsigned HOST_WIDE_INT
7424 target_align (const_tree target
)
7426 /* We might have a chain of nested references with intermediate misaligning
7427 bitfields components, so need to recurse to find out. */
7429 unsigned HOST_WIDE_INT this_align
, outer_align
;
7431 switch (TREE_CODE (target
))
7437 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7438 outer_align
= target_align (TREE_OPERAND (target
, 0));
7439 return MIN (this_align
, outer_align
);
7442 case ARRAY_RANGE_REF
:
7443 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7444 outer_align
= target_align (TREE_OPERAND (target
, 0));
7445 return MIN (this_align
, outer_align
);
7448 case NON_LVALUE_EXPR
:
7449 case VIEW_CONVERT_EXPR
:
7450 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7451 outer_align
= target_align (TREE_OPERAND (target
, 0));
7452 return MAX (this_align
, outer_align
);
7455 return TYPE_ALIGN (TREE_TYPE (target
));
7460 /* Given an rtx VALUE that may contain additions and multiplications, return
7461 an equivalent value that just refers to a register, memory, or constant.
7462 This is done by generating instructions to perform the arithmetic and
7463 returning a pseudo-register containing the value.
7465 The returned value may be a REG, SUBREG, MEM or constant. */
7468 force_operand (rtx value
, rtx target
)
7471 /* Use subtarget as the target for operand 0 of a binary operation. */
7472 rtx subtarget
= get_subtarget (target
);
7473 enum rtx_code code
= GET_CODE (value
);
7475 /* Check for subreg applied to an expression produced by loop optimizer. */
7477 && !REG_P (SUBREG_REG (value
))
7478 && !MEM_P (SUBREG_REG (value
)))
7481 = simplify_gen_subreg (GET_MODE (value
),
7482 force_reg (GET_MODE (SUBREG_REG (value
)),
7483 force_operand (SUBREG_REG (value
),
7485 GET_MODE (SUBREG_REG (value
)),
7486 SUBREG_BYTE (value
));
7487 code
= GET_CODE (value
);
7490 /* Check for a PIC address load. */
7491 if ((code
== PLUS
|| code
== MINUS
)
7492 && XEXP (value
, 0) == pic_offset_table_rtx
7493 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7494 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7495 || GET_CODE (XEXP (value
, 1)) == CONST
))
7498 subtarget
= gen_reg_rtx (GET_MODE (value
));
7499 emit_move_insn (subtarget
, value
);
7503 if (ARITHMETIC_P (value
))
7505 op2
= XEXP (value
, 1);
7506 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7508 if (code
== MINUS
&& CONST_INT_P (op2
))
7511 op2
= negate_rtx (GET_MODE (value
), op2
);
7514 /* Check for an addition with OP2 a constant integer and our first
7515 operand a PLUS of a virtual register and something else. In that
7516 case, we want to emit the sum of the virtual register and the
7517 constant first and then add the other value. This allows virtual
7518 register instantiation to simply modify the constant rather than
7519 creating another one around this addition. */
7520 if (code
== PLUS
&& CONST_INT_P (op2
)
7521 && GET_CODE (XEXP (value
, 0)) == PLUS
7522 && REG_P (XEXP (XEXP (value
, 0), 0))
7523 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7524 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7526 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7527 XEXP (XEXP (value
, 0), 0), op2
,
7528 subtarget
, 0, OPTAB_LIB_WIDEN
);
7529 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7530 force_operand (XEXP (XEXP (value
,
7532 target
, 0, OPTAB_LIB_WIDEN
);
7535 op1
= force_operand (XEXP (value
, 0), subtarget
);
7536 op2
= force_operand (op2
, NULL_RTX
);
7540 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7542 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7543 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7544 target
, 1, OPTAB_LIB_WIDEN
);
7546 return expand_divmod (0,
7547 FLOAT_MODE_P (GET_MODE (value
))
7548 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7549 GET_MODE (value
), op1
, op2
, target
, 0);
7551 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7554 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7557 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7560 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7561 target
, 0, OPTAB_LIB_WIDEN
);
7563 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7564 target
, 1, OPTAB_LIB_WIDEN
);
7567 if (UNARY_P (value
))
7570 target
= gen_reg_rtx (GET_MODE (value
));
7571 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7578 case FLOAT_TRUNCATE
:
7579 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7584 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7588 case UNSIGNED_FLOAT
:
7589 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7593 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7597 #ifdef INSN_SCHEDULING
7598 /* On machines that have insn scheduling, we want all memory reference to be
7599 explicit, so we need to deal with such paradoxical SUBREGs. */
7600 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7602 = simplify_gen_subreg (GET_MODE (value
),
7603 force_reg (GET_MODE (SUBREG_REG (value
)),
7604 force_operand (SUBREG_REG (value
),
7606 GET_MODE (SUBREG_REG (value
)),
7607 SUBREG_BYTE (value
));
7613 /* Subroutine of expand_expr: return nonzero iff there is no way that
7614 EXP can reference X, which is being modified. TOP_P is nonzero if this
7615 call is going to be used to determine whether we need a temporary
7616 for EXP, as opposed to a recursive call to this function.
7618 It is always safe for this routine to return zero since it merely
7619 searches for optimization opportunities. */
7622 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7628 /* If EXP has varying size, we MUST use a target since we currently
7629 have no way of allocating temporaries of variable size
7630 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7631 So we assume here that something at a higher level has prevented a
7632 clash. This is somewhat bogus, but the best we can do. Only
7633 do this when X is BLKmode and when we are at the top level. */
7634 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7635 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7636 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7637 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7638 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7640 && GET_MODE (x
) == BLKmode
)
7641 /* If X is in the outgoing argument area, it is always safe. */
7643 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7644 || (GET_CODE (XEXP (x
, 0)) == PLUS
7645 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7648 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7649 find the underlying pseudo. */
7650 if (GET_CODE (x
) == SUBREG
)
7653 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7657 /* Now look at our tree code and possibly recurse. */
7658 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7660 case tcc_declaration
:
7661 exp_rtl
= DECL_RTL_IF_SET (exp
);
7667 case tcc_exceptional
:
7668 if (TREE_CODE (exp
) == TREE_LIST
)
7672 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7674 exp
= TREE_CHAIN (exp
);
7677 if (TREE_CODE (exp
) != TREE_LIST
)
7678 return safe_from_p (x
, exp
, 0);
7681 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7683 constructor_elt
*ce
;
7684 unsigned HOST_WIDE_INT idx
;
7686 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7687 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7688 || !safe_from_p (x
, ce
->value
, 0))
7692 else if (TREE_CODE (exp
) == ERROR_MARK
)
7693 return 1; /* An already-visited SAVE_EXPR? */
7698 /* The only case we look at here is the DECL_INITIAL inside a
7700 return (TREE_CODE (exp
) != DECL_EXPR
7701 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7702 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7703 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7706 case tcc_comparison
:
7707 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7712 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7714 case tcc_expression
:
7717 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7718 the expression. If it is set, we conflict iff we are that rtx or
7719 both are in memory. Otherwise, we check all operands of the
7720 expression recursively. */
7722 switch (TREE_CODE (exp
))
7725 /* If the operand is static or we are static, we can't conflict.
7726 Likewise if we don't conflict with the operand at all. */
7727 if (staticp (TREE_OPERAND (exp
, 0))
7728 || TREE_STATIC (exp
)
7729 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7732 /* Otherwise, the only way this can conflict is if we are taking
7733 the address of a DECL a that address if part of X, which is
7735 exp
= TREE_OPERAND (exp
, 0);
7738 if (!DECL_RTL_SET_P (exp
)
7739 || !MEM_P (DECL_RTL (exp
)))
7742 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7748 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7749 get_alias_set (exp
)))
7754 /* Assume that the call will clobber all hard registers and
7756 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7761 case WITH_CLEANUP_EXPR
:
7762 case CLEANUP_POINT_EXPR
:
7763 /* Lowered by gimplify.c. */
7767 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7773 /* If we have an rtx, we do not need to scan our operands. */
7777 nops
= TREE_OPERAND_LENGTH (exp
);
7778 for (i
= 0; i
< nops
; i
++)
7779 if (TREE_OPERAND (exp
, i
) != 0
7780 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7786 /* Should never get a type here. */
7790 /* If we have an rtl, find any enclosed object. Then see if we conflict
7794 if (GET_CODE (exp_rtl
) == SUBREG
)
7796 exp_rtl
= SUBREG_REG (exp_rtl
);
7798 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7802 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7803 are memory and they conflict. */
7804 return ! (rtx_equal_p (x
, exp_rtl
)
7805 || (MEM_P (x
) && MEM_P (exp_rtl
)
7806 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7809 /* If we reach here, it is safe. */
7814 /* Return the highest power of two that EXP is known to be a multiple of.
7815 This is used in updating alignment of MEMs in array references. */
7817 unsigned HOST_WIDE_INT
7818 highest_pow2_factor (const_tree exp
)
7820 unsigned HOST_WIDE_INT ret
;
7821 int trailing_zeros
= tree_ctz (exp
);
7822 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7823 return BIGGEST_ALIGNMENT
;
7824 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7825 if (ret
> BIGGEST_ALIGNMENT
)
7826 return BIGGEST_ALIGNMENT
;
7830 /* Similar, except that the alignment requirements of TARGET are
7831 taken into account. Assume it is at least as aligned as its
7832 type, unless it is a COMPONENT_REF in which case the layout of
7833 the structure gives the alignment. */
7835 static unsigned HOST_WIDE_INT
7836 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7838 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7839 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7841 return MAX (factor
, talign
);
7844 /* Convert the tree comparison code TCODE to the rtl one where the
7845 signedness is UNSIGNEDP. */
7847 static enum rtx_code
7848 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7860 code
= unsignedp
? LTU
: LT
;
7863 code
= unsignedp
? LEU
: LE
;
7866 code
= unsignedp
? GTU
: GT
;
7869 code
= unsignedp
? GEU
: GE
;
7871 case UNORDERED_EXPR
:
7902 /* Subroutine of expand_expr. Expand the two operands of a binary
7903 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7904 The value may be stored in TARGET if TARGET is nonzero. The
7905 MODIFIER argument is as documented by expand_expr. */
7908 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7909 enum expand_modifier modifier
)
7911 if (! safe_from_p (target
, exp1
, 1))
7913 if (operand_equal_p (exp0
, exp1
, 0))
7915 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7916 *op1
= copy_rtx (*op0
);
7920 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7921 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7926 /* Return a MEM that contains constant EXP. DEFER is as for
7927 output_constant_def and MODIFIER is as for expand_expr. */
7930 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7934 mem
= output_constant_def (exp
, defer
);
7935 if (modifier
!= EXPAND_INITIALIZER
)
7936 mem
= use_anchored_address (mem
);
7940 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7941 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7944 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7945 enum expand_modifier modifier
, addr_space_t as
)
7947 rtx result
, subtarget
;
7949 poly_int64 bitsize
, bitpos
;
7950 int unsignedp
, reversep
, volatilep
= 0;
7953 /* If we are taking the address of a constant and are at the top level,
7954 we have to use output_constant_def since we can't call force_const_mem
7956 /* ??? This should be considered a front-end bug. We should not be
7957 generating ADDR_EXPR of something that isn't an LVALUE. The only
7958 exception here is STRING_CST. */
7959 if (CONSTANT_CLASS_P (exp
))
7961 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7962 if (modifier
< EXPAND_SUM
)
7963 result
= force_operand (result
, target
);
7967 /* Everything must be something allowed by is_gimple_addressable. */
7968 switch (TREE_CODE (exp
))
7971 /* This case will happen via recursion for &a->b. */
7972 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7976 tree tem
= TREE_OPERAND (exp
, 0);
7977 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7978 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7979 return expand_expr (tem
, target
, tmode
, modifier
);
7982 case TARGET_MEM_REF
:
7983 return addr_for_mem_ref (exp
, as
, true);
7986 /* Expand the initializer like constants above. */
7987 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7989 if (modifier
< EXPAND_SUM
)
7990 result
= force_operand (result
, target
);
7994 /* The real part of the complex number is always first, therefore
7995 the address is the same as the address of the parent object. */
7998 inner
= TREE_OPERAND (exp
, 0);
8002 /* The imaginary part of the complex number is always second.
8003 The expression is therefore always offset by the size of the
8006 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
8007 inner
= TREE_OPERAND (exp
, 0);
8010 case COMPOUND_LITERAL_EXPR
:
8011 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
8012 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
8013 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
8014 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
8015 the initializers aren't gimplified. */
8016 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
8017 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
8018 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
8019 target
, tmode
, modifier
, as
);
8022 /* If the object is a DECL, then expand it for its rtl. Don't bypass
8023 expand_expr, as that can have various side effects; LABEL_DECLs for
8024 example, may not have their DECL_RTL set yet. Expand the rtl of
8025 CONSTRUCTORs too, which should yield a memory reference for the
8026 constructor's contents. Assume language specific tree nodes can
8027 be expanded in some interesting way. */
8028 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
8030 || TREE_CODE (exp
) == CONSTRUCTOR
8031 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
8033 result
= expand_expr (exp
, target
, tmode
,
8034 modifier
== EXPAND_INITIALIZER
8035 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
8037 /* If the DECL isn't in memory, then the DECL wasn't properly
8038 marked TREE_ADDRESSABLE, which will be either a front-end
8039 or a tree optimizer bug. */
8041 gcc_assert (MEM_P (result
));
8042 result
= XEXP (result
, 0);
8044 /* ??? Is this needed anymore? */
8046 TREE_USED (exp
) = 1;
8048 if (modifier
!= EXPAND_INITIALIZER
8049 && modifier
!= EXPAND_CONST_ADDRESS
8050 && modifier
!= EXPAND_SUM
)
8051 result
= force_operand (result
, target
);
8055 /* Pass FALSE as the last argument to get_inner_reference although
8056 we are expanding to RTL. The rationale is that we know how to
8057 handle "aligning nodes" here: we can just bypass them because
8058 they won't change the final object whose address will be returned
8059 (they actually exist only for that purpose). */
8060 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
8061 &unsignedp
, &reversep
, &volatilep
);
8065 /* We must have made progress. */
8066 gcc_assert (inner
!= exp
);
8068 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8069 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8070 inner alignment, force the inner to be sufficiently aligned. */
8071 if (CONSTANT_CLASS_P (inner
)
8072 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
8074 inner
= copy_node (inner
);
8075 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
8076 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
8077 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
8079 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
8085 if (modifier
!= EXPAND_NORMAL
)
8086 result
= force_operand (result
, NULL
);
8087 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
8088 modifier
== EXPAND_INITIALIZER
8089 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
8091 /* expand_expr is allowed to return an object in a mode other
8092 than TMODE. If it did, we need to convert. */
8093 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8094 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8095 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8096 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8097 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8099 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8100 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8103 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8104 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8105 1, OPTAB_LIB_WIDEN
);
8109 if (maybe_ne (bitpos
, 0))
8111 /* Someone beforehand should have rejected taking the address
8112 of an object that isn't byte-aligned. */
8113 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8114 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8115 result
= plus_constant (tmode
, result
, bytepos
);
8116 if (modifier
< EXPAND_SUM
)
8117 result
= force_operand (result
, target
);
8123 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8124 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8127 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8128 enum expand_modifier modifier
)
8130 addr_space_t as
= ADDR_SPACE_GENERIC
;
8131 scalar_int_mode address_mode
= Pmode
;
8132 scalar_int_mode pointer_mode
= ptr_mode
;
8136 /* Target mode of VOIDmode says "whatever's natural". */
8137 if (tmode
== VOIDmode
)
8138 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8140 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8142 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8143 address_mode
= targetm
.addr_space
.address_mode (as
);
8144 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8147 /* We can get called with some Weird Things if the user does silliness
8148 like "(short) &a". In that case, convert_memory_address won't do
8149 the right thing, so ignore the given target mode. */
8150 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8154 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8155 new_tmode
, modifier
, as
);
8157 /* Despite expand_expr claims concerning ignoring TMODE when not
8158 strictly convenient, stuff breaks if we don't honor it. Note
8159 that combined with the above, we only do this for pointer modes. */
8160 rmode
= GET_MODE (result
);
8161 if (rmode
== VOIDmode
)
8163 if (rmode
!= new_tmode
)
8164 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8169 /* Generate code for computing CONSTRUCTOR EXP.
8170 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8171 is TRUE, instead of creating a temporary variable in memory
8172 NULL is returned and the caller needs to handle it differently. */
8175 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8176 bool avoid_temp_mem
)
8178 tree type
= TREE_TYPE (exp
);
8179 machine_mode mode
= TYPE_MODE (type
);
8181 /* Try to avoid creating a temporary at all. This is possible
8182 if all of the initializer is zero.
8183 FIXME: try to handle all [0..255] initializers we can handle
8185 if (TREE_STATIC (exp
)
8186 && !TREE_ADDRESSABLE (exp
)
8187 && target
!= 0 && mode
== BLKmode
8188 && all_zeros_p (exp
))
8190 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8194 /* All elts simple constants => refer to a constant in memory. But
8195 if this is a non-BLKmode mode, let it store a field at a time
8196 since that should make a CONST_INT, CONST_WIDE_INT or
8197 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8198 use, it is best to store directly into the target unless the type
8199 is large enough that memcpy will be used. If we are making an
8200 initializer and all operands are constant, put it in memory as
8203 FIXME: Avoid trying to fill vector constructors piece-meal.
8204 Output them with output_constant_def below unless we're sure
8205 they're zeros. This should go away when vector initializers
8206 are treated like VECTOR_CST instead of arrays. */
8207 if ((TREE_STATIC (exp
)
8208 && ((mode
== BLKmode
8209 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8210 || TREE_ADDRESSABLE (exp
)
8211 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8212 && (! can_move_by_pieces
8213 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8215 && ! mostly_zeros_p (exp
))))
8216 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8217 && TREE_CONSTANT (exp
)))
8224 constructor
= expand_expr_constant (exp
, 1, modifier
);
8226 if (modifier
!= EXPAND_CONST_ADDRESS
8227 && modifier
!= EXPAND_INITIALIZER
8228 && modifier
!= EXPAND_SUM
)
8229 constructor
= validize_mem (constructor
);
8234 /* Handle calls that pass values in multiple non-contiguous
8235 locations. The Irix 6 ABI has examples of this. */
8236 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8237 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8242 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8245 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8250 /* expand_expr: generate code for computing expression EXP.
8251 An rtx for the computed value is returned. The value is never null.
8252 In the case of a void EXP, const0_rtx is returned.
8254 The value may be stored in TARGET if TARGET is nonzero.
8255 TARGET is just a suggestion; callers must assume that
8256 the rtx returned may not be the same as TARGET.
8258 If TARGET is CONST0_RTX, it means that the value will be ignored.
8260 If TMODE is not VOIDmode, it suggests generating the
8261 result in mode TMODE. But this is done only when convenient.
8262 Otherwise, TMODE is ignored and the value generated in its natural mode.
8263 TMODE is just a suggestion; callers must assume that
8264 the rtx returned may not have mode TMODE.
8266 Note that TARGET may have neither TMODE nor MODE. In that case, it
8267 probably will not be used.
8269 If MODIFIER is EXPAND_SUM then when EXP is an addition
8270 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8271 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8272 products as above, or REG or MEM, or constant.
8273 Ordinarily in such cases we would output mul or add instructions
8274 and then return a pseudo reg containing the sum.
8276 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8277 it also marks a label as absolutely required (it can't be dead).
8278 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8279 This is used for outputting expressions used in initializers.
8281 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8282 with a constant address even if that address is not normally legitimate.
8283 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8285 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8286 a call parameter. Such targets require special care as we haven't yet
8287 marked TARGET so that it's safe from being trashed by libcalls. We
8288 don't want to use TARGET for anything but the final result;
8289 Intermediate values must go elsewhere. Additionally, calls to
8290 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8292 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8293 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8294 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8295 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8297 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8298 then *ALT_RTL is set to TARGET (before legitimziation).
8300 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8301 In this case, we don't adjust a returned MEM rtx that wouldn't be
8302 sufficiently aligned for its mode; instead, it's up to the caller
8303 to deal with it afterwards. This is used to make sure that unaligned
8304 base objects for which out-of-bounds accesses are supported, for
8305 example record types with trailing arrays, aren't realigned behind
8306 the back of the caller.
8307 The normal operating mode is to pass FALSE for this parameter. */
8310 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8311 enum expand_modifier modifier
, rtx
*alt_rtl
,
8312 bool inner_reference_p
)
8316 /* Handle ERROR_MARK before anybody tries to access its type. */
8317 if (TREE_CODE (exp
) == ERROR_MARK
8318 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8320 ret
= CONST0_RTX (tmode
);
8321 return ret
? ret
: const0_rtx
;
8324 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8329 /* Try to expand the conditional expression which is represented by
8330 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8331 return the rtl reg which represents the result. Otherwise return
8335 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8336 tree treeop1 ATTRIBUTE_UNUSED
,
8337 tree treeop2 ATTRIBUTE_UNUSED
)
8340 rtx op00
, op01
, op1
, op2
;
8341 enum rtx_code comparison_code
;
8342 machine_mode comparison_mode
;
8345 tree type
= TREE_TYPE (treeop1
);
8346 int unsignedp
= TYPE_UNSIGNED (type
);
8347 machine_mode mode
= TYPE_MODE (type
);
8348 machine_mode orig_mode
= mode
;
8349 static bool expanding_cond_expr_using_cmove
= false;
8351 /* Conditional move expansion can end up TERing two operands which,
8352 when recursively hitting conditional expressions can result in
8353 exponential behavior if the cmove expansion ultimatively fails.
8354 It's hardly profitable to TER a cmove into a cmove so avoid doing
8355 that by failing early if we end up recursing. */
8356 if (expanding_cond_expr_using_cmove
)
8359 /* If we cannot do a conditional move on the mode, try doing it
8360 with the promoted mode. */
8361 if (!can_conditionally_move_p (mode
))
8363 mode
= promote_mode (type
, mode
, &unsignedp
);
8364 if (!can_conditionally_move_p (mode
))
8366 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8369 temp
= assign_temp (type
, 0, 1);
8371 expanding_cond_expr_using_cmove
= true;
8373 expand_operands (treeop1
, treeop2
,
8374 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8376 if (TREE_CODE (treeop0
) == SSA_NAME
8377 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8379 type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8380 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8381 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8382 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8383 comparison_mode
= TYPE_MODE (type
);
8384 unsignedp
= TYPE_UNSIGNED (type
);
8385 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8387 else if (COMPARISON_CLASS_P (treeop0
))
8389 type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8390 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8391 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8392 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8393 unsignedp
= TYPE_UNSIGNED (type
);
8394 comparison_mode
= TYPE_MODE (type
);
8395 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8399 op00
= expand_normal (treeop0
);
8401 comparison_code
= NE
;
8402 comparison_mode
= GET_MODE (op00
);
8403 if (comparison_mode
== VOIDmode
)
8404 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8406 expanding_cond_expr_using_cmove
= false;
8408 if (GET_MODE (op1
) != mode
)
8409 op1
= gen_lowpart (mode
, op1
);
8411 if (GET_MODE (op2
) != mode
)
8412 op2
= gen_lowpart (mode
, op2
);
8414 /* Try to emit the conditional move. */
8415 insn
= emit_conditional_move (temp
, comparison_code
,
8416 op00
, op01
, comparison_mode
,
8420 /* If we could do the conditional move, emit the sequence,
8424 rtx_insn
*seq
= get_insns ();
8427 return convert_modes (orig_mode
, mode
, temp
, 0);
8430 /* Otherwise discard the sequence and fall back to code with
8436 /* A helper function for expand_expr_real_2 to be used with a
8437 misaligned mem_ref TEMP. Assume an unsigned type if UNSIGNEDP
8438 is nonzero, with alignment ALIGN in bits.
8439 Store the value at TARGET if possible (if TARGET is nonzero).
8440 Regardless of TARGET, we return the rtx for where the value is placed.
8441 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8442 then *ALT_RTL is set to TARGET (before legitimziation). */
8445 expand_misaligned_mem_ref (rtx temp
, machine_mode mode
, int unsignedp
,
8446 unsigned int align
, rtx target
, rtx
*alt_rtl
)
8448 enum insn_code icode
;
8450 if ((icode
= optab_handler (movmisalign_optab
, mode
))
8451 != CODE_FOR_nothing
)
8453 class expand_operand ops
[2];
8455 /* We've already validated the memory, and we're creating a
8456 new pseudo destination. The predicates really can't fail,
8457 nor can the generator. */
8458 create_output_operand (&ops
[0], NULL_RTX
, mode
);
8459 create_fixed_operand (&ops
[1], temp
);
8460 expand_insn (icode
, 2, ops
);
8461 temp
= ops
[0].value
;
8463 else if (targetm
.slow_unaligned_access (mode
, align
))
8464 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
8465 0, unsignedp
, target
,
8466 mode
, mode
, false, alt_rtl
);
8471 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8472 enum expand_modifier modifier
)
8474 rtx op0
, op1
, op2
, temp
;
8475 rtx_code_label
*lab
;
8479 scalar_int_mode int_mode
;
8480 enum tree_code code
= ops
->code
;
8482 rtx subtarget
, original_target
;
8484 bool reduce_bit_field
;
8485 location_t loc
= ops
->location
;
8486 tree treeop0
, treeop1
, treeop2
;
8487 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8488 ? reduce_to_bit_field_precision ((expr), \
8494 mode
= TYPE_MODE (type
);
8495 unsignedp
= TYPE_UNSIGNED (type
);
8501 /* We should be called only on simple (binary or unary) expressions,
8502 exactly those that are valid in gimple expressions that aren't
8503 GIMPLE_SINGLE_RHS (or invalid). */
8504 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8505 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8506 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8508 ignore
= (target
== const0_rtx
8509 || ((CONVERT_EXPR_CODE_P (code
)
8510 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8511 && TREE_CODE (type
) == VOID_TYPE
));
8513 /* We should be called only if we need the result. */
8514 gcc_assert (!ignore
);
8516 /* An operation in what may be a bit-field type needs the
8517 result to be reduced to the precision of the bit-field type,
8518 which is narrower than that of the type's mode. */
8519 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8520 && !type_has_mode_precision_p (type
));
8522 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8525 /* Use subtarget as the target for operand 0 of a binary operation. */
8526 subtarget
= get_subtarget (target
);
8527 original_target
= target
;
8531 case NON_LVALUE_EXPR
:
8534 if (treeop0
== error_mark_node
)
8537 if (TREE_CODE (type
) == UNION_TYPE
)
8539 tree valtype
= TREE_TYPE (treeop0
);
8541 /* If both input and output are BLKmode, this conversion isn't doing
8542 anything except possibly changing memory attribute. */
8543 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8545 rtx result
= expand_expr (treeop0
, target
, tmode
,
8548 result
= copy_rtx (result
);
8549 set_mem_attributes (result
, type
, 0);
8555 if (TYPE_MODE (type
) != BLKmode
)
8556 target
= gen_reg_rtx (TYPE_MODE (type
));
8558 target
= assign_temp (type
, 1, 1);
8562 /* Store data into beginning of memory target. */
8563 store_expr (treeop0
,
8564 adjust_address (target
, TYPE_MODE (valtype
), 0),
8565 modifier
== EXPAND_STACK_PARM
,
8566 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8570 gcc_assert (REG_P (target
)
8571 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8573 /* Store this field into a union of the proper type. */
8574 poly_uint64 op0_size
8575 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8576 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8577 store_field (target
,
8578 /* The conversion must be constructed so that
8579 we know at compile time how many bits
8581 ordered_min (op0_size
, union_size
),
8582 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8586 /* Return the entire union. */
8590 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8592 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8595 /* If the signedness of the conversion differs and OP0 is
8596 a promoted SUBREG, clear that indication since we now
8597 have to do the proper extension. */
8598 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8599 && GET_CODE (op0
) == SUBREG
)
8600 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8602 return REDUCE_BIT_FIELD (op0
);
8605 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8606 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8607 if (GET_MODE (op0
) == mode
)
8610 /* If OP0 is a constant, just convert it into the proper mode. */
8611 else if (CONSTANT_P (op0
))
8613 tree inner_type
= TREE_TYPE (treeop0
);
8614 machine_mode inner_mode
= GET_MODE (op0
);
8616 if (inner_mode
== VOIDmode
)
8617 inner_mode
= TYPE_MODE (inner_type
);
8619 if (modifier
== EXPAND_INITIALIZER
)
8620 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8622 op0
= convert_modes (mode
, inner_mode
, op0
,
8623 TYPE_UNSIGNED (inner_type
));
8626 else if (modifier
== EXPAND_INITIALIZER
)
8627 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8628 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8630 else if (target
== 0)
8631 op0
= convert_to_mode (mode
, op0
,
8632 TYPE_UNSIGNED (TREE_TYPE
8636 convert_move (target
, op0
,
8637 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8641 return REDUCE_BIT_FIELD (op0
);
8643 case ADDR_SPACE_CONVERT_EXPR
:
8645 tree treeop0_type
= TREE_TYPE (treeop0
);
8647 gcc_assert (POINTER_TYPE_P (type
));
8648 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8650 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8651 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8653 /* Conversions between pointers to the same address space should
8654 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8655 gcc_assert (as_to
!= as_from
);
8657 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8659 /* Ask target code to handle conversion between pointers
8660 to overlapping address spaces. */
8661 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8662 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8664 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8668 /* For disjoint address spaces, converting anything but a null
8669 pointer invokes undefined behavior. We truncate or extend the
8670 value as if we'd converted via integers, which handles 0 as
8671 required, and all others as the programmer likely expects. */
8672 #ifndef POINTERS_EXTEND_UNSIGNED
8673 const int POINTERS_EXTEND_UNSIGNED
= 1;
8675 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8676 op0
, POINTERS_EXTEND_UNSIGNED
);
8682 case POINTER_PLUS_EXPR
:
8683 /* Even though the sizetype mode and the pointer's mode can be different
8684 expand is able to handle this correctly and get the correct result out
8685 of the PLUS_EXPR code. */
8686 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8687 if sizetype precision is smaller than pointer precision. */
8688 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8689 treeop1
= fold_convert_loc (loc
, type
,
8690 fold_convert_loc (loc
, ssizetype
,
8692 /* If sizetype precision is larger than pointer precision, truncate the
8693 offset to have matching modes. */
8694 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8695 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8699 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8700 something else, make sure we add the register to the constant and
8701 then to the other thing. This case can occur during strength
8702 reduction and doing it this way will produce better code if the
8703 frame pointer or argument pointer is eliminated.
8705 fold-const.c will ensure that the constant is always in the inner
8706 PLUS_EXPR, so the only case we need to do anything about is if
8707 sp, ap, or fp is our second argument, in which case we must swap
8708 the innermost first argument and our second argument. */
8710 if (TREE_CODE (treeop0
) == PLUS_EXPR
8711 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8713 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8714 || DECL_RTL (treeop1
) == stack_pointer_rtx
8715 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8720 /* If the result is to be ptr_mode and we are adding an integer to
8721 something, we might be forming a constant. So try to use
8722 plus_constant. If it produces a sum and we can't accept it,
8723 use force_operand. This allows P = &ARR[const] to generate
8724 efficient code on machines where a SYMBOL_REF is not a valid
8727 If this is an EXPAND_SUM call, always return the sum. */
8728 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8729 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8731 if (modifier
== EXPAND_STACK_PARM
)
8733 if (TREE_CODE (treeop0
) == INTEGER_CST
8734 && HWI_COMPUTABLE_MODE_P (mode
)
8735 && TREE_CONSTANT (treeop1
))
8739 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8741 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8743 /* Use wi::shwi to ensure that the constant is
8744 truncated according to the mode of OP1, then sign extended
8745 to a HOST_WIDE_INT. Using the constant directly can result
8746 in non-canonical RTL in a 64x32 cross compile. */
8747 wc
= TREE_INT_CST_LOW (treeop0
);
8749 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8750 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8751 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8752 op1
= force_operand (op1
, target
);
8753 return REDUCE_BIT_FIELD (op1
);
8756 else if (TREE_CODE (treeop1
) == INTEGER_CST
8757 && HWI_COMPUTABLE_MODE_P (mode
)
8758 && TREE_CONSTANT (treeop0
))
8762 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8764 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8765 (modifier
== EXPAND_INITIALIZER
8766 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8767 if (! CONSTANT_P (op0
))
8769 op1
= expand_expr (treeop1
, NULL_RTX
,
8770 VOIDmode
, modifier
);
8771 /* Return a PLUS if modifier says it's OK. */
8772 if (modifier
== EXPAND_SUM
8773 || modifier
== EXPAND_INITIALIZER
)
8774 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8777 /* Use wi::shwi to ensure that the constant is
8778 truncated according to the mode of OP1, then sign extended
8779 to a HOST_WIDE_INT. Using the constant directly can result
8780 in non-canonical RTL in a 64x32 cross compile. */
8781 wc
= TREE_INT_CST_LOW (treeop1
);
8783 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8784 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8785 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8786 op0
= force_operand (op0
, target
);
8787 return REDUCE_BIT_FIELD (op0
);
8791 /* Use TER to expand pointer addition of a negated value
8792 as pointer subtraction. */
8793 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8794 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8795 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8796 && TREE_CODE (treeop1
) == SSA_NAME
8797 && TYPE_MODE (TREE_TYPE (treeop0
))
8798 == TYPE_MODE (TREE_TYPE (treeop1
)))
8800 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8803 treeop1
= gimple_assign_rhs1 (def
);
8809 /* No sense saving up arithmetic to be done
8810 if it's all in the wrong mode to form part of an address.
8811 And force_operand won't know whether to sign-extend or
8813 if (modifier
!= EXPAND_INITIALIZER
8814 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8816 expand_operands (treeop0
, treeop1
,
8817 subtarget
, &op0
, &op1
, modifier
);
8818 if (op0
== const0_rtx
)
8820 if (op1
== const0_rtx
)
8825 expand_operands (treeop0
, treeop1
,
8826 subtarget
, &op0
, &op1
, modifier
);
8827 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8830 case POINTER_DIFF_EXPR
:
8832 /* For initializers, we are allowed to return a MINUS of two
8833 symbolic constants. Here we handle all cases when both operands
8835 /* Handle difference of two symbolic constants,
8836 for the sake of an initializer. */
8837 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8838 && really_constant_p (treeop0
)
8839 && really_constant_p (treeop1
))
8841 expand_operands (treeop0
, treeop1
,
8842 NULL_RTX
, &op0
, &op1
, modifier
);
8843 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8846 /* No sense saving up arithmetic to be done
8847 if it's all in the wrong mode to form part of an address.
8848 And force_operand won't know whether to sign-extend or
8850 if (modifier
!= EXPAND_INITIALIZER
8851 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8854 expand_operands (treeop0
, treeop1
,
8855 subtarget
, &op0
, &op1
, modifier
);
8857 /* Convert A - const to A + (-const). */
8858 if (CONST_INT_P (op1
))
8860 op1
= negate_rtx (mode
, op1
);
8861 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8866 case WIDEN_MULT_PLUS_EXPR
:
8867 case WIDEN_MULT_MINUS_EXPR
:
8868 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8869 op2
= expand_normal (treeop2
);
8870 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8874 case WIDEN_MULT_EXPR
:
8875 /* If first operand is constant, swap them.
8876 Thus the following special case checks need only
8877 check the second operand. */
8878 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8879 std::swap (treeop0
, treeop1
);
8881 /* First, check if we have a multiplication of one signed and one
8882 unsigned operand. */
8883 if (TREE_CODE (treeop1
) != INTEGER_CST
8884 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8885 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8887 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8888 this_optab
= usmul_widen_optab
;
8889 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8890 != CODE_FOR_nothing
)
8892 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8893 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8896 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8898 /* op0 and op1 might still be constant, despite the above
8899 != INTEGER_CST check. Handle it. */
8900 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8902 op0
= convert_modes (mode
, innermode
, op0
, true);
8903 op1
= convert_modes (mode
, innermode
, op1
, false);
8904 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8905 target
, unsignedp
));
8910 /* Check for a multiplication with matching signedness. */
8911 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8912 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8913 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8914 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8916 tree op0type
= TREE_TYPE (treeop0
);
8917 machine_mode innermode
= TYPE_MODE (op0type
);
8918 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8919 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8920 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8922 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8924 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8925 != CODE_FOR_nothing
)
8927 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8929 /* op0 and op1 might still be constant, despite the above
8930 != INTEGER_CST check. Handle it. */
8931 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8934 op0
= convert_modes (mode
, innermode
, op0
, zextend_p
);
8936 = convert_modes (mode
, innermode
, op1
,
8937 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8938 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8942 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8943 unsignedp
, this_optab
);
8944 return REDUCE_BIT_FIELD (temp
);
8946 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
8948 && innermode
== word_mode
)
8951 op0
= expand_normal (treeop0
);
8952 op1
= expand_normal (treeop1
);
8953 /* op0 and op1 might be constants, despite the above
8954 != INTEGER_CST check. Handle it. */
8955 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8956 goto widen_mult_const
;
8957 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8958 op1
= convert_modes (mode
, word_mode
, op1
,
8959 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8960 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8961 unsignedp
, OPTAB_LIB_WIDEN
);
8962 hipart
= gen_highpart (word_mode
, temp
);
8963 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8967 emit_move_insn (hipart
, htem
);
8968 return REDUCE_BIT_FIELD (temp
);
8972 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8973 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8974 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8975 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8978 /* If this is a fixed-point operation, then we cannot use the code
8979 below because "expand_mult" doesn't support sat/no-sat fixed-point
8981 if (ALL_FIXED_POINT_MODE_P (mode
))
8984 /* If first operand is constant, swap them.
8985 Thus the following special case checks need only
8986 check the second operand. */
8987 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8988 std::swap (treeop0
, treeop1
);
8990 /* Attempt to return something suitable for generating an
8991 indexed address, for machines that support that. */
8993 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8994 && tree_fits_shwi_p (treeop1
))
8996 tree exp1
= treeop1
;
8998 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
9002 op0
= force_operand (op0
, NULL_RTX
);
9004 op0
= copy_to_mode_reg (mode
, op0
);
9006 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
9007 gen_int_mode (tree_to_shwi (exp1
),
9008 TYPE_MODE (TREE_TYPE (exp1
)))));
9011 if (modifier
== EXPAND_STACK_PARM
)
9014 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9015 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9017 case TRUNC_MOD_EXPR
:
9018 case FLOOR_MOD_EXPR
:
9020 case ROUND_MOD_EXPR
:
9022 case TRUNC_DIV_EXPR
:
9023 case FLOOR_DIV_EXPR
:
9025 case ROUND_DIV_EXPR
:
9026 case EXACT_DIV_EXPR
:
9028 /* If this is a fixed-point operation, then we cannot use the code
9029 below because "expand_divmod" doesn't support sat/no-sat fixed-point
9031 if (ALL_FIXED_POINT_MODE_P (mode
))
9034 if (modifier
== EXPAND_STACK_PARM
)
9036 /* Possible optimization: compute the dividend with EXPAND_SUM
9037 then if the divisor is constant can optimize the case
9038 where some terms of the dividend have coeffs divisible by it. */
9039 expand_operands (treeop0
, treeop1
,
9040 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9041 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
9042 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
9043 if (SCALAR_INT_MODE_P (mode
)
9045 && get_range_pos_neg (treeop0
) == 1
9046 && get_range_pos_neg (treeop1
) == 1)
9048 /* If both arguments are known to be positive when interpreted
9049 as signed, we can expand it as both signed and unsigned
9050 division or modulo. Choose the cheaper sequence in that case. */
9051 bool speed_p
= optimize_insn_for_speed_p ();
9052 do_pending_stack_adjust ();
9054 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
9055 rtx_insn
*uns_insns
= get_insns ();
9058 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
9059 rtx_insn
*sgn_insns
= get_insns ();
9061 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
9062 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
9064 /* If costs are the same then use as tie breaker the other
9066 if (uns_cost
== sgn_cost
)
9068 uns_cost
= seq_cost (uns_insns
, !speed_p
);
9069 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
9072 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
9074 emit_insn (uns_insns
);
9077 emit_insn (sgn_insns
);
9080 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9085 case MULT_HIGHPART_EXPR
:
9086 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9087 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9091 case FIXED_CONVERT_EXPR
:
9092 op0
= expand_normal (treeop0
);
9093 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9094 target
= gen_reg_rtx (mode
);
9096 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9097 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9098 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9099 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9101 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9104 case FIX_TRUNC_EXPR
:
9105 op0
= expand_normal (treeop0
);
9106 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9107 target
= gen_reg_rtx (mode
);
9108 expand_fix (target
, op0
, unsignedp
);
9112 op0
= expand_normal (treeop0
);
9113 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9114 target
= gen_reg_rtx (mode
);
9115 /* expand_float can't figure out what to do if FROM has VOIDmode.
9116 So give it the correct mode. With -O, cse will optimize this. */
9117 if (GET_MODE (op0
) == VOIDmode
)
9118 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9120 expand_float (target
, op0
,
9121 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9125 op0
= expand_expr (treeop0
, subtarget
,
9126 VOIDmode
, EXPAND_NORMAL
);
9127 if (modifier
== EXPAND_STACK_PARM
)
9129 temp
= expand_unop (mode
,
9130 optab_for_tree_code (NEGATE_EXPR
, type
,
9134 return REDUCE_BIT_FIELD (temp
);
9138 op0
= expand_expr (treeop0
, subtarget
,
9139 VOIDmode
, EXPAND_NORMAL
);
9140 if (modifier
== EXPAND_STACK_PARM
)
9143 /* ABS_EXPR is not valid for complex arguments. */
9144 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9145 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9147 /* Unsigned abs is simply the operand. Testing here means we don't
9148 risk generating incorrect code below. */
9149 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9152 return expand_abs (mode
, op0
, target
, unsignedp
,
9153 safe_from_p (target
, treeop0
, 1));
9157 target
= original_target
;
9159 || modifier
== EXPAND_STACK_PARM
9160 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9161 || GET_MODE (target
) != mode
9163 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9164 target
= gen_reg_rtx (mode
);
9165 expand_operands (treeop0
, treeop1
,
9166 target
, &op0
, &op1
, EXPAND_NORMAL
);
9168 /* First try to do it with a special MIN or MAX instruction.
9169 If that does not win, use a conditional jump to select the proper
9171 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9172 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9177 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9178 and similarly for MAX <x, y>. */
9179 if (VECTOR_TYPE_P (type
))
9181 tree t0
= make_tree (type
, op0
);
9182 tree t1
= make_tree (type
, op1
);
9183 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9185 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9189 /* At this point, a MEM target is no longer useful; we will get better
9192 if (! REG_P (target
))
9193 target
= gen_reg_rtx (mode
);
9195 /* If op1 was placed in target, swap op0 and op1. */
9196 if (target
!= op0
&& target
== op1
)
9197 std::swap (op0
, op1
);
9199 /* We generate better code and avoid problems with op1 mentioning
9200 target by forcing op1 into a pseudo if it isn't a constant. */
9201 if (! CONSTANT_P (op1
))
9202 op1
= force_reg (mode
, op1
);
9205 enum rtx_code comparison_code
;
9208 if (code
== MAX_EXPR
)
9209 comparison_code
= unsignedp
? GEU
: GE
;
9211 comparison_code
= unsignedp
? LEU
: LE
;
9213 /* Canonicalize to comparisons against 0. */
9214 if (op1
== const1_rtx
)
9216 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9217 or (a != 0 ? a : 1) for unsigned.
9218 For MIN we are safe converting (a <= 1 ? a : 1)
9219 into (a <= 0 ? a : 1) */
9220 cmpop1
= const0_rtx
;
9221 if (code
== MAX_EXPR
)
9222 comparison_code
= unsignedp
? NE
: GT
;
9224 if (op1
== constm1_rtx
&& !unsignedp
)
9226 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9227 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9228 cmpop1
= const0_rtx
;
9229 if (code
== MIN_EXPR
)
9230 comparison_code
= LT
;
9233 /* Use a conditional move if possible. */
9234 if (can_conditionally_move_p (mode
))
9240 /* Try to emit the conditional move. */
9241 insn
= emit_conditional_move (target
, comparison_code
,
9246 /* If we could do the conditional move, emit the sequence,
9250 rtx_insn
*seq
= get_insns ();
9256 /* Otherwise discard the sequence and fall back to code with
9262 emit_move_insn (target
, op0
);
9264 lab
= gen_label_rtx ();
9265 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9266 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9267 profile_probability::uninitialized ());
9269 emit_move_insn (target
, op1
);
9274 op0
= expand_expr (treeop0
, subtarget
,
9275 VOIDmode
, EXPAND_NORMAL
);
9276 if (modifier
== EXPAND_STACK_PARM
)
9278 /* In case we have to reduce the result to bitfield precision
9279 for unsigned bitfield expand this as XOR with a proper constant
9281 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9283 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9284 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9285 false, GET_MODE_PRECISION (int_mode
));
9287 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9288 immed_wide_int_const (mask
, int_mode
),
9289 target
, 1, OPTAB_LIB_WIDEN
);
9292 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9296 /* ??? Can optimize bitwise operations with one arg constant.
9297 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9298 and (a bitwise1 b) bitwise2 b (etc)
9299 but that is probably not worth while. */
9308 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9309 || type_has_mode_precision_p (type
));
9315 /* If this is a fixed-point operation, then we cannot use the code
9316 below because "expand_shift" doesn't support sat/no-sat fixed-point
9318 if (ALL_FIXED_POINT_MODE_P (mode
))
9321 if (! safe_from_p (subtarget
, treeop1
, 1))
9323 if (modifier
== EXPAND_STACK_PARM
)
9325 op0
= expand_expr (treeop0
, subtarget
,
9326 VOIDmode
, EXPAND_NORMAL
);
9328 /* Left shift optimization when shifting across word_size boundary.
9330 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9331 there isn't native instruction to support this wide mode
9332 left shift. Given below scenario:
9334 Type A = (Type) B << C
9337 | dest_high | dest_low |
9341 If the shift amount C caused we shift B to across the word
9342 size boundary, i.e part of B shifted into high half of
9343 destination register, and part of B remains in the low
9344 half, then GCC will use the following left shift expand
9347 1. Initialize dest_low to B.
9348 2. Initialize every bit of dest_high to the sign bit of B.
9349 3. Logic left shift dest_low by C bit to finalize dest_low.
9350 The value of dest_low before this shift is kept in a temp D.
9351 4. Logic left shift dest_high by C.
9352 5. Logic right shift D by (word_size - C).
9353 6. Or the result of 4 and 5 to finalize dest_high.
9355 While, by checking gimple statements, if operand B is
9356 coming from signed extension, then we can simplify above
9359 1. dest_high = src_low >> (word_size - C).
9360 2. dest_low = src_low << C.
9362 We can use one arithmetic right shift to finish all the
9363 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9364 needed from 6 into 2.
9366 The case is similar for zero extension, except that we
9367 initialize dest_high to zero rather than copies of the sign
9368 bit from B. Furthermore, we need to use a logical right shift
9371 The choice of sign-extension versus zero-extension is
9372 determined entirely by whether or not B is signed and is
9373 independent of the current setting of unsignedp. */
9376 if (code
== LSHIFT_EXPR
9379 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9381 && TREE_CONSTANT (treeop1
)
9382 && TREE_CODE (treeop0
) == SSA_NAME
)
9384 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9385 if (is_gimple_assign (def
)
9386 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9388 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9389 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9391 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9392 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9393 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9394 >= GET_MODE_BITSIZE (word_mode
)))
9396 rtx_insn
*seq
, *seq_old
;
9397 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9399 bool extend_unsigned
9400 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9401 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9402 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9403 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9404 int_mode
, high_off
);
9405 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9406 - TREE_INT_CST_LOW (treeop1
));
9407 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9410 /* dest_high = src_low >> (word_size - C). */
9411 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9414 if (temp
!= dest_high
)
9415 emit_move_insn (dest_high
, temp
);
9417 /* dest_low = src_low << C. */
9418 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9419 treeop1
, dest_low
, unsignedp
);
9420 if (temp
!= dest_low
)
9421 emit_move_insn (dest_low
, temp
);
9427 if (have_insn_for (ASHIFT
, int_mode
))
9429 bool speed_p
= optimize_insn_for_speed_p ();
9431 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9436 seq_old
= get_insns ();
9438 if (seq_cost (seq
, speed_p
)
9439 >= seq_cost (seq_old
, speed_p
))
9450 if (temp
== NULL_RTX
)
9451 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9453 if (code
== LSHIFT_EXPR
)
9454 temp
= REDUCE_BIT_FIELD (temp
);
9458 /* Could determine the answer when only additive constants differ. Also,
9459 the addition of one can be handled by changing the condition. */
9466 case UNORDERED_EXPR
:
9475 temp
= do_store_flag (ops
,
9476 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9477 tmode
!= VOIDmode
? tmode
: mode
);
9481 /* Use a compare and a jump for BLKmode comparisons, or for function
9482 type comparisons is have_canonicalize_funcptr_for_compare. */
9485 || modifier
== EXPAND_STACK_PARM
9486 || ! safe_from_p (target
, treeop0
, 1)
9487 || ! safe_from_p (target
, treeop1
, 1)
9488 /* Make sure we don't have a hard reg (such as function's return
9489 value) live across basic blocks, if not optimizing. */
9490 || (!optimize
&& REG_P (target
)
9491 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9492 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9494 emit_move_insn (target
, const0_rtx
);
9496 rtx_code_label
*lab1
= gen_label_rtx ();
9497 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9498 profile_probability::uninitialized ());
9500 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9501 emit_move_insn (target
, constm1_rtx
);
9503 emit_move_insn (target
, const1_rtx
);
9509 /* Get the rtx code of the operands. */
9510 op0
= expand_normal (treeop0
);
9511 op1
= expand_normal (treeop1
);
9514 target
= gen_reg_rtx (TYPE_MODE (type
));
9516 /* If target overlaps with op1, then either we need to force
9517 op1 into a pseudo (if target also overlaps with op0),
9518 or write the complex parts in reverse order. */
9519 switch (GET_CODE (target
))
9522 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9524 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9526 complex_expr_force_op1
:
9527 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9528 emit_move_insn (temp
, op1
);
9532 complex_expr_swap_order
:
9533 /* Move the imaginary (op1) and real (op0) parts to their
9535 write_complex_part (target
, op1
, true);
9536 write_complex_part (target
, op0
, false);
9542 temp
= adjust_address_nv (target
,
9543 GET_MODE_INNER (GET_MODE (target
)), 0);
9544 if (reg_overlap_mentioned_p (temp
, op1
))
9546 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9547 temp
= adjust_address_nv (target
, imode
,
9548 GET_MODE_SIZE (imode
));
9549 if (reg_overlap_mentioned_p (temp
, op0
))
9550 goto complex_expr_force_op1
;
9551 goto complex_expr_swap_order
;
9555 if (reg_overlap_mentioned_p (target
, op1
))
9557 if (reg_overlap_mentioned_p (target
, op0
))
9558 goto complex_expr_force_op1
;
9559 goto complex_expr_swap_order
;
9564 /* Move the real (op0) and imaginary (op1) parts to their location. */
9565 write_complex_part (target
, op0
, false);
9566 write_complex_part (target
, op1
, true);
9570 case WIDEN_SUM_EXPR
:
9572 tree oprnd0
= treeop0
;
9573 tree oprnd1
= treeop1
;
9575 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9576 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9581 case VEC_UNPACK_HI_EXPR
:
9582 case VEC_UNPACK_LO_EXPR
:
9583 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9584 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9586 op0
= expand_normal (treeop0
);
9587 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9593 case VEC_UNPACK_FLOAT_HI_EXPR
:
9594 case VEC_UNPACK_FLOAT_LO_EXPR
:
9596 op0
= expand_normal (treeop0
);
9597 /* The signedness is determined from input operand. */
9598 temp
= expand_widen_pattern_expr
9599 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9600 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9606 case VEC_WIDEN_MULT_HI_EXPR
:
9607 case VEC_WIDEN_MULT_LO_EXPR
:
9608 case VEC_WIDEN_MULT_EVEN_EXPR
:
9609 case VEC_WIDEN_MULT_ODD_EXPR
:
9610 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9611 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9612 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9613 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9615 gcc_assert (target
);
9618 case VEC_PACK_SAT_EXPR
:
9619 case VEC_PACK_FIX_TRUNC_EXPR
:
9620 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9623 case VEC_PACK_TRUNC_EXPR
:
9624 if (VECTOR_BOOLEAN_TYPE_P (type
)
9625 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0
))
9626 && mode
== TYPE_MODE (TREE_TYPE (treeop0
))
9627 && SCALAR_INT_MODE_P (mode
))
9629 class expand_operand eops
[4];
9630 machine_mode imode
= TYPE_MODE (TREE_TYPE (treeop0
));
9631 expand_operands (treeop0
, treeop1
,
9632 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9633 this_optab
= vec_pack_sbool_trunc_optab
;
9634 enum insn_code icode
= optab_handler (this_optab
, imode
);
9635 create_output_operand (&eops
[0], target
, mode
);
9636 create_convert_operand_from (&eops
[1], op0
, imode
, false);
9637 create_convert_operand_from (&eops
[2], op1
, imode
, false);
9638 temp
= GEN_INT (TYPE_VECTOR_SUBPARTS (type
).to_constant ());
9639 create_input_operand (&eops
[3], temp
, imode
);
9640 expand_insn (icode
, 4, eops
);
9641 return eops
[0].value
;
9643 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9646 case VEC_PACK_FLOAT_EXPR
:
9647 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9648 expand_operands (treeop0
, treeop1
,
9649 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9650 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9652 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9653 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9655 gcc_assert (target
);
9660 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9661 vec_perm_builder sel
;
9662 if (TREE_CODE (treeop2
) == VECTOR_CST
9663 && tree_to_vec_perm_builder (&sel
, treeop2
))
9665 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9666 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9671 op2
= expand_normal (treeop2
);
9672 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9680 tree oprnd0
= treeop0
;
9681 tree oprnd1
= treeop1
;
9682 tree oprnd2
= treeop2
;
9684 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9685 op2
= expand_normal (oprnd2
);
9686 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9693 tree oprnd0
= treeop0
;
9694 tree oprnd1
= treeop1
;
9695 tree oprnd2
= treeop2
;
9697 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9698 op2
= expand_normal (oprnd2
);
9699 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9704 case REALIGN_LOAD_EXPR
:
9706 tree oprnd0
= treeop0
;
9707 tree oprnd1
= treeop1
;
9708 tree oprnd2
= treeop2
;
9710 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9711 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9712 op2
= expand_normal (oprnd2
);
9713 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9721 /* A COND_EXPR with its type being VOID_TYPE represents a
9722 conditional jump and is handled in
9723 expand_gimple_cond_expr. */
9724 gcc_assert (!VOID_TYPE_P (type
));
9726 /* Note that COND_EXPRs whose type is a structure or union
9727 are required to be constructed to contain assignments of
9728 a temporary variable, so that we can evaluate them here
9729 for side effect only. If type is void, we must do likewise. */
9731 gcc_assert (!TREE_ADDRESSABLE (type
)
9733 && TREE_TYPE (treeop1
) != void_type_node
9734 && TREE_TYPE (treeop2
) != void_type_node
);
9736 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9740 /* If we are not to produce a result, we have no target. Otherwise,
9741 if a target was specified use it; it will not be used as an
9742 intermediate target unless it is safe. If no target, use a
9745 if (modifier
!= EXPAND_STACK_PARM
9747 && safe_from_p (original_target
, treeop0
, 1)
9748 && GET_MODE (original_target
) == mode
9749 && !MEM_P (original_target
))
9750 temp
= original_target
;
9752 temp
= assign_temp (type
, 0, 1);
9754 do_pending_stack_adjust ();
9756 rtx_code_label
*lab0
= gen_label_rtx ();
9757 rtx_code_label
*lab1
= gen_label_rtx ();
9758 jumpifnot (treeop0
, lab0
,
9759 profile_probability::uninitialized ());
9760 store_expr (treeop1
, temp
,
9761 modifier
== EXPAND_STACK_PARM
,
9764 emit_jump_insn (targetm
.gen_jump (lab1
));
9767 store_expr (treeop2
, temp
,
9768 modifier
== EXPAND_STACK_PARM
,
9777 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9780 case VEC_DUPLICATE_EXPR
:
9781 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9782 target
= expand_vector_broadcast (mode
, op0
);
9783 gcc_assert (target
);
9786 case VEC_SERIES_EXPR
:
9787 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9788 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9790 case BIT_INSERT_EXPR
:
9792 unsigned bitpos
= tree_to_uhwi (treeop2
);
9794 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9795 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9797 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9798 op0
= expand_normal (treeop0
);
9799 op1
= expand_normal (treeop1
);
9800 rtx dst
= gen_reg_rtx (mode
);
9801 emit_move_insn (dst
, op0
);
9802 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9803 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9811 /* Here to do an ordinary binary operator. */
9813 expand_operands (treeop0
, treeop1
,
9814 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9816 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9818 if (modifier
== EXPAND_STACK_PARM
)
9820 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9821 unsignedp
, OPTAB_LIB_WIDEN
);
9823 /* Bitwise operations do not need bitfield reduction as we expect their
9824 operands being properly truncated. */
9825 if (code
== BIT_XOR_EXPR
9826 || code
== BIT_AND_EXPR
9827 || code
== BIT_IOR_EXPR
)
9829 return REDUCE_BIT_FIELD (temp
);
9831 #undef REDUCE_BIT_FIELD
9834 /* Return TRUE if expression STMT is suitable for replacement.
9835 Never consider memory loads as replaceable, because those don't ever lead
9836 into constant expressions. */
9839 stmt_is_replaceable_p (gimple
*stmt
)
9841 if (ssa_is_replaceable_p (stmt
))
9843 /* Don't move around loads. */
9844 if (!gimple_assign_single_p (stmt
)
9845 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9852 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9853 enum expand_modifier modifier
, rtx
*alt_rtl
,
9854 bool inner_reference_p
)
9856 rtx op0
, op1
, temp
, decl_rtl
;
9859 machine_mode mode
, dmode
;
9860 enum tree_code code
= TREE_CODE (exp
);
9861 rtx subtarget
, original_target
;
9864 bool reduce_bit_field
;
9865 location_t loc
= EXPR_LOCATION (exp
);
9866 struct separate_ops ops
;
9867 tree treeop0
, treeop1
, treeop2
;
9868 tree ssa_name
= NULL_TREE
;
9871 type
= TREE_TYPE (exp
);
9872 mode
= TYPE_MODE (type
);
9873 unsignedp
= TYPE_UNSIGNED (type
);
9875 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9876 if (!VL_EXP_CLASS_P (exp
))
9877 switch (TREE_CODE_LENGTH (code
))
9880 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9881 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9882 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9892 ignore
= (target
== const0_rtx
9893 || ((CONVERT_EXPR_CODE_P (code
)
9894 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9895 && TREE_CODE (type
) == VOID_TYPE
));
9897 /* An operation in what may be a bit-field type needs the
9898 result to be reduced to the precision of the bit-field type,
9899 which is narrower than that of the type's mode. */
9900 reduce_bit_field
= (!ignore
9901 && INTEGRAL_TYPE_P (type
)
9902 && !type_has_mode_precision_p (type
));
9904 /* If we are going to ignore this result, we need only do something
9905 if there is a side-effect somewhere in the expression. If there
9906 is, short-circuit the most common cases here. Note that we must
9907 not call expand_expr with anything but const0_rtx in case this
9908 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9912 if (! TREE_SIDE_EFFECTS (exp
))
9915 /* Ensure we reference a volatile object even if value is ignored, but
9916 don't do this if all we are doing is taking its address. */
9917 if (TREE_THIS_VOLATILE (exp
)
9918 && TREE_CODE (exp
) != FUNCTION_DECL
9919 && mode
!= VOIDmode
&& mode
!= BLKmode
9920 && modifier
!= EXPAND_CONST_ADDRESS
)
9922 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9928 if (TREE_CODE_CLASS (code
) == tcc_unary
9929 || code
== BIT_FIELD_REF
9930 || code
== COMPONENT_REF
9931 || code
== INDIRECT_REF
)
9932 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9935 else if (TREE_CODE_CLASS (code
) == tcc_binary
9936 || TREE_CODE_CLASS (code
) == tcc_comparison
9937 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9939 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9940 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9947 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9950 /* Use subtarget as the target for operand 0 of a binary operation. */
9951 subtarget
= get_subtarget (target
);
9952 original_target
= target
;
9958 tree function
= decl_function_context (exp
);
9960 temp
= label_rtx (exp
);
9961 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9963 if (function
!= current_function_decl
9965 LABEL_REF_NONLOCAL_P (temp
) = 1;
9967 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9972 /* ??? ivopts calls expander, without any preparation from
9973 out-of-ssa. So fake instructions as if this was an access to the
9974 base variable. This unnecessarily allocates a pseudo, see how we can
9975 reuse it, if partition base vars have it set already. */
9976 if (!currently_expanding_to_rtl
)
9978 tree var
= SSA_NAME_VAR (exp
);
9979 if (var
&& DECL_RTL_SET_P (var
))
9980 return DECL_RTL (var
);
9981 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9982 LAST_VIRTUAL_REGISTER
+ 1);
9985 g
= get_gimple_for_ssa_name (exp
);
9986 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9988 && modifier
== EXPAND_INITIALIZER
9989 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9990 && (optimize
|| !SSA_NAME_VAR (exp
)
9991 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9992 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9993 g
= SSA_NAME_DEF_STMT (exp
);
9997 location_t saved_loc
= curr_insn_location ();
9998 loc
= gimple_location (g
);
9999 if (loc
!= UNKNOWN_LOCATION
)
10000 set_curr_insn_location (loc
);
10001 ops
.code
= gimple_assign_rhs_code (g
);
10002 switch (get_gimple_rhs_class (ops
.code
))
10004 case GIMPLE_TERNARY_RHS
:
10005 ops
.op2
= gimple_assign_rhs3 (g
);
10007 case GIMPLE_BINARY_RHS
:
10008 ops
.op1
= gimple_assign_rhs2 (g
);
10010 /* Try to expand conditonal compare. */
10011 if (targetm
.gen_ccmp_first
)
10013 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
10014 r
= expand_ccmp_expr (g
, mode
);
10019 case GIMPLE_UNARY_RHS
:
10020 ops
.op0
= gimple_assign_rhs1 (g
);
10021 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
10022 ops
.location
= loc
;
10023 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
10025 case GIMPLE_SINGLE_RHS
:
10027 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
10028 tmode
, modifier
, alt_rtl
,
10029 inner_reference_p
);
10033 gcc_unreachable ();
10035 set_curr_insn_location (saved_loc
);
10036 if (REG_P (r
) && !REG_EXPR (r
))
10037 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
10042 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
10043 exp
= SSA_NAME_VAR (ssa_name
);
10044 goto expand_decl_rtl
;
10048 /* If a static var's type was incomplete when the decl was written,
10049 but the type is complete now, lay out the decl now. */
10050 if (DECL_SIZE (exp
) == 0
10051 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
10052 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
10053 layout_decl (exp
, 0);
10057 case FUNCTION_DECL
:
10059 decl_rtl
= DECL_RTL (exp
);
10061 gcc_assert (decl_rtl
);
10063 /* DECL_MODE might change when TYPE_MODE depends on attribute target
10064 settings for VECTOR_TYPE_P that might switch for the function. */
10065 if (currently_expanding_to_rtl
10066 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
10067 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
10068 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
10070 decl_rtl
= copy_rtx (decl_rtl
);
10072 /* Record writes to register variables. */
10073 if (modifier
== EXPAND_WRITE
10074 && REG_P (decl_rtl
)
10075 && HARD_REGISTER_P (decl_rtl
))
10076 add_to_hard_reg_set (&crtl
->asm_clobbers
,
10077 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
10079 /* Ensure variable marked as used even if it doesn't go through
10080 a parser. If it hasn't be used yet, write out an external
10083 TREE_USED (exp
) = 1;
10085 /* Show we haven't gotten RTL for this yet. */
10088 /* Variables inherited from containing functions should have
10089 been lowered by this point. */
10091 context
= decl_function_context (exp
);
10093 || SCOPE_FILE_SCOPE_P (context
)
10094 || context
== current_function_decl
10095 || TREE_STATIC (exp
)
10096 || DECL_EXTERNAL (exp
)
10097 /* ??? C++ creates functions that are not TREE_STATIC. */
10098 || TREE_CODE (exp
) == FUNCTION_DECL
);
10100 /* This is the case of an array whose size is to be determined
10101 from its initializer, while the initializer is still being parsed.
10102 ??? We aren't parsing while expanding anymore. */
10104 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10105 temp
= validize_mem (decl_rtl
);
10107 /* If DECL_RTL is memory, we are in the normal case and the
10108 address is not valid, get the address into a register. */
10110 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10113 *alt_rtl
= decl_rtl
;
10114 decl_rtl
= use_anchored_address (decl_rtl
);
10115 if (modifier
!= EXPAND_CONST_ADDRESS
10116 && modifier
!= EXPAND_SUM
10117 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10118 : GET_MODE (decl_rtl
),
10119 XEXP (decl_rtl
, 0),
10120 MEM_ADDR_SPACE (decl_rtl
)))
10121 temp
= replace_equiv_address (decl_rtl
,
10122 copy_rtx (XEXP (decl_rtl
, 0)));
10125 /* If we got something, return it. But first, set the alignment
10126 if the address is a register. */
10129 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10130 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10132 else if (MEM_P (decl_rtl
))
10138 && modifier
!= EXPAND_WRITE
10139 && modifier
!= EXPAND_MEMORY
10140 && modifier
!= EXPAND_INITIALIZER
10141 && modifier
!= EXPAND_CONST_ADDRESS
10142 && modifier
!= EXPAND_SUM
10143 && !inner_reference_p
10145 && MEM_ALIGN (temp
) < GET_MODE_ALIGNMENT (mode
))
10146 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10147 MEM_ALIGN (temp
), NULL_RTX
, NULL
);
10153 dmode
= DECL_MODE (exp
);
10155 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10157 /* If the mode of DECL_RTL does not match that of the decl,
10158 there are two cases: we are dealing with a BLKmode value
10159 that is returned in a register, or we are dealing with
10160 a promoted value. In the latter case, return a SUBREG
10161 of the wanted mode, but mark it so that we know that it
10162 was already extended. */
10163 if (REG_P (decl_rtl
)
10164 && dmode
!= BLKmode
10165 && GET_MODE (decl_rtl
) != dmode
)
10167 machine_mode pmode
;
10169 /* Get the signedness to be used for this variable. Ensure we get
10170 the same mode we got when the variable was declared. */
10171 if (code
!= SSA_NAME
)
10172 pmode
= promote_decl_mode (exp
, &unsignedp
);
10173 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10174 && gimple_code (g
) == GIMPLE_CALL
10175 && !gimple_call_internal_p (g
))
10176 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10177 gimple_call_fntype (g
),
10180 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10181 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10183 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10184 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10185 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10193 /* Given that TYPE_PRECISION (type) is not always equal to
10194 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10195 the former to the latter according to the signedness of the
10197 scalar_int_mode int_mode
= SCALAR_INT_TYPE_MODE (type
);
10198 temp
= immed_wide_int_const
10199 (wi::to_wide (exp
, GET_MODE_PRECISION (int_mode
)), int_mode
);
10205 tree tmp
= NULL_TREE
;
10206 if (VECTOR_MODE_P (mode
))
10207 return const_vector_from_tree (exp
);
10208 scalar_int_mode int_mode
;
10209 if (is_int_mode (mode
, &int_mode
))
10211 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10212 return const_scalar_mask_from_tree (int_mode
, exp
);
10216 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10218 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10219 type_for_mode
, exp
);
10224 vec
<constructor_elt
, va_gc
> *v
;
10225 /* Constructors need to be fixed-length. FIXME. */
10226 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10227 vec_alloc (v
, nunits
);
10228 for (unsigned int i
= 0; i
< nunits
; ++i
)
10229 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10230 tmp
= build_constructor (type
, v
);
10232 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10237 if (modifier
== EXPAND_WRITE
)
10239 /* Writing into CONST_DECL is always invalid, but handle it
10241 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10242 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10243 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10244 EXPAND_NORMAL
, as
);
10245 op0
= memory_address_addr_space (mode
, op0
, as
);
10246 temp
= gen_rtx_MEM (mode
, op0
);
10247 set_mem_addr_space (temp
, as
);
10250 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10253 /* If optimized, generate immediate CONST_DOUBLE
10254 which will be turned into memory by reload if necessary.
10256 We used to force a register so that loop.c could see it. But
10257 this does not allow gen_* patterns to perform optimizations with
10258 the constants. It also produces two insns in cases like "x = 1.0;".
10259 On most machines, floating-point constants are not permitted in
10260 many insns, so we'd end up copying it to a register in any case.
10262 Now, we do the copying in expand_binop, if appropriate. */
10263 return const_double_from_real_value (TREE_REAL_CST (exp
),
10264 TYPE_MODE (TREE_TYPE (exp
)));
10267 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10268 TYPE_MODE (TREE_TYPE (exp
)));
10271 /* Handle evaluating a complex constant in a CONCAT target. */
10272 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10276 mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10277 rtarg
= XEXP (original_target
, 0);
10278 itarg
= XEXP (original_target
, 1);
10280 /* Move the real and imaginary parts separately. */
10281 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10282 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10285 emit_move_insn (rtarg
, op0
);
10287 emit_move_insn (itarg
, op1
);
10289 return original_target
;
10295 temp
= expand_expr_constant (exp
, 1, modifier
);
10297 /* temp contains a constant address.
10298 On RISC machines where a constant address isn't valid,
10299 make some insns to get that address into a register. */
10300 if (modifier
!= EXPAND_CONST_ADDRESS
10301 && modifier
!= EXPAND_INITIALIZER
10302 && modifier
!= EXPAND_SUM
10303 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10304 MEM_ADDR_SPACE (temp
)))
10305 return replace_equiv_address (temp
,
10306 copy_rtx (XEXP (temp
, 0)));
10310 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10314 tree val
= treeop0
;
10315 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10316 inner_reference_p
);
10318 if (!SAVE_EXPR_RESOLVED_P (exp
))
10320 /* We can indeed still hit this case, typically via builtin
10321 expanders calling save_expr immediately before expanding
10322 something. Assume this means that we only have to deal
10323 with non-BLKmode values. */
10324 gcc_assert (GET_MODE (ret
) != BLKmode
);
10326 val
= build_decl (curr_insn_location (),
10327 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10328 DECL_ARTIFICIAL (val
) = 1;
10329 DECL_IGNORED_P (val
) = 1;
10331 TREE_OPERAND (exp
, 0) = treeop0
;
10332 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10334 if (!CONSTANT_P (ret
))
10335 ret
= copy_to_reg (ret
);
10336 SET_DECL_RTL (val
, ret
);
10344 /* If we don't need the result, just ensure we evaluate any
10348 unsigned HOST_WIDE_INT idx
;
10351 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10352 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10357 return expand_constructor (exp
, target
, modifier
, false);
10359 case TARGET_MEM_REF
:
10362 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10363 unsigned int align
;
10365 op0
= addr_for_mem_ref (exp
, as
, true);
10366 op0
= memory_address_addr_space (mode
, op0
, as
);
10367 temp
= gen_rtx_MEM (mode
, op0
);
10368 set_mem_attributes (temp
, exp
, 0);
10369 set_mem_addr_space (temp
, as
);
10370 align
= get_object_alignment (exp
);
10371 if (modifier
!= EXPAND_WRITE
10372 && modifier
!= EXPAND_MEMORY
10374 && align
< GET_MODE_ALIGNMENT (mode
))
10375 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10376 align
, NULL_RTX
, NULL
);
10382 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10384 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10385 machine_mode address_mode
;
10386 tree base
= TREE_OPERAND (exp
, 0);
10389 /* Handle expansion of non-aliased memory with non-BLKmode. That
10390 might end up in a register. */
10391 if (mem_ref_refers_to_non_mem_p (exp
))
10393 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10394 base
= TREE_OPERAND (base
, 0);
10395 poly_uint64 type_size
;
10396 if (known_eq (offset
, 0)
10398 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10399 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10400 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10401 target
, tmode
, modifier
);
10402 if (TYPE_MODE (type
) == BLKmode
)
10404 temp
= assign_stack_temp (DECL_MODE (base
),
10405 GET_MODE_SIZE (DECL_MODE (base
)));
10406 store_expr (base
, temp
, 0, false, false);
10407 temp
= adjust_address (temp
, BLKmode
, offset
);
10408 set_mem_size (temp
, int_size_in_bytes (type
));
10411 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10412 bitsize_int (offset
* BITS_PER_UNIT
));
10413 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10414 return expand_expr (exp
, target
, tmode
, modifier
);
10416 address_mode
= targetm
.addr_space
.address_mode (as
);
10417 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10419 tree mask
= gimple_assign_rhs2 (def_stmt
);
10420 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10421 gimple_assign_rhs1 (def_stmt
), mask
);
10422 TREE_OPERAND (exp
, 0) = base
;
10424 align
= get_object_alignment (exp
);
10425 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10426 op0
= memory_address_addr_space (mode
, op0
, as
);
10427 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10429 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10430 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10431 op0
= memory_address_addr_space (mode
, op0
, as
);
10433 temp
= gen_rtx_MEM (mode
, op0
);
10434 set_mem_attributes (temp
, exp
, 0);
10435 set_mem_addr_space (temp
, as
);
10436 if (TREE_THIS_VOLATILE (exp
))
10437 MEM_VOLATILE_P (temp
) = 1;
10438 if (modifier
!= EXPAND_WRITE
10439 && modifier
!= EXPAND_MEMORY
10440 && !inner_reference_p
10442 && align
< GET_MODE_ALIGNMENT (mode
))
10443 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
, align
,
10444 modifier
== EXPAND_STACK_PARM
10445 ? NULL_RTX
: target
, alt_rtl
);
10447 && modifier
!= EXPAND_MEMORY
10448 && modifier
!= EXPAND_WRITE
)
10449 temp
= flip_storage_order (mode
, temp
);
10456 tree array
= treeop0
;
10457 tree index
= treeop1
;
10460 /* Fold an expression like: "foo"[2].
10461 This is not done in fold so it won't happen inside &.
10462 Don't fold if this is for wide characters since it's too
10463 difficult to do correctly and this is a very rare case. */
10465 if (modifier
!= EXPAND_CONST_ADDRESS
10466 && modifier
!= EXPAND_INITIALIZER
10467 && modifier
!= EXPAND_MEMORY
)
10469 tree t
= fold_read_from_constant_string (exp
);
10472 return expand_expr (t
, target
, tmode
, modifier
);
10475 /* If this is a constant index into a constant array,
10476 just get the value from the array. Handle both the cases when
10477 we have an explicit constructor and when our operand is a variable
10478 that was declared const. */
10480 if (modifier
!= EXPAND_CONST_ADDRESS
10481 && modifier
!= EXPAND_INITIALIZER
10482 && modifier
!= EXPAND_MEMORY
10483 && TREE_CODE (array
) == CONSTRUCTOR
10484 && ! TREE_SIDE_EFFECTS (array
)
10485 && TREE_CODE (index
) == INTEGER_CST
)
10487 unsigned HOST_WIDE_INT ix
;
10490 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10492 if (tree_int_cst_equal (field
, index
))
10494 if (!TREE_SIDE_EFFECTS (value
))
10495 return expand_expr (fold (value
), target
, tmode
, modifier
);
10500 else if (optimize
>= 1
10501 && modifier
!= EXPAND_CONST_ADDRESS
10502 && modifier
!= EXPAND_INITIALIZER
10503 && modifier
!= EXPAND_MEMORY
10504 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10505 && TREE_CODE (index
) == INTEGER_CST
10506 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10507 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10509 if (init
== NULL_TREE
)
10511 tree value
= build_zero_cst (type
);
10512 if (TREE_CODE (value
) == CONSTRUCTOR
)
10514 /* If VALUE is a CONSTRUCTOR, this optimization is only
10515 useful if this doesn't store the CONSTRUCTOR into
10516 memory. If it does, it is more efficient to just
10517 load the data from the array directly. */
10518 rtx ret
= expand_constructor (value
, target
,
10520 if (ret
== NULL_RTX
)
10525 return expand_expr (value
, target
, tmode
, modifier
);
10527 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10529 unsigned HOST_WIDE_INT ix
;
10532 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10534 if (tree_int_cst_equal (field
, index
))
10536 if (TREE_SIDE_EFFECTS (value
))
10539 if (TREE_CODE (value
) == CONSTRUCTOR
)
10541 /* If VALUE is a CONSTRUCTOR, this
10542 optimization is only useful if
10543 this doesn't store the CONSTRUCTOR
10544 into memory. If it does, it is more
10545 efficient to just load the data from
10546 the array directly. */
10547 rtx ret
= expand_constructor (value
, target
,
10549 if (ret
== NULL_RTX
)
10554 expand_expr (fold (value
), target
, tmode
, modifier
);
10557 else if (TREE_CODE (init
) == STRING_CST
)
10559 tree low_bound
= array_ref_low_bound (exp
);
10560 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10562 /* Optimize the special case of a zero lower bound.
10564 We convert the lower bound to sizetype to avoid problems
10565 with constant folding. E.g. suppose the lower bound is
10566 1 and its mode is QI. Without the conversion
10567 (ARRAY + (INDEX - (unsigned char)1))
10569 (ARRAY + (-(unsigned char)1) + INDEX)
10571 (ARRAY + 255 + INDEX). Oops! */
10572 if (!integer_zerop (low_bound
))
10573 index1
= size_diffop_loc (loc
, index1
,
10574 fold_convert_loc (loc
, sizetype
,
10577 if (tree_fits_uhwi_p (index1
)
10578 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10580 tree char_type
= TREE_TYPE (TREE_TYPE (init
));
10581 scalar_int_mode char_mode
;
10583 if (is_int_mode (TYPE_MODE (char_type
), &char_mode
)
10584 && GET_MODE_SIZE (char_mode
) == 1)
10585 return gen_int_mode (TREE_STRING_POINTER (init
)
10586 [TREE_INT_CST_LOW (index1
)],
10592 goto normal_inner_ref
;
10594 case COMPONENT_REF
:
10595 /* If the operand is a CONSTRUCTOR, we can just extract the
10596 appropriate field if it is present. */
10597 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10599 unsigned HOST_WIDE_INT idx
;
10601 scalar_int_mode field_mode
;
10603 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10605 if (field
== treeop1
10606 /* We can normally use the value of the field in the
10607 CONSTRUCTOR. However, if this is a bitfield in
10608 an integral mode that we can fit in a HOST_WIDE_INT,
10609 we must mask only the number of bits in the bitfield,
10610 since this is done implicitly by the constructor. If
10611 the bitfield does not meet either of those conditions,
10612 we can't do this optimization. */
10613 && (! DECL_BIT_FIELD (field
)
10614 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10615 && (GET_MODE_PRECISION (field_mode
)
10616 <= HOST_BITS_PER_WIDE_INT
))))
10618 if (DECL_BIT_FIELD (field
)
10619 && modifier
== EXPAND_STACK_PARM
)
10621 op0
= expand_expr (value
, target
, tmode
, modifier
);
10622 if (DECL_BIT_FIELD (field
))
10624 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10625 scalar_int_mode imode
10626 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10628 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10630 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10632 op0
= expand_and (imode
, op0
, op1
, target
);
10636 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10638 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10640 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10648 goto normal_inner_ref
;
10650 case BIT_FIELD_REF
:
10651 case ARRAY_RANGE_REF
:
10654 machine_mode mode1
, mode2
;
10655 poly_int64 bitsize
, bitpos
, bytepos
;
10657 int reversep
, volatilep
= 0, must_force_mem
;
10659 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10660 &unsignedp
, &reversep
, &volatilep
);
10661 rtx orig_op0
, memloc
;
10662 bool clear_mem_expr
= false;
10664 /* If we got back the original object, something is wrong. Perhaps
10665 we are evaluating an expression too early. In any event, don't
10666 infinitely recurse. */
10667 gcc_assert (tem
!= exp
);
10669 /* If TEM's type is a union of variable size, pass TARGET to the inner
10670 computation, since it will need a temporary and TARGET is known
10671 to have to do. This occurs in unchecked conversion in Ada. */
10673 = expand_expr_real (tem
,
10674 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10675 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10676 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10678 && modifier
!= EXPAND_STACK_PARM
10679 ? target
: NULL_RTX
),
10681 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10684 /* If the field has a mode, we want to access it in the
10685 field's mode, not the computed mode.
10686 If a MEM has VOIDmode (external with incomplete type),
10687 use BLKmode for it instead. */
10690 if (mode1
!= VOIDmode
)
10691 op0
= adjust_address (op0
, mode1
, 0);
10692 else if (GET_MODE (op0
) == VOIDmode
)
10693 op0
= adjust_address (op0
, BLKmode
, 0);
10697 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10699 /* Make sure bitpos is not negative, it can wreak havoc later. */
10700 if (maybe_lt (bitpos
, 0))
10702 gcc_checking_assert (offset
== NULL_TREE
);
10703 offset
= size_int (bits_to_bytes_round_down (bitpos
));
10704 bitpos
= num_trailing_bits (bitpos
);
10707 /* If we have either an offset, a BLKmode result, or a reference
10708 outside the underlying object, we must force it to memory.
10709 Such a case can occur in Ada if we have unchecked conversion
10710 of an expression from a scalar type to an aggregate type or
10711 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10712 passed a partially uninitialized object or a view-conversion
10713 to a larger size. */
10714 must_force_mem
= (offset
10715 || mode1
== BLKmode
10716 || (mode
== BLKmode
10717 && !int_mode_for_size (bitsize
, 1).exists ())
10718 || maybe_gt (bitpos
+ bitsize
,
10719 GET_MODE_BITSIZE (mode2
)));
10721 /* Handle CONCAT first. */
10722 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10724 if (known_eq (bitpos
, 0)
10725 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10726 && COMPLEX_MODE_P (mode1
)
10727 && COMPLEX_MODE_P (GET_MODE (op0
))
10728 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10729 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10732 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10733 if (mode1
!= GET_MODE (op0
))
10736 for (int i
= 0; i
< 2; i
++)
10738 rtx op
= read_complex_part (op0
, i
!= 0);
10739 if (GET_CODE (op
) == SUBREG
)
10740 op
= force_reg (GET_MODE (op
), op
);
10741 temp
= gen_lowpart_common (GET_MODE_INNER (mode1
), op
);
10746 if (!REG_P (op
) && !MEM_P (op
))
10747 op
= force_reg (GET_MODE (op
), op
);
10748 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10752 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10756 if (known_eq (bitpos
, 0)
10757 && known_eq (bitsize
,
10758 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10759 && maybe_ne (bitsize
, 0))
10761 op0
= XEXP (op0
, 0);
10762 mode2
= GET_MODE (op0
);
10764 else if (known_eq (bitpos
,
10765 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10766 && known_eq (bitsize
,
10767 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10768 && maybe_ne (bitpos
, 0)
10769 && maybe_ne (bitsize
, 0))
10771 op0
= XEXP (op0
, 1);
10773 mode2
= GET_MODE (op0
);
10776 /* Otherwise force into memory. */
10777 must_force_mem
= 1;
10780 /* If this is a constant, put it in a register if it is a legitimate
10781 constant and we don't need a memory reference. */
10782 if (CONSTANT_P (op0
)
10783 && mode2
!= BLKmode
10784 && targetm
.legitimate_constant_p (mode2
, op0
)
10785 && !must_force_mem
)
10786 op0
= force_reg (mode2
, op0
);
10788 /* Otherwise, if this is a constant, try to force it to the constant
10789 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10790 is a legitimate constant. */
10791 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10792 op0
= validize_mem (memloc
);
10794 /* Otherwise, if this is a constant or the object is not in memory
10795 and need be, put it there. */
10796 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10798 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10799 emit_move_insn (memloc
, op0
);
10801 clear_mem_expr
= true;
10806 machine_mode address_mode
;
10807 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10810 gcc_assert (MEM_P (op0
));
10812 address_mode
= get_address_mode (op0
);
10813 if (GET_MODE (offset_rtx
) != address_mode
)
10815 /* We cannot be sure that the RTL in offset_rtx is valid outside
10816 of a memory address context, so force it into a register
10817 before attempting to convert it to the desired mode. */
10818 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10819 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10822 /* See the comment in expand_assignment for the rationale. */
10823 if (mode1
!= VOIDmode
10824 && maybe_ne (bitpos
, 0)
10825 && maybe_gt (bitsize
, 0)
10826 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10827 && multiple_p (bitpos
, bitsize
)
10828 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10829 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10831 op0
= adjust_address (op0
, mode1
, bytepos
);
10835 op0
= offset_address (op0
, offset_rtx
,
10836 highest_pow2_factor (offset
));
10839 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10840 record its alignment as BIGGEST_ALIGNMENT. */
10842 && known_eq (bitpos
, 0)
10844 && is_aligning_offset (offset
, tem
))
10845 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10847 /* Don't forget about volatility even if this is a bitfield. */
10848 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10850 if (op0
== orig_op0
)
10851 op0
= copy_rtx (op0
);
10853 MEM_VOLATILE_P (op0
) = 1;
10856 if (MEM_P (op0
) && TREE_CODE (tem
) == FUNCTION_DECL
)
10858 if (op0
== orig_op0
)
10859 op0
= copy_rtx (op0
);
10861 set_mem_align (op0
, BITS_PER_UNIT
);
10864 /* In cases where an aligned union has an unaligned object
10865 as a field, we might be extracting a BLKmode value from
10866 an integer-mode (e.g., SImode) object. Handle this case
10867 by doing the extract into an object as wide as the field
10868 (which we know to be the width of a basic mode), then
10869 storing into memory, and changing the mode to BLKmode. */
10870 if (mode1
== VOIDmode
10871 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10872 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10873 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10874 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10875 && modifier
!= EXPAND_CONST_ADDRESS
10876 && modifier
!= EXPAND_INITIALIZER
10877 && modifier
!= EXPAND_MEMORY
)
10878 /* If the bitfield is volatile and the bitsize
10879 is narrower than the access size of the bitfield,
10880 we need to extract bitfields from the access. */
10881 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10882 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10883 && mode1
!= BLKmode
10884 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
10885 /* If the field isn't aligned enough to fetch as a memref,
10886 fetch it as a bit field. */
10887 || (mode1
!= BLKmode
10889 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10890 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
10891 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10892 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
10893 && modifier
!= EXPAND_MEMORY
10894 && ((modifier
== EXPAND_CONST_ADDRESS
10895 || modifier
== EXPAND_INITIALIZER
)
10897 : targetm
.slow_unaligned_access (mode1
,
10899 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
10900 /* If the type and the field are a constant size and the
10901 size of the type isn't the same size as the bitfield,
10902 we must use bitfield operations. */
10903 || (known_size_p (bitsize
)
10904 && TYPE_SIZE (TREE_TYPE (exp
))
10905 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
10906 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
10909 machine_mode ext_mode
= mode
;
10911 if (ext_mode
== BLKmode
10912 && ! (target
!= 0 && MEM_P (op0
)
10914 && multiple_p (bitpos
, BITS_PER_UNIT
)))
10915 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10917 if (ext_mode
== BLKmode
)
10920 target
= assign_temp (type
, 1, 1);
10922 /* ??? Unlike the similar test a few lines below, this one is
10923 very likely obsolete. */
10924 if (known_eq (bitsize
, 0))
10927 /* In this case, BITPOS must start at a byte boundary and
10928 TARGET, if specified, must be a MEM. */
10929 gcc_assert (MEM_P (op0
)
10930 && (!target
|| MEM_P (target
)));
10932 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
10933 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
10934 emit_block_move (target
,
10935 adjust_address (op0
, VOIDmode
, bytepos
),
10936 gen_int_mode (bytesize
, Pmode
),
10937 (modifier
== EXPAND_STACK_PARM
10938 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10943 /* If we have nothing to extract, the result will be 0 for targets
10944 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10945 return 0 for the sake of consistency, as reading a zero-sized
10946 bitfield is valid in Ada and the value is fully specified. */
10947 if (known_eq (bitsize
, 0))
10950 op0
= validize_mem (op0
);
10952 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10953 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10955 /* If the result has aggregate type and the extraction is done in
10956 an integral mode, then the field may be not aligned on a byte
10957 boundary; in this case, if it has reverse storage order, it
10958 needs to be extracted as a scalar field with reverse storage
10959 order and put back into memory order afterwards. */
10960 if (AGGREGATE_TYPE_P (type
)
10961 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10962 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10964 gcc_checking_assert (known_ge (bitpos
, 0));
10965 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10966 (modifier
== EXPAND_STACK_PARM
10967 ? NULL_RTX
: target
),
10968 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10970 /* If the result has aggregate type and the mode of OP0 is an
10971 integral mode then, if BITSIZE is narrower than this mode
10972 and this is for big-endian data, we must put the field
10973 into the high-order bits. And we must also put it back
10974 into memory order if it has been previously reversed. */
10975 scalar_int_mode op0_mode
;
10976 if (AGGREGATE_TYPE_P (type
)
10977 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10979 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10981 gcc_checking_assert (known_le (bitsize
, size
));
10982 if (maybe_lt (bitsize
, size
)
10983 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10984 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10985 size
- bitsize
, op0
, 1);
10988 op0
= flip_storage_order (op0_mode
, op0
);
10991 /* If the result type is BLKmode, store the data into a temporary
10992 of the appropriate type, but with the mode corresponding to the
10993 mode for the data we have (op0's mode). */
10994 if (mode
== BLKmode
)
10997 = assign_stack_temp_for_type (ext_mode
,
10998 GET_MODE_BITSIZE (ext_mode
),
11000 emit_move_insn (new_rtx
, op0
);
11001 op0
= copy_rtx (new_rtx
);
11002 PUT_MODE (op0
, BLKmode
);
11008 /* If the result is BLKmode, use that to access the object
11010 if (mode
== BLKmode
)
11013 /* Get a reference to just this component. */
11014 bytepos
= bits_to_bytes_round_down (bitpos
);
11015 if (modifier
== EXPAND_CONST_ADDRESS
11016 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
11017 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
11019 op0
= adjust_address (op0
, mode1
, bytepos
);
11021 if (op0
== orig_op0
)
11022 op0
= copy_rtx (op0
);
11024 /* Don't set memory attributes if the base expression is
11025 SSA_NAME that got expanded as a MEM or a CONSTANT. In that case,
11026 we should just honor its original memory attributes. */
11027 if (!(TREE_CODE (tem
) == SSA_NAME
11028 && (MEM_P (orig_op0
) || CONSTANT_P (orig_op0
))))
11029 set_mem_attributes (op0
, exp
, 0);
11031 if (REG_P (XEXP (op0
, 0)))
11032 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11034 /* If op0 is a temporary because the original expressions was forced
11035 to memory, clear MEM_EXPR so that the original expression cannot
11036 be marked as addressable through MEM_EXPR of the temporary. */
11037 if (clear_mem_expr
)
11038 set_mem_expr (op0
, NULL_TREE
);
11040 MEM_VOLATILE_P (op0
) |= volatilep
;
11043 && modifier
!= EXPAND_MEMORY
11044 && modifier
!= EXPAND_WRITE
)
11045 op0
= flip_storage_order (mode1
, op0
);
11047 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
11048 || modifier
== EXPAND_CONST_ADDRESS
11049 || modifier
== EXPAND_INITIALIZER
)
11053 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
11055 convert_move (target
, op0
, unsignedp
);
11060 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
11063 /* All valid uses of __builtin_va_arg_pack () are removed during
11065 if (CALL_EXPR_VA_ARG_PACK (exp
))
11066 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
11068 tree fndecl
= get_callee_fndecl (exp
), attr
;
11071 /* Don't diagnose the error attribute in thunks, those are
11072 artificially created. */
11073 && !CALL_FROM_THUNK_P (exp
)
11074 && (attr
= lookup_attribute ("error",
11075 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11077 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11078 error ("%Kcall to %qs declared with attribute error: %s", exp
,
11079 identifier_to_locale (ident
),
11080 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11083 /* Don't diagnose the warning attribute in thunks, those are
11084 artificially created. */
11085 && !CALL_FROM_THUNK_P (exp
)
11086 && (attr
= lookup_attribute ("warning",
11087 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11089 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11090 warning_at (tree_nonartificial_location (exp
),
11091 OPT_Wattribute_warning
,
11092 "%Kcall to %qs declared with attribute warning: %s",
11093 exp
, identifier_to_locale (ident
),
11094 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11097 /* Check for a built-in function. */
11098 if (fndecl
&& fndecl_built_in_p (fndecl
))
11100 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
11101 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
11104 return expand_call (exp
, target
, ignore
);
11106 case VIEW_CONVERT_EXPR
:
11109 /* If we are converting to BLKmode, try to avoid an intermediate
11110 temporary by fetching an inner memory reference. */
11111 if (mode
== BLKmode
11112 && poly_int_tree_p (TYPE_SIZE (type
))
11113 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11114 && handled_component_p (treeop0
))
11116 machine_mode mode1
;
11117 poly_int64 bitsize
, bitpos
, bytepos
;
11119 int reversep
, volatilep
= 0;
11121 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11122 &unsignedp
, &reversep
, &volatilep
);
11124 /* ??? We should work harder and deal with non-zero offsets. */
11126 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11128 && known_size_p (bitsize
)
11129 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11131 /* See the normal_inner_ref case for the rationale. */
11133 = expand_expr_real (tem
,
11134 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11135 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11137 && modifier
!= EXPAND_STACK_PARM
11138 ? target
: NULL_RTX
),
11140 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11143 if (MEM_P (orig_op0
))
11147 /* Get a reference to just this component. */
11148 if (modifier
== EXPAND_CONST_ADDRESS
11149 || modifier
== EXPAND_SUM
11150 || modifier
== EXPAND_INITIALIZER
)
11151 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11153 op0
= adjust_address (op0
, mode
, bytepos
);
11155 if (op0
== orig_op0
)
11156 op0
= copy_rtx (op0
);
11158 set_mem_attributes (op0
, treeop0
, 0);
11159 if (REG_P (XEXP (op0
, 0)))
11160 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11162 MEM_VOLATILE_P (op0
) |= volatilep
;
11168 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11169 NULL
, inner_reference_p
);
11171 /* If the input and output modes are both the same, we are done. */
11172 if (mode
== GET_MODE (op0
))
11174 /* If neither mode is BLKmode, and both modes are the same size
11175 then we can use gen_lowpart. */
11176 else if (mode
!= BLKmode
11177 && GET_MODE (op0
) != BLKmode
11178 && known_eq (GET_MODE_PRECISION (mode
),
11179 GET_MODE_PRECISION (GET_MODE (op0
)))
11180 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11182 if (GET_CODE (op0
) == SUBREG
)
11183 op0
= force_reg (GET_MODE (op0
), op0
);
11184 temp
= gen_lowpart_common (mode
, op0
);
11189 if (!REG_P (op0
) && !MEM_P (op0
))
11190 op0
= force_reg (GET_MODE (op0
), op0
);
11191 op0
= gen_lowpart (mode
, op0
);
11194 /* If both types are integral, convert from one mode to the other. */
11195 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11196 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11197 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11198 /* If the output type is a bit-field type, do an extraction. */
11199 else if (reduce_bit_field
)
11200 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11201 TYPE_UNSIGNED (type
), NULL_RTX
,
11202 mode
, mode
, false, NULL
);
11203 /* As a last resort, spill op0 to memory, and reload it in a
11205 else if (!MEM_P (op0
))
11207 /* If the operand is not a MEM, force it into memory. Since we
11208 are going to be changing the mode of the MEM, don't call
11209 force_const_mem for constants because we don't allow pool
11210 constants to change mode. */
11211 tree inner_type
= TREE_TYPE (treeop0
);
11213 gcc_assert (!TREE_ADDRESSABLE (exp
));
11215 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11217 = assign_stack_temp_for_type
11218 (TYPE_MODE (inner_type
),
11219 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11221 emit_move_insn (target
, op0
);
11225 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11226 output type is such that the operand is known to be aligned, indicate
11227 that it is. Otherwise, we need only be concerned about alignment for
11228 non-BLKmode results. */
11231 enum insn_code icode
;
11233 if (modifier
!= EXPAND_WRITE
11234 && modifier
!= EXPAND_MEMORY
11235 && !inner_reference_p
11237 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11239 /* If the target does have special handling for unaligned
11240 loads of mode then use them. */
11241 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11242 != CODE_FOR_nothing
)
11246 op0
= adjust_address (op0
, mode
, 0);
11247 /* We've already validated the memory, and we're creating a
11248 new pseudo destination. The predicates really can't
11250 reg
= gen_reg_rtx (mode
);
11252 /* Nor can the insn generator. */
11253 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11257 else if (STRICT_ALIGNMENT
)
11259 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11260 poly_uint64 temp_size
= mode_size
;
11261 if (GET_MODE (op0
) != BLKmode
)
11262 temp_size
= upper_bound (temp_size
,
11263 GET_MODE_SIZE (GET_MODE (op0
)));
11265 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11266 rtx new_with_op0_mode
11267 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11269 gcc_assert (!TREE_ADDRESSABLE (exp
));
11271 if (GET_MODE (op0
) == BLKmode
)
11273 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11274 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11275 (modifier
== EXPAND_STACK_PARM
11276 ? BLOCK_OP_CALL_PARM
11277 : BLOCK_OP_NORMAL
));
11280 emit_move_insn (new_with_op0_mode
, op0
);
11286 op0
= adjust_address (op0
, mode
, 0);
11293 tree lhs
= treeop0
;
11294 tree rhs
= treeop1
;
11295 gcc_assert (ignore
);
11297 /* Check for |= or &= of a bitfield of size one into another bitfield
11298 of size 1. In this case, (unless we need the result of the
11299 assignment) we can do this more efficiently with a
11300 test followed by an assignment, if necessary.
11302 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11303 things change so we do, this code should be enhanced to
11305 if (TREE_CODE (lhs
) == COMPONENT_REF
11306 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11307 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11308 && TREE_OPERAND (rhs
, 0) == lhs
11309 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11310 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11311 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11313 rtx_code_label
*label
= gen_label_rtx ();
11314 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11315 profile_probability prob
= profile_probability::uninitialized ();
11317 jumpifnot (TREE_OPERAND (rhs
, 1), label
, prob
);
11319 jumpif (TREE_OPERAND (rhs
, 1), label
, prob
);
11320 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11322 do_pending_stack_adjust ();
11323 emit_label (label
);
11327 expand_assignment (lhs
, rhs
, false);
11332 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11334 case REALPART_EXPR
:
11335 op0
= expand_normal (treeop0
);
11336 return read_complex_part (op0
, false);
11338 case IMAGPART_EXPR
:
11339 op0
= expand_normal (treeop0
);
11340 return read_complex_part (op0
, true);
11347 /* Expanded in cfgexpand.c. */
11348 gcc_unreachable ();
11350 case TRY_CATCH_EXPR
:
11352 case EH_FILTER_EXPR
:
11353 case TRY_FINALLY_EXPR
:
11355 /* Lowered by tree-eh.c. */
11356 gcc_unreachable ();
11358 case WITH_CLEANUP_EXPR
:
11359 case CLEANUP_POINT_EXPR
:
11361 case CASE_LABEL_EXPR
:
11366 case COMPOUND_EXPR
:
11367 case PREINCREMENT_EXPR
:
11368 case PREDECREMENT_EXPR
:
11369 case POSTINCREMENT_EXPR
:
11370 case POSTDECREMENT_EXPR
:
11373 case COMPOUND_LITERAL_EXPR
:
11374 /* Lowered by gimplify.c. */
11375 gcc_unreachable ();
11378 /* Function descriptors are not valid except for as
11379 initialization constants, and should not be expanded. */
11380 gcc_unreachable ();
11382 case WITH_SIZE_EXPR
:
11383 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11384 have pulled out the size to use in whatever context it needed. */
11385 return expand_expr_real (treeop0
, original_target
, tmode
,
11386 modifier
, alt_rtl
, inner_reference_p
);
11389 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11393 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11394 signedness of TYPE), possibly returning the result in TARGET.
11395 TYPE is known to be a partial integer type. */
11397 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11399 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11400 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11402 /* For constant values, reduce using build_int_cst_type. */
11403 poly_int64 const_exp
;
11404 if (poly_int_rtx_p (exp
, &const_exp
))
11406 tree t
= build_int_cst_type (type
, const_exp
);
11407 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11409 else if (TYPE_UNSIGNED (type
))
11411 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11412 rtx mask
= immed_wide_int_const
11413 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11414 return expand_and (mode
, exp
, mask
, target
);
11418 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11419 int count
= GET_MODE_PRECISION (mode
) - prec
;
11420 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11421 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11425 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11426 when applied to the address of EXP produces an address known to be
11427 aligned more than BIGGEST_ALIGNMENT. */
11430 is_aligning_offset (const_tree offset
, const_tree exp
)
11432 /* Strip off any conversions. */
11433 while (CONVERT_EXPR_P (offset
))
11434 offset
= TREE_OPERAND (offset
, 0);
11436 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11437 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11438 if (TREE_CODE (offset
) != BIT_AND_EXPR
11439 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11440 || compare_tree_int (TREE_OPERAND (offset
, 1),
11441 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11442 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11445 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11446 It must be NEGATE_EXPR. Then strip any more conversions. */
11447 offset
= TREE_OPERAND (offset
, 0);
11448 while (CONVERT_EXPR_P (offset
))
11449 offset
= TREE_OPERAND (offset
, 0);
11451 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11454 offset
= TREE_OPERAND (offset
, 0);
11455 while (CONVERT_EXPR_P (offset
))
11456 offset
= TREE_OPERAND (offset
, 0);
11458 /* This must now be the address of EXP. */
11459 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11462 /* Return the tree node if an ARG corresponds to a string constant or zero
11463 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
11464 non-constant) offset in bytes within the string that ARG is accessing.
11465 If MEM_SIZE is non-zero the storage size of the memory is returned.
11466 If DECL is non-zero the constant declaration is returned if available. */
11469 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
11471 tree dummy
= NULL_TREE
;;
11475 /* Store the type of the original expression before conversions
11476 via NOP_EXPR or POINTER_PLUS_EXPR to other types have been
11478 tree argtype
= TREE_TYPE (arg
);
11483 /* Non-constant index into the character array in an ARRAY_REF
11484 expression or null. */
11485 tree varidx
= NULL_TREE
;
11487 poly_int64 base_off
= 0;
11489 if (TREE_CODE (arg
) == ADDR_EXPR
)
11491 arg
= TREE_OPERAND (arg
, 0);
11493 if (TREE_CODE (arg
) == ARRAY_REF
)
11495 tree idx
= TREE_OPERAND (arg
, 1);
11496 if (TREE_CODE (idx
) != INTEGER_CST
)
11498 /* From a pointer (but not array) argument extract the variable
11499 index to prevent get_addr_base_and_unit_offset() from failing
11500 due to it. Use it later to compute the non-constant offset
11501 into the string and return it to the caller. */
11503 ref
= TREE_OPERAND (arg
, 0);
11505 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
11508 if (!integer_zerop (array_ref_low_bound (arg
)))
11511 if (!integer_onep (array_ref_element_size (arg
)))
11515 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
11517 || (TREE_CODE (array
) != VAR_DECL
11518 && TREE_CODE (array
) != CONST_DECL
11519 && TREE_CODE (array
) != STRING_CST
))
11522 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11524 tree arg0
= TREE_OPERAND (arg
, 0);
11525 tree arg1
= TREE_OPERAND (arg
, 1);
11528 tree str
= string_constant (arg0
, &offset
, mem_size
, decl
);
11531 str
= string_constant (arg1
, &offset
, mem_size
, decl
);
11537 /* Avoid pointers to arrays (see bug 86622). */
11538 if (POINTER_TYPE_P (TREE_TYPE (arg
))
11539 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
11540 && !(decl
&& !*decl
)
11541 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11542 && tree_fits_uhwi_p (*mem_size
)
11543 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11546 tree type
= TREE_TYPE (offset
);
11547 arg1
= fold_convert (type
, arg1
);
11548 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
11553 else if (TREE_CODE (arg
) == SSA_NAME
)
11555 gimple
*stmt
= SSA_NAME_DEF_STMT (arg
);
11556 if (!is_gimple_assign (stmt
))
11559 tree rhs1
= gimple_assign_rhs1 (stmt
);
11560 tree_code code
= gimple_assign_rhs_code (stmt
);
11561 if (code
== ADDR_EXPR
)
11562 return string_constant (rhs1
, ptr_offset
, mem_size
, decl
);
11563 else if (code
!= POINTER_PLUS_EXPR
)
11567 if (tree str
= string_constant (rhs1
, &offset
, mem_size
, decl
))
11569 /* Avoid pointers to arrays (see bug 86622). */
11570 if (POINTER_TYPE_P (TREE_TYPE (rhs1
))
11571 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1
))) == ARRAY_TYPE
11572 && !(decl
&& !*decl
)
11573 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11574 && tree_fits_uhwi_p (*mem_size
)
11575 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11578 tree rhs2
= gimple_assign_rhs2 (stmt
);
11579 tree type
= TREE_TYPE (offset
);
11580 rhs2
= fold_convert (type
, rhs2
);
11581 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, rhs2
);
11586 else if (DECL_P (arg
))
11591 tree offset
= wide_int_to_tree (sizetype
, base_off
);
11594 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
11597 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
11598 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
11599 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
11602 offset
= fold_convert (sizetype
, varidx
);
11605 if (TREE_CODE (array
) == STRING_CST
)
11607 *ptr_offset
= fold_convert (sizetype
, offset
);
11608 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
11611 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array
)))
11612 >= TREE_STRING_LENGTH (array
));
11616 if (!VAR_P (array
) && TREE_CODE (array
) != CONST_DECL
)
11619 tree init
= ctor_for_folding (array
);
11621 /* Handle variables initialized with string literals. */
11622 if (!init
|| init
== error_mark_node
)
11624 if (TREE_CODE (init
) == CONSTRUCTOR
)
11626 /* Convert the 64-bit constant offset to a wider type to avoid
11629 if (!base_off
.is_constant (&wioff
))
11632 wioff
*= BITS_PER_UNIT
;
11633 if (!wi::fits_uhwi_p (wioff
))
11636 base_off
= wioff
.to_uhwi ();
11637 unsigned HOST_WIDE_INT fieldoff
= 0;
11638 init
= fold_ctor_reference (TREE_TYPE (arg
), init
, base_off
, 0, array
,
11640 HOST_WIDE_INT cstoff
;
11641 if (!base_off
.is_constant (&cstoff
))
11644 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
11645 tree off
= build_int_cst (sizetype
, cstoff
);
11647 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
11655 *ptr_offset
= offset
;
11657 tree inittype
= TREE_TYPE (init
);
11659 if (TREE_CODE (init
) == INTEGER_CST
11660 && (TREE_CODE (TREE_TYPE (array
)) == INTEGER_TYPE
11661 || TYPE_MAIN_VARIANT (inittype
) == char_type_node
))
11663 /* For a reference to (address of) a single constant character,
11664 store the native representation of the character in CHARBUF.
11665 If the reference is to an element of an array or a member
11666 of a struct, only consider narrow characters until ctors
11667 for wide character arrays are transformed to STRING_CSTs
11668 like those for narrow arrays. */
11669 unsigned char charbuf
[MAX_BITSIZE_MODE_ANY_MODE
/ BITS_PER_UNIT
];
11670 int len
= native_encode_expr (init
, charbuf
, sizeof charbuf
, 0);
11673 /* Construct a string literal with elements of INITTYPE and
11674 the representation above. Then strip
11675 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
11676 init
= build_string_literal (len
, (char *)charbuf
, inittype
);
11677 init
= TREE_OPERAND (TREE_OPERAND (init
, 0), 0);
11681 tree initsize
= TYPE_SIZE_UNIT (inittype
);
11683 if (TREE_CODE (init
) == CONSTRUCTOR
&& initializer_zerop (init
))
11685 /* Fold an empty/zero constructor for an implicitly initialized
11686 object or subobject into the empty string. */
11688 /* Determine the character type from that of the original
11690 tree chartype
= argtype
;
11691 if (POINTER_TYPE_P (chartype
))
11692 chartype
= TREE_TYPE (chartype
);
11693 while (TREE_CODE (chartype
) == ARRAY_TYPE
)
11694 chartype
= TREE_TYPE (chartype
);
11695 /* Convert a char array to an empty STRING_CST having an array
11696 of the expected type. */
11698 initsize
= integer_zero_node
;
11700 unsigned HOST_WIDE_INT size
= tree_to_uhwi (initsize
);
11701 init
= build_string_literal (size
? 1 : 0, "", chartype
, size
);
11702 init
= TREE_OPERAND (init
, 0);
11703 init
= TREE_OPERAND (init
, 0);
11705 *ptr_offset
= integer_zero_node
;
11711 if (TREE_CODE (init
) != STRING_CST
)
11714 *mem_size
= initsize
;
11716 gcc_checking_assert (tree_to_shwi (initsize
) >= TREE_STRING_LENGTH (init
));
11721 /* Compute the modular multiplicative inverse of A modulo M
11722 using extended Euclid's algorithm. Assumes A and M are coprime. */
11724 mod_inv (const wide_int
&a
, const wide_int
&b
)
11726 /* Verify the assumption. */
11727 gcc_checking_assert (wi::eq_p (wi::gcd (a
, b
), 1));
11729 unsigned int p
= a
.get_precision () + 1;
11730 gcc_checking_assert (b
.get_precision () + 1 == p
);
11731 wide_int c
= wide_int::from (a
, p
, UNSIGNED
);
11732 wide_int d
= wide_int::from (b
, p
, UNSIGNED
);
11733 wide_int x0
= wide_int::from (0, p
, UNSIGNED
);
11734 wide_int x1
= wide_int::from (1, p
, UNSIGNED
);
11736 if (wi::eq_p (b
, 1))
11737 return wide_int::from (1, p
, UNSIGNED
);
11739 while (wi::gt_p (c
, 1, UNSIGNED
))
11742 wide_int q
= wi::divmod_trunc (c
, d
, UNSIGNED
, &d
);
11745 x0
= wi::sub (x1
, wi::mul (q
, x0
));
11748 if (wi::lt_p (x1
, 0, SIGNED
))
11753 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
11754 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
11755 for C2 > 0 to x & C3 == C2
11756 for C2 < 0 to x & C3 == (C2 & C3). */
11758 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11760 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11761 tree treeop0
= gimple_assign_rhs1 (stmt
);
11762 tree treeop1
= gimple_assign_rhs2 (stmt
);
11763 tree type
= TREE_TYPE (*arg0
);
11764 scalar_int_mode mode
;
11765 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11767 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11768 || TYPE_PRECISION (type
) <= 1
11769 || TYPE_UNSIGNED (type
)
11770 /* Signed x % c == 0 should have been optimized into unsigned modulo
11772 || integer_zerop (*arg1
)
11773 /* If c is known to be non-negative, modulo will be expanded as unsigned
11775 || get_range_pos_neg (treeop0
) == 1)
11778 /* x % c == d where d < 0 && d <= -c should be always false. */
11779 if (tree_int_cst_sgn (*arg1
) == -1
11780 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
11783 int prec
= TYPE_PRECISION (type
);
11784 wide_int w
= wi::to_wide (treeop1
) - 1;
11785 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
11786 tree c3
= wide_int_to_tree (type
, w
);
11788 if (tree_int_cst_sgn (*arg1
) == -1)
11789 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
11791 rtx op0
= expand_normal (treeop0
);
11792 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11794 bool speed_p
= optimize_insn_for_speed_p ();
11796 do_pending_stack_adjust ();
11798 location_t loc
= gimple_location (stmt
);
11799 struct separate_ops ops
;
11800 ops
.code
= TRUNC_MOD_EXPR
;
11801 ops
.location
= loc
;
11802 ops
.type
= TREE_TYPE (treeop0
);
11805 ops
.op2
= NULL_TREE
;
11807 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11809 rtx_insn
*moinsns
= get_insns ();
11812 unsigned mocost
= seq_cost (moinsns
, speed_p
);
11813 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
11814 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
11816 ops
.code
= BIT_AND_EXPR
;
11817 ops
.location
= loc
;
11818 ops
.type
= TREE_TYPE (treeop0
);
11821 ops
.op2
= NULL_TREE
;
11823 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11825 rtx_insn
*muinsns
= get_insns ();
11828 unsigned mucost
= seq_cost (muinsns
, speed_p
);
11829 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
11830 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
11832 if (mocost
<= mucost
)
11834 emit_insn (moinsns
);
11835 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
11839 emit_insn (muinsns
);
11840 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
11845 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
11847 (X - C2) * C3 <= C4 (or >), where
11848 C3 is modular multiplicative inverse of C1 and 1<<prec and
11849 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
11850 if C2 > ((1<<prec) - 1) % C1).
11851 If C1 is even, S = ctz (C1) and C2 is 0, use
11852 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
11853 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
11855 For signed (X % C1) == 0 if C1 is odd to (all operations in it
11857 (X * C3) + C4 <= 2 * C4, where
11858 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
11859 C4 is ((1<<(prec - 1) - 1) / C1).
11860 If C1 is even, S = ctz(C1), use
11861 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
11862 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
11863 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
11865 See the Hacker's Delight book, section 10-17. */
11867 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11869 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
11870 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
11875 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11879 tree treeop0
= gimple_assign_rhs1 (stmt
);
11880 tree treeop1
= gimple_assign_rhs2 (stmt
);
11881 if (TREE_CODE (treeop0
) != SSA_NAME
11882 || TREE_CODE (treeop1
) != INTEGER_CST
11883 /* Don't optimize the undefined behavior case x % 0;
11884 x % 1 should have been optimized into zero, punt if
11885 it makes it here for whatever reason;
11886 x % -c should have been optimized into x % c. */
11887 || compare_tree_int (treeop1
, 2) <= 0
11888 /* Likewise x % c == d where d >= c should be always false. */
11889 || tree_int_cst_le (treeop1
, *arg1
))
11892 /* Unsigned x % pow2 is handled right already, for signed
11893 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
11894 if (integer_pow2p (treeop1
))
11895 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
11897 tree type
= TREE_TYPE (*arg0
);
11898 scalar_int_mode mode
;
11899 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11901 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11902 || TYPE_PRECISION (type
) <= 1)
11905 signop sgn
= UNSIGNED
;
11906 /* If both operands are known to have the sign bit clear, handle
11907 even the signed modulo case as unsigned. treeop1 is always
11908 positive >= 2, checked above. */
11909 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
11912 if (!TYPE_UNSIGNED (type
))
11914 if (tree_int_cst_sgn (*arg1
) == -1)
11916 type
= unsigned_type_for (type
);
11917 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
11921 int prec
= TYPE_PRECISION (type
);
11922 wide_int w
= wi::to_wide (treeop1
);
11923 int shift
= wi::ctz (w
);
11924 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
11925 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
11926 If C1 is odd, we can handle all cases by subtracting
11927 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
11928 e.g. by testing for overflow on the subtraction, punt on that for now
11930 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
11934 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
11935 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
11939 imm_use_iterator imm_iter
;
11940 use_operand_p use_p
;
11941 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
11943 gimple
*use_stmt
= USE_STMT (use_p
);
11944 /* Punt if treeop0 is used in the same bb in a division
11945 or another modulo with the same divisor. We should expect
11946 the division and modulo combined together. */
11947 if (use_stmt
== stmt
11948 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
11950 if (!is_gimple_assign (use_stmt
)
11951 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
11952 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
11954 if (gimple_assign_rhs1 (use_stmt
) != treeop0
11955 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
11960 w
= wi::lrshift (w
, shift
);
11961 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
11962 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
11963 wide_int m
= wide_int::from (mod_inv (a
, b
), prec
, UNSIGNED
);
11964 tree c3
= wide_int_to_tree (type
, m
);
11965 tree c5
= NULL_TREE
;
11967 if (sgn
== UNSIGNED
)
11969 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
11970 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
11971 otherwise use < or subtract one from C4. E.g. for
11972 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
11973 x % 3U == 1 already needs to be
11974 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
11975 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
11978 d
= wi::lrshift (d
, shift
);
11982 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
11984 d
= wi::lshift (e
, 1);
11987 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
11988 d
= wi::lrshift (e
, shift
- 1);
11990 c5
= wide_int_to_tree (type
, e
);
11992 tree c4
= wide_int_to_tree (type
, d
);
11994 rtx op0
= expand_normal (treeop0
);
11995 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11997 bool speed_p
= optimize_insn_for_speed_p ();
11999 do_pending_stack_adjust ();
12001 location_t loc
= gimple_location (stmt
);
12002 struct separate_ops ops
;
12003 ops
.code
= TRUNC_MOD_EXPR
;
12004 ops
.location
= loc
;
12005 ops
.type
= TREE_TYPE (treeop0
);
12008 ops
.op2
= NULL_TREE
;
12010 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12012 rtx_insn
*moinsns
= get_insns ();
12015 unsigned mocost
= seq_cost (moinsns
, speed_p
);
12016 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
12017 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
12019 tree t
= fold_convert_loc (loc
, type
, treeop0
);
12020 if (!integer_zerop (*arg1
))
12021 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
12022 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
12024 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
12027 tree s
= build_int_cst (NULL_TREE
, shift
);
12028 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
12032 rtx mur
= expand_normal (t
);
12033 rtx_insn
*muinsns
= get_insns ();
12036 unsigned mucost
= seq_cost (muinsns
, speed_p
);
12037 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
12038 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
12040 if (mocost
<= mucost
)
12042 emit_insn (moinsns
);
12043 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
12047 emit_insn (muinsns
);
12048 *arg0
= make_tree (type
, mur
);
12050 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
12053 /* Generate code to calculate OPS, and exploded expression
12054 using a store-flag instruction and return an rtx for the result.
12055 OPS reflects a comparison.
12057 If TARGET is nonzero, store the result there if convenient.
12059 Return zero if there is no suitable set-flag instruction
12060 available on this machine.
12062 Once expand_expr has been called on the arguments of the comparison,
12063 we are committed to doing the store flag, since it is not safe to
12064 re-evaluate the expression. We emit the store-flag insn by calling
12065 emit_store_flag, but only expand the arguments if we have a reason
12066 to believe that emit_store_flag will be successful. If we think that
12067 it will, but it isn't, we have to simulate the store-flag with a
12068 set/jump/set sequence. */
12071 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
12073 enum rtx_code code
;
12074 tree arg0
, arg1
, type
;
12075 machine_mode operand_mode
;
12078 rtx subtarget
= target
;
12079 location_t loc
= ops
->location
;
12084 /* Don't crash if the comparison was erroneous. */
12085 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
12088 type
= TREE_TYPE (arg0
);
12089 operand_mode
= TYPE_MODE (type
);
12090 unsignedp
= TYPE_UNSIGNED (type
);
12092 /* We won't bother with BLKmode store-flag operations because it would mean
12093 passing a lot of information to emit_store_flag. */
12094 if (operand_mode
== BLKmode
)
12097 /* We won't bother with store-flag operations involving function pointers
12098 when function pointers must be canonicalized before comparisons. */
12099 if (targetm
.have_canonicalize_funcptr_for_compare ()
12100 && ((POINTER_TYPE_P (TREE_TYPE (arg0
))
12101 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0
))))
12102 || (POINTER_TYPE_P (TREE_TYPE (arg1
))
12103 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1
))))))
12109 /* For vector typed comparisons emit code to generate the desired
12110 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
12111 expander for this. */
12112 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
12114 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
12115 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
12116 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
12117 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
12120 tree if_true
= constant_boolean_node (true, ops
->type
);
12121 tree if_false
= constant_boolean_node (false, ops
->type
);
12122 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
12127 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
12128 into (x - C2) * C3 < C4. */
12129 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
12130 && TREE_CODE (arg0
) == SSA_NAME
12131 && TREE_CODE (arg1
) == INTEGER_CST
)
12133 enum tree_code new_code
= maybe_optimize_mod_cmp (ops
->code
,
12135 if (new_code
!= ops
->code
)
12137 struct separate_ops nops
= *ops
;
12138 nops
.code
= ops
->code
= new_code
;
12141 nops
.type
= TREE_TYPE (arg0
);
12142 return do_store_flag (&nops
, target
, mode
);
12146 /* Get the rtx comparison code to use. We know that EXP is a comparison
12147 operation of some type. Some comparisons against 1 and -1 can be
12148 converted to comparisons with zero. Do so here so that the tests
12149 below will be aware that we have a comparison with zero. These
12150 tests will not catch constants in the first operand, but constants
12151 are rarely passed as the first operand. */
12162 if (integer_onep (arg1
))
12163 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
12165 code
= unsignedp
? LTU
: LT
;
12168 if (! unsignedp
&& integer_all_onesp (arg1
))
12169 arg1
= integer_zero_node
, code
= LT
;
12171 code
= unsignedp
? LEU
: LE
;
12174 if (! unsignedp
&& integer_all_onesp (arg1
))
12175 arg1
= integer_zero_node
, code
= GE
;
12177 code
= unsignedp
? GTU
: GT
;
12180 if (integer_onep (arg1
))
12181 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
12183 code
= unsignedp
? GEU
: GE
;
12186 case UNORDERED_EXPR
:
12212 gcc_unreachable ();
12215 /* Put a constant second. */
12216 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
12217 || TREE_CODE (arg0
) == FIXED_CST
)
12219 std::swap (arg0
, arg1
);
12220 code
= swap_condition (code
);
12223 /* If this is an equality or inequality test of a single bit, we can
12224 do this by shifting the bit being tested to the low-order bit and
12225 masking the result with the constant 1. If the condition was EQ,
12226 we xor it with 1. This does not require an scc insn and is faster
12227 than an scc insn even if we have it.
12229 The code to make this transformation was moved into fold_single_bit_test,
12230 so we just call into the folder and expand its result. */
12232 if ((code
== NE
|| code
== EQ
)
12233 && integer_zerop (arg1
)
12234 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
12236 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
12238 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
12240 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
12241 type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
12242 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
12243 gimple_assign_rhs1 (srcstmt
),
12244 gimple_assign_rhs2 (srcstmt
));
12245 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
12247 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
12251 if (! get_subtarget (target
)
12252 || GET_MODE (subtarget
) != operand_mode
)
12255 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
12258 target
= gen_reg_rtx (mode
);
12260 /* Try a cstore if possible. */
12261 return emit_store_flag_force (target
, code
, op0
, op1
,
12262 operand_mode
, unsignedp
,
12263 (TYPE_PRECISION (ops
->type
) == 1
12264 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
12267 /* Attempt to generate a casesi instruction. Returns 1 if successful,
12268 0 otherwise (i.e. if there is no casesi instruction).
12270 DEFAULT_PROBABILITY is the probability of jumping to the default
12273 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
12274 rtx table_label
, rtx default_label
, rtx fallback_label
,
12275 profile_probability default_probability
)
12277 class expand_operand ops
[5];
12278 scalar_int_mode index_mode
= SImode
;
12279 rtx op1
, op2
, index
;
12281 if (! targetm
.have_casesi ())
12284 /* The index must be some form of integer. Convert it to SImode. */
12285 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
12286 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
12288 rtx rangertx
= expand_normal (range
);
12290 /* We must handle the endpoints in the original mode. */
12291 index_expr
= build2 (MINUS_EXPR
, index_type
,
12292 index_expr
, minval
);
12293 minval
= integer_zero_node
;
12294 index
= expand_normal (index_expr
);
12296 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
12297 omode
, 1, default_label
,
12298 default_probability
);
12299 /* Now we can safely truncate. */
12300 index
= convert_to_mode (index_mode
, index
, 0);
12304 if (omode
!= index_mode
)
12306 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
12307 index_expr
= fold_convert (index_type
, index_expr
);
12310 index
= expand_normal (index_expr
);
12313 do_pending_stack_adjust ();
12315 op1
= expand_normal (minval
);
12316 op2
= expand_normal (range
);
12318 create_input_operand (&ops
[0], index
, index_mode
);
12319 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
12320 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
12321 create_fixed_operand (&ops
[3], table_label
);
12322 create_fixed_operand (&ops
[4], (default_label
12324 : fallback_label
));
12325 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
12329 /* Attempt to generate a tablejump instruction; same concept. */
12330 /* Subroutine of the next function.
12332 INDEX is the value being switched on, with the lowest value
12333 in the table already subtracted.
12334 MODE is its expected mode (needed if INDEX is constant).
12335 RANGE is the length of the jump table.
12336 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
12338 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
12339 index value is out of range.
12340 DEFAULT_PROBABILITY is the probability of jumping to
12341 the default label. */
12344 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
12345 rtx default_label
, profile_probability default_probability
)
12349 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
12350 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
12352 /* Do an unsigned comparison (in the proper mode) between the index
12353 expression and the value which represents the length of the range.
12354 Since we just finished subtracting the lower bound of the range
12355 from the index expression, this comparison allows us to simultaneously
12356 check that the original index expression value is both greater than
12357 or equal to the minimum value of the range and less than or equal to
12358 the maximum value of the range. */
12361 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
12362 default_label
, default_probability
);
12364 /* If index is in range, it must fit in Pmode.
12365 Convert to Pmode so we can index with it. */
12368 unsigned int width
;
12370 /* We know the value of INDEX is between 0 and RANGE. If we have a
12371 sign-extended subreg, and RANGE does not have the sign bit set, then
12372 we have a value that is valid for both sign and zero extension. In
12373 this case, we get better code if we sign extend. */
12374 if (GET_CODE (index
) == SUBREG
12375 && SUBREG_PROMOTED_VAR_P (index
)
12376 && SUBREG_PROMOTED_SIGNED_P (index
)
12377 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
12378 <= HOST_BITS_PER_WIDE_INT
)
12379 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
12380 index
= convert_to_mode (Pmode
, index
, 0);
12382 index
= convert_to_mode (Pmode
, index
, 1);
12385 /* Don't let a MEM slip through, because then INDEX that comes
12386 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
12387 and break_out_memory_refs will go to work on it and mess it up. */
12388 #ifdef PIC_CASE_VECTOR_ADDRESS
12389 if (flag_pic
&& !REG_P (index
))
12390 index
= copy_to_mode_reg (Pmode
, index
);
12393 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
12394 GET_MODE_SIZE, because this indicates how large insns are. The other
12395 uses should all be Pmode, because they are addresses. This code
12396 could fail if addresses and insns are not the same size. */
12397 index
= simplify_gen_binary (MULT
, Pmode
, index
,
12398 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
12400 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
12401 gen_rtx_LABEL_REF (Pmode
, table_label
));
12403 #ifdef PIC_CASE_VECTOR_ADDRESS
12405 index
= PIC_CASE_VECTOR_ADDRESS (index
);
12408 index
= memory_address (CASE_VECTOR_MODE
, index
);
12409 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
12410 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
12411 convert_move (temp
, vector
, 0);
12413 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
12415 /* If we are generating PIC code or if the table is PC-relative, the
12416 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
12417 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
12422 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
12423 rtx table_label
, rtx default_label
,
12424 profile_probability default_probability
)
12428 if (! targetm
.have_tablejump ())
12431 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
12432 fold_convert (index_type
, index_expr
),
12433 fold_convert (index_type
, minval
));
12434 index
= expand_normal (index_expr
);
12435 do_pending_stack_adjust ();
12437 do_tablejump (index
, TYPE_MODE (index_type
),
12438 convert_modes (TYPE_MODE (index_type
),
12439 TYPE_MODE (TREE_TYPE (range
)),
12440 expand_normal (range
),
12441 TYPE_UNSIGNED (TREE_TYPE (range
))),
12442 table_label
, default_label
, default_probability
);
12446 /* Return a CONST_VECTOR rtx representing vector mask for
12447 a VECTOR_CST of booleans. */
12449 const_vector_mask_from_tree (tree exp
)
12451 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12452 machine_mode inner
= GET_MODE_INNER (mode
);
12454 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12455 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12456 unsigned int count
= builder
.encoded_nelts ();
12457 for (unsigned int i
= 0; i
< count
; ++i
)
12459 tree elt
= VECTOR_CST_ELT (exp
, i
);
12460 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12461 if (integer_zerop (elt
))
12462 builder
.quick_push (CONST0_RTX (inner
));
12463 else if (integer_onep (elt
)
12464 || integer_minus_onep (elt
))
12465 builder
.quick_push (CONSTM1_RTX (inner
));
12467 gcc_unreachable ();
12469 return builder
.build ();
12472 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
12473 Return a constant scalar rtx of mode MODE in which bit X is set if element
12474 X of EXP is nonzero. */
12476 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
12478 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
12481 /* The result has a fixed number of bits so the input must too. */
12482 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
12483 for (unsigned int i
= 0; i
< nunits
; ++i
)
12485 elt
= VECTOR_CST_ELT (exp
, i
);
12486 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12487 if (integer_all_onesp (elt
))
12488 res
= wi::set_bit (res
, i
);
12490 gcc_assert (integer_zerop (elt
));
12493 return immed_wide_int_const (res
, mode
);
12496 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
12498 const_vector_from_tree (tree exp
)
12500 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12502 if (initializer_zerop (exp
))
12503 return CONST0_RTX (mode
);
12505 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
12506 return const_vector_mask_from_tree (exp
);
12508 machine_mode inner
= GET_MODE_INNER (mode
);
12510 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12511 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12512 unsigned int count
= builder
.encoded_nelts ();
12513 for (unsigned int i
= 0; i
< count
; ++i
)
12515 tree elt
= VECTOR_CST_ELT (exp
, i
);
12516 if (TREE_CODE (elt
) == REAL_CST
)
12517 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
12519 else if (TREE_CODE (elt
) == FIXED_CST
)
12520 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
12523 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
12526 return builder
.build ();
12529 /* Build a decl for a personality function given a language prefix. */
12532 build_personality_function (const char *lang
)
12534 const char *unwind_and_version
;
12538 switch (targetm_common
.except_unwind_info (&global_options
))
12543 unwind_and_version
= "_sj0";
12547 unwind_and_version
= "_v0";
12550 unwind_and_version
= "_seh0";
12553 gcc_unreachable ();
12556 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
12558 type
= build_function_type_list (integer_type_node
, integer_type_node
,
12559 long_long_unsigned_type_node
,
12560 ptr_type_node
, ptr_type_node
, NULL_TREE
);
12561 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
12562 get_identifier (name
), type
);
12563 DECL_ARTIFICIAL (decl
) = 1;
12564 DECL_EXTERNAL (decl
) = 1;
12565 TREE_PUBLIC (decl
) = 1;
12567 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12568 are the flags assigned by targetm.encode_section_info. */
12569 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
12574 /* Extracts the personality function of DECL and returns the corresponding
12578 get_personality_function (tree decl
)
12580 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
12581 enum eh_personality_kind pk
;
12583 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
12584 if (pk
== eh_personality_none
)
12588 && pk
== eh_personality_any
)
12589 personality
= lang_hooks
.eh_personality ();
12591 if (pk
== eh_personality_lang
)
12592 gcc_assert (personality
!= NULL_TREE
);
12594 return XEXP (DECL_RTL (personality
), 0);
12597 /* Returns a tree for the size of EXP in bytes. */
12600 tree_expr_size (const_tree exp
)
12603 && DECL_SIZE_UNIT (exp
) != 0)
12604 return DECL_SIZE_UNIT (exp
);
12606 return size_in_bytes (TREE_TYPE (exp
));
12609 /* Return an rtx for the size in bytes of the value of EXP. */
12612 expr_size (tree exp
)
12616 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12617 size
= TREE_OPERAND (exp
, 1);
12620 size
= tree_expr_size (exp
);
12622 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12625 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12628 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12629 if the size can vary or is larger than an integer. */
12631 static HOST_WIDE_INT
12632 int_expr_size (tree exp
)
12636 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12637 size
= TREE_OPERAND (exp
, 1);
12640 size
= tree_expr_size (exp
);
12644 if (size
== 0 || !tree_fits_shwi_p (size
))
12647 return tree_to_shwi (size
);