1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
31 #include "insn-config.h"
36 #include "cfgcleanup.h"
47 #include "insn-codes.h"
49 #include "diagnostic-core.h"
53 #include "tree-pass.h"
55 #include "shrink-wrap.h"
65 #ifndef MAX_CONDITIONAL_EXECUTE
66 #define MAX_CONDITIONAL_EXECUTE \
67 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
71 #ifndef HAVE_cbranchcc4
72 #define HAVE_cbranchcc4 0
75 #define IFCVT_MULTIPLE_DUMPS 1
77 #define NULL_BLOCK ((basic_block) NULL)
79 /* True if after combine pass. */
80 static bool ifcvt_after_combine
;
82 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
83 static int num_possible_if_blocks
;
85 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
87 static int num_updated_if_blocks
;
89 /* # of changes made. */
90 static int num_true_changes
;
92 /* Whether conditional execution changes were made. */
93 static int cond_exec_changed_p
;
95 /* Forward references. */
96 static int count_bb_insns (const_basic_block
);
97 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
98 static rtx_insn
*first_active_insn (basic_block
);
99 static rtx_insn
*last_active_insn (basic_block
, int);
100 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
101 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
102 static basic_block
block_fallthru (basic_block
);
103 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
105 static rtx
cond_exec_get_condition (rtx_insn
*);
106 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
107 static int noce_operand_ok (const_rtx
);
108 static void merge_if_block (ce_if_block
*);
109 static int find_cond_trap (basic_block
, edge
, edge
);
110 static basic_block
find_if_header (basic_block
, int);
111 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
112 static int noce_find_if_block (basic_block
, edge
, edge
, int);
113 static int cond_exec_find_if_block (ce_if_block
*);
114 static int find_if_case_1 (basic_block
, edge
, edge
);
115 static int find_if_case_2 (basic_block
, edge
, edge
);
116 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
118 static void noce_emit_move_insn (rtx
, rtx
);
119 static rtx_insn
*block_has_only_trap (basic_block
);
121 /* Count the number of non-jump active insns in BB. */
124 count_bb_insns (const_basic_block bb
)
127 rtx_insn
*insn
= BB_HEAD (bb
);
131 if (active_insn_p (insn
) && !JUMP_P (insn
))
134 if (insn
== BB_END (bb
))
136 insn
= NEXT_INSN (insn
);
142 /* Determine whether the total insn_rtx_cost on non-jump insns in
143 basic block BB is less than MAX_COST. This function returns
144 false if the cost of any instruction could not be estimated.
146 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
147 as those insns are being speculated. MAX_COST is scaled with SCALE
148 plus a small fudge factor. */
151 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
154 rtx_insn
*insn
= BB_HEAD (bb
);
155 bool speed
= optimize_bb_for_speed_p (bb
);
157 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
158 applied to insn_rtx_cost when optimizing for size. Only do
159 this after combine because if-conversion might interfere with
160 passes before combine.
162 Use optimize_function_for_speed_p instead of the pre-defined
163 variable speed to make sure it is set to same value for all
164 basic blocks in one if-conversion transformation. */
165 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
166 scale
= REG_BR_PROB_BASE
;
167 /* Our branch probability/scaling factors are just estimates and don't
168 account for cases where we can get speculation for free and other
169 secondary benefits. So we fudge the scale factor to make speculating
170 appear a little more profitable when optimizing for performance. */
172 scale
+= REG_BR_PROB_BASE
/ 8;
179 if (NONJUMP_INSN_P (insn
))
181 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
185 /* If this instruction is the load or set of a "stack" register,
186 such as a floating point register on x87, then the cost of
187 speculatively executing this insn may need to include
188 the additional cost of popping its result off of the
189 register stack. Unfortunately, correctly recognizing and
190 accounting for this additional overhead is tricky, so for
191 now we simply prohibit such speculative execution. */
194 rtx set
= single_set (insn
);
195 if (set
&& STACK_REG_P (SET_DEST (set
)))
201 if (count
>= max_cost
)
204 else if (CALL_P (insn
))
207 if (insn
== BB_END (bb
))
209 insn
= NEXT_INSN (insn
);
215 /* Return the first non-jump active insn in the basic block. */
218 first_active_insn (basic_block bb
)
220 rtx_insn
*insn
= BB_HEAD (bb
);
224 if (insn
== BB_END (bb
))
226 insn
= NEXT_INSN (insn
);
229 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
231 if (insn
== BB_END (bb
))
233 insn
= NEXT_INSN (insn
);
242 /* Return the last non-jump active (non-jump) insn in the basic block. */
245 last_active_insn (basic_block bb
, int skip_use_p
)
247 rtx_insn
*insn
= BB_END (bb
);
248 rtx_insn
*head
= BB_HEAD (bb
);
252 || DEBUG_INSN_P (insn
)
254 && NONJUMP_INSN_P (insn
)
255 && GET_CODE (PATTERN (insn
)) == USE
))
259 insn
= PREV_INSN (insn
);
268 /* Return the active insn before INSN inside basic block CURR_BB. */
271 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
273 if (!insn
|| insn
== BB_HEAD (curr_bb
))
276 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
278 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
281 /* No other active insn all the way to the start of the basic block. */
282 if (insn
== BB_HEAD (curr_bb
))
289 /* Return the active insn after INSN inside basic block CURR_BB. */
292 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
294 if (!insn
|| insn
== BB_END (curr_bb
))
297 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
299 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
302 /* No other active insn all the way to the end of the basic block. */
303 if (insn
== BB_END (curr_bb
))
310 /* Return the basic block reached by falling though the basic block BB. */
313 block_fallthru (basic_block bb
)
315 edge e
= find_fallthru_edge (bb
->succs
);
317 return (e
) ? e
->dest
: NULL_BLOCK
;
320 /* Return true if RTXs A and B can be safely interchanged. */
323 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
325 if (!rtx_equal_p (a
, b
))
328 if (GET_CODE (a
) != MEM
)
331 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
332 reference is not. Interchanging a dead type-unsafe memory reference with
333 a live type-safe one creates a live type-unsafe memory reference, in other
334 words, it makes the program illegal.
335 We check here conservatively whether the two memory references have equal
336 memory attributes. */
338 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
342 /* Go through a bunch of insns, converting them to conditional
343 execution format if possible. Return TRUE if all of the non-note
344 insns were processed. */
347 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
348 /* if block information */rtx_insn
*start
,
349 /* first insn to look at */rtx end
,
350 /* last insn to look at */rtx test
,
351 /* conditional execution test */int prob_val
,
352 /* probability of branch taken. */int mod_ok
)
354 int must_be_last
= FALSE
;
362 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
364 /* dwarf2out can't cope with conditional prologues. */
365 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
368 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
371 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
373 /* dwarf2out can't cope with conditional unwind info. */
374 if (RTX_FRAME_RELATED_P (insn
))
377 /* Remove USE insns that get in the way. */
378 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
380 /* ??? Ug. Actually unlinking the thing is problematic,
381 given what we'd have to coordinate with our callers. */
382 SET_INSN_DELETED (insn
);
386 /* Last insn wasn't last? */
390 if (modified_in_p (test
, insn
))
397 /* Now build the conditional form of the instruction. */
398 pattern
= PATTERN (insn
);
399 xtest
= copy_rtx (test
);
401 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
403 if (GET_CODE (pattern
) == COND_EXEC
)
405 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
408 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
409 COND_EXEC_TEST (pattern
));
410 pattern
= COND_EXEC_CODE (pattern
);
413 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
415 /* If the machine needs to modify the insn being conditionally executed,
416 say for example to force a constant integer operand into a temp
417 register, do so here. */
418 #ifdef IFCVT_MODIFY_INSN
419 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
424 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
426 if (CALL_P (insn
) && prob_val
>= 0)
427 validate_change (insn
, ®_NOTES (insn
),
428 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
429 prob_val
, REG_NOTES (insn
)), 1);
439 /* Return the condition for a jump. Do not do any special processing. */
442 cond_exec_get_condition (rtx_insn
*jump
)
446 if (any_condjump_p (jump
))
447 test_if
= SET_SRC (pc_set (jump
));
450 cond
= XEXP (test_if
, 0);
452 /* If this branches to JUMP_LABEL when the condition is false,
453 reverse the condition. */
454 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
455 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
457 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
461 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
468 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
469 to conditional execution. Return TRUE if we were successful at
470 converting the block. */
473 cond_exec_process_if_block (ce_if_block
* ce_info
,
474 /* if block information */int do_multiple_p
)
476 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
477 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
478 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
479 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
480 rtx_insn
*then_start
; /* first insn in THEN block */
481 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
482 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
483 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
484 int max
; /* max # of insns to convert. */
485 int then_mod_ok
; /* whether conditional mods are ok in THEN */
486 rtx true_expr
; /* test for else block insns */
487 rtx false_expr
; /* test for then block insns */
488 int true_prob_val
; /* probability of else block */
489 int false_prob_val
; /* probability of then block */
490 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
491 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
492 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
493 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
494 int then_n_insns
, else_n_insns
, n_insns
;
495 enum rtx_code false_code
;
498 /* If test is comprised of && or || elements, and we've failed at handling
499 all of them together, just use the last test if it is the special case of
500 && elements without an ELSE block. */
501 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
503 if (else_bb
|| ! ce_info
->and_and_p
)
506 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
507 ce_info
->num_multiple_test_blocks
= 0;
508 ce_info
->num_and_and_blocks
= 0;
509 ce_info
->num_or_or_blocks
= 0;
512 /* Find the conditional jump to the ELSE or JOIN part, and isolate
514 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
518 /* If the conditional jump is more than just a conditional jump,
519 then we can not do conditional execution conversion on this block. */
520 if (! onlyjump_p (BB_END (test_bb
)))
523 /* Collect the bounds of where we're to search, skipping any labels, jumps
524 and notes at the beginning and end of the block. Then count the total
525 number of insns and see if it is small enough to convert. */
526 then_start
= first_active_insn (then_bb
);
527 then_end
= last_active_insn (then_bb
, TRUE
);
528 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
529 n_insns
= then_n_insns
;
530 max
= MAX_CONDITIONAL_EXECUTE
;
537 else_start
= first_active_insn (else_bb
);
538 else_end
= last_active_insn (else_bb
, TRUE
);
539 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
540 n_insns
+= else_n_insns
;
542 /* Look for matching sequences at the head and tail of the two blocks,
543 and limit the range of insns to be converted if possible. */
544 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
545 &then_first_tail
, &else_first_tail
,
547 if (then_first_tail
== BB_HEAD (then_bb
))
548 then_start
= then_end
= NULL
;
549 if (else_first_tail
== BB_HEAD (else_bb
))
550 else_start
= else_end
= NULL
;
555 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
557 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
558 n_insns
-= 2 * n_matching
;
563 && then_n_insns
> n_matching
564 && else_n_insns
> n_matching
)
566 int longest_match
= MIN (then_n_insns
- n_matching
,
567 else_n_insns
- n_matching
);
569 = flow_find_head_matching_sequence (then_bb
, else_bb
,
578 /* We won't pass the insns in the head sequence to
579 cond_exec_process_insns, so we need to test them here
580 to make sure that they don't clobber the condition. */
581 for (insn
= BB_HEAD (then_bb
);
582 insn
!= NEXT_INSN (then_last_head
);
583 insn
= NEXT_INSN (insn
))
584 if (!LABEL_P (insn
) && !NOTE_P (insn
)
585 && !DEBUG_INSN_P (insn
)
586 && modified_in_p (test_expr
, insn
))
590 if (then_last_head
== then_end
)
591 then_start
= then_end
= NULL
;
592 if (else_last_head
== else_end
)
593 else_start
= else_end
= NULL
;
598 then_start
= find_active_insn_after (then_bb
, then_last_head
);
600 else_start
= find_active_insn_after (else_bb
, else_last_head
);
601 n_insns
-= 2 * n_matching
;
609 /* Map test_expr/test_jump into the appropriate MD tests to use on
610 the conditionally executed code. */
612 true_expr
= test_expr
;
614 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
615 if (false_code
!= UNKNOWN
)
616 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
617 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
619 false_expr
= NULL_RTX
;
621 #ifdef IFCVT_MODIFY_TESTS
622 /* If the machine description needs to modify the tests, such as setting a
623 conditional execution register from a comparison, it can do so here. */
624 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
626 /* See if the conversion failed. */
627 if (!true_expr
|| !false_expr
)
631 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
634 true_prob_val
= XINT (note
, 0);
635 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
643 /* If we have && or || tests, do them here. These tests are in the adjacent
644 blocks after the first block containing the test. */
645 if (ce_info
->num_multiple_test_blocks
> 0)
647 basic_block bb
= test_bb
;
648 basic_block last_test_bb
= ce_info
->last_test_bb
;
655 rtx_insn
*start
, *end
;
657 enum rtx_code f_code
;
659 bb
= block_fallthru (bb
);
660 start
= first_active_insn (bb
);
661 end
= last_active_insn (bb
, TRUE
);
663 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
664 false_prob_val
, FALSE
))
667 /* If the conditional jump is more than just a conditional jump, then
668 we can not do conditional execution conversion on this block. */
669 if (! onlyjump_p (BB_END (bb
)))
672 /* Find the conditional jump and isolate the test. */
673 t
= cond_exec_get_condition (BB_END (bb
));
677 f_code
= reversed_comparison_code (t
, BB_END (bb
));
678 if (f_code
== UNKNOWN
)
681 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
682 if (ce_info
->and_and_p
)
684 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
685 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
689 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
690 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
693 /* If the machine description needs to modify the tests, such as
694 setting a conditional execution register from a comparison, it can
696 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
697 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
699 /* See if the conversion failed. */
707 while (bb
!= last_test_bb
);
710 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
711 on then THEN block. */
712 then_mod_ok
= (else_bb
== NULL_BLOCK
);
714 /* Go through the THEN and ELSE blocks converting the insns if possible
715 to conditional execution. */
719 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
720 false_expr
, false_prob_val
,
724 if (else_bb
&& else_end
725 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
726 true_expr
, true_prob_val
, TRUE
))
729 /* If we cannot apply the changes, fail. Do not go through the normal fail
730 processing, since apply_change_group will call cancel_changes. */
731 if (! apply_change_group ())
733 #ifdef IFCVT_MODIFY_CANCEL
734 /* Cancel any machine dependent changes. */
735 IFCVT_MODIFY_CANCEL (ce_info
);
740 #ifdef IFCVT_MODIFY_FINAL
741 /* Do any machine dependent final modifications. */
742 IFCVT_MODIFY_FINAL (ce_info
);
745 /* Conversion succeeded. */
747 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
748 n_insns
, (n_insns
== 1) ? " was" : "s were");
750 /* Merge the blocks! If we had matching sequences, make sure to delete one
751 copy at the appropriate location first: delete the copy in the THEN branch
752 for a tail sequence so that the remaining one is executed last for both
753 branches, and delete the copy in the ELSE branch for a head sequence so
754 that the remaining one is executed first for both branches. */
757 rtx_insn
*from
= then_first_tail
;
759 from
= find_active_insn_after (then_bb
, from
);
760 delete_insn_chain (from
, BB_END (then_bb
), false);
763 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
765 merge_if_block (ce_info
);
766 cond_exec_changed_p
= TRUE
;
770 #ifdef IFCVT_MODIFY_CANCEL
771 /* Cancel any machine dependent changes. */
772 IFCVT_MODIFY_CANCEL (ce_info
);
779 /* Used by noce_process_if_block to communicate with its subroutines.
781 The subroutines know that A and B may be evaluated freely. They
782 know that X is a register. They should insert new instructions
783 before cond_earliest. */
787 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
788 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
790 /* The jump that ends TEST_BB. */
793 /* The jump condition. */
796 /* New insns should be inserted before this one. */
797 rtx_insn
*cond_earliest
;
799 /* Insns in the THEN and ELSE block. There is always just this
800 one insns in those blocks. The insns are single_set insns.
801 If there was no ELSE block, INSN_B is the last insn before
802 COND_EARLIEST, or NULL_RTX. In the former case, the insn
803 operands are still valid, as if INSN_B was moved down below
805 rtx_insn
*insn_a
, *insn_b
;
807 /* The SET_SRC of INSN_A and INSN_B. */
810 /* The SET_DEST of INSN_A. */
813 /* True if this if block is not canonical. In the canonical form of
814 if blocks, the THEN_BB is the block reached via the fallthru edge
815 from TEST_BB. For the noce transformations, we allow the symmetric
817 bool then_else_reversed
;
819 /* Estimated cost of the particular branch instruction. */
823 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
824 static int noce_try_move (struct noce_if_info
*);
825 static int noce_try_store_flag (struct noce_if_info
*);
826 static int noce_try_addcc (struct noce_if_info
*);
827 static int noce_try_store_flag_constants (struct noce_if_info
*);
828 static int noce_try_store_flag_mask (struct noce_if_info
*);
829 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
831 static int noce_try_cmove (struct noce_if_info
*);
832 static int noce_try_cmove_arith (struct noce_if_info
*);
833 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
834 static int noce_try_minmax (struct noce_if_info
*);
835 static int noce_try_abs (struct noce_if_info
*);
836 static int noce_try_sign_mask (struct noce_if_info
*);
838 /* Helper function for noce_try_store_flag*. */
841 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
844 rtx cond
= if_info
->cond
;
848 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
849 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
851 /* If earliest == jump, or when the condition is complex, try to
852 build the store_flag insn directly. */
856 rtx set
= pc_set (if_info
->jump
);
857 cond
= XEXP (SET_SRC (set
), 0);
858 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
859 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
860 reversep
= !reversep
;
861 if (if_info
->then_else_reversed
)
862 reversep
= !reversep
;
866 code
= reversed_comparison_code (cond
, if_info
->jump
);
868 code
= GET_CODE (cond
);
870 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
871 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
873 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
875 rtx set
= gen_rtx_SET (x
, src
);
878 rtx_insn
*insn
= emit_insn (set
);
880 if (recog_memoized (insn
) >= 0)
882 rtx_insn
*seq
= get_insns ();
886 if_info
->cond_earliest
= if_info
->jump
;
894 /* Don't even try if the comparison operands or the mode of X are weird. */
895 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
898 return emit_store_flag (x
, code
, XEXP (cond
, 0),
899 XEXP (cond
, 1), VOIDmode
,
900 (code
== LTU
|| code
== LEU
901 || code
== GEU
|| code
== GTU
), normalize
);
904 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
905 X is the destination/target and Y is the value to copy. */
908 noce_emit_move_insn (rtx x
, rtx y
)
910 machine_mode outmode
;
914 if (GET_CODE (x
) != STRICT_LOW_PART
)
916 rtx_insn
*seq
, *insn
;
921 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
922 otherwise construct a suitable SET pattern ourselves. */
923 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
924 ? emit_move_insn (x
, y
)
925 : emit_insn (gen_rtx_SET (x
, y
));
929 if (recog_memoized (insn
) <= 0)
931 if (GET_CODE (x
) == ZERO_EXTRACT
)
933 rtx op
= XEXP (x
, 0);
934 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
935 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
937 /* store_bit_field expects START to be relative to
938 BYTES_BIG_ENDIAN and adjusts this value for machines with
939 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
940 invoke store_bit_field again it is necessary to have the START
941 value from the first call. */
942 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
945 start
= BITS_PER_UNIT
- start
- size
;
948 gcc_assert (REG_P (op
));
949 start
= BITS_PER_WORD
- start
- size
;
953 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
954 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
);
958 switch (GET_RTX_CLASS (GET_CODE (y
)))
961 ot
= code_to_optab (GET_CODE (y
));
965 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
966 if (target
!= NULL_RTX
)
969 emit_move_insn (x
, target
);
978 ot
= code_to_optab (GET_CODE (y
));
982 target
= expand_binop (GET_MODE (y
), ot
,
983 XEXP (y
, 0), XEXP (y
, 1),
985 if (target
!= NULL_RTX
)
988 emit_move_insn (x
, target
);
1004 outer
= XEXP (x
, 0);
1005 inner
= XEXP (outer
, 0);
1006 outmode
= GET_MODE (outer
);
1007 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1008 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1012 /* Return the CC reg if it is used in COND. */
1015 cc_in_cond (rtx cond
)
1017 if (HAVE_cbranchcc4
&& cond
1018 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1019 return XEXP (cond
, 0);
1024 /* Return sequence of instructions generated by if conversion. This
1025 function calls end_sequence() to end the current stream, ensures
1026 that the instructions are unshared, recognizable non-jump insns.
1027 On failure, this function returns a NULL_RTX. */
1030 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1033 rtx_insn
*seq
= get_insns ();
1034 rtx cc
= cc_in_cond (if_info
->cond
);
1036 set_used_flags (if_info
->x
);
1037 set_used_flags (if_info
->cond
);
1038 set_used_flags (if_info
->a
);
1039 set_used_flags (if_info
->b
);
1040 unshare_all_rtl_in_chain (seq
);
1043 /* Make sure that all of the instructions emitted are recognizable,
1044 and that we haven't introduced a new jump instruction.
1045 As an exercise for the reader, build a general mechanism that
1046 allows proper placement of required clobbers. */
1047 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1049 || recog_memoized (insn
) == -1
1050 /* Make sure new generated code does not clobber CC. */
1051 || (cc
&& set_of (cc
, insn
)))
1057 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1058 "if (a == b) x = a; else x = b" into "x = b". */
1061 noce_try_move (struct noce_if_info
*if_info
)
1063 rtx cond
= if_info
->cond
;
1064 enum rtx_code code
= GET_CODE (cond
);
1068 if (code
!= NE
&& code
!= EQ
)
1071 /* This optimization isn't valid if either A or B could be a NaN
1072 or a signed zero. */
1073 if (HONOR_NANS (if_info
->x
)
1074 || HONOR_SIGNED_ZEROS (if_info
->x
))
1077 /* Check whether the operands of the comparison are A and in
1079 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1080 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1081 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1082 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1084 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1087 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1089 /* Avoid generating the move if the source is the destination. */
1090 if (! rtx_equal_p (if_info
->x
, y
))
1093 noce_emit_move_insn (if_info
->x
, y
);
1094 seq
= end_ifcvt_sequence (if_info
);
1098 emit_insn_before_setloc (seq
, if_info
->jump
,
1099 INSN_LOCATION (if_info
->insn_a
));
1106 /* Convert "if (test) x = 1; else x = 0".
1108 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1109 tried in noce_try_store_flag_constants after noce_try_cmove has had
1110 a go at the conversion. */
1113 noce_try_store_flag (struct noce_if_info
*if_info
)
1119 if (CONST_INT_P (if_info
->b
)
1120 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1121 && if_info
->a
== const0_rtx
)
1123 else if (if_info
->b
== const0_rtx
1124 && CONST_INT_P (if_info
->a
)
1125 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1126 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1134 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1137 if (target
!= if_info
->x
)
1138 noce_emit_move_insn (if_info
->x
, target
);
1140 seq
= end_ifcvt_sequence (if_info
);
1144 emit_insn_before_setloc (seq
, if_info
->jump
,
1145 INSN_LOCATION (if_info
->insn_a
));
1155 /* Convert "if (test) x = a; else x = b", for A and B constant. */
1158 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1163 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1168 if (CONST_INT_P (if_info
->a
)
1169 && CONST_INT_P (if_info
->b
))
1171 mode
= GET_MODE (if_info
->x
);
1172 ifalse
= INTVAL (if_info
->a
);
1173 itrue
= INTVAL (if_info
->b
);
1174 bool subtract_flag_p
= false;
1176 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1177 /* Make sure we can represent the difference between the two values. */
1179 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1182 diff
= trunc_int_for_mode (diff
, mode
);
1184 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1188 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1191 /* We could collapse these cases but it is easier to follow the
1192 diff/STORE_FLAG_VALUE combinations when they are listed
1196 => 4 + (test != 0). */
1197 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1200 => can_reverse | 4 + (test == 0)
1201 !can_reverse | 3 - (test != 0). */
1202 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1204 reversep
= can_reverse
;
1205 subtract_flag_p
= !can_reverse
;
1208 => can_reverse | 3 + (test == 0)
1209 !can_reverse | 4 - (test != 0). */
1210 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1212 reversep
= can_reverse
;
1213 subtract_flag_p
= !can_reverse
;
1216 => 4 + (test != 0). */
1217 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1222 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1223 && (STORE_FLAG_VALUE
== 1
1224 || if_info
->branch_cost
>= 2))
1226 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1227 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1232 else if (itrue
== -1
1233 && (STORE_FLAG_VALUE
== -1
1234 || if_info
->branch_cost
>= 2))
1236 else if (ifalse
== -1 && can_reverse
1237 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1247 std::swap (itrue
, ifalse
);
1248 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1252 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1259 /* if (test) x = 3; else x = 4;
1260 => x = 3 + (test == 0); */
1261 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1263 /* Always use ifalse here. It should have been swapped with itrue
1264 when appropriate when reversep is true. */
1265 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1266 gen_int_mode (ifalse
, mode
), target
,
1267 if_info
->x
, 0, OPTAB_WIDEN
);
1270 /* if (test) x = 8; else x = 0;
1271 => x = (test != 0) << 3; */
1272 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1274 target
= expand_simple_binop (mode
, ASHIFT
,
1275 target
, GEN_INT (tmp
), if_info
->x
, 0,
1279 /* if (test) x = -1; else x = b;
1280 => x = -(test != 0) | b; */
1281 else if (itrue
== -1)
1283 target
= expand_simple_binop (mode
, IOR
,
1284 target
, gen_int_mode (ifalse
, mode
),
1285 if_info
->x
, 0, OPTAB_WIDEN
);
1299 if (target
!= if_info
->x
)
1300 noce_emit_move_insn (if_info
->x
, target
);
1302 seq
= end_ifcvt_sequence (if_info
);
1306 emit_insn_before_setloc (seq
, if_info
->jump
,
1307 INSN_LOCATION (if_info
->insn_a
));
1314 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1315 similarly for "foo--". */
1318 noce_try_addcc (struct noce_if_info
*if_info
)
1322 int subtract
, normalize
;
1324 if (GET_CODE (if_info
->a
) == PLUS
1325 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1326 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1329 rtx cond
= if_info
->cond
;
1330 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1332 /* First try to use addcc pattern. */
1333 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1334 && general_operand (XEXP (cond
, 1), VOIDmode
))
1337 target
= emit_conditional_add (if_info
->x
, code
,
1342 XEXP (if_info
->a
, 1),
1343 GET_MODE (if_info
->x
),
1344 (code
== LTU
|| code
== GEU
1345 || code
== LEU
|| code
== GTU
));
1348 if (target
!= if_info
->x
)
1349 noce_emit_move_insn (if_info
->x
, target
);
1351 seq
= end_ifcvt_sequence (if_info
);
1355 emit_insn_before_setloc (seq
, if_info
->jump
,
1356 INSN_LOCATION (if_info
->insn_a
));
1362 /* If that fails, construct conditional increment or decrement using
1364 if (if_info
->branch_cost
>= 2
1365 && (XEXP (if_info
->a
, 1) == const1_rtx
1366 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1369 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1370 subtract
= 0, normalize
= 0;
1371 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1372 subtract
= 1, normalize
= 0;
1374 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1377 target
= noce_emit_store_flag (if_info
,
1378 gen_reg_rtx (GET_MODE (if_info
->x
)),
1382 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1383 subtract
? MINUS
: PLUS
,
1384 if_info
->b
, target
, if_info
->x
,
1388 if (target
!= if_info
->x
)
1389 noce_emit_move_insn (if_info
->x
, target
);
1391 seq
= end_ifcvt_sequence (if_info
);
1395 emit_insn_before_setloc (seq
, if_info
->jump
,
1396 INSN_LOCATION (if_info
->insn_a
));
1406 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1409 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1416 if ((if_info
->branch_cost
>= 2
1417 || STORE_FLAG_VALUE
== -1)
1418 && ((if_info
->a
== const0_rtx
1419 && rtx_equal_p (if_info
->b
, if_info
->x
))
1420 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1423 && if_info
->b
== const0_rtx
1424 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1427 target
= noce_emit_store_flag (if_info
,
1428 gen_reg_rtx (GET_MODE (if_info
->x
)),
1431 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1433 target
, if_info
->x
, 0,
1438 int old_cost
, new_cost
, insn_cost
;
1441 if (target
!= if_info
->x
)
1442 noce_emit_move_insn (if_info
->x
, target
);
1444 seq
= end_ifcvt_sequence (if_info
);
1448 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1449 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1450 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1451 new_cost
= seq_cost (seq
, speed_p
);
1453 if (new_cost
> old_cost
)
1456 emit_insn_before_setloc (seq
, if_info
->jump
,
1457 INSN_LOCATION (if_info
->insn_a
));
1467 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1470 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1471 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1473 rtx target ATTRIBUTE_UNUSED
;
1474 int unsignedp ATTRIBUTE_UNUSED
;
1476 /* If earliest == jump, try to build the cmove insn directly.
1477 This is helpful when combine has created some complex condition
1478 (like for alpha's cmovlbs) that we can't hope to regenerate
1479 through the normal interface. */
1481 if (if_info
->cond_earliest
== if_info
->jump
)
1483 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1484 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1485 cond
, vtrue
, vfalse
);
1486 rtx set
= gen_rtx_SET (x
, if_then_else
);
1489 rtx_insn
*insn
= emit_insn (set
);
1491 if (recog_memoized (insn
) >= 0)
1493 rtx_insn
*seq
= get_insns ();
1503 /* Don't even try if the comparison operands are weird
1504 except that the target supports cbranchcc4. */
1505 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1506 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1508 if (!(HAVE_cbranchcc4
)
1509 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1510 || cmp_b
!= const0_rtx
)
1514 unsignedp
= (code
== LTU
|| code
== GEU
1515 || code
== LEU
|| code
== GTU
);
1517 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1518 vtrue
, vfalse
, GET_MODE (x
),
1523 /* We might be faced with a situation like:
1526 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1527 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1529 We can't do a conditional move in mode M, but it's possible that we
1530 could do a conditional move in mode N instead and take a subreg of
1533 If we can't create new pseudos, though, don't bother. */
1534 if (reload_completed
)
1537 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1539 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1540 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1541 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1542 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1543 rtx promoted_target
;
1545 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1546 || byte_vtrue
!= byte_vfalse
1547 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1548 != SUBREG_PROMOTED_VAR_P (vfalse
))
1549 || (SUBREG_PROMOTED_GET (vtrue
)
1550 != SUBREG_PROMOTED_GET (vfalse
)))
1553 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1555 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1556 VOIDmode
, reg_vtrue
, reg_vfalse
,
1557 GET_MODE (reg_vtrue
), unsignedp
);
1558 /* Nope, couldn't do it in that mode either. */
1562 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1563 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1564 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1565 emit_move_insn (x
, target
);
1572 /* Try only simple constants and registers here. More complex cases
1573 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1574 has had a go at it. */
1577 noce_try_cmove (struct noce_if_info
*if_info
)
1583 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1584 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1588 code
= GET_CODE (if_info
->cond
);
1589 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1590 XEXP (if_info
->cond
, 0),
1591 XEXP (if_info
->cond
, 1),
1592 if_info
->a
, if_info
->b
);
1596 if (target
!= if_info
->x
)
1597 noce_emit_move_insn (if_info
->x
, target
);
1599 seq
= end_ifcvt_sequence (if_info
);
1603 emit_insn_before_setloc (seq
, if_info
->jump
,
1604 INSN_LOCATION (if_info
->insn_a
));
1607 /* If both a and b are constants try a last-ditch transformation:
1608 if (test) x = a; else x = b;
1609 => x = (-(test != 0) & (b - a)) + a;
1610 Try this only if the target-specific expansion above has failed.
1611 The target-specific expander may want to generate sequences that
1612 we don't know about, so give them a chance before trying this
1614 else if (!targetm
.have_conditional_execution ()
1615 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1616 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1617 || if_info
->branch_cost
>= 3))
1619 machine_mode mode
= GET_MODE (if_info
->x
);
1620 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1621 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1622 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1629 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1630 /* Make sure we can represent the difference
1631 between the two values. */
1633 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1639 diff
= trunc_int_for_mode (diff
, mode
);
1640 target
= expand_simple_binop (mode
, AND
,
1641 target
, gen_int_mode (diff
, mode
),
1642 if_info
->x
, 0, OPTAB_WIDEN
);
1644 target
= expand_simple_binop (mode
, PLUS
,
1645 target
, gen_int_mode (ifalse
, mode
),
1646 if_info
->x
, 0, OPTAB_WIDEN
);
1649 if (target
!= if_info
->x
)
1650 noce_emit_move_insn (if_info
->x
, target
);
1652 seq
= end_ifcvt_sequence (if_info
);
1656 emit_insn_before_setloc (seq
, if_info
->jump
,
1657 INSN_LOCATION (if_info
->insn_a
));
1673 /* Try more complex cases involving conditional_move. */
1676 noce_try_cmove_arith (struct noce_if_info
*if_info
)
1682 rtx_insn
*insn_a
, *insn_b
;
1687 rtx_insn
*ifcvt_seq
;
1689 /* A conditional move from two memory sources is equivalent to a
1690 conditional on their addresses followed by a load. Don't do this
1691 early because it'll screw alias analysis. Note that we've
1692 already checked for no side effects. */
1693 /* ??? FIXME: Magic number 5. */
1694 if (cse_not_expected
1695 && MEM_P (a
) && MEM_P (b
)
1696 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
1697 && if_info
->branch_cost
>= 5)
1699 machine_mode address_mode
= get_address_mode (a
);
1703 x
= gen_reg_rtx (address_mode
);
1707 /* ??? We could handle this if we knew that a load from A or B could
1708 not trap or fault. This is also true if we've already loaded
1709 from the address along the path from ENTRY. */
1710 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
1713 /* if (test) x = a + b; else x = c - d;
1720 code
= GET_CODE (if_info
->cond
);
1721 insn_a
= if_info
->insn_a
;
1722 insn_b
= if_info
->insn_b
;
1724 /* Total insn_rtx_cost should be smaller than branch cost. Exit
1725 if insn_rtx_cost can't be estimated. */
1729 = insn_rtx_cost (PATTERN (insn_a
),
1730 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_a
)));
1731 if (insn_cost
== 0 || insn_cost
> COSTS_N_INSNS (if_info
->branch_cost
))
1740 += insn_rtx_cost (PATTERN (insn_b
),
1741 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_b
)));
1742 if (insn_cost
== 0 || insn_cost
> COSTS_N_INSNS (if_info
->branch_cost
))
1746 /* Possibly rearrange operands to make things come out more natural. */
1747 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
1750 if (rtx_equal_p (b
, x
))
1752 else if (general_operand (b
, GET_MODE (b
)))
1757 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
1759 std::swap (insn_a
, insn_b
);
1768 /* If either operand is complex, load it into a register first.
1769 The best way to do this is to copy the original insn. In this
1770 way we preserve any clobbers etc that the insn may have had.
1771 This is of course not possible in the IS_MEM case. */
1772 if (! general_operand (a
, GET_MODE (a
)))
1778 rtx reg
= gen_reg_rtx (GET_MODE (a
));
1779 insn
= emit_insn (gen_rtx_SET (reg
, a
));
1782 goto end_seq_and_fail
;
1785 a
= gen_reg_rtx (GET_MODE (a
));
1786 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
1787 rtx set
= single_set (copy_of_a
);
1789 insn
= emit_insn (PATTERN (copy_of_a
));
1791 if (recog_memoized (insn
) < 0)
1792 goto end_seq_and_fail
;
1794 if (! general_operand (b
, GET_MODE (b
)))
1802 rtx reg
= gen_reg_rtx (GET_MODE (b
));
1803 pat
= gen_rtx_SET (reg
, b
);
1806 goto end_seq_and_fail
;
1809 b
= gen_reg_rtx (GET_MODE (b
));
1810 rtx_insn
*copy_of_insn_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
1811 rtx set
= single_set (copy_of_insn_b
);
1813 pat
= PATTERN (copy_of_insn_b
);
1816 /* If insn to set up A clobbers any registers B depends on, try to
1817 swap insn that sets up A with the one that sets up B. If even
1818 that doesn't help, punt. */
1819 last
= get_last_insn ();
1820 if (last
&& modified_in_p (orig_b
, last
))
1822 new_insn
= emit_insn_before (pat
, get_insns ());
1823 if (modified_in_p (orig_a
, new_insn
))
1824 goto end_seq_and_fail
;
1827 new_insn
= emit_insn (pat
);
1829 if (recog_memoized (new_insn
) < 0)
1830 goto end_seq_and_fail
;
1833 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
1834 XEXP (if_info
->cond
, 1), a
, b
);
1837 goto end_seq_and_fail
;
1839 /* If we're handling a memory for above, emit the load now. */
1842 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
1844 /* Copy over flags as appropriate. */
1845 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
1846 MEM_VOLATILE_P (mem
) = 1;
1847 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
1848 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
1850 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
1852 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
1853 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
1855 noce_emit_move_insn (if_info
->x
, mem
);
1857 else if (target
!= x
)
1858 noce_emit_move_insn (x
, target
);
1860 ifcvt_seq
= end_ifcvt_sequence (if_info
);
1864 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
1865 INSN_LOCATION (if_info
->insn_a
));
1873 /* For most cases, the simplified condition we found is the best
1874 choice, but this is not the case for the min/max/abs transforms.
1875 For these we wish to know that it is A or B in the condition. */
1878 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
1879 rtx_insn
**earliest
)
1885 /* If target is already mentioned in the known condition, return it. */
1886 if (reg_mentioned_p (target
, if_info
->cond
))
1888 *earliest
= if_info
->cond_earliest
;
1889 return if_info
->cond
;
1892 set
= pc_set (if_info
->jump
);
1893 cond
= XEXP (SET_SRC (set
), 0);
1895 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
1896 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
1897 if (if_info
->then_else_reversed
)
1900 /* If we're looking for a constant, try to make the conditional
1901 have that constant in it. There are two reasons why it may
1902 not have the constant we want:
1904 1. GCC may have needed to put the constant in a register, because
1905 the target can't compare directly against that constant. For
1906 this case, we look for a SET immediately before the comparison
1907 that puts a constant in that register.
1909 2. GCC may have canonicalized the conditional, for example
1910 replacing "if x < 4" with "if x <= 3". We can undo that (or
1911 make equivalent types of changes) to get the constants we need
1912 if they're off by one in the right direction. */
1914 if (CONST_INT_P (target
))
1916 enum rtx_code code
= GET_CODE (if_info
->cond
);
1917 rtx op_a
= XEXP (if_info
->cond
, 0);
1918 rtx op_b
= XEXP (if_info
->cond
, 1);
1919 rtx_insn
*prev_insn
;
1921 /* First, look to see if we put a constant in a register. */
1922 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
1924 && BLOCK_FOR_INSN (prev_insn
)
1925 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
1926 && INSN_P (prev_insn
)
1927 && GET_CODE (PATTERN (prev_insn
)) == SET
)
1929 rtx src
= find_reg_equal_equiv_note (prev_insn
);
1931 src
= SET_SRC (PATTERN (prev_insn
));
1932 if (CONST_INT_P (src
))
1934 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
1936 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
1939 if (CONST_INT_P (op_a
))
1941 std::swap (op_a
, op_b
);
1942 code
= swap_condition (code
);
1947 /* Now, look to see if we can get the right constant by
1948 adjusting the conditional. */
1949 if (CONST_INT_P (op_b
))
1951 HOST_WIDE_INT desired_val
= INTVAL (target
);
1952 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
1957 if (actual_val
== desired_val
+ 1)
1960 op_b
= GEN_INT (desired_val
);
1964 if (actual_val
== desired_val
- 1)
1967 op_b
= GEN_INT (desired_val
);
1971 if (actual_val
== desired_val
- 1)
1974 op_b
= GEN_INT (desired_val
);
1978 if (actual_val
== desired_val
+ 1)
1981 op_b
= GEN_INT (desired_val
);
1989 /* If we made any changes, generate a new conditional that is
1990 equivalent to what we started with, but has the right
1992 if (code
!= GET_CODE (if_info
->cond
)
1993 || op_a
!= XEXP (if_info
->cond
, 0)
1994 || op_b
!= XEXP (if_info
->cond
, 1))
1996 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
1997 *earliest
= if_info
->cond_earliest
;
2002 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2003 earliest
, target
, HAVE_cbranchcc4
, true);
2004 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2007 /* We almost certainly searched back to a different place.
2008 Need to re-verify correct lifetimes. */
2010 /* X may not be mentioned in the range (cond_earliest, jump]. */
2011 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2012 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2015 /* A and B may not be modified in the range [cond_earliest, jump). */
2016 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2018 && (modified_in_p (if_info
->a
, insn
)
2019 || modified_in_p (if_info
->b
, insn
)))
2025 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2028 noce_try_minmax (struct noce_if_info
*if_info
)
2031 rtx_insn
*earliest
, *seq
;
2032 enum rtx_code code
, op
;
2035 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2036 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2037 to get the target to tell us... */
2038 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2039 || HONOR_NANS (if_info
->x
))
2042 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2046 /* Verify the condition is of the form we expect, and canonicalize
2047 the comparison code. */
2048 code
= GET_CODE (cond
);
2049 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2051 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2054 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2056 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2058 code
= swap_condition (code
);
2063 /* Determine what sort of operation this is. Note that the code is for
2064 a taken branch, so the code->operation mapping appears backwards. */
2097 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2098 if_info
->a
, if_info
->b
,
2099 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2105 if (target
!= if_info
->x
)
2106 noce_emit_move_insn (if_info
->x
, target
);
2108 seq
= end_ifcvt_sequence (if_info
);
2112 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2113 if_info
->cond
= cond
;
2114 if_info
->cond_earliest
= earliest
;
2119 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2120 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2124 noce_try_abs (struct noce_if_info
*if_info
)
2126 rtx cond
, target
, a
, b
, c
;
2127 rtx_insn
*earliest
, *seq
;
2129 bool one_cmpl
= false;
2131 /* Reject modes with signed zeros. */
2132 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2135 /* Recognize A and B as constituting an ABS or NABS. The canonical
2136 form is a branch around the negation, taken when the object is the
2137 first operand of a comparison against 0 that evaluates to true. */
2140 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2142 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2147 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2152 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2161 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2165 /* Verify the condition is of the form we expect. */
2166 if (rtx_equal_p (XEXP (cond
, 0), b
))
2168 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2176 /* Verify that C is zero. Search one step backward for a
2177 REG_EQUAL note or a simple source if necessary. */
2181 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2183 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2184 && (set
= single_set (insn
))
2185 && rtx_equal_p (SET_DEST (set
), c
))
2187 rtx note
= find_reg_equal_equiv_note (insn
);
2197 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2198 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2199 c
= get_pool_constant (XEXP (c
, 0));
2201 /* Work around funny ideas get_condition has wrt canonicalization.
2202 Note that these rtx constants are known to be CONST_INT, and
2203 therefore imply integer comparisons. */
2204 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2206 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2208 else if (c
!= CONST0_RTX (GET_MODE (b
)))
2211 /* Determine what sort of operation this is. */
2212 switch (GET_CODE (cond
))
2231 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2234 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2236 /* ??? It's a quandary whether cmove would be better here, especially
2237 for integers. Perhaps combine will clean things up. */
2238 if (target
&& negate
)
2241 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2244 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2254 if (target
!= if_info
->x
)
2255 noce_emit_move_insn (if_info
->x
, target
);
2257 seq
= end_ifcvt_sequence (if_info
);
2261 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2262 if_info
->cond
= cond
;
2263 if_info
->cond_earliest
= earliest
;
2268 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2271 noce_try_sign_mask (struct noce_if_info
*if_info
)
2277 bool t_unconditional
;
2279 cond
= if_info
->cond
;
2280 code
= GET_CODE (cond
);
2285 if (if_info
->a
== const0_rtx
)
2287 if ((code
== LT
&& c
== const0_rtx
)
2288 || (code
== LE
&& c
== constm1_rtx
))
2291 else if (if_info
->b
== const0_rtx
)
2293 if ((code
== GE
&& c
== const0_rtx
)
2294 || (code
== GT
&& c
== constm1_rtx
))
2298 if (! t
|| side_effects_p (t
))
2301 /* We currently don't handle different modes. */
2302 mode
= GET_MODE (t
);
2303 if (GET_MODE (m
) != mode
)
2306 /* This is only profitable if T is unconditionally executed/evaluated in the
2307 original insn sequence or T is cheap. The former happens if B is the
2308 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2309 INSN_B which can happen for e.g. conditional stores to memory. For the
2310 cost computation use the block TEST_BB where the evaluation will end up
2311 after the transformation. */
2314 && (if_info
->insn_b
== NULL_RTX
2315 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2316 if (!(t_unconditional
2317 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2318 < COSTS_N_INSNS (2))))
2322 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2323 "(signed) m >> 31" directly. This benefits targets with specialized
2324 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2325 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2326 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2335 noce_emit_move_insn (if_info
->x
, t
);
2337 seq
= end_ifcvt_sequence (if_info
);
2341 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2346 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2350 noce_try_bitop (struct noce_if_info
*if_info
)
2352 rtx cond
, x
, a
, result
;
2359 cond
= if_info
->cond
;
2360 code
= GET_CODE (cond
);
2362 /* Check for no else condition. */
2363 if (! rtx_equal_p (x
, if_info
->b
))
2366 /* Check for a suitable condition. */
2367 if (code
!= NE
&& code
!= EQ
)
2369 if (XEXP (cond
, 1) != const0_rtx
)
2371 cond
= XEXP (cond
, 0);
2373 /* ??? We could also handle AND here. */
2374 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2376 if (XEXP (cond
, 1) != const1_rtx
2377 || !CONST_INT_P (XEXP (cond
, 2))
2378 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2380 bitnum
= INTVAL (XEXP (cond
, 2));
2381 mode
= GET_MODE (x
);
2382 if (BITS_BIG_ENDIAN
)
2383 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2384 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2391 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2393 /* Check for "if (X & C) x = x op C". */
2394 if (! rtx_equal_p (x
, XEXP (a
, 0))
2395 || !CONST_INT_P (XEXP (a
, 1))
2396 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2397 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2400 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2401 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2402 if (GET_CODE (a
) == IOR
)
2403 result
= (code
== NE
) ? a
: NULL_RTX
;
2404 else if (code
== NE
)
2406 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2407 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2408 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2412 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2413 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2414 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2417 else if (GET_CODE (a
) == AND
)
2419 /* Check for "if (X & C) x &= ~C". */
2420 if (! rtx_equal_p (x
, XEXP (a
, 0))
2421 || !CONST_INT_P (XEXP (a
, 1))
2422 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2423 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2426 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2427 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2428 result
= (code
== EQ
) ? a
: NULL_RTX
;
2436 noce_emit_move_insn (x
, result
);
2437 seq
= end_ifcvt_sequence (if_info
);
2441 emit_insn_before_setloc (seq
, if_info
->jump
,
2442 INSN_LOCATION (if_info
->insn_a
));
2448 /* Similar to get_condition, only the resulting condition must be
2449 valid at JUMP, instead of at EARLIEST.
2451 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2452 THEN block of the caller, and we have to reverse the condition. */
2455 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2460 if (! any_condjump_p (jump
))
2463 set
= pc_set (jump
);
2465 /* If this branches to JUMP_LABEL when the condition is false,
2466 reverse the condition. */
2467 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2468 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2470 /* We may have to reverse because the caller's if block is not canonical,
2471 i.e. the THEN block isn't the fallthrough block for the TEST block
2472 (see find_if_header). */
2473 if (then_else_reversed
)
2476 /* If the condition variable is a register and is MODE_INT, accept it. */
2478 cond
= XEXP (SET_SRC (set
), 0);
2479 tmp
= XEXP (cond
, 0);
2480 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2481 && (GET_MODE (tmp
) != BImode
2482 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2487 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2488 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2492 /* Otherwise, fall back on canonicalize_condition to do the dirty
2493 work of manipulating MODE_CC values and COMPARE rtx codes. */
2494 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2495 NULL_RTX
, HAVE_cbranchcc4
, true);
2497 /* We don't handle side-effects in the condition, like handling
2498 REG_INC notes and making sure no duplicate conditions are emitted. */
2499 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2505 /* Return true if OP is ok for if-then-else processing. */
2508 noce_operand_ok (const_rtx op
)
2510 if (side_effects_p (op
))
2513 /* We special-case memories, so handle any of them with
2514 no address side effects. */
2516 return ! side_effects_p (XEXP (op
, 0));
2518 return ! may_trap_p (op
);
2521 /* Return true if a write into MEM may trap or fault. */
2524 noce_mem_write_may_trap_or_fault_p (const_rtx mem
)
2528 if (MEM_READONLY_P (mem
))
2531 if (may_trap_or_fault_p (mem
))
2534 addr
= XEXP (mem
, 0);
2536 /* Call target hook to avoid the effects of -fpic etc.... */
2537 addr
= targetm
.delegitimize_address (addr
);
2540 switch (GET_CODE (addr
))
2548 addr
= XEXP (addr
, 0);
2552 addr
= XEXP (addr
, 1);
2555 if (CONST_INT_P (XEXP (addr
, 1)))
2556 addr
= XEXP (addr
, 0);
2563 if (SYMBOL_REF_DECL (addr
)
2564 && decl_readonly_section (SYMBOL_REF_DECL (addr
), 0))
2574 /* Return whether we can use store speculation for MEM. TOP_BB is the
2575 basic block above the conditional block where we are considering
2576 doing the speculative store. We look for whether MEM is set
2577 unconditionally later in the function. */
2580 noce_can_store_speculate_p (basic_block top_bb
, const_rtx mem
)
2582 basic_block dominator
;
2584 for (dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, top_bb
);
2586 dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, dominator
))
2590 FOR_BB_INSNS (dominator
, insn
)
2592 /* If we see something that might be a memory barrier, we
2593 have to stop looking. Even if the MEM is set later in
2594 the function, we still don't want to set it
2595 unconditionally before the barrier. */
2597 && (volatile_insn_p (PATTERN (insn
))
2598 || (CALL_P (insn
) && (!RTL_CONST_CALL_P (insn
)))))
2601 if (memory_must_be_modified_in_insn_p (mem
, insn
))
2603 if (modified_in_p (XEXP (mem
, 0), insn
))
2612 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2613 it without using conditional execution. Return TRUE if we were successful
2614 at converting the block. */
2617 noce_process_if_block (struct noce_if_info
*if_info
)
2619 basic_block test_bb
= if_info
->test_bb
; /* test block */
2620 basic_block then_bb
= if_info
->then_bb
; /* THEN */
2621 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
2622 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
2623 rtx_insn
*jump
= if_info
->jump
;
2624 rtx cond
= if_info
->cond
;
2625 rtx_insn
*insn_a
, *insn_b
;
2627 rtx orig_x
, x
, a
, b
;
2630 /* We're looking for patterns of the form
2632 (1) if (...) x = a; else x = b;
2633 (2) x = b; if (...) x = a;
2634 (3) if (...) x = a; // as if with an initial x = x.
2636 The later patterns require jumps to be more expensive.
2638 ??? For future expansion, look for multiple X in such patterns. */
2640 /* Look for one of the potential sets. */
2641 insn_a
= first_active_insn (then_bb
);
2643 || insn_a
!= last_active_insn (then_bb
, FALSE
)
2644 || (set_a
= single_set (insn_a
)) == NULL_RTX
)
2647 x
= SET_DEST (set_a
);
2648 a
= SET_SRC (set_a
);
2650 /* Look for the other potential set. Make sure we've got equivalent
2652 /* ??? This is overconservative. Storing to two different mems is
2653 as easy as conditionally computing the address. Storing to a
2654 single mem merely requires a scratch memory to use as one of the
2655 destination addresses; often the memory immediately below the
2656 stack pointer is available for this. */
2660 insn_b
= first_active_insn (else_bb
);
2662 || insn_b
!= last_active_insn (else_bb
, FALSE
)
2663 || (set_b
= single_set (insn_b
)) == NULL_RTX
2664 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
)))
2669 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
2670 /* We're going to be moving the evaluation of B down from above
2671 COND_EARLIEST to JUMP. Make sure the relevant data is still
2674 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
2675 || !NONJUMP_INSN_P (insn_b
)
2676 || (set_b
= single_set (insn_b
)) == NULL_RTX
2677 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
2678 || ! noce_operand_ok (SET_SRC (set_b
))
2679 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
2680 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
2681 /* Avoid extending the lifetime of hard registers on small
2682 register class machines. */
2683 || (REG_P (SET_SRC (set_b
))
2684 && HARD_REGISTER_P (SET_SRC (set_b
))
2685 && targetm
.small_register_classes_for_mode_p
2686 (GET_MODE (SET_SRC (set_b
))))
2687 /* Likewise with X. In particular this can happen when
2688 noce_get_condition looks farther back in the instruction
2689 stream than one might expect. */
2690 || reg_overlap_mentioned_p (x
, cond
)
2691 || reg_overlap_mentioned_p (x
, a
)
2692 || modified_between_p (x
, insn_b
, jump
))
2699 /* If x has side effects then only the if-then-else form is safe to
2700 convert. But even in that case we would need to restore any notes
2701 (such as REG_INC) at then end. That can be tricky if
2702 noce_emit_move_insn expands to more than one insn, so disable the
2703 optimization entirely for now if there are side effects. */
2704 if (side_effects_p (x
))
2707 b
= (set_b
? SET_SRC (set_b
) : x
);
2709 /* Only operate on register destinations, and even then avoid extending
2710 the lifetime of hard registers on small register class machines. */
2713 || (HARD_REGISTER_P (x
)
2714 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
2716 if (GET_MODE (x
) == BLKmode
)
2719 if (GET_CODE (x
) == ZERO_EXTRACT
2720 && (!CONST_INT_P (XEXP (x
, 1))
2721 || !CONST_INT_P (XEXP (x
, 2))))
2724 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
2725 ? XEXP (x
, 0) : x
));
2728 /* Don't operate on sources that may trap or are volatile. */
2729 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
2733 /* Set up the info block for our subroutines. */
2734 if_info
->insn_a
= insn_a
;
2735 if_info
->insn_b
= insn_b
;
2740 /* Skip it if the instruction to be moved might clobber CC. */
2741 cc
= cc_in_cond (cond
);
2743 && (set_of (cc
, insn_a
)
2744 || (insn_b
&& set_of (cc
, insn_b
))))
2747 /* Try optimizations in some approximation of a useful order. */
2748 /* ??? Should first look to see if X is live incoming at all. If it
2749 isn't, we don't need anything but an unconditional set. */
2751 /* Look and see if A and B are really the same. Avoid creating silly
2752 cmove constructs that no one will fix up later. */
2753 if (rtx_interchangeable_p (a
, b
))
2755 /* If we have an INSN_B, we don't have to create any new rtl. Just
2756 move the instruction that we already have. If we don't have an
2757 INSN_B, that means that A == X, and we've got a noop move. In
2758 that case don't do anything and let the code below delete INSN_A. */
2759 if (insn_b
&& else_bb
)
2763 if (else_bb
&& insn_b
== BB_END (else_bb
))
2764 BB_END (else_bb
) = PREV_INSN (insn_b
);
2765 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
2767 /* If there was a REG_EQUAL note, delete it since it may have been
2768 true due to this insn being after a jump. */
2769 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
2770 remove_note (insn_b
, note
);
2774 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
2775 x must be executed twice. */
2776 else if (insn_b
&& side_effects_p (orig_x
))
2783 if (!set_b
&& MEM_P (orig_x
))
2785 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
2786 for optimizations if writing to x may trap or fault,
2787 i.e. it's a memory other than a static var or a stack slot,
2788 is misaligned on strict aligned machines or is read-only. If
2789 x is a read-only memory, then the program is valid only if we
2790 avoid the store into it. If there are stores on both the
2791 THEN and ELSE arms, then we can go ahead with the conversion;
2792 either the program is broken, or the condition is always
2793 false such that the other memory is selected. */
2794 if (noce_mem_write_may_trap_or_fault_p (orig_x
))
2797 /* Avoid store speculation: given "if (...) x = a" where x is a
2798 MEM, we only want to do the store if x is always set
2799 somewhere in the function. This avoids cases like
2800 if (pthread_mutex_trylock(mutex))
2802 where we only want global_variable to be changed if the mutex
2803 is held. FIXME: This should ideally be expressed directly in
2805 if (!noce_can_store_speculate_p (test_bb
, orig_x
))
2809 if (noce_try_move (if_info
))
2811 if (noce_try_store_flag (if_info
))
2813 if (noce_try_bitop (if_info
))
2815 if (noce_try_minmax (if_info
))
2817 if (noce_try_abs (if_info
))
2819 if (!targetm
.have_conditional_execution ()
2820 && noce_try_store_flag_constants (if_info
))
2822 if (HAVE_conditional_move
2823 && noce_try_cmove (if_info
))
2825 if (! targetm
.have_conditional_execution ())
2827 if (noce_try_addcc (if_info
))
2829 if (noce_try_store_flag_mask (if_info
))
2831 if (HAVE_conditional_move
2832 && noce_try_cmove_arith (if_info
))
2834 if (noce_try_sign_mask (if_info
))
2838 if (!else_bb
&& set_b
)
2850 /* If we used a temporary, fix it up now. */
2856 noce_emit_move_insn (orig_x
, x
);
2858 set_used_flags (orig_x
);
2859 unshare_all_rtl_in_chain (seq
);
2862 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
2865 /* The original THEN and ELSE blocks may now be removed. The test block
2866 must now jump to the join block. If the test block and the join block
2867 can be merged, do so. */
2870 delete_basic_block (else_bb
);
2874 remove_edge (find_edge (test_bb
, join_bb
));
2876 remove_edge (find_edge (then_bb
, join_bb
));
2877 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
2878 delete_basic_block (then_bb
);
2881 if (can_merge_blocks_p (test_bb
, join_bb
))
2883 merge_blocks (test_bb
, join_bb
);
2887 num_updated_if_blocks
++;
2891 /* Check whether a block is suitable for conditional move conversion.
2892 Every insn must be a simple set of a register to a constant or a
2893 register. For each assignment, store the value in the pointer map
2894 VALS, keyed indexed by register pointer, then store the register
2895 pointer in REGS. COND is the condition we will test. */
2898 check_cond_move_block (basic_block bb
,
2899 hash_map
<rtx
, rtx
> *vals
,
2904 rtx cc
= cc_in_cond (cond
);
2906 /* We can only handle simple jumps at the end of the basic block.
2907 It is almost impossible to update the CFG otherwise. */
2909 if (JUMP_P (insn
) && !onlyjump_p (insn
))
2912 FOR_BB_INSNS (bb
, insn
)
2916 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
2918 set
= single_set (insn
);
2922 dest
= SET_DEST (set
);
2923 src
= SET_SRC (set
);
2925 || (HARD_REGISTER_P (dest
)
2926 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
2929 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
2932 if (side_effects_p (src
) || side_effects_p (dest
))
2935 if (may_trap_p (src
) || may_trap_p (dest
))
2938 /* Don't try to handle this if the source register was
2939 modified earlier in the block. */
2942 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
2943 && vals
->get (SUBREG_REG (src
))))
2946 /* Don't try to handle this if the destination register was
2947 modified earlier in the block. */
2948 if (vals
->get (dest
))
2951 /* Don't try to handle this if the condition uses the
2952 destination register. */
2953 if (reg_overlap_mentioned_p (dest
, cond
))
2956 /* Don't try to handle this if the source register is modified
2957 later in the block. */
2958 if (!CONSTANT_P (src
)
2959 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
2962 /* Skip it if the instruction to be moved might clobber CC. */
2963 if (cc
&& set_of (cc
, insn
))
2966 vals
->put (dest
, src
);
2968 regs
->safe_push (dest
);
2974 /* Given a basic block BB suitable for conditional move conversion,
2975 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
2976 the register values depending on COND, emit the insns in the block as
2977 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
2978 processed. The caller has started a sequence for the conversion.
2979 Return true if successful, false if something goes wrong. */
2982 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
2983 basic_block bb
, rtx cond
,
2984 hash_map
<rtx
, rtx
> *then_vals
,
2985 hash_map
<rtx
, rtx
> *else_vals
,
2990 rtx cond_arg0
, cond_arg1
;
2992 code
= GET_CODE (cond
);
2993 cond_arg0
= XEXP (cond
, 0);
2994 cond_arg1
= XEXP (cond
, 1);
2996 FOR_BB_INSNS (bb
, insn
)
2998 rtx set
, target
, dest
, t
, e
;
3000 /* ??? Maybe emit conditional debug insn? */
3001 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3003 set
= single_set (insn
);
3004 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3006 dest
= SET_DEST (set
);
3008 rtx
*then_slot
= then_vals
->get (dest
);
3009 rtx
*else_slot
= else_vals
->get (dest
);
3010 t
= then_slot
? *then_slot
: NULL_RTX
;
3011 e
= else_slot
? *else_slot
: NULL_RTX
;
3015 /* If this register was set in the then block, we already
3016 handled this case there. */
3029 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3035 noce_emit_move_insn (dest
, target
);
3041 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3042 it using only conditional moves. Return TRUE if we were successful at
3043 converting the block. */
3046 cond_move_process_if_block (struct noce_if_info
*if_info
)
3048 basic_block test_bb
= if_info
->test_bb
;
3049 basic_block then_bb
= if_info
->then_bb
;
3050 basic_block else_bb
= if_info
->else_bb
;
3051 basic_block join_bb
= if_info
->join_bb
;
3052 rtx_insn
*jump
= if_info
->jump
;
3053 rtx cond
= if_info
->cond
;
3054 rtx_insn
*seq
, *loc_insn
;
3057 vec
<rtx
> then_regs
= vNULL
;
3058 vec
<rtx
> else_regs
= vNULL
;
3060 int success_p
= FALSE
;
3062 /* Build a mapping for each block to the value used for each
3064 hash_map
<rtx
, rtx
> then_vals
;
3065 hash_map
<rtx
, rtx
> else_vals
;
3067 /* Make sure the blocks are suitable. */
3068 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3070 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3073 /* Make sure the blocks can be used together. If the same register
3074 is set in both blocks, and is not set to a constant in both
3075 cases, then both blocks must set it to the same register. We
3076 have already verified that if it is set to a register, that the
3077 source register does not change after the assignment. Also count
3078 the number of registers set in only one of the blocks. */
3080 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3082 rtx
*then_slot
= then_vals
.get (reg
);
3083 rtx
*else_slot
= else_vals
.get (reg
);
3085 gcc_checking_assert (then_slot
);
3090 rtx then_val
= *then_slot
;
3091 rtx else_val
= *else_slot
;
3092 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3093 && !rtx_equal_p (then_val
, else_val
))
3098 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3099 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3101 gcc_checking_assert (else_vals
.get (reg
));
3102 if (!then_vals
.get (reg
))
3106 /* Make sure it is reasonable to convert this block. What matters
3107 is the number of assignments currently made in only one of the
3108 branches, since if we convert we are going to always execute
3110 if (c
> MAX_CONDITIONAL_EXECUTE
)
3113 /* Try to emit the conditional moves. First do the then block,
3114 then do anything left in the else blocks. */
3116 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3117 &then_vals
, &else_vals
, false)
3119 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3120 &then_vals
, &else_vals
, true)))
3125 seq
= end_ifcvt_sequence (if_info
);
3129 loc_insn
= first_active_insn (then_bb
);
3132 loc_insn
= first_active_insn (else_bb
);
3133 gcc_assert (loc_insn
);
3135 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3139 delete_basic_block (else_bb
);
3143 remove_edge (find_edge (test_bb
, join_bb
));
3145 remove_edge (find_edge (then_bb
, join_bb
));
3146 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3147 delete_basic_block (then_bb
);
3150 if (can_merge_blocks_p (test_bb
, join_bb
))
3152 merge_blocks (test_bb
, join_bb
);
3156 num_updated_if_blocks
++;
3161 then_regs
.release ();
3162 else_regs
.release ();
3167 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3168 IF-THEN-ELSE-JOIN block.
3170 If so, we'll try to convert the insns to not require the branch,
3171 using only transformations that do not require conditional execution.
3173 Return TRUE if we were successful at converting the block. */
3176 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3179 basic_block then_bb
, else_bb
, join_bb
;
3180 bool then_else_reversed
= false;
3183 rtx_insn
*cond_earliest
;
3184 struct noce_if_info if_info
;
3186 /* We only ever should get here before reload. */
3187 gcc_assert (!reload_completed
);
3189 /* Recognize an IF-THEN-ELSE-JOIN block. */
3190 if (single_pred_p (then_edge
->dest
)
3191 && single_succ_p (then_edge
->dest
)
3192 && single_pred_p (else_edge
->dest
)
3193 && single_succ_p (else_edge
->dest
)
3194 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3196 then_bb
= then_edge
->dest
;
3197 else_bb
= else_edge
->dest
;
3198 join_bb
= single_succ (then_bb
);
3200 /* Recognize an IF-THEN-JOIN block. */
3201 else if (single_pred_p (then_edge
->dest
)
3202 && single_succ_p (then_edge
->dest
)
3203 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3205 then_bb
= then_edge
->dest
;
3206 else_bb
= NULL_BLOCK
;
3207 join_bb
= else_edge
->dest
;
3209 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3210 of basic blocks in cfglayout mode does not matter, so the fallthrough
3211 edge can go to any basic block (and not just to bb->next_bb, like in
3213 else if (single_pred_p (else_edge
->dest
)
3214 && single_succ_p (else_edge
->dest
)
3215 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3217 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3218 To make this work, we have to invert the THEN and ELSE blocks
3219 and reverse the jump condition. */
3220 then_bb
= else_edge
->dest
;
3221 else_bb
= NULL_BLOCK
;
3222 join_bb
= single_succ (then_bb
);
3223 then_else_reversed
= true;
3226 /* Not a form we can handle. */
3229 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3230 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3233 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3236 num_possible_if_blocks
++;
3241 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3242 (else_bb
) ? "-ELSE" : "",
3243 pass
, test_bb
->index
, then_bb
->index
);
3246 fprintf (dump_file
, ", else %d", else_bb
->index
);
3248 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3251 /* If the conditional jump is more than just a conditional
3252 jump, then we can not do if-conversion on this block. */
3253 jump
= BB_END (test_bb
);
3254 if (! onlyjump_p (jump
))
3257 /* If this is not a standard conditional jump, we can't parse it. */
3258 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3262 /* We must be comparing objects whose modes imply the size. */
3263 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3266 /* Initialize an IF_INFO struct to pass around. */
3267 memset (&if_info
, 0, sizeof if_info
);
3268 if_info
.test_bb
= test_bb
;
3269 if_info
.then_bb
= then_bb
;
3270 if_info
.else_bb
= else_bb
;
3271 if_info
.join_bb
= join_bb
;
3272 if_info
.cond
= cond
;
3273 if_info
.cond_earliest
= cond_earliest
;
3274 if_info
.jump
= jump
;
3275 if_info
.then_else_reversed
= then_else_reversed
;
3276 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3277 predictable_edge_p (then_edge
));
3279 /* Do the real work. */
3281 if (noce_process_if_block (&if_info
))
3284 if (HAVE_conditional_move
3285 && cond_move_process_if_block (&if_info
))
3292 /* Merge the blocks and mark for local life update. */
3295 merge_if_block (struct ce_if_block
* ce_info
)
3297 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3298 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3299 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3300 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3301 basic_block combo_bb
;
3303 /* All block merging is done into the lower block numbers. */
3306 df_set_bb_dirty (test_bb
);
3308 /* Merge any basic blocks to handle && and || subtests. Each of
3309 the blocks are on the fallthru path from the predecessor block. */
3310 if (ce_info
->num_multiple_test_blocks
> 0)
3312 basic_block bb
= test_bb
;
3313 basic_block last_test_bb
= ce_info
->last_test_bb
;
3314 basic_block fallthru
= block_fallthru (bb
);
3319 fallthru
= block_fallthru (bb
);
3320 merge_blocks (combo_bb
, bb
);
3323 while (bb
!= last_test_bb
);
3326 /* Merge TEST block into THEN block. Normally the THEN block won't have a
3327 label, but it might if there were || tests. That label's count should be
3328 zero, and it normally should be removed. */
3332 /* If THEN_BB has no successors, then there's a BARRIER after it.
3333 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
3334 is no longer needed, and in fact it is incorrect to leave it in
3336 if (EDGE_COUNT (then_bb
->succs
) == 0
3337 && EDGE_COUNT (combo_bb
->succs
) > 1)
3339 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
3340 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3341 end
= NEXT_INSN (end
);
3343 if (end
&& BARRIER_P (end
))
3346 merge_blocks (combo_bb
, then_bb
);
3350 /* The ELSE block, if it existed, had a label. That label count
3351 will almost always be zero, but odd things can happen when labels
3352 get their addresses taken. */
3355 /* If ELSE_BB has no successors, then there's a BARRIER after it.
3356 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
3357 is no longer needed, and in fact it is incorrect to leave it in
3359 if (EDGE_COUNT (else_bb
->succs
) == 0
3360 && EDGE_COUNT (combo_bb
->succs
) > 1)
3362 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
3363 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3364 end
= NEXT_INSN (end
);
3366 if (end
&& BARRIER_P (end
))
3369 merge_blocks (combo_bb
, else_bb
);
3373 /* If there was no join block reported, that means it was not adjacent
3374 to the others, and so we cannot merge them. */
3378 rtx_insn
*last
= BB_END (combo_bb
);
3380 /* The outgoing edge for the current COMBO block should already
3381 be correct. Verify this. */
3382 if (EDGE_COUNT (combo_bb
->succs
) == 0)
3383 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
3384 || (NONJUMP_INSN_P (last
)
3385 && GET_CODE (PATTERN (last
)) == TRAP_IF
3386 && (TRAP_CONDITION (PATTERN (last
))
3387 == const_true_rtx
)));
3390 /* There should still be something at the end of the THEN or ELSE
3391 blocks taking us to our final destination. */
3392 gcc_assert (JUMP_P (last
)
3393 || (EDGE_SUCC (combo_bb
, 0)->dest
3394 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
3396 && SIBLING_CALL_P (last
))
3397 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
3398 && can_throw_internal (last
)));
3401 /* The JOIN block may have had quite a number of other predecessors too.
3402 Since we've already merged the TEST, THEN and ELSE blocks, we should
3403 have only one remaining edge from our if-then-else diamond. If there
3404 is more than one remaining edge, it must come from elsewhere. There
3405 may be zero incoming edges if the THEN block didn't actually join
3406 back up (as with a call to a non-return function). */
3407 else if (EDGE_COUNT (join_bb
->preds
) < 2
3408 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3410 /* We can merge the JOIN cleanly and update the dataflow try
3411 again on this pass.*/
3412 merge_blocks (combo_bb
, join_bb
);
3417 /* We cannot merge the JOIN. */
3419 /* The outgoing edge for the current COMBO block should already
3420 be correct. Verify this. */
3421 gcc_assert (single_succ_p (combo_bb
)
3422 && single_succ (combo_bb
) == join_bb
);
3424 /* Remove the jump and cruft from the end of the COMBO block. */
3425 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3426 tidy_fallthru_edge (single_succ_edge (combo_bb
));
3429 num_updated_if_blocks
++;
3432 /* Find a block ending in a simple IF condition and try to transform it
3433 in some way. When converting a multi-block condition, put the new code
3434 in the first such block and delete the rest. Return a pointer to this
3435 first block if some transformation was done. Return NULL otherwise. */
3438 find_if_header (basic_block test_bb
, int pass
)
3440 ce_if_block ce_info
;
3444 /* The kind of block we're looking for has exactly two successors. */
3445 if (EDGE_COUNT (test_bb
->succs
) != 2)
3448 then_edge
= EDGE_SUCC (test_bb
, 0);
3449 else_edge
= EDGE_SUCC (test_bb
, 1);
3451 if (df_get_bb_dirty (then_edge
->dest
))
3453 if (df_get_bb_dirty (else_edge
->dest
))
3456 /* Neither edge should be abnormal. */
3457 if ((then_edge
->flags
& EDGE_COMPLEX
)
3458 || (else_edge
->flags
& EDGE_COMPLEX
))
3461 /* Nor exit the loop. */
3462 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
3463 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
3466 /* The THEN edge is canonically the one that falls through. */
3467 if (then_edge
->flags
& EDGE_FALLTHRU
)
3469 else if (else_edge
->flags
& EDGE_FALLTHRU
)
3470 std::swap (then_edge
, else_edge
);
3472 /* Otherwise this must be a multiway branch of some sort. */
3475 memset (&ce_info
, 0, sizeof (ce_info
));
3476 ce_info
.test_bb
= test_bb
;
3477 ce_info
.then_bb
= then_edge
->dest
;
3478 ce_info
.else_bb
= else_edge
->dest
;
3479 ce_info
.pass
= pass
;
3481 #ifdef IFCVT_MACHDEP_INIT
3482 IFCVT_MACHDEP_INIT (&ce_info
);
3485 if (!reload_completed
3486 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
3489 if (reload_completed
3490 && targetm
.have_conditional_execution ()
3491 && cond_exec_find_if_block (&ce_info
))
3494 if (targetm
.have_trap ()
3495 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
3496 && find_cond_trap (test_bb
, then_edge
, else_edge
))
3499 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
3500 && (reload_completed
|| !targetm
.have_conditional_execution ()))
3502 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
3504 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
3512 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
3513 /* Set this so we continue looking. */
3514 cond_exec_changed_p
= TRUE
;
3515 return ce_info
.test_bb
;
3518 /* Return true if a block has two edges, one of which falls through to the next
3519 block, and the other jumps to a specific block, so that we can tell if the
3520 block is part of an && test or an || test. Returns either -1 or the number
3521 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
3524 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
3527 int fallthru_p
= FALSE
;
3534 if (!cur_bb
|| !target_bb
)
3537 /* If no edges, obviously it doesn't jump or fallthru. */
3538 if (EDGE_COUNT (cur_bb
->succs
) == 0)
3541 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
3543 if (cur_edge
->flags
& EDGE_COMPLEX
)
3544 /* Anything complex isn't what we want. */
3547 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
3550 else if (cur_edge
->dest
== target_bb
)
3557 if ((jump_p
& fallthru_p
) == 0)
3560 /* Don't allow calls in the block, since this is used to group && and ||
3561 together for conditional execution support. ??? we should support
3562 conditional execution support across calls for IA-64 some day, but
3563 for now it makes the code simpler. */
3564 end
= BB_END (cur_bb
);
3565 insn
= BB_HEAD (cur_bb
);
3567 while (insn
!= NULL_RTX
)
3574 && !DEBUG_INSN_P (insn
)
3575 && GET_CODE (PATTERN (insn
)) != USE
3576 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
3582 insn
= NEXT_INSN (insn
);
3588 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
3589 block. If so, we'll try to convert the insns to not require the branch.
3590 Return TRUE if we were successful at converting the block. */
3593 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
3595 basic_block test_bb
= ce_info
->test_bb
;
3596 basic_block then_bb
= ce_info
->then_bb
;
3597 basic_block else_bb
= ce_info
->else_bb
;
3598 basic_block join_bb
= NULL_BLOCK
;
3603 ce_info
->last_test_bb
= test_bb
;
3605 /* We only ever should get here after reload,
3606 and if we have conditional execution. */
3607 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
3609 /* Discover if any fall through predecessors of the current test basic block
3610 were && tests (which jump to the else block) or || tests (which jump to
3612 if (single_pred_p (test_bb
)
3613 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
3615 basic_block bb
= single_pred (test_bb
);
3616 basic_block target_bb
;
3617 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
3620 /* Determine if the preceding block is an && or || block. */
3621 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
3623 ce_info
->and_and_p
= TRUE
;
3624 target_bb
= else_bb
;
3626 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
3628 ce_info
->and_and_p
= FALSE
;
3629 target_bb
= then_bb
;
3632 target_bb
= NULL_BLOCK
;
3634 if (target_bb
&& n_insns
<= max_insns
)
3636 int total_insns
= 0;
3639 ce_info
->last_test_bb
= test_bb
;
3641 /* Found at least one && or || block, look for more. */
3644 ce_info
->test_bb
= test_bb
= bb
;
3645 total_insns
+= n_insns
;
3648 if (!single_pred_p (bb
))
3651 bb
= single_pred (bb
);
3652 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
3654 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
3656 ce_info
->num_multiple_test_blocks
= blocks
;
3657 ce_info
->num_multiple_test_insns
= total_insns
;
3659 if (ce_info
->and_and_p
)
3660 ce_info
->num_and_and_blocks
= blocks
;
3662 ce_info
->num_or_or_blocks
= blocks
;
3666 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
3667 other than any || blocks which jump to the THEN block. */
3668 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
3671 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3672 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
3674 if (cur_edge
->flags
& EDGE_COMPLEX
)
3678 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
3680 if (cur_edge
->flags
& EDGE_COMPLEX
)
3684 /* The THEN block of an IF-THEN combo must have zero or one successors. */
3685 if (EDGE_COUNT (then_bb
->succs
) > 0
3686 && (!single_succ_p (then_bb
)
3687 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3688 || (epilogue_completed
3689 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
3692 /* If the THEN block has no successors, conditional execution can still
3693 make a conditional call. Don't do this unless the ELSE block has
3694 only one incoming edge -- the CFG manipulation is too ugly otherwise.
3695 Check for the last insn of the THEN block being an indirect jump, which
3696 is listed as not having any successors, but confuses the rest of the CE
3697 code processing. ??? we should fix this in the future. */
3698 if (EDGE_COUNT (then_bb
->succs
) == 0)
3700 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3702 rtx_insn
*last_insn
= BB_END (then_bb
);
3705 && NOTE_P (last_insn
)
3706 && last_insn
!= BB_HEAD (then_bb
))
3707 last_insn
= PREV_INSN (last_insn
);
3710 && JUMP_P (last_insn
)
3711 && ! simplejump_p (last_insn
))
3715 else_bb
= NULL_BLOCK
;
3721 /* If the THEN block's successor is the other edge out of the TEST block,
3722 then we have an IF-THEN combo without an ELSE. */
3723 else if (single_succ (then_bb
) == else_bb
)
3726 else_bb
= NULL_BLOCK
;
3729 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
3730 has exactly one predecessor and one successor, and the outgoing edge
3731 is not complex, then we have an IF-THEN-ELSE combo. */
3732 else if (single_succ_p (else_bb
)
3733 && single_succ (then_bb
) == single_succ (else_bb
)
3734 && single_pred_p (else_bb
)
3735 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3736 && !(epilogue_completed
3737 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
3738 join_bb
= single_succ (else_bb
);
3740 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
3744 num_possible_if_blocks
++;
3749 "\nIF-THEN%s block found, pass %d, start block %d "
3750 "[insn %d], then %d [%d]",
3751 (else_bb
) ? "-ELSE" : "",
3754 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
3756 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
3759 fprintf (dump_file
, ", else %d [%d]",
3761 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
3763 fprintf (dump_file
, ", join %d [%d]",
3765 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
3767 if (ce_info
->num_multiple_test_blocks
> 0)
3768 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
3769 ce_info
->num_multiple_test_blocks
,
3770 (ce_info
->and_and_p
) ? "&&" : "||",
3771 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
3772 ce_info
->last_test_bb
->index
,
3773 ((BB_HEAD (ce_info
->last_test_bb
))
3774 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
3777 fputc ('\n', dump_file
);
3780 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
3781 first condition for free, since we've already asserted that there's a
3782 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
3783 we checked the FALLTHRU flag, those are already adjacent to the last IF
3785 /* ??? As an enhancement, move the ELSE block. Have to deal with
3786 BLOCK notes, if by no other means than backing out the merge if they
3787 exist. Sticky enough I don't want to think about it now. */
3789 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
3791 if ((next
= next
->next_bb
) != join_bb
3792 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3800 /* Do the real work. */
3802 ce_info
->else_bb
= else_bb
;
3803 ce_info
->join_bb
= join_bb
;
3805 /* If we have && and || tests, try to first handle combining the && and ||
3806 tests into the conditional code, and if that fails, go back and handle
3807 it without the && and ||, which at present handles the && case if there
3808 was no ELSE block. */
3809 if (cond_exec_process_if_block (ce_info
, TRUE
))
3812 if (ce_info
->num_multiple_test_blocks
)
3816 if (cond_exec_process_if_block (ce_info
, FALSE
))
3823 /* Convert a branch over a trap, or a branch
3824 to a trap, into a conditional trap. */
3827 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
3829 basic_block then_bb
= then_edge
->dest
;
3830 basic_block else_bb
= else_edge
->dest
;
3831 basic_block other_bb
, trap_bb
;
3832 rtx_insn
*trap
, *jump
;
3834 rtx_insn
*cond_earliest
;
3837 /* Locate the block with the trap instruction. */
3838 /* ??? While we look for no successors, we really ought to allow
3839 EH successors. Need to fix merge_if_block for that to work. */
3840 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
3841 trap_bb
= then_bb
, other_bb
= else_bb
;
3842 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
3843 trap_bb
= else_bb
, other_bb
= then_bb
;
3849 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
3850 test_bb
->index
, trap_bb
->index
);
3853 /* If this is not a standard conditional jump, we can't parse it. */
3854 jump
= BB_END (test_bb
);
3855 cond
= noce_get_condition (jump
, &cond_earliest
, false);
3859 /* If the conditional jump is more than just a conditional jump, then
3860 we can not do if-conversion on this block. */
3861 if (! onlyjump_p (jump
))
3864 /* We must be comparing objects whose modes imply the size. */
3865 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3868 /* Reverse the comparison code, if necessary. */
3869 code
= GET_CODE (cond
);
3870 if (then_bb
== trap_bb
)
3872 code
= reversed_comparison_code (cond
, jump
);
3873 if (code
== UNKNOWN
)
3877 /* Attempt to generate the conditional trap. */
3878 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
3879 copy_rtx (XEXP (cond
, 1)),
3880 TRAP_CODE (PATTERN (trap
)));
3884 /* Emit the new insns before cond_earliest. */
3885 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
3887 /* Delete the trap block if possible. */
3888 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
3889 df_set_bb_dirty (test_bb
);
3890 df_set_bb_dirty (then_bb
);
3891 df_set_bb_dirty (else_bb
);
3893 if (EDGE_COUNT (trap_bb
->preds
) == 0)
3895 delete_basic_block (trap_bb
);
3899 /* Wire together the blocks again. */
3900 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
3901 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
3902 else if (trap_bb
== then_bb
)
3904 rtx lab
= JUMP_LABEL (jump
);
3905 rtx_insn
*seq
= targetm
.gen_jump (lab
);
3906 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
3907 LABEL_NUSES (lab
) += 1;
3908 JUMP_LABEL (newjump
) = lab
;
3909 emit_barrier_after (newjump
);
3913 if (can_merge_blocks_p (test_bb
, other_bb
))
3915 merge_blocks (test_bb
, other_bb
);
3919 num_updated_if_blocks
++;
3923 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
3927 block_has_only_trap (basic_block bb
)
3931 /* We're not the exit block. */
3932 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
3935 /* The block must have no successors. */
3936 if (EDGE_COUNT (bb
->succs
) > 0)
3939 /* The only instruction in the THEN block must be the trap. */
3940 trap
= first_active_insn (bb
);
3941 if (! (trap
== BB_END (bb
)
3942 && GET_CODE (PATTERN (trap
)) == TRAP_IF
3943 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
3949 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
3950 transformable, but not necessarily the other. There need be no
3953 Return TRUE if we were successful at converting the block.
3955 Cases we'd like to look at:
3958 if (test) goto over; // x not live
3966 if (! test) goto label;
3969 if (test) goto E; // x not live
3983 (3) // This one's really only interesting for targets that can do
3984 // multiway branching, e.g. IA-64 BBB bundles. For other targets
3985 // it results in multiple branches on a cache line, which often
3986 // does not sit well with predictors.
3988 if (test1) goto E; // predicted not taken
4004 (A) Don't do (2) if the branch is predicted against the block we're
4005 eliminating. Do it anyway if we can eliminate a branch; this requires
4006 that the sole successor of the eliminated block postdominate the other
4009 (B) With CE, on (3) we can steal from both sides of the if, creating
4018 Again, this is most useful if J postdominates.
4020 (C) CE substitutes for helpful life information.
4022 (D) These heuristics need a lot of work. */
4024 /* Tests for case 1 above. */
4027 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4029 basic_block then_bb
= then_edge
->dest
;
4030 basic_block else_bb
= else_edge
->dest
;
4032 int then_bb_index
, then_prob
;
4033 rtx else_target
= NULL_RTX
;
4035 /* If we are partitioning hot/cold basic blocks, we don't want to
4036 mess up unconditional or indirect jumps that cross between hot
4039 Basic block partitioning may result in some jumps that appear to
4040 be optimizable (or blocks that appear to be mergeable), but which really
4041 must be left untouched (they are required to make it safely across
4042 partition boundaries). See the comments at the top of
4043 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4045 if ((BB_END (then_bb
)
4046 && JUMP_P (BB_END (then_bb
))
4047 && CROSSING_JUMP_P (BB_END (then_bb
)))
4048 || (BB_END (test_bb
)
4049 && JUMP_P (BB_END (test_bb
))
4050 && CROSSING_JUMP_P (BB_END (test_bb
)))
4051 || (BB_END (else_bb
)
4052 && JUMP_P (BB_END (else_bb
))
4053 && CROSSING_JUMP_P (BB_END (else_bb
))))
4056 /* THEN has one successor. */
4057 if (!single_succ_p (then_bb
))
4060 /* THEN does not fall through, but is not strange either. */
4061 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4064 /* THEN has one predecessor. */
4065 if (!single_pred_p (then_bb
))
4068 /* THEN must do something. */
4069 if (forwarder_block_p (then_bb
))
4072 num_possible_if_blocks
++;
4075 "\nIF-CASE-1 found, start %d, then %d\n",
4076 test_bb
->index
, then_bb
->index
);
4078 if (then_edge
->probability
)
4079 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4081 then_prob
= REG_BR_PROB_BASE
/ 2;
4083 /* We're speculating from the THEN path, we want to make sure the cost
4084 of speculation is within reason. */
4085 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4086 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4087 predictable_edge_p (then_edge
)))))
4090 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4092 rtx_insn
*jump
= BB_END (else_edge
->src
);
4093 gcc_assert (JUMP_P (jump
));
4094 else_target
= JUMP_LABEL (jump
);
4097 /* Registers set are dead, or are predicable. */
4098 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4099 single_succ_edge (then_bb
), 1))
4102 /* Conversion went ok, including moving the insns and fixing up the
4103 jump. Adjust the CFG to match. */
4105 /* We can avoid creating a new basic block if then_bb is immediately
4106 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4107 through to else_bb. */
4109 if (then_bb
->next_bb
== else_bb
4110 && then_bb
->prev_bb
== test_bb
4111 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4113 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4116 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4117 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4118 else_bb
, else_target
);
4120 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4123 df_set_bb_dirty (test_bb
);
4124 df_set_bb_dirty (else_bb
);
4126 then_bb_index
= then_bb
->index
;
4127 delete_basic_block (then_bb
);
4129 /* Make rest of code believe that the newly created block is the THEN_BB
4130 block we removed. */
4133 df_bb_replace (then_bb_index
, new_bb
);
4134 /* This should have been done above via force_nonfallthru_and_redirect
4135 (possibly called from redirect_edge_and_branch_force). */
4136 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4140 num_updated_if_blocks
++;
4145 /* Test for case 2 above. */
4148 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4150 basic_block then_bb
= then_edge
->dest
;
4151 basic_block else_bb
= else_edge
->dest
;
4153 int then_prob
, else_prob
;
4155 /* We do not want to speculate (empty) loop latches. */
4157 && else_bb
->loop_father
->latch
== else_bb
)
4160 /* If we are partitioning hot/cold basic blocks, we don't want to
4161 mess up unconditional or indirect jumps that cross between hot
4164 Basic block partitioning may result in some jumps that appear to
4165 be optimizable (or blocks that appear to be mergeable), but which really
4166 must be left untouched (they are required to make it safely across
4167 partition boundaries). See the comments at the top of
4168 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4170 if ((BB_END (then_bb
)
4171 && JUMP_P (BB_END (then_bb
))
4172 && CROSSING_JUMP_P (BB_END (then_bb
)))
4173 || (BB_END (test_bb
)
4174 && JUMP_P (BB_END (test_bb
))
4175 && CROSSING_JUMP_P (BB_END (test_bb
)))
4176 || (BB_END (else_bb
)
4177 && JUMP_P (BB_END (else_bb
))
4178 && CROSSING_JUMP_P (BB_END (else_bb
))))
4181 /* ELSE has one successor. */
4182 if (!single_succ_p (else_bb
))
4185 else_succ
= single_succ_edge (else_bb
);
4187 /* ELSE outgoing edge is not complex. */
4188 if (else_succ
->flags
& EDGE_COMPLEX
)
4191 /* ELSE has one predecessor. */
4192 if (!single_pred_p (else_bb
))
4195 /* THEN is not EXIT. */
4196 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4199 if (else_edge
->probability
)
4201 else_prob
= else_edge
->probability
;
4202 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4206 else_prob
= REG_BR_PROB_BASE
/ 2;
4207 then_prob
= REG_BR_PROB_BASE
/ 2;
4210 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4211 if (else_prob
> then_prob
)
4213 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4214 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4220 num_possible_if_blocks
++;
4223 "\nIF-CASE-2 found, start %d, else %d\n",
4224 test_bb
->index
, else_bb
->index
);
4226 /* We're speculating from the ELSE path, we want to make sure the cost
4227 of speculation is within reason. */
4228 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4229 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4230 predictable_edge_p (else_edge
)))))
4233 /* Registers set are dead, or are predicable. */
4234 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4237 /* Conversion went ok, including moving the insns and fixing up the
4238 jump. Adjust the CFG to match. */
4240 df_set_bb_dirty (test_bb
);
4241 df_set_bb_dirty (then_bb
);
4242 delete_basic_block (else_bb
);
4245 num_updated_if_blocks
++;
4247 /* ??? We may now fallthru from one of THEN's successors into a join
4248 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4253 /* Used by the code above to perform the actual rtl transformations.
4254 Return TRUE if successful.
4256 TEST_BB is the block containing the conditional branch. MERGE_BB
4257 is the block containing the code to manipulate. DEST_EDGE is an
4258 edge representing a jump to the join block; after the conversion,
4259 TEST_BB should be branching to its destination.
4260 REVERSEP is true if the sense of the branch should be reversed. */
4263 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4264 basic_block other_bb
, edge dest_edge
, int reversep
)
4266 basic_block new_dest
= dest_edge
->dest
;
4267 rtx_insn
*head
, *end
, *jump
;
4268 rtx_insn
*earliest
= NULL
;
4270 bitmap merge_set
= NULL
;
4271 /* Number of pending changes. */
4272 int n_validated_changes
= 0;
4273 rtx new_dest_label
= NULL_RTX
;
4275 jump
= BB_END (test_bb
);
4277 /* Find the extent of the real code in the merge block. */
4278 head
= BB_HEAD (merge_bb
);
4279 end
= BB_END (merge_bb
);
4281 while (DEBUG_INSN_P (end
) && end
!= head
)
4282 end
= PREV_INSN (end
);
4284 /* If merge_bb ends with a tablejump, predicating/moving insn's
4285 into test_bb and then deleting merge_bb will result in the jumptable
4286 that follows merge_bb being removed along with merge_bb and then we
4287 get an unresolved reference to the jumptable. */
4288 if (tablejump_p (end
, NULL
, NULL
))
4292 head
= NEXT_INSN (head
);
4293 while (DEBUG_INSN_P (head
) && head
!= end
)
4294 head
= NEXT_INSN (head
);
4302 head
= NEXT_INSN (head
);
4303 while (DEBUG_INSN_P (head
) && head
!= end
)
4304 head
= NEXT_INSN (head
);
4309 if (!onlyjump_p (end
))
4316 end
= PREV_INSN (end
);
4317 while (DEBUG_INSN_P (end
) && end
!= head
)
4318 end
= PREV_INSN (end
);
4321 /* Don't move frame-related insn across the conditional branch. This
4322 can lead to one of the paths of the branch having wrong unwind info. */
4323 if (epilogue_completed
)
4325 rtx_insn
*insn
= head
;
4328 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
4332 insn
= NEXT_INSN (insn
);
4336 /* Disable handling dead code by conditional execution if the machine needs
4337 to do anything funny with the tests, etc. */
4338 #ifndef IFCVT_MODIFY_TESTS
4339 if (targetm
.have_conditional_execution ())
4341 /* In the conditional execution case, we have things easy. We know
4342 the condition is reversible. We don't have to check life info
4343 because we're going to conditionally execute the code anyway.
4344 All that's left is making sure the insns involved can actually
4349 cond
= cond_exec_get_condition (jump
);
4353 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
4354 int prob_val
= (note
? XINT (note
, 0) : -1);
4358 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
4361 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
4364 prob_val
= REG_BR_PROB_BASE
- prob_val
;
4367 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
4368 && verify_changes (0))
4369 n_validated_changes
= num_validated_changes ();
4377 /* If we allocated new pseudos (e.g. in the conditional move
4378 expander called from noce_emit_cmove), we must resize the
4380 if (max_regno
< max_reg_num ())
4381 max_regno
= max_reg_num ();
4383 /* Try the NCE path if the CE path did not result in any changes. */
4384 if (n_validated_changes
== 0)
4391 /* In the non-conditional execution case, we have to verify that there
4392 are no trapping operations, no calls, no references to memory, and
4393 that any registers modified are dead at the branch site. */
4395 if (!any_condjump_p (jump
))
4398 /* Find the extent of the conditional. */
4399 cond
= noce_get_condition (jump
, &earliest
, false);
4403 live
= BITMAP_ALLOC (®_obstack
);
4404 simulate_backwards_to_point (merge_bb
, live
, end
);
4405 success
= can_move_insns_across (head
, end
, earliest
, jump
,
4407 df_get_live_in (other_bb
), NULL
);
4412 /* Collect the set of registers set in MERGE_BB. */
4413 merge_set
= BITMAP_ALLOC (®_obstack
);
4415 FOR_BB_INSNS (merge_bb
, insn
)
4416 if (NONDEBUG_INSN_P (insn
))
4417 df_simulate_find_defs (insn
, merge_set
);
4419 /* If shrink-wrapping, disable this optimization when test_bb is
4420 the first basic block and merge_bb exits. The idea is to not
4421 move code setting up a return register as that may clobber a
4422 register used to pass function parameters, which then must be
4423 saved in caller-saved regs. A caller-saved reg requires the
4424 prologue, killing a shrink-wrap opportunity. */
4425 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
4426 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
4427 && single_succ_p (new_dest
)
4428 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4429 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
4434 return_regs
= BITMAP_ALLOC (®_obstack
);
4436 /* Start off with the intersection of regs used to pass
4437 params and regs used to return values. */
4438 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4439 if (FUNCTION_ARG_REGNO_P (i
)
4440 && targetm
.calls
.function_value_regno_p (i
))
4441 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
4443 bitmap_and_into (return_regs
,
4444 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
4445 bitmap_and_into (return_regs
,
4446 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
4447 if (!bitmap_empty_p (return_regs
))
4449 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
4450 if (NONDEBUG_INSN_P (insn
))
4454 /* If this insn sets any reg in return_regs, add all
4455 reg uses to the set of regs we're interested in. */
4456 FOR_EACH_INSN_DEF (def
, insn
)
4457 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
4459 df_simulate_uses (insn
, return_regs
);
4463 if (bitmap_intersect_p (merge_set
, return_regs
))
4465 BITMAP_FREE (return_regs
);
4466 BITMAP_FREE (merge_set
);
4470 BITMAP_FREE (return_regs
);
4475 /* We don't want to use normal invert_jump or redirect_jump because
4476 we don't want to delete_insn called. Also, we want to do our own
4477 change group management. */
4479 old_dest
= JUMP_LABEL (jump
);
4480 if (other_bb
!= new_dest
)
4482 if (!any_condjump_p (jump
))
4485 if (JUMP_P (BB_END (dest_edge
->src
)))
4486 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
4487 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4488 new_dest_label
= ret_rtx
;
4490 new_dest_label
= block_label (new_dest
);
4492 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
4494 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
4495 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
4499 if (verify_changes (n_validated_changes
))
4500 confirm_change_group ();
4504 if (other_bb
!= new_dest
)
4506 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
4509 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
4512 std::swap (BRANCH_EDGE (test_bb
)->count
,
4513 FALLTHRU_EDGE (test_bb
)->count
);
4514 std::swap (BRANCH_EDGE (test_bb
)->probability
,
4515 FALLTHRU_EDGE (test_bb
)->probability
);
4516 update_br_prob_note (test_bb
);
4520 /* Move the insns out of MERGE_BB to before the branch. */
4525 if (end
== BB_END (merge_bb
))
4526 BB_END (merge_bb
) = PREV_INSN (head
);
4528 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
4529 notes being moved might become invalid. */
4535 if (! INSN_P (insn
))
4537 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4540 remove_note (insn
, note
);
4541 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
4543 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
4544 notes referring to the registers being set might become invalid. */
4550 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
4551 remove_reg_equal_equiv_notes_for_regno (i
);
4553 BITMAP_FREE (merge_set
);
4556 reorder_insns (head
, end
, PREV_INSN (earliest
));
4559 /* Remove the jump and edge if we can. */
4560 if (other_bb
== new_dest
)
4563 remove_edge (BRANCH_EDGE (test_bb
));
4564 /* ??? Can't merge blocks here, as then_bb is still in use.
4565 At minimum, the merge will get done just before bb-reorder. */
4574 BITMAP_FREE (merge_set
);
4579 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
4580 we are after combine pass. */
4583 if_convert (bool after_combine
)
4590 df_live_add_problem ();
4591 df_live_set_all_dirty ();
4594 /* Record whether we are after combine pass. */
4595 ifcvt_after_combine
= after_combine
;
4596 num_possible_if_blocks
= 0;
4597 num_updated_if_blocks
= 0;
4598 num_true_changes
= 0;
4600 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
4601 mark_loop_exit_edges ();
4602 loop_optimizer_finalize ();
4603 free_dominance_info (CDI_DOMINATORS
);
4605 /* Compute postdominators. */
4606 calculate_dominance_info (CDI_POST_DOMINATORS
);
4608 df_set_flags (DF_LR_RUN_DCE
);
4610 /* Go through each of the basic blocks looking for things to convert. If we
4611 have conditional execution, we make multiple passes to allow us to handle
4612 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
4617 /* Only need to do dce on the first pass. */
4618 df_clear_flags (DF_LR_RUN_DCE
);
4619 cond_exec_changed_p
= FALSE
;
4622 #ifdef IFCVT_MULTIPLE_DUMPS
4623 if (dump_file
&& pass
> 1)
4624 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
4627 FOR_EACH_BB_FN (bb
, cfun
)
4630 while (!df_get_bb_dirty (bb
)
4631 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
4635 #ifdef IFCVT_MULTIPLE_DUMPS
4636 if (dump_file
&& cond_exec_changed_p
)
4637 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
4640 while (cond_exec_changed_p
);
4642 #ifdef IFCVT_MULTIPLE_DUMPS
4644 fprintf (dump_file
, "\n\n========== no more changes\n");
4647 free_dominance_info (CDI_POST_DOMINATORS
);
4652 clear_aux_for_blocks ();
4654 /* If we allocated new pseudos, we must resize the array for sched1. */
4655 if (max_regno
< max_reg_num ())
4656 max_regno
= max_reg_num ();
4658 /* Write the final stats. */
4659 if (dump_file
&& num_possible_if_blocks
> 0)
4662 "\n%d possible IF blocks searched.\n",
4663 num_possible_if_blocks
);
4665 "%d IF blocks converted.\n",
4666 num_updated_if_blocks
);
4668 "%d true changes made.\n\n\n",
4673 df_remove_problem (df_live
);
4675 #ifdef ENABLE_CHECKING
4676 verify_flow_info ();
4680 /* If-conversion and CFG cleanup. */
4682 rest_of_handle_if_conversion (void)
4684 if (flag_if_conversion
)
4688 dump_reg_info (dump_file
);
4689 dump_flow_info (dump_file
, dump_flags
);
4691 cleanup_cfg (CLEANUP_EXPENSIVE
);
4701 const pass_data pass_data_rtl_ifcvt
=
4703 RTL_PASS
, /* type */
4705 OPTGROUP_NONE
, /* optinfo_flags */
4706 TV_IFCVT
, /* tv_id */
4707 0, /* properties_required */
4708 0, /* properties_provided */
4709 0, /* properties_destroyed */
4710 0, /* todo_flags_start */
4711 TODO_df_finish
, /* todo_flags_finish */
4714 class pass_rtl_ifcvt
: public rtl_opt_pass
4717 pass_rtl_ifcvt (gcc::context
*ctxt
)
4718 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
4721 /* opt_pass methods: */
4722 virtual bool gate (function
*)
4724 return (optimize
> 0) && dbg_cnt (if_conversion
);
4727 virtual unsigned int execute (function
*)
4729 return rest_of_handle_if_conversion ();
4732 }; // class pass_rtl_ifcvt
4737 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
4739 return new pass_rtl_ifcvt (ctxt
);
4743 /* Rerun if-conversion, as combine may have simplified things enough
4744 to now meet sequence length restrictions. */
4748 const pass_data pass_data_if_after_combine
=
4750 RTL_PASS
, /* type */
4752 OPTGROUP_NONE
, /* optinfo_flags */
4753 TV_IFCVT
, /* tv_id */
4754 0, /* properties_required */
4755 0, /* properties_provided */
4756 0, /* properties_destroyed */
4757 0, /* todo_flags_start */
4758 TODO_df_finish
, /* todo_flags_finish */
4761 class pass_if_after_combine
: public rtl_opt_pass
4764 pass_if_after_combine (gcc::context
*ctxt
)
4765 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
4768 /* opt_pass methods: */
4769 virtual bool gate (function
*)
4771 return optimize
> 0 && flag_if_conversion
4772 && dbg_cnt (if_after_combine
);
4775 virtual unsigned int execute (function
*)
4781 }; // class pass_if_after_combine
4786 make_pass_if_after_combine (gcc::context
*ctxt
)
4788 return new pass_if_after_combine (ctxt
);
4794 const pass_data pass_data_if_after_reload
=
4796 RTL_PASS
, /* type */
4798 OPTGROUP_NONE
, /* optinfo_flags */
4799 TV_IFCVT2
, /* tv_id */
4800 0, /* properties_required */
4801 0, /* properties_provided */
4802 0, /* properties_destroyed */
4803 0, /* todo_flags_start */
4804 TODO_df_finish
, /* todo_flags_finish */
4807 class pass_if_after_reload
: public rtl_opt_pass
4810 pass_if_after_reload (gcc::context
*ctxt
)
4811 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
4814 /* opt_pass methods: */
4815 virtual bool gate (function
*)
4817 return optimize
> 0 && flag_if_conversion2
4818 && dbg_cnt (if_after_reload
);
4821 virtual unsigned int execute (function
*)
4827 }; // class pass_if_after_reload
4832 make_pass_if_after_reload (gcc::context
*ctxt
)
4834 return new pass_if_after_reload (ctxt
);