1 /* { dg-do compile { target { powerpc*-*-* } } } */
2 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
3 /* { dg-require-effective-target powerpc_p8vector_ok } */
4 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
5 /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */
12 #define SIGN_TYPE signed TYPE
16 #define UNS_TYPE unsigned TYPE
19 typedef vector SIGN_TYPE v_sign
;
20 typedef vector UNS_TYPE v_uns
;
22 v_sign
sign_add (v_sign a
, v_sign b
)
27 v_sign
sign_sub (v_sign a
, v_sign b
)
32 v_sign
sign_shift_left (v_sign a
, v_sign b
)
37 v_sign
sign_shift_right (v_sign a
, v_sign b
)
42 v_uns
uns_add (v_uns a
, v_uns b
)
47 v_uns
uns_sub (v_uns a
, v_uns b
)
52 v_uns
uns_shift_left (v_uns a
, v_uns b
)
57 v_uns
uns_shift_right (v_uns a
, v_uns b
)
62 /* { dg-final { scan-assembler-times "vaddudm" 2 } } */
63 /* { dg-final { scan-assembler-times "vsubudm" 2 } } */
64 /* { dg-final { scan-assembler-times "vsld" 2 } } */
65 /* { dg-final { scan-assembler-times "vsrad" 1 } } */
66 /* { dg-final { scan-assembler-times "vsrd" 1 } } */