1 /* Convert to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
75 #ifdef XCOFF_DEBUGGING_INFO
76 #include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
80 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81 #include "dwarf2out.h"
84 #ifdef DBX_DEBUGGING_INFO
88 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90 #ifndef CC_STATUS_INIT
91 #define CC_STATUS_INIT
94 /* How to start an assembler comment. */
95 #ifndef ASM_COMMENT_START
96 #define ASM_COMMENT_START ";#"
99 /* Is the given character a logical line separator for the assembler? */
100 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
101 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
104 #ifndef JUMP_TABLES_IN_TEXT_SECTION
105 #define JUMP_TABLES_IN_TEXT_SECTION 0
108 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109 #define HAVE_READONLY_DATA_SECTION 1
111 #define HAVE_READONLY_DATA_SECTION 0
114 /* Bitflags used by final_scan_insn. */
117 #define SEEN_EMITTED 4
119 /* Last insn processed by final_scan_insn. */
120 static rtx debug_insn
;
121 rtx current_output_insn
;
123 /* Line number of last NOTE. */
124 static int last_linenum
;
126 /* Highest line number in current block. */
127 static int high_block_linenum
;
129 /* Likewise for function. */
130 static int high_function_linenum
;
132 /* Filename of last NOTE. */
133 static const char *last_filename
;
135 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
137 /* Nonzero while outputting an `asm' with operands.
138 This means that inconsistencies are the user's fault, so don't abort.
139 The precise value is the insn being output, to pass to error_for_asm. */
140 rtx this_is_asm_operands
;
142 /* Number of operands of this insn, for an `asm' with operands. */
143 static unsigned int insn_noperands
;
145 /* Compare optimization flag. */
147 static rtx last_ignored_compare
= 0;
149 /* Assign a unique number to each insn that is output.
150 This can be used to generate unique local labels. */
152 static int insn_counter
= 0;
155 /* This variable contains machine-dependent flags (defined in tm.h)
156 set and examined by output routines
157 that describe how to interpret the condition codes properly. */
161 /* During output of an insn, this contains a copy of cc_status
162 from before the insn. */
164 CC_STATUS cc_prev_status
;
167 /* Indexed by hardware reg number, is 1 if that register is ever
168 used in the current function.
170 In life_analysis, or in stupid_life_analysis, this is set
171 up to record the hard regs used explicitly. Reload adds
172 in the hard regs used for holding pseudo regs. Final uses
173 it to generate the code in the function prologue and epilogue
174 to save and restore registers as needed. */
176 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
178 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
179 Unlike regs_ever_live, elements of this array corresponding to
180 eliminable regs like the frame pointer are set if an asm sets them. */
182 char regs_asm_clobbered
[FIRST_PSEUDO_REGISTER
];
184 /* Nonzero means current function must be given a frame pointer.
185 Initialized in function.c to 0. Set only in reload1.c as per
186 the needs of the function. */
188 int frame_pointer_needed
;
190 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
192 static int block_depth
;
194 /* Nonzero if have enabled APP processing of our assembler output. */
198 /* If we are outputting an insn sequence, this contains the sequence rtx.
203 #ifdef ASSEMBLER_DIALECT
205 /* Number of the assembler dialect to use, starting at 0. */
206 static int dialect_number
;
209 #ifdef HAVE_conditional_execution
210 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
211 rtx current_insn_predicate
;
214 #ifdef HAVE_ATTR_length
215 static int asm_insn_count (rtx
);
217 static void profile_function (FILE *);
218 static void profile_after_prologue (FILE *);
219 static bool notice_source_line (rtx
);
220 static rtx
walk_alter_subreg (rtx
*);
221 static void output_asm_name (void);
222 static void output_alternate_entry_point (FILE *, rtx
);
223 static tree
get_mem_expr_from_op (rtx
, int *);
224 static void output_asm_operand_names (rtx
*, int *, int);
225 static void output_operand (rtx
, int);
226 #ifdef LEAF_REGISTERS
227 static void leaf_renumber_regs (rtx
);
230 static int alter_cond (rtx
);
232 #ifndef ADDR_VEC_ALIGN
233 static int final_addr_vec_align (rtx
);
235 #ifdef HAVE_ATTR_length
236 static int align_fuzz (rtx
, rtx
, int, unsigned);
239 /* Initialize data in final at the beginning of a compilation. */
242 init_final (const char *filename ATTRIBUTE_UNUSED
)
247 #ifdef ASSEMBLER_DIALECT
248 dialect_number
= ASSEMBLER_DIALECT
;
252 /* Default target function prologue and epilogue assembler output.
254 If not overridden for epilogue code, then the function body itself
255 contains return instructions wherever needed. */
257 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
258 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
262 /* Default target hook that outputs nothing to a stream. */
264 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
268 /* Enable APP processing of subsequent output.
269 Used before the output from an `asm' statement. */
276 fputs (ASM_APP_ON
, asm_out_file
);
281 /* Disable APP processing of subsequent output.
282 Called from varasm.c before most kinds of output. */
289 fputs (ASM_APP_OFF
, asm_out_file
);
294 /* Return the number of slots filled in the current
295 delayed branch sequence (we don't count the insn needing the
296 delay slot). Zero if not in a delayed branch sequence. */
300 dbr_sequence_length (void)
302 if (final_sequence
!= 0)
303 return XVECLEN (final_sequence
, 0) - 1;
309 /* The next two pages contain routines used to compute the length of an insn
310 and to shorten branches. */
312 /* Arrays for insn lengths, and addresses. The latter is referenced by
313 `insn_current_length'. */
315 static int *insn_lengths
;
317 varray_type insn_addresses_
;
319 /* Max uid for which the above arrays are valid. */
320 static int insn_lengths_max_uid
;
322 /* Address of insn being processed. Used by `insn_current_length'. */
323 int insn_current_address
;
325 /* Address of insn being processed in previous iteration. */
326 int insn_last_address
;
328 /* known invariant alignment of insn being processed. */
329 int insn_current_align
;
331 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
332 gives the next following alignment insn that increases the known
333 alignment, or NULL_RTX if there is no such insn.
334 For any alignment obtained this way, we can again index uid_align with
335 its uid to obtain the next following align that in turn increases the
336 alignment, till we reach NULL_RTX; the sequence obtained this way
337 for each insn we'll call the alignment chain of this insn in the following
340 struct label_alignment
346 static rtx
*uid_align
;
347 static int *uid_shuid
;
348 static struct label_alignment
*label_align
;
350 /* Indicate that branch shortening hasn't yet been done. */
353 init_insn_lengths (void)
364 insn_lengths_max_uid
= 0;
366 #ifdef HAVE_ATTR_length
367 INSN_ADDRESSES_FREE ();
376 /* Obtain the current length of an insn. If branch shortening has been done,
377 get its actual length. Otherwise, get its maximum length. */
380 get_attr_length (rtx insn ATTRIBUTE_UNUSED
)
382 #ifdef HAVE_ATTR_length
387 if (insn_lengths_max_uid
> INSN_UID (insn
))
388 return insn_lengths
[INSN_UID (insn
)];
390 switch (GET_CODE (insn
))
398 length
= insn_default_length (insn
);
402 body
= PATTERN (insn
);
403 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
405 /* Alignment is machine-dependent and should be handled by
409 length
= insn_default_length (insn
);
413 body
= PATTERN (insn
);
414 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
417 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
418 length
= asm_insn_count (body
) * insn_default_length (insn
);
419 else if (GET_CODE (body
) == SEQUENCE
)
420 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
421 length
+= get_attr_length (XVECEXP (body
, 0, i
));
423 length
= insn_default_length (insn
);
430 #ifdef ADJUST_INSN_LENGTH
431 ADJUST_INSN_LENGTH (insn
, length
);
434 #else /* not HAVE_ATTR_length */
436 #endif /* not HAVE_ATTR_length */
439 /* Code to handle alignment inside shorten_branches. */
441 /* Here is an explanation how the algorithm in align_fuzz can give
444 Call a sequence of instructions beginning with alignment point X
445 and continuing until the next alignment point `block X'. When `X'
446 is used in an expression, it means the alignment value of the
449 Call the distance between the start of the first insn of block X, and
450 the end of the last insn of block X `IX', for the `inner size of X'.
451 This is clearly the sum of the instruction lengths.
453 Likewise with the next alignment-delimited block following X, which we
456 Call the distance between the start of the first insn of block X, and
457 the start of the first insn of block Y `OX', for the `outer size of X'.
459 The estimated padding is then OX - IX.
461 OX can be safely estimated as
466 OX = round_up(IX, X) + Y - X
468 Clearly est(IX) >= real(IX), because that only depends on the
469 instruction lengths, and those being overestimated is a given.
471 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
472 we needn't worry about that when thinking about OX.
474 When X >= Y, the alignment provided by Y adds no uncertainty factor
475 for branch ranges starting before X, so we can just round what we have.
476 But when X < Y, we don't know anything about the, so to speak,
477 `middle bits', so we have to assume the worst when aligning up from an
478 address mod X to one mod Y, which is Y - X. */
481 #define LABEL_ALIGN(LABEL) align_labels_log
484 #ifndef LABEL_ALIGN_MAX_SKIP
485 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
489 #define LOOP_ALIGN(LABEL) align_loops_log
492 #ifndef LOOP_ALIGN_MAX_SKIP
493 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
496 #ifndef LABEL_ALIGN_AFTER_BARRIER
497 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
500 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
501 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
505 #define JUMP_ALIGN(LABEL) align_jumps_log
508 #ifndef JUMP_ALIGN_MAX_SKIP
509 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
512 #ifndef ADDR_VEC_ALIGN
514 final_addr_vec_align (rtx addr_vec
)
516 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
518 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
519 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
520 return exact_log2 (align
);
524 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
527 #ifndef INSN_LENGTH_ALIGNMENT
528 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
531 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
533 static int min_labelno
, max_labelno
;
535 #define LABEL_TO_ALIGNMENT(LABEL) \
536 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
538 #define LABEL_TO_MAX_SKIP(LABEL) \
539 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
541 /* For the benefit of port specific code do this also as a function. */
544 label_to_alignment (rtx label
)
546 return LABEL_TO_ALIGNMENT (label
);
549 #ifdef HAVE_ATTR_length
550 /* The differences in addresses
551 between a branch and its target might grow or shrink depending on
552 the alignment the start insn of the range (the branch for a forward
553 branch or the label for a backward branch) starts out on; if these
554 differences are used naively, they can even oscillate infinitely.
555 We therefore want to compute a 'worst case' address difference that
556 is independent of the alignment the start insn of the range end
557 up on, and that is at least as large as the actual difference.
558 The function align_fuzz calculates the amount we have to add to the
559 naively computed difference, by traversing the part of the alignment
560 chain of the start insn of the range that is in front of the end insn
561 of the range, and considering for each alignment the maximum amount
562 that it might contribute to a size increase.
564 For casesi tables, we also want to know worst case minimum amounts of
565 address difference, in case a machine description wants to introduce
566 some common offset that is added to all offsets in a table.
567 For this purpose, align_fuzz with a growth argument of 0 computes the
568 appropriate adjustment. */
570 /* Compute the maximum delta by which the difference of the addresses of
571 START and END might grow / shrink due to a different address for start
572 which changes the size of alignment insns between START and END.
573 KNOWN_ALIGN_LOG is the alignment known for START.
574 GROWTH should be ~0 if the objective is to compute potential code size
575 increase, and 0 if the objective is to compute potential shrink.
576 The return value is undefined for any other value of GROWTH. */
579 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
581 int uid
= INSN_UID (start
);
583 int known_align
= 1 << known_align_log
;
584 int end_shuid
= INSN_SHUID (end
);
587 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
589 int align_addr
, new_align
;
591 uid
= INSN_UID (align_label
);
592 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
593 if (uid_shuid
[uid
] > end_shuid
)
595 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
596 new_align
= 1 << known_align_log
;
597 if (new_align
< known_align
)
599 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
600 known_align
= new_align
;
605 /* Compute a worst-case reference address of a branch so that it
606 can be safely used in the presence of aligned labels. Since the
607 size of the branch itself is unknown, the size of the branch is
608 not included in the range. I.e. for a forward branch, the reference
609 address is the end address of the branch as known from the previous
610 branch shortening pass, minus a value to account for possible size
611 increase due to alignment. For a backward branch, it is the start
612 address of the branch as known from the current pass, plus a value
613 to account for possible size increase due to alignment.
614 NB.: Therefore, the maximum offset allowed for backward branches needs
615 to exclude the branch size. */
618 insn_current_reference_address (rtx branch
)
623 if (! INSN_ADDRESSES_SET_P ())
626 seq
= NEXT_INSN (PREV_INSN (branch
));
627 seq_uid
= INSN_UID (seq
);
628 if (!JUMP_P (branch
))
629 /* This can happen for example on the PA; the objective is to know the
630 offset to address something in front of the start of the function.
631 Thus, we can treat it like a backward branch.
632 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
633 any alignment we'd encounter, so we skip the call to align_fuzz. */
634 return insn_current_address
;
635 dest
= JUMP_LABEL (branch
);
637 /* BRANCH has no proper alignment chain set, so use SEQ.
638 BRANCH also has no INSN_SHUID. */
639 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
641 /* Forward branch. */
642 return (insn_last_address
+ insn_lengths
[seq_uid
]
643 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
647 /* Backward branch. */
648 return (insn_current_address
649 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
652 #endif /* HAVE_ATTR_length */
655 compute_alignments (void)
657 int log
, max_skip
, max_log
;
666 max_labelno
= max_label_num ();
667 min_labelno
= get_first_label_num ();
668 label_align
= xcalloc (max_labelno
- min_labelno
+ 1,
669 sizeof (struct label_alignment
));
671 /* If not optimizing or optimizing for size, don't assign any alignments. */
672 if (! optimize
|| optimize_size
)
677 rtx label
= BB_HEAD (bb
);
678 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
683 || probably_never_executed_bb_p (bb
))
685 max_log
= LABEL_ALIGN (label
);
686 max_skip
= LABEL_ALIGN_MAX_SKIP
;
688 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
690 if (e
->flags
& EDGE_FALLTHRU
)
691 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
693 branch_frequency
+= EDGE_FREQUENCY (e
);
696 /* There are two purposes to align block with no fallthru incoming edge:
697 1) to avoid fetch stalls when branch destination is near cache boundary
698 2) to improve cache efficiency in case the previous block is not executed
699 (so it does not need to be in the cache).
701 We to catch first case, we align frequently executed blocks.
702 To catch the second, we align blocks that are executed more frequently
703 than the predecessor and the predecessor is likely to not be executed
704 when function is called. */
707 && (branch_frequency
> BB_FREQ_MAX
/ 10
708 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
709 && (bb
->prev_bb
->frequency
710 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
712 log
= JUMP_ALIGN (label
);
716 max_skip
= JUMP_ALIGN_MAX_SKIP
;
719 /* In case block is frequent and reached mostly by non-fallthru edge,
720 align it. It is most likely a first block of loop. */
722 && maybe_hot_bb_p (bb
)
723 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
724 && branch_frequency
> fallthru_frequency
* 2)
726 log
= LOOP_ALIGN (label
);
730 max_skip
= LOOP_ALIGN_MAX_SKIP
;
733 LABEL_TO_ALIGNMENT (label
) = max_log
;
734 LABEL_TO_MAX_SKIP (label
) = max_skip
;
738 /* Make a pass over all insns and compute their actual lengths by shortening
739 any branches of variable length if possible. */
741 /* shorten_branches might be called multiple times: for example, the SH
742 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
743 In order to do this, it needs proper length information, which it obtains
744 by calling shorten_branches. This cannot be collapsed with
745 shorten_branches itself into a single pass unless we also want to integrate
746 reorg.c, since the branch splitting exposes new instructions with delay
750 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
757 #ifdef HAVE_ATTR_length
758 #define MAX_CODE_ALIGN 16
760 int something_changed
= 1;
761 char *varying_length
;
764 rtx align_tab
[MAX_CODE_ALIGN
];
768 /* Compute maximum UID and allocate label_align / uid_shuid. */
769 max_uid
= get_max_uid ();
771 /* Free uid_shuid before reallocating it. */
774 uid_shuid
= xmalloc (max_uid
* sizeof *uid_shuid
);
776 if (max_labelno
!= max_label_num ())
778 int old
= max_labelno
;
782 max_labelno
= max_label_num ();
784 n_labels
= max_labelno
- min_labelno
+ 1;
785 n_old_labels
= old
- min_labelno
+ 1;
787 label_align
= xrealloc (label_align
,
788 n_labels
* sizeof (struct label_alignment
));
790 /* Range of labels grows monotonically in the function. Abort here
791 means that the initialization of array got lost. */
792 gcc_assert (n_old_labels
<= n_labels
);
794 memset (label_align
+ n_old_labels
, 0,
795 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
798 /* Initialize label_align and set up uid_shuid to be strictly
799 monotonically rising with insn order. */
800 /* We use max_log here to keep track of the maximum alignment we want to
801 impose on the next CODE_LABEL (or the current one if we are processing
802 the CODE_LABEL itself). */
807 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
811 INSN_SHUID (insn
) = i
++;
814 /* reorg might make the first insn of a loop being run once only,
815 and delete the label in front of it. Then we want to apply
816 the loop alignment to the new label created by reorg, which
817 is separated by the former loop start insn from the
818 NOTE_INSN_LOOP_BEG. */
820 else if (LABEL_P (insn
))
824 /* Merge in alignments computed by compute_alignments. */
825 log
= LABEL_TO_ALIGNMENT (insn
);
829 max_skip
= LABEL_TO_MAX_SKIP (insn
);
832 log
= LABEL_ALIGN (insn
);
836 max_skip
= LABEL_ALIGN_MAX_SKIP
;
838 next
= NEXT_INSN (insn
);
839 /* ADDR_VECs only take room if read-only data goes into the text
841 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
842 if (next
&& JUMP_P (next
))
844 rtx nextbody
= PATTERN (next
);
845 if (GET_CODE (nextbody
) == ADDR_VEC
846 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
848 log
= ADDR_VEC_ALIGN (next
);
852 max_skip
= LABEL_ALIGN_MAX_SKIP
;
856 LABEL_TO_ALIGNMENT (insn
) = max_log
;
857 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
861 else if (BARRIER_P (insn
))
865 for (label
= insn
; label
&& ! INSN_P (label
);
866 label
= NEXT_INSN (label
))
869 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
873 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
879 #ifdef HAVE_ATTR_length
881 /* Allocate the rest of the arrays. */
882 insn_lengths
= xmalloc (max_uid
* sizeof (*insn_lengths
));
883 insn_lengths_max_uid
= max_uid
;
884 /* Syntax errors can lead to labels being outside of the main insn stream.
885 Initialize insn_addresses, so that we get reproducible results. */
886 INSN_ADDRESSES_ALLOC (max_uid
);
888 varying_length
= xcalloc (max_uid
, sizeof (char));
890 /* Initialize uid_align. We scan instructions
891 from end to start, and keep in align_tab[n] the last seen insn
892 that does an alignment of at least n+1, i.e. the successor
893 in the alignment chain for an insn that does / has a known
895 uid_align
= xcalloc (max_uid
, sizeof *uid_align
);
897 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
898 align_tab
[i
] = NULL_RTX
;
899 seq
= get_last_insn ();
900 for (; seq
; seq
= PREV_INSN (seq
))
902 int uid
= INSN_UID (seq
);
904 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
905 uid_align
[uid
] = align_tab
[0];
908 /* Found an alignment label. */
909 uid_align
[uid
] = align_tab
[log
];
910 for (i
= log
- 1; i
>= 0; i
--)
914 #ifdef CASE_VECTOR_SHORTEN_MODE
917 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
920 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
921 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
924 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
926 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
927 int len
, i
, min
, max
, insn_shuid
;
929 addr_diff_vec_flags flags
;
932 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
934 pat
= PATTERN (insn
);
935 len
= XVECLEN (pat
, 1);
936 gcc_assert (len
> 0);
937 min_align
= MAX_CODE_ALIGN
;
938 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
940 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
941 int shuid
= INSN_SHUID (lab
);
952 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
953 min_align
= LABEL_TO_ALIGNMENT (lab
);
955 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
956 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
957 insn_shuid
= INSN_SHUID (insn
);
958 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
959 flags
.min_align
= min_align
;
960 flags
.base_after_vec
= rel
> insn_shuid
;
961 flags
.min_after_vec
= min
> insn_shuid
;
962 flags
.max_after_vec
= max
> insn_shuid
;
963 flags
.min_after_base
= min
> rel
;
964 flags
.max_after_base
= max
> rel
;
965 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
968 #endif /* CASE_VECTOR_SHORTEN_MODE */
970 /* Compute initial lengths, addresses, and varying flags for each insn. */
971 for (insn_current_address
= 0, insn
= first
;
973 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
975 uid
= INSN_UID (insn
);
977 insn_lengths
[uid
] = 0;
981 int log
= LABEL_TO_ALIGNMENT (insn
);
984 int align
= 1 << log
;
985 int new_address
= (insn_current_address
+ align
- 1) & -align
;
986 insn_lengths
[uid
] = new_address
- insn_current_address
;
990 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
992 if (NOTE_P (insn
) || BARRIER_P (insn
)
995 if (INSN_DELETED_P (insn
))
998 body
= PATTERN (insn
);
999 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1001 /* This only takes room if read-only data goes into the text
1003 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1004 insn_lengths
[uid
] = (XVECLEN (body
,
1005 GET_CODE (body
) == ADDR_DIFF_VEC
)
1006 * GET_MODE_SIZE (GET_MODE (body
)));
1007 /* Alignment is handled by ADDR_VEC_ALIGN. */
1009 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1010 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1011 else if (GET_CODE (body
) == SEQUENCE
)
1014 int const_delay_slots
;
1016 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1018 const_delay_slots
= 0;
1020 /* Inside a delay slot sequence, we do not do any branch shortening
1021 if the shortening could change the number of delay slots
1023 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1025 rtx inner_insn
= XVECEXP (body
, 0, i
);
1026 int inner_uid
= INSN_UID (inner_insn
);
1029 if (GET_CODE (body
) == ASM_INPUT
1030 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1031 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1032 * insn_default_length (inner_insn
));
1034 inner_length
= insn_default_length (inner_insn
);
1036 insn_lengths
[inner_uid
] = inner_length
;
1037 if (const_delay_slots
)
1039 if ((varying_length
[inner_uid
]
1040 = insn_variable_length_p (inner_insn
)) != 0)
1041 varying_length
[uid
] = 1;
1042 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1043 + insn_lengths
[uid
]);
1046 varying_length
[inner_uid
] = 0;
1047 insn_lengths
[uid
] += inner_length
;
1050 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1052 insn_lengths
[uid
] = insn_default_length (insn
);
1053 varying_length
[uid
] = insn_variable_length_p (insn
);
1056 /* If needed, do any adjustment. */
1057 #ifdef ADJUST_INSN_LENGTH
1058 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1059 if (insn_lengths
[uid
] < 0)
1060 fatal_insn ("negative insn length", insn
);
1064 /* Now loop over all the insns finding varying length insns. For each,
1065 get the current insn length. If it has changed, reflect the change.
1066 When nothing changes for a full pass, we are done. */
1068 while (something_changed
)
1070 something_changed
= 0;
1071 insn_current_align
= MAX_CODE_ALIGN
- 1;
1072 for (insn_current_address
= 0, insn
= first
;
1074 insn
= NEXT_INSN (insn
))
1077 #ifdef ADJUST_INSN_LENGTH
1082 uid
= INSN_UID (insn
);
1086 int log
= LABEL_TO_ALIGNMENT (insn
);
1087 if (log
> insn_current_align
)
1089 int align
= 1 << log
;
1090 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1091 insn_lengths
[uid
] = new_address
- insn_current_address
;
1092 insn_current_align
= log
;
1093 insn_current_address
= new_address
;
1096 insn_lengths
[uid
] = 0;
1097 INSN_ADDRESSES (uid
) = insn_current_address
;
1101 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1102 if (length_align
< insn_current_align
)
1103 insn_current_align
= length_align
;
1105 insn_last_address
= INSN_ADDRESSES (uid
);
1106 INSN_ADDRESSES (uid
) = insn_current_address
;
1108 #ifdef CASE_VECTOR_SHORTEN_MODE
1109 if (optimize
&& JUMP_P (insn
)
1110 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1112 rtx body
= PATTERN (insn
);
1113 int old_length
= insn_lengths
[uid
];
1114 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1115 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1116 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1117 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1118 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1119 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1122 addr_diff_vec_flags flags
;
1124 /* Avoid automatic aggregate initialization. */
1125 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1127 /* Try to find a known alignment for rel_lab. */
1128 for (prev
= rel_lab
;
1130 && ! insn_lengths
[INSN_UID (prev
)]
1131 && ! (varying_length
[INSN_UID (prev
)] & 1);
1132 prev
= PREV_INSN (prev
))
1133 if (varying_length
[INSN_UID (prev
)] & 2)
1135 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1139 /* See the comment on addr_diff_vec_flags in rtl.h for the
1140 meaning of the flags values. base: REL_LAB vec: INSN */
1141 /* Anything after INSN has still addresses from the last
1142 pass; adjust these so that they reflect our current
1143 estimate for this pass. */
1144 if (flags
.base_after_vec
)
1145 rel_addr
+= insn_current_address
- insn_last_address
;
1146 if (flags
.min_after_vec
)
1147 min_addr
+= insn_current_address
- insn_last_address
;
1148 if (flags
.max_after_vec
)
1149 max_addr
+= insn_current_address
- insn_last_address
;
1150 /* We want to know the worst case, i.e. lowest possible value
1151 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1152 its offset is positive, and we have to be wary of code shrink;
1153 otherwise, it is negative, and we have to be vary of code
1155 if (flags
.min_after_base
)
1157 /* If INSN is between REL_LAB and MIN_LAB, the size
1158 changes we are about to make can change the alignment
1159 within the observed offset, therefore we have to break
1160 it up into two parts that are independent. */
1161 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1163 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1164 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1167 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1171 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1173 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1174 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1177 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1179 /* Likewise, determine the highest lowest possible value
1180 for the offset of MAX_LAB. */
1181 if (flags
.max_after_base
)
1183 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1185 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1186 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1189 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1193 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1195 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1196 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1199 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1201 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1202 max_addr
- rel_addr
,
1204 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1207 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1208 insn_current_address
+= insn_lengths
[uid
];
1209 if (insn_lengths
[uid
] != old_length
)
1210 something_changed
= 1;
1215 #endif /* CASE_VECTOR_SHORTEN_MODE */
1217 if (! (varying_length
[uid
]))
1219 if (NONJUMP_INSN_P (insn
)
1220 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1224 body
= PATTERN (insn
);
1225 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1227 rtx inner_insn
= XVECEXP (body
, 0, i
);
1228 int inner_uid
= INSN_UID (inner_insn
);
1230 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1232 insn_current_address
+= insn_lengths
[inner_uid
];
1236 insn_current_address
+= insn_lengths
[uid
];
1241 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1245 body
= PATTERN (insn
);
1247 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1249 rtx inner_insn
= XVECEXP (body
, 0, i
);
1250 int inner_uid
= INSN_UID (inner_insn
);
1253 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1255 /* insn_current_length returns 0 for insns with a
1256 non-varying length. */
1257 if (! varying_length
[inner_uid
])
1258 inner_length
= insn_lengths
[inner_uid
];
1260 inner_length
= insn_current_length (inner_insn
);
1262 if (inner_length
!= insn_lengths
[inner_uid
])
1264 insn_lengths
[inner_uid
] = inner_length
;
1265 something_changed
= 1;
1267 insn_current_address
+= insn_lengths
[inner_uid
];
1268 new_length
+= inner_length
;
1273 new_length
= insn_current_length (insn
);
1274 insn_current_address
+= new_length
;
1277 #ifdef ADJUST_INSN_LENGTH
1278 /* If needed, do any adjustment. */
1279 tmp_length
= new_length
;
1280 ADJUST_INSN_LENGTH (insn
, new_length
);
1281 insn_current_address
+= (new_length
- tmp_length
);
1284 if (new_length
!= insn_lengths
[uid
])
1286 insn_lengths
[uid
] = new_length
;
1287 something_changed
= 1;
1290 /* For a non-optimizing compile, do only a single pass. */
1295 free (varying_length
);
1297 #endif /* HAVE_ATTR_length */
1300 #ifdef HAVE_ATTR_length
1301 /* Given the body of an INSN known to be generated by an ASM statement, return
1302 the number of machine instructions likely to be generated for this insn.
1303 This is used to compute its length. */
1306 asm_insn_count (rtx body
)
1308 const char *template;
1311 if (GET_CODE (body
) == ASM_INPUT
)
1312 template = XSTR (body
, 0);
1314 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1316 for (; *template; template++)
1317 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1324 /* Output assembler code for the start of a function,
1325 and initialize some of the variables in this file
1326 for the new function. The label for the function and associated
1327 assembler pseudo-ops have already been output in `assemble_start_function'.
1329 FIRST is the first insn of the rtl for the function being compiled.
1330 FILE is the file to write assembler code to.
1331 OPTIMIZE is nonzero if we should eliminate redundant
1332 test and compare insns. */
1335 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1336 int optimize ATTRIBUTE_UNUSED
)
1340 this_is_asm_operands
= 0;
1342 last_filename
= locator_file (prologue_locator
);
1343 last_linenum
= locator_line (prologue_locator
);
1345 high_block_linenum
= high_function_linenum
= last_linenum
;
1347 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1349 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1350 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1351 dwarf2out_begin_prologue (0, NULL
);
1354 #ifdef LEAF_REG_REMAP
1355 if (current_function_uses_only_leaf_regs
)
1356 leaf_renumber_regs (first
);
1359 /* The Sun386i and perhaps other machines don't work right
1360 if the profiling code comes after the prologue. */
1361 #ifdef PROFILE_BEFORE_PROLOGUE
1362 if (current_function_profile
)
1363 profile_function (file
);
1364 #endif /* PROFILE_BEFORE_PROLOGUE */
1366 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1367 if (dwarf2out_do_frame ())
1368 dwarf2out_frame_debug (NULL_RTX
);
1371 /* If debugging, assign block numbers to all of the blocks in this
1375 remove_unnecessary_notes ();
1376 reemit_insn_block_notes ();
1377 number_blocks (current_function_decl
);
1378 /* We never actually put out begin/end notes for the top-level
1379 block in the function. But, conceptually, that block is
1381 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1384 /* First output the function prologue: code to set up the stack frame. */
1385 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1387 /* If the machine represents the prologue as RTL, the profiling code must
1388 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1389 #ifdef HAVE_prologue
1390 if (! HAVE_prologue
)
1392 profile_after_prologue (file
);
1396 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1398 #ifndef PROFILE_BEFORE_PROLOGUE
1399 if (current_function_profile
)
1400 profile_function (file
);
1401 #endif /* not PROFILE_BEFORE_PROLOGUE */
1405 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1407 #ifndef NO_PROFILE_COUNTERS
1408 # define NO_PROFILE_COUNTERS 0
1410 #if defined(ASM_OUTPUT_REG_PUSH)
1411 int sval
= current_function_returns_struct
;
1412 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1413 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1414 int cxt
= cfun
->static_chain_decl
!= NULL
;
1416 #endif /* ASM_OUTPUT_REG_PUSH */
1418 if (! NO_PROFILE_COUNTERS
)
1420 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1422 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1423 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1424 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1427 function_section (current_function_decl
);
1429 #if defined(ASM_OUTPUT_REG_PUSH)
1430 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1431 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1434 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1436 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1438 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1441 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1446 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1448 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1450 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1452 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1455 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1460 #if defined(ASM_OUTPUT_REG_PUSH)
1461 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1462 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1466 /* Output assembler code for the end of a function.
1467 For clarity, args are same as those of `final_start_function'
1468 even though not all of them are needed. */
1471 final_end_function (void)
1475 (*debug_hooks
->end_function
) (high_function_linenum
);
1477 /* Finally, output the function epilogue:
1478 code to restore the stack frame and return to the caller. */
1479 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1481 /* And debug output. */
1482 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1484 #if defined (DWARF2_UNWIND_INFO)
1485 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1486 && dwarf2out_do_frame ())
1487 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1491 /* Output assembler code for some insns: all or part of a function.
1492 For description of args, see `final_start_function', above.
1494 PRESCAN is 1 if we are not really outputting,
1495 just scanning as if we were outputting.
1496 Prescanning deletes and rearranges insns just like ordinary output.
1497 PRESCAN is -2 if we are outputting after having prescanned.
1498 In this case, don't try to delete or rearrange insns
1499 because that has already been done.
1500 Prescanning is done only on certain machines. */
1503 final (rtx first
, FILE *file
, int optimize
, int prescan
)
1509 last_ignored_compare
= 0;
1511 #ifdef SDB_DEBUGGING_INFO
1512 /* When producing SDB debugging info, delete troublesome line number
1513 notes from inlined functions in other files as well as duplicate
1514 line number notes. */
1515 if (write_symbols
== SDB_DEBUG
)
1518 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1519 if (NOTE_P (insn
) && NOTE_LINE_NUMBER (insn
) > 0)
1522 #ifdef USE_MAPPED_LOCATION
1523 && NOTE_SOURCE_LOCATION (insn
) == NOTE_SOURCE_LOCATION (last
)
1525 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1526 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)
1530 delete_insn (insn
); /* Use delete_note. */
1538 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1540 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1541 max_uid
= INSN_UID (insn
);
1543 /* If CC tracking across branches is enabled, record the insn which
1544 jumps to each branch only reached from one place. */
1545 if (optimize
&& JUMP_P (insn
))
1547 rtx lab
= JUMP_LABEL (insn
);
1548 if (lab
&& LABEL_NUSES (lab
) == 1)
1550 LABEL_REFS (lab
) = insn
;
1560 /* Output the insns. */
1561 for (insn
= NEXT_INSN (first
); insn
;)
1563 #ifdef HAVE_ATTR_length
1564 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1566 /* This can be triggered by bugs elsewhere in the compiler if
1567 new insns are created after init_insn_lengths is called. */
1568 gcc_assert (NOTE_P (insn
));
1569 insn_current_address
= -1;
1572 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1573 #endif /* HAVE_ATTR_length */
1575 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0, &seen
);
1580 get_insn_template (int code
, rtx insn
)
1582 switch (insn_data
[code
].output_format
)
1584 case INSN_OUTPUT_FORMAT_SINGLE
:
1585 return insn_data
[code
].output
.single
;
1586 case INSN_OUTPUT_FORMAT_MULTI
:
1587 return insn_data
[code
].output
.multi
[which_alternative
];
1588 case INSN_OUTPUT_FORMAT_FUNCTION
:
1590 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1597 /* Emit the appropriate declaration for an alternate-entry-point
1598 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1599 LABEL_KIND != LABEL_NORMAL.
1601 The case fall-through in this function is intentional. */
1603 output_alternate_entry_point (FILE *file
, rtx insn
)
1605 const char *name
= LABEL_NAME (insn
);
1607 switch (LABEL_KIND (insn
))
1609 case LABEL_WEAK_ENTRY
:
1610 #ifdef ASM_WEAKEN_LABEL
1611 ASM_WEAKEN_LABEL (file
, name
);
1613 case LABEL_GLOBAL_ENTRY
:
1614 targetm
.asm_out
.globalize_label (file
, name
);
1615 case LABEL_STATIC_ENTRY
:
1616 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1617 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1619 ASM_OUTPUT_LABEL (file
, name
);
1628 /* Return boolean indicating if there is a NOTE_INSN_UNLIKELY_EXECUTED_CODE
1629 note in the instruction chain (going forward) between the current
1630 instruction, and the next 'executable' instruction. */
1633 scan_ahead_for_unlikely_executed_note (rtx insn
)
1636 int bb_note_count
= 0;
1638 for (temp
= insn
; temp
; temp
= NEXT_INSN (temp
))
1641 && NOTE_LINE_NUMBER (temp
) == NOTE_INSN_UNLIKELY_EXECUTED_CODE
)
1644 && NOTE_LINE_NUMBER (temp
) == NOTE_INSN_BASIC_BLOCK
)
1647 if (bb_note_count
> 1)
1657 /* The final scan for one insn, INSN.
1658 Args are same as in `final', except that INSN
1659 is the insn being scanned.
1660 Value returned is the next insn to be scanned.
1662 NOPEEPHOLES is the flag to disallow peephole processing (currently
1663 used for within delayed branch sequence output).
1665 SEEN is used to track the end of the prologue, for emitting
1666 debug information. We force the emission of a line note after
1667 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1668 at the beginning of the second basic block, whichever comes
1672 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1673 int prescan
, int nopeepholes ATTRIBUTE_UNUSED
,
1682 /* Ignore deleted insns. These can occur when we split insns (due to a
1683 template of "#") while not optimizing. */
1684 if (INSN_DELETED_P (insn
))
1685 return NEXT_INSN (insn
);
1687 switch (GET_CODE (insn
))
1693 switch (NOTE_LINE_NUMBER (insn
))
1695 case NOTE_INSN_DELETED
:
1696 case NOTE_INSN_LOOP_BEG
:
1697 case NOTE_INSN_LOOP_END
:
1698 case NOTE_INSN_FUNCTION_END
:
1699 case NOTE_INSN_REPEATED_LINE_NUMBER
:
1700 case NOTE_INSN_EXPECTED_VALUE
:
1703 case NOTE_INSN_UNLIKELY_EXECUTED_CODE
:
1705 /* The presence of this note indicates that this basic block
1706 belongs in the "cold" section of the .o file. If we are
1707 not already writing to the cold section we need to change
1710 unlikely_text_section ();
1713 case NOTE_INSN_BASIC_BLOCK
:
1715 /* If we are performing the optimization that partitions
1716 basic blocks into hot & cold sections of the .o file,
1717 then at the start of each new basic block, before
1718 beginning to write code for the basic block, we need to
1719 check to see whether the basic block belongs in the hot
1720 or cold section of the .o file, and change the section we
1721 are writing to appropriately. */
1723 if (flag_reorder_blocks_and_partition
1724 && !scan_ahead_for_unlikely_executed_note (insn
))
1725 function_section (current_function_decl
);
1727 #ifdef TARGET_UNWIND_INFO
1728 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1732 fprintf (asm_out_file
, "\t%s basic block %d\n",
1733 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1735 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1737 *seen
|= SEEN_EMITTED
;
1738 last_filename
= NULL
;
1745 case NOTE_INSN_EH_REGION_BEG
:
1746 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1747 NOTE_EH_HANDLER (insn
));
1750 case NOTE_INSN_EH_REGION_END
:
1751 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1752 NOTE_EH_HANDLER (insn
));
1755 case NOTE_INSN_PROLOGUE_END
:
1756 targetm
.asm_out
.function_end_prologue (file
);
1757 profile_after_prologue (file
);
1759 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1761 *seen
|= SEEN_EMITTED
;
1762 last_filename
= NULL
;
1769 case NOTE_INSN_EPILOGUE_BEG
:
1770 targetm
.asm_out
.function_begin_epilogue (file
);
1773 case NOTE_INSN_FUNCTION_BEG
:
1775 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1777 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1779 *seen
|= SEEN_EMITTED
;
1780 last_filename
= NULL
;
1787 case NOTE_INSN_BLOCK_BEG
:
1788 if (debug_info_level
== DINFO_LEVEL_NORMAL
1789 || debug_info_level
== DINFO_LEVEL_VERBOSE
1790 || write_symbols
== DWARF2_DEBUG
1791 || write_symbols
== VMS_AND_DWARF2_DEBUG
1792 || write_symbols
== VMS_DEBUG
)
1794 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1798 high_block_linenum
= last_linenum
;
1800 /* Output debugging info about the symbol-block beginning. */
1801 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1803 /* Mark this block as output. */
1804 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1808 case NOTE_INSN_BLOCK_END
:
1809 if (debug_info_level
== DINFO_LEVEL_NORMAL
1810 || debug_info_level
== DINFO_LEVEL_VERBOSE
1811 || write_symbols
== DWARF2_DEBUG
1812 || write_symbols
== VMS_AND_DWARF2_DEBUG
1813 || write_symbols
== VMS_DEBUG
)
1815 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1819 /* End of a symbol-block. */
1821 gcc_assert (block_depth
>= 0);
1823 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1827 case NOTE_INSN_DELETED_LABEL
:
1828 /* Emit the label. We may have deleted the CODE_LABEL because
1829 the label could be proved to be unreachable, though still
1830 referenced (in the form of having its address taken. */
1831 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1834 case NOTE_INSN_VAR_LOCATION
:
1835 (*debug_hooks
->var_location
) (insn
);
1842 gcc_assert (NOTE_LINE_NUMBER (insn
) > 0);
1848 #if defined (DWARF2_UNWIND_INFO)
1849 if (dwarf2out_do_frame ())
1850 dwarf2out_frame_debug (insn
);
1855 /* The target port might emit labels in the output function for
1856 some insn, e.g. sh.c output_branchy_insn. */
1857 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1859 int align
= LABEL_TO_ALIGNMENT (insn
);
1860 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1861 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1864 if (align
&& NEXT_INSN (insn
))
1866 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1867 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1869 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1870 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1872 ASM_OUTPUT_ALIGN (file
, align
);
1879 /* If this label is reached from only one place, set the condition
1880 codes from the instruction just before the branch. */
1882 /* Disabled because some insns set cc_status in the C output code
1883 and NOTICE_UPDATE_CC alone can set incorrect status. */
1884 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1886 rtx jump
= LABEL_REFS (insn
);
1887 rtx barrier
= prev_nonnote_insn (insn
);
1889 /* If the LABEL_REFS field of this label has been set to point
1890 at a branch, the predecessor of the branch is a regular
1891 insn, and that branch is the only way to reach this label,
1892 set the condition codes based on the branch and its
1894 if (barrier
&& BARRIER_P (barrier
)
1895 && jump
&& JUMP_P (jump
)
1896 && (prev
= prev_nonnote_insn (jump
))
1897 && NONJUMP_INSN_P (prev
))
1899 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1900 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1907 if (LABEL_NAME (insn
))
1908 (*debug_hooks
->label
) (insn
);
1910 /* If we are doing the optimization that partitions hot & cold
1911 basic blocks into separate sections of the .o file, we need
1912 to ensure the jump table ends up in the correct section... */
1914 if (flag_reorder_blocks_and_partition
1915 && targetm
.have_named_sections
)
1917 rtx tmp_table
, tmp_label
;
1919 && tablejump_p (NEXT_INSN (insn
), &tmp_label
, &tmp_table
))
1921 /* Do nothing; Do NOT change the current section. */
1923 else if (scan_ahead_for_unlikely_executed_note (insn
))
1924 unlikely_text_section ();
1925 else if (in_unlikely_text_section ())
1926 function_section (current_function_decl
);
1931 fputs (ASM_APP_OFF
, file
);
1934 if (NEXT_INSN (insn
) != 0
1935 && JUMP_P (NEXT_INSN (insn
)))
1937 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
1939 /* If this label is followed by a jump-table,
1940 make sure we put the label in the read-only section. Also
1941 possibly write the label and jump table together. */
1943 if (GET_CODE (nextbody
) == ADDR_VEC
1944 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1946 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1947 /* In this case, the case vector is being moved by the
1948 target, so don't output the label at all. Leave that
1949 to the back end macros. */
1951 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1955 targetm
.asm_out
.function_rodata_section (current_function_decl
);
1957 #ifdef ADDR_VEC_ALIGN
1958 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
1960 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1962 ASM_OUTPUT_ALIGN (file
, log_align
);
1965 function_section (current_function_decl
);
1967 #ifdef ASM_OUTPUT_CASE_LABEL
1968 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1971 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1977 if (LABEL_ALT_ENTRY_P (insn
))
1978 output_alternate_entry_point (file
, insn
);
1980 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1985 rtx body
= PATTERN (insn
);
1986 int insn_code_number
;
1987 const char *template;
1989 /* An INSN, JUMP_INSN or CALL_INSN.
1990 First check for special kinds that recog doesn't recognize. */
1992 if (GET_CODE (body
) == USE
/* These are just declarations. */
1993 || GET_CODE (body
) == CLOBBER
)
1998 /* If there is a REG_CC_SETTER note on this insn, it means that
1999 the setting of the condition code was done in the delay slot
2000 of the insn that branched here. So recover the cc status
2001 from the insn that set it. */
2003 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2006 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2007 cc_prev_status
= cc_status
;
2012 /* Detect insns that are really jump-tables
2013 and output them as such. */
2015 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2017 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2026 fputs (ASM_APP_OFF
, file
);
2030 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2031 if (GET_CODE (body
) == ADDR_VEC
)
2033 #ifdef ASM_OUTPUT_ADDR_VEC
2034 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2041 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2042 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2048 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2049 for (idx
= 0; idx
< vlen
; idx
++)
2051 if (GET_CODE (body
) == ADDR_VEC
)
2053 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2054 ASM_OUTPUT_ADDR_VEC_ELT
2055 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2062 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2063 ASM_OUTPUT_ADDR_DIFF_ELT
2066 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2067 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2073 #ifdef ASM_OUTPUT_CASE_END
2074 ASM_OUTPUT_CASE_END (file
,
2075 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2080 function_section (current_function_decl
);
2084 /* Output this line note if it is the first or the last line
2086 if (notice_source_line (insn
))
2088 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2091 if (GET_CODE (body
) == ASM_INPUT
)
2093 const char *string
= XSTR (body
, 0);
2095 /* There's no telling what that did to the condition codes. */
2104 fputs (ASM_APP_ON
, file
);
2107 fprintf (asm_out_file
, "\t%s\n", string
);
2112 /* Detect `asm' construct with operands. */
2113 if (asm_noperands (body
) >= 0)
2115 unsigned int noperands
= asm_noperands (body
);
2116 rtx
*ops
= alloca (noperands
* sizeof (rtx
));
2119 /* There's no telling what that did to the condition codes. */
2124 /* Get out the operand values. */
2125 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2126 /* Inhibit aborts on what would otherwise be compiler bugs. */
2127 insn_noperands
= noperands
;
2128 this_is_asm_operands
= insn
;
2130 #ifdef FINAL_PRESCAN_INSN
2131 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2134 /* Output the insn using them. */
2139 fputs (ASM_APP_ON
, file
);
2142 output_asm_insn (string
, ops
);
2145 this_is_asm_operands
= 0;
2149 if (prescan
<= 0 && app_on
)
2151 fputs (ASM_APP_OFF
, file
);
2155 if (GET_CODE (body
) == SEQUENCE
)
2157 /* A delayed-branch sequence */
2163 final_sequence
= body
;
2165 /* Record the delay slots' frame information before the branch.
2166 This is needed for delayed calls: see execute_cfa_program(). */
2167 #if defined (DWARF2_UNWIND_INFO)
2168 if (dwarf2out_do_frame ())
2169 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2170 dwarf2out_frame_debug (XVECEXP (body
, 0, i
));
2173 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2174 force the restoration of a comparison that was previously
2175 thought unnecessary. If that happens, cancel this sequence
2176 and cause that insn to be restored. */
2178 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1, seen
);
2179 if (next
!= XVECEXP (body
, 0, 1))
2185 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2187 rtx insn
= XVECEXP (body
, 0, i
);
2188 rtx next
= NEXT_INSN (insn
);
2189 /* We loop in case any instruction in a delay slot gets
2192 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1, seen
);
2193 while (insn
!= next
);
2195 #ifdef DBR_OUTPUT_SEQEND
2196 DBR_OUTPUT_SEQEND (file
);
2200 /* If the insn requiring the delay slot was a CALL_INSN, the
2201 insns in the delay slot are actually executed before the
2202 called function. Hence we don't preserve any CC-setting
2203 actions in these insns and the CC must be marked as being
2204 clobbered by the function. */
2205 if (CALL_P (XVECEXP (body
, 0, 0)))
2212 /* We have a real machine instruction as rtl. */
2214 body
= PATTERN (insn
);
2217 set
= single_set (insn
);
2219 /* Check for redundant test and compare instructions
2220 (when the condition codes are already set up as desired).
2221 This is done only when optimizing; if not optimizing,
2222 it should be possible for the user to alter a variable
2223 with the debugger in between statements
2224 and the next statement should reexamine the variable
2225 to compute the condition codes. */
2230 && GET_CODE (SET_DEST (set
)) == CC0
2231 && insn
!= last_ignored_compare
)
2233 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2234 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2235 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2237 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2238 XEXP (SET_SRC (set
), 0)
2239 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2240 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2241 XEXP (SET_SRC (set
), 1)
2242 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2244 if ((cc_status
.value1
!= 0
2245 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2246 || (cc_status
.value2
!= 0
2247 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2249 /* Don't delete insn if it has an addressing side-effect. */
2250 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2251 /* or if anything in it is volatile. */
2252 && ! volatile_refs_p (PATTERN (insn
)))
2254 /* We don't really delete the insn; just ignore it. */
2255 last_ignored_compare
= insn
;
2264 /* Don't bother outputting obvious no-ops, even without -O.
2265 This optimization is fast and doesn't interfere with debugging.
2266 Don't do this if the insn is in a delay slot, since this
2267 will cause an improper number of delay insns to be written. */
2268 if (final_sequence
== 0
2270 && NONJUMP_INSN_P (insn
) && GET_CODE (body
) == SET
2271 && REG_P (SET_SRC (body
))
2272 && REG_P (SET_DEST (body
))
2273 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2278 /* If this is a conditional branch, maybe modify it
2279 if the cc's are in a nonstandard state
2280 so that it accomplishes the same thing that it would
2281 do straightforwardly if the cc's were set up normally. */
2283 if (cc_status
.flags
!= 0
2285 && GET_CODE (body
) == SET
2286 && SET_DEST (body
) == pc_rtx
2287 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2288 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2289 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2290 /* This is done during prescan; it is not done again
2291 in final scan when prescan has been done. */
2294 /* This function may alter the contents of its argument
2295 and clear some of the cc_status.flags bits.
2296 It may also return 1 meaning condition now always true
2297 or -1 meaning condition now always false
2298 or 2 meaning condition nontrivial but altered. */
2299 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2300 /* If condition now has fixed value, replace the IF_THEN_ELSE
2301 with its then-operand or its else-operand. */
2303 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2305 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2307 /* The jump is now either unconditional or a no-op.
2308 If it has become a no-op, don't try to output it.
2309 (It would not be recognized.) */
2310 if (SET_SRC (body
) == pc_rtx
)
2315 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2316 /* Replace (set (pc) (return)) with (return). */
2317 PATTERN (insn
) = body
= SET_SRC (body
);
2319 /* Rerecognize the instruction if it has changed. */
2321 INSN_CODE (insn
) = -1;
2324 /* Make same adjustments to instructions that examine the
2325 condition codes without jumping and instructions that
2326 handle conditional moves (if this machine has either one). */
2328 if (cc_status
.flags
!= 0
2331 rtx cond_rtx
, then_rtx
, else_rtx
;
2334 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2336 cond_rtx
= XEXP (SET_SRC (set
), 0);
2337 then_rtx
= XEXP (SET_SRC (set
), 1);
2338 else_rtx
= XEXP (SET_SRC (set
), 2);
2342 cond_rtx
= SET_SRC (set
);
2343 then_rtx
= const_true_rtx
;
2344 else_rtx
= const0_rtx
;
2347 switch (GET_CODE (cond_rtx
))
2361 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2363 result
= alter_cond (cond_rtx
);
2365 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2366 else if (result
== -1)
2367 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2368 else if (result
== 2)
2369 INSN_CODE (insn
) = -1;
2370 if (SET_DEST (set
) == SET_SRC (set
))
2382 #ifdef HAVE_peephole
2383 /* Do machine-specific peephole optimizations if desired. */
2385 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2387 rtx next
= peephole (insn
);
2388 /* When peepholing, if there were notes within the peephole,
2389 emit them before the peephole. */
2390 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2392 rtx note
, prev
= PREV_INSN (insn
);
2394 for (note
= NEXT_INSN (insn
); note
!= next
;
2395 note
= NEXT_INSN (note
))
2396 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
, seen
);
2398 /* In case this is prescan, put the notes
2399 in proper position for later rescan. */
2400 note
= NEXT_INSN (insn
);
2401 PREV_INSN (note
) = prev
;
2402 NEXT_INSN (prev
) = note
;
2403 NEXT_INSN (PREV_INSN (next
)) = insn
;
2404 PREV_INSN (insn
) = PREV_INSN (next
);
2405 NEXT_INSN (insn
) = next
;
2406 PREV_INSN (next
) = insn
;
2409 /* PEEPHOLE might have changed this. */
2410 body
= PATTERN (insn
);
2414 /* Try to recognize the instruction.
2415 If successful, verify that the operands satisfy the
2416 constraints for the instruction. Crash if they don't,
2417 since `reload' should have changed them so that they do. */
2419 insn_code_number
= recog_memoized (insn
);
2420 cleanup_subreg_operands (insn
);
2422 /* Dump the insn in the assembly for debugging. */
2423 if (flag_dump_rtl_in_asm
)
2425 print_rtx_head
= ASM_COMMENT_START
;
2426 print_rtl_single (asm_out_file
, insn
);
2427 print_rtx_head
= "";
2430 if (! constrain_operands_cached (1))
2431 fatal_insn_not_found (insn
);
2433 /* Some target machines need to prescan each insn before
2436 #ifdef FINAL_PRESCAN_INSN
2437 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2440 #ifdef HAVE_conditional_execution
2441 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2442 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2444 current_insn_predicate
= NULL_RTX
;
2448 cc_prev_status
= cc_status
;
2450 /* Update `cc_status' for this instruction.
2451 The instruction's output routine may change it further.
2452 If the output routine for a jump insn needs to depend
2453 on the cc status, it should look at cc_prev_status. */
2455 NOTICE_UPDATE_CC (body
, insn
);
2458 current_output_insn
= debug_insn
= insn
;
2460 #if defined (DWARF2_UNWIND_INFO)
2461 if (CALL_P (insn
) && dwarf2out_do_frame ())
2462 dwarf2out_frame_debug (insn
);
2465 /* Find the proper template for this insn. */
2466 template = get_insn_template (insn_code_number
, insn
);
2468 /* If the C code returns 0, it means that it is a jump insn
2469 which follows a deleted test insn, and that test insn
2470 needs to be reinserted. */
2475 gcc_assert (prev_nonnote_insn (insn
) == last_ignored_compare
);
2477 /* We have already processed the notes between the setter and
2478 the user. Make sure we don't process them again, this is
2479 particularly important if one of the notes is a block
2480 scope note or an EH note. */
2482 prev
!= last_ignored_compare
;
2483 prev
= PREV_INSN (prev
))
2486 delete_insn (prev
); /* Use delete_note. */
2492 /* If the template is the string "#", it means that this insn must
2494 if (template[0] == '#' && template[1] == '\0')
2496 rtx
new = try_split (body
, insn
, 0);
2498 /* If we didn't split the insn, go away. */
2499 if (new == insn
&& PATTERN (new) == body
)
2500 fatal_insn ("could not split insn", insn
);
2502 #ifdef HAVE_ATTR_length
2503 /* This instruction should have been split in shorten_branches,
2504 to ensure that we would have valid length info for the
2515 #ifdef TARGET_UNWIND_INFO
2516 /* ??? This will put the directives in the wrong place if
2517 get_insn_template outputs assembly directly. However calling it
2518 before get_insn_template breaks if the insns is split. */
2519 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2522 /* Output assembler code from the template. */
2523 output_asm_insn (template, recog_data
.operand
);
2525 /* If necessary, report the effect that the instruction has on
2526 the unwind info. We've already done this for delay slots
2527 and call instructions. */
2528 #if defined (DWARF2_UNWIND_INFO)
2529 if (NONJUMP_INSN_P (insn
)
2530 #if !defined (HAVE_prologue)
2531 && !ACCUMULATE_OUTGOING_ARGS
2533 && final_sequence
== 0
2534 && dwarf2out_do_frame ())
2535 dwarf2out_frame_debug (insn
);
2538 current_output_insn
= debug_insn
= 0;
2541 return NEXT_INSN (insn
);
2544 /* Output debugging info to the assembler file FILE
2545 based on the NOTE-insn INSN, assumed to be a line number. */
2548 notice_source_line (rtx insn
)
2550 const char *filename
= insn_file (insn
);
2551 int linenum
= insn_line (insn
);
2553 if (filename
&& (filename
!= last_filename
|| last_linenum
!= linenum
))
2555 last_filename
= filename
;
2556 last_linenum
= linenum
;
2557 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2558 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2564 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2565 directly to the desired hard register. */
2568 cleanup_subreg_operands (rtx insn
)
2571 extract_insn_cached (insn
);
2572 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2574 /* The following test cannot use recog_data.operand when testing
2575 for a SUBREG: the underlying object might have been changed
2576 already if we are inside a match_operator expression that
2577 matches the else clause. Instead we test the underlying
2578 expression directly. */
2579 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2580 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2581 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2582 || GET_CODE (recog_data
.operand
[i
]) == MULT
2583 || MEM_P (recog_data
.operand
[i
]))
2584 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2587 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2589 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2590 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2591 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2592 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2593 || MEM_P (*recog_data
.dup_loc
[i
]))
2594 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2598 /* If X is a SUBREG, replace it with a REG or a MEM,
2599 based on the thing it is a subreg of. */
2602 alter_subreg (rtx
*xp
)
2605 rtx y
= SUBREG_REG (x
);
2607 /* simplify_subreg does not remove subreg from volatile references.
2608 We are required to. */
2610 *xp
= adjust_address (y
, GET_MODE (x
), SUBREG_BYTE (x
));
2613 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2620 /* Simplify_subreg can't handle some REG cases, but we have to. */
2621 unsigned int regno
= subreg_hard_regno (x
, 1);
2623 gcc_assert (REG_P (y
));
2624 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2631 /* Do alter_subreg on all the SUBREGs contained in X. */
2634 walk_alter_subreg (rtx
*xp
)
2637 switch (GET_CODE (x
))
2642 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2643 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2648 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2652 return alter_subreg (xp
);
2663 /* Given BODY, the body of a jump instruction, alter the jump condition
2664 as required by the bits that are set in cc_status.flags.
2665 Not all of the bits there can be handled at this level in all cases.
2667 The value is normally 0.
2668 1 means that the condition has become always true.
2669 -1 means that the condition has become always false.
2670 2 means that COND has been altered. */
2673 alter_cond (rtx cond
)
2677 if (cc_status
.flags
& CC_REVERSED
)
2680 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2683 if (cc_status
.flags
& CC_INVERTED
)
2686 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2689 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2690 switch (GET_CODE (cond
))
2695 /* Jump becomes unconditional. */
2701 /* Jump becomes no-op. */
2705 PUT_CODE (cond
, EQ
);
2710 PUT_CODE (cond
, NE
);
2718 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2719 switch (GET_CODE (cond
))
2723 /* Jump becomes unconditional. */
2728 /* Jump becomes no-op. */
2733 PUT_CODE (cond
, EQ
);
2739 PUT_CODE (cond
, NE
);
2747 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2748 switch (GET_CODE (cond
))
2751 /* Jump becomes unconditional. */
2755 PUT_CODE (cond
, EQ
);
2760 PUT_CODE (cond
, NE
);
2765 /* Jump becomes no-op. */
2772 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2773 switch (GET_CODE (cond
))
2779 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2784 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2789 if (cc_status
.flags
& CC_NOT_SIGNED
)
2790 /* The flags are valid if signed condition operators are converted
2792 switch (GET_CODE (cond
))
2795 PUT_CODE (cond
, LEU
);
2800 PUT_CODE (cond
, LTU
);
2805 PUT_CODE (cond
, GTU
);
2810 PUT_CODE (cond
, GEU
);
2822 /* Report inconsistency between the assembler template and the operands.
2823 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2826 output_operand_lossage (const char *msgid
, ...)
2830 const char *pfx_str
;
2833 va_start (ap
, msgid
);
2835 pfx_str
= this_is_asm_operands
? _("invalid `asm': ") : "output_operand: ";
2836 asprintf (&fmt_string
, "%s%s", pfx_str
, _(msgid
));
2837 vasprintf (&new_message
, fmt_string
, ap
);
2839 if (this_is_asm_operands
)
2840 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2842 internal_error ("%s", new_message
);
2849 /* Output of assembler code from a template, and its subroutines. */
2851 /* Annotate the assembly with a comment describing the pattern and
2852 alternative used. */
2855 output_asm_name (void)
2859 int num
= INSN_CODE (debug_insn
);
2860 fprintf (asm_out_file
, "\t%s %d\t%s",
2861 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2862 insn_data
[num
].name
);
2863 if (insn_data
[num
].n_alternatives
> 1)
2864 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2865 #ifdef HAVE_ATTR_length
2866 fprintf (asm_out_file
, "\t[length = %d]",
2867 get_attr_length (debug_insn
));
2869 /* Clear this so only the first assembler insn
2870 of any rtl insn will get the special comment for -dp. */
2875 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2876 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2877 corresponds to the address of the object and 0 if to the object. */
2880 get_mem_expr_from_op (rtx op
, int *paddressp
)
2888 return REG_EXPR (op
);
2889 else if (!MEM_P (op
))
2892 if (MEM_EXPR (op
) != 0)
2893 return MEM_EXPR (op
);
2895 /* Otherwise we have an address, so indicate it and look at the address. */
2899 /* First check if we have a decl for the address, then look at the right side
2900 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2901 But don't allow the address to itself be indirect. */
2902 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2904 else if (GET_CODE (op
) == PLUS
2905 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2908 while (GET_RTX_CLASS (GET_CODE (op
)) == RTX_UNARY
2909 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
2912 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2913 return inner_addressp
? 0 : expr
;
2916 /* Output operand names for assembler instructions. OPERANDS is the
2917 operand vector, OPORDER is the order to write the operands, and NOPS
2918 is the number of operands to write. */
2921 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
2926 for (i
= 0; i
< nops
; i
++)
2929 rtx op
= operands
[oporder
[i
]];
2930 tree expr
= get_mem_expr_from_op (op
, &addressp
);
2932 fprintf (asm_out_file
, "%c%s",
2933 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
2937 fprintf (asm_out_file
, "%s",
2938 addressp
? "*" : "");
2939 print_mem_expr (asm_out_file
, expr
);
2942 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
2943 && ORIGINAL_REGNO (op
) != REGNO (op
))
2944 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
2948 /* Output text from TEMPLATE to the assembler output file,
2949 obeying %-directions to substitute operands taken from
2950 the vector OPERANDS.
2952 %N (for N a digit) means print operand N in usual manner.
2953 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2954 and print the label name with no punctuation.
2955 %cN means require operand N to be a constant
2956 and print the constant expression with no punctuation.
2957 %aN means expect operand N to be a memory address
2958 (not a memory reference!) and print a reference
2960 %nN means expect operand N to be a constant
2961 and print a constant expression for minus the value
2962 of the operand, with no other punctuation. */
2965 output_asm_insn (const char *template, rtx
*operands
)
2969 #ifdef ASSEMBLER_DIALECT
2972 int oporder
[MAX_RECOG_OPERANDS
];
2973 char opoutput
[MAX_RECOG_OPERANDS
];
2976 /* An insn may return a null string template
2977 in a case where no assembler code is needed. */
2981 memset (opoutput
, 0, sizeof opoutput
);
2983 putc ('\t', asm_out_file
);
2985 #ifdef ASM_OUTPUT_OPCODE
2986 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2993 if (flag_verbose_asm
)
2994 output_asm_operand_names (operands
, oporder
, ops
);
2995 if (flag_print_asm_name
)
2999 memset (opoutput
, 0, sizeof opoutput
);
3001 putc (c
, asm_out_file
);
3002 #ifdef ASM_OUTPUT_OPCODE
3003 while ((c
= *p
) == '\t')
3005 putc (c
, asm_out_file
);
3008 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3012 #ifdef ASSEMBLER_DIALECT
3018 output_operand_lossage ("nested assembly dialect alternatives");
3022 /* If we want the first dialect, do nothing. Otherwise, skip
3023 DIALECT_NUMBER of strings ending with '|'. */
3024 for (i
= 0; i
< dialect_number
; i
++)
3026 while (*p
&& *p
!= '}' && *p
++ != '|')
3035 output_operand_lossage ("unterminated assembly dialect alternative");
3042 /* Skip to close brace. */
3047 output_operand_lossage ("unterminated assembly dialect alternative");
3051 while (*p
++ != '}');
3055 putc (c
, asm_out_file
);
3060 putc (c
, asm_out_file
);
3066 /* %% outputs a single %. */
3070 putc (c
, asm_out_file
);
3072 /* %= outputs a number which is unique to each insn in the entire
3073 compilation. This is useful for making local labels that are
3074 referred to more than once in a given insn. */
3078 fprintf (asm_out_file
, "%d", insn_counter
);
3080 /* % followed by a letter and some digits
3081 outputs an operand in a special way depending on the letter.
3082 Letters `acln' are implemented directly.
3083 Other letters are passed to `output_operand' so that
3084 the PRINT_OPERAND macro can define them. */
3085 else if (ISALPHA (*p
))
3088 unsigned long opnum
;
3091 opnum
= strtoul (p
, &endptr
, 10);
3094 output_operand_lossage ("operand number missing "
3096 else if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3097 output_operand_lossage ("operand number out of range");
3098 else if (letter
== 'l')
3099 output_asm_label (operands
[opnum
]);
3100 else if (letter
== 'a')
3101 output_address (operands
[opnum
]);
3102 else if (letter
== 'c')
3104 if (CONSTANT_ADDRESS_P (operands
[opnum
]))
3105 output_addr_const (asm_out_file
, operands
[opnum
]);
3107 output_operand (operands
[opnum
], 'c');
3109 else if (letter
== 'n')
3111 if (GET_CODE (operands
[opnum
]) == CONST_INT
)
3112 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3113 - INTVAL (operands
[opnum
]));
3116 putc ('-', asm_out_file
);
3117 output_addr_const (asm_out_file
, operands
[opnum
]);
3121 output_operand (operands
[opnum
], letter
);
3123 if (!opoutput
[opnum
])
3124 oporder
[ops
++] = opnum
;
3125 opoutput
[opnum
] = 1;
3130 /* % followed by a digit outputs an operand the default way. */
3131 else if (ISDIGIT (*p
))
3133 unsigned long opnum
;
3136 opnum
= strtoul (p
, &endptr
, 10);
3137 if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3138 output_operand_lossage ("operand number out of range");
3140 output_operand (operands
[opnum
], 0);
3142 if (!opoutput
[opnum
])
3143 oporder
[ops
++] = opnum
;
3144 opoutput
[opnum
] = 1;
3149 /* % followed by punctuation: output something for that
3150 punctuation character alone, with no operand.
3151 The PRINT_OPERAND macro decides what is actually done. */
3152 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3153 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3154 output_operand (NULL_RTX
, *p
++);
3157 output_operand_lossage ("invalid %%-code");
3161 putc (c
, asm_out_file
);
3164 /* Write out the variable names for operands, if we know them. */
3165 if (flag_verbose_asm
)
3166 output_asm_operand_names (operands
, oporder
, ops
);
3167 if (flag_print_asm_name
)
3170 putc ('\n', asm_out_file
);
3173 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3176 output_asm_label (rtx x
)
3180 if (GET_CODE (x
) == LABEL_REF
)
3184 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3185 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3187 output_operand_lossage ("`%%l' operand isn't a label");
3189 assemble_name (asm_out_file
, buf
);
3192 /* Print operand X using machine-dependent assembler syntax.
3193 The macro PRINT_OPERAND is defined just to control this function.
3194 CODE is a non-digit that preceded the operand-number in the % spec,
3195 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3196 between the % and the digits.
3197 When CODE is a non-letter, X is 0.
3199 The meanings of the letters are machine-dependent and controlled
3200 by PRINT_OPERAND. */
3203 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3205 if (x
&& GET_CODE (x
) == SUBREG
)
3206 x
= alter_subreg (&x
);
3208 /* If X is a pseudo-register, abort now rather than writing trash to the
3210 gcc_assert (!x
|| !REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
);
3212 PRINT_OPERAND (asm_out_file
, x
, code
);
3215 /* Print a memory reference operand for address X
3216 using machine-dependent assembler syntax.
3217 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3220 output_address (rtx x
)
3222 walk_alter_subreg (&x
);
3223 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3226 /* Print an integer constant expression in assembler syntax.
3227 Addition and subtraction are the only arithmetic
3228 that may appear in these expressions. */
3231 output_addr_const (FILE *file
, rtx x
)
3236 switch (GET_CODE (x
))
3243 if (SYMBOL_REF_DECL (x
))
3244 mark_decl_referenced (SYMBOL_REF_DECL (x
));
3245 #ifdef ASM_OUTPUT_SYMBOL_REF
3246 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3248 assemble_name (file
, XSTR (x
, 0));
3256 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3257 #ifdef ASM_OUTPUT_LABEL_REF
3258 ASM_OUTPUT_LABEL_REF (file
, buf
);
3260 assemble_name (file
, buf
);
3265 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3269 /* This used to output parentheses around the expression,
3270 but that does not work on the 386 (either ATT or BSD assembler). */
3271 output_addr_const (file
, XEXP (x
, 0));
3275 if (GET_MODE (x
) == VOIDmode
)
3277 /* We can use %d if the number is one word and positive. */
3278 if (CONST_DOUBLE_HIGH (x
))
3279 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3280 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3281 else if (CONST_DOUBLE_LOW (x
) < 0)
3282 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3284 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3287 /* We can't handle floating point constants;
3288 PRINT_OPERAND must handle them. */
3289 output_operand_lossage ("floating constant misused");
3293 /* Some assemblers need integer constants to appear last (eg masm). */
3294 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3296 output_addr_const (file
, XEXP (x
, 1));
3297 if (INTVAL (XEXP (x
, 0)) >= 0)
3298 fprintf (file
, "+");
3299 output_addr_const (file
, XEXP (x
, 0));
3303 output_addr_const (file
, XEXP (x
, 0));
3304 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3305 || INTVAL (XEXP (x
, 1)) >= 0)
3306 fprintf (file
, "+");
3307 output_addr_const (file
, XEXP (x
, 1));
3312 /* Avoid outputting things like x-x or x+5-x,
3313 since some assemblers can't handle that. */
3314 x
= simplify_subtraction (x
);
3315 if (GET_CODE (x
) != MINUS
)
3318 output_addr_const (file
, XEXP (x
, 0));
3319 fprintf (file
, "-");
3320 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3321 || GET_CODE (XEXP (x
, 1)) == PC
3322 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3323 output_addr_const (file
, XEXP (x
, 1));
3326 fputs (targetm
.asm_out
.open_paren
, file
);
3327 output_addr_const (file
, XEXP (x
, 1));
3328 fputs (targetm
.asm_out
.close_paren
, file
);
3335 output_addr_const (file
, XEXP (x
, 0));
3339 #ifdef OUTPUT_ADDR_CONST_EXTRA
3340 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3345 output_operand_lossage ("invalid expression as operand");
3349 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3350 %R prints the value of REGISTER_PREFIX.
3351 %L prints the value of LOCAL_LABEL_PREFIX.
3352 %U prints the value of USER_LABEL_PREFIX.
3353 %I prints the value of IMMEDIATE_PREFIX.
3354 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3355 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3357 We handle alternate assembler dialects here, just like output_asm_insn. */
3360 asm_fprintf (FILE *file
, const char *p
, ...)
3366 va_start (argptr
, p
);
3373 #ifdef ASSEMBLER_DIALECT
3378 /* If we want the first dialect, do nothing. Otherwise, skip
3379 DIALECT_NUMBER of strings ending with '|'. */
3380 for (i
= 0; i
< dialect_number
; i
++)
3382 while (*p
&& *p
++ != '|')
3392 /* Skip to close brace. */
3393 while (*p
&& *p
++ != '}')
3404 while (strchr ("-+ #0", c
))
3409 while (ISDIGIT (c
) || c
== '.')
3420 case 'd': case 'i': case 'u':
3421 case 'x': case 'X': case 'o':
3425 fprintf (file
, buf
, va_arg (argptr
, int));
3429 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3430 'o' cases, but we do not check for those cases. It
3431 means that the value is a HOST_WIDE_INT, which may be
3432 either `long' or `long long'. */
3433 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3434 q
+= strlen (HOST_WIDE_INT_PRINT
);
3437 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3442 #ifdef HAVE_LONG_LONG
3448 fprintf (file
, buf
, va_arg (argptr
, long long));
3455 fprintf (file
, buf
, va_arg (argptr
, long));
3463 fprintf (file
, buf
, va_arg (argptr
, char *));
3467 #ifdef ASM_OUTPUT_OPCODE
3468 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3473 #ifdef REGISTER_PREFIX
3474 fprintf (file
, "%s", REGISTER_PREFIX
);
3479 #ifdef IMMEDIATE_PREFIX
3480 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3485 #ifdef LOCAL_LABEL_PREFIX
3486 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3491 fputs (user_label_prefix
, file
);
3494 #ifdef ASM_FPRINTF_EXTENSIONS
3495 /* Uppercase letters are reserved for general use by asm_fprintf
3496 and so are not available to target specific code. In order to
3497 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3498 they are defined here. As they get turned into real extensions
3499 to asm_fprintf they should be removed from this list. */
3500 case 'A': case 'B': case 'C': case 'D': case 'E':
3501 case 'F': case 'G': case 'H': case 'J': case 'K':
3502 case 'M': case 'N': case 'P': case 'Q': case 'S':
3503 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3506 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3519 /* Split up a CONST_DOUBLE or integer constant rtx
3520 into two rtx's for single words,
3521 storing in *FIRST the word that comes first in memory in the target
3522 and in *SECOND the other. */
3525 split_double (rtx value
, rtx
*first
, rtx
*second
)
3527 if (GET_CODE (value
) == CONST_INT
)
3529 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3531 /* In this case the CONST_INT holds both target words.
3532 Extract the bits from it into two word-sized pieces.
3533 Sign extend each half to HOST_WIDE_INT. */
3534 unsigned HOST_WIDE_INT low
, high
;
3535 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3537 /* Set sign_bit to the most significant bit of a word. */
3539 sign_bit
<<= BITS_PER_WORD
- 1;
3541 /* Set mask so that all bits of the word are set. We could
3542 have used 1 << BITS_PER_WORD instead of basing the
3543 calculation on sign_bit. However, on machines where
3544 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3545 compiler warning, even though the code would never be
3547 mask
= sign_bit
<< 1;
3550 /* Set sign_extend as any remaining bits. */
3551 sign_extend
= ~mask
;
3553 /* Pick the lower word and sign-extend it. */
3554 low
= INTVAL (value
);
3559 /* Pick the higher word, shifted to the least significant
3560 bits, and sign-extend it. */
3561 high
= INTVAL (value
);
3562 high
>>= BITS_PER_WORD
- 1;
3565 if (high
& sign_bit
)
3566 high
|= sign_extend
;
3568 /* Store the words in the target machine order. */
3569 if (WORDS_BIG_ENDIAN
)
3571 *first
= GEN_INT (high
);
3572 *second
= GEN_INT (low
);
3576 *first
= GEN_INT (low
);
3577 *second
= GEN_INT (high
);
3582 /* The rule for using CONST_INT for a wider mode
3583 is that we regard the value as signed.
3584 So sign-extend it. */
3585 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3586 if (WORDS_BIG_ENDIAN
)
3598 else if (GET_CODE (value
) != CONST_DOUBLE
)
3600 if (WORDS_BIG_ENDIAN
)
3602 *first
= const0_rtx
;
3608 *second
= const0_rtx
;
3611 else if (GET_MODE (value
) == VOIDmode
3612 /* This is the old way we did CONST_DOUBLE integers. */
3613 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3615 /* In an integer, the words are defined as most and least significant.
3616 So order them by the target's convention. */
3617 if (WORDS_BIG_ENDIAN
)
3619 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3620 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3624 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3625 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3632 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3634 /* Note, this converts the REAL_VALUE_TYPE to the target's
3635 format, splits up the floating point double and outputs
3636 exactly 32 bits of it into each of l[0] and l[1] --
3637 not necessarily BITS_PER_WORD bits. */
3638 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3640 /* If 32 bits is an entire word for the target, but not for the host,
3641 then sign-extend on the host so that the number will look the same
3642 way on the host that it would on the target. See for instance
3643 simplify_unary_operation. The #if is needed to avoid compiler
3646 #if HOST_BITS_PER_LONG > 32
3647 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3649 if (l
[0] & ((long) 1 << 31))
3650 l
[0] |= ((long) (-1) << 32);
3651 if (l
[1] & ((long) 1 << 31))
3652 l
[1] |= ((long) (-1) << 32);
3656 *first
= GEN_INT (l
[0]);
3657 *second
= GEN_INT (l
[1]);
3661 /* Return nonzero if this function has no function calls. */
3664 leaf_function_p (void)
3669 if (current_function_profile
|| profile_arc_flag
)
3672 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3675 && ! SIBLING_CALL_P (insn
))
3677 if (NONJUMP_INSN_P (insn
)
3678 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3679 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3680 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3683 for (link
= current_function_epilogue_delay_list
;
3685 link
= XEXP (link
, 1))
3687 insn
= XEXP (link
, 0);
3690 && ! SIBLING_CALL_P (insn
))
3692 if (NONJUMP_INSN_P (insn
)
3693 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3694 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3695 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3702 /* Return 1 if branch is a forward branch.
3703 Uses insn_shuid array, so it works only in the final pass. May be used by
3704 output templates to customary add branch prediction hints.
3707 final_forward_branch_p (rtx insn
)
3709 int insn_id
, label_id
;
3711 gcc_assert (uid_shuid
);
3712 insn_id
= INSN_SHUID (insn
);
3713 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3714 /* We've hit some insns that does not have id information available. */
3715 gcc_assert (insn_id
&& label_id
);
3716 return insn_id
< label_id
;
3719 /* On some machines, a function with no call insns
3720 can run faster if it doesn't create its own register window.
3721 When output, the leaf function should use only the "output"
3722 registers. Ordinarily, the function would be compiled to use
3723 the "input" registers to find its arguments; it is a candidate
3724 for leaf treatment if it uses only the "input" registers.
3725 Leaf function treatment means renumbering so the function
3726 uses the "output" registers instead. */
3728 #ifdef LEAF_REGISTERS
3730 /* Return 1 if this function uses only the registers that can be
3731 safely renumbered. */
3734 only_leaf_regs_used (void)
3737 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3739 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3740 if ((regs_ever_live
[i
] || global_regs
[i
])
3741 && ! permitted_reg_in_leaf_functions
[i
])
3744 if (current_function_uses_pic_offset_table
3745 && pic_offset_table_rtx
!= 0
3746 && REG_P (pic_offset_table_rtx
)
3747 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3753 /* Scan all instructions and renumber all registers into those
3754 available in leaf functions. */
3757 leaf_renumber_regs (rtx first
)
3761 /* Renumber only the actual patterns.
3762 The reg-notes can contain frame pointer refs,
3763 and renumbering them could crash, and should not be needed. */
3764 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3766 leaf_renumber_regs_insn (PATTERN (insn
));
3767 for (insn
= current_function_epilogue_delay_list
;
3769 insn
= XEXP (insn
, 1))
3770 if (INSN_P (XEXP (insn
, 0)))
3771 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3774 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3775 available in leaf functions. */
3778 leaf_renumber_regs_insn (rtx in_rtx
)
3781 const char *format_ptr
;
3786 /* Renumber all input-registers into output-registers.
3787 renumbered_regs would be 1 for an output-register;
3794 /* Don't renumber the same reg twice. */
3798 newreg
= REGNO (in_rtx
);
3799 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3800 to reach here as part of a REG_NOTE. */
3801 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3806 newreg
= LEAF_REG_REMAP (newreg
);
3807 gcc_assert (newreg
>= 0);
3808 regs_ever_live
[REGNO (in_rtx
)] = 0;
3809 regs_ever_live
[newreg
] = 1;
3810 REGNO (in_rtx
) = newreg
;
3814 if (INSN_P (in_rtx
))
3816 /* Inside a SEQUENCE, we find insns.
3817 Renumber just the patterns of these insns,
3818 just as we do for the top-level insns. */
3819 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3823 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3825 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3826 switch (*format_ptr
++)
3829 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3833 if (NULL
!= XVEC (in_rtx
, i
))
3835 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3836 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3856 /* When -gused is used, emit debug info for only used symbols. But in
3857 addition to the standard intercepted debug_hooks there are some direct
3858 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3859 Those routines may also be called from a higher level intercepted routine. So
3860 to prevent recording data for an inner call to one of these for an intercept,
3861 we maintain an intercept nesting counter (debug_nesting). We only save the
3862 intercepted arguments if the nesting is 1. */
3863 int debug_nesting
= 0;
3865 static tree
*symbol_queue
;
3866 int symbol_queue_index
= 0;
3867 static int symbol_queue_size
= 0;
3869 /* Generate the symbols for any queued up type symbols we encountered
3870 while generating the type info for some originally used symbol.
3871 This might generate additional entries in the queue. Only when
3872 the nesting depth goes to 0 is this routine called. */
3875 debug_flush_symbol_queue (void)
3879 /* Make sure that additionally queued items are not flushed
3884 for (i
= 0; i
< symbol_queue_index
; ++i
)
3886 /* If we pushed queued symbols then such symbols are must be
3887 output no matter what anyone else says. Specifically,
3888 we need to make sure dbxout_symbol() thinks the symbol was
3889 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3890 which may be set for outside reasons. */
3891 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3892 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3893 TREE_USED (symbol_queue
[i
]) = 1;
3894 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3896 #ifdef DBX_DEBUGGING_INFO
3897 dbxout_symbol (symbol_queue
[i
], 0);
3900 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3901 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3904 symbol_queue_index
= 0;
3908 /* Queue a type symbol needed as part of the definition of a decl
3909 symbol. These symbols are generated when debug_flush_symbol_queue()
3913 debug_queue_symbol (tree decl
)
3915 if (symbol_queue_index
>= symbol_queue_size
)
3917 symbol_queue_size
+= 10;
3918 symbol_queue
= xrealloc (symbol_queue
,
3919 symbol_queue_size
* sizeof (tree
));
3922 symbol_queue
[symbol_queue_index
++] = decl
;
3925 /* Free symbol queue. */
3927 debug_free_queue (void)
3931 free (symbol_queue
);
3932 symbol_queue
= NULL
;
3933 symbol_queue_size
= 0;