Split out parts of scompare_loc_descriptor and emit_store_flag
[official-gcc.git] / gcc / caller-save.c
blob27da129ab9ca328ff01b8bc362924847adf83e77
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "backend.h"
24 #include "rtl.h"
25 #include "tree.h"
26 #include "predict.h"
27 #include "df.h"
28 #include "memmodel.h"
29 #include "tm_p.h"
30 #include "insn-config.h"
31 #include "regs.h"
32 #include "emit-rtl.h"
33 #include "recog.h"
34 #include "reload.h"
35 #include "alias.h"
36 #include "addresses.h"
37 #include "dumpfile.h"
38 #include "rtl-iter.h"
40 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
42 #define regno_save_mode \
43 (this_target_reload->x_regno_save_mode)
44 #define cached_reg_save_code \
45 (this_target_reload->x_cached_reg_save_code)
46 #define cached_reg_restore_code \
47 (this_target_reload->x_cached_reg_restore_code)
49 /* For each hard register, a place on the stack where it can be saved,
50 if needed. */
52 static rtx
53 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
55 /* The number of elements in the subsequent array. */
56 static int save_slots_num;
58 /* Allocated slots so far. */
59 static rtx save_slots[FIRST_PSEUDO_REGISTER];
61 /* Set of hard regs currently residing in save area (during insn scan). */
63 static HARD_REG_SET hard_regs_saved;
65 /* Number of registers currently in hard_regs_saved. */
67 static int n_regs_saved;
69 /* Computed by mark_referenced_regs, all regs referenced in a given
70 insn. */
71 static HARD_REG_SET referenced_regs;
74 typedef void refmarker_fn (rtx *loc, machine_mode mode, int hardregno,
75 void *mark_arg);
77 static int reg_save_code (int, machine_mode);
78 static int reg_restore_code (int, machine_mode);
80 struct saved_hard_reg;
81 static void initiate_saved_hard_regs (void);
82 static void new_saved_hard_reg (int, int);
83 static void finish_saved_hard_regs (void);
84 static int saved_hard_reg_compare_func (const void *, const void *);
86 static void mark_set_regs (rtx, const_rtx, void *);
87 static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg);
88 static refmarker_fn mark_reg_as_referenced;
89 static refmarker_fn replace_reg_with_saved_mem;
90 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
91 machine_mode *);
92 static int insert_restore (struct insn_chain *, int, int, int,
93 machine_mode *);
94 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
95 rtx);
96 static void add_stored_regs (rtx, const_rtx, void *);
100 static GTY(()) rtx savepat;
101 static GTY(()) rtx restpat;
102 static GTY(()) rtx test_reg;
103 static GTY(()) rtx test_mem;
104 static GTY(()) rtx_insn *saveinsn;
105 static GTY(()) rtx_insn *restinsn;
107 /* Return the INSN_CODE used to save register REG in mode MODE. */
108 static int
109 reg_save_code (int reg, machine_mode mode)
111 bool ok;
112 if (cached_reg_save_code[reg][mode])
113 return cached_reg_save_code[reg][mode];
114 if (!HARD_REGNO_MODE_OK (reg, mode))
116 /* Depending on how HARD_REGNO_MODE_OK is defined, range propagation
117 might deduce here that reg >= FIRST_PSEUDO_REGISTER. So the assert
118 below silences a warning. */
119 gcc_assert (reg < FIRST_PSEUDO_REGISTER);
120 cached_reg_save_code[reg][mode] = -1;
121 cached_reg_restore_code[reg][mode] = -1;
122 return -1;
125 /* Update the register number and modes of the register
126 and memory operand. */
127 set_mode_and_regno (test_reg, mode, reg);
128 PUT_MODE (test_mem, mode);
130 /* Force re-recognition of the modified insns. */
131 INSN_CODE (saveinsn) = -1;
132 INSN_CODE (restinsn) = -1;
134 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
135 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
137 /* Now extract both insns and see if we can meet their
138 constraints. We don't know here whether the save and restore will
139 be in size- or speed-tuned code, so just use the set of enabled
140 alternatives. */
141 ok = (cached_reg_save_code[reg][mode] != -1
142 && cached_reg_restore_code[reg][mode] != -1);
143 if (ok)
145 extract_insn (saveinsn);
146 ok = constrain_operands (1, get_enabled_alternatives (saveinsn));
147 extract_insn (restinsn);
148 ok &= constrain_operands (1, get_enabled_alternatives (restinsn));
151 if (! ok)
153 cached_reg_save_code[reg][mode] = -1;
154 cached_reg_restore_code[reg][mode] = -1;
156 gcc_assert (cached_reg_save_code[reg][mode]);
157 return cached_reg_save_code[reg][mode];
160 /* Return the INSN_CODE used to restore register REG in mode MODE. */
161 static int
162 reg_restore_code (int reg, machine_mode mode)
164 if (cached_reg_restore_code[reg][mode])
165 return cached_reg_restore_code[reg][mode];
166 /* Populate our cache. */
167 reg_save_code (reg, mode);
168 return cached_reg_restore_code[reg][mode];
171 /* Initialize for caller-save.
173 Look at all the hard registers that are used by a call and for which
174 reginfo.c has not already excluded from being used across a call.
176 Ensure that we can find a mode to save the register and that there is a
177 simple insn to save and restore the register. This latter check avoids
178 problems that would occur if we tried to save the MQ register of some
179 machines directly into memory. */
181 void
182 init_caller_save (void)
184 rtx addr_reg;
185 int offset;
186 rtx address;
187 int i, j;
189 if (caller_save_initialized_p)
190 return;
192 caller_save_initialized_p = true;
194 CLEAR_HARD_REG_SET (no_caller_save_reg_set);
195 /* First find all the registers that we need to deal with and all
196 the modes that they can have. If we can't find a mode to use,
197 we can't have the register live over calls. */
199 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
201 if (call_used_regs[i]
202 && !TEST_HARD_REG_BIT (call_fixed_reg_set, i))
204 for (j = 1; j <= MOVE_MAX_WORDS; j++)
206 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
207 VOIDmode);
208 if (regno_save_mode[i][j] == VOIDmode && j == 1)
210 SET_HARD_REG_BIT (call_fixed_reg_set, i);
214 else
215 regno_save_mode[i][1] = VOIDmode;
218 /* The following code tries to approximate the conditions under which
219 we can easily save and restore a register without scratch registers or
220 other complexities. It will usually work, except under conditions where
221 the validity of an insn operand is dependent on the address offset.
222 No such cases are currently known.
224 We first find a typical offset from some BASE_REG_CLASS register.
225 This address is chosen by finding the first register in the class
226 and by finding the smallest power of two that is a valid offset from
227 that register in every mode we will use to save registers. */
229 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
230 if (TEST_HARD_REG_BIT
231 (reg_class_contents
232 [(int) base_reg_class (regno_save_mode[i][1], ADDR_SPACE_GENERIC,
233 PLUS, CONST_INT)], i))
234 break;
236 gcc_assert (i < FIRST_PSEUDO_REGISTER);
238 addr_reg = gen_rtx_REG (Pmode, i);
240 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
242 address = gen_rtx_PLUS (Pmode, addr_reg, gen_int_mode (offset, Pmode));
244 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
245 if (regno_save_mode[i][1] != VOIDmode
246 && ! strict_memory_address_p (regno_save_mode[i][1], address))
247 break;
249 if (i == FIRST_PSEUDO_REGISTER)
250 break;
253 /* If we didn't find a valid address, we must use register indirect. */
254 if (offset == 0)
255 address = addr_reg;
257 /* Next we try to form an insn to save and restore the register. We
258 see if such an insn is recognized and meets its constraints.
260 To avoid lots of unnecessary RTL allocation, we construct all the RTL
261 once, then modify the memory and register operands in-place. */
263 test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
264 test_mem = gen_rtx_MEM (word_mode, address);
265 savepat = gen_rtx_SET (test_mem, test_reg);
266 restpat = gen_rtx_SET (test_reg, test_mem);
268 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, savepat, 0, -1, 0);
269 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, restpat, 0, -1, 0);
271 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
272 for (j = 1; j <= MOVE_MAX_WORDS; j++)
273 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
275 regno_save_mode[i][j] = VOIDmode;
276 if (j == 1)
278 SET_HARD_REG_BIT (call_fixed_reg_set, i);
279 if (call_used_regs[i])
280 SET_HARD_REG_BIT (no_caller_save_reg_set, i);
287 /* Initialize save areas by showing that we haven't allocated any yet. */
289 void
290 init_save_areas (void)
292 int i, j;
294 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
295 for (j = 1; j <= MOVE_MAX_WORDS; j++)
296 regno_save_mem[i][j] = 0;
297 save_slots_num = 0;
301 /* The structure represents a hard register which should be saved
302 through the call. It is used when the integrated register
303 allocator (IRA) is used and sharing save slots is on. */
304 struct saved_hard_reg
306 /* Order number starting with 0. */
307 int num;
308 /* The hard regno. */
309 int hard_regno;
310 /* Execution frequency of all calls through which given hard
311 register should be saved. */
312 int call_freq;
313 /* Stack slot reserved to save the hard register through calls. */
314 rtx slot;
315 /* True if it is first hard register in the chain of hard registers
316 sharing the same stack slot. */
317 int first_p;
318 /* Order number of the next hard register structure with the same
319 slot in the chain. -1 represents end of the chain. */
320 int next;
323 /* Map: hard register number to the corresponding structure. */
324 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER];
326 /* The number of all structures representing hard registers should be
327 saved, in order words, the number of used elements in the following
328 array. */
329 static int saved_regs_num;
331 /* Pointers to all the structures. Index is the order number of the
332 corresponding structure. */
333 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER];
335 /* First called function for work with saved hard registers. */
336 static void
337 initiate_saved_hard_regs (void)
339 int i;
341 saved_regs_num = 0;
342 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
343 hard_reg_map[i] = NULL;
346 /* Allocate and return new saved hard register with given REGNO and
347 CALL_FREQ. */
348 static void
349 new_saved_hard_reg (int regno, int call_freq)
351 struct saved_hard_reg *saved_reg;
353 saved_reg
354 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg));
355 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg;
356 saved_reg->num = saved_regs_num++;
357 saved_reg->hard_regno = regno;
358 saved_reg->call_freq = call_freq;
359 saved_reg->first_p = FALSE;
360 saved_reg->next = -1;
363 /* Free memory allocated for the saved hard registers. */
364 static void
365 finish_saved_hard_regs (void)
367 int i;
369 for (i = 0; i < saved_regs_num; i++)
370 free (all_saved_regs[i]);
373 /* The function is used to sort the saved hard register structures
374 according their frequency. */
375 static int
376 saved_hard_reg_compare_func (const void *v1p, const void *v2p)
378 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p;
379 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p;
381 if (flag_omit_frame_pointer)
383 if (p1->call_freq - p2->call_freq != 0)
384 return p1->call_freq - p2->call_freq;
386 else if (p2->call_freq - p1->call_freq != 0)
387 return p2->call_freq - p1->call_freq;
389 return p1->num - p2->num;
392 /* Allocate save areas for any hard registers that might need saving.
393 We take a conservative approach here and look for call-clobbered hard
394 registers that are assigned to pseudos that cross calls. This may
395 overestimate slightly (especially if some of these registers are later
396 used as spill registers), but it should not be significant.
398 For IRA we use priority coloring to decrease stack slots needed for
399 saving hard registers through calls. We build conflicts for them
400 to do coloring.
402 Future work:
404 In the fallback case we should iterate backwards across all possible
405 modes for the save, choosing the largest available one instead of
406 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
408 We do not try to use "move multiple" instructions that exist
409 on some machines (such as the 68k moveml). It could be a win to try
410 and use them when possible. The hard part is doing it in a way that is
411 machine independent since they might be saving non-consecutive
412 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
414 void
415 setup_save_areas (void)
417 int i, j, k, freq;
418 HARD_REG_SET hard_regs_used;
419 struct saved_hard_reg *saved_reg;
420 rtx_insn *insn;
421 struct insn_chain *chain, *next;
422 unsigned int regno;
423 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
424 reg_set_iterator rsi;
426 CLEAR_HARD_REG_SET (hard_regs_used);
428 /* Find every CALL_INSN and record which hard regs are live across the
429 call into HARD_REG_MAP and HARD_REGS_USED. */
430 initiate_saved_hard_regs ();
431 /* Create hard reg saved regs. */
432 for (chain = reload_insn_chain; chain != 0; chain = next)
434 rtx cheap;
436 insn = chain->insn;
437 next = chain->next;
438 if (!CALL_P (insn)
439 || find_reg_note (insn, REG_NORETURN, NULL))
440 continue;
441 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
442 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
443 &chain->live_throughout);
444 get_call_reg_set_usage (insn, &used_regs, call_used_reg_set);
446 /* Record all registers set in this call insn. These don't
447 need to be saved. N.B. the call insn might set a subreg
448 of a multi-hard-reg pseudo; then the pseudo is considered
449 live during the call, but the subreg that is set
450 isn't. */
451 CLEAR_HARD_REG_SET (this_insn_sets);
452 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
453 /* Sibcalls are considered to set the return value. */
454 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
455 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
457 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
458 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
459 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
460 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
461 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
463 if (hard_reg_map[regno] != NULL)
464 hard_reg_map[regno]->call_freq += freq;
465 else
466 new_saved_hard_reg (regno, freq);
467 SET_HARD_REG_BIT (hard_regs_used, regno);
469 cheap = find_reg_note (insn, REG_RETURNED, NULL);
470 if (cheap)
471 cheap = XEXP (cheap, 0);
472 /* Look through all live pseudos, mark their hard registers. */
473 EXECUTE_IF_SET_IN_REG_SET
474 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
476 int r = reg_renumber[regno];
477 int bound;
479 if (r < 0 || regno_reg_rtx[regno] == cheap)
480 continue;
482 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
483 for (; r < bound; r++)
484 if (TEST_HARD_REG_BIT (used_regs, r))
486 if (hard_reg_map[r] != NULL)
487 hard_reg_map[r]->call_freq += freq;
488 else
489 new_saved_hard_reg (r, freq);
490 SET_HARD_REG_BIT (hard_regs_to_save, r);
491 SET_HARD_REG_BIT (hard_regs_used, r);
496 /* If requested, figure out which hard regs can share save slots. */
497 if (optimize && flag_ira_share_save_slots)
499 rtx slot;
500 char *saved_reg_conflicts;
501 int next_k;
502 struct saved_hard_reg *saved_reg2, *saved_reg3;
503 int call_saved_regs_num;
504 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];
505 int best_slot_num;
506 int prev_save_slots_num;
507 rtx prev_save_slots[FIRST_PSEUDO_REGISTER];
509 /* Find saved hard register conflicts. */
510 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);
511 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);
512 for (chain = reload_insn_chain; chain != 0; chain = next)
514 rtx cheap;
515 call_saved_regs_num = 0;
516 insn = chain->insn;
517 next = chain->next;
518 if (!CALL_P (insn)
519 || find_reg_note (insn, REG_NORETURN, NULL))
520 continue;
522 cheap = find_reg_note (insn, REG_RETURNED, NULL);
523 if (cheap)
524 cheap = XEXP (cheap, 0);
526 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
527 &chain->live_throughout);
528 get_call_reg_set_usage (insn, &used_regs, call_used_reg_set);
530 /* Record all registers set in this call insn. These don't
531 need to be saved. N.B. the call insn might set a subreg
532 of a multi-hard-reg pseudo; then the pseudo is considered
533 live during the call, but the subreg that is set
534 isn't. */
535 CLEAR_HARD_REG_SET (this_insn_sets);
536 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
537 /* Sibcalls are considered to set the return value,
538 compare df-scan.c:df_get_call_refs. */
539 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
540 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
542 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
543 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
544 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
545 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
546 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
548 gcc_assert (hard_reg_map[regno] != NULL);
549 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno];
551 /* Look through all live pseudos, mark their hard registers. */
552 EXECUTE_IF_SET_IN_REG_SET
553 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
555 int r = reg_renumber[regno];
556 int bound;
558 if (r < 0 || regno_reg_rtx[regno] == cheap)
559 continue;
561 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
562 for (; r < bound; r++)
563 if (TEST_HARD_REG_BIT (used_regs, r))
564 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r];
566 for (i = 0; i < call_saved_regs_num; i++)
568 saved_reg = call_saved_regs[i];
569 for (j = 0; j < call_saved_regs_num; j++)
570 if (i != j)
572 saved_reg2 = call_saved_regs[j];
573 saved_reg_conflicts[saved_reg->num * saved_regs_num
574 + saved_reg2->num]
575 = saved_reg_conflicts[saved_reg2->num * saved_regs_num
576 + saved_reg->num]
577 = TRUE;
581 /* Sort saved hard regs. */
582 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *),
583 saved_hard_reg_compare_func);
584 /* Initiate slots available from the previous reload
585 iteration. */
586 prev_save_slots_num = save_slots_num;
587 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx));
588 save_slots_num = 0;
589 /* Allocate stack slots for the saved hard registers. */
590 for (i = 0; i < saved_regs_num; i++)
592 saved_reg = all_saved_regs[i];
593 regno = saved_reg->hard_regno;
594 for (j = 0; j < i; j++)
596 saved_reg2 = all_saved_regs[j];
597 if (! saved_reg2->first_p)
598 continue;
599 slot = saved_reg2->slot;
600 for (k = j; k >= 0; k = next_k)
602 saved_reg3 = all_saved_regs[k];
603 next_k = saved_reg3->next;
604 if (saved_reg_conflicts[saved_reg->num * saved_regs_num
605 + saved_reg3->num])
606 break;
608 if (k < 0
609 && (GET_MODE_SIZE (regno_save_mode[regno][1])
610 <= GET_MODE_SIZE (regno_save_mode
611 [saved_reg2->hard_regno][1])))
613 saved_reg->slot
614 = adjust_address_nv
615 (slot, regno_save_mode[saved_reg->hard_regno][1], 0);
616 regno_save_mem[regno][1] = saved_reg->slot;
617 saved_reg->next = saved_reg2->next;
618 saved_reg2->next = i;
619 if (dump_file != NULL)
620 fprintf (dump_file, "%d uses slot of %d\n",
621 regno, saved_reg2->hard_regno);
622 break;
625 if (j == i)
627 saved_reg->first_p = TRUE;
628 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++)
630 slot = prev_save_slots[j];
631 if (slot == NULL_RTX)
632 continue;
633 if (GET_MODE_SIZE (regno_save_mode[regno][1])
634 <= GET_MODE_SIZE (GET_MODE (slot))
635 && best_slot_num < 0)
636 best_slot_num = j;
637 if (GET_MODE (slot) == regno_save_mode[regno][1])
638 break;
640 if (best_slot_num >= 0)
642 saved_reg->slot = prev_save_slots[best_slot_num];
643 saved_reg->slot
644 = adjust_address_nv
645 (saved_reg->slot,
646 regno_save_mode[saved_reg->hard_regno][1], 0);
647 if (dump_file != NULL)
648 fprintf (dump_file,
649 "%d uses a slot from prev iteration\n", regno);
650 prev_save_slots[best_slot_num] = NULL_RTX;
651 if (best_slot_num + 1 == prev_save_slots_num)
652 prev_save_slots_num--;
654 else
656 saved_reg->slot
657 = assign_stack_local_1
658 (regno_save_mode[regno][1],
659 GET_MODE_SIZE (regno_save_mode[regno][1]), 0,
660 ASLK_REDUCE_ALIGN);
661 if (dump_file != NULL)
662 fprintf (dump_file, "%d uses a new slot\n", regno);
664 regno_save_mem[regno][1] = saved_reg->slot;
665 save_slots[save_slots_num++] = saved_reg->slot;
668 free (saved_reg_conflicts);
669 finish_saved_hard_regs ();
671 else
673 /* We are not sharing slots.
675 Run through all the call-used hard-registers and allocate
676 space for each in the caller-save area. Try to allocate space
677 in a manner which allows multi-register saves/restores to be done. */
679 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
680 for (j = MOVE_MAX_WORDS; j > 0; j--)
682 int do_save = 1;
684 /* If no mode exists for this size, try another. Also break out
685 if we have already saved this hard register. */
686 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
687 continue;
689 /* See if any register in this group has been saved. */
690 for (k = 0; k < j; k++)
691 if (regno_save_mem[i + k][1])
693 do_save = 0;
694 break;
696 if (! do_save)
697 continue;
699 for (k = 0; k < j; k++)
700 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
702 do_save = 0;
703 break;
705 if (! do_save)
706 continue;
708 /* We have found an acceptable mode to store in. Since
709 hard register is always saved in the widest mode
710 available, the mode may be wider than necessary, it is
711 OK to reduce the alignment of spill space. We will
712 verify that it is equal to or greater than required
713 when we restore and save the hard register in
714 insert_restore and insert_save. */
715 regno_save_mem[i][j]
716 = assign_stack_local_1 (regno_save_mode[i][j],
717 GET_MODE_SIZE (regno_save_mode[i][j]),
718 0, ASLK_REDUCE_ALIGN);
720 /* Setup single word save area just in case... */
721 for (k = 0; k < j; k++)
722 /* This should not depend on WORDS_BIG_ENDIAN.
723 The order of words in regs is the same as in memory. */
724 regno_save_mem[i + k][1]
725 = adjust_address_nv (regno_save_mem[i][j],
726 regno_save_mode[i + k][1],
727 k * UNITS_PER_WORD);
731 /* Now loop again and set the alias set of any save areas we made to
732 the alias set used to represent frame objects. */
733 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
734 for (j = MOVE_MAX_WORDS; j > 0; j--)
735 if (regno_save_mem[i][j] != 0)
736 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
741 /* Find the places where hard regs are live across calls and save them. */
743 void
744 save_call_clobbered_regs (void)
746 struct insn_chain *chain, *next, *last = NULL;
747 machine_mode save_mode [FIRST_PSEUDO_REGISTER];
749 /* Computed in mark_set_regs, holds all registers set by the current
750 instruction. */
751 HARD_REG_SET this_insn_sets;
753 CLEAR_HARD_REG_SET (hard_regs_saved);
754 n_regs_saved = 0;
756 for (chain = reload_insn_chain; chain != 0; chain = next)
758 rtx_insn *insn = chain->insn;
759 enum rtx_code code = GET_CODE (insn);
761 next = chain->next;
763 gcc_assert (!chain->is_caller_save_insn);
765 if (NONDEBUG_INSN_P (insn))
767 /* If some registers have been saved, see if INSN references
768 any of them. We must restore them before the insn if so. */
770 if (n_regs_saved)
772 int regno;
773 HARD_REG_SET this_insn_sets;
775 if (code == JUMP_INSN)
776 /* Restore all registers if this is a JUMP_INSN. */
777 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
778 else
780 CLEAR_HARD_REG_SET (referenced_regs);
781 mark_referenced_regs (&PATTERN (insn),
782 mark_reg_as_referenced, NULL);
783 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
786 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
787 if (TEST_HARD_REG_BIT (referenced_regs, regno))
788 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS,
789 save_mode);
790 /* If a saved register is set after the call, this means we no
791 longer should restore it. This can happen when parts of a
792 multi-word pseudo do not conflict with other pseudos, so
793 IRA may allocate the same hard register for both. One may
794 be live across the call, while the other is set
795 afterwards. */
796 CLEAR_HARD_REG_SET (this_insn_sets);
797 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
798 AND_COMPL_HARD_REG_SET (hard_regs_saved, this_insn_sets);
801 if (code == CALL_INSN
802 && ! SIBLING_CALL_P (insn)
803 && ! find_reg_note (insn, REG_NORETURN, NULL))
805 unsigned regno;
806 HARD_REG_SET hard_regs_to_save;
807 HARD_REG_SET call_def_reg_set;
808 reg_set_iterator rsi;
809 rtx cheap;
811 cheap = find_reg_note (insn, REG_RETURNED, NULL);
812 if (cheap)
813 cheap = XEXP (cheap, 0);
815 /* Use the register life information in CHAIN to compute which
816 regs are live during the call. */
817 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
818 &chain->live_throughout);
819 /* Save hard registers always in the widest mode available. */
820 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
821 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
822 save_mode [regno] = regno_save_mode [regno][1];
823 else
824 save_mode [regno] = VOIDmode;
826 /* Look through all live pseudos, mark their hard registers
827 and choose proper mode for saving. */
828 EXECUTE_IF_SET_IN_REG_SET
829 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
831 int r = reg_renumber[regno];
832 int nregs;
833 machine_mode mode;
835 if (r < 0 || regno_reg_rtx[regno] == cheap)
836 continue;
837 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
838 mode = HARD_REGNO_CALLER_SAVE_MODE
839 (r, nregs, PSEUDO_REGNO_MODE (regno));
840 if (GET_MODE_BITSIZE (mode)
841 > GET_MODE_BITSIZE (save_mode[r]))
842 save_mode[r] = mode;
843 while (nregs-- > 0)
844 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
847 /* Record all registers set in this call insn. These don't need
848 to be saved. N.B. the call insn might set a subreg of a
849 multi-hard-reg pseudo; then the pseudo is considered live
850 during the call, but the subreg that is set isn't. */
851 CLEAR_HARD_REG_SET (this_insn_sets);
852 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
854 /* Compute which hard regs must be saved before this call. */
855 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
856 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
857 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
858 get_call_reg_set_usage (insn, &call_def_reg_set,
859 call_used_reg_set);
860 AND_HARD_REG_SET (hard_regs_to_save, call_def_reg_set);
862 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
863 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
864 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
866 /* Must recompute n_regs_saved. */
867 n_regs_saved = 0;
868 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
869 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
870 n_regs_saved++;
872 if (cheap
873 && HARD_REGISTER_P (cheap)
874 && TEST_HARD_REG_BIT (call_used_reg_set, REGNO (cheap)))
876 rtx dest, newpat;
877 rtx pat = PATTERN (insn);
878 if (GET_CODE (pat) == PARALLEL)
879 pat = XVECEXP (pat, 0, 0);
880 dest = SET_DEST (pat);
881 /* For multiple return values dest is PARALLEL.
882 Currently we handle only single return value case. */
883 if (REG_P (dest))
885 newpat = gen_rtx_SET (cheap, copy_rtx (dest));
886 chain = insert_one_insn (chain, 0, -1, newpat);
890 last = chain;
892 else if (DEBUG_INSN_P (insn) && n_regs_saved)
893 mark_referenced_regs (&PATTERN (insn),
894 replace_reg_with_saved_mem,
895 save_mode);
897 if (chain->next == 0 || chain->next->block != chain->block)
899 int regno;
900 /* At the end of the basic block, we must restore any registers that
901 remain saved. If the last insn in the block is a JUMP_INSN, put
902 the restore before the insn, otherwise, put it after the insn. */
904 if (n_regs_saved
905 && DEBUG_INSN_P (insn)
906 && last
907 && last->block == chain->block)
909 rtx_insn *ins, *prev;
910 basic_block bb = BLOCK_FOR_INSN (insn);
912 /* When adding hard reg restores after a DEBUG_INSN, move
913 all notes between last real insn and this DEBUG_INSN after
914 the DEBUG_INSN, otherwise we could get code
915 -g/-g0 differences. */
916 for (ins = PREV_INSN (insn); ins != last->insn; ins = prev)
918 prev = PREV_INSN (ins);
919 if (NOTE_P (ins))
921 SET_NEXT_INSN (prev) = NEXT_INSN (ins);
922 SET_PREV_INSN (NEXT_INSN (ins)) = prev;
923 SET_PREV_INSN (ins) = insn;
924 SET_NEXT_INSN (ins) = NEXT_INSN (insn);
925 SET_NEXT_INSN (insn) = ins;
926 if (NEXT_INSN (ins))
927 SET_PREV_INSN (NEXT_INSN (ins)) = ins;
928 if (BB_END (bb) == insn)
929 BB_END (bb) = ins;
931 else
932 gcc_assert (DEBUG_INSN_P (ins));
935 last = NULL;
937 if (n_regs_saved)
938 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
939 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
940 regno += insert_restore (chain, JUMP_P (insn),
941 regno, MOVE_MAX_WORDS, save_mode);
946 /* Here from note_stores, or directly from save_call_clobbered_regs, when
947 an insn stores a value in a register.
948 Set the proper bit or bits in this_insn_sets. All pseudos that have
949 been assigned hard regs have had their register number changed already,
950 so we can ignore pseudos. */
951 static void
952 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data)
954 int regno, endregno, i;
955 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data;
957 if (GET_CODE (reg) == SUBREG)
959 rtx inner = SUBREG_REG (reg);
960 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
961 return;
962 regno = subreg_regno (reg);
963 endregno = regno + subreg_nregs (reg);
965 else if (REG_P (reg)
966 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
968 regno = REGNO (reg);
969 endregno = END_REGNO (reg);
971 else
972 return;
974 for (i = regno; i < endregno; i++)
975 SET_HARD_REG_BIT (*this_insn_sets, i);
978 /* Here from note_stores when an insn stores a value in a register.
979 Set the proper bit or bits in the passed regset. All pseudos that have
980 been assigned hard regs have had their register number changed already,
981 so we can ignore pseudos. */
982 static void
983 add_stored_regs (rtx reg, const_rtx setter, void *data)
985 int regno, endregno, i;
986 machine_mode mode = GET_MODE (reg);
987 int offset = 0;
989 if (GET_CODE (setter) == CLOBBER)
990 return;
992 if (GET_CODE (reg) == SUBREG
993 && REG_P (SUBREG_REG (reg))
994 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
996 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
997 GET_MODE (SUBREG_REG (reg)),
998 SUBREG_BYTE (reg),
999 GET_MODE (reg));
1000 regno = REGNO (SUBREG_REG (reg)) + offset;
1001 endregno = regno + subreg_nregs (reg);
1003 else
1005 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
1006 return;
1008 regno = REGNO (reg) + offset;
1009 endregno = end_hard_regno (mode, regno);
1012 for (i = regno; i < endregno; i++)
1013 SET_REGNO_REG_SET ((regset) data, i);
1016 /* Walk X and record all referenced registers in REFERENCED_REGS. */
1017 static void
1018 mark_referenced_regs (rtx *loc, refmarker_fn *mark, void *arg)
1020 enum rtx_code code = GET_CODE (*loc);
1021 const char *fmt;
1022 int i, j;
1024 if (code == SET)
1025 mark_referenced_regs (&SET_SRC (*loc), mark, arg);
1026 if (code == SET || code == CLOBBER)
1028 loc = &SET_DEST (*loc);
1029 code = GET_CODE (*loc);
1030 if ((code == REG && REGNO (*loc) < FIRST_PSEUDO_REGISTER)
1031 || code == PC || code == CC0
1032 || (code == SUBREG && REG_P (SUBREG_REG (*loc))
1033 && REGNO (SUBREG_REG (*loc)) < FIRST_PSEUDO_REGISTER
1034 /* If we're setting only part of a multi-word register,
1035 we shall mark it as referenced, because the words
1036 that are not being set should be restored. */
1037 && ((GET_MODE_SIZE (GET_MODE (*loc))
1038 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc))))
1039 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc)))
1040 <= UNITS_PER_WORD))))
1041 return;
1043 if (code == MEM || code == SUBREG)
1045 loc = &XEXP (*loc, 0);
1046 code = GET_CODE (*loc);
1049 if (code == REG)
1051 int regno = REGNO (*loc);
1052 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
1053 : reg_renumber[regno]);
1055 if (hardregno >= 0)
1056 mark (loc, GET_MODE (*loc), hardregno, arg);
1057 else if (arg)
1058 /* ??? Will we ever end up with an equiv expression in a debug
1059 insn, that would have required restoring a reg, or will
1060 reload take care of it for us? */
1061 return;
1062 /* If this is a pseudo that did not get a hard register, scan its
1063 memory location, since it might involve the use of another
1064 register, which might be saved. */
1065 else if (reg_equiv_mem (regno) != 0)
1066 mark_referenced_regs (&XEXP (reg_equiv_mem (regno), 0), mark, arg);
1067 else if (reg_equiv_address (regno) != 0)
1068 mark_referenced_regs (&reg_equiv_address (regno), mark, arg);
1069 return;
1072 fmt = GET_RTX_FORMAT (code);
1073 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1075 if (fmt[i] == 'e')
1076 mark_referenced_regs (&XEXP (*loc, i), mark, arg);
1077 else if (fmt[i] == 'E')
1078 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--)
1079 mark_referenced_regs (&XVECEXP (*loc, i, j), mark, arg);
1083 /* Parameter function for mark_referenced_regs() that adds registers
1084 present in the insn and in equivalent mems and addresses to
1085 referenced_regs. */
1087 static void
1088 mark_reg_as_referenced (rtx *loc ATTRIBUTE_UNUSED,
1089 machine_mode mode,
1090 int hardregno,
1091 void *arg ATTRIBUTE_UNUSED)
1093 add_to_hard_reg_set (&referenced_regs, mode, hardregno);
1096 /* Parameter function for mark_referenced_regs() that replaces
1097 registers referenced in a debug_insn that would have been restored,
1098 should it be a non-debug_insn, with their save locations. */
1100 static void
1101 replace_reg_with_saved_mem (rtx *loc,
1102 machine_mode mode,
1103 int regno,
1104 void *arg)
1106 unsigned int i, nregs = hard_regno_nregs [regno][mode];
1107 rtx mem;
1108 machine_mode *save_mode = (machine_mode *)arg;
1110 for (i = 0; i < nregs; i++)
1111 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1112 break;
1114 /* If none of the registers in the range would need restoring, we're
1115 all set. */
1116 if (i == nregs)
1117 return;
1119 while (++i < nregs)
1120 if (!TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1121 break;
1123 if (i == nregs
1124 && regno_save_mem[regno][nregs])
1126 mem = copy_rtx (regno_save_mem[regno][nregs]);
1128 if (nregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]])
1129 mem = adjust_address_nv (mem, save_mode[regno], 0);
1131 if (GET_MODE (mem) != mode)
1133 /* This is gen_lowpart_if_possible(), but without validating
1134 the newly-formed address. */
1135 int offset = 0;
1137 if (WORDS_BIG_ENDIAN)
1138 offset = (MAX (GET_MODE_SIZE (GET_MODE (mem)), UNITS_PER_WORD)
1139 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1140 if (BYTES_BIG_ENDIAN)
1141 /* Adjust the address so that the address-after-the-data is
1142 unchanged. */
1143 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1144 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (mem))));
1146 mem = adjust_address_nv (mem, mode, offset);
1149 else
1151 mem = gen_rtx_CONCATN (mode, rtvec_alloc (nregs));
1152 for (i = 0; i < nregs; i++)
1153 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1155 gcc_assert (regno_save_mem[regno + i][1]);
1156 XVECEXP (mem, 0, i) = copy_rtx (regno_save_mem[regno + i][1]);
1158 else
1160 machine_mode smode = save_mode[regno];
1161 gcc_assert (smode != VOIDmode);
1162 if (hard_regno_nregs [regno][smode] > 1)
1163 smode = mode_for_size (GET_MODE_SIZE (mode) / nregs,
1164 GET_MODE_CLASS (mode), 0);
1165 XVECEXP (mem, 0, i) = gen_rtx_REG (smode, regno + i);
1169 gcc_assert (GET_MODE (mem) == mode);
1170 *loc = mem;
1174 /* Insert a sequence of insns to restore. Place these insns in front of
1175 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1176 the maximum number of registers which should be restored during this call.
1177 It should never be less than 1 since we only work with entire registers.
1179 Note that we have verified in init_caller_save that we can do this
1180 with a simple SET, so use it. Set INSN_CODE to what we save there
1181 since the address might not be valid so the insn might not be recognized.
1182 These insns will be reloaded and have register elimination done by
1183 find_reload, so we need not worry about that here.
1185 Return the extra number of registers saved. */
1187 static int
1188 insert_restore (struct insn_chain *chain, int before_p, int regno,
1189 int maxrestore, machine_mode *save_mode)
1191 int i, k;
1192 rtx pat = NULL_RTX;
1193 int code;
1194 unsigned int numregs = 0;
1195 struct insn_chain *new_chain;
1196 rtx mem;
1198 /* A common failure mode if register status is not correct in the
1199 RTL is for this routine to be called with a REGNO we didn't
1200 expect to save. That will cause us to write an insn with a (nil)
1201 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1202 later, check for this common case here instead. This will remove
1203 one step in debugging such problems. */
1204 gcc_assert (regno_save_mem[regno][1]);
1206 /* Get the pattern to emit and update our status.
1208 See if we can restore `maxrestore' registers at once. Work
1209 backwards to the single register case. */
1210 for (i = maxrestore; i > 0; i--)
1212 int j;
1213 int ok = 1;
1215 if (regno_save_mem[regno][i] == 0)
1216 continue;
1218 for (j = 0; j < i; j++)
1219 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
1221 ok = 0;
1222 break;
1224 /* Must do this one restore at a time. */
1225 if (! ok)
1226 continue;
1228 numregs = i;
1229 break;
1232 mem = regno_save_mem [regno][numregs];
1233 if (save_mode [regno] != VOIDmode
1234 && save_mode [regno] != GET_MODE (mem)
1235 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1236 /* Check that insn to restore REGNO in save_mode[regno] is
1237 correct. */
1238 && reg_save_code (regno, save_mode[regno]) >= 0)
1239 mem = adjust_address_nv (mem, save_mode[regno], 0);
1240 else
1241 mem = copy_rtx (mem);
1243 /* Verify that the alignment of spill space is equal to or greater
1244 than required. */
1245 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1246 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1248 pat = gen_rtx_SET (gen_rtx_REG (GET_MODE (mem), regno), mem);
1249 code = reg_restore_code (regno, GET_MODE (mem));
1250 new_chain = insert_one_insn (chain, before_p, code, pat);
1252 /* Clear status for all registers we restored. */
1253 for (k = 0; k < i; k++)
1255 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
1256 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1257 n_regs_saved--;
1260 /* Tell our callers how many extra registers we saved/restored. */
1261 return numregs - 1;
1264 /* Like insert_restore above, but save registers instead. */
1266 static int
1267 insert_save (struct insn_chain *chain, int before_p, int regno,
1268 HARD_REG_SET (*to_save), machine_mode *save_mode)
1270 int i;
1271 unsigned int k;
1272 rtx pat = NULL_RTX;
1273 int code;
1274 unsigned int numregs = 0;
1275 struct insn_chain *new_chain;
1276 rtx mem;
1278 /* A common failure mode if register status is not correct in the
1279 RTL is for this routine to be called with a REGNO we didn't
1280 expect to save. That will cause us to write an insn with a (nil)
1281 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1282 later, check for this common case here. This will remove one
1283 step in debugging such problems. */
1284 gcc_assert (regno_save_mem[regno][1]);
1286 /* Get the pattern to emit and update our status.
1288 See if we can save several registers with a single instruction.
1289 Work backwards to the single register case. */
1290 for (i = MOVE_MAX_WORDS; i > 0; i--)
1292 int j;
1293 int ok = 1;
1294 if (regno_save_mem[regno][i] == 0)
1295 continue;
1297 for (j = 0; j < i; j++)
1298 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
1300 ok = 0;
1301 break;
1303 /* Must do this one save at a time. */
1304 if (! ok)
1305 continue;
1307 numregs = i;
1308 break;
1311 mem = regno_save_mem [regno][numregs];
1312 if (save_mode [regno] != VOIDmode
1313 && save_mode [regno] != GET_MODE (mem)
1314 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1315 /* Check that insn to save REGNO in save_mode[regno] is
1316 correct. */
1317 && reg_save_code (regno, save_mode[regno]) >= 0)
1318 mem = adjust_address_nv (mem, save_mode[regno], 0);
1319 else
1320 mem = copy_rtx (mem);
1322 /* Verify that the alignment of spill space is equal to or greater
1323 than required. */
1324 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1325 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1327 pat = gen_rtx_SET (mem, gen_rtx_REG (GET_MODE (mem), regno));
1328 code = reg_save_code (regno, GET_MODE (mem));
1329 new_chain = insert_one_insn (chain, before_p, code, pat);
1331 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1332 for (k = 0; k < numregs; k++)
1334 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
1335 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1336 n_regs_saved++;
1339 /* Tell our callers how many extra registers we saved/restored. */
1340 return numregs - 1;
1343 /* A note_uses callback used by insert_one_insn. Add the hard-register
1344 equivalent of each REG to regset DATA. */
1346 static void
1347 add_used_regs (rtx *loc, void *data)
1349 subrtx_iterator::array_type array;
1350 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST)
1352 const_rtx x = *iter;
1353 if (REG_P (x))
1355 unsigned int regno = REGNO (x);
1356 if (HARD_REGISTER_NUM_P (regno))
1357 bitmap_set_range ((regset) data, regno,
1358 hard_regno_nregs[regno][GET_MODE (x)]);
1359 else
1360 gcc_checking_assert (reg_renumber[regno] < 0);
1365 /* Emit a new caller-save insn and set the code. */
1366 static struct insn_chain *
1367 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
1369 rtx_insn *insn = chain->insn;
1370 struct insn_chain *new_chain;
1372 /* If INSN references CC0, put our insns in front of the insn that sets
1373 CC0. This is always safe, since the only way we could be passed an
1374 insn that references CC0 is for a restore, and doing a restore earlier
1375 isn't a problem. We do, however, assume here that CALL_INSNs don't
1376 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1378 if (HAVE_cc0 && (NONJUMP_INSN_P (insn) || JUMP_P (insn))
1379 && before_p
1380 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
1381 chain = chain->prev, insn = chain->insn;
1383 new_chain = new_insn_chain ();
1384 if (before_p)
1386 rtx link;
1388 new_chain->prev = chain->prev;
1389 if (new_chain->prev != 0)
1390 new_chain->prev->next = new_chain;
1391 else
1392 reload_insn_chain = new_chain;
1394 chain->prev = new_chain;
1395 new_chain->next = chain;
1396 new_chain->insn = emit_insn_before (pat, insn);
1397 /* ??? It would be nice if we could exclude the already / still saved
1398 registers from the live sets. */
1399 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1400 note_uses (&PATTERN (chain->insn), add_used_regs,
1401 &new_chain->live_throughout);
1402 /* If CHAIN->INSN is a call, then the registers which contain
1403 the arguments to the function are live in the new insn. */
1404 if (CALL_P (chain->insn))
1405 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn);
1406 link != NULL_RTX;
1407 link = XEXP (link, 1))
1408 note_uses (&XEXP (link, 0), add_used_regs,
1409 &new_chain->live_throughout);
1411 CLEAR_REG_SET (&new_chain->dead_or_set);
1412 if (chain->insn == BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
1413 BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
1415 else
1417 new_chain->next = chain->next;
1418 if (new_chain->next != 0)
1419 new_chain->next->prev = new_chain;
1420 chain->next = new_chain;
1421 new_chain->prev = chain;
1422 new_chain->insn = emit_insn_after (pat, insn);
1423 /* ??? It would be nice if we could exclude the already / still saved
1424 registers from the live sets, and observe REG_UNUSED notes. */
1425 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1426 /* Registers that are set in CHAIN->INSN live in the new insn.
1427 (Unless there is a REG_UNUSED note for them, but we don't
1428 look for them here.) */
1429 note_stores (PATTERN (chain->insn), add_stored_regs,
1430 &new_chain->live_throughout);
1431 CLEAR_REG_SET (&new_chain->dead_or_set);
1432 if (chain->insn == BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
1433 BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
1435 new_chain->block = chain->block;
1436 new_chain->is_caller_save_insn = 1;
1438 INSN_CODE (new_chain->insn) = code;
1439 return new_chain;
1441 #include "gt-caller-save.h"