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[official-gcc.git] / gcc / cse.c
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1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "rtl.h"
25 #include "tm_p.h"
26 #include "hard-reg-set.h"
27 #include "regs.h"
28 #include "predict.h"
29 #include "vec.h"
30 #include "hashtab.h"
31 #include "hash-set.h"
32 #include "machmode.h"
33 #include "input.h"
34 #include "function.h"
35 #include "dominance.h"
36 #include "cfg.h"
37 #include "cfgrtl.h"
38 #include "cfganal.h"
39 #include "cfgcleanup.h"
40 #include "basic-block.h"
41 #include "flags.h"
42 #include "insn-config.h"
43 #include "recog.h"
44 #include "expr.h"
45 #include "diagnostic-core.h"
46 #include "toplev.h"
47 #include "ggc.h"
48 #include "except.h"
49 #include "target.h"
50 #include "params.h"
51 #include "rtlhooks-def.h"
52 #include "tree-pass.h"
53 #include "df.h"
54 #include "dbgcnt.h"
55 #include "rtl-iter.h"
57 /* The basic idea of common subexpression elimination is to go
58 through the code, keeping a record of expressions that would
59 have the same value at the current scan point, and replacing
60 expressions encountered with the cheapest equivalent expression.
62 It is too complicated to keep track of the different possibilities
63 when control paths merge in this code; so, at each label, we forget all
64 that is known and start fresh. This can be described as processing each
65 extended basic block separately. We have a separate pass to perform
66 global CSE.
68 Note CSE can turn a conditional or computed jump into a nop or
69 an unconditional jump. When this occurs we arrange to run the jump
70 optimizer after CSE to delete the unreachable code.
72 We use two data structures to record the equivalent expressions:
73 a hash table for most expressions, and a vector of "quantity
74 numbers" to record equivalent (pseudo) registers.
76 The use of the special data structure for registers is desirable
77 because it is faster. It is possible because registers references
78 contain a fairly small number, the register number, taken from
79 a contiguously allocated series, and two register references are
80 identical if they have the same number. General expressions
81 do not have any such thing, so the only way to retrieve the
82 information recorded on an expression other than a register
83 is to keep it in a hash table.
85 Registers and "quantity numbers":
87 At the start of each basic block, all of the (hardware and pseudo)
88 registers used in the function are given distinct quantity
89 numbers to indicate their contents. During scan, when the code
90 copies one register into another, we copy the quantity number.
91 When a register is loaded in any other way, we allocate a new
92 quantity number to describe the value generated by this operation.
93 `REG_QTY (N)' records what quantity register N is currently thought
94 of as containing.
96 All real quantity numbers are greater than or equal to zero.
97 If register N has not been assigned a quantity, `REG_QTY (N)' will
98 equal -N - 1, which is always negative.
100 Quantity numbers below zero do not exist and none of the `qty_table'
101 entries should be referenced with a negative index.
103 We also maintain a bidirectional chain of registers for each
104 quantity number. The `qty_table` members `first_reg' and `last_reg',
105 and `reg_eqv_table' members `next' and `prev' hold these chains.
107 The first register in a chain is the one whose lifespan is least local.
108 Among equals, it is the one that was seen first.
109 We replace any equivalent register with that one.
111 If two registers have the same quantity number, it must be true that
112 REG expressions with qty_table `mode' must be in the hash table for both
113 registers and must be in the same class.
115 The converse is not true. Since hard registers may be referenced in
116 any mode, two REG expressions might be equivalent in the hash table
117 but not have the same quantity number if the quantity number of one
118 of the registers is not the same mode as those expressions.
120 Constants and quantity numbers
122 When a quantity has a known constant value, that value is stored
123 in the appropriate qty_table `const_rtx'. This is in addition to
124 putting the constant in the hash table as is usual for non-regs.
126 Whether a reg or a constant is preferred is determined by the configuration
127 macro CONST_COSTS and will often depend on the constant value. In any
128 event, expressions containing constants can be simplified, by fold_rtx.
130 When a quantity has a known nearly constant value (such as an address
131 of a stack slot), that value is stored in the appropriate qty_table
132 `const_rtx'.
134 Integer constants don't have a machine mode. However, cse
135 determines the intended machine mode from the destination
136 of the instruction that moves the constant. The machine mode
137 is recorded in the hash table along with the actual RTL
138 constant expression so that different modes are kept separate.
140 Other expressions:
142 To record known equivalences among expressions in general
143 we use a hash table called `table'. It has a fixed number of buckets
144 that contain chains of `struct table_elt' elements for expressions.
145 These chains connect the elements whose expressions have the same
146 hash codes.
148 Other chains through the same elements connect the elements which
149 currently have equivalent values.
151 Register references in an expression are canonicalized before hashing
152 the expression. This is done using `reg_qty' and qty_table `first_reg'.
153 The hash code of a register reference is computed using the quantity
154 number, not the register number.
156 When the value of an expression changes, it is necessary to remove from the
157 hash table not just that expression but all expressions whose values
158 could be different as a result.
160 1. If the value changing is in memory, except in special cases
161 ANYTHING referring to memory could be changed. That is because
162 nobody knows where a pointer does not point.
163 The function `invalidate_memory' removes what is necessary.
165 The special cases are when the address is constant or is
166 a constant plus a fixed register such as the frame pointer
167 or a static chain pointer. When such addresses are stored in,
168 we can tell exactly which other such addresses must be invalidated
169 due to overlap. `invalidate' does this.
170 All expressions that refer to non-constant
171 memory addresses are also invalidated. `invalidate_memory' does this.
173 2. If the value changing is a register, all expressions
174 containing references to that register, and only those,
175 must be removed.
177 Because searching the entire hash table for expressions that contain
178 a register is very slow, we try to figure out when it isn't necessary.
179 Precisely, this is necessary only when expressions have been
180 entered in the hash table using this register, and then the value has
181 changed, and then another expression wants to be added to refer to
182 the register's new value. This sequence of circumstances is rare
183 within any one basic block.
185 `REG_TICK' and `REG_IN_TABLE', accessors for members of
186 cse_reg_info, are used to detect this case. REG_TICK (i) is
187 incremented whenever a value is stored in register i.
188 REG_IN_TABLE (i) holds -1 if no references to register i have been
189 entered in the table; otherwise, it contains the value REG_TICK (i)
190 had when the references were entered. If we want to enter a
191 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
192 remove old references. Until we want to enter a new entry, the
193 mere fact that the two vectors don't match makes the entries be
194 ignored if anyone tries to match them.
196 Registers themselves are entered in the hash table as well as in
197 the equivalent-register chains. However, `REG_TICK' and
198 `REG_IN_TABLE' do not apply to expressions which are simple
199 register references. These expressions are removed from the table
200 immediately when they become invalid, and this can be done even if
201 we do not immediately search for all the expressions that refer to
202 the register.
204 A CLOBBER rtx in an instruction invalidates its operand for further
205 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
206 invalidates everything that resides in memory.
208 Related expressions:
210 Constant expressions that differ only by an additive integer
211 are called related. When a constant expression is put in
212 the table, the related expression with no constant term
213 is also entered. These are made to point at each other
214 so that it is possible to find out if there exists any
215 register equivalent to an expression related to a given expression. */
217 /* Length of qty_table vector. We know in advance we will not need
218 a quantity number this big. */
220 static int max_qty;
222 /* Next quantity number to be allocated.
223 This is 1 + the largest number needed so far. */
225 static int next_qty;
227 /* Per-qty information tracking.
229 `first_reg' and `last_reg' track the head and tail of the
230 chain of registers which currently contain this quantity.
232 `mode' contains the machine mode of this quantity.
234 `const_rtx' holds the rtx of the constant value of this
235 quantity, if known. A summations of the frame/arg pointer
236 and a constant can also be entered here. When this holds
237 a known value, `const_insn' is the insn which stored the
238 constant value.
240 `comparison_{code,const,qty}' are used to track when a
241 comparison between a quantity and some constant or register has
242 been passed. In such a case, we know the results of the comparison
243 in case we see it again. These members record a comparison that
244 is known to be true. `comparison_code' holds the rtx code of such
245 a comparison, else it is set to UNKNOWN and the other two
246 comparison members are undefined. `comparison_const' holds
247 the constant being compared against, or zero if the comparison
248 is not against a constant. `comparison_qty' holds the quantity
249 being compared against when the result is known. If the comparison
250 is not with a register, `comparison_qty' is -1. */
252 struct qty_table_elem
254 rtx const_rtx;
255 rtx_insn *const_insn;
256 rtx comparison_const;
257 int comparison_qty;
258 unsigned int first_reg, last_reg;
259 /* The sizes of these fields should match the sizes of the
260 code and mode fields of struct rtx_def (see rtl.h). */
261 ENUM_BITFIELD(rtx_code) comparison_code : 16;
262 ENUM_BITFIELD(machine_mode) mode : 8;
265 /* The table of all qtys, indexed by qty number. */
266 static struct qty_table_elem *qty_table;
268 #ifdef HAVE_cc0
269 /* For machines that have a CC0, we do not record its value in the hash
270 table since its use is guaranteed to be the insn immediately following
271 its definition and any other insn is presumed to invalidate it.
273 Instead, we store below the current and last value assigned to CC0.
274 If it should happen to be a constant, it is stored in preference
275 to the actual assigned value. In case it is a constant, we store
276 the mode in which the constant should be interpreted. */
278 static rtx this_insn_cc0, prev_insn_cc0;
279 static machine_mode this_insn_cc0_mode, prev_insn_cc0_mode;
280 #endif
282 /* Insn being scanned. */
284 static rtx_insn *this_insn;
285 static bool optimize_this_for_speed_p;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
289 value.
291 Or -1 if this register is at the end of the chain.
293 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
296 struct reg_eqv_elem
298 int next, prev;
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem *reg_eqv_table;
304 struct cse_reg_info
306 /* The timestamp at which this register is initialized. */
307 unsigned int timestamp;
309 /* The quantity number of the register's current contents. */
310 int reg_qty;
312 /* The number of times the register has been altered in the current
313 basic block. */
314 int reg_tick;
316 /* The REG_TICK value at which rtx's containing this register are
317 valid in the hash table. If this does not equal the current
318 reg_tick value, such expressions existing in the hash table are
319 invalid. */
320 int reg_in_table;
322 /* The SUBREG that was set when REG_TICK was last incremented. Set
323 to -1 if the last store was to the whole register, not a subreg. */
324 unsigned int subreg_ticked;
327 /* A table of cse_reg_info indexed by register numbers. */
328 static struct cse_reg_info *cse_reg_info_table;
330 /* The size of the above table. */
331 static unsigned int cse_reg_info_table_size;
333 /* The index of the first entry that has not been initialized. */
334 static unsigned int cse_reg_info_table_first_uninitialized;
336 /* The timestamp at the beginning of the current run of
337 cse_extended_basic_block. We increment this variable at the beginning of
338 the current run of cse_extended_basic_block. The timestamp field of a
339 cse_reg_info entry matches the value of this variable if and only
340 if the entry has been initialized during the current run of
341 cse_extended_basic_block. */
342 static unsigned int cse_reg_info_timestamp;
344 /* A HARD_REG_SET containing all the hard registers for which there is
345 currently a REG expression in the hash table. Note the difference
346 from the above variables, which indicate if the REG is mentioned in some
347 expression in the table. */
349 static HARD_REG_SET hard_regs_in_table;
351 /* True if CSE has altered the CFG. */
352 static bool cse_cfg_altered;
354 /* True if CSE has altered conditional jump insns in such a way
355 that jump optimization should be redone. */
356 static bool cse_jumps_altered;
358 /* True if we put a LABEL_REF into the hash table for an INSN
359 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
360 to put in the note. */
361 static bool recorded_label_ref;
363 /* canon_hash stores 1 in do_not_record
364 if it notices a reference to CC0, PC, or some other volatile
365 subexpression. */
367 static int do_not_record;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory;
374 /* The hash table contains buckets which are chains of `struct table_elt's,
375 each recording one expression's information.
376 That expression is in the `exp' field.
378 The canon_exp field contains a canonical (from the point of view of
379 alias analysis) version of the `exp' field.
381 Those elements with the same hash code are chained in both directions
382 through the `next_same_hash' and `prev_same_hash' fields.
384 Each set of expressions with equivalent values
385 are on a two-way chain through the `next_same_value'
386 and `prev_same_value' fields, and all point with
387 the `first_same_value' field at the first element in
388 that chain. The chain is in order of increasing cost.
389 Each element's cost value is in its `cost' field.
391 The `in_memory' field is nonzero for elements that
392 involve any reference to memory. These elements are removed
393 whenever a write is done to an unidentified location in memory.
394 To be safe, we assume that a memory address is unidentified unless
395 the address is either a symbol constant or a constant plus
396 the frame pointer or argument pointer.
398 The `related_value' field is used to connect related expressions
399 (that differ by adding an integer).
400 The related expressions are chained in a circular fashion.
401 `related_value' is zero for expressions for which this
402 chain is not useful.
404 The `cost' field stores the cost of this element's expression.
405 The `regcost' field stores the value returned by approx_reg_cost for
406 this element's expression.
408 The `is_const' flag is set if the element is a constant (including
409 a fixed address).
411 The `flag' field is used as a temporary during some search routines.
413 The `mode' field is usually the same as GET_MODE (`exp'), but
414 if `exp' is a CONST_INT and has no machine mode then the `mode'
415 field is the mode it was being used as. Each constant is
416 recorded separately for each mode it is used with. */
418 struct table_elt
420 rtx exp;
421 rtx canon_exp;
422 struct table_elt *next_same_hash;
423 struct table_elt *prev_same_hash;
424 struct table_elt *next_same_value;
425 struct table_elt *prev_same_value;
426 struct table_elt *first_same_value;
427 struct table_elt *related_value;
428 int cost;
429 int regcost;
430 /* The size of this field should match the size
431 of the mode field of struct rtx_def (see rtl.h). */
432 ENUM_BITFIELD(machine_mode) mode : 8;
433 char in_memory;
434 char is_const;
435 char flag;
438 /* We don't want a lot of buckets, because we rarely have very many
439 things stored in the hash table, and a lot of buckets slows
440 down a lot of loops that happen frequently. */
441 #define HASH_SHIFT 5
442 #define HASH_SIZE (1 << HASH_SHIFT)
443 #define HASH_MASK (HASH_SIZE - 1)
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
448 #define HASH(X, M) \
449 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
451 : canon_hash (X, M)) & HASH_MASK)
453 /* Like HASH, but without side-effects. */
454 #define SAFE_HASH(X, M) \
455 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
456 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
457 : safe_hash (X, M)) & HASH_MASK)
459 /* Determine whether register number N is considered a fixed register for the
460 purpose of approximating register costs.
461 It is desirable to replace other regs with fixed regs, to reduce need for
462 non-fixed hard regs.
463 A reg wins if it is either the frame pointer or designated as fixed. */
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 (REGNO_PTR_FRAME_P (N) \
475 || (HARD_REGISTER_NUM_P (N) \
476 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
478 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET, 1))
479 #define COST_IN(X, OUTER, OPNO) (REG_P (X) ? 0 : notreg_cost (X, OUTER, OPNO))
481 /* Get the number of times this register has been updated in this
482 basic block. */
484 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
486 /* Get the point at which REG was recorded in the table. */
488 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
490 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
491 SUBREG). */
493 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
495 /* Get the quantity number for REG. */
497 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
499 /* Determine if the quantity number for register X represents a valid index
500 into the qty_table. */
502 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
504 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
506 #define CHEAPER(X, Y) \
507 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
509 static struct table_elt *table[HASH_SIZE];
511 /* Chain of `struct table_elt's made so far for this function
512 but currently removed from the table. */
514 static struct table_elt *free_element_chain;
516 /* Set to the cost of a constant pool reference if one was found for a
517 symbolic constant. If this was found, it means we should try to
518 convert constants into constant pool entries if they don't fit in
519 the insn. */
521 static int constant_pool_entries_cost;
522 static int constant_pool_entries_regcost;
524 /* Trace a patch through the CFG. */
526 struct branch_path
528 /* The basic block for this path entry. */
529 basic_block bb;
532 /* This data describes a block that will be processed by
533 cse_extended_basic_block. */
535 struct cse_basic_block_data
537 /* Total number of SETs in block. */
538 int nsets;
539 /* Size of current branch path, if any. */
540 int path_size;
541 /* Current path, indicating which basic_blocks will be processed. */
542 struct branch_path *path;
546 /* Pointers to the live in/live out bitmaps for the boundaries of the
547 current EBB. */
548 static bitmap cse_ebb_live_in, cse_ebb_live_out;
550 /* A simple bitmap to track which basic blocks have been visited
551 already as part of an already processed extended basic block. */
552 static sbitmap cse_visited_basic_blocks;
554 static bool fixed_base_plus_p (rtx x);
555 static int notreg_cost (rtx, enum rtx_code, int);
556 static int preferable (int, int, int, int);
557 static void new_basic_block (void);
558 static void make_new_qty (unsigned int, machine_mode);
559 static void make_regs_eqv (unsigned int, unsigned int);
560 static void delete_reg_equiv (unsigned int);
561 static int mention_regs (rtx);
562 static int insert_regs (rtx, struct table_elt *, int);
563 static void remove_from_table (struct table_elt *, unsigned);
564 static void remove_pseudo_from_table (rtx, unsigned);
565 static struct table_elt *lookup (rtx, unsigned, machine_mode);
566 static struct table_elt *lookup_for_remove (rtx, unsigned, machine_mode);
567 static rtx lookup_as_function (rtx, enum rtx_code);
568 static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned,
569 machine_mode, int, int);
570 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
571 machine_mode);
572 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
573 static void invalidate (rtx, machine_mode);
574 static void remove_invalid_refs (unsigned int);
575 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
576 machine_mode);
577 static void rehash_using_reg (rtx);
578 static void invalidate_memory (void);
579 static void invalidate_for_call (void);
580 static rtx use_related_value (rtx, struct table_elt *);
582 static inline unsigned canon_hash (rtx, machine_mode);
583 static inline unsigned safe_hash (rtx, machine_mode);
584 static inline unsigned hash_rtx_string (const char *);
586 static rtx canon_reg (rtx, rtx_insn *);
587 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
588 machine_mode *,
589 machine_mode *);
590 static rtx fold_rtx (rtx, rtx_insn *);
591 static rtx equiv_constant (rtx);
592 static void record_jump_equiv (rtx_insn *, bool);
593 static void record_jump_cond (enum rtx_code, machine_mode, rtx, rtx,
594 int);
595 static void cse_insn (rtx_insn *);
596 static void cse_prescan_path (struct cse_basic_block_data *);
597 static void invalidate_from_clobbers (rtx_insn *);
598 static void invalidate_from_sets_and_clobbers (rtx_insn *);
599 static rtx cse_process_notes (rtx, rtx, bool *);
600 static void cse_extended_basic_block (struct cse_basic_block_data *);
601 extern void dump_class (struct table_elt*);
602 static void get_cse_reg_info_1 (unsigned int regno);
603 static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
605 static void flush_hash_table (void);
606 static bool insn_live_p (rtx_insn *, int *);
607 static bool set_live_p (rtx, rtx_insn *, int *);
608 static void cse_change_cc_mode_insn (rtx_insn *, rtx);
609 static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx);
610 static machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
611 bool);
614 #undef RTL_HOOKS_GEN_LOWPART
615 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
617 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
619 /* Nonzero if X has the form (PLUS frame-pointer integer). */
621 static bool
622 fixed_base_plus_p (rtx x)
624 switch (GET_CODE (x))
626 case REG:
627 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
628 return true;
629 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
630 return true;
631 return false;
633 case PLUS:
634 if (!CONST_INT_P (XEXP (x, 1)))
635 return false;
636 return fixed_base_plus_p (XEXP (x, 0));
638 default:
639 return false;
643 /* Dump the expressions in the equivalence class indicated by CLASSP.
644 This function is used only for debugging. */
645 DEBUG_FUNCTION void
646 dump_class (struct table_elt *classp)
648 struct table_elt *elt;
650 fprintf (stderr, "Equivalence chain for ");
651 print_rtl (stderr, classp->exp);
652 fprintf (stderr, ": \n");
654 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
656 print_rtl (stderr, elt->exp);
657 fprintf (stderr, "\n");
661 /* Return an estimate of the cost of the registers used in an rtx.
662 This is mostly the number of different REG expressions in the rtx;
663 however for some exceptions like fixed registers we use a cost of
664 0. If any other hard register reference occurs, return MAX_COST. */
666 static int
667 approx_reg_cost (const_rtx x)
669 int cost = 0;
670 subrtx_iterator::array_type array;
671 FOR_EACH_SUBRTX (iter, array, x, NONCONST)
673 const_rtx x = *iter;
674 if (REG_P (x))
676 unsigned int regno = REGNO (x);
677 if (!CHEAP_REGNO (regno))
679 if (regno < FIRST_PSEUDO_REGISTER)
681 if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
682 return MAX_COST;
683 cost += 2;
685 else
686 cost += 1;
690 return cost;
693 /* Return a negative value if an rtx A, whose costs are given by COST_A
694 and REGCOST_A, is more desirable than an rtx B.
695 Return a positive value if A is less desirable, or 0 if the two are
696 equally good. */
697 static int
698 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
700 /* First, get rid of cases involving expressions that are entirely
701 unwanted. */
702 if (cost_a != cost_b)
704 if (cost_a == MAX_COST)
705 return 1;
706 if (cost_b == MAX_COST)
707 return -1;
710 /* Avoid extending lifetimes of hardregs. */
711 if (regcost_a != regcost_b)
713 if (regcost_a == MAX_COST)
714 return 1;
715 if (regcost_b == MAX_COST)
716 return -1;
719 /* Normal operation costs take precedence. */
720 if (cost_a != cost_b)
721 return cost_a - cost_b;
722 /* Only if these are identical consider effects on register pressure. */
723 if (regcost_a != regcost_b)
724 return regcost_a - regcost_b;
725 return 0;
728 /* Internal function, to compute cost when X is not a register; called
729 from COST macro to keep it simple. */
731 static int
732 notreg_cost (rtx x, enum rtx_code outer, int opno)
734 return ((GET_CODE (x) == SUBREG
735 && REG_P (SUBREG_REG (x))
736 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
737 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
738 && (GET_MODE_SIZE (GET_MODE (x))
739 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
740 && subreg_lowpart_p (x)
741 && TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x),
742 GET_MODE (SUBREG_REG (x))))
744 : rtx_cost (x, outer, opno, optimize_this_for_speed_p) * 2);
748 /* Initialize CSE_REG_INFO_TABLE. */
750 static void
751 init_cse_reg_info (unsigned int nregs)
753 /* Do we need to grow the table? */
754 if (nregs > cse_reg_info_table_size)
756 unsigned int new_size;
758 if (cse_reg_info_table_size < 2048)
760 /* Compute a new size that is a power of 2 and no smaller
761 than the large of NREGS and 64. */
762 new_size = (cse_reg_info_table_size
763 ? cse_reg_info_table_size : 64);
765 while (new_size < nregs)
766 new_size *= 2;
768 else
770 /* If we need a big table, allocate just enough to hold
771 NREGS registers. */
772 new_size = nregs;
775 /* Reallocate the table with NEW_SIZE entries. */
776 free (cse_reg_info_table);
777 cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
778 cse_reg_info_table_size = new_size;
779 cse_reg_info_table_first_uninitialized = 0;
782 /* Do we have all of the first NREGS entries initialized? */
783 if (cse_reg_info_table_first_uninitialized < nregs)
785 unsigned int old_timestamp = cse_reg_info_timestamp - 1;
786 unsigned int i;
788 /* Put the old timestamp on newly allocated entries so that they
789 will all be considered out of date. We do not touch those
790 entries beyond the first NREGS entries to be nice to the
791 virtual memory. */
792 for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
793 cse_reg_info_table[i].timestamp = old_timestamp;
795 cse_reg_info_table_first_uninitialized = nregs;
799 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
801 static void
802 get_cse_reg_info_1 (unsigned int regno)
804 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
805 entry will be considered to have been initialized. */
806 cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
808 /* Initialize the rest of the entry. */
809 cse_reg_info_table[regno].reg_tick = 1;
810 cse_reg_info_table[regno].reg_in_table = -1;
811 cse_reg_info_table[regno].subreg_ticked = -1;
812 cse_reg_info_table[regno].reg_qty = -regno - 1;
815 /* Find a cse_reg_info entry for REGNO. */
817 static inline struct cse_reg_info *
818 get_cse_reg_info (unsigned int regno)
820 struct cse_reg_info *p = &cse_reg_info_table[regno];
822 /* If this entry has not been initialized, go ahead and initialize
823 it. */
824 if (p->timestamp != cse_reg_info_timestamp)
825 get_cse_reg_info_1 (regno);
827 return p;
830 /* Clear the hash table and initialize each register with its own quantity,
831 for a new basic block. */
833 static void
834 new_basic_block (void)
836 int i;
838 next_qty = 0;
840 /* Invalidate cse_reg_info_table. */
841 cse_reg_info_timestamp++;
843 /* Clear out hash table state for this pass. */
844 CLEAR_HARD_REG_SET (hard_regs_in_table);
846 /* The per-quantity values used to be initialized here, but it is
847 much faster to initialize each as it is made in `make_new_qty'. */
849 for (i = 0; i < HASH_SIZE; i++)
851 struct table_elt *first;
853 first = table[i];
854 if (first != NULL)
856 struct table_elt *last = first;
858 table[i] = NULL;
860 while (last->next_same_hash != NULL)
861 last = last->next_same_hash;
863 /* Now relink this hash entire chain into
864 the free element list. */
866 last->next_same_hash = free_element_chain;
867 free_element_chain = first;
871 #ifdef HAVE_cc0
872 prev_insn_cc0 = 0;
873 #endif
876 /* Say that register REG contains a quantity in mode MODE not in any
877 register before and initialize that quantity. */
879 static void
880 make_new_qty (unsigned int reg, machine_mode mode)
882 int q;
883 struct qty_table_elem *ent;
884 struct reg_eqv_elem *eqv;
886 gcc_assert (next_qty < max_qty);
888 q = REG_QTY (reg) = next_qty++;
889 ent = &qty_table[q];
890 ent->first_reg = reg;
891 ent->last_reg = reg;
892 ent->mode = mode;
893 ent->const_rtx = ent->const_insn = NULL;
894 ent->comparison_code = UNKNOWN;
896 eqv = &reg_eqv_table[reg];
897 eqv->next = eqv->prev = -1;
900 /* Make reg NEW equivalent to reg OLD.
901 OLD is not changing; NEW is. */
903 static void
904 make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
906 unsigned int lastr, firstr;
907 int q = REG_QTY (old_reg);
908 struct qty_table_elem *ent;
910 ent = &qty_table[q];
912 /* Nothing should become eqv until it has a "non-invalid" qty number. */
913 gcc_assert (REGNO_QTY_VALID_P (old_reg));
915 REG_QTY (new_reg) = q;
916 firstr = ent->first_reg;
917 lastr = ent->last_reg;
919 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
920 hard regs. Among pseudos, if NEW will live longer than any other reg
921 of the same qty, and that is beyond the current basic block,
922 make it the new canonical replacement for this qty. */
923 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
924 /* Certain fixed registers might be of the class NO_REGS. This means
925 that not only can they not be allocated by the compiler, but
926 they cannot be used in substitutions or canonicalizations
927 either. */
928 && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
929 && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
930 || (new_reg >= FIRST_PSEUDO_REGISTER
931 && (firstr < FIRST_PSEUDO_REGISTER
932 || (bitmap_bit_p (cse_ebb_live_out, new_reg)
933 && !bitmap_bit_p (cse_ebb_live_out, firstr))
934 || (bitmap_bit_p (cse_ebb_live_in, new_reg)
935 && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
937 reg_eqv_table[firstr].prev = new_reg;
938 reg_eqv_table[new_reg].next = firstr;
939 reg_eqv_table[new_reg].prev = -1;
940 ent->first_reg = new_reg;
942 else
944 /* If NEW is a hard reg (known to be non-fixed), insert at end.
945 Otherwise, insert before any non-fixed hard regs that are at the
946 end. Registers of class NO_REGS cannot be used as an
947 equivalent for anything. */
948 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
949 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
950 && new_reg >= FIRST_PSEUDO_REGISTER)
951 lastr = reg_eqv_table[lastr].prev;
952 reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
953 if (reg_eqv_table[lastr].next >= 0)
954 reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
955 else
956 qty_table[q].last_reg = new_reg;
957 reg_eqv_table[lastr].next = new_reg;
958 reg_eqv_table[new_reg].prev = lastr;
962 /* Remove REG from its equivalence class. */
964 static void
965 delete_reg_equiv (unsigned int reg)
967 struct qty_table_elem *ent;
968 int q = REG_QTY (reg);
969 int p, n;
971 /* If invalid, do nothing. */
972 if (! REGNO_QTY_VALID_P (reg))
973 return;
975 ent = &qty_table[q];
977 p = reg_eqv_table[reg].prev;
978 n = reg_eqv_table[reg].next;
980 if (n != -1)
981 reg_eqv_table[n].prev = p;
982 else
983 ent->last_reg = p;
984 if (p != -1)
985 reg_eqv_table[p].next = n;
986 else
987 ent->first_reg = n;
989 REG_QTY (reg) = -reg - 1;
992 /* Remove any invalid expressions from the hash table
993 that refer to any of the registers contained in expression X.
995 Make sure that newly inserted references to those registers
996 as subexpressions will be considered valid.
998 mention_regs is not called when a register itself
999 is being stored in the table.
1001 Return 1 if we have done something that may have changed the hash code
1002 of X. */
1004 static int
1005 mention_regs (rtx x)
1007 enum rtx_code code;
1008 int i, j;
1009 const char *fmt;
1010 int changed = 0;
1012 if (x == 0)
1013 return 0;
1015 code = GET_CODE (x);
1016 if (code == REG)
1018 unsigned int regno = REGNO (x);
1019 unsigned int endregno = END_REGNO (x);
1020 unsigned int i;
1022 for (i = regno; i < endregno; i++)
1024 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1025 remove_invalid_refs (i);
1027 REG_IN_TABLE (i) = REG_TICK (i);
1028 SUBREG_TICKED (i) = -1;
1031 return 0;
1034 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1035 pseudo if they don't use overlapping words. We handle only pseudos
1036 here for simplicity. */
1037 if (code == SUBREG && REG_P (SUBREG_REG (x))
1038 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1040 unsigned int i = REGNO (SUBREG_REG (x));
1042 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1044 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1045 the last store to this register really stored into this
1046 subreg, then remove the memory of this subreg.
1047 Otherwise, remove any memory of the entire register and
1048 all its subregs from the table. */
1049 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1050 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1051 remove_invalid_refs (i);
1052 else
1053 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1056 REG_IN_TABLE (i) = REG_TICK (i);
1057 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1058 return 0;
1061 /* If X is a comparison or a COMPARE and either operand is a register
1062 that does not have a quantity, give it one. This is so that a later
1063 call to record_jump_equiv won't cause X to be assigned a different
1064 hash code and not found in the table after that call.
1066 It is not necessary to do this here, since rehash_using_reg can
1067 fix up the table later, but doing this here eliminates the need to
1068 call that expensive function in the most common case where the only
1069 use of the register is in the comparison. */
1071 if (code == COMPARE || COMPARISON_P (x))
1073 if (REG_P (XEXP (x, 0))
1074 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1075 if (insert_regs (XEXP (x, 0), NULL, 0))
1077 rehash_using_reg (XEXP (x, 0));
1078 changed = 1;
1081 if (REG_P (XEXP (x, 1))
1082 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1083 if (insert_regs (XEXP (x, 1), NULL, 0))
1085 rehash_using_reg (XEXP (x, 1));
1086 changed = 1;
1090 fmt = GET_RTX_FORMAT (code);
1091 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1092 if (fmt[i] == 'e')
1093 changed |= mention_regs (XEXP (x, i));
1094 else if (fmt[i] == 'E')
1095 for (j = 0; j < XVECLEN (x, i); j++)
1096 changed |= mention_regs (XVECEXP (x, i, j));
1098 return changed;
1101 /* Update the register quantities for inserting X into the hash table
1102 with a value equivalent to CLASSP.
1103 (If the class does not contain a REG, it is irrelevant.)
1104 If MODIFIED is nonzero, X is a destination; it is being modified.
1105 Note that delete_reg_equiv should be called on a register
1106 before insert_regs is done on that register with MODIFIED != 0.
1108 Nonzero value means that elements of reg_qty have changed
1109 so X's hash code may be different. */
1111 static int
1112 insert_regs (rtx x, struct table_elt *classp, int modified)
1114 if (REG_P (x))
1116 unsigned int regno = REGNO (x);
1117 int qty_valid;
1119 /* If REGNO is in the equivalence table already but is of the
1120 wrong mode for that equivalence, don't do anything here. */
1122 qty_valid = REGNO_QTY_VALID_P (regno);
1123 if (qty_valid)
1125 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1127 if (ent->mode != GET_MODE (x))
1128 return 0;
1131 if (modified || ! qty_valid)
1133 if (classp)
1134 for (classp = classp->first_same_value;
1135 classp != 0;
1136 classp = classp->next_same_value)
1137 if (REG_P (classp->exp)
1138 && GET_MODE (classp->exp) == GET_MODE (x))
1140 unsigned c_regno = REGNO (classp->exp);
1142 gcc_assert (REGNO_QTY_VALID_P (c_regno));
1144 /* Suppose that 5 is hard reg and 100 and 101 are
1145 pseudos. Consider
1147 (set (reg:si 100) (reg:si 5))
1148 (set (reg:si 5) (reg:si 100))
1149 (set (reg:di 101) (reg:di 5))
1151 We would now set REG_QTY (101) = REG_QTY (5), but the
1152 entry for 5 is in SImode. When we use this later in
1153 copy propagation, we get the register in wrong mode. */
1154 if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1155 continue;
1157 make_regs_eqv (regno, c_regno);
1158 return 1;
1161 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1162 than REG_IN_TABLE to find out if there was only a single preceding
1163 invalidation - for the SUBREG - or another one, which would be
1164 for the full register. However, if we find here that REG_TICK
1165 indicates that the register is invalid, it means that it has
1166 been invalidated in a separate operation. The SUBREG might be used
1167 now (then this is a recursive call), or we might use the full REG
1168 now and a SUBREG of it later. So bump up REG_TICK so that
1169 mention_regs will do the right thing. */
1170 if (! modified
1171 && REG_IN_TABLE (regno) >= 0
1172 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1173 REG_TICK (regno)++;
1174 make_new_qty (regno, GET_MODE (x));
1175 return 1;
1178 return 0;
1181 /* If X is a SUBREG, we will likely be inserting the inner register in the
1182 table. If that register doesn't have an assigned quantity number at
1183 this point but does later, the insertion that we will be doing now will
1184 not be accessible because its hash code will have changed. So assign
1185 a quantity number now. */
1187 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1188 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1190 insert_regs (SUBREG_REG (x), NULL, 0);
1191 mention_regs (x);
1192 return 1;
1194 else
1195 return mention_regs (x);
1199 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1200 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1201 CST is equal to an anchor. */
1203 static bool
1204 compute_const_anchors (rtx cst,
1205 HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs,
1206 HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs)
1208 HOST_WIDE_INT n = INTVAL (cst);
1210 *lower_base = n & ~(targetm.const_anchor - 1);
1211 if (*lower_base == n)
1212 return false;
1214 *upper_base =
1215 (n + (targetm.const_anchor - 1)) & ~(targetm.const_anchor - 1);
1216 *upper_offs = n - *upper_base;
1217 *lower_offs = n - *lower_base;
1218 return true;
1221 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1223 static void
1224 insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs,
1225 machine_mode mode)
1227 struct table_elt *elt;
1228 unsigned hash;
1229 rtx anchor_exp;
1230 rtx exp;
1232 anchor_exp = GEN_INT (anchor);
1233 hash = HASH (anchor_exp, mode);
1234 elt = lookup (anchor_exp, hash, mode);
1235 if (!elt)
1236 elt = insert (anchor_exp, NULL, hash, mode);
1238 exp = plus_constant (mode, reg, offs);
1239 /* REG has just been inserted and the hash codes recomputed. */
1240 mention_regs (exp);
1241 hash = HASH (exp, mode);
1243 /* Use the cost of the register rather than the whole expression. When
1244 looking up constant anchors we will further offset the corresponding
1245 expression therefore it does not make sense to prefer REGs over
1246 reg-immediate additions. Prefer instead the oldest expression. Also
1247 don't prefer pseudos over hard regs so that we derive constants in
1248 argument registers from other argument registers rather than from the
1249 original pseudo that was used to synthesize the constant. */
1250 insert_with_costs (exp, elt, hash, mode, COST (reg), 1);
1253 /* The constant CST is equivalent to the register REG. Create
1254 equivalences between the two anchors of CST and the corresponding
1255 register-offset expressions using REG. */
1257 static void
1258 insert_const_anchors (rtx reg, rtx cst, machine_mode mode)
1260 HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1262 if (!compute_const_anchors (cst, &lower_base, &lower_offs,
1263 &upper_base, &upper_offs))
1264 return;
1266 /* Ignore anchors of value 0. Constants accessible from zero are
1267 simple. */
1268 if (lower_base != 0)
1269 insert_const_anchor (lower_base, reg, -lower_offs, mode);
1271 if (upper_base != 0)
1272 insert_const_anchor (upper_base, reg, -upper_offs, mode);
1275 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1276 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1277 valid expression. Return the cheapest and oldest of such expressions. In
1278 *OLD, return how old the resulting expression is compared to the other
1279 equivalent expressions. */
1281 static rtx
1282 find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs,
1283 unsigned *old)
1285 struct table_elt *elt;
1286 unsigned idx;
1287 struct table_elt *match_elt;
1288 rtx match;
1290 /* Find the cheapest and *oldest* expression to maximize the chance of
1291 reusing the same pseudo. */
1293 match_elt = NULL;
1294 match = NULL_RTX;
1295 for (elt = anchor_elt->first_same_value, idx = 0;
1296 elt;
1297 elt = elt->next_same_value, idx++)
1299 if (match_elt && CHEAPER (match_elt, elt))
1300 return match;
1302 if (REG_P (elt->exp)
1303 || (GET_CODE (elt->exp) == PLUS
1304 && REG_P (XEXP (elt->exp, 0))
1305 && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT))
1307 rtx x;
1309 /* Ignore expressions that are no longer valid. */
1310 if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false))
1311 continue;
1313 x = plus_constant (GET_MODE (elt->exp), elt->exp, offs);
1314 if (REG_P (x)
1315 || (GET_CODE (x) == PLUS
1316 && IN_RANGE (INTVAL (XEXP (x, 1)),
1317 -targetm.const_anchor,
1318 targetm.const_anchor - 1)))
1320 match = x;
1321 match_elt = elt;
1322 *old = idx;
1327 return match;
1330 /* Try to express the constant SRC_CONST using a register+offset expression
1331 derived from a constant anchor. Return it if successful or NULL_RTX,
1332 otherwise. */
1334 static rtx
1335 try_const_anchors (rtx src_const, machine_mode mode)
1337 struct table_elt *lower_elt, *upper_elt;
1338 HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1339 rtx lower_anchor_rtx, upper_anchor_rtx;
1340 rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX;
1341 unsigned lower_old, upper_old;
1343 /* CONST_INT is used for CC modes, but we should leave those alone. */
1344 if (GET_MODE_CLASS (mode) == MODE_CC)
1345 return NULL_RTX;
1347 gcc_assert (SCALAR_INT_MODE_P (mode));
1348 if (!compute_const_anchors (src_const, &lower_base, &lower_offs,
1349 &upper_base, &upper_offs))
1350 return NULL_RTX;
1352 lower_anchor_rtx = GEN_INT (lower_base);
1353 upper_anchor_rtx = GEN_INT (upper_base);
1354 lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode);
1355 upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode);
1357 if (lower_elt)
1358 lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old);
1359 if (upper_elt)
1360 upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old);
1362 if (!lower_exp)
1363 return upper_exp;
1364 if (!upper_exp)
1365 return lower_exp;
1367 /* Return the older expression. */
1368 return (upper_old > lower_old ? upper_exp : lower_exp);
1371 /* Look in or update the hash table. */
1373 /* Remove table element ELT from use in the table.
1374 HASH is its hash code, made using the HASH macro.
1375 It's an argument because often that is known in advance
1376 and we save much time not recomputing it. */
1378 static void
1379 remove_from_table (struct table_elt *elt, unsigned int hash)
1381 if (elt == 0)
1382 return;
1384 /* Mark this element as removed. See cse_insn. */
1385 elt->first_same_value = 0;
1387 /* Remove the table element from its equivalence class. */
1390 struct table_elt *prev = elt->prev_same_value;
1391 struct table_elt *next = elt->next_same_value;
1393 if (next)
1394 next->prev_same_value = prev;
1396 if (prev)
1397 prev->next_same_value = next;
1398 else
1400 struct table_elt *newfirst = next;
1401 while (next)
1403 next->first_same_value = newfirst;
1404 next = next->next_same_value;
1409 /* Remove the table element from its hash bucket. */
1412 struct table_elt *prev = elt->prev_same_hash;
1413 struct table_elt *next = elt->next_same_hash;
1415 if (next)
1416 next->prev_same_hash = prev;
1418 if (prev)
1419 prev->next_same_hash = next;
1420 else if (table[hash] == elt)
1421 table[hash] = next;
1422 else
1424 /* This entry is not in the proper hash bucket. This can happen
1425 when two classes were merged by `merge_equiv_classes'. Search
1426 for the hash bucket that it heads. This happens only very
1427 rarely, so the cost is acceptable. */
1428 for (hash = 0; hash < HASH_SIZE; hash++)
1429 if (table[hash] == elt)
1430 table[hash] = next;
1434 /* Remove the table element from its related-value circular chain. */
1436 if (elt->related_value != 0 && elt->related_value != elt)
1438 struct table_elt *p = elt->related_value;
1440 while (p->related_value != elt)
1441 p = p->related_value;
1442 p->related_value = elt->related_value;
1443 if (p->related_value == p)
1444 p->related_value = 0;
1447 /* Now add it to the free element chain. */
1448 elt->next_same_hash = free_element_chain;
1449 free_element_chain = elt;
1452 /* Same as above, but X is a pseudo-register. */
1454 static void
1455 remove_pseudo_from_table (rtx x, unsigned int hash)
1457 struct table_elt *elt;
1459 /* Because a pseudo-register can be referenced in more than one
1460 mode, we might have to remove more than one table entry. */
1461 while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1462 remove_from_table (elt, hash);
1465 /* Look up X in the hash table and return its table element,
1466 or 0 if X is not in the table.
1468 MODE is the machine-mode of X, or if X is an integer constant
1469 with VOIDmode then MODE is the mode with which X will be used.
1471 Here we are satisfied to find an expression whose tree structure
1472 looks like X. */
1474 static struct table_elt *
1475 lookup (rtx x, unsigned int hash, machine_mode mode)
1477 struct table_elt *p;
1479 for (p = table[hash]; p; p = p->next_same_hash)
1480 if (mode == p->mode && ((x == p->exp && REG_P (x))
1481 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1482 return p;
1484 return 0;
1487 /* Like `lookup' but don't care whether the table element uses invalid regs.
1488 Also ignore discrepancies in the machine mode of a register. */
1490 static struct table_elt *
1491 lookup_for_remove (rtx x, unsigned int hash, machine_mode mode)
1493 struct table_elt *p;
1495 if (REG_P (x))
1497 unsigned int regno = REGNO (x);
1499 /* Don't check the machine mode when comparing registers;
1500 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1501 for (p = table[hash]; p; p = p->next_same_hash)
1502 if (REG_P (p->exp)
1503 && REGNO (p->exp) == regno)
1504 return p;
1506 else
1508 for (p = table[hash]; p; p = p->next_same_hash)
1509 if (mode == p->mode
1510 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1511 return p;
1514 return 0;
1517 /* Look for an expression equivalent to X and with code CODE.
1518 If one is found, return that expression. */
1520 static rtx
1521 lookup_as_function (rtx x, enum rtx_code code)
1523 struct table_elt *p
1524 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1526 if (p == 0)
1527 return 0;
1529 for (p = p->first_same_value; p; p = p->next_same_value)
1530 if (GET_CODE (p->exp) == code
1531 /* Make sure this is a valid entry in the table. */
1532 && exp_equiv_p (p->exp, p->exp, 1, false))
1533 return p->exp;
1535 return 0;
1538 /* Insert X in the hash table, assuming HASH is its hash code and
1539 CLASSP is an element of the class it should go in (or 0 if a new
1540 class should be made). COST is the code of X and reg_cost is the
1541 cost of registers in X. It is inserted at the proper position to
1542 keep the class in the order cheapest first.
1544 MODE is the machine-mode of X, or if X is an integer constant
1545 with VOIDmode then MODE is the mode with which X will be used.
1547 For elements of equal cheapness, the most recent one
1548 goes in front, except that the first element in the list
1549 remains first unless a cheaper element is added. The order of
1550 pseudo-registers does not matter, as canon_reg will be called to
1551 find the cheapest when a register is retrieved from the table.
1553 The in_memory field in the hash table element is set to 0.
1554 The caller must set it nonzero if appropriate.
1556 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1557 and if insert_regs returns a nonzero value
1558 you must then recompute its hash code before calling here.
1560 If necessary, update table showing constant values of quantities. */
1562 static struct table_elt *
1563 insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash,
1564 machine_mode mode, int cost, int reg_cost)
1566 struct table_elt *elt;
1568 /* If X is a register and we haven't made a quantity for it,
1569 something is wrong. */
1570 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1572 /* If X is a hard register, show it is being put in the table. */
1573 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1574 add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1576 /* Put an element for X into the right hash bucket. */
1578 elt = free_element_chain;
1579 if (elt)
1580 free_element_chain = elt->next_same_hash;
1581 else
1582 elt = XNEW (struct table_elt);
1584 elt->exp = x;
1585 elt->canon_exp = NULL_RTX;
1586 elt->cost = cost;
1587 elt->regcost = reg_cost;
1588 elt->next_same_value = 0;
1589 elt->prev_same_value = 0;
1590 elt->next_same_hash = table[hash];
1591 elt->prev_same_hash = 0;
1592 elt->related_value = 0;
1593 elt->in_memory = 0;
1594 elt->mode = mode;
1595 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1597 if (table[hash])
1598 table[hash]->prev_same_hash = elt;
1599 table[hash] = elt;
1601 /* Put it into the proper value-class. */
1602 if (classp)
1604 classp = classp->first_same_value;
1605 if (CHEAPER (elt, classp))
1606 /* Insert at the head of the class. */
1608 struct table_elt *p;
1609 elt->next_same_value = classp;
1610 classp->prev_same_value = elt;
1611 elt->first_same_value = elt;
1613 for (p = classp; p; p = p->next_same_value)
1614 p->first_same_value = elt;
1616 else
1618 /* Insert not at head of the class. */
1619 /* Put it after the last element cheaper than X. */
1620 struct table_elt *p, *next;
1622 for (p = classp;
1623 (next = p->next_same_value) && CHEAPER (next, elt);
1624 p = next)
1627 /* Put it after P and before NEXT. */
1628 elt->next_same_value = next;
1629 if (next)
1630 next->prev_same_value = elt;
1632 elt->prev_same_value = p;
1633 p->next_same_value = elt;
1634 elt->first_same_value = classp;
1637 else
1638 elt->first_same_value = elt;
1640 /* If this is a constant being set equivalent to a register or a register
1641 being set equivalent to a constant, note the constant equivalence.
1643 If this is a constant, it cannot be equivalent to a different constant,
1644 and a constant is the only thing that can be cheaper than a register. So
1645 we know the register is the head of the class (before the constant was
1646 inserted).
1648 If this is a register that is not already known equivalent to a
1649 constant, we must check the entire class.
1651 If this is a register that is already known equivalent to an insn,
1652 update the qtys `const_insn' to show that `this_insn' is the latest
1653 insn making that quantity equivalent to the constant. */
1655 if (elt->is_const && classp && REG_P (classp->exp)
1656 && !REG_P (x))
1658 int exp_q = REG_QTY (REGNO (classp->exp));
1659 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1661 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1662 exp_ent->const_insn = this_insn;
1665 else if (REG_P (x)
1666 && classp
1667 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1668 && ! elt->is_const)
1670 struct table_elt *p;
1672 for (p = classp; p != 0; p = p->next_same_value)
1674 if (p->is_const && !REG_P (p->exp))
1676 int x_q = REG_QTY (REGNO (x));
1677 struct qty_table_elem *x_ent = &qty_table[x_q];
1679 x_ent->const_rtx
1680 = gen_lowpart (GET_MODE (x), p->exp);
1681 x_ent->const_insn = this_insn;
1682 break;
1687 else if (REG_P (x)
1688 && qty_table[REG_QTY (REGNO (x))].const_rtx
1689 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1690 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1692 /* If this is a constant with symbolic value,
1693 and it has a term with an explicit integer value,
1694 link it up with related expressions. */
1695 if (GET_CODE (x) == CONST)
1697 rtx subexp = get_related_value (x);
1698 unsigned subhash;
1699 struct table_elt *subelt, *subelt_prev;
1701 if (subexp != 0)
1703 /* Get the integer-free subexpression in the hash table. */
1704 subhash = SAFE_HASH (subexp, mode);
1705 subelt = lookup (subexp, subhash, mode);
1706 if (subelt == 0)
1707 subelt = insert (subexp, NULL, subhash, mode);
1708 /* Initialize SUBELT's circular chain if it has none. */
1709 if (subelt->related_value == 0)
1710 subelt->related_value = subelt;
1711 /* Find the element in the circular chain that precedes SUBELT. */
1712 subelt_prev = subelt;
1713 while (subelt_prev->related_value != subelt)
1714 subelt_prev = subelt_prev->related_value;
1715 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1716 This way the element that follows SUBELT is the oldest one. */
1717 elt->related_value = subelt_prev->related_value;
1718 subelt_prev->related_value = elt;
1722 return elt;
1725 /* Wrap insert_with_costs by passing the default costs. */
1727 static struct table_elt *
1728 insert (rtx x, struct table_elt *classp, unsigned int hash,
1729 machine_mode mode)
1731 return
1732 insert_with_costs (x, classp, hash, mode, COST (x), approx_reg_cost (x));
1736 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1737 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1738 the two classes equivalent.
1740 CLASS1 will be the surviving class; CLASS2 should not be used after this
1741 call.
1743 Any invalid entries in CLASS2 will not be copied. */
1745 static void
1746 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1748 struct table_elt *elt, *next, *new_elt;
1750 /* Ensure we start with the head of the classes. */
1751 class1 = class1->first_same_value;
1752 class2 = class2->first_same_value;
1754 /* If they were already equal, forget it. */
1755 if (class1 == class2)
1756 return;
1758 for (elt = class2; elt; elt = next)
1760 unsigned int hash;
1761 rtx exp = elt->exp;
1762 machine_mode mode = elt->mode;
1764 next = elt->next_same_value;
1766 /* Remove old entry, make a new one in CLASS1's class.
1767 Don't do this for invalid entries as we cannot find their
1768 hash code (it also isn't necessary). */
1769 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1771 bool need_rehash = false;
1773 hash_arg_in_memory = 0;
1774 hash = HASH (exp, mode);
1776 if (REG_P (exp))
1778 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1779 delete_reg_equiv (REGNO (exp));
1782 if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1783 remove_pseudo_from_table (exp, hash);
1784 else
1785 remove_from_table (elt, hash);
1787 if (insert_regs (exp, class1, 0) || need_rehash)
1789 rehash_using_reg (exp);
1790 hash = HASH (exp, mode);
1792 new_elt = insert (exp, class1, hash, mode);
1793 new_elt->in_memory = hash_arg_in_memory;
1798 /* Flush the entire hash table. */
1800 static void
1801 flush_hash_table (void)
1803 int i;
1804 struct table_elt *p;
1806 for (i = 0; i < HASH_SIZE; i++)
1807 for (p = table[i]; p; p = table[i])
1809 /* Note that invalidate can remove elements
1810 after P in the current hash chain. */
1811 if (REG_P (p->exp))
1812 invalidate (p->exp, VOIDmode);
1813 else
1814 remove_from_table (p, i);
1818 /* Check whether an anti dependence exists between X and EXP. MODE and
1819 ADDR are as for canon_anti_dependence. */
1821 static bool
1822 check_dependence (const_rtx x, rtx exp, machine_mode mode, rtx addr)
1824 subrtx_iterator::array_type array;
1825 FOR_EACH_SUBRTX (iter, array, x, NONCONST)
1827 const_rtx x = *iter;
1828 if (MEM_P (x) && canon_anti_dependence (x, true, exp, mode, addr))
1829 return true;
1831 return false;
1834 /* Remove from the hash table, or mark as invalid, all expressions whose
1835 values could be altered by storing in X. X is a register, a subreg, or
1836 a memory reference with nonvarying address (because, when a memory
1837 reference with a varying address is stored in, all memory references are
1838 removed by invalidate_memory so specific invalidation is superfluous).
1839 FULL_MODE, if not VOIDmode, indicates that this much should be
1840 invalidated instead of just the amount indicated by the mode of X. This
1841 is only used for bitfield stores into memory.
1843 A nonvarying address may be just a register or just a symbol reference,
1844 or it may be either of those plus a numeric offset. */
1846 static void
1847 invalidate (rtx x, machine_mode full_mode)
1849 int i;
1850 struct table_elt *p;
1851 rtx addr;
1853 switch (GET_CODE (x))
1855 case REG:
1857 /* If X is a register, dependencies on its contents are recorded
1858 through the qty number mechanism. Just change the qty number of
1859 the register, mark it as invalid for expressions that refer to it,
1860 and remove it itself. */
1861 unsigned int regno = REGNO (x);
1862 unsigned int hash = HASH (x, GET_MODE (x));
1864 /* Remove REGNO from any quantity list it might be on and indicate
1865 that its value might have changed. If it is a pseudo, remove its
1866 entry from the hash table.
1868 For a hard register, we do the first two actions above for any
1869 additional hard registers corresponding to X. Then, if any of these
1870 registers are in the table, we must remove any REG entries that
1871 overlap these registers. */
1873 delete_reg_equiv (regno);
1874 REG_TICK (regno)++;
1875 SUBREG_TICKED (regno) = -1;
1877 if (regno >= FIRST_PSEUDO_REGISTER)
1878 remove_pseudo_from_table (x, hash);
1879 else
1881 HOST_WIDE_INT in_table
1882 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1883 unsigned int endregno = END_HARD_REGNO (x);
1884 unsigned int tregno, tendregno, rn;
1885 struct table_elt *p, *next;
1887 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1889 for (rn = regno + 1; rn < endregno; rn++)
1891 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1892 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1893 delete_reg_equiv (rn);
1894 REG_TICK (rn)++;
1895 SUBREG_TICKED (rn) = -1;
1898 if (in_table)
1899 for (hash = 0; hash < HASH_SIZE; hash++)
1900 for (p = table[hash]; p; p = next)
1902 next = p->next_same_hash;
1904 if (!REG_P (p->exp)
1905 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1906 continue;
1908 tregno = REGNO (p->exp);
1909 tendregno = END_HARD_REGNO (p->exp);
1910 if (tendregno > regno && tregno < endregno)
1911 remove_from_table (p, hash);
1915 return;
1917 case SUBREG:
1918 invalidate (SUBREG_REG (x), VOIDmode);
1919 return;
1921 case PARALLEL:
1922 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1923 invalidate (XVECEXP (x, 0, i), VOIDmode);
1924 return;
1926 case EXPR_LIST:
1927 /* This is part of a disjoint return value; extract the location in
1928 question ignoring the offset. */
1929 invalidate (XEXP (x, 0), VOIDmode);
1930 return;
1932 case MEM:
1933 addr = canon_rtx (get_addr (XEXP (x, 0)));
1934 /* Calculate the canonical version of X here so that
1935 true_dependence doesn't generate new RTL for X on each call. */
1936 x = canon_rtx (x);
1938 /* Remove all hash table elements that refer to overlapping pieces of
1939 memory. */
1940 if (full_mode == VOIDmode)
1941 full_mode = GET_MODE (x);
1943 for (i = 0; i < HASH_SIZE; i++)
1945 struct table_elt *next;
1947 for (p = table[i]; p; p = next)
1949 next = p->next_same_hash;
1950 if (p->in_memory)
1952 /* Just canonicalize the expression once;
1953 otherwise each time we call invalidate
1954 true_dependence will canonicalize the
1955 expression again. */
1956 if (!p->canon_exp)
1957 p->canon_exp = canon_rtx (p->exp);
1958 if (check_dependence (p->canon_exp, x, full_mode, addr))
1959 remove_from_table (p, i);
1963 return;
1965 default:
1966 gcc_unreachable ();
1970 /* Remove all expressions that refer to register REGNO,
1971 since they are already invalid, and we are about to
1972 mark that register valid again and don't want the old
1973 expressions to reappear as valid. */
1975 static void
1976 remove_invalid_refs (unsigned int regno)
1978 unsigned int i;
1979 struct table_elt *p, *next;
1981 for (i = 0; i < HASH_SIZE; i++)
1982 for (p = table[i]; p; p = next)
1984 next = p->next_same_hash;
1985 if (!REG_P (p->exp)
1986 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1987 remove_from_table (p, i);
1991 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1992 and mode MODE. */
1993 static void
1994 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1995 machine_mode mode)
1997 unsigned int i;
1998 struct table_elt *p, *next;
1999 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
2001 for (i = 0; i < HASH_SIZE; i++)
2002 for (p = table[i]; p; p = next)
2004 rtx exp = p->exp;
2005 next = p->next_same_hash;
2007 if (!REG_P (exp)
2008 && (GET_CODE (exp) != SUBREG
2009 || !REG_P (SUBREG_REG (exp))
2010 || REGNO (SUBREG_REG (exp)) != regno
2011 || (((SUBREG_BYTE (exp)
2012 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
2013 && SUBREG_BYTE (exp) <= end))
2014 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
2015 remove_from_table (p, i);
2019 /* Recompute the hash codes of any valid entries in the hash table that
2020 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2022 This is called when we make a jump equivalence. */
2024 static void
2025 rehash_using_reg (rtx x)
2027 unsigned int i;
2028 struct table_elt *p, *next;
2029 unsigned hash;
2031 if (GET_CODE (x) == SUBREG)
2032 x = SUBREG_REG (x);
2034 /* If X is not a register or if the register is known not to be in any
2035 valid entries in the table, we have no work to do. */
2037 if (!REG_P (x)
2038 || REG_IN_TABLE (REGNO (x)) < 0
2039 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2040 return;
2042 /* Scan all hash chains looking for valid entries that mention X.
2043 If we find one and it is in the wrong hash chain, move it. */
2045 for (i = 0; i < HASH_SIZE; i++)
2046 for (p = table[i]; p; p = next)
2048 next = p->next_same_hash;
2049 if (reg_mentioned_p (x, p->exp)
2050 && exp_equiv_p (p->exp, p->exp, 1, false)
2051 && i != (hash = SAFE_HASH (p->exp, p->mode)))
2053 if (p->next_same_hash)
2054 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2056 if (p->prev_same_hash)
2057 p->prev_same_hash->next_same_hash = p->next_same_hash;
2058 else
2059 table[i] = p->next_same_hash;
2061 p->next_same_hash = table[hash];
2062 p->prev_same_hash = 0;
2063 if (table[hash])
2064 table[hash]->prev_same_hash = p;
2065 table[hash] = p;
2070 /* Remove from the hash table any expression that is a call-clobbered
2071 register. Also update their TICK values. */
2073 static void
2074 invalidate_for_call (void)
2076 unsigned int regno, endregno;
2077 unsigned int i;
2078 unsigned hash;
2079 struct table_elt *p, *next;
2080 int in_table = 0;
2081 hard_reg_set_iterator hrsi;
2083 /* Go through all the hard registers. For each that is clobbered in
2084 a CALL_INSN, remove the register from quantity chains and update
2085 reg_tick if defined. Also see if any of these registers is currently
2086 in the table. */
2087 EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call, 0, regno, hrsi)
2089 delete_reg_equiv (regno);
2090 if (REG_TICK (regno) >= 0)
2092 REG_TICK (regno)++;
2093 SUBREG_TICKED (regno) = -1;
2095 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2098 /* In the case where we have no call-clobbered hard registers in the
2099 table, we are done. Otherwise, scan the table and remove any
2100 entry that overlaps a call-clobbered register. */
2102 if (in_table)
2103 for (hash = 0; hash < HASH_SIZE; hash++)
2104 for (p = table[hash]; p; p = next)
2106 next = p->next_same_hash;
2108 if (!REG_P (p->exp)
2109 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2110 continue;
2112 regno = REGNO (p->exp);
2113 endregno = END_HARD_REGNO (p->exp);
2115 for (i = regno; i < endregno; i++)
2116 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2118 remove_from_table (p, hash);
2119 break;
2124 /* Given an expression X of type CONST,
2125 and ELT which is its table entry (or 0 if it
2126 is not in the hash table),
2127 return an alternate expression for X as a register plus integer.
2128 If none can be found, return 0. */
2130 static rtx
2131 use_related_value (rtx x, struct table_elt *elt)
2133 struct table_elt *relt = 0;
2134 struct table_elt *p, *q;
2135 HOST_WIDE_INT offset;
2137 /* First, is there anything related known?
2138 If we have a table element, we can tell from that.
2139 Otherwise, must look it up. */
2141 if (elt != 0 && elt->related_value != 0)
2142 relt = elt;
2143 else if (elt == 0 && GET_CODE (x) == CONST)
2145 rtx subexp = get_related_value (x);
2146 if (subexp != 0)
2147 relt = lookup (subexp,
2148 SAFE_HASH (subexp, GET_MODE (subexp)),
2149 GET_MODE (subexp));
2152 if (relt == 0)
2153 return 0;
2155 /* Search all related table entries for one that has an
2156 equivalent register. */
2158 p = relt;
2159 while (1)
2161 /* This loop is strange in that it is executed in two different cases.
2162 The first is when X is already in the table. Then it is searching
2163 the RELATED_VALUE list of X's class (RELT). The second case is when
2164 X is not in the table. Then RELT points to a class for the related
2165 value.
2167 Ensure that, whatever case we are in, that we ignore classes that have
2168 the same value as X. */
2170 if (rtx_equal_p (x, p->exp))
2171 q = 0;
2172 else
2173 for (q = p->first_same_value; q; q = q->next_same_value)
2174 if (REG_P (q->exp))
2175 break;
2177 if (q)
2178 break;
2180 p = p->related_value;
2182 /* We went all the way around, so there is nothing to be found.
2183 Alternatively, perhaps RELT was in the table for some other reason
2184 and it has no related values recorded. */
2185 if (p == relt || p == 0)
2186 break;
2189 if (q == 0)
2190 return 0;
2192 offset = (get_integer_term (x) - get_integer_term (p->exp));
2193 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2194 return plus_constant (q->mode, q->exp, offset);
2198 /* Hash a string. Just add its bytes up. */
2199 static inline unsigned
2200 hash_rtx_string (const char *ps)
2202 unsigned hash = 0;
2203 const unsigned char *p = (const unsigned char *) ps;
2205 if (p)
2206 while (*p)
2207 hash += *p++;
2209 return hash;
2212 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2213 When the callback returns true, we continue with the new rtx. */
2215 unsigned
2216 hash_rtx_cb (const_rtx x, machine_mode mode,
2217 int *do_not_record_p, int *hash_arg_in_memory_p,
2218 bool have_reg_qty, hash_rtx_callback_function cb)
2220 int i, j;
2221 unsigned hash = 0;
2222 enum rtx_code code;
2223 const char *fmt;
2224 machine_mode newmode;
2225 rtx newx;
2227 /* Used to turn recursion into iteration. We can't rely on GCC's
2228 tail-recursion elimination since we need to keep accumulating values
2229 in HASH. */
2230 repeat:
2231 if (x == 0)
2232 return hash;
2234 /* Invoke the callback first. */
2235 if (cb != NULL
2236 && ((*cb) (x, mode, &newx, &newmode)))
2238 hash += hash_rtx_cb (newx, newmode, do_not_record_p,
2239 hash_arg_in_memory_p, have_reg_qty, cb);
2240 return hash;
2243 code = GET_CODE (x);
2244 switch (code)
2246 case REG:
2248 unsigned int regno = REGNO (x);
2250 if (do_not_record_p && !reload_completed)
2252 /* On some machines, we can't record any non-fixed hard register,
2253 because extending its life will cause reload problems. We
2254 consider ap, fp, sp, gp to be fixed for this purpose.
2256 We also consider CCmode registers to be fixed for this purpose;
2257 failure to do so leads to failure to simplify 0<100 type of
2258 conditionals.
2260 On all machines, we can't record any global registers.
2261 Nor should we record any register that is in a small
2262 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2263 bool record;
2265 if (regno >= FIRST_PSEUDO_REGISTER)
2266 record = true;
2267 else if (x == frame_pointer_rtx
2268 || x == hard_frame_pointer_rtx
2269 || x == arg_pointer_rtx
2270 || x == stack_pointer_rtx
2271 || x == pic_offset_table_rtx)
2272 record = true;
2273 else if (global_regs[regno])
2274 record = false;
2275 else if (fixed_regs[regno])
2276 record = true;
2277 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2278 record = true;
2279 else if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
2280 record = false;
2281 else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
2282 record = false;
2283 else
2284 record = true;
2286 if (!record)
2288 *do_not_record_p = 1;
2289 return 0;
2293 hash += ((unsigned int) REG << 7);
2294 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2295 return hash;
2298 /* We handle SUBREG of a REG specially because the underlying
2299 reg changes its hash value with every value change; we don't
2300 want to have to forget unrelated subregs when one subreg changes. */
2301 case SUBREG:
2303 if (REG_P (SUBREG_REG (x)))
2305 hash += (((unsigned int) SUBREG << 7)
2306 + REGNO (SUBREG_REG (x))
2307 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2308 return hash;
2310 break;
2313 case CONST_INT:
2314 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2315 + (unsigned int) INTVAL (x));
2316 return hash;
2318 case CONST_WIDE_INT:
2319 for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
2320 hash += CONST_WIDE_INT_ELT (x, i);
2321 return hash;
2323 case CONST_DOUBLE:
2324 /* This is like the general case, except that it only counts
2325 the integers representing the constant. */
2326 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2327 if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode)
2328 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2329 + (unsigned int) CONST_DOUBLE_HIGH (x));
2330 else
2331 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2332 return hash;
2334 case CONST_FIXED:
2335 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2336 hash += fixed_hash (CONST_FIXED_VALUE (x));
2337 return hash;
2339 case CONST_VECTOR:
2341 int units;
2342 rtx elt;
2344 units = CONST_VECTOR_NUNITS (x);
2346 for (i = 0; i < units; ++i)
2348 elt = CONST_VECTOR_ELT (x, i);
2349 hash += hash_rtx_cb (elt, GET_MODE (elt),
2350 do_not_record_p, hash_arg_in_memory_p,
2351 have_reg_qty, cb);
2354 return hash;
2357 /* Assume there is only one rtx object for any given label. */
2358 case LABEL_REF:
2359 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2360 differences and differences between each stage's debugging dumps. */
2361 hash += (((unsigned int) LABEL_REF << 7)
2362 + CODE_LABEL_NUMBER (LABEL_REF_LABEL (x)));
2363 return hash;
2365 case SYMBOL_REF:
2367 /* Don't hash on the symbol's address to avoid bootstrap differences.
2368 Different hash values may cause expressions to be recorded in
2369 different orders and thus different registers to be used in the
2370 final assembler. This also avoids differences in the dump files
2371 between various stages. */
2372 unsigned int h = 0;
2373 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2375 while (*p)
2376 h += (h << 7) + *p++; /* ??? revisit */
2378 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2379 return hash;
2382 case MEM:
2383 /* We don't record if marked volatile or if BLKmode since we don't
2384 know the size of the move. */
2385 if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2387 *do_not_record_p = 1;
2388 return 0;
2390 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2391 *hash_arg_in_memory_p = 1;
2393 /* Now that we have already found this special case,
2394 might as well speed it up as much as possible. */
2395 hash += (unsigned) MEM;
2396 x = XEXP (x, 0);
2397 goto repeat;
2399 case USE:
2400 /* A USE that mentions non-volatile memory needs special
2401 handling since the MEM may be BLKmode which normally
2402 prevents an entry from being made. Pure calls are
2403 marked by a USE which mentions BLKmode memory.
2404 See calls.c:emit_call_1. */
2405 if (MEM_P (XEXP (x, 0))
2406 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2408 hash += (unsigned) USE;
2409 x = XEXP (x, 0);
2411 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2412 *hash_arg_in_memory_p = 1;
2414 /* Now that we have already found this special case,
2415 might as well speed it up as much as possible. */
2416 hash += (unsigned) MEM;
2417 x = XEXP (x, 0);
2418 goto repeat;
2420 break;
2422 case PRE_DEC:
2423 case PRE_INC:
2424 case POST_DEC:
2425 case POST_INC:
2426 case PRE_MODIFY:
2427 case POST_MODIFY:
2428 case PC:
2429 case CC0:
2430 case CALL:
2431 case UNSPEC_VOLATILE:
2432 if (do_not_record_p) {
2433 *do_not_record_p = 1;
2434 return 0;
2436 else
2437 return hash;
2438 break;
2440 case ASM_OPERANDS:
2441 if (do_not_record_p && MEM_VOLATILE_P (x))
2443 *do_not_record_p = 1;
2444 return 0;
2446 else
2448 /* We don't want to take the filename and line into account. */
2449 hash += (unsigned) code + (unsigned) GET_MODE (x)
2450 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2451 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2452 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2454 if (ASM_OPERANDS_INPUT_LENGTH (x))
2456 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2458 hash += (hash_rtx_cb (ASM_OPERANDS_INPUT (x, i),
2459 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2460 do_not_record_p, hash_arg_in_memory_p,
2461 have_reg_qty, cb)
2462 + hash_rtx_string
2463 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2466 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2467 x = ASM_OPERANDS_INPUT (x, 0);
2468 mode = GET_MODE (x);
2469 goto repeat;
2472 return hash;
2474 break;
2476 default:
2477 break;
2480 i = GET_RTX_LENGTH (code) - 1;
2481 hash += (unsigned) code + (unsigned) GET_MODE (x);
2482 fmt = GET_RTX_FORMAT (code);
2483 for (; i >= 0; i--)
2485 switch (fmt[i])
2487 case 'e':
2488 /* If we are about to do the last recursive call
2489 needed at this level, change it into iteration.
2490 This function is called enough to be worth it. */
2491 if (i == 0)
2493 x = XEXP (x, i);
2494 goto repeat;
2497 hash += hash_rtx_cb (XEXP (x, i), VOIDmode, do_not_record_p,
2498 hash_arg_in_memory_p,
2499 have_reg_qty, cb);
2500 break;
2502 case 'E':
2503 for (j = 0; j < XVECLEN (x, i); j++)
2504 hash += hash_rtx_cb (XVECEXP (x, i, j), VOIDmode, do_not_record_p,
2505 hash_arg_in_memory_p,
2506 have_reg_qty, cb);
2507 break;
2509 case 's':
2510 hash += hash_rtx_string (XSTR (x, i));
2511 break;
2513 case 'i':
2514 hash += (unsigned int) XINT (x, i);
2515 break;
2517 case '0': case 't':
2518 /* Unused. */
2519 break;
2521 default:
2522 gcc_unreachable ();
2526 return hash;
2529 /* Hash an rtx. We are careful to make sure the value is never negative.
2530 Equivalent registers hash identically.
2531 MODE is used in hashing for CONST_INTs only;
2532 otherwise the mode of X is used.
2534 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2536 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2537 a MEM rtx which does not have the MEM_READONLY_P flag set.
2539 Note that cse_insn knows that the hash code of a MEM expression
2540 is just (int) MEM plus the hash code of the address. */
2542 unsigned
2543 hash_rtx (const_rtx x, machine_mode mode, int *do_not_record_p,
2544 int *hash_arg_in_memory_p, bool have_reg_qty)
2546 return hash_rtx_cb (x, mode, do_not_record_p,
2547 hash_arg_in_memory_p, have_reg_qty, NULL);
2550 /* Hash an rtx X for cse via hash_rtx.
2551 Stores 1 in do_not_record if any subexpression is volatile.
2552 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2553 does not have the MEM_READONLY_P flag set. */
2555 static inline unsigned
2556 canon_hash (rtx x, machine_mode mode)
2558 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2561 /* Like canon_hash but with no side effects, i.e. do_not_record
2562 and hash_arg_in_memory are not changed. */
2564 static inline unsigned
2565 safe_hash (rtx x, machine_mode mode)
2567 int dummy_do_not_record;
2568 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2571 /* Return 1 iff X and Y would canonicalize into the same thing,
2572 without actually constructing the canonicalization of either one.
2573 If VALIDATE is nonzero,
2574 we assume X is an expression being processed from the rtl
2575 and Y was found in the hash table. We check register refs
2576 in Y for being marked as valid.
2578 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2581 exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2583 int i, j;
2584 enum rtx_code code;
2585 const char *fmt;
2587 /* Note: it is incorrect to assume an expression is equivalent to itself
2588 if VALIDATE is nonzero. */
2589 if (x == y && !validate)
2590 return 1;
2592 if (x == 0 || y == 0)
2593 return x == y;
2595 code = GET_CODE (x);
2596 if (code != GET_CODE (y))
2597 return 0;
2599 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2600 if (GET_MODE (x) != GET_MODE (y))
2601 return 0;
2603 /* MEMs referring to different address space are not equivalent. */
2604 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2605 return 0;
2607 switch (code)
2609 case PC:
2610 case CC0:
2611 CASE_CONST_UNIQUE:
2612 return x == y;
2614 case LABEL_REF:
2615 return LABEL_REF_LABEL (x) == LABEL_REF_LABEL (y);
2617 case SYMBOL_REF:
2618 return XSTR (x, 0) == XSTR (y, 0);
2620 case REG:
2621 if (for_gcse)
2622 return REGNO (x) == REGNO (y);
2623 else
2625 unsigned int regno = REGNO (y);
2626 unsigned int i;
2627 unsigned int endregno = END_REGNO (y);
2629 /* If the quantities are not the same, the expressions are not
2630 equivalent. If there are and we are not to validate, they
2631 are equivalent. Otherwise, ensure all regs are up-to-date. */
2633 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2634 return 0;
2636 if (! validate)
2637 return 1;
2639 for (i = regno; i < endregno; i++)
2640 if (REG_IN_TABLE (i) != REG_TICK (i))
2641 return 0;
2643 return 1;
2646 case MEM:
2647 if (for_gcse)
2649 /* A volatile mem should not be considered equivalent to any
2650 other. */
2651 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2652 return 0;
2654 /* Can't merge two expressions in different alias sets, since we
2655 can decide that the expression is transparent in a block when
2656 it isn't, due to it being set with the different alias set.
2658 Also, can't merge two expressions with different MEM_ATTRS.
2659 They could e.g. be two different entities allocated into the
2660 same space on the stack (see e.g. PR25130). In that case, the
2661 MEM addresses can be the same, even though the two MEMs are
2662 absolutely not equivalent.
2664 But because really all MEM attributes should be the same for
2665 equivalent MEMs, we just use the invariant that MEMs that have
2666 the same attributes share the same mem_attrs data structure. */
2667 if (!mem_attrs_eq_p (MEM_ATTRS (x), MEM_ATTRS (y)))
2668 return 0;
2670 /* If we are handling exceptions, we cannot consider two expressions
2671 with different trapping status as equivalent, because simple_mem
2672 might accept one and reject the other. */
2673 if (cfun->can_throw_non_call_exceptions
2674 && (MEM_NOTRAP_P (x) != MEM_NOTRAP_P (y)))
2675 return 0;
2677 break;
2679 /* For commutative operations, check both orders. */
2680 case PLUS:
2681 case MULT:
2682 case AND:
2683 case IOR:
2684 case XOR:
2685 case NE:
2686 case EQ:
2687 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2688 validate, for_gcse)
2689 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2690 validate, for_gcse))
2691 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2692 validate, for_gcse)
2693 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2694 validate, for_gcse)));
2696 case ASM_OPERANDS:
2697 /* We don't use the generic code below because we want to
2698 disregard filename and line numbers. */
2700 /* A volatile asm isn't equivalent to any other. */
2701 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2702 return 0;
2704 if (GET_MODE (x) != GET_MODE (y)
2705 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2706 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2707 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2708 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2709 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2710 return 0;
2712 if (ASM_OPERANDS_INPUT_LENGTH (x))
2714 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2715 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2716 ASM_OPERANDS_INPUT (y, i),
2717 validate, for_gcse)
2718 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2719 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2720 return 0;
2723 return 1;
2725 default:
2726 break;
2729 /* Compare the elements. If any pair of corresponding elements
2730 fail to match, return 0 for the whole thing. */
2732 fmt = GET_RTX_FORMAT (code);
2733 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2735 switch (fmt[i])
2737 case 'e':
2738 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2739 validate, for_gcse))
2740 return 0;
2741 break;
2743 case 'E':
2744 if (XVECLEN (x, i) != XVECLEN (y, i))
2745 return 0;
2746 for (j = 0; j < XVECLEN (x, i); j++)
2747 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2748 validate, for_gcse))
2749 return 0;
2750 break;
2752 case 's':
2753 if (strcmp (XSTR (x, i), XSTR (y, i)))
2754 return 0;
2755 break;
2757 case 'i':
2758 if (XINT (x, i) != XINT (y, i))
2759 return 0;
2760 break;
2762 case 'w':
2763 if (XWINT (x, i) != XWINT (y, i))
2764 return 0;
2765 break;
2767 case '0':
2768 case 't':
2769 break;
2771 default:
2772 gcc_unreachable ();
2776 return 1;
2779 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2780 the result if necessary. INSN is as for canon_reg. */
2782 static void
2783 validate_canon_reg (rtx *xloc, rtx_insn *insn)
2785 if (*xloc)
2787 rtx new_rtx = canon_reg (*xloc, insn);
2789 /* If replacing pseudo with hard reg or vice versa, ensure the
2790 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2791 gcc_assert (insn && new_rtx);
2792 validate_change (insn, xloc, new_rtx, 1);
2796 /* Canonicalize an expression:
2797 replace each register reference inside it
2798 with the "oldest" equivalent register.
2800 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2801 after we make our substitution. The calls are made with IN_GROUP nonzero
2802 so apply_change_group must be called upon the outermost return from this
2803 function (unless INSN is zero). The result of apply_change_group can
2804 generally be discarded since the changes we are making are optional. */
2806 static rtx
2807 canon_reg (rtx x, rtx_insn *insn)
2809 int i;
2810 enum rtx_code code;
2811 const char *fmt;
2813 if (x == 0)
2814 return x;
2816 code = GET_CODE (x);
2817 switch (code)
2819 case PC:
2820 case CC0:
2821 case CONST:
2822 CASE_CONST_ANY:
2823 case SYMBOL_REF:
2824 case LABEL_REF:
2825 case ADDR_VEC:
2826 case ADDR_DIFF_VEC:
2827 return x;
2829 case REG:
2831 int first;
2832 int q;
2833 struct qty_table_elem *ent;
2835 /* Never replace a hard reg, because hard regs can appear
2836 in more than one machine mode, and we must preserve the mode
2837 of each occurrence. Also, some hard regs appear in
2838 MEMs that are shared and mustn't be altered. Don't try to
2839 replace any reg that maps to a reg of class NO_REGS. */
2840 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2841 || ! REGNO_QTY_VALID_P (REGNO (x)))
2842 return x;
2844 q = REG_QTY (REGNO (x));
2845 ent = &qty_table[q];
2846 first = ent->first_reg;
2847 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2848 : REGNO_REG_CLASS (first) == NO_REGS ? x
2849 : gen_rtx_REG (ent->mode, first));
2852 default:
2853 break;
2856 fmt = GET_RTX_FORMAT (code);
2857 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2859 int j;
2861 if (fmt[i] == 'e')
2862 validate_canon_reg (&XEXP (x, i), insn);
2863 else if (fmt[i] == 'E')
2864 for (j = 0; j < XVECLEN (x, i); j++)
2865 validate_canon_reg (&XVECEXP (x, i, j), insn);
2868 return x;
2871 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2872 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2873 what values are being compared.
2875 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2876 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2877 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2878 compared to produce cc0.
2880 The return value is the comparison operator and is either the code of
2881 A or the code corresponding to the inverse of the comparison. */
2883 static enum rtx_code
2884 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2885 machine_mode *pmode1, machine_mode *pmode2)
2887 rtx arg1, arg2;
2888 hash_set<rtx> *visited = NULL;
2889 /* Set nonzero when we find something of interest. */
2890 rtx x = NULL;
2892 arg1 = *parg1, arg2 = *parg2;
2894 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2896 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2898 int reverse_code = 0;
2899 struct table_elt *p = 0;
2901 /* Remember state from previous iteration. */
2902 if (x)
2904 if (!visited)
2905 visited = new hash_set<rtx>;
2906 visited->add (x);
2907 x = 0;
2910 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2911 On machines with CC0, this is the only case that can occur, since
2912 fold_rtx will return the COMPARE or item being compared with zero
2913 when given CC0. */
2915 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2916 x = arg1;
2918 /* If ARG1 is a comparison operator and CODE is testing for
2919 STORE_FLAG_VALUE, get the inner arguments. */
2921 else if (COMPARISON_P (arg1))
2923 #ifdef FLOAT_STORE_FLAG_VALUE
2924 REAL_VALUE_TYPE fsfv;
2925 #endif
2927 if (code == NE
2928 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2929 && code == LT && STORE_FLAG_VALUE == -1)
2930 #ifdef FLOAT_STORE_FLAG_VALUE
2931 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2932 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2933 REAL_VALUE_NEGATIVE (fsfv)))
2934 #endif
2936 x = arg1;
2937 else if (code == EQ
2938 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2939 && code == GE && STORE_FLAG_VALUE == -1)
2940 #ifdef FLOAT_STORE_FLAG_VALUE
2941 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2942 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2943 REAL_VALUE_NEGATIVE (fsfv)))
2944 #endif
2946 x = arg1, reverse_code = 1;
2949 /* ??? We could also check for
2951 (ne (and (eq (...) (const_int 1))) (const_int 0))
2953 and related forms, but let's wait until we see them occurring. */
2955 if (x == 0)
2956 /* Look up ARG1 in the hash table and see if it has an equivalence
2957 that lets us see what is being compared. */
2958 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
2959 if (p)
2961 p = p->first_same_value;
2963 /* If what we compare is already known to be constant, that is as
2964 good as it gets.
2965 We need to break the loop in this case, because otherwise we
2966 can have an infinite loop when looking at a reg that is known
2967 to be a constant which is the same as a comparison of a reg
2968 against zero which appears later in the insn stream, which in
2969 turn is constant and the same as the comparison of the first reg
2970 against zero... */
2971 if (p->is_const)
2972 break;
2975 for (; p; p = p->next_same_value)
2977 machine_mode inner_mode = GET_MODE (p->exp);
2978 #ifdef FLOAT_STORE_FLAG_VALUE
2979 REAL_VALUE_TYPE fsfv;
2980 #endif
2982 /* If the entry isn't valid, skip it. */
2983 if (! exp_equiv_p (p->exp, p->exp, 1, false))
2984 continue;
2986 /* If it's a comparison we've used before, skip it. */
2987 if (visited && visited->contains (p->exp))
2988 continue;
2990 if (GET_CODE (p->exp) == COMPARE
2991 /* Another possibility is that this machine has a compare insn
2992 that includes the comparison code. In that case, ARG1 would
2993 be equivalent to a comparison operation that would set ARG1 to
2994 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2995 ORIG_CODE is the actual comparison being done; if it is an EQ,
2996 we must reverse ORIG_CODE. On machine with a negative value
2997 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2998 || ((code == NE
2999 || (code == LT
3000 && val_signbit_known_set_p (inner_mode,
3001 STORE_FLAG_VALUE))
3002 #ifdef FLOAT_STORE_FLAG_VALUE
3003 || (code == LT
3004 && SCALAR_FLOAT_MODE_P (inner_mode)
3005 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3006 REAL_VALUE_NEGATIVE (fsfv)))
3007 #endif
3009 && COMPARISON_P (p->exp)))
3011 x = p->exp;
3012 break;
3014 else if ((code == EQ
3015 || (code == GE
3016 && val_signbit_known_set_p (inner_mode,
3017 STORE_FLAG_VALUE))
3018 #ifdef FLOAT_STORE_FLAG_VALUE
3019 || (code == GE
3020 && SCALAR_FLOAT_MODE_P (inner_mode)
3021 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3022 REAL_VALUE_NEGATIVE (fsfv)))
3023 #endif
3025 && COMPARISON_P (p->exp))
3027 reverse_code = 1;
3028 x = p->exp;
3029 break;
3032 /* If this non-trapping address, e.g. fp + constant, the
3033 equivalent is a better operand since it may let us predict
3034 the value of the comparison. */
3035 else if (!rtx_addr_can_trap_p (p->exp))
3037 arg1 = p->exp;
3038 continue;
3042 /* If we didn't find a useful equivalence for ARG1, we are done.
3043 Otherwise, set up for the next iteration. */
3044 if (x == 0)
3045 break;
3047 /* If we need to reverse the comparison, make sure that that is
3048 possible -- we can't necessarily infer the value of GE from LT
3049 with floating-point operands. */
3050 if (reverse_code)
3052 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3053 if (reversed == UNKNOWN)
3054 break;
3055 else
3056 code = reversed;
3058 else if (COMPARISON_P (x))
3059 code = GET_CODE (x);
3060 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3063 /* Return our results. Return the modes from before fold_rtx
3064 because fold_rtx might produce const_int, and then it's too late. */
3065 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3066 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3068 if (visited)
3069 delete visited;
3070 return code;
3073 /* If X is a nontrivial arithmetic operation on an argument for which
3074 a constant value can be determined, return the result of operating
3075 on that value, as a constant. Otherwise, return X, possibly with
3076 one or more operands changed to a forward-propagated constant.
3078 If X is a register whose contents are known, we do NOT return
3079 those contents here; equiv_constant is called to perform that task.
3080 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3082 INSN is the insn that we may be modifying. If it is 0, make a copy
3083 of X before modifying it. */
3085 static rtx
3086 fold_rtx (rtx x, rtx_insn *insn)
3088 enum rtx_code code;
3089 machine_mode mode;
3090 const char *fmt;
3091 int i;
3092 rtx new_rtx = 0;
3093 int changed = 0;
3095 /* Operands of X. */
3096 rtx folded_arg0;
3097 rtx folded_arg1;
3099 /* Constant equivalents of first three operands of X;
3100 0 when no such equivalent is known. */
3101 rtx const_arg0;
3102 rtx const_arg1;
3103 rtx const_arg2;
3105 /* The mode of the first operand of X. We need this for sign and zero
3106 extends. */
3107 machine_mode mode_arg0;
3109 if (x == 0)
3110 return x;
3112 /* Try to perform some initial simplifications on X. */
3113 code = GET_CODE (x);
3114 switch (code)
3116 case MEM:
3117 case SUBREG:
3118 if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3119 return new_rtx;
3120 return x;
3122 case CONST:
3123 CASE_CONST_ANY:
3124 case SYMBOL_REF:
3125 case LABEL_REF:
3126 case REG:
3127 case PC:
3128 /* No use simplifying an EXPR_LIST
3129 since they are used only for lists of args
3130 in a function call's REG_EQUAL note. */
3131 case EXPR_LIST:
3132 return x;
3134 #ifdef HAVE_cc0
3135 case CC0:
3136 return prev_insn_cc0;
3137 #endif
3139 case ASM_OPERANDS:
3140 if (insn)
3142 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3143 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3144 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3146 return x;
3148 #ifdef NO_FUNCTION_CSE
3149 case CALL:
3150 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3151 return x;
3152 break;
3153 #endif
3155 /* Anything else goes through the loop below. */
3156 default:
3157 break;
3160 mode = GET_MODE (x);
3161 const_arg0 = 0;
3162 const_arg1 = 0;
3163 const_arg2 = 0;
3164 mode_arg0 = VOIDmode;
3166 /* Try folding our operands.
3167 Then see which ones have constant values known. */
3169 fmt = GET_RTX_FORMAT (code);
3170 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3171 if (fmt[i] == 'e')
3173 rtx folded_arg = XEXP (x, i), const_arg;
3174 machine_mode mode_arg = GET_MODE (folded_arg);
3176 switch (GET_CODE (folded_arg))
3178 case MEM:
3179 case REG:
3180 case SUBREG:
3181 const_arg = equiv_constant (folded_arg);
3182 break;
3184 case CONST:
3185 CASE_CONST_ANY:
3186 case SYMBOL_REF:
3187 case LABEL_REF:
3188 const_arg = folded_arg;
3189 break;
3191 #ifdef HAVE_cc0
3192 case CC0:
3193 /* The cc0-user and cc0-setter may be in different blocks if
3194 the cc0-setter potentially traps. In that case PREV_INSN_CC0
3195 will have been cleared as we exited the block with the
3196 setter.
3198 While we could potentially track cc0 in this case, it just
3199 doesn't seem to be worth it given that cc0 targets are not
3200 terribly common or important these days and trapping math
3201 is rarely used. The combination of those two conditions
3202 necessary to trip this situation is exceedingly rare in the
3203 real world. */
3204 if (!prev_insn_cc0)
3206 const_arg = NULL_RTX;
3208 else
3210 folded_arg = prev_insn_cc0;
3211 mode_arg = prev_insn_cc0_mode;
3212 const_arg = equiv_constant (folded_arg);
3214 break;
3215 #endif
3217 default:
3218 folded_arg = fold_rtx (folded_arg, insn);
3219 const_arg = equiv_constant (folded_arg);
3220 break;
3223 /* For the first three operands, see if the operand
3224 is constant or equivalent to a constant. */
3225 switch (i)
3227 case 0:
3228 folded_arg0 = folded_arg;
3229 const_arg0 = const_arg;
3230 mode_arg0 = mode_arg;
3231 break;
3232 case 1:
3233 folded_arg1 = folded_arg;
3234 const_arg1 = const_arg;
3235 break;
3236 case 2:
3237 const_arg2 = const_arg;
3238 break;
3241 /* Pick the least expensive of the argument and an equivalent constant
3242 argument. */
3243 if (const_arg != 0
3244 && const_arg != folded_arg
3245 && COST_IN (const_arg, code, i) <= COST_IN (folded_arg, code, i)
3247 /* It's not safe to substitute the operand of a conversion
3248 operator with a constant, as the conversion's identity
3249 depends upon the mode of its operand. This optimization
3250 is handled by the call to simplify_unary_operation. */
3251 && (GET_RTX_CLASS (code) != RTX_UNARY
3252 || GET_MODE (const_arg) == mode_arg0
3253 || (code != ZERO_EXTEND
3254 && code != SIGN_EXTEND
3255 && code != TRUNCATE
3256 && code != FLOAT_TRUNCATE
3257 && code != FLOAT_EXTEND
3258 && code != FLOAT
3259 && code != FIX
3260 && code != UNSIGNED_FLOAT
3261 && code != UNSIGNED_FIX)))
3262 folded_arg = const_arg;
3264 if (folded_arg == XEXP (x, i))
3265 continue;
3267 if (insn == NULL_RTX && !changed)
3268 x = copy_rtx (x);
3269 changed = 1;
3270 validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3273 if (changed)
3275 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3276 consistent with the order in X. */
3277 if (canonicalize_change_group (insn, x))
3279 rtx tem;
3280 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3281 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3284 apply_change_group ();
3287 /* If X is an arithmetic operation, see if we can simplify it. */
3289 switch (GET_RTX_CLASS (code))
3291 case RTX_UNARY:
3293 /* We can't simplify extension ops unless we know the
3294 original mode. */
3295 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3296 && mode_arg0 == VOIDmode)
3297 break;
3299 new_rtx = simplify_unary_operation (code, mode,
3300 const_arg0 ? const_arg0 : folded_arg0,
3301 mode_arg0);
3303 break;
3305 case RTX_COMPARE:
3306 case RTX_COMM_COMPARE:
3307 /* See what items are actually being compared and set FOLDED_ARG[01]
3308 to those values and CODE to the actual comparison code. If any are
3309 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3310 do anything if both operands are already known to be constant. */
3312 /* ??? Vector mode comparisons are not supported yet. */
3313 if (VECTOR_MODE_P (mode))
3314 break;
3316 if (const_arg0 == 0 || const_arg1 == 0)
3318 struct table_elt *p0, *p1;
3319 rtx true_rtx, false_rtx;
3320 machine_mode mode_arg1;
3322 if (SCALAR_FLOAT_MODE_P (mode))
3324 #ifdef FLOAT_STORE_FLAG_VALUE
3325 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3326 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3327 #else
3328 true_rtx = NULL_RTX;
3329 #endif
3330 false_rtx = CONST0_RTX (mode);
3332 else
3334 true_rtx = const_true_rtx;
3335 false_rtx = const0_rtx;
3338 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3339 &mode_arg0, &mode_arg1);
3341 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3342 what kinds of things are being compared, so we can't do
3343 anything with this comparison. */
3345 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3346 break;
3348 const_arg0 = equiv_constant (folded_arg0);
3349 const_arg1 = equiv_constant (folded_arg1);
3351 /* If we do not now have two constants being compared, see
3352 if we can nevertheless deduce some things about the
3353 comparison. */
3354 if (const_arg0 == 0 || const_arg1 == 0)
3356 if (const_arg1 != NULL)
3358 rtx cheapest_simplification;
3359 int cheapest_cost;
3360 rtx simp_result;
3361 struct table_elt *p;
3363 /* See if we can find an equivalent of folded_arg0
3364 that gets us a cheaper expression, possibly a
3365 constant through simplifications. */
3366 p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3367 mode_arg0);
3369 if (p != NULL)
3371 cheapest_simplification = x;
3372 cheapest_cost = COST (x);
3374 for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3376 int cost;
3378 /* If the entry isn't valid, skip it. */
3379 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3380 continue;
3382 /* Try to simplify using this equivalence. */
3383 simp_result
3384 = simplify_relational_operation (code, mode,
3385 mode_arg0,
3386 p->exp,
3387 const_arg1);
3389 if (simp_result == NULL)
3390 continue;
3392 cost = COST (simp_result);
3393 if (cost < cheapest_cost)
3395 cheapest_cost = cost;
3396 cheapest_simplification = simp_result;
3400 /* If we have a cheaper expression now, use that
3401 and try folding it further, from the top. */
3402 if (cheapest_simplification != x)
3403 return fold_rtx (copy_rtx (cheapest_simplification),
3404 insn);
3408 /* See if the two operands are the same. */
3410 if ((REG_P (folded_arg0)
3411 && REG_P (folded_arg1)
3412 && (REG_QTY (REGNO (folded_arg0))
3413 == REG_QTY (REGNO (folded_arg1))))
3414 || ((p0 = lookup (folded_arg0,
3415 SAFE_HASH (folded_arg0, mode_arg0),
3416 mode_arg0))
3417 && (p1 = lookup (folded_arg1,
3418 SAFE_HASH (folded_arg1, mode_arg0),
3419 mode_arg0))
3420 && p0->first_same_value == p1->first_same_value))
3421 folded_arg1 = folded_arg0;
3423 /* If FOLDED_ARG0 is a register, see if the comparison we are
3424 doing now is either the same as we did before or the reverse
3425 (we only check the reverse if not floating-point). */
3426 else if (REG_P (folded_arg0))
3428 int qty = REG_QTY (REGNO (folded_arg0));
3430 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3432 struct qty_table_elem *ent = &qty_table[qty];
3434 if ((comparison_dominates_p (ent->comparison_code, code)
3435 || (! FLOAT_MODE_P (mode_arg0)
3436 && comparison_dominates_p (ent->comparison_code,
3437 reverse_condition (code))))
3438 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3439 || (const_arg1
3440 && rtx_equal_p (ent->comparison_const,
3441 const_arg1))
3442 || (REG_P (folded_arg1)
3443 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3445 if (comparison_dominates_p (ent->comparison_code, code))
3447 if (true_rtx)
3448 return true_rtx;
3449 else
3450 break;
3452 else
3453 return false_rtx;
3460 /* If we are comparing against zero, see if the first operand is
3461 equivalent to an IOR with a constant. If so, we may be able to
3462 determine the result of this comparison. */
3463 if (const_arg1 == const0_rtx && !const_arg0)
3465 rtx y = lookup_as_function (folded_arg0, IOR);
3466 rtx inner_const;
3468 if (y != 0
3469 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3470 && CONST_INT_P (inner_const)
3471 && INTVAL (inner_const) != 0)
3472 folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3476 rtx op0 = const_arg0 ? const_arg0 : copy_rtx (folded_arg0);
3477 rtx op1 = const_arg1 ? const_arg1 : copy_rtx (folded_arg1);
3478 new_rtx = simplify_relational_operation (code, mode, mode_arg0,
3479 op0, op1);
3481 break;
3483 case RTX_BIN_ARITH:
3484 case RTX_COMM_ARITH:
3485 switch (code)
3487 case PLUS:
3488 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3489 with that LABEL_REF as its second operand. If so, the result is
3490 the first operand of that MINUS. This handles switches with an
3491 ADDR_DIFF_VEC table. */
3492 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3494 rtx y
3495 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3496 : lookup_as_function (folded_arg0, MINUS);
3498 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3499 && LABEL_REF_LABEL (XEXP (y, 1)) == LABEL_REF_LABEL (const_arg1))
3500 return XEXP (y, 0);
3502 /* Now try for a CONST of a MINUS like the above. */
3503 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3504 : lookup_as_function (folded_arg0, CONST))) != 0
3505 && GET_CODE (XEXP (y, 0)) == MINUS
3506 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3507 && LABEL_REF_LABEL (XEXP (XEXP (y, 0), 1)) == LABEL_REF_LABEL (const_arg1))
3508 return XEXP (XEXP (y, 0), 0);
3511 /* Likewise if the operands are in the other order. */
3512 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3514 rtx y
3515 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3516 : lookup_as_function (folded_arg1, MINUS);
3518 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3519 && LABEL_REF_LABEL (XEXP (y, 1)) == LABEL_REF_LABEL (const_arg0))
3520 return XEXP (y, 0);
3522 /* Now try for a CONST of a MINUS like the above. */
3523 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3524 : lookup_as_function (folded_arg1, CONST))) != 0
3525 && GET_CODE (XEXP (y, 0)) == MINUS
3526 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3527 && LABEL_REF_LABEL (XEXP (XEXP (y, 0), 1)) == LABEL_REF_LABEL (const_arg0))
3528 return XEXP (XEXP (y, 0), 0);
3531 /* If second operand is a register equivalent to a negative
3532 CONST_INT, see if we can find a register equivalent to the
3533 positive constant. Make a MINUS if so. Don't do this for
3534 a non-negative constant since we might then alternate between
3535 choosing positive and negative constants. Having the positive
3536 constant previously-used is the more common case. Be sure
3537 the resulting constant is non-negative; if const_arg1 were
3538 the smallest negative number this would overflow: depending
3539 on the mode, this would either just be the same value (and
3540 hence not save anything) or be incorrect. */
3541 if (const_arg1 != 0 && CONST_INT_P (const_arg1)
3542 && INTVAL (const_arg1) < 0
3543 /* This used to test
3545 -INTVAL (const_arg1) >= 0
3547 But The Sun V5.0 compilers mis-compiled that test. So
3548 instead we test for the problematic value in a more direct
3549 manner and hope the Sun compilers get it correct. */
3550 && INTVAL (const_arg1) !=
3551 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3552 && REG_P (folded_arg1))
3554 rtx new_const = GEN_INT (-INTVAL (const_arg1));
3555 struct table_elt *p
3556 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3558 if (p)
3559 for (p = p->first_same_value; p; p = p->next_same_value)
3560 if (REG_P (p->exp))
3561 return simplify_gen_binary (MINUS, mode, folded_arg0,
3562 canon_reg (p->exp, NULL));
3564 goto from_plus;
3566 case MINUS:
3567 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3568 If so, produce (PLUS Z C2-C). */
3569 if (const_arg1 != 0 && CONST_INT_P (const_arg1))
3571 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3572 if (y && CONST_INT_P (XEXP (y, 1)))
3573 return fold_rtx (plus_constant (mode, copy_rtx (y),
3574 -INTVAL (const_arg1)),
3575 NULL);
3578 /* Fall through. */
3580 from_plus:
3581 case SMIN: case SMAX: case UMIN: case UMAX:
3582 case IOR: case AND: case XOR:
3583 case MULT:
3584 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3585 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3586 is known to be of similar form, we may be able to replace the
3587 operation with a combined operation. This may eliminate the
3588 intermediate operation if every use is simplified in this way.
3589 Note that the similar optimization done by combine.c only works
3590 if the intermediate operation's result has only one reference. */
3592 if (REG_P (folded_arg0)
3593 && const_arg1 && CONST_INT_P (const_arg1))
3595 int is_shift
3596 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3597 rtx y, inner_const, new_const;
3598 rtx canon_const_arg1 = const_arg1;
3599 enum rtx_code associate_code;
3601 if (is_shift
3602 && (INTVAL (const_arg1) >= GET_MODE_PRECISION (mode)
3603 || INTVAL (const_arg1) < 0))
3605 if (SHIFT_COUNT_TRUNCATED)
3606 canon_const_arg1 = GEN_INT (INTVAL (const_arg1)
3607 & (GET_MODE_BITSIZE (mode)
3608 - 1));
3609 else
3610 break;
3613 y = lookup_as_function (folded_arg0, code);
3614 if (y == 0)
3615 break;
3617 /* If we have compiled a statement like
3618 "if (x == (x & mask1))", and now are looking at
3619 "x & mask2", we will have a case where the first operand
3620 of Y is the same as our first operand. Unless we detect
3621 this case, an infinite loop will result. */
3622 if (XEXP (y, 0) == folded_arg0)
3623 break;
3625 inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3626 if (!inner_const || !CONST_INT_P (inner_const))
3627 break;
3629 /* Don't associate these operations if they are a PLUS with the
3630 same constant and it is a power of two. These might be doable
3631 with a pre- or post-increment. Similarly for two subtracts of
3632 identical powers of two with post decrement. */
3634 if (code == PLUS && const_arg1 == inner_const
3635 && ((HAVE_PRE_INCREMENT
3636 && exact_log2 (INTVAL (const_arg1)) >= 0)
3637 || (HAVE_POST_INCREMENT
3638 && exact_log2 (INTVAL (const_arg1)) >= 0)
3639 || (HAVE_PRE_DECREMENT
3640 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3641 || (HAVE_POST_DECREMENT
3642 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3643 break;
3645 /* ??? Vector mode shifts by scalar
3646 shift operand are not supported yet. */
3647 if (is_shift && VECTOR_MODE_P (mode))
3648 break;
3650 if (is_shift
3651 && (INTVAL (inner_const) >= GET_MODE_PRECISION (mode)
3652 || INTVAL (inner_const) < 0))
3654 if (SHIFT_COUNT_TRUNCATED)
3655 inner_const = GEN_INT (INTVAL (inner_const)
3656 & (GET_MODE_BITSIZE (mode) - 1));
3657 else
3658 break;
3661 /* Compute the code used to compose the constants. For example,
3662 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3664 associate_code = (is_shift || code == MINUS ? PLUS : code);
3666 new_const = simplify_binary_operation (associate_code, mode,
3667 canon_const_arg1,
3668 inner_const);
3670 if (new_const == 0)
3671 break;
3673 /* If we are associating shift operations, don't let this
3674 produce a shift of the size of the object or larger.
3675 This could occur when we follow a sign-extend by a right
3676 shift on a machine that does a sign-extend as a pair
3677 of shifts. */
3679 if (is_shift
3680 && CONST_INT_P (new_const)
3681 && INTVAL (new_const) >= GET_MODE_PRECISION (mode))
3683 /* As an exception, we can turn an ASHIFTRT of this
3684 form into a shift of the number of bits - 1. */
3685 if (code == ASHIFTRT)
3686 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3687 else if (!side_effects_p (XEXP (y, 0)))
3688 return CONST0_RTX (mode);
3689 else
3690 break;
3693 y = copy_rtx (XEXP (y, 0));
3695 /* If Y contains our first operand (the most common way this
3696 can happen is if Y is a MEM), we would do into an infinite
3697 loop if we tried to fold it. So don't in that case. */
3699 if (! reg_mentioned_p (folded_arg0, y))
3700 y = fold_rtx (y, insn);
3702 return simplify_gen_binary (code, mode, y, new_const);
3704 break;
3706 case DIV: case UDIV:
3707 /* ??? The associative optimization performed immediately above is
3708 also possible for DIV and UDIV using associate_code of MULT.
3709 However, we would need extra code to verify that the
3710 multiplication does not overflow, that is, there is no overflow
3711 in the calculation of new_const. */
3712 break;
3714 default:
3715 break;
3718 new_rtx = simplify_binary_operation (code, mode,
3719 const_arg0 ? const_arg0 : folded_arg0,
3720 const_arg1 ? const_arg1 : folded_arg1);
3721 break;
3723 case RTX_OBJ:
3724 /* (lo_sum (high X) X) is simply X. */
3725 if (code == LO_SUM && const_arg0 != 0
3726 && GET_CODE (const_arg0) == HIGH
3727 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3728 return const_arg1;
3729 break;
3731 case RTX_TERNARY:
3732 case RTX_BITFIELD_OPS:
3733 new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3734 const_arg0 ? const_arg0 : folded_arg0,
3735 const_arg1 ? const_arg1 : folded_arg1,
3736 const_arg2 ? const_arg2 : XEXP (x, 2));
3737 break;
3739 default:
3740 break;
3743 return new_rtx ? new_rtx : x;
3746 /* Return a constant value currently equivalent to X.
3747 Return 0 if we don't know one. */
3749 static rtx
3750 equiv_constant (rtx x)
3752 if (REG_P (x)
3753 && REGNO_QTY_VALID_P (REGNO (x)))
3755 int x_q = REG_QTY (REGNO (x));
3756 struct qty_table_elem *x_ent = &qty_table[x_q];
3758 if (x_ent->const_rtx)
3759 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3762 if (x == 0 || CONSTANT_P (x))
3763 return x;
3765 if (GET_CODE (x) == SUBREG)
3767 machine_mode mode = GET_MODE (x);
3768 machine_mode imode = GET_MODE (SUBREG_REG (x));
3769 rtx new_rtx;
3771 /* See if we previously assigned a constant value to this SUBREG. */
3772 if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3773 || (new_rtx = lookup_as_function (x, CONST_WIDE_INT)) != 0
3774 || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3775 || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3776 return new_rtx;
3778 /* If we didn't and if doing so makes sense, see if we previously
3779 assigned a constant value to the enclosing word mode SUBREG. */
3780 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode)
3781 && GET_MODE_SIZE (word_mode) < GET_MODE_SIZE (imode))
3783 int byte = SUBREG_BYTE (x) - subreg_lowpart_offset (mode, word_mode);
3784 if (byte >= 0 && (byte % UNITS_PER_WORD) == 0)
3786 rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte);
3787 new_rtx = lookup_as_function (y, CONST_INT);
3788 if (new_rtx)
3789 return gen_lowpart (mode, new_rtx);
3793 /* Otherwise see if we already have a constant for the inner REG,
3794 and if that is enough to calculate an equivalent constant for
3795 the subreg. Note that the upper bits of paradoxical subregs
3796 are undefined, so they cannot be said to equal anything. */
3797 if (REG_P (SUBREG_REG (x))
3798 && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (imode)
3799 && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3800 return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
3802 return 0;
3805 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3806 the hash table in case its value was seen before. */
3808 if (MEM_P (x))
3810 struct table_elt *elt;
3812 x = avoid_constant_pool_reference (x);
3813 if (CONSTANT_P (x))
3814 return x;
3816 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3817 if (elt == 0)
3818 return 0;
3820 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3821 if (elt->is_const && CONSTANT_P (elt->exp))
3822 return elt->exp;
3825 return 0;
3828 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3829 "taken" branch.
3831 In certain cases, this can cause us to add an equivalence. For example,
3832 if we are following the taken case of
3833 if (i == 2)
3834 we can add the fact that `i' and '2' are now equivalent.
3836 In any case, we can record that this comparison was passed. If the same
3837 comparison is seen later, we will know its value. */
3839 static void
3840 record_jump_equiv (rtx_insn *insn, bool taken)
3842 int cond_known_true;
3843 rtx op0, op1;
3844 rtx set;
3845 machine_mode mode, mode0, mode1;
3846 int reversed_nonequality = 0;
3847 enum rtx_code code;
3849 /* Ensure this is the right kind of insn. */
3850 gcc_assert (any_condjump_p (insn));
3852 set = pc_set (insn);
3854 /* See if this jump condition is known true or false. */
3855 if (taken)
3856 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3857 else
3858 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3860 /* Get the type of comparison being done and the operands being compared.
3861 If we had to reverse a non-equality condition, record that fact so we
3862 know that it isn't valid for floating-point. */
3863 code = GET_CODE (XEXP (SET_SRC (set), 0));
3864 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3865 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3867 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3868 if (! cond_known_true)
3870 code = reversed_comparison_code_parts (code, op0, op1, insn);
3872 /* Don't remember if we can't find the inverse. */
3873 if (code == UNKNOWN)
3874 return;
3877 /* The mode is the mode of the non-constant. */
3878 mode = mode0;
3879 if (mode1 != VOIDmode)
3880 mode = mode1;
3882 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
3885 /* Yet another form of subreg creation. In this case, we want something in
3886 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3888 static rtx
3889 record_jump_cond_subreg (machine_mode mode, rtx op)
3891 machine_mode op_mode = GET_MODE (op);
3892 if (op_mode == mode || op_mode == VOIDmode)
3893 return op;
3894 return lowpart_subreg (mode, op, op_mode);
3897 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3898 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3899 Make any useful entries we can with that information. Called from
3900 above function and called recursively. */
3902 static void
3903 record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0,
3904 rtx op1, int reversed_nonequality)
3906 unsigned op0_hash, op1_hash;
3907 int op0_in_memory, op1_in_memory;
3908 struct table_elt *op0_elt, *op1_elt;
3910 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3911 we know that they are also equal in the smaller mode (this is also
3912 true for all smaller modes whether or not there is a SUBREG, but
3913 is not worth testing for with no SUBREG). */
3915 /* Note that GET_MODE (op0) may not equal MODE. */
3916 if (code == EQ && paradoxical_subreg_p (op0))
3918 machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3919 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3920 if (tem)
3921 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3922 reversed_nonequality);
3925 if (code == EQ && paradoxical_subreg_p (op1))
3927 machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3928 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3929 if (tem)
3930 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3931 reversed_nonequality);
3934 /* Similarly, if this is an NE comparison, and either is a SUBREG
3935 making a smaller mode, we know the whole thing is also NE. */
3937 /* Note that GET_MODE (op0) may not equal MODE;
3938 if we test MODE instead, we can get an infinite recursion
3939 alternating between two modes each wider than MODE. */
3941 if (code == NE && GET_CODE (op0) == SUBREG
3942 && subreg_lowpart_p (op0)
3943 && (GET_MODE_SIZE (GET_MODE (op0))
3944 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3946 machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3947 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3948 if (tem)
3949 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3950 reversed_nonequality);
3953 if (code == NE && GET_CODE (op1) == SUBREG
3954 && subreg_lowpart_p (op1)
3955 && (GET_MODE_SIZE (GET_MODE (op1))
3956 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
3958 machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3959 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3960 if (tem)
3961 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3962 reversed_nonequality);
3965 /* Hash both operands. */
3967 do_not_record = 0;
3968 hash_arg_in_memory = 0;
3969 op0_hash = HASH (op0, mode);
3970 op0_in_memory = hash_arg_in_memory;
3972 if (do_not_record)
3973 return;
3975 do_not_record = 0;
3976 hash_arg_in_memory = 0;
3977 op1_hash = HASH (op1, mode);
3978 op1_in_memory = hash_arg_in_memory;
3980 if (do_not_record)
3981 return;
3983 /* Look up both operands. */
3984 op0_elt = lookup (op0, op0_hash, mode);
3985 op1_elt = lookup (op1, op1_hash, mode);
3987 /* If both operands are already equivalent or if they are not in the
3988 table but are identical, do nothing. */
3989 if ((op0_elt != 0 && op1_elt != 0
3990 && op0_elt->first_same_value == op1_elt->first_same_value)
3991 || op0 == op1 || rtx_equal_p (op0, op1))
3992 return;
3994 /* If we aren't setting two things equal all we can do is save this
3995 comparison. Similarly if this is floating-point. In the latter
3996 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
3997 If we record the equality, we might inadvertently delete code
3998 whose intent was to change -0 to +0. */
4000 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4002 struct qty_table_elem *ent;
4003 int qty;
4005 /* If we reversed a floating-point comparison, if OP0 is not a
4006 register, or if OP1 is neither a register or constant, we can't
4007 do anything. */
4009 if (!REG_P (op1))
4010 op1 = equiv_constant (op1);
4012 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4013 || !REG_P (op0) || op1 == 0)
4014 return;
4016 /* Put OP0 in the hash table if it isn't already. This gives it a
4017 new quantity number. */
4018 if (op0_elt == 0)
4020 if (insert_regs (op0, NULL, 0))
4022 rehash_using_reg (op0);
4023 op0_hash = HASH (op0, mode);
4025 /* If OP0 is contained in OP1, this changes its hash code
4026 as well. Faster to rehash than to check, except
4027 for the simple case of a constant. */
4028 if (! CONSTANT_P (op1))
4029 op1_hash = HASH (op1,mode);
4032 op0_elt = insert (op0, NULL, op0_hash, mode);
4033 op0_elt->in_memory = op0_in_memory;
4036 qty = REG_QTY (REGNO (op0));
4037 ent = &qty_table[qty];
4039 ent->comparison_code = code;
4040 if (REG_P (op1))
4042 /* Look it up again--in case op0 and op1 are the same. */
4043 op1_elt = lookup (op1, op1_hash, mode);
4045 /* Put OP1 in the hash table so it gets a new quantity number. */
4046 if (op1_elt == 0)
4048 if (insert_regs (op1, NULL, 0))
4050 rehash_using_reg (op1);
4051 op1_hash = HASH (op1, mode);
4054 op1_elt = insert (op1, NULL, op1_hash, mode);
4055 op1_elt->in_memory = op1_in_memory;
4058 ent->comparison_const = NULL_RTX;
4059 ent->comparison_qty = REG_QTY (REGNO (op1));
4061 else
4063 ent->comparison_const = op1;
4064 ent->comparison_qty = -1;
4067 return;
4070 /* If either side is still missing an equivalence, make it now,
4071 then merge the equivalences. */
4073 if (op0_elt == 0)
4075 if (insert_regs (op0, NULL, 0))
4077 rehash_using_reg (op0);
4078 op0_hash = HASH (op0, mode);
4081 op0_elt = insert (op0, NULL, op0_hash, mode);
4082 op0_elt->in_memory = op0_in_memory;
4085 if (op1_elt == 0)
4087 if (insert_regs (op1, NULL, 0))
4089 rehash_using_reg (op1);
4090 op1_hash = HASH (op1, mode);
4093 op1_elt = insert (op1, NULL, op1_hash, mode);
4094 op1_elt->in_memory = op1_in_memory;
4097 merge_equiv_classes (op0_elt, op1_elt);
4100 /* CSE processing for one instruction.
4102 Most "true" common subexpressions are mostly optimized away in GIMPLE,
4103 but the few that "leak through" are cleaned up by cse_insn, and complex
4104 addressing modes are often formed here.
4106 The main function is cse_insn, and between here and that function
4107 a couple of helper functions is defined to keep the size of cse_insn
4108 within reasonable proportions.
4110 Data is shared between the main and helper functions via STRUCT SET,
4111 that contains all data related for every set in the instruction that
4112 is being processed.
4114 Note that cse_main processes all sets in the instruction. Most
4115 passes in GCC only process simple SET insns or single_set insns, but
4116 CSE processes insns with multiple sets as well. */
4118 /* Data on one SET contained in the instruction. */
4120 struct set
4122 /* The SET rtx itself. */
4123 rtx rtl;
4124 /* The SET_SRC of the rtx (the original value, if it is changing). */
4125 rtx src;
4126 /* The hash-table element for the SET_SRC of the SET. */
4127 struct table_elt *src_elt;
4128 /* Hash value for the SET_SRC. */
4129 unsigned src_hash;
4130 /* Hash value for the SET_DEST. */
4131 unsigned dest_hash;
4132 /* The SET_DEST, with SUBREG, etc., stripped. */
4133 rtx inner_dest;
4134 /* Nonzero if the SET_SRC is in memory. */
4135 char src_in_memory;
4136 /* Nonzero if the SET_SRC contains something
4137 whose value cannot be predicted and understood. */
4138 char src_volatile;
4139 /* Original machine mode, in case it becomes a CONST_INT.
4140 The size of this field should match the size of the mode
4141 field of struct rtx_def (see rtl.h). */
4142 ENUM_BITFIELD(machine_mode) mode : 8;
4143 /* A constant equivalent for SET_SRC, if any. */
4144 rtx src_const;
4145 /* Hash value of constant equivalent for SET_SRC. */
4146 unsigned src_const_hash;
4147 /* Table entry for constant equivalent for SET_SRC, if any. */
4148 struct table_elt *src_const_elt;
4149 /* Table entry for the destination address. */
4150 struct table_elt *dest_addr_elt;
4153 /* Special handling for (set REG0 REG1) where REG0 is the
4154 "cheapest", cheaper than REG1. After cse, REG1 will probably not
4155 be used in the sequel, so (if easily done) change this insn to
4156 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4157 that computed their value. Then REG1 will become a dead store
4158 and won't cloud the situation for later optimizations.
4160 Do not make this change if REG1 is a hard register, because it will
4161 then be used in the sequel and we may be changing a two-operand insn
4162 into a three-operand insn.
4164 This is the last transformation that cse_insn will try to do. */
4166 static void
4167 try_back_substitute_reg (rtx set, rtx_insn *insn)
4169 rtx dest = SET_DEST (set);
4170 rtx src = SET_SRC (set);
4172 if (REG_P (dest)
4173 && REG_P (src) && ! HARD_REGISTER_P (src)
4174 && REGNO_QTY_VALID_P (REGNO (src)))
4176 int src_q = REG_QTY (REGNO (src));
4177 struct qty_table_elem *src_ent = &qty_table[src_q];
4179 if (src_ent->first_reg == REGNO (dest))
4181 /* Scan for the previous nonnote insn, but stop at a basic
4182 block boundary. */
4183 rtx_insn *prev = insn;
4184 rtx_insn *bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
4187 prev = PREV_INSN (prev);
4189 while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev)));
4191 /* Do not swap the registers around if the previous instruction
4192 attaches a REG_EQUIV note to REG1.
4194 ??? It's not entirely clear whether we can transfer a REG_EQUIV
4195 from the pseudo that originally shadowed an incoming argument
4196 to another register. Some uses of REG_EQUIV might rely on it
4197 being attached to REG1 rather than REG2.
4199 This section previously turned the REG_EQUIV into a REG_EQUAL
4200 note. We cannot do that because REG_EQUIV may provide an
4201 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4202 if (NONJUMP_INSN_P (prev)
4203 && GET_CODE (PATTERN (prev)) == SET
4204 && SET_DEST (PATTERN (prev)) == src
4205 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
4207 rtx note;
4209 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
4210 validate_change (insn, &SET_DEST (set), src, 1);
4211 validate_change (insn, &SET_SRC (set), dest, 1);
4212 apply_change_group ();
4214 /* If INSN has a REG_EQUAL note, and this note mentions
4215 REG0, then we must delete it, because the value in
4216 REG0 has changed. If the note's value is REG1, we must
4217 also delete it because that is now this insn's dest. */
4218 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
4219 if (note != 0
4220 && (reg_mentioned_p (dest, XEXP (note, 0))
4221 || rtx_equal_p (src, XEXP (note, 0))))
4222 remove_note (insn, note);
4228 /* Record all the SETs in this instruction into SETS_PTR,
4229 and return the number of recorded sets. */
4230 static int
4231 find_sets_in_insn (rtx_insn *insn, struct set **psets)
4233 struct set *sets = *psets;
4234 int n_sets = 0;
4235 rtx x = PATTERN (insn);
4237 if (GET_CODE (x) == SET)
4239 /* Ignore SETs that are unconditional jumps.
4240 They never need cse processing, so this does not hurt.
4241 The reason is not efficiency but rather
4242 so that we can test at the end for instructions
4243 that have been simplified to unconditional jumps
4244 and not be misled by unchanged instructions
4245 that were unconditional jumps to begin with. */
4246 if (SET_DEST (x) == pc_rtx
4247 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4249 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4250 The hard function value register is used only once, to copy to
4251 someplace else, so it isn't worth cse'ing. */
4252 else if (GET_CODE (SET_SRC (x)) == CALL)
4254 else
4255 sets[n_sets++].rtl = x;
4257 else if (GET_CODE (x) == PARALLEL)
4259 int i, lim = XVECLEN (x, 0);
4261 /* Go over the epressions of the PARALLEL in forward order, to
4262 put them in the same order in the SETS array. */
4263 for (i = 0; i < lim; i++)
4265 rtx y = XVECEXP (x, 0, i);
4266 if (GET_CODE (y) == SET)
4268 /* As above, we ignore unconditional jumps and call-insns and
4269 ignore the result of apply_change_group. */
4270 if (SET_DEST (y) == pc_rtx
4271 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4273 else if (GET_CODE (SET_SRC (y)) == CALL)
4275 else
4276 sets[n_sets++].rtl = y;
4281 return n_sets;
4284 /* Where possible, substitute every register reference in the N_SETS
4285 number of SETS in INSN with the the canonical register.
4287 Register canonicalization propagatest the earliest register (i.e.
4288 one that is set before INSN) with the same value. This is a very
4289 useful, simple form of CSE, to clean up warts from expanding GIMPLE
4290 to RTL. For instance, a CONST for an address is usually expanded
4291 multiple times to loads into different registers, thus creating many
4292 subexpressions of the form:
4294 (set (reg1) (some_const))
4295 (set (mem (... reg1 ...) (thing)))
4296 (set (reg2) (some_const))
4297 (set (mem (... reg2 ...) (thing)))
4299 After canonicalizing, the code takes the following form:
4301 (set (reg1) (some_const))
4302 (set (mem (... reg1 ...) (thing)))
4303 (set (reg2) (some_const))
4304 (set (mem (... reg1 ...) (thing)))
4306 The set to reg2 is now trivially dead, and the memory reference (or
4307 address, or whatever) may be a candidate for further CSEing.
4309 In this function, the result of apply_change_group can be ignored;
4310 see canon_reg. */
4312 static void
4313 canonicalize_insn (rtx_insn *insn, struct set **psets, int n_sets)
4315 struct set *sets = *psets;
4316 rtx tem;
4317 rtx x = PATTERN (insn);
4318 int i;
4320 if (CALL_P (insn))
4322 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4323 if (GET_CODE (XEXP (tem, 0)) != SET)
4324 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4327 if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
4329 canon_reg (SET_SRC (x), insn);
4330 apply_change_group ();
4331 fold_rtx (SET_SRC (x), insn);
4333 else if (GET_CODE (x) == CLOBBER)
4335 /* If we clobber memory, canon the address.
4336 This does nothing when a register is clobbered
4337 because we have already invalidated the reg. */
4338 if (MEM_P (XEXP (x, 0)))
4339 canon_reg (XEXP (x, 0), insn);
4341 else if (GET_CODE (x) == USE
4342 && ! (REG_P (XEXP (x, 0))
4343 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4344 /* Canonicalize a USE of a pseudo register or memory location. */
4345 canon_reg (x, insn);
4346 else if (GET_CODE (x) == ASM_OPERANDS)
4348 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
4350 rtx input = ASM_OPERANDS_INPUT (x, i);
4351 if (!(REG_P (input) && REGNO (input) < FIRST_PSEUDO_REGISTER))
4353 input = canon_reg (input, insn);
4354 validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
4358 else if (GET_CODE (x) == CALL)
4360 canon_reg (x, insn);
4361 apply_change_group ();
4362 fold_rtx (x, insn);
4364 else if (DEBUG_INSN_P (insn))
4365 canon_reg (PATTERN (insn), insn);
4366 else if (GET_CODE (x) == PARALLEL)
4368 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4370 rtx y = XVECEXP (x, 0, i);
4371 if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
4373 canon_reg (SET_SRC (y), insn);
4374 apply_change_group ();
4375 fold_rtx (SET_SRC (y), insn);
4377 else if (GET_CODE (y) == CLOBBER)
4379 if (MEM_P (XEXP (y, 0)))
4380 canon_reg (XEXP (y, 0), insn);
4382 else if (GET_CODE (y) == USE
4383 && ! (REG_P (XEXP (y, 0))
4384 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4385 canon_reg (y, insn);
4386 else if (GET_CODE (y) == CALL)
4388 canon_reg (y, insn);
4389 apply_change_group ();
4390 fold_rtx (y, insn);
4395 if (n_sets == 1 && REG_NOTES (insn) != 0
4396 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4398 /* We potentially will process this insn many times. Therefore,
4399 drop the REG_EQUAL note if it is equal to the SET_SRC of the
4400 unique set in INSN.
4402 Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4403 because cse_insn handles those specially. */
4404 if (GET_CODE (SET_DEST (sets[0].rtl)) != STRICT_LOW_PART
4405 && rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))
4406 remove_note (insn, tem);
4407 else
4409 canon_reg (XEXP (tem, 0), insn);
4410 apply_change_group ();
4411 XEXP (tem, 0) = fold_rtx (XEXP (tem, 0), insn);
4412 df_notes_rescan (insn);
4416 /* Canonicalize sources and addresses of destinations.
4417 We do this in a separate pass to avoid problems when a MATCH_DUP is
4418 present in the insn pattern. In that case, we want to ensure that
4419 we don't break the duplicate nature of the pattern. So we will replace
4420 both operands at the same time. Otherwise, we would fail to find an
4421 equivalent substitution in the loop calling validate_change below.
4423 We used to suppress canonicalization of DEST if it appears in SRC,
4424 but we don't do this any more. */
4426 for (i = 0; i < n_sets; i++)
4428 rtx dest = SET_DEST (sets[i].rtl);
4429 rtx src = SET_SRC (sets[i].rtl);
4430 rtx new_rtx = canon_reg (src, insn);
4432 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4434 if (GET_CODE (dest) == ZERO_EXTRACT)
4436 validate_change (insn, &XEXP (dest, 1),
4437 canon_reg (XEXP (dest, 1), insn), 1);
4438 validate_change (insn, &XEXP (dest, 2),
4439 canon_reg (XEXP (dest, 2), insn), 1);
4442 while (GET_CODE (dest) == SUBREG
4443 || GET_CODE (dest) == ZERO_EXTRACT
4444 || GET_CODE (dest) == STRICT_LOW_PART)
4445 dest = XEXP (dest, 0);
4447 if (MEM_P (dest))
4448 canon_reg (dest, insn);
4451 /* Now that we have done all the replacements, we can apply the change
4452 group and see if they all work. Note that this will cause some
4453 canonicalizations that would have worked individually not to be applied
4454 because some other canonicalization didn't work, but this should not
4455 occur often.
4457 The result of apply_change_group can be ignored; see canon_reg. */
4459 apply_change_group ();
4462 /* Main function of CSE.
4463 First simplify sources and addresses of all assignments
4464 in the instruction, using previously-computed equivalents values.
4465 Then install the new sources and destinations in the table
4466 of available values. */
4468 static void
4469 cse_insn (rtx_insn *insn)
4471 rtx x = PATTERN (insn);
4472 int i;
4473 rtx tem;
4474 int n_sets = 0;
4476 rtx src_eqv = 0;
4477 struct table_elt *src_eqv_elt = 0;
4478 int src_eqv_volatile = 0;
4479 int src_eqv_in_memory = 0;
4480 unsigned src_eqv_hash = 0;
4482 struct set *sets = (struct set *) 0;
4484 if (GET_CODE (x) == SET)
4485 sets = XALLOCA (struct set);
4486 else if (GET_CODE (x) == PARALLEL)
4487 sets = XALLOCAVEC (struct set, XVECLEN (x, 0));
4489 this_insn = insn;
4490 #ifdef HAVE_cc0
4491 /* Records what this insn does to set CC0. */
4492 this_insn_cc0 = 0;
4493 this_insn_cc0_mode = VOIDmode;
4494 #endif
4496 /* Find all regs explicitly clobbered in this insn,
4497 to ensure they are not replaced with any other regs
4498 elsewhere in this insn. */
4499 invalidate_from_sets_and_clobbers (insn);
4501 /* Record all the SETs in this instruction. */
4502 n_sets = find_sets_in_insn (insn, &sets);
4504 /* Substitute the canonical register where possible. */
4505 canonicalize_insn (insn, &sets, n_sets);
4507 /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4508 if different, or if the DEST is a STRICT_LOW_PART. The latter condition
4509 is necessary because SRC_EQV is handled specially for this case, and if
4510 it isn't set, then there will be no equivalence for the destination. */
4511 if (n_sets == 1 && REG_NOTES (insn) != 0
4512 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4513 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4514 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4515 src_eqv = copy_rtx (XEXP (tem, 0));
4517 /* Set sets[i].src_elt to the class each source belongs to.
4518 Detect assignments from or to volatile things
4519 and set set[i] to zero so they will be ignored
4520 in the rest of this function.
4522 Nothing in this loop changes the hash table or the register chains. */
4524 for (i = 0; i < n_sets; i++)
4526 bool repeat = false;
4527 rtx src, dest;
4528 rtx src_folded;
4529 struct table_elt *elt = 0, *p;
4530 machine_mode mode;
4531 rtx src_eqv_here;
4532 rtx src_const = 0;
4533 rtx src_related = 0;
4534 bool src_related_is_const_anchor = false;
4535 struct table_elt *src_const_elt = 0;
4536 int src_cost = MAX_COST;
4537 int src_eqv_cost = MAX_COST;
4538 int src_folded_cost = MAX_COST;
4539 int src_related_cost = MAX_COST;
4540 int src_elt_cost = MAX_COST;
4541 int src_regcost = MAX_COST;
4542 int src_eqv_regcost = MAX_COST;
4543 int src_folded_regcost = MAX_COST;
4544 int src_related_regcost = MAX_COST;
4545 int src_elt_regcost = MAX_COST;
4546 /* Set nonzero if we need to call force_const_mem on with the
4547 contents of src_folded before using it. */
4548 int src_folded_force_flag = 0;
4550 dest = SET_DEST (sets[i].rtl);
4551 src = SET_SRC (sets[i].rtl);
4553 /* If SRC is a constant that has no machine mode,
4554 hash it with the destination's machine mode.
4555 This way we can keep different modes separate. */
4557 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4558 sets[i].mode = mode;
4560 if (src_eqv)
4562 machine_mode eqvmode = mode;
4563 if (GET_CODE (dest) == STRICT_LOW_PART)
4564 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4565 do_not_record = 0;
4566 hash_arg_in_memory = 0;
4567 src_eqv_hash = HASH (src_eqv, eqvmode);
4569 /* Find the equivalence class for the equivalent expression. */
4571 if (!do_not_record)
4572 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4574 src_eqv_volatile = do_not_record;
4575 src_eqv_in_memory = hash_arg_in_memory;
4578 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4579 value of the INNER register, not the destination. So it is not
4580 a valid substitution for the source. But save it for later. */
4581 if (GET_CODE (dest) == STRICT_LOW_PART)
4582 src_eqv_here = 0;
4583 else
4584 src_eqv_here = src_eqv;
4586 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4587 simplified result, which may not necessarily be valid. */
4588 src_folded = fold_rtx (src, insn);
4590 #if 0
4591 /* ??? This caused bad code to be generated for the m68k port with -O2.
4592 Suppose src is (CONST_INT -1), and that after truncation src_folded
4593 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4594 At the end we will add src and src_const to the same equivalence
4595 class. We now have 3 and -1 on the same equivalence class. This
4596 causes later instructions to be mis-optimized. */
4597 /* If storing a constant in a bitfield, pre-truncate the constant
4598 so we will be able to record it later. */
4599 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4601 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4603 if (CONST_INT_P (src)
4604 && CONST_INT_P (width)
4605 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4606 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4607 src_folded
4608 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4609 << INTVAL (width)) - 1));
4611 #endif
4613 /* Compute SRC's hash code, and also notice if it
4614 should not be recorded at all. In that case,
4615 prevent any further processing of this assignment. */
4616 do_not_record = 0;
4617 hash_arg_in_memory = 0;
4619 sets[i].src = src;
4620 sets[i].src_hash = HASH (src, mode);
4621 sets[i].src_volatile = do_not_record;
4622 sets[i].src_in_memory = hash_arg_in_memory;
4624 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4625 a pseudo, do not record SRC. Using SRC as a replacement for
4626 anything else will be incorrect in that situation. Note that
4627 this usually occurs only for stack slots, in which case all the
4628 RTL would be referring to SRC, so we don't lose any optimization
4629 opportunities by not having SRC in the hash table. */
4631 if (MEM_P (src)
4632 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4633 && REG_P (dest)
4634 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4635 sets[i].src_volatile = 1;
4637 /* Also do not record result of a non-volatile inline asm with
4638 more than one result or with clobbers, we do not want CSE to
4639 break the inline asm apart. */
4640 else if (GET_CODE (src) == ASM_OPERANDS
4641 && GET_CODE (x) == PARALLEL)
4642 sets[i].src_volatile = 1;
4644 #if 0
4645 /* It is no longer clear why we used to do this, but it doesn't
4646 appear to still be needed. So let's try without it since this
4647 code hurts cse'ing widened ops. */
4648 /* If source is a paradoxical subreg (such as QI treated as an SI),
4649 treat it as volatile. It may do the work of an SI in one context
4650 where the extra bits are not being used, but cannot replace an SI
4651 in general. */
4652 if (paradoxical_subreg_p (src))
4653 sets[i].src_volatile = 1;
4654 #endif
4656 /* Locate all possible equivalent forms for SRC. Try to replace
4657 SRC in the insn with each cheaper equivalent.
4659 We have the following types of equivalents: SRC itself, a folded
4660 version, a value given in a REG_EQUAL note, or a value related
4661 to a constant.
4663 Each of these equivalents may be part of an additional class
4664 of equivalents (if more than one is in the table, they must be in
4665 the same class; we check for this).
4667 If the source is volatile, we don't do any table lookups.
4669 We note any constant equivalent for possible later use in a
4670 REG_NOTE. */
4672 if (!sets[i].src_volatile)
4673 elt = lookup (src, sets[i].src_hash, mode);
4675 sets[i].src_elt = elt;
4677 if (elt && src_eqv_here && src_eqv_elt)
4679 if (elt->first_same_value != src_eqv_elt->first_same_value)
4681 /* The REG_EQUAL is indicating that two formerly distinct
4682 classes are now equivalent. So merge them. */
4683 merge_equiv_classes (elt, src_eqv_elt);
4684 src_eqv_hash = HASH (src_eqv, elt->mode);
4685 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4688 src_eqv_here = 0;
4691 else if (src_eqv_elt)
4692 elt = src_eqv_elt;
4694 /* Try to find a constant somewhere and record it in `src_const'.
4695 Record its table element, if any, in `src_const_elt'. Look in
4696 any known equivalences first. (If the constant is not in the
4697 table, also set `sets[i].src_const_hash'). */
4698 if (elt)
4699 for (p = elt->first_same_value; p; p = p->next_same_value)
4700 if (p->is_const)
4702 src_const = p->exp;
4703 src_const_elt = elt;
4704 break;
4707 if (src_const == 0
4708 && (CONSTANT_P (src_folded)
4709 /* Consider (minus (label_ref L1) (label_ref L2)) as
4710 "constant" here so we will record it. This allows us
4711 to fold switch statements when an ADDR_DIFF_VEC is used. */
4712 || (GET_CODE (src_folded) == MINUS
4713 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4714 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4715 src_const = src_folded, src_const_elt = elt;
4716 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4717 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4719 /* If we don't know if the constant is in the table, get its
4720 hash code and look it up. */
4721 if (src_const && src_const_elt == 0)
4723 sets[i].src_const_hash = HASH (src_const, mode);
4724 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4727 sets[i].src_const = src_const;
4728 sets[i].src_const_elt = src_const_elt;
4730 /* If the constant and our source are both in the table, mark them as
4731 equivalent. Otherwise, if a constant is in the table but the source
4732 isn't, set ELT to it. */
4733 if (src_const_elt && elt
4734 && src_const_elt->first_same_value != elt->first_same_value)
4735 merge_equiv_classes (elt, src_const_elt);
4736 else if (src_const_elt && elt == 0)
4737 elt = src_const_elt;
4739 /* See if there is a register linearly related to a constant
4740 equivalent of SRC. */
4741 if (src_const
4742 && (GET_CODE (src_const) == CONST
4743 || (src_const_elt && src_const_elt->related_value != 0)))
4745 src_related = use_related_value (src_const, src_const_elt);
4746 if (src_related)
4748 struct table_elt *src_related_elt
4749 = lookup (src_related, HASH (src_related, mode), mode);
4750 if (src_related_elt && elt)
4752 if (elt->first_same_value
4753 != src_related_elt->first_same_value)
4754 /* This can occur when we previously saw a CONST
4755 involving a SYMBOL_REF and then see the SYMBOL_REF
4756 twice. Merge the involved classes. */
4757 merge_equiv_classes (elt, src_related_elt);
4759 src_related = 0;
4760 src_related_elt = 0;
4762 else if (src_related_elt && elt == 0)
4763 elt = src_related_elt;
4767 /* See if we have a CONST_INT that is already in a register in a
4768 wider mode. */
4770 if (src_const && src_related == 0 && CONST_INT_P (src_const)
4771 && GET_MODE_CLASS (mode) == MODE_INT
4772 && GET_MODE_PRECISION (mode) < BITS_PER_WORD)
4774 machine_mode wider_mode;
4776 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4777 wider_mode != VOIDmode
4778 && GET_MODE_PRECISION (wider_mode) <= BITS_PER_WORD
4779 && src_related == 0;
4780 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4782 struct table_elt *const_elt
4783 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4785 if (const_elt == 0)
4786 continue;
4788 for (const_elt = const_elt->first_same_value;
4789 const_elt; const_elt = const_elt->next_same_value)
4790 if (REG_P (const_elt->exp))
4792 src_related = gen_lowpart (mode, const_elt->exp);
4793 break;
4798 /* Another possibility is that we have an AND with a constant in
4799 a mode narrower than a word. If so, it might have been generated
4800 as part of an "if" which would narrow the AND. If we already
4801 have done the AND in a wider mode, we can use a SUBREG of that
4802 value. */
4804 if (flag_expensive_optimizations && ! src_related
4805 && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))
4806 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4808 machine_mode tmode;
4809 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4811 for (tmode = GET_MODE_WIDER_MODE (mode);
4812 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4813 tmode = GET_MODE_WIDER_MODE (tmode))
4815 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4816 struct table_elt *larger_elt;
4818 if (inner)
4820 PUT_MODE (new_and, tmode);
4821 XEXP (new_and, 0) = inner;
4822 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4823 if (larger_elt == 0)
4824 continue;
4826 for (larger_elt = larger_elt->first_same_value;
4827 larger_elt; larger_elt = larger_elt->next_same_value)
4828 if (REG_P (larger_elt->exp))
4830 src_related
4831 = gen_lowpart (mode, larger_elt->exp);
4832 break;
4835 if (src_related)
4836 break;
4841 #ifdef LOAD_EXTEND_OP
4842 /* See if a MEM has already been loaded with a widening operation;
4843 if it has, we can use a subreg of that. Many CISC machines
4844 also have such operations, but this is only likely to be
4845 beneficial on these machines. */
4847 if (flag_expensive_optimizations && src_related == 0
4848 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4849 && GET_MODE_CLASS (mode) == MODE_INT
4850 && MEM_P (src) && ! do_not_record
4851 && LOAD_EXTEND_OP (mode) != UNKNOWN)
4853 struct rtx_def memory_extend_buf;
4854 rtx memory_extend_rtx = &memory_extend_buf;
4855 machine_mode tmode;
4857 /* Set what we are trying to extend and the operation it might
4858 have been extended with. */
4859 memset (memory_extend_rtx, 0, sizeof (*memory_extend_rtx));
4860 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
4861 XEXP (memory_extend_rtx, 0) = src;
4863 for (tmode = GET_MODE_WIDER_MODE (mode);
4864 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4865 tmode = GET_MODE_WIDER_MODE (tmode))
4867 struct table_elt *larger_elt;
4869 PUT_MODE (memory_extend_rtx, tmode);
4870 larger_elt = lookup (memory_extend_rtx,
4871 HASH (memory_extend_rtx, tmode), tmode);
4872 if (larger_elt == 0)
4873 continue;
4875 for (larger_elt = larger_elt->first_same_value;
4876 larger_elt; larger_elt = larger_elt->next_same_value)
4877 if (REG_P (larger_elt->exp))
4879 src_related = gen_lowpart (mode, larger_elt->exp);
4880 break;
4883 if (src_related)
4884 break;
4887 #endif /* LOAD_EXTEND_OP */
4889 /* Try to express the constant using a register+offset expression
4890 derived from a constant anchor. */
4892 if (targetm.const_anchor
4893 && !src_related
4894 && src_const
4895 && GET_CODE (src_const) == CONST_INT)
4897 src_related = try_const_anchors (src_const, mode);
4898 src_related_is_const_anchor = src_related != NULL_RTX;
4902 if (src == src_folded)
4903 src_folded = 0;
4905 /* At this point, ELT, if nonzero, points to a class of expressions
4906 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4907 and SRC_RELATED, if nonzero, each contain additional equivalent
4908 expressions. Prune these latter expressions by deleting expressions
4909 already in the equivalence class.
4911 Check for an equivalent identical to the destination. If found,
4912 this is the preferred equivalent since it will likely lead to
4913 elimination of the insn. Indicate this by placing it in
4914 `src_related'. */
4916 if (elt)
4917 elt = elt->first_same_value;
4918 for (p = elt; p; p = p->next_same_value)
4920 enum rtx_code code = GET_CODE (p->exp);
4922 /* If the expression is not valid, ignore it. Then we do not
4923 have to check for validity below. In most cases, we can use
4924 `rtx_equal_p', since canonicalization has already been done. */
4925 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
4926 continue;
4928 /* Also skip paradoxical subregs, unless that's what we're
4929 looking for. */
4930 if (paradoxical_subreg_p (p->exp)
4931 && ! (src != 0
4932 && GET_CODE (src) == SUBREG
4933 && GET_MODE (src) == GET_MODE (p->exp)
4934 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4935 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
4936 continue;
4938 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
4939 src = 0;
4940 else if (src_folded && GET_CODE (src_folded) == code
4941 && rtx_equal_p (src_folded, p->exp))
4942 src_folded = 0;
4943 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
4944 && rtx_equal_p (src_eqv_here, p->exp))
4945 src_eqv_here = 0;
4946 else if (src_related && GET_CODE (src_related) == code
4947 && rtx_equal_p (src_related, p->exp))
4948 src_related = 0;
4950 /* This is the same as the destination of the insns, we want
4951 to prefer it. Copy it to src_related. The code below will
4952 then give it a negative cost. */
4953 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
4954 src_related = dest;
4957 /* Find the cheapest valid equivalent, trying all the available
4958 possibilities. Prefer items not in the hash table to ones
4959 that are when they are equal cost. Note that we can never
4960 worsen an insn as the current contents will also succeed.
4961 If we find an equivalent identical to the destination, use it as best,
4962 since this insn will probably be eliminated in that case. */
4963 if (src)
4965 if (rtx_equal_p (src, dest))
4966 src_cost = src_regcost = -1;
4967 else
4969 src_cost = COST (src);
4970 src_regcost = approx_reg_cost (src);
4974 if (src_eqv_here)
4976 if (rtx_equal_p (src_eqv_here, dest))
4977 src_eqv_cost = src_eqv_regcost = -1;
4978 else
4980 src_eqv_cost = COST (src_eqv_here);
4981 src_eqv_regcost = approx_reg_cost (src_eqv_here);
4985 if (src_folded)
4987 if (rtx_equal_p (src_folded, dest))
4988 src_folded_cost = src_folded_regcost = -1;
4989 else
4991 src_folded_cost = COST (src_folded);
4992 src_folded_regcost = approx_reg_cost (src_folded);
4996 if (src_related)
4998 if (rtx_equal_p (src_related, dest))
4999 src_related_cost = src_related_regcost = -1;
5000 else
5002 src_related_cost = COST (src_related);
5003 src_related_regcost = approx_reg_cost (src_related);
5005 /* If a const-anchor is used to synthesize a constant that
5006 normally requires multiple instructions then slightly prefer
5007 it over the original sequence. These instructions are likely
5008 to become redundant now. We can't compare against the cost
5009 of src_eqv_here because, on MIPS for example, multi-insn
5010 constants have zero cost; they are assumed to be hoisted from
5011 loops. */
5012 if (src_related_is_const_anchor
5013 && src_related_cost == src_cost
5014 && src_eqv_here)
5015 src_related_cost--;
5019 /* If this was an indirect jump insn, a known label will really be
5020 cheaper even though it looks more expensive. */
5021 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5022 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5024 /* Terminate loop when replacement made. This must terminate since
5025 the current contents will be tested and will always be valid. */
5026 while (1)
5028 rtx trial;
5030 /* Skip invalid entries. */
5031 while (elt && !REG_P (elt->exp)
5032 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5033 elt = elt->next_same_value;
5035 /* A paradoxical subreg would be bad here: it'll be the right
5036 size, but later may be adjusted so that the upper bits aren't
5037 what we want. So reject it. */
5038 if (elt != 0
5039 && paradoxical_subreg_p (elt->exp)
5040 /* It is okay, though, if the rtx we're trying to match
5041 will ignore any of the bits we can't predict. */
5042 && ! (src != 0
5043 && GET_CODE (src) == SUBREG
5044 && GET_MODE (src) == GET_MODE (elt->exp)
5045 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5046 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5048 elt = elt->next_same_value;
5049 continue;
5052 if (elt)
5054 src_elt_cost = elt->cost;
5055 src_elt_regcost = elt->regcost;
5058 /* Find cheapest and skip it for the next time. For items
5059 of equal cost, use this order:
5060 src_folded, src, src_eqv, src_related and hash table entry. */
5061 if (src_folded
5062 && preferable (src_folded_cost, src_folded_regcost,
5063 src_cost, src_regcost) <= 0
5064 && preferable (src_folded_cost, src_folded_regcost,
5065 src_eqv_cost, src_eqv_regcost) <= 0
5066 && preferable (src_folded_cost, src_folded_regcost,
5067 src_related_cost, src_related_regcost) <= 0
5068 && preferable (src_folded_cost, src_folded_regcost,
5069 src_elt_cost, src_elt_regcost) <= 0)
5071 trial = src_folded, src_folded_cost = MAX_COST;
5072 if (src_folded_force_flag)
5074 rtx forced = force_const_mem (mode, trial);
5075 if (forced)
5076 trial = forced;
5079 else if (src
5080 && preferable (src_cost, src_regcost,
5081 src_eqv_cost, src_eqv_regcost) <= 0
5082 && preferable (src_cost, src_regcost,
5083 src_related_cost, src_related_regcost) <= 0
5084 && preferable (src_cost, src_regcost,
5085 src_elt_cost, src_elt_regcost) <= 0)
5086 trial = src, src_cost = MAX_COST;
5087 else if (src_eqv_here
5088 && preferable (src_eqv_cost, src_eqv_regcost,
5089 src_related_cost, src_related_regcost) <= 0
5090 && preferable (src_eqv_cost, src_eqv_regcost,
5091 src_elt_cost, src_elt_regcost) <= 0)
5092 trial = src_eqv_here, src_eqv_cost = MAX_COST;
5093 else if (src_related
5094 && preferable (src_related_cost, src_related_regcost,
5095 src_elt_cost, src_elt_regcost) <= 0)
5096 trial = src_related, src_related_cost = MAX_COST;
5097 else
5099 trial = elt->exp;
5100 elt = elt->next_same_value;
5101 src_elt_cost = MAX_COST;
5104 /* Avoid creation of overlapping memory moves. */
5105 if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl)))
5107 rtx src, dest;
5109 /* BLKmode moves are not handled by cse anyway. */
5110 if (GET_MODE (trial) == BLKmode)
5111 break;
5113 src = canon_rtx (trial);
5114 dest = canon_rtx (SET_DEST (sets[i].rtl));
5116 if (!MEM_P (src) || !MEM_P (dest)
5117 || !nonoverlapping_memrefs_p (src, dest, false))
5118 break;
5121 /* Try to optimize
5122 (set (reg:M N) (const_int A))
5123 (set (reg:M2 O) (const_int B))
5124 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5125 (reg:M2 O)). */
5126 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5127 && CONST_INT_P (trial)
5128 && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1))
5129 && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2))
5130 && REG_P (XEXP (SET_DEST (sets[i].rtl), 0))
5131 && (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl)))
5132 >= INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)))
5133 && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))
5134 + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2))
5135 <= HOST_BITS_PER_WIDE_INT))
5137 rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0);
5138 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5139 rtx pos = XEXP (SET_DEST (sets[i].rtl), 2);
5140 unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg));
5141 struct table_elt *dest_elt
5142 = lookup (dest_reg, dest_hash, GET_MODE (dest_reg));
5143 rtx dest_cst = NULL;
5145 if (dest_elt)
5146 for (p = dest_elt->first_same_value; p; p = p->next_same_value)
5147 if (p->is_const && CONST_INT_P (p->exp))
5149 dest_cst = p->exp;
5150 break;
5152 if (dest_cst)
5154 HOST_WIDE_INT val = INTVAL (dest_cst);
5155 HOST_WIDE_INT mask;
5156 unsigned int shift;
5157 if (BITS_BIG_ENDIAN)
5158 shift = GET_MODE_PRECISION (GET_MODE (dest_reg))
5159 - INTVAL (pos) - INTVAL (width);
5160 else
5161 shift = INTVAL (pos);
5162 if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
5163 mask = ~(HOST_WIDE_INT) 0;
5164 else
5165 mask = ((HOST_WIDE_INT) 1 << INTVAL (width)) - 1;
5166 val &= ~(mask << shift);
5167 val |= (INTVAL (trial) & mask) << shift;
5168 val = trunc_int_for_mode (val, GET_MODE (dest_reg));
5169 validate_unshare_change (insn, &SET_DEST (sets[i].rtl),
5170 dest_reg, 1);
5171 validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5172 GEN_INT (val), 1);
5173 if (apply_change_group ())
5175 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5176 if (note)
5178 remove_note (insn, note);
5179 df_notes_rescan (insn);
5181 src_eqv = NULL_RTX;
5182 src_eqv_elt = NULL;
5183 src_eqv_volatile = 0;
5184 src_eqv_in_memory = 0;
5185 src_eqv_hash = 0;
5186 repeat = true;
5187 break;
5192 /* We don't normally have an insn matching (set (pc) (pc)), so
5193 check for this separately here. We will delete such an
5194 insn below.
5196 For other cases such as a table jump or conditional jump
5197 where we know the ultimate target, go ahead and replace the
5198 operand. While that may not make a valid insn, we will
5199 reemit the jump below (and also insert any necessary
5200 barriers). */
5201 if (n_sets == 1 && dest == pc_rtx
5202 && (trial == pc_rtx
5203 || (GET_CODE (trial) == LABEL_REF
5204 && ! condjump_p (insn))))
5206 /* Don't substitute non-local labels, this confuses CFG. */
5207 if (GET_CODE (trial) == LABEL_REF
5208 && LABEL_REF_NONLOCAL_P (trial))
5209 continue;
5211 SET_SRC (sets[i].rtl) = trial;
5212 cse_jumps_altered = true;
5213 break;
5216 /* Reject certain invalid forms of CONST that we create. */
5217 else if (CONSTANT_P (trial)
5218 && GET_CODE (trial) == CONST
5219 /* Reject cases that will cause decode_rtx_const to
5220 die. On the alpha when simplifying a switch, we
5221 get (const (truncate (minus (label_ref)
5222 (label_ref)))). */
5223 && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
5224 /* Likewise on IA-64, except without the
5225 truncate. */
5226 || (GET_CODE (XEXP (trial, 0)) == MINUS
5227 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5228 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
5229 /* Do nothing for this case. */
5232 /* Look for a substitution that makes a valid insn. */
5233 else if (validate_unshare_change
5234 (insn, &SET_SRC (sets[i].rtl), trial, 0))
5236 rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
5238 /* The result of apply_change_group can be ignored; see
5239 canon_reg. */
5241 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
5242 apply_change_group ();
5244 break;
5247 /* If we previously found constant pool entries for
5248 constants and this is a constant, try making a
5249 pool entry. Put it in src_folded unless we already have done
5250 this since that is where it likely came from. */
5252 else if (constant_pool_entries_cost
5253 && CONSTANT_P (trial)
5254 && (src_folded == 0
5255 || (!MEM_P (src_folded)
5256 && ! src_folded_force_flag))
5257 && GET_MODE_CLASS (mode) != MODE_CC
5258 && mode != VOIDmode)
5260 src_folded_force_flag = 1;
5261 src_folded = trial;
5262 src_folded_cost = constant_pool_entries_cost;
5263 src_folded_regcost = constant_pool_entries_regcost;
5267 /* If we changed the insn too much, handle this set from scratch. */
5268 if (repeat)
5270 i--;
5271 continue;
5274 src = SET_SRC (sets[i].rtl);
5276 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5277 However, there is an important exception: If both are registers
5278 that are not the head of their equivalence class, replace SET_SRC
5279 with the head of the class. If we do not do this, we will have
5280 both registers live over a portion of the basic block. This way,
5281 their lifetimes will likely abut instead of overlapping. */
5282 if (REG_P (dest)
5283 && REGNO_QTY_VALID_P (REGNO (dest)))
5285 int dest_q = REG_QTY (REGNO (dest));
5286 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5288 if (dest_ent->mode == GET_MODE (dest)
5289 && dest_ent->first_reg != REGNO (dest)
5290 && REG_P (src) && REGNO (src) == REGNO (dest)
5291 /* Don't do this if the original insn had a hard reg as
5292 SET_SRC or SET_DEST. */
5293 && (!REG_P (sets[i].src)
5294 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5295 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5296 /* We can't call canon_reg here because it won't do anything if
5297 SRC is a hard register. */
5299 int src_q = REG_QTY (REGNO (src));
5300 struct qty_table_elem *src_ent = &qty_table[src_q];
5301 int first = src_ent->first_reg;
5302 rtx new_src
5303 = (first >= FIRST_PSEUDO_REGISTER
5304 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5306 /* We must use validate-change even for this, because this
5307 might be a special no-op instruction, suitable only to
5308 tag notes onto. */
5309 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5311 src = new_src;
5312 /* If we had a constant that is cheaper than what we are now
5313 setting SRC to, use that constant. We ignored it when we
5314 thought we could make this into a no-op. */
5315 if (src_const && COST (src_const) < COST (src)
5316 && validate_change (insn, &SET_SRC (sets[i].rtl),
5317 src_const, 0))
5318 src = src_const;
5323 /* If we made a change, recompute SRC values. */
5324 if (src != sets[i].src)
5326 do_not_record = 0;
5327 hash_arg_in_memory = 0;
5328 sets[i].src = src;
5329 sets[i].src_hash = HASH (src, mode);
5330 sets[i].src_volatile = do_not_record;
5331 sets[i].src_in_memory = hash_arg_in_memory;
5332 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5335 /* If this is a single SET, we are setting a register, and we have an
5336 equivalent constant, we want to add a REG_EQUAL note if the constant
5337 is different from the source. We don't want to do it for a constant
5338 pseudo since verifying that this pseudo hasn't been eliminated is a
5339 pain; moreover such a note won't help anything.
5341 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5342 which can be created for a reference to a compile time computable
5343 entry in a jump table. */
5344 if (n_sets == 1
5345 && REG_P (dest)
5346 && src_const
5347 && !REG_P (src_const)
5348 && !(GET_CODE (src_const) == SUBREG
5349 && REG_P (SUBREG_REG (src_const)))
5350 && !(GET_CODE (src_const) == CONST
5351 && GET_CODE (XEXP (src_const, 0)) == MINUS
5352 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5353 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)
5354 && !rtx_equal_p (src, src_const))
5356 /* Make sure that the rtx is not shared. */
5357 src_const = copy_rtx (src_const);
5359 /* Record the actual constant value in a REG_EQUAL note,
5360 making a new one if one does not already exist. */
5361 set_unique_reg_note (insn, REG_EQUAL, src_const);
5362 df_notes_rescan (insn);
5365 /* Now deal with the destination. */
5366 do_not_record = 0;
5368 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5369 while (GET_CODE (dest) == SUBREG
5370 || GET_CODE (dest) == ZERO_EXTRACT
5371 || GET_CODE (dest) == STRICT_LOW_PART)
5372 dest = XEXP (dest, 0);
5374 sets[i].inner_dest = dest;
5376 if (MEM_P (dest))
5378 #ifdef PUSH_ROUNDING
5379 /* Stack pushes invalidate the stack pointer. */
5380 rtx addr = XEXP (dest, 0);
5381 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5382 && XEXP (addr, 0) == stack_pointer_rtx)
5383 invalidate (stack_pointer_rtx, VOIDmode);
5384 #endif
5385 dest = fold_rtx (dest, insn);
5388 /* Compute the hash code of the destination now,
5389 before the effects of this instruction are recorded,
5390 since the register values used in the address computation
5391 are those before this instruction. */
5392 sets[i].dest_hash = HASH (dest, mode);
5394 /* Don't enter a bit-field in the hash table
5395 because the value in it after the store
5396 may not equal what was stored, due to truncation. */
5398 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5400 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5402 if (src_const != 0 && CONST_INT_P (src_const)
5403 && CONST_INT_P (width)
5404 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5405 && ! (INTVAL (src_const)
5406 & (HOST_WIDE_INT_M1U << INTVAL (width))))
5407 /* Exception: if the value is constant,
5408 and it won't be truncated, record it. */
5410 else
5412 /* This is chosen so that the destination will be invalidated
5413 but no new value will be recorded.
5414 We must invalidate because sometimes constant
5415 values can be recorded for bitfields. */
5416 sets[i].src_elt = 0;
5417 sets[i].src_volatile = 1;
5418 src_eqv = 0;
5419 src_eqv_elt = 0;
5423 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5424 the insn. */
5425 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5427 /* One less use of the label this insn used to jump to. */
5428 delete_insn_and_edges (insn);
5429 cse_jumps_altered = true;
5430 /* No more processing for this set. */
5431 sets[i].rtl = 0;
5434 /* If this SET is now setting PC to a label, we know it used to
5435 be a conditional or computed branch. */
5436 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5437 && !LABEL_REF_NONLOCAL_P (src))
5439 /* We reemit the jump in as many cases as possible just in
5440 case the form of an unconditional jump is significantly
5441 different than a computed jump or conditional jump.
5443 If this insn has multiple sets, then reemitting the
5444 jump is nontrivial. So instead we just force rerecognition
5445 and hope for the best. */
5446 if (n_sets == 1)
5448 rtx_insn *new_rtx;
5449 rtx note;
5451 new_rtx = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5452 JUMP_LABEL (new_rtx) = XEXP (src, 0);
5453 LABEL_NUSES (XEXP (src, 0))++;
5455 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5456 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5457 if (note)
5459 XEXP (note, 1) = NULL_RTX;
5460 REG_NOTES (new_rtx) = note;
5463 delete_insn_and_edges (insn);
5464 insn = new_rtx;
5466 else
5467 INSN_CODE (insn) = -1;
5469 /* Do not bother deleting any unreachable code, let jump do it. */
5470 cse_jumps_altered = true;
5471 sets[i].rtl = 0;
5474 /* If destination is volatile, invalidate it and then do no further
5475 processing for this assignment. */
5477 else if (do_not_record)
5479 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5480 invalidate (dest, VOIDmode);
5481 else if (MEM_P (dest))
5482 invalidate (dest, VOIDmode);
5483 else if (GET_CODE (dest) == STRICT_LOW_PART
5484 || GET_CODE (dest) == ZERO_EXTRACT)
5485 invalidate (XEXP (dest, 0), GET_MODE (dest));
5486 sets[i].rtl = 0;
5489 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5490 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5492 #ifdef HAVE_cc0
5493 /* If setting CC0, record what it was set to, or a constant, if it
5494 is equivalent to a constant. If it is being set to a floating-point
5495 value, make a COMPARE with the appropriate constant of 0. If we
5496 don't do this, later code can interpret this as a test against
5497 const0_rtx, which can cause problems if we try to put it into an
5498 insn as a floating-point operand. */
5499 if (dest == cc0_rtx)
5501 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5502 this_insn_cc0_mode = mode;
5503 if (FLOAT_MODE_P (mode))
5504 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5505 CONST0_RTX (mode));
5507 #endif
5510 /* Now enter all non-volatile source expressions in the hash table
5511 if they are not already present.
5512 Record their equivalence classes in src_elt.
5513 This way we can insert the corresponding destinations into
5514 the same classes even if the actual sources are no longer in them
5515 (having been invalidated). */
5517 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5518 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5520 struct table_elt *elt;
5521 struct table_elt *classp = sets[0].src_elt;
5522 rtx dest = SET_DEST (sets[0].rtl);
5523 machine_mode eqvmode = GET_MODE (dest);
5525 if (GET_CODE (dest) == STRICT_LOW_PART)
5527 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5528 classp = 0;
5530 if (insert_regs (src_eqv, classp, 0))
5532 rehash_using_reg (src_eqv);
5533 src_eqv_hash = HASH (src_eqv, eqvmode);
5535 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5536 elt->in_memory = src_eqv_in_memory;
5537 src_eqv_elt = elt;
5539 /* Check to see if src_eqv_elt is the same as a set source which
5540 does not yet have an elt, and if so set the elt of the set source
5541 to src_eqv_elt. */
5542 for (i = 0; i < n_sets; i++)
5543 if (sets[i].rtl && sets[i].src_elt == 0
5544 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5545 sets[i].src_elt = src_eqv_elt;
5548 for (i = 0; i < n_sets; i++)
5549 if (sets[i].rtl && ! sets[i].src_volatile
5550 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5552 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5554 /* REG_EQUAL in setting a STRICT_LOW_PART
5555 gives an equivalent for the entire destination register,
5556 not just for the subreg being stored in now.
5557 This is a more interesting equivalence, so we arrange later
5558 to treat the entire reg as the destination. */
5559 sets[i].src_elt = src_eqv_elt;
5560 sets[i].src_hash = src_eqv_hash;
5562 else
5564 /* Insert source and constant equivalent into hash table, if not
5565 already present. */
5566 struct table_elt *classp = src_eqv_elt;
5567 rtx src = sets[i].src;
5568 rtx dest = SET_DEST (sets[i].rtl);
5569 machine_mode mode
5570 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5572 /* It's possible that we have a source value known to be
5573 constant but don't have a REG_EQUAL note on the insn.
5574 Lack of a note will mean src_eqv_elt will be NULL. This
5575 can happen where we've generated a SUBREG to access a
5576 CONST_INT that is already in a register in a wider mode.
5577 Ensure that the source expression is put in the proper
5578 constant class. */
5579 if (!classp)
5580 classp = sets[i].src_const_elt;
5582 if (sets[i].src_elt == 0)
5584 struct table_elt *elt;
5586 /* Note that these insert_regs calls cannot remove
5587 any of the src_elt's, because they would have failed to
5588 match if not still valid. */
5589 if (insert_regs (src, classp, 0))
5591 rehash_using_reg (src);
5592 sets[i].src_hash = HASH (src, mode);
5594 elt = insert (src, classp, sets[i].src_hash, mode);
5595 elt->in_memory = sets[i].src_in_memory;
5596 sets[i].src_elt = classp = elt;
5598 if (sets[i].src_const && sets[i].src_const_elt == 0
5599 && src != sets[i].src_const
5600 && ! rtx_equal_p (sets[i].src_const, src))
5601 sets[i].src_elt = insert (sets[i].src_const, classp,
5602 sets[i].src_const_hash, mode);
5605 else if (sets[i].src_elt == 0)
5606 /* If we did not insert the source into the hash table (e.g., it was
5607 volatile), note the equivalence class for the REG_EQUAL value, if any,
5608 so that the destination goes into that class. */
5609 sets[i].src_elt = src_eqv_elt;
5611 /* Record destination addresses in the hash table. This allows us to
5612 check if they are invalidated by other sets. */
5613 for (i = 0; i < n_sets; i++)
5615 if (sets[i].rtl)
5617 rtx x = sets[i].inner_dest;
5618 struct table_elt *elt;
5619 machine_mode mode;
5620 unsigned hash;
5622 if (MEM_P (x))
5624 x = XEXP (x, 0);
5625 mode = GET_MODE (x);
5626 hash = HASH (x, mode);
5627 elt = lookup (x, hash, mode);
5628 if (!elt)
5630 if (insert_regs (x, NULL, 0))
5632 rtx dest = SET_DEST (sets[i].rtl);
5634 rehash_using_reg (x);
5635 hash = HASH (x, mode);
5636 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5638 elt = insert (x, NULL, hash, mode);
5641 sets[i].dest_addr_elt = elt;
5643 else
5644 sets[i].dest_addr_elt = NULL;
5648 invalidate_from_clobbers (insn);
5650 /* Some registers are invalidated by subroutine calls. Memory is
5651 invalidated by non-constant calls. */
5653 if (CALL_P (insn))
5655 if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5656 invalidate_memory ();
5657 invalidate_for_call ();
5660 /* Now invalidate everything set by this instruction.
5661 If a SUBREG or other funny destination is being set,
5662 sets[i].rtl is still nonzero, so here we invalidate the reg
5663 a part of which is being set. */
5665 for (i = 0; i < n_sets; i++)
5666 if (sets[i].rtl)
5668 /* We can't use the inner dest, because the mode associated with
5669 a ZERO_EXTRACT is significant. */
5670 rtx dest = SET_DEST (sets[i].rtl);
5672 /* Needed for registers to remove the register from its
5673 previous quantity's chain.
5674 Needed for memory if this is a nonvarying address, unless
5675 we have just done an invalidate_memory that covers even those. */
5676 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5677 invalidate (dest, VOIDmode);
5678 else if (MEM_P (dest))
5679 invalidate (dest, VOIDmode);
5680 else if (GET_CODE (dest) == STRICT_LOW_PART
5681 || GET_CODE (dest) == ZERO_EXTRACT)
5682 invalidate (XEXP (dest, 0), GET_MODE (dest));
5685 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5686 the regs restored by the longjmp come from a later time
5687 than the setjmp. */
5688 if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5690 flush_hash_table ();
5691 goto done;
5694 /* Make sure registers mentioned in destinations
5695 are safe for use in an expression to be inserted.
5696 This removes from the hash table
5697 any invalid entry that refers to one of these registers.
5699 We don't care about the return value from mention_regs because
5700 we are going to hash the SET_DEST values unconditionally. */
5702 for (i = 0; i < n_sets; i++)
5704 if (sets[i].rtl)
5706 rtx x = SET_DEST (sets[i].rtl);
5708 if (!REG_P (x))
5709 mention_regs (x);
5710 else
5712 /* We used to rely on all references to a register becoming
5713 inaccessible when a register changes to a new quantity,
5714 since that changes the hash code. However, that is not
5715 safe, since after HASH_SIZE new quantities we get a
5716 hash 'collision' of a register with its own invalid
5717 entries. And since SUBREGs have been changed not to
5718 change their hash code with the hash code of the register,
5719 it wouldn't work any longer at all. So we have to check
5720 for any invalid references lying around now.
5721 This code is similar to the REG case in mention_regs,
5722 but it knows that reg_tick has been incremented, and
5723 it leaves reg_in_table as -1 . */
5724 unsigned int regno = REGNO (x);
5725 unsigned int endregno = END_REGNO (x);
5726 unsigned int i;
5728 for (i = regno; i < endregno; i++)
5730 if (REG_IN_TABLE (i) >= 0)
5732 remove_invalid_refs (i);
5733 REG_IN_TABLE (i) = -1;
5740 /* We may have just removed some of the src_elt's from the hash table.
5741 So replace each one with the current head of the same class.
5742 Also check if destination addresses have been removed. */
5744 for (i = 0; i < n_sets; i++)
5745 if (sets[i].rtl)
5747 if (sets[i].dest_addr_elt
5748 && sets[i].dest_addr_elt->first_same_value == 0)
5750 /* The elt was removed, which means this destination is not
5751 valid after this instruction. */
5752 sets[i].rtl = NULL_RTX;
5754 else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5755 /* If elt was removed, find current head of same class,
5756 or 0 if nothing remains of that class. */
5758 struct table_elt *elt = sets[i].src_elt;
5760 while (elt && elt->prev_same_value)
5761 elt = elt->prev_same_value;
5763 while (elt && elt->first_same_value == 0)
5764 elt = elt->next_same_value;
5765 sets[i].src_elt = elt ? elt->first_same_value : 0;
5769 /* Now insert the destinations into their equivalence classes. */
5771 for (i = 0; i < n_sets; i++)
5772 if (sets[i].rtl)
5774 rtx dest = SET_DEST (sets[i].rtl);
5775 struct table_elt *elt;
5777 /* Don't record value if we are not supposed to risk allocating
5778 floating-point values in registers that might be wider than
5779 memory. */
5780 if ((flag_float_store
5781 && MEM_P (dest)
5782 && FLOAT_MODE_P (GET_MODE (dest)))
5783 /* Don't record BLKmode values, because we don't know the
5784 size of it, and can't be sure that other BLKmode values
5785 have the same or smaller size. */
5786 || GET_MODE (dest) == BLKmode
5787 /* If we didn't put a REG_EQUAL value or a source into the hash
5788 table, there is no point is recording DEST. */
5789 || sets[i].src_elt == 0
5790 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5791 or SIGN_EXTEND, don't record DEST since it can cause
5792 some tracking to be wrong.
5794 ??? Think about this more later. */
5795 || (paradoxical_subreg_p (dest)
5796 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5797 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5798 continue;
5800 /* STRICT_LOW_PART isn't part of the value BEING set,
5801 and neither is the SUBREG inside it.
5802 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5803 if (GET_CODE (dest) == STRICT_LOW_PART)
5804 dest = SUBREG_REG (XEXP (dest, 0));
5806 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5807 /* Registers must also be inserted into chains for quantities. */
5808 if (insert_regs (dest, sets[i].src_elt, 1))
5810 /* If `insert_regs' changes something, the hash code must be
5811 recalculated. */
5812 rehash_using_reg (dest);
5813 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5816 elt = insert (dest, sets[i].src_elt,
5817 sets[i].dest_hash, GET_MODE (dest));
5819 /* If this is a constant, insert the constant anchors with the
5820 equivalent register-offset expressions using register DEST. */
5821 if (targetm.const_anchor
5822 && REG_P (dest)
5823 && SCALAR_INT_MODE_P (GET_MODE (dest))
5824 && GET_CODE (sets[i].src_elt->exp) == CONST_INT)
5825 insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest));
5827 elt->in_memory = (MEM_P (sets[i].inner_dest)
5828 && !MEM_READONLY_P (sets[i].inner_dest));
5830 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5831 narrower than M2, and both M1 and M2 are the same number of words,
5832 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5833 make that equivalence as well.
5835 However, BAR may have equivalences for which gen_lowpart
5836 will produce a simpler value than gen_lowpart applied to
5837 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5838 BAR's equivalences. If we don't get a simplified form, make
5839 the SUBREG. It will not be used in an equivalence, but will
5840 cause two similar assignments to be detected.
5842 Note the loop below will find SUBREG_REG (DEST) since we have
5843 already entered SRC and DEST of the SET in the table. */
5845 if (GET_CODE (dest) == SUBREG
5846 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5847 / UNITS_PER_WORD)
5848 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
5849 && (GET_MODE_SIZE (GET_MODE (dest))
5850 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5851 && sets[i].src_elt != 0)
5853 machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5854 struct table_elt *elt, *classp = 0;
5856 for (elt = sets[i].src_elt->first_same_value; elt;
5857 elt = elt->next_same_value)
5859 rtx new_src = 0;
5860 unsigned src_hash;
5861 struct table_elt *src_elt;
5862 int byte = 0;
5864 /* Ignore invalid entries. */
5865 if (!REG_P (elt->exp)
5866 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5867 continue;
5869 /* We may have already been playing subreg games. If the
5870 mode is already correct for the destination, use it. */
5871 if (GET_MODE (elt->exp) == new_mode)
5872 new_src = elt->exp;
5873 else
5875 /* Calculate big endian correction for the SUBREG_BYTE.
5876 We have already checked that M1 (GET_MODE (dest))
5877 is not narrower than M2 (new_mode). */
5878 if (BYTES_BIG_ENDIAN)
5879 byte = (GET_MODE_SIZE (GET_MODE (dest))
5880 - GET_MODE_SIZE (new_mode));
5882 new_src = simplify_gen_subreg (new_mode, elt->exp,
5883 GET_MODE (dest), byte);
5886 /* The call to simplify_gen_subreg fails if the value
5887 is VOIDmode, yet we can't do any simplification, e.g.
5888 for EXPR_LISTs denoting function call results.
5889 It is invalid to construct a SUBREG with a VOIDmode
5890 SUBREG_REG, hence a zero new_src means we can't do
5891 this substitution. */
5892 if (! new_src)
5893 continue;
5895 src_hash = HASH (new_src, new_mode);
5896 src_elt = lookup (new_src, src_hash, new_mode);
5898 /* Put the new source in the hash table is if isn't
5899 already. */
5900 if (src_elt == 0)
5902 if (insert_regs (new_src, classp, 0))
5904 rehash_using_reg (new_src);
5905 src_hash = HASH (new_src, new_mode);
5907 src_elt = insert (new_src, classp, src_hash, new_mode);
5908 src_elt->in_memory = elt->in_memory;
5910 else if (classp && classp != src_elt->first_same_value)
5911 /* Show that two things that we've seen before are
5912 actually the same. */
5913 merge_equiv_classes (src_elt, classp);
5915 classp = src_elt->first_same_value;
5916 /* Ignore invalid entries. */
5917 while (classp
5918 && !REG_P (classp->exp)
5919 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
5920 classp = classp->next_same_value;
5925 /* Special handling for (set REG0 REG1) where REG0 is the
5926 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5927 be used in the sequel, so (if easily done) change this insn to
5928 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5929 that computed their value. Then REG1 will become a dead store
5930 and won't cloud the situation for later optimizations.
5932 Do not make this change if REG1 is a hard register, because it will
5933 then be used in the sequel and we may be changing a two-operand insn
5934 into a three-operand insn.
5936 Also do not do this if we are operating on a copy of INSN. */
5938 if (n_sets == 1 && sets[0].rtl)
5939 try_back_substitute_reg (sets[0].rtl, insn);
5941 done:;
5944 /* Remove from the hash table all expressions that reference memory. */
5946 static void
5947 invalidate_memory (void)
5949 int i;
5950 struct table_elt *p, *next;
5952 for (i = 0; i < HASH_SIZE; i++)
5953 for (p = table[i]; p; p = next)
5955 next = p->next_same_hash;
5956 if (p->in_memory)
5957 remove_from_table (p, i);
5961 /* Perform invalidation on the basis of everything about INSN,
5962 except for invalidating the actual places that are SET in it.
5963 This includes the places CLOBBERed, and anything that might
5964 alias with something that is SET or CLOBBERed. */
5966 static void
5967 invalidate_from_clobbers (rtx_insn *insn)
5969 rtx x = PATTERN (insn);
5971 if (GET_CODE (x) == CLOBBER)
5973 rtx ref = XEXP (x, 0);
5974 if (ref)
5976 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5977 || MEM_P (ref))
5978 invalidate (ref, VOIDmode);
5979 else if (GET_CODE (ref) == STRICT_LOW_PART
5980 || GET_CODE (ref) == ZERO_EXTRACT)
5981 invalidate (XEXP (ref, 0), GET_MODE (ref));
5984 else if (GET_CODE (x) == PARALLEL)
5986 int i;
5987 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
5989 rtx y = XVECEXP (x, 0, i);
5990 if (GET_CODE (y) == CLOBBER)
5992 rtx ref = XEXP (y, 0);
5993 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5994 || MEM_P (ref))
5995 invalidate (ref, VOIDmode);
5996 else if (GET_CODE (ref) == STRICT_LOW_PART
5997 || GET_CODE (ref) == ZERO_EXTRACT)
5998 invalidate (XEXP (ref, 0), GET_MODE (ref));
6004 /* Perform invalidation on the basis of everything about INSN.
6005 This includes the places CLOBBERed, and anything that might
6006 alias with something that is SET or CLOBBERed. */
6008 static void
6009 invalidate_from_sets_and_clobbers (rtx_insn *insn)
6011 rtx tem;
6012 rtx x = PATTERN (insn);
6014 if (CALL_P (insn))
6016 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6017 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6018 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6021 /* Ensure we invalidate the destination register of a CALL insn.
6022 This is necessary for machines where this register is a fixed_reg,
6023 because no other code would invalidate it. */
6024 if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
6025 invalidate (SET_DEST (x), VOIDmode);
6027 else if (GET_CODE (x) == PARALLEL)
6029 int i;
6031 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6033 rtx y = XVECEXP (x, 0, i);
6034 if (GET_CODE (y) == CLOBBER)
6036 rtx clobbered = XEXP (y, 0);
6038 if (REG_P (clobbered)
6039 || GET_CODE (clobbered) == SUBREG)
6040 invalidate (clobbered, VOIDmode);
6041 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6042 || GET_CODE (clobbered) == ZERO_EXTRACT)
6043 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6045 else if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
6046 invalidate (SET_DEST (y), VOIDmode);
6051 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6052 and replace any registers in them with either an equivalent constant
6053 or the canonical form of the register. If we are inside an address,
6054 only do this if the address remains valid.
6056 OBJECT is 0 except when within a MEM in which case it is the MEM.
6058 Return the replacement for X. */
6060 static rtx
6061 cse_process_notes_1 (rtx x, rtx object, bool *changed)
6063 enum rtx_code code = GET_CODE (x);
6064 const char *fmt = GET_RTX_FORMAT (code);
6065 int i;
6067 switch (code)
6069 case CONST:
6070 case SYMBOL_REF:
6071 case LABEL_REF:
6072 CASE_CONST_ANY:
6073 case PC:
6074 case CC0:
6075 case LO_SUM:
6076 return x;
6078 case MEM:
6079 validate_change (x, &XEXP (x, 0),
6080 cse_process_notes (XEXP (x, 0), x, changed), 0);
6081 return x;
6083 case EXPR_LIST:
6084 if (REG_NOTE_KIND (x) == REG_EQUAL)
6085 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed);
6086 /* Fall through. */
6088 case INSN_LIST:
6089 case INT_LIST:
6090 if (XEXP (x, 1))
6091 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed);
6092 return x;
6094 case SIGN_EXTEND:
6095 case ZERO_EXTEND:
6096 case SUBREG:
6098 rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed);
6099 /* We don't substitute VOIDmode constants into these rtx,
6100 since they would impede folding. */
6101 if (GET_MODE (new_rtx) != VOIDmode)
6102 validate_change (object, &XEXP (x, 0), new_rtx, 0);
6103 return x;
6106 case UNSIGNED_FLOAT:
6108 rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed);
6109 /* We don't substitute negative VOIDmode constants into these rtx,
6110 since they would impede folding. */
6111 if (GET_MODE (new_rtx) != VOIDmode
6112 || (CONST_INT_P (new_rtx) && INTVAL (new_rtx) >= 0)
6113 || (CONST_DOUBLE_P (new_rtx) && CONST_DOUBLE_HIGH (new_rtx) >= 0))
6114 validate_change (object, &XEXP (x, 0), new_rtx, 0);
6115 return x;
6118 case REG:
6119 i = REG_QTY (REGNO (x));
6121 /* Return a constant or a constant register. */
6122 if (REGNO_QTY_VALID_P (REGNO (x)))
6124 struct qty_table_elem *ent = &qty_table[i];
6126 if (ent->const_rtx != NULL_RTX
6127 && (CONSTANT_P (ent->const_rtx)
6128 || REG_P (ent->const_rtx)))
6130 rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
6131 if (new_rtx)
6132 return copy_rtx (new_rtx);
6136 /* Otherwise, canonicalize this register. */
6137 return canon_reg (x, NULL);
6139 default:
6140 break;
6143 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6144 if (fmt[i] == 'e')
6145 validate_change (object, &XEXP (x, i),
6146 cse_process_notes (XEXP (x, i), object, changed), 0);
6148 return x;
6151 static rtx
6152 cse_process_notes (rtx x, rtx object, bool *changed)
6154 rtx new_rtx = cse_process_notes_1 (x, object, changed);
6155 if (new_rtx != x)
6156 *changed = true;
6157 return new_rtx;
6161 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6163 DATA is a pointer to a struct cse_basic_block_data, that is used to
6164 describe the path.
6165 It is filled with a queue of basic blocks, starting with FIRST_BB
6166 and following a trace through the CFG.
6168 If all paths starting at FIRST_BB have been followed, or no new path
6169 starting at FIRST_BB can be constructed, this function returns FALSE.
6170 Otherwise, DATA->path is filled and the function returns TRUE indicating
6171 that a path to follow was found.
6173 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6174 block in the path will be FIRST_BB. */
6176 static bool
6177 cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
6178 int follow_jumps)
6180 basic_block bb;
6181 edge e;
6182 int path_size;
6184 bitmap_set_bit (cse_visited_basic_blocks, first_bb->index);
6186 /* See if there is a previous path. */
6187 path_size = data->path_size;
6189 /* There is a previous path. Make sure it started with FIRST_BB. */
6190 if (path_size)
6191 gcc_assert (data->path[0].bb == first_bb);
6193 /* There was only one basic block in the last path. Clear the path and
6194 return, so that paths starting at another basic block can be tried. */
6195 if (path_size == 1)
6197 path_size = 0;
6198 goto done;
6201 /* If the path was empty from the beginning, construct a new path. */
6202 if (path_size == 0)
6203 data->path[path_size++].bb = first_bb;
6204 else
6206 /* Otherwise, path_size must be equal to or greater than 2, because
6207 a previous path exists that is at least two basic blocks long.
6209 Update the previous branch path, if any. If the last branch was
6210 previously along the branch edge, take the fallthrough edge now. */
6211 while (path_size >= 2)
6213 basic_block last_bb_in_path, previous_bb_in_path;
6214 edge e;
6216 --path_size;
6217 last_bb_in_path = data->path[path_size].bb;
6218 previous_bb_in_path = data->path[path_size - 1].bb;
6220 /* If we previously followed a path along the branch edge, try
6221 the fallthru edge now. */
6222 if (EDGE_COUNT (previous_bb_in_path->succs) == 2
6223 && any_condjump_p (BB_END (previous_bb_in_path))
6224 && (e = find_edge (previous_bb_in_path, last_bb_in_path))
6225 && e == BRANCH_EDGE (previous_bb_in_path))
6227 bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
6228 if (bb != EXIT_BLOCK_PTR_FOR_FN (cfun)
6229 && single_pred_p (bb)
6230 /* We used to assert here that we would only see blocks
6231 that we have not visited yet. But we may end up
6232 visiting basic blocks twice if the CFG has changed
6233 in this run of cse_main, because when the CFG changes
6234 the topological sort of the CFG also changes. A basic
6235 blocks that previously had more than two predecessors
6236 may now have a single predecessor, and become part of
6237 a path that starts at another basic block.
6239 We still want to visit each basic block only once, so
6240 halt the path here if we have already visited BB. */
6241 && !bitmap_bit_p (cse_visited_basic_blocks, bb->index))
6243 bitmap_set_bit (cse_visited_basic_blocks, bb->index);
6244 data->path[path_size++].bb = bb;
6245 break;
6249 data->path[path_size].bb = NULL;
6252 /* If only one block remains in the path, bail. */
6253 if (path_size == 1)
6255 path_size = 0;
6256 goto done;
6260 /* Extend the path if possible. */
6261 if (follow_jumps)
6263 bb = data->path[path_size - 1].bb;
6264 while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH))
6266 if (single_succ_p (bb))
6267 e = single_succ_edge (bb);
6268 else if (EDGE_COUNT (bb->succs) == 2
6269 && any_condjump_p (BB_END (bb)))
6271 /* First try to follow the branch. If that doesn't lead
6272 to a useful path, follow the fallthru edge. */
6273 e = BRANCH_EDGE (bb);
6274 if (!single_pred_p (e->dest))
6275 e = FALLTHRU_EDGE (bb);
6277 else
6278 e = NULL;
6280 if (e
6281 && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label)
6282 && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
6283 && single_pred_p (e->dest)
6284 /* Avoid visiting basic blocks twice. The large comment
6285 above explains why this can happen. */
6286 && !bitmap_bit_p (cse_visited_basic_blocks, e->dest->index))
6288 basic_block bb2 = e->dest;
6289 bitmap_set_bit (cse_visited_basic_blocks, bb2->index);
6290 data->path[path_size++].bb = bb2;
6291 bb = bb2;
6293 else
6294 bb = NULL;
6298 done:
6299 data->path_size = path_size;
6300 return path_size != 0;
6303 /* Dump the path in DATA to file F. NSETS is the number of sets
6304 in the path. */
6306 static void
6307 cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
6309 int path_entry;
6311 fprintf (f, ";; Following path with %d sets: ", nsets);
6312 for (path_entry = 0; path_entry < data->path_size; path_entry++)
6313 fprintf (f, "%d ", (data->path[path_entry].bb)->index);
6314 fputc ('\n', dump_file);
6315 fflush (f);
6319 /* Return true if BB has exception handling successor edges. */
6321 static bool
6322 have_eh_succ_edges (basic_block bb)
6324 edge e;
6325 edge_iterator ei;
6327 FOR_EACH_EDGE (e, ei, bb->succs)
6328 if (e->flags & EDGE_EH)
6329 return true;
6331 return false;
6335 /* Scan to the end of the path described by DATA. Return an estimate of
6336 the total number of SETs of all insns in the path. */
6338 static void
6339 cse_prescan_path (struct cse_basic_block_data *data)
6341 int nsets = 0;
6342 int path_size = data->path_size;
6343 int path_entry;
6345 /* Scan to end of each basic block in the path. */
6346 for (path_entry = 0; path_entry < path_size; path_entry++)
6348 basic_block bb;
6349 rtx_insn *insn;
6351 bb = data->path[path_entry].bb;
6353 FOR_BB_INSNS (bb, insn)
6355 if (!INSN_P (insn))
6356 continue;
6358 /* A PARALLEL can have lots of SETs in it,
6359 especially if it is really an ASM_OPERANDS. */
6360 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6361 nsets += XVECLEN (PATTERN (insn), 0);
6362 else
6363 nsets += 1;
6367 data->nsets = nsets;
6370 /* Return true if the pattern of INSN uses a LABEL_REF for which
6371 there isn't a REG_LABEL_OPERAND note. */
6373 static bool
6374 check_for_label_ref (rtx_insn *insn)
6376 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6377 note for it, we must rerun jump since it needs to place the note. If
6378 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6379 don't do this since no REG_LABEL_OPERAND will be added. */
6380 subrtx_iterator::array_type array;
6381 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
6383 const_rtx x = *iter;
6384 if (GET_CODE (x) == LABEL_REF
6385 && !LABEL_REF_NONLOCAL_P (x)
6386 && (!JUMP_P (insn)
6387 || !label_is_jump_target_p (LABEL_REF_LABEL (x), insn))
6388 && LABEL_P (LABEL_REF_LABEL (x))
6389 && INSN_UID (LABEL_REF_LABEL (x)) != 0
6390 && !find_reg_note (insn, REG_LABEL_OPERAND, LABEL_REF_LABEL (x)))
6391 return true;
6393 return false;
6396 /* Process a single extended basic block described by EBB_DATA. */
6398 static void
6399 cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
6401 int path_size = ebb_data->path_size;
6402 int path_entry;
6403 int num_insns = 0;
6405 /* Allocate the space needed by qty_table. */
6406 qty_table = XNEWVEC (struct qty_table_elem, max_qty);
6408 new_basic_block ();
6409 cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
6410 cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
6411 for (path_entry = 0; path_entry < path_size; path_entry++)
6413 basic_block bb;
6414 rtx_insn *insn;
6416 bb = ebb_data->path[path_entry].bb;
6418 /* Invalidate recorded information for eh regs if there is an EH
6419 edge pointing to that bb. */
6420 if (bb_has_eh_pred (bb))
6422 df_ref def;
6424 FOR_EACH_ARTIFICIAL_DEF (def, bb->index)
6425 if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6426 invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6429 optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6430 FOR_BB_INSNS (bb, insn)
6432 /* If we have processed 1,000 insns, flush the hash table to
6433 avoid extreme quadratic behavior. We must not include NOTEs
6434 in the count since there may be more of them when generating
6435 debugging information. If we clear the table at different
6436 times, code generated with -g -O might be different than code
6437 generated with -O but not -g.
6439 FIXME: This is a real kludge and needs to be done some other
6440 way. */
6441 if (NONDEBUG_INSN_P (insn)
6442 && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS))
6444 flush_hash_table ();
6445 num_insns = 0;
6448 if (INSN_P (insn))
6450 /* Process notes first so we have all notes in canonical forms
6451 when looking for duplicate operations. */
6452 if (REG_NOTES (insn))
6454 bool changed = false;
6455 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn),
6456 NULL_RTX, &changed);
6457 if (changed)
6458 df_notes_rescan (insn);
6461 cse_insn (insn);
6463 /* If we haven't already found an insn where we added a LABEL_REF,
6464 check this one. */
6465 if (INSN_P (insn) && !recorded_label_ref
6466 && check_for_label_ref (insn))
6467 recorded_label_ref = true;
6469 #ifdef HAVE_cc0
6470 if (NONDEBUG_INSN_P (insn))
6472 /* If the previous insn sets CC0 and this insn no
6473 longer references CC0, delete the previous insn.
6474 Here we use fact that nothing expects CC0 to be
6475 valid over an insn, which is true until the final
6476 pass. */
6477 rtx_insn *prev_insn;
6478 rtx tem;
6480 prev_insn = prev_nonnote_nondebug_insn (insn);
6481 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6482 && (tem = single_set (prev_insn)) != NULL_RTX
6483 && SET_DEST (tem) == cc0_rtx
6484 && ! reg_mentioned_p (cc0_rtx, PATTERN (insn)))
6485 delete_insn (prev_insn);
6487 /* If this insn is not the last insn in the basic
6488 block, it will be PREV_INSN(insn) in the next
6489 iteration. If we recorded any CC0-related
6490 information for this insn, remember it. */
6491 if (insn != BB_END (bb))
6493 prev_insn_cc0 = this_insn_cc0;
6494 prev_insn_cc0_mode = this_insn_cc0_mode;
6497 #endif
6501 /* With non-call exceptions, we are not always able to update
6502 the CFG properly inside cse_insn. So clean up possibly
6503 redundant EH edges here. */
6504 if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb))
6505 cse_cfg_altered |= purge_dead_edges (bb);
6507 /* If we changed a conditional jump, we may have terminated
6508 the path we are following. Check that by verifying that
6509 the edge we would take still exists. If the edge does
6510 not exist anymore, purge the remainder of the path.
6511 Note that this will cause us to return to the caller. */
6512 if (path_entry < path_size - 1)
6514 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6515 if (!find_edge (bb, next_bb))
6519 path_size--;
6521 /* If we truncate the path, we must also reset the
6522 visited bit on the remaining blocks in the path,
6523 or we will never visit them at all. */
6524 bitmap_clear_bit (cse_visited_basic_blocks,
6525 ebb_data->path[path_size].bb->index);
6526 ebb_data->path[path_size].bb = NULL;
6528 while (path_size - 1 != path_entry);
6529 ebb_data->path_size = path_size;
6533 /* If this is a conditional jump insn, record any known
6534 equivalences due to the condition being tested. */
6535 insn = BB_END (bb);
6536 if (path_entry < path_size - 1
6537 && JUMP_P (insn)
6538 && single_set (insn)
6539 && any_condjump_p (insn))
6541 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6542 bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6543 record_jump_equiv (insn, taken);
6546 #ifdef HAVE_cc0
6547 /* Clear the CC0-tracking related insns, they can't provide
6548 useful information across basic block boundaries. */
6549 prev_insn_cc0 = 0;
6550 #endif
6553 gcc_assert (next_qty <= max_qty);
6555 free (qty_table);
6559 /* Perform cse on the instructions of a function.
6560 F is the first instruction.
6561 NREGS is one plus the highest pseudo-reg number used in the instruction.
6563 Return 2 if jump optimizations should be redone due to simplifications
6564 in conditional jump instructions.
6565 Return 1 if the CFG should be cleaned up because it has been modified.
6566 Return 0 otherwise. */
6568 static int
6569 cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs)
6571 struct cse_basic_block_data ebb_data;
6572 basic_block bb;
6573 int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun));
6574 int i, n_blocks;
6576 df_set_flags (DF_LR_RUN_DCE);
6577 df_note_add_problem ();
6578 df_analyze ();
6579 df_set_flags (DF_DEFER_INSN_RESCAN);
6581 reg_scan (get_insns (), max_reg_num ());
6582 init_cse_reg_info (nregs);
6584 ebb_data.path = XNEWVEC (struct branch_path,
6585 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6587 cse_cfg_altered = false;
6588 cse_jumps_altered = false;
6589 recorded_label_ref = false;
6590 constant_pool_entries_cost = 0;
6591 constant_pool_entries_regcost = 0;
6592 ebb_data.path_size = 0;
6593 ebb_data.nsets = 0;
6594 rtl_hooks = cse_rtl_hooks;
6596 init_recog ();
6597 init_alias_analysis ();
6599 reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6601 /* Set up the table of already visited basic blocks. */
6602 cse_visited_basic_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun));
6603 bitmap_clear (cse_visited_basic_blocks);
6605 /* Loop over basic blocks in reverse completion order (RPO),
6606 excluding the ENTRY and EXIT blocks. */
6607 n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6608 i = 0;
6609 while (i < n_blocks)
6611 /* Find the first block in the RPO queue that we have not yet
6612 processed before. */
6615 bb = BASIC_BLOCK_FOR_FN (cfun, rc_order[i++]);
6617 while (bitmap_bit_p (cse_visited_basic_blocks, bb->index)
6618 && i < n_blocks);
6620 /* Find all paths starting with BB, and process them. */
6621 while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6623 /* Pre-scan the path. */
6624 cse_prescan_path (&ebb_data);
6626 /* If this basic block has no sets, skip it. */
6627 if (ebb_data.nsets == 0)
6628 continue;
6630 /* Get a reasonable estimate for the maximum number of qty's
6631 needed for this path. For this, we take the number of sets
6632 and multiply that by MAX_RECOG_OPERANDS. */
6633 max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6635 /* Dump the path we're about to process. */
6636 if (dump_file)
6637 cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6639 cse_extended_basic_block (&ebb_data);
6643 /* Clean up. */
6644 end_alias_analysis ();
6645 free (reg_eqv_table);
6646 free (ebb_data.path);
6647 sbitmap_free (cse_visited_basic_blocks);
6648 free (rc_order);
6649 rtl_hooks = general_rtl_hooks;
6651 if (cse_jumps_altered || recorded_label_ref)
6652 return 2;
6653 else if (cse_cfg_altered)
6654 return 1;
6655 else
6656 return 0;
6659 /* Count the number of times registers are used (not set) in X.
6660 COUNTS is an array in which we accumulate the count, INCR is how much
6661 we count each register usage.
6663 Don't count a usage of DEST, which is the SET_DEST of a SET which
6664 contains X in its SET_SRC. This is because such a SET does not
6665 modify the liveness of DEST.
6666 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6667 We must then count uses of a SET_DEST regardless, because the insn can't be
6668 deleted here. */
6670 static void
6671 count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6673 enum rtx_code code;
6674 rtx note;
6675 const char *fmt;
6676 int i, j;
6678 if (x == 0)
6679 return;
6681 switch (code = GET_CODE (x))
6683 case REG:
6684 if (x != dest)
6685 counts[REGNO (x)] += incr;
6686 return;
6688 case PC:
6689 case CC0:
6690 case CONST:
6691 CASE_CONST_ANY:
6692 case SYMBOL_REF:
6693 case LABEL_REF:
6694 return;
6696 case CLOBBER:
6697 /* If we are clobbering a MEM, mark any registers inside the address
6698 as being used. */
6699 if (MEM_P (XEXP (x, 0)))
6700 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6701 return;
6703 case SET:
6704 /* Unless we are setting a REG, count everything in SET_DEST. */
6705 if (!REG_P (SET_DEST (x)))
6706 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6707 count_reg_usage (SET_SRC (x), counts,
6708 dest ? dest : SET_DEST (x),
6709 incr);
6710 return;
6712 case DEBUG_INSN:
6713 return;
6715 case CALL_INSN:
6716 case INSN:
6717 case JUMP_INSN:
6718 /* We expect dest to be NULL_RTX here. If the insn may throw,
6719 or if it cannot be deleted due to side-effects, mark this fact
6720 by setting DEST to pc_rtx. */
6721 if ((!cfun->can_delete_dead_exceptions && !insn_nothrow_p (x))
6722 || side_effects_p (PATTERN (x)))
6723 dest = pc_rtx;
6724 if (code == CALL_INSN)
6725 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6726 count_reg_usage (PATTERN (x), counts, dest, incr);
6728 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6729 use them. */
6731 note = find_reg_equal_equiv_note (x);
6732 if (note)
6734 rtx eqv = XEXP (note, 0);
6736 if (GET_CODE (eqv) == EXPR_LIST)
6737 /* This REG_EQUAL note describes the result of a function call.
6738 Process all the arguments. */
6741 count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6742 eqv = XEXP (eqv, 1);
6744 while (eqv && GET_CODE (eqv) == EXPR_LIST);
6745 else
6746 count_reg_usage (eqv, counts, dest, incr);
6748 return;
6750 case EXPR_LIST:
6751 if (REG_NOTE_KIND (x) == REG_EQUAL
6752 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6753 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6754 involving registers in the address. */
6755 || GET_CODE (XEXP (x, 0)) == CLOBBER)
6756 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6758 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6759 return;
6761 case ASM_OPERANDS:
6762 /* Iterate over just the inputs, not the constraints as well. */
6763 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6764 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6765 return;
6767 case INSN_LIST:
6768 case INT_LIST:
6769 gcc_unreachable ();
6771 default:
6772 break;
6775 fmt = GET_RTX_FORMAT (code);
6776 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6778 if (fmt[i] == 'e')
6779 count_reg_usage (XEXP (x, i), counts, dest, incr);
6780 else if (fmt[i] == 'E')
6781 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6782 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6786 /* Return true if X is a dead register. */
6788 static inline int
6789 is_dead_reg (const_rtx x, int *counts)
6791 return (REG_P (x)
6792 && REGNO (x) >= FIRST_PSEUDO_REGISTER
6793 && counts[REGNO (x)] == 0);
6796 /* Return true if set is live. */
6797 static bool
6798 set_live_p (rtx set, rtx_insn *insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
6799 int *counts)
6801 #ifdef HAVE_cc0
6802 rtx tem;
6803 #endif
6805 if (set_noop_p (set))
6808 #ifdef HAVE_cc0
6809 else if (GET_CODE (SET_DEST (set)) == CC0
6810 && !side_effects_p (SET_SRC (set))
6811 && ((tem = next_nonnote_nondebug_insn (insn)) == NULL_RTX
6812 || !INSN_P (tem)
6813 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
6814 return false;
6815 #endif
6816 else if (!is_dead_reg (SET_DEST (set), counts)
6817 || side_effects_p (SET_SRC (set)))
6818 return true;
6819 return false;
6822 /* Return true if insn is live. */
6824 static bool
6825 insn_live_p (rtx_insn *insn, int *counts)
6827 int i;
6828 if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn))
6829 return true;
6830 else if (GET_CODE (PATTERN (insn)) == SET)
6831 return set_live_p (PATTERN (insn), insn, counts);
6832 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6834 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6836 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6838 if (GET_CODE (elt) == SET)
6840 if (set_live_p (elt, insn, counts))
6841 return true;
6843 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6844 return true;
6846 return false;
6848 else if (DEBUG_INSN_P (insn))
6850 rtx_insn *next;
6852 for (next = NEXT_INSN (insn); next; next = NEXT_INSN (next))
6853 if (NOTE_P (next))
6854 continue;
6855 else if (!DEBUG_INSN_P (next))
6856 return true;
6857 else if (INSN_VAR_LOCATION_DECL (insn) == INSN_VAR_LOCATION_DECL (next))
6858 return false;
6860 return true;
6862 else
6863 return true;
6866 /* Count the number of stores into pseudo. Callback for note_stores. */
6868 static void
6869 count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data)
6871 int *counts = (int *) data;
6872 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
6873 counts[REGNO (x)]++;
6876 /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
6877 pseudo doesn't have a replacement. COUNTS[X] is zero if register X
6878 is dead and REPLACEMENTS[X] is null if it has no replacemenet.
6879 Set *SEEN_REPL to true if we see a dead register that does have
6880 a replacement. */
6882 static bool
6883 is_dead_debug_insn (const_rtx pat, int *counts, rtx *replacements,
6884 bool *seen_repl)
6886 subrtx_iterator::array_type array;
6887 FOR_EACH_SUBRTX (iter, array, pat, NONCONST)
6889 const_rtx x = *iter;
6890 if (is_dead_reg (x, counts))
6892 if (replacements && replacements[REGNO (x)] != NULL_RTX)
6893 *seen_repl = true;
6894 else
6895 return true;
6898 return false;
6901 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
6902 Callback for simplify_replace_fn_rtx. */
6904 static rtx
6905 replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data)
6907 rtx *replacements = (rtx *) data;
6909 if (REG_P (x)
6910 && REGNO (x) >= FIRST_PSEUDO_REGISTER
6911 && replacements[REGNO (x)] != NULL_RTX)
6913 if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)]))
6914 return replacements[REGNO (x)];
6915 return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)],
6916 GET_MODE (replacements[REGNO (x)]));
6918 return NULL_RTX;
6921 /* Scan all the insns and delete any that are dead; i.e., they store a register
6922 that is never used or they copy a register to itself.
6924 This is used to remove insns made obviously dead by cse, loop or other
6925 optimizations. It improves the heuristics in loop since it won't try to
6926 move dead invariants out of loops or make givs for dead quantities. The
6927 remaining passes of the compilation are also sped up. */
6930 delete_trivially_dead_insns (rtx_insn *insns, int nreg)
6932 int *counts;
6933 rtx_insn *insn, *prev;
6934 rtx *replacements = NULL;
6935 int ndead = 0;
6937 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
6938 /* First count the number of times each register is used. */
6939 if (MAY_HAVE_DEBUG_INSNS)
6941 counts = XCNEWVEC (int, nreg * 3);
6942 for (insn = insns; insn; insn = NEXT_INSN (insn))
6943 if (DEBUG_INSN_P (insn))
6944 count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
6945 NULL_RTX, 1);
6946 else if (INSN_P (insn))
6948 count_reg_usage (insn, counts, NULL_RTX, 1);
6949 note_stores (PATTERN (insn), count_stores, counts + nreg * 2);
6951 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
6952 First one counts how many times each pseudo is used outside
6953 of debug insns, second counts how many times each pseudo is
6954 used in debug insns and third counts how many times a pseudo
6955 is stored. */
6957 else
6959 counts = XCNEWVEC (int, nreg);
6960 for (insn = insns; insn; insn = NEXT_INSN (insn))
6961 if (INSN_P (insn))
6962 count_reg_usage (insn, counts, NULL_RTX, 1);
6963 /* If no debug insns can be present, COUNTS is just an array
6964 which counts how many times each pseudo is used. */
6966 /* Pseudo PIC register should be considered as used due to possible
6967 new usages generated. */
6968 if (!reload_completed
6969 && pic_offset_table_rtx
6970 && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
6971 counts[REGNO (pic_offset_table_rtx)]++;
6972 /* Go from the last insn to the first and delete insns that only set unused
6973 registers or copy a register to itself. As we delete an insn, remove
6974 usage counts for registers it uses.
6976 The first jump optimization pass may leave a real insn as the last
6977 insn in the function. We must not skip that insn or we may end
6978 up deleting code that is not really dead.
6980 If some otherwise unused register is only used in DEBUG_INSNs,
6981 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
6982 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
6983 has been created for the unused register, replace it with
6984 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
6985 for (insn = get_last_insn (); insn; insn = prev)
6987 int live_insn = 0;
6989 prev = PREV_INSN (insn);
6990 if (!INSN_P (insn))
6991 continue;
6993 live_insn = insn_live_p (insn, counts);
6995 /* If this is a dead insn, delete it and show registers in it aren't
6996 being used. */
6998 if (! live_insn && dbg_cnt (delete_trivial_dead))
7000 if (DEBUG_INSN_P (insn))
7001 count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
7002 NULL_RTX, -1);
7003 else
7005 rtx set;
7006 if (MAY_HAVE_DEBUG_INSNS
7007 && (set = single_set (insn)) != NULL_RTX
7008 && is_dead_reg (SET_DEST (set), counts)
7009 /* Used at least once in some DEBUG_INSN. */
7010 && counts[REGNO (SET_DEST (set)) + nreg] > 0
7011 /* And set exactly once. */
7012 && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1
7013 && !side_effects_p (SET_SRC (set))
7014 && asm_noperands (PATTERN (insn)) < 0)
7016 rtx dval, bind_var_loc;
7017 rtx_insn *bind;
7019 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7020 dval = make_debug_expr_from_rtl (SET_DEST (set));
7022 /* Emit a debug bind insn before the insn in which
7023 reg dies. */
7024 bind_var_loc =
7025 gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
7026 DEBUG_EXPR_TREE_DECL (dval),
7027 SET_SRC (set),
7028 VAR_INIT_STATUS_INITIALIZED);
7029 count_reg_usage (bind_var_loc, counts + nreg, NULL_RTX, 1);
7031 bind = emit_debug_insn_before (bind_var_loc, insn);
7032 df_insn_rescan (bind);
7034 if (replacements == NULL)
7035 replacements = XCNEWVEC (rtx, nreg);
7036 replacements[REGNO (SET_DEST (set))] = dval;
7039 count_reg_usage (insn, counts, NULL_RTX, -1);
7040 ndead++;
7042 delete_insn_and_edges (insn);
7046 if (MAY_HAVE_DEBUG_INSNS)
7048 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
7049 if (DEBUG_INSN_P (insn))
7051 /* If this debug insn references a dead register that wasn't replaced
7052 with an DEBUG_EXPR, reset the DEBUG_INSN. */
7053 bool seen_repl = false;
7054 if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn),
7055 counts, replacements, &seen_repl))
7057 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
7058 df_insn_rescan (insn);
7060 else if (seen_repl)
7062 INSN_VAR_LOCATION_LOC (insn)
7063 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn),
7064 NULL_RTX, replace_dead_reg,
7065 replacements);
7066 df_insn_rescan (insn);
7069 free (replacements);
7072 if (dump_file && ndead)
7073 fprintf (dump_file, "Deleted %i trivially dead insns\n",
7074 ndead);
7075 /* Clean up. */
7076 free (counts);
7077 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7078 return ndead;
7081 /* If LOC contains references to NEWREG in a different mode, change them
7082 to use NEWREG instead. */
7084 static void
7085 cse_change_cc_mode (subrtx_ptr_iterator::array_type &array,
7086 rtx *loc, rtx insn, rtx newreg)
7088 FOR_EACH_SUBRTX_PTR (iter, array, loc, NONCONST)
7090 rtx *loc = *iter;
7091 rtx x = *loc;
7092 if (x
7093 && REG_P (x)
7094 && REGNO (x) == REGNO (newreg)
7095 && GET_MODE (x) != GET_MODE (newreg))
7097 validate_change (insn, loc, newreg, 1);
7098 iter.skip_subrtxes ();
7103 /* Change the mode of any reference to the register REGNO (NEWREG) to
7104 GET_MODE (NEWREG) in INSN. */
7106 static void
7107 cse_change_cc_mode_insn (rtx_insn *insn, rtx newreg)
7109 int success;
7111 if (!INSN_P (insn))
7112 return;
7114 subrtx_ptr_iterator::array_type array;
7115 cse_change_cc_mode (array, &PATTERN (insn), insn, newreg);
7116 cse_change_cc_mode (array, &REG_NOTES (insn), insn, newreg);
7118 /* If the following assertion was triggered, there is most probably
7119 something wrong with the cc_modes_compatible back end function.
7120 CC modes only can be considered compatible if the insn - with the mode
7121 replaced by any of the compatible modes - can still be recognized. */
7122 success = apply_change_group ();
7123 gcc_assert (success);
7126 /* Change the mode of any reference to the register REGNO (NEWREG) to
7127 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7128 any instruction which modifies NEWREG. */
7130 static void
7131 cse_change_cc_mode_insns (rtx_insn *start, rtx_insn *end, rtx newreg)
7133 rtx_insn *insn;
7135 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7137 if (! INSN_P (insn))
7138 continue;
7140 if (reg_set_p (newreg, insn))
7141 return;
7143 cse_change_cc_mode_insn (insn, newreg);
7147 /* BB is a basic block which finishes with CC_REG as a condition code
7148 register which is set to CC_SRC. Look through the successors of BB
7149 to find blocks which have a single predecessor (i.e., this one),
7150 and look through those blocks for an assignment to CC_REG which is
7151 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7152 permitted to change the mode of CC_SRC to a compatible mode. This
7153 returns VOIDmode if no equivalent assignments were found.
7154 Otherwise it returns the mode which CC_SRC should wind up with.
7155 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7156 but is passed unmodified down to recursive calls in order to prevent
7157 endless recursion.
7159 The main complexity in this function is handling the mode issues.
7160 We may have more than one duplicate which we can eliminate, and we
7161 try to find a mode which will work for multiple duplicates. */
7163 static machine_mode
7164 cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
7165 bool can_change_mode)
7167 bool found_equiv;
7168 machine_mode mode;
7169 unsigned int insn_count;
7170 edge e;
7171 rtx_insn *insns[2];
7172 machine_mode modes[2];
7173 rtx_insn *last_insns[2];
7174 unsigned int i;
7175 rtx newreg;
7176 edge_iterator ei;
7178 /* We expect to have two successors. Look at both before picking
7179 the final mode for the comparison. If we have more successors
7180 (i.e., some sort of table jump, although that seems unlikely),
7181 then we require all beyond the first two to use the same
7182 mode. */
7184 found_equiv = false;
7185 mode = GET_MODE (cc_src);
7186 insn_count = 0;
7187 FOR_EACH_EDGE (e, ei, bb->succs)
7189 rtx_insn *insn;
7190 rtx_insn *end;
7192 if (e->flags & EDGE_COMPLEX)
7193 continue;
7195 if (EDGE_COUNT (e->dest->preds) != 1
7196 || e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)
7197 /* Avoid endless recursion on unreachable blocks. */
7198 || e->dest == orig_bb)
7199 continue;
7201 end = NEXT_INSN (BB_END (e->dest));
7202 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7204 rtx set;
7206 if (! INSN_P (insn))
7207 continue;
7209 /* If CC_SRC is modified, we have to stop looking for
7210 something which uses it. */
7211 if (modified_in_p (cc_src, insn))
7212 break;
7214 /* Check whether INSN sets CC_REG to CC_SRC. */
7215 set = single_set (insn);
7216 if (set
7217 && REG_P (SET_DEST (set))
7218 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7220 bool found;
7221 machine_mode set_mode;
7222 machine_mode comp_mode;
7224 found = false;
7225 set_mode = GET_MODE (SET_SRC (set));
7226 comp_mode = set_mode;
7227 if (rtx_equal_p (cc_src, SET_SRC (set)))
7228 found = true;
7229 else if (GET_CODE (cc_src) == COMPARE
7230 && GET_CODE (SET_SRC (set)) == COMPARE
7231 && mode != set_mode
7232 && rtx_equal_p (XEXP (cc_src, 0),
7233 XEXP (SET_SRC (set), 0))
7234 && rtx_equal_p (XEXP (cc_src, 1),
7235 XEXP (SET_SRC (set), 1)))
7238 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7239 if (comp_mode != VOIDmode
7240 && (can_change_mode || comp_mode == mode))
7241 found = true;
7244 if (found)
7246 found_equiv = true;
7247 if (insn_count < ARRAY_SIZE (insns))
7249 insns[insn_count] = insn;
7250 modes[insn_count] = set_mode;
7251 last_insns[insn_count] = end;
7252 ++insn_count;
7254 if (mode != comp_mode)
7256 gcc_assert (can_change_mode);
7257 mode = comp_mode;
7259 /* The modified insn will be re-recognized later. */
7260 PUT_MODE (cc_src, mode);
7263 else
7265 if (set_mode != mode)
7267 /* We found a matching expression in the
7268 wrong mode, but we don't have room to
7269 store it in the array. Punt. This case
7270 should be rare. */
7271 break;
7273 /* INSN sets CC_REG to a value equal to CC_SRC
7274 with the right mode. We can simply delete
7275 it. */
7276 delete_insn (insn);
7279 /* We found an instruction to delete. Keep looking,
7280 in the hopes of finding a three-way jump. */
7281 continue;
7284 /* We found an instruction which sets the condition
7285 code, so don't look any farther. */
7286 break;
7289 /* If INSN sets CC_REG in some other way, don't look any
7290 farther. */
7291 if (reg_set_p (cc_reg, insn))
7292 break;
7295 /* If we fell off the bottom of the block, we can keep looking
7296 through successors. We pass CAN_CHANGE_MODE as false because
7297 we aren't prepared to handle compatibility between the
7298 further blocks and this block. */
7299 if (insn == end)
7301 machine_mode submode;
7303 submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false);
7304 if (submode != VOIDmode)
7306 gcc_assert (submode == mode);
7307 found_equiv = true;
7308 can_change_mode = false;
7313 if (! found_equiv)
7314 return VOIDmode;
7316 /* Now INSN_COUNT is the number of instructions we found which set
7317 CC_REG to a value equivalent to CC_SRC. The instructions are in
7318 INSNS. The modes used by those instructions are in MODES. */
7320 newreg = NULL_RTX;
7321 for (i = 0; i < insn_count; ++i)
7323 if (modes[i] != mode)
7325 /* We need to change the mode of CC_REG in INSNS[i] and
7326 subsequent instructions. */
7327 if (! newreg)
7329 if (GET_MODE (cc_reg) == mode)
7330 newreg = cc_reg;
7331 else
7332 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7334 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7335 newreg);
7338 delete_insn_and_edges (insns[i]);
7341 return mode;
7344 /* If we have a fixed condition code register (or two), walk through
7345 the instructions and try to eliminate duplicate assignments. */
7347 static void
7348 cse_condition_code_reg (void)
7350 unsigned int cc_regno_1;
7351 unsigned int cc_regno_2;
7352 rtx cc_reg_1;
7353 rtx cc_reg_2;
7354 basic_block bb;
7356 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7357 return;
7359 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7360 if (cc_regno_2 != INVALID_REGNUM)
7361 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7362 else
7363 cc_reg_2 = NULL_RTX;
7365 FOR_EACH_BB_FN (bb, cfun)
7367 rtx_insn *last_insn;
7368 rtx cc_reg;
7369 rtx_insn *insn;
7370 rtx_insn *cc_src_insn;
7371 rtx cc_src;
7372 machine_mode mode;
7373 machine_mode orig_mode;
7375 /* Look for blocks which end with a conditional jump based on a
7376 condition code register. Then look for the instruction which
7377 sets the condition code register. Then look through the
7378 successor blocks for instructions which set the condition
7379 code register to the same value. There are other possible
7380 uses of the condition code register, but these are by far the
7381 most common and the ones which we are most likely to be able
7382 to optimize. */
7384 last_insn = BB_END (bb);
7385 if (!JUMP_P (last_insn))
7386 continue;
7388 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7389 cc_reg = cc_reg_1;
7390 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7391 cc_reg = cc_reg_2;
7392 else
7393 continue;
7395 cc_src_insn = NULL;
7396 cc_src = NULL_RTX;
7397 for (insn = PREV_INSN (last_insn);
7398 insn && insn != PREV_INSN (BB_HEAD (bb));
7399 insn = PREV_INSN (insn))
7401 rtx set;
7403 if (! INSN_P (insn))
7404 continue;
7405 set = single_set (insn);
7406 if (set
7407 && REG_P (SET_DEST (set))
7408 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7410 cc_src_insn = insn;
7411 cc_src = SET_SRC (set);
7412 break;
7414 else if (reg_set_p (cc_reg, insn))
7415 break;
7418 if (! cc_src_insn)
7419 continue;
7421 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7422 continue;
7424 /* Now CC_REG is a condition code register used for a
7425 conditional jump at the end of the block, and CC_SRC, in
7426 CC_SRC_INSN, is the value to which that condition code
7427 register is set, and CC_SRC is still meaningful at the end of
7428 the basic block. */
7430 orig_mode = GET_MODE (cc_src);
7431 mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true);
7432 if (mode != VOIDmode)
7434 gcc_assert (mode == GET_MODE (cc_src));
7435 if (mode != orig_mode)
7437 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7439 cse_change_cc_mode_insn (cc_src_insn, newreg);
7441 /* Do the same in the following insns that use the
7442 current value of CC_REG within BB. */
7443 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7444 NEXT_INSN (last_insn),
7445 newreg);
7452 /* Perform common subexpression elimination. Nonzero value from
7453 `cse_main' means that jumps were simplified and some code may now
7454 be unreachable, so do jump optimization again. */
7455 static unsigned int
7456 rest_of_handle_cse (void)
7458 int tem;
7460 if (dump_file)
7461 dump_flow_info (dump_file, dump_flags);
7463 tem = cse_main (get_insns (), max_reg_num ());
7465 /* If we are not running more CSE passes, then we are no longer
7466 expecting CSE to be run. But always rerun it in a cheap mode. */
7467 cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7469 if (tem == 2)
7471 timevar_push (TV_JUMP);
7472 rebuild_jump_labels (get_insns ());
7473 cleanup_cfg (CLEANUP_CFG_CHANGED);
7474 timevar_pop (TV_JUMP);
7476 else if (tem == 1 || optimize > 1)
7477 cleanup_cfg (0);
7479 return 0;
7482 namespace {
7484 const pass_data pass_data_cse =
7486 RTL_PASS, /* type */
7487 "cse1", /* name */
7488 OPTGROUP_NONE, /* optinfo_flags */
7489 TV_CSE, /* tv_id */
7490 0, /* properties_required */
7491 0, /* properties_provided */
7492 0, /* properties_destroyed */
7493 0, /* todo_flags_start */
7494 TODO_df_finish, /* todo_flags_finish */
7497 class pass_cse : public rtl_opt_pass
7499 public:
7500 pass_cse (gcc::context *ctxt)
7501 : rtl_opt_pass (pass_data_cse, ctxt)
7504 /* opt_pass methods: */
7505 virtual bool gate (function *) { return optimize > 0; }
7506 virtual unsigned int execute (function *) { return rest_of_handle_cse (); }
7508 }; // class pass_cse
7510 } // anon namespace
7512 rtl_opt_pass *
7513 make_pass_cse (gcc::context *ctxt)
7515 return new pass_cse (ctxt);
7519 /* Run second CSE pass after loop optimizations. */
7520 static unsigned int
7521 rest_of_handle_cse2 (void)
7523 int tem;
7525 if (dump_file)
7526 dump_flow_info (dump_file, dump_flags);
7528 tem = cse_main (get_insns (), max_reg_num ());
7530 /* Run a pass to eliminate duplicated assignments to condition code
7531 registers. We have to run this after bypass_jumps, because it
7532 makes it harder for that pass to determine whether a jump can be
7533 bypassed safely. */
7534 cse_condition_code_reg ();
7536 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7538 if (tem == 2)
7540 timevar_push (TV_JUMP);
7541 rebuild_jump_labels (get_insns ());
7542 cleanup_cfg (CLEANUP_CFG_CHANGED);
7543 timevar_pop (TV_JUMP);
7545 else if (tem == 1)
7546 cleanup_cfg (0);
7548 cse_not_expected = 1;
7549 return 0;
7553 namespace {
7555 const pass_data pass_data_cse2 =
7557 RTL_PASS, /* type */
7558 "cse2", /* name */
7559 OPTGROUP_NONE, /* optinfo_flags */
7560 TV_CSE2, /* tv_id */
7561 0, /* properties_required */
7562 0, /* properties_provided */
7563 0, /* properties_destroyed */
7564 0, /* todo_flags_start */
7565 TODO_df_finish, /* todo_flags_finish */
7568 class pass_cse2 : public rtl_opt_pass
7570 public:
7571 pass_cse2 (gcc::context *ctxt)
7572 : rtl_opt_pass (pass_data_cse2, ctxt)
7575 /* opt_pass methods: */
7576 virtual bool gate (function *)
7578 return optimize > 0 && flag_rerun_cse_after_loop;
7581 virtual unsigned int execute (function *) { return rest_of_handle_cse2 (); }
7583 }; // class pass_cse2
7585 } // anon namespace
7587 rtl_opt_pass *
7588 make_pass_cse2 (gcc::context *ctxt)
7590 return new pass_cse2 (ctxt);
7593 /* Run second CSE pass after loop optimizations. */
7594 static unsigned int
7595 rest_of_handle_cse_after_global_opts (void)
7597 int save_cfj;
7598 int tem;
7600 /* We only want to do local CSE, so don't follow jumps. */
7601 save_cfj = flag_cse_follow_jumps;
7602 flag_cse_follow_jumps = 0;
7604 rebuild_jump_labels (get_insns ());
7605 tem = cse_main (get_insns (), max_reg_num ());
7606 purge_all_dead_edges ();
7607 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7609 cse_not_expected = !flag_rerun_cse_after_loop;
7611 /* If cse altered any jumps, rerun jump opts to clean things up. */
7612 if (tem == 2)
7614 timevar_push (TV_JUMP);
7615 rebuild_jump_labels (get_insns ());
7616 cleanup_cfg (CLEANUP_CFG_CHANGED);
7617 timevar_pop (TV_JUMP);
7619 else if (tem == 1)
7620 cleanup_cfg (0);
7622 flag_cse_follow_jumps = save_cfj;
7623 return 0;
7626 namespace {
7628 const pass_data pass_data_cse_after_global_opts =
7630 RTL_PASS, /* type */
7631 "cse_local", /* name */
7632 OPTGROUP_NONE, /* optinfo_flags */
7633 TV_CSE, /* tv_id */
7634 0, /* properties_required */
7635 0, /* properties_provided */
7636 0, /* properties_destroyed */
7637 0, /* todo_flags_start */
7638 TODO_df_finish, /* todo_flags_finish */
7641 class pass_cse_after_global_opts : public rtl_opt_pass
7643 public:
7644 pass_cse_after_global_opts (gcc::context *ctxt)
7645 : rtl_opt_pass (pass_data_cse_after_global_opts, ctxt)
7648 /* opt_pass methods: */
7649 virtual bool gate (function *)
7651 return optimize > 0 && flag_rerun_cse_after_global_opts;
7654 virtual unsigned int execute (function *)
7656 return rest_of_handle_cse_after_global_opts ();
7659 }; // class pass_cse_after_global_opts
7661 } // anon namespace
7663 rtl_opt_pass *
7664 make_pass_cse_after_global_opts (gcc::context *ctxt)
7666 return new pass_cse_after_global_opts (ctxt);