gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqadd.c

   1 #define INSN_NAME vqadd
   2 #define TEST_MSG "VQADD/VQADDQ"
   3
   4 /* Extra tests for special cases:
   5    - some requiring intermediate types larger than 64 bits to
   6    compute saturation flag.
   7    - corner case saturations with types smaller than 64 bits.
   8 */
   9 void vqadd_extras(void);
  10 #define EXTRA_TESTS vqadd_extras
  11
  12 #include "binary_sat_op.inc"
  13
  14 /* Expected values of cumulative_saturation flag.  */
  15 int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
  16 int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
  17 int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
  18 int VECT_VAR(expected_cumulative_sat,int,64,1) = 0;
  19 int VECT_VAR(expected_cumulative_sat,uint,8,8) = 1;
  20 int VECT_VAR(expected_cumulative_sat,uint,16,4) = 1;
  21 int VECT_VAR(expected_cumulative_sat,uint,32,2) = 1;
  22 int VECT_VAR(expected_cumulative_sat,uint,64,1) = 1;
  23 int VECT_VAR(expected_cumulative_sat,int,8,16) = 0;
  24 int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
  25 int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
  26 int VECT_VAR(expected_cumulative_sat,int,64,2) = 0;
  27 int VECT_VAR(expected_cumulative_sat,uint,8,16) = 1;
  28 int VECT_VAR(expected_cumulative_sat,uint,16,8) = 1;
  29 int VECT_VAR(expected_cumulative_sat,uint,32,4) = 1;
  30 int VECT_VAR(expected_cumulative_sat,uint,64,2) = 1;
  31 /* Expected results.  */
  32 VECT_VAR_DECL(expected,int,8,8) [] = { 0x1, 0x2, 0x3, 0x4,
  33                                        0x5, 0x6, 0x7, 0x8 };
  34 VECT_VAR_DECL(expected,int,16,4) [] = { 0x12, 0x13, 0x14, 0x15 };
  35 VECT_VAR_DECL(expected,int,32,2) [] = { 0x23, 0x24 };
  36 VECT_VAR_DECL(expected,int,64,1) [] = { 0x34 };
  37 VECT_VAR_DECL(expected,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
  38                                         0xff, 0xff, 0xff, 0xff };
  39 VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
  40 VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0xffffffff };
  41 VECT_VAR_DECL(expected,uint,64,1) [] = { 0xffffffffffffffff };
  42 VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
  43                                         0x33, 0x33, 0x33, 0x33 };
  44 VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
  45 VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
  46 VECT_VAR_DECL(expected,int,8,16) [] = { 0x1, 0x2, 0x3, 0x4,
  47                                         0x5, 0x6, 0x7, 0x8,
  48                                         0x9, 0xa, 0xb, 0xc,
  49                                         0xd, 0xe, 0xf, 0x10 };
  50 VECT_VAR_DECL(expected,int,16,8) [] = { 0x12, 0x13, 0x14, 0x15,
  51                                         0x16, 0x17, 0x18, 0x19 };
  52 VECT_VAR_DECL(expected,int,32,4) [] = { 0x23, 0x24, 0x25, 0x26 };
  53 VECT_VAR_DECL(expected,int,64,2) [] = { 0x34, 0x35 };
  54 VECT_VAR_DECL(expected,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
  55                                          0xff, 0xff, 0xff, 0xff,
  56                                          0xff, 0xff, 0xff, 0xff,
  57                                          0xff, 0xff, 0xff, 0xff };
  58 VECT_VAR_DECL(expected,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
  59                                          0xffff, 0xffff, 0xffff, 0xffff };
  60 VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffff, 0xffffffff,
  61                                          0xffffffff, 0xffffffff };
  62 VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffffff,
  63                                          0xffffffffffffffff };
  64 VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
  65                                          0x33, 0x33, 0x33, 0x33,
  66                                          0x33, 0x33, 0x33, 0x33,
  67                                          0x33, 0x33, 0x33, 0x33 };
  68 VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
  69                                          0x3333, 0x3333, 0x3333, 0x3333 };
  70 VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
  71                                            0x33333333, 0x33333333 };
  72
  73
  74 /* 64-bits types, with 0 as second input.  */
  75 int VECT_VAR(expected_cumulative_sat_64,int,64,1) = 0;
  76 int VECT_VAR(expected_cumulative_sat_64,uint,64,1) = 0;
  77 int VECT_VAR(expected_cumulative_sat_64,int,64,2) = 0;
  78 int VECT_VAR(expected_cumulative_sat_64,uint,64,2) = 0;
  79 VECT_VAR_DECL(expected_64,int,64,1) [] = { 0xfffffffffffffff0 };
  80 VECT_VAR_DECL(expected_64,uint,64,1) [] = { 0xfffffffffffffff0 };
  81 VECT_VAR_DECL(expected_64,int,64,2) [] = { 0xfffffffffffffff0,
  82                                            0xfffffffffffffff1 };
  83 VECT_VAR_DECL(expected_64,uint,64,2) [] = { 0xfffffffffffffff0,
  84                                             0xfffffffffffffff1 };
  85
  86 /* 64-bits types, some cases causing cumulative saturation.  */
  87 int VECT_VAR(expected_cumulative_sat_64_2,int,64,1) = 0;
  88 int VECT_VAR(expected_cumulative_sat_64_2,uint,64,1) = 1;
  89 int VECT_VAR(expected_cumulative_sat_64_2,int,64,2) = 0;
  90 int VECT_VAR(expected_cumulative_sat_64_2,uint,64,2) = 1;
  91 VECT_VAR_DECL(expected_64_2,int,64,1) [] = { 0x34 };
  92 VECT_VAR_DECL(expected_64_2,uint,64,1) [] = { 0xffffffffffffffff };
  93 VECT_VAR_DECL(expected_64_2,int,64,2) [] = { 0x34, 0x35 };
  94 VECT_VAR_DECL(expected_64_2,uint,64,2) [] = { 0xffffffffffffffff,
  95                                               0xffffffffffffffff };
  96
  97 /* 64-bits types, all causing cumulative saturation.  */
  98 int VECT_VAR(expected_cumulative_sat_64_3,int,64,1) = 1;
  99 int VECT_VAR(expected_cumulative_sat_64_3,uint,64,1) = 1;
 100 int VECT_VAR(expected_cumulative_sat_64_3,int,64,2) = 1;
 101 int VECT_VAR(expected_cumulative_sat_64_3,uint,64,2) = 1;
 102 VECT_VAR_DECL(expected_64_3,int,64,1) [] = { 0x8000000000000000 };
 103 VECT_VAR_DECL(expected_64_3,uint,64,1) [] = { 0xffffffffffffffff };
 104 VECT_VAR_DECL(expected_64_3,int,64,2) [] = { 0x7fffffffffffffff,
 105                                              0x7fffffffffffffff };
 106 VECT_VAR_DECL(expected_64_3,uint,64,2) [] = { 0xffffffffffffffff,
 107                                               0xffffffffffffffff };
 108
 109 /* smaller types, corner cases causing cumulative saturation. (1)  */
 110 int VECT_VAR(expected_csat_lt_64_1,int,8,8) = 1;
 111 int VECT_VAR(expected_csat_lt_64_1,int,16,4) = 1;
 112 int VECT_VAR(expected_csat_lt_64_1,int,32,2) = 1;
 113 int VECT_VAR(expected_csat_lt_64_1,int,8,16) = 1;
 114 int VECT_VAR(expected_csat_lt_64_1,int,16,8) = 1;
 115 int VECT_VAR(expected_csat_lt_64_1,int,32,4) = 1;
 116 VECT_VAR_DECL(expected_lt_64_1,int,8,8) [] = { 0x80, 0x80, 0x80, 0x80,
 117                                                0x80, 0x80, 0x80, 0x80 };
 118 VECT_VAR_DECL(expected_lt_64_1,int,16,4) [] = { 0x8000, 0x8000,
 119                                                 0x8000, 0x8000 };
 120 VECT_VAR_DECL(expected_lt_64_1,int,32,2) [] = { 0x80000000, 0x80000000 };
 121 VECT_VAR_DECL(expected_lt_64_1,int,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
 122                                                 0x80, 0x80, 0x80, 0x80,
 123                                                 0x80, 0x80, 0x80, 0x80,
 124                                                 0x80, 0x80, 0x80, 0x80 };
 125 VECT_VAR_DECL(expected_lt_64_1,int,16,8) [] = { 0x8000, 0x8000,
 126                                                 0x8000, 0x8000,
 127                                                 0x8000, 0x8000,
 128                                                 0x8000, 0x8000 };
 129 VECT_VAR_DECL(expected_lt_64_1,int,32,4) [] = { 0x80000000, 0x80000000,
 130                                                 0x80000000, 0x80000000 };
 131
 132 /* smaller types, corner cases causing cumulative saturation. (2)  */
 133 int VECT_VAR(expected_csat_lt_64_2,uint,8,8) = 1;
 134 int VECT_VAR(expected_csat_lt_64_2,uint,16,4) = 1;
 135 int VECT_VAR(expected_csat_lt_64_2,uint,32,2) = 1;
 136 int VECT_VAR(expected_csat_lt_64_2,uint,8,16) = 1;
 137 int VECT_VAR(expected_csat_lt_64_2,uint,16,8) = 1;
 138 int VECT_VAR(expected_csat_lt_64_2,uint,32,4) = 1;
 139 VECT_VAR_DECL(expected_lt_64_2,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
 140                                                 0xff, 0xff, 0xff, 0xff };
 141 VECT_VAR_DECL(expected_lt_64_2,uint,16,4) [] = { 0xffff, 0xffff,
 142                                                  0xffff, 0xffff };
 143 VECT_VAR_DECL(expected_lt_64_2,uint,32,2) [] = { 0xffffffff,
 144                                                  0xffffffff };
 145 VECT_VAR_DECL(expected_lt_64_2,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
 146                                                  0xff, 0xff, 0xff, 0xff,
 147                                                  0xff, 0xff, 0xff, 0xff,
 148                                                  0xff, 0xff, 0xff, 0xff };
 149 VECT_VAR_DECL(expected_lt_64_2,uint,16,8) [] = { 0xffff, 0xffff,
 150                                                  0xffff, 0xffff,
 151                                                  0xffff, 0xffff,
 152                                                  0xffff, 0xffff };
 153 VECT_VAR_DECL(expected_lt_64_2,uint,32,4) [] = { 0xffffffff, 0xffffffff,
 154                                                  0xffffffff, 0xffffffff };
 155
 156 void vqadd_extras(void)
 157 {
 158   DECL_VARIABLE_ALL_VARIANTS(vector1);
 159   DECL_VARIABLE_ALL_VARIANTS(vector2);
 160   DECL_VARIABLE_ALL_VARIANTS(vector_res);
 161
 162   /* Initialize input "vector1" from "buffer".  */
 163   TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector1, buffer);
 164
 165   /* Use a second vector full of 0.  */
 166   VDUP(vector2, , int, s, 64, 1, 0);
 167   VDUP(vector2, , uint, u, 64, 1, 0);
 168   VDUP(vector2, q, int, s, 64, 2, 0);
 169   VDUP(vector2, q, uint, u, 64, 2, 0);
 170
 171 #define MSG "64 bits saturation adding zero"
 172   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 64, 1, expected_cumulative_sat_64, MSG);
 173   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 64, 1, expected_cumulative_sat_64, MSG);
 174   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 64, 2, expected_cumulative_sat_64, MSG);
 175   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 64, 2, expected_cumulative_sat_64, MSG);
 176
 177   CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_64, MSG);
 178   CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_64, MSG);
 179   CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_64, MSG);
 180   CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_64, MSG);
 181
 182   /* Another set of tests with non-zero values, some chosen to create
 183      overflow.  */
 184   VDUP(vector2, , int, s, 64, 1, 0x44);
 185   VDUP(vector2, , uint, u, 64, 1, 0x88);
 186   VDUP(vector2, q, int, s, 64, 2, 0x44);
 187   VDUP(vector2, q, uint, u, 64, 2, 0x88);
 188
 189 #undef MSG
 190 #define MSG "64 bits saturation cumulative_sat (2)"
 191   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 64, 1, expected_cumulative_sat_64_2, MSG);
 192   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 64, 1, expected_cumulative_sat_64_2, MSG);
 193   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 64, 2, expected_cumulative_sat_64_2, MSG);
 194   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 64, 2, expected_cumulative_sat_64_2, MSG);
 195
 196   CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_64_2, MSG);
 197   CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_64_2, MSG);
 198   CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_64_2, MSG);
 199   CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_64_2, MSG);
 200
 201   /* Another set of tests, with input values chosen to set
 202      cumulative_sat in all cases.  */
 203   VDUP(vector2, , int, s, 64, 1, 0x8000000000000003LL);
 204   VDUP(vector2, , uint, u, 64, 1, 0x88);
 205   /* To check positive saturation, we need to write a positive value
 206      in vector1.  */
 207   VDUP(vector1, q, int, s, 64, 2, 0x4000000000000000LL);
 208   VDUP(vector2, q, int, s, 64, 2, 0x4000000000000000LL);
 209   VDUP(vector2, q, uint, u, 64, 2, 0x22);
 210
 211 #undef MSG
 212 #define MSG "64 bits saturation cumulative_sat (3)"
 213   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 64, 1, expected_cumulative_sat_64_3, MSG);
 214   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 64, 1, expected_cumulative_sat_64_3, MSG);
 215   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 64, 2, expected_cumulative_sat_64_3, MSG);
 216   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 64, 2, expected_cumulative_sat_64_3, MSG);
 217
 218   CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_64_3, MSG);
 219   CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_64_3, MSG);
 220   CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_64_3, MSG);
 221   CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_64_3, MSG);
 222
 223   /* To improve coverage, check saturation with less than 64 bits
 224      too.  */
 225   VDUP(vector2, , int, s, 8, 8, 0x81);
 226   VDUP(vector2, , int, s, 16, 4, 0x8001);
 227   VDUP(vector2, , int, s, 32, 2, 0x80000001);
 228   VDUP(vector2, q, int, s, 8, 16, 0x81);
 229   VDUP(vector2, q, int, s, 16, 8, 0x8001);
 230   VDUP(vector2, q, int, s, 32, 4, 0x80000001);
 231
 232 #undef MSG
 233 #define MSG "less than 64 bits saturation cumulative_sat (1)"
 234   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 8, 8, expected_csat_lt_64_1, MSG);
 235   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 16, 4, expected_csat_lt_64_1, MSG);
 236   TEST_BINARY_SAT_OP(INSN_NAME, , int, s, 32, 2, expected_csat_lt_64_1, MSG);
 237   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 8, 16, expected_csat_lt_64_1, MSG);
 238   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 16, 8, expected_csat_lt_64_1, MSG);
 239   TEST_BINARY_SAT_OP(INSN_NAME, q, int, s, 32, 4, expected_csat_lt_64_1, MSG);
 240
 241   CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_lt_64_1, MSG);
 242   CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_lt_64_1, MSG);
 243   CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_lt_64_1, MSG);
 244   CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_lt_64_1, MSG);
 245   CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_lt_64_1, MSG);
 246   CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_lt_64_1, MSG);
 247
 248   /* Another set of tests with large vector1 values.  */
 249   VDUP(vector1, , uint, u, 8, 8, 0xF0);
 250   VDUP(vector1, , uint, u, 16, 4, 0xFFF0);
 251   VDUP(vector1, , uint, u, 32, 2, 0xFFFFFFF0);
 252   VDUP(vector1, q, uint, u, 8, 16, 0xF0);
 253   VDUP(vector1, q, uint, u, 16, 8, 0xFFF0);
 254   VDUP(vector1, q, uint, u, 32, 4, 0xFFFFFFF0);
 255
 256   VDUP(vector2, , uint, u, 8, 8, 0x20);
 257   VDUP(vector2, , uint, u, 16, 4, 0x20);
 258   VDUP(vector2, , uint, u, 32, 2, 0x20);
 259   VDUP(vector2, q, uint, u, 8, 16, 0x20);
 260   VDUP(vector2, q, uint, u, 16, 8, 0x20);
 261   VDUP(vector2, q, uint, u, 32, 4, 0x20);
 262
 263 #undef MSG
 264 #define MSG "less than 64 bits saturation cumulative_sat (2)"
 265   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 8, 8, expected_csat_lt_64_2, MSG);
 266   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 16, 4, expected_csat_lt_64_2, MSG);
 267   TEST_BINARY_SAT_OP(INSN_NAME, , uint, u, 32, 2, expected_csat_lt_64_2, MSG);
 268   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 8, 16, expected_csat_lt_64_2, MSG);
 269   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 16, 8, expected_csat_lt_64_2, MSG);
 270   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 32, 4, expected_csat_lt_64_2, MSG);
 271
 272   CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_lt_64_2, MSG);
 273   CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_lt_64_2, MSG);
 274   CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_lt_64_2, MSG);
 275   CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_lt_64_2, MSG);
 276   CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_lt_64_2, MSG);
 277   CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_lt_64_2, MSG);
 278 }