PR target/82628
[official-gcc.git] / gcc / config / avr / avr-devices.c
blob9961588eef76c80d712ee99b3ce31f22c2f51568
1 /* Copyright (C) 2009-2017 Free Software Foundation, Inc.
2 Contributed by Anatoly Sokolov (aesok@post.ru)
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #ifndef IN_GEN_AVR_MMCU_TEXI
21 #include "config.h"
22 #include "system.h"
23 #include "coretypes.h"
24 #include "tm.h"
25 #include "diagnostic.h"
26 #endif /* IN_GEN_AVR_MMCU_TEXI */
28 #include "avr-arch.h"
30 /* List of all known AVR MCU architectures.
31 Order as of enum avr_arch from avr.h. */
33 const avr_arch_t
34 avr_arch_types[] =
36 /* unknown device specified */
37 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, NULL, AVR_MMCU_DEFAULT },
39 A M J LM E E E X R T d S FPO S O A
40 S U M PO L L I M A I a t lMff F ff r
41 M L P MV P P J E M N t a a s R s c
42 XW M M M G P Y a r s e e h
43 X P A D t h t t ID */
44 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "1", "avr1" },
45 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "2", "avr2" },
46 { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "25", "avr25" },
47 { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "3", "avr3" },
48 { 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, 0, 32, "31", "avr31" },
49 { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "35", "avr35" },
50 { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "4", "avr4" },
51 { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "5", "avr5" },
52 { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0x0060, 0, 32, "51", "avr51" },
53 { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, 0, 32, "6", "avr6" },
55 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, 0x4000, 0, "100", "avrtiny" },
56 { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, 0, 0, "102", "avrxmega2" },
57 { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, 0x8000, 0, "103", "avrxmega3" },
58 { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0x2000, 0, 0, "104", "avrxmega4" },
59 { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0x2000, 0, 0, "105", "avrxmega5" },
60 { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0x2000, 0, 0, "106", "avrxmega6" },
61 { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, 0, 0, "107", "avrxmega7" }
64 const avr_arch_info_t
65 avr_texinfo[] =
67 { ARCH_AVR1,
68 "This ISA is implemented by the minimal AVR core and supported "
69 "for assembler only." },
70 { ARCH_AVR2,
71 "``Classic'' devices with up to 8@tie{}KiB of program memory." },
72 { ARCH_AVR25,
73 "``Classic'' devices with up to 8@tie{}KiB of program memory and with "
74 "the @code{MOVW} instruction." },
75 { ARCH_AVR3,
76 "``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of "
77 " program memory." },
78 { ARCH_AVR31,
79 "``Classic'' devices with 128@tie{}KiB of program memory." },
80 { ARCH_AVR35,
81 "``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of "
82 "program memory and with the @code{MOVW} instruction." },
83 { ARCH_AVR4,
84 "``Enhanced'' devices with up to 8@tie{}KiB of program memory." },
85 { ARCH_AVR5,
86 "``Enhanced'' devices with 16@tie{}KiB up to 64@tie{}KiB of "
87 "program memory." },
88 { ARCH_AVR51,
89 "``Enhanced'' devices with 128@tie{}KiB of program memory." },
90 { ARCH_AVR6,
91 "``Enhanced'' devices with 3-byte PC, i.e.@: with more than 128@tie{}KiB "
92 "of program memory." },
93 { ARCH_AVRTINY,
94 "``TINY'' Tiny core devices with 512@tie{}B up to 4@tie{}KiB of "
95 "program memory." },
96 { ARCH_AVRXMEGA2,
97 "``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB "
98 "of program memory." },
99 { ARCH_AVRXMEGA3,
100 "``XMEGA'' devices with up to 64@tie{}KiB of combined program memory "
101 "and RAM, and with program memory visible in the RAM address space." },
102 { ARCH_AVRXMEGA4,
103 "``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB "
104 "of program memory." },
105 { ARCH_AVRXMEGA5,
106 "``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB "
107 "of program memory and more than 64@tie{}KiB of RAM." },
108 { ARCH_AVRXMEGA6,
109 "``XMEGA'' devices with more than 128@tie{}KiB of program memory." },
110 { ARCH_AVRXMEGA7,
111 "``XMEGA'' devices with more than 128@tie{}KiB of program memory "
112 "and more than 64@tie{}KiB of RAM." }
115 const avr_mcu_t
116 avr_mcu_types[] =
118 #define AVR_MCU(NAME, ARCH, DEV_ATTRIBUTE, MACRO, DATA_SEC, TEXT_SEC, FLASH_SIZE)\
119 { NAME, ARCH, DEV_ATTRIBUTE, MACRO, DATA_SEC, TEXT_SEC, FLASH_SIZE },
120 #include "avr-mcus.def"
121 #undef AVR_MCU
122 /* End of list. */
123 { NULL, ARCH_UNKNOWN, AVR_ISA_NONE, NULL, 0, 0, 0 }
129 #ifndef IN_GEN_AVR_MMCU_TEXI
131 static char*
132 avr_archs_str (void)
134 char *archs = concat ("", NULL);
136 // Build of core architectures' names.
138 for (const avr_mcu_t *mcu = avr_mcu_types; mcu->name; mcu++)
139 if (!mcu->macro)
140 archs = concat (archs, " ", avr_arch_types[mcu->arch_id].name, NULL);
142 return archs;
146 void
147 avr_inform_core_architectures (void)
149 char *archs = avr_archs_str ();
150 inform (input_location, "supported core architectures:%s", archs);
151 free (archs);
154 #endif // IN_GEN_AVR_MMCU_TEXI