1 /* Definitions of types that are used to store AVR architecture and
3 Copyright (C) 2012 Free Software Foundation, Inc.
4 Contributed by Georg-Johann Lay (avr@gjlay.de)
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This enum supplies indices into the avr_arch_types[] table below. */
46 /* Architecture-specific properties. */
53 /* Core have 'MUL*' instructions. */
56 /* Core have 'CALL' and 'JMP' instructions. */
59 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
62 /* Core have 'ELPM' instructions. */
65 /* Core have 'ELPM Rx,Z' instructions. */
68 /* Core have 'EICALL' and 'EIJMP' instructions. */
69 int have_eijmp_eicall
;
71 /* This is an XMEGA core. */
74 /* This core has the RAMPD special function register
75 and thus also the RAMPX, RAMPY and RAMPZ registers. */
78 /* Default start of data section address for architecture. */
79 int default_data_section_start
;
81 /* Offset between SFR address and RAM address:
82 SFR-address = RAM-address - sfr_offset */
85 /* Architecture id to built-in define __AVR_ARCH__ (NULL -> no macro) */
86 const char *const macro
;
88 /* Architecture name. */
89 const char *const arch_name
;
93 /* Device-specific properties. */
98 const char *const name
;
100 /* Index in avr_arch_types[]. */
103 /* Must lie outside user's namespace. NULL == no macro. */
104 const char *const macro
;
106 /* Stack pointer have 8 bits width. */
109 /* Some AVR devices have a core erratum when skipping a 2-word instruction.
110 Skip instructions are: SBRC, SBRS, SBIC, SBIS, CPSE.
111 Problems will occur with return address is IRQ executes during the
114 A support ticket from Atmel returned the following information:
116 Subject: (ATTicket:644469) On AVR skip-bug core Erratum
117 From: avr@atmel.com Date: 2011-07-27
118 (Please keep the subject when replying to this mail)
120 This errata exists only in AT90S8515 and ATmega103 devices.
122 For information please refer the following respective errata links
123 http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
124 http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf */
126 /* Core Erratum: Must not skip 2-word instruction. */
129 /* Start of data section. */
130 int data_section_start
;
132 /* Number of 64k segments in the flash. */
135 /* Name of device library. */
136 const char *const library_name
;
139 /* Map architecture to its texinfo string. */
143 /* Architecture ID. */
146 /* textinfo source to describe the archtiecture. */
150 /* Preprocessor macros to define depending on MCU type. */
152 extern const char *avr_extra_arch_macro
;
153 extern const struct base_arch_s
*avr_current_arch
;
154 extern const struct mcu_type_s
*avr_current_device
;
155 extern const struct mcu_type_s avr_mcu_types
[];
156 extern const struct base_arch_s avr_arch_types
[];