1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
90 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
95 #include "coretypes.h"
97 #include "rtl-error.h"
99 #include "insn-config.h"
106 #include "addresses.h"
107 #include "hard-reg-set.h"
110 #include "function.h"
115 /* True if X is a constant that can be forced into the constant pool.
116 MODE is the mode of the operand, or VOIDmode if not known. */
117 #define CONST_POOL_OK_P(MODE, X) \
118 ((MODE) != VOIDmode \
120 && GET_CODE (X) != HIGH \
121 && !targetm.cannot_force_const_mem (MODE, X))
123 /* True if C is a non-empty register class that has too few registers
124 to be safely used as a reload target class. */
127 small_register_class_p (reg_class_t rclass
)
129 return (reg_class_size
[(int) rclass
] == 1
130 || (reg_class_size
[(int) rclass
] >= 1
131 && targetm
.class_likely_spilled_p (rclass
)));
135 /* All reloads of the current insn are recorded here. See reload.h for
138 struct reload rld
[MAX_RELOADS
];
140 /* All the "earlyclobber" operands of the current insn
141 are recorded here. */
143 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
145 int reload_n_operands
;
147 /* Replacing reloads.
149 If `replace_reloads' is nonzero, then as each reload is recorded
150 an entry is made for it in the table `replacements'.
151 Then later `subst_reloads' can look through that table and
152 perform all the replacements needed. */
154 /* Nonzero means record the places to replace. */
155 static int replace_reloads
;
157 /* Each replacement is recorded with a structure like this. */
160 rtx
*where
; /* Location to store in */
161 int what
; /* which reload this is for */
162 enum machine_mode mode
; /* mode it must have */
165 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
167 /* Number of replacements currently recorded. */
168 static int n_replacements
;
170 /* Used to track what is modified by an operand. */
173 int reg_flag
; /* Nonzero if referencing a register. */
174 int safe
; /* Nonzero if this can't conflict with anything. */
175 rtx base
; /* Base address for MEM. */
176 HOST_WIDE_INT start
; /* Starting offset or register number. */
177 HOST_WIDE_INT end
; /* Ending offset or register number. */
180 #ifdef SECONDARY_MEMORY_NEEDED
182 /* Save MEMs needed to copy from one class of registers to another. One MEM
183 is used per mode, but normally only one or two modes are ever used.
185 We keep two versions, before and after register elimination. The one
186 after register elimination is record separately for each operand. This
187 is done in case the address is not valid to be sure that we separately
190 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
191 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
192 static int secondary_memlocs_elim_used
= 0;
195 /* The instruction we are doing reloads for;
196 so we can test whether a register dies in it. */
197 static rtx this_insn
;
199 /* Nonzero if this instruction is a user-specified asm with operands. */
200 static int this_insn_is_asm
;
202 /* If hard_regs_live_known is nonzero,
203 we can tell which hard regs are currently live,
204 at least enough to succeed in choosing dummy reloads. */
205 static int hard_regs_live_known
;
207 /* Indexed by hard reg number,
208 element is nonnegative if hard reg has been spilled.
209 This vector is passed to `find_reloads' as an argument
210 and is not changed here. */
211 static short *static_reload_reg_p
;
213 /* Set to 1 in subst_reg_equivs if it changes anything. */
214 static int subst_reg_equivs_changed
;
216 /* On return from push_reload, holds the reload-number for the OUT
217 operand, which can be different for that from the input operand. */
218 static int output_reloadnum
;
220 /* Compare two RTX's. */
221 #define MATCHES(x, y) \
222 (x == y || (x != 0 && (REG_P (x) \
223 ? REG_P (y) && REGNO (x) == REGNO (y) \
224 : rtx_equal_p (x, y) && ! side_effects_p (x))))
226 /* Indicates if two reloads purposes are for similar enough things that we
227 can merge their reloads. */
228 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
229 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
230 || ((when1) == (when2) && (op1) == (op2)) \
231 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
232 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
233 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
234 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
235 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
237 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
238 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
239 ((when1) != (when2) \
240 || ! ((op1) == (op2) \
241 || (when1) == RELOAD_FOR_INPUT \
242 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
243 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
245 /* If we are going to reload an address, compute the reload type to
247 #define ADDR_TYPE(type) \
248 ((type) == RELOAD_FOR_INPUT_ADDRESS \
249 ? RELOAD_FOR_INPADDR_ADDRESS \
250 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
251 ? RELOAD_FOR_OUTADDR_ADDRESS \
254 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
255 enum machine_mode
, enum reload_type
,
256 enum insn_code
*, secondary_reload_info
*);
257 static enum reg_class
find_valid_class (enum machine_mode
, enum machine_mode
,
259 static int reload_inner_reg_of_subreg (rtx
, enum machine_mode
, int);
260 static void push_replacement (rtx
*, int, enum machine_mode
);
261 static void dup_replacements (rtx
*, rtx
*);
262 static void combine_reloads (void);
263 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
264 enum reload_type
, int, int);
265 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, enum machine_mode
,
266 enum machine_mode
, reg_class_t
, int, int);
267 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
268 static struct decomposition
decompose (rtx
);
269 static int immune_p (rtx
, rtx
, struct decomposition
);
270 static bool alternative_allows_const_pool_ref (rtx
, const char *, int);
271 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int, rtx
,
273 static rtx
make_memloc (rtx
, int);
274 static int maybe_memory_address_addr_space_p (enum machine_mode
, rtx
,
275 addr_space_t
, rtx
*);
276 static int find_reloads_address (enum machine_mode
, rtx
*, rtx
, rtx
*,
277 int, enum reload_type
, int, rtx
);
278 static rtx
subst_reg_equivs (rtx
, rtx
);
279 static rtx
subst_indexed_address (rtx
);
280 static void update_auto_inc_notes (rtx
, int, int);
281 static int find_reloads_address_1 (enum machine_mode
, rtx
, int,
282 enum rtx_code
, enum rtx_code
, rtx
*,
283 int, enum reload_type
,int, rtx
);
284 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
285 enum machine_mode
, int,
286 enum reload_type
, int);
287 static rtx
find_reloads_subreg_address (rtx
, int, int, enum reload_type
,
289 static void copy_replacements_1 (rtx
*, rtx
*, int);
290 static int find_inc_amount (rtx
, rtx
);
291 static int refers_to_mem_for_reload_p (rtx
);
292 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
295 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
299 push_reg_equiv_alt_mem (int regno
, rtx mem
)
303 for (it
= reg_equiv_alt_mem_list (regno
); it
; it
= XEXP (it
, 1))
304 if (rtx_equal_p (XEXP (it
, 0), mem
))
307 reg_equiv_alt_mem_list (regno
)
308 = alloc_EXPR_LIST (REG_EQUIV
, mem
,
309 reg_equiv_alt_mem_list (regno
));
312 /* Determine if any secondary reloads are needed for loading (if IN_P is
313 nonzero) or storing (if IN_P is zero) X to or from a reload register of
314 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
315 are needed, push them.
317 Return the reload number of the secondary reload we made, or -1 if
318 we didn't need one. *PICODE is set to the insn_code to use if we do
319 need a secondary reload. */
322 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
323 enum reg_class reload_class
,
324 enum machine_mode reload_mode
, enum reload_type type
,
325 enum insn_code
*picode
, secondary_reload_info
*prev_sri
)
327 enum reg_class rclass
= NO_REGS
;
328 enum reg_class scratch_class
;
329 enum machine_mode mode
= reload_mode
;
330 enum insn_code icode
= CODE_FOR_nothing
;
331 enum insn_code t_icode
= CODE_FOR_nothing
;
332 enum reload_type secondary_type
;
333 int s_reload
, t_reload
= -1;
334 const char *scratch_constraint
;
336 secondary_reload_info sri
;
338 if (type
== RELOAD_FOR_INPUT_ADDRESS
339 || type
== RELOAD_FOR_OUTPUT_ADDRESS
340 || type
== RELOAD_FOR_INPADDR_ADDRESS
341 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
342 secondary_type
= type
;
344 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
346 *picode
= CODE_FOR_nothing
;
348 /* If X is a paradoxical SUBREG, use the inner value to determine both the
349 mode and object being reloaded. */
350 if (paradoxical_subreg_p (x
))
353 reload_mode
= GET_MODE (x
);
356 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
357 is still a pseudo-register by now, it *must* have an equivalent MEM
358 but we don't want to assume that), use that equivalent when seeing if
359 a secondary reload is needed since whether or not a reload is needed
360 might be sensitive to the form of the MEM. */
362 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
363 && reg_equiv_mem (REGNO (x
)))
364 x
= reg_equiv_mem (REGNO (x
));
366 sri
.icode
= CODE_FOR_nothing
;
367 sri
.prev_sri
= prev_sri
;
368 rclass
= (enum reg_class
) targetm
.secondary_reload (in_p
, x
, reload_class
,
370 icode
= (enum insn_code
) sri
.icode
;
372 /* If we don't need any secondary registers, done. */
373 if (rclass
== NO_REGS
&& icode
== CODE_FOR_nothing
)
376 if (rclass
!= NO_REGS
)
377 t_reload
= push_secondary_reload (in_p
, x
, opnum
, optional
, rclass
,
378 reload_mode
, type
, &t_icode
, &sri
);
380 /* If we will be using an insn, the secondary reload is for a
383 if (icode
!= CODE_FOR_nothing
)
385 /* If IN_P is nonzero, the reload register will be the output in
386 operand 0. If IN_P is zero, the reload register will be the input
387 in operand 1. Outputs should have an initial "=", which we must
390 /* ??? It would be useful to be able to handle only two, or more than
391 three, operands, but for now we can only handle the case of having
392 exactly three: output, input and one temp/scratch. */
393 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
395 /* ??? We currently have no way to represent a reload that needs
396 an icode to reload from an intermediate tertiary reload register.
397 We should probably have a new field in struct reload to tag a
398 chain of scratch operand reloads onto. */
399 gcc_assert (rclass
== NO_REGS
);
401 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
402 gcc_assert (*scratch_constraint
== '=');
403 scratch_constraint
++;
404 if (*scratch_constraint
== '&')
405 scratch_constraint
++;
406 letter
= *scratch_constraint
;
407 scratch_class
= (letter
== 'r' ? GENERAL_REGS
408 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter
,
409 scratch_constraint
));
411 rclass
= scratch_class
;
412 mode
= insn_data
[(int) icode
].operand
[2].mode
;
415 /* This case isn't valid, so fail. Reload is allowed to use the same
416 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
417 in the case of a secondary register, we actually need two different
418 registers for correct code. We fail here to prevent the possibility of
419 silently generating incorrect code later.
421 The convention is that secondary input reloads are valid only if the
422 secondary_class is different from class. If you have such a case, you
423 can not use secondary reloads, you must work around the problem some
426 Allow this when a reload_in/out pattern is being used. I.e. assume
427 that the generated code handles this case. */
429 gcc_assert (!in_p
|| rclass
!= reload_class
|| icode
!= CODE_FOR_nothing
430 || t_icode
!= CODE_FOR_nothing
);
432 /* See if we can reuse an existing secondary reload. */
433 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
434 if (rld
[s_reload
].secondary_p
435 && (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
)
436 || reg_class_subset_p (rld
[s_reload
].rclass
, rclass
))
437 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
438 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
439 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
440 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
441 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
442 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
443 && (small_register_class_p (rclass
)
444 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
445 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
446 opnum
, rld
[s_reload
].opnum
))
449 rld
[s_reload
].inmode
= mode
;
451 rld
[s_reload
].outmode
= mode
;
453 if (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
))
454 rld
[s_reload
].rclass
= rclass
;
456 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
457 rld
[s_reload
].optional
&= optional
;
458 rld
[s_reload
].secondary_p
= 1;
459 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
460 opnum
, rld
[s_reload
].opnum
))
461 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
466 if (s_reload
== n_reloads
)
468 #ifdef SECONDARY_MEMORY_NEEDED
469 /* If we need a memory location to copy between the two reload regs,
470 set it up now. Note that we do the input case before making
471 the reload and the output case after. This is due to the
472 way reloads are output. */
474 if (in_p
&& icode
== CODE_FOR_nothing
475 && SECONDARY_MEMORY_NEEDED (rclass
, reload_class
, mode
))
477 get_secondary_mem (x
, reload_mode
, opnum
, type
);
479 /* We may have just added new reloads. Make sure we add
480 the new reload at the end. */
481 s_reload
= n_reloads
;
485 /* We need to make a new secondary reload for this register class. */
486 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
487 rld
[s_reload
].rclass
= rclass
;
489 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
490 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
491 rld
[s_reload
].reg_rtx
= 0;
492 rld
[s_reload
].optional
= optional
;
493 rld
[s_reload
].inc
= 0;
494 /* Maybe we could combine these, but it seems too tricky. */
495 rld
[s_reload
].nocombine
= 1;
496 rld
[s_reload
].in_reg
= 0;
497 rld
[s_reload
].out_reg
= 0;
498 rld
[s_reload
].opnum
= opnum
;
499 rld
[s_reload
].when_needed
= secondary_type
;
500 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
501 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
502 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
503 rld
[s_reload
].secondary_out_icode
504 = ! in_p
? t_icode
: CODE_FOR_nothing
;
505 rld
[s_reload
].secondary_p
= 1;
509 #ifdef SECONDARY_MEMORY_NEEDED
510 if (! in_p
&& icode
== CODE_FOR_nothing
511 && SECONDARY_MEMORY_NEEDED (reload_class
, rclass
, mode
))
512 get_secondary_mem (x
, mode
, opnum
, type
);
520 /* If a secondary reload is needed, return its class. If both an intermediate
521 register and a scratch register is needed, we return the class of the
522 intermediate register. */
524 secondary_reload_class (bool in_p
, reg_class_t rclass
, enum machine_mode mode
,
527 enum insn_code icode
;
528 secondary_reload_info sri
;
530 sri
.icode
= CODE_FOR_nothing
;
533 = (enum reg_class
) targetm
.secondary_reload (in_p
, x
, rclass
, mode
, &sri
);
534 icode
= (enum insn_code
) sri
.icode
;
536 /* If there are no secondary reloads at all, we return NO_REGS.
537 If an intermediate register is needed, we return its class. */
538 if (icode
== CODE_FOR_nothing
|| rclass
!= NO_REGS
)
541 /* No intermediate register is needed, but we have a special reload
542 pattern, which we assume for now needs a scratch register. */
543 return scratch_reload_class (icode
);
546 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
547 three operands, verify that operand 2 is an output operand, and return
549 ??? We'd like to be able to handle any pattern with at least 2 operands,
550 for zero or more scratch registers, but that needs more infrastructure. */
552 scratch_reload_class (enum insn_code icode
)
554 const char *scratch_constraint
;
556 enum reg_class rclass
;
558 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
559 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
560 gcc_assert (*scratch_constraint
== '=');
561 scratch_constraint
++;
562 if (*scratch_constraint
== '&')
563 scratch_constraint
++;
564 scratch_letter
= *scratch_constraint
;
565 if (scratch_letter
== 'r')
567 rclass
= REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter
,
569 gcc_assert (rclass
!= NO_REGS
);
573 #ifdef SECONDARY_MEMORY_NEEDED
575 /* Return a memory location that will be used to copy X in mode MODE.
576 If we haven't already made a location for this mode in this insn,
577 call find_reloads_address on the location being returned. */
580 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, enum machine_mode mode
,
581 int opnum
, enum reload_type type
)
586 /* By default, if MODE is narrower than a word, widen it to a word.
587 This is required because most machines that require these memory
588 locations do not support short load and stores from all registers
589 (e.g., FP registers). */
591 #ifdef SECONDARY_MEMORY_NEEDED_MODE
592 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
594 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
595 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
598 /* If we already have made a MEM for this operand in MODE, return it. */
599 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
600 return secondary_memlocs_elim
[(int) mode
][opnum
];
602 /* If this is the first time we've tried to get a MEM for this mode,
603 allocate a new one. `something_changed' in reload will get set
604 by noticing that the frame size has changed. */
606 if (secondary_memlocs
[(int) mode
] == 0)
608 #ifdef SECONDARY_MEMORY_NEEDED_RTX
609 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
611 secondary_memlocs
[(int) mode
]
612 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
616 /* Get a version of the address doing any eliminations needed. If that
617 didn't give us a new MEM, make a new one if it isn't valid. */
619 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
620 mem_valid
= strict_memory_address_addr_space_p (mode
, XEXP (loc
, 0),
621 MEM_ADDR_SPACE (loc
));
623 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
624 loc
= copy_rtx (loc
);
626 /* The only time the call below will do anything is if the stack
627 offset is too large. In that case IND_LEVELS doesn't matter, so we
628 can just pass a zero. Adjust the type to be the address of the
629 corresponding object. If the address was valid, save the eliminated
630 address. If it wasn't valid, we need to make a reload each time, so
635 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
636 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
639 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
643 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
644 if (secondary_memlocs_elim_used
<= (int)mode
)
645 secondary_memlocs_elim_used
= (int)mode
+ 1;
649 /* Clear any secondary memory locations we've made. */
652 clear_secondary_mem (void)
654 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
656 #endif /* SECONDARY_MEMORY_NEEDED */
659 /* Find the largest class which has at least one register valid in
660 mode INNER, and which for every such register, that register number
661 plus N is also valid in OUTER (if in range) and is cheap to move
662 into REGNO. Such a class must exist. */
664 static enum reg_class
665 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED
,
666 enum machine_mode inner ATTRIBUTE_UNUSED
, int n
,
667 unsigned int dest_regno ATTRIBUTE_UNUSED
)
672 enum reg_class best_class
= NO_REGS
;
673 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
674 unsigned int best_size
= 0;
677 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
681 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
- n
&& ! bad
; regno
++)
682 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
))
684 if (HARD_REGNO_MODE_OK (regno
, inner
))
687 if (! TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
+ n
)
688 || ! HARD_REGNO_MODE_OK (regno
+ n
, outer
))
695 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
697 if ((reg_class_size
[rclass
] > best_size
698 && (best_cost
< 0 || best_cost
>= cost
))
701 best_class
= (enum reg_class
) rclass
;
702 best_size
= reg_class_size
[rclass
];
703 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
708 gcc_assert (best_size
!= 0);
713 /* Return the number of a previously made reload that can be combined with
714 a new one, or n_reloads if none of the existing reloads can be used.
715 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
716 push_reload, they determine the kind of the new reload that we try to
717 combine. P_IN points to the corresponding value of IN, which can be
718 modified by this function.
719 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
722 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class rclass
,
723 enum reload_type type
, int opnum
, int dont_share
)
727 /* We can't merge two reloads if the output of either one is
730 if (earlyclobber_operand_p (out
))
733 /* We can use an existing reload if the class is right
734 and at least one of IN and OUT is a match
735 and the other is at worst neutral.
736 (A zero compared against anything is neutral.)
738 For targets with small register classes, don't use existing reloads
739 unless they are for the same thing since that can cause us to need
740 more reload registers than we otherwise would. */
742 for (i
= 0; i
< n_reloads
; i
++)
743 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
744 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
745 /* If the existing reload has a register, it must fit our class. */
746 && (rld
[i
].reg_rtx
== 0
747 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
748 true_regnum (rld
[i
].reg_rtx
)))
749 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
750 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
751 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
752 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
753 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
754 && (small_register_class_p (rclass
)
755 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
756 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
759 /* Reloading a plain reg for input can match a reload to postincrement
760 that reg, since the postincrement's value is the right value.
761 Likewise, it can match a preincrement reload, since we regard
762 the preincrementation as happening before any ref in this insn
764 for (i
= 0; i
< n_reloads
; i
++)
765 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
766 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
767 /* If the existing reload has a register, it must fit our
769 && (rld
[i
].reg_rtx
== 0
770 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
771 true_regnum (rld
[i
].reg_rtx
)))
772 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
774 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
775 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
776 || (REG_P (rld
[i
].in
)
777 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
778 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
779 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
780 && (small_register_class_p (rclass
)
781 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
782 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
783 opnum
, rld
[i
].opnum
))
785 /* Make sure reload_in ultimately has the increment,
786 not the plain register. */
794 /* Return nonzero if X is a SUBREG which will require reloading of its
795 SUBREG_REG expression. */
798 reload_inner_reg_of_subreg (rtx x
, enum machine_mode mode
, int output
)
802 /* Only SUBREGs are problematical. */
803 if (GET_CODE (x
) != SUBREG
)
806 inner
= SUBREG_REG (x
);
808 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
809 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
812 /* If INNER is not a hard register, then INNER will not need to
815 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
818 /* If INNER is not ok for MODE, then INNER will need reloading. */
819 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
822 /* If the outer part is a word or smaller, INNER larger than a
823 word and the number of regs for INNER is not the same as the
824 number of words in INNER, then INNER will need reloading. */
825 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
827 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
828 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
829 != (int) hard_regno_nregs
[REGNO (inner
)][GET_MODE (inner
)]));
832 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
833 requiring an extra reload register. The caller has already found that
834 IN contains some reference to REGNO, so check that we can produce the
835 new value in a single step. E.g. if we have
836 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
837 instruction that adds one to a register, this should succeed.
838 However, if we have something like
839 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
840 needs to be loaded into a register first, we need a separate reload
842 Such PLUS reloads are generated by find_reload_address_part.
843 The out-of-range PLUS expressions are usually introduced in the instruction
844 patterns by register elimination and substituting pseudos without a home
845 by their function-invariant equivalences. */
847 can_reload_into (rtx in
, int regno
, enum machine_mode mode
)
851 struct recog_data save_recog_data
;
853 /* For matching constraints, we often get notional input reloads where
854 we want to use the original register as the reload register. I.e.
855 technically this is a non-optional input-output reload, but IN is
856 already a valid register, and has been chosen as the reload register.
857 Speed this up, since it trivially works. */
861 /* To test MEMs properly, we'd have to take into account all the reloads
862 that are already scheduled, which can become quite complicated.
863 And since we've already handled address reloads for this MEM, it
864 should always succeed anyway. */
868 /* If we can make a simple SET insn that does the job, everything should
870 dst
= gen_rtx_REG (mode
, regno
);
871 test_insn
= make_insn_raw (gen_rtx_SET (VOIDmode
, dst
, in
));
872 save_recog_data
= recog_data
;
873 if (recog_memoized (test_insn
) >= 0)
875 extract_insn (test_insn
);
876 r
= constrain_operands (1);
878 recog_data
= save_recog_data
;
882 /* Record one reload that needs to be performed.
883 IN is an rtx saying where the data are to be found before this instruction.
884 OUT says where they must be stored after the instruction.
885 (IN is zero for data not read, and OUT is zero for data not written.)
886 INLOC and OUTLOC point to the places in the instructions where
887 IN and OUT were found.
888 If IN and OUT are both nonzero, it means the same register must be used
889 to reload both IN and OUT.
891 RCLASS is a register class required for the reloaded data.
892 INMODE is the machine mode that the instruction requires
893 for the reg that replaces IN and OUTMODE is likewise for OUT.
895 If IN is zero, then OUT's location and mode should be passed as
898 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
900 OPTIONAL nonzero means this reload does not need to be performed:
901 it can be discarded if that is more convenient.
903 OPNUM and TYPE say what the purpose of this reload is.
905 The return value is the reload-number for this reload.
907 If both IN and OUT are nonzero, in some rare cases we might
908 want to make two separate reloads. (Actually we never do this now.)
909 Therefore, the reload-number for OUT is stored in
910 output_reloadnum when we return; the return value applies to IN.
911 Usually (presently always), when IN and OUT are nonzero,
912 the two reload-numbers are equal, but the caller should be careful to
916 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
917 enum reg_class rclass
, enum machine_mode inmode
,
918 enum machine_mode outmode
, int strict_low
, int optional
,
919 int opnum
, enum reload_type type
)
923 int dont_remove_subreg
= 0;
924 #ifdef LIMIT_RELOAD_CLASS
925 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
927 int secondary_in_reload
= -1, secondary_out_reload
= -1;
928 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
929 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
931 /* INMODE and/or OUTMODE could be VOIDmode if no mode
932 has been specified for the operand. In that case,
933 use the operand's mode as the mode to reload. */
934 if (inmode
== VOIDmode
&& in
!= 0)
935 inmode
= GET_MODE (in
);
936 if (outmode
== VOIDmode
&& out
!= 0)
937 outmode
= GET_MODE (out
);
939 /* If find_reloads and friends until now missed to replace a pseudo
940 with a constant of reg_equiv_constant something went wrong
942 Note that it can't simply be done here if we missed it earlier
943 since the constant might need to be pushed into the literal pool
944 and the resulting memref would probably need further
946 if (in
!= 0 && REG_P (in
))
948 int regno
= REGNO (in
);
950 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
951 || reg_renumber
[regno
] >= 0
952 || reg_equiv_constant (regno
) == NULL_RTX
);
955 /* reg_equiv_constant only contains constants which are obviously
956 not appropriate as destination. So if we would need to replace
957 the destination pseudo with a constant we are in real
959 if (out
!= 0 && REG_P (out
))
961 int regno
= REGNO (out
);
963 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
964 || reg_renumber
[regno
] >= 0
965 || reg_equiv_constant (regno
) == NULL_RTX
);
968 /* If we have a read-write operand with an address side-effect,
969 change either IN or OUT so the side-effect happens only once. */
970 if (in
!= 0 && out
!= 0 && MEM_P (in
) && rtx_equal_p (in
, out
))
971 switch (GET_CODE (XEXP (in
, 0)))
973 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
974 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
977 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
978 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
985 /* If we are reloading a (SUBREG constant ...), really reload just the
986 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
987 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
988 a pseudo and hence will become a MEM) with M1 wider than M2 and the
989 register is a pseudo, also reload the inside expression.
990 For machines that extend byte loads, do this for any SUBREG of a pseudo
991 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
992 M2 is an integral mode that gets extended when loaded.
993 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
994 either M1 is not valid for R or M2 is wider than a word but we only
995 need one word to store an M2-sized quantity in R.
996 (However, if OUT is nonzero, we need to reload the reg *and*
997 the subreg, so do nothing here, and let following statement handle it.)
999 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1000 we can't handle it here because CONST_INT does not indicate a mode.
1002 Similarly, we must reload the inside expression if we have a
1003 STRICT_LOW_PART (presumably, in == out in this case).
1005 Also reload the inner expression if it does not require a secondary
1006 reload but the SUBREG does.
1008 Finally, reload the inner expression if it is a register that is in
1009 the class whose registers cannot be referenced in a different size
1010 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1011 cannot reload just the inside since we might end up with the wrong
1012 register class. But if it is inside a STRICT_LOW_PART, we have
1013 no choice, so we hope we do get the right register class there. */
1015 if (in
!= 0 && GET_CODE (in
) == SUBREG
1016 && (subreg_lowpart_p (in
) || strict_low
)
1017 #ifdef CANNOT_CHANGE_MODE_CLASS
1018 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, rclass
)
1020 && contains_reg_of_mode
[(int) rclass
][(int) GET_MODE (SUBREG_REG (in
))]
1021 && (CONSTANT_P (SUBREG_REG (in
))
1022 || GET_CODE (SUBREG_REG (in
)) == PLUS
1024 || (((REG_P (SUBREG_REG (in
))
1025 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1026 || MEM_P (SUBREG_REG (in
)))
1027 && ((GET_MODE_PRECISION (inmode
)
1028 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1029 #ifdef LOAD_EXTEND_OP
1030 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1031 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1033 && (GET_MODE_PRECISION (inmode
)
1034 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1035 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
1036 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != UNKNOWN
)
1038 #ifdef WORD_REGISTER_OPERATIONS
1039 || ((GET_MODE_PRECISION (inmode
)
1040 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1041 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1042 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1046 || (REG_P (SUBREG_REG (in
))
1047 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1048 /* The case where out is nonzero
1049 is handled differently in the following statement. */
1050 && (out
== 0 || subreg_lowpart_p (in
))
1051 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1052 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1054 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1056 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (in
))]
1057 [GET_MODE (SUBREG_REG (in
))]))
1058 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1059 || (secondary_reload_class (1, rclass
, inmode
, in
) != NO_REGS
1060 && (secondary_reload_class (1, rclass
, GET_MODE (SUBREG_REG (in
)),
1063 #ifdef CANNOT_CHANGE_MODE_CLASS
1064 || (REG_P (SUBREG_REG (in
))
1065 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1066 && REG_CANNOT_CHANGE_MODE_P
1067 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1071 #ifdef LIMIT_RELOAD_CLASS
1072 in_subreg_loc
= inloc
;
1074 inloc
= &SUBREG_REG (in
);
1076 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1078 /* This is supposed to happen only for paradoxical subregs made by
1079 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1080 gcc_assert (GET_MODE_SIZE (GET_MODE (in
)) <= GET_MODE_SIZE (inmode
));
1082 inmode
= GET_MODE (in
);
1085 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1086 either M1 is not valid for R or M2 is wider than a word but we only
1087 need one word to store an M2-sized quantity in R.
1089 However, we must reload the inner reg *as well as* the subreg in
1092 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1093 code above. This can happen if SUBREG_BYTE != 0. */
1095 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, 0))
1097 enum reg_class in_class
= rclass
;
1099 if (REG_P (SUBREG_REG (in
)))
1101 = find_valid_class (inmode
, GET_MODE (SUBREG_REG (in
)),
1102 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1103 GET_MODE (SUBREG_REG (in
)),
1106 REGNO (SUBREG_REG (in
)));
1108 /* This relies on the fact that emit_reload_insns outputs the
1109 instructions for input reloads of type RELOAD_OTHER in the same
1110 order as the reloads. Thus if the outer reload is also of type
1111 RELOAD_OTHER, we are guaranteed that this inner reload will be
1112 output before the outer reload. */
1113 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1114 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1115 dont_remove_subreg
= 1;
1118 /* Similarly for paradoxical and problematical SUBREGs on the output.
1119 Note that there is no reason we need worry about the previous value
1120 of SUBREG_REG (out); even if wider than out,
1121 storing in a subreg is entitled to clobber it all
1122 (except in the case of STRICT_LOW_PART,
1123 and in that case the constraint should label it input-output.) */
1124 if (out
!= 0 && GET_CODE (out
) == SUBREG
1125 && (subreg_lowpart_p (out
) || strict_low
)
1126 #ifdef CANNOT_CHANGE_MODE_CLASS
1127 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, rclass
)
1129 && contains_reg_of_mode
[(int) rclass
][(int) GET_MODE (SUBREG_REG (out
))]
1130 && (CONSTANT_P (SUBREG_REG (out
))
1132 || (((REG_P (SUBREG_REG (out
))
1133 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1134 || MEM_P (SUBREG_REG (out
)))
1135 && ((GET_MODE_PRECISION (outmode
)
1136 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out
))))
1137 #ifdef WORD_REGISTER_OPERATIONS
1138 || ((GET_MODE_PRECISION (outmode
)
1139 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out
))))
1140 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1141 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1145 || (REG_P (SUBREG_REG (out
))
1146 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1147 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1148 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1150 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1152 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (out
))]
1153 [GET_MODE (SUBREG_REG (out
))]))
1154 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1155 || (secondary_reload_class (0, rclass
, outmode
, out
) != NO_REGS
1156 && (secondary_reload_class (0, rclass
, GET_MODE (SUBREG_REG (out
)),
1159 #ifdef CANNOT_CHANGE_MODE_CLASS
1160 || (REG_P (SUBREG_REG (out
))
1161 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1162 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1163 GET_MODE (SUBREG_REG (out
)),
1168 #ifdef LIMIT_RELOAD_CLASS
1169 out_subreg_loc
= outloc
;
1171 outloc
= &SUBREG_REG (out
);
1173 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1174 gcc_assert (!MEM_P (out
)
1175 || GET_MODE_SIZE (GET_MODE (out
))
1176 <= GET_MODE_SIZE (outmode
));
1178 outmode
= GET_MODE (out
);
1181 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1182 either M1 is not valid for R or M2 is wider than a word but we only
1183 need one word to store an M2-sized quantity in R.
1185 However, we must reload the inner reg *as well as* the subreg in
1186 that case. In this case, the inner reg is an in-out reload. */
1188 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, 1))
1190 /* This relies on the fact that emit_reload_insns outputs the
1191 instructions for output reloads of type RELOAD_OTHER in reverse
1192 order of the reloads. Thus if the outer reload is also of type
1193 RELOAD_OTHER, we are guaranteed that this inner reload will be
1194 output after the outer reload. */
1195 dont_remove_subreg
= 1;
1196 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1198 find_valid_class (outmode
, GET_MODE (SUBREG_REG (out
)),
1199 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1200 GET_MODE (SUBREG_REG (out
)),
1203 REGNO (SUBREG_REG (out
))),
1204 VOIDmode
, VOIDmode
, 0, 0,
1205 opnum
, RELOAD_OTHER
);
1208 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1209 if (in
!= 0 && out
!= 0 && MEM_P (out
)
1210 && (REG_P (in
) || MEM_P (in
) || GET_CODE (in
) == PLUS
)
1211 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1214 /* If IN is a SUBREG of a hard register, make a new REG. This
1215 simplifies some of the cases below. */
1217 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))
1218 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1219 && ! dont_remove_subreg
)
1220 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1222 /* Similarly for OUT. */
1223 if (out
!= 0 && GET_CODE (out
) == SUBREG
1224 && REG_P (SUBREG_REG (out
))
1225 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1226 && ! dont_remove_subreg
)
1227 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1229 /* Narrow down the class of register wanted if that is
1230 desirable on this machine for efficiency. */
1232 reg_class_t preferred_class
= rclass
;
1235 preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1237 /* Output reloads may need analogous treatment, different in detail. */
1240 = targetm
.preferred_output_reload_class (out
, preferred_class
);
1242 /* Discard what the target said if we cannot do it. */
1243 if (preferred_class
!= NO_REGS
1244 || (optional
&& type
== RELOAD_FOR_OUTPUT
))
1245 rclass
= (enum reg_class
) preferred_class
;
1248 /* Make sure we use a class that can handle the actual pseudo
1249 inside any subreg. For example, on the 386, QImode regs
1250 can appear within SImode subregs. Although GENERAL_REGS
1251 can handle SImode, QImode needs a smaller class. */
1252 #ifdef LIMIT_RELOAD_CLASS
1254 rclass
= LIMIT_RELOAD_CLASS (inmode
, rclass
);
1255 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1256 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), rclass
);
1259 rclass
= LIMIT_RELOAD_CLASS (outmode
, rclass
);
1260 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1261 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), rclass
);
1264 /* Verify that this class is at least possible for the mode that
1266 if (this_insn_is_asm
)
1268 enum machine_mode mode
;
1269 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1273 if (mode
== VOIDmode
)
1275 error_for_asm (this_insn
, "cannot reload integer constant "
1276 "operand in %<asm%>");
1281 outmode
= word_mode
;
1283 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1284 if (HARD_REGNO_MODE_OK (i
, mode
)
1285 && in_hard_reg_set_p (reg_class_contents
[(int) rclass
], mode
, i
))
1287 if (i
== FIRST_PSEUDO_REGISTER
)
1289 error_for_asm (this_insn
, "impossible register constraint "
1291 /* Avoid further trouble with this insn. */
1292 PATTERN (this_insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1293 /* We used to continue here setting class to ALL_REGS, but it triggers
1294 sanity check on i386 for:
1295 void foo(long double d)
1299 Returning zero here ought to be safe as we take care in
1300 find_reloads to not process the reloads when instruction was
1307 /* Optional output reloads are always OK even if we have no register class,
1308 since the function of these reloads is only to have spill_reg_store etc.
1309 set, so that the storing insn can be deleted later. */
1310 gcc_assert (rclass
!= NO_REGS
1311 || (optional
!= 0 && type
== RELOAD_FOR_OUTPUT
));
1313 i
= find_reusable_reload (&in
, out
, rclass
, type
, opnum
, dont_share
);
1317 /* See if we need a secondary reload register to move between CLASS
1318 and IN or CLASS and OUT. Get the icode and push any required reloads
1319 needed for each of them if so. */
1323 = push_secondary_reload (1, in
, opnum
, optional
, rclass
, inmode
, type
,
1324 &secondary_in_icode
, NULL
);
1325 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1326 secondary_out_reload
1327 = push_secondary_reload (0, out
, opnum
, optional
, rclass
, outmode
,
1328 type
, &secondary_out_icode
, NULL
);
1330 /* We found no existing reload suitable for re-use.
1331 So add an additional reload. */
1333 #ifdef SECONDARY_MEMORY_NEEDED
1334 /* If a memory location is needed for the copy, make one. */
1337 || (GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))))
1338 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
1339 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in
)),
1341 get_secondary_mem (in
, inmode
, opnum
, type
);
1347 rld
[i
].rclass
= rclass
;
1348 rld
[i
].inmode
= inmode
;
1349 rld
[i
].outmode
= outmode
;
1351 rld
[i
].optional
= optional
;
1353 rld
[i
].nocombine
= 0;
1354 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1355 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1356 rld
[i
].opnum
= opnum
;
1357 rld
[i
].when_needed
= type
;
1358 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1359 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1360 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1361 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1362 rld
[i
].secondary_p
= 0;
1366 #ifdef SECONDARY_MEMORY_NEEDED
1369 || (GET_CODE (out
) == SUBREG
&& REG_P (SUBREG_REG (out
))))
1370 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1371 && SECONDARY_MEMORY_NEEDED (rclass
,
1372 REGNO_REG_CLASS (reg_or_subregno (out
)),
1374 get_secondary_mem (out
, outmode
, opnum
, type
);
1379 /* We are reusing an existing reload,
1380 but we may have additional information for it.
1381 For example, we may now have both IN and OUT
1382 while the old one may have just one of them. */
1384 /* The modes can be different. If they are, we want to reload in
1385 the larger mode, so that the value is valid for both modes. */
1386 if (inmode
!= VOIDmode
1387 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1388 rld
[i
].inmode
= inmode
;
1389 if (outmode
!= VOIDmode
1390 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1391 rld
[i
].outmode
= outmode
;
1394 rtx in_reg
= inloc
? *inloc
: 0;
1395 /* If we merge reloads for two distinct rtl expressions that
1396 are identical in content, there might be duplicate address
1397 reloads. Remove the extra set now, so that if we later find
1398 that we can inherit this reload, we can get rid of the
1399 address reloads altogether.
1401 Do not do this if both reloads are optional since the result
1402 would be an optional reload which could potentially leave
1403 unresolved address replacements.
1405 It is not sufficient to call transfer_replacements since
1406 choose_reload_regs will remove the replacements for address
1407 reloads of inherited reloads which results in the same
1409 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1410 && ! (rld
[i
].optional
&& optional
))
1412 /* We must keep the address reload with the lower operand
1414 if (opnum
> rld
[i
].opnum
)
1416 remove_address_replacements (in
);
1418 in_reg
= rld
[i
].in_reg
;
1421 remove_address_replacements (rld
[i
].in
);
1423 /* When emitting reloads we don't necessarily look at the in-
1424 and outmode, but also directly at the operands (in and out).
1425 So we can't simply overwrite them with whatever we have found
1426 for this (to-be-merged) reload, we have to "merge" that too.
1427 Reusing another reload already verified that we deal with the
1428 same operands, just possibly in different modes. So we
1429 overwrite the operands only when the new mode is larger.
1430 See also PR33613. */
1432 || GET_MODE_SIZE (GET_MODE (in
))
1433 > GET_MODE_SIZE (GET_MODE (rld
[i
].in
)))
1437 && GET_MODE_SIZE (GET_MODE (in_reg
))
1438 > GET_MODE_SIZE (GET_MODE (rld
[i
].in_reg
))))
1439 rld
[i
].in_reg
= in_reg
;
1445 && GET_MODE_SIZE (GET_MODE (out
))
1446 > GET_MODE_SIZE (GET_MODE (rld
[i
].out
))))
1450 || GET_MODE_SIZE (GET_MODE (*outloc
))
1451 > GET_MODE_SIZE (GET_MODE (rld
[i
].out_reg
))))
1452 rld
[i
].out_reg
= *outloc
;
1454 if (reg_class_subset_p (rclass
, rld
[i
].rclass
))
1455 rld
[i
].rclass
= rclass
;
1456 rld
[i
].optional
&= optional
;
1457 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1458 opnum
, rld
[i
].opnum
))
1459 rld
[i
].when_needed
= RELOAD_OTHER
;
1460 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1463 /* If the ostensible rtx being reloaded differs from the rtx found
1464 in the location to substitute, this reload is not safe to combine
1465 because we cannot reliably tell whether it appears in the insn. */
1467 if (in
!= 0 && in
!= *inloc
)
1468 rld
[i
].nocombine
= 1;
1471 /* This was replaced by changes in find_reloads_address_1 and the new
1472 function inc_for_reload, which go with a new meaning of reload_inc. */
1474 /* If this is an IN/OUT reload in an insn that sets the CC,
1475 it must be for an autoincrement. It doesn't work to store
1476 the incremented value after the insn because that would clobber the CC.
1477 So we must do the increment of the value reloaded from,
1478 increment it, store it back, then decrement again. */
1479 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1483 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1484 /* If we did not find a nonzero amount-to-increment-by,
1485 that contradicts the belief that IN is being incremented
1486 in an address in this insn. */
1487 gcc_assert (rld
[i
].inc
!= 0);
1491 /* If we will replace IN and OUT with the reload-reg,
1492 record where they are located so that substitution need
1493 not do a tree walk. */
1495 if (replace_reloads
)
1499 struct replacement
*r
= &replacements
[n_replacements
++];
1504 if (outloc
!= 0 && outloc
!= inloc
)
1506 struct replacement
*r
= &replacements
[n_replacements
++];
1513 /* If this reload is just being introduced and it has both
1514 an incoming quantity and an outgoing quantity that are
1515 supposed to be made to match, see if either one of the two
1516 can serve as the place to reload into.
1518 If one of them is acceptable, set rld[i].reg_rtx
1521 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1523 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1526 earlyclobber_operand_p (out
));
1528 /* If the outgoing register already contains the same value
1529 as the incoming one, we can dispense with loading it.
1530 The easiest way to tell the caller that is to give a phony
1531 value for the incoming operand (same as outgoing one). */
1532 if (rld
[i
].reg_rtx
== out
1533 && (REG_P (in
) || CONSTANT_P (in
))
1534 && 0 != find_equiv_reg (in
, this_insn
, NO_REGS
, REGNO (out
),
1535 static_reload_reg_p
, i
, inmode
))
1539 /* If this is an input reload and the operand contains a register that
1540 dies in this insn and is used nowhere else, see if it is the right class
1541 to be used for this reload. Use it if so. (This occurs most commonly
1542 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1543 this if it is also an output reload that mentions the register unless
1544 the output is a SUBREG that clobbers an entire register.
1546 Note that the operand might be one of the spill regs, if it is a
1547 pseudo reg and we are in a block where spilling has not taken place.
1548 But if there is no spilling in this block, that is OK.
1549 An explicitly used hard reg cannot be a spill reg. */
1551 if (rld
[i
].reg_rtx
== 0 && in
!= 0 && hard_regs_live_known
)
1555 enum machine_mode rel_mode
= inmode
;
1557 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1560 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1561 if (REG_NOTE_KIND (note
) == REG_DEAD
1562 && REG_P (XEXP (note
, 0))
1563 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1564 && reg_mentioned_p (XEXP (note
, 0), in
)
1565 /* Check that a former pseudo is valid; see find_dummy_reload. */
1566 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1567 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR
),
1568 ORIGINAL_REGNO (XEXP (note
, 0)))
1569 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1))
1570 && ! refers_to_regno_for_reload_p (regno
,
1571 end_hard_regno (rel_mode
,
1573 PATTERN (this_insn
), inloc
)
1574 /* If this is also an output reload, IN cannot be used as
1575 the reload register if it is set in this insn unless IN
1577 && (out
== 0 || in
== out
1578 || ! hard_reg_set_here_p (regno
,
1579 end_hard_regno (rel_mode
, regno
),
1580 PATTERN (this_insn
)))
1581 /* ??? Why is this code so different from the previous?
1582 Is there any simple coherent way to describe the two together?
1583 What's going on here. */
1585 || (GET_CODE (in
) == SUBREG
1586 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1588 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1589 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1590 /* Make sure the operand fits in the reg that dies. */
1591 && (GET_MODE_SIZE (rel_mode
)
1592 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1593 && HARD_REGNO_MODE_OK (regno
, inmode
)
1594 && HARD_REGNO_MODE_OK (regno
, outmode
))
1597 unsigned int nregs
= MAX (hard_regno_nregs
[regno
][inmode
],
1598 hard_regno_nregs
[regno
][outmode
]);
1600 for (offs
= 0; offs
< nregs
; offs
++)
1601 if (fixed_regs
[regno
+ offs
]
1602 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
1607 && (! (refers_to_regno_for_reload_p
1608 (regno
, end_hard_regno (inmode
, regno
), in
, (rtx
*) 0))
1609 || can_reload_into (in
, regno
, inmode
)))
1611 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1618 output_reloadnum
= i
;
1623 /* Record an additional place we must replace a value
1624 for which we have already recorded a reload.
1625 RELOADNUM is the value returned by push_reload
1626 when the reload was recorded.
1627 This is used in insn patterns that use match_dup. */
1630 push_replacement (rtx
*loc
, int reloadnum
, enum machine_mode mode
)
1632 if (replace_reloads
)
1634 struct replacement
*r
= &replacements
[n_replacements
++];
1635 r
->what
= reloadnum
;
1641 /* Duplicate any replacement we have recorded to apply at
1642 location ORIG_LOC to also be performed at DUP_LOC.
1643 This is used in insn patterns that use match_dup. */
1646 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1648 int i
, n
= n_replacements
;
1650 for (i
= 0; i
< n
; i
++)
1652 struct replacement
*r
= &replacements
[i
];
1653 if (r
->where
== orig_loc
)
1654 push_replacement (dup_loc
, r
->what
, r
->mode
);
1658 /* Transfer all replacements that used to be in reload FROM to be in
1662 transfer_replacements (int to
, int from
)
1666 for (i
= 0; i
< n_replacements
; i
++)
1667 if (replacements
[i
].what
== from
)
1668 replacements
[i
].what
= to
;
1671 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1672 or a subpart of it. If we have any replacements registered for IN_RTX,
1673 cancel the reloads that were supposed to load them.
1674 Return nonzero if we canceled any reloads. */
1676 remove_address_replacements (rtx in_rtx
)
1679 char reload_flags
[MAX_RELOADS
];
1680 int something_changed
= 0;
1682 memset (reload_flags
, 0, sizeof reload_flags
);
1683 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1685 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1686 reload_flags
[replacements
[i
].what
] |= 1;
1689 replacements
[j
++] = replacements
[i
];
1690 reload_flags
[replacements
[i
].what
] |= 2;
1693 /* Note that the following store must be done before the recursive calls. */
1696 for (i
= n_reloads
- 1; i
>= 0; i
--)
1698 if (reload_flags
[i
] == 1)
1700 deallocate_reload_reg (i
);
1701 remove_address_replacements (rld
[i
].in
);
1703 something_changed
= 1;
1706 return something_changed
;
1709 /* If there is only one output reload, and it is not for an earlyclobber
1710 operand, try to combine it with a (logically unrelated) input reload
1711 to reduce the number of reload registers needed.
1713 This is safe if the input reload does not appear in
1714 the value being output-reloaded, because this implies
1715 it is not needed any more once the original insn completes.
1717 If that doesn't work, see we can use any of the registers that
1718 die in this insn as a reload register. We can if it is of the right
1719 class and does not appear in the value being output-reloaded. */
1722 combine_reloads (void)
1725 int output_reload
= -1;
1726 int secondary_out
= -1;
1729 /* Find the output reload; return unless there is exactly one
1730 and that one is mandatory. */
1732 for (i
= 0; i
< n_reloads
; i
++)
1733 if (rld
[i
].out
!= 0)
1735 if (output_reload
>= 0)
1740 if (output_reload
< 0 || rld
[output_reload
].optional
)
1743 /* An input-output reload isn't combinable. */
1745 if (rld
[output_reload
].in
!= 0)
1748 /* If this reload is for an earlyclobber operand, we can't do anything. */
1749 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1752 /* If there is a reload for part of the address of this operand, we would
1753 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1754 its life to the point where doing this combine would not lower the
1755 number of spill registers needed. */
1756 for (i
= 0; i
< n_reloads
; i
++)
1757 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1758 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1759 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1762 /* Check each input reload; can we combine it? */
1764 for (i
= 0; i
< n_reloads
; i
++)
1765 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1766 /* Life span of this reload must not extend past main insn. */
1767 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1768 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1769 && rld
[i
].when_needed
!= RELOAD_OTHER
1770 && (ira_reg_class_max_nregs
[(int)rld
[i
].rclass
][(int) rld
[i
].inmode
]
1771 == ira_reg_class_max_nregs
[(int) rld
[output_reload
].rclass
]
1772 [(int) rld
[output_reload
].outmode
])
1774 && rld
[i
].reg_rtx
== 0
1775 #ifdef SECONDARY_MEMORY_NEEDED
1776 /* Don't combine two reloads with different secondary
1777 memory locations. */
1778 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1779 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1780 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1781 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1783 && (targetm
.small_register_classes_for_mode_p (VOIDmode
)
1784 ? (rld
[i
].rclass
== rld
[output_reload
].rclass
)
1785 : (reg_class_subset_p (rld
[i
].rclass
,
1786 rld
[output_reload
].rclass
)
1787 || reg_class_subset_p (rld
[output_reload
].rclass
,
1789 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1790 /* Args reversed because the first arg seems to be
1791 the one that we imagine being modified
1792 while the second is the one that might be affected. */
1793 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1795 /* However, if the input is a register that appears inside
1796 the output, then we also can't share.
1797 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1798 If the same reload reg is used for both reg 69 and the
1799 result to be stored in memory, then that result
1800 will clobber the address of the memory ref. */
1801 && ! (REG_P (rld
[i
].in
)
1802 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1803 rld
[output_reload
].out
))))
1804 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1805 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1806 && (reg_class_size
[(int) rld
[i
].rclass
]
1807 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
1808 /* We will allow making things slightly worse by combining an
1809 input and an output, but no worse than that. */
1810 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1811 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1815 /* We have found a reload to combine with! */
1816 rld
[i
].out
= rld
[output_reload
].out
;
1817 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1818 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1819 /* Mark the old output reload as inoperative. */
1820 rld
[output_reload
].out
= 0;
1821 /* The combined reload is needed for the entire insn. */
1822 rld
[i
].when_needed
= RELOAD_OTHER
;
1823 /* If the output reload had a secondary reload, copy it. */
1824 if (rld
[output_reload
].secondary_out_reload
!= -1)
1826 rld
[i
].secondary_out_reload
1827 = rld
[output_reload
].secondary_out_reload
;
1828 rld
[i
].secondary_out_icode
1829 = rld
[output_reload
].secondary_out_icode
;
1832 #ifdef SECONDARY_MEMORY_NEEDED
1833 /* Copy any secondary MEM. */
1834 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1835 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1836 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1838 /* If required, minimize the register class. */
1839 if (reg_class_subset_p (rld
[output_reload
].rclass
,
1841 rld
[i
].rclass
= rld
[output_reload
].rclass
;
1843 /* Transfer all replacements from the old reload to the combined. */
1844 for (j
= 0; j
< n_replacements
; j
++)
1845 if (replacements
[j
].what
== output_reload
)
1846 replacements
[j
].what
= i
;
1851 /* If this insn has only one operand that is modified or written (assumed
1852 to be the first), it must be the one corresponding to this reload. It
1853 is safe to use anything that dies in this insn for that output provided
1854 that it does not occur in the output (we already know it isn't an
1855 earlyclobber. If this is an asm insn, give up. */
1857 if (INSN_CODE (this_insn
) == -1)
1860 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1861 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1862 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1865 /* See if some hard register that dies in this insn and is not used in
1866 the output is the right class. Only works if the register we pick
1867 up can fully hold our output reload. */
1868 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1869 if (REG_NOTE_KIND (note
) == REG_DEAD
1870 && REG_P (XEXP (note
, 0))
1871 && !reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1872 rld
[output_reload
].out
)
1873 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1874 && HARD_REGNO_MODE_OK (regno
, rld
[output_reload
].outmode
)
1875 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].rclass
],
1877 && (hard_regno_nregs
[regno
][rld
[output_reload
].outmode
]
1878 <= hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))])
1879 /* Ensure that a secondary or tertiary reload for this output
1880 won't want this register. */
1881 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1882 || (!(TEST_HARD_REG_BIT
1883 (reg_class_contents
[(int) rld
[secondary_out
].rclass
], regno
))
1884 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1885 || !(TEST_HARD_REG_BIT
1886 (reg_class_contents
[(int) rld
[secondary_out
].rclass
],
1888 && !fixed_regs
[regno
]
1889 /* Check that a former pseudo is valid; see find_dummy_reload. */
1890 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1891 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR
),
1892 ORIGINAL_REGNO (XEXP (note
, 0)))
1893 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1)))
1895 rld
[output_reload
].reg_rtx
1896 = gen_rtx_REG (rld
[output_reload
].outmode
, regno
);
1901 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1902 See if one of IN and OUT is a register that may be used;
1903 this is desirable since a spill-register won't be needed.
1904 If so, return the register rtx that proves acceptable.
1906 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1907 RCLASS is the register class required for the reload.
1909 If FOR_REAL is >= 0, it is the number of the reload,
1910 and in some cases when it can be discovered that OUT doesn't need
1911 to be computed, clear out rld[FOR_REAL].out.
1913 If FOR_REAL is -1, this should not be done, because this call
1914 is just to see if a register can be found, not to find and install it.
1916 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1917 puts an additional constraint on being able to use IN for OUT since
1918 IN must not appear elsewhere in the insn (it is assumed that IN itself
1919 is safe from the earlyclobber). */
1922 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1923 enum machine_mode inmode
, enum machine_mode outmode
,
1924 reg_class_t rclass
, int for_real
, int earlyclobber
)
1932 /* If operands exceed a word, we can't use either of them
1933 unless they have the same size. */
1934 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1935 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1936 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1939 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1940 respectively refers to a hard register. */
1942 /* Find the inside of any subregs. */
1943 while (GET_CODE (out
) == SUBREG
)
1945 if (REG_P (SUBREG_REG (out
))
1946 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1947 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1948 GET_MODE (SUBREG_REG (out
)),
1951 out
= SUBREG_REG (out
);
1953 while (GET_CODE (in
) == SUBREG
)
1955 if (REG_P (SUBREG_REG (in
))
1956 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1957 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1958 GET_MODE (SUBREG_REG (in
)),
1961 in
= SUBREG_REG (in
);
1964 /* Narrow down the reg class, the same way push_reload will;
1965 otherwise we might find a dummy now, but push_reload won't. */
1967 reg_class_t preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1968 if (preferred_class
!= NO_REGS
)
1969 rclass
= (enum reg_class
) preferred_class
;
1972 /* See if OUT will do. */
1974 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1976 unsigned int regno
= REGNO (out
) + out_offset
;
1977 unsigned int nwords
= hard_regno_nregs
[regno
][outmode
];
1980 /* When we consider whether the insn uses OUT,
1981 ignore references within IN. They don't prevent us
1982 from copying IN into OUT, because those refs would
1983 move into the insn that reloads IN.
1985 However, we only ignore IN in its role as this reload.
1986 If the insn uses IN elsewhere and it contains OUT,
1987 that counts. We can't be sure it's the "same" operand
1988 so it might not go through this reload. */
1990 *inloc
= const0_rtx
;
1992 if (regno
< FIRST_PSEUDO_REGISTER
1993 && HARD_REGNO_MODE_OK (regno
, outmode
)
1994 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1995 PATTERN (this_insn
), outloc
))
1999 for (i
= 0; i
< nwords
; i
++)
2000 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2006 if (REG_P (real_out
))
2009 value
= gen_rtx_REG (outmode
, regno
);
2016 /* Consider using IN if OUT was not acceptable
2017 or if OUT dies in this insn (like the quotient in a divmod insn).
2018 We can't use IN unless it is dies in this insn,
2019 which means we must know accurately which hard regs are live.
2020 Also, the result can't go in IN if IN is used within OUT,
2021 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2022 if (hard_regs_live_known
2024 && REGNO (in
) < FIRST_PSEUDO_REGISTER
2026 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
2027 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
2028 && !fixed_regs
[REGNO (in
)]
2029 && HARD_REGNO_MODE_OK (REGNO (in
),
2030 /* The only case where out and real_out might
2031 have different modes is where real_out
2032 is a subreg, and in that case, out
2034 (GET_MODE (out
) != VOIDmode
2035 ? GET_MODE (out
) : outmode
))
2036 && (ORIGINAL_REGNO (in
) < FIRST_PSEUDO_REGISTER
2037 /* However only do this if we can be sure that this input
2038 operand doesn't correspond with an uninitialized pseudo.
2039 global can assign some hardreg to it that is the same as
2040 the one assigned to a different, also live pseudo (as it
2041 can ignore the conflict). We must never introduce writes
2042 to such hardregs, as they would clobber the other live
2043 pseudo. See PR 20973. */
2044 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR
),
2045 ORIGINAL_REGNO (in
))
2046 /* Similarly, only do this if we can be sure that the death
2047 note is still valid. global can assign some hardreg to
2048 the pseudo referenced in the note and simultaneously a
2049 subword of this hardreg to a different, also live pseudo,
2050 because only another subword of the hardreg is actually
2051 used in the insn. This cannot happen if the pseudo has
2052 been assigned exactly one hardreg. See PR 33732. */
2053 && hard_regno_nregs
[REGNO (in
)][GET_MODE (in
)] == 1)))
2055 unsigned int regno
= REGNO (in
) + in_offset
;
2056 unsigned int nwords
= hard_regno_nregs
[regno
][inmode
];
2058 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
2059 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
2060 PATTERN (this_insn
))
2062 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2063 PATTERN (this_insn
), inloc
)))
2067 for (i
= 0; i
< nwords
; i
++)
2068 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2074 /* If we were going to use OUT as the reload reg
2075 and changed our mind, it means OUT is a dummy that
2076 dies here. So don't bother copying value to it. */
2077 if (for_real
>= 0 && value
== real_out
)
2078 rld
[for_real
].out
= 0;
2079 if (REG_P (real_in
))
2082 value
= gen_rtx_REG (inmode
, regno
);
2090 /* This page contains subroutines used mainly for determining
2091 whether the IN or an OUT of a reload can serve as the
2094 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2097 earlyclobber_operand_p (rtx x
)
2101 for (i
= 0; i
< n_earlyclobbers
; i
++)
2102 if (reload_earlyclobbers
[i
] == x
)
2108 /* Return 1 if expression X alters a hard reg in the range
2109 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2110 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2111 X should be the body of an instruction. */
2114 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2116 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2118 rtx op0
= SET_DEST (x
);
2120 while (GET_CODE (op0
) == SUBREG
)
2121 op0
= SUBREG_REG (op0
);
2124 unsigned int r
= REGNO (op0
);
2126 /* See if this reg overlaps range under consideration. */
2128 && end_hard_regno (GET_MODE (op0
), r
) > beg_regno
)
2132 else if (GET_CODE (x
) == PARALLEL
)
2134 int i
= XVECLEN (x
, 0) - 1;
2137 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2144 /* Return 1 if ADDR is a valid memory address for mode MODE
2145 in address space AS, and check that each pseudo reg has the
2146 proper kind of hard reg. */
2149 strict_memory_address_addr_space_p (enum machine_mode mode ATTRIBUTE_UNUSED
,
2150 rtx addr
, addr_space_t as
)
2152 #ifdef GO_IF_LEGITIMATE_ADDRESS
2153 gcc_assert (ADDR_SPACE_GENERIC_P (as
));
2154 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2160 return targetm
.addr_space
.legitimate_address_p (mode
, addr
, 1, as
);
2164 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2165 if they are the same hard reg, and has special hacks for
2166 autoincrement and autodecrement.
2167 This is specifically intended for find_reloads to use
2168 in determining whether two operands match.
2169 X is the operand whose number is the lower of the two.
2171 The value is 2 if Y contains a pre-increment that matches
2172 a non-incrementing address in X. */
2174 /* ??? To be completely correct, we should arrange to pass
2175 for X the output operand and for Y the input operand.
2176 For now, we assume that the output operand has the lower number
2177 because that is natural in (SET output (... input ...)). */
2180 operands_match_p (rtx x
, rtx y
)
2183 RTX_CODE code
= GET_CODE (x
);
2189 if ((code
== REG
|| (code
== SUBREG
&& REG_P (SUBREG_REG (x
))))
2190 && (REG_P (y
) || (GET_CODE (y
) == SUBREG
2191 && REG_P (SUBREG_REG (y
)))))
2197 i
= REGNO (SUBREG_REG (x
));
2198 if (i
>= FIRST_PSEUDO_REGISTER
)
2200 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2201 GET_MODE (SUBREG_REG (x
)),
2208 if (GET_CODE (y
) == SUBREG
)
2210 j
= REGNO (SUBREG_REG (y
));
2211 if (j
>= FIRST_PSEUDO_REGISTER
)
2213 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2214 GET_MODE (SUBREG_REG (y
)),
2221 /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2222 multiple hard register group of scalar integer registers, so that
2223 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2225 if (REG_WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2226 && SCALAR_INT_MODE_P (GET_MODE (x
))
2227 && i
< FIRST_PSEUDO_REGISTER
)
2228 i
+= hard_regno_nregs
[i
][GET_MODE (x
)] - 1;
2229 if (REG_WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2230 && SCALAR_INT_MODE_P (GET_MODE (y
))
2231 && j
< FIRST_PSEUDO_REGISTER
)
2232 j
+= hard_regno_nregs
[j
][GET_MODE (y
)] - 1;
2236 /* If two operands must match, because they are really a single
2237 operand of an assembler insn, then two postincrements are invalid
2238 because the assembler insn would increment only once.
2239 On the other hand, a postincrement matches ordinary indexing
2240 if the postincrement is the output operand. */
2241 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2242 return operands_match_p (XEXP (x
, 0), y
);
2243 /* Two preincrements are invalid
2244 because the assembler insn would increment only once.
2245 On the other hand, a preincrement matches ordinary indexing
2246 if the preincrement is the input operand.
2247 In this case, return 2, since some callers need to do special
2248 things when this happens. */
2249 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2250 || GET_CODE (y
) == PRE_MODIFY
)
2251 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2255 /* Now we have disposed of all the cases in which different rtx codes
2257 if (code
!= GET_CODE (y
))
2260 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2261 if (GET_MODE (x
) != GET_MODE (y
))
2264 /* MEMs refering to different address space are not equivalent. */
2265 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2276 return XEXP (x
, 0) == XEXP (y
, 0);
2278 return XSTR (x
, 0) == XSTR (y
, 0);
2284 /* Compare the elements. If any pair of corresponding elements
2285 fail to match, return 0 for the whole things. */
2288 fmt
= GET_RTX_FORMAT (code
);
2289 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2295 if (XWINT (x
, i
) != XWINT (y
, i
))
2300 if (XINT (x
, i
) != XINT (y
, i
))
2305 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2308 /* If any subexpression returns 2,
2309 we should return 2 if we are successful. */
2318 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2320 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2322 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2330 /* It is believed that rtx's at this level will never
2331 contain anything but integers and other rtx's,
2332 except for within LABEL_REFs and SYMBOL_REFs. */
2337 return 1 + success_2
;
2340 /* Describe the range of registers or memory referenced by X.
2341 If X is a register, set REG_FLAG and put the first register
2342 number into START and the last plus one into END.
2343 If X is a memory reference, put a base address into BASE
2344 and a range of integer offsets into START and END.
2345 If X is pushing on the stack, we can assume it causes no trouble,
2346 so we set the SAFE field. */
2348 static struct decomposition
2351 struct decomposition val
;
2354 memset (&val
, 0, sizeof (val
));
2356 switch (GET_CODE (x
))
2360 rtx base
= NULL_RTX
, offset
= 0;
2361 rtx addr
= XEXP (x
, 0);
2363 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2364 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2366 val
.base
= XEXP (addr
, 0);
2367 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2368 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2369 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2373 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2375 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2376 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2377 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2379 val
.base
= XEXP (addr
, 0);
2380 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2381 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2382 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2387 if (GET_CODE (addr
) == CONST
)
2389 addr
= XEXP (addr
, 0);
2392 if (GET_CODE (addr
) == PLUS
)
2394 if (CONSTANT_P (XEXP (addr
, 0)))
2396 base
= XEXP (addr
, 1);
2397 offset
= XEXP (addr
, 0);
2399 else if (CONSTANT_P (XEXP (addr
, 1)))
2401 base
= XEXP (addr
, 0);
2402 offset
= XEXP (addr
, 1);
2409 offset
= const0_rtx
;
2411 if (GET_CODE (offset
) == CONST
)
2412 offset
= XEXP (offset
, 0);
2413 if (GET_CODE (offset
) == PLUS
)
2415 if (CONST_INT_P (XEXP (offset
, 0)))
2417 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2418 offset
= XEXP (offset
, 0);
2420 else if (CONST_INT_P (XEXP (offset
, 1)))
2422 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2423 offset
= XEXP (offset
, 1);
2427 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2428 offset
= const0_rtx
;
2431 else if (!CONST_INT_P (offset
))
2433 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2434 offset
= const0_rtx
;
2437 if (all_const
&& GET_CODE (base
) == PLUS
)
2438 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2440 gcc_assert (CONST_INT_P (offset
));
2442 val
.start
= INTVAL (offset
);
2443 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2450 val
.start
= true_regnum (x
);
2451 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2453 /* A pseudo with no hard reg. */
2454 val
.start
= REGNO (x
);
2455 val
.end
= val
.start
+ 1;
2459 val
.end
= end_hard_regno (GET_MODE (x
), val
.start
);
2463 if (!REG_P (SUBREG_REG (x
)))
2464 /* This could be more precise, but it's good enough. */
2465 return decompose (SUBREG_REG (x
));
2467 val
.start
= true_regnum (x
);
2468 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2469 return decompose (SUBREG_REG (x
));
2472 val
.end
= val
.start
+ subreg_nregs (x
);
2476 /* This hasn't been assigned yet, so it can't conflict yet. */
2481 gcc_assert (CONSTANT_P (x
));
2488 /* Return 1 if altering Y will not modify the value of X.
2489 Y is also described by YDATA, which should be decompose (Y). */
2492 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2494 struct decomposition xdata
;
2497 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2501 gcc_assert (MEM_P (y
));
2502 /* If Y is memory and X is not, Y can't affect X. */
2506 xdata
= decompose (x
);
2508 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2510 /* If bases are distinct symbolic constants, there is no overlap. */
2511 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2513 /* Constants and stack slots never overlap. */
2514 if (CONSTANT_P (xdata
.base
)
2515 && (ydata
.base
== frame_pointer_rtx
2516 || ydata
.base
== hard_frame_pointer_rtx
2517 || ydata
.base
== stack_pointer_rtx
))
2519 if (CONSTANT_P (ydata
.base
)
2520 && (xdata
.base
== frame_pointer_rtx
2521 || xdata
.base
== hard_frame_pointer_rtx
2522 || xdata
.base
== stack_pointer_rtx
))
2524 /* If either base is variable, we don't know anything. */
2528 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2531 /* Similar, but calls decompose. */
2534 safe_from_earlyclobber (rtx op
, rtx clobber
)
2536 struct decomposition early_data
;
2538 early_data
= decompose (clobber
);
2539 return immune_p (op
, clobber
, early_data
);
2542 /* Main entry point of this file: search the body of INSN
2543 for values that need reloading and record them with push_reload.
2544 REPLACE nonzero means record also where the values occur
2545 so that subst_reloads can be used.
2547 IND_LEVELS says how many levels of indirection are supported by this
2548 machine; a value of zero means that a memory reference is not a valid
2551 LIVE_KNOWN says we have valid information about which hard
2552 regs are live at each point in the program; this is true when
2553 we are called from global_alloc but false when stupid register
2554 allocation has been done.
2556 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2557 which is nonnegative if the reg has been commandeered for reloading into.
2558 It is copied into STATIC_RELOAD_REG_P and referenced from there
2559 by various subroutines.
2561 Return TRUE if some operands need to be changed, because of swapping
2562 commutative operands, reg_equiv_address substitution, or whatever. */
2565 find_reloads (rtx insn
, int replace
, int ind_levels
, int live_known
,
2566 short *reload_reg_p
)
2568 int insn_code_number
;
2571 /* These start out as the constraints for the insn
2572 and they are chewed up as we consider alternatives. */
2573 const char *constraints
[MAX_RECOG_OPERANDS
];
2574 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2576 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2577 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2578 /* Nonzero for a MEM operand whose entire address needs a reload.
2579 May be -1 to indicate the entire address may or may not need a reload. */
2580 int address_reloaded
[MAX_RECOG_OPERANDS
];
2581 /* Nonzero for an address operand that needs to be completely reloaded.
2582 May be -1 to indicate the entire operand may or may not need a reload. */
2583 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2584 /* Value of enum reload_type to use for operand. */
2585 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2586 /* Value of enum reload_type to use within address of operand. */
2587 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2588 /* Save the usage of each operand. */
2589 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2590 int no_input_reloads
= 0, no_output_reloads
= 0;
2592 reg_class_t this_alternative
[MAX_RECOG_OPERANDS
];
2593 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2594 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2595 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2596 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2597 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2599 reg_class_t goal_alternative
[MAX_RECOG_OPERANDS
];
2600 int this_alternative_number
;
2601 int goal_alternative_number
= 0;
2602 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2603 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2604 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2605 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2606 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2607 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2608 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2609 int goal_alternative_swapped
;
2612 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2613 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2614 rtx body
= PATTERN (insn
);
2615 rtx set
= single_set (insn
);
2616 int goal_earlyclobber
= 0, this_earlyclobber
;
2617 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2623 n_earlyclobbers
= 0;
2624 replace_reloads
= replace
;
2625 hard_regs_live_known
= live_known
;
2626 static_reload_reg_p
= reload_reg_p
;
2628 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2629 neither are insns that SET cc0. Insns that use CC0 are not allowed
2630 to have any input reloads. */
2631 if (JUMP_P (insn
) || CALL_P (insn
))
2632 no_output_reloads
= 1;
2635 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2636 no_input_reloads
= 1;
2637 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2638 no_output_reloads
= 1;
2641 #ifdef SECONDARY_MEMORY_NEEDED
2642 /* The eliminated forms of any secondary memory locations are per-insn, so
2643 clear them out here. */
2645 if (secondary_memlocs_elim_used
)
2647 memset (secondary_memlocs_elim
, 0,
2648 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2649 secondary_memlocs_elim_used
= 0;
2653 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2654 is cheap to move between them. If it is not, there may not be an insn
2655 to do the copy, so we may need a reload. */
2656 if (GET_CODE (body
) == SET
2657 && REG_P (SET_DEST (body
))
2658 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2659 && REG_P (SET_SRC (body
))
2660 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2661 && register_move_cost (GET_MODE (SET_SRC (body
)),
2662 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2663 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2666 extract_insn (insn
);
2668 noperands
= reload_n_operands
= recog_data
.n_operands
;
2669 n_alternatives
= recog_data
.n_alternatives
;
2671 /* Just return "no reloads" if insn has no operands with constraints. */
2672 if (noperands
== 0 || n_alternatives
== 0)
2675 insn_code_number
= INSN_CODE (insn
);
2676 this_insn_is_asm
= insn_code_number
< 0;
2678 memcpy (operand_mode
, recog_data
.operand_mode
,
2679 noperands
* sizeof (enum machine_mode
));
2680 memcpy (constraints
, recog_data
.constraints
,
2681 noperands
* sizeof (const char *));
2685 /* If we will need to know, later, whether some pair of operands
2686 are the same, we must compare them now and save the result.
2687 Reloading the base and index registers will clobber them
2688 and afterward they will fail to match. */
2690 for (i
= 0; i
< noperands
; i
++)
2696 substed_operand
[i
] = recog_data
.operand
[i
];
2699 modified
[i
] = RELOAD_READ
;
2701 /* Scan this operand's constraint to see if it is an output operand,
2702 an in-out operand, is commutative, or should match another. */
2706 p
+= CONSTRAINT_LEN (c
, p
);
2710 modified
[i
] = RELOAD_WRITE
;
2713 modified
[i
] = RELOAD_READ_WRITE
;
2717 /* The last operand should not be marked commutative. */
2718 gcc_assert (i
!= noperands
- 1);
2720 /* We currently only support one commutative pair of
2721 operands. Some existing asm code currently uses more
2722 than one pair. Previously, that would usually work,
2723 but sometimes it would crash the compiler. We
2724 continue supporting that case as well as we can by
2725 silently ignoring all but the first pair. In the
2726 future we may handle it correctly. */
2727 if (commutative
< 0)
2730 gcc_assert (this_insn_is_asm
);
2733 /* Use of ISDIGIT is tempting here, but it may get expensive because
2734 of locale support we don't want. */
2735 case '0': case '1': case '2': case '3': case '4':
2736 case '5': case '6': case '7': case '8': case '9':
2738 c
= strtoul (p
- 1, &end
, 10);
2741 operands_match
[c
][i
]
2742 = operands_match_p (recog_data
.operand
[c
],
2743 recog_data
.operand
[i
]);
2745 /* An operand may not match itself. */
2746 gcc_assert (c
!= i
);
2748 /* If C can be commuted with C+1, and C might need to match I,
2749 then C+1 might also need to match I. */
2750 if (commutative
>= 0)
2752 if (c
== commutative
|| c
== commutative
+ 1)
2754 int other
= c
+ (c
== commutative
? 1 : -1);
2755 operands_match
[other
][i
]
2756 = operands_match_p (recog_data
.operand
[other
],
2757 recog_data
.operand
[i
]);
2759 if (i
== commutative
|| i
== commutative
+ 1)
2761 int other
= i
+ (i
== commutative
? 1 : -1);
2762 operands_match
[c
][other
]
2763 = operands_match_p (recog_data
.operand
[c
],
2764 recog_data
.operand
[other
]);
2766 /* Note that C is supposed to be less than I.
2767 No need to consider altering both C and I because in
2768 that case we would alter one into the other. */
2775 /* Examine each operand that is a memory reference or memory address
2776 and reload parts of the addresses into index registers.
2777 Also here any references to pseudo regs that didn't get hard regs
2778 but are equivalent to constants get replaced in the insn itself
2779 with those constants. Nobody will ever see them again.
2781 Finally, set up the preferred classes of each operand. */
2783 for (i
= 0; i
< noperands
; i
++)
2785 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2787 address_reloaded
[i
] = 0;
2788 address_operand_reloaded
[i
] = 0;
2789 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2790 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2793 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2794 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2797 if (*constraints
[i
] == 0)
2798 /* Ignore things like match_operator operands. */
2800 else if (constraints
[i
][0] == 'p'
2801 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
][0], constraints
[i
]))
2803 address_operand_reloaded
[i
]
2804 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2805 recog_data
.operand
[i
],
2806 recog_data
.operand_loc
[i
],
2807 i
, operand_type
[i
], ind_levels
, insn
);
2809 /* If we now have a simple operand where we used to have a
2810 PLUS or MULT, re-recognize and try again. */
2811 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2812 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2813 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2814 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2816 INSN_CODE (insn
) = -1;
2817 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2822 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2823 substed_operand
[i
] = recog_data
.operand
[i
];
2825 /* Address operands are reloaded in their existing mode,
2826 no matter what is specified in the machine description. */
2827 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2829 /* If the address is a single CONST_INT pick address mode
2830 instead otherwise we will later not know in which mode
2831 the reload should be performed. */
2832 if (operand_mode
[i
] == VOIDmode
)
2833 operand_mode
[i
] = Pmode
;
2836 else if (code
== MEM
)
2839 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2840 recog_data
.operand_loc
[i
],
2841 XEXP (recog_data
.operand
[i
], 0),
2842 &XEXP (recog_data
.operand
[i
], 0),
2843 i
, address_type
[i
], ind_levels
, insn
);
2844 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2845 substed_operand
[i
] = recog_data
.operand
[i
];
2847 else if (code
== SUBREG
)
2849 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2851 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2854 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2856 &address_reloaded
[i
]);
2858 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2859 that didn't get a hard register, emit a USE with a REG_EQUAL
2860 note in front so that we might inherit a previous, possibly
2866 && (GET_MODE_SIZE (GET_MODE (reg
))
2867 >= GET_MODE_SIZE (GET_MODE (op
)))
2868 && reg_equiv_constant (REGNO (reg
)) == 0)
2869 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2871 REG_EQUAL
, reg_equiv_memory_loc (REGNO (reg
)));
2873 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2875 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2876 /* We can get a PLUS as an "operand" as a result of register
2877 elimination. See eliminate_regs and gen_reload. We handle
2878 a unary operator by reloading the operand. */
2879 substed_operand
[i
] = recog_data
.operand
[i
]
2880 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2881 ind_levels
, 0, insn
,
2882 &address_reloaded
[i
]);
2883 else if (code
== REG
)
2885 /* This is equivalent to calling find_reloads_toplev.
2886 The code is duplicated for speed.
2887 When we find a pseudo always equivalent to a constant,
2888 we replace it by the constant. We must be sure, however,
2889 that we don't try to replace it in the insn in which it
2891 int regno
= REGNO (recog_data
.operand
[i
]);
2892 if (reg_equiv_constant (regno
) != 0
2893 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2895 /* Record the existing mode so that the check if constants are
2896 allowed will work when operand_mode isn't specified. */
2898 if (operand_mode
[i
] == VOIDmode
)
2899 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2901 substed_operand
[i
] = recog_data
.operand
[i
]
2902 = reg_equiv_constant (regno
);
2904 if (reg_equiv_memory_loc (regno
) != 0
2905 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
2906 /* We need not give a valid is_set_dest argument since the case
2907 of a constant equivalence was checked above. */
2908 substed_operand
[i
] = recog_data
.operand
[i
]
2909 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2910 ind_levels
, 0, insn
,
2911 &address_reloaded
[i
]);
2913 /* If the operand is still a register (we didn't replace it with an
2914 equivalent), get the preferred class to reload it into. */
2915 code
= GET_CODE (recog_data
.operand
[i
]);
2917 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2918 >= FIRST_PSEUDO_REGISTER
)
2919 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2923 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2924 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2927 /* If this is simply a copy from operand 1 to operand 0, merge the
2928 preferred classes for the operands. */
2929 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2930 && recog_data
.operand
[1] == SET_SRC (set
))
2932 preferred_class
[0] = preferred_class
[1]
2933 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2934 pref_or_nothing
[0] |= pref_or_nothing
[1];
2935 pref_or_nothing
[1] |= pref_or_nothing
[0];
2938 /* Now see what we need for pseudo-regs that didn't get hard regs
2939 or got the wrong kind of hard reg. For this, we must consider
2940 all the operands together against the register constraints. */
2942 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2945 goal_alternative_swapped
= 0;
2948 /* The constraints are made of several alternatives.
2949 Each operand's constraint looks like foo,bar,... with commas
2950 separating the alternatives. The first alternatives for all
2951 operands go together, the second alternatives go together, etc.
2953 First loop over alternatives. */
2955 for (this_alternative_number
= 0;
2956 this_alternative_number
< n_alternatives
;
2957 this_alternative_number
++)
2959 /* Loop over operands for one constraint alternative. */
2960 /* LOSERS counts those that don't fit this alternative
2961 and would require loading. */
2963 /* BAD is set to 1 if it some operand can't fit this alternative
2964 even after reloading. */
2966 /* REJECT is a count of how undesirable this alternative says it is
2967 if any reloading is required. If the alternative matches exactly
2968 then REJECT is ignored, but otherwise it gets this much
2969 counted against it in addition to the reloading needed. Each
2970 ? counts three times here since we want the disparaging caused by
2971 a bad register class to only count 1/3 as much. */
2974 if (!recog_data
.alternative_enabled_p
[this_alternative_number
])
2978 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2979 constraints
[i
] = skip_alternative (constraints
[i
]);
2984 this_earlyclobber
= 0;
2986 for (i
= 0; i
< noperands
; i
++)
2988 const char *p
= constraints
[i
];
2993 /* 0 => this operand can be reloaded somehow for this alternative. */
2995 /* 0 => this operand can be reloaded if the alternative allows regs. */
2999 rtx operand
= recog_data
.operand
[i
];
3001 /* Nonzero means this is a MEM that must be reloaded into a reg
3002 regardless of what the constraint says. */
3003 int force_reload
= 0;
3005 /* Nonzero if a constant forced into memory would be OK for this
3008 int earlyclobber
= 0;
3010 /* If the predicate accepts a unary operator, it means that
3011 we need to reload the operand, but do not do this for
3012 match_operator and friends. */
3013 if (UNARY_P (operand
) && *p
!= 0)
3014 operand
= XEXP (operand
, 0);
3016 /* If the operand is a SUBREG, extract
3017 the REG or MEM (or maybe even a constant) within.
3018 (Constants can occur as a result of reg_equiv_constant.) */
3020 while (GET_CODE (operand
) == SUBREG
)
3022 /* Offset only matters when operand is a REG and
3023 it is a hard reg. This is because it is passed
3024 to reg_fits_class_p if it is a REG and all pseudos
3025 return 0 from that function. */
3026 if (REG_P (SUBREG_REG (operand
))
3027 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
3029 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand
)),
3030 GET_MODE (SUBREG_REG (operand
)),
3031 SUBREG_BYTE (operand
),
3032 GET_MODE (operand
)) < 0)
3034 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
3035 GET_MODE (SUBREG_REG (operand
)),
3036 SUBREG_BYTE (operand
),
3037 GET_MODE (operand
));
3039 operand
= SUBREG_REG (operand
);
3040 /* Force reload if this is a constant or PLUS or if there may
3041 be a problem accessing OPERAND in the outer mode. */
3042 if (CONSTANT_P (operand
)
3043 || GET_CODE (operand
) == PLUS
3044 /* We must force a reload of paradoxical SUBREGs
3045 of a MEM because the alignment of the inner value
3046 may not be enough to do the outer reference. On
3047 big-endian machines, it may also reference outside
3050 On machines that extend byte operations and we have a
3051 SUBREG where both the inner and outer modes are no wider
3052 than a word and the inner mode is narrower, is integral,
3053 and gets extended when loaded from memory, combine.c has
3054 made assumptions about the behavior of the machine in such
3055 register access. If the data is, in fact, in memory we
3056 must always load using the size assumed to be in the
3057 register and let the insn do the different-sized
3060 This is doubly true if WORD_REGISTER_OPERATIONS. In
3061 this case eliminate_regs has left non-paradoxical
3062 subregs for push_reload to see. Make sure it does
3063 by forcing the reload.
3065 ??? When is it right at this stage to have a subreg
3066 of a mem that is _not_ to be handled specially? IMO
3067 those should have been reduced to just a mem. */
3068 || ((MEM_P (operand
)
3070 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3071 #ifndef WORD_REGISTER_OPERATIONS
3072 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
3073 < BIGGEST_ALIGNMENT
)
3074 && (GET_MODE_SIZE (operand_mode
[i
])
3075 > GET_MODE_SIZE (GET_MODE (operand
))))
3077 #ifdef LOAD_EXTEND_OP
3078 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3079 && (GET_MODE_SIZE (GET_MODE (operand
))
3081 && (GET_MODE_SIZE (operand_mode
[i
])
3082 > GET_MODE_SIZE (GET_MODE (operand
)))
3083 && INTEGRAL_MODE_P (GET_MODE (operand
))
3084 && LOAD_EXTEND_OP (GET_MODE (operand
)) != UNKNOWN
)
3093 this_alternative
[i
] = NO_REGS
;
3094 this_alternative_win
[i
] = 0;
3095 this_alternative_match_win
[i
] = 0;
3096 this_alternative_offmemok
[i
] = 0;
3097 this_alternative_earlyclobber
[i
] = 0;
3098 this_alternative_matches
[i
] = -1;
3100 /* An empty constraint or empty alternative
3101 allows anything which matched the pattern. */
3102 if (*p
== 0 || *p
== ',')
3105 /* Scan this alternative's specs for this operand;
3106 set WIN if the operand fits any letter in this alternative.
3107 Otherwise, clear BADOP if this operand could
3108 fit some letter after reloads,
3109 or set WINREG if this operand could fit after reloads
3110 provided the constraint allows some registers. */
3113 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3122 case '=': case '+': case '*':
3126 /* We only support one commutative marker, the first
3127 one. We already set commutative above. */
3139 /* Ignore rest of this alternative as far as
3140 reloading is concerned. */
3143 while (*p
&& *p
!= ',');
3147 case '0': case '1': case '2': case '3': case '4':
3148 case '5': case '6': case '7': case '8': case '9':
3149 m
= strtoul (p
, &end
, 10);
3153 this_alternative_matches
[i
] = m
;
3154 /* We are supposed to match a previous operand.
3155 If we do, we win if that one did.
3156 If we do not, count both of the operands as losers.
3157 (This is too conservative, since most of the time
3158 only a single reload insn will be needed to make
3159 the two operands win. As a result, this alternative
3160 may be rejected when it is actually desirable.) */
3161 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3162 /* If we are matching as if two operands were swapped,
3163 also pretend that operands_match had been computed
3165 But if I is the second of those and C is the first,
3166 don't exchange them, because operands_match is valid
3167 only on one side of its diagonal. */
3169 [(m
== commutative
|| m
== commutative
+ 1)
3170 ? 2 * commutative
+ 1 - m
: m
]
3171 [(i
== commutative
|| i
== commutative
+ 1)
3172 ? 2 * commutative
+ 1 - i
: i
])
3173 : operands_match
[m
][i
])
3175 /* If we are matching a non-offsettable address where an
3176 offsettable address was expected, then we must reject
3177 this combination, because we can't reload it. */
3178 if (this_alternative_offmemok
[m
]
3179 && MEM_P (recog_data
.operand
[m
])
3180 && this_alternative
[m
] == NO_REGS
3181 && ! this_alternative_win
[m
])
3184 did_match
= this_alternative_win
[m
];
3188 /* Operands don't match. */
3191 /* Retroactively mark the operand we had to match
3192 as a loser, if it wasn't already. */
3193 if (this_alternative_win
[m
])
3195 this_alternative_win
[m
] = 0;
3196 if (this_alternative
[m
] == NO_REGS
)
3198 /* But count the pair only once in the total badness of
3199 this alternative, if the pair can be a dummy reload.
3200 The pointers in operand_loc are not swapped; swap
3201 them by hand if necessary. */
3202 if (swapped
&& i
== commutative
)
3203 loc1
= commutative
+ 1;
3204 else if (swapped
&& i
== commutative
+ 1)
3208 if (swapped
&& m
== commutative
)
3209 loc2
= commutative
+ 1;
3210 else if (swapped
&& m
== commutative
+ 1)
3215 = find_dummy_reload (recog_data
.operand
[i
],
3216 recog_data
.operand
[m
],
3217 recog_data
.operand_loc
[loc1
],
3218 recog_data
.operand_loc
[loc2
],
3219 operand_mode
[i
], operand_mode
[m
],
3220 this_alternative
[m
], -1,
3221 this_alternative_earlyclobber
[m
]);
3226 /* This can be fixed with reloads if the operand
3227 we are supposed to match can be fixed with reloads. */
3229 this_alternative
[i
] = this_alternative
[m
];
3231 /* If we have to reload this operand and some previous
3232 operand also had to match the same thing as this
3233 operand, we don't know how to do that. So reject this
3235 if (! did_match
|| force_reload
)
3236 for (j
= 0; j
< i
; j
++)
3237 if (this_alternative_matches
[j
]
3238 == this_alternative_matches
[i
])
3243 /* All necessary reloads for an address_operand
3244 were handled in find_reloads_address. */
3245 this_alternative
[i
] = base_reg_class (VOIDmode
, ADDRESS
,
3251 case TARGET_MEM_CONSTRAINT
:
3256 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3257 && reg_renumber
[REGNO (operand
)] < 0))
3259 if (CONST_POOL_OK_P (operand_mode
[i
], operand
))
3266 && ! address_reloaded
[i
]
3267 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3268 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3274 && ! address_reloaded
[i
]
3275 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3276 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3280 /* Memory operand whose address is not offsettable. */
3285 && ! (ind_levels
? offsettable_memref_p (operand
)
3286 : offsettable_nonstrict_memref_p (operand
))
3287 /* Certain mem addresses will become offsettable
3288 after they themselves are reloaded. This is important;
3289 we don't want our own handling of unoffsettables
3290 to override the handling of reg_equiv_address. */
3291 && !(REG_P (XEXP (operand
, 0))
3293 || reg_equiv_address (REGNO (XEXP (operand
, 0))) != 0)))
3297 /* Memory operand whose address is offsettable. */
3301 if ((MEM_P (operand
)
3302 /* If IND_LEVELS, find_reloads_address won't reload a
3303 pseudo that didn't get a hard reg, so we have to
3304 reject that case. */
3305 && ((ind_levels
? offsettable_memref_p (operand
)
3306 : offsettable_nonstrict_memref_p (operand
))
3307 /* A reloaded address is offsettable because it is now
3308 just a simple register indirect. */
3309 || address_reloaded
[i
] == 1))
3311 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3312 && reg_renumber
[REGNO (operand
)] < 0
3313 /* If reg_equiv_address is nonzero, we will be
3314 loading it into a register; hence it will be
3315 offsettable, but we cannot say that reg_equiv_mem
3316 is offsettable without checking. */
3317 && ((reg_equiv_mem (REGNO (operand
)) != 0
3318 && offsettable_memref_p (reg_equiv_mem (REGNO (operand
))))
3319 || (reg_equiv_address (REGNO (operand
)) != 0))))
3321 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3329 /* Output operand that is stored before the need for the
3330 input operands (and their index registers) is over. */
3331 earlyclobber
= 1, this_earlyclobber
= 1;
3336 if (GET_CODE (operand
) == CONST_DOUBLE
3337 || (GET_CODE (operand
) == CONST_VECTOR
3338 && (GET_MODE_CLASS (GET_MODE (operand
))
3339 == MODE_VECTOR_FLOAT
)))
3345 if (GET_CODE (operand
) == CONST_DOUBLE
3346 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand
, c
, p
))
3351 if (CONST_INT_P (operand
)
3352 || (GET_CODE (operand
) == CONST_DOUBLE
3353 && GET_MODE (operand
) == VOIDmode
))
3356 if (CONSTANT_P (operand
)
3357 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
)))
3362 if (CONST_INT_P (operand
)
3363 || (GET_CODE (operand
) == CONST_DOUBLE
3364 && GET_MODE (operand
) == VOIDmode
))
3376 if (CONST_INT_P (operand
)
3377 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand
), c
, p
))
3388 /* A PLUS is never a valid operand, but reload can make
3389 it from a register when eliminating registers. */
3390 && GET_CODE (operand
) != PLUS
3391 /* A SCRATCH is not a valid operand. */
3392 && GET_CODE (operand
) != SCRATCH
3393 && (! CONSTANT_P (operand
)
3395 || LEGITIMATE_PIC_OPERAND_P (operand
))
3396 && (GENERAL_REGS
== ALL_REGS
3398 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3399 && reg_renumber
[REGNO (operand
)] < 0)))
3401 /* Drop through into 'r' case. */
3405 = reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3409 if (REG_CLASS_FROM_CONSTRAINT (c
, p
) == NO_REGS
)
3411 #ifdef EXTRA_CONSTRAINT_STR
3412 if (EXTRA_MEMORY_CONSTRAINT (c
, p
))
3416 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3418 /* If the address was already reloaded,
3420 else if (MEM_P (operand
)
3421 && address_reloaded
[i
] == 1)
3423 /* Likewise if the address will be reloaded because
3424 reg_equiv_address is nonzero. For reg_equiv_mem
3425 we have to check. */
3426 else if (REG_P (operand
)
3427 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3428 && reg_renumber
[REGNO (operand
)] < 0
3429 && ((reg_equiv_mem (REGNO (operand
)) != 0
3430 && EXTRA_CONSTRAINT_STR (reg_equiv_mem (REGNO (operand
)), c
, p
))
3431 || (reg_equiv_address (REGNO (operand
)) != 0)))
3434 /* If we didn't already win, we can reload
3435 constants via force_const_mem, and other
3436 MEMs by reloading the address like for 'o'. */
3437 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3444 if (EXTRA_ADDRESS_CONSTRAINT (c
, p
))
3446 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3449 /* If we didn't already win, we can reload
3450 the address into a base register. */
3451 this_alternative
[i
] = base_reg_class (VOIDmode
,
3458 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3465 = (reg_class_subunion
3466 [this_alternative
[i
]]
3467 [(int) REG_CLASS_FROM_CONSTRAINT (c
, p
)]);
3469 if (GET_MODE (operand
) == BLKmode
)
3473 && reg_fits_class_p (operand
, this_alternative
[i
],
3474 offset
, GET_MODE (recog_data
.operand
[i
])))
3478 while ((p
+= len
), c
);
3482 /* If this operand could be handled with a reg,
3483 and some reg is allowed, then this operand can be handled. */
3484 if (winreg
&& this_alternative
[i
] != NO_REGS
3485 && (win
|| !class_only_fixed_regs
[this_alternative
[i
]]))
3488 /* Record which operands fit this alternative. */
3489 this_alternative_earlyclobber
[i
] = earlyclobber
;
3490 if (win
&& ! force_reload
)
3491 this_alternative_win
[i
] = 1;
3492 else if (did_match
&& ! force_reload
)
3493 this_alternative_match_win
[i
] = 1;
3496 int const_to_mem
= 0;
3498 this_alternative_offmemok
[i
] = offmemok
;
3502 /* Alternative loses if it has no regs for a reg operand. */
3504 && this_alternative
[i
] == NO_REGS
3505 && this_alternative_matches
[i
] < 0)
3508 /* If this is a constant that is reloaded into the desired
3509 class by copying it to memory first, count that as another
3510 reload. This is consistent with other code and is
3511 required to avoid choosing another alternative when
3512 the constant is moved into memory by this function on
3513 an early reload pass. Note that the test here is
3514 precisely the same as in the code below that calls
3516 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3517 && ((targetm
.preferred_reload_class (operand
,
3518 this_alternative
[i
])
3520 || no_input_reloads
))
3523 if (this_alternative
[i
] != NO_REGS
)
3527 /* Alternative loses if it requires a type of reload not
3528 permitted for this insn. We can always reload SCRATCH
3529 and objects with a REG_UNUSED note. */
3530 if (GET_CODE (operand
) != SCRATCH
3531 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3532 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3534 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3538 /* If we can't reload this value at all, reject this
3539 alternative. Note that we could also lose due to
3540 LIMIT_RELOAD_CLASS, but we don't check that
3543 if (! CONSTANT_P (operand
) && this_alternative
[i
] != NO_REGS
)
3545 if (targetm
.preferred_reload_class (operand
, this_alternative
[i
])
3549 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
3550 && (targetm
.preferred_output_reload_class (operand
,
3551 this_alternative
[i
])
3556 /* We prefer to reload pseudos over reloading other things,
3557 since such reloads may be able to be eliminated later.
3558 If we are reloading a SCRATCH, we won't be generating any
3559 insns, just using a register, so it is also preferred.
3560 So bump REJECT in other cases. Don't do this in the
3561 case where we are forcing a constant into memory and
3562 it will then win since we don't want to have a different
3563 alternative match then. */
3564 if (! (REG_P (operand
)
3565 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3566 && GET_CODE (operand
) != SCRATCH
3567 && ! (const_to_mem
&& constmemok
))
3570 /* Input reloads can be inherited more often than output
3571 reloads can be removed, so penalize output reloads. */
3572 if (operand_type
[i
] != RELOAD_FOR_INPUT
3573 && GET_CODE (operand
) != SCRATCH
)
3577 /* If this operand is a pseudo register that didn't get a hard
3578 reg and this alternative accepts some register, see if the
3579 class that we want is a subset of the preferred class for this
3580 register. If not, but it intersects that class, use the
3581 preferred class instead. If it does not intersect the preferred
3582 class, show that usage of this alternative should be discouraged;
3583 it will be discouraged more still if the register is `preferred
3584 or nothing'. We do this because it increases the chance of
3585 reusing our spill register in a later insn and avoiding a pair
3586 of memory stores and loads.
3588 Don't bother with this if this alternative will accept this
3591 Don't do this for a multiword operand, since it is only a
3592 small win and has the risk of requiring more spill registers,
3593 which could cause a large loss.
3595 Don't do this if the preferred class has only one register
3596 because we might otherwise exhaust the class. */
3598 if (! win
&& ! did_match
3599 && this_alternative
[i
] != NO_REGS
3600 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3601 && reg_class_size
[(int) preferred_class
[i
]] > 0
3602 && ! small_register_class_p (preferred_class
[i
]))
3604 if (! reg_class_subset_p (this_alternative
[i
],
3605 preferred_class
[i
]))
3607 /* Since we don't have a way of forming the intersection,
3608 we just do something special if the preferred class
3609 is a subset of the class we have; that's the most
3610 common case anyway. */
3611 if (reg_class_subset_p (preferred_class
[i
],
3612 this_alternative
[i
]))
3613 this_alternative
[i
] = preferred_class
[i
];
3615 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3620 /* Now see if any output operands that are marked "earlyclobber"
3621 in this alternative conflict with any input operands
3622 or any memory addresses. */
3624 for (i
= 0; i
< noperands
; i
++)
3625 if (this_alternative_earlyclobber
[i
]
3626 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3628 struct decomposition early_data
;
3630 early_data
= decompose (recog_data
.operand
[i
]);
3632 gcc_assert (modified
[i
] != RELOAD_READ
);
3634 if (this_alternative
[i
] == NO_REGS
)
3636 this_alternative_earlyclobber
[i
] = 0;
3637 gcc_assert (this_insn_is_asm
);
3638 error_for_asm (this_insn
,
3639 "%<&%> constraint used with no register class");
3642 for (j
= 0; j
< noperands
; j
++)
3643 /* Is this an input operand or a memory ref? */
3644 if ((MEM_P (recog_data
.operand
[j
])
3645 || modified
[j
] != RELOAD_WRITE
)
3647 /* Ignore things like match_operator operands. */
3648 && !recog_data
.is_operator
[j
]
3649 /* Don't count an input operand that is constrained to match
3650 the early clobber operand. */
3651 && ! (this_alternative_matches
[j
] == i
3652 && rtx_equal_p (recog_data
.operand
[i
],
3653 recog_data
.operand
[j
]))
3654 /* Is it altered by storing the earlyclobber operand? */
3655 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3658 /* If the output is in a non-empty few-regs class,
3659 it's costly to reload it, so reload the input instead. */
3660 if (small_register_class_p (this_alternative
[i
])
3661 && (REG_P (recog_data
.operand
[j
])
3662 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3665 this_alternative_win
[j
] = 0;
3666 this_alternative_match_win
[j
] = 0;
3671 /* If an earlyclobber operand conflicts with something,
3672 it must be reloaded, so request this and count the cost. */
3676 this_alternative_win
[i
] = 0;
3677 this_alternative_match_win
[j
] = 0;
3678 for (j
= 0; j
< noperands
; j
++)
3679 if (this_alternative_matches
[j
] == i
3680 && this_alternative_match_win
[j
])
3682 this_alternative_win
[j
] = 0;
3683 this_alternative_match_win
[j
] = 0;
3689 /* If one alternative accepts all the operands, no reload required,
3690 choose that alternative; don't consider the remaining ones. */
3693 /* Unswap these so that they are never swapped at `finish'. */
3694 if (commutative
>= 0)
3696 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3697 recog_data
.operand
[commutative
+ 1]
3698 = substed_operand
[commutative
+ 1];
3700 for (i
= 0; i
< noperands
; i
++)
3702 goal_alternative_win
[i
] = this_alternative_win
[i
];
3703 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3704 goal_alternative
[i
] = this_alternative
[i
];
3705 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3706 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3707 goal_alternative_earlyclobber
[i
]
3708 = this_alternative_earlyclobber
[i
];
3710 goal_alternative_number
= this_alternative_number
;
3711 goal_alternative_swapped
= swapped
;
3712 goal_earlyclobber
= this_earlyclobber
;
3716 /* REJECT, set by the ! and ? constraint characters and when a register
3717 would be reloaded into a non-preferred class, discourages the use of
3718 this alternative for a reload goal. REJECT is incremented by six
3719 for each ? and two for each non-preferred class. */
3720 losers
= losers
* 6 + reject
;
3722 /* If this alternative can be made to work by reloading,
3723 and it needs less reloading than the others checked so far,
3724 record it as the chosen goal for reloading. */
3729 for (i
= 0; i
< noperands
; i
++)
3731 goal_alternative
[i
] = this_alternative
[i
];
3732 goal_alternative_win
[i
] = this_alternative_win
[i
];
3733 goal_alternative_match_win
[i
]
3734 = this_alternative_match_win
[i
];
3735 goal_alternative_offmemok
[i
]
3736 = this_alternative_offmemok
[i
];
3737 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3738 goal_alternative_earlyclobber
[i
]
3739 = this_alternative_earlyclobber
[i
];
3741 goal_alternative_swapped
= swapped
;
3743 goal_alternative_number
= this_alternative_number
;
3744 goal_earlyclobber
= this_earlyclobber
;
3749 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3750 then we need to try each alternative twice,
3751 the second time matching those two operands
3752 as if we had exchanged them.
3753 To do this, really exchange them in operands.
3755 If we have just tried the alternatives the second time,
3756 return operands to normal and drop through. */
3758 if (commutative
>= 0)
3763 enum reg_class tclass
;
3766 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3767 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3768 /* Swap the duplicates too. */
3769 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3770 if (recog_data
.dup_num
[i
] == commutative
3771 || recog_data
.dup_num
[i
] == commutative
+ 1)
3772 *recog_data
.dup_loc
[i
]
3773 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3775 tclass
= preferred_class
[commutative
];
3776 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3777 preferred_class
[commutative
+ 1] = tclass
;
3779 t
= pref_or_nothing
[commutative
];
3780 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3781 pref_or_nothing
[commutative
+ 1] = t
;
3783 t
= address_reloaded
[commutative
];
3784 address_reloaded
[commutative
] = address_reloaded
[commutative
+ 1];
3785 address_reloaded
[commutative
+ 1] = t
;
3787 memcpy (constraints
, recog_data
.constraints
,
3788 noperands
* sizeof (const char *));
3793 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3794 recog_data
.operand
[commutative
+ 1]
3795 = substed_operand
[commutative
+ 1];
3796 /* Unswap the duplicates too. */
3797 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3798 if (recog_data
.dup_num
[i
] == commutative
3799 || recog_data
.dup_num
[i
] == commutative
+ 1)
3800 *recog_data
.dup_loc
[i
]
3801 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3805 /* The operands don't meet the constraints.
3806 goal_alternative describes the alternative
3807 that we could reach by reloading the fewest operands.
3808 Reload so as to fit it. */
3810 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3812 /* No alternative works with reloads?? */
3813 if (insn_code_number
>= 0)
3814 fatal_insn ("unable to generate reloads for:", insn
);
3815 error_for_asm (insn
, "inconsistent operand constraints in an %<asm%>");
3816 /* Avoid further trouble with this insn. */
3817 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3822 /* Jump to `finish' from above if all operands are valid already.
3823 In that case, goal_alternative_win is all 1. */
3826 /* Right now, for any pair of operands I and J that are required to match,
3828 goal_alternative_matches[J] is I.
3829 Set up goal_alternative_matched as the inverse function:
3830 goal_alternative_matched[I] = J. */
3832 for (i
= 0; i
< noperands
; i
++)
3833 goal_alternative_matched
[i
] = -1;
3835 for (i
= 0; i
< noperands
; i
++)
3836 if (! goal_alternative_win
[i
]
3837 && goal_alternative_matches
[i
] >= 0)
3838 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3840 for (i
= 0; i
< noperands
; i
++)
3841 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3843 /* If the best alternative is with operands 1 and 2 swapped,
3844 consider them swapped before reporting the reloads. Update the
3845 operand numbers of any reloads already pushed. */
3847 if (goal_alternative_swapped
)
3851 tem
= substed_operand
[commutative
];
3852 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3853 substed_operand
[commutative
+ 1] = tem
;
3854 tem
= recog_data
.operand
[commutative
];
3855 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3856 recog_data
.operand
[commutative
+ 1] = tem
;
3857 tem
= *recog_data
.operand_loc
[commutative
];
3858 *recog_data
.operand_loc
[commutative
]
3859 = *recog_data
.operand_loc
[commutative
+ 1];
3860 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3862 for (i
= 0; i
< n_reloads
; i
++)
3864 if (rld
[i
].opnum
== commutative
)
3865 rld
[i
].opnum
= commutative
+ 1;
3866 else if (rld
[i
].opnum
== commutative
+ 1)
3867 rld
[i
].opnum
= commutative
;
3871 for (i
= 0; i
< noperands
; i
++)
3873 operand_reloadnum
[i
] = -1;
3875 /* If this is an earlyclobber operand, we need to widen the scope.
3876 The reload must remain valid from the start of the insn being
3877 reloaded until after the operand is stored into its destination.
3878 We approximate this with RELOAD_OTHER even though we know that we
3879 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3881 One special case that is worth checking is when we have an
3882 output that is earlyclobber but isn't used past the insn (typically
3883 a SCRATCH). In this case, we only need have the reload live
3884 through the insn itself, but not for any of our input or output
3886 But we must not accidentally narrow the scope of an existing
3887 RELOAD_OTHER reload - leave these alone.
3889 In any case, anything needed to address this operand can remain
3890 however they were previously categorized. */
3892 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3894 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3895 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3898 /* Any constants that aren't allowed and can't be reloaded
3899 into registers are here changed into memory references. */
3900 for (i
= 0; i
< noperands
; i
++)
3901 if (! goal_alternative_win
[i
])
3903 rtx op
= recog_data
.operand
[i
];
3904 rtx subreg
= NULL_RTX
;
3905 rtx plus
= NULL_RTX
;
3906 enum machine_mode mode
= operand_mode
[i
];
3908 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3909 push_reload so we have to let them pass here. */
3910 if (GET_CODE (op
) == SUBREG
)
3913 op
= SUBREG_REG (op
);
3914 mode
= GET_MODE (op
);
3917 if (GET_CODE (op
) == PLUS
)
3923 if (CONST_POOL_OK_P (mode
, op
)
3924 && ((targetm
.preferred_reload_class (op
, goal_alternative
[i
])
3926 || no_input_reloads
))
3928 int this_address_reloaded
;
3929 rtx tem
= force_const_mem (mode
, op
);
3931 /* If we stripped a SUBREG or a PLUS above add it back. */
3932 if (plus
!= NULL_RTX
)
3933 tem
= gen_rtx_PLUS (mode
, XEXP (plus
, 0), tem
);
3935 if (subreg
!= NULL_RTX
)
3936 tem
= gen_rtx_SUBREG (operand_mode
[i
], tem
, SUBREG_BYTE (subreg
));
3938 this_address_reloaded
= 0;
3939 substed_operand
[i
] = recog_data
.operand
[i
]
3940 = find_reloads_toplev (tem
, i
, address_type
[i
], ind_levels
,
3941 0, insn
, &this_address_reloaded
);
3943 /* If the alternative accepts constant pool refs directly
3944 there will be no reload needed at all. */
3945 if (plus
== NULL_RTX
3946 && subreg
== NULL_RTX
3947 && alternative_allows_const_pool_ref (this_address_reloaded
== 0
3948 ? substed_operand
[i
]
3950 recog_data
.constraints
[i
],
3951 goal_alternative_number
))
3952 goal_alternative_win
[i
] = 1;
3956 /* Record the values of the earlyclobber operands for the caller. */
3957 if (goal_earlyclobber
)
3958 for (i
= 0; i
< noperands
; i
++)
3959 if (goal_alternative_earlyclobber
[i
])
3960 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3962 /* Now record reloads for all the operands that need them. */
3963 for (i
= 0; i
< noperands
; i
++)
3964 if (! goal_alternative_win
[i
])
3966 /* Operands that match previous ones have already been handled. */
3967 if (goal_alternative_matches
[i
] >= 0)
3969 /* Handle an operand with a nonoffsettable address
3970 appearing where an offsettable address will do
3971 by reloading the address into a base register.
3973 ??? We can also do this when the operand is a register and
3974 reg_equiv_mem is not offsettable, but this is a bit tricky,
3975 so we don't bother with it. It may not be worth doing. */
3976 else if (goal_alternative_matched
[i
] == -1
3977 && goal_alternative_offmemok
[i
]
3978 && MEM_P (recog_data
.operand
[i
]))
3980 /* If the address to be reloaded is a VOIDmode constant,
3981 use the default address mode as mode of the reload register,
3982 as would have been done by find_reloads_address. */
3983 enum machine_mode address_mode
;
3984 address_mode
= GET_MODE (XEXP (recog_data
.operand
[i
], 0));
3985 if (address_mode
== VOIDmode
)
3987 addr_space_t as
= MEM_ADDR_SPACE (recog_data
.operand
[i
]);
3988 address_mode
= targetm
.addr_space
.address_mode (as
);
3991 operand_reloadnum
[i
]
3992 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3993 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3994 base_reg_class (VOIDmode
, MEM
, SCRATCH
),
3996 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3997 rld
[operand_reloadnum
[i
]].inc
3998 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
4000 /* If this operand is an output, we will have made any
4001 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
4002 now we are treating part of the operand as an input, so
4003 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
4005 if (modified
[i
] == RELOAD_WRITE
)
4007 for (j
= 0; j
< n_reloads
; j
++)
4009 if (rld
[j
].opnum
== i
)
4011 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
4012 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
4013 else if (rld
[j
].when_needed
4014 == RELOAD_FOR_OUTADDR_ADDRESS
)
4015 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
4020 else if (goal_alternative_matched
[i
] == -1)
4022 operand_reloadnum
[i
]
4023 = push_reload ((modified
[i
] != RELOAD_WRITE
4024 ? recog_data
.operand
[i
] : 0),
4025 (modified
[i
] != RELOAD_READ
4026 ? recog_data
.operand
[i
] : 0),
4027 (modified
[i
] != RELOAD_WRITE
4028 ? recog_data
.operand_loc
[i
] : 0),
4029 (modified
[i
] != RELOAD_READ
4030 ? recog_data
.operand_loc
[i
] : 0),
4031 (enum reg_class
) goal_alternative
[i
],
4032 (modified
[i
] == RELOAD_WRITE
4033 ? VOIDmode
: operand_mode
[i
]),
4034 (modified
[i
] == RELOAD_READ
4035 ? VOIDmode
: operand_mode
[i
]),
4036 (insn_code_number
< 0 ? 0
4037 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4038 0, i
, operand_type
[i
]);
4040 /* In a matching pair of operands, one must be input only
4041 and the other must be output only.
4042 Pass the input operand as IN and the other as OUT. */
4043 else if (modified
[i
] == RELOAD_READ
4044 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
4046 operand_reloadnum
[i
]
4047 = push_reload (recog_data
.operand
[i
],
4048 recog_data
.operand
[goal_alternative_matched
[i
]],
4049 recog_data
.operand_loc
[i
],
4050 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4051 (enum reg_class
) goal_alternative
[i
],
4053 operand_mode
[goal_alternative_matched
[i
]],
4054 0, 0, i
, RELOAD_OTHER
);
4055 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
4057 else if (modified
[i
] == RELOAD_WRITE
4058 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
4060 operand_reloadnum
[goal_alternative_matched
[i
]]
4061 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
4062 recog_data
.operand
[i
],
4063 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4064 recog_data
.operand_loc
[i
],
4065 (enum reg_class
) goal_alternative
[i
],
4066 operand_mode
[goal_alternative_matched
[i
]],
4068 0, 0, i
, RELOAD_OTHER
);
4069 operand_reloadnum
[i
] = output_reloadnum
;
4073 gcc_assert (insn_code_number
< 0);
4074 error_for_asm (insn
, "inconsistent operand constraints "
4076 /* Avoid further trouble with this insn. */
4077 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
4082 else if (goal_alternative_matched
[i
] < 0
4083 && goal_alternative_matches
[i
] < 0
4084 && address_operand_reloaded
[i
] != 1
4087 /* For each non-matching operand that's a MEM or a pseudo-register
4088 that didn't get a hard register, make an optional reload.
4089 This may get done even if the insn needs no reloads otherwise. */
4091 rtx operand
= recog_data
.operand
[i
];
4093 while (GET_CODE (operand
) == SUBREG
)
4094 operand
= SUBREG_REG (operand
);
4095 if ((MEM_P (operand
)
4097 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4098 /* If this is only for an output, the optional reload would not
4099 actually cause us to use a register now, just note that
4100 something is stored here. */
4101 && (goal_alternative
[i
] != NO_REGS
4102 || modified
[i
] == RELOAD_WRITE
)
4103 && ! no_input_reloads
4104 /* An optional output reload might allow to delete INSN later.
4105 We mustn't make in-out reloads on insns that are not permitted
4107 If this is an asm, we can't delete it; we must not even call
4108 push_reload for an optional output reload in this case,
4109 because we can't be sure that the constraint allows a register,
4110 and push_reload verifies the constraints for asms. */
4111 && (modified
[i
] == RELOAD_READ
4112 || (! no_output_reloads
&& ! this_insn_is_asm
)))
4113 operand_reloadnum
[i
]
4114 = push_reload ((modified
[i
] != RELOAD_WRITE
4115 ? recog_data
.operand
[i
] : 0),
4116 (modified
[i
] != RELOAD_READ
4117 ? recog_data
.operand
[i
] : 0),
4118 (modified
[i
] != RELOAD_WRITE
4119 ? recog_data
.operand_loc
[i
] : 0),
4120 (modified
[i
] != RELOAD_READ
4121 ? recog_data
.operand_loc
[i
] : 0),
4122 (enum reg_class
) goal_alternative
[i
],
4123 (modified
[i
] == RELOAD_WRITE
4124 ? VOIDmode
: operand_mode
[i
]),
4125 (modified
[i
] == RELOAD_READ
4126 ? VOIDmode
: operand_mode
[i
]),
4127 (insn_code_number
< 0 ? 0
4128 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4129 1, i
, operand_type
[i
]);
4130 /* If a memory reference remains (either as a MEM or a pseudo that
4131 did not get a hard register), yet we can't make an optional
4132 reload, check if this is actually a pseudo register reference;
4133 we then need to emit a USE and/or a CLOBBER so that reload
4134 inheritance will do the right thing. */
4138 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
4139 && reg_renumber
[REGNO (operand
)] < 0)))
4141 operand
= *recog_data
.operand_loc
[i
];
4143 while (GET_CODE (operand
) == SUBREG
)
4144 operand
= SUBREG_REG (operand
);
4145 if (REG_P (operand
))
4147 if (modified
[i
] != RELOAD_WRITE
)
4148 /* We mark the USE with QImode so that we recognize
4149 it as one that can be safely deleted at the end
4151 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
4153 if (modified
[i
] != RELOAD_READ
)
4154 emit_insn_after (gen_clobber (operand
), insn
);
4158 else if (goal_alternative_matches
[i
] >= 0
4159 && goal_alternative_win
[goal_alternative_matches
[i
]]
4160 && modified
[i
] == RELOAD_READ
4161 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4162 && ! no_input_reloads
&& ! no_output_reloads
4165 /* Similarly, make an optional reload for a pair of matching
4166 objects that are in MEM or a pseudo that didn't get a hard reg. */
4168 rtx operand
= recog_data
.operand
[i
];
4170 while (GET_CODE (operand
) == SUBREG
)
4171 operand
= SUBREG_REG (operand
);
4172 if ((MEM_P (operand
)
4174 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4175 && (goal_alternative
[goal_alternative_matches
[i
]] != NO_REGS
))
4176 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4177 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4178 recog_data
.operand
[i
],
4179 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4180 recog_data
.operand_loc
[i
],
4181 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4182 operand_mode
[goal_alternative_matches
[i
]],
4184 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4187 /* Perform whatever substitutions on the operands we are supposed
4188 to make due to commutativity or replacement of registers
4189 with equivalent constants or memory slots. */
4191 for (i
= 0; i
< noperands
; i
++)
4193 /* We only do this on the last pass through reload, because it is
4194 possible for some data (like reg_equiv_address) to be changed during
4195 later passes. Moreover, we lose the opportunity to get a useful
4196 reload_{in,out}_reg when we do these replacements. */
4200 rtx substitution
= substed_operand
[i
];
4202 *recog_data
.operand_loc
[i
] = substitution
;
4204 /* If we're replacing an operand with a LABEL_REF, we need to
4205 make sure that there's a REG_LABEL_OPERAND note attached to
4206 this instruction. */
4207 if (GET_CODE (substitution
) == LABEL_REF
4208 && !find_reg_note (insn
, REG_LABEL_OPERAND
,
4209 XEXP (substitution
, 0))
4210 /* For a JUMP_P, if it was a branch target it must have
4211 already been recorded as such. */
4213 || !label_is_jump_target_p (XEXP (substitution
, 0),
4215 add_reg_note (insn
, REG_LABEL_OPERAND
, XEXP (substitution
, 0));
4218 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4221 /* If this insn pattern contains any MATCH_DUP's, make sure that
4222 they will be substituted if the operands they match are substituted.
4223 Also do now any substitutions we already did on the operands.
4225 Don't do this if we aren't making replacements because we might be
4226 propagating things allocated by frame pointer elimination into places
4227 it doesn't expect. */
4229 if (insn_code_number
>= 0 && replace
)
4230 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4232 int opno
= recog_data
.dup_num
[i
];
4233 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4234 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4238 /* This loses because reloading of prior insns can invalidate the equivalence
4239 (or at least find_equiv_reg isn't smart enough to find it any more),
4240 causing this insn to need more reload regs than it needed before.
4241 It may be too late to make the reload regs available.
4242 Now this optimization is done safely in choose_reload_regs. */
4244 /* For each reload of a reg into some other class of reg,
4245 search for an existing equivalent reg (same value now) in the right class.
4246 We can use it as long as we don't need to change its contents. */
4247 for (i
= 0; i
< n_reloads
; i
++)
4248 if (rld
[i
].reg_rtx
== 0
4250 && REG_P (rld
[i
].in
)
4254 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].rclass
, -1,
4255 static_reload_reg_p
, 0, rld
[i
].inmode
);
4256 /* Prevent generation of insn to load the value
4257 because the one we found already has the value. */
4259 rld
[i
].in
= rld
[i
].reg_rtx
;
4263 /* If we detected error and replaced asm instruction by USE, forget about the
4265 if (GET_CODE (PATTERN (insn
)) == USE
4266 && CONST_INT_P (XEXP (PATTERN (insn
), 0)))
4269 /* Perhaps an output reload can be combined with another
4270 to reduce needs by one. */
4271 if (!goal_earlyclobber
)
4274 /* If we have a pair of reloads for parts of an address, they are reloading
4275 the same object, the operands themselves were not reloaded, and they
4276 are for two operands that are supposed to match, merge the reloads and
4277 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4279 for (i
= 0; i
< n_reloads
; i
++)
4283 for (j
= i
+ 1; j
< n_reloads
; j
++)
4284 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4285 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4286 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4287 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4288 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4289 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4290 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4291 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4292 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4293 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4294 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4295 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4296 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4297 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4298 || (goal_alternative_matches
[rld
[j
].opnum
]
4301 for (k
= 0; k
< n_replacements
; k
++)
4302 if (replacements
[k
].what
== j
)
4303 replacements
[k
].what
= i
;
4305 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4306 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4307 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4309 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4314 /* Scan all the reloads and update their type.
4315 If a reload is for the address of an operand and we didn't reload
4316 that operand, change the type. Similarly, change the operand number
4317 of a reload when two operands match. If a reload is optional, treat it
4318 as though the operand isn't reloaded.
4320 ??? This latter case is somewhat odd because if we do the optional
4321 reload, it means the object is hanging around. Thus we need only
4322 do the address reload if the optional reload was NOT done.
4324 Change secondary reloads to be the address type of their operand, not
4327 If an operand's reload is now RELOAD_OTHER, change any
4328 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4329 RELOAD_FOR_OTHER_ADDRESS. */
4331 for (i
= 0; i
< n_reloads
; i
++)
4333 if (rld
[i
].secondary_p
4334 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4335 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4337 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4338 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4339 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4340 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4341 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4342 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4344 /* If we have a secondary reload to go along with this reload,
4345 change its type to RELOAD_FOR_OPADDR_ADDR. */
4347 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4348 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4349 && rld
[i
].secondary_in_reload
!= -1)
4351 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4353 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4355 /* If there's a tertiary reload we have to change it also. */
4356 if (secondary_in_reload
> 0
4357 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4358 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4359 = RELOAD_FOR_OPADDR_ADDR
;
4362 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4363 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4364 && rld
[i
].secondary_out_reload
!= -1)
4366 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4368 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4370 /* If there's a tertiary reload we have to change it also. */
4371 if (secondary_out_reload
4372 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4373 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4374 = RELOAD_FOR_OPADDR_ADDR
;
4377 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4378 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4379 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4381 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4384 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4385 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4386 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4387 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4389 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4391 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4392 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4395 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4396 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4397 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4399 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4400 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4401 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4402 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4403 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4404 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4405 This is complicated by the fact that a single operand can have more
4406 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4407 choose_reload_regs without affecting code quality, and cases that
4408 actually fail are extremely rare, so it turns out to be better to fix
4409 the problem here by not generating cases that choose_reload_regs will
4411 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4412 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4414 We can reduce the register pressure by exploiting that a
4415 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4416 does not conflict with any of them, if it is only used for the first of
4417 the RELOAD_FOR_X_ADDRESS reloads. */
4419 int first_op_addr_num
= -2;
4420 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4421 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4422 int need_change
= 0;
4423 /* We use last_op_addr_reload and the contents of the above arrays
4424 first as flags - -2 means no instance encountered, -1 means exactly
4425 one instance encountered.
4426 If more than one instance has been encountered, we store the reload
4427 number of the first reload of the kind in question; reload numbers
4428 are known to be non-negative. */
4429 for (i
= 0; i
< noperands
; i
++)
4430 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4431 for (i
= n_reloads
- 1; i
>= 0; i
--)
4433 switch (rld
[i
].when_needed
)
4435 case RELOAD_FOR_OPERAND_ADDRESS
:
4436 if (++first_op_addr_num
>= 0)
4438 first_op_addr_num
= i
;
4442 case RELOAD_FOR_INPUT_ADDRESS
:
4443 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4445 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4449 case RELOAD_FOR_OUTPUT_ADDRESS
:
4450 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4452 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4463 for (i
= 0; i
< n_reloads
; i
++)
4466 enum reload_type type
;
4468 switch (rld
[i
].when_needed
)
4470 case RELOAD_FOR_OPADDR_ADDR
:
4471 first_num
= first_op_addr_num
;
4472 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4474 case RELOAD_FOR_INPADDR_ADDRESS
:
4475 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4476 type
= RELOAD_FOR_INPUT_ADDRESS
;
4478 case RELOAD_FOR_OUTADDR_ADDRESS
:
4479 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4480 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4487 else if (i
> first_num
)
4488 rld
[i
].when_needed
= type
;
4491 /* Check if the only TYPE reload that uses reload I is
4492 reload FIRST_NUM. */
4493 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4495 if (rld
[j
].when_needed
== type
4496 && (rld
[i
].secondary_p
4497 ? rld
[j
].secondary_in_reload
== i
4498 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4500 rld
[i
].when_needed
= type
;
4509 /* See if we have any reloads that are now allowed to be merged
4510 because we've changed when the reload is needed to
4511 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4512 check for the most common cases. */
4514 for (i
= 0; i
< n_reloads
; i
++)
4515 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4516 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4517 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4518 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4519 for (j
= 0; j
< n_reloads
; j
++)
4520 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4521 && rld
[j
].when_needed
== rld
[i
].when_needed
4522 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4523 && rld
[i
].rclass
== rld
[j
].rclass
4524 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4525 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4527 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4528 transfer_replacements (i
, j
);
4533 /* If we made any reloads for addresses, see if they violate a
4534 "no input reloads" requirement for this insn. But loads that we
4535 do after the insn (such as for output addresses) are fine. */
4536 if (no_input_reloads
)
4537 for (i
= 0; i
< n_reloads
; i
++)
4538 gcc_assert (rld
[i
].in
== 0
4539 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
4540 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
);
4543 /* Compute reload_mode and reload_nregs. */
4544 for (i
= 0; i
< n_reloads
; i
++)
4547 = (rld
[i
].inmode
== VOIDmode
4548 || (GET_MODE_SIZE (rld
[i
].outmode
)
4549 > GET_MODE_SIZE (rld
[i
].inmode
)))
4550 ? rld
[i
].outmode
: rld
[i
].inmode
;
4552 rld
[i
].nregs
= ira_reg_class_max_nregs
[rld
[i
].rclass
][rld
[i
].mode
];
4555 /* Special case a simple move with an input reload and a
4556 destination of a hard reg, if the hard reg is ok, use it. */
4557 for (i
= 0; i
< n_reloads
; i
++)
4558 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4559 && GET_CODE (PATTERN (insn
)) == SET
4560 && REG_P (SET_DEST (PATTERN (insn
)))
4561 && (SET_SRC (PATTERN (insn
)) == rld
[i
].in
4562 || SET_SRC (PATTERN (insn
)) == rld
[i
].in_reg
)
4563 && !elimination_target_reg_p (SET_DEST (PATTERN (insn
))))
4565 rtx dest
= SET_DEST (PATTERN (insn
));
4566 unsigned int regno
= REGNO (dest
);
4568 if (regno
< FIRST_PSEUDO_REGISTER
4569 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
)
4570 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4572 int nr
= hard_regno_nregs
[regno
][rld
[i
].mode
];
4575 for (nri
= 1; nri
< nr
; nri
++)
4576 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
+ nri
))
4580 rld
[i
].reg_rtx
= dest
;
4587 /* Return true if alternative number ALTNUM in constraint-string
4588 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4589 MEM gives the reference if it didn't need any reloads, otherwise it
4593 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED
,
4594 const char *constraint
, int altnum
)
4598 /* Skip alternatives before the one requested. */
4601 while (*constraint
++ != ',')
4605 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4606 If one of them is present, this alternative accepts the result of
4607 passing a constant-pool reference through find_reloads_toplev.
4609 The same is true of extra memory constraints if the address
4610 was reloaded into a register. However, the target may elect
4611 to disallow the original constant address, forcing it to be
4612 reloaded into a register instead. */
4613 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4614 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4616 if (c
== TARGET_MEM_CONSTRAINT
|| c
== 'o')
4618 #ifdef EXTRA_CONSTRAINT_STR
4619 if (EXTRA_MEMORY_CONSTRAINT (c
, constraint
)
4620 && (mem
== NULL
|| EXTRA_CONSTRAINT_STR (mem
, c
, constraint
)))
4627 /* Scan X for memory references and scan the addresses for reloading.
4628 Also checks for references to "constant" regs that we want to eliminate
4629 and replaces them with the values they stand for.
4630 We may alter X destructively if it contains a reference to such.
4631 If X is just a constant reg, we return the equivalent value
4634 IND_LEVELS says how many levels of indirect addressing this machine
4637 OPNUM and TYPE identify the purpose of the reload.
4639 IS_SET_DEST is true if X is the destination of a SET, which is not
4640 appropriate to be replaced by a constant.
4642 INSN, if nonzero, is the insn in which we do the reload. It is used
4643 to determine if we may generate output reloads, and where to put USEs
4644 for pseudos that we have to replace with stack slots.
4646 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4647 result of find_reloads_address. */
4650 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4651 int ind_levels
, int is_set_dest
, rtx insn
,
4652 int *address_reloaded
)
4654 RTX_CODE code
= GET_CODE (x
);
4656 const char *fmt
= GET_RTX_FORMAT (code
);
4662 /* This code is duplicated for speed in find_reloads. */
4663 int regno
= REGNO (x
);
4664 if (reg_equiv_constant (regno
) != 0 && !is_set_dest
)
4665 x
= reg_equiv_constant (regno
);
4667 /* This creates (subreg (mem...)) which would cause an unnecessary
4668 reload of the mem. */
4669 else if (reg_equiv_mem (regno
) != 0)
4670 x
= reg_equiv_mem (regno
);
4672 else if (reg_equiv_memory_loc (regno
)
4673 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
4675 rtx mem
= make_memloc (x
, regno
);
4676 if (reg_equiv_address (regno
)
4677 || ! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
4679 /* If this is not a toplevel operand, find_reloads doesn't see
4680 this substitution. We have to emit a USE of the pseudo so
4681 that delete_output_reload can see it. */
4682 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4683 /* We mark the USE with QImode so that we recognize it
4684 as one that can be safely deleted at the end of
4686 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4689 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4690 opnum
, type
, ind_levels
, insn
);
4691 if (!rtx_equal_p (x
, mem
))
4692 push_reg_equiv_alt_mem (regno
, x
);
4693 if (address_reloaded
)
4694 *address_reloaded
= i
;
4703 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4704 opnum
, type
, ind_levels
, insn
);
4705 if (address_reloaded
)
4706 *address_reloaded
= i
;
4711 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
)))
4713 /* Check for SUBREG containing a REG that's equivalent to a
4714 constant. If the constant has a known value, truncate it
4715 right now. Similarly if we are extracting a single-word of a
4716 multi-word constant. If the constant is symbolic, allow it
4717 to be substituted normally. push_reload will strip the
4718 subreg later. The constant must not be VOIDmode, because we
4719 will lose the mode of the register (this should never happen
4720 because one of the cases above should handle it). */
4722 int regno
= REGNO (SUBREG_REG (x
));
4725 if (regno
>= FIRST_PSEUDO_REGISTER
4726 && reg_renumber
[regno
] < 0
4727 && reg_equiv_constant (regno
) != 0)
4730 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant (regno
),
4731 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4733 if (CONSTANT_P (tem
)
4734 && !targetm
.legitimate_constant_p (GET_MODE (x
), tem
))
4736 tem
= force_const_mem (GET_MODE (x
), tem
);
4737 i
= find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4738 &XEXP (tem
, 0), opnum
, type
,
4740 if (address_reloaded
)
4741 *address_reloaded
= i
;
4746 /* If the subreg contains a reg that will be converted to a mem,
4747 convert the subreg to a narrower memref now.
4748 Otherwise, we would get (subreg (mem ...) ...),
4749 which would force reload of the mem.
4751 We also need to do this if there is an equivalent MEM that is
4752 not offsettable. In that case, alter_subreg would produce an
4753 invalid address on big-endian machines.
4755 For machines that extend byte loads, we must not reload using
4756 a wider mode if we have a paradoxical SUBREG. find_reloads will
4757 force a reload in that case. So we should not do anything here. */
4759 if (regno
>= FIRST_PSEUDO_REGISTER
4760 #ifdef LOAD_EXTEND_OP
4761 && !paradoxical_subreg_p (x
)
4763 && (reg_equiv_address (regno
) != 0
4764 || (reg_equiv_mem (regno
) != 0
4765 && (! strict_memory_address_addr_space_p
4766 (GET_MODE (x
), XEXP (reg_equiv_mem (regno
), 0),
4767 MEM_ADDR_SPACE (reg_equiv_mem (regno
)))
4768 || ! offsettable_memref_p (reg_equiv_mem (regno
))
4769 || num_not_at_initial_offset
))))
4770 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4771 insn
, address_reloaded
);
4774 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4778 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4779 ind_levels
, is_set_dest
, insn
,
4781 /* If we have replaced a reg with it's equivalent memory loc -
4782 that can still be handled here e.g. if it's in a paradoxical
4783 subreg - we must make the change in a copy, rather than using
4784 a destructive change. This way, find_reloads can still elect
4785 not to do the change. */
4786 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4788 x
= shallow_copy_rtx (x
);
4791 XEXP (x
, i
) = new_part
;
4797 /* Return a mem ref for the memory equivalent of reg REGNO.
4798 This mem ref is not shared with anything. */
4801 make_memloc (rtx ad
, int regno
)
4803 /* We must rerun eliminate_regs, in case the elimination
4804 offsets have changed. */
4806 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno
), VOIDmode
, NULL_RTX
),
4809 /* If TEM might contain a pseudo, we must copy it to avoid
4810 modifying it when we do the substitution for the reload. */
4811 if (rtx_varies_p (tem
, 0))
4812 tem
= copy_rtx (tem
);
4814 tem
= replace_equiv_address_nv (reg_equiv_memory_loc (regno
), tem
);
4815 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4817 /* Copy the result if it's still the same as the equivalence, to avoid
4818 modifying it when we do the substitution for the reload. */
4819 if (tem
== reg_equiv_memory_loc (regno
))
4820 tem
= copy_rtx (tem
);
4824 /* Returns true if AD could be turned into a valid memory reference
4825 to mode MODE in address space AS by reloading the part pointed to
4826 by PART into a register. */
4829 maybe_memory_address_addr_space_p (enum machine_mode mode
, rtx ad
,
4830 addr_space_t as
, rtx
*part
)
4834 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4837 retv
= memory_address_addr_space_p (mode
, ad
, as
);
4843 /* Record all reloads needed for handling memory address AD
4844 which appears in *LOC in a memory reference to mode MODE
4845 which itself is found in location *MEMREFLOC.
4846 Note that we take shortcuts assuming that no multi-reg machine mode
4847 occurs as part of an address.
4849 OPNUM and TYPE specify the purpose of this reload.
4851 IND_LEVELS says how many levels of indirect addressing this machine
4854 INSN, if nonzero, is the insn in which we do the reload. It is used
4855 to determine if we may generate output reloads, and where to put USEs
4856 for pseudos that we have to replace with stack slots.
4858 Value is one if this address is reloaded or replaced as a whole; it is
4859 zero if the top level of this address was not reloaded or replaced, and
4860 it is -1 if it may or may not have been reloaded or replaced.
4862 Note that there is no verification that the address will be valid after
4863 this routine does its work. Instead, we rely on the fact that the address
4864 was valid when reload started. So we need only undo things that reload
4865 could have broken. These are wrong register types, pseudos not allocated
4866 to a hard register, and frame pointer elimination. */
4869 find_reloads_address (enum machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4870 rtx
*loc
, int opnum
, enum reload_type type
,
4871 int ind_levels
, rtx insn
)
4873 addr_space_t as
= memrefloc
? MEM_ADDR_SPACE (*memrefloc
)
4874 : ADDR_SPACE_GENERIC
;
4876 int removed_and
= 0;
4880 /* If the address is a register, see if it is a legitimate address and
4881 reload if not. We first handle the cases where we need not reload
4882 or where we must reload in a non-standard way. */
4888 if (reg_equiv_constant (regno
) != 0)
4890 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
4891 base_reg_class (mode
, MEM
, SCRATCH
),
4892 GET_MODE (ad
), opnum
, type
, ind_levels
);
4896 tem
= reg_equiv_memory_loc (regno
);
4899 if (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
)
4901 tem
= make_memloc (ad
, regno
);
4902 if (! strict_memory_address_addr_space_p (GET_MODE (tem
),
4904 MEM_ADDR_SPACE (tem
)))
4908 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4909 &XEXP (tem
, 0), opnum
,
4910 ADDR_TYPE (type
), ind_levels
, insn
);
4911 if (!rtx_equal_p (tem
, orig
))
4912 push_reg_equiv_alt_mem (regno
, tem
);
4914 /* We can avoid a reload if the register's equivalent memory
4915 expression is valid as an indirect memory address.
4916 But not all addresses are valid in a mem used as an indirect
4917 address: only reg or reg+constant. */
4920 && strict_memory_address_addr_space_p (mode
, tem
, as
)
4921 && (REG_P (XEXP (tem
, 0))
4922 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4923 && REG_P (XEXP (XEXP (tem
, 0), 0))
4924 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4926 /* TEM is not the same as what we'll be replacing the
4927 pseudo with after reload, put a USE in front of INSN
4928 in the final reload pass. */
4930 && num_not_at_initial_offset
4931 && ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
4934 /* We mark the USE with QImode so that we
4935 recognize it as one that can be safely
4936 deleted at the end of reload. */
4937 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4940 /* This doesn't really count as replacing the address
4941 as a whole, since it is still a memory access. */
4949 /* The only remaining case where we can avoid a reload is if this is a
4950 hard register that is valid as a base register and which is not the
4951 subject of a CLOBBER in this insn. */
4953 else if (regno
< FIRST_PSEUDO_REGISTER
4954 && regno_ok_for_base_p (regno
, mode
, MEM
, SCRATCH
)
4955 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4958 /* If we do not have one of the cases above, we must do the reload. */
4959 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0, base_reg_class (mode
, MEM
, SCRATCH
),
4960 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4964 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
4966 /* The address appears valid, so reloads are not needed.
4967 But the address may contain an eliminable register.
4968 This can happen because a machine with indirect addressing
4969 may consider a pseudo register by itself a valid address even when
4970 it has failed to get a hard reg.
4971 So do a tree-walk to find and eliminate all such regs. */
4973 /* But first quickly dispose of a common case. */
4974 if (GET_CODE (ad
) == PLUS
4975 && CONST_INT_P (XEXP (ad
, 1))
4976 && REG_P (XEXP (ad
, 0))
4977 && reg_equiv_constant (REGNO (XEXP (ad
, 0))) == 0)
4980 subst_reg_equivs_changed
= 0;
4981 *loc
= subst_reg_equivs (ad
, insn
);
4983 if (! subst_reg_equivs_changed
)
4986 /* Check result for validity after substitution. */
4987 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
4991 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4994 if (memrefloc
&& ADDR_SPACE_GENERIC_P (as
))
4996 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
5001 *memrefloc
= copy_rtx (*memrefloc
);
5002 XEXP (*memrefloc
, 0) = ad
;
5003 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
5009 /* The address is not valid. We have to figure out why. First see if
5010 we have an outer AND and remove it if so. Then analyze what's inside. */
5012 if (GET_CODE (ad
) == AND
)
5015 loc
= &XEXP (ad
, 0);
5019 /* One possibility for why the address is invalid is that it is itself
5020 a MEM. This can happen when the frame pointer is being eliminated, a
5021 pseudo is not allocated to a hard register, and the offset between the
5022 frame and stack pointers is not its initial value. In that case the
5023 pseudo will have been replaced by a MEM referring to the
5027 /* First ensure that the address in this MEM is valid. Then, unless
5028 indirect addresses are valid, reload the MEM into a register. */
5030 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
5031 opnum
, ADDR_TYPE (type
),
5032 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
5034 /* If tem was changed, then we must create a new memory reference to
5035 hold it and store it back into memrefloc. */
5036 if (tem
!= ad
&& memrefloc
)
5038 *memrefloc
= copy_rtx (*memrefloc
);
5039 copy_replacements (tem
, XEXP (*memrefloc
, 0));
5040 loc
= &XEXP (*memrefloc
, 0);
5042 loc
= &XEXP (*loc
, 0);
5045 /* Check similar cases as for indirect addresses as above except
5046 that we can allow pseudos and a MEM since they should have been
5047 taken care of above. */
5050 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
5051 || MEM_P (XEXP (tem
, 0))
5052 || ! (REG_P (XEXP (tem
, 0))
5053 || (GET_CODE (XEXP (tem
, 0)) == PLUS
5054 && REG_P (XEXP (XEXP (tem
, 0), 0))
5055 && CONST_INT_P (XEXP (XEXP (tem
, 0), 1)))))
5057 /* Must use TEM here, not AD, since it is the one that will
5058 have any subexpressions reloaded, if needed. */
5059 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
5060 base_reg_class (mode
, MEM
, SCRATCH
), GET_MODE (tem
),
5063 return ! removed_and
;
5069 /* If we have address of a stack slot but it's not valid because the
5070 displacement is too large, compute the sum in a register.
5071 Handle all base registers here, not just fp/ap/sp, because on some
5072 targets (namely SH) we can also get too large displacements from
5073 big-endian corrections. */
5074 else if (GET_CODE (ad
) == PLUS
5075 && REG_P (XEXP (ad
, 0))
5076 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
5077 && CONST_INT_P (XEXP (ad
, 1))
5078 && (regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, PLUS
,
5080 /* Similarly, if we were to reload the base register and the
5081 mem+offset address is still invalid, then we want to reload
5082 the whole address, not just the base register. */
5083 || ! maybe_memory_address_addr_space_p
5084 (mode
, ad
, as
, &(XEXP (ad
, 0)))))
5087 /* Unshare the MEM rtx so we can safely alter it. */
5090 *memrefloc
= copy_rtx (*memrefloc
);
5091 loc
= &XEXP (*memrefloc
, 0);
5093 loc
= &XEXP (*loc
, 0);
5096 if (double_reg_address_ok
5097 && regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
,
5100 /* Unshare the sum as well. */
5101 *loc
= ad
= copy_rtx (ad
);
5103 /* Reload the displacement into an index reg.
5104 We assume the frame pointer or arg pointer is a base reg. */
5105 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
5106 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
5112 /* If the sum of two regs is not necessarily valid,
5113 reload the sum into a base reg.
5114 That will at least work. */
5115 find_reloads_address_part (ad
, loc
,
5116 base_reg_class (mode
, MEM
, SCRATCH
),
5117 GET_MODE (ad
), opnum
, type
, ind_levels
);
5119 return ! removed_and
;
5122 /* If we have an indexed stack slot, there are three possible reasons why
5123 it might be invalid: The index might need to be reloaded, the address
5124 might have been made by frame pointer elimination and hence have a
5125 constant out of range, or both reasons might apply.
5127 We can easily check for an index needing reload, but even if that is the
5128 case, we might also have an invalid constant. To avoid making the
5129 conservative assumption and requiring two reloads, we see if this address
5130 is valid when not interpreted strictly. If it is, the only problem is
5131 that the index needs a reload and find_reloads_address_1 will take care
5134 Handle all base registers here, not just fp/ap/sp, because on some
5135 targets (namely SPARC) we can also get invalid addresses from preventive
5136 subreg big-endian corrections made by find_reloads_toplev. We
5137 can also get expressions involving LO_SUM (rather than PLUS) from
5138 find_reloads_subreg_address.
5140 If we decide to do something, it must be that `double_reg_address_ok'
5141 is true. We generate a reload of the base register + constant and
5142 rework the sum so that the reload register will be added to the index.
5143 This is safe because we know the address isn't shared.
5145 We check for the base register as both the first and second operand of
5146 the innermost PLUS and/or LO_SUM. */
5148 for (op_index
= 0; op_index
< 2; ++op_index
)
5150 rtx operand
, addend
;
5151 enum rtx_code inner_code
;
5153 if (GET_CODE (ad
) != PLUS
)
5156 inner_code
= GET_CODE (XEXP (ad
, 0));
5157 if (!(GET_CODE (ad
) == PLUS
5158 && CONST_INT_P (XEXP (ad
, 1))
5159 && (inner_code
== PLUS
|| inner_code
== LO_SUM
)))
5162 operand
= XEXP (XEXP (ad
, 0), op_index
);
5163 if (!REG_P (operand
) || REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
5166 addend
= XEXP (XEXP (ad
, 0), 1 - op_index
);
5168 if ((regno_ok_for_base_p (REGNO (operand
), mode
, inner_code
,
5170 || operand
== frame_pointer_rtx
5171 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
5172 || operand
== hard_frame_pointer_rtx
5174 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5175 || operand
== arg_pointer_rtx
5177 || operand
== stack_pointer_rtx
)
5178 && ! maybe_memory_address_addr_space_p
5179 (mode
, ad
, as
, &XEXP (XEXP (ad
, 0), 1 - op_index
)))
5184 offset_reg
= plus_constant (operand
, INTVAL (XEXP (ad
, 1)));
5186 /* Form the adjusted address. */
5187 if (GET_CODE (XEXP (ad
, 0)) == PLUS
)
5188 ad
= gen_rtx_PLUS (GET_MODE (ad
),
5189 op_index
== 0 ? offset_reg
: addend
,
5190 op_index
== 0 ? addend
: offset_reg
);
5192 ad
= gen_rtx_LO_SUM (GET_MODE (ad
),
5193 op_index
== 0 ? offset_reg
: addend
,
5194 op_index
== 0 ? addend
: offset_reg
);
5197 cls
= base_reg_class (mode
, MEM
, GET_CODE (addend
));
5198 find_reloads_address_part (XEXP (ad
, op_index
),
5199 &XEXP (ad
, op_index
), cls
,
5200 GET_MODE (ad
), opnum
, type
, ind_levels
);
5201 find_reloads_address_1 (mode
,
5202 XEXP (ad
, 1 - op_index
), 1, GET_CODE (ad
),
5203 GET_CODE (XEXP (ad
, op_index
)),
5204 &XEXP (ad
, 1 - op_index
), opnum
,
5211 /* See if address becomes valid when an eliminable register
5212 in a sum is replaced. */
5215 if (GET_CODE (ad
) == PLUS
)
5216 tem
= subst_indexed_address (ad
);
5217 if (tem
!= ad
&& strict_memory_address_addr_space_p (mode
, tem
, as
))
5219 /* Ok, we win that way. Replace any additional eliminable
5222 subst_reg_equivs_changed
= 0;
5223 tem
= subst_reg_equivs (tem
, insn
);
5225 /* Make sure that didn't make the address invalid again. */
5227 if (! subst_reg_equivs_changed
5228 || strict_memory_address_addr_space_p (mode
, tem
, as
))
5235 /* If constants aren't valid addresses, reload the constant address
5237 if (CONSTANT_P (ad
) && ! strict_memory_address_addr_space_p (mode
, ad
, as
))
5239 enum machine_mode address_mode
= GET_MODE (ad
);
5240 if (address_mode
== VOIDmode
)
5241 address_mode
= targetm
.addr_space
.address_mode (as
);
5243 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5244 Unshare it so we can safely alter it. */
5245 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5246 && CONSTANT_POOL_ADDRESS_P (ad
))
5248 *memrefloc
= copy_rtx (*memrefloc
);
5249 loc
= &XEXP (*memrefloc
, 0);
5251 loc
= &XEXP (*loc
, 0);
5254 find_reloads_address_part (ad
, loc
, base_reg_class (mode
, MEM
, SCRATCH
),
5255 address_mode
, opnum
, type
, ind_levels
);
5256 return ! removed_and
;
5259 return find_reloads_address_1 (mode
, ad
, 0, MEM
, SCRATCH
, loc
, opnum
, type
,
5263 /* Find all pseudo regs appearing in AD
5264 that are eliminable in favor of equivalent values
5265 and do not have hard regs; replace them by their equivalents.
5266 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5267 front of it for pseudos that we have to replace with stack slots. */
5270 subst_reg_equivs (rtx ad
, rtx insn
)
5272 RTX_CODE code
= GET_CODE (ad
);
5292 int regno
= REGNO (ad
);
5294 if (reg_equiv_constant (regno
) != 0)
5296 subst_reg_equivs_changed
= 1;
5297 return reg_equiv_constant (regno
);
5299 if (reg_equiv_memory_loc (regno
) && num_not_at_initial_offset
)
5301 rtx mem
= make_memloc (ad
, regno
);
5302 if (! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
5304 subst_reg_equivs_changed
= 1;
5305 /* We mark the USE with QImode so that we recognize it
5306 as one that can be safely deleted at the end of
5308 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5317 /* Quickly dispose of a common case. */
5318 if (XEXP (ad
, 0) == frame_pointer_rtx
5319 && CONST_INT_P (XEXP (ad
, 1)))
5327 fmt
= GET_RTX_FORMAT (code
);
5328 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5330 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5334 /* Compute the sum of X and Y, making canonicalizations assumed in an
5335 address, namely: sum constant integers, surround the sum of two
5336 constants with a CONST, put the constant as the second operand, and
5337 group the constant on the outermost sum.
5339 This routine assumes both inputs are already in canonical form. */
5342 form_sum (enum machine_mode mode
, rtx x
, rtx y
)
5346 gcc_assert (GET_MODE (x
) == mode
|| GET_MODE (x
) == VOIDmode
);
5347 gcc_assert (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
);
5349 if (CONST_INT_P (x
))
5350 return plus_constant (y
, INTVAL (x
));
5351 else if (CONST_INT_P (y
))
5352 return plus_constant (x
, INTVAL (y
));
5353 else if (CONSTANT_P (x
))
5354 tem
= x
, x
= y
, y
= tem
;
5356 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5357 return form_sum (mode
, XEXP (x
, 0), form_sum (mode
, XEXP (x
, 1), y
));
5359 /* Note that if the operands of Y are specified in the opposite
5360 order in the recursive calls below, infinite recursion will occur. */
5361 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5362 return form_sum (mode
, form_sum (mode
, x
, XEXP (y
, 0)), XEXP (y
, 1));
5364 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5365 constant will have been placed second. */
5366 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5368 if (GET_CODE (x
) == CONST
)
5370 if (GET_CODE (y
) == CONST
)
5373 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5376 return gen_rtx_PLUS (mode
, x
, y
);
5379 /* If ADDR is a sum containing a pseudo register that should be
5380 replaced with a constant (from reg_equiv_constant),
5381 return the result of doing so, and also apply the associative
5382 law so that the result is more likely to be a valid address.
5383 (But it is not guaranteed to be one.)
5385 Note that at most one register is replaced, even if more are
5386 replaceable. Also, we try to put the result into a canonical form
5387 so it is more likely to be a valid address.
5389 In all other cases, return ADDR. */
5392 subst_indexed_address (rtx addr
)
5394 rtx op0
= 0, op1
= 0, op2
= 0;
5398 if (GET_CODE (addr
) == PLUS
)
5400 /* Try to find a register to replace. */
5401 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5403 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5404 && reg_renumber
[regno
] < 0
5405 && reg_equiv_constant (regno
) != 0)
5406 op0
= reg_equiv_constant (regno
);
5407 else if (REG_P (op1
)
5408 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5409 && reg_renumber
[regno
] < 0
5410 && reg_equiv_constant (regno
) != 0)
5411 op1
= reg_equiv_constant (regno
);
5412 else if (GET_CODE (op0
) == PLUS
5413 && (tem
= subst_indexed_address (op0
)) != op0
)
5415 else if (GET_CODE (op1
) == PLUS
5416 && (tem
= subst_indexed_address (op1
)) != op1
)
5421 /* Pick out up to three things to add. */
5422 if (GET_CODE (op1
) == PLUS
)
5423 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5424 else if (GET_CODE (op0
) == PLUS
)
5425 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5427 /* Compute the sum. */
5429 op1
= form_sum (GET_MODE (addr
), op1
, op2
);
5431 op0
= form_sum (GET_MODE (addr
), op0
, op1
);
5438 /* Update the REG_INC notes for an insn. It updates all REG_INC
5439 notes for the instruction which refer to REGNO the to refer
5440 to the reload number.
5442 INSN is the insn for which any REG_INC notes need updating.
5444 REGNO is the register number which has been reloaded.
5446 RELOADNUM is the reload number. */
5449 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5450 int reloadnum ATTRIBUTE_UNUSED
)
5455 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5456 if (REG_NOTE_KIND (link
) == REG_INC
5457 && (int) REGNO (XEXP (link
, 0)) == regno
)
5458 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5462 /* Record the pseudo registers we must reload into hard registers in a
5463 subexpression of a would-be memory address, X referring to a value
5464 in mode MODE. (This function is not called if the address we find
5467 CONTEXT = 1 means we are considering regs as index regs,
5468 = 0 means we are considering them as base regs.
5469 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5471 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5472 is the code of the index part of the address. Otherwise, pass SCRATCH
5474 OPNUM and TYPE specify the purpose of any reloads made.
5476 IND_LEVELS says how many levels of indirect addressing are
5477 supported at this point in the address.
5479 INSN, if nonzero, is the insn in which we do the reload. It is used
5480 to determine if we may generate output reloads.
5482 We return nonzero if X, as a whole, is reloaded or replaced. */
5484 /* Note that we take shortcuts assuming that no multi-reg machine mode
5485 occurs as part of an address.
5486 Also, this is not fully machine-customizable; it works for machines
5487 such as VAXen and 68000's and 32000's, but other possible machines
5488 could have addressing modes that this does not handle right.
5489 If you add push_reload calls here, you need to make sure gen_reload
5490 handles those cases gracefully. */
5493 find_reloads_address_1 (enum machine_mode mode
, rtx x
, int context
,
5494 enum rtx_code outer_code
, enum rtx_code index_code
,
5495 rtx
*loc
, int opnum
, enum reload_type type
,
5496 int ind_levels
, rtx insn
)
5498 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5500 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5501 : REGNO_OK_FOR_INDEX_P (REGNO))
5503 enum reg_class context_reg_class
;
5504 RTX_CODE code
= GET_CODE (x
);
5507 context_reg_class
= INDEX_REG_CLASS
;
5509 context_reg_class
= base_reg_class (mode
, outer_code
, index_code
);
5515 rtx orig_op0
= XEXP (x
, 0);
5516 rtx orig_op1
= XEXP (x
, 1);
5517 RTX_CODE code0
= GET_CODE (orig_op0
);
5518 RTX_CODE code1
= GET_CODE (orig_op1
);
5522 if (GET_CODE (op0
) == SUBREG
)
5524 op0
= SUBREG_REG (op0
);
5525 code0
= GET_CODE (op0
);
5526 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5527 op0
= gen_rtx_REG (word_mode
,
5529 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5530 GET_MODE (SUBREG_REG (orig_op0
)),
5531 SUBREG_BYTE (orig_op0
),
5532 GET_MODE (orig_op0
))));
5535 if (GET_CODE (op1
) == SUBREG
)
5537 op1
= SUBREG_REG (op1
);
5538 code1
= GET_CODE (op1
);
5539 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5540 /* ??? Why is this given op1's mode and above for
5541 ??? op0 SUBREGs we use word_mode? */
5542 op1
= gen_rtx_REG (GET_MODE (op1
),
5544 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5545 GET_MODE (SUBREG_REG (orig_op1
)),
5546 SUBREG_BYTE (orig_op1
),
5547 GET_MODE (orig_op1
))));
5549 /* Plus in the index register may be created only as a result of
5550 register rematerialization for expression like &localvar*4. Reload it.
5551 It may be possible to combine the displacement on the outer level,
5552 but it is probably not worthwhile to do so. */
5555 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5556 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5557 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5559 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5563 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5564 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5566 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5567 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5569 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, code0
,
5570 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5574 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5575 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5577 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, code1
,
5578 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5580 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5581 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5585 else if (code0
== CONST_INT
|| code0
== CONST
5586 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5587 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, code0
,
5588 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5591 else if (code1
== CONST_INT
|| code1
== CONST
5592 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5593 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, code1
,
5594 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5597 else if (code0
== REG
&& code1
== REG
)
5599 if (REGNO_OK_FOR_INDEX_P (REGNO (op1
))
5600 && regno_ok_for_base_p (REGNO (op0
), mode
, PLUS
, REG
))
5602 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
))
5603 && regno_ok_for_base_p (REGNO (op1
), mode
, PLUS
, REG
))
5605 else if (regno_ok_for_base_p (REGNO (op0
), mode
, PLUS
, REG
))
5606 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5607 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5609 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
)))
5610 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, REG
,
5611 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5613 else if (regno_ok_for_base_p (REGNO (op1
), mode
, PLUS
, REG
))
5614 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5615 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5617 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
)))
5618 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, REG
,
5619 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5623 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, REG
,
5624 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5626 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5627 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5632 else if (code0
== REG
)
5634 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5635 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5637 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, REG
,
5638 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5642 else if (code1
== REG
)
5644 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5645 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5647 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, REG
,
5648 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5658 rtx op0
= XEXP (x
, 0);
5659 rtx op1
= XEXP (x
, 1);
5660 enum rtx_code index_code
;
5664 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5667 /* Currently, we only support {PRE,POST}_MODIFY constructs
5668 where a base register is {inc,dec}remented by the contents
5669 of another register or by a constant value. Thus, these
5670 operands must match. */
5671 gcc_assert (op0
== XEXP (op1
, 0));
5673 /* Require index register (or constant). Let's just handle the
5674 register case in the meantime... If the target allows
5675 auto-modify by a constant then we could try replacing a pseudo
5676 register with its equivalent constant where applicable.
5678 We also handle the case where the register was eliminated
5679 resulting in a PLUS subexpression.
5681 If we later decide to reload the whole PRE_MODIFY or
5682 POST_MODIFY, inc_for_reload might clobber the reload register
5683 before reading the index. The index register might therefore
5684 need to live longer than a TYPE reload normally would, so be
5685 conservative and class it as RELOAD_OTHER. */
5686 if ((REG_P (XEXP (op1
, 1))
5687 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5688 || GET_CODE (XEXP (op1
, 1)) == PLUS
)
5689 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, code
, SCRATCH
,
5690 &XEXP (op1
, 1), opnum
, RELOAD_OTHER
,
5693 gcc_assert (REG_P (XEXP (op1
, 0)));
5695 regno
= REGNO (XEXP (op1
, 0));
5696 index_code
= GET_CODE (XEXP (op1
, 1));
5698 /* A register that is incremented cannot be constant! */
5699 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5700 || reg_equiv_constant (regno
) == 0);
5702 /* Handle a register that is equivalent to a memory location
5703 which cannot be addressed directly. */
5704 if (reg_equiv_memory_loc (regno
) != 0
5705 && (reg_equiv_address (regno
) != 0
5706 || num_not_at_initial_offset
))
5708 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5710 if (reg_equiv_address (regno
)
5711 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5715 /* First reload the memory location's address.
5716 We can't use ADDR_TYPE (type) here, because we need to
5717 write back the value after reading it, hence we actually
5718 need two registers. */
5719 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5720 &XEXP (tem
, 0), opnum
,
5724 if (!rtx_equal_p (tem
, orig
))
5725 push_reg_equiv_alt_mem (regno
, tem
);
5727 /* Then reload the memory location into a base
5729 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5731 base_reg_class (mode
, code
,
5733 GET_MODE (x
), GET_MODE (x
), 0,
5734 0, opnum
, RELOAD_OTHER
);
5736 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5741 if (reg_renumber
[regno
] >= 0)
5742 regno
= reg_renumber
[regno
];
5744 /* We require a base register here... */
5745 if (!regno_ok_for_base_p (regno
, GET_MODE (x
), code
, index_code
))
5747 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5748 &XEXP (op1
, 0), &XEXP (x
, 0),
5749 base_reg_class (mode
, code
, index_code
),
5750 GET_MODE (x
), GET_MODE (x
), 0, 0,
5751 opnum
, RELOAD_OTHER
);
5753 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5763 if (REG_P (XEXP (x
, 0)))
5765 int regno
= REGNO (XEXP (x
, 0));
5769 /* A register that is incremented cannot be constant! */
5770 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5771 || reg_equiv_constant (regno
) == 0);
5773 /* Handle a register that is equivalent to a memory location
5774 which cannot be addressed directly. */
5775 if (reg_equiv_memory_loc (regno
) != 0
5776 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5778 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5779 if (reg_equiv_address (regno
)
5780 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5784 /* First reload the memory location's address.
5785 We can't use ADDR_TYPE (type) here, because we need to
5786 write back the value after reading it, hence we actually
5787 need two registers. */
5788 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5789 &XEXP (tem
, 0), opnum
, type
,
5791 if (!rtx_equal_p (tem
, orig
))
5792 push_reg_equiv_alt_mem (regno
, tem
);
5793 /* Put this inside a new increment-expression. */
5794 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5795 /* Proceed to reload that, as if it contained a register. */
5799 /* If we have a hard register that is ok in this incdec context,
5800 don't make a reload. If the register isn't nice enough for
5801 autoincdec, we can reload it. But, if an autoincrement of a
5802 register that we here verified as playing nice, still outside
5803 isn't "valid", it must be that no autoincrement is "valid".
5804 If that is true and something made an autoincrement anyway,
5805 this must be a special context where one is allowed.
5806 (For example, a "push" instruction.)
5807 We can't improve this address, so leave it alone. */
5809 /* Otherwise, reload the autoincrement into a suitable hard reg
5810 and record how much to increment by. */
5812 if (reg_renumber
[regno
] >= 0)
5813 regno
= reg_renumber
[regno
];
5814 if (regno
>= FIRST_PSEUDO_REGISTER
5815 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, code
,
5820 /* If we can output the register afterwards, do so, this
5821 saves the extra update.
5822 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5823 CALL_INSN - and it does not set CC0.
5824 But don't do this if we cannot directly address the
5825 memory location, since this will make it harder to
5826 reuse address reloads, and increases register pressure.
5827 Also don't do this if we can probably update x directly. */
5828 rtx equiv
= (MEM_P (XEXP (x
, 0))
5830 : reg_equiv_mem (regno
));
5831 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
5832 if (insn
&& NONJUMP_INSN_P (insn
) && equiv
5833 && memory_operand (equiv
, GET_MODE (equiv
))
5835 && ! sets_cc0_p (PATTERN (insn
))
5837 && ! (icode
!= CODE_FOR_nothing
5838 && insn_operand_matches (icode
, 0, equiv
)
5839 && insn_operand_matches (icode
, 1, equiv
)))
5841 /* We use the original pseudo for loc, so that
5842 emit_reload_insns() knows which pseudo this
5843 reload refers to and updates the pseudo rtx, not
5844 its equivalent memory location, as well as the
5845 corresponding entry in reg_last_reload_reg. */
5846 loc
= &XEXP (x_orig
, 0);
5849 = push_reload (x
, x
, loc
, loc
,
5851 GET_MODE (x
), GET_MODE (x
), 0, 0,
5852 opnum
, RELOAD_OTHER
);
5857 = push_reload (x
, x
, loc
, (rtx
*) 0,
5859 GET_MODE (x
), GET_MODE (x
), 0, 0,
5862 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5867 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5877 /* Look for parts to reload in the inner expression and reload them
5878 too, in addition to this operation. Reloading all inner parts in
5879 addition to this one shouldn't be necessary, but at this point,
5880 we don't know if we can possibly omit any part that *can* be
5881 reloaded. Targets that are better off reloading just either part
5882 (or perhaps even a different part of an outer expression), should
5883 define LEGITIMIZE_RELOAD_ADDRESS. */
5884 find_reloads_address_1 (GET_MODE (XEXP (x
, 0)), XEXP (x
, 0),
5885 context
, code
, SCRATCH
, &XEXP (x
, 0), opnum
,
5886 type
, ind_levels
, insn
);
5887 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5889 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5893 /* This is probably the result of a substitution, by eliminate_regs, of
5894 an equivalent address for a pseudo that was not allocated to a hard
5895 register. Verify that the specified address is valid and reload it
5898 Since we know we are going to reload this item, don't decrement for
5899 the indirection level.
5901 Note that this is actually conservative: it would be slightly more
5902 efficient to use the value of SPILL_INDIRECT_LEVELS from
5905 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5906 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5907 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5909 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5914 int regno
= REGNO (x
);
5916 if (reg_equiv_constant (regno
) != 0)
5918 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
5920 GET_MODE (x
), opnum
, type
, ind_levels
);
5924 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5925 that feeds this insn. */
5926 if (reg_equiv_mem (regno
) != 0)
5928 push_reload (reg_equiv_mem (regno
), NULL_RTX
, loc
, (rtx
*) 0,
5930 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5935 if (reg_equiv_memory_loc (regno
)
5936 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5938 rtx tem
= make_memloc (x
, regno
);
5939 if (reg_equiv_address (regno
) != 0
5940 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5943 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5944 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5946 if (!rtx_equal_p (x
, tem
))
5947 push_reg_equiv_alt_mem (regno
, x
);
5951 if (reg_renumber
[regno
] >= 0)
5952 regno
= reg_renumber
[regno
];
5954 if (regno
>= FIRST_PSEUDO_REGISTER
5955 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, outer_code
,
5958 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5960 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5964 /* If a register appearing in an address is the subject of a CLOBBER
5965 in this insn, reload it into some other register to be safe.
5966 The CLOBBER is supposed to make the register unavailable
5967 from before this insn to after it. */
5968 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5970 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5972 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5979 if (REG_P (SUBREG_REG (x
)))
5981 /* If this is a SUBREG of a hard register and the resulting register
5982 is of the wrong class, reload the whole SUBREG. This avoids
5983 needless copies if SUBREG_REG is multi-word. */
5984 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5986 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
5988 if (!REG_OK_FOR_CONTEXT (context
, regno
, mode
, outer_code
,
5991 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5993 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5997 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5998 is larger than the class size, then reload the whole SUBREG. */
6001 enum reg_class rclass
= context_reg_class
;
6002 if (ira_reg_class_max_nregs
[rclass
][GET_MODE (SUBREG_REG (x
))]
6003 > reg_class_size
[(int) rclass
])
6005 x
= find_reloads_subreg_address (x
, 0, opnum
,
6007 ind_levels
, insn
, NULL
);
6008 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6009 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6021 const char *fmt
= GET_RTX_FORMAT (code
);
6024 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6027 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6029 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, code
, SCRATCH
,
6030 &XEXP (x
, i
), opnum
, type
, ind_levels
, insn
);
6034 #undef REG_OK_FOR_CONTEXT
6038 /* X, which is found at *LOC, is a part of an address that needs to be
6039 reloaded into a register of class RCLASS. If X is a constant, or if
6040 X is a PLUS that contains a constant, check that the constant is a
6041 legitimate operand and that we are supposed to be able to load
6042 it into the register.
6044 If not, force the constant into memory and reload the MEM instead.
6046 MODE is the mode to use, in case X is an integer constant.
6048 OPNUM and TYPE describe the purpose of any reloads made.
6050 IND_LEVELS says how many levels of indirect addressing this machine
6054 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class rclass
,
6055 enum machine_mode mode
, int opnum
,
6056 enum reload_type type
, int ind_levels
)
6059 && (!targetm
.legitimate_constant_p (mode
, x
)
6060 || targetm
.preferred_reload_class (x
, rclass
) == NO_REGS
))
6062 x
= force_const_mem (mode
, x
);
6063 find_reloads_address (mode
, &x
, XEXP (x
, 0), &XEXP (x
, 0),
6064 opnum
, type
, ind_levels
, 0);
6067 else if (GET_CODE (x
) == PLUS
6068 && CONSTANT_P (XEXP (x
, 1))
6069 && (!targetm
.legitimate_constant_p (GET_MODE (x
), XEXP (x
, 1))
6070 || targetm
.preferred_reload_class (XEXP (x
, 1), rclass
)
6075 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
6076 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
6077 find_reloads_address (mode
, &XEXP (x
, 1), XEXP (tem
, 0), &XEXP (tem
, 0),
6078 opnum
, type
, ind_levels
, 0);
6081 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6082 mode
, VOIDmode
, 0, 0, opnum
, type
);
6085 /* X, a subreg of a pseudo, is a part of an address that needs to be
6088 If the pseudo is equivalent to a memory location that cannot be directly
6089 addressed, make the necessary address reloads.
6091 If address reloads have been necessary, or if the address is changed
6092 by register elimination, return the rtx of the memory location;
6093 otherwise, return X.
6095 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
6098 OPNUM and TYPE identify the purpose of the reload.
6100 IND_LEVELS says how many levels of indirect addressing are
6101 supported at this point in the address.
6103 INSN, if nonzero, is the insn in which we do the reload. It is used
6104 to determine where to put USEs for pseudos that we have to replace with
6108 find_reloads_subreg_address (rtx x
, int force_replace
, int opnum
,
6109 enum reload_type type
, int ind_levels
, rtx insn
,
6110 int *address_reloaded
)
6112 int regno
= REGNO (SUBREG_REG (x
));
6115 if (reg_equiv_memory_loc (regno
))
6117 /* If the address is not directly addressable, or if the address is not
6118 offsettable, then it must be replaced. */
6120 && (reg_equiv_address (regno
)
6121 || ! offsettable_memref_p (reg_equiv_mem (regno
))))
6124 if (force_replace
|| num_not_at_initial_offset
)
6126 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
6128 /* If the address changes because of register elimination, then
6129 it must be replaced. */
6131 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
6133 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
6134 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
6138 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6139 hold the correct (negative) byte offset. */
6140 if (BYTES_BIG_ENDIAN
&& outer_size
> inner_size
)
6141 offset
= inner_size
- outer_size
;
6143 offset
= SUBREG_BYTE (x
);
6145 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
6146 PUT_MODE (tem
, GET_MODE (x
));
6147 if (MEM_OFFSET_KNOWN_P (tem
))
6148 set_mem_offset (tem
, MEM_OFFSET (tem
) + offset
);
6149 if (MEM_SIZE_KNOWN_P (tem
)
6150 && MEM_SIZE (tem
) != (HOST_WIDE_INT
) outer_size
)
6151 set_mem_size (tem
, outer_size
);
6153 /* If this was a paradoxical subreg that we replaced, the
6154 resulting memory must be sufficiently aligned to allow
6155 us to widen the mode of the memory. */
6156 if (outer_size
> inner_size
)
6160 base
= XEXP (tem
, 0);
6161 if (GET_CODE (base
) == PLUS
)
6163 if (CONST_INT_P (XEXP (base
, 1))
6164 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
6166 base
= XEXP (base
, 0);
6169 || (REGNO_POINTER_ALIGN (REGNO (base
))
6170 < outer_size
* BITS_PER_UNIT
))
6174 reloaded
= find_reloads_address (GET_MODE (tem
), &tem
,
6175 XEXP (tem
, 0), &XEXP (tem
, 0),
6176 opnum
, type
, ind_levels
, insn
);
6177 /* ??? Do we need to handle nonzero offsets somehow? */
6178 if (!offset
&& !rtx_equal_p (tem
, orig
))
6179 push_reg_equiv_alt_mem (regno
, tem
);
6181 /* For some processors an address may be valid in the
6182 original mode but not in a smaller mode. For
6183 example, ARM accepts a scaled index register in
6184 SImode but not in HImode. Note that this is only
6185 a problem if the address in reg_equiv_mem is already
6186 invalid in the new mode; other cases would be fixed
6187 by find_reloads_address as usual.
6189 ??? We attempt to handle such cases here by doing an
6190 additional reload of the full address after the
6191 usual processing by find_reloads_address. Note that
6192 this may not work in the general case, but it seems
6193 to cover the cases where this situation currently
6194 occurs. A more general fix might be to reload the
6195 *value* instead of the address, but this would not
6196 be expected by the callers of this routine as-is.
6198 If find_reloads_address already completed replaced
6199 the address, there is nothing further to do. */
6201 && reg_equiv_mem (regno
) != 0
6202 && !strict_memory_address_addr_space_p
6203 (GET_MODE (x
), XEXP (reg_equiv_mem (regno
), 0),
6204 MEM_ADDR_SPACE (reg_equiv_mem (regno
))))
6206 push_reload (XEXP (tem
, 0), NULL_RTX
, &XEXP (tem
, 0), (rtx
*) 0,
6207 base_reg_class (GET_MODE (tem
), MEM
, SCRATCH
),
6208 GET_MODE (XEXP (tem
, 0)), VOIDmode
, 0, 0,
6212 /* If this is not a toplevel operand, find_reloads doesn't see
6213 this substitution. We have to emit a USE of the pseudo so
6214 that delete_output_reload can see it. */
6215 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
6216 /* We mark the USE with QImode so that we recognize it
6217 as one that can be safely deleted at the end of
6219 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
6226 if (reloaded
&& address_reloaded
)
6227 *address_reloaded
= 1;
6232 /* Substitute into the current INSN the registers into which we have reloaded
6233 the things that need reloading. The array `replacements'
6234 contains the locations of all pointers that must be changed
6235 and says what to replace them with.
6237 Return the rtx that X translates into; usually X, but modified. */
6240 subst_reloads (rtx insn
)
6244 for (i
= 0; i
< n_replacements
; i
++)
6246 struct replacement
*r
= &replacements
[i
];
6247 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6251 /* This checking takes a very long time on some platforms
6252 causing the gcc.c-torture/compile/limits-fnargs.c test
6253 to time out during testing. See PR 31850.
6255 Internal consistency test. Check that we don't modify
6256 anything in the equivalence arrays. Whenever something from
6257 those arrays needs to be reloaded, it must be unshared before
6258 being substituted into; the equivalence must not be modified.
6259 Otherwise, if the equivalence is used after that, it will
6260 have been modified, and the thing substituted (probably a
6261 register) is likely overwritten and not a usable equivalence. */
6264 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
6266 #define CHECK_MODF(ARRAY) \
6267 gcc_assert (!VEC_index (reg_equivs_t, reg_equivs, check_regno).ARRAY \
6268 || !loc_mentioned_in_p (r->where, \
6269 VEC_index (reg_equivs_t, reg_equivs, check_regno).ARRAY))
6271 CHECK_MODF (equiv_constant
);
6272 CHECK_MODF (equiv_memory_loc
);
6273 CHECK_MODF (equiv_address
);
6274 CHECK_MODF (equiv_mem
);
6277 #endif /* DEBUG_RELOAD */
6279 /* If we're replacing a LABEL_REF with a register, there must
6280 already be an indication (to e.g. flow) which label this
6281 register refers to. */
6282 gcc_assert (GET_CODE (*r
->where
) != LABEL_REF
6284 || find_reg_note (insn
,
6286 XEXP (*r
->where
, 0))
6287 || label_is_jump_target_p (XEXP (*r
->where
, 0), insn
));
6289 /* Encapsulate RELOADREG so its machine mode matches what
6290 used to be there. Note that gen_lowpart_common will
6291 do the wrong thing if RELOADREG is multi-word. RELOADREG
6292 will always be a REG here. */
6293 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6294 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6296 *r
->where
= reloadreg
;
6298 /* If reload got no reg and isn't optional, something's wrong. */
6300 gcc_assert (rld
[r
->what
].optional
);
6304 /* Make a copy of any replacements being done into X and move those
6305 copies to locations in Y, a copy of X. */
6308 copy_replacements (rtx x
, rtx y
)
6310 copy_replacements_1 (&x
, &y
, n_replacements
);
6314 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6318 struct replacement
*r
;
6322 for (j
= 0; j
< orig_replacements
; j
++)
6323 if (replacements
[j
].where
== px
)
6325 r
= &replacements
[n_replacements
++];
6327 r
->what
= replacements
[j
].what
;
6328 r
->mode
= replacements
[j
].mode
;
6333 code
= GET_CODE (x
);
6334 fmt
= GET_RTX_FORMAT (code
);
6336 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6339 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6340 else if (fmt
[i
] == 'E')
6341 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6342 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6347 /* Change any replacements being done to *X to be done to *Y. */
6350 move_replacements (rtx
*x
, rtx
*y
)
6354 for (i
= 0; i
< n_replacements
; i
++)
6355 if (replacements
[i
].where
== x
)
6356 replacements
[i
].where
= y
;
6359 /* If LOC was scheduled to be replaced by something, return the replacement.
6360 Otherwise, return *LOC. */
6363 find_replacement (rtx
*loc
)
6365 struct replacement
*r
;
6367 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6369 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6371 if (reloadreg
&& r
->where
== loc
)
6373 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6374 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6378 else if (reloadreg
&& GET_CODE (*loc
) == SUBREG
6379 && r
->where
== &SUBREG_REG (*loc
))
6381 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6382 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6384 return simplify_gen_subreg (GET_MODE (*loc
), reloadreg
,
6385 GET_MODE (SUBREG_REG (*loc
)),
6386 SUBREG_BYTE (*loc
));
6390 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6391 what's inside and make a new rtl if so. */
6392 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6393 || GET_CODE (*loc
) == MULT
)
6395 rtx x
= find_replacement (&XEXP (*loc
, 0));
6396 rtx y
= find_replacement (&XEXP (*loc
, 1));
6398 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6399 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6405 /* Return nonzero if register in range [REGNO, ENDREGNO)
6406 appears either explicitly or implicitly in X
6407 other than being stored into (except for earlyclobber operands).
6409 References contained within the substructure at LOC do not count.
6410 LOC may be zero, meaning don't ignore anything.
6412 This is similar to refers_to_regno_p in rtlanal.c except that we
6413 look at equivalences for pseudos that didn't get hard registers. */
6416 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6428 code
= GET_CODE (x
);
6435 /* If this is a pseudo, a hard register must not have been allocated.
6436 X must therefore either be a constant or be in memory. */
6437 if (r
>= FIRST_PSEUDO_REGISTER
)
6439 if (reg_equiv_memory_loc (r
))
6440 return refers_to_regno_for_reload_p (regno
, endregno
,
6441 reg_equiv_memory_loc (r
),
6444 gcc_assert (reg_equiv_constant (r
) || reg_equiv_invariant (r
));
6448 return (endregno
> r
6449 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6450 ? hard_regno_nregs
[r
][GET_MODE (x
)]
6454 /* If this is a SUBREG of a hard reg, we can see exactly which
6455 registers are being modified. Otherwise, handle normally. */
6456 if (REG_P (SUBREG_REG (x
))
6457 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6459 unsigned int inner_regno
= subreg_regno (x
);
6460 unsigned int inner_endregno
6461 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6462 ? subreg_nregs (x
) : 1);
6464 return endregno
> inner_regno
&& regno
< inner_endregno
;
6470 if (&SET_DEST (x
) != loc
6471 /* Note setting a SUBREG counts as referring to the REG it is in for
6472 a pseudo but not for hard registers since we can
6473 treat each word individually. */
6474 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6475 && loc
!= &SUBREG_REG (SET_DEST (x
))
6476 && REG_P (SUBREG_REG (SET_DEST (x
)))
6477 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6478 && refers_to_regno_for_reload_p (regno
, endregno
,
6479 SUBREG_REG (SET_DEST (x
)),
6481 /* If the output is an earlyclobber operand, this is
6483 || ((!REG_P (SET_DEST (x
))
6484 || earlyclobber_operand_p (SET_DEST (x
)))
6485 && refers_to_regno_for_reload_p (regno
, endregno
,
6486 SET_DEST (x
), loc
))))
6489 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6498 /* X does not match, so try its subexpressions. */
6500 fmt
= GET_RTX_FORMAT (code
);
6501 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6503 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6511 if (refers_to_regno_for_reload_p (regno
, endregno
,
6515 else if (fmt
[i
] == 'E')
6518 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6519 if (loc
!= &XVECEXP (x
, i
, j
)
6520 && refers_to_regno_for_reload_p (regno
, endregno
,
6521 XVECEXP (x
, i
, j
), loc
))
6528 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6529 we check if any register number in X conflicts with the relevant register
6530 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6531 contains a MEM (we don't bother checking for memory addresses that can't
6532 conflict because we expect this to be a rare case.
6534 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6535 that we look at equivalences for pseudos that didn't get hard registers. */
6538 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6540 int regno
, endregno
;
6542 /* Overly conservative. */
6543 if (GET_CODE (x
) == STRICT_LOW_PART
6544 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6547 /* If either argument is a constant, then modifying X can not affect IN. */
6548 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6550 else if (GET_CODE (x
) == SUBREG
&& MEM_P (SUBREG_REG (x
)))
6551 return refers_to_mem_for_reload_p (in
);
6552 else if (GET_CODE (x
) == SUBREG
)
6554 regno
= REGNO (SUBREG_REG (x
));
6555 if (regno
< FIRST_PSEUDO_REGISTER
)
6556 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6557 GET_MODE (SUBREG_REG (x
)),
6560 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6561 ? subreg_nregs (x
) : 1);
6563 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6569 /* If this is a pseudo, it must not have been assigned a hard register.
6570 Therefore, it must either be in memory or be a constant. */
6572 if (regno
>= FIRST_PSEUDO_REGISTER
)
6574 if (reg_equiv_memory_loc (regno
))
6575 return refers_to_mem_for_reload_p (in
);
6576 gcc_assert (reg_equiv_constant (regno
));
6580 endregno
= END_HARD_REGNO (x
);
6582 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6585 return refers_to_mem_for_reload_p (in
);
6586 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6587 || GET_CODE (x
) == CC0
)
6588 return reg_mentioned_p (x
, in
);
6591 gcc_assert (GET_CODE (x
) == PLUS
);
6593 /* We actually want to know if X is mentioned somewhere inside IN.
6594 We must not say that (plus (sp) (const_int 124)) is in
6595 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6596 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6597 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6602 else if (GET_CODE (in
) == PLUS
)
6603 return (rtx_equal_p (x
, in
)
6604 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6605 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6606 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6607 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6613 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6617 refers_to_mem_for_reload_p (rtx x
)
6626 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6627 && reg_equiv_memory_loc (REGNO (x
)));
6629 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6630 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6632 && (MEM_P (XEXP (x
, i
))
6633 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6639 /* Check the insns before INSN to see if there is a suitable register
6640 containing the same value as GOAL.
6641 If OTHER is -1, look for a register in class RCLASS.
6642 Otherwise, just see if register number OTHER shares GOAL's value.
6644 Return an rtx for the register found, or zero if none is found.
6646 If RELOAD_REG_P is (short *)1,
6647 we reject any hard reg that appears in reload_reg_rtx
6648 because such a hard reg is also needed coming into this insn.
6650 If RELOAD_REG_P is any other nonzero value,
6651 it is a vector indexed by hard reg number
6652 and we reject any hard reg whose element in the vector is nonnegative
6653 as well as any that appears in reload_reg_rtx.
6655 If GOAL is zero, then GOALREG is a register number; we look
6656 for an equivalent for that register.
6658 MODE is the machine mode of the value we want an equivalence for.
6659 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6661 This function is used by jump.c as well as in the reload pass.
6663 If GOAL is the sum of the stack pointer and a constant, we treat it
6664 as if it were a constant except that sp is required to be unchanging. */
6667 find_equiv_reg (rtx goal
, rtx insn
, enum reg_class rclass
, int other
,
6668 short *reload_reg_p
, int goalreg
, enum machine_mode mode
)
6671 rtx goaltry
, valtry
, value
, where
;
6677 int goal_mem_addr_varies
= 0;
6678 int need_stable_sp
= 0;
6685 else if (REG_P (goal
))
6686 regno
= REGNO (goal
);
6687 else if (MEM_P (goal
))
6689 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6690 if (MEM_VOLATILE_P (goal
))
6692 if (flag_float_store
&& SCALAR_FLOAT_MODE_P (GET_MODE (goal
)))
6694 /* An address with side effects must be reexecuted. */
6709 else if (CONSTANT_P (goal
))
6711 else if (GET_CODE (goal
) == PLUS
6712 && XEXP (goal
, 0) == stack_pointer_rtx
6713 && CONSTANT_P (XEXP (goal
, 1)))
6714 goal_const
= need_stable_sp
= 1;
6715 else if (GET_CODE (goal
) == PLUS
6716 && XEXP (goal
, 0) == frame_pointer_rtx
6717 && CONSTANT_P (XEXP (goal
, 1)))
6723 /* Scan insns back from INSN, looking for one that copies
6724 a value into or out of GOAL.
6725 Stop and give up if we reach a label. */
6730 if (p
&& DEBUG_INSN_P (p
))
6733 if (p
== 0 || LABEL_P (p
)
6734 || num
> PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS
))
6737 /* Don't reuse register contents from before a setjmp-type
6738 function call; on the second return (from the longjmp) it
6739 might have been clobbered by a later reuse. It doesn't
6740 seem worthwhile to actually go and see if it is actually
6741 reused even if that information would be readily available;
6742 just don't reuse it across the setjmp call. */
6743 if (CALL_P (p
) && find_reg_note (p
, REG_SETJMP
, NULL_RTX
))
6746 if (NONJUMP_INSN_P (p
)
6747 /* If we don't want spill regs ... */
6748 && (! (reload_reg_p
!= 0
6749 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6750 /* ... then ignore insns introduced by reload; they aren't
6751 useful and can cause results in reload_as_needed to be
6752 different from what they were when calculating the need for
6753 spills. If we notice an input-reload insn here, we will
6754 reject it below, but it might hide a usable equivalent.
6755 That makes bad code. It may even fail: perhaps no reg was
6756 spilled for this insn because it was assumed we would find
6758 || INSN_UID (p
) < reload_first_uid
))
6761 pat
= single_set (p
);
6763 /* First check for something that sets some reg equal to GOAL. */
6766 && true_regnum (SET_SRC (pat
)) == regno
6767 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6770 && true_regnum (SET_DEST (pat
)) == regno
6771 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6773 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6774 /* When looking for stack pointer + const,
6775 make sure we don't use a stack adjust. */
6776 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6777 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6779 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6780 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6782 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6783 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6784 /* If we are looking for a constant,
6785 and something equivalent to that constant was copied
6786 into a reg, we can use that reg. */
6787 || (goal_const
&& REG_NOTES (p
) != 0
6788 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6789 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6791 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6792 || (REG_P (SET_DEST (pat
))
6793 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6794 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6795 && CONST_INT_P (goal
)
6797 = operand_subword (XEXP (tem
, 0), 0, 0,
6799 && rtx_equal_p (goal
, goaltry
)
6801 = operand_subword (SET_DEST (pat
), 0, 0,
6803 && (valueno
= true_regnum (valtry
)) >= 0)))
6804 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6806 && REG_P (SET_DEST (pat
))
6807 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6808 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6809 && CONST_INT_P (goal
)
6810 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6812 && rtx_equal_p (goal
, goaltry
)
6814 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6815 && (valueno
= true_regnum (valtry
)) >= 0)))
6819 if (valueno
!= other
)
6822 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6824 else if (!in_hard_reg_set_p (reg_class_contents
[(int) rclass
],
6834 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6835 (or copying VALUE into GOAL, if GOAL is also a register).
6836 Now verify that VALUE is really valid. */
6838 /* VALUENO is the register number of VALUE; a hard register. */
6840 /* Don't try to re-use something that is killed in this insn. We want
6841 to be able to trust REG_UNUSED notes. */
6842 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6845 /* If we propose to get the value from the stack pointer or if GOAL is
6846 a MEM based on the stack pointer, we need a stable SP. */
6847 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6848 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6852 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6853 if (GET_MODE (value
) != mode
)
6856 /* Reject VALUE if it was loaded from GOAL
6857 and is also a register that appears in the address of GOAL. */
6859 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6860 && refers_to_regno_for_reload_p (valueno
, end_hard_regno (mode
, valueno
),
6864 /* Reject registers that overlap GOAL. */
6866 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6867 nregs
= hard_regno_nregs
[regno
][mode
];
6870 valuenregs
= hard_regno_nregs
[valueno
][mode
];
6872 if (!goal_mem
&& !goal_const
6873 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6876 /* Reject VALUE if it is one of the regs reserved for reloads.
6877 Reload1 knows how to reuse them anyway, and it would get
6878 confused if we allocated one without its knowledge.
6879 (Now that insns introduced by reload are ignored above,
6880 this case shouldn't happen, but I'm not positive.) */
6882 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6885 for (i
= 0; i
< valuenregs
; ++i
)
6886 if (reload_reg_p
[valueno
+ i
] >= 0)
6890 /* Reject VALUE if it is a register being used for an input reload
6891 even if it is not one of those reserved. */
6893 if (reload_reg_p
!= 0)
6896 for (i
= 0; i
< n_reloads
; i
++)
6897 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6899 int regno1
= REGNO (rld
[i
].reg_rtx
);
6900 int nregs1
= hard_regno_nregs
[regno1
]
6901 [GET_MODE (rld
[i
].reg_rtx
)];
6902 if (regno1
< valueno
+ valuenregs
6903 && regno1
+ nregs1
> valueno
)
6909 /* We must treat frame pointer as varying here,
6910 since it can vary--in a nonlocal goto as generated by expand_goto. */
6911 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6913 /* Now verify that the values of GOAL and VALUE remain unaltered
6914 until INSN is reached. */
6923 /* Don't trust the conversion past a function call
6924 if either of the two is in a call-clobbered register, or memory. */
6929 if (goal_mem
|| need_stable_sp
)
6932 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6933 for (i
= 0; i
< nregs
; ++i
)
6934 if (call_used_regs
[regno
+ i
]
6935 || HARD_REGNO_CALL_PART_CLOBBERED (regno
+ i
, mode
))
6938 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6939 for (i
= 0; i
< valuenregs
; ++i
)
6940 if (call_used_regs
[valueno
+ i
]
6941 || HARD_REGNO_CALL_PART_CLOBBERED (valueno
+ i
, mode
))
6949 /* Watch out for unspec_volatile, and volatile asms. */
6950 if (volatile_insn_p (pat
))
6953 /* If this insn P stores in either GOAL or VALUE, return 0.
6954 If GOAL is a memory ref and this insn writes memory, return 0.
6955 If GOAL is a memory ref and its address is not constant,
6956 and this insn P changes a register used in GOAL, return 0. */
6958 if (GET_CODE (pat
) == COND_EXEC
)
6959 pat
= COND_EXEC_CODE (pat
);
6960 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6962 rtx dest
= SET_DEST (pat
);
6963 while (GET_CODE (dest
) == SUBREG
6964 || GET_CODE (dest
) == ZERO_EXTRACT
6965 || GET_CODE (dest
) == STRICT_LOW_PART
)
6966 dest
= XEXP (dest
, 0);
6969 int xregno
= REGNO (dest
);
6971 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6972 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6975 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6977 if (xregno
< valueno
+ valuenregs
6978 && xregno
+ xnregs
> valueno
)
6980 if (goal_mem_addr_varies
6981 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6983 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6986 else if (goal_mem
&& MEM_P (dest
)
6987 && ! push_operand (dest
, GET_MODE (dest
)))
6989 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
6990 && reg_equiv_memory_loc (regno
) != 0)
6992 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6995 else if (GET_CODE (pat
) == PARALLEL
)
6998 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
7000 rtx v1
= XVECEXP (pat
, 0, i
);
7001 if (GET_CODE (v1
) == COND_EXEC
)
7002 v1
= COND_EXEC_CODE (v1
);
7003 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
7005 rtx dest
= SET_DEST (v1
);
7006 while (GET_CODE (dest
) == SUBREG
7007 || GET_CODE (dest
) == ZERO_EXTRACT
7008 || GET_CODE (dest
) == STRICT_LOW_PART
)
7009 dest
= XEXP (dest
, 0);
7012 int xregno
= REGNO (dest
);
7014 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
7015 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7018 if (xregno
< regno
+ nregs
7019 && xregno
+ xnregs
> regno
)
7021 if (xregno
< valueno
+ valuenregs
7022 && xregno
+ xnregs
> valueno
)
7024 if (goal_mem_addr_varies
7025 && reg_overlap_mentioned_for_reload_p (dest
,
7028 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7031 else if (goal_mem
&& MEM_P (dest
)
7032 && ! push_operand (dest
, GET_MODE (dest
)))
7034 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7035 && reg_equiv_memory_loc (regno
) != 0)
7037 else if (need_stable_sp
7038 && push_operand (dest
, GET_MODE (dest
)))
7044 if (CALL_P (p
) && CALL_INSN_FUNCTION_USAGE (p
))
7048 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
7049 link
= XEXP (link
, 1))
7051 pat
= XEXP (link
, 0);
7052 if (GET_CODE (pat
) == CLOBBER
)
7054 rtx dest
= SET_DEST (pat
);
7058 int xregno
= REGNO (dest
);
7060 = hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7062 if (xregno
< regno
+ nregs
7063 && xregno
+ xnregs
> regno
)
7065 else if (xregno
< valueno
+ valuenregs
7066 && xregno
+ xnregs
> valueno
)
7068 else if (goal_mem_addr_varies
7069 && reg_overlap_mentioned_for_reload_p (dest
,
7074 else if (goal_mem
&& MEM_P (dest
)
7075 && ! push_operand (dest
, GET_MODE (dest
)))
7077 else if (need_stable_sp
7078 && push_operand (dest
, GET_MODE (dest
)))
7085 /* If this insn auto-increments or auto-decrements
7086 either regno or valueno, return 0 now.
7087 If GOAL is a memory ref and its address is not constant,
7088 and this insn P increments a register used in GOAL, return 0. */
7092 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
7093 if (REG_NOTE_KIND (link
) == REG_INC
7094 && REG_P (XEXP (link
, 0)))
7096 int incno
= REGNO (XEXP (link
, 0));
7097 if (incno
< regno
+ nregs
&& incno
>= regno
)
7099 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
7101 if (goal_mem_addr_varies
7102 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
7112 /* Find a place where INCED appears in an increment or decrement operator
7113 within X, and return the amount INCED is incremented or decremented by.
7114 The value is always positive. */
7117 find_inc_amount (rtx x
, rtx inced
)
7119 enum rtx_code code
= GET_CODE (x
);
7125 rtx addr
= XEXP (x
, 0);
7126 if ((GET_CODE (addr
) == PRE_DEC
7127 || GET_CODE (addr
) == POST_DEC
7128 || GET_CODE (addr
) == PRE_INC
7129 || GET_CODE (addr
) == POST_INC
)
7130 && XEXP (addr
, 0) == inced
)
7131 return GET_MODE_SIZE (GET_MODE (x
));
7132 else if ((GET_CODE (addr
) == PRE_MODIFY
7133 || GET_CODE (addr
) == POST_MODIFY
)
7134 && GET_CODE (XEXP (addr
, 1)) == PLUS
7135 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
7136 && XEXP (addr
, 0) == inced
7137 && CONST_INT_P (XEXP (XEXP (addr
, 1), 1)))
7139 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
7140 return i
< 0 ? -i
: i
;
7144 fmt
= GET_RTX_FORMAT (code
);
7145 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7149 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
7156 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7158 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
7168 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7169 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7173 reg_inc_found_and_valid_p (unsigned int regno
, unsigned int endregno
,
7180 if (! INSN_P (insn
))
7183 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
7184 if (REG_NOTE_KIND (link
) == REG_INC
)
7186 unsigned int test
= (int) REGNO (XEXP (link
, 0));
7187 if (test
>= regno
&& test
< endregno
)
7194 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7198 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7199 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7200 REG_INC. REGNO must refer to a hard register. */
7203 regno_clobbered_p (unsigned int regno
, rtx insn
, enum machine_mode mode
,
7206 unsigned int nregs
, endregno
;
7208 /* regno must be a hard register. */
7209 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
7211 nregs
= hard_regno_nregs
[regno
][mode
];
7212 endregno
= regno
+ nregs
;
7214 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
7215 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7216 && REG_P (XEXP (PATTERN (insn
), 0)))
7218 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
7220 return test
>= regno
&& test
< endregno
;
7223 if (sets
== 2 && reg_inc_found_and_valid_p (regno
, endregno
, insn
))
7226 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7228 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
7232 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7233 if ((GET_CODE (elt
) == CLOBBER
7234 || (sets
== 1 && GET_CODE (elt
) == SET
))
7235 && REG_P (XEXP (elt
, 0)))
7237 unsigned int test
= REGNO (XEXP (elt
, 0));
7239 if (test
>= regno
&& test
< endregno
)
7243 && reg_inc_found_and_valid_p (regno
, endregno
, elt
))
7251 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7253 reload_adjust_reg_for_mode (rtx reloadreg
, enum machine_mode mode
)
7257 if (GET_MODE (reloadreg
) == mode
)
7260 regno
= REGNO (reloadreg
);
7262 if (REG_WORDS_BIG_ENDIAN
)
7263 regno
+= (int) hard_regno_nregs
[regno
][GET_MODE (reloadreg
)]
7264 - (int) hard_regno_nregs
[regno
][mode
];
7266 return gen_rtx_REG (mode
, regno
);
7269 static const char *const reload_when_needed_name
[] =
7272 "RELOAD_FOR_OUTPUT",
7274 "RELOAD_FOR_INPUT_ADDRESS",
7275 "RELOAD_FOR_INPADDR_ADDRESS",
7276 "RELOAD_FOR_OUTPUT_ADDRESS",
7277 "RELOAD_FOR_OUTADDR_ADDRESS",
7278 "RELOAD_FOR_OPERAND_ADDRESS",
7279 "RELOAD_FOR_OPADDR_ADDR",
7281 "RELOAD_FOR_OTHER_ADDRESS"
7284 /* These functions are used to print the variables set by 'find_reloads' */
7287 debug_reload_to_stream (FILE *f
)
7294 for (r
= 0; r
< n_reloads
; r
++)
7296 fprintf (f
, "Reload %d: ", r
);
7300 fprintf (f
, "reload_in (%s) = ",
7301 GET_MODE_NAME (rld
[r
].inmode
));
7302 print_inline_rtx (f
, rld
[r
].in
, 24);
7303 fprintf (f
, "\n\t");
7306 if (rld
[r
].out
!= 0)
7308 fprintf (f
, "reload_out (%s) = ",
7309 GET_MODE_NAME (rld
[r
].outmode
));
7310 print_inline_rtx (f
, rld
[r
].out
, 24);
7311 fprintf (f
, "\n\t");
7314 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].rclass
]);
7316 fprintf (f
, "%s (opnum = %d)",
7317 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7320 if (rld
[r
].optional
)
7321 fprintf (f
, ", optional");
7323 if (rld
[r
].nongroup
)
7324 fprintf (f
, ", nongroup");
7326 if (rld
[r
].inc
!= 0)
7327 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7329 if (rld
[r
].nocombine
)
7330 fprintf (f
, ", can't combine");
7332 if (rld
[r
].secondary_p
)
7333 fprintf (f
, ", secondary_reload_p");
7335 if (rld
[r
].in_reg
!= 0)
7337 fprintf (f
, "\n\treload_in_reg: ");
7338 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7341 if (rld
[r
].out_reg
!= 0)
7343 fprintf (f
, "\n\treload_out_reg: ");
7344 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7347 if (rld
[r
].reg_rtx
!= 0)
7349 fprintf (f
, "\n\treload_reg_rtx: ");
7350 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7354 if (rld
[r
].secondary_in_reload
!= -1)
7356 fprintf (f
, "%ssecondary_in_reload = %d",
7357 prefix
, rld
[r
].secondary_in_reload
);
7361 if (rld
[r
].secondary_out_reload
!= -1)
7362 fprintf (f
, "%ssecondary_out_reload = %d\n",
7363 prefix
, rld
[r
].secondary_out_reload
);
7366 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7368 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7369 insn_data
[rld
[r
].secondary_in_icode
].name
);
7373 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7374 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7375 insn_data
[rld
[r
].secondary_out_icode
].name
);
7384 debug_reload_to_stream (stderr
);