1 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
4 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
6 2023-08-24 David Malcolm <dmalcolm@redhat.com>
9 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
10 list of functions known to the analyzer.
12 2023-08-24 Richard Biener <rguenther@suse.de>
14 PR tree-optimization/111123
15 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
16 remove indirect clobbers here ...
17 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
18 (remove_indirect_clobbers): New function.
20 2023-08-24 Jan Hubicka <jh@suse.cz>
22 * cfg.h (struct control_flow_graph): New field full_profile.
23 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
24 * cfg.cc (init_flow): Set full_profile to false.
25 * graphite.cc (graphite_transform_loops): Set full_profile to false.
26 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
27 * predict.cc (pass_profile::execute): Set full_profile to true.
28 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
29 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
30 if full_profile is set.
31 * tree-inline.cc (initialize_cfun): Initialize full_profile.
32 (expand_call_inline): Combine full_profile.
34 2023-08-24 Richard Biener <rguenther@suse.de>
36 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
37 load_p to ldst_p, fix mistakes and rely on
40 2023-08-24 Jan Hubicka <jh@suse.cz>
42 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
43 of newly build trap bb.
45 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
47 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
48 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
49 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
51 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
53 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
54 * config/riscv/riscv.cc (riscv_option_override): Set sched
57 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
59 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
61 2023-08-24 Richard Biener <rguenther@suse.de>
63 PR tree-optimization/111125
64 * tree-vect-slp.cc (vect_slp_function): Split at novector
65 loop entry, do not push blocks in novector loops.
67 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
69 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
71 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
73 * genmatch.cc (decision_tree::gen): Support
74 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
75 * gimple-match-exports.cc (gimple_simplify): Ditto.
76 (gimple_resimplify6): New function.
77 (gimple_resimplify7): New function.
78 (gimple_match_op::resimplify): Support
79 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
80 (convert_conditional_op): Ditto.
81 (build_call_internal): Ditto.
82 (try_conditional_simplification): Ditto.
83 (gimple_extract): Ditto.
84 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
85 * internal-fn.cc (CASE): Ditto.
87 2023-08-24 Richard Biener <rguenther@suse.de>
89 PR tree-optimization/111115
90 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
91 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
93 * tree-vect-slp.cc (arg3_arg2_map): New.
94 (vect_get_operand_map): Handle IFN_MASK_STORE.
95 (vect_slp_child_index_for_operand): New function.
96 (vect_build_slp_tree_1): Handle statements with no LHS,
98 (vect_remove_slp_scalar_calls): Likewise.
99 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
100 SLP child corresponding to the ifn value index.
101 (vectorizable_store): Likewise for the mask index. Support
103 (vectorizable_load): Lookup the SLP child corresponding to the
106 2023-08-24 Richard Biener <rguenther@suse.de>
108 PR tree-optimization/111125
109 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
110 for the remain_defs processing.
112 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
114 * config/aarch64/aarch64.cc: Include ssa.h.
115 (aarch64_multiply_add_p): Require the second operand of an
116 Advanced SIMD subtraction to be a multiplication. Assume that
117 such an operation won't be fused if the second operand is used
118 multiple times and if the first operand is also a multiplication.
120 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
122 * tree-vect-loop.cc (vectorizable_reduction): Apply
123 LEN_FOLD_EXTRACT_LAST.
124 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
126 2023-08-24 Richard Biener <rguenther@suse.de>
128 PR tree-optimization/111128
129 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
130 Emit external shift operand inline if we promoted it with
131 another pattern stmt.
133 2023-08-24 Pan Li <pan2.li@intel.com>
135 * config/riscv/autovec.md: Fix typo.
137 2023-08-24 Pan Li <pan2.li@intel.com>
139 * config/riscv/riscv-vector-builtins-bases.cc
140 (class binop_frm): Removed.
141 (class reverse_binop_frm): Ditto.
142 (class widen_binop_frm): Ditto.
143 (class vfmacc_frm): Ditto.
144 (class vfnmacc_frm): Ditto.
145 (class vfmsac_frm): Ditto.
146 (class vfnmsac_frm): Ditto.
147 (class vfmadd_frm): Ditto.
148 (class vfnmadd_frm): Ditto.
149 (class vfmsub_frm): Ditto.
150 (class vfnmsub_frm): Ditto.
151 (class vfwmacc_frm): Ditto.
152 (class vfwnmacc_frm): Ditto.
153 (class vfwmsac_frm): Ditto.
154 (class vfwnmsac_frm): Ditto.
155 (class unop_frm): Ditto.
156 (class vfrec7_frm): Ditto.
157 (class binop): Add frm_op_type template arg.
159 (class widen_binop): Ditto.
160 (class widen_binop_fp): Ditto.
161 (class reverse_binop): Ditto.
162 (class vfmacc): Ditto.
163 (class vfnmsac): Ditto.
164 (class vfmadd): Ditto.
165 (class vfnmsub): Ditto.
166 (class vfnmacc): Ditto.
167 (class vfmsac): Ditto.
168 (class vfnmadd): Ditto.
169 (class vfmsub): Ditto.
170 (class vfwmacc): Ditto.
171 (class vfwnmacc): Ditto.
172 (class vfwmsac): Ditto.
173 (class vfwnmsac): Ditto.
174 (class float_misc): Ditto.
176 2023-08-24 Andrew Pinski <apinski@marvell.com>
178 PR tree-optimization/111109
179 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
180 Add check to make sure cmp and icmp are inverse.
182 2023-08-24 Andrew Pinski <apinski@marvell.com>
184 PR tree-optimization/95929
185 * match.pd (convert?(-a)): New pattern
186 for 1bit integer types.
188 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
191 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
193 * common/config/i386/cpuinfo.h (get_available_features):
194 Add avx10_set and version and detect avx10.1.
195 (cpu_indicator_init): Handle avx10.1-512.
196 * common/config/i386/i386-common.cc
197 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
198 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
199 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
200 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
201 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
202 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
204 * common/config/i386/i386-cpuinfo.h (enum processor_features):
205 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
206 FEATURE_AVX10_512BIT.
207 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
208 AVX10_512BIT, AVX10_1 and AVX10_1_512.
209 * config/i386/constraints.md (Yk): Add AVX10_1.
212 * config/i386/cpuid.h (bit_AVX10): New.
213 (bit_AVX10_256): Ditto.
214 (bit_AVX10_512): Ditto.
215 * config/i386/i386-c.cc (ix86_target_macros_internal):
216 Define AVX10_512BIT and AVX10_1.
217 * config/i386/i386-isa.def
218 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
219 (AVX10_1): Add DEF_PTA(AVX10_1).
220 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
221 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
223 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
224 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
225 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
226 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
227 (ix86_conditional_register_usage): Ditto.
228 (ix86_hard_regno_mode_ok): Ditto.
229 (ix86_rtx_costs): Ditto.
230 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
231 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
233 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
234 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
235 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
238 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
241 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
243 * common/config/i386/i386-common.cc
244 (ix86_check_avx10): New function to check isa_flags and
245 isa_flags_explicit to emit warning when AVX10 is enabled
247 (ix86_check_avx512): New function to check isa_flags and
248 isa_flags_explicit to emit warning when AVX512 is enabled
250 (ix86_handle_option): Do not change the flags when warning
252 * config/i386/driver-i386.cc (host_detect_local_cpu):
253 Do not append -mno-avx10.1 for -march=native.
255 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
258 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
260 * common/config/i386/i386-common.cc
261 (ix86_check_avx10_vector_width): New function to check isa_flags
262 to emit a warning when there is a conflict in AVX10 options for
264 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
265 * config/i386/driver-i386.cc (host_detect_local_cpu):
266 Do not append -mno-avx10-max-512bit for -march=native.
268 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
271 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
273 * config/i386/avx512vldqintrin.h: Remove target attribute.
274 * config/i386/i386-builtin.def (BDESC):
275 Add OPTION_MASK_ISA2_AVX10_1.
276 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
277 * config/i386/i386-expand.cc
278 (ix86_check_builtin_isa_match): Ditto.
279 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
280 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
281 and avx10_1_or_avx512vl.
282 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
283 (VF1_128_256VLDQ_AVX10_1): Ditto.
284 (VI8_AVX512VLDQ_AVX10_1): Ditto.
285 (<sse>_andnot<mode>3<mask_name>):
286 Add TARGET_AVX10_1 and change isa attr from avx512dq to
288 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
289 avx512vl to avx10_1_or_avx512vl.
290 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
291 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
292 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
294 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
296 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
297 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
298 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
300 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
301 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
303 (avx512dq_mul<mode>3<mask_name>): Ditto.
304 (*avx512dq_mul<mode>3<mask_name>): Ditto.
305 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
306 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
308 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
309 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
311 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
312 (mask_avx512vl_condition): Ditto.
315 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
318 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
320 * config/i386/avx512vldqintrin.h: Remove target attribute.
321 * config/i386/i386-builtin.def (BDESC):
322 Add OPTION_MASK_ISA2_AVX10_1.
323 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
324 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
325 (VI48_AVX512VLDQ_AVX10_1): Ditto.
326 (VF2_AVX512VL): Remove.
327 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
329 (*<code><mode>3<mask_name>): Change isa attribute to
330 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
331 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
332 to avx10_1_or_avx512vl.
333 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
334 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
335 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
337 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
338 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
339 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
341 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
342 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
343 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
344 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
345 (float<floatunssuffix>v4div4sf2<mask_name>):
347 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
348 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
349 (float<floatunssuffix>v2div2sf2): Ditto.
350 (float<floatunssuffix>v2div2sf2_mask): Ditto.
351 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
352 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
353 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
354 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
355 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
356 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
357 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
358 Change when constraint is enabled.
360 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
363 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
365 * config/i386/avx512vldqintrin.h: Remove target attribute.
366 * config/i386/i386-builtin.def (BDESC):
367 Add OPTION_MASK_ISA2_AVX10_1.
368 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
369 (VFH_AVX512VLDQ_AVX10_1): Ditto.
370 (VF1_AVX512VLDQ_AVX10_1): Ditto.
371 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
372 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
373 (vec_pack<floatprefix>_float_<mode>): Change iterator to
374 VI8_AVX512VLDQ_AVX10_1. Remove target check.
375 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
376 VF1_AVX512VLDQ_AVX10_1. Remove target check.
377 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
378 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
379 (avx512vl_vextractf128<mode>): Change iterator to
380 VI48F_256_DQVL_AVX10_1. Remove target check.
381 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
382 (vec_extract_hi_<mode>): Ditto.
383 (avx512vl_vinsert<mode>): Ditto.
384 (vec_set_lo_<mode><mask_name>): Ditto.
385 (vec_set_hi_<mode><mask_name>): Ditto.
386 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
387 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
388 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
389 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
390 * config/i386/subst.md (mask_avx512dq_condition): Add
392 (mask_scalar_merge): Ditto.
394 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
397 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
400 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
403 2023-08-24 Richard Biener <rguenther@suse.de>
406 * dwarf2out.cc (prune_unused_types_walk): Handle
407 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
408 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
409 and DW_TAG_dynamic_type as to only output them when referenced.
411 2023-08-24 liuhongt <hongtao.liu@intel.com>
413 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
416 2023-08-24 liuhongt <hongtao.liu@intel.com>
418 * common/config/i386/i386-common.cc (processor_names): Add new
419 member graniterapids-s and arrowlake-s.
420 * config/i386/i386-options.cc (processor_alias_table): Update
421 table with PROCESSOR_ARROWLAKE_S and
422 PROCESSOR_GRANITERAPIDS_D.
423 (m_GRANITERAPID_D): New macro.
424 (m_ARROWLAKE_S): Ditto.
425 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
426 (processor_cost_table): Add icelake_cost for
427 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
428 PROCESSOR_ARROWLAKE_S.
429 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
431 * config/i386/i386.h (enum processor_type): Add new member
432 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
433 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
434 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
436 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
438 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
439 to help simplify code further.
441 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
443 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
444 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
445 Initialize using a range instead of value and edge.
446 (phi_group::calculate_using_modifier): Use initializer value and
447 process for relations after trying for iteration convergence.
448 (phi_group::refine_using_relation): Use initializer range.
449 (phi_group::dump): Rework the dump output.
450 (phi_analyzer::process_phi): Allow multiple constant initilizers.
451 Dump groups immediately as created.
452 (phi_analyzer::dump): Tweak output.
453 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
454 (phi_group::initial_value): Delete.
455 (phi_group::refine_using_relation): Adjust prototype.
456 (phi_group::m_initial_value): Delete.
457 (phi_group::m_initial_edge): Delete.
458 (phi_group::m_vr): Use int_range_max.
459 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
461 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
463 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
464 no group was created.
465 (phi_analyzer::process_phi): Do not create groups of one phi node.
467 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
469 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
470 CODE, CMP_CODE and BIT_CODE arguments.
471 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
472 (aarch64_gen_ccmp_next): Likewise.
473 * doc/tm.texi: Regenerated.
475 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
477 * coretypes.h (rtx_code): Add forward declaration.
478 * rtl.h (rtx_code): Make compatible with forward declaration.
480 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
483 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
484 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
485 DWIH mode iterator. Disable (=&r,m,m) alternative for
487 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
488 alternative for 32-bit targets.
490 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
492 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
493 appropriate type attribute.
495 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
497 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
498 (*copysign<mode>_neg): Ditto.
499 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
500 (<optab><mode>2): Ditto.
501 (cond_<optab><mode>): New.
502 (cond_len_<optab><mode>): Ditto.
503 * config/riscv/riscv-protos.h (enum insn_type): New.
504 (expand_cond_len_unop): New helper func.
505 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
506 (expand_cond_len_unop): New helper func.
508 2023-08-23 Jan Hubicka <jh@suse.cz>
510 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
511 (should_duplicate_loop_header_p): Fix return value for static exits.
512 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
514 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
516 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
517 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
518 and update the final nest accordingly.
520 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
522 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
523 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
524 and update the final nest accordingly.
526 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
528 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
529 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
530 gvec_oprnds with auto_delete_vec.
532 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
534 * config/riscv/riscv-vsetvl.cc
535 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
537 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
539 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
541 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
543 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
545 * config/riscv/vector.md: Add attribute.
547 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
549 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
550 (vector_infos_manager::all_same_ratio_p): Ditto.
551 (vector_infos_manager::all_same_avl_p): Ditto.
552 (pass_vsetvl::refine_vsetvls): Ditto.
553 (pass_vsetvl::cleanup_vsetvls): Ditto.
554 (pass_vsetvl::commit_vsetvls): Ditto.
555 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
556 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
557 (pass_vsetvl::compute_probabilities): Ditto.
559 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
561 * config/riscv/t-riscv: Add riscv-vsetvl.def
563 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
565 * config/riscv/riscv.opt: Add --param names
566 riscv-autovec-preference and riscv-autovec-lmul
568 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
570 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
572 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
574 * tree-core.h (enum omp_clause_defaultmap_kind): Add
575 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
576 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
577 * tree-pretty-print.cc (dump_omp_clause): Likewise.
579 2023-08-22 Jakub Jelinek <jakub@redhat.com>
582 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
583 types aren't supported in C++.
585 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
587 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
588 * internal-fn.cc (fold_len_extract_direct): Ditto.
589 (expand_fold_len_extract_optab_fn): Ditto.
590 (direct_fold_len_extract_optab_supported_p): Ditto.
591 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
592 * optabs.def (OPTAB_D): Ditto.
594 2023-08-22 Richard Biener <rguenther@suse.de>
596 * tree-vect-stmts.cc (vectorizable_store): Do not bump
597 DR_GROUP_STORE_COUNT here. Remove early out.
598 (vect_transform_stmt): Only call vectorizable_store on
599 the last element of an interleaving chain.
601 2023-08-22 Richard Biener <rguenther@suse.de>
603 PR tree-optimization/94864
604 PR tree-optimization/94865
605 PR tree-optimization/93080
606 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
607 for vector insertion from vector extraction.
609 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
610 Kewen.Lin <linkw@linux.ibm.com>
612 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
613 (vectorizable_live_operation): Add live vectorization for length loop
616 2023-08-22 David Malcolm <dmalcolm@redhat.com>
619 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
621 2023-08-22 Pan Li <pan2.li@intel.com>
623 * config/riscv/riscv-vector-builtins-bases.cc
624 (vfwredusum_frm_obj): New declaration.
626 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
627 * config/riscv/riscv-vector-builtins-functions.def
628 (vfwredusum_frm): New intrinsic function def.
630 2023-08-21 David Faust <david.faust@oracle.com>
632 * config/bpf/bpf.md (neg): Second operand must be a register.
634 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
636 * config/riscv/bitmanip.md: Added bitmanip type to insns
637 that are missing types.
639 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
641 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
644 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
646 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
647 Fix format specifier.
649 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
651 * value-range.cc (frange::union_nans): Return false if nothing
653 (range_tests_floats): New test.
655 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
657 PR tree-optimization/111048
658 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
660 (fold_vec_perm_cst): Remove workaround and again call
661 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
662 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
664 2023-08-21 Richard Biener <rguenther@suse.de>
666 PR tree-optimization/111082
667 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
668 pun operations that can overflow.
670 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
672 * lcm.cc (compute_antinout_edge): Export as global use.
673 (compute_earliest): Ditto.
674 (compute_rev_insert_delete): Ditto.
675 * lcm.h (compute_antinout_edge): Ditto.
676 (compute_earliest): Ditto.
678 2023-08-21 Richard Biener <rguenther@suse.de>
680 PR tree-optimization/111070
681 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
682 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
684 2023-08-21 Andrew Pinski <apinski@marvell.com>
686 PR tree-optimization/111002
687 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
689 2023-08-21 liuhongt <hongtao.liu@intel.com>
691 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
693 * common/config/i386/i386-common.cc (alias_table): Support
694 -march=gracemont as an alias of -march=alderlake.
696 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
698 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
699 instead of src in the call to ix86_expand_sse_cmp.
700 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
701 force operands[1] to a register.
702 (<any_extend:insn>v4hiv4si2): Ditto.
703 (<any_extend:insn>v2siv2di2): Ditto.
705 2023-08-20 Andrew Pinski <apinski@marvell.com>
707 PR tree-optimization/111006
708 PR tree-optimization/110986
709 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
711 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
714 * Makefile.in: improve error message when /usr/include is
717 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
720 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
721 to expand_omp_build_cond for 'factor != 0' condition, resulting
722 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
724 2023-08-19 Guo Jie <guojie@loongson.cn>
725 Lulu Cheng <chenglulu@loongson.cn>
727 * config/loongarch/t-loongarch: Add loongarch-driver.h into
728 TM_H. Add loongarch-def.h and loongarch-tune.h into
731 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
734 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
735 Also handle V2QImode.
736 (ix86_expand_sse_extend): New function.
737 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
738 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
739 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
740 (<any_extend:insn>v2hiv2si2): Ditto.
741 (<any_extend:insn>v2qiv2hi2): Ditto.
742 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
743 (<any_extend:insn>v4hiv4si2): Ditto.
744 (<any_extend:insn>v2siv2di2): Ditto.
746 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
749 * value-range.cc (irange::union_bitmask): Return FALSE if updated
750 bitmask is semantically equivalent to the original mask.
751 (irange::intersect_bitmask): Same.
752 (irange::get_bitmask): Add comment.
754 2023-08-18 Richard Biener <rguenther@suse.de>
756 PR tree-optimization/111019
757 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
758 also scrap base and offset in case the ref is indirect.
760 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
762 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
764 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
767 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
769 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
771 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
773 (vectorizable_store): ... here.
775 2023-08-18 Richard Biener <rguenther@suse.de>
777 PR tree-optimization/111048
778 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
781 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
784 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
787 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
789 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
790 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
791 and update the final nest accordingly.
793 2023-08-18 Andrew Pinski <apinski@marvell.com>
795 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
796 cond_len_neg and cond_len_one_cmpl.
798 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
800 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
801 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
802 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
803 (*local_pic_load_32d<ANYF:mode>): Ditto.
804 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
805 (*local_pic_store<ANYF:mode>): Ditto.
806 (*local_pic_store<ANYLSF:mode>): Ditto.
807 (*local_pic_store_32d<ANYF:mode>): Ditto.
808 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
810 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
811 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
813 * config/riscv/predicates.md (vector_const_0_operand): New.
814 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
816 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
818 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
821 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
823 PR tree-optimization/111009
824 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
826 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
828 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
829 slots_num initialization from here ...
830 (lra_spill): ... to here before the 1st call of
831 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
834 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
837 * doc/invoke.texi (Option Summary): Mention
838 -Wcompare-distinct-pointer-types under `Warning Options'.
839 (Warning Options): Document -Wcompare-distinct-pointer-types.
841 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
843 * recog.cc (memory_address_addr_space_p): Mark possibly unused
846 2023-08-17 Richard Biener <rguenther@suse.de>
848 PR tree-optimization/111039
849 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
850 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
852 2023-08-17 Alex Coplan <alex.coplan@arm.com>
854 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
856 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
859 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
860 `naked' function attribute.
861 (bpf_warn_func_return): New function.
862 (TARGET_WARN_FUNC_RETURN): Define.
863 (bpf_expand_prologue): Add preventive comment.
864 (bpf_expand_epilogue): Likewise.
865 * doc/extend.texi (BPF Function Attributes): Document the `naked'
868 2023-08-17 Richard Biener <rguenther@suse.de>
870 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
871 !needs_fold_left_reduction_p to decide whether we can
872 handle the reduction with association.
873 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
874 reductions perform all arithmetic in an unsigned type.
876 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
878 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
880 * configure: Regenerate.
882 2023-08-17 Pan Li <pan2.li@intel.com>
884 * config/riscv/riscv-vector-builtins-bases.cc
885 (widen_freducop): Add frm_opt_type template arg.
886 (vfwredosum_frm_obj): New declaration.
888 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
889 * config/riscv/riscv-vector-builtins-functions.def
890 (vfwredosum_frm): New intrinsic function def.
892 2023-08-17 Pan Li <pan2.li@intel.com>
894 * config/riscv/riscv-vector-builtins-bases.cc
895 (vfredosum_frm_obj): New declaration.
897 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
898 * config/riscv/riscv-vector-builtins-functions.def
899 (vfredosum_frm): New intrinsic function def.
901 2023-08-17 Pan Li <pan2.li@intel.com>
903 * config/riscv/riscv-vector-builtins-bases.cc
904 (class freducop): Add frm_op_type template arg.
905 (vfredusum_frm_obj): New declaration.
907 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
908 * config/riscv/riscv-vector-builtins-functions.def
909 (vfredusum_frm): New intrinsic function def.
910 * config/riscv/riscv-vector-builtins-shapes.cc
911 (struct reduc_alu_frm_def): New class for frm shape.
912 (SHAPE): New declaration.
913 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
915 2023-08-17 Pan Li <pan2.li@intel.com>
917 * config/riscv/riscv-vector-builtins-bases.cc
918 (class vfncvt_f): Add frm_op_type template arg.
919 (vfncvt_f_frm_obj): New declaration.
921 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
922 * config/riscv/riscv-vector-builtins-functions.def
923 (vfncvt_f_frm): New intrinsic function def.
925 2023-08-17 Pan Li <pan2.li@intel.com>
927 * config/riscv/riscv-vector-builtins-bases.cc
928 (vfncvt_xu_frm_obj): New declaration.
930 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
931 * config/riscv/riscv-vector-builtins-functions.def
932 (vfncvt_xu_frm): New intrinsic function def.
934 2023-08-17 Pan Li <pan2.li@intel.com>
936 * config/riscv/riscv-vector-builtins-bases.cc
937 (class vfncvt_x): Add frm_op_type template arg.
938 (BASE): New declaration.
939 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
940 * config/riscv/riscv-vector-builtins-functions.def
941 (vfncvt_x_frm): New intrinsic function def.
942 * config/riscv/riscv-vector-builtins-shapes.cc
943 (struct narrow_alu_frm_def): New shape function for frm.
944 (SHAPE): New declaration.
945 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
947 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
949 * config/i386/avx512vldqintrin.h: Remove target attribute.
950 * config/i386/i386-builtin.def (BDESC):
951 Add OPTION_MASK_ISA2_AVX10_1.
952 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
953 (VFH_AVX512VLDQ_AVX10_1): Ditto.
954 (VF1_AVX512VLDQ_AVX10_1): Ditto.
955 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
956 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
957 (vec_pack<floatprefix>_float_<mode>): Change iterator to
958 VI8_AVX512VLDQ_AVX10_1. Remove target check.
959 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
960 VF1_AVX512VLDQ_AVX10_1. Remove target check.
961 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
962 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
963 (avx512vl_vextractf128<mode>): Change iterator to
964 VI48F_256_DQVL_AVX10_1. Remove target check.
965 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
966 (vec_extract_hi_<mode>): Ditto.
967 (avx512vl_vinsert<mode>): Ditto.
968 (vec_set_lo_<mode><mask_name>): Ditto.
969 (vec_set_hi_<mode><mask_name>): Ditto.
970 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
971 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
972 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
973 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
974 * config/i386/subst.md (mask_avx512dq_condition): Add
976 (mask_scalar_merge): Ditto.
978 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
980 * config/i386/avx512vldqintrin.h: Remove target attribute.
981 * config/i386/i386-builtin.def (BDESC):
982 Add OPTION_MASK_ISA2_AVX10_1.
983 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
984 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
985 (VI48_AVX512VLDQ_AVX10_1): Ditto.
986 (VF2_AVX512VL): Remove.
987 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
989 (*<code><mode>3<mask_name>): Change isa attribute to
990 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
991 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
992 to avx10_1_or_avx512vl.
993 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
994 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
995 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
997 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
998 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
999 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
1001 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
1002 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
1003 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
1004 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
1005 (float<floatunssuffix>v4div4sf2<mask_name>):
1007 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
1008 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
1009 (float<floatunssuffix>v2div2sf2): Ditto.
1010 (float<floatunssuffix>v2div2sf2_mask): Ditto.
1011 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
1012 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
1013 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
1014 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
1015 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
1016 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
1017 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
1018 Change when constraint is enabled.
1020 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1023 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
1024 (second_sew_less_than_first_sew_p): Fix bug.
1025 (first_sew_less_than_second_sew_p): Ditto.
1027 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
1029 * config/i386/avx512vldqintrin.h: Remove target attribute.
1030 * config/i386/i386-builtin.def (BDESC):
1031 Add OPTION_MASK_ISA2_AVX10_1.
1032 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
1033 * config/i386/i386-expand.cc
1034 (ix86_check_builtin_isa_match): Ditto.
1035 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
1036 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
1037 and avx10_1_or_avx512vl.
1038 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
1039 (VF1_128_256VLDQ_AVX10_1): Ditto.
1040 (VI8_AVX512VLDQ_AVX10_1): Ditto.
1041 (<sse>_andnot<mode>3<mask_name>):
1042 Add TARGET_AVX10_1 and change isa attr from avx512dq to
1043 avx10_1_or_avx512dq.
1044 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
1045 avx512vl to avx10_1_or_avx512vl.
1046 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
1047 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
1048 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
1050 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
1052 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
1053 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
1054 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
1056 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
1057 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
1058 Remove target check.
1059 (avx512dq_mul<mode>3<mask_name>): Ditto.
1060 (*avx512dq_mul<mode>3<mask_name>): Ditto.
1061 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
1062 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
1063 Remove target check.
1064 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
1065 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
1066 Remove target check.
1067 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
1068 (mask_avx512vl_condition): Ditto.
1071 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
1073 * common/config/i386/i386-common.cc
1074 (ix86_check_avx10_vector_width): New function to check isa_flags
1075 to emit a warning when there is a conflict in AVX10 options for
1077 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
1078 * config/i386/driver-i386.cc (host_detect_local_cpu):
1079 Do not append -mno-avx10-max-512bit for -march=native.
1081 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
1083 * common/config/i386/i386-common.cc
1084 (ix86_check_avx10): New function to check isa_flags and
1085 isa_flags_explicit to emit warning when AVX10 is enabled
1087 (ix86_check_avx512): New function to check isa_flags and
1088 isa_flags_explicit to emit warning when AVX512 is enabled
1090 (ix86_handle_option): Do not change the flags when warning
1092 * config/i386/driver-i386.cc (host_detect_local_cpu):
1093 Do not append -mno-avx10.1 for -march=native.
1095 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
1097 * common/config/i386/cpuinfo.h (get_available_features):
1098 Add avx10_set and version and detect avx10.1.
1099 (cpu_indicator_init): Handle avx10.1-512.
1100 * common/config/i386/i386-common.cc
1101 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
1102 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
1103 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
1104 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
1105 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
1106 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
1108 * common/config/i386/i386-cpuinfo.h (enum processor_features):
1109 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
1110 FEATURE_AVX10_512BIT.
1111 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
1112 AVX10_512BIT, AVX10_1 and AVX10_1_512.
1113 * config/i386/constraints.md (Yk): Add AVX10_1.
1116 * config/i386/cpuid.h (bit_AVX10): New.
1117 (bit_AVX10_256): Ditto.
1118 (bit_AVX10_512): Ditto.
1119 * config/i386/i386-c.cc (ix86_target_macros_internal):
1120 Define AVX10_512BIT and AVX10_1.
1121 * config/i386/i386-isa.def
1122 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
1123 (AVX10_1): Add DEF_PTA(AVX10_1).
1124 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
1125 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
1127 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
1128 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
1129 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
1130 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
1131 (ix86_conditional_register_usage): Ditto.
1132 (ix86_hard_regno_mode_ok): Ditto.
1133 (ix86_rtx_costs): Ditto.
1134 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
1135 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
1137 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
1138 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
1139 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
1142 2023-08-17 Sergei Trofimovich <siarheit@google.com>
1144 * flag-types.h (vrp_mode): Remove unused.
1146 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
1148 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
1151 2023-08-17 Andrew Pinski <apinski@marvell.com>
1153 * internal-fn.def (COND_NOT): New internal function.
1154 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
1156 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
1157 into conditional not.
1158 * optabs.def (cond_one_cmpl): New optab.
1159 (cond_len_one_cmpl): Likewise.
1161 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
1163 PR rtl-optimization/110254
1164 * ira-color.cc (improve_allocation): Update array
1165 allocated_hard_reg_p.
1167 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
1169 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
1170 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
1171 (lra_update_fp2sp_elimination): Ditto.
1172 (update_reg_eliminate): Adjust spill_pseudos call.
1173 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
1174 in lra_update_fp2sp_elimination.
1176 2023-08-16 Richard Ball <richard.ball@arm.com>
1178 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
1179 * config/aarch64/aarch64-tune.md: Regenerate.
1180 * doc/invoke.texi: Document Cortex-A720 CPU.
1182 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
1184 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
1186 (<u>avg<v_double_trunc>3_ceil): Ditto.
1187 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
1190 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
1192 * internal-fn.cc (vec_extract_direct): Change type argument
1194 (expand_vec_extract_optab_fn): Call convert_optab_fn.
1195 (direct_vec_extract_optab_supported_p): Use
1196 convert_optab_supported_p.
1198 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1199 Richard Sandiford <richard.sandiford@arm.com>
1201 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
1202 (valid_mask_for_fold_vec_perm_cst_p): New function.
1203 (fold_vec_perm_cst): Likewise.
1204 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
1205 (test_fold_vec_perm_cst): New namespace.
1206 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
1207 (test_fold_vec_perm_cst::validate_res): Likewise.
1208 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
1209 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
1210 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
1211 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
1212 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
1213 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
1214 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
1215 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
1216 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
1217 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
1218 (test_fold_vec_perm_cst::test): Likewise.
1219 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
1221 2023-08-16 Pan Li <pan2.li@intel.com>
1223 * config/riscv/riscv-vector-builtins-bases.cc
1224 (BASE): New declaration.
1225 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1226 * config/riscv/riscv-vector-builtins-functions.def
1227 (vfwcvt_xu_frm): New intrinsic function def.
1229 2023-08-16 Pan Li <pan2.li@intel.com>
1231 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
1233 2023-08-16 Pan Li <pan2.li@intel.com>
1235 * config/riscv/riscv-vector-builtins-bases.cc
1236 (BASE): New declaration.
1237 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1238 * config/riscv/riscv-vector-builtins-functions.def
1239 (vfwcvt_x_frm): New intrinsic function def.
1241 2023-08-16 Pan Li <pan2.li@intel.com>
1243 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
1244 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1245 * config/riscv/riscv-vector-builtins-functions.def
1246 (vfcvt_f_frm): New intrinsic function def.
1248 2023-08-16 Pan Li <pan2.li@intel.com>
1250 * config/riscv/riscv-vector-builtins-bases.cc
1251 (BASE): New declaration.
1252 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1253 * config/riscv/riscv-vector-builtins-functions.def
1254 (vfcvt_xu_frm): New intrinsic function def..
1256 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
1259 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
1260 extract when the element is 7 on BE while 8 on LE for byte or 3 on
1261 BE while 4 on LE for halfword.
1263 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
1266 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
1268 (vsx_extract_v4si): New expand for V4SI extraction.
1269 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
1270 word 1 from BE order.
1271 (*mfvsrwz): New insn pattern for mfvsrwz.
1272 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
1273 word 1 from BE order.
1274 (*vsx_extract_si): Remove.
1275 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
1278 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1280 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
1282 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
1283 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
1284 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
1285 (expand_lanes_load_store): New function.
1286 * config/riscv/vector-iterators.md: New iterator.
1288 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1290 * internal-fn.cc (internal_load_fn_p): Apply
1291 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
1292 (internal_store_fn_p): Ditto.
1293 (internal_fn_len_index): Ditto.
1294 (internal_fn_mask_index): Ditto.
1295 (internal_fn_stored_value_index): Ditto.
1296 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
1297 (vect_load_lanes_supported): Ditto.
1298 * tree-vect-loop.cc: Ditto.
1299 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
1300 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
1301 (get_group_load_store_type): Ditto.
1302 (vectorizable_store): Ditto.
1303 (vectorizable_load): Ditto.
1304 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
1305 (vect_load_lanes_supported): Ditto.
1307 2023-08-16 Pan Li <pan2.li@intel.com>
1309 * config/riscv/riscv-vector-builtins-bases.cc
1310 (enum frm_op_type): New type for frm.
1311 (BASE): New declaration.
1312 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1313 * config/riscv/riscv-vector-builtins-functions.def
1314 (vfcvt_x_frm): New intrinsic function def.
1316 2023-08-16 liuhongt <hongtao.liu@intel.com>
1318 * config/i386/i386-builtins.cc
1319 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
1320 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
1321 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
1322 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
1323 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
1324 for use_scatter_8parts
1325 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
1326 (TARGET_USE_GATHER_8PARTS): .. this.
1327 (TARGET_USE_SCATTER): Rename to ..
1328 (TARGET_USE_SCATTER_8PARTS): .. this.
1329 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
1330 (X86_TUNE_USE_GATHER_8PARTS): .. this.
1331 (X86_TUNE_USE_SCATTER): Rename to
1332 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
1333 * config/i386/i386.opt: Add new options mgather, mscatter.
1335 2023-08-16 liuhongt <hongtao.liu@intel.com>
1337 * config/i386/i386-options.cc (m_GDS): New macro.
1338 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
1340 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
1341 (X86_TUNE_USE_GATHER): Ditto.
1343 2023-08-16 liuhongt <hongtao.liu@intel.com>
1345 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
1346 vmovsd when moving DFmode between SSE_REGS.
1347 (movhi_internal): Generate vmovdqa instead of vmovsh when
1348 moving HImode between SSE_REGS.
1349 (mov<mode>_internal): Use vmovaps instead of vmovsh when
1350 moving HF/BFmode between SSE_REGS.
1352 2023-08-15 David Faust <david.faust@oracle.com>
1354 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
1356 2023-08-15 David Faust <david.faust@oracle.com>
1359 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
1360 for any mode 32-bits or smaller, not just SImode.
1362 2023-08-15 Martin Jambor <mjambor@suse.cz>
1366 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
1367 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
1368 (ipcp_transform_function): Do not deallocate transformation info.
1369 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
1371 (vn_reference_lookup_2): When hitting default-def vuse, query
1372 IPA-CP transformation info for any known constants.
1374 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
1375 Thomas Schwinge <thomas@codesourcery.com>
1377 * gimplify.cc (oacc_region_type_name): New function.
1378 (oacc_default_clause): If no 'default' clause appears on this
1379 compute construct, see if one appears on a lexically containing
1381 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
1382 ctx->oacc_default_clause_ctx to current context.
1384 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1387 * config/riscv/predicates.md: Fix predicate.
1389 2023-08-15 Richard Biener <rguenther@suse.de>
1391 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
1392 slp_inst_kind_ctor handling.
1393 (vect_analyze_slp): Simplify.
1394 (vect_build_slp_instance): Dump when we analyze a CTOR.
1395 (vect_slp_check_for_constructors): Rename to ...
1396 (vect_slp_check_for_roots): ... this. Register a
1397 slp_root for CONSTRUCTORs instead of shoving them to
1398 the set of grouped stores.
1399 (vect_slp_analyze_bb_1): Adjust.
1401 2023-08-15 Richard Biener <rguenther@suse.de>
1403 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
1405 (_slp_instance::remain_defs): ... this.
1406 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
1407 (SLP_INSTANCE_REMAIN_DEFS): ... this.
1408 (slp_root::remain): New.
1409 (slp_root::slp_root): Adjust.
1410 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
1411 (vect_build_slp_instance): Get extra remain parameter,
1412 adjust former handling of a cut off stmt.
1413 (vect_analyze_slp_instance): Adjust.
1414 (vect_analyze_slp): Likewise.
1415 (_bb_vec_info::~_bb_vec_info): Likewise.
1416 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
1417 (vect_slp_check_for_constructors): Handle non-internal
1418 defs as remain defs of a reduction.
1419 (vectorize_slp_instance_root_stmt): Adjust.
1421 2023-08-15 Richard Biener <rguenther@suse.de>
1423 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
1424 (canonicalize_loop_induction_variables): Use find_loop_location.
1426 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
1429 * config/cris/cris-protos.h: Revert recent change.
1430 * config/cris/cris.cc (cris_legitimate_address_p): Remove
1431 code_helper unused parameter.
1432 (cris_legitimate_address_p_hook): New wrapper function.
1433 (TARGET_LEGITIMATE_ADDRESS_P): Change to
1434 cris_legitimate_address_p_hook.
1436 2023-08-15 Richard Biener <rguenther@suse.de>
1438 PR tree-optimization/110963
1439 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
1440 a PHI node when the expression is available on all edges
1441 and we insert at most one copy from a constant.
1443 2023-08-15 Richard Biener <rguenther@suse.de>
1445 PR tree-optimization/110991
1446 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
1447 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
1448 that will end up constant.
1450 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
1453 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
1455 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
1457 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
1458 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
1459 and update the final nest accordingly.
1461 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
1463 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
1466 2023-08-15 Pan Li <pan2.li@intel.com>
1468 * mode-switching.cc (create_pre_exit): Add SET insn check.
1470 2023-08-15 Pan Li <pan2.li@intel.com>
1472 * config/riscv/riscv-vector-builtins-bases.cc
1473 (class vfrec7_frm): New class for frm.
1474 (vfrec7_frm_obj): New declaration.
1476 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1477 * config/riscv/riscv-vector-builtins-functions.def
1478 (vfrec7_frm): New intrinsic function definition.
1479 * config/riscv/vector-iterators.md
1480 (VFMISC): Remove VFREC7.
1482 (float_insn_type): Ditto.
1483 (VFMISC_FRM): New int iterator.
1484 (misc_frm_op): New op for frm.
1485 (float_frm_insn_type): New type for frm.
1486 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
1487 New pattern for misc frm.
1489 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
1491 * lra-constraints.cc (curr_insn_transform): Process output stack
1492 pointer reloads before emitting reload insns.
1494 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
1497 * doc/invoke.texi: Add documentation of
1498 fanalyzer-show-events-in-system-headers
1500 2023-08-14 Jan Hubicka <jh@suse.cz>
1502 PR gcov-profile/110988
1503 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
1505 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
1507 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
1508 Enable compressed builtins when ZC* extensions enabled.
1509 * config/riscv/riscv-shorten-memrefs.cc:
1510 Enable shorten_memrefs pass when ZC* extensions enabled.
1511 * config/riscv/riscv.cc (riscv_compressed_reg_p):
1512 Enable compressible registers when ZC* extensions enabled.
1513 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
1514 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
1515 (riscv_first_stack_step): Allow compression of the register saves
1516 without adding extra instructions.
1517 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
1518 to 16 bits when ZC* extensions enabled.
1520 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
1522 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
1523 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
1530 (TARGET_ZCA): New target.
1531 (TARGET_ZCB): Ditto.
1532 (TARGET_ZCE): Ditto.
1533 (TARGET_ZCF): Ditto.
1534 (TARGET_ZCD): Ditto.
1535 (TARGET_ZCMP): Ditto.
1536 (TARGET_ZCMT): Ditto.
1537 * config/riscv/riscv.opt: New target variable.
1539 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1542 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
1544 * genrecog.cc (print_nonbool_test): Fix type error of
1545 switch (SUBREG_BYTE (op))'.
1547 2023-08-14 Richard Biener <rguenther@suse.de>
1549 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
1551 2023-08-14 Pan Li <pan2.li@intel.com>
1553 * config/riscv/riscv-vector-builtins-bases.cc
1554 (class unop_frm): New class for frm.
1555 (vfsqrt_frm_obj): New declaration.
1557 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1558 * config/riscv/riscv-vector-builtins-functions.def
1559 (vfsqrt_frm): New intrinsic function definition.
1561 2023-08-14 Pan Li <pan2.li@intel.com>
1563 * config/riscv/riscv-vector-builtins-bases.cc
1564 (class vfwnmsac_frm): New class for frm.
1565 (vfwnmsac_frm_obj): New declaration.
1567 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1568 * config/riscv/riscv-vector-builtins-functions.def
1569 (vfwnmsac_frm): New intrinsic function definition.
1571 2023-08-14 Pan Li <pan2.li@intel.com>
1573 * config/riscv/riscv-vector-builtins-bases.cc
1574 (class vfwmsac_frm): New class for frm.
1575 (vfwmsac_frm_obj): New declaration.
1577 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1578 * config/riscv/riscv-vector-builtins-functions.def
1579 (vfwmsac_frm): New intrinsic function definition.
1581 2023-08-14 Pan Li <pan2.li@intel.com>
1583 * config/riscv/riscv-vector-builtins-bases.cc
1584 (class vfwnmacc_frm): New class for frm.
1585 (vfwnmacc_frm_obj): New declaration.
1587 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1588 * config/riscv/riscv-vector-builtins-functions.def
1589 (vfwnmacc_frm): New intrinsic function definition.
1591 2023-08-14 Cui, Lili <lili.cui@intel.com>
1593 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
1596 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
1598 * config/mmix/predicates.md (mmix_address_operand): Use
1599 lra_in_progress, not reload_in_progress.
1601 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
1603 * config/mmix/mmix.cc: Re-enable LRA.
1605 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
1607 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
1608 when lra_in_progress.
1610 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
1612 * config/mmix/mmix.cc: Disable LRA for MMIX.
1614 2023-08-14 Pan Li <pan2.li@intel.com>
1616 * config/riscv/riscv-vector-builtins-bases.cc
1617 (class vfwmacc_frm): New class for vfwmacc frm.
1618 (vfwmacc_frm_obj): New declaration.
1620 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1621 * config/riscv/riscv-vector-builtins-functions.def
1622 (vfwmacc_frm): Function definition for vfwmacc.
1623 * config/riscv/riscv-vector-builtins.cc
1624 (function_expander::use_widen_ternop_insn): Add frm support.
1626 2023-08-14 Pan Li <pan2.li@intel.com>
1628 * config/riscv/riscv-vector-builtins-bases.cc
1629 (class vfnmsub_frm): New class for vfnmsub frm.
1630 (vfnmsub_frm): New declaration.
1632 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1633 * config/riscv/riscv-vector-builtins-functions.def
1634 (vfnmsub_frm): New function declaration.
1636 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
1638 * lra-constraints.cc (curr_insn_transform): Set done_p up and
1639 check it on true after processing output stack pointer reload.
1641 2023-08-12 Jakub Jelinek <jakub@redhat.com>
1643 * Makefile.in (USER_H): Add stdckdint.h.
1644 * ginclude/stdckdint.h: New file.
1646 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1649 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
1651 2023-08-12 Patrick Palka <ppalka@redhat.com>
1653 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
1654 Delimit output with braces.
1656 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1659 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
1661 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1663 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
1664 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
1665 * config/riscv/vector.md: Ditto.
1667 2023-08-11 David Malcolm <dmalcolm@redhat.com>
1670 * doc/analyzer.texi (__analyzer_get_strlen): New.
1671 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
1673 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
1675 * config/rx/rx.md (subdi3): Fix test for borrow.
1677 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1679 PR middle-end/110989
1680 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
1681 (vectorizable_load): Ditto.
1683 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
1685 * config/bpf/bpf.md (allocate_stack): Define.
1686 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
1687 stack pointer register.
1688 (FIXED_REGISTERS): Adjust accordingly.
1689 (CALL_USED_REGISTERS): Likewise.
1690 (REG_CLASS_CONTENTS): Likewise.
1691 (REGISTER_NAMES): Likewise.
1692 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
1693 space for callee-saved registers.
1694 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
1695 (bpf_expand_epilogue): Do not restore callee-saved registers in
1698 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
1700 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
1701 about too many arguments if function is always inlined.
1703 2023-08-11 Patrick Palka <ppalka@redhat.com>
1705 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
1706 Don't call component_ref_field_offset if the RHS isn't a decl.
1708 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
1711 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
1713 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
1715 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
1716 (process_alt_operands): Set the flag.
1717 (curr_insn_transform): Modify stack pointer offsets if output
1718 stack pointer reload is generated.
1720 2023-08-11 Joseph Myers <joseph@codesourcery.com>
1722 * configure: Regenerate.
1724 2023-08-11 Richard Biener <rguenther@suse.de>
1726 PR tree-optimization/110979
1727 * tree-vect-loop.cc (vectorizable_reduction): For
1728 FOLD_LEFT_REDUCTION without target support make sure
1729 we don't need to honor signed zeros and sign dependent rounding.
1731 2023-08-11 Richard Biener <rguenther@suse.de>
1733 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
1734 subgraph entries. Dump the used vector size based on the
1735 SLP subgraph entry root vector type.
1737 2023-08-11 Pan Li <pan2.li@intel.com>
1739 * config/riscv/riscv-vector-builtins-bases.cc
1740 (class vfmsub_frm): New class for vfmsub frm.
1741 (vfmsub_frm): New declaration.
1743 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1744 * config/riscv/riscv-vector-builtins-functions.def
1745 (vfmsub_frm): New function declaration.
1747 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1749 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
1750 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
1751 (expand_partial_store_optab_fn): Ditto.
1752 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
1753 (MASK_LEN_STORE_LANES): Ditto.
1754 * optabs.def (OPTAB_CD): Ditto.
1756 2023-08-11 Pan Li <pan2.li@intel.com>
1758 * config/riscv/riscv-vector-builtins-bases.cc
1759 (class vfnmadd_frm): New class for vfnmadd frm.
1760 (vfnmadd_frm): New declaration.
1762 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1763 * config/riscv/riscv-vector-builtins-functions.def
1764 (vfnmadd_frm): New function declaration.
1766 2023-08-11 Drew Ross <drross@redhat.com>
1767 Jakub Jelinek <jakub@redhat.com>
1769 PR tree-optimization/109938
1770 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
1772 2023-08-11 Pan Li <pan2.li@intel.com>
1774 * config/riscv/riscv-vector-builtins-bases.cc
1775 (class vfmadd_frm): New class for vfmadd frm.
1776 (vfmadd_frm_obj): New declaration.
1778 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1779 * config/riscv/riscv-vector-builtins-functions.def
1780 (vfmadd_frm): New function definition.
1782 2023-08-11 Pan Li <pan2.li@intel.com>
1784 * config/riscv/riscv-vector-builtins-bases.cc
1785 (class vfnmsac_frm): New class for vfnmsac frm.
1786 (vfnmsac_frm_obj): New declaration.
1788 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1789 * config/riscv/riscv-vector-builtins-functions.def
1790 (vfnmsac_frm): New function definition.
1792 2023-08-11 Jakub Jelinek <jakub@redhat.com>
1794 * doc/extend.texi (Typeof): Document typeof_unqual
1795 and __typeof_unqual__.
1797 2023-08-11 Andrew Pinski <apinski@marvell.com>
1799 PR tree-optimization/110954
1800 * generic-match-head.cc (bitwise_inverted_equal_p): Add
1801 wascmp argument and set it accordingly.
1802 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
1803 wascmp argument to the macro.
1804 (gimple_bitwise_inverted_equal_p): Add
1805 wascmp argument and set it accordingly.
1806 * match.pd (`a & ~a`, `a ^| ~a`): Update call
1807 to bitwise_inverted_equal_p and handle wascmp case.
1808 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
1809 call to bitwise_inverted_equal_p and check to see
1810 if was !wascmp or if precision was 1.
1812 2023-08-11 Martin Uecker <uecker@tugraz.at>
1815 * doc/invoke.texi: Update.
1817 2023-08-11 Pan Li <pan2.li@intel.com>
1819 * config/riscv/riscv-vector-builtins-bases.cc
1820 (class vfmsac_frm): New class for vfmsac frm.
1821 (vfmsac_frm_obj): New declaration.
1823 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1824 * config/riscv/riscv-vector-builtins-functions.def
1825 (vfmsac_frm): New function definition
1827 2023-08-10 Jan Hubicka <jh@suse.cz>
1829 PR middle-end/110923
1830 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
1832 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
1834 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
1835 dependent on 'a' extension.
1836 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
1837 (TARGET_ZTSO): New target.
1838 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
1840 (riscv_memmodel_needs_amo_release): Add Ztso case.
1841 (riscv_print_operand): Add Ztso case for LR/SC annotations.
1842 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
1843 * config/riscv/riscv.opt: Add Ztso target variable.
1844 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
1846 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
1847 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
1848 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
1849 specific load/store/fence mappings.
1850 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
1851 specific load/store/fence mappings.
1853 2023-08-10 Jan Hubicka <jh@suse.cz>
1855 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
1858 2023-08-10 Jan Hubicka <jh@suse.cz>
1860 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
1862 2023-08-10 Jan Hubicka <jh@suse.cz>
1864 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
1865 handling of undefined values.
1867 2023-08-10 Jakub Jelinek <jakub@redhat.com>
1870 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
1871 return virtual phis and return NULL if there is a virtual phi
1872 where the arguments from E0 and E1 edges aren't equal.
1874 2023-08-10 Richard Biener <rguenther@suse.de>
1876 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
1877 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
1879 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1882 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
1884 2023-08-10 Pan Li <pan2.li@intel.com>
1886 * config/riscv/riscv-vector-builtins-bases.cc
1887 (class vfnmacc_frm): New class for vfnmacc.
1888 (vfnmacc_frm_obj): New declaration.
1890 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1891 * config/riscv/riscv-vector-builtins-functions.def
1892 (vfnmacc_frm): New function definition.
1894 2023-08-10 Pan Li <pan2.li@intel.com>
1896 * config/riscv/riscv-vector-builtins-bases.cc
1897 (class vfmacc_frm): New class for vfmacc frm.
1898 (vfmacc_frm_obj): New declaration.
1900 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1901 * config/riscv/riscv-vector-builtins-functions.def
1902 (vfmacc_frm): New function definition.
1904 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1907 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
1909 2023-08-10 Richard Biener <rguenther@suse.de>
1911 * tree-vectorizer.h (vectorizable_live_operation): Remove
1912 gimple_stmt_iterator * argument.
1913 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
1914 Adjust plumbing around vect_get_loop_mask.
1915 (vect_analyze_loop_operations): Adjust.
1916 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
1917 (vect_bb_slp_mark_live_stmts): Likewise.
1918 (vect_schedule_slp_node): Likewise.
1919 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
1920 Remove gimple_stmt_iterator * argument.
1921 (vect_transform_stmt): Adjust.
1923 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1925 * config/riscv/vector-iterators.md: Add missing modes.
1927 2023-08-10 Jakub Jelinek <jakub@redhat.com>
1930 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
1931 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
1933 2023-08-10 Jakub Jelinek <jakub@redhat.com>
1936 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
1937 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
1940 2023-08-10 liuhongt <hongtao.liu@intel.com>
1943 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
1944 sanitize upper part of V4HFmode register with
1946 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
1948 (<insn>v2hf3): Ditto.
1950 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
1951 register with -fno-trapping-math.
1953 2023-08-10 Pan Li <pan2.li@intel.com>
1954 Kito Cheng <kito.cheng@sifive.com>
1956 * config/riscv/riscv-protos.h
1957 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
1958 (get_frm_mode): New declaration.
1959 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
1960 * config/riscv/riscv-vector-builtins.cc
1961 (function_expander::use_ternop_insn): Take care of frm reg.
1962 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
1963 (riscv_emit_frm_mode_set): Ditto.
1964 (riscv_emit_mode_set): Ditto.
1965 (riscv_frm_adjust_mode_after_call): Ditto.
1966 (riscv_frm_mode_needed): Ditto.
1967 (riscv_frm_mode_after): Ditto.
1968 (riscv_mode_entry): Ditto.
1969 (riscv_mode_exit): Ditto.
1970 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
1971 * config/riscv/vector.md
1972 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
1973 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
1975 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1977 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
1978 incorrect anticipate info.
1980 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
1982 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
1983 Remove 'Zve32d' from the version list.
1985 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
1987 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
1988 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
1989 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
1990 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
1992 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
1994 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
1995 (mem_shadd_or_shadd_rtx_p): New function.
1997 2023-08-09 Andrew Pinski <apinski@marvell.com>
1999 PR tree-optimization/110937
2000 PR tree-optimization/100798
2001 * match.pd (`a ? ~b : b`): Handle this
2004 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
2006 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
2008 2023-08-09 Richard Ball <richard.ball@arm.com>
2010 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
2011 * config/aarch64/aarch64-tune.md: Regenerate.
2012 * doc/invoke.texi: Document Cortex-A520 CPU.
2014 2023-08-09 Carl Love <cel@us.ibm.com>
2016 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
2017 Move definitions to Altivec stanza.
2018 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
2021 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2024 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
2025 stepped vector support.
2027 2023-08-09 liuhongt <hongtao.liu@intel.com>
2029 * common/config/i386/cpuinfo.h (get_available_features):
2030 Rename local variable subleaf_level to max_subleaf_level.
2032 2023-08-09 Richard Biener <rguenther@suse.de>
2034 PR rtl-optimization/110587
2035 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
2037 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
2039 PR tree-optimization/110248
2040 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
2041 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
2042 legitimate when outer code is PLUS.
2044 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
2046 PR tree-optimization/110248
2047 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
2048 type code_helper and pass it to targetm.addr_space.legitimate_address_p
2049 instead of ERROR_MARK.
2050 (offsettable_address_addr_space_p): Update one function pointer with
2051 one more argument of type code_helper as its assignees
2052 memory_address_addr_space_p and strict_memory_address_addr_space_p
2053 have been adjusted, and adjust some call sites with ERROR_MARK.
2054 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
2055 (memory_address_addr_space_p): Adjust with one more unnamed argument
2056 of type code_helper with default ERROR_MARK.
2057 (strict_memory_address_addr_space_p): Likewise.
2058 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
2059 argument of type code_helper.
2060 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
2061 type code_helper and pass it to memory_address_addr_space_p.
2062 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
2063 one more unnamed argument of type code_helper with default value
2065 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
2066 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
2067 pass it to all valid_mem_ref_p calls.
2069 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
2071 PR tree-optimization/110248
2072 * coretypes.h (class code_helper): Add forward declaration.
2073 * doc/tm.texi: Regenerate.
2074 * lra-constraints.cc (valid_address_p): Call target hook
2075 targetm.addr_space.legitimate_address_p with an extra parameter
2076 ERROR_MARK as its prototype changes.
2077 * recog.cc (memory_address_addr_space_p): Likewise.
2078 * reload.cc (strict_memory_address_addr_space_p): Likewise.
2079 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
2080 Extend with one more argument of type code_helper, update the
2081 documentation accordingly.
2082 * targhooks.cc (default_legitimate_address_p): Adjust for the
2083 new code_helper argument.
2084 (default_addr_space_legitimate_address_p): Likewise.
2085 * targhooks.h (default_legitimate_address_p): Likewise.
2086 (default_addr_space_legitimate_address_p): Likewise.
2087 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
2088 with extra unnamed code_helper argument with default ERROR_MARK.
2089 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
2090 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
2091 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
2092 (tree.h): New include for tree_code ERROR_MARK.
2093 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
2094 unnamed code_helper argument with default ERROR_MARK.
2095 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
2096 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
2097 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
2098 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
2099 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
2100 (tree.h): New include for tree_code ERROR_MARK.
2101 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
2102 unnamed code_helper argument with default ERROR_MARK.
2103 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
2104 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
2106 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
2107 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
2108 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
2109 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
2110 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
2111 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
2112 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
2113 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
2114 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
2116 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
2117 (m32c_addr_space_legitimate_address_p): Likewise.
2118 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
2119 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
2120 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
2121 * config/microblaze/microblaze-protos.h (tree.h): New include for
2122 tree_code ERROR_MARK.
2123 (microblaze_legitimate_address_p): Adjust with extra unnamed
2124 code_helper argument with default ERROR_MARK.
2125 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
2127 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
2128 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
2129 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
2130 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
2131 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
2132 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
2133 argument with default ERROR_MARK and adjust the call to function
2134 msp430_legitimate_address_p.
2135 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
2136 unnamed code_helper argument with default ERROR_MARK.
2137 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
2138 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
2139 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
2140 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
2141 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
2142 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
2143 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
2144 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
2145 (tree.h): New include for tree_code ERROR_MARK.
2146 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
2147 extra unnamed code_helper argument with default ERROR_MARK.
2148 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
2149 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
2150 argument and adjust the call to function rs6000_legitimate_address_p.
2151 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
2152 unnamed code_helper argument with default ERROR_MARK.
2153 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
2154 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
2155 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
2156 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
2157 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
2158 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
2159 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
2160 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
2162 (tree.h): New include for tree_code ERROR_MARK.
2163 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
2164 Adjust with extra unnamed code_helper argument with default
2167 2023-08-09 liuhongt <hongtao.liu@intel.com>
2169 * common/config/i386/cpuinfo.h (get_available_features): Check
2170 EAX for valid subleaf before use CPUID.
2172 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
2174 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
2175 for the temporary when canonicalizing the condition.
2177 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
2179 * config/bpf/core-builtins.cc: Cleaned include headers.
2180 (struct cr_builtins): Added GTY.
2181 (cr_builtins_ref): Created.
2182 (builtins_data) Changed to GC root.
2183 (allocate_builtin_data): Changed.
2184 Included gt-core-builtins.h.
2185 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
2186 (bpf_core_extra_ref): Created.
2187 (bpf_comment_info): Changed to GC root.
2188 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
2190 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
2193 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
2194 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
2195 upper part of V2SFmode register with -fno-trapping-math.
2196 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
2198 (<smaxmin:code>v2sf3): Ditto.
2200 (*mmx_haddv2sf3_low): Ditto.
2201 (*mmx_hsubv2sf3_low): Ditto.
2202 (vec_addsubv2sf3): Ditto.
2203 (vec_cmpv2sfv2si): Ditto.
2204 (vcond<V2FI:mode>v2sf): Ditto.
2209 (fix_truncv2sfv2si2): Ditto.
2210 (fixuns_truncv2sfv2si2): Ditto.
2211 (floatv2siv2sf2): Ditto.
2212 (floatunsv2siv2sf2): Ditto.
2213 (nearbyintv2sf2): Ditto.
2215 (lrintv2sfv2si2): Ditto.
2217 (lceilv2sfv2si2): Ditto.
2218 (floorv2sf2): Ditto.
2219 (lfloorv2sfv2si2): Ditto.
2220 (btruncv2sf2): Ditto.
2221 (roundv2sf2): Ditto.
2222 (lroundv2sfv2si2): Ditto.
2223 * doc/invoke.texi (x86 Options): Document
2224 -mpartial-vector-fp-math option.
2226 2023-08-08 Andrew Pinski <apinski@marvell.com>
2228 PR tree-optimization/103281
2229 PR tree-optimization/28794
2230 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
2232 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
2233 (simplify_using_ranges::simplify_casted_cond): Rename to ...
2234 (simplify_using_ranges::simplify_casted_compare): This
2235 and change arguments to take op0 and op1.
2236 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
2237 (simplify_using_ranges::simplify): For tcc_comparison assignments call
2238 simplify_compare_assign_using_ranges_1.
2239 * vr-values.h (simplify_using_ranges): Add
2240 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
2241 Rename simplify_casted_cond and simplify_casted_compare and
2242 update argument types.
2244 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
2246 * genmatch.cc: Log line numbers indirectly.
2248 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
2250 * genmatch.cc: Make sinfo map ordered.
2251 * Makefile.in: Require the ordered map header for genmatch.o.
2253 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
2255 * ordered-hash-map.h: Add get_or_insert.
2256 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
2258 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2260 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
2261 (cond_len_<optab><mode>): Ditto.
2262 (cond_fma<mode>): Ditto.
2263 (cond_len_fma<mode>): Ditto.
2264 (cond_fnma<mode>): Ditto.
2265 (cond_len_fnma<mode>): Ditto.
2266 (cond_fms<mode>): Ditto.
2267 (cond_len_fms<mode>): Ditto.
2268 (cond_fnms<mode>): Ditto.
2269 (cond_len_fnms<mode>): Ditto.
2270 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
2272 (enum insn_type): Add new enum type.
2273 (prepare_ternary_operands): New function.
2274 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
2275 (emit_nonvlmax_tumu_insn): Ditto.
2276 (emit_nonvlmax_fp_tumu_insn): Ditto.
2277 (expand_cond_len_binop): Add condtional operations.
2278 (expand_cond_len_ternop): Ditto.
2279 (prepare_ternary_operands): New function.
2280 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
2281 riscv_get_v_regno_alignment as global scope.
2282 * config/riscv/vector.md: Fix ternary bugs.
2284 2023-08-08 Richard Biener <rguenther@suse.de>
2286 PR tree-optimization/49955
2287 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
2288 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
2289 * tree-vect-slp.cc (vect_free_slp_instance): Release
2290 SLP_INSTANCE_REMAIN_STMTS.
2291 (vect_build_slp_instance): Make the number of lanes of
2292 a BB reduction even.
2293 (vectorize_slp_instance_root_stmt): Handle unvectorized
2294 defs of a BB reduction.
2296 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
2298 * internal-fn.cc (get_len_internal_fn): New function.
2299 (DEF_INTERNAL_COND_FN): Ditto.
2300 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
2301 * internal-fn.h (get_len_internal_fn): Ditto.
2302 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
2304 2023-08-08 Richard Biener <rguenther@suse.de>
2306 PR tree-optimization/110924
2307 * tree-ssa-live.h (virtual_operand_live): Update comment.
2308 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
2309 optimization, look at each predecessor.
2310 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
2312 2023-08-08 yulong <shiyulong@iscas.ac.cn>
2314 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
2316 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2318 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
2319 * config/riscv/vector.md: Ditto.
2321 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2323 * config/riscv/autovec.md: Add VLS shift.
2325 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2327 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
2328 * config/riscv/vector-iterators.md: Ditto.
2329 * config/riscv/vector.md: Ditto.
2331 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
2333 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
2335 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
2337 * configure: Regenerate.
2339 2023-08-07 John Ericson <git@JohnEricson.me>
2341 * configure: Regenerate.
2343 2023-08-07 Alan Modra <amodra@gmail.com>
2345 * configure: Regenerate.
2347 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
2349 * configure: Regenerate.
2351 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
2353 * configure: Regenerate.
2355 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
2357 * configure: Regenerate.
2359 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
2361 * configure: Regenerate.
2363 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
2365 * configure: Regenerate.
2367 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
2369 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
2370 VOIDmode operands to conditional before canonicalization.
2372 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
2374 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
2375 (find_oldest_value_reg): Inline stack_pointer_rtx check.
2376 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
2378 2023-08-07 Martin Jambor <mjambor@suse.cz>
2381 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
2382 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
2383 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
2384 (ptr_parm_has_nonarg_uses): Likewise.
2385 * ipa-param-manipulation.cc
2386 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
2387 (ipa_param_body_adjustments::mark_dead_statements): Move initial
2388 checks to get_ddef_if_exists_and_is_used.
2389 (ipa_param_body_adjustments::mark_clobbers_dead): New.
2390 (ipa_param_body_adjustments::common_initialization): Call
2391 mark_clobbers_dead when splitting.
2393 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
2395 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
2396 as an argument and pass it to riscv_emit_int_order_test.
2397 (riscv_expand_conditional_move): Handle cases where the condition
2398 is not EQ/NE or the second argument to the conditional is not
2400 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
2401 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
2403 2023-08-07 Andrew Pinski <apinski@marvell.com>
2405 PR tree-optimization/109959
2406 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
2409 2023-08-07 Richard Biener <rguenther@suse.de>
2411 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
2412 calculate post-dominators. Calculate RPO on the inverted
2413 graph and process blocks in that order.
2415 2023-08-07 liuhongt <hongtao.liu@intel.com>
2418 * config/i386/i386-protos.h
2419 (vpternlog_redundant_operand_mask): Adjust parameter type.
2420 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
2421 INTVAL instead of XINT, also adjust parameter type from rtx*
2422 to rtx since the function only needs operands[4] in vpternlog
2424 (substitute_vpternlog_operands): Pass operands[4] instead of
2425 operands to vpternlog_redundant_operand_mask.
2426 * config/i386/sse.md: Ditto.
2428 2023-08-07 Richard Biener <rguenther@suse.de>
2430 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
2431 around dumping code.
2433 2023-08-07 liuhongt <hongtao.liu@intel.com>
2436 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
2437 to define_expand and break into ..
2438 (<insn>v4hf3): .. this.
2439 (divv4hf3): .. this.
2440 (<insn>v2hf3): .. this.
2441 (divv2hf3): .. this.
2442 (movd_v2hf_to_sse): New define_expand.
2443 (movq_<mode>_to_sse): Extend to V4HFmode.
2444 (mmxdoublevecmode): Ditto.
2445 (V2FI_V4HF): New mode iterator.
2446 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
2447 by using mode iterator V4SF_V8HF, renamed to ..
2448 (*vec_concat<mode>): .. this.
2449 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
2450 iterator V4SF_V8HF, renamed to ..
2451 (*vec_concat<mode>_0): .. this.
2452 (*vec_concatv8hf_movss): New define_insn.
2453 (V4SF_V8HF): New mode iterator.
2455 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2457 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
2459 2023-08-07 Jan Beulich <jbeulich@suse.com>
2461 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
2462 (*mmx_pinsrb): Likewise.
2463 (*mmx_pextrb): Likewise.
2464 (*mmx_pextrb_zext): Likewise.
2465 (mmx_pshufbv8qi3): Likewise.
2466 (mmx_pshufbv4qi3): Likewise.
2467 (mmx_pswapdv2si2): Likewise.
2468 (*pinsrb): Likewise.
2469 (*pextrb): Likewise.
2470 (*pextrb_zext): Likewise.
2471 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
2472 (*sse2_eq<mode>3): Likewise.
2473 (*sse2_gt<mode>3): Likewise.
2474 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
2475 (*vec_extract<mode>): Likewise.
2476 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
2477 (*vec_extractv16qi_zext): Likewise.
2478 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
2479 (ssse3_pmaddubsw128): Likewise.
2480 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
2481 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
2482 (<ssse3_avx2>_psign<mode>3): Likewise.
2483 (<ssse3_avx2>_palignr<mode>): Likewise.
2484 (*abs<mode>2): Likewise.
2485 (sse4_2_pcmpestr): Likewise.
2486 (sse4_2_pcmpestri): Likewise.
2487 (sse4_2_pcmpestrm): Likewise.
2488 (sse4_2_pcmpestr_cconly): Likewise.
2489 (sse4_2_pcmpistr): Likewise.
2490 (sse4_2_pcmpistri): Likewise.
2491 (sse4_2_pcmpistrm): Likewise.
2492 (sse4_2_pcmpistr_cconly): Likewise.
2493 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
2494 (vgf2p8affineqb_<mode><mask_name>): Likewise.
2495 (vgf2p8mulb_<mode><mask_name>): Likewise.
2496 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
2498 (*<code>v16qi3 [umaxmin]): Likewise.
2500 2023-08-07 Jan Beulich <jbeulich@suse.com>
2502 * config/i386/i386.md (sse4_1_round<mode>2): Make
2503 "length_immediate" uniformly 1.
2504 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
2505 (mmx_pblendvb_<mode>): Likewise.
2507 2023-08-07 Jan Beulich <jbeulich@suse.com>
2509 * config/i386/sse.md
2510 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
2512 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
2515 2023-08-07 Jan Beulich <jbeulich@suse.com>
2517 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
2518 "prefix_extra", and "mode" attributes.
2519 (xop_phadd<u>bd): Likewise.
2520 (xop_phadd<u>bq): Likewise.
2521 (xop_phadd<u>wd): Likewise.
2522 (xop_phadd<u>wq): Likewise.
2523 (xop_phadd<u>dq): Likewise.
2524 (xop_phsubbw): Likewise.
2525 (xop_phsubwd): Likewise.
2526 (xop_phsubdq): Likewise.
2527 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
2528 (xop_rotr<mode>3): Likewise.
2529 (xop_frcz<mode>2): Likewise.
2530 (*xop_vmfrcz<mode>2): Likewise.
2531 (xop_vrotl<mode>3): Add "prefix" attribute. Change
2532 "prefix_extra" to 1.
2533 (xop_sha<mode>3): Likewise.
2534 (xop_shl<mode>3): Likewise.
2536 2023-08-07 Jan Beulich <jbeulich@suse.com>
2538 * config/i386/sse.md
2539 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
2541 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
2542 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
2543 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
2544 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
2545 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
2546 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
2547 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
2548 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
2549 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
2550 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
2551 (vec_extract_lo_v64qi): Likewise.
2552 (vec_extract_hi_v64qi): Likewise.
2553 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
2554 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
2555 (*avx512f_<code><mode>3<mask_name>): Likewise.
2556 (*vec_extractv4ti): Likewise.
2557 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
2558 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
2559 Add "length_immediate".
2561 2023-08-07 Jan Beulich <jbeulich@suse.com>
2563 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
2565 (@rdseed<mode>): Likewise.
2566 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
2567 Adjust "prefix_extra".
2568 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
2569 (*sse4_1_<code><mode>3<mask_name>): Likewise.
2570 (*avx2_eq<mode>3): Likewise.
2571 (avx2_gt<mode>3): Likewise.
2572 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
2573 (*vec_extract<mode>): Likewise.
2574 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
2576 2023-08-07 Jan Beulich <jbeulich@suse.com>
2578 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
2579 "prefix_rep". Drop "prefix_extra".
2580 (wr<fsgs>base<mode>): Likewise.
2581 (ptwrite<mode>): Likewise.
2583 2023-08-07 Jan Beulich <jbeulich@suse.com>
2585 * config/i386/i386.md (isa): Move up.
2586 (length_immediate): Handle "fma4".
2587 (prefix): Handle "ssemuladd".
2588 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
2589 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
2591 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
2592 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
2593 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
2595 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
2596 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
2597 (*fma_fnmadd_<mode>): Likewise.
2598 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
2600 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
2601 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
2602 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
2604 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
2605 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
2606 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
2608 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
2609 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
2610 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
2612 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
2613 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
2614 (*fmai_fmadd_<mode>): Likewise.
2615 (*fmai_fmsub_<mode>): Likewise.
2616 (*fmai_fnmadd_<mode><round_name>): Likewise.
2617 (*fmai_fnmsub_<mode><round_name>): Likewise.
2618 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
2619 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
2620 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
2621 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
2622 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
2623 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
2624 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
2625 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
2626 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
2627 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
2628 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
2629 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
2630 (*fma4i_vmfmadd_<mode>): Likewise.
2631 (*fma4i_vmfmsub_<mode>): Likewise.
2632 (*fma4i_vmfnmadd_<mode>): Likewise.
2633 (*fma4i_vmfnmsub_<mode>): Likewise.
2634 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
2635 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
2636 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
2638 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
2639 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
2640 (xop_p<macs>dql): Likewise.
2641 (xop_p<macs>dqh): Likewise.
2642 (xop_p<macs>wd): Likewise.
2643 (xop_p<madcs>wd): Likewise.
2644 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
2646 2023-08-07 Jan Beulich <jbeulich@suse.com>
2648 * config/i386/i386.md (length_immediate): Handle "sse4arg".
2650 (*xop_pcmov_<mode>): Add "mode" attribute.
2651 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
2652 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
2653 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
2654 (*xop_pcmov_<mode>): Add "mode" attribute.
2655 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
2657 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
2658 "prefix_extra", and "length_immediate" attributes.
2659 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
2660 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
2661 and "length_immediate" attributes. Switch "type" to "sse4arg".
2662 (xop_pcom_tf<mode>3): Likewise.
2663 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
2665 2023-08-07 Jan Beulich <jbeulich@suse.com>
2667 * config/i386/i386.md (prefix_extra): Correct comment. Fold
2668 cases yielding 2 into ones yielding 1.
2670 2023-08-07 Jan Hubicka <jh@suse.cz>
2672 PR tree-optimization/106293
2673 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
2674 * tree-vect-loop.cc (vect_transform_loop): Likewise.
2676 2023-08-07 Andrew Pinski <apinski@marvell.com>
2678 PR tree-optimization/96695
2679 * match.pd (min_value, max_value): Extend to
2682 2023-08-06 Jan Hubicka <jh@suse.cz>
2684 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
2685 __builtin_expect that CPU likely supports cpuid.
2687 2023-08-06 Jan Hubicka <jh@suse.cz>
2689 * tree-loop-distribution.cc (loop_distribution::execute): Disable
2690 distribution for loops with estimated iterations 0.
2692 2023-08-06 Jan Hubicka <jh@suse.cz>
2694 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
2696 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
2698 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
2699 more Zicond patterns. Fix whitespace typo.
2700 (riscv_rtx_costs): Remove accidental code duplication.
2701 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
2703 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
2706 * config/i386/i386-protos.h
2707 (vpternlog_redundant_operand_mask): Declare.
2708 (substitute_vpternlog_operands): Declare.
2709 * config/i386/i386.cc
2710 (vpternlog_redundant_operand_mask): New helper.
2711 (substitute_vpternlog_operands): New function. Use them...
2712 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
2714 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
2716 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
2717 value of -1 is equivalent to don't care.
2718 (extract_integral_bit_field): Indicate that we don't require
2719 the most significant word to be zero extended, if we're about
2721 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
2722 of -1 is equivalent to don't care. Don't clear the most
2723 significant bits with AND mask when UNSIGNEDP is -1.
2725 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
2727 * config/i386/sse.md (define_split): Convert highpart:DF extract
2728 from V2DFmode register into a sse2_storehpd instruction.
2729 (define_split): Likewise, convert lowpart:DF extract from V2DF
2730 register into a sse2_storelpd instruction.
2732 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
2734 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
2737 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
2739 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
2740 against early clobber hard regs.
2742 2023-08-04 Tamar Christina <tamar.christina@arm.com>
2744 * doc/extend.texi: Document it.
2746 2023-08-04 Tamar Christina <tamar.christina@arm.com>
2749 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
2750 vec_widen_<sur>shiftl_hi_<mode>): Remove.
2751 (aarch64_<sur>shll<mode>_internal): Renamed to...
2752 (aarch64_<su>shll<mode>): .. This.
2753 (aarch64_<sur>shll2<mode>_internal): Renamed to...
2754 (aarch64_<su>shll2<mode>): .. This.
2755 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
2757 * config/aarch64/constraints.md (D2, DL): New.
2758 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
2760 2023-08-04 Tamar Christina <tamar.christina@arm.com>
2762 * gensupport.cc (conlist): Support length 0 attribute.
2764 2023-08-04 Tamar Christina <tamar.christina@arm.com>
2766 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
2767 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
2769 2023-08-04 Tamar Christina <tamar.christina@arm.com>
2771 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
2773 (aarch64_adjust_stmt_cost): Use it.
2774 (aarch64_vector_costs::count_ops): Likewise.
2775 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
2776 aarch64_adjust_stmt_cost.
2778 2023-08-04 Richard Biener <rguenther@suse.de>
2780 PR tree-optimization/110838
2781 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
2782 Fix right-shift value sanitizing. Properly emit external
2783 def mangling in the preheader rather than in the pattern
2784 def sequence where it will fail vectorizing.
2786 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
2788 PR middle-end/110316
2790 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
2791 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
2792 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
2793 (timer::validate_phases): Use integral arithmetic to check
2795 (timer::print_row, timer::print): Convert from integral
2796 nanoseconds to floating point seconds before printing.
2797 (timer::all_zero): Change limit to nanosec count instead of
2798 fractional count of seconds.
2799 (make_json_for_timevar_time_def): Convert from integral
2800 nanoseconds to floating point seconds before recording.
2801 * timevar.h (struct timevar_time_def): Update all measurements
2802 to use uint64_t nanoseconds rather than seconds stored in a
2805 2023-08-04 Richard Biener <rguenther@suse.de>
2807 PR tree-optimization/110838
2808 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
2809 the arithmetic right-shift case to non-negative operands.
2811 2023-08-04 Pan Li <pan2.li@intel.com>
2814 2023-08-04 Pan Li <pan2.li@intel.com>
2816 * config/riscv/riscv-vector-builtins-bases.cc
2817 (class vfmacc_frm): New class for vfmacc frm.
2818 (vfmacc_frm_obj): New declaration.
2820 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
2821 * config/riscv/riscv-vector-builtins-functions.def
2822 (vfmacc_frm): New function definition.
2823 * config/riscv/riscv-vector-builtins.cc
2824 (function_expander::use_ternop_insn): Add frm operand support.
2825 * config/riscv/vector.md: Add vfmuladd to frm_mode.
2827 2023-08-04 Pan Li <pan2.li@intel.com>
2830 2023-08-04 Pan Li <pan2.li@intel.com>
2832 * config/riscv/riscv-vector-builtins-bases.cc
2833 (class vfnmacc_frm): New class for vfnmacc.
2834 (vfnmacc_frm_obj): New declaration.
2836 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
2837 * config/riscv/riscv-vector-builtins-functions.def
2838 (vfnmacc_frm): New function definition.
2840 2023-08-04 Pan Li <pan2.li@intel.com>
2843 2023-08-04 Pan Li <pan2.li@intel.com>
2845 * config/riscv/riscv-vector-builtins-bases.cc
2846 (class vfmsac_frm): New class for vfmsac frm.
2847 (vfmsac_frm_obj): New declaration.
2849 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
2850 * config/riscv/riscv-vector-builtins-functions.def
2851 (vfmsac_frm): New function definition.
2853 2023-08-04 Pan Li <pan2.li@intel.com>
2856 2023-08-04 Pan Li <pan2.li@intel.com>
2858 * config/riscv/riscv-vector-builtins-bases.cc
2859 (class vfnmsac_frm): New class for vfnmsac frm.
2860 (vfnmsac_frm_obj): New declaration.
2862 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
2863 * config/riscv/riscv-vector-builtins-functions.def
2864 (vfnmsac_frm): New function definition.
2866 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
2868 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
2869 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
2870 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
2871 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
2872 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
2873 (attiny102, attiny104): New devices.
2874 * doc/avr-mmcu.texi: Regenerate.
2876 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
2878 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
2879 and PM_OFFSET entries.
2881 2023-08-04 Andrew Pinski <apinski@marvell.com>
2883 PR tree-optimization/110874
2884 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
2885 (gimple_maybe_cmp): Likewise.
2886 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
2887 and gimple_maybe_cmp instead of being recursive.
2888 * match.pd (bit_not_with_nop): New match pattern.
2889 (maybe_cmp): Likewise.
2891 2023-08-04 Drew Ross <drross@redhat.com>
2893 PR middle-end/101955
2894 * match.pd ((signed x << c) >> c): New canonicalization.
2896 2023-08-04 Pan Li <pan2.li@intel.com>
2898 * config/riscv/riscv-vector-builtins-bases.cc
2899 (class vfnmsac_frm): New class for vfnmsac frm.
2900 (vfnmsac_frm_obj): New declaration.
2902 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
2903 * config/riscv/riscv-vector-builtins-functions.def
2904 (vfnmsac_frm): New function definition.
2906 2023-08-04 Pan Li <pan2.li@intel.com>
2908 * config/riscv/riscv-vector-builtins-bases.cc
2909 (class vfmsac_frm): New class for vfmsac frm.
2910 (vfmsac_frm_obj): New declaration.
2912 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
2913 * config/riscv/riscv-vector-builtins-functions.def
2914 (vfmsac_frm): New function definition.
2916 2023-08-04 Pan Li <pan2.li@intel.com>
2918 * config/riscv/riscv-vector-builtins-bases.cc
2919 (class vfnmacc_frm): New class for vfnmacc.
2920 (vfnmacc_frm_obj): New declaration.
2922 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
2923 * config/riscv/riscv-vector-builtins-functions.def
2924 (vfnmacc_frm): New function definition.
2926 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
2929 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
2930 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
2932 2023-08-04 Pan Li <pan2.li@intel.com>
2934 * config/riscv/riscv-vector-builtins-bases.cc
2935 (class vfmacc_frm): New class for vfmacc frm.
2936 (vfmacc_frm_obj): New declaration.
2938 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
2939 * config/riscv/riscv-vector-builtins-functions.def
2940 (vfmacc_frm): New function definition.
2941 * config/riscv/riscv-vector-builtins.cc
2942 (function_expander::use_ternop_insn): Add frm operand support.
2943 * config/riscv/vector.md: Add vfmuladd to frm_mode.
2945 2023-08-04 Pan Li <pan2.li@intel.com>
2947 * config/riscv/riscv-vector-builtins-bases.cc
2948 (vfwmul_frm_obj): New declaration.
2949 (vfwmul_frm): Ditto.
2950 * config/riscv/riscv-vector-builtins-bases.h:
2951 (vfwmul_frm): Ditto.
2952 * config/riscv/riscv-vector-builtins-functions.def
2953 (vfwmul_frm): New function definition.
2954 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
2956 2023-08-04 Pan Li <pan2.li@intel.com>
2958 * config/riscv/riscv-vector-builtins-bases.cc
2959 (binop_frm): New declaration.
2960 (reverse_binop_frm): Likewise.
2962 * config/riscv/riscv-vector-builtins-bases.h:
2963 (vfdiv_frm): New extern declaration.
2964 (vfrdiv_frm): Likewise.
2965 * config/riscv/riscv-vector-builtins-functions.def
2966 (vfdiv_frm): New function definition.
2967 (vfrdiv_frm): Likewise.
2968 * config/riscv/vector.md: Add vfdiv to frm_mode.
2970 2023-08-03 Jan Hubicka <jh@suse.cz>
2972 * tree-cfg.cc (print_loop_info): Print entry count.
2974 2023-08-03 Jan Hubicka <jh@suse.cz>
2976 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
2978 2023-08-03 Jan Hubicka <jh@suse.cz>
2981 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
2982 unadjusted_exit_count.
2984 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
2986 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
2989 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
2991 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
2992 various Zicond patterns.
2993 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
2994 sfb_alu_operand for both arms of the conditional move.
2995 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
2997 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
3003 * config.gcc: Added core-builtins.cc and .o files.
3004 * config/bpf/bpf-passes.def: Removed file.
3005 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
3006 bpf_replace_core_move_operands): New prototypes.
3007 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
3008 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
3009 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
3010 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
3011 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
3013 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
3014 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
3015 (mov_reloc_core<mode>): Added.
3016 * config/bpf/core-builtins.cc (struct cr_builtin, enum
3017 cr_decision struct cr_local, struct cr_final, struct
3018 core_builtin_helpers, enum bpf_plugin_states): Added types.
3019 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
3021 (allocate_builtin_data, get_builtin-data, search_builtin_data,
3022 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
3023 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
3024 bpf_core_get_index, compute_field_expr,
3025 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
3026 process_field_expr, pack_enum_value, process_enum_value, pack_type,
3027 process_type, bpf_require_core_support, make_core_relo, read_kind,
3028 kind_access_index, kind_preserve_field_info, kind_enum_value,
3029 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
3030 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
3031 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
3032 bpf_expand_core_builtin, bpf_add_core_reloc,
3033 bpf_replace_core_move_operands): Added functions.
3034 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
3035 (bpf_init_core_builtins, bpf_expand_core_builtin,
3036 bpf_resolve_overloaded_core_builtin): Added functions.
3037 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
3038 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
3039 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
3040 * config/bpf/t-bpf: Added core-builtins.o.
3041 * doc/extend.texi: Added documentation for new BPF builtins.
3043 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
3045 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
3046 ranges to the call to relation_fold_and_or.
3047 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
3048 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
3049 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
3050 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
3051 a varying op1 and op2 to call.
3052 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
3053 (operator_equal::op1_op2_relation): New float version.
3054 (operator_not_equal::op1_op2_relation): Ditto.
3055 (operator_lt::op1_op2_relation): Ditto.
3056 (operator_le::op1_op2_relation): Ditto.
3057 (operator_gt::op1_op2_relation): Ditto.
3058 (operator_ge::op1_op2_relation) Ditto.
3059 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
3061 (operator_not_equal::op1_op2_relation): Ditto.
3062 (operator_lt::op1_op2_relation): Ditto.
3063 (operator_le::op1_op2_relation): Ditto.
3064 (operator_gt::op1_op2_relation): Ditto.
3065 (operator_ge::op1_op2_relation): Ditto.
3066 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
3068 (range_operator::op1_op2_relation): Add extra params.
3069 (operator_equal::op1_op2_relation): Ditto.
3070 (operator_not_equal::op1_op2_relation): Ditto.
3071 (operator_lt::op1_op2_relation): Ditto.
3072 (operator_le::op1_op2_relation): Ditto.
3073 (operator_gt::op1_op2_relation): Ditto.
3074 (operator_ge::op1_op2_relation): Ditto.
3075 * range-op.h (range_operator): New prototypes.
3076 (range_op_handler): Ditto.
3078 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
3080 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
3081 Use identity relation.
3082 (gori_compute::compute_operand2_range): Ditto.
3083 * value-relation.cc (get_identity_relation): New.
3084 * value-relation.h (get_identity_relation): New prototype.
3086 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
3088 * value-range.h (Value_Range::set_varying): Set the type.
3089 (Value_Range::set_zero): Ditto.
3090 (Value_Range::set_nonzero): Ditto.
3092 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
3094 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
3097 2023-08-03 Pan Li <pan2.li@intel.com>
3099 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
3101 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
3103 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
3105 2023-08-03 Richard Biener <rguenther@suse.de>
3107 PR tree-optimization/110838
3108 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
3109 Adjust the shift operand of RSHIFT_EXPRs.
3111 2023-08-03 Richard Biener <rguenther@suse.de>
3113 PR tree-optimization/110702
3114 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
3115 we created a NULL pointer based access rewrite that to
3118 2023-08-03 Richard Biener <rguenther@suse.de>
3120 * tree-ssa-sink.cc: Include tree-ssa-live.h.
3121 (pass_sink_code::execute): Instantiate virtual_operand_live
3123 (sink_code_in_bb): Pass down virtual_operand_live.
3124 (statement_sink_location): Get virtual_operand_live and
3125 verify we are not sinking loads across stores by looking up
3126 the live virtual operand at the sink location.
3128 2023-08-03 Richard Biener <rguenther@suse.de>
3130 * tree-ssa-live.h (class virtual_operand_live): New.
3131 * tree-ssa-live.cc (virtual_operand_live::init): New.
3132 (virtual_operand_live::get_live_in): Likewise.
3133 (virtual_operand_live::get_live_out): Likewise.
3135 2023-08-03 Richard Biener <rguenther@suse.de>
3137 * passes.def: Exchange loop splitting and final value
3140 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3142 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
3143 New function which handles bswap patterns for vec_perm_const.
3144 (vectorize_vec_perm_const_1): Call new function.
3145 * config/s390/vector.md (*bswap<mode>): Fix operands in output
3147 (*vstbr<mode>): New insn.
3149 2023-08-03 Alexandre Oliva <oliva@adacore.com>
3151 * config/vxworks-smp.opt: New. Introduce -msmp.
3152 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
3153 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
3154 lib_smp when -msmp is present in the command line.
3155 * doc/invoke.texi: Document it.
3157 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
3159 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
3160 when enabling -mno-omit-leaf-frame-pointer
3161 (riscv_option_override): Override omit-frame-pointer.
3162 (riscv_frame_pointer_required): Save s0 for non-leaf function
3163 (TARGET_FRAME_POINTER_REQUIRED): Override defination
3164 * config/riscv/riscv.opt: Add option support.
3166 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
3169 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
3170 place operand in a register before gen_<insn>64ti2_doubleword.
3171 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
3172 operand in a register before gen_<insn>32di2_doubleword.
3173 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
3174 (<any_rotate>64ti2_doubleword): Likewise.
3176 2023-08-03 Pan Li <pan2.li@intel.com>
3178 * config/riscv/riscv-vector-builtins-bases.cc
3179 (vfmul_frm_obj): New declaration.
3181 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
3182 * config/riscv/riscv-vector-builtins-functions.def
3183 (vfmul_frm): New function definition.
3184 * config/riscv/vector.md: Add vfmul to frm_mode.
3186 2023-08-03 Andrew Pinski <apinski@marvell.com>
3188 * match.pd (`~X & X`): Check that the types match.
3189 (`~x | x`, `~x ^ x`): Likewise.
3191 2023-08-03 Pan Li <pan2.li@intel.com>
3193 * config/riscv/riscv-vector-builtins-bases.h: Remove
3194 redudant declaration.
3196 2023-08-03 Pan Li <pan2.li@intel.com>
3198 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
3200 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
3201 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
3202 Add vfwsub function definitions.
3204 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3206 PR rtl-optimization/110867
3207 * combine.cc (simplify_compare_const): Try the optimization only
3208 in case the constant fits into the comparison mode.
3210 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
3212 * config/riscv/zicond.md: Remove incorrect zicond patterns and
3213 renumber/rename them.
3214 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
3216 2023-08-02 Richard Biener <rguenther@suse.de>
3218 * tree-phinodes.h (add_phi_node_to_bb): Remove.
3219 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
3221 2023-08-02 Jan Beulich <jbeulich@suse.com>
3223 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
3224 two of the alternatives.
3226 2023-08-02 Richard Biener <rguenther@suse.de>
3228 PR tree-optimization/92335
3229 * tree-ssa-sink.cc (select_best_block): Before loop
3230 optimizations avoid sinking unconditional loads/stores
3231 in innermost loops to conditional executed places.
3233 2023-08-02 Andrew Pinski <apinski@marvell.com>
3235 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
3236 the comparison operands before comparing them.
3238 2023-08-02 Andrew Pinski <apinski@marvell.com>
3240 * match.pd (`~X & X`, `~X | X`): Move over to
3241 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
3242 handles that already.
3243 Remove range test simplifications to true/false as they
3244 are now handled by these patterns.
3246 2023-08-02 Andrew Pinski <apinski@marvell.com>
3248 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
3249 statement's lhs and rhs to check if trivial dead.
3250 Rename inserted_exprs to exprs_maybe_dce; also move it so
3251 bitmap is not allocated if not needed.
3253 2023-08-02 Pan Li <pan2.li@intel.com>
3255 * config/riscv/riscv-vector-builtins-bases.cc
3256 (class widen_binop_frm): New class for binop frm.
3257 (BASE): Add vfwadd_frm.
3258 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
3259 * config/riscv/riscv-vector-builtins-functions.def
3260 (vfwadd_frm): New function definition.
3261 * config/riscv/riscv-vector-builtins-shapes.cc
3262 (BASE_NAME_MAX_LEN): New macro.
3263 (struct alu_frm_def): Leverage new base class.
3264 (struct build_frm_base): New build base for frm.
3265 (struct widen_alu_frm_def): New struct for widen alu frm.
3266 (SHAPE): Add widen_alu_frm shape.
3267 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
3268 * config/riscv/vector.md (frm_mode): Add vfwalu type.
3270 2023-08-02 Jan Hubicka <jh@suse.cz>
3272 * cfgloop.h (loop_count_in): Declare.
3273 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
3274 (loop_count_in): Move here from ...
3275 * cfgloopmanip.cc (loop_count_in): ... here.
3276 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
3278 2023-08-02 Jan Hubicka <jh@suse.cz>
3280 * cfg.cc (scale_strictly_dominated_blocks): New function.
3281 * cfg.h (scale_strictly_dominated_blocks): Declare.
3282 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
3284 2023-08-02 Richard Biener <rguenther@suse.de>
3286 PR rtl-optimization/110587
3287 * lra-spills.cc (return_regno_p): Remove.
3288 (regno_in_use_p): Likewise.
3289 (lra_final_code_change): Do not remove noop moves
3290 between hard registers.
3292 2023-08-02 liuhongt <hongtao.liu@intel.com>
3295 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
3296 HFmode, use mode iterator VFH instead.
3297 (vec_fmsubadd<mode>4): Ditto.
3298 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
3299 Remove scalar mode from iterator, use VFH_AVX512VL instead.
3300 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
3303 2023-08-02 liuhongt <hongtao.liu@intel.com>
3305 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
3306 pre_reload define_insn_and_split.
3308 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
3310 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
3311 using Zicond to implement some conditional moves.
3313 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
3315 * config/riscv/zicond.md: Use the X iterator instead of ANYI
3316 on the comparison input operands.
3318 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
3320 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
3322 (case SET): For INSNs that just set a REG, take the cost from the
3324 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
3326 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
3328 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
3329 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
3330 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
3331 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
3332 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
3333 (OPTION_MASK_ISA_ABM_SET):
3334 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
3336 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
3338 * config/s390/s390.cc (s390_encode_section_info): Assume external
3339 symbols without explicit alignment to be unaligned if
3340 -munaligned-symbols has been specified.
3341 * config/s390/s390.opt (-munaligned-symbols): New option.
3343 2023-08-01 Richard Ball <richard.ball@arm.com>
3345 * gimple-fold.cc (fold_ctor_reference):
3346 Add support for poly_int.
3348 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
3351 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
3352 LABEL_NUSES of new conditional branch instruction.
3354 2023-08-01 Jan Hubicka <jh@suse.cz>
3356 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
3357 constant prologue peeling.
3359 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
3361 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
3363 2023-08-01 Pan Li <pan2.li@intel.com>
3364 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3366 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
3367 (STATIC_FRM_P): Ditto.
3368 (struct mode_switching_info): New struct for mode switching.
3369 (struct machine_function): Add new field mode switching.
3370 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
3371 (riscv_frm_adjust_mode_after_call): New function for call mode.
3372 (riscv_frm_emit_after_call_in_bb_end): New function for emit
3373 insn when call as the end of bb.
3374 (riscv_frm_mode_needed): New function for frm mode needed.
3375 (frm_unknown_dynamic_p): Remove call check.
3376 (riscv_mode_needed): Extrac function for frm.
3377 (riscv_frm_mode_after): Add DYN_CALL after.
3378 (riscv_mode_entry): Remove backup rtl initialization.
3379 * config/riscv/vector.md (frm_mode): Add dyn_call.
3380 (fsrmsi_restore_exit): Rename to _volatile.
3381 (fsrmsi_restore_volatile): Likewise.
3383 2023-08-01 Pan Li <pan2.li@intel.com>
3385 * config/riscv/riscv-vector-builtins-bases.cc
3386 (class reverse_binop_frm): Add new template for reversed frm.
3387 (vfsub_frm_obj): New obj.
3388 (vfrsub_frm_obj): Likewise.
3389 * config/riscv/riscv-vector-builtins-bases.h:
3390 (vfsub_frm): New declaration.
3391 (vfrsub_frm): Likewise.
3392 * config/riscv/riscv-vector-builtins-functions.def
3393 (vfsub_frm): New function define.
3394 (vfrsub_frm): Likewise.
3396 2023-08-01 Andrew Pinski <apinski@marvell.com>
3398 PR tree-optimization/93044
3399 * match.pd (nested int casts): A truncation (to the same size or smaller)
3400 can always remove the inner cast.
3402 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
3405 * doc/invoke.texi (-Wmissing-variable-declarations): Document
3408 2023-07-31 Andrew Pinski <apinski@marvell.com>
3410 PR tree-optimization/106164
3411 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
3412 `a == b | a < b`, `a == b | a > b`): Handle these cases
3415 2023-07-31 Andrew Pinski <apinski@marvell.com>
3417 PR tree-optimization/106164
3418 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
3419 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
3421 2023-07-31 Andrew Pinski <apinski@marvell.com>
3423 PR tree-optimization/100864
3424 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
3425 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
3426 (gimple_bitwise_inverted_equal_p): New function.
3427 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
3428 instead of direct matching bit_not.
3430 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
3433 * gcc-ar.cc (main): Expand argv and use
3434 temporary response file to call ar if any
3435 expansions were made.
3437 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
3439 PR tree-optimization/110582
3440 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
3441 range vector for non-ssa names.
3443 2023-07-31 David Malcolm <dmalcolm@redhat.com>
3446 * diagnostic-client-data-hooks.h (class sarif_object): New forward
3448 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
3450 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
3451 (class sarif_invocation): Inherit from sarif_object rather than
3453 (class sarif_result): Likewise.
3454 (class sarif_ice_notification): Likewise.
3455 (sarif_object::get_or_create_properties): New.
3456 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
3457 to call the context's add_sarif_invocation_properties hook.
3458 (sarif_builder::flush_to_file): Pass m_context to
3459 sarif_invocation::prepare_to_flush.
3460 * diagnostic-format-sarif.h: New header.
3461 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
3462 writes to stderr. Document that if SARIF diagnostic output is
3463 requested then any timing information is written in JSON form as
3464 part of the SARIF output, rather than to stderr.
3465 * timevar.cc: Include "json.h".
3466 (timer::named_items::m_hash_map): Split out type into...
3467 (timer::named_items::hash_map_t): ...this new typedef.
3468 (timer::named_items::make_json): New function.
3469 (timevar_diff): New function.
3470 (make_json_for_timevar_time_def): New function.
3471 (timer::timevar_def::make_json): New function.
3472 (timer::make_json): New function.
3473 * timevar.h (class json::value): New forward decl.
3474 (timer::make_json): New decl.
3475 (timer::timevar_def::make_json): New decl.
3476 * tree-diagnostic-client-data-hooks.cc: Include
3477 "diagnostic-format-sarif.h" and "timevar.h".
3478 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
3481 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3483 * combine.cc (simplify_compare_const): Narrow comparison of
3484 memory and constant.
3485 (try_combine): Adapt new function signature.
3486 (simplify_comparison): Adapt new function signature.
3488 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
3490 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
3492 (expand_vector_init_insert_elems): Ditto.
3494 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
3497 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
3498 single_defuse_cycle while counting reduction_latency.
3500 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
3502 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
3503 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
3524 (COND_LEN_ADD): Ditto.
3525 (COND_LEN_SUB): Ditto.
3526 (COND_LEN_MUL): Ditto.
3527 (COND_LEN_DIV): Ditto.
3528 (COND_LEN_MOD): Ditto.
3529 (COND_LEN_RDIV): Ditto.
3530 (COND_LEN_MIN): Ditto.
3531 (COND_LEN_MAX): Ditto.
3532 (COND_LEN_FMIN): Ditto.
3533 (COND_LEN_FMAX): Ditto.
3534 (COND_LEN_AND): Ditto.
3535 (COND_LEN_IOR): Ditto.
3536 (COND_LEN_XOR): Ditto.
3537 (COND_LEN_SHL): Ditto.
3538 (COND_LEN_SHR): Ditto.
3539 (COND_LEN_FMA): Ditto.
3540 (COND_LEN_FMS): Ditto.
3541 (COND_LEN_FNMA): Ditto.
3542 (COND_LEN_FNMS): Ditto.
3543 (COND_LEN_NEG): Ditto.
3544 (ADD): New macro define.
3565 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
3568 * config/i386/i386-features.cc (compute_convert_gain): Check
3569 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
3570 and V4SImode rotates in STV.
3571 (general_scalar_chain::convert_rotate): Likewise.
3573 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
3575 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
3576 * config/riscv/riscv-protos.h (get_mask_mode): Update return
3578 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
3580 (emit_vlmax_insn): Ditto.
3581 (emit_vlmax_fp_insn): Ditto.
3582 (emit_vlmax_ternary_insn): Ditto.
3583 (emit_vlmax_fp_ternary_insn): Ditto.
3584 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
3585 (emit_nonvlmax_insn): Ditto.
3586 (emit_vlmax_slide_insn): Ditto.
3587 (emit_nonvlmax_slide_tu_insn): Ditto.
3588 (emit_vlmax_merge_insn): Ditto.
3589 (emit_vlmax_masked_insn): Ditto.
3590 (emit_nonvlmax_masked_insn): Ditto.
3591 (emit_vlmax_masked_store_insn): Ditto.
3592 (emit_nonvlmax_masked_store_insn): Ditto.
3593 (emit_vlmax_masked_mu_insn): Ditto.
3594 (emit_nonvlmax_tu_insn): Ditto.
3595 (emit_nonvlmax_fp_tu_insn): Ditto.
3596 (emit_scalar_move_insn): Ditto.
3597 (emit_vlmax_compress_insn): Ditto.
3598 (emit_vlmax_reduction_insn): Ditto.
3599 (emit_vlmax_fp_reduction_insn): Ditto.
3600 (emit_nonvlmax_fp_reduction_insn): Ditto.
3601 (expand_vec_series): Ditto.
3602 (expand_vector_init_merge_repeating_sequence): Ditto.
3603 (expand_vec_perm): Ditto.
3604 (shuffle_merge_patterns): Ditto.
3605 (shuffle_compress_patterns): Ditto.
3606 (shuffle_decompress_patterns): Ditto.
3607 (expand_reduction): Ditto.
3608 (get_mask_mode): Update return type.
3609 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
3610 is valid, and use new get_mask_mode interface.
3612 2023-07-31 Pan Li <pan2.li@intel.com>
3614 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
3615 Move rm suffix before mask.
3617 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3619 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
3620 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
3623 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
3626 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
3627 (extzv<mode>): Likewise.
3628 (insv<mode>): Likewise.
3629 (*testqi_ext_3): Likewise.
3630 (*btr<mode>_2): Likewise.
3631 (define_split): Likewise.
3632 (*btsq_imm): Likewise.
3633 (*btrq_imm): Likewise.
3634 (*btcq_imm): Likewise.
3635 (define_peephole2 x3): Likewise.
3636 (*bt<mode>): Likewise
3637 (*bt<mode>_mask): New define_insn_and_split.
3638 (*jcc_bt<mode>): Use QImode for offsets.
3639 (*jcc_bt<mode>_1): Delete obsolete pattern.
3640 (*jcc_bt<mode>_mask): Use QImode offsets.
3641 (*jcc_bt<mode>_mask_1): Likewise.
3642 (define_split): Likewise.
3643 (*bt<mode>_setcqi): Likewise.
3644 (*bt<mode>_setncqi): Likewise.
3645 (*bt<mode>_setnc<mode>): Likewise.
3646 (*bt<mode>_setncqi_2): Likewise.
3647 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
3648 (bmi2_bzhi_<mode>3): Use QImode offsets.
3649 (*bmi2_bzhi_<mode>3): Likewise.
3650 (*bmi2_bzhi_<mode>3_1): Likewise.
3651 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
3652 (@tbm_bextri_<mode>): Likewise.
3654 2023-07-29 Jan Hubicka <jh@suse.cz>
3656 * profile-count.cc (profile_probability::sqrt): New member function.
3657 (profile_probability::pow): Likewise.
3658 * profile-count.h: (profile_probability::sqrt): Declare
3659 (profile_probability::pow): Likewise.
3660 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
3662 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
3664 * gimple-range-cache.cc (ssa_cache::merge_range): New.
3665 (ssa_lazy_cache::merge_range): New.
3666 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
3667 (class ssa_lazy_cache): Ditto.
3668 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
3670 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
3672 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
3673 Move from value-query.cc.
3674 (substitute_and_fold_engine::value_of_stmt): Ditto.
3675 (substitute_and_fold_engine::range_of_expr): New.
3676 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
3677 range_query. New prototypes.
3678 * value-query.cc (value_query::value_on_edge): Relocate.
3679 (value_query::value_of_stmt): Ditto.
3680 * value-query.h (class value_query): Remove.
3681 (class range_query): Remove base class. Adjust prototypes.
3683 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
3685 PR tree-optimization/110205
3686 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
3687 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
3689 * range-op.cc (operator_lshift): Add missing final overrides.
3690 (operator_rshift): Ditto.
3692 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
3694 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
3695 optimizations in BPF target.
3697 2023-07-28 Honza <jh@ryzen4.suse.cz>
3699 * cfgloopmanip.cc (loop_count_in): Break out from ...
3700 (loop_exit_for_scaling): Break out from ...
3701 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
3702 add more sanity check and debug info.
3703 (scale_loop_profile): ... here.
3704 (create_empty_loop_on_edge): Fix whitespac.
3705 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
3706 * loop-unroll.cc (unroll_loop_constant_iterations): Use
3707 update_loop_exit_probability_scale_dom_bbs.
3708 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
3709 (tree_transform_and_unroll_loop): Use
3710 update_loop_exit_probability_scale_dom_bbs.
3711 * tree-ssa-loop-split.cc (split_loop): Use
3712 update_loop_exit_probability_scale_dom_bbs.
3714 2023-07-28 Jan Hubicka <jh@suse.cz>
3717 * tree-ssa-loop-split.cc: Include value-query.h.
3718 (split_at_bb_p): Analyze cases where EQ/NE can be turned
3719 into LT/LE/GT/GE; return updated guard code.
3720 (split_loop): Use guard code.
3722 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
3723 Richard Biener <rguenther@suse.de>
3726 PR rtl-optimization/110587
3727 * expr.cc (emit_group_load_1): Simplify logic for calling
3728 force_reg on ORIG_SRC, to avoid making a copy if the source
3729 is already in a pseudo register.
3731 2023-07-28 Jan Hubicka <jh@suse.cz>
3733 PR middle-end/106923
3734 * tree-ssa-loop-split.cc (connect_loops): Change probability
3735 of the test preconditioning second loop to very_likely.
3736 (fix_loop_bb_probability): Handle correctly case where
3737 on of the arms of the conditional is empty.
3738 (split_loop): Fold the test guarding first condition to
3739 see if it is constant true; Set correct entry block
3740 probabilities of the split loops; determine correct loop
3743 2023-07-28 xuli <xuli1@eswincomputing.com>
3745 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
3746 vsadd[u] and vssub[u].
3747 * config/riscv/vector.md: Ditto.
3749 2023-07-28 Jan Hubicka <jh@suse.cz>
3751 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
3752 loops when IV test is not overflowing.
3754 2023-07-28 liuhongt <hongtao.liu@intel.com>
3757 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
3759 (avx512cd_maskw_vec_dup<mode>): Ditto.
3761 2023-07-27 David Faust <david.faust@oracle.com>
3765 * config/bpf/bpf.opt (msmov): New option.
3766 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
3767 * config/bpf/bpf.md (*extendsidi2): New.
3773 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
3774 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
3775 also enables -msmov.
3777 2023-07-27 David Faust <david.faust@oracle.com>
3779 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
3780 Add -mbswap and -msdiv eBPF options.
3781 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
3782 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
3785 2023-07-27 David Faust <david.faust@oracle.com>
3787 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
3788 in pseudo-C dialect output template.
3789 (sub<AM:mode>3): Likewise.
3791 2023-07-27 Jan Hubicka <jh@suse.cz>
3793 * tree-vect-loop.cc (optimize_mask_stores): Make store
3796 2023-07-27 Jan Hubicka <jh@suse.cz>
3798 * cfgloop.h (single_dom_exit): Declare.
3799 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
3800 * cfgrtl.cc (struct cfg_hooks): Fix comment.
3801 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
3802 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
3803 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
3805 (tree_transform_and_unroll_loop): ... here;
3807 2023-07-27 Jan Hubicka <jh@suse.cz>
3809 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
3810 tree-ssa-loop-manip.cc and avoid recursion.
3811 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
3812 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
3814 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
3815 (scale_dominated_blocks_in_loop): Declare.
3816 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
3817 (change_edge_frequency): Remove.
3818 * predict.h (change_edge_frequency): Remove.
3819 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
3821 (niter_for_unrolled_loop): Remove.
3822 (tree_transform_and_unroll_loop): Fix profile update.
3824 2023-07-27 Jan Hubicka <jh@suse.cz>
3826 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
3827 to guessed; fix count of new_bb.
3829 2023-07-27 Jan Hubicka <jh@suse.cz>
3831 * profile-count.h (profile_count::apply_probability): Fix
3832 handling of uninitialized probabilities, optimize scaling
3835 2023-07-27 Richard Biener <rguenther@suse.de>
3837 PR tree-optimization/91838
3838 * gimple-match-head.cc: Include attribs.h and asan.h.
3839 * generic-match-head.cc: Likewise.
3840 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
3842 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3844 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
3845 (ADJUST_ALIGNMENT): Ditto.
3846 (ADJUST_PRECISION): Ditto.
3848 (VECTOR_MODE_WITH_PREFIX): Ditto.
3849 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
3850 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
3851 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
3852 (legitimize_move): Enable basic VLS modes support.
3855 (get_vector_mode): Ditto.
3856 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
3857 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
3858 (VLS_ENTRY): New macro.
3859 (riscv_v_ext_mode_p): Add vls modes.
3860 (riscv_get_v_regno_alignment): New function.
3861 (riscv_print_operand): Add vls modes.
3862 (riscv_hard_regno_nregs): Ditto.
3863 (riscv_hard_regno_mode_ok): Ditto.
3864 (riscv_regmode_natural_size): Ditto.
3865 (riscv_vectorize_preferred_vector_alignment): Ditto.
3866 * config/riscv/riscv.md: Ditto.
3867 * config/riscv/vector-iterators.md: Ditto.
3868 * config/riscv/vector.md: Ditto.
3869 * config/riscv/autovec-vls.md: New file.
3871 2023-07-27 Pan Li <pan2.li@intel.com>
3873 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
3875 (vwrite_csr): Ditto.
3877 2023-07-27 demin.han <demin.han@starfivetech.com>
3879 * config/riscv/autovec.md: Delete which_alternative use in split
3881 2023-07-27 Richard Biener <rguenther@suse.de>
3883 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
3885 (pass_sink_code::execute): ... in the caller.
3887 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
3888 Richard Biener <rguenther@suse.de>
3890 PR tree-optimization/110776
3891 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
3894 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
3896 * config/riscv/riscv.md: Include zicond.md
3897 * config/riscv/zicond.md: New file.
3899 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
3901 * common/config/riscv/riscv-common.cc: New extension.
3902 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
3903 (TARGET_ZICOND): New target.
3905 2023-07-26 Carl Love <cel@us.ibm.com>
3907 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
3908 specifies the number of built-in arguments to check.
3909 (altivec_resolve_overloaded_builtin): Update calls to find_instance
3910 to pass the number of built-in arguments to be checked.
3912 2023-07-26 David Faust <david.faust@oracle.com>
3914 * config/bpf/bpf.opt (mv3-atomics): New option.
3915 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
3916 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
3917 (REG_CLASS_NAMES): Likewise.
3918 (REG_CLASS_CONTENTS): Likewise.
3919 (REGNO_REG_CLASS): Handle R0.
3920 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
3921 (UNSPEC_AAND): New unspec.
3922 (UNSPEC_AOR): Likewise.
3923 (UNSPEC_AXOR): Likewise.
3924 (UNSPEC_AFADD): Likewise.
3925 (UNSPEC_AFAND): Likewise.
3926 (UNSPEC_AFOR): Likewise.
3927 (UNSPEC_AFXOR): Likewise.
3928 (UNSPEC_AXCHG): Likewise.
3929 (UNSPEC_ACMPX): Likewise.
3930 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
3932 * config/bpf/atomic.md: ...Here. New file.
3933 * config/bpf/constraints.md (t): New constraint for R0.
3934 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
3936 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
3938 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
3941 2023-07-26 Carl Love <cel@us.ibm.com>
3943 * config/rs6000/rs6000-builtins.def: Rename
3944 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
3945 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
3946 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
3947 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
3948 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
3949 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
3950 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
3951 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
3952 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
3953 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
3954 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
3955 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
3956 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
3957 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
3958 * config/rs6000/rs6000-c.cc (find_instance): Add case
3959 RS6000_OVLD_VEC_REPLACE_UN.
3960 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
3961 Fix first argument type. Rename VREPLACE_UN_UV4SI as
3962 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
3963 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
3964 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
3965 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
3966 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
3967 REPLACE_ELT_V for vector modes.
3968 (REPLACE_ELT): New scalar mode iterator.
3969 (REPLACE_ELT_char): Add scalar attributes.
3970 (vreplace_un_<mode>): Change iterator and mode attribute.
3972 2023-07-26 David Malcolm <dmalcolm@redhat.com>
3975 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
3977 2023-07-26 Richard Biener <rguenther@suse.de>
3979 PR tree-optimization/106081
3980 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
3981 Assign layout -1 to splats.
3983 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
3985 * range-op-mixed.h (class operator_cast): Add update_bitmask.
3986 * range-op.cc (operator_cast::update_bitmask): New.
3987 (operator_cast::fold_range): Call update_bitmask.
3989 2023-07-26 Li Xu <xuli1@eswincomputing.com>
3991 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
3992 scalar type to float16, eliminate warning.
3993 (vfloat16mf4x3_t): Ditto.
3994 (vfloat16mf4x4_t): Ditto.
3995 (vfloat16mf4x5_t): Ditto.
3996 (vfloat16mf4x6_t): Ditto.
3997 (vfloat16mf4x7_t): Ditto.
3998 (vfloat16mf4x8_t): Ditto.
3999 (vfloat16mf2x2_t): Ditto.
4000 (vfloat16mf2x3_t): Ditto.
4001 (vfloat16mf2x4_t): Ditto.
4002 (vfloat16mf2x5_t): Ditto.
4003 (vfloat16mf2x6_t): Ditto.
4004 (vfloat16mf2x7_t): Ditto.
4005 (vfloat16mf2x8_t): Ditto.
4006 (vfloat16m1x2_t): Ditto.
4007 (vfloat16m1x3_t): Ditto.
4008 (vfloat16m1x4_t): Ditto.
4009 (vfloat16m1x5_t): Ditto.
4010 (vfloat16m1x6_t): Ditto.
4011 (vfloat16m1x7_t): Ditto.
4012 (vfloat16m1x8_t): Ditto.
4013 (vfloat16m2x2_t): Ditto.
4014 (vfloat16m2x3_t): Ditto.
4015 (vfloat16m2x4_t): Ditto.
4016 (vfloat16m4x2_t): Ditto.
4017 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
4018 * config/riscv/vector.md: add tuple mode in attr sew.
4020 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
4023 * config/i386/i386.md (plusminusmult): New code iterator.
4024 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
4025 (movq_<mode>_to_sse): New expander.
4026 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
4027 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
4028 as a wrapper around V4SFmode operation.
4029 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
4030 nonimmediate_operand.
4031 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
4032 operand 2 predicates to nonimmediate_operand.
4033 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
4034 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
4035 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
4036 operand 2 predicates to nonimmediate_operand.
4037 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
4038 nonimmediate_operand.
4039 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
4040 operand 2 predicates to nonimmediate_operand.
4041 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
4042 (<smaxmin:code>v2sf3): Ditto.
4043 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
4044 predicates to nonimmediate_operand.
4045 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
4046 operand 1 and operand 2 predicates to nonimmediate_operand.
4047 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
4048 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
4049 (*mmx_haddv2sf3_low): Ditto.
4050 (*mmx_hsubv2sf3_low): Ditto.
4051 (vec_addsubv2sf3): Ditto.
4052 (*mmx_maskcmpv2sf3_comm): Remove.
4053 (*mmx_maskcmpv2sf3): Remove.
4054 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
4055 (vcond<V2FI:mode>v2sf): Ditto.
4060 (fix_truncv2sfv2si2): Ditto.
4061 (fixuns_truncv2sfv2si2): Ditto.
4062 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
4063 Change operand 1 predicate to nonimmediate_operand.
4064 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
4065 (floatunsv2siv2sf2): Ditto.
4066 (mmx_floatv2siv2sf2): Remove SSE alternatives.
4067 Change operand 1 predicate to nonimmediate_operand.
4068 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
4070 (lrintv2sfv2si2): Ditto.
4072 (lceilv2sfv2si2): Ditto.
4073 (floorv2sf2): Ditto.
4074 (lfloorv2sfv2si2): Ditto.
4075 (btruncv2sf2): Ditto.
4076 (roundv2sf2): Ditto.
4077 (lroundv2sfv2si2): Ditto.
4078 (*mmx_roundv2sf2): Remove.
4080 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
4082 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
4084 2023-07-26 Richard Biener <rguenther@suse.de>
4086 PR tree-optimization/110799
4087 * tree-ssa-pre.cc (compute_avail): More thoroughly match
4088 up TBAA behavior of redundant loads.
4090 2023-07-26 Jakub Jelinek <jakub@redhat.com>
4092 PR tree-optimization/110755
4093 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
4094 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
4095 it is exact op1 + (-op1) or op1 - op1.
4097 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
4100 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
4101 operands output with "x".
4103 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
4105 * range-op.cc (class operator_absu): Add update_bitmask.
4106 (operator_absu::update_bitmask): New.
4108 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
4110 * range-op-mixed.h (class operator_abs): Add update_bitmask.
4111 * range-op.cc (operator_abs::update_bitmask): New.
4113 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
4115 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
4116 * range-op.cc (operator_bitwise_not::update_bitmask): New.
4118 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
4120 * range-op.cc (update_known_bitmask): Handle unary operators.
4122 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
4124 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
4126 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
4128 * config/riscv/riscv.md: Likewise.
4130 2023-07-26 Jan Hubicka <jh@suse.cz>
4132 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
4133 if we divide by zero.
4135 2023-07-25 David Faust <david.faust@oracle.com>
4137 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
4138 enclosing parentheses for pseudo-C dialect.
4139 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
4140 operands of pseudo-C dialect output templates where needed.
4141 (zero_extendqidi2): Likewise.
4142 (zero_extendsidi2): Likewise.
4143 (*mov<MM:mode>): Likewise.
4145 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
4147 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
4148 (bit_value_mult_const): Same.
4149 (get_individual_bits): Same.
4151 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
4154 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
4155 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
4156 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
4157 (minmax_op): New int attribute.
4158 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
4159 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
4160 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
4162 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
4164 2023-07-24 David Faust <david.faust@oracle.com>
4166 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
4168 2023-07-24 Drew Ross <drross@redhat.com>
4169 Jakub Jelinek <jakub@redhat.com>
4171 PR middle-end/109986
4172 * generic-match-head.cc (bitwise_equal_p): New macro.
4173 * gimple-match-head.cc (bitwise_equal_p): New macro.
4174 (gimple_nop_convert): Declare.
4175 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
4176 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
4178 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
4180 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
4181 single quote rather than backquote in diagnostic.
4183 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
4186 * config/bpf/bpf.opt: New command-line option -msdiv.
4187 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
4188 * config/bpf/bpf.cc (bpf_option_override): Initialize
4190 * doc/invoke.texi (eBPF Options): Document -msdiv.
4192 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
4194 * config/riscv/riscv.cc (riscv_option_override): Spell out
4195 greater than and use cannot in diagnostic string.
4197 2023-07-24 Richard Biener <rguenther@suse.de>
4199 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
4200 (_slp_tree::vec_stmts): Remove.
4201 (SLP_TREE_VEC_STMTS): Remove.
4202 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
4203 (_slp_tree::_slp_tree): Adjust.
4204 (_slp_tree::~_slp_tree): Likewise.
4205 (vect_get_slp_vect_def): Simplify.
4206 (vect_get_slp_defs): Likewise.
4207 (vect_transform_slp_perm_load_1): Adjust.
4208 (vect_add_slp_permutation): Likewise.
4209 (vect_schedule_slp_node): Likewise.
4210 (vectorize_slp_instance_root_stmt): Likewise.
4211 (vect_schedule_scc): Likewise.
4212 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
4213 (vectorizable_call): Likewise.
4214 (vectorizable_call): Likewise.
4215 (vect_create_vectorized_demotion_stmts): Likewise.
4216 (vectorizable_conversion): Likewise.
4217 (vectorizable_assignment): Likewise.
4218 (vectorizable_shift): Likewise.
4219 (vectorizable_operation): Likewise.
4220 (vectorizable_load): Likewise.
4221 (vectorizable_condition): Likewise.
4222 (vectorizable_comparison): Likewise.
4223 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
4224 (vectorize_fold_left_reduction): Use push_vec_def.
4225 (vect_transform_reduction): Likewise.
4226 (vect_transform_cycle_phi): Likewise.
4227 (vectorizable_lc_phi): Likewise.
4228 (vectorizable_phi): Likewise.
4229 (vectorizable_recurr): Likewise.
4230 (vectorizable_induction): Likewise.
4231 (vectorizable_live_operation): Likewise.
4233 2023-07-24 Richard Biener <rguenther@suse.de>
4235 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
4237 2023-07-24 Richard Biener <rguenther@suse.de>
4239 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
4240 * config/i386/i386-expand.cc: Likewise.
4241 * config/i386/i386-features.cc: Likewise.
4242 * config/i386/i386-options.cc: Likewise.
4244 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
4246 * tree-vect-stmts.cc (vectorizable_conversion): Handle
4247 more demotion/promotion for modifier == NONE.
4249 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
4254 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
4255 (extzv<mode>): Likewise.
4256 (insv<mode>): Likewise.
4257 (*testqi_ext_3): Likewise.
4258 (*btr<mode>_2): Likewise.
4259 (define_split): Likewise.
4260 (*btsq_imm): Likewise.
4261 (*btrq_imm): Likewise.
4262 (*btcq_imm): Likewise.
4263 (define_peephole2 x3): Likewise.
4264 (*bt<mode>): Likewise
4265 (*bt<mode>_mask): New define_insn_and_split.
4266 (*jcc_bt<mode>): Use QImode for offsets.
4267 (*jcc_bt<mode>_1): Delete obsolete pattern.
4268 (*jcc_bt<mode>_mask): Use QImode offsets.
4269 (*jcc_bt<mode>_mask_1): Likewise.
4270 (define_split): Likewise.
4271 (*bt<mode>_setcqi): Likewise.
4272 (*bt<mode>_setncqi): Likewise.
4273 (*bt<mode>_setnc<mode>): Likewise.
4274 (*bt<mode>_setncqi_2): Likewise.
4275 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
4276 (bmi2_bzhi_<mode>3): Use QImode offsets.
4277 (*bmi2_bzhi_<mode>3): Likewise.
4278 (*bmi2_bzhi_<mode>3_1): Likewise.
4279 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
4280 (@tbm_bextri_<mode>): Likewise.
4282 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
4284 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
4285 * config/bpf/bpf.opt (mkernel): Remove option.
4286 * config/bpf/bpf.cc (bpf_target_macros): Do not define
4287 BPF_KERNEL_VERSION_CODE.
4289 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
4292 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
4293 (mbswap): New option.
4294 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
4295 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
4296 * config/bpf/bpf.md: Use bswap instructions if available for
4297 bswap* insn, and fix constraint.
4298 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
4300 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4302 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
4303 (mask_len_fold_left_plus_<mode>): Ditto.
4304 * config/riscv/riscv-protos.h (enum insn_type): New enum.
4305 (enum reduction_type): Ditto.
4306 (expand_reduction): Add in-order reduction.
4307 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
4308 (expand_reduction): Add in-order reduction.
4310 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
4312 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
4313 (vectorize_fold_left_reduction): Ditto.
4314 (vectorizable_reduction): Ditto.
4315 (vect_transform_reduction): Ditto.
4317 2023-07-24 Richard Biener <rguenther@suse.de>
4319 PR tree-optimization/110777
4320 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
4321 Avoid propagating abnormals.
4323 2023-07-24 Richard Biener <rguenther@suse.de>
4325 PR tree-optimization/110766
4326 * tree-scalar-evolution.cc
4327 (analyze_and_compute_bitwise_induction_effect): Check the PHI
4328 is defined in the loop header.
4330 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
4332 PR tree-optimization/110740
4333 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
4334 loop with a single scalar iteration.
4336 2023-07-24 Pan Li <pan2.li@intel.com>
4338 * config/riscv/riscv-vector-builtins-shapes.cc
4339 (struct alu_frm_def): Take range check.
4341 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
4344 * config/riscv/predicates.md (const_0_operand): Add back
4347 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
4349 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
4350 64-bit insertions into TImode optimizations with -O0, unless
4351 the function has the "naked" attribute (for PR target/110533).
4353 2023-07-22 Andrew Pinski <apinski@marvell.com>
4356 * rtl.h (extended_count): Change last argument type
4359 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
4361 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
4362 (extzv<mode>): Likewise.
4363 (insv<mode>): Likewise.
4364 (*testqi_ext_3): Likewise.
4365 (*btr<mode>_2): Likewise.
4366 (define_split): Likewise.
4367 (*btsq_imm): Likewise.
4368 (*btrq_imm): Likewise.
4369 (*btcq_imm): Likewise.
4370 (define_peephole2 x3): Likewise.
4371 (*bt<mode>): Likewise
4372 (*bt<mode>_mask): New define_insn_and_split.
4373 (*jcc_bt<mode>): Use QImode for offsets.
4374 (*jcc_bt<mode>_1): Delete obsolete pattern.
4375 (*jcc_bt<mode>_mask): Use QImode offsets.
4376 (*jcc_bt<mode>_mask_1): Likewise.
4377 (define_split): Likewise.
4378 (*bt<mode>_setcqi): Likewise.
4379 (*bt<mode>_setncqi): Likewise.
4380 (*bt<mode>_setnc<mode>): Likewise.
4381 (*bt<mode>_setncqi_2): Likewise.
4382 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
4383 (bmi2_bzhi_<mode>3): Use QImode offsets.
4384 (*bmi2_bzhi_<mode>3): Likewise.
4385 (*bmi2_bzhi_<mode>3_1): Likewise.
4386 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
4387 (@tbm_bextri_<mode>): Likewise.
4389 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
4391 * config/bfin/bfin.md (ones): Fix length computation.
4393 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
4395 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
4396 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
4397 instead of FRAME_POINTER_REGNUM to spill pseudos.
4399 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
4400 Richard Biener <rguenther@suse.de>
4403 * gimplify.cc (gimplify_compound_lval): If the array's type
4404 is error_mark_node then return GS_ERROR.
4406 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
4409 * config/bpf/bpf.opt: Added option -masm=<dialect>.
4410 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
4411 * config/bpf/bpf.cc (bpf_print_register): New function.
4412 (bpf_print_register): Support pseudo-c syntax for registers.
4413 (bpf_print_operand_address): Likewise.
4414 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
4415 (ASSEMBLER_DIALECT): Define.
4416 * config/bpf/bpf.md: Added pseudo-c templates.
4417 * doc/invoke.texi (-masm=): New eBPF option item.
4419 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
4421 * config/bpf/bpf.md: fixed template for neg instruction.
4423 2023-07-21 Jan Hubicka <jh@suse.cz>
4426 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
4427 profiles by vectorization factor.
4428 (vect_transform_loop): Check for flat profiles.
4430 2023-07-21 Jan Hubicka <jh@suse.cz>
4432 * cfgloop.h (maybe_flat_loop_profile): Declare
4433 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
4434 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
4436 2023-07-21 Jan Hubicka <jh@suse.cz>
4438 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
4439 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
4440 * predict.cc (estimate_bb_frequencies): Likewise.
4441 * profile.cc (branch_prob): Likewise.
4442 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
4444 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
4446 * config.in: Regenerate.
4447 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
4448 (LINK_COMMAND_SPEC_A): Add demangle handling.
4449 * configure: Regenerate.
4450 * configure.ac: Detect linker support for '-demangle'.
4452 2023-07-21 Jan Hubicka <jh@suse.cz>
4454 * sreal.cc (sreal::to_nearest_int): New.
4455 (sreal_verify_basics): Verify also to_nearest_int.
4456 (verify_aritmetics): Likewise.
4457 (sreal_verify_conversions): New.
4458 (sreal_cc_tests): Call sreal_verify_conversions.
4459 * sreal.h: (sreal::to_nearest_int): Declare
4461 2023-07-21 Jan Hubicka <jh@suse.cz>
4463 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
4464 (should_duplicate_loop_header_p): Return info on profitability.
4465 (do_while_loop_p): Watch for constant conditionals.
4466 (update_profile_after_ch): Do not sanity check that all
4467 static exits are taken.
4468 (ch_base::copy_headers): Run on all loops.
4469 (pass_ch::process_loop_p): Improve heuristics by handling also
4470 do_while loop and duplicating shortest sequence containing all
4473 2023-07-21 Jan Hubicka <jh@suse.cz>
4475 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
4476 tests first; update finite_p flag.
4478 2023-07-21 Jan Hubicka <jh@suse.cz>
4480 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
4481 * cfgloop.h (print_loop_info): Declare.
4482 * tree-cfg.cc (print_loop_info): Break out from ...; add
4483 printing of missing fields and profile
4484 (print_loop): ... here.
4486 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4488 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
4490 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4492 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
4493 (vectorizable_operation): Ditto.
4495 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4497 * config/riscv/autovec.md: Align order of mask and len.
4498 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
4499 (expand_gather_scatter): Ditto.
4500 * doc/md.texi: Ditto.
4501 * internal-fn.cc (add_len_and_mask_args): Ditto.
4502 (add_mask_and_len_args): Ditto.
4503 (expand_partial_load_optab_fn): Ditto.
4504 (expand_partial_store_optab_fn): Ditto.
4505 (expand_scatter_store_optab_fn): Ditto.
4506 (expand_gather_load_optab_fn): Ditto.
4507 (internal_fn_len_index): Ditto.
4508 (internal_fn_mask_index): Ditto.
4509 (internal_len_load_store_bias): Ditto.
4510 * tree-vect-stmts.cc (vectorizable_store): Ditto.
4511 (vectorizable_load): Ditto.
4513 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4515 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
4516 (mask_len_load<mode><vm>): Ditto.
4517 (len_maskstore<mode><vm>): Ditto.
4518 (mask_len_store<mode><vm>): Ditto.
4519 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
4520 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
4521 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
4522 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
4523 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
4524 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
4525 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
4526 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
4527 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
4528 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
4529 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
4530 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
4531 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
4532 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
4533 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
4534 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
4535 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
4536 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
4537 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
4538 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
4539 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
4540 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
4541 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
4542 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
4543 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
4544 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
4545 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
4546 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
4547 * doc/md.texi: Ditto.
4548 * genopinit.cc (main): Ditto.
4549 (CMP_NAME): Ditto. Ditto.
4550 * gimple-fold.cc (arith_overflowed_p): Ditto.
4551 (gimple_fold_partial_load_store_mem_ref): Ditto.
4552 (gimple_fold_call): Ditto.
4553 * internal-fn.cc (len_maskload_direct): Ditto.
4554 (mask_len_load_direct): Ditto.
4555 (len_maskstore_direct): Ditto.
4556 (mask_len_store_direct): Ditto.
4557 (expand_call_mem_ref): Ditto.
4558 (expand_len_maskload_optab_fn): Ditto.
4559 (expand_mask_len_load_optab_fn): Ditto.
4560 (expand_len_maskstore_optab_fn): Ditto.
4561 (expand_mask_len_store_optab_fn): Ditto.
4562 (direct_len_maskload_optab_supported_p): Ditto.
4563 (direct_mask_len_load_optab_supported_p): Ditto.
4564 (direct_len_maskstore_optab_supported_p): Ditto.
4565 (direct_mask_len_store_optab_supported_p): Ditto.
4566 (internal_load_fn_p): Ditto.
4567 (internal_store_fn_p): Ditto.
4568 (internal_gather_scatter_fn_p): Ditto.
4569 (internal_fn_len_index): Ditto.
4570 (internal_fn_mask_index): Ditto.
4571 (internal_fn_stored_value_index): Ditto.
4572 (internal_len_load_store_bias): Ditto.
4573 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
4574 (MASK_LEN_GATHER_LOAD): Ditto.
4575 (LEN_MASK_LOAD): Ditto.
4576 (MASK_LEN_LOAD): Ditto.
4577 (LEN_MASK_SCATTER_STORE): Ditto.
4578 (MASK_LEN_SCATTER_STORE): Ditto.
4579 (LEN_MASK_STORE): Ditto.
4580 (MASK_LEN_STORE): Ditto.
4581 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
4582 (supports_vec_scatter_store_p): Ditto.
4583 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
4584 (target_supports_len_load_store_p): Ditto.
4585 * optabs.def (OPTAB_CD): Ditto.
4586 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
4587 (call_may_clobber_ref_p_1): Ditto.
4588 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
4589 (dse_optimize_stmt): Ditto.
4590 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
4591 (get_alias_ptr_type_for_ptr_address): Ditto.
4592 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
4593 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
4594 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
4595 (vect_get_strided_load_store_ops): Ditto.
4596 (vectorizable_store): Ditto.
4597 (vectorizable_load): Ditto.
4599 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
4601 * config/i386/i386.opt: Fix a typo.
4603 2023-07-21 Richard Biener <rguenther@suse.de>
4605 PR tree-optimization/88540
4606 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
4607 with NaNs but handle the simple case by if-converting to a
4610 2023-07-21 Andrew Pinski <apinski@marvell.com>
4612 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
4615 2023-07-21 Richard Biener <rguenther@suse.de>
4617 PR tree-optimization/110742
4618 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
4619 Do not materialize an edge permutation in an external node with
4621 (vect_slp_analyze_node_operations_1): Guard purely internal
4624 2023-07-21 Jan Hubicka <jh@suse.cz>
4626 * cfgloop.cc: Include sreal.h.
4627 (flow_loop_dump): Dump sreal iteration exsitmate.
4628 (get_estimated_loop_iterations): Update.
4629 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
4630 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
4631 (expected_loop_iterations_unbounded): Use new API.
4632 * cfgloopmanip.cc (scale_loop_profile): Use
4633 expected_loop_iterations_by_profile
4634 * predict.cc (pass_profile::execute): Likewise.
4635 * profile.cc (branch_prob): Likewise.
4636 * tree-ssa-loop-niter.cc: Include sreal.h.
4637 (estimate_numbers_of_iterations): Likewise
4639 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
4641 PR tree-optimization/110744
4642 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
4643 operand for ifn IFN_LEN_STORE.
4645 2023-07-21 liuhongt <hongtao.liu@intel.com>
4648 * common.opt: (fcf-protection=): Add EnumSet attribute to
4649 support combination of params.
4651 2023-07-21 David Malcolm <dmalcolm@redhat.com>
4653 PR middle-end/110612
4654 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
4656 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
4657 (table_geometry::table_y_to_canvas_y): Likewise.
4658 * text-art/table.h (table_geometry::m_table): Drop unused field.
4659 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
4662 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
4665 * config/i386/i386-features.cc
4666 (general_scalar_chain::compute_convert_gain): Calculate gain
4667 for extend higpart case.
4668 (general_scalar_chain::convert_op): Handle
4669 ASHIFTRT/ASHIFT combined RTX.
4670 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
4671 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
4672 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
4673 New define_insn_and_split pattern.
4674 (*extendv2di2_highpart_stv): Ditto.
4676 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
4678 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
4681 2023-07-20 Andrew Pinski <apinski@marvell.com>
4683 * combine.cc (dump_combine_stats): Remove.
4684 (dump_combine_total_stats): Remove.
4685 (total_attempts, total_merges, total_extras,
4686 total_successes): Remove.
4687 (combine_instructions): Don't increment total stats
4688 instead use statistics_counter_event.
4689 * dumpfile.cc (print_combine_total_stats): Remove.
4690 * dumpfile.h (print_combine_total_stats): Remove.
4691 (dump_combine_total_stats): Remove.
4692 * passes.cc (finish_optimization_passes):
4693 Don't call print_combine_total_stats.
4694 * rtl.h (dump_combine_total_stats): Remove.
4695 (dump_combine_stats): Remove.
4697 2023-07-20 Jan Hubicka <jh@suse.cz>
4699 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
4702 2023-07-20 Martin Jambor <mjambor@suse.cz>
4704 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
4705 (analyzer-text-art-ideal-canvas-width): Likewise.
4706 (analyzer-text-art-string-ellipsis-head-len): Likewise.
4707 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
4709 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
4711 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
4712 Refine code structure.
4714 2023-07-20 Jan Hubicka <jh@suse.cz>
4716 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
4717 (get_range_query): ... this one; do
4718 (static_loop_exit): Add query parametr, turn ranger to reference.
4719 (loop_static_stmt_p): New function.
4720 (loop_static_op_p): New function.
4721 (loop_iv_derived_p): Remove.
4722 (loop_combined_static_and_iv_p): New function.
4723 (should_duplicate_loop_header_p): Discover combined onditionals;
4724 do not track iv derived; improve dumps.
4725 (pass_ch::execute): Fix whitespace.
4727 2023-07-20 Richard Biener <rguenther@suse.de>
4729 PR tree-optimization/110204
4730 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
4731 Look through copies generated by PRE.
4733 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
4735 * tree-vect-stmts.cc (get_group_load_store_type): Account for
4736 `gap` when checking if need to peel twice.
4738 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
4741 * doc/extend.texi: Document iseqsig builtin.
4742 * builtins.cc (fold_builtin_iseqsig): New function.
4743 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
4744 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
4745 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
4747 2023-07-20 Pan Li <pan2.li@intel.com>
4749 * config/riscv/vector.md: Fix incorrect match_operand.
4751 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
4753 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
4754 force_reg, to use SUBREG rather than create a new pseudo when
4755 inserting DFmode fields into TImode with insvti_{high,low}part.
4756 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
4757 define_insn_and_split...
4758 (*concatditi3_3): 64-bit implementation. Provide alternative
4759 that allows register allocation to use SSE registers that is
4760 split into vec_concatv2di after reload.
4761 (*concatsidi3_3): 32-bit implementation.
4763 2023-07-20 Richard Biener <rguenther@suse.de>
4766 * internal-fn.cc (expand_vec_cond_optab_fn): When the
4767 value operands are equal to the original comparison operands
4768 preserve that equality by re-using the comparison expansion.
4769 * optabs.cc (emit_conditional_move): When the value operands
4770 are equal to the comparison operands and would be forced to
4771 a register by prepare_cmp_insn do so earlier, preserving the
4774 2023-07-20 Pan Li <pan2.li@intel.com>
4776 * config/riscv/vector.md: Align pattern format.
4778 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
4780 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
4781 Granite Rapids{, D} from documentation.
4783 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4785 * config/riscv/autovec.md
4786 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
4787 Refactor RVV machine modes.
4788 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
4789 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
4790 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
4791 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
4792 (len_mask_gather_load<mode><mode>): Ditto.
4793 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
4794 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
4795 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
4796 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
4797 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
4798 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
4799 (len_mask_scatter_store<mode><mode>): Ditto.
4800 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
4801 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
4802 (ADJUST_NUNITS): Ditto.
4803 (ADJUST_ALIGNMENT): Ditto.
4804 (ADJUST_BYTESIZE): Ditto.
4805 (ADJUST_PRECISION): Ditto.
4807 (RVV_WHOLE_MODES): Ditto.
4808 (RVV_FRACT_MODE): Ditto.
4809 (RVV_NF8_MODES): Ditto.
4810 (RVV_NF4_MODES): Ditto.
4811 (VECTOR_MODES_WITH_PREFIX): Ditto.
4812 (VECTOR_MODE_WITH_PREFIX): Ditto.
4813 (RVV_TUPLE_MODES): Ditto.
4814 (RVV_NF2_MODES): Ditto.
4815 (RVV_TUPLE_PARTIAL_MODES): Ditto.
4816 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
4818 (TUPLE_ENTRY): Ditto.
4822 (preferred_simd_mode): Ditto.
4823 (autovectorize_vector_modes): Ditto.
4824 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
4825 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
4833 (vint8mf8_t): Ditto.
4834 (vuint8mf8_t): Ditto.
4835 (vint8mf4_t): Ditto.
4836 (vuint8mf4_t): Ditto.
4837 (vint8mf2_t): Ditto.
4838 (vuint8mf2_t): Ditto.
4840 (vuint8m1_t): Ditto.
4842 (vuint8m2_t): Ditto.
4844 (vuint8m4_t): Ditto.
4846 (vuint8m8_t): Ditto.
4847 (vint16mf4_t): Ditto.
4848 (vuint16mf4_t): Ditto.
4849 (vint16mf2_t): Ditto.
4850 (vuint16mf2_t): Ditto.
4851 (vint16m1_t): Ditto.
4852 (vuint16m1_t): Ditto.
4853 (vint16m2_t): Ditto.
4854 (vuint16m2_t): Ditto.
4855 (vint16m4_t): Ditto.
4856 (vuint16m4_t): Ditto.
4857 (vint16m8_t): Ditto.
4858 (vuint16m8_t): Ditto.
4859 (vint32mf2_t): Ditto.
4860 (vuint32mf2_t): Ditto.
4861 (vint32m1_t): Ditto.
4862 (vuint32m1_t): Ditto.
4863 (vint32m2_t): Ditto.
4864 (vuint32m2_t): Ditto.
4865 (vint32m4_t): Ditto.
4866 (vuint32m4_t): Ditto.
4867 (vint32m8_t): Ditto.
4868 (vuint32m8_t): Ditto.
4869 (vint64m1_t): Ditto.
4870 (vuint64m1_t): Ditto.
4871 (vint64m2_t): Ditto.
4872 (vuint64m2_t): Ditto.
4873 (vint64m4_t): Ditto.
4874 (vuint64m4_t): Ditto.
4875 (vint64m8_t): Ditto.
4876 (vuint64m8_t): Ditto.
4877 (vfloat16mf4_t): Ditto.
4878 (vfloat16mf2_t): Ditto.
4879 (vfloat16m1_t): Ditto.
4880 (vfloat16m2_t): Ditto.
4881 (vfloat16m4_t): Ditto.
4882 (vfloat16m8_t): Ditto.
4883 (vfloat32mf2_t): Ditto.
4884 (vfloat32m1_t): Ditto.
4885 (vfloat32m2_t): Ditto.
4886 (vfloat32m4_t): Ditto.
4887 (vfloat32m8_t): Ditto.
4888 (vfloat64m1_t): Ditto.
4889 (vfloat64m2_t): Ditto.
4890 (vfloat64m4_t): Ditto.
4891 (vfloat64m8_t): Ditto.
4892 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
4893 (TUPLE_ENTRY): Ditto.
4894 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
4895 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
4896 (riscv_v_adjust_nunits): Ditto.
4897 (riscv_v_adjust_bytesize): Ditto.
4898 (riscv_v_adjust_precision): Ditto.
4899 (riscv_convert_vector_bits): Ditto.
4900 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
4901 * config/riscv/riscv.md: Ditto.
4902 * config/riscv/vector-iterators.md: Ditto.
4903 * config/riscv/vector.md
4904 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
4905 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
4906 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
4907 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
4908 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
4909 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
4910 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
4911 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
4912 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
4913 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
4914 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
4915 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
4916 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
4917 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
4918 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
4919 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
4920 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
4921 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
4922 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
4923 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
4924 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
4925 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
4926 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
4927 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
4928 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
4929 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
4930 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
4931 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
4932 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
4933 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
4934 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
4935 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
4936 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
4938 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
4940 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
4941 (lra_asm_insn_error): New prototype.
4942 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
4944 (lra_spill): Call lra_update_fp2sp_elimination.
4945 * lra-eliminations.cc: Remove trailing spaces.
4946 (elimination_fp2sp_occured_p): New static flag.
4947 (lra_eliminate_regs_1): Set the flag up.
4948 (update_reg_eliminate): Modify the assert for stack to frame
4949 pointer elimination.
4950 (lra_update_fp2sp_elimination): New function.
4951 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
4953 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
4955 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
4957 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
4958 dependencies from target pragmas.
4959 * config/aarch64/arm_fp16.h (target): Likewise.
4960 * config/aarch64/arm_neon.h (target): Likewise.
4962 2023-07-19 Andrew Pinski <apinski@marvell.com>
4964 PR tree-optimization/110252
4965 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
4966 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
4967 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
4968 (match_simplify_replacement): Temporarily
4969 remove the flow sensitive info on the two statements that might
4972 2023-07-19 Andrew Pinski <apinski@marvell.com>
4974 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
4975 with flow_sensitive_info_storage.
4976 (follow_outer_ssa_edges): Update how to save off the flow
4978 (maybe_fold_comparisons_from_match_pd): Update restoring
4979 of flow sensitive info.
4980 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
4981 (flow_sensitive_info_storage::restore): New method.
4982 (flow_sensitive_info_storage::save_and_clear): New method.
4983 (flow_sensitive_info_storage::clear_storage): New method.
4984 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
4986 2023-07-19 Andrew Pinski <apinski@marvell.com>
4988 PR tree-optimization/110726
4989 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
4990 Add checks to make sure the type was one bit precision
4993 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
4995 * doc/md.texi: Add mask_len_fold_left_plus.
4996 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
4997 (expand_mask_len_fold_left_optab_fn): Ditto.
4998 (direct_mask_len_fold_left_optab_supported_p): Ditto.
4999 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
5000 * optabs.def (OPTAB_D): Ditto.
5002 2023-07-19 Jakub Jelinek <jakub@redhat.com>
5004 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
5006 2023-07-19 Jakub Jelinek <jakub@redhat.com>
5008 PR tree-optimization/110731
5009 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
5010 divisor as UNSIGNED regardless of sgn.
5012 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
5014 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
5015 (standard_extensions_p): Add check.
5016 (riscv_subset_list::add): Just return NULL if it failed before.
5017 (riscv_subset_list::parse_std_ext): Continue parse when find a error
5018 (riscv_subset_list::parse): Just return NULL if it failed before.
5019 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
5021 2023-07-19 Jan Beulich <jbeulich@suse.com>
5023 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
5025 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
5027 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
5028 gen_vec_interleave_low. Rename local variable.
5030 2023-07-19 Jan Beulich <jbeulich@suse.com>
5032 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
5033 alternative. Move AVX512VL part of condition to new "enabled"
5036 2023-07-19 liuhongt <hongtao.liu@intel.com>
5039 * config/i386/i386-builtins.cc
5040 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
5041 (ix86_register_bf16_builtin_type): Ditto.
5042 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
5043 isn't available, undef the macros which are used to check the
5044 backend support of the _Float16/__bf16 types when building
5045 libstdc++ and libgcc.
5046 * config/i386/i386.cc (construct_container): Issue errors for
5047 HFmode/BFmode when TARGET_SSE2 is not available.
5048 (function_value_32): Ditto.
5049 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
5050 (ix86_libgcc_floating_mode_supported_p): Ditto.
5051 (ix86_emit_support_tinfos): Adjust codes.
5052 (ix86_invalid_conversion): Return diagnostic message string
5053 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
5054 (ix86_invalid_unary_op): New function.
5055 (ix86_invalid_binary_op): Ditto.
5056 (TARGET_INVALID_UNARY_OP): Define.
5057 (TARGET_INVALID_BINARY_OP): Define.
5058 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
5059 related instrinsics header files.
5060 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
5062 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
5064 * dwarf2asm.cc: Change FALSE to false.
5065 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
5066 * dwarf2out.cc (matches_main_base): Change return type from
5067 int to bool. Change "last_match" variable to bool.
5068 (dump_struct_debug): Change return type from int to bool.
5069 Change "matches" and "result" function arguments to bool.
5070 (is_pseudo_reg): Change return type from int to bool.
5071 (is_tagged_type): Ditto.
5072 (same_loc_p): Ditto.
5073 (same_dw_val_p): Change return type from int to bool and adjust
5074 function body accordingly.
5075 (same_attr_p): Ditto.
5076 (same_die_p): Ditto.
5077 (is_type_die): Ditto.
5078 (is_declaration_die): Ditto.
5079 (should_move_die_to_comdat): Ditto.
5080 (is_base_type): Ditto.
5081 (is_based_loc): Ditto.
5082 (local_scope_p): Ditto.
5083 (class_scope_p): Ditto.
5084 (class_or_namespace_scope_p): Ditto.
5085 (is_tagged_type): Ditto.
5086 (is_rust): Use void argument.
5087 (is_nested_in_subprogram): Change return type from int to bool.
5088 (contains_subprogram_definition): Ditto.
5089 (gen_struct_or_union_type_die): Change "nested", "complete"
5090 and "ns_decl" variables to bool.
5091 (is_naming_typedef_decl): Change FALSE to false.
5093 2023-07-18 Jan Hubicka <jh@suse.cz>
5095 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
5096 for queries not in headers.
5097 (static_loop_exit): Add basic blck parameter; update use of
5099 (should_duplicate_loop_header_p): Add ranger and static_exits
5100 parameter. Do not account statements that will be optimized
5101 out after duplicaiton in overall size. Add ranger query to
5103 (update_profile_after_ch): Take static_exits has set instead of
5104 single eliminated_edge.
5105 (ch_base::copy_headers): Do all analysis in the first pass;
5106 remember invariant_exits and static_exits.
5108 2023-07-18 Jason Merrill <jason@redhat.com>
5110 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
5112 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
5114 * doc/gm2.texi (Semantic checking): Change example testwithptr
5117 2023-07-18 Richard Biener <rguenther@suse.de>
5119 PR middle-end/105715
5120 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
5121 (pass_gimple_isel::execute): ... this. Duplicate
5122 comparison defs of COND_EXPRs.
5124 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5126 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
5127 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
5128 (riscv_convert_vector_bits): Ditto.
5130 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5132 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
5133 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
5135 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
5137 * config/s390/vx-builtins.md: New vsel pattern.
5139 2023-07-18 liuhongt <hongtao.liu@intel.com>
5142 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
5143 Remove # from assemble output.
5145 2023-07-18 liuhongt <hongtao.liu@intel.com>
5148 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
5149 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
5150 3 define_peephole2 after the pattern.
5152 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
5154 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
5156 2023-07-18 Pan Li <pan2.li@intel.com>
5157 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5159 * config/riscv/riscv.cc (struct machine_function): Add new field.
5160 (riscv_static_frm_mode_p): New function.
5161 (riscv_emit_frm_mode_set): New function for emit FRM.
5162 (riscv_emit_mode_set): Extract function for FRM.
5163 (riscv_mode_needed): Fix the TODO.
5164 (riscv_mode_entry): Initial dynamic frm RTL.
5165 (riscv_mode_exit): Return DYN_EXIT.
5166 * config/riscv/riscv.md: Add rdfrm.
5167 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
5168 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
5170 (fsrmsi_backup): New pattern for swap.
5171 (fsrmsi_restore): New pattern for restore.
5172 (fsrmsi_restore_exit): New pattern for restore exit.
5173 (frrmsi): New pattern for backup.
5175 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
5177 * doc/extend.texi: Add @cindex on __auto_type.
5179 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
5181 * combine-stack-adj.cc (stack_memref_p): Change return type from
5182 int to bool and adjust function body accordingly.
5183 (rest_of_handle_stack_adjustments): Change return type to void.
5185 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
5187 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
5188 (cant_combine_insn_p): Change return type from int to bool and adjust
5189 function body accordingly.
5190 (can_combine_p): Ditto.
5191 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
5192 function arguments from int to bool.
5193 (contains_muldiv): Change return type from int to bool and adjust
5194 function body accordingly.
5195 (try_combine): Ditto. Change "new_direct_jump" pointer function
5196 argument from int to bool. Change "substed_i2", "substed_i1",
5197 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
5198 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
5199 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
5200 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
5201 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
5202 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
5204 (subst): Change "in_dest", "in_cond" and "unique_copy" function
5205 arguments from int to bool.
5206 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
5207 arguments from int to bool.
5208 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
5209 function argument from int to bool.
5210 (force_int_to_mode): Change "just_select" function argument
5211 from int to bool. Change "next_select" variable to bool.
5212 (rtx_equal_for_field_assignment_p): Change return type from
5213 int to bool and adjust function body accordingly.
5214 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
5215 argument from int to bool.
5216 (get_last_value_validate): Change return type from int to bool
5217 and adjust function body accordingly.
5218 (reg_dead_at_p): Ditto.
5219 (reg_bitfield_target_p): Ditto.
5220 (combine_instructions): Ditto. Change "new_direct_jump"
5222 (can_combine_p): Change return type from int to bool
5223 and adjust function body accordingly.
5224 (likely_spilled_retval_p): Ditto.
5225 (can_change_dest_mode): Change "added_sets" function argument
5227 (find_split_point): Change "unsignedp" variable to bool.
5228 (simplify_if_then_else): Change "comparison_p" and "swapped"
5230 (simplify_set): Change "other_changed" variable to bool.
5231 (expand_compound_operation): Change "unsignedp" variable to bool.
5232 (force_to_mode): Change "just_select" function argument
5233 from int to bool. Change "next_select" variable to bool.
5234 (extended_count): Change "unsignedp" function argument to bool.
5235 (simplify_shift_const_1): Change "complement_p" variable to bool.
5236 (simplify_comparison): Change "changed" variable to bool.
5237 (rest_of_handle_combine): Change return type to void.
5239 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
5242 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
5244 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
5246 * ira.cc (setup_reg_class_relations): Continue
5247 if regclass cl3 is hard_reg_set_empty_p.
5249 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5251 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
5253 2023-07-17 Martin Jambor <mjambor@suse.cz>
5255 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
5258 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
5260 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
5262 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
5265 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
5266 recur add all implied extensions.
5267 (riscv_subset_list::check_implied_ext): Add new method.
5268 (riscv_subset_list::parse): Call checker check_implied_ext.
5269 * config/riscv/riscv-subset.h: Add new method.
5271 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5273 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
5274 (reduc_smax_scal_<mode>): Ditto.
5275 (reduc_umax_scal_<mode>): Ditto.
5276 (reduc_smin_scal_<mode>): Ditto.
5277 (reduc_umin_scal_<mode>): Ditto.
5278 (reduc_and_scal_<mode>): Ditto.
5279 (reduc_ior_scal_<mode>): Ditto.
5280 (reduc_xor_scal_<mode>): Ditto.
5281 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
5282 (expand_reduction): New function.
5283 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
5284 (emit_vlmax_fp_reduction_insn): Ditto.
5285 (get_m1_mode): Ditto.
5286 (expand_cond_len_binop): Fix name.
5287 (expand_reduction): New function
5288 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
5289 (validate_change_or_fail): New function.
5290 (change_insn): Fix VSETVL BUG.
5291 (change_vsetvl_insn): Ditto.
5292 (pass_vsetvl::backward_demand_fusion): Ditto.
5293 (pass_vsetvl::df_post_optimization): Ditto.
5295 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
5297 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
5299 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
5301 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
5302 Remove parameter name from declaration of unused parameter.
5304 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
5306 PR tree-optimization/110652
5307 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
5310 2023-07-17 Richard Biener <rguenther@suse.de>
5312 PR tree-optimization/110669
5313 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
5314 Check we matched a header PHI.
5316 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
5318 * tree-ssanames.cc (set_bitmask): New.
5319 * tree-ssanames.h (set_bitmask): New.
5321 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
5323 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
5325 * value-range.h (irange_bitmask::union_): Normalize beforehand.
5326 (irange_bitmask::intersect): Same.
5328 2023-07-17 Andrew Pinski <apinski@marvell.com>
5330 PR tree-optimization/95923
5331 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
5333 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
5335 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
5336 to the std::sort comparison lambda function const.
5338 2023-07-17 Andrew Pinski <apinski@marvell.com>
5340 PR tree-optimization/110666
5341 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
5343 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
5345 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
5346 Arrow Lake and Arrow Lake S.
5347 * common/config/i386/i386-common.cc:
5348 (processor_name): Add arrowlake.
5349 (processor_alias_table): Add arrow lake, arrow lake s and lunar
5351 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
5352 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
5353 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
5354 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
5356 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
5358 * config/i386/i386-options.cc (m_ARROWLAKE): New.
5359 (processor_cost_table): Add arrowlake.
5360 * config/i386/i386.h (enum processor_type):
5361 Add PROCESSOR_ARROWLAKE.
5362 * config/i386/x86-tune.def: Add m_ARROWLAKE.
5363 * doc/extend.texi: Add arrowlake and arrowlake-s.
5364 * doc/invoke.texi: Ditto.
5366 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
5368 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
5369 have the same iterator. Also renaming all the occurence to
5371 (usdot_prod<mode>): New define_expand.
5372 (udot_prod<mode>): Ditto.
5374 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
5376 * common/config/i386/cpuinfo.h (get_available_features):
5378 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
5379 OPTION_MASK_ISA2_SM4_UNSET): New.
5380 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
5381 (ix86_handle_option): Handle -msm4.
5382 * common/config/i386/i386-cpuinfo.h (enum processor_features):
5384 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
5386 * config.gcc: Add sm4intrin.h.
5387 * config/i386/cpuid.h (bit_SM4): New.
5388 * config/i386/i386-builtin.def (BDESC): Add new builtins.
5389 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
5391 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
5392 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
5393 (ix86_valid_target_attribute_inner_p): Handle sm4.
5394 * config/i386/i386.opt: Add option -msm4.
5395 * config/i386/immintrin.h: Include sm4intrin.h
5396 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
5397 (vsm4rnds4_<mode>): Ditto.
5398 * doc/extend.texi: Document sm4.
5399 * doc/invoke.texi: Document -msm4.
5400 * doc/sourcebuild.texi: Document target sm4.
5401 * config/i386/sm4intrin.h: New file.
5403 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
5405 * common/config/i386/cpuinfo.h (get_available_features):
5407 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
5408 OPTION_MASK_ISA2_SHA512_UNSET): New.
5409 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
5410 (ix86_handle_option): Handle -msha512.
5411 * common/config/i386/i386-cpuinfo.h (enum processor_features):
5413 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
5415 * config.gcc: Add sha512intrin.h.
5416 * config/i386/cpuid.h (bit_SHA512): New.
5417 * config/i386/i386-builtin-types.def:
5418 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
5419 * config/i386/i386-builtin.def (BDESC): Add new builtins.
5420 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
5422 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
5423 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
5424 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
5425 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
5426 (ix86_valid_target_attribute_inner_p): Handle sha512.
5427 * config/i386/i386.opt: Add option -msha512.
5428 * config/i386/immintrin.h: Include sha512intrin.h.
5429 * config/i386/sse.md (vsha512msg1): New define insn.
5430 (vsha512msg2): Ditto.
5431 (vsha512rnds2): Ditto.
5432 * doc/extend.texi: Document sha512.
5433 * doc/invoke.texi: Document -msha512.
5434 * doc/sourcebuild.texi: Document target sha512.
5435 * config/i386/sha512intrin.h: New file.
5437 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
5439 * common/config/i386/cpuinfo.h (get_available_features):
5441 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
5442 OPTION_MASK_ISA2_SM3_UNSET): New.
5443 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
5444 (ix86_handle_option): Handle -msm3.
5445 * common/config/i386/i386-cpuinfo.h (enum processor_features):
5447 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
5449 * config.gcc: Add sm3intrin.h
5450 * config/i386/cpuid.h (bit_SM3): New.
5451 * config/i386/i386-builtin-types.def:
5452 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
5453 * config/i386/i386-builtin.def (BDESC): Add new builtins.
5454 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
5456 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
5457 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
5458 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
5459 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
5460 (ix86_valid_target_attribute_inner_p): Handle sm3.
5461 * config/i386/i386.opt: Add option -msm3.
5462 * config/i386/immintrin.h: Include sm3intrin.h.
5463 * config/i386/sse.md (vsm3msg1): New define insn.
5466 * doc/extend.texi: Document sm3.
5467 * doc/invoke.texi: Document -msm3.
5468 * doc/sourcebuild.texi: Document target sm3.
5469 * config/i386/sm3intrin.h: New file.
5471 2023-07-17 Kong Lingling <lingling.kong@intel.com>
5472 Haochen Jiang <haochen.jiang@intel.com>
5474 * common/config/i386/cpuinfo.h (get_available_features): Detect
5476 * common/config/i386/i386-common.cc
5477 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
5478 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
5479 (ix86_handle_option): Handle -mavxvnniint16.
5480 * common/config/i386/i386-cpuinfo.h (enum processor_features):
5481 Add FEATURE_AVXVNNIINT16.
5482 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
5484 * config.gcc: Add avxvnniint16.h.
5485 * config/i386/avxvnniint16intrin.h: New file.
5486 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
5487 * config/i386/i386-builtin.def: Add new builtins.
5488 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
5490 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
5491 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
5492 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
5493 * config/i386/i386.opt: Add option -mavxvnniint16.
5494 * config/i386/immintrin.h: Include avxvnniint16.h.
5495 * config/i386/sse.md
5496 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
5497 * doc/extend.texi: Document avxvnniint16.
5498 * doc/invoke.texi: Document -mavxvnniint16.
5499 * doc/sourcebuild.texi: Document target avxvnniint16.
5501 2023-07-16 Jan Hubicka <jh@suse.cz>
5503 PR middle-end/110649
5504 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
5505 (vect_transform_loop): Move scale_profile_for_vect_loop after
5506 upper bound updates.
5508 2023-07-16 Jan Hubicka <jh@suse.cz>
5510 PR tree-optimization/110649
5511 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
5512 probability of the if-then-else construct.
5514 2023-07-16 Jan Hubicka <jh@suse.cz>
5516 PR middle-end/110649
5517 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
5519 2023-07-15 Andrew Pinski <apinski@marvell.com>
5521 * doc/contrib.texi: Update my entry.
5523 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
5525 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
5527 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
5528 (tld_load): Likewise.
5529 (tgd_load_pic): Change to expander.
5530 (tld_load_pic, tld_offset_load, tp_load): Likewise.
5531 (tie_load_pic, tle_load): Likewise.
5532 (tgd_load_picsi, tgd_load_picdi): New.
5533 (tld_load_picsi, tld_load_picdi): New.
5534 (tld_offset_load<P:mode>): New.
5535 (tp_load<P:mode>): New.
5536 (tie_load_picsi, tie_load_picdi): New.
5537 (tle_load<P:mode>): New.
5539 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
5541 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
5542 (vcmlaq_rot180, vcmlaq_rot270): New.
5543 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
5544 (vcmlaq_rot180, vcmlaq_rot270): New.
5545 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
5546 (vcmlaq_rot180, vcmlaq_rot270): New.
5547 * config/arm/arm-mve-builtins.cc
5548 (function_instance::has_inactive_argument): Handle vcmlaq,
5549 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
5550 * config/arm/arm_mve.h (vcmlaq): Delete.
5551 (vcmlaq_rot180): Delete.
5552 (vcmlaq_rot270): Delete.
5553 (vcmlaq_rot90): Delete.
5555 (vcmlaq_rot180_m): Delete.
5556 (vcmlaq_rot270_m): Delete.
5557 (vcmlaq_rot90_m): Delete.
5558 (vcmlaq_f16): Delete.
5559 (vcmlaq_rot180_f16): Delete.
5560 (vcmlaq_rot270_f16): Delete.
5561 (vcmlaq_rot90_f16): Delete.
5562 (vcmlaq_f32): Delete.
5563 (vcmlaq_rot180_f32): Delete.
5564 (vcmlaq_rot270_f32): Delete.
5565 (vcmlaq_rot90_f32): Delete.
5566 (vcmlaq_m_f32): Delete.
5567 (vcmlaq_m_f16): Delete.
5568 (vcmlaq_rot180_m_f32): Delete.
5569 (vcmlaq_rot180_m_f16): Delete.
5570 (vcmlaq_rot270_m_f32): Delete.
5571 (vcmlaq_rot270_m_f16): Delete.
5572 (vcmlaq_rot90_m_f32): Delete.
5573 (vcmlaq_rot90_m_f16): Delete.
5574 (__arm_vcmlaq_f16): Delete.
5575 (__arm_vcmlaq_rot180_f16): Delete.
5576 (__arm_vcmlaq_rot270_f16): Delete.
5577 (__arm_vcmlaq_rot90_f16): Delete.
5578 (__arm_vcmlaq_f32): Delete.
5579 (__arm_vcmlaq_rot180_f32): Delete.
5580 (__arm_vcmlaq_rot270_f32): Delete.
5581 (__arm_vcmlaq_rot90_f32): Delete.
5582 (__arm_vcmlaq_m_f32): Delete.
5583 (__arm_vcmlaq_m_f16): Delete.
5584 (__arm_vcmlaq_rot180_m_f32): Delete.
5585 (__arm_vcmlaq_rot180_m_f16): Delete.
5586 (__arm_vcmlaq_rot270_m_f32): Delete.
5587 (__arm_vcmlaq_rot270_m_f16): Delete.
5588 (__arm_vcmlaq_rot90_m_f32): Delete.
5589 (__arm_vcmlaq_rot90_m_f16): Delete.
5590 (__arm_vcmlaq): Delete.
5591 (__arm_vcmlaq_rot180): Delete.
5592 (__arm_vcmlaq_rot270): Delete.
5593 (__arm_vcmlaq_rot90): Delete.
5594 (__arm_vcmlaq_m): Delete.
5595 (__arm_vcmlaq_rot180_m): Delete.
5596 (__arm_vcmlaq_rot270_m): Delete.
5597 (__arm_vcmlaq_rot90_m): Delete.
5599 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
5601 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
5602 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
5603 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
5604 (mve_insn): Add vcmla.
5605 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
5607 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
5609 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
5610 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
5611 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
5612 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
5614 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
5616 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
5618 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
5619 (vcmulq_rot180, vcmulq_rot270): New.
5620 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
5621 (vcmulq_rot180, vcmulq_rot270): New.
5622 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
5623 (vcmulq_rot180, vcmulq_rot270): New.
5624 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
5625 (vcmulq_rot270): Delete.
5626 (vcmulq_rot180): Delete.
5629 (vcmulq_rot180_m): Delete.
5630 (vcmulq_rot270_m): Delete.
5631 (vcmulq_rot90_m): Delete.
5633 (vcmulq_rot90_x): Delete.
5634 (vcmulq_rot180_x): Delete.
5635 (vcmulq_rot270_x): Delete.
5636 (vcmulq_rot90_f16): Delete.
5637 (vcmulq_rot270_f16): Delete.
5638 (vcmulq_rot180_f16): Delete.
5639 (vcmulq_f16): Delete.
5640 (vcmulq_rot90_f32): Delete.
5641 (vcmulq_rot270_f32): Delete.
5642 (vcmulq_rot180_f32): Delete.
5643 (vcmulq_f32): Delete.
5644 (vcmulq_m_f32): Delete.
5645 (vcmulq_m_f16): Delete.
5646 (vcmulq_rot180_m_f32): Delete.
5647 (vcmulq_rot180_m_f16): Delete.
5648 (vcmulq_rot270_m_f32): Delete.
5649 (vcmulq_rot270_m_f16): Delete.
5650 (vcmulq_rot90_m_f32): Delete.
5651 (vcmulq_rot90_m_f16): Delete.
5652 (vcmulq_x_f16): Delete.
5653 (vcmulq_x_f32): Delete.
5654 (vcmulq_rot90_x_f16): Delete.
5655 (vcmulq_rot90_x_f32): Delete.
5656 (vcmulq_rot180_x_f16): Delete.
5657 (vcmulq_rot180_x_f32): Delete.
5658 (vcmulq_rot270_x_f16): Delete.
5659 (vcmulq_rot270_x_f32): Delete.
5660 (__arm_vcmulq_rot90_f16): Delete.
5661 (__arm_vcmulq_rot270_f16): Delete.
5662 (__arm_vcmulq_rot180_f16): Delete.
5663 (__arm_vcmulq_f16): Delete.
5664 (__arm_vcmulq_rot90_f32): Delete.
5665 (__arm_vcmulq_rot270_f32): Delete.
5666 (__arm_vcmulq_rot180_f32): Delete.
5667 (__arm_vcmulq_f32): Delete.
5668 (__arm_vcmulq_m_f32): Delete.
5669 (__arm_vcmulq_m_f16): Delete.
5670 (__arm_vcmulq_rot180_m_f32): Delete.
5671 (__arm_vcmulq_rot180_m_f16): Delete.
5672 (__arm_vcmulq_rot270_m_f32): Delete.
5673 (__arm_vcmulq_rot270_m_f16): Delete.
5674 (__arm_vcmulq_rot90_m_f32): Delete.
5675 (__arm_vcmulq_rot90_m_f16): Delete.
5676 (__arm_vcmulq_x_f16): Delete.
5677 (__arm_vcmulq_x_f32): Delete.
5678 (__arm_vcmulq_rot90_x_f16): Delete.
5679 (__arm_vcmulq_rot90_x_f32): Delete.
5680 (__arm_vcmulq_rot180_x_f16): Delete.
5681 (__arm_vcmulq_rot180_x_f32): Delete.
5682 (__arm_vcmulq_rot270_x_f16): Delete.
5683 (__arm_vcmulq_rot270_x_f32): Delete.
5684 (__arm_vcmulq_rot90): Delete.
5685 (__arm_vcmulq_rot270): Delete.
5686 (__arm_vcmulq_rot180): Delete.
5687 (__arm_vcmulq): Delete.
5688 (__arm_vcmulq_m): Delete.
5689 (__arm_vcmulq_rot180_m): Delete.
5690 (__arm_vcmulq_rot270_m): Delete.
5691 (__arm_vcmulq_rot90_m): Delete.
5692 (__arm_vcmulq_x): Delete.
5693 (__arm_vcmulq_rot90_x): Delete.
5694 (__arm_vcmulq_rot180_x): Delete.
5695 (__arm_vcmulq_rot270_x): Delete.
5697 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
5699 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
5700 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
5701 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
5702 (MVE_VCADDQ_VCMULQ_M): New.
5703 (mve_insn): Add vcmul.
5704 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
5707 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
5709 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
5710 @mve_<mve_insn>q<mve_rot>_f<mode>.
5711 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
5712 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
5713 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
5715 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
5717 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
5718 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
5719 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
5720 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
5721 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
5722 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
5723 * config/arm/arm-mve-builtins-functions.h (class
5724 unspec_mve_function_exact_insn_rot): New.
5725 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
5726 (vcaddq_rot270): Delete.
5727 (vhcaddq_rot90): Delete.
5728 (vhcaddq_rot270): Delete.
5729 (vcaddq_rot270_m): Delete.
5730 (vcaddq_rot90_m): Delete.
5731 (vhcaddq_rot270_m): Delete.
5732 (vhcaddq_rot90_m): Delete.
5733 (vcaddq_rot90_x): Delete.
5734 (vcaddq_rot270_x): Delete.
5735 (vhcaddq_rot90_x): Delete.
5736 (vhcaddq_rot270_x): Delete.
5737 (vcaddq_rot90_u8): Delete.
5738 (vcaddq_rot270_u8): Delete.
5739 (vhcaddq_rot90_s8): Delete.
5740 (vhcaddq_rot270_s8): Delete.
5741 (vcaddq_rot90_s8): Delete.
5742 (vcaddq_rot270_s8): Delete.
5743 (vcaddq_rot90_u16): Delete.
5744 (vcaddq_rot270_u16): Delete.
5745 (vhcaddq_rot90_s16): Delete.
5746 (vhcaddq_rot270_s16): Delete.
5747 (vcaddq_rot90_s16): Delete.
5748 (vcaddq_rot270_s16): Delete.
5749 (vcaddq_rot90_u32): Delete.
5750 (vcaddq_rot270_u32): Delete.
5751 (vhcaddq_rot90_s32): Delete.
5752 (vhcaddq_rot270_s32): Delete.
5753 (vcaddq_rot90_s32): Delete.
5754 (vcaddq_rot270_s32): Delete.
5755 (vcaddq_rot90_f16): Delete.
5756 (vcaddq_rot270_f16): Delete.
5757 (vcaddq_rot90_f32): Delete.
5758 (vcaddq_rot270_f32): Delete.
5759 (vcaddq_rot270_m_s8): Delete.
5760 (vcaddq_rot270_m_s32): Delete.
5761 (vcaddq_rot270_m_s16): Delete.
5762 (vcaddq_rot270_m_u8): Delete.
5763 (vcaddq_rot270_m_u32): Delete.
5764 (vcaddq_rot270_m_u16): Delete.
5765 (vcaddq_rot90_m_s8): Delete.
5766 (vcaddq_rot90_m_s32): Delete.
5767 (vcaddq_rot90_m_s16): Delete.
5768 (vcaddq_rot90_m_u8): Delete.
5769 (vcaddq_rot90_m_u32): Delete.
5770 (vcaddq_rot90_m_u16): Delete.
5771 (vhcaddq_rot270_m_s8): Delete.
5772 (vhcaddq_rot270_m_s32): Delete.
5773 (vhcaddq_rot270_m_s16): Delete.
5774 (vhcaddq_rot90_m_s8): Delete.
5775 (vhcaddq_rot90_m_s32): Delete.
5776 (vhcaddq_rot90_m_s16): Delete.
5777 (vcaddq_rot270_m_f32): Delete.
5778 (vcaddq_rot270_m_f16): Delete.
5779 (vcaddq_rot90_m_f32): Delete.
5780 (vcaddq_rot90_m_f16): Delete.
5781 (vcaddq_rot90_x_s8): Delete.
5782 (vcaddq_rot90_x_s16): Delete.
5783 (vcaddq_rot90_x_s32): Delete.
5784 (vcaddq_rot90_x_u8): Delete.
5785 (vcaddq_rot90_x_u16): Delete.
5786 (vcaddq_rot90_x_u32): Delete.
5787 (vcaddq_rot270_x_s8): Delete.
5788 (vcaddq_rot270_x_s16): Delete.
5789 (vcaddq_rot270_x_s32): Delete.
5790 (vcaddq_rot270_x_u8): Delete.
5791 (vcaddq_rot270_x_u16): Delete.
5792 (vcaddq_rot270_x_u32): Delete.
5793 (vhcaddq_rot90_x_s8): Delete.
5794 (vhcaddq_rot90_x_s16): Delete.
5795 (vhcaddq_rot90_x_s32): Delete.
5796 (vhcaddq_rot270_x_s8): Delete.
5797 (vhcaddq_rot270_x_s16): Delete.
5798 (vhcaddq_rot270_x_s32): Delete.
5799 (vcaddq_rot90_x_f16): Delete.
5800 (vcaddq_rot90_x_f32): Delete.
5801 (vcaddq_rot270_x_f16): Delete.
5802 (vcaddq_rot270_x_f32): Delete.
5803 (__arm_vcaddq_rot90_u8): Delete.
5804 (__arm_vcaddq_rot270_u8): Delete.
5805 (__arm_vhcaddq_rot90_s8): Delete.
5806 (__arm_vhcaddq_rot270_s8): Delete.
5807 (__arm_vcaddq_rot90_s8): Delete.
5808 (__arm_vcaddq_rot270_s8): Delete.
5809 (__arm_vcaddq_rot90_u16): Delete.
5810 (__arm_vcaddq_rot270_u16): Delete.
5811 (__arm_vhcaddq_rot90_s16): Delete.
5812 (__arm_vhcaddq_rot270_s16): Delete.
5813 (__arm_vcaddq_rot90_s16): Delete.
5814 (__arm_vcaddq_rot270_s16): Delete.
5815 (__arm_vcaddq_rot90_u32): Delete.
5816 (__arm_vcaddq_rot270_u32): Delete.
5817 (__arm_vhcaddq_rot90_s32): Delete.
5818 (__arm_vhcaddq_rot270_s32): Delete.
5819 (__arm_vcaddq_rot90_s32): Delete.
5820 (__arm_vcaddq_rot270_s32): Delete.
5821 (__arm_vcaddq_rot270_m_s8): Delete.
5822 (__arm_vcaddq_rot270_m_s32): Delete.
5823 (__arm_vcaddq_rot270_m_s16): Delete.
5824 (__arm_vcaddq_rot270_m_u8): Delete.
5825 (__arm_vcaddq_rot270_m_u32): Delete.
5826 (__arm_vcaddq_rot270_m_u16): Delete.
5827 (__arm_vcaddq_rot90_m_s8): Delete.
5828 (__arm_vcaddq_rot90_m_s32): Delete.
5829 (__arm_vcaddq_rot90_m_s16): Delete.
5830 (__arm_vcaddq_rot90_m_u8): Delete.
5831 (__arm_vcaddq_rot90_m_u32): Delete.
5832 (__arm_vcaddq_rot90_m_u16): Delete.
5833 (__arm_vhcaddq_rot270_m_s8): Delete.
5834 (__arm_vhcaddq_rot270_m_s32): Delete.
5835 (__arm_vhcaddq_rot270_m_s16): Delete.
5836 (__arm_vhcaddq_rot90_m_s8): Delete.
5837 (__arm_vhcaddq_rot90_m_s32): Delete.
5838 (__arm_vhcaddq_rot90_m_s16): Delete.
5839 (__arm_vcaddq_rot90_x_s8): Delete.
5840 (__arm_vcaddq_rot90_x_s16): Delete.
5841 (__arm_vcaddq_rot90_x_s32): Delete.
5842 (__arm_vcaddq_rot90_x_u8): Delete.
5843 (__arm_vcaddq_rot90_x_u16): Delete.
5844 (__arm_vcaddq_rot90_x_u32): Delete.
5845 (__arm_vcaddq_rot270_x_s8): Delete.
5846 (__arm_vcaddq_rot270_x_s16): Delete.
5847 (__arm_vcaddq_rot270_x_s32): Delete.
5848 (__arm_vcaddq_rot270_x_u8): Delete.
5849 (__arm_vcaddq_rot270_x_u16): Delete.
5850 (__arm_vcaddq_rot270_x_u32): Delete.
5851 (__arm_vhcaddq_rot90_x_s8): Delete.
5852 (__arm_vhcaddq_rot90_x_s16): Delete.
5853 (__arm_vhcaddq_rot90_x_s32): Delete.
5854 (__arm_vhcaddq_rot270_x_s8): Delete.
5855 (__arm_vhcaddq_rot270_x_s16): Delete.
5856 (__arm_vhcaddq_rot270_x_s32): Delete.
5857 (__arm_vcaddq_rot90_f16): Delete.
5858 (__arm_vcaddq_rot270_f16): Delete.
5859 (__arm_vcaddq_rot90_f32): Delete.
5860 (__arm_vcaddq_rot270_f32): Delete.
5861 (__arm_vcaddq_rot270_m_f32): Delete.
5862 (__arm_vcaddq_rot270_m_f16): Delete.
5863 (__arm_vcaddq_rot90_m_f32): Delete.
5864 (__arm_vcaddq_rot90_m_f16): Delete.
5865 (__arm_vcaddq_rot90_x_f16): Delete.
5866 (__arm_vcaddq_rot90_x_f32): Delete.
5867 (__arm_vcaddq_rot270_x_f16): Delete.
5868 (__arm_vcaddq_rot270_x_f32): Delete.
5869 (__arm_vcaddq_rot90): Delete.
5870 (__arm_vcaddq_rot270): Delete.
5871 (__arm_vhcaddq_rot90): Delete.
5872 (__arm_vhcaddq_rot270): Delete.
5873 (__arm_vcaddq_rot270_m): Delete.
5874 (__arm_vcaddq_rot90_m): Delete.
5875 (__arm_vhcaddq_rot270_m): Delete.
5876 (__arm_vhcaddq_rot90_m): Delete.
5877 (__arm_vcaddq_rot90_x): Delete.
5878 (__arm_vcaddq_rot270_x): Delete.
5879 (__arm_vhcaddq_rot90_x): Delete.
5880 (__arm_vhcaddq_rot270_x): Delete.
5882 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
5884 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
5885 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
5886 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
5887 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
5888 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
5889 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
5891 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
5892 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
5893 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
5895 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
5896 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
5897 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
5898 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
5899 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
5900 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
5902 (VCADDQ_ROT270_M): Delete.
5903 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
5904 (VCADDQ_ROT90_M): Delete.
5905 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
5906 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
5908 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
5909 (mve_vcaddq<mve_rot><mode>): Rename into ...
5910 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
5911 (mve_vcaddq_rot270_m_<supf><mode>)
5912 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
5913 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
5914 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
5915 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
5917 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
5919 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
5922 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
5923 preparation statement over braces for a single statement.
5924 (*bt<mode>_setncqi): Likewise.
5925 (*bt<mode>_setncqi_2): New define_insn_and_split.
5927 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
5929 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
5930 case inserting of 64-bit values into a TImode register, to handle
5931 both DImode and DFmode using either *insvti_lowpart_1
5932 or *isnvti_highpart_1.
5934 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
5937 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
5938 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
5939 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
5940 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
5941 when the original source contains a paradoxical subreg.
5943 2023-07-14 Jan Hubicka <jh@suse.cz>
5945 * passes.cc (execute_function_todo): Remove
5946 TODO_rebuild_frequencies
5947 * passes.def: Add rebuild_frequencies pass.
5948 * predict.cc (estimate_bb_frequencies): Drop
5950 (tree_estimate_probability): Update call of
5951 estimate_bb_frequencies.
5952 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
5953 first and do not rebuild if not necessary.
5954 (class pass_rebuild_frequencies): New.
5955 (make_pass_rebuild_frequencies): New.
5956 * profile-count.h: Add profile_count::very_large_p.
5957 * tree-inline.cc (optimize_inline_calls): Do not return
5958 TODO_rebuild_frequencies
5959 * tree-pass.h (TODO_rebuild_frequencies): Remove.
5960 (make_pass_rebuild_frequencies): Declare.
5962 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5964 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
5965 * config/riscv/riscv-protos.h (enum insn_type): New enum.
5966 (expand_cond_len_ternop): New function.
5967 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
5968 (expand_cond_len_ternop): Ditto.
5970 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
5973 * config/bpf/bpf.md: Enable instruction scheduling.
5975 2023-07-14 Tamar Christina <tamar.christina@arm.com>
5977 PR tree-optimization/109154
5978 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
5979 (struct bb_predicate): Add no_predicate_stmts.
5980 (set_bb_predicate): Increase predicate count.
5981 (set_bb_predicate_gimplified_stmts): Conditionally initialize
5983 (get_bb_num_predicate_stmts): New.
5984 (init_bb_predicate): Initialzie no_predicate_stmts.
5985 (release_bb_predicate): Cleanup no_predicate_stmts.
5986 (insert_gimplified_predicates): Preserve no_predicate_stmts.
5988 2023-07-14 Tamar Christina <tamar.christina@arm.com>
5990 PR tree-optimization/109154
5991 * tree-if-conv.cc (gen_simplified_condition,
5992 gen_phi_nest_statement): New.
5993 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
5995 2023-07-14 Richard Biener <rguenther@suse.de>
5997 * gimple.h (gimple_phi_arg): New const overload.
5998 (gimple_phi_arg_def): Make gimple arg const.
5999 (gimple_phi_arg_def_from_edge): New inline function.
6000 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
6002 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
6003 new inline function.
6004 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
6006 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
6008 * common/config/riscv/riscv-common.cc:
6009 (riscv_implied_info): Add zihintntl item.
6010 (riscv_ext_version_table): Ditto.
6011 (riscv_ext_flag_table): Ditto.
6012 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
6013 (TARGET_ZIHINTNTL): Ditto.
6015 2023-07-14 Die Li <lidie@eswincomputing.com>
6017 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
6019 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
6022 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
6023 used by the address of the following memory operand.
6025 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
6028 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
6029 deallocate alloca-only frame.
6031 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
6034 * config/darwin.h (DARWIN_PLATFORM_ID): New.
6035 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
6036 and SDK data to the static linker.
6038 2023-07-13 Carl Love <cel@us.ibm.com>
6040 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
6041 built-in definition return type.
6042 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
6043 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
6044 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
6045 argument to return FPSCR fields.
6046 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
6047 the return value. Add description for
6048 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
6050 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
6053 * config/alpha/alpha.cc (alpha_emit_set_long_const):
6054 Always use DImode when constructing long const.
6056 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
6058 * haifa-sched.cc: Change TRUE/FALSE to true/false.
6060 * lra-assigns.cc: Ditto.
6061 * lra-constraints.cc: Ditto.
6062 * sel-sched.cc: Ditto.
6064 2023-07-13 Andrew Pinski <apinski@marvell.com>
6066 PR tree-optimization/110293
6067 PR tree-optimization/110539
6068 * match.pd: Expand the `x != (typeof x)(x == 0)`
6069 pattern to handle where the inner and outer comparsions
6070 are either `!=` or `==` and handle other constants
6073 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
6075 PR middle-end/109520
6076 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
6077 (lra_asm_insn_error): New prototype.
6078 * lra.cc: Include rtl_error.h.
6079 (lra_set_insn_recog_data): Initialize asm_reloads_num.
6080 (lra_asm_insn_error): New func whose code is taken from ...
6081 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
6082 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
6084 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6086 * genmatch.cc (commutative_op): Add COND_LEN_*
6087 * internal-fn.cc (first_commutative_argument): Ditto.
6089 (get_unconditional_internal_fn): Ditto.
6090 (can_interpret_as_conditional_op_p): Ditto.
6091 (internal_fn_len_index): Ditto.
6092 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
6093 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
6094 (convert_mult_to_fma): Ditto.
6095 (math_opts_dom_walker::after_dom_children): Ditto.
6097 2023-07-13 Pan Li <pan2.li@intel.com>
6099 * config/riscv/riscv.cc (vxrm_rtx): New static var.
6101 (global_state_unknown_p): Removed.
6102 (riscv_entity_mode_after): Removed.
6103 (asm_insn_p): New function.
6104 (vxrm_unknown_p): New function for fixed-point.
6105 (riscv_vxrm_mode_after): Ditto.
6106 (frm_unknown_dynamic_p): New function for floating-point.
6107 (riscv_frm_mode_after): Ditto.
6108 (riscv_mode_after): Leverage new functions.
6110 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
6112 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
6113 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
6114 calling vect_model_load_cost.
6116 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
6118 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
6119 handle memory_access_type VMAT_CONTIGUOUS, remove some
6120 VMAT_CONTIGUOUS_PERMUTE related handlings.
6121 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
6122 without calling vect_model_load_cost.
6124 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
6126 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
6127 VMAT_CONTIGUOUS_REVERSE any more.
6128 (vectorizable_load): Adjust the costing handling on
6129 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
6131 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
6133 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
6134 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
6135 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
6136 assert it will never get VMAT_LOAD_STORE_LANES.
6138 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
6140 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
6141 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
6142 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
6143 remove VMAT_GATHER_SCATTER related handlings and the related parameter
6146 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
6148 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
6149 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
6150 vect_model_load_cost.
6151 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
6152 VMAT_STRIDED_SLP any more, and remove their related handlings.
6154 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
6156 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
6157 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
6158 hoisting decision and without calling vect_model_load_cost.
6159 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
6160 and remove VMAT_INVARIANT related handlings.
6162 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
6164 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
6165 on costing with one extra argument cost_vec.
6166 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
6167 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
6168 gs_info.decl set any more.
6170 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
6172 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
6173 to vect_model_load_cost down to some different transform paths
6174 according to the handlings of different vect_memory_access_types.
6176 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
6178 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
6180 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6182 * config/riscv/autovec.md
6183 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
6184 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
6185 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
6186 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
6187 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
6188 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
6189 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
6190 (len_mask_gather_load<mode><mode>): Ditto.
6191 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
6192 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
6193 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
6194 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
6195 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
6196 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
6197 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
6198 (len_mask_scatter_store<mode><mode>): Ditto.
6199 * config/riscv/predicates.md (const_1_operand): New predicate.
6200 (vector_gs_scale_operand_16): Ditto.
6201 (vector_gs_scale_operand_32): Ditto.
6202 (vector_gs_scale_operand_64): Ditto.
6203 (vector_gs_extension_operand): Ditto.
6204 (vector_gs_scale_operand_16_rv32): Ditto.
6205 (vector_gs_scale_operand_32_rv32): Ditto.
6206 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
6207 (expand_gather_scatter): New function.
6208 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
6209 (emit_vlmax_masked_store_insn): New function.
6210 (emit_nonvlmax_masked_store_insn): Ditto.
6211 (modulo_sel_indices): Ditto.
6212 (expand_vec_perm): Fix SLP for gather/scatter.
6213 (prepare_gather_scatter): New function.
6214 (expand_gather_scatter): Ditto.
6215 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
6216 (subreg:SI (DI CONST_POLY_INT)).
6217 * config/riscv/vector-iterators.md: Add gather/scatter.
6218 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
6219 (@vec_duplicate<mode>): Ditto.
6220 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
6222 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
6224 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6226 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
6227 * config/riscv/riscv-protos.h (enum insn_type): New enum.
6228 (expand_cond_len_binop): New function.
6229 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
6230 (emit_nonvlmax_fp_tu_insn): Ditto.
6231 (need_fp_rounding_p): Ditto.
6232 (expand_cond_len_binop): Ditto.
6233 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
6234 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
6236 2023-07-12 Jan Hubicka <jh@suse.cz>
6238 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
6239 (gimple_duplicate_seme_region): ... this; break out profile updating
6241 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
6242 (ch_base::copy_headers): Update.
6243 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
6244 (gimple_duplicate_seme_region): ... this.
6246 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
6248 PR tree-optimization/107043
6249 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
6251 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
6253 PR tree-optimization/107053
6254 * gimple-range-op.cc (cfn_popcount): Use known set bits.
6256 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
6258 * ira.cc (equiv_init_varies_p): Change return type from int to bool
6259 and adjust function body accordingly.
6260 (equiv_init_movable_p): Ditto.
6261 (memref_used_between_p): Ditto.
6262 * lra-constraints.cc (valid_address_p): Ditto.
6264 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
6266 * range-op.cc (irange_to_masked_value): Remove.
6267 (update_known_bitmask): Update irange value/mask pair instead of
6268 only updating nonzero bits.
6270 2023-07-12 Jan Hubicka <jh@suse.cz>
6272 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
6273 parameter and rewrite profile updating code to handle edges elimination.
6274 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
6275 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
6276 (loop_iv_derived_p): New function.
6277 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
6278 of PHIs and propagation of IV derived variables.
6279 (ch_base::copy_headers): Pass around the invariant edges hash set.
6281 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
6283 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
6284 (last_active_insn): Change "skip_use_p" function argument to bool.
6285 (noce_operand_ok): Change return type from int to bool.
6286 (find_cond_trap): Ditto.
6287 (block_jumps_and_fallthru_p): Change "fallthru_p" and
6288 "jump_p" variables to bool.
6289 (noce_find_if_block): Change return type from int to bool.
6290 (cond_exec_find_if_block): Ditto.
6291 (find_if_case_1): Ditto.
6292 (find_if_case_2): Ditto.
6293 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
6294 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
6295 (cond_exec_process_insns): Change return type from int to bool.
6296 Change "mod_ok" function arg to bool.
6297 (cond_exec_process_if_block): Change return type from int to bool.
6298 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
6300 (noce_emit_store_flag): Change return type from int to bool.
6301 Change "reversep" function arg to bool. Change "cond_complex"
6303 (noce_try_move): Change return type from int to bool.
6304 (noce_try_ifelse_collapse): Ditto.
6305 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
6306 (noce_try_addcc): Change return type from int to bool. Change
6307 "subtract" variable to bool.
6308 (noce_try_store_flag_constants): Change return type from int to bool.
6309 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
6310 (noce_try_cmove): Change return type from int to bool.
6311 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
6312 (noce_try_minmax): Change return type from int to bool. Change
6313 "unsignedp" variable to bool.
6314 (noce_try_abs): Change return type from int to bool. Change
6315 "negate" variable to bool.
6316 (noce_try_sign_mask): Change return type from int to bool.
6317 (noce_try_move): Ditto.
6318 (noce_try_store_flag_constants): Ditto.
6319 (noce_try_cmove): Ditto.
6320 (noce_try_cmove_arith): Ditto.
6321 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
6322 (noce_try_bitop): Change return type from int to bool.
6323 (noce_operand_ok): Ditto.
6324 (noce_convert_multiple_sets): Ditto.
6325 (noce_convert_multiple_sets_1): Ditto.
6326 (noce_process_if_block): Ditto.
6327 (check_cond_move_block): Ditto.
6328 (cond_move_process_if_block): Ditto. Change "success_p"
6330 (rest_of_handle_if_conversion): Change return type to void.
6332 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6334 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
6336 (get_conditional_len_internal_fn): New function.
6337 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
6338 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
6341 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
6344 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
6346 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
6349 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
6350 define_insn_and_split derived from *add<dwi>3_doubleword_concat
6351 and *add<dwi>3_doubleword_zext.
6353 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
6356 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
6357 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
6358 (peephole2): Simplify rega = 0; rega op= rega cases.
6360 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
6362 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
6363 testing a TImode SUBREG of a 128-bit vector register against
6364 zero, use a PTEST instruction instead of first moving it to
6365 a pair of scalar registers.
6367 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
6369 * genopinit.cc (main): Adjust maximal number of optabs and
6371 * gensupport.cc (find_optab): Shift optab by 20 and mode by
6373 * optabs-query.h (optab_handler): Ditto.
6374 (convert_optab_handler): Ditto.
6376 2023-07-12 Richard Biener <rguenther@suse.de>
6378 PR tree-optimization/110630
6379 * tree-vect-slp.cc (vect_add_slp_permutation): New
6380 offset parameter, honor that for the extract code generation.
6381 (vectorizable_slp_permutation_1): Handle offsetted identities.
6383 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6385 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
6386 (umul<mode>3_highpart): Ditto.
6388 2023-07-12 Jan Beulich <jbeulich@suse.com>
6390 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
6391 alternative. Adjust original last alternative's "prefix"
6392 attribute to maybe_evex.
6394 2023-07-12 Jan Beulich <jbeulich@suse.com>
6396 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
6397 vbroadcastss for AVX2. New AVX512F alternative.
6398 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
6399 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
6401 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
6403 * config/riscv/peephole.md: Remove XThead* peephole passes.
6404 * config/riscv/thead.md: Include thead-peephole.md.
6405 * config/riscv/thead-peephole.md: New file.
6407 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
6409 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
6411 (riscv_index_reg_class): Likewise.
6412 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
6413 (riscv_index_reg_class): New function.
6414 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
6415 riscv_index_reg_class().
6416 (REGNO_OK_FOR_INDEX_P): Call new function
6417 riscv_regno_ok_for_index_p().
6419 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
6421 * config/riscv/riscv-protos.h (enum riscv_address_type):
6422 New location of type definition.
6423 (struct riscv_address_info): Likewise.
6424 * config/riscv/riscv.cc (enum riscv_address_type):
6425 Old location of type definition.
6426 (struct riscv_address_info): Likewise.
6428 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
6430 * config/riscv/riscv.h (Xmode): New macro.
6432 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
6434 * config/riscv/riscv.cc (riscv_print_operand_address): Use
6435 output_addr_const rather than riscv_print_operand.
6437 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
6439 * config/riscv/thead.md: Adjust constraints of th_addsl.
6441 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
6443 * config/riscv/thead.cc (th_mempair_operands_p):
6444 Fix documentation of th_mempair_order_operands().
6446 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
6448 * config/riscv/thead.cc (th_mempair_save_regs):
6449 Emit REG_FRAME_RELATED_EXPR notes in prologue.
6451 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
6453 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
6454 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
6455 New XThead extension INSN.
6456 (*zero_extendsidi2_th_extu): New XThead extension INSN.
6457 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
6459 2023-07-12 liuhongt <hongtao.liu@intel.com>
6463 * config/i386/predicates.md
6464 (int_float_vector_all_ones_operand): New predicate.
6465 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
6467 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
6469 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
6471 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
6472 define_insn_and_split to avoid false dependence.
6473 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
6474 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
6475 of operands 1 to '0' to avoid false dependence.
6476 (*andnot<mode>3): Ditto.
6477 (iornot<mode>3): Ditto.
6478 (*<nlogic><mode>3): Ditto.
6480 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
6482 * common/config/i386/cpuinfo.h
6483 (get_intel_cpu): Handle Granite Rapids D.
6484 * common/config/i386/i386-common.cc:
6485 (processor_alias_table): Add graniterapids-d.
6486 * common/config/i386/i386-cpuinfo.h
6487 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
6488 * config.gcc: Add -march=graniterapids-d.
6489 * config/i386/driver-i386.cc (host_detect_local_cpu):
6490 Handle graniterapids-d.
6491 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
6492 * doc/extend.texi: Add graniterapids-d.
6493 * doc/invoke.texi: Ditto.
6495 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
6497 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
6498 Add OPTION_MASK_ISA_AVX512VL.
6499 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
6502 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6504 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
6505 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
6506 (shuffle_compress_patterns): Ditto.
6507 (expand_vec_perm_const_1): Ditto.
6509 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
6511 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
6512 * cfghooks.h (struct cfg_hooks): Change return type of
6513 verify_flow_info from integer to bool.
6514 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
6515 (can_delete_label_p): Ditto.
6516 (rtl_verify_flow_info): Change return type from int to bool
6517 and adjust function body accordingly. Change "err" variable to bool.
6518 (rtl_verify_flow_info_1): Ditto.
6519 (free_bb_for_insn): Change return type to void.
6520 (rtl_merge_blocks): Change "b_empty" variable to bool.
6521 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
6522 (verify_hot_cold_block_grouping): Change return type from int to bool.
6523 Change "err" variable to bool.
6524 (rtl_verify_edges): Ditto.
6525 (rtl_verify_bb_insns): Ditto.
6526 (rtl_verify_bb_pointers): Ditto.
6527 (rtl_verify_bb_insn_chain): Ditto.
6528 (rtl_verify_fallthru): Ditto.
6529 (rtl_verify_bb_layout): Ditto.
6530 (purge_all_dead_edges): Change "purged" variable to bool.
6531 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
6532 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
6533 (load_killed_in_block_p): Change return type from int to bool
6534 and adjust function body accordingly.
6535 (oprs_unchanged_p): Return true/false.
6536 (rest_of_handle_gcse2): Change return type to void.
6537 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
6538 int to bool. Change "err" variable to bool.
6540 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
6542 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
6544 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6546 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
6547 * internal-fn.cc (cond_len_unary_direct): Ditto.
6548 (cond_len_binary_direct): Ditto.
6549 (cond_len_ternary_direct): Ditto.
6550 (expand_cond_len_unary_optab_fn): Ditto.
6551 (expand_cond_len_binary_optab_fn): Ditto.
6552 (expand_cond_len_ternary_optab_fn): Ditto.
6553 (direct_cond_len_unary_optab_supported_p): Ditto.
6554 (direct_cond_len_binary_optab_supported_p): Ditto.
6555 (direct_cond_len_ternary_optab_supported_p): Ditto.
6556 * internal-fn.def (COND_LEN_ADD): Ditto.
6557 (COND_LEN_SUB): Ditto.
6558 (COND_LEN_MUL): Ditto.
6559 (COND_LEN_DIV): Ditto.
6560 (COND_LEN_MOD): Ditto.
6561 (COND_LEN_RDIV): Ditto.
6562 (COND_LEN_MIN): Ditto.
6563 (COND_LEN_MAX): Ditto.
6564 (COND_LEN_FMIN): Ditto.
6565 (COND_LEN_FMAX): Ditto.
6566 (COND_LEN_AND): Ditto.
6567 (COND_LEN_IOR): Ditto.
6568 (COND_LEN_XOR): Ditto.
6569 (COND_LEN_SHL): Ditto.
6570 (COND_LEN_SHR): Ditto.
6571 (COND_LEN_FMA): Ditto.
6572 (COND_LEN_FMS): Ditto.
6573 (COND_LEN_FNMA): Ditto.
6574 (COND_LEN_FNMS): Ditto.
6575 (COND_LEN_NEG): Ditto.
6576 * optabs.def (OPTAB_D): Ditto.
6578 2023-07-11 Richard Biener <rguenther@suse.de>
6580 PR tree-optimization/110614
6581 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
6582 SLP splats are not suitable for re-align ops.
6584 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
6586 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
6588 (vsx_quad_dform_memory_operand): Likewise.
6590 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
6592 * reorg.cc (stop_search_p): Change return type from int to bool
6593 and adjust function body accordingly.
6594 (resource_conflicts_p): Ditto.
6595 (insn_references_resource_p): Change return type from int to bool.
6596 (insn_sets_resource_p): Ditto.
6597 (redirect_with_delay_slots_safe_p): Ditto.
6598 (condition_dominates_p): Change return type from int to bool
6599 and adjust function body accordingly.
6600 (redirect_with_delay_list_safe_p): Ditto.
6601 (check_annul_list_true_false): Ditto. Change "annul_true_p"
6602 function argument to bool.
6603 (steal_delay_list_from_target): Change "pannul_p" function
6604 argument to bool pointer. Change "must_annul" and "used_annul"
6605 variables from int to bool.
6606 (steal_delay_list_from_fallthrough): Ditto.
6607 (own_thread_p): Change return type from int to bool and adjust
6608 function body accordingly. Change "allow_fallthrough" function
6610 (reorg_redirect_jump): Change return type from int to bool.
6611 (fill_simple_delay_slots): Change "non_jumps_p" function
6612 argument from int to bool. Change "maybe_never" varible to bool.
6613 (fill_slots_from_thread): Change "likely", "thread_if_true" and
6614 "own_thread" function arguments to bool. Change "lose" and
6615 "must_annul" variables to bool.
6616 (delete_from_delay_slot): Change "had_barrier" variable to bool.
6617 (try_merge_delay_insns): Change "annul_p" variable to bool.
6618 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
6620 (rest_of_handle_delay_slots): Change return type from int to void
6621 and adjust function body accordingly.
6623 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
6625 * doc/extend.texi (RISC-V Operand Modifiers): New.
6627 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6629 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
6630 (insert_insn_end_basic_block): Ditto.
6631 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
6632 * gcse.cc (insert_insn_end_basic_block): Export as global function.
6633 * gcse.h (insert_insn_end_basic_block): Ditto.
6635 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
6638 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
6639 (arm_builtin_decl): Hahndle MVE builtins.
6640 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
6641 (add_unique_function): Fix handling of
6642 __ARM_MVE_PRESERVE_USER_NAMESPACE.
6643 (add_overloaded_function): Likewise.
6644 * config/arm/arm-protos.h (builtin_decl): New declaration.
6646 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
6648 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
6650 2023-07-10 Xi Ruoyao <xry111@xry111.site>
6652 PR tree-optimization/110557
6653 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
6654 Ensure the output sign-extended if necessary.
6656 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
6658 * config/i386/i386.md (peephole2): Transform xchg insn with a
6659 REG_UNUSED note to a (simple) move.
6660 (*insvti_lowpart_1): New define_insn_and_split.
6661 (*insvdi_lowpart_1): Likewise.
6663 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
6665 * config/i386/i386-features.cc (compute_convert_gain): Tweak
6666 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
6667 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
6668 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
6670 2023-07-10 liuhongt <hongtao.liu@intel.com>
6673 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
6674 splitter to detect fp max pattern.
6675 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
6677 2023-07-09 Jan Hubicka <jh@suse.cz>
6679 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
6680 (dump_edge_info): Likewise.
6681 (dump_bb_info): Likewise.
6682 * profile-count.cc (profile_count::dump): Add comma between quality and
6685 2023-07-08 Jan Hubicka <jh@suse.cz>
6687 PR tree-optimization/110600
6688 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
6690 2023-07-08 Jan Hubicka <jh@suse.cz>
6692 PR middle-end/110590
6693 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
6694 inner loops and be more careful about inconsistent profiles.
6695 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
6696 exit is followed by other exit.
6698 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
6700 * cprop.cc (reg_available_p): Change return type from int to bool.
6701 (reg_not_set_p): Ditto.
6702 (try_replace_reg): Ditto. Change "success" variable to bool.
6703 (cprop_jump): Change return type from int to void
6704 and adjust function body accordingly.
6705 (constprop_register): Ditto.
6706 (cprop_insn): Ditto. Change "changed" variable to bool.
6707 (local_cprop_pass): Change return type from int to void
6708 and adjust function body accordingly.
6709 (bypass_block): Ditto. Change "change", "may_be_loop_header"
6710 and "removed_p" variables to bool.
6711 (bypass_conditional_jumps): Change return type from int to void
6712 and adjust function body accordingly. Change "changed"
6714 (one_cprop_pass): Ditto.
6716 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
6718 * gcse.cc (expr_equiv_p): Change return type from int to bool.
6719 (oprs_unchanged_p): Change return type from int to void
6720 and adjust function body accordingly.
6721 (oprs_anticipatable_p): Ditto.
6722 (oprs_available_p): Ditto.
6723 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
6724 arguments to bool. Change "found" variable to bool.
6725 (load_killed_in_block_p): Change return type from int to void and
6726 adjust function body accordingly. Change "avail_p" argument to bool.
6727 (pre_expr_reaches_here_p): Change return type from int to void
6728 and adjust function body accordingly.
6729 (pre_delete): Ditto. Change "changed" variable to bool.
6730 (pre_gcse): Change return type from int to void
6731 and adjust function body accordingly. Change "did_insert" and
6732 "changed" variables to bool.
6733 (one_pre_gcse_pass): Change return type from int to void
6734 and adjust function body accordingly. Change "changed" variable
6736 (should_hoist_expr_to_dom): Change return type from int to void
6737 and adjust function body accordingly. Change
6738 "visited_allocated_locally" variable to bool.
6739 (hoist_code): Change return type from int to void and adjust
6740 function body accordingly. Change "changed" variable to bool.
6741 (one_code_hoisting_pass): Ditto.
6742 (pre_edge_insert): Change return type from int to void and adjust
6743 function body accordingly. Change "did_insert" variable to bool.
6744 (pre_expr_reaches_here_p_work): Change return type from int to void
6745 and adjust function body accordingly.
6746 (simple_mem): Ditto.
6747 (want_to_gcse_p): Change return type from int to void
6748 and adjust function body accordingly.
6749 (can_assign_to_reg_without_clobbers_p): Update function body
6750 for bool return type.
6751 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
6752 (pre_insert_copies): Change "added_copy" variable to bool.
6754 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
6758 * doc/invoke.texi (Warning Options): Fix typos.
6760 2023-07-07 Jan Hubicka <jh@suse.cz>
6762 * profile-count.cc (profile_count::dump): Add FUN
6763 parameter; print relative frequency.
6764 (profile_count::debug): Update.
6765 * profile-count.h (profile_count::dump): Update
6768 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
6772 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
6773 TImode destinations from paradoxical SUBREGs (setting the lowpart)
6774 into explicit zero extensions. Use *insvti_highpart_1 instruction
6775 to set the highpart of a TImode destination.
6777 2023-07-07 Jan Hubicka <jh@suse.cz>
6779 * predict.cc (force_edge_cold): Use
6780 set_edge_probability_and_rescale_others; improve dumps.
6782 2023-07-07 Jan Hubicka <jh@suse.cz>
6784 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
6786 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
6789 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
6791 * config/s390/s390.cc (vec_init): Fix default case
6793 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
6795 * lra-assigns.cc (assign_by_spills): Add reload insns involving
6796 reload pseudos with non-refined class to be processed on the next
6798 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
6799 (in_class_p): Use it.
6800 (print_curr_insn_alt): New func.
6801 (process_alt_operands): Use it. Improve debug info.
6802 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
6803 pseudo class if it is not refined yet.
6805 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
6807 * value-range.cc (irange::get_bitmask_from_range): Return all the
6808 known bits for a singleton.
6809 (irange::set_range_from_bitmask): Set a range of a singleton when
6812 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
6814 * value-range.cc (irange::intersect): Leave normalization to
6817 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
6819 * data-streamer-in.cc (streamer_read_value_range): Adjust for
6821 * data-streamer-out.cc (streamer_write_vrange): Same.
6822 * range-op.cc (operator_cast::fold_range): Same.
6823 * value-range-pretty-print.cc
6824 (vrange_printer::print_irange_bitmasks): Same.
6825 * value-range-storage.cc (irange_storage::write_lengths_address):
6827 (irange_storage::set_irange): Same.
6828 (irange_storage::get_irange): Same.
6829 (irange_storage::size): Same.
6830 (irange_storage::dump): Same.
6831 * value-range-storage.h: Same.
6832 * value-range.cc (debug): New.
6833 (irange_bitmask::dump): New.
6834 (add_vrange): Adjust for value/mask.
6835 (irange::operator=): Same.
6836 (irange::set): Same.
6837 (irange::verify_range): Same.
6838 (irange::operator==): Same.
6839 (irange::contains_p): Same.
6840 (irange::irange_single_pair_union): Same.
6841 (irange::union_): Same.
6842 (irange::intersect): Same.
6843 (irange::invert): Same.
6844 (irange::get_nonzero_bits_from_range): Rename to...
6845 (irange::get_bitmask_from_range): ...this.
6846 (irange::set_range_from_nonzero_bits): Rename to...
6847 (irange::set_range_from_bitmask): ...this.
6848 (irange::set_nonzero_bits): Rename to...
6849 (irange::update_bitmask): ...this.
6850 (irange::get_nonzero_bits): Rename to...
6851 (irange::get_bitmask): ...this.
6852 (irange::intersect_nonzero_bits): Rename to...
6853 (irange::intersect_bitmask): ...this.
6854 (irange::union_nonzero_bits): Rename to...
6855 (irange::union_bitmask): ...this.
6856 (irange_bitmask::verify_mask): New.
6857 * value-range.h (class irange_bitmask): New.
6858 (irange_bitmask::set_unknown): New.
6859 (irange_bitmask::unknown_p): New.
6860 (irange_bitmask::irange_bitmask): New.
6861 (irange_bitmask::get_precision): New.
6862 (irange_bitmask::get_nonzero_bits): New.
6863 (irange_bitmask::set_nonzero_bits): New.
6864 (irange_bitmask::operator==): New.
6865 (irange_bitmask::union_): New.
6866 (irange_bitmask::intersect): New.
6867 (class irange): Friend vrange_printer.
6868 (irange::varying_compatible_p): Adjust for bitmask.
6869 (irange::set_varying): Same.
6870 (irange::set_nonzero): Same.
6872 2023-07-07 Jan Beulich <jbeulich@suse.com>
6874 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
6876 2023-07-07 Jan Beulich <jbeulich@suse.com>
6878 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
6879 alternative. Switch new last alternative's "isa" attribute to
6881 (vec_extract_hi_v32qi): Likewise.
6883 2023-07-07 Pan Li <pan2.li@intel.com>
6884 Robin Dapp <rdapp@ventanamicro.com>
6886 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
6888 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
6889 (riscv_mode_exit): Likewise for exit mode.
6890 (riscv_mode_needed): Likewise for needed mode.
6891 (riscv_mode_after): Likewise for after mode.
6893 2023-07-07 Pan Li <pan2.li@intel.com>
6895 * config/riscv/vector.md: Fix typo.
6897 2023-07-06 Jan Hubicka <jh@suse.cz>
6900 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
6901 of iterations determined.
6902 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
6904 2023-07-06 Jan Hubicka <jh@suse.cz>
6906 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
6907 probability update to be safe on loops with subloops.
6908 Make bound parameter to be iteration bound.
6909 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
6910 of scale_loop_profile.
6911 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
6913 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
6915 PR tree-optimization/110449
6916 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
6917 vec_loop for the unrolled loop.
6919 2023-07-06 Jan Hubicka <jh@suse.cz>
6921 * cfg.cc (set_edge_probability_and_rescale_others): New function.
6922 (update_bb_profile_for_threading): Use it; simplify the rest.
6923 * cfg.h (set_edge_probability_and_rescale_others): Declare.
6924 * profile-count.h (profile_probability::apply_scale): New.
6926 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
6928 * doc/extend.texi (ARC Built-in Functions): Update documentation
6929 with missing builtins.
6931 2023-07-06 Richard Biener <rguenther@suse.de>
6933 PR tree-optimization/110556
6934 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
6935 assign code and all operands of non-stores.
6937 2023-07-06 Richard Biener <rguenther@suse.de>
6939 PR tree-optimization/110563
6940 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
6941 Remove second argument.
6942 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
6943 Remove for_epilogue_p argument. Merge assert ...
6944 (vect_analyze_loop_2): ... with check done before determining
6945 partial vectors by moving it after.
6946 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
6948 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
6950 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
6951 few things re 'reorder' option and strings.
6952 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
6954 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
6956 * gengtype-parse.cc: Clean up obsolete parametrized structs
6958 * gengtype.cc: Likewise.
6959 * gengtype.h: Likewise.
6961 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
6963 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
6966 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
6968 * gengtype-parse.cc (token_names): Add '"user"'.
6969 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
6970 'FIRST_TOKEN_WITH_VALUE'.
6972 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
6974 * doc/gty.texi (GTY Options) <string_length>: Enhance.
6976 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
6978 * gengtype.cc (write_root, write_roots): Explicitly reject
6979 'string_length' option.
6980 * doc/gty.texi (GTY Options) <string_length>: Document.
6982 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
6984 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
6985 (ggc_pch_write_object): Remove 'bool is_string' argument.
6986 * ggc-common.cc: Adjust.
6987 * ggc-page.cc: Likewise.
6989 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
6991 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
6993 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
6995 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
6996 and add description for inling of function with arch and tune
6999 2023-07-06 Richard Biener <rguenther@suse.de>
7001 PR tree-optimization/110515
7002 * tree-ssa-pre.cc (compute_avail): Make code dealing
7003 with hoisting loads with different alias-sets more
7006 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7008 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
7010 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
7012 * config/i386/i386.cc (ix86_can_inline_p): If callee has
7013 default arch=x86-64 and tune=generic, do not block the
7014 inlining to its caller. Also allow callee with different
7015 arch= to be inlined if it has always_inline attribute and
7016 it's ISA is subset of caller's.
7018 2023-07-06 liuhongt <hongtao.liu@intel.com>
7020 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
7021 DF/SFmode AND/IOR/XOR/ANDN operations.
7023 2023-07-06 Andrew Pinski <apinski@marvell.com>
7025 PR middle-end/110554
7026 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
7027 just build using boolean_type_node instead of the cond_type.
7028 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
7029 that will feed into the COND_EXPR.
7031 2023-07-06 liuhongt <hongtao.liu@intel.com>
7034 * config/i386/i386.md (movdf_internal): Disparage slightly for
7035 2 alternatives (r,v) and (v,r) by adding constraint modifier
7038 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
7041 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
7042 initialization of new_addr.
7044 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
7046 PR tree-optimization/110474
7047 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
7048 unroll factor while selecting the epilog vect loop VF.
7050 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
7052 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
7055 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
7057 * gimple-range-gori.cc (compute_operand_range): After calling
7058 compute_operand2_range, recursively call self if needed.
7059 (compute_operand2_range): Turn into a leaf function.
7060 (gori_compute::compute_operand1_and_operand2_range): Finish
7061 operand2 calculation.
7062 * gimple-range-gori.h (compute_operand2_range): Remove name param.
7064 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
7066 * gimple-range-gori.cc (compute_operand_range): After calling
7067 compute_operand1_range, recursively call self if needed.
7068 (compute_operand1_range): Turn into a leaf function.
7069 (gori_compute::compute_operand1_and_operand2_range): Finish
7070 operand1 calculation.
7071 * gimple-range-gori.h (compute_operand1_range): Remove name param.
7073 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
7075 * gimple-range-gori.cc (compute_operand_range): Check for
7076 operand interdependence when both op1 and op2 are computed.
7077 (compute_operand1_and_operand2_range): No checks required now.
7079 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
7081 * gimple-range-gori.cc (compute_operand_range): Check for
7082 a relation between op1 and op2 and use that instead.
7083 (compute_operand1_range): Don't look for a relation override.
7084 (compute_operand2_range): Ditto.
7086 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
7088 * doc/contrib.texi (Contributors): Update my entry.
7090 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
7092 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
7095 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
7097 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
7098 scehdule_more_p and contributes_to_priority indirect frunction
7099 type from int to bool.
7100 (no_real_insns_p): Change return type from int to bool.
7101 (contributes_to_priority): Ditto.
7102 * haifa-sched.cc (no_real_insns_p): Change return type from
7103 int to bool and adjust function body accordingly.
7104 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
7105 variable type from int to bool.
7106 (ps_insn_advance_column): Change return type from int to bool.
7107 (ps_has_conflicts): Ditto. Change "has_conflicts"
7108 variable type from int to bool.
7109 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
7110 (conditions_mutex_p): Ditto.
7111 * sched-ebb.cc (schedule_more_p): Ditto.
7112 (ebb_contributes_to_priority): Change return type from
7113 int to bool and adjust function body accordingly.
7114 * sched-rgn.cc (is_cfg_nonregular): Ditto.
7115 (check_live_1): Ditto.
7117 (find_conditional_protection): Ditto.
7118 (is_conditionally_protected): Ditto.
7120 (is_exception_free): Ditto.
7121 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
7122 variables from int to bool.
7123 (extend_rgns): Change "rescan" variable from int to bool.
7124 (check_live): Change return type from
7125 int to bool and adjust function body accordingly.
7126 (can_schedule_ready_p): Ditto.
7127 (schedule_more_p): Ditto.
7128 (contributes_to_priority): Ditto.
7130 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
7132 * doc/md.texi: Document that vec_set and vec_extract must not
7134 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
7135 (gimple_expand_vec_set_extract_expr): ...to this.
7136 (gimple_expand_vec_exprs): Call renamed function.
7137 * internal-fn.cc (vec_extract_direct): Add.
7138 (expand_vec_extract_optab_fn): New function to expand
7140 (direct_vec_extract_optab_supported_p): Add.
7141 * internal-fn.def (VEC_EXTRACT): Add.
7142 * optabs.cc (can_vec_extract_var_idx_p): New function.
7143 * optabs.h (can_vec_extract_var_idx_p): Declare.
7145 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
7147 * config/riscv/autovec.md: Add gen_lowpart.
7149 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
7151 * config/riscv/autovec.md: Allow register index operand.
7153 2023-07-05 Pan Li <pan2.li@intel.com>
7155 * config/riscv/riscv-vector-builtins.cc
7156 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
7158 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
7160 * config/riscv/autovec.md: Use float_truncate.
7162 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7164 * internal-fn.cc (internal_fn_len_index): Apply
7165 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
7166 (internal_fn_mask_index): Ditto.
7167 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
7168 (supports_vec_scatter_store_p): Ditto.
7169 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
7170 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
7171 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
7172 (vect_get_strided_load_store_ops): Ditto.
7173 (vectorizable_store): Ditto.
7174 (vectorizable_load): Ditto.
7176 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
7177 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7179 * simplify-rtx.cc (native_encode_rtx): Ditto.
7180 (native_decode_vector_rtx): Ditto.
7181 (simplify_const_vector_byte_offset): Ditto.
7182 (simplify_const_vector_subreg): Ditto.
7183 * tree.cc (build_truth_vector_type_for_mode): Ditto.
7184 * varasm.cc (output_constant_pool_2): Ditto.
7186 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
7188 * config/mips/mips.cc (mips_expand_block_move): don't expand for
7189 r6 with -mno-unaligned-access option if one or both of src and
7190 dest are unaligned. restruct: return directly if length is not const.
7191 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
7193 2023-07-05 Jan Beulich <jbeulich@suse.com>
7196 * config/i386/sse.md: New splitters to simplify
7197 not;vec_duplicate as a singular vpternlog.
7198 (one_cmpl<mode>2): Allow broadcast for operand 1.
7199 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
7201 2023-07-05 Jan Beulich <jbeulich@suse.com>
7204 * config/i386/sse.md: New splitters to simplify
7205 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
7207 2023-07-05 Jan Beulich <jbeulich@suse.com>
7210 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
7211 form of splitter for PR target/100711.
7213 2023-07-05 Richard Biener <rguenther@suse.de>
7215 PR middle-end/110541
7216 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
7219 2023-07-05 Jan Beulich <jbeulich@suse.com>
7222 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
7223 for memory form operand 1.
7225 2023-07-05 Jan Beulich <jbeulich@suse.com>
7228 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
7229 bitwise vector operations.
7230 * config/i386/sse.md (*iornot<mode>3): New insn.
7231 (*xnor<mode>3): Likewise.
7232 (*<nlogic><mode>3): Likewise.
7233 (andor): New code iterator.
7234 (nlogic): New code attribute.
7235 (ternlog_nlogic): Likewise.
7237 2023-07-05 Richard Biener <rguenther@suse.de>
7239 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
7241 2023-07-05 yulong <shiyulong@iscas.ac.cn>
7243 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
7245 2023-07-05 yulong <shiyulong@iscas.ac.cn>
7247 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
7248 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
7249 (ADJUST_ALIGNMENT): Ditto.
7250 (RVV_TUPLE_PARTIAL_MODES): Ditto.
7251 (ADJUST_NUNITS): Ditto.
7252 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
7254 (vfloat16mf4x3_t): Ditto.
7255 (vfloat16mf4x4_t): Ditto.
7256 (vfloat16mf4x5_t): Ditto.
7257 (vfloat16mf4x6_t): Ditto.
7258 (vfloat16mf4x7_t): Ditto.
7259 (vfloat16mf4x8_t): Ditto.
7260 (vfloat16mf2x2_t): Ditto.
7261 (vfloat16mf2x3_t): Ditto.
7262 (vfloat16mf2x4_t): Ditto.
7263 (vfloat16mf2x5_t): Ditto.
7264 (vfloat16mf2x6_t): Ditto.
7265 (vfloat16mf2x7_t): Ditto.
7266 (vfloat16mf2x8_t): Ditto.
7267 (vfloat16m1x2_t): Ditto.
7268 (vfloat16m1x3_t): Ditto.
7269 (vfloat16m1x4_t): Ditto.
7270 (vfloat16m1x5_t): Ditto.
7271 (vfloat16m1x6_t): Ditto.
7272 (vfloat16m1x7_t): Ditto.
7273 (vfloat16m1x8_t): Ditto.
7274 (vfloat16m2x2_t): Ditto.
7275 (vfloat16m2x3_t): Ditto.
7276 (vfloat16m2x4_t): Ditto.
7277 (vfloat16m4x2_t): Ditto.
7278 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
7279 (vfloat16mf4x3_t): Ditto.
7280 (vfloat16mf4x4_t): Ditto.
7281 (vfloat16mf4x5_t): Ditto.
7282 (vfloat16mf4x6_t): Ditto.
7283 (vfloat16mf4x7_t): Ditto.
7284 (vfloat16mf4x8_t): Ditto.
7285 (vfloat16mf2x2_t): Ditto.
7286 (vfloat16mf2x3_t): Ditto.
7287 (vfloat16mf2x4_t): Ditto.
7288 (vfloat16mf2x5_t): Ditto.
7289 (vfloat16mf2x6_t): Ditto.
7290 (vfloat16mf2x7_t): Ditto.
7291 (vfloat16mf2x8_t): Ditto.
7292 (vfloat16m1x2_t): Ditto.
7293 (vfloat16m1x3_t): Ditto.
7294 (vfloat16m1x4_t): Ditto.
7295 (vfloat16m1x5_t): Ditto.
7296 (vfloat16m1x6_t): Ditto.
7297 (vfloat16m1x7_t): Ditto.
7298 (vfloat16m1x8_t): Ditto.
7299 (vfloat16m2x2_t): Ditto.
7300 (vfloat16m2x3_t): Ditto.
7301 (vfloat16m2x4_t): Ditto.
7302 (vfloat16m4x2_t): Ditto.
7303 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
7304 * config/riscv/riscv.md: New.
7305 * config/riscv/vector-iterators.md: New.
7307 2023-07-04 Andrew Pinski <apinski@marvell.com>
7309 PR tree-optimization/110487
7310 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
7311 build a nonstandard integer and use that.
7313 2023-07-04 Andrew Pinski <apinski@marvell.com>
7315 * match.pd (a?-1:0): Cast type an integer type
7316 rather the type before the negative.
7319 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
7321 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
7322 Change to use HARD_REG_BIT and its macros.
7323 * config/xtensa/xtensa.md
7324 (peephole2: regmove elimination during DFmode input reload):
7327 2023-07-04 Richard Biener <rguenther@suse.de>
7329 PR tree-optimization/110491
7330 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
7331 whether the PHI args are possibly undefined before folding
7334 2023-07-04 Pan Li <pan2.li@intel.com>
7335 Thomas Schwinge <thomas@codesourcery.com>
7337 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
7338 bits for machine mode table.
7339 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
7340 HOST machine mode bits.
7341 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
7342 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
7344 * tree-streamer.h (streamer_mode_table): Ditto.
7345 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
7346 as the packing limit.
7347 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
7349 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
7351 * lto-streamer.h (class lto_input_block): Capture
7352 'lto_file_decl_data *file_data' instead of just
7353 'unsigned char *mode_table'.
7354 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
7355 * ipa-fnsummary.cc (inline_read_section): Likewise.
7356 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
7357 * ipa-modref.cc (read_section): Likewise.
7358 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
7360 * ipa-sra.cc (isra_read_summary_section): Likewise.
7361 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
7362 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
7363 * lto-streamer-in.cc (lto_read_body_or_constructor)
7364 (lto_input_toplevel_asms): Likewise.
7365 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
7367 2023-07-04 Richard Biener <rguenther@suse.de>
7369 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
7370 (empty_bb_or_one_feeding_into_p): Check for them.
7371 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
7372 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
7374 2023-07-04 Richard Biener <rguenther@suse.de>
7376 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
7377 check guarding scalar_niter underflow.
7379 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
7381 PR tree-optimization/110531
7382 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
7383 slp_done_for_suggested_uf to false.
7385 2023-07-04 Richard Biener <rguenther@suse.de>
7387 PR tree-optimization/110228
7388 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
7389 Mark SSA may-undefs.
7390 (bb_no_side_effects_p): Check stmt uses for undefs.
7392 2023-07-04 Richard Biener <rguenther@suse.de>
7394 PR tree-optimization/110436
7395 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
7396 force live but not relevant pattern stmts relevant.
7398 2023-07-04 Lili Cui <lili.cui@intel.com>
7400 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
7401 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
7403 2023-07-04 Richard Biener <rguenther@suse.de>
7405 PR middle-end/110495
7406 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
7407 since we do not set TREE_OVERFLOW on those since the
7408 introduction of VL vectors.
7409 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
7410 at TREE_OVERFLOW to determine validity of association.
7412 2023-07-04 Richard Biener <rguenther@suse.de>
7414 PR tree-optimization/110310
7415 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
7416 Move costing part ...
7417 (vect_analyze_loop_costing): ... here. Integrate better
7418 estimate for epilogues from ...
7419 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
7420 with actual epilogue status.
7421 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
7422 avoid cancelling epilogue vectorization.
7423 (vect_update_epilogue_niters): Remove. No longer update
7424 epilogue LOOP_VINFO_NITERS.
7426 2023-07-04 Pan Li <pan2.li@intel.com>
7429 2023-07-03 Pan Li <pan2.li@intel.com>
7431 * config/riscv/vector.md: Fix typo.
7433 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7435 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
7436 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
7437 (expand_gather_load_optab_fn): Ditto.
7438 (internal_load_fn_p): Ditto.
7439 (internal_store_fn_p): Ditto.
7440 (internal_gather_scatter_fn_p): Ditto.
7441 (internal_fn_len_index): Ditto.
7442 (internal_fn_mask_index): Ditto.
7443 (internal_fn_stored_value_index): Ditto.
7444 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
7445 (LEN_MASK_SCATTER_STORE): Ditto.
7446 * optabs.def (OPTAB_CD): Ditto.
7448 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7450 * config/riscv/riscv-vsetvl.cc
7451 (vector_insn_info::parse_insn): Add early break.
7453 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
7455 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
7456 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
7458 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
7460 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
7462 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
7464 * common/config/riscv/riscv-common.cc: Add support for zvbb,
7465 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
7466 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
7467 * config/riscv/arch-canonicalize: Add canonicalization info for
7468 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
7469 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
7470 (MASK_ZVBC): Likewise.
7471 (TARGET_ZVBB): Likewise.
7472 (TARGET_ZVBC): Likewise.
7473 (MASK_ZVKG): Likewise.
7474 (MASK_ZVKNED): Likewise.
7475 (MASK_ZVKNHA): Likewise.
7476 (MASK_ZVKNHB): Likewise.
7477 (MASK_ZVKSED): Likewise.
7478 (MASK_ZVKSH): Likewise.
7479 (MASK_ZVKN): Likewise.
7480 (MASK_ZVKNC): Likewise.
7481 (MASK_ZVKNG): Likewise.
7482 (MASK_ZVKS): Likewise.
7483 (MASK_ZVKSC): Likewise.
7484 (MASK_ZVKSG): Likewise.
7485 (MASK_ZVKT): Likewise.
7486 (TARGET_ZVKG): Likewise.
7487 (TARGET_ZVKNED): Likewise.
7488 (TARGET_ZVKNHA): Likewise.
7489 (TARGET_ZVKNHB): Likewise.
7490 (TARGET_ZVKSED): Likewise.
7491 (TARGET_ZVKSH): Likewise.
7492 (TARGET_ZVKN): Likewise.
7493 (TARGET_ZVKNC): Likewise.
7494 (TARGET_ZVKNG): Likewise.
7495 (TARGET_ZVKS): Likewise.
7496 (TARGET_ZVKSC): Likewise.
7497 (TARGET_ZVKSG): Likewise.
7498 (TARGET_ZVKT): Likewise.
7499 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
7501 2023-07-03 Andrew Pinski <apinski@marvell.com>
7503 PR middle-end/110510
7504 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
7506 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
7508 * config/darwin.h: Avoid duplicate multiply_defined specs on
7509 earlier Darwin versions with shared libgcc.
7511 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
7513 * tree.h (tree_int_cst_equal): Change return type from int to bool.
7514 (operand_equal_for_phi_arg_p): Ditto.
7515 (tree_map_base_marked_p): Ditto.
7516 * tree.cc (contains_placeholder_p): Update function body
7517 for bool return type.
7518 (type_cache_hasher::equal): Ditto.
7519 (tree_map_base_hash): Change return type
7520 from int to void and adjust function body accordingly.
7521 (tree_int_cst_equal): Ditto.
7522 (operand_equal_for_phi_arg_p): Ditto.
7523 (get_narrower): Change "first" variable to bool.
7524 (cl_option_hasher::equal): Update function body for bool return type.
7525 * ggc.h (ggc_set_mark): Change return type from int to bool.
7526 (ggc_marked_p): Ditto.
7527 * ggc-page.cc (gt_ggc_mx): Change return type
7528 from int to void and adjust function body accordingly.
7529 (ggc_set_mark): Ditto.
7531 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7533 * config/riscv/autovec.md: Change order of
7534 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
7535 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
7536 * doc/md.texi: Ditto.
7537 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
7538 * internal-fn.cc (len_maskload_direct): Ditto.
7539 (len_maskstore_direct): Ditto.
7540 (add_len_and_mask_args): New function.
7541 (expand_partial_load_optab_fn): Change order of
7542 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
7543 (expand_partial_store_optab_fn): Ditto.
7544 (internal_fn_len_index): New function.
7545 (internal_fn_mask_index): Change order of
7546 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
7547 (internal_fn_stored_value_index): Ditto.
7548 (internal_len_load_store_bias): Ditto.
7549 * internal-fn.h (internal_fn_len_index): New function.
7550 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
7551 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
7552 * tree-vect-stmts.cc (vectorizable_store): Ditto.
7553 (vectorizable_load): Ditto.
7555 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
7558 * doc/gm2.texi (Semantic checking): Include examples using
7559 -Wuninit-variable-checking.
7561 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7563 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
7564 (*single_widen_fnma<mode>): Ditto.
7565 (*double_widen_fms<mode>): Ditto.
7566 (*single_widen_fms<mode>): Ditto.
7567 (*double_widen_fnms<mode>): Ditto.
7568 (*single_widen_fnms<mode>): Ditto.
7570 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7572 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
7573 into "*" in pattern name which simplifies build files.
7574 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
7575 (*pred_single_widen_mul<mode>): New pattern.
7577 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
7579 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
7580 the index to be 0 or 1.
7582 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
7585 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7587 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
7588 (*single_widen_fnma<mode>): Ditto.
7589 (*double_widen_fms<mode>): Ditto.
7590 (*single_widen_fms<mode>): Ditto.
7591 (*double_widen_fnms<mode>): Ditto.
7592 (*single_widen_fnms<mode>): Ditto.
7594 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7596 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
7597 (*single_widen_fnma<mode>): Ditto.
7598 (*double_widen_fms<mode>): Ditto.
7599 (*single_widen_fms<mode>): Ditto.
7600 (*double_widen_fnms<mode>): Ditto.
7601 (*single_widen_fnms<mode>): Ditto.
7603 2023-07-03 Pan Li <pan2.li@intel.com>
7605 * config/riscv/vector.md: Fix typo.
7607 2023-07-03 Richard Biener <rguenther@suse.de>
7609 PR tree-optimization/110506
7610 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
7611 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
7613 2023-07-03 Richard Biener <rguenther@suse.de>
7615 PR tree-optimization/110506
7616 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
7617 type before relying on TYPE_PRECISION to produce a nonzero mask.
7619 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
7621 * config/mips/mips.md(*and<mode>3_mips16): Generates
7622 ZEB/ZEH instructions.
7624 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
7626 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
7627 address register to M16_REGS for MIPS16.
7628 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
7629 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
7630 (AVAIL_NON_MIPS16 (cache..)): Update to
7631 AVAIL_MIPS16E2_OR_NON_MIPS16.
7632 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
7633 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
7635 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
7637 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
7638 for ISA_HAS_MIPS16E2.
7639 (ISA_HAS_SYNC): Same as above.
7640 (ISA_HAS_LL_SC): Same as above.
7642 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
7644 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
7645 Add logics for generating instruction.
7646 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
7647 * config/mips/mips.md(mov_<load>l): Generates instructions.
7648 (mov_<load>r): Same as above.
7649 (mov_<store>l): Adjusted for the conditions above.
7650 (mov_<store>r): Same as above.
7651 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
7652 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
7654 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
7656 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
7657 (mips_const_insns): Same as above.
7658 (mips_output_move): Same as above.
7659 (mips_output_function_prologue): Same as above.
7660 * config/mips/mips.md: Same as above
7662 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
7664 * config/mips/constraints.md(Yz): New constraints for mips16e2.
7665 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
7666 (mips_bit_clear_info): Same as above.
7667 * config/mips/mips.cc(mips_bit_clear_info): New function for
7668 generating instructions.
7669 (mips_bit_clear_p): Same as above.
7670 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
7671 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
7672 (*and<mode>3): Generates INS instruction.
7673 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
7674 (ior<mode>3): Add logics for ORI instruction.
7675 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
7676 (*ior<mode>3_mips16): Add logics for XORI instruction.
7677 (*xor<mode>3_mips16): Generates XORI instrucion.
7678 (*extzv<mode>): Add logics for EXT instruction.
7679 (*insv<mode>): Add logics for INS instruction.
7680 * config/mips/predicates.md(bit_clear_operand): New predicate for
7681 generating bitwise instructions.
7682 (and_reg_operand): Add logics for generating bitwise instructions.
7684 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
7686 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
7687 that uses global pointer register.
7688 (mips16_unextended_reference_p): Same as above.
7689 (mips_pic_base_register): Same as above.
7690 (mips_init_relocs): Same as above.
7691 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
7692 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
7693 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
7694 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
7696 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
7698 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
7699 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
7700 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
7701 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
7702 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
7703 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
7705 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
7707 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
7709 * config/mips/mips.h(__mips_mips16e2): Defined a new
7711 (ISA_HAS_MIPS16E2): Defined a new macro.
7712 (ASM_SPEC): Pass mmips16e2 to the assembler.
7713 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
7714 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
7715 * doc/invoke.texi: Add -m(no-)mips16e2 option..
7717 2023-07-02 Jakub Jelinek <jakub@redhat.com>
7719 PR tree-optimization/110508
7720 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
7721 REALPART_EXPR opf nlhs if re2 is non-NULL.
7723 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
7725 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
7727 * config/xtensa/xtensa.md (*xtensa_clamps):
7728 Add TARGET_MINMAX to the condition.
7730 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
7732 * config/xtensa/xtensa.md (*eqne_INT_MIN):
7733 Add missing ":SI" to the match_operator.
7735 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
7738 * config/darwin.opt: Add fconstant-cfstrings alias to
7739 mconstant-cfstrings.
7740 * doc/invoke.texi: Amend invocation descriptions to reflect
7741 that the fconstant-cfstrings is a target-option alias and to
7742 add the missing mconstant-cfstrings option description to the
7745 2023-07-01 Jan Hubicka <jh@suse.cz>
7747 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
7748 parmaeter; update profile.
7749 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
7750 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
7751 (static_loop_exit): ... this; return the edge to be elliminated.
7752 (ch_base::copy_headers): Handle profile updating for eliminated exits.
7754 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
7756 * config/i386/i386-features.cc (compute_convert_gain): Provide
7757 gains/costs for ROTATE and ROTATERT (by an integer constant).
7758 (general_scalar_chain::convert_rotate): New helper function to
7759 convert a DImode or SImode rotation by an integer constant into
7761 (general_scalar_chain::convert_insn): Call the new convert_rotate
7762 for ROTATE and ROTATERT.
7763 (general_scalar_to_vector_candidate_p): Consider ROTATE and
7764 ROTATERT to be candidates if the second operand is an integer
7765 constant, valid for a rotation (or shift) in the given mode.
7766 * config/i386/i386-features.h (general_scalar_chain): Add new
7767 helper method convert_rotate.
7769 2023-07-01 Jan Hubicka <jh@suse.cz>
7771 PR tree-optimization/103680
7772 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
7773 make message clearer.
7775 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
7777 PR tree-optimization/101832
7778 * tree-object-size.cc (addr_object_size): Handle structure/union type
7779 when it has flexible size.
7781 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
7783 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
7784 (fold_nonarray_ctor_reference): Likewise. Specifically deal
7785 with integral bit-fields.
7786 (fold_ctor_reference): Make sure that the constructor uses the
7787 native storage order.
7789 2023-06-30 Jan Hubicka <jh@suse.cz>
7791 PR middle-end/109849
7792 * predict.cc (estimate_bb_frequencies): Turn to static function.
7793 (expr_expected_value_1): Fix handling of binary expressions with
7795 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
7796 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
7798 * predict.h (estimate_bb_frequencies): No longer declare it.
7800 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
7802 * fold-const.h (multiple_of_p): Change return type from int to bool.
7803 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
7804 neg_conp_p and neg_var_p variables to bool.
7805 (const_binop): Change sat_p variable to bool.
7806 (merge_ranges): Change no_overlap variable to bool.
7807 (extract_muldiv_1): Change same_p variable to bool.
7808 (tree_swap_operands_p): Update function body for bool return type.
7809 (fold_truth_andor): Change commutative variable to bool.
7810 (multiple_of_p): Change return type
7811 from int to void and adjust function body accordingly.
7812 * optabs.h (expand_twoval_unop): Change return type from int to bool.
7813 (expand_twoval_binop): Ditto.
7814 (can_compare_p): Ditto.
7815 (have_add2_insn): Ditto.
7816 (have_addptr3_insn): Ditto.
7817 (have_sub2_insn): Ditto.
7818 (have_insn_for): Ditto.
7819 * optabs.cc (add_equal_note): Ditto.
7820 (widen_operand): Change no_extend argument from int to bool.
7821 (expand_binop): Ditto.
7822 (expand_twoval_unop): Change return type
7823 from int to void and adjust function body accordingly.
7824 (expand_twoval_binop): Ditto.
7825 (can_compare_p): Ditto.
7826 (have_add2_insn): Ditto.
7827 (have_addptr3_insn): Ditto.
7828 (have_sub2_insn): Ditto.
7829 (have_insn_for): Ditto.
7831 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
7833 * config/aarch64/aarch64-simd.md
7834 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
7835 Expansions for abd vec widen optabs.
7836 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
7837 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
7838 that give the appropriate extend RTL for the max RTL.
7840 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
7842 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
7843 * optabs.def (vec_widen_sabd_optab,
7844 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
7845 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
7846 vec_widen_uabd_optab,
7847 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
7848 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
7850 * doc/md.texi: Document them.
7851 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
7852 to build a VEC_WIDEN_ABD call if the input precision is smaller
7853 than the precision of the output.
7854 (vect_recog_widen_abd_pattern): Should an ABD expression be
7855 found preceeding an extension, replace the two with a
7858 2023-06-30 Pan Li <pan2.li@intel.com>
7860 * config/riscv/vector.md: Refactor the common condition.
7862 2023-06-30 Richard Biener <rguenther@suse.de>
7864 PR tree-optimization/110496
7865 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
7866 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
7868 2023-06-30 Richard Biener <rguenther@suse.de>
7870 PR middle-end/110489
7871 * statistics.cc (curr_statistics_hash): Add argument
7872 indicating whether we should allocate the hash.
7873 (statistics_fini_pass): If the hash isn't allocated
7874 only print the summary header.
7876 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
7877 Thomas Schwinge <thomas@codesourcery.com>
7879 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
7881 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
7884 * config/mips/mips.cc (mips_function_arg_alignment): Returns
7885 the alignment of function argument. In case of typedef type,
7886 it returns the aligment of the aliased type.
7887 (mips_function_arg_boundary): Relocated calculation of the
7888 aligment of function arguments.
7890 2023-06-29 Jan Hubicka <jh@suse.cz>
7892 PR tree-optimization/109849
7893 * ipa-fnsummary.cc (decompose_param_expr): Skip
7894 functions returning its parameter.
7895 (set_cond_stmt_execution_predicate): Return early
7896 if predicate was constructed.
7898 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
7901 * doc/extend.texi: Document GCC extension on a structure containing
7902 a flexible array member to be a member of another structure.
7904 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
7906 * print-tree.cc (print_node): Print new bit type_include_flexarray.
7907 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
7908 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
7909 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
7910 in bit no_named_args_stdarg_p properly for its corresponding type.
7911 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
7912 out bit no_named_args_stdarg_p properly for its corresponding type.
7913 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
7915 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
7917 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
7918 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
7919 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
7921 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
7923 * value-range.cc (frange::set): Do not call verify_range.
7924 (frange::normalize_kind): Verify range.
7925 (frange::union_nans): Do not call verify_range.
7926 (frange::union_): Same.
7927 (frange::intersect): Same.
7928 (irange::irange_single_pair_union): Call normalize_kind if
7930 (irange::union_): Same.
7931 (irange::intersect): Same.
7932 (irange::set_range_from_nonzero_bits): Verify range.
7933 (irange::set_nonzero_bits): Call normalize_kind if necessary.
7934 (irange::get_nonzero_bits): Tweak comment.
7935 (irange::intersect_nonzero_bits): Call normalize_kind if
7937 (irange::union_nonzero_bits): Same.
7938 * value-range.h (irange::normalize_kind): Verify range.
7940 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
7942 * cselib.h (rtx_equal_for_cselib_1):
7943 Change return type from int to bool.
7944 (references_value_p): Ditto.
7945 (rtx_equal_for_cselib_p): Ditto.
7946 * expr.h (can_store_by_pieces): Ditto.
7947 (try_casesi): Ditto.
7948 (try_tablejump): Ditto.
7949 (safe_from_p): Ditto.
7950 * sbitmap.h (bitmap_equal_p): Ditto.
7951 * cselib.cc (references_value_p): Change return type
7952 from int to void and adjust function body accordingly.
7953 (rtx_equal_for_cselib_1): Ditto.
7954 * expr.cc (is_aligning_offset): Ditto.
7955 (can_store_by_pieces): Ditto.
7956 (mostly_zeros_p): Ditto.
7957 (all_zeros_p): Ditto.
7958 (safe_from_p): Ditto.
7959 (is_aligning_offset): Ditto.
7960 (try_casesi): Ditto.
7961 (try_tablejump): Ditto.
7962 (store_constructor): Change "need_to_clear" and
7963 "const_bounds_p" variables to bool.
7964 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
7966 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
7968 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
7971 2023-06-29 Richard Biener <rguenther@suse.de>
7973 PR tree-optimization/110460
7974 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
7975 Only allow integral, pointer and scalar float type scalar_type.
7977 2023-06-29 Lili Cui <lili.cui@intel.com>
7979 PR tree-optimization/110148
7980 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
7981 ops in this function.
7983 2023-06-29 Richard Biener <rguenther@suse.de>
7985 PR middle-end/110452
7986 * expr.cc (store_constructor): Handle uniform boolean
7987 vectors with integer mode specially.
7989 2023-06-29 Richard Biener <rguenther@suse.de>
7991 PR middle-end/110461
7992 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
7995 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
7997 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
7998 (array_slice): Relax va_gc constructor to handle all vectors
7999 with a vl_embed layout.
8001 2023-06-29 Pan Li <pan2.li@intel.com>
8003 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
8004 (riscv_mode_needed): Likewise.
8005 (riscv_entity_mode_after): Likewise.
8006 (riscv_mode_after): Likewise.
8007 (riscv_mode_entry): Likewise.
8008 (riscv_mode_exit): Likewise.
8009 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
8011 * config/riscv/riscv.md: Add FRM register.
8012 * config/riscv/vector-iterators.md: Add FRM type.
8013 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
8014 (fsrm): Define new insn for fsrm instruction.
8016 2023-06-29 Pan Li <pan2.li@intel.com>
8018 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
8019 Add macro for static frm min and max.
8020 * config/riscv/riscv-vector-builtins-bases.cc
8021 (class binop_frm): New class for floating-point with frm.
8022 (BASE): Add vfadd for frm.
8023 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
8024 * config/riscv/riscv-vector-builtins-functions.def
8025 (vfadd_frm): Likewise.
8026 * config/riscv/riscv-vector-builtins-shapes.cc
8027 (struct alu_frm_def): New struct for alu with frm.
8028 (SHAPE): Add alu with frm.
8029 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
8030 * config/riscv/riscv-vector-builtins.cc
8031 (function_checker::report_out_of_range_and_not): New function
8032 for report out of range and not val.
8033 (function_checker::require_immediate_range_or): New function
8034 for checking in range or one val.
8035 * config/riscv/riscv-vector-builtins.h: Add function decl.
8037 2023-06-29 Cui, Lili <lili.cui@intel.com>
8039 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
8040 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
8042 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
8045 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
8046 to insn before validating it.
8048 2023-06-28 Jan Hubicka <jh@suse.cz>
8050 PR middle-end/110334
8051 * ipa-fnsummary.h (ipa_fn_summary): Add
8052 safe_to_inline_to_always_inline.
8053 * ipa-inline.cc (can_early_inline_edge_p): ICE
8054 if SSA is not built; do cycle checking for
8055 always_inline functions.
8056 (inline_always_inline_functions): Be recrusive;
8057 watch for cycles; do not updat overall summary.
8058 (early_inliner): Do not give up on always_inlines.
8059 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
8062 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
8064 * output.h (leaf_function_p): Change return type from int to bool.
8065 (final_forward_branch_p): Ditto.
8066 (only_leaf_regs_used): Ditto.
8067 (maybe_assemble_visibility): Ditto.
8068 * varasm.h (supports_one_only): Ditto.
8069 * rtl.h (compute_alignments): Change return type from int to void.
8070 * final.cc (app_on): Change return type from int to bool.
8071 (compute_alignments): Change return type from int to void
8072 and adjust function body accordingly.
8073 (shorten_branches): Change "something_changed" variable
8074 type from int to bool.
8075 (leaf_function_p): Change return type from int to bool
8076 and adjust function body accordingly.
8077 (final_forward_branch_p): Ditto.
8078 (only_leaf_regs_used): Ditto.
8079 * varasm.cc (contains_pointers_p): Change return type from
8080 int to bool and adjust function body accordingly.
8081 (compare_constant): Ditto.
8082 (maybe_assemble_visibility): Ditto.
8083 (supports_one_only): Ditto.
8085 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
8088 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
8089 (maybe_copy_reg_attrs): New function.
8090 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
8091 (copyprop_hardreg_forward_1): Ditto.
8093 2023-06-28 Richard Biener <rguenther@suse.de>
8095 PR tree-optimization/110434
8096 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
8097 VAR we replace with <retval>.
8099 2023-06-28 Richard Biener <rguenther@suse.de>
8101 PR tree-optimization/110451
8102 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
8103 tcc_comparison are expensive.
8105 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
8107 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
8108 for TImode comparisons on 32-bit architectures.
8109 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
8110 SWIM1248x to exclude/avoid TImode being conditional on -m64.
8111 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
8112 and/or with TARGET_SSE4_1.
8113 * config/i386/predicates.md (ix86_timode_comparison_operator):
8114 New predicate that depends upon TARGET_64BIT.
8115 (ix86_timode_comparison_operand): Likewise.
8117 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
8120 * config/i386/i386-features.cc (compute_convert_gain): Provide
8121 more accurate gains for conversion of scalar comparisons to
8124 2023-06-28 Richard Biener <rguenther@suse.de>
8126 PR tree-optimization/110443
8127 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
8130 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
8132 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
8133 (peephole2 for move_and_compare): New.
8134 (mode_iterator WORD): New. Set the mode to SI/DImode by
8136 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
8137 (split pattern for compare_and_move): Likewise.
8139 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8141 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
8142 (*single_widen_fma<mode>): Ditto.
8144 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
8147 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
8149 (altivec_vupkhs<VU_char>_direct): ...this.
8150 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
8151 predicate to test if a constant can be loaded with vspltisw and
8153 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
8154 a vector constant can be synthesized with a vspltisw and a vupkhsw.
8155 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
8157 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
8158 function to return true if OP mode is V2DI and can be synthesized
8159 with vupkhsw and vspltisw.
8160 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
8161 constants with vspltisw and vupkhsw.
8163 2023-06-28 Jan Hubicka <jh@suse.cz>
8165 PR tree-optimization/110377
8166 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
8168 (ipa_analyze_node): Enable ranger.
8170 2023-06-28 Richard Biener <rguenther@suse.de>
8172 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
8173 (TYPE_PRECISION_RAW): Provide raw access to the precision
8175 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
8176 (gimple_canonical_types_compatible_p): Likewise.
8177 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
8178 Stream TYPE_PRECISION_RAW.
8179 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
8181 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
8183 2023-06-28 Alexandre Oliva <oliva@adacore.com>
8185 * doc/extend.texi (zero-call-used-regs): Document leafy and
8187 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
8189 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
8190 functions in leafy mode.
8191 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
8193 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8195 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
8196 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
8198 (@pred_single_widen_add<mode>): New pattern.
8199 (@pred_single_widen_sub<mode>): New pattern.
8201 2023-06-28 liuhongt <hongtao.liu@intel.com>
8203 * config/i386/i386.cc (ix86_invalid_conversion): New function.
8204 (TARGET_INVALID_CONVERSION): Define as
8205 ix86_invalid_conversion.
8207 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
8209 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
8211 (<float_cvt><vnconvert><mode>2): Ditto.
8212 (<optab><mode><vnconvert>2): Ditto.
8213 (<float_cvt><mode><vnconvert>2): Ditto.
8214 * config/riscv/vector-iterators.md: Add vnconvert.
8216 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
8218 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
8220 (extend<v_quad_trunc><mode>2): Ditto.
8221 (trunc<mode><v_double_trunc>2): Ditto.
8222 (trunc<mode><v_quad_trunc>2): Ditto.
8223 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
8224 V_QUAD_TRUNC and v_quad_trunc.
8226 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
8228 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
8231 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
8233 * config/riscv/autovec.md (copysign<mode>3): Add expander.
8234 (xorsign<mode>3): Ditto.
8235 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
8237 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
8241 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
8242 (@pred_ncopysign<mode>_scalar): Ditto.
8244 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
8246 * config/riscv/autovec.md: VF_AUTO -> VF.
8247 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
8248 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
8250 * config/riscv/vector.md: Use new iterators.
8252 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
8254 * match.pd: Use element_mode and check if target supports
8255 operation with new type.
8257 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
8259 * config/aarch64/aarch64-sve-builtins-base.cc
8260 (svdupq_impl::fold_nonconst_dupq): New method.
8261 (svdupq_impl::fold): Call fold_nonconst_dupq.
8263 2023-06-27 Andrew Pinski <apinski@marvell.com>
8265 PR middle-end/110420
8266 PR middle-end/103979
8268 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
8270 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
8272 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
8273 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
8275 (set_switch_stmt_execution_predicate): Same.
8276 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
8278 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
8280 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
8281 ipa_vr instead of value_range.
8284 (ipa_get_value_range): Same.
8285 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
8289 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
8291 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
8292 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
8293 (ipa_set_jfunc_vr): Take a range.
8294 (ipa_compute_jump_functions_for_edge): Pass range to
8296 (ipa_write_jump_function): Call streamer write helper.
8297 (ipa_read_jump_function): Call streamer read helper.
8298 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
8300 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
8302 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
8303 as a probable initializer rather than a probable complete statement.
8305 2023-06-27 Richard Biener <rguenther@suse.de>
8307 PR tree-optimization/96208
8308 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
8309 a non-grouped load if it is the same for all lanes.
8310 (vect_build_slp_tree_2): Handle not grouped loads.
8311 (vect_optimize_slp_pass::remove_redundant_permutations):
8313 (vect_transform_slp_perm_load_1): Likewise.
8314 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
8315 (get_group_load_store_type): Likewise. Handle
8317 (vectorizable_load): Likewise.
8319 2023-06-27 liuhongt <hongtao.liu@intel.com>
8321 PR rtl-optimization/110237
8322 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
8324 (maskstore<mode><avx512fmaskmodelower): Ditto.
8325 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
8326 from original <avx512>_store<mode>_mask.
8328 2023-06-27 liuhongt <hongtao.liu@intel.com>
8330 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
8331 Move flag_expensive_optimizations && !optimize_size to ..
8332 * config/i386/i386-options.cc (ix86_option_override_internal):
8333 .. this, it makes -mvzeroupper independent of optimization
8334 level, but still keeps the behavior of architecture
8335 tuning(emit_vzeroupper) unchanged.
8337 2023-06-27 liuhongt <hongtao.liu@intel.com>
8340 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
8341 vzeroupper for vzeroupper call_insn.
8343 2023-06-27 Andrew Pinski <apinski@marvell.com>
8345 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
8348 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8350 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
8353 2023-06-26 Andrew Pinski <apinski@marvell.com>
8355 * doc/extend.texi (access attribute): Add
8357 (interrupt/interrupt_handler attribute):
8360 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
8362 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
8363 Use <DWI> instead of <V2XWIDE>.
8364 (aarch64_sqrshrun_n<mode>): Likewise.
8366 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
8368 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
8370 (aarch64_rnd_imm_p): ... This.
8371 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
8373 (aarch64_int_rnd_operand): ... This.
8374 (aarch64_simd_rshrn_imm_vec): Delete.
8375 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
8376 Adjust for the above.
8377 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
8378 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
8379 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
8380 (aarch64_sqrshrun_n<mode>_insn): Likewise.
8381 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
8382 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
8383 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
8384 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
8385 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
8387 (aarch64_rnd_imm_p): ... This.
8389 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
8391 * config/s390/s390.cc (s390_encode_section_info): Set
8392 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
8395 2023-06-26 Jan Hubicka <jh@suse.cz>
8397 PR tree-optimization/109849
8398 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
8399 count of newly constructed forwarder block.
8401 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
8403 * doc/optinfo.texi: Fix "steam" -> "stream".
8405 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8407 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
8409 (dse_optimize_stmt): Add LEN_MASK_STORE.
8411 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8413 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
8414 fold of LOAD/STORE with length.
8416 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
8418 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
8419 Check for interdependence between operands 1 and 2.
8421 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
8423 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
8424 into account when costing non-widening/truncating conversions.
8426 2023-06-26 Richard Biener <rguenther@suse.de>
8428 PR tree-optimization/110381
8429 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
8430 Materialize permutes before fold-left reductions.
8432 2023-06-26 Pan Li <pan2.li@intel.com>
8434 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
8436 2023-06-26 Richard Biener <rguenther@suse.de>
8438 * varasm.cc (initializer_constant_valid_p_1): Also
8439 constrain the type of value to be scalar integral
8440 before dispatching to narrowing_initializer_constant_valid_p.
8442 2023-06-26 Richard Biener <rguenther@suse.de>
8444 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
8445 Use element_precision.
8447 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8449 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
8451 (vcondu<V:mode><VI:mode>): Ditto.
8452 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
8453 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
8455 2023-06-26 Richard Biener <rguenther@suse.de>
8457 PR tree-optimization/110392
8458 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
8459 Do early exits on true/false predicate only after normalization.
8461 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8463 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
8466 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
8468 * config/i386/i386.md (peephole2): Simplify zeroing a register
8469 followed by an IOR, XOR or PLUS operation on it, into a move.
8470 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
8471 eliminate (and hide from reload) unnecessary word to doubleword
8472 extensions that are followed by left shifts by sufficiently large,
8473 but valid, bit counts.
8475 2023-06-26 liuhongt <hongtao.liu@intel.com>
8477 PR tree-optimization/110371
8478 PR tree-optimization/110018
8479 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
8480 save intermediate type operand instead of "subtle" vec_dest
8483 2023-06-26 liuhongt <hongtao.liu@intel.com>
8485 PR tree-optimization/110371
8486 PR tree-optimization/110018
8487 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
8488 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
8490 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
8492 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
8493 Override tune_string with arch_string if tune_string is not
8494 explicitly specified.
8496 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8498 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
8500 * config/riscv/riscv-vsetvl.h: New function.
8502 2023-06-25 Li Xu <xuli1@eswincomputing.com>
8504 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
8507 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8509 * config/riscv/autovec.md (len_load_<mode>): Remove.
8510 (len_maskload<mode><vm>): Remove.
8511 (len_store_<mode>): New pattern.
8512 (len_maskstore<mode><vm>): New pattern.
8513 * config/riscv/predicates.md (autovec_length_operand): New predicate.
8514 * config/riscv/riscv-protos.h (enum insn_type): New enum.
8515 (expand_load_store): New function.
8516 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
8517 (emit_nonvlmax_masked_insn): Ditto.
8518 (expand_load_store): Ditto.
8519 * config/riscv/riscv-vector-builtins.cc
8520 (function_expander::use_contiguous_store_insn): Add avl_type operand
8522 * config/riscv/vector.md: Ditto.
8524 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8526 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
8529 2023-06-25 Pan Li <pan2.li@intel.com>
8531 * config/riscv/vector.md: Revert.
8533 2023-06-25 Pan Li <pan2.li@intel.com>
8535 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
8536 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
8537 (ADJUST_ALIGNMENT): Ditto.
8538 (RVV_TUPLE_PARTIAL_MODES): Ditto.
8539 (ADJUST_NUNITS): Ditto.
8540 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
8541 (vfloat16mf4x3_t): Ditto.
8542 (vfloat16mf4x4_t): Ditto.
8543 (vfloat16mf4x5_t): Ditto.
8544 (vfloat16mf4x6_t): Ditto.
8545 (vfloat16mf4x7_t): Ditto.
8546 (vfloat16mf4x8_t): Ditto.
8547 (vfloat16mf2x2_t): Ditto.
8548 (vfloat16mf2x3_t): Ditto.
8549 (vfloat16mf2x4_t): Ditto.
8550 (vfloat16mf2x5_t): Ditto.
8551 (vfloat16mf2x6_t): Ditto.
8552 (vfloat16mf2x7_t): Ditto.
8553 (vfloat16mf2x8_t): Ditto.
8554 (vfloat16m1x2_t): Ditto.
8555 (vfloat16m1x3_t): Ditto.
8556 (vfloat16m1x4_t): Ditto.
8557 (vfloat16m1x5_t): Ditto.
8558 (vfloat16m1x6_t): Ditto.
8559 (vfloat16m1x7_t): Ditto.
8560 (vfloat16m1x8_t): Ditto.
8561 (vfloat16m2x2_t): Ditto.
8562 (vfloat16m2x3_t): Diito.
8563 (vfloat16m2x4_t): Diito.
8564 (vfloat16m4x2_t): Diito.
8565 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
8566 (vfloat16mf4x3_t): Ditto.
8567 (vfloat16mf4x4_t): Ditto.
8568 (vfloat16mf4x5_t): Ditto.
8569 (vfloat16mf4x6_t): Ditto.
8570 (vfloat16mf4x7_t): Ditto.
8571 (vfloat16mf4x8_t): Ditto.
8572 (vfloat16mf2x2_t): Ditto.
8573 (vfloat16mf2x3_t): Ditto.
8574 (vfloat16mf2x4_t): Ditto.
8575 (vfloat16mf2x5_t): Ditto.
8576 (vfloat16mf2x6_t): Ditto.
8577 (vfloat16mf2x7_t): Ditto.
8578 (vfloat16mf2x8_t): Ditto.
8579 (vfloat16m1x2_t): Ditto.
8580 (vfloat16m1x3_t): Ditto.
8581 (vfloat16m1x4_t): Ditto.
8582 (vfloat16m1x5_t): Ditto.
8583 (vfloat16m1x6_t): Ditto.
8584 (vfloat16m1x7_t): Ditto.
8585 (vfloat16m1x8_t): Ditto.
8586 (vfloat16m2x2_t): Ditto.
8587 (vfloat16m2x3_t): Ditto.
8588 (vfloat16m2x4_t): Ditto.
8589 (vfloat16m4x2_t): Ditto.
8590 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
8591 * config/riscv/riscv.md: Ditto.
8592 * config/riscv/vector-iterators.md: Ditto.
8594 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8596 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
8597 (gimple_fold_partial_load_store_mem_ref): Ditto.
8598 (gimple_fold_partial_store): Ditto.
8599 (gimple_fold_call): Ditto.
8601 2023-06-25 liuhongt <hongtao.liu@intel.com>
8604 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
8605 Refine pattern with UNSPEC_MASKLOAD.
8606 (maskload<mode><avx512fmaskmodelower>): Ditto.
8607 (*<avx512>_load<mode>_mask): Extend mode iterator to
8609 (*<avx512>_load<mode>): Ditto.
8611 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8613 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
8615 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8617 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
8618 LEN_MASK_{LOAD,STORE}
8620 2023-06-25 yulong <shiyulong@iscas.ac.cn>
8622 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
8624 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
8626 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
8628 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8630 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
8631 (*fma<VI:mode><P:mode>): Ditto.
8632 (*fnma<mode>): Ditto.
8633 (*fnma<VI:mode><P:mode>): Ditto.
8635 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8637 * config/riscv/autovec.md (fma<mode>4): New pattern.
8638 (*fma<mode>): Ditto.
8639 (fnma<mode>4): Ditto.
8640 (*fnma<mode>): Ditto.
8641 (fms<mode>4): Ditto.
8642 (*fms<mode>): Ditto.
8643 (fnms<mode>4): Ditto.
8644 (*fnms<mode>): Ditto.
8645 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
8647 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
8648 * config/riscv/vector.md: Fix attribute bug.
8650 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8652 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
8653 Apply LEN_MASK_{LOAD,STORE}.
8655 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8657 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
8658 Add LEN_MASK_{LOAD,STORE}.
8660 2023-06-24 David Malcolm <dmalcolm@redhat.com>
8662 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
8663 * diagnostic.cc: Likewise.
8664 * text-art/box-drawing.cc: Likewise.
8665 * text-art/canvas.cc: Likewise.
8666 * text-art/ruler.cc: Likewise.
8667 * text-art/selftests.cc: Likewise.
8668 * text-art/selftests.h (text_art::canvas): New forward decl.
8669 * text-art/style.cc: Add #define INCLUDE_VECTOR.
8670 * text-art/styled-string.cc: Likewise.
8671 * text-art/table.cc: Likewise.
8672 * text-art/table.h: Remove #include <vector>.
8673 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
8674 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
8675 Remove #include of <vector> and <string>.
8676 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
8677 * text-art/widget.h: Remove #include <vector>.
8679 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8681 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
8682 (internal_load_fn_p): Add LEN_MASK_LOAD.
8683 (internal_store_fn_p): Add LEN_MASK_STORE.
8684 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
8685 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
8686 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
8687 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
8688 (get_len_load_store_mode): Ditto.
8689 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
8690 (get_len_load_store_mode): Ditto.
8691 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
8692 (get_all_ones_mask): New function.
8693 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
8694 (vectorizable_load): Ditto.
8696 2023-06-23 Marek Polacek <polacek@redhat.com>
8698 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
8699 -std=gnu++26. Document that for C++23, its value is 202302L.
8700 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
8701 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
8702 (gen_compile_unit_die): Likewise.
8704 2023-06-23 Jan Hubicka <jh@suse.cz>
8706 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
8708 (pass_phiprop::execute): Do not compute it here; return
8709 update_ssa_only_virtuals if something changed.
8710 (pass_data_phiprop): Remove TODO_update_ssa from todos.
8712 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
8713 Aaron Sawdey <acsawdey@linux.ibm.com>
8716 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
8717 allowed prefixed lwa to be generated.
8718 * config/rs6000/fusion.md: Regenerate.
8719 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
8720 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
8721 plus compare immediate fused insns.
8722 (maybe_prefixed): Likewise.
8724 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
8726 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
8727 of ASHIFT to const0_rtx with sufficiently large shift count.
8728 Optimize highpart SUBREGs of ASHIFT as the shift operand when
8729 the shift count is the correct offset. Optimize SUBREGs of
8730 multi-word logic operations if the SUBREGs of both operands
8733 2023-06-23 Richard Biener <rguenther@suse.de>
8735 * varasm.cc (initializer_constant_valid_p_1): Only
8736 allow conversions between scalar floating point types.
8738 2023-06-23 Richard Biener <rguenther@suse.de>
8740 * tree-vect-stmts.cc (vectorizable_assignment):
8741 Properly handle non-integral operands when analyzing
8744 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
8746 PR tree-optimization/110280
8747 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
8748 using build_vector_from_val with the element of input operand, and
8749 mask's type if operand and mask's types don't match.
8751 2023-06-23 Richard Biener <rguenther@suse.de>
8753 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
8754 the truth_value_p case with !VECTOR_TYPE_P.
8756 2023-06-23 Richard Biener <rguenther@suse.de>
8758 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
8759 Exit early when the type isn't scalar integral.
8761 2023-06-23 Richard Biener <rguenther@suse.de>
8763 * match.pd ((outertype)((innertype0)a+(innertype1)b)
8764 -> ((newtype)a+(newtype)b)): Use element_precision
8767 2023-06-23 Richard Biener <rguenther@suse.de>
8769 * fold-const.cc (fold_binary_loc): Use element_precision
8770 when trying (double)float1 CMP (double)float2 to
8771 float1 CMP float2 simplification.
8772 * match.pd: Likewise.
8774 2023-06-23 Richard Biener <rguenther@suse.de>
8776 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
8777 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
8779 2023-06-23 Richard Biener <rguenther@suse.de>
8781 * tree-vect-stmts.cc (vector_vector_composition_type):
8782 Handle composition of a vector from a number of elements that
8783 happens to match its number of lanes.
8785 2023-06-22 Marek Polacek <polacek@redhat.com>
8787 * configure.ac (--enable-host-bind-now): New check. Add
8788 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
8789 * configure: Regenerate.
8790 * doc/install.texi: Document --enable-host-bind-now.
8792 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
8794 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
8796 2023-06-22 Richard Biener <rguenther@suse.de>
8798 PR tree-optimization/110332
8799 * tree-ssa-phiprop.cc (propagate_with_phi): Always
8800 check aliasing with edge inserted loads.
8802 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
8803 Uros Bizjak <ubizjak@gmail.com>
8805 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
8806 expansion of ptestc with equal operands as producing const1_rtx.
8807 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
8808 estimates of UNSPEC_PTEST, where the ptest performs the PAND
8809 or PAND of its operands.
8810 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
8811 of reg_equal_p operands into an x86_stc instruction.
8812 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
8813 (define_split): Similar to above for strict_low_part destinations.
8814 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
8816 2023-06-22 David Malcolm <dmalcolm@redhat.com>
8819 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
8820 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
8822 (fanalyzer-debug-text-art): New.
8824 2023-06-22 David Malcolm <dmalcolm@redhat.com>
8826 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
8827 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
8828 text-art/style.o, text-art/styled-string.o, text-art/table.o,
8829 text-art/theme.o, and text-art/widget.o.
8830 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
8831 (COLOR_FG_BRIGHT_RED): New.
8832 (COLOR_FG_BRIGHT_GREEN): New.
8833 (COLOR_FG_BRIGHT_YELLOW): New.
8834 (COLOR_FG_BRIGHT_BLUE): New.
8835 (COLOR_FG_BRIGHT_MAGENTA): New.
8836 (COLOR_FG_BRIGHT_CYAN): New.
8837 (COLOR_FG_BRIGHT_WHITE): New.
8838 (COLOR_BG_BRIGHT_BLACK): New.
8839 (COLOR_BG_BRIGHT_RED): New.
8840 (COLOR_BG_BRIGHT_GREEN): New.
8841 (COLOR_BG_BRIGHT_YELLOW): New.
8842 (COLOR_BG_BRIGHT_BLUE): New.
8843 (COLOR_BG_BRIGHT_MAGENTA): New.
8844 (COLOR_BG_BRIGHT_CYAN): New.
8845 (COLOR_BG_BRIGHT_WHITE): New.
8846 * common.opt (fdiagnostics-text-art-charset=): New option.
8847 (diagnostic-text-art.h): New SourceInclude.
8848 (diagnostic_text_art_charset) New Enum and EnumValues.
8849 * configure: Regenerate.
8850 * configure.ac (gccdepdir): Add text-art to loop.
8851 * diagnostic-diagram.h: New file.
8852 * diagnostic-format-json.cc (json_emit_diagram): New.
8853 (diagnostic_output_format_init_json): Wire it up to
8854 context->m_diagrams.m_emission_cb.
8855 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
8856 "text-art/canvas.h".
8857 (sarif_result::on_nested_diagnostic): Move code to...
8858 (sarif_result::add_related_location): ...this new function.
8859 (sarif_result::on_diagram): New.
8860 (sarif_builder::emit_diagram): New.
8861 (sarif_builder::make_message_object_for_diagram): New.
8862 (sarif_emit_diagram): New.
8863 (diagnostic_output_format_init_sarif): Set
8864 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
8865 * diagnostic-text-art.h: New file.
8866 * diagnostic.cc: Include "diagnostic-text-art.h",
8867 "diagnostic-diagram.h", and "text-art/theme.h".
8868 (diagnostic_initialize): Initialize context->m_diagrams and
8869 call diagnostics_text_art_charset_init.
8870 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
8871 (diagnostic_emit_diagram): New.
8872 (diagnostics_text_art_charset_init): New.
8873 * diagnostic.h (text_art::theme): New forward decl.
8874 (class diagnostic_diagram): Likewise.
8875 (diagnostic_context::m_diagrams): New field.
8876 (diagnostic_emit_diagram): New decl.
8877 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
8878 -fdiagnostics-text-art-charset=.
8879 (-fdiagnostics-plain-output): Add
8880 -fdiagnostics-text-art-charset=none.
8881 * gcc.cc: Include "diagnostic-text-art.h".
8882 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
8883 * opts-common.cc (decode_cmdline_options_to_array): Add
8884 "-fdiagnostics-text-art-charset=none" to expanded_args for
8885 -fdiagnostics-plain-output.
8886 * opts.cc: Include "diagnostic-text-art.h".
8887 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
8888 * pretty-print.cc (pp_unicode_character): New.
8889 * pretty-print.h (pp_unicode_character): New decl.
8890 * selftest-run-tests.cc: Include "text-art/selftests.h".
8891 (selftest::run_tests): Call text_art_tests.
8892 * text-art/box-drawing-chars.inc: New file, generated by
8893 contrib/unicode/gen-box-drawing-chars.py.
8894 * text-art/box-drawing.cc: New file.
8895 * text-art/box-drawing.h: New file.
8896 * text-art/canvas.cc: New file.
8897 * text-art/canvas.h: New file.
8898 * text-art/ruler.cc: New file.
8899 * text-art/ruler.h: New file.
8900 * text-art/selftests.cc: New file.
8901 * text-art/selftests.h: New file.
8902 * text-art/style.cc: New file.
8903 * text-art/styled-string.cc: New file.
8904 * text-art/table.cc: New file.
8905 * text-art/table.h: New file.
8906 * text-art/theme.cc: New file.
8907 * text-art/theme.h: New file.
8908 * text-art/types.h: New file.
8909 * text-art/widget.cc: New file.
8910 * text-art/widget.h: New file.
8912 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
8914 * function.h (emit_initial_value_sets):
8915 Change return type from int to void.
8916 (aggregate_value_p): Change return type from int to bool.
8917 (prologue_contains): Ditto.
8918 (epilogue_contains): Ditto.
8919 (prologue_epilogue_contains): Ditto.
8920 * function.cc (temp_slot): Make "in_use" variable bool.
8921 (make_slot_available): Update for changed "in_use" variable.
8922 (assign_stack_temp_for_type): Ditto.
8923 (emit_initial_value_sets): Change return type from int to void
8924 and update function body accordingly.
8925 (instantiate_virtual_regs): Ditto.
8926 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
8927 (safe_insn_predicate): Change return type from int to bool.
8928 (aggregate_value_p): Change return type from int to bool
8929 and update function body accordingly.
8930 (prologue_contains): Change return type from int to bool.
8931 (prologue_epilogue_contains): Ditto.
8933 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
8935 * common.opt (fp_contract_mode) [on]: Remove fallback.
8936 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
8937 * doc/invoke.texi (-ffp-contract): Update.
8938 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
8940 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
8942 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
8943 Add alternatives to prefer to avoid same input and output Z register.
8944 (mask_gather_load<mode><v_int_container>): Likewise.
8945 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
8946 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
8947 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
8948 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
8950 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
8952 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
8953 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
8954 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
8955 <SVE_2BHSI:mode>_sxtw): Likewise.
8956 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
8957 <SVE_2BHSI:mode>_uxtw): Likewise.
8958 (@aarch64_ldff1_gather<mode>): Likewise.
8959 (@aarch64_ldff1_gather<mode>): Likewise.
8960 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
8961 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
8962 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
8963 <VNx4_NARROW:mode>): Likewise.
8964 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
8965 <VNx2_NARROW:mode>): Likewise.
8966 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
8967 <VNx2_NARROW:mode>_sxtw): Likewise.
8968 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
8969 <VNx2_NARROW:mode>_uxtw): Likewise.
8970 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
8971 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
8972 <SVE_PARTIAL_I:mode>): Likewise.
8974 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
8976 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
8977 Convert to compact alternatives syntax.
8978 (mask_gather_load<mode><v_int_container>): Likewise.
8979 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
8980 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
8981 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
8982 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
8984 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
8986 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
8987 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
8988 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
8989 <SVE_2BHSI:mode>_sxtw): Likewise.
8990 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
8991 <SVE_2BHSI:mode>_uxtw): Likewise.
8992 (@aarch64_ldff1_gather<mode>): Likewise.
8993 (@aarch64_ldff1_gather<mode>): Likewise.
8994 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
8995 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
8996 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
8997 <VNx4_NARROW:mode>): Likewise.
8998 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
8999 <VNx2_NARROW:mode>): Likewise.
9000 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
9001 <VNx2_NARROW:mode>_sxtw): Likewise.
9002 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
9003 <VNx2_NARROW:mode>_uxtw): Likewise.
9004 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
9005 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
9006 <SVE_PARTIAL_I:mode>): Likewise.
9008 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9011 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9013 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
9014 Convert to compact alternatives syntax.
9015 (mask_gather_load<mode><v_int_container>): Likewise.
9016 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
9017 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
9018 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
9019 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
9021 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
9023 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
9024 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
9025 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
9026 <SVE_2BHSI:mode>_sxtw): Likewise.
9027 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
9028 <SVE_2BHSI:mode>_uxtw): Likewise.
9029 (@aarch64_ldff1_gather<mode>): Likewise.
9030 (@aarch64_ldff1_gather<mode>): Likewise.
9031 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
9032 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
9033 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
9034 <VNx4_NARROW:mode>): Likewise.
9035 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
9036 <VNx2_NARROW:mode>): Likewise.
9037 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
9038 <VNx2_NARROW:mode>_sxtw): Likewise.
9039 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
9040 <VNx2_NARROW:mode>_uxtw): Likewise.
9041 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
9042 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
9043 <SVE_PARTIAL_I:mode>): Likewise.
9045 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9047 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
9048 (get_len_load_store_mode): Ditto.
9049 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
9050 (get_len_load_store_mode): Ditto.
9051 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
9052 (get_len_load_store_mode): Ditto.
9053 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
9054 (get_len_load_store_mode): Ditto.
9055 * tree-if-conv.cc: include optabs-tree instead of optabs-query
9057 2023-06-21 Richard Biener <rguenther@suse.de>
9059 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
9060 split_constant_offset for the POINTER_PLUS_EXPR case.
9062 2023-06-21 Richard Biener <rguenther@suse.de>
9064 * tree-ssa-loop-ivopts.cc (record_group_use): Use
9065 split_constant_offset.
9067 2023-06-21 Richard Biener <rguenther@suse.de>
9069 * tree-loop-distribution.cc (classify_builtin_st): Use
9070 split_constant_offset.
9071 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
9072 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
9074 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9076 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
9077 Convert to compact alternatives syntax.
9078 (mask_gather_load<mode><v_int_container>): Likewise.
9079 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
9080 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
9081 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
9082 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
9084 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
9086 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
9087 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
9088 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
9089 <SVE_2BHSI:mode>_sxtw): Likewise.
9090 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
9091 <SVE_2BHSI:mode>_uxtw): Likewise.
9092 (@aarch64_ldff1_gather<mode>): Likewise.
9093 (@aarch64_ldff1_gather<mode>): Likewise.
9094 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
9095 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
9096 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
9097 <VNx4_NARROW:mode>): Likewise.
9098 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
9099 <VNx2_NARROW:mode>): Likewise.
9100 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
9101 <VNx2_NARROW:mode>_sxtw): Likewise.
9102 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
9103 <VNx2_NARROW:mode>_uxtw): Likewise.
9104 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
9105 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
9106 <SVE_PARTIAL_I:mode>): Likewise.
9108 2023-06-21 Tamar Christina <tamar.christina@arm.com>
9111 * doc/md.texi: Replace backslashchar.
9113 2023-06-21 Richard Biener <rguenther@suse.de>
9115 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
9116 Overload. For masked main loops make sure the vectorization
9117 factor isn't more than double the number of iterations.
9119 2023-06-21 Jan Beulich <jbeulich@suse.com>
9121 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
9122 value duplication by ix86_build_signbit_mask() when AVX512F and
9124 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
9125 2-alternative form. Adjust "mode" attribute. Add "enabled"
9127 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
9128 && !TARGET_PREFER_AVX256.
9129 (*<avx512>_vpternlog<mode>_2): Likewise.
9130 (*<avx512>_vpternlog<mode>_3): Likewise.
9132 2023-06-21 liuhongt <hongtao.liu@intel.com>
9135 * tree-vect-stmts.cc (vectorizable_conversion): Use
9136 intermiediate integer type for float_expr/fix_trunc_expr when
9137 direct optab is not existed.
9139 2023-06-20 Tamar Christina <tamar.christina@arm.com>
9142 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
9144 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
9146 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
9147 register operand to the stack pointer. Require the second register
9148 operand to have the number specified in a separate const_int operand.
9149 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
9150 (aarch64_allocate_and_probe_stack_space): Use it.
9151 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
9152 (aarch64_expand_epilogue): Likewise.
9154 2023-06-20 Jakub Jelinek <jakub@redhat.com>
9157 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
9158 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
9161 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
9163 * calls.h (setjmp_call_p): Change return type from int to bool.
9164 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
9165 (store_one_arg): Change return type from int to bool
9166 and adjust function body accordingly. Change "sibcall_failure"
9168 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
9169 argument to bool. Change "partial_seen" variable to bool.
9170 (load_register_parameters): Change *sibcall_failure
9171 pointer argument to bool.
9172 (check_sibcall_argument_overlap_1): Change return type from int to bool
9173 and adjust function body accordingly.
9174 (check_sibcall_argument_overlap): Ditto. Change
9175 "mark_stored_args_map" argument to bool.
9176 (emit_call_1): Change "already_popped" variable to bool.
9177 (setjmp_call_p): Change return type from int to bool
9178 and adjust function body accordingly.
9179 (initialize_argument_information): Change *must_preallocate
9180 pointer argument to bool.
9181 (expand_call): Change "pcc_struct_value", "must_preallocate"
9182 and "sibcall_failure" variables to bool.
9183 (emit_library_call_value_1): Change "pcc_struct_value"
9186 2023-06-20 Martin Jambor <mjambor@suse.cz>
9189 * ipa-sra.cc (struct caller_issues): New field there_is_one.
9190 (check_for_caller_issues): Set it.
9191 (check_all_callers_for_issues): Check it.
9193 2023-06-20 Martin Jambor <mjambor@suse.cz>
9195 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
9196 (struct ipcp_transformation): Rearrange members according to
9197 C++ class coding convention, add m_uid_to_idx,
9198 get_param_index and maybe_create_parm_idx_map.
9199 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
9200 (compare_uids): Likewise.
9201 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
9202 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
9203 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
9204 (ipcp_update_vr): Likewise.
9205 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
9206 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
9208 2023-06-20 Carl Love <cel@us.ibm.com>
9210 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
9211 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
9212 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
9213 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
9214 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
9215 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
9216 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
9217 * config/rs6000/rs6000-builtins.def
9218 (__builtin_vsx_scalar_extract_exp_to_vec,
9219 __builtin_vsx_scalar_extract_sig_to_vec,
9220 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
9221 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
9222 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
9223 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
9224 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
9225 overloaded instance. Update comments.
9226 * config/rs6000/rs6000-overload.def
9227 (__builtin_vec_scalar_insert_exp): Add new overload definition with
9229 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
9230 overloaded definitions.
9231 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
9232 (DI_to_TI): New mode attribute.
9233 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
9234 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
9235 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
9236 * doc/extend.texi (scalar_extract_exp_to_vec,
9237 scalar_extract_sig_to_vec): Add documentation for new builtins.
9238 (scalar_insert_exp): Add new overloaded builtin definition.
9240 2023-06-20 Li Xu <xuli1@eswincomputing.com>
9242 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
9243 size of vector mask mode to one rvv register.
9245 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9247 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
9249 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
9251 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
9254 2023-06-20 Richard Biener <rguenther@suse.de>
9256 * tree-ssa-dse.cc (dse_classify_store): When we found
9257 no defs and the basic-block with the original definition
9258 ends in __builtin_unreachable[_trap] the store is dead.
9260 2023-06-20 Richard Biener <rguenther@suse.de>
9262 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
9263 keep the virtual SSA form up-to-date.
9265 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9267 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
9268 New define_insn_and_split.
9270 2023-06-20 Tamar Christina <tamar.christina@arm.com>
9272 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
9274 2023-06-20 Jan Beulich <jbeulich@suse.com>
9276 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
9277 constraint. Add new AVX512F alternative.
9279 2023-06-20 Richard Biener <rguenther@suse.de>
9282 * dwarf2out.cc (process_scope_var): Continue processing
9283 the decl after setting a parent in case the existing DIE
9286 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
9288 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
9289 (riscv_arg_has_vector): Simplify.
9290 (riscv_pass_in_vector_p): Adjust warning message.
9292 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
9294 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
9295 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
9296 * config/riscv/riscv.md (riscv_frcsr): New patterns.
9297 (riscv_fscsr): Likewise.
9299 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
9301 PR rtl-optimization/110305
9302 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
9303 Handle HONOR_SNANS for x + 0.0.
9305 2023-06-19 Jan Hubicka <jh@suse.cz>
9307 PR tree-optimization/109811
9308 PR tree-optimization/109849
9309 * passes.def: Add phiprop to early optimization passes.
9310 * tree-ssa-phiprop.cc: Allow clonning.
9312 2023-06-19 Tamar Christina <tamar.christina@arm.com>
9314 * config/aarch64/aarch64.md (arches): Add nosimd.
9315 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
9318 2023-06-19 Tamar Christina <tamar.christina@arm.com>
9319 Omar Tahir <Omar.Tahir2@arm.com>
9321 * gensupport.cc (class conlist, add_constraints, add_attributes,
9322 skip_spaces, expect_char, preprocess_compact_syntax,
9323 parse_section_layout, parse_section, convert_syntax): New.
9324 (process_rtx): Check for conversion.
9325 * genoutput.cc (process_template): Check for unresolved iterators.
9326 (class data): Add compact_syntax_p.
9328 * gensupport.h (compact_syntax): New.
9329 (hash-set.h): Include.
9330 * doc/md.texi: Document it.
9332 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
9334 * recog.h (check_asm_operands): Change return type from int to bool.
9335 (insn_invalid_p): Ditto.
9336 (verify_changes): Ditto.
9337 (apply_change_group): Ditto.
9338 (constrain_operands): Ditto.
9339 (constrain_operands_cached): Ditto.
9340 (validate_replace_rtx_subexp): Ditto.
9341 (validate_replace_rtx): Ditto.
9342 (validate_replace_rtx_part): Ditto.
9343 (validate_replace_rtx_part_nosimplify): Ditto.
9344 (added_clobbers_hard_reg_p): Ditto.
9345 (peep2_regno_dead_p): Ditto.
9346 (peep2_reg_dead_p): Ditto.
9347 (store_data_bypass_p): Ditto.
9348 (if_test_bypass_p): Ditto.
9349 * rtl.h (split_all_insns_noflow): Change
9350 return type from unsigned int to void.
9351 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
9352 of generated added_clobbers_hard_reg_p from int to bool and adjust
9353 function body accordingly. Change "used" variable type from
9355 * recog.cc (check_asm_operands): Change return type
9356 from int to bool and adjust function body accordingly.
9357 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
9358 (verify_changes): Change return type from int to bool.
9359 (apply_change_group): Change return type from int to bool
9360 and adjust function body accordingly.
9361 (validate_replace_rtx_subexp): Change return type from int to bool.
9362 (validate_replace_rtx): Ditto.
9363 (validate_replace_rtx_part): Ditto.
9364 (validate_replace_rtx_part_nosimplify): Ditto.
9365 (constrain_operands_cached): Ditto.
9366 (constrain_operands): Ditto. Change "lose" and "win"
9367 variables type from int to bool.
9368 (split_all_insns_noflow): Change return type from unsigned int
9369 to void and adjust function body accordingly.
9370 (peep2_regno_dead_p): Change return type from int to bool.
9371 (peep2_reg_dead_p): Ditto.
9372 (peep2_find_free_register): Change "success"
9373 variable type from int to bool
9374 (store_data_bypass_p_1): Change return type from int to bool.
9375 (store_data_bypass_p): Ditto.
9377 2023-06-19 Li Xu <xuli1@eswincomputing.com>
9379 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
9382 2023-06-19 Pan Li <pan2.li@intel.com>
9385 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
9387 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
9388 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
9389 VF_ZVE63 and VF_ZVE32.
9390 * config/riscv/vector.md
9391 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
9392 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
9393 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
9394 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
9395 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
9396 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
9397 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
9398 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
9399 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
9400 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
9402 2023-06-19 Pan Li <pan2.li@intel.com>
9405 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
9407 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
9408 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
9409 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
9410 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
9411 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
9412 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
9413 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
9414 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
9415 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
9416 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
9417 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
9418 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
9419 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
9420 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
9422 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
9424 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
9425 (gcn_init_libfuncs): Add div and mod functions for all modes.
9426 Add placeholders for divmod functions.
9427 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
9429 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
9431 * tree-vect-generic.cc: Include optabs-libfuncs.h.
9432 (get_compute_type): Check optab_libfunc.
9433 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
9434 (vectorizable_operation): Check optab_libfunc.
9436 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
9438 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
9439 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
9440 (V_MOV, V_MOV_ALT): Likewise.
9441 (scalar_mode, SCALAR_MODE): Add TImode.
9442 (vnsi, VnSI, vndi, VnDI): Likewise.
9443 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
9444 (mov<mode>, mov<mode>_unspec): Use V_MOV.
9445 (*mov<mode>_4reg): New insn.
9446 (mov<mode>_exec): New 4reg variant.
9447 (mov<mode>_sgprbase): Likewise.
9448 (reload_in<mode>, reload_out<mode>): Use V_MOV.
9449 (vec_set<mode>): Likewise.
9450 (vec_duplicate<mode><exec>): New 4reg variant.
9451 (vec_extract<mode><scalar_mode>): Likewise.
9452 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
9453 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
9454 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
9455 (fold_extract_last_<mode>): Use V_MOV.
9456 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
9457 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
9458 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
9459 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
9460 gather<mode>_insn_2offsets<exec>): Use V_MOV.
9461 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
9462 scatter<mode>_insn_1offset<exec_scatter>,
9463 scatter<mode>_insn_1offset_ds<exec_scatter>,
9464 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
9465 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
9466 mask_scatter_store<mode><vnsi>): Likewise.
9467 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
9468 (gcn_hard_regno_mode_ok): Likewise.
9469 (GEN_VNM): Add TImode support.
9470 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
9471 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
9472 V8TImode, and V2TImode.
9473 (print_operand): Add 'J' and 'K' print codes.
9475 2023-06-19 Richard Biener <rguenther@suse.de>
9477 PR tree-optimization/110298
9478 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
9479 Clear number of iterations info before cleaning up the CFG.
9481 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9483 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
9484 Simplify vec_concat of lowpart subreg and high part vec_select.
9486 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
9488 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
9490 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
9492 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
9493 Handle null niters_skip.
9495 2023-06-19 Richard Biener <rguenther@suse.de>
9497 * config/aarch64/aarch64.cc
9498 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
9499 to LOOP_VINFO_MASKS.
9501 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
9504 * common/config/avr/avr-common.cc: Remove setting
9505 of OPT_fdelete_null_pointer_checks.
9506 * config/avr/avr.cc (avr_option_override): Clear
9507 flag_delete_null_pointer_checks if zero_address_valid.
9508 (avr_addr_space_zero_address_valid): New function.
9509 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
9512 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9513 Robin Dapp <rdapp.gcc@gmail.com>
9515 * doc/md.texi: Add len_mask{load,store}.
9516 * genopinit.cc (main): Ditto.
9518 * internal-fn.cc (len_maskload_direct): Ditto.
9519 (len_maskstore_direct): Ditto.
9520 (expand_call_mem_ref): Ditto.
9521 (expand_partial_load_optab_fn): Ditto.
9522 (expand_len_maskload_optab_fn): Ditto.
9523 (expand_partial_store_optab_fn): Ditto.
9524 (expand_len_maskstore_optab_fn): Ditto.
9525 (direct_len_maskload_optab_supported_p): Ditto.
9526 (direct_len_maskstore_optab_supported_p): Ditto.
9527 * internal-fn.def (LEN_MASK_LOAD): Ditto.
9528 (LEN_MASK_STORE): Ditto.
9529 * optabs.def (OPTAB_CD): Ditto.
9531 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
9533 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
9535 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
9537 * config/riscv/autovec.md (<optab><mode>3): Implement binop
9539 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
9540 (enum vxrm_field_enum): Rename this...
9541 (enum fixed_point_rounding_mode): ...to this.
9542 (enum frm_field_enum): Rename this...
9543 (enum floating_point_rounding_mode): ...to this.
9544 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
9545 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
9547 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
9548 (riscv_excess_precision): Do not convert to float for ZVFH.
9549 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
9551 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
9553 * config/riscv/vector-iterators.md: Add VI_QH iterator.
9554 * config/riscv/autovec-opt.md
9555 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
9556 that includes sign extension.
9557 (@pred_extract_first_sextsi<mode>): Dito for SImode.
9559 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
9561 * config/riscv/autovec.md (vec_set<mode>): Implement.
9562 (vec_extract<mode><vel>): Implement.
9563 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
9564 (emit_vlmax_slide_insn): Declare.
9565 (emit_nonvlmax_slide_tu_insn): Declare.
9566 (emit_scalar_move_insn): Export.
9567 (emit_nonvlmax_integer_move_insn): Export.
9568 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
9569 (emit_nonvlmax_slide_tu_insn): New function.
9570 (emit_vlmax_masked_mu_insn): No change.
9571 (emit_vlmax_integer_move_insn): Export.
9573 2023-06-19 Richard Biener <rguenther@suse.de>
9575 * tree-vectorizer.h (enum vect_partial_vector_style): New.
9576 (_loop_vec_info::partial_vector_style): Likewise.
9577 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
9578 (rgroup_controls::compare_type): Add.
9579 (vec_loop_masks): Change from a typedef to auto_vec<>
9581 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
9582 Adjust. Convert niters_skip to compare_type.
9583 (vect_set_loop_condition_partial_vectors_avx512): New function
9584 implementing the AVX512 partial vector codegen.
9585 (vect_set_loop_condition): Dispatch to the correct
9586 vect_set_loop_condition_partial_vectors_* function based on
9587 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
9588 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
9589 in the original niter type.
9590 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
9591 partial_vector_style.
9592 (can_produce_all_loop_masks_p): Adjust.
9593 (vect_verify_full_masking): Produce the rgroup_controls vector
9594 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
9595 (vect_verify_full_masking_avx512): New function implementing
9596 verification of AVX512 style masking.
9597 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
9598 (vect_analyze_loop_2): Also try AVX512 style masking.
9600 (vect_estimate_min_profitable_iters): Implement AVX512 style
9601 mask producing cost.
9602 (vect_record_loop_mask): Do not build the rgroup_controls
9603 vector here but record masks in a hash-set.
9604 (vect_get_loop_mask): Implement AVX512 style mask query,
9605 complementing the existing while_ult style.
9607 2023-06-19 Richard Biener <rguenther@suse.de>
9609 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
9611 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
9612 (vectorize_fold_left_reduction): Adjust.
9613 (vect_transform_reduction): Likewise.
9614 (vectorizable_live_operation): Likewise.
9615 * tree-vect-stmts.cc (vectorizable_call): Likewise.
9616 (vectorizable_operation): Likewise.
9617 (vectorizable_store): Likewise.
9618 (vectorizable_load): Likewise.
9619 (vectorizable_condition): Likewise.
9621 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
9624 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
9625 Add Optimization option property.
9627 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
9629 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
9630 Add new pattern for the abovementioned case.
9632 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
9634 * config/xtensa/xtensa.cc
9635 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
9637 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
9639 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
9641 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
9643 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
9645 2023-06-19 liuhongt <hongtao.liu@intel.com>
9648 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
9650 (sse2_packsswb<mask_name>): .. this, ..
9651 (avx2_packsswb<mask_name>): .. this and ..
9652 (avx512bw_packsswb<mask_name>): .. this.
9653 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
9654 (sse2_packssdw<mask_name>): .. this, ..
9655 (avx2_packssdw<mask_name>): .. this and ..
9656 (avx512bw_packssdw<mask_name>): .. this.
9658 2023-06-19 liuhongt <hongtao.liu@intel.com>
9661 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
9662 UNSPEC_US_TRUNCATE instead of original us_truncate for
9664 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
9666 (mmx_packsswb): .. this and ..
9667 (mmx_packuswb): .. this.
9668 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
9670 (s_trunsuffix): Removed code iterator.
9671 (any_s_truncate): Ditto.
9672 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
9673 UNSPEC_US_TRUNCATE instead of original us_truncate.
9674 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
9675 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
9677 2023-06-18 Pan Li <pan2.li@intel.com>
9679 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
9681 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
9683 * rtl.h (*rtx_equal_p_callback_function):
9684 Change return type from int to bool.
9685 (rtx_equal_p): Ditto.
9686 (*hash_rtx_callback_function): Ditto.
9687 * rtl.cc (rtx_equal_p): Change return type from int to bool
9688 and adjust function body accordingly.
9689 * early-remat.cc (scratch_equal): Ditto.
9690 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
9691 (hash_with_unspec_callback): Ditto.
9693 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
9695 * config/arc/arc.md (movqi_insn): Allow certain constants to
9696 be stored into memory in the pattern's condition.
9697 (movsf_insn): Similarly.
9699 2023-06-18 Honza <jh@ryzen3.suse.cz>
9701 PR tree-optimization/109849
9702 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
9703 ES; handle ipa_predicate::not_sra_candidate.
9704 (evaluate_properties_for_edge): Pass es to
9705 evaluate_conditions_for_known_args.
9706 (ipa_fn_summary_t::duplicate): Handle sra candidates.
9707 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
9708 (load_or_store_of_ptr_parameter): New function.
9709 (points_to_possible_sra_candidate_p): New function.
9710 (analyze_function_body): Initialize points_to_possible_sra_candidate;
9711 determine sra predicates.
9712 (estimate_ipcp_clone_size_and_time): Update call of
9713 evaluate_conditions_for_known_args.
9714 (remap_edge_params): Update points_to_possible_sra_candidate.
9715 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
9716 (write_ipa_call_summary): Likewise.
9717 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
9718 (dump_condition): Dump it.
9719 * ipa-predicate.h (struct inline_param_summary): Add
9720 points_to_possible_sra_candidate.
9722 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
9724 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
9725 function for setting the carry flag.
9726 (ix86_expand_builtin) <handlecarry>: Use it here.
9727 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
9728 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
9729 (usubc<mode>5): Likewise.
9731 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
9733 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
9734 for the immediate constant shift count.
9735 (*concat<mode><dwi>3_2): Likewise.
9736 (*concat<mode><dwi>3_3): Likewise.
9737 (*concat<mode><dwi>3_4): Likewise.
9738 (*concat<mode><dwi>3_5): Likewise.
9739 (*concat<mode><dwi>3_6): Likewise.
9741 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
9743 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
9745 * early-remat.cc (remat_candidate_hasher::equal): Update
9746 to call rtx_equal_p with rtx_equal_p_callback_function argument.
9747 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
9748 (rtx_equal_p): Remove.
9749 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
9750 argument with NULL default value.
9751 (rtx_equal_p_cb): Remove function declaration.
9752 (hash_rtx_cb): Ditto.
9753 (hash_rtx): Add hash_rtx_callback_function argument
9754 with NULL default value.
9755 * sel-sched-ir.cc (free_nop_pool): Update function comment.
9756 (skip_unspecs_callback): Ditto.
9757 (vinsn_init): Update to call hash_rtx with
9758 hash_rtx_callback_function argument.
9759 (vinsn_equal_p): Ditto.
9761 2023-06-18 yulong <shiyulong@iscas.ac.cn>
9763 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
9764 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
9765 (ADJUST_ALIGNMENT): Ditto.
9766 (RVV_TUPLE_PARTIAL_MODES): Ditto.
9767 (ADJUST_NUNITS): Ditto.
9768 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
9770 (vfloat16mf4x3_t): Ditto.
9771 (vfloat16mf4x4_t): Ditto.
9772 (vfloat16mf4x5_t): Ditto.
9773 (vfloat16mf4x6_t): Ditto.
9774 (vfloat16mf4x7_t): Ditto.
9775 (vfloat16mf4x8_t): Ditto.
9776 (vfloat16mf2x2_t): Ditto.
9777 (vfloat16mf2x3_t): Ditto.
9778 (vfloat16mf2x4_t): Ditto.
9779 (vfloat16mf2x5_t): Ditto.
9780 (vfloat16mf2x6_t): Ditto.
9781 (vfloat16mf2x7_t): Ditto.
9782 (vfloat16mf2x8_t): Ditto.
9783 (vfloat16m1x2_t): Ditto.
9784 (vfloat16m1x3_t): Ditto.
9785 (vfloat16m1x4_t): Ditto.
9786 (vfloat16m1x5_t): Ditto.
9787 (vfloat16m1x6_t): Ditto.
9788 (vfloat16m1x7_t): Ditto.
9789 (vfloat16m1x8_t): Ditto.
9790 (vfloat16m2x2_t): Ditto.
9791 (vfloat16m2x3_t): Ditto.
9792 (vfloat16m2x4_t): Ditto.
9793 (vfloat16m4x2_t): Ditto.
9794 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
9795 (vfloat16mf4x3_t): Ditto.
9796 (vfloat16mf4x4_t): Ditto.
9797 (vfloat16mf4x5_t): Ditto.
9798 (vfloat16mf4x6_t): Ditto.
9799 (vfloat16mf4x7_t): Ditto.
9800 (vfloat16mf4x8_t): Ditto.
9801 (vfloat16mf2x2_t): Ditto.
9802 (vfloat16mf2x3_t): Ditto.
9803 (vfloat16mf2x4_t): Ditto.
9804 (vfloat16mf2x5_t): Ditto.
9805 (vfloat16mf2x6_t): Ditto.
9806 (vfloat16mf2x7_t): Ditto.
9807 (vfloat16mf2x8_t): Ditto.
9808 (vfloat16m1x2_t): Ditto.
9809 (vfloat16m1x3_t): Ditto.
9810 (vfloat16m1x4_t): Ditto.
9811 (vfloat16m1x5_t): Ditto.
9812 (vfloat16m1x6_t): Ditto.
9813 (vfloat16m1x7_t): Ditto.
9814 (vfloat16m1x8_t): Ditto.
9815 (vfloat16m2x2_t): Ditto.
9816 (vfloat16m2x3_t): Ditto.
9817 (vfloat16m2x4_t): Ditto.
9818 (vfloat16m4x2_t): Ditto.
9819 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
9820 * config/riscv/riscv.md: New.
9821 * config/riscv/vector-iterators.md: New.
9823 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
9825 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
9826 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
9827 Generalize special case for converting TImode to V1TImode to handle
9828 all 128-bit vector conversions.
9830 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
9832 * gcc-ar.cc (main): Refactor to slightly reduce code
9833 duplication. Avoid unnecessary elements in nargv.
9835 2023-06-16 Pan Li <pan2.li@intel.com>
9838 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
9839 integer reduction expand.
9840 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
9841 and the LMUL1 attr respectively.
9842 * config/riscv/vector.md
9843 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
9844 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
9845 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
9846 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
9847 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
9848 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
9849 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
9851 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9854 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
9856 2023-06-16 Jakub Jelinek <jakub@redhat.com>
9859 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
9860 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
9861 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
9863 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
9864 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
9865 * builtins.cc (fold_builtin_addc_subc): New function.
9866 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
9867 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
9869 2023-06-16 Jakub Jelinek <jakub@redhat.com>
9871 PR tree-optimization/110271
9872 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
9873 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
9874 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
9876 2023-06-16 Martin Jambor <mjambor@suse.cz>
9878 * configure: Regenerate.
9880 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
9881 Uros Bizjak <ubizjak@gmail.com>
9884 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
9885 define_insn_and_split combine *add<dwi>3_doubleword with
9886 a *concat<mode><dwi>3 for more efficient lowering after reload.
9888 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
9890 * ira-lives.cc: Include except.h.
9891 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
9892 when the pseudo does not live at the exception landing pad.
9894 2023-06-16 Alex Coplan <alex.coplan@arm.com>
9896 * doc/invoke.texi: Document -Welaborated-enum-base.
9898 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9900 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
9901 (ushrn2_n): ... This.
9902 (sqshrn2_n): Rename builtins to...
9903 (ssqshrn2_n): ... This.
9904 (uqshrn2_n): Rename builtins to...
9905 (uqushrn2_n): ... This.
9906 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
9907 (vqshrn_high_n_s32): Likewise.
9908 (vqshrn_high_n_s64): Likewise.
9909 (vqshrn_high_n_u16): Likewise.
9910 (vqshrn_high_n_u32): Likewise.
9911 (vqshrn_high_n_u64): Likewise.
9912 (vshrn_high_n_s16): Likewise.
9913 (vshrn_high_n_s32): Likewise.
9914 (vshrn_high_n_s64): Likewise.
9915 (vshrn_high_n_u16): Likewise.
9916 (vshrn_high_n_u32): Likewise.
9917 (vshrn_high_n_u64): Likewise.
9918 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
9920 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
9921 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
9922 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
9923 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
9924 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
9925 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
9926 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
9927 Update expander for the above.
9929 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9931 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
9932 (shrn2_n): ... This.
9933 (rshrn2): Rename builtins to...
9934 (rshrn2_n): ... This.
9935 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
9936 (vrshrn_high_n_s32): Likewise.
9937 (vrshrn_high_n_s64): Likewise.
9938 (vrshrn_high_n_u16): Likewise.
9939 (vrshrn_high_n_u32): Likewise.
9940 (vrshrn_high_n_u64): Likewise.
9941 (vshrn_high_n_s16): Likewise.
9942 (vshrn_high_n_s32): Likewise.
9943 (vshrn_high_n_s64): Likewise.
9944 (vshrn_high_n_u16): Likewise.
9945 (vshrn_high_n_u32): Likewise.
9946 (vshrn_high_n_u64): Likewise.
9947 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
9949 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
9950 (aarch64_shrn2<mode>_insn_le): Likewise.
9951 (aarch64_shrn2<mode>_insn_be): Likewise.
9952 (aarch64_shrn2<mode>): Likewise.
9953 (aarch64_rshrn2<mode>_insn_le): Likewise.
9954 (aarch64_rshrn2<mode>_insn_be): Likewise.
9955 (aarch64_rshrn2<mode>): Likewise.
9956 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
9957 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
9958 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
9959 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
9960 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
9961 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
9962 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
9963 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
9964 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
9965 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
9966 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
9967 (aarch64_sqshrun2_n<mode>): New define_expand.
9968 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
9969 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
9970 (aarch64_sqrshrun2_n<mode>): New define_expand.
9971 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
9972 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
9973 Delete unspec values.
9974 (VQSHRN_N): Delete int iterator.
9976 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9978 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
9979 * config/aarch64/aarch64-simd.md
9980 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
9981 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
9982 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
9983 * config/aarch64/iterators.md (shrn_s): New code attribute.
9985 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9987 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
9989 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
9990 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
9991 (aarch64_sqrshrun_n<mode>_insn): Likewise.
9992 (aarch64_sqshrun_n<mode>_insn): Likewise.
9993 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
9994 (aarch64_sqshrun_n<mode>): Likewise.
9995 (aarch64_sqrshrun_n<mode>): Likewise.
9996 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
9998 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10000 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
10001 (shrn_n): ... This.
10002 (rshrn): Rename builtins to...
10003 (rshrn_n): ... This.
10004 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
10005 (vshrn_n_s32): Likewise.
10006 (vshrn_n_s64): Likewise.
10007 (vshrn_n_u16): Likewise.
10008 (vshrn_n_u32): Likewise.
10009 (vshrn_n_u64): Likewise.
10010 (vrshrn_n_s16): Likewise.
10011 (vrshrn_n_s32): Likewise.
10012 (vrshrn_n_s64): Likewise.
10013 (vrshrn_n_u16): Likewise.
10014 (vrshrn_n_u32): Likewise.
10015 (vrshrn_n_u64): Likewise.
10016 * config/aarch64/aarch64-simd.md
10017 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
10018 (aarch64_shrn<mode>): Likewise.
10019 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
10020 (aarch64_rshrn<mode>): Likewise.
10021 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
10022 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
10023 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
10024 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
10025 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
10026 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
10027 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
10028 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
10029 (aarch64_sqshrun_n<mode>): Likewise.
10030 (aarch64_sqrshrun_n<mode>): Likewise.
10031 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
10032 (TRUNCEXTEND): New code attribute.
10033 (TRUNC_SHIFT): Likewise.
10034 (shrn_op): Likewise.
10035 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
10038 2023-06-16 Pan Li <pan2.li@intel.com>
10040 * config/riscv/riscv-vsetvl.cc
10041 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
10043 2023-06-16 Richard Biener <rguenther@suse.de>
10045 PR tree-optimization/110278
10046 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
10047 (x != (typeof x)(x == 0) -> true): Likewise.
10049 2023-06-16 Pali Rohár <pali@kernel.org>
10051 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
10052 (REAL_LIBGCC_SPEC): New define.
10053 * config/i386/mingw.opt: Add mcrtdll=
10054 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
10055 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
10056 (STARTFILE_SPEC): Adjust for -mcrtdll=.
10057 * doc/invoke.texi: Add mcrtdll= documentation.
10059 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
10061 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
10062 (mips_handle_code_readable_attr):New static function.
10063 (mips_get_code_readable_attr):New static enum function.
10064 (mips_set_current_function):Set the code_readable mode.
10065 (mips_option_override):Same as above.
10066 * doc/extend.texi:Document code_readable.
10068 2023-06-16 Richard Biener <rguenther@suse.de>
10070 PR tree-optimization/110269
10071 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
10072 with tree_expr_nonzero_p ...
10073 * match.pd (cmp (convert? addr@0) integer_zerop): With this
10076 2023-06-15 Marek Polacek <polacek@redhat.com>
10078 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
10079 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
10080 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
10081 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
10082 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
10084 * configure: Regenerate.
10085 * doc/install.texi: Document --enable-host-pie.
10087 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
10089 * regcprop.cc (maybe_mode_change): Enable stack pointer
10092 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
10094 PR tree-optimization/110266
10095 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
10097 (adjust_realpart_expr): Ditto.
10099 2023-06-15 Jan Beulich <jbeulich@suse.com>
10101 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
10104 2023-06-15 Jan Beulich <jbeulich@suse.com>
10106 * config/i386/constraints.md: Mention k and r for B.
10108 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
10109 Andrew Pinski <apinski@marvell.com>
10112 * config/loongarch/loongarch.md: Modify the register constraints for template
10113 "jumptable" and "indirect_jump" from "r" to "e".
10115 2023-06-15 Xi Ruoyao <xry111@xry111.site>
10117 * config/loongarch/loongarch-tune.h (loongarch_align): New
10119 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
10121 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
10123 * config/loongarch/loongarch.cc
10124 (loongarch_option_override_internal): Set the value of
10125 -falign-functions= if -falign-functions is enabled but no value
10126 is given. Likewise for -falign-labels=.
10128 2023-06-15 Jakub Jelinek <jakub@redhat.com>
10130 PR middle-end/79173
10131 * internal-fn.def (UADDC, USUBC): New internal functions.
10132 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
10133 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
10134 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
10135 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
10136 match_uaddc_usubc): New functions.
10137 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
10138 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
10139 other optimizations have been successful for those.
10140 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
10141 * fold-const-call.cc (fold_const_call): Likewise.
10142 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
10143 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
10144 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
10146 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
10147 define_expand patterns.
10148 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
10149 into NOTE_INSN_DELETED note rather than nop instruction.
10150 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
10153 2023-06-15 Jakub Jelinek <jakub@redhat.com>
10155 PR middle-end/79173
10156 * config/i386/i386.md (subborrow<mode>): Add alternative with
10157 memory destination and add for it define_peephole2
10158 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
10159 destination in these patterns.
10161 2023-06-15 Jakub Jelinek <jakub@redhat.com>
10163 PR middle-end/79173
10164 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
10165 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
10166 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
10167 using memory destination in these patterns.
10169 2023-06-15 Jakub Jelinek <jakub@redhat.com>
10171 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
10172 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
10173 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
10174 * fold-const-call.cc (fold_const_call): ... here.
10176 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
10178 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
10179 Rename to <su>abd<mode>3.
10180 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
10183 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
10185 * doc/md.texi (sabd, uabd): Document them.
10186 * internal-fn.def (ABD): Use new optab.
10187 * optabs.def (sabd_optab, uabd_optab): New optabs,
10188 * tree-vect-patterns.cc (vect_recog_absolute_difference):
10189 Recognize the following idiom abs (a - b).
10190 (vect_recog_sad_pattern): Refactor to use
10191 vect_recog_absolute_difference.
10192 (vect_recog_abd_pattern): Use patterns found by
10193 vect_recog_absolute_difference to build a new ABD
10196 2023-06-15 chenxiaolong <chenxl04200420@163.com>
10198 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
10199 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
10201 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10203 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
10204 (expand_vec_perm_const_1): Add merge optmization.
10206 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
10209 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
10210 (riscv_pass_by_reference): Return true for vector mode
10212 2023-06-15 Pan Li <pan2.li@intel.com>
10214 * config/riscv/autovec-opt.md: Align the predictor sytle.
10215 * config/riscv/autovec.md: Ditto.
10217 2023-06-15 Pan Li <pan2.li@intel.com>
10219 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
10220 Take elen instead of scalar BITS_PER_WORD.
10221 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
10222 instead of scaler BITS_PER_WORD.
10224 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
10226 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
10228 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10230 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
10231 Fix signed comparison warning in loop from npats to enelts.
10233 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
10235 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
10236 to offloading compilation.
10237 * config/gcn/mkoffload.cc (main): Adjust.
10238 * config/nvptx/mkoffload.cc (main): Likewise.
10239 * doc/invoke.texi (foffload-options): Update example.
10241 2023-06-14 liuhongt <hongtao.liu@intel.com>
10244 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
10245 for alternative 2 since there's no evex version for vpcmpeqd
10248 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
10250 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
10252 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
10254 * config/sh/divtab.cc: Remove.
10256 2023-06-13 Jakub Jelinek <jakub@redhat.com>
10258 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
10259 superfluous spaces around \t for vpcmpeqd.
10261 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
10263 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
10264 clearing vectors with only a single element. Set CLEARED if the
10265 vector was initialized to zero.
10267 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
10269 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
10272 (TUPLE_ENTRY): Undef.
10274 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10276 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
10277 (shuffle_generic_patterns): Ditto.
10278 (expand_vec_perm_const_1): Ditto.
10280 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10282 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
10283 (shuffle_decompress_patterns): Ditto.
10285 2023-06-13 Richard Biener <rguenther@suse.de>
10287 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
10289 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
10290 Kito Cheng <kito.cheng@sifive.com>
10292 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
10293 warning flag if func is not builtin
10294 * config/riscv/riscv.cc
10295 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
10296 (riscv_arg_has_vector): Determine whether the arg is vector type.
10297 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
10298 (riscv_init_cumulative_args): The same as header.
10299 (riscv_get_arg_info): Add the checking.
10300 (riscv_function_value): Check the func return and set warning flag
10301 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
10302 determine whether warning psabi or not.
10304 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10306 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
10307 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
10308 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
10309 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
10311 (arm_output_load_tpidr): Define.
10312 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
10313 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
10315 (reload_tp_hard): Likewise.
10316 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
10318 * doc/invoke.texi (Arm Options, mtp): Document new values.
10320 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10323 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
10324 AARCH64_TPIDRRO_EL0 value.
10325 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
10326 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
10327 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
10328 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
10330 2023-06-13 Alexandre Oliva <oliva@adacore.com>
10332 * range-op-float.cc (frange_nextafter): Drop inline.
10333 (frelop_early_resolve): Add static.
10334 (frange_float): Likewise.
10336 2023-06-13 Richard Biener <rguenther@suse.de>
10338 PR middle-end/110232
10339 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
10340 to check whether the buffer covers the whole vector.
10342 2023-06-13 Richard Biener <rguenther@suse.de>
10344 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
10345 .MASK_LOAD and friends set the size of the access to unknown.
10347 2023-06-13 Tejas Belagod <tbelagod@arm.com>
10350 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
10351 calls that have a constant input predicate vector.
10352 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
10353 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
10354 (svlast_impl::vect_all_same): Check if all vector elements are equal.
10356 2023-06-13 Andi Kleen <ak@linux.intel.com>
10358 * config/i386/gcc-auto-profile: Regenerate.
10360 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10362 * config/riscv/vector-iterators.md: Fix requirement.
10364 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10366 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
10367 (shuffle_decompress_patterns): New function.
10368 (expand_vec_perm_const_1): Add decompress optimization.
10370 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
10372 PR rtl-optimization/101188
10373 * postreload.cc (reload_cse_move2add_invalidate): New function,
10375 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
10377 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
10379 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
10380 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
10381 and if maxv == 1, use constant element for duplicating into register.
10383 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
10385 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
10386 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
10387 (gimplify_adjust_omp_clauses): Change
10388 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
10389 GOMP_MAP_FORCE_PRESENT.
10390 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
10391 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
10392 to/from clauses with present modifier.
10394 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10396 PR tree-optimization/110205
10397 * range-op-float.cc (range_operator::fold_range): Add default FII
10399 * range-op-mixed.h (class operator_gt): Add missing final overrides.
10400 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
10401 (operator_lshift ::update_bitmask): Add final override.
10402 (operator_rshift ::update_bitmask): Add final override.
10403 * range-op.h (range_operator::fold_range): Add FII prototype.
10405 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10407 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
10408 Use range_op_handler directly.
10409 * range-op.cc (range_op_handler::range_op_handler): Unsigned
10410 param instead of tree-code.
10411 (ptr_op_widen_plus_signed): Delete.
10412 (ptr_op_widen_plus_unsigned): Delete.
10413 (ptr_op_widen_mult_signed): Delete.
10414 (ptr_op_widen_mult_unsigned): Delete.
10415 (range_op_table::initialize_integral_ops): Add new opcodes.
10416 * range-op.h (range_op_handler): Use unsigned.
10417 (OP_WIDEN_MULT_SIGNED): New.
10418 (OP_WIDEN_MULT_UNSIGNED): New.
10419 (OP_WIDEN_PLUS_SIGNED): New.
10420 (OP_WIDEN_PLUS_UNSIGNED): New.
10421 (RANGE_OP_TABLE_SIZE): New.
10422 (range_op_table::operator []): Use unsigned.
10423 (range_op_table::set): Use unsigned.
10424 (m_range_tree): Make unsigned.
10425 (ptr_op_widen_mult_signed): Remove.
10426 (ptr_op_widen_mult_unsigned): Remove.
10427 (ptr_op_widen_plus_signed): Remove.
10428 (ptr_op_widen_plus_unsigned): Remove.
10430 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10432 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
10433 manually as there is no access to the default operator.
10434 (cfn_copysign::fold_range): Don't check for validity.
10435 (cfn_ubsan::fold_range): Ditto.
10436 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
10437 * range-op.cc (default_operator): New.
10438 (range_op_handler::range_op_handler): Use default_operator
10440 (range_op_handler::operator bool): Move from header, compare
10441 against default operator.
10442 (range_op_handler::range_op): New.
10443 * range-op.h (range_op_handler::operator bool): Move.
10445 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10447 * range-op.cc (unified_table): Delete.
10448 (range_op_table operator_table): Instantiate.
10449 (range_op_table::range_op_table): Rename from unified_table.
10450 (range_op_handler::range_op_handler): Use range_op_table.
10451 * range-op.h (range_op_table::operator []): Inline.
10452 (range_op_table::set): Inline.
10454 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10456 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
10458 * gimple-range-op.cc (get_code): Rename from get_code_and_type
10460 (gimple_range_op_handler::supported_p): No need for type.
10461 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
10462 (cfn_copysign::fold_range): Ditto.
10463 (cfn_ubsan::fold_range): Ditto.
10464 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
10465 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
10466 * range-op-float.cc (operator_plus::op1_range): Ditto.
10467 (operator_mult::op1_range): Ditto.
10468 (range_op_float_tests): Ditto.
10469 * range-op.cc (get_op_handler): Remove.
10470 (range_op_handler::set_op_handler): Remove.
10471 (operator_plus::op1_range): No need for type.
10472 (operator_minus::op1_range): Ditto.
10473 (operator_mult::op1_range): Ditto.
10474 (operator_exact_divide::op1_range): Ditto.
10475 (operator_cast::op1_range): Ditto.
10476 (perator_bitwise_not::fold_range): Ditto.
10477 (operator_negate::fold_range): Ditto.
10478 * range-op.h (range_op_handler::range_op_handler): Remove type param.
10479 (range_cast): No need for type.
10480 (range_op_table::operator[]): Check for enum_code >= 0.
10481 * tree-data-ref.cc (compute_distributive_range): No need for type.
10482 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
10483 * value-query.cc (range_query::get_tree_range): Ditto.
10484 * value-relation.cc (relation_oracle::validate_relation): Ditto.
10485 * vr-values.cc (range_of_var_in_loop): Ditto.
10486 (simplify_using_ranges::fold_cond_with_ops): Ditto.
10488 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10490 * range-op-mixed.h (operator_max): Remove final.
10491 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
10492 (pointer_table::pointer_table): Remove.
10493 (class hybrid_max_operator): New.
10494 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
10495 * range-op.cc (pointer_tree_table): Remove.
10496 (unified_table::unified_table): Comment out MAX_EXPR.
10497 (get_op_handler): Remove check of pointer table.
10498 * range-op.h (class pointer_table): Remove.
10500 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10502 * range-op-mixed.h (operator_min): Remove final.
10503 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
10504 (class hybrid_min_operator): New.
10505 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
10506 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
10508 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10510 * range-op-mixed.h (operator_bitwise_or): Remove final.
10511 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
10512 (class hybrid_or_operator): New.
10513 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
10514 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
10516 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10518 * range-op-mixed.h (operator_bitwise_and): Remove final.
10519 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
10520 (class hybrid_and_operator): New.
10521 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
10522 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
10524 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10526 * Makefile.in (OBJS): Add range-op-ptr.o.
10527 * range-op-mixed.h (update_known_bitmask): Move prototype here.
10528 (minus_op1_op2_relation_effect): Move prototype here.
10529 (wi_includes_zero_p): Move function to here.
10530 (wi_zero_p): Ditto.
10531 * range-op.cc (update_known_bitmask): Remove static.
10532 (wi_includes_zero_p): Move to header.
10533 (wi_zero_p): Move to header.
10534 (minus_op1_op2_relation_effect): Remove static.
10535 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
10536 (pointer_plus_operator): Ditto.
10537 (pointer_min_max_operator): Ditto.
10538 (pointer_and_operator): Ditto.
10539 (pointer_or_operator): Ditto.
10540 (pointer_table): Ditto.
10541 (range_op_table::initialize_pointer_ops): Ditto.
10542 * range-op-ptr.cc: New.
10544 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10546 * range-op-mixed.h (class operator_max): Move from...
10547 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
10548 (get_op_handler): Remove the integral table.
10549 (class operator_max): Move from here.
10550 (integral_table::integral_table): Delete.
10551 * range-op.h (class integral_table): Delete.
10553 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10555 * range-op-mixed.h (class operator_min): Move from...
10556 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
10557 (class operator_min): Move from here.
10558 (integral_table::integral_table): Remove MIN_EXPR.
10560 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10562 * range-op-mixed.h (class operator_bitwise_or): Move from...
10563 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
10564 (class operator_bitwise_or): Move from here.
10565 (integral_table::integral_table): Remove BIT_IOR_EXPR.
10567 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10569 * range-op-mixed.h (class operator_bitwise_and): Move from...
10570 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
10571 (get_op_handler): Check for a pointer table entry first.
10572 (class operator_bitwise_and): Move from here.
10573 (integral_table::integral_table): Remove BIT_AND_EXPR.
10575 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10577 * range-op-mixed.h (class operator_bitwise_xor): Move from...
10578 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
10579 (class operator_bitwise_xor): Move from here.
10580 (integral_table::integral_table): Remove BIT_XOR_EXPR.
10581 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
10583 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10585 * range-op-mixed.h (class operator_bitwise_not): Move from...
10586 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
10587 (class operator_bitwise_not): Move from here.
10588 (integral_table::integral_table): Remove BIT_NOT_EXPR.
10589 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
10591 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
10593 * range-op-mixed.h (class operator_addr_expr): Move from...
10594 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
10595 (class operator_addr_expr): Move from here.
10596 (integral_table::integral_table): Remove ADDR_EXPR.
10597 (pointer_table::pointer_table): Remove ADDR_EXPR.
10599 2023-06-12 Pan Li <pan2.li@intel.com>
10601 * config/riscv/riscv-vector-builtins-types.def
10602 (vfloat16m1_t): Add type to lmul1 ops.
10603 (vfloat16m2_t): Likewise.
10604 (vfloat16m4_t): Likewise.
10606 2023-06-12 Richard Biener <rguenther@suse.de>
10608 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
10609 .MASK_STORE and friend set the size of the access to
10612 2023-06-12 Tamar Christina <tamar.christina@arm.com>
10614 * config.in: Regenerate.
10615 * configure: Regenerate.
10616 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
10618 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10620 * config/riscv/autovec-opt.md
10621 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
10622 (*<any_shiftrt:optab>trunc<mode>): Ditto.
10623 * config/riscv/autovec.md (<optab><mode>3): Change to
10624 define_insn_and_split.
10625 (v<optab><mode>3): Ditto.
10626 (trunc<mode><v_double_trunc>2): Ditto.
10628 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10630 * simplify-rtx.cc (simplify_const_unary_operation):
10631 Handle US_TRUNCATE, SS_TRUNCATE.
10633 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
10636 * doc/gm2.texi (Standard procedures): Fix Next link.
10638 2023-06-12 Tamar Christina <tamar.christina@arm.com>
10640 * config.in: Regenerate.
10642 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
10644 PR middle-end/110142
10645 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
10646 subtype to vect_widened_op_tree and remove subtype parameter, also
10647 remove superfluous overloaded function definition.
10648 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
10649 to call to vect_recog_widen_op_pattern.
10650 (vect_recog_widen_minus_pattern): Likewise.
10652 2023-06-12 liuhongt <hongtao.liu@intel.com>
10654 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
10655 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
10656 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
10657 (vec_unpacks_lo_<mode>): Ditto.
10658 (vec_unpacks_hi_<mode>): Ditto.
10659 (sse_movlhps_<mode>): New define_insn.
10660 (ssse3_palignr<mode>_perm): Extend to V_128H.
10661 (V_128H): New mode iterator.
10662 (ssepackPHmode): New mode attribute.
10663 (vunpck_extract_mode): Ditto.
10664 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
10665 (vpckfloat_temp_mode): Ditto.
10666 (vpckfloat_op_mode): Ditto.
10667 (vunpckfixt_mode): Extend to VxHF.
10668 (vunpckfixt_model): Ditto.
10669 (vunpckfixt_extract_mode): Ditto.
10671 2023-06-12 Richard Biener <rguenther@suse.de>
10673 PR middle-end/110200
10674 * genmatch.cc (expr::gen_transform): Put braces around
10675 the if arm for the (convert ...) short-cut.
10677 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
10680 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
10681 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
10683 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
10686 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
10687 floating constant itself for real_to_target call.
10689 2023-06-12 Pan Li <pan2.li@intel.com>
10691 * config/riscv/riscv-vector-builtins-types.def
10692 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
10693 (vfloat16mf2_t): Ditto.
10694 (vfloat16m1_t): Ditto.
10695 (vfloat16m2_t): Ditto.
10696 (vfloat16m4_t): Ditto.
10698 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
10700 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
10701 Do not require a stack frame when debugging is enabled for AIX.
10703 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
10705 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
10706 Remove attribute values.
10707 (insv_notbit): New post-reload insn.
10708 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
10709 (*insv.not-bit.0_split, *insv.not-bit.7_split)
10710 (*insv.xor-extract_split): Split to insv_notbit.
10711 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
10712 (*insv.xor-extract): Remove post-reload insns.
10713 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
10714 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
10715 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
10716 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
10718 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
10721 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
10722 (MSB, SIZE): New mode attributes.
10723 (any_shift): New code iterator.
10724 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
10725 (*lshr<mode>3_const_split): Add constraint alternative for
10726 the case of shift-offset = MSB. Ditch "length" attribute.
10727 (extzv<mode): New. replaces extzv. Adjust following patterns.
10728 Use avr_out_extr, avr_out_extr_not to print asm.
10729 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
10730 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
10731 * config/avr/constraints.md (C15, C23, C31, Yil): New
10732 * config/avr/predicates.md (reg_or_low_io_operand)
10733 (const7_operand, reg_or_low_io_operand)
10734 (const15_operand, const_0_to_15_operand)
10735 (const23_operand, const_0_to_23_operand)
10736 (const31_operand, const_0_to_31_operand): New.
10737 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
10738 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
10739 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
10740 MSB case to new insn constraint "r" for operands[1].
10741 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
10742 Handle these cases.
10743 (avr_rtx_costs_1): Adjust cost for a new pattern.
10745 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10747 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
10748 (vector_insn_info::parse_insn): Add rtx_insn parse.
10749 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
10750 (get_first_vsetvl): New function.
10751 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
10752 (pass_vsetvl::cleanup_insns): Remove it.
10753 (pass_vsetvl::ssa_post_optimization): New function.
10754 (has_no_uses): Ditto.
10755 (pass_vsetvl::propagate_avl): Remove it.
10756 (pass_vsetvl::df_post_optimization): New function.
10757 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
10758 * config/riscv/riscv-vsetvl.h: Adapt declaration.
10760 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
10762 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
10763 (ipcp_vr_lattice::print): Call dump method.
10764 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
10766 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
10767 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
10769 (initialize_node_lattices): Pass type when appropriate.
10770 (ipa_vr_operation_and_type_effects): Make type agnostic.
10771 (ipa_value_range_from_jfunc): Same.
10772 (propagate_vr_across_jump_function): Same.
10773 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
10774 (evaluate_properties_for_edge): Same.
10775 * ipa-prop.cc (ipa_vr::get_vrange): Same.
10776 (ipcp_update_vr): Same.
10777 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
10778 (ipa_range_set_and_normalize): Same.
10780 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
10784 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
10785 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
10786 (avr_pass_data_ifelse): New pass_data for it.
10787 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
10788 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
10789 (avr_out_cmp_ext): New functions.
10790 (compare_condtition): Make sure REG_CC dies in the branch insn.
10791 (avr_rtx_costs_1): Add computation of cbranch costs.
10792 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
10793 [ADJUST_LEN_CMP_SEXT]Handle them.
10794 (TARGET_CANONICALIZE_COMPARISON): New define.
10795 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
10796 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
10797 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
10798 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
10799 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
10800 (avr_out_cmp_zext): New Protos
10801 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
10802 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
10803 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
10804 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
10805 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
10806 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
10807 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
10808 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
10809 (adjust_len) [add_set_ZN, cmp_zext]: New.
10810 (QIPSI): New mode iterator.
10811 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
10812 (gelt): New code iterator.
10813 (gelt_eqne): New code attribute.
10814 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
10815 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
10816 (*cmpqi_sign_extend): Remove insns.
10817 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
10818 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
10819 * config/avr/predicates.md (scratch_or_d_register_operand): New.
10820 * config/avr/constraints.md (Yxx): New constraint.
10822 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10824 * config/riscv/autovec.md (select_vl<mode>): New pattern.
10825 * config/riscv/riscv-protos.h (expand_select_vl): New function.
10826 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
10828 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
10830 * range-op-float.cc (foperator_mult_div_base): Delete.
10831 (foperator_mult_div_base::find_range): Make static local function.
10832 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
10833 (operator_mult::op1_range): Rename from foperator_mult.
10834 (operator_mult::op2_range): Ditto.
10835 (operator_mult::rv_fold): Ditto.
10836 (float_table::float_table): Remove MULT_EXPR.
10837 (class foperator_div): Inherit from range_operator.
10838 (float_table::float_table): Delete.
10839 * range-op-mixed.h (class operator_mult): Combined from integer
10841 * range-op.cc (float_tree_table): Delete.
10842 (op_mult): New object.
10843 (unified_table::unified_table): Add MULT_EXPR.
10844 (get_op_handler): Do not check float table any longer.
10845 (class cross_product_operator): Move to range-op-mixed.h.
10846 (class operator_mult): Move to range-op-mixed.h.
10847 (integral_table::integral_table): Remove MULT_EXPR.
10848 (pointer_table::pointer_table): Remove MULT_EXPR.
10849 * range-op.h (float_table): Remove.
10851 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
10853 * range-op-float.cc (foperator_negate): Remove. Move prototypes
10854 to range-op-mixed.h
10855 (operator_negate::fold_range): Rename from foperator_negate.
10856 (operator_negate::op1_range): Ditto.
10857 (float_table::float_table): Remove NEGATE_EXPR.
10858 * range-op-mixed.h (class operator_negate): Combined from integer
10860 * range-op.cc (op_negate): New object.
10861 (unified_table::unified_table): Add NEGATE_EXPR.
10862 (class operator_negate): Move to range-op-mixed.h.
10863 (integral_table::integral_table): Remove NEGATE_EXPR.
10864 (pointer_table::pointer_table): Remove NEGATE_EXPR.
10866 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
10868 * range-op-float.cc (foperator_minus): Remove. Move prototypes
10869 to range-op-mixed.h
10870 (operator_minus::fold_range): Rename from foperator_minus.
10871 (operator_minus::op1_range): Ditto.
10872 (operator_minus::op2_range): Ditto.
10873 (operator_minus::rv_fold): Ditto.
10874 (float_table::float_table): Remove MINUS_EXPR.
10875 * range-op-mixed.h (class operator_minus): Combined from integer
10877 * range-op.cc (op_minus): New object.
10878 (unified_table::unified_table): Add MINUS_EXPR.
10879 (class operator_minus): Move to range-op-mixed.h.
10880 (integral_table::integral_table): Remove MINUS_EXPR.
10881 (pointer_table::pointer_table): Remove MINUS_EXPR.
10883 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
10885 * range-op-float.cc (foperator_abs): Remove. Move prototypes
10886 to range-op-mixed.h
10887 (operator_abs::fold_range): Rename from foperator_abs.
10888 (operator_abs::op1_range): Ditto.
10889 (float_table::float_table): Remove ABS_EXPR.
10890 * range-op-mixed.h (class operator_abs): Combined from integer
10892 * range-op.cc (op_abs): New object.
10893 (unified_table::unified_table): Add ABS_EXPR.
10894 (class operator_abs): Move to range-op-mixed.h.
10895 (integral_table::integral_table): Remove ABS_EXPR.
10896 (pointer_table::pointer_table): Remove ABS_EXPR.
10898 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
10900 * range-op-float.cc (foperator_plus): Remove. Move prototypes
10901 to range-op-mixed.h
10902 (operator_plus::fold_range): Rename from foperator_plus.
10903 (operator_plus::op1_range): Ditto.
10904 (operator_plus::op2_range): Ditto.
10905 (operator_plus::rv_fold): Ditto.
10906 (float_table::float_table): Remove PLUS_EXPR.
10907 * range-op-mixed.h (class operator_plus): Combined from integer
10909 * range-op.cc (op_plus): New object.
10910 (unified_table::unified_table): Add PLUS_EXPR.
10911 (class operator_plus): Move to range-op-mixed.h.
10912 (integral_table::integral_table): Remove PLUS_EXPR.
10913 (pointer_table::pointer_table): Remove PLUS_EXPR.
10915 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
10917 * range-op-mixed.h (class operator_cast): Combined from integer
10919 * range-op.cc (op_cast): New object.
10920 (unified_table::unified_table): Add op_cast
10921 (class operator_cast): Move to range-op-mixed.h.
10922 (integral_table::integral_table): Remove op_cast
10923 (pointer_table::pointer_table): Remove op_cast.
10925 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
10927 * range-op-float.cc (operator_cst::fold_range): New.
10928 * range-op-mixed.h (class operator_cst): Move from integer file.
10929 * range-op.cc (op_cst): New object.
10930 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
10931 (class operator_cst): Move to range-op-mixed.h.
10932 (integral_table::integral_table): Remove op_cst.
10933 (pointer_table::pointer_table): Remove op_cst.
10935 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
10937 * range-op-float.cc (foperator_identity): Remove. Move prototypes
10938 to range-op-mixed.h
10939 (operator_identity::fold_range): Rename from foperator_identity.
10940 (operator_identity::op1_range): Ditto.
10941 (float_table::float_table): Remove fop_identity.
10942 * range-op-mixed.h (class operator_identity): Combined from integer
10944 * range-op.cc (op_identity): New object.
10945 (unified_table::unified_table): Add op_identity.
10946 (class operator_identity): Move to range-op-mixed.h.
10947 (integral_table::integral_table): Remove identity.
10948 (pointer_table::pointer_table): Remove identity.
10950 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
10952 * range-op-float.cc (foperator_ge): Remove. Move prototypes
10953 to range-op-mixed.h
10954 (operator_ge::fold_range): Rename from foperator_ge.
10955 (operator_ge::op1_range): Ditto.
10956 (float_table::float_table): Remove GE_EXPR.
10957 * range-op-mixed.h (class operator_ge): Combined from integer
10959 * range-op.cc (op_ge): New object.
10960 (unified_table::unified_table): Add GE_EXPR.
10961 (class operator_ge): Move to range-op-mixed.h.
10962 (ge_op1_op2_relation): Fold into
10963 operator_ge::op1_op2_relation.
10964 (integral_table::integral_table): Remove GE_EXPR.
10965 (pointer_table::pointer_table): Remove GE_EXPR.
10966 * range-op.h (ge_op1_op2_relation): Delete.
10968 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
10970 * range-op-float.cc (foperator_gt): Remove. Move prototypes
10971 to range-op-mixed.h
10972 (operator_gt::fold_range): Rename from foperator_gt.
10973 (operator_gt::op1_range): Ditto.
10974 (float_table::float_table): Remove GT_EXPR.
10975 * range-op-mixed.h (class operator_gt): Combined from integer
10977 * range-op.cc (op_gt): New object.
10978 (unified_table::unified_table): Add GT_EXPR.
10979 (class operator_gt): Move to range-op-mixed.h.
10980 (gt_op1_op2_relation): Fold into
10981 operator_gt::op1_op2_relation.
10982 (integral_table::integral_table): Remove GT_EXPR.
10983 (pointer_table::pointer_table): Remove GT_EXPR.
10984 * range-op.h (gt_op1_op2_relation): Delete.
10986 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
10988 * range-op-float.cc (foperator_le): Remove. Move prototypes
10989 to range-op-mixed.h
10990 (operator_le::fold_range): Rename from foperator_le.
10991 (operator_le::op1_range): Ditto.
10992 (float_table::float_table): Remove LE_EXPR.
10993 * range-op-mixed.h (class operator_le): Combined from integer
10995 * range-op.cc (op_le): New object.
10996 (unified_table::unified_table): Add LE_EXPR.
10997 (class operator_le): Move to range-op-mixed.h.
10998 (le_op1_op2_relation): Fold into
10999 operator_le::op1_op2_relation.
11000 (integral_table::integral_table): Remove LE_EXPR.
11001 (pointer_table::pointer_table): Remove LE_EXPR.
11002 * range-op.h (le_op1_op2_relation): Delete.
11004 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
11006 * range-op-float.cc (foperator_lt): Remove. Move prototypes
11007 to range-op-mixed.h
11008 (operator_lt::fold_range): Rename from foperator_lt.
11009 (operator_lt::op1_range): Ditto.
11010 (float_table::float_table): Remove LT_EXPR.
11011 * range-op-mixed.h (class operator_lt): Combined from integer
11013 * range-op.cc (op_lt): New object.
11014 (unified_table::unified_table): Add LT_EXPR.
11015 (class operator_lt): Move to range-op-mixed.h.
11016 (lt_op1_op2_relation): Fold into
11017 operator_lt::op1_op2_relation.
11018 (integral_table::integral_table): Remove LT_EXPR.
11019 (pointer_table::pointer_table): Remove LT_EXPR.
11020 * range-op.h (lt_op1_op2_relation): Delete.
11022 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
11024 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
11025 to range-op-mixed.h
11026 (operator_equal::fold_range): Rename from foperator_not_equal.
11027 (operator_equal::op1_range): Ditto.
11028 (float_table::float_table): Remove NE_EXPR.
11029 * range-op-mixed.h (class operator_not_equal): Combined from integer
11031 * range-op.cc (op_equal): New object.
11032 (unified_table::unified_table): Add NE_EXPR.
11033 (class operator_not_equal): Move to range-op-mixed.h.
11034 (not_equal_op1_op2_relation): Fold into
11035 operator_not_equal::op1_op2_relation.
11036 (integral_table::integral_table): Remove NE_EXPR.
11037 (pointer_table::pointer_table): Remove NE_EXPR.
11038 * range-op.h (not_equal_op1_op2_relation): Delete.
11040 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
11042 * range-op-float.cc (foperator_equal): Remove. Move prototypes
11043 to range-op-mixed.h
11044 (operator_equal::fold_range): Rename from foperator_equal.
11045 (operator_equal::op1_range): Ditto.
11046 (float_table::float_table): Remove EQ_EXPR.
11047 * range-op-mixed.h (class operator_equal): Combined from integer
11049 * range-op.cc (op_equal): New object.
11050 (unified_table::unified_table): Add EQ_EXPR.
11051 (class operator_equal): Move to range-op-mixed.h.
11052 (equal_op1_op2_relation): Fold into
11053 operator_equal::op1_op2_relation.
11054 (integral_table::integral_table): Remove EQ_EXPR.
11055 (pointer_table::pointer_table): Remove EQ_EXPR.
11056 * range-op.h (equal_op1_op2_relation): Delete.
11058 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
11060 * range-op-float.cc (class float_table): Move to header.
11061 (float_table::float_table): Move float only operators to...
11062 (range_op_table::initialize_float_ops): Here.
11063 * range-op-mixed.h: New.
11064 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
11066 (float_tree_table): Moved from range-op-float.cc.
11067 (unified_tree_table): New.
11068 (unified_table::unified_table): New. Call initialize routines.
11069 (get_op_handler): Check unified table first.
11070 (range_op_handler::range_op_handler): Handle no type constructor.
11071 (integral_table::integral_table): Move integral only operators to...
11072 (range_op_table::initialize_integral_ops): Here.
11073 (pointer_table::pointer_table): Move pointer only operators to...
11074 (range_op_table::initialize_pointer_ops): Here.
11075 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
11076 (get_bool_state): Ditto.
11077 (empty_range_varying): Ditto.
11078 (relop_early_resolve): Ditto.
11079 (class range_op_table): Add new init methods for range types.
11080 (class integral_table): Move declaration to here.
11081 (class pointer_table): Move declaration to here.
11082 (class float_table): Move declaration to here.
11084 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11085 Richard Sandiford <richard.sandiford@arm.com>
11086 Richard Biener <rguenther@suse.de>
11088 * doc/md.texi: Add SELECT_VL support.
11089 * internal-fn.def (SELECT_VL): Ditto.
11090 * optabs.def (OPTAB_D): Ditto.
11091 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
11092 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
11093 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
11094 (vectorizable_store): Ditto.
11095 (vectorizable_load): Ditto.
11096 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
11098 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
11101 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
11104 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
11106 * range-op.cc (range_cast): Move to...
11107 * range-op.h (range_cast): Here and add generic a version.
11109 2023-06-09 Marek Polacek <polacek@redhat.com>
11113 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
11114 warn about designated initializers in C only.
11116 2023-06-09 Andrew Pinski <apinski@marvell.com>
11118 PR tree-optimization/97711
11119 PR tree-optimization/110155
11120 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
11121 ((zero_one != 0) ? z <op> y : y): Likewise.
11123 2023-06-09 Andrew Pinski <apinski@marvell.com>
11125 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
11126 multiply rather than negation/bit_and.
11128 2023-06-09 Andrew Pinski <apinski@marvell.com>
11130 * match.pd (`X & -Y -> X * Y`): Allow for truncation
11131 and the same type for unsigned types.
11133 2023-06-09 Andrew Pinski <apinski@marvell.com>
11135 PR tree-optimization/110165
11136 PR tree-optimization/110166
11137 * match.pd (zero_one_valued_p): Don't accept
11138 signed 1-bit integers.
11140 2023-06-09 Richard Biener <rguenther@suse.de>
11142 * match.pd (two conversions in a row): Use element_precision
11143 to DTRT for VECTOR_TYPE.
11145 2023-06-09 Pan Li <pan2.li@intel.com>
11147 * config/riscv/riscv.md (enabled): Move to another place, and
11148 add fp_vector_disabled to the cond.
11149 (fp_vector_disabled): New attr defined for disabling fp.
11150 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
11152 2023-06-09 Pan Li <pan2.li@intel.com>
11154 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
11157 2023-06-09 liuhongt <hongtao.liu@intel.com>
11160 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
11161 view_convert_expr mask to signed type when folding pblendvb
11164 2023-06-09 liuhongt <hongtao.liu@intel.com>
11167 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
11168 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
11169 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
11171 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
11172 real codename for __builtin_ia32_pabs{b,w,d}.
11174 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
11176 * gimple-range-op.cc
11177 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
11178 (gimple_range_op_handler::maybe_builtin_call): Adjust.
11179 * gimple-range-op.h (operand1, operand2): Use m_operator.
11180 * range-op.cc (integral_table, pointer_table): Relocate.
11181 (get_op_handler): Rename from get_handler and handle all types.
11182 (range_op_handler::range_op_handler): Relocate.
11183 (range_op_handler::set_op_handler): Relocate and adjust.
11184 (range_op_handler::range_op_handler): Relocate.
11185 (dispatch_trio): New.
11186 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
11187 (range_op_handler::dispatch_kind): New.
11188 (range_op_handler::fold_range): Relocate and Use new dispatch value.
11189 (range_op_handler::op1_range): Ditto.
11190 (range_op_handler::op2_range): Ditto.
11191 (range_op_handler::lhs_op1_relation): Ditto.
11192 (range_op_handler::lhs_op2_relation): Ditto.
11193 (range_op_handler::op1_op2_relation): Ditto.
11194 (range_op_handler::set_op_handler): Use m_operator member.
11195 * range-op.h (range_op_handler::operator bool): Use m_operator.
11196 (range_op_handler::dispatch_kind): New.
11197 (range_op_handler::m_valid): Delete.
11198 (range_op_handler::m_int): Delete
11199 (range_op_handler::m_float): Delete
11200 (range_op_handler::m_operator): New.
11201 (range_op_table::operator[]): Relocate from .cc file.
11202 (range_op_table::set): Ditto.
11203 * value-range.h (class vrange): Make range_op_handler a friend.
11205 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
11207 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
11208 (cfn_pass_through_arg1): Adjust using statemenmt.
11209 (cfn_signbit): Change base class, adjust using statement.
11210 (cfn_copysign): Ditto.
11212 (cfn_sincos): Ditto.
11213 * range-op-float.cc (fold_range): Change class to range_operator.
11217 (lhs_op1_relation): Ditto.
11218 (lhs_op2_relation): Ditto.
11219 (op1_op2_relation): Ditto.
11220 (foperator_*): Ditto.
11221 (class float_table): New. Inherit from range_op_table.
11222 (floating_tree_table) Change to range_op_table pointer.
11223 (class floating_op_table): Delete.
11224 * range-op.cc (operator_equal): Adjust using statement.
11225 (operator_not_equal): Ditto.
11226 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
11227 (operator_minus, operator_cast): Ditto.
11228 (operator_bitwise_and, pointer_plus_operator): Ditto.
11229 (get_float_handle): Change return type.
11230 * range-op.h (range_operator_float): Delete. Relocate all methods
11231 into class range_operator.
11232 (range_op_handler::m_float): Change type to range_operator.
11233 (floating_op_table): Delete.
11234 (floating_tree_table): Change type.
11236 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
11238 * range-op.cc (range_operator::fold_range): Call virtual routine.
11239 (range_operator::update_bitmask): New.
11240 (operator_equal::update_bitmask): New.
11241 (operator_not_equal::update_bitmask): New.
11242 (operator_lt::update_bitmask): New.
11243 (operator_le::update_bitmask): New.
11244 (operator_gt::update_bitmask): New.
11245 (operator_ge::update_bitmask): New.
11246 (operator_ge::update_bitmask): New.
11247 (operator_plus::update_bitmask): New.
11248 (operator_minus::update_bitmask): New.
11249 (operator_pointer_diff::update_bitmask): New.
11250 (operator_min::update_bitmask): New.
11251 (operator_max::update_bitmask): New.
11252 (operator_mult::update_bitmask): New.
11253 (operator_div:operator_div):New.
11254 (operator_div::update_bitmask): New.
11255 (operator_div::m_code): New member.
11256 (operator_exact_divide::operator_exact_divide): New constructor.
11257 (operator_lshift::update_bitmask): New.
11258 (operator_rshift::update_bitmask): New.
11259 (operator_bitwise_and::update_bitmask): New.
11260 (operator_bitwise_or::update_bitmask): New.
11261 (operator_bitwise_xor::update_bitmask): New.
11262 (operator_trunc_mod::update_bitmask): New.
11263 (op_ident, op_unknown, op_ptr_min_max): New.
11264 (op_nop, op_convert): Delete.
11265 (op_ssa, op_paren, op_obj_type): Delete.
11266 (op_realpart, op_imagpart): Delete.
11267 (op_ptr_min, op_ptr_max): Delete.
11268 (pointer_plus_operator:update_bitmask): New.
11269 (range_op_table::set): Do not use m_code.
11270 (integral_table::integral_table): Adjust to single instances.
11271 * range-op.h (range_operator::range_operator): Delete.
11272 (range_operator::m_code): Delete.
11273 (range_operator::update_bitmask): New.
11275 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
11277 * range-op-float.cc (range_operator_float::fold_range): Return
11278 NAN of the result type.
11280 2023-06-08 Jakub Jelinek <jakub@redhat.com>
11282 * optabs.cc (expand_ffs): Add forward declaration.
11283 (expand_doubleword_clz): Rename to ...
11284 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
11285 handle also doubleword CTZ and FFS in addition to CLZ.
11286 (expand_unop): Adjust caller. Also call it for doubleword
11287 ctz_optab and ffs_optab.
11289 2023-06-08 Jakub Jelinek <jakub@redhat.com>
11292 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
11293 n_words == 2 recurse with mmx_ok as first argument rather than false.
11295 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
11297 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
11298 avoid sign extension/undefined behaviour when setting each bit.
11300 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
11301 Uros Bizjak <ubizjak@gmail.com>
11303 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
11304 Use new x86_stc instruction when the carry flag must be set.
11305 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
11306 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
11307 * config/i386/i386.h (TARGET_SLOW_STC): New define.
11308 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
11309 (x86_stc): New define_insn.
11310 (define_peephole2): Convert x86_stc into alternate implementation
11311 on pentium4 without -Os when a QImode register is available.
11312 (*x86_cmc): New define_insn.
11313 (define_peephole2): Convert *x86_cmc into alternate implementation
11314 on pentium4 without -Os when a QImode register is available.
11315 (*setccc): New define_insn_and_split for a no-op CCCmode move.
11316 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
11317 recognize (and eliminate) the carry flag being copied to itself.
11318 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
11319 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
11321 2023-06-07 Andrew Pinski <apinski@marvell.com>
11323 * match.pd: Fix comment for the
11324 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
11326 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
11327 Jeff Law <jlaw@ventanamicro.com>
11329 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
11330 (rotrsi3_sext): Expose generator.
11331 (rotlsi3 pattern): Hide generator.
11332 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
11334 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
11335 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
11336 (mulsi3, <optab>si3): Likewise.
11337 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
11338 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
11339 (<u>mulsidi3): Likewise.
11340 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
11341 (mulsi3_extended, <optab>si3_extended): Likewise.
11342 (splitter for shadd feeding divison): Update RTL pattern to account
11343 for changes in how 32 bit ops are expanded for TARGET_64BIT.
11344 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
11346 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
11349 * config/riscv/riscv.cc (riscv_print_operand): Calculate
11350 memmodel only when it is valid.
11352 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
11354 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
11355 for constant element of a vector.
11357 2023-06-07 Jakub Jelinek <jakub@redhat.com>
11359 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
11360 instead compare tree_nonzero_bits <= 1U rather than just == 1.
11362 2023-06-07 Alex Coplan <alex.coplan@arm.com>
11365 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
11367 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
11368 names for builtins.
11369 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
11370 setup if in_lto_p, just like we do for SVE.
11371 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
11372 (__arm_st64b): Delete.
11373 (__arm_st64bv): Delete.
11374 (__arm_st64bv0): Delete.
11376 2023-06-07 Alex Coplan <alex.coplan@arm.com>
11379 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
11380 Use input operand for the destination address.
11381 * config/aarch64/aarch64.md (st64b): Fix constraint on address
11384 2023-06-07 Alex Coplan <alex.coplan@arm.com>
11387 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
11388 Replace eight consecutive spaces with tabs.
11389 (aarch64_init_ls64_builtins): Likewise.
11390 (aarch64_expand_builtin_ls64): Likewise.
11391 * config/aarch64/aarch64.md (ld64b): Likewise.
11394 (st64bv0): Likewise.
11396 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
11398 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
11399 offset table pseudo to a general reg subset.
11401 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11403 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
11405 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
11407 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
11408 (aarch64_sqxtun2<mode>_le): Likewise.
11409 (aarch64_sqxtun2<mode>_be): Likewise.
11410 (aarch64_sqxtun2<mode>): Adjust for the above.
11411 (aarch64_sqmovun<mode>): New define_expand.
11412 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
11413 (half_mask): New mode attribute.
11414 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
11417 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11419 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
11421 (aarch64_addp<mode>_insn): ... This...
11422 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
11423 (aarch64_addp<mode>): New define_expand.
11425 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11427 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
11428 * config/riscv/riscv-v.cc
11429 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
11431 (rvv_builder::single_step_npatterns_p): New function.
11432 (rvv_builder::npatterns_all_equal_p): Ditto.
11433 (const_vec_all_in_range_p): Support POLY handling.
11434 (gen_const_vector_dup): Ditto.
11435 (emit_vlmax_gather_insn): Add vrgatherei16.
11436 (emit_vlmax_masked_gather_mu_insn): Ditto.
11437 (expand_const_vector): Add VLA SLP const vector support.
11438 (expand_vec_perm): Support POLY.
11439 (struct expand_vec_perm_d): New struct.
11440 (shuffle_generic_patterns): New function.
11441 (expand_vec_perm_const_1): Ditto.
11442 (expand_vec_perm_const): Ditto.
11443 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
11444 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
11446 2023-06-07 Andrew Pinski <apinski@marvell.com>
11448 PR middle-end/110117
11449 * expr.cc (expand_single_bit_test): Handle
11450 const_int from expand_expr.
11452 2023-06-07 Andrew Pinski <apinski@marvell.com>
11454 * expr.cc (do_store_flag): Rearrange the
11455 TER code so that it overrides the nonzero bits
11456 info if we had `a & POW2`.
11458 2023-06-07 Andrew Pinski <apinski@marvell.com>
11460 PR tree-optimization/110134
11461 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
11463 (-A CMP CST -> B CMP (-CST)): Likewise.
11465 2023-06-07 Andrew Pinski <apinski@marvell.com>
11467 PR tree-optimization/89263
11468 PR tree-optimization/99069
11469 PR tree-optimization/20083
11470 PR tree-optimization/94898
11471 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
11472 one of the operands are constant.
11474 2023-06-07 Andrew Pinski <apinski@marvell.com>
11476 * match.pd (zero_one_valued_p): Match 0 integer constant
11479 2023-06-07 Pan Li <pan2.li@intel.com>
11481 * config/riscv/riscv-vector-builtins-types.def
11482 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
11483 (vfloat32m1_t): Ditto.
11484 (vfloat32m2_t): Ditto.
11485 (vfloat32m4_t): Ditto.
11486 (vfloat32m8_t): Ditto.
11487 (vint16mf4_t): Ditto.
11488 (vint16mf2_t): Ditto.
11489 (vint16m1_t): Ditto.
11490 (vint16m2_t): Ditto.
11491 (vint16m4_t): Ditto.
11492 (vint16m8_t): Ditto.
11493 (vuint16mf4_t): Ditto.
11494 (vuint16mf2_t): Ditto.
11495 (vuint16m1_t): Ditto.
11496 (vuint16m2_t): Ditto.
11497 (vuint16m4_t): Ditto.
11498 (vuint16m8_t): Ditto.
11499 (vint32mf2_t): Ditto.
11500 (vint32m1_t): Ditto.
11501 (vint32m2_t): Ditto.
11502 (vint32m4_t): Ditto.
11503 (vint32m8_t): Ditto.
11504 (vuint32mf2_t): Ditto.
11505 (vuint32m1_t): Ditto.
11506 (vuint32m2_t): Ditto.
11507 (vuint32m4_t): Ditto.
11508 (vuint32m8_t): Ditto.
11510 2023-06-07 Jason Merrill <jason@redhat.com>
11513 * doc/invoke.texi: Document it.
11515 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
11517 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
11518 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
11519 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
11520 NOT (BITREVERSE x) as BITREVERSE (NOT x).
11521 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
11522 Optimize PARITY (BITREVERSE x) as PARITY x.
11523 Optimize BITREVERSE (BITREVERSE x) as x.
11524 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
11525 BITREVERSE of a constant integer at compile-time.
11526 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
11527 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
11528 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
11529 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
11530 Optimize COPYSIGN (x, ABS y) as ABS x.
11531 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
11532 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
11533 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
11534 arguments at compile-time.
11536 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
11538 * rtl.h (function_invariant_p): Change return type from int to bool.
11539 * reload1.cc (function_invariant_p): Change return type from
11540 int to bool and adjust function body accordingly.
11542 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11544 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
11545 (*single_<optab>mult_plus<mode>): Ditto.
11546 (*double_<optab>mult_plus<mode>): Ditto.
11547 (*sign_zero_extend_fma): Ditto.
11548 (*zero_sign_extend_fma): Ditto.
11549 * config/riscv/riscv-protos.h (enum insn_type): New enum.
11551 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
11552 Tobias Burnus <tobias@codesourcery.com>
11554 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
11555 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
11557 (omp_get_attachment): Handle map clauses with 'present' modifier.
11558 (omp_group_base): Likewise.
11559 (gimplify_scan_omp_clauses): Reorder present maps to come first.
11560 Set GOVD flags for present defaultmaps.
11561 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
11562 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
11564 (lower_omp_target): Handle map clauses with 'present' modifier.
11565 Handle 'to' and 'from' clauses with 'present'.
11566 * tree-core.h (enum omp_clause_defaultmap_kind): Add
11567 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
11568 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
11569 'from' clauses with 'present' modifier. Handle present defaultmap.
11570 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
11572 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
11574 * config/rs6000/genfusion.pl: Delete some dead code.
11576 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
11578 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
11580 (gen_ld_cmpi_p10): ... this.
11582 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
11585 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
11586 duplicate expression.
11588 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11590 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
11591 Handle unsigned reduc_plus_scal_ builtins.
11592 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
11593 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
11594 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
11595 __builtin_aarch64_reduc_plus_scal_v2di.
11596 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
11598 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11600 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
11601 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
11602 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
11604 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11606 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
11607 (aarch64_shrn<mode>_insn_be): Delete.
11608 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
11609 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
11610 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
11611 (aarch64_rshrn<mode>_insn_le): Delete.
11612 (aarch64_rshrn<mode>_insn_be): Delete.
11613 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
11614 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
11616 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
11618 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
11620 (aarch64_pars_overlap_p): Likewise.
11621 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
11622 Express in terms of UNSPEC_ADDV.
11623 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
11624 (*aarch64_<su>addlv<mode>_reduction): Define.
11625 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
11626 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
11627 (aarch64_pars_overlap_p): Likewise.
11628 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
11629 (VQUADW): New mode attribute.
11630 (VWIDE2X_S): Likewise.
11632 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
11633 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
11635 2023-06-06 Richard Biener <rguenther@suse.de>
11637 PR middle-end/110055
11638 * gimplify.cc (gimplify_target_expr): Do not emit
11639 CLOBBERs for variables which have static storage duration
11640 after gimplifying their initializers.
11642 2023-06-06 Richard Biener <rguenther@suse.de>
11644 PR tree-optimization/109143
11645 * tree-ssa-structalias.cc (solution_set_expand): Avoid
11646 one bitmap iteration and optimize bit range setting.
11648 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
11650 PR bootstrap/110120
11651 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
11652 XVECEXP, not XEXP, to access first item of a PARALLEL.
11654 2023-06-06 Pan Li <pan2.li@intel.com>
11656 * config/riscv/riscv-vector-builtins-types.def
11657 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
11658 (vfloat16mf2_t): Likewise.
11659 (vfloat16m1_t): Likewise.
11660 (vfloat16m2_t): Likewise.
11661 (vfloat16m4_t): Likewise.
11662 (vfloat16m8_t): Likewise.
11663 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
11664 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
11666 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
11668 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
11669 for cfi reg/mem machmode
11670 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
11672 2023-06-06 Li Xu <xuli1@eswincomputing.com>
11674 * config/riscv/vector-iterators.md:
11675 Fix 'REQUIREMENT' for machine_mode 'MODE'.
11676 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
11677 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
11678 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
11680 2023-06-06 Pan Li <pan2.li@intel.com>
11682 * config/riscv/vector-iterators.md: Fix typo in mode attr.
11684 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
11685 Joel Hutton <joel.hutton@arm.com>
11687 * doc/generic.texi: Remove old tree codes.
11688 * expr.cc (expand_expr_real_2): Remove old tree code cases.
11689 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
11690 * optabs-tree.cc (optab_for_tree_code): Likewise.
11691 (supportable_half_widening_operation): Likewise.
11692 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
11693 * tree-inline.cc (estimate_operator_cost): Likewise.
11694 (op_symbol_code): Likewise.
11695 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
11696 (vect_analyze_data_ref_accesses): Likewise.
11697 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
11698 * cfgexpand.cc (expand_debug_expr): Likewise.
11699 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
11700 (supportable_widening_operation): Likewise.
11701 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
11703 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
11704 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
11705 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
11706 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
11707 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
11708 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
11709 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
11710 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
11712 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
11713 Joel Hutton <joel.hutton@arm.com>
11714 Tamar Christina <tamar.christina@arm.com>
11716 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
11718 (vec_widen_<su>add_lo_<mode>): ... to this.
11719 (vec_widen_<su>addl_hi_<mode>): Rename this ...
11720 (vec_widen_<su>add_hi_<mode>): ... to this.
11721 (vec_widen_<su>subl_lo_<mode>): Rename this ...
11722 (vec_widen_<su>sub_lo_<mode>): ... to this.
11723 (vec_widen_<su>subl_hi_<mode>): Rename this ...
11724 (vec_widen_<su>sub_hi_<mode>): ...to this.
11725 * doc/generic.texi: Document new IFN codes.
11726 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
11727 (commutative_binary_fn_p): Add widen_plus fn's.
11728 (widening_fn_p): New function.
11729 (narrowing_fn_p): New function.
11730 (direct_internal_fn_optab): Change visibility.
11731 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
11732 internal_fn that expands into multiple internal_fns for widening.
11733 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
11734 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
11735 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
11736 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
11737 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
11738 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
11739 (lookup_hilo_internal_fn): Likewise.
11740 (widening_fn_p): Likewise.
11741 (Narrowing_fn_p): Likewise.
11742 * optabs.cc (commutative_optab_p): Add widening plus optabs.
11743 * optabs.def (OPTAB_D): Define widen add, sub optabs.
11744 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
11745 patterns with a hi/lo or even/odd split.
11746 (vect_recog_sad_pattern): Refactor to use new IFN codes.
11747 (vect_recog_widen_plus_pattern): Likewise.
11748 (vect_recog_widen_minus_pattern): Likewise.
11749 (vect_recog_average_pattern): Likewise.
11750 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
11752 (supportable_widening_operation): Likewise.
11753 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
11755 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
11756 Joel Hutton <joel.hutton@arm.com>
11758 * tree-vect-patterns.cc: Add include for gimple-iterator.
11759 (vect_recog_widen_op_pattern): Refactor to use code_helper.
11760 (vect_gimple_build): New function.
11761 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
11763 (vectorizable_call): Likewise.
11764 (vect_gen_widened_results_half): Likewise.
11765 (vect_create_vectorized_demotion_stmts): Likewise.
11766 (vect_create_vectorized_promotion_stmts): Likewise.
11767 (vect_create_half_widening_stmts): Likewise.
11768 (vectorizable_conversion): Likewise.
11769 (supportable_widening_operation): Likewise.
11770 (supportable_narrowing_operation): Likewise.
11771 * tree-vectorizer.h (supportable_widening_operation): Change
11772 prototype to use code_helper.
11773 (supportable_narrowing_operation): Likewise.
11774 (vect_gimple_build): New function prototype.
11775 * tree.h (code_helper::safe_as_tree_code): New function.
11776 (code_helper::safe_as_fn_code): New function.
11778 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
11780 * wide-int.cc (wi::bitreverse_large): New function implementing
11781 bit reversal of an integer.
11782 * wide-int.h (wi::bitreverse): New (template) function prototype.
11783 (bitreverse_large): Prototype helper function/implementation.
11784 (wi::bitreverse): New template wrapper around bitreverse_large.
11786 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
11788 * rtl.h (print_rtl_single): Change return type from int to void.
11789 (print_rtl_single_with_indent): Ditto.
11790 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
11791 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
11792 (rtx_writer::print_rtx_operand_code_0): Ditto.
11793 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
11794 (rtx_writer::print_rtx_operand_code_i): Ditto.
11795 (rtx_writer::print_rtx_operand_code_u): Ditto.
11796 (rtx_writer::print_rtx_operand): Ditto.
11797 (rtx_writer::print_rtx): Ditto.
11798 (rtx_writer::finish_directive): Ditto.
11799 (print_rtl_single): Change return type from int to void
11800 and adjust function body accordingly.
11801 (rtx_writer::print_rtl_single_with_indent): Ditto.
11803 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
11805 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
11806 (reg_class_subset_p): Ditto.
11807 * reginfo.cc (reg_classes_intersect_p): Ditto.
11808 (reg_class_subset_p): Ditto.
11810 2023-06-05 Pan Li <pan2.li@intel.com>
11812 * config/riscv/riscv-vector-builtins-types.def
11813 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
11814 (vfloat32m1_t): Ditto.
11815 (vfloat32m2_t): Ditto.
11816 (vfloat32m4_t): Ditto.
11817 (vfloat32m8_t): Ditto.
11818 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
11819 (vint16mf2_t): Ditto.
11820 (vint16m1_t): Ditto.
11821 (vint16m2_t): Ditto.
11822 (vint16m4_t): Ditto.
11823 (vint16m8_t): Ditto.
11824 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
11825 (vuint16mf2_t): Ditto.
11826 (vuint16m1_t): Ditto.
11827 (vuint16m2_t): Ditto.
11828 (vuint16m4_t): Ditto.
11829 (vuint16m8_t): Ditto.
11830 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
11831 (vint32m1_t): Ditto.
11832 (vint32m2_t): Ditto.
11833 (vint32m4_t): Ditto.
11834 (vint32m8_t): Ditto.
11835 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
11836 (vuint32m1_t): Ditto.
11837 (vuint32m2_t): Ditto.
11838 (vuint32m4_t): Ditto.
11839 (vuint32m8_t): Ditto.
11840 * config/riscv/vector-iterators.md: Add FP=16 support for V,
11841 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
11843 2023-06-05 Andrew Pinski <apinski@marvell.com>
11845 PR bootstrap/110085
11846 * Makefile.in (clean): Remove the removing of
11847 MULTILIB_DIR/MULTILIB_OPTIONS directories.
11849 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
11851 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
11853 * config/mips/mips.cc (speculation_barrier_libfunc): New static
11855 (mips_init_libfuncs): Initialize it.
11856 (mips_emit_speculation_barrier): New function.
11857 * config/mips/mips.md (speculation_barrier): Call
11858 mips_emit_speculation_barrier.
11860 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11862 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
11863 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
11864 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
11865 (rvv_builder::get_merged_repeating_sequence): Ditto.
11866 (rvv_builder::get_merge_scalar_mask): Ditto.
11867 (emit_scalar_move_insn): Ditto.
11868 (emit_vlmax_integer_move_insn): Ditto.
11869 (emit_nonvlmax_integer_move_insn): Ditto.
11870 (emit_vlmax_gather_insn): Ditto.
11871 (emit_vlmax_masked_gather_mu_insn): Ditto.
11872 (get_repeating_sequence_dup_machine_mode): Ditto.
11874 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11876 * config/riscv/autovec.md: Split arguments.
11877 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
11878 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
11880 2023-06-04 Andrew Pinski <apinski@marvell.com>
11882 * expr.cc (do_store_flag): Improve for single bit testing
11883 not against zero but against that single bit.
11885 2023-06-04 Andrew Pinski <apinski@marvell.com>
11887 * expr.cc (do_store_flag): Extend the one bit checking case
11888 to handle the case where we don't have an and but rather still
11889 one bit is known to be non-zero.
11891 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
11893 * config/h8300/constraints.md (Zz): Make this a normal
11895 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
11896 * config/h8300/logical.md (H8/SX bit patterns): Remove.
11898 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
11900 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
11901 New insn_and_split patterns.
11903 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11906 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
11907 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
11908 (@vlmul_extx4<mode>): Ditto.
11909 (@vlmul_extx8<mode>): Ditto.
11910 (@vlmul_extx16<mode>): Ditto.
11911 (@vlmul_extx32<mode>): Ditto.
11912 (@vlmul_extx64<mode>): Ditto.
11913 (*vlmul_extx2<mode>): Ditto.
11914 (*vlmul_extx4<mode>): Ditto.
11915 (*vlmul_extx8<mode>): Ditto.
11916 (*vlmul_extx16<mode>): Ditto.
11917 (*vlmul_extx32<mode>): Ditto.
11918 (*vlmul_extx64<mode>): Ditto.
11920 2023-06-04 Pan Li <pan2.li@intel.com>
11922 * config/riscv/riscv-vector-builtins-types.def
11923 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
11924 (vfloat32m1_t): Likewise.
11925 (vfloat32m2_t): Likewise.
11926 (vfloat32m4_t): Likewise.
11927 (vfloat32m8_t): Likewise.
11928 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
11929 * config/riscv/vector-iterators.md: Add single to half machine
11932 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11934 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
11935 (*n<optab><mode>): Ditto.
11936 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
11937 (*n<optab><mode>): Ditto.
11938 * config/riscv/vector.md: Ditto.
11940 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
11943 * config/i386/i386-features.cc (scalar_chain::convert_compare):
11944 Update or delete REG_EQUAL notes, converting CONST_INT and
11945 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
11947 2023-06-04 Jason Merrill <jason@redhat.com>
11950 * tree-eh.cc (lower_resx): Pass the exception pointer to the
11952 * except.h: Tweak comment.
11954 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
11956 * postreload.cc (move2add_use_add2_insn): Handle
11957 trivial single_sets. Rename variable PAT to SET.
11958 (move2add_use_add3_insn, reload_cse_move2add): Similar.
11960 2023-06-04 Pan Li <pan2.li@intel.com>
11962 * config/riscv/riscv-vector-builtins-types.def
11963 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
11964 (vfloat16mf2_t): Likewise.
11965 (vfloat16m1_t): Likewise.
11966 (vfloat16m2_t): Likewise.
11967 (vfloat16m4_t): Likewise.
11968 (vfloat16m8_t): Likewise.
11969 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
11970 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
11971 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
11972 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
11975 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
11977 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
11980 2023-06-03 Die Li <lidie@eswincomputing.com>
11982 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
11984 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11986 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
11988 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11990 * config/riscv/vector.md: Add vector-opt.md.
11991 * config/riscv/autovec-opt.md: New file.
11993 2023-06-03 liuhongt <hongtao.liu@intel.com>
11995 PR tree-optimization/110067
11996 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
11997 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
11999 2023-06-03 liuhongt <hongtao.liu@intel.com>
12002 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
12003 (truncv2si<mode>2): Ditto.
12005 2023-06-02 Andrew Pinski <apinski@marvell.com>
12007 PR rtl-optimization/102733
12008 * dse.cc (store_info): Add addrspace field.
12009 (record_store): Record the address space
12010 and check to make sure they are the same.
12012 2023-06-02 Andrew Pinski <apinski@marvell.com>
12014 PR rtl-optimization/110042
12015 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
12016 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
12018 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
12021 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
12022 Make sure that we do not have a cap on field alignment before altering
12023 the struct layout based on the type alignment of the first entry.
12025 2023-06-02 David Faust <david.faust@oracle.com>
12028 * btfout.cc (btf_absolute_func_id): New function.
12029 (btf_asm_func_type): Call it here. Change index parameter from
12030 size_t to ctf_id_t. Use PRIu64 formatter.
12032 2023-06-02 Alex Coplan <alex.coplan@arm.com>
12034 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
12035 (btf_asm_datasec_type): Likewise.
12037 2023-06-02 Carl Love <cel@us.ibm.com>
12039 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
12040 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
12042 2023-06-02 Jason Merrill <jason@redhat.com>
12046 * tree.h (DECL_MERGEABLE): New.
12047 * tree-core.h (struct tree_decl_common): Mention it.
12048 * gimplify.cc (gimplify_init_constructor): Check it.
12049 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
12050 * varasm.cc (categorize_decl_for_section): Likewise.
12052 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
12054 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
12055 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
12056 (stack_regs_mentioned_p): Change return type from int to bool
12057 and adjust function body accordingly.
12058 (stack_regs_mentioned): Ditto.
12059 (check_asm_stack_operands): Ditto. Change "malformed_asm"
12061 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
12062 (swap_rtx_condition_1): Change return type from int to bool
12063 and adjust function body accordingly. Change "r" variable to bool.
12064 (swap_rtx_condition): Change return type from int to bool
12065 and adjust function body accordingly.
12066 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
12067 (subst_stack_regs): Ditto.
12068 (convert_regs_entry): Change return type from int to bool and adjust
12069 function body accordingly. Change "inserted" variable to bool.
12070 (convert_regs_1): Recode handling of control_flow_insn_deleted.
12071 (convert_regs_2): Recode handling of cfg_altered.
12072 (convert_regs): Ditto. Change "inserted" variable to bool.
12074 2023-06-02 Jason Merrill <jason@redhat.com>
12077 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
12078 (initializer_constant_valid_p_1): Compare float precision.
12080 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
12082 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
12085 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12087 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
12088 (vect_set_loop_condition_partial_vectors): Ditto.
12090 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
12093 * config/avr/avr.md: Add an RTL peephole to optimize operations on
12094 non-LD_REGS after a move from LD_REGS.
12095 (piaop): New code iterator.
12097 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
12100 * doc/install.texi: Document (optional) Perl usage for parallel
12101 testing of libgomp.
12103 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
12106 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
12109 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12110 KuanLin Chen <best124612@gmail.com>
12112 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
12113 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
12115 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12117 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
12119 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12121 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
12123 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12125 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
12127 (DEF_RVV_FRM_ENUM): Ditto.
12129 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12131 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
12132 intrinsic API expander
12133 * config/riscv/vector.md
12134 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
12135 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
12136 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
12138 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12140 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
12141 * config/riscv/predicates.md (vector_perm_operand): New predicate.
12142 * config/riscv/riscv-protos.h (enum insn_type): New enum.
12143 (expand_vec_perm): New function.
12144 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
12145 (gen_const_vector_dup): Ditto.
12146 (emit_vlmax_gather_insn): Ditto.
12147 (emit_vlmax_masked_gather_mu_insn): Ditto.
12148 (expand_vec_perm): Ditto.
12150 2023-06-01 Jason Merrill <jason@redhat.com>
12152 * doc/invoke.texi (-Wpedantic): Improve clarity.
12154 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
12156 * rtl.h (exp_equiv_p): Change return type from int to bool.
12157 * cse.cc (mention_regs): Change return type from int to bool
12158 and adjust function body accordingly.
12159 (exp_equiv_p): Ditto.
12160 (insert_regs): Ditto. Change "modified" function argument to bool
12161 and update usage accordingly.
12162 (record_jump_cond): Remove always zero "reversed_nonequality"
12163 function argument and update usage accordingly.
12164 (fold_rtx): Change "changed" variable to bool.
12165 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
12166 (is_dead_reg): Change return type from int to bool.
12168 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12170 * config/xtensa/xtensa.md (adddi3, subdi3):
12171 New RTL generation patterns implemented according to the instruc-
12172 tion idioms described in the Xtensa ISA reference manual (p. 600).
12174 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
12175 Uros Bizjak <ubizjak@gmail.com>
12178 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
12179 CODE_for_sse4_1_ptestzv2di.
12180 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
12181 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
12182 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
12183 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
12184 when expanding UNSPEC_PTEST to compare against zero.
12185 * config/i386/i386-features.cc (scalar_chain::convert_compare):
12186 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
12187 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
12188 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
12189 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
12190 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
12191 check for suitable matching modes for the UNSPEC_PTEST pattern.
12192 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
12193 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
12194 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
12195 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
12196 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
12197 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
12198 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
12200 (*ptest<mode>_and): Specify CCZ to only perform this optimization
12201 when only the Z flag is required.
12203 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
12206 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
12208 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12210 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
12211 Add =r,m and =r,m alternatives.
12212 (load_pair<DREG:mode><DREG2:mode>): Likewise.
12213 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
12215 2023-06-01 Pan Li <pan2.li@intel.com>
12217 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
12219 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
12220 (main): Disable FP16 tuple.
12221 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
12222 (TARGET_VECTOR_ELEN_FP_16): Ditto.
12223 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
12225 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
12226 (vfloat16mf2_t): Ditto.
12227 (vfloat16m1_t): Ditto.
12228 (vfloat16m2_t): Ditto.
12229 (vfloat16m4_t): Ditto.
12230 (vfloat16m8_t): Ditto.
12231 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
12233 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
12234 machine mode based on TARGET_VECTOR_ELEN_FP_16.
12236 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12238 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
12239 (DEF_RVV_FRM_ENUM): New macro.
12240 (handle_pragma_vector): Add FRM enum
12241 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
12248 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
12249 Richard Sandiford <richard.sandiford@arm.com>
12251 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
12252 Update call to wi::bswap.
12253 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
12254 Update call to wi::bswap.
12255 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
12256 Update calls to wi::bswap.
12257 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
12258 (wi::bswap_large): New function, with revised API.
12259 * wide-int.h (wi::bswap): New (template) function prototype.
12260 (wide_int_storage::bswap): Remove method.
12261 (sext_large, zext_large): Consistent indentation/line wrapping.
12262 (bswap_large): Prototype helper function containing implementation.
12263 (wi::bswap): New template wrapper around bswap_large.
12265 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12268 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
12269 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
12270 (usdot_prod<vsi2qi>): Rename to...
12271 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
12272 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
12273 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
12274 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
12275 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
12276 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
12277 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
12280 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12283 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
12284 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
12285 (aarch64_sq<r>dmulh_n<mode>): Rename to...
12286 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
12287 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
12288 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
12289 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
12290 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
12291 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
12292 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
12293 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
12294 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
12295 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
12296 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
12298 2023-05-31 David Faust <david.faust@oracle.com>
12300 * btfout.cc (btf_kind_names): New.
12301 (btf_kind_name): New.
12302 (btf_absolute_var_id): New utility function.
12303 (btf_relative_var_id): Likewise.
12304 (btf_relative_func_id): Likewise.
12305 (btf_absolute_datasec_id): Likewise.
12306 (btf_asm_type_ref): New.
12307 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
12308 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
12309 (btf_asm_varent): Likewise.
12310 (btf_asm_func_arg): Likewise.
12311 (btf_asm_datasec_entry): Likewise.
12312 (btf_asm_datasec_type): Likewise.
12313 (btf_asm_func_type): Likewise. Add index parameter.
12314 (btf_asm_enum_const): Likewise.
12315 (btf_asm_sou_member): Likewise.
12316 (output_btf_vars): Update btf_asm_* call accordingly.
12317 (output_asm_btf_sou_fields): Likewise.
12318 (output_asm_btf_enum_list): Likewise.
12319 (output_asm_btf_func_args_list): Likewise.
12320 (output_asm_btf_vlen_bytes): Likewise.
12321 (output_btf_func_types): Add ctf_container_ref parameter.
12322 Pass it to btf_asm_func_type.
12323 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
12324 (btf_output): Update output_btf_func_types call similarly.
12326 2023-05-31 David Faust <david.faust@oracle.com>
12328 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
12329 and BTF_KIND_FWD which do not use the size/type field at all.
12331 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
12333 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
12334 (active_insn_p): Ditto.
12335 (in_sequence_p): Ditto.
12336 (unshare_all_rtl): Change return type from int to void.
12337 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
12338 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
12339 and adjust function body accordingly.
12340 (mem_expr_equal_p): Ditto.
12341 (unshare_all_rtl): Change return type from int to void
12342 and adjust function body accordingly.
12343 (verify_rtx_sharing): Remove unneeded return.
12344 (active_insn_p): Change return type from int to bool
12345 and adjust function body accordingly.
12346 (in_sequence_p): Ditto.
12348 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
12350 * rtl.h (true_dependence): Change return type from int to bool.
12351 (canon_true_dependence): Ditto.
12352 (read_dependence): Ditto.
12353 (anti_dependence): Ditto.
12354 (canon_anti_dependence): Ditto.
12355 (output_dependence): Ditto.
12356 (canon_output_dependence): Ditto.
12357 (may_alias_p): Ditto.
12358 * alias.h (alias_sets_conflict_p): Ditto.
12359 (alias_sets_must_conflict_p): Ditto.
12360 (objects_must_conflict_p): Ditto.
12361 (nonoverlapping_memrefs_p): Ditto.
12362 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
12363 (record_set): Ditto.
12364 (base_alias_check): Ditto.
12365 (find_base_value): Ditto.
12366 (mems_in_disjoint_alias_sets_p): Ditto.
12367 (get_alias_set_entry): Ditto.
12368 (decl_for_component_ref): Ditto.
12369 (write_dependence_p): Ditto.
12370 (memory_modified_1): Ditto.
12371 (mems_in_disjoint_alias_set_p): Change return type from int to bool
12372 and adjust function body accordingly.
12373 (alias_sets_conflict_p): Ditto.
12374 (alias_sets_must_conflict_p): Ditto.
12375 (objects_must_conflict_p): Ditto.
12376 (rtx_equal_for_memref_p): Ditto.
12377 (base_alias_check): Ditto.
12378 (read_dependence): Ditto.
12379 (nonoverlapping_memrefs_p): Ditto.
12380 (true_dependence_1): Ditto.
12381 (true_dependence): Ditto.
12382 (canon_true_dependence): Ditto.
12383 (write_dependence_p): Ditto.
12384 (anti_dependence): Ditto.
12385 (canon_anti_dependence): Ditto.
12386 (output_dependence): Ditto.
12387 (canon_output_dependence): Ditto.
12388 (may_alias_p): Ditto.
12389 (init_alias_analysis): Change "changed" variable to bool.
12391 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12393 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
12394 expand into define_insn_and_split.
12396 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12398 * config/riscv/vector.md: Remove FRM.
12400 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12402 * config/riscv/vector.md: Remove FRM.
12404 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12406 * config/riscv/vector.md: Remove FRM.
12408 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
12411 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
12414 2023-05-31 Richard Biener <rguenther@suse.de>
12417 PR tree-optimization/109143
12418 * tree-ssa-structalias.cc (struct topo_info): Remove.
12419 (init_topo_info): Likewise.
12420 (free_topo_info): Likewise.
12421 (compute_topo_order): Simplify API, put the component
12422 with ESCAPED last so it's processed first.
12423 (topo_visit): Adjust.
12424 (solve_graph): Likewise.
12426 2023-05-31 Richard Biener <rguenther@suse.de>
12428 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
12430 (add_graph_edge): Count redundant edges we avoid to create.
12431 (dump_sa_stats): Dump them.
12432 (ipa_pta_execute): Do not dump generating constraints when
12433 we are not dumping them.
12435 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12437 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
12438 output template to avoid explicit switch on which_alternative.
12439 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
12440 (and<mode>3): Likewise.
12441 (ior<mode>3): Likewise.
12442 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
12444 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12446 * config/xtensa/predicates.md (xtensa_bit_join_operator):
12448 * config/xtensa/xtensa.md (ior_op): Remove.
12449 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
12450 insn_and_split pattern of the same name to express and capture
12451 the bit-combining operation with both sides swapped.
12452 In addition, replace use of code iterator with new operator
12454 (*shlrd_const, *shlrd_per_byte):
12455 Likewise regarding the code iterator.
12457 2023-05-31 Cui, Lili <lili.cui@intel.com>
12459 PR tree-optimization/110038
12460 * params.opt: Add a limit on tree-reassoc-width.
12461 * tree-ssa-reassoc.cc
12462 (rewrite_expr_tree_parallel): Add width limit.
12464 2023-05-31 Pan Li <pan2.li@intel.com>
12466 * common/config/riscv/riscv-common.cc:
12467 (riscv_implied_info): Add zvfh item.
12468 (riscv_ext_version_table): Ditto.
12469 (riscv_ext_flag_table): Ditto.
12470 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
12471 (TARGET_ZVFH): Ditto.
12473 2023-05-30 liuhongt <hongtao.liu@intel.com>
12475 PR tree-optimization/108804
12476 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
12477 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
12478 Add new parameter narrow_src_p.
12479 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
12480 vectorization by truncating to lower precision.
12481 * tree-vectorizer.h (vect_get_range_info): New declare.
12483 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
12485 * lra-int.h (lra_update_sp_offset): Add the prototype.
12486 * lra.cc (setup_sp_offset): Change the return type. Use
12487 lra_update_sp_offset.
12488 * lra-eliminations.cc (lra_update_sp_offset): New function.
12489 (lra_process_new_insns): Push the current insn to reprocess if the
12490 input reload changes sp offset.
12492 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
12495 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
12496 Fix misleading identation.
12498 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
12500 * rtl.h (comparison_dominates_p): Change return type from int to bool.
12501 (condjump_p): Ditto.
12502 (any_condjump_p): Ditto.
12503 (any_uncondjump_p): Ditto.
12504 (simplejump_p): Ditto.
12505 (returnjump_p): Ditto.
12506 (eh_returnjump_p): Ditto.
12507 (onlyjump_p): Ditto.
12508 (invert_jump_1): Ditto.
12509 (invert_jump): Ditto.
12510 (rtx_renumbered_equal_p): Ditto.
12511 (redirect_jump_1): Ditto.
12512 (redirect_jump): Ditto.
12513 (condjump_in_parallel_p): Ditto.
12514 * jump.cc (invert_exp_1): Adjust forward declaration.
12515 (comparison_dominates_p): Change return type from int to bool
12516 and adjust function body accordingly.
12517 (simplejump_p): Ditto.
12518 (condjump_p): Ditto.
12519 (condjump_in_parallel_p): Ditto.
12520 (any_uncondjump_p): Ditto.
12521 (any_condjump_p): Ditto.
12522 (returnjump_p): Ditto.
12523 (eh_returnjump_p): Ditto.
12524 (onlyjump_p): Ditto.
12525 (redirect_jump_1): Ditto.
12526 (redirect_jump): Ditto.
12527 (invert_exp_1): Ditto.
12528 (invert_jump_1): Ditto.
12529 (invert_jump): Ditto.
12530 (rtx_renumbered_equal_p): Ditto.
12532 2023-05-30 Andrew Pinski <apinski@marvell.com>
12534 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
12535 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
12536 Add ne as a possible cmp.
12537 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
12539 2023-05-30 Andrew Pinski <apinski@marvell.com>
12541 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
12544 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
12546 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
12547 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
12548 (and (extend X) C) as (zero_extend (and X C)), to also optimize
12549 modes wider than HOST_WIDE_INT.
12551 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
12554 * simplify-rtx.cc (simplify_const_relational_operation): Return
12555 early if we have a MODE_CC comparison that isn't a COMPARE against
12558 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
12560 * config/riscv/riscv.cc (riscv_const_insns): Allow
12561 const_vec_duplicates.
12563 2023-05-30 liuhongt <hongtao.liu@intel.com>
12565 PR middle-end/108938
12566 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
12567 function, cut from original find_bswap_or_nop function.
12568 (find_bswap_or_nop): Add a new parameter, detect bswap +
12569 rotate and save rotate result in the new parameter.
12570 (bswap_replace): Add a new parameter to indicate rotate and
12571 generate rotate stmt if needed.
12572 (maybe_optimize_vector_constructor): Adjust for new rotate
12573 parameter in the upper 2 functions.
12574 (pass_optimize_bswap::execute): Ditto.
12575 (imm_store_chain_info::output_merged_store): Ditto.
12577 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12579 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
12580 (aarch64_<su>adalp<mode>): New define_expand.
12581 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
12582 (aarch64_<su>addlp<mode>): Convert to define_expand.
12583 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
12584 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
12586 (USADDLP): Likewise.
12587 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
12589 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12591 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
12592 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
12593 srhadd, urhadd builtin codes for standard optab ones.
12594 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
12595 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
12597 (<u>avg<mode>3_ceil): Rename to...
12598 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
12600 (aarch64_<su>hsub<mode>): New define_expand.
12601 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
12602 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
12603 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
12605 2023-05-30 Andreas Schwab <schwab@suse.de>
12608 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
12609 match libsanitizer.
12611 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12613 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
12614 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
12616 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
12617 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
12618 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
12619 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
12620 (aarch64_<sra_op>sra_n<mode>): New define_expand.
12621 (aarch64_<sra_op>rsra_n<mode>): Likewise.
12622 (aarch64_<sur>sra_n<mode>): Rename to...
12623 (aarch64_<sur>sra_ndi): ... This.
12624 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
12625 any_target_p argument.
12626 (aarch64_extract_vec_duplicate_wide_int): Define.
12627 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
12628 (aarch64_const_vec_rnd_cst_p): Likewise.
12629 (aarch64_vector_mode_supported_any_target_p): Likewise.
12630 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
12631 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
12632 (VSRA): Adjust for the above.
12634 (V2XWIDE): New mode_attr.
12635 (vec_or_offset): Likewise.
12636 (SHIFTEXTEND): Likewise.
12637 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
12639 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
12640 clarify that it applies to current target options.
12641 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
12642 * doc/tm.texi.in: Regenerate.
12643 * stor-layout.cc (mode_for_vector): Check
12644 vector_mode_supported_any_target_p when iterating through vector modes.
12645 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
12646 clarify that it applies to current target options.
12647 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
12649 2023-05-30 Lili Cui <lili.cui@intel.com>
12651 PR tree-optimization/98350
12652 * tree-ssa-reassoc.cc
12653 (rewrite_expr_tree_parallel): Rewrite this function.
12654 (rank_ops_for_fma): New.
12655 (reassociate_bb): Handle new function.
12657 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
12659 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
12660 (rtx_unstable_p): Ditto.
12661 (reg_mentioned_p): Ditto.
12662 (reg_referenced_p): Ditto.
12663 (reg_used_between_p): Ditto.
12664 (reg_set_between_p): Ditto.
12665 (modified_between_p): Ditto.
12666 (no_labels_between_p): Ditto.
12667 (modified_in_p): Ditto.
12668 (reg_set_p): Ditto.
12669 (multiple_sets): Ditto.
12670 (set_noop_p): Ditto.
12671 (noop_move_p): Ditto.
12672 (reg_overlap_mentioned_p): Ditto.
12673 (dead_or_set_p): Ditto.
12674 (dead_or_set_regno_p): Ditto.
12675 (find_reg_fusage): Ditto.
12676 (find_regno_fusage): Ditto.
12677 (side_effects_p): Ditto.
12678 (volatile_refs_p): Ditto.
12679 (volatile_insn_p): Ditto.
12680 (may_trap_p_1): Ditto.
12681 (may_trap_p): Ditto.
12682 (may_trap_or_fault_p): Ditto.
12683 (computed_jump_p): Ditto.
12684 (auto_inc_p): Ditto.
12685 (loc_mentioned_in_p): Ditto.
12686 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
12687 (rtx_unstable_p): Change return type from int to bool
12688 and adjust function body accordingly.
12689 (rtx_addr_can_trap_p): Ditto.
12690 (reg_mentioned_p): Ditto.
12691 (no_labels_between_p): Ditto.
12692 (reg_used_between_p): Ditto.
12693 (reg_referenced_p): Ditto.
12694 (reg_set_between_p): Ditto.
12695 (reg_set_p): Ditto.
12696 (modified_between_p): Ditto.
12697 (modified_in_p): Ditto.
12698 (multiple_sets): Ditto.
12699 (set_noop_p): Ditto.
12700 (noop_move_p): Ditto.
12701 (reg_overlap_mentioned_p): Ditto.
12702 (dead_or_set_p): Ditto.
12703 (dead_or_set_regno_p): Ditto.
12704 (find_reg_fusage): Ditto.
12705 (find_regno_fusage): Ditto.
12706 (remove_node_from_insn_list): Ditto.
12707 (volatile_insn_p): Ditto.
12708 (volatile_refs_p): Ditto.
12709 (side_effects_p): Ditto.
12710 (may_trap_p_1): Ditto.
12711 (may_trap_p): Ditto.
12712 (may_trap_or_fault_p): Ditto.
12713 (computed_jump_p): Ditto.
12714 (auto_inc_p): Ditto.
12715 (loc_mentioned_in_p): Ditto.
12716 * combine.cc (can_combine_p): Update indirect function.
12718 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12720 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
12721 * config/riscv/iterators.md: New attribute.
12722 * config/riscv/vector-iterators.md: New attribute.
12724 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
12726 * config/riscv/riscv.md: Fix signed and unsigned comparison
12729 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12731 * config/riscv/autovec.md (fnma<mode>4): New pattern.
12732 (*fnma<mode>): Ditto.
12734 2023-05-29 Die Li <lidie@eswincomputing.com>
12736 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
12738 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
12739 process for TARGET_XTHEADCONDMOV
12741 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
12744 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
12745 TARGET_AVX512BW to generate truncv16hiv16qi2.
12747 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
12749 * config/riscv/riscv.md (and<mode>3): New expander.
12750 (*and<mode>3) New pattern.
12751 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
12754 2023-05-29 Pan Li <pan2.li@intel.com>
12756 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
12757 comments and rename local variables.
12758 (emit_nonvlmax_insn): Diito.
12759 (emit_vlmax_merge_insn): Ditto.
12760 (emit_vlmax_cmp_insn): Ditto.
12761 (emit_vlmax_cmp_mu_insn): Ditto.
12762 (emit_scalar_move_insn): Ditto.
12764 2023-05-29 Pan Li <pan2.li@intel.com>
12766 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
12768 (emit_nonvlmax_insn): Ditto.
12769 (emit_vlmax_merge_insn): Ditto.
12770 (emit_vlmax_cmp_insn): Ditto.
12771 (emit_vlmax_cmp_mu_insn): Ditto.
12772 (expand_vec_series): Ditto.
12774 2023-05-29 Pan Li <pan2.li@intel.com>
12776 * config/riscv/riscv-protos.h (enum insn_type): New type.
12777 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
12778 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
12780 (rvv_builder::get_merged_repeating_sequence): Ditto.
12781 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
12782 to evaluate the optimization cost.
12783 (rvv_builder::get_merge_scalar_mask): New function to get the merge
12785 (emit_scalar_move_insn): New function to emit vmv.s.x.
12786 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
12787 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
12789 (get_repeating_sequence_dup_machine_mode): New function to get the dup
12791 (expand_vector_init_merge_repeating_sequence): New function to perform
12793 (expand_vec_init): Add this vector init optimization.
12794 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
12796 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
12798 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
12799 put onto the increment when it is inserted after the position.
12801 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
12803 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
12806 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12808 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
12810 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12812 * config/riscv/autovec.md (fma<mode>4): New pattern.
12813 (*fma<mode>): Ditto.
12814 * config/riscv/riscv-protos.h (enum insn_type): New enum.
12815 (emit_vlmax_ternary_insn): New function.
12816 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
12818 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12820 * config/riscv/vector.md: Fix vimuladd instruction bug.
12822 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12824 * config/riscv/riscv.cc (global_state_unknown_p): New function.
12825 (riscv_mode_after): Fix incorrect VXM.
12827 2023-05-29 Pan Li <pan2.li@intel.com>
12829 * common/config/riscv/riscv-common.cc:
12830 (riscv_implied_info): Add zvfhmin item.
12831 (riscv_ext_version_table): Ditto.
12832 (riscv_ext_flag_table): Ditto.
12833 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
12834 (TARGET_ZFHMIN): Align indent.
12835 (TARGET_ZFH): Ditto.
12836 (TARGET_ZVFHMIN): New macro.
12838 2023-05-27 liuhongt <hongtao.liu@intel.com>
12841 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
12842 to VI_AVX2 to cover more modes.
12844 2023-05-27 liuhongt <hongtao.liu@intel.com>
12846 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
12847 Remove ATOM and ICELAKE(and later) core processors.
12849 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
12851 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
12853 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
12855 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
12858 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
12859 Juzhe Zhong <juzhe.zhong@rivai.ai>
12861 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
12863 (<optab><v_quad_trunc><mode>2): Dito.
12864 (<optab><v_oct_trunc><mode>2): Dito.
12865 (trunc<mode><v_double_trunc>2): Dito.
12866 (trunc<mode><v_quad_trunc>2): Dito.
12867 (trunc<mode><v_oct_trunc>2): Dito.
12868 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
12869 (autovectorize_vector_modes): Define.
12870 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
12872 (autovectorize_vector_modes): Implement hook.
12873 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
12874 Implement target hook.
12875 (riscv_vectorize_related_mode): Implement target hook.
12876 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
12877 (TARGET_VECTORIZE_RELATED_MODE): Define.
12878 * config/riscv/vector-iterators.md: Add lowercase versions of
12879 mode_attr iterators.
12881 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
12882 Tobias Burnus <tobias@codesourcery.com>
12884 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
12885 (ASM_SPEC): Use XNACKOPT.
12886 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
12887 (enum hsaco_attr_type): ... this, and generalize the names.
12888 (TARGET_XNACK): New macro.
12889 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
12891 (output_file_start): Update xnack handling.
12892 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
12893 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
12894 (sram_ecc_type): Rename to ...
12895 (hsaco_attr_type: ... this.)
12896 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
12897 (TEST_XNACK): Delete.
12898 (TEST_XNACK_ANY): New macro.
12899 (TEST_XNACK_ON): New macro.
12900 (main): Support the new -mxnack=on/off/any syntax.
12901 * doc/invoke.texi (-mxnack): Update for new syntax.
12903 2023-05-26 Andrew Pinski <apinski@marvell.com>
12905 * genmatch.cc (emit_debug_printf): New function.
12906 (dt_simplify::gen_1): Emit printf into the code
12907 before the `return true` or returning the folded result
12908 instead of emitting it always.
12910 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12912 * config/xtensa/xtensa-protos.h
12913 (xtensa_expand_block_set_unrolled_loop,
12914 xtensa_expand_block_set_small_loop): Remove.
12915 (xtensa_expand_block_set): New prototype.
12916 * config/xtensa/xtensa.cc
12917 (xtensa_expand_block_set_libcall): New subfunction.
12918 (xtensa_expand_block_set_unrolled_loop,
12919 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
12920 (xtensa_expand_block_set): New function that calls the above
12922 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
12923 xtensa_expand_block_set().
12925 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12927 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
12929 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
12931 * config/xtensa/constraints.md (O):
12932 Change to use the above function.
12933 * config/xtensa/xtensa.md (*subsi3_from_const):
12934 New insn_and_split pattern.
12936 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12938 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
12939 Retract excessive line folding, and correct the value of
12940 the "length" insn attribute related to TARGET_DENSITY.
12941 (*extzvsi-1bit_addsubx): Ditto.
12943 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
12945 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
12946 Do not disable call to ix86_expand_vecop_qihi2.
12948 2023-05-26 liuhongt <hongtao.liu@intel.com>
12952 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
12953 calculation when !hard_regno_mode_ok for GENERAL_REGS and
12954 mode, otherwise still use GENERAL_REGS.
12956 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12958 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
12959 explict VL and drop VL in ops.
12961 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
12963 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
12964 in different BB blocks.
12966 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
12968 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
12969 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
12970 instructions when available. Emulate truncation via
12971 ix86_expand_vec_perm_const_1 when native truncate insn
12973 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
12974 when available. Trivially rename some variables.
12975 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
12976 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
12977 calculation of V*QImode emulations to account for generation of
12978 2x-wider mode instructions.
12979 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
12980 emulations to account for generation of 2x-wider mode instructions.
12982 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
12985 * config/avr/avr.cc (avr_can_inline_p): New static function.
12986 (TARGET_CAN_INLINE_P): Define to that function.
12988 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
12991 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
12992 Handle any bit position and use mode QISI.
12993 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
12994 of 2 insns for bit-transfer of respective style.
12996 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
12998 * config/arm/iterators.md (MVE_6): Remove.
12999 * config/arm/mve.md: Replace MVE_6 with MVE_5.
13001 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13002 Richard Sandiford <richard.sandiford@arm.com>
13004 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
13006 (vect_set_loop_controls_directly): Add decrement IV support.
13007 (vect_set_loop_condition_partial_vectors): Ditto.
13008 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
13010 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
13013 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13016 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
13017 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
13018 Fix canonicalization of PLUS operands.
13019 (aarch64_fcmla<rot><mode>): Rename to...
13020 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
13021 Fix canonicalization of PLUS operands.
13022 (aarch64_fcmla_lane<rot><mode>): Rename to...
13023 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
13024 Fix canonicalization of PLUS operands.
13025 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
13026 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
13027 Fix canonicalization of PLUS operands.
13028 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
13030 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
13032 * config/arm/arm.md (rbitsi2): Rename to...
13033 (arm_rbit): ... This.
13034 (ctzsi2): Adjust for the above.
13035 (arm_rev16si2): Convert to define_expand.
13036 (arm_rev16si2_alt1): New pattern.
13037 (arm_rev16si2_alt): Rename to...
13038 (*arm_rev16si2_alt2): ... This.
13039 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
13040 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
13041 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
13042 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
13044 2023-05-25 Alex Coplan <alex.coplan@arm.com>
13047 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
13049 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
13050 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
13051 DFmode as an rvalue.
13053 2023-05-25 Richard Biener <rguenther@suse.de>
13056 * tree-vect-stmts.cc (vectorizable_condition): For
13057 embedded comparisons also handle the case when the target
13058 only provides vec_cmp and vcond_mask.
13060 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
13062 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
13065 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13067 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
13068 (seq_cost_ignoring_scalar_moves): Likewise.
13069 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
13071 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13073 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
13074 (vcage_f32): Likewise.
13075 (vcages_f32): Likewise.
13076 (vcageq_f32): Likewise.
13077 (vcaged_f64): Likewise.
13078 (vcageq_f64): Likewise.
13079 (vcagts_f32): Likewise.
13080 (vcagt_f32): Likewise.
13081 (vcagt_f64): Likewise.
13082 (vcagtq_f32): Likewise.
13083 (vcagtd_f64): Likewise.
13084 (vcagtq_f64): Likewise.
13085 (vcale_f32): Likewise.
13086 (vcale_f64): Likewise.
13087 (vcaled_f64): Likewise.
13088 (vcales_f32): Likewise.
13089 (vcaleq_f32): Likewise.
13090 (vcaleq_f64): Likewise.
13091 (vcalt_f32): Likewise.
13092 (vcalt_f64): Likewise.
13093 (vcaltd_f64): Likewise.
13094 (vcaltq_f32): Likewise.
13095 (vcaltq_f64): Likewise.
13096 (vcalts_f32): Likewise.
13098 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
13102 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
13103 int to const int or const int to const unsigned int.
13104 (_mm512_mask_srli_epi16): Ditto.
13105 (_mm512_slli_epi16): Ditto.
13106 (_mm512_mask_slli_epi16): Ditto.
13107 (_mm512_maskz_slli_epi16): Ditto.
13108 (_mm512_srai_epi16): Ditto.
13109 (_mm512_mask_srai_epi16): Ditto.
13110 (_mm512_maskz_srai_epi16): Ditto.
13111 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
13112 (_mm512_mask_slli_epi64): Ditto.
13113 (_mm512_maskz_slli_epi64): Ditto.
13114 (_mm512_srli_epi64): Ditto.
13115 (_mm512_mask_srli_epi64): Ditto.
13116 (_mm512_maskz_srli_epi64): Ditto.
13117 (_mm512_srai_epi64): Ditto.
13118 (_mm512_mask_srai_epi64): Ditto.
13119 (_mm512_maskz_srai_epi64): Ditto.
13120 (_mm512_slli_epi32): Ditto.
13121 (_mm512_mask_slli_epi32): Ditto.
13122 (_mm512_maskz_slli_epi32): Ditto.
13123 (_mm512_srli_epi32): Ditto.
13124 (_mm512_mask_srli_epi32): Ditto.
13125 (_mm512_maskz_srli_epi32): Ditto.
13126 (_mm512_srai_epi32): Ditto.
13127 (_mm512_mask_srai_epi32): Ditto.
13128 (_mm512_maskz_srai_epi32): Ditto.
13129 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
13130 (_mm256_maskz_srai_epi16): Ditto.
13131 (_mm_mask_srai_epi16): Ditto.
13132 (_mm_maskz_srai_epi16): Ditto.
13133 (_mm256_mask_slli_epi16): Ditto.
13134 (_mm256_maskz_slli_epi16): Ditto.
13135 (_mm_mask_slli_epi16): Ditto.
13136 (_mm_maskz_slli_epi16): Ditto.
13137 (_mm_maskz_srli_epi16): Ditto.
13138 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
13139 (_mm256_maskz_srli_epi32): Ditto.
13140 (_mm_mask_srli_epi32): Ditto.
13141 (_mm_maskz_srli_epi32): Ditto.
13142 (_mm256_mask_srli_epi64): Ditto.
13143 (_mm256_maskz_srli_epi64): Ditto.
13144 (_mm_mask_srli_epi64): Ditto.
13145 (_mm_maskz_srli_epi64): Ditto.
13146 (_mm256_mask_srai_epi32): Ditto.
13147 (_mm256_maskz_srai_epi32): Ditto.
13148 (_mm_mask_srai_epi32): Ditto.
13149 (_mm_maskz_srai_epi32): Ditto.
13150 (_mm256_srai_epi64): Ditto.
13151 (_mm256_mask_srai_epi64): Ditto.
13152 (_mm256_maskz_srai_epi64): Ditto.
13153 (_mm_srai_epi64): Ditto.
13154 (_mm_mask_srai_epi64): Ditto.
13155 (_mm_maskz_srai_epi64): Ditto.
13156 (_mm_mask_slli_epi32): Ditto.
13157 (_mm_maskz_slli_epi32): Ditto.
13158 (_mm_mask_slli_epi64): Ditto.
13159 (_mm_maskz_slli_epi64): Ditto.
13160 (_mm256_mask_slli_epi32): Ditto.
13161 (_mm256_maskz_slli_epi32): Ditto.
13162 (_mm256_mask_slli_epi64): Ditto.
13163 (_mm256_maskz_slli_epi64): Ditto.
13165 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13167 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
13170 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
13172 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
13173 * data-streamer-out.cc (streamer_write_vrange): Same.
13174 * value-range.h (class vrange): Make streamer_write_vrange a friend.
13176 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
13178 * value-query.cc (range_query::get_tree_range): Set NAN directly
13180 * value-range.cc (frange::set): Assert that bounds are not NAN.
13182 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
13184 * value-range.cc (add_vrange): Handle known NANs.
13186 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
13188 * value-range.h (frange::set_nan): New.
13190 2023-05-25 Alexandre Oliva <oliva@adacore.com>
13193 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
13194 requires stricter alignment than MEM's.
13196 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
13198 PR tree-optimization/107822
13199 PR tree-optimization/107986
13200 * Makefile.in (OBJS): Add gimple-range-phi.o.
13201 * gimple-range-cache.h (ranger_cache::m_estimate): New
13202 phi_analyzer pointer member.
13203 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
13204 phi_analyzer if no loop info is available.
13205 * gimple-range-phi.cc: New file.
13206 * gimple-range-phi.h: New file.
13207 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
13209 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
13211 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
13213 (fold_range): Add range_query parameter.
13214 (fur_relation::fur_relation): New.
13215 (fur_relation::trio): New.
13216 (fur_relation::register_relation): New.
13217 (fold_relations): New.
13218 * gimple-range-fold.h (fold_range): Adjust prototypes.
13219 (fold_relations): New.
13221 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
13223 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
13224 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
13225 (ranger_cache::const_query): New.
13226 * gimple-range.cc (gimple_ranger::const_query): New.
13227 * gimple-range.h (gimple_ranger::const_query): New prototype.
13229 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
13231 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
13232 (ssa_cache::dump_range_query): Delete.
13233 (ssa_lazy_cache::dump_range_query): Delete.
13234 (ssa_lazy_cache::get_range): Move from header file.
13235 (ssa_lazy_cache::clear_range): ditto.
13236 (ssa_lazy_cache::clear): Ditto.
13237 * gimple-range-cache.h (class ssa_cache): Virtualize.
13238 (class ssa_lazy_cache): Inherit and virtualize.
13240 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
13242 * value-range.h (vrange::kind): Remove.
13244 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
13246 PR middle-end/109840
13247 * match.pd <popcount optimizations>: Preserve zero-extension when
13248 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
13249 popcount((T)x), so the popcount's argument keeps the same type.
13250 <parity optimizations>: Likewise preserve extensions when
13251 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
13252 parity((T)x), so that the parity's argument type is the same.
13254 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
13256 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
13257 (ipcp_store_vr_results): Same.
13258 * ipa-prop.cc (ipa_vr::ipa_vr): New.
13259 (ipa_vr::get_vrange): New.
13260 (ipa_vr::set_unknown): New.
13261 (ipa_vr::streamer_read): New.
13262 (ipa_vr::streamer_write): New.
13263 (write_ipcp_transformation_info): Use new ipa_vr API.
13264 (read_ipcp_transformation_info): Same.
13265 (ipa_vr::nonzero_p): Delete.
13266 (ipcp_update_vr): Use new ipa_vr API.
13267 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
13268 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
13270 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
13272 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
13273 silence overflow warnings later on.
13275 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
13277 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
13278 Remove handling of V8QImode.
13279 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
13280 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
13281 (v<insn>v4qi3): Ditto.
13282 * config/i386/sse.md (v<insn>v8qi3): Remove.
13284 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13287 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
13288 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
13289 (aarch64_simd_ashr<mode>): Rename to...
13290 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
13291 (aarch64_simd_imm_shl<mode>): Rename to...
13292 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
13293 (aarch64_simd_reg_sshl<mode>): Rename to...
13294 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
13295 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
13296 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
13297 (aarch64_simd_reg_shl<mode>_signed): Rename to...
13298 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
13299 (vec_shr_<mode>): Rename to...
13300 (vec_shr_<mode><vczle><vczbe>): ... This.
13301 (aarch64_<sur>shl<mode>): Rename to...
13302 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
13303 (aarch64_<sur>q<r>shl<mode>): Rename to...
13304 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
13306 2023-05-24 Richard Biener <rguenther@suse.de>
13309 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
13310 Perform final vector composition using
13311 ix86_expand_vector_init_general instead of setting
13312 the highpart and lowpart which causes spilling.
13314 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
13316 PR tree-optimization/109695
13317 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
13319 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
13320 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
13321 flag to set_global_range.
13322 (gimple_ranger::prefill_stmt_dependencies): Ditto.
13324 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
13326 PR tree-optimization/109695
13327 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
13329 (temporal_cache::current_p): Check always_current method.
13330 (temporal_cache::set_always_current): Add param and set value
13332 (temporal_cache::always_current_p): New.
13333 (ranger_cache::get_global_range): Adjust.
13334 (ranger_cache::set_global_range): set always current first.
13336 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
13338 PR tree-optimization/109695
13339 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
13340 fold_range with global query to choose an initial value.
13342 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13344 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
13347 2023-05-24 Richard Biener <rguenther@suse.de>
13349 PR tree-optimization/109849
13350 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
13351 expressions but take the first sets.
13353 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
13356 * doc/gm2.texi (High procedure function): New node.
13357 (Using): New menu entry for High procedure function.
13359 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
13361 PR rtl-optimization/109940
13362 * early-remat.cc (postorder_index): Rename to...
13363 (rpo_index): ...this.
13364 (compare_candidates): Sort by decreasing rpo_index rather than
13365 increasing postorder_index.
13366 (early_remat::sort_candidates): Calculate the forward RPO from
13368 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
13369 rather than DF_BACKWARD in reverse.
13371 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13374 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
13375 qualifier_none for the return operand.
13377 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13379 * config/riscv/autovec.md (<optab><mode>3): New pattern.
13380 (one_cmpl<mode>2): Ditto.
13381 (*<optab>not<mode>): Ditto.
13382 (*n<optab><mode>): Ditto.
13383 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
13386 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
13388 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
13389 calculation on n_perms by considering nvectors_per_build.
13391 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13392 Richard Sandiford <richard.sandiford@arm.com>
13394 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
13395 (vec_cmp<mode><vm>): New pattern.
13396 (vec_cmpu<mode><vm>): New pattern.
13397 (vcond<V:mode><VI:mode>): New pattern.
13398 (vcondu<V:mode><VI:mode>): New pattern.
13399 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
13400 (emit_vlmax_merge_insn): New function.
13401 (emit_vlmax_cmp_insn): Ditto.
13402 (emit_vlmax_cmp_mu_insn): Ditto.
13403 (expand_vec_cmp): Ditto.
13404 (expand_vec_cmp_float): Ditto.
13405 (expand_vcond): Ditto.
13406 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
13407 (emit_vlmax_cmp_insn): Ditto.
13408 (emit_vlmax_cmp_mu_insn): Ditto.
13409 (get_cmp_insn_code): Ditto.
13410 (expand_vec_cmp): Ditto.
13411 (expand_vec_cmp_float): Ditto.
13412 (expand_vcond): Ditto.
13414 2023-05-24 Pan Li <pan2.li@intel.com>
13416 * config/riscv/genrvv-type-indexer.cc (main): Add
13417 unsigned_eew*_lmul1_interpret for indexer.
13418 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
13419 Register vuint*m1_t interpret function.
13420 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
13421 New macro for vuint8m1_t.
13422 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
13423 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
13424 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
13425 (vbool1_t): Add to unsigned_eew*_interpret_ops.
13426 (vbool2_t): Likewise.
13427 (vbool4_t): Likewise.
13428 (vbool8_t): Likewise.
13429 (vbool16_t): Likewise.
13430 (vbool32_t): Likewise.
13431 (vbool64_t): Likewise.
13432 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
13433 New macro for vuint*m1_t.
13434 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
13435 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
13436 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
13437 (required_extensions_p): Add vuint*m1_t interpret case.
13438 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
13439 Add vuint*m1_t interpret to base type.
13440 (unsigned_eew16_lmul1_interpret): Likewise.
13441 (unsigned_eew32_lmul1_interpret): Likewise.
13442 (unsigned_eew64_lmul1_interpret): Likewise.
13444 2023-05-24 Pan Li <pan2.li@intel.com>
13446 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
13447 for the eew size list.
13448 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
13449 (main): Add signed_eew*_lmul1_interpret for indexer.
13450 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
13451 Register vint*m1_t interpret function.
13452 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
13453 New macro for vint8m1_t.
13454 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
13455 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
13456 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
13457 (vbool1_t): Add to signed_eew*_interpret_ops.
13458 (vbool2_t): Likewise.
13459 (vbool4_t): Likewise.
13460 (vbool8_t): Likewise.
13461 (vbool16_t): Likewise.
13462 (vbool32_t): Likewise.
13463 (vbool64_t): Likewise.
13464 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
13465 New macro for vint*m1_t.
13466 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
13467 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
13468 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
13469 (required_extensions_p): Add vint8m1_t interpret case.
13470 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
13471 Add vint*m1_t interpret to base type.
13472 (signed_eew16_lmul1_interpret): Likewise.
13473 (signed_eew32_lmul1_interpret): Likewise.
13474 (signed_eew64_lmul1_interpret): Likewise.
13476 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13478 * config/riscv/autovec.md: Adjust for new interface.
13479 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
13480 (emit_nonvlmax_insn): Add AVL operand.
13481 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
13482 (emit_nonvlmax_insn): Add AVL operand.
13483 (sew64_scalar_helper): Adjust for new interface.
13484 (expand_tuple_move): Ditto.
13485 * config/riscv/vector.md: Ditto.
13487 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13489 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
13490 (expand_const_vector): Ditto.
13491 (legitimize_move): Ditto.
13492 (sew64_scalar_helper): Ditto.
13493 (expand_tuple_move): Ditto.
13494 (expand_vector_init_insert_elems): Ditto.
13495 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
13497 2023-05-24 liuhongt <hongtao.liu@intel.com>
13500 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
13501 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
13502 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
13503 (ix86_masked_all_ones): Handle 64-bit mask.
13504 * config/i386/i386-builtin.def: Replace icode of related
13505 non-mask simd abs builtins with CODE_FOR_nothing.
13507 2023-05-23 Martin Uecker <uecker@tugraz.at>
13510 * function.cc (gimplify_parm_type): Remove function.
13511 (gimplify_parameters): Call gimplify_type_sizes.
13513 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
13515 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
13516 and change to also accept '*subx' pattern.
13519 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
13521 * config/xtensa/predicates.md (addsub_operator): New.
13522 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
13523 *extzvsi-1bit_addsubx): New insn_and_split patterns.
13524 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
13525 Add a special case about ifcvt 'noce_try_cmove()' to handle
13526 constant loads that do not fit into signed 12 bits in the
13527 patterns added above.
13529 2023-05-23 Richard Biener <rguenther@suse.de>
13531 PR tree-optimization/109747
13532 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
13533 the SLP node only once to the cost hook.
13535 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
13537 * config/avr/avr.cc (avr_insn_cost): New static function.
13538 (TARGET_INSN_COST): Define to that function.
13540 2023-05-23 Richard Biener <rguenther@suse.de>
13543 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
13544 For vector construction or splats apply GPR->XMM move
13545 costing. QImode memory can be handled directly only
13546 with SSE4.1 pinsrb.
13548 2023-05-23 Richard Biener <rguenther@suse.de>
13550 PR tree-optimization/108752
13551 * tree-vect-stmts.cc (vectorizable_operation): For bit
13552 operations with generic word_mode vectors do not cost
13553 an extra stmt. For plus, minus and negate also cost the
13554 constant materialization.
13556 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
13558 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
13559 Call ix86_expand_vec_shift_qihi_constant for shifts
13560 with constant count operand.
13561 * config/i386/i386.cc (ix86_shift_rotate_cost):
13562 Handle V4QImode and V8QImode.
13563 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
13564 (<insn>v4qi3): Ditto.
13566 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13568 * config/riscv/vector.md: Add mode.
13570 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
13572 PR tree-optimization/109934
13573 * value-range.cc (irange::invert): Remove buggy special case.
13575 2023-05-23 Richard Biener <rguenther@suse.de>
13577 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
13580 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
13583 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
13584 subregs between any scalars that are 64 bits or smaller.
13585 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
13586 (bits_etype): New int attribute.
13587 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
13588 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
13589 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
13591 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
13593 * doc/md.texi: Document that <FOO> can be used to refer to the
13594 numerical value of an int iterator FOO. Tweak other parts of
13595 the int iterator documentation.
13596 * read-rtl.cc (iterator_group::has_self_attr): New field.
13597 (map_attr_string): When has_self_attr is true, make <FOO>
13598 expand to the current value of iterator FOO.
13599 (initialize_iterators): Set has_self_attr for int iterators.
13601 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13603 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
13604 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
13605 (RVV_UNOP_NUM): New macro.
13606 (RVV_BINOP_NUM): Ditto.
13607 (legitimize_move): Refactor the framework of RVV auto-vectorization.
13608 (emit_vlmax_op): Ditto.
13609 (emit_vlmax_reg_op): Ditto.
13610 (emit_len_op): Ditto.
13611 (emit_len_binop): Ditto.
13612 (emit_vlmax_tany_many): Ditto.
13613 (emit_nonvlmax_tany_many): Ditto.
13614 (sew64_scalar_helper): Ditto.
13615 (expand_tuple_move): Ditto.
13616 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
13617 (emit_pred_binop): Ditto.
13618 (emit_vlmax_op): Ditto.
13619 (emit_vlmax_tany_many): New function.
13620 (emit_len_op): Remove.
13621 (emit_nonvlmax_tany_many): New function.
13622 (emit_vlmax_reg_op): Remove.
13623 (emit_len_binop): Ditto.
13624 (emit_index_op): Ditto.
13625 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
13626 (expand_const_vector): Ditto.
13627 (legitimize_move): Ditto.
13628 (sew64_scalar_helper): Ditto.
13629 (expand_tuple_move): Ditto.
13630 (expand_vector_init_insert_elems): Ditto.
13631 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
13632 * config/riscv/vector.md: Ditto.
13634 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13637 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
13638 and constraint for operand 0.
13639 (add_vec_concat_subst_be): Likewise.
13641 2023-05-23 Richard Biener <rguenther@suse.de>
13643 PR tree-optimization/109849
13644 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
13645 and use that to determine what to hoist.
13647 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
13649 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
13650 specific treatment for bit-fields only if they have an integral type
13651 and filter out non-integral bit-fields that do not start and end on
13654 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
13656 PR tree-optimization/109920
13657 * value-range.h (RESIZABLE>::~int_range): Use delete[].
13659 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
13661 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
13662 calcuation of integer vector mode costs to reflect generated
13663 instruction sequences of different integer vector modes and
13664 different target ABIs. Remove "speed" function argument.
13665 (ix86_rtx_costs): Update call for removed function argument.
13666 (ix86_vector_costs::add_stmt_cost): Ditto.
13668 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
13670 * value-range.h (class Value_Range): Implement set_zero,
13671 set_nonzero, and nonzero_p.
13673 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
13675 * config/i386/i386.cc (ix86_multiplication_cost): Add
13676 the cost of a memory read to the cost of V?QImode sequences.
13678 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13680 * config/riscv/riscv-v.cc: Add "m_" prefix.
13682 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13684 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
13685 multiple-rgroup of length.
13686 * tree-vect-stmts.cc (vectorizable_store): Ditto.
13687 (vectorizable_load): Ditto.
13688 * tree-vectorizer.h (vect_get_loop_len): Ditto.
13690 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13692 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
13695 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
13697 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
13698 handling for the case index == count.
13700 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
13703 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
13704 Don't fold to XOR / AND / XOR if just one bit is copied to the
13707 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
13709 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
13710 builtin for bit reversal using brev instruction.
13711 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
13712 NVPTX_BUILTIN_BREVLL.
13713 (nvptx_init_builtins): Define "brev" and "brevll".
13714 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
13715 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
13716 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
13717 section, document __builtin_nvptx_brev{,ll}.
13719 2023-05-21 Jakub Jelinek <jakub@redhat.com>
13721 PR tree-optimization/109505
13722 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
13723 Combine successive equal operations with constants,
13724 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
13725 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
13728 2023-05-21 Andrew Pinski <apinski@marvell.com>
13730 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
13732 2023-05-21 Pan Li <pan2.li@intel.com>
13734 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
13735 rest bool size, aka 2, 4, 8, 16, 32, 64.
13736 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
13737 Register vbool[2|4|8|16|32|64] interpret function.
13738 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
13739 New macro for vbool2_t.
13740 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
13741 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
13742 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
13743 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
13744 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
13745 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
13746 (vint16m1_t): Likewise.
13747 (vint32m1_t): Likewise.
13748 (vint64m1_t): Likewise.
13749 (vuint8m1_t): Likewise.
13750 (vuint16m1_t): Likewise.
13751 (vuint32m1_t): Likewise.
13752 (vuint64m1_t): Likewise.
13753 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
13754 New macro for vbool2_t.
13755 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
13756 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
13757 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
13758 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
13759 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
13760 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
13761 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
13762 vbool2_t interprect to base type.
13763 (bool4_interpret): Likewise.
13764 (bool8_interpret): Likewise.
13765 (bool16_interpret): Likewise.
13766 (bool32_interpret): Likewise.
13767 (bool64_interpret): Likewise.
13769 2023-05-21 Andrew Pinski <apinski@marvell.com>
13771 PR middle-end/109919
13772 * expr.cc (expand_single_bit_test): Don't use the
13773 target for expand_expr.
13775 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
13777 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
13780 2023-05-20 Pan Li <pan2.li@intel.com>
13782 * mode-switching.cc (entity_map): Initialize the array to zero.
13785 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
13788 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
13789 Remove superfluous "parallel" in insn pattern.
13790 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
13791 printing error text to assembly.
13793 2023-05-20 Andrew Pinski <apinski@marvell.com>
13795 * expr.cc (fold_single_bit_test): Rename to ...
13796 (expand_single_bit_test): This and expand directly.
13797 (do_store_flag): Update for the rename function.
13799 2023-05-20 Andrew Pinski <apinski@marvell.com>
13801 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
13802 instead of shift/and.
13804 2023-05-20 Andrew Pinski <apinski@marvell.com>
13806 * expr.cc (fold_single_bit_test): Add an assert
13807 and simplify based on code being NE_EXPR or EQ_EXPR.
13809 2023-05-20 Andrew Pinski <apinski@marvell.com>
13811 * expr.cc (fold_single_bit_test): Take inner and bitnum
13812 instead of arg0 and arg1. Update the code.
13813 (do_store_flag): Don't create a tree when calling
13814 fold_single_bit_test instead just call it with the bitnum
13815 and the inner tree.
13817 2023-05-20 Andrew Pinski <apinski@marvell.com>
13819 * expr.cc (fold_single_bit_test): Use get_def_for_expr
13820 instead of checking the inner's code.
13822 2023-05-20 Andrew Pinski <apinski@marvell.com>
13824 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
13825 (fold_single_bit_test): This and simplify.
13827 2023-05-20 Andrew Pinski <apinski@marvell.com>
13829 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
13831 (fold_single_bit_test): Likewise.
13832 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
13833 (fold_single_bit_test): Likewise and make static.
13834 * fold-const.h (fold_single_bit_test): Remove declaration.
13836 2023-05-20 Die Li <lidie@eswincomputing.com>
13838 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
13841 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
13843 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
13845 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
13848 * config/riscv/bitmanip.md
13849 (<bitmanip_optab>disi2): Match with any_extend.
13850 (<bitmanip_optab>disi2_sext): New pattern to match
13851 with sign extend using an ANDI instruction.
13853 2023-05-19 Nathan Sidwell <nathan@acm.org>
13856 * opts.h (handle_deferred_dump_options): Declare.
13857 * opts-global.cc (handle_common_deferred_options): Do not handle
13859 (handle_deferred_dump_options): New.
13860 * toplev.cc (toplev::main): Call it after plugin init.
13862 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
13864 * config/riscv/constraints.md (DsS, DsD): Restore agreement
13865 with shiftm1 mode attribute.
13867 2023-05-19 Andrew Pinski <apinski@marvell.com>
13870 * gcc.cc (default_compilers["@c-header"]): Add %w
13871 after the --output-pch.
13873 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
13875 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
13876 to hival, ASHIFT the corresponding regs.
13878 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
13880 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
13882 2023-05-19 Jakub Jelinek <jakub@redhat.com>
13884 PR tree-optimization/105776
13885 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
13886 non-NULL, allow division statement to have a cast as single imm use
13887 rather than comparison/condition.
13888 (match_arith_overflow): In that case remove the cast stmt in addition
13889 to the division statement.
13891 2023-05-19 Jakub Jelinek <jakub@redhat.com>
13893 PR tree-optimization/101856
13894 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
13895 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
13896 support it but umul_highpart_optab does.
13898 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
13900 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
13901 of tree_to_shwi on array indices. Minor tweaks.
13903 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
13905 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
13906 * attribs.cc (diag_attr_exclusions): Ditto.
13907 (decl_attributes): Ditto.
13908 (build_type_attribute_qual_variant): Ditto.
13909 * builtins.cc (fold_builtin_carg): Ditto.
13910 (fold_builtin_next_arg): Ditto.
13911 (do_mpc_arg2): Ditto.
13912 * cfgexpand.cc (expand_return): Ditto.
13913 * cgraph.h (decl_in_symtab_p): Ditto.
13914 (symtab_node::get_create): Ditto.
13915 * dwarf2out.cc (base_type_die): Ditto.
13916 (implicit_ptr_descriptor): Ditto.
13917 (gen_array_type_die): Ditto.
13918 (gen_type_die_with_usage): Ditto.
13919 (optimize_location_into_implicit_ptr): Ditto.
13920 * expr.cc (do_store_flag): Ditto.
13921 * fold-const.cc (negate_expr_p): Ditto.
13922 (fold_negate_expr_1): Ditto.
13923 (fold_convert_const): Ditto.
13924 (fold_convert_loc): Ditto.
13925 (constant_boolean_node): Ditto.
13926 (fold_binary_op_with_conditional_arg): Ditto.
13927 (build_fold_addr_expr_with_type_loc): Ditto.
13928 (fold_comparison): Ditto.
13929 (fold_checksum_tree): Ditto.
13930 (tree_unary_nonnegative_warnv_p): Ditto.
13931 (integer_valued_real_unary_p): Ditto.
13932 (fold_read_from_constant_string): Ditto.
13933 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
13934 * gimple-expr.cc (useless_type_conversion_p): Ditto.
13935 (is_gimple_reg): Ditto.
13936 (is_gimple_asm_val): Ditto.
13937 (mark_addressable): Ditto.
13938 * gimple-expr.h (is_gimple_variable): Ditto.
13939 (virtual_operand_p): Ditto.
13940 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
13941 * gimplify.cc (gimplify_bind_expr): Ditto.
13942 (gimplify_return_expr): Ditto.
13943 (gimple_add_padding_init_for_auto_var): Ditto.
13944 (gimplify_addr_expr): Ditto.
13945 (omp_add_variable): Ditto.
13946 (omp_notice_variable): Ditto.
13947 (omp_get_base_pointer): Ditto.
13948 (omp_strip_components_and_deref): Ditto.
13949 (omp_strip_indirections): Ditto.
13950 (omp_accumulate_sibling_list): Ditto.
13951 (omp_build_struct_sibling_lists): Ditto.
13952 (gimplify_adjust_omp_clauses_1): Ditto.
13953 (gimplify_adjust_omp_clauses): Ditto.
13954 (gimplify_omp_for): Ditto.
13955 (goa_lhs_expr_p): Ditto.
13956 (gimplify_one_sizepos): Ditto.
13957 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
13958 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
13959 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
13960 (propagate_controlled_uses): Ditto.
13961 * ipa-sra.cc (type_prevails_p): Ditto.
13962 (scan_expr_access): Ditto.
13963 * optabs-tree.cc (optab_for_tree_code): Ditto.
13964 * toplev.cc (wrapup_global_declaration_1): Ditto.
13965 * trans-mem.cc (transaction_invariant_address_p): Ditto.
13966 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
13967 (verify_gimple_comparison): Ditto.
13968 (verify_gimple_assign_binary): Ditto.
13969 (verify_gimple_assign_single): Ditto.
13970 * tree-complex.cc (get_component_ssa_name): Ditto.
13971 * tree-emutls.cc (lower_emutls_2): Ditto.
13972 * tree-inline.cc (copy_tree_body_r): Ditto.
13973 (estimate_move_cost): Ditto.
13974 (copy_decl_for_dup_finish): Ditto.
13975 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
13976 (note_nonlocal_vla_type): Ditto.
13977 (convert_local_omp_clauses): Ditto.
13978 (remap_vla_decls): Ditto.
13979 (fixup_vla_decls): Ditto.
13980 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
13981 * tree-pretty-print.cc (print_declaration): Ditto.
13982 (print_call_name): Ditto.
13983 * tree-sra.cc (compare_access_positions): Ditto.
13984 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
13985 * tree-ssa-ccp.cc (get_default_value): Ditto.
13986 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
13987 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
13988 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
13989 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
13990 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
13991 * tree-ssa-sink.cc (statement_sink_location): Ditto.
13992 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
13993 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
13994 * tree-ssa-uninit.cc (warn_uninit): Ditto.
13995 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
13996 (non_rewritable_mem_ref_base): Ditto.
13997 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
13998 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
13999 * tree-vect-generic.cc (do_binop): Ditto.
14001 * tree-vect-stmts.cc (vect_init_vector): Ditto.
14002 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
14003 * tree.cc (sign_mask_for): Ditto.
14004 (verify_type_variant): Ditto.
14005 (gimple_canonical_types_compatible_p): Ditto.
14006 (verify_type): Ditto.
14007 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
14008 * var-tracking.cc (prepare_call_arguments): Ditto.
14009 (vt_add_function_parameters): Ditto.
14010 * varasm.cc (decode_addr_const): Ditto.
14012 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
14014 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
14015 (lower_reduction_clauses): Ditto.
14016 (lower_send_clauses): Ditto.
14017 (lower_omp_task_reductions): Ditto.
14018 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
14019 (worker_single_copy): Ditto.
14020 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
14021 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
14023 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
14025 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
14027 (lto_read_body_or_constructor): Ditto.
14028 * lto-streamer-out.cc (tree_is_indexable): Ditto.
14029 (lto_output_var_decl_ref): Ditto.
14030 (DFS::DFS_write_tree_body): Ditto.
14031 (wrap_refs): Ditto.
14032 (write_symbol_extension_info): Ditto.
14034 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
14036 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
14037 defines from tree.h.
14038 (aarch64_mangle_type): Ditto.
14039 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
14040 (alpha_gimplify_va_arg_1): Ditto.
14041 * config/arc/arc.cc (arc_encode_section_info): Ditto.
14042 (arc_is_aux_reg_p): Ditto.
14043 (arc_is_uncached_mem_p): Ditto.
14044 (arc_handle_aux_attribute): Ditto.
14045 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
14046 (arm_handle_cmse_nonsecure_call): Ditto.
14047 (arm_set_default_type_attributes): Ditto.
14048 (arm_is_segment_info_known): Ditto.
14049 (arm_mangle_type): Ditto.
14050 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
14051 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
14052 (avr_decl_absdata_p): Ditto.
14053 (avr_insert_attributes): Ditto.
14054 (avr_section_type_flags): Ditto.
14055 (avr_encode_section_info): Ditto.
14056 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
14057 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
14058 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
14059 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
14060 (csky_mangle_type): Ditto.
14061 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
14062 * config/darwin.cc (is_objc_metadata): Ditto.
14063 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
14064 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
14065 * config/frv/frv.cc (frv_emit_movsi): Ditto.
14066 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
14067 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
14068 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
14069 * config/i386/i386-expand.cc: Ditto.
14070 * config/i386/i386.cc (type_natural_mode): Ditto.
14071 (ix86_function_arg): Ditto.
14072 (ix86_data_alignment): Ditto.
14073 (ix86_local_alignment): Ditto.
14074 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
14075 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
14076 (i386_pe_type_dllexport_p): Ditto.
14077 (i386_pe_adjust_class_at_definition): Ditto.
14078 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
14079 (i386_pe_binds_local_p): Ditto.
14080 (i386_pe_section_type_flags): Ditto.
14081 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
14082 (ia64_gimplify_va_arg): Ditto.
14083 (ia64_in_small_data_p): Ditto.
14084 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
14085 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
14086 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
14087 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
14088 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
14089 (mcore_encode_section_info): Ditto.
14090 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
14091 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
14092 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
14093 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
14094 (pass_in_memory): Ditto.
14095 (nvptx_generate_vector_shuffle): Ditto.
14096 (nvptx_lockless_update): Ditto.
14097 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
14098 (pa_function_value): Ditto.
14099 (pa_function_arg): Ditto.
14100 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
14101 (TEXT_SPACE_P): Ditto.
14102 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
14103 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
14104 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
14105 (riscv_mangle_type): Ditto.
14106 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
14107 (rl78_addsi3_internal): Ditto.
14108 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
14109 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
14110 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
14111 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
14112 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
14113 (rs6000_function_arg_advance_1): Ditto.
14114 (rs6000_function_arg): Ditto.
14115 (rs6000_pass_by_reference): Ditto.
14116 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
14117 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
14118 (rs6000_set_default_type_attributes): Ditto.
14119 (rs6000_elf_in_small_data_p): Ditto.
14120 (IN_NAMED_SECTION): Ditto.
14121 (rs6000_xcoff_encode_section_info): Ditto.
14122 (rs6000_function_value): Ditto.
14123 (invalid_arg_for_unprototyped_fn): Ditto.
14124 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
14125 (s390_vec_n_elem): Ditto.
14126 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
14127 (s390_function_arg_integer): Ditto.
14128 (s390_return_in_memory): Ditto.
14129 (s390_encode_section_info): Ditto.
14130 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
14131 (sh_function_value): Ditto.
14132 * config/sol2.cc (solaris_insert_attributes): Ditto.
14133 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
14134 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
14135 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
14136 (xstormy16_handle_below100_attribute): Ditto.
14137 * config/v850/v850.cc (v850_encode_section_info): Ditto.
14138 (v850_insert_attributes): Ditto.
14139 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
14140 (visium_return_in_memory): Ditto.
14141 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
14143 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
14145 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
14146 (ix86_expand_vecop_qihi): Add op2vec bool variable.
14147 Do not set REG_EQUAL note.
14148 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
14150 * config/i386/i386.cc (ix86_multiplication_cost): Handle
14151 V4QImode and V8QImode.
14152 * config/i386/mmx.md (mulv8qi3): New expander.
14154 * config/i386/sse.md (mulv8qi3): Remove.
14156 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
14158 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
14160 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
14162 PR bootstrap/105831
14163 * config.gcc: Use = operator instead of ==.
14165 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
14167 PR bootstrap/105831
14168 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
14169 * configure.ac: Likewise.
14170 * configure: Regenerate.
14172 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14174 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
14175 (__ARM_mve_coerce1): Remove.
14176 (__ARM_mve_coerce2): Remove.
14177 (__ARM_mve_coerce3): Remove.
14178 (__ARM_mve_coerce_i_scalar): New.
14179 (__ARM_mve_coerce_s8_ptr): New.
14180 (__ARM_mve_coerce_u8_ptr): New.
14181 (__ARM_mve_coerce_s16_ptr): New.
14182 (__ARM_mve_coerce_u16_ptr): New.
14183 (__ARM_mve_coerce_s32_ptr): New.
14184 (__ARM_mve_coerce_u32_ptr): New.
14185 (__ARM_mve_coerce_s64_ptr): New.
14186 (__ARM_mve_coerce_u64_ptr): New.
14187 (__ARM_mve_coerce_f_scalar): New.
14188 (__ARM_mve_coerce_f16_ptr): New.
14189 (__ARM_mve_coerce_f32_ptr): New.
14190 (__arm_vst4q): Change _coerce_ overloads.
14191 (__arm_vbicq): Change _coerce_ overloads.
14192 (__arm_vld1q): Change _coerce_ overloads.
14193 (__arm_vld1q_z): Change _coerce_ overloads.
14194 (__arm_vld2q): Change _coerce_ overloads.
14195 (__arm_vld4q): Change _coerce_ overloads.
14196 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
14197 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
14198 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
14199 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
14200 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
14201 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
14202 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
14203 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
14204 (__arm_vst1q_p): Change _coerce_ overloads.
14205 (__arm_vst2q): Change _coerce_ overloads.
14206 (__arm_vst1q): Change _coerce_ overloads.
14207 (__arm_vstrhq): Change _coerce_ overloads.
14208 (__arm_vstrhq_p): Change _coerce_ overloads.
14209 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
14210 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
14211 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
14212 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
14213 (__arm_vstrwq_p): Change _coerce_ overloads.
14214 (__arm_vstrwq): Change _coerce_ overloads.
14215 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
14216 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
14217 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
14218 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
14219 (__arm_vsetq_lane): Change _coerce_ overloads.
14220 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
14221 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
14222 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
14223 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
14224 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
14225 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
14226 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
14227 (__arm_vidupq_x_u8): Change _coerce_ overloads.
14228 (__arm_vddupq_x_u8): Change _coerce_ overloads.
14229 (__arm_vidupq_x_u16): Change _coerce_ overloads.
14230 (__arm_vddupq_x_u16): Change _coerce_ overloads.
14231 (__arm_vidupq_x_u32): Change _coerce_ overloads.
14232 (__arm_vddupq_x_u32): Change _coerce_ overloads.
14233 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
14234 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
14235 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
14236 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
14237 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
14238 (__arm_vidupq_u16): Change _coerce_ overloads.
14239 (__arm_vidupq_u32): Change _coerce_ overloads.
14240 (__arm_vidupq_u8): Change _coerce_ overloads.
14241 (__arm_vddupq_u16): Change _coerce_ overloads.
14242 (__arm_vddupq_u32): Change _coerce_ overloads.
14243 (__arm_vddupq_u8): Change _coerce_ overloads.
14244 (__arm_viwdupq_m): Change _coerce_ overloads.
14245 (__arm_viwdupq_u16): Change _coerce_ overloads.
14246 (__arm_viwdupq_u32): Change _coerce_ overloads.
14247 (__arm_viwdupq_u8): Change _coerce_ overloads.
14248 (__arm_vdwdupq_m): Change _coerce_ overloads.
14249 (__arm_vdwdupq_u16): Change _coerce_ overloads.
14250 (__arm_vdwdupq_u32): Change _coerce_ overloads.
14251 (__arm_vdwdupq_u8): Change _coerce_ overloads.
14252 (__arm_vstrbq): Change _coerce_ overloads.
14253 (__arm_vstrbq_p): Change _coerce_ overloads.
14254 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
14255 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
14256 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
14257 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
14258 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
14260 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14262 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
14265 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14267 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
14268 (__arm_vadcq_u32): Likewise.
14269 (__arm_vadcq_m_s32): Likewise.
14270 (__arm_vadcq_m_u32): Likewise.
14271 (__arm_vsbcq_s32): Likewise.
14272 (__arm_vsbcq_u32): Likewise.
14273 (__arm_vsbcq_m_s32): Likewise.
14274 (__arm_vsbcq_m_u32): Likewise.
14275 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
14277 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
14279 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
14280 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
14281 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
14282 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
14283 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
14284 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
14285 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
14286 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
14287 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
14288 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
14289 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
14290 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
14291 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
14292 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
14293 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
14294 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
14295 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
14296 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
14297 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
14298 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
14299 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
14300 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
14301 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
14302 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
14303 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
14304 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
14305 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
14306 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
14307 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
14308 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
14309 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
14310 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
14311 (mve_vorrq_m_f<mode>)
14312 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
14313 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
14314 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
14315 capitalization in the emitted asm.
14317 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
14319 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
14321 (Ri): Move constraint definition from predicates.md.
14322 (Rl): Define new constraint.
14323 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
14324 missing constraint.
14325 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
14326 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
14327 op 2. Fix asm output spacing.
14328 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
14329 * config/arm/predicates.md (Ri) Move constraint to constraints.md
14330 (mve_vldrd_immediate): Move it from
14332 (mve_vstrw_immediate): New predicate.
14334 2023-05-18 Pan Li <pan2.li@intel.com>
14335 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14336 Kito Cheng <kito.cheng@sifive.com>
14337 Richard Biener <rguenther@suse.de>
14338 Richard Sandiford <richard.sandiford@arm.com>
14340 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
14341 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
14342 (struct table_elt): Extend machine_mode to 16 bits.
14343 (struct set): Ditto.
14344 * genmodes.cc (emit_mode_wider): Extend type from char to short.
14345 (emit_mode_complex): Ditto.
14346 (emit_mode_inner): Ditto.
14347 (emit_class_narrowest_mode): Ditto.
14348 * genopinit.cc (main): Extend the machine_mode limit.
14349 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
14350 re-ordered the struct fields for padding.
14351 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
14352 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
14353 (get_mode_alignment): Extend type from char to short.
14354 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
14355 removed the ATTRIBUTE_PACKED.
14356 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
14357 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
14358 m_kind to 2 bits and remove m_spare.
14359 * rtl.h (RTX_CODE_BITSIZE): New macro.
14360 (struct rtx_def): Swap both the bit size and location between the
14361 rtx_code and the machine_mode.
14362 (subreg_shape::unique_id): Extend the machine_mode limit.
14363 * rtlanal.h: Extend machine_mode to 16 bits.
14364 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
14365 bits and re-ordered the struct fields for padding.
14366 (struct tree_decl_common): Extend machine_mode to 16 bits.
14368 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
14370 * genrecog.cc (print_nonbool_test): Fix type error of
14371 switch (SUBREG_BYTE (op))'.
14373 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
14375 * common/config/riscv/riscv-common.cc: Remove
14376 trailing spaces on lines.
14377 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
14378 * config/riscv/riscv.h (enum reg_class): Likewise.
14379 * config/riscv/riscv.md: Likewise.
14381 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
14383 * config/pa/pa.md (clear_cache): New.
14385 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
14387 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
14388 parenthesis. Fix misnamed index entry.
14389 <concept>: Fix misnamed index entry.
14391 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
14393 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
14395 (*<optab>si3_mask, *<optab>di3_mask): Here.
14396 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
14397 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
14399 (*<bitmanip_optab>si3_sext_mask): Likewise.
14400 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
14401 and const_di_mask_operand.
14402 (bitmanip_rotate): New iterator.
14403 (bitmanip_optab): Add rotates.
14404 * config/riscv/predicates.md (const_si_mask_operand): Renamed
14405 from const31_operand. Generalize to handle more mask constants.
14406 (const_di_mask_operand): Similarly.
14408 2023-05-17 Jakub Jelinek <jakub@redhat.com>
14411 * config/i386/i386-builtin-types.def (FLOAT128): Use
14412 float128t_type_node rather than float128_type_node.
14414 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
14416 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
14417 FP_CONTRACT_FAST (no functional change).
14419 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
14421 * config/i386/i386.cc (ix86_multiplication_cost): Correct
14422 calcuation of integer vector mode costs to reflect generated
14423 instruction sequences of different integer vector modes and
14424 different target ABIs.
14426 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14428 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
14429 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
14430 (riscv_mode_needed): Ditto.
14431 (riscv_mode_after): Ditto.
14432 (riscv_mode_entry): Ditto.
14433 (riscv_mode_exit): Ditto.
14434 (riscv_mode_priority): Ditto.
14435 (TARGET_MODE_EMIT): New target hook.
14436 (TARGET_MODE_NEEDED): Ditto.
14437 (TARGET_MODE_AFTER): Ditto.
14438 (TARGET_MODE_ENTRY): Ditto.
14439 (TARGET_MODE_EXIT): Ditto.
14440 (TARGET_MODE_PRIORITY): Ditto.
14441 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
14442 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
14443 * config/riscv/riscv.md: Add csrwvxrm.
14444 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
14445 (vxrmsi): New pattern.
14447 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14449 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
14450 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
14451 (struct narrow_alu_def): Ditto.
14452 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
14453 (function_expander::use_exact_insn): Ditto.
14454 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
14455 (function_base::has_rounding_mode_operand_p): New function.
14457 2023-05-17 Andrew Pinski <apinski@marvell.com>
14459 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
14460 against 0 instead of calling integer_zerop.
14462 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14464 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
14465 (DEF_RVV_VXRM_ENUM): New macro.
14466 (handle_pragma_vector): Add vxrm enum register.
14467 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
14473 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
14475 * value-range.h (Value_Range::operator=): New.
14477 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
14479 * value-range.cc (vrange::operator=): Add a stub to copy
14480 unsupported ranges.
14481 * value-range.h (is_a <unsupported_range>): New.
14482 (Value_Range::operator=): Support copying unsupported ranges.
14484 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
14486 * data-streamer-in.cc (streamer_read_real_value): New.
14487 (streamer_read_value_range): New.
14488 * data-streamer-out.cc (streamer_write_real_value): New.
14489 (streamer_write_vrange): New.
14490 * data-streamer.h (streamer_write_vrange): New.
14491 (streamer_read_value_range): New.
14493 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
14496 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
14497 is ignored for a fixed underlying type.
14498 (C++ Dialect Options): Likewise for -fstrict-enums.
14500 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
14502 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
14505 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
14507 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
14509 (s390_atomic_align_for_mode): New.
14511 2023-05-17 Jakub Jelinek <jakub@redhat.com>
14513 * wide-int.cc (wi::from_array): Add missing closing paren in function
14516 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
14518 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
14519 suggested unroll factor once the previous analysis fails.
14521 2023-05-17 Pan Li <pan2.li@intel.com>
14523 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
14525 (main): Add bool1 to the type indexer.
14526 * config/riscv/riscv-vector-builtins-functions.def
14527 (vreinterpret): Register vbool1 interpret function.
14528 * config/riscv/riscv-vector-builtins-types.def
14529 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
14530 (vint8m1_t): Add the type to bool1_interpret_ops.
14531 (vint16m1_t): Ditto.
14532 (vint32m1_t): Ditto.
14533 (vint64m1_t): Ditto.
14534 (vuint8m1_t): Ditto.
14535 (vuint16m1_t): Ditto.
14536 (vuint32m1_t): Ditto.
14537 (vuint64m1_t): Ditto.
14538 * config/riscv/riscv-vector-builtins.cc
14539 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
14540 (required_extensions_p): Add bool1 interpret case.
14541 * config/riscv/riscv-vector-builtins.def
14542 (bool1_interpret): Add bool1 interpret to base type.
14543 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
14544 with VB dest for vreinterpret.
14546 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
14549 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
14550 constants through "lis; xoris".
14552 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
14554 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
14555 default rs6000 target pass for O2 and above.
14556 * doc/invoke.texi: Document -free
14558 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
14560 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
14561 Fix wrong select_kind...
14563 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
14565 * config/s390/s390-protos.h (s390_expand_setmem): Change
14566 function signature.
14567 * config/s390/s390.cc (s390_expand_setmem): For memset's less
14568 than or equal to 256 byte do not perform a libc call.
14569 * config/s390/s390.md: Change expander into a version which
14572 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
14574 * config/s390/s390-protos.h (s390_expand_movmem): New.
14575 * config/s390/s390.cc (s390_expand_movmem): New.
14576 * config/s390/s390.md (movmem<mode>): New.
14580 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
14582 * config/s390/s390-protos.h (s390_expand_cpymem): Change
14583 function signature.
14584 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
14585 than or equal to 256 byte do not perform a libc call.
14586 (s390_expand_insv): Adapt new function signature of
14587 s390_expand_cpymem.
14588 * config/s390/s390.md: Change expander into a version which
14591 2023-05-16 Andrew Pinski <apinski@marvell.com>
14593 PR tree-optimization/109424
14594 * match.pd: Add patterns for min/max of zero_one_valued
14597 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14599 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
14600 * config/riscv/riscv-vector-builtins.cc
14601 (function_expander::use_ternop_insn): Add default rounding mode.
14602 (function_expander::use_widen_ternop_insn): Ditto.
14603 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
14604 (riscv_hard_regno_mode_ok): Ditto.
14605 (riscv_conditional_register_usage): Ditto.
14606 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
14607 (FRM_REG_P): Ditto.
14608 (RISCV_DWARF_FRM): Ditto.
14609 * config/riscv/riscv.md: Ditto.
14610 * config/riscv/vector-iterators.md: split no frm and has frm operations.
14611 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
14612 (@pred_<optab><mode>): Ditto.
14614 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
14616 PR tree-optimization/109695
14617 * value-range.cc (irange::operator=): Resize range.
14618 (irange::union_): Same.
14619 (irange::intersect): Same.
14620 (irange::invert): Same.
14621 (int_range_max): Default to 3 sub-ranges and resize as needed.
14622 * value-range.h (irange::maybe_resize): New.
14624 (int_range::int_range): Adjust for resizing.
14625 (int_range::operator=): Same.
14627 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
14629 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
14631 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
14632 when range changed.
14634 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14636 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
14637 * config/riscv/riscv-vector-builtins.cc
14638 (function_expander::use_exact_insn): Add default rounding mode operand.
14639 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
14640 (riscv_hard_regno_mode_ok): Ditto.
14641 (riscv_conditional_register_usage): Ditto.
14642 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
14643 (VXRM_REG_P): Ditto.
14644 (RISCV_DWARF_VXRM): Ditto.
14645 * config/riscv/riscv.md: Ditto.
14646 * config/riscv/vector.md: Ditto
14648 2023-05-15 Pan Li <pan2.li@intel.com>
14650 * optabs.cc (maybe_gen_insn): Add case to generate instruction
14651 that has 11 operands.
14653 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14655 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
14656 logic for vector modes.
14658 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14661 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
14662 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
14663 (aarch64_cmtst<mode>): Rename to...
14664 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
14665 (*aarch64_cmtst_same_<mode>): Rename to...
14666 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
14667 (*aarch64_cmtstdi): Rename to...
14668 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
14669 (aarch64_fac<optab><mode>): Rename to...
14670 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
14672 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14675 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
14676 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
14678 2023-05-15 Pan Li <pan2.li@intel.com>
14679 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14680 kito-cheng <kito.cheng@sifive.com>
14682 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
14683 deciding the mode is constant or not.
14684 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
14686 2023-05-15 Richard Biener <rguenther@suse.de>
14688 PR tree-optimization/109848
14689 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
14690 TARGET_MEM_REF address preparation before the store, not
14693 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14695 * config/riscv/riscv.cc
14696 (riscv_vectorize_preferred_vector_alignment): New function.
14697 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
14699 2023-05-14 Andrew Pinski <apinski@marvell.com>
14701 PR tree-optimization/109829
14702 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
14704 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
14707 * config/i386/i386.cc: Revert the 2023-05-11 change.
14708 (ix86_widen_mult_cost): Return high value instead of
14709 ICEing for unsupported modes.
14711 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
14713 * config/i386/i386.cc (x86_function_profiler): Take
14714 ix86_direct_extern_access into account when generating calls
14717 2023-05-14 Pan Li <pan2.li@intel.com>
14719 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
14720 Refactor the or pattern to switch cases.
14722 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
14724 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
14725 aarch64_expand_vector_init to this, and remove interleaving case.
14726 Recursively call aarch64_expand_vector_init_fallback, instead of
14727 aarch64_expand_vector_init.
14728 (aarch64_unzip_vector_init): New function.
14729 (aarch64_expand_vector_init): Likewise.
14731 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
14733 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
14734 Pull out function call from the gcc_assert.
14736 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
14738 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
14739 (policy_to_str): New.
14740 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
14742 2023-05-13 Andrew Pinski <apinski@marvell.com>
14744 PR tree-optimization/109834
14745 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
14746 (popcount(rotate(x,y))->popcount(x)): Likewise.
14748 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
14750 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
14751 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
14752 gen_extend_insn to generate zero/sign extension instructions.
14754 (ix86_expand_vecop_qihi): Initialize interleave functions
14755 for MULT code only. Fix comments.
14757 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
14760 * config/i386/mmx.md (mulv2si3): Remove expander.
14761 (mulv2si3): Rename insn pattern from *mulv2si.
14763 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
14765 PR libstdc++/109816
14766 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
14767 '!lto_stream_offload_p'.
14769 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
14770 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14773 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
14774 (local_avl_compatible_p): New.
14775 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
14776 for LCM, rewrite as a backward algorithm.
14777 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
14778 interface, handle a BB at once.
14780 2023-05-12 Richard Biener <rguenther@suse.de>
14782 PR tree-optimization/64731
14783 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
14784 handle TARGET_MEM_REF destinations of stores from vector
14787 2023-05-12 Richard Biener <rguenther@suse.de>
14789 PR tree-optimization/109791
14790 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
14792 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
14795 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
14797 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
14798 * config/arm/arm-mve-builtins-base.def (vsriq): New.
14799 * config/arm/arm-mve-builtins-base.h (vsriq): New.
14800 * config/arm/arm-mve-builtins.cc
14801 (function_instance::has_inactive_argument): Handle vsriq.
14802 * config/arm/arm_mve.h (vsriq): Remove.
14804 (vsriq_n_u8): Remove.
14805 (vsriq_n_s8): Remove.
14806 (vsriq_n_u16): Remove.
14807 (vsriq_n_s16): Remove.
14808 (vsriq_n_u32): Remove.
14809 (vsriq_n_s32): Remove.
14810 (vsriq_m_n_s8): Remove.
14811 (vsriq_m_n_u8): Remove.
14812 (vsriq_m_n_s16): Remove.
14813 (vsriq_m_n_u16): Remove.
14814 (vsriq_m_n_s32): Remove.
14815 (vsriq_m_n_u32): Remove.
14816 (__arm_vsriq_n_u8): Remove.
14817 (__arm_vsriq_n_s8): Remove.
14818 (__arm_vsriq_n_u16): Remove.
14819 (__arm_vsriq_n_s16): Remove.
14820 (__arm_vsriq_n_u32): Remove.
14821 (__arm_vsriq_n_s32): Remove.
14822 (__arm_vsriq_m_n_s8): Remove.
14823 (__arm_vsriq_m_n_u8): Remove.
14824 (__arm_vsriq_m_n_s16): Remove.
14825 (__arm_vsriq_m_n_u16): Remove.
14826 (__arm_vsriq_m_n_s32): Remove.
14827 (__arm_vsriq_m_n_u32): Remove.
14828 (__arm_vsriq): Remove.
14829 (__arm_vsriq_m): Remove.
14831 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
14833 * config/arm/iterators.md (mve_insn): Add vsri.
14834 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
14835 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
14836 (mve_vsriq_m_n_<supf><mode>): Rename into ...
14837 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
14839 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
14841 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
14842 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
14844 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
14846 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
14847 * config/arm/arm-mve-builtins-base.def (vsliq): New.
14848 * config/arm/arm-mve-builtins-base.h (vsliq): New.
14849 * config/arm/arm-mve-builtins.cc
14850 (function_instance::has_inactive_argument): Handle vsliq.
14851 * config/arm/arm_mve.h (vsliq): Remove.
14853 (vsliq_n_u8): Remove.
14854 (vsliq_n_s8): Remove.
14855 (vsliq_n_u16): Remove.
14856 (vsliq_n_s16): Remove.
14857 (vsliq_n_u32): Remove.
14858 (vsliq_n_s32): Remove.
14859 (vsliq_m_n_s8): Remove.
14860 (vsliq_m_n_s32): Remove.
14861 (vsliq_m_n_s16): Remove.
14862 (vsliq_m_n_u8): Remove.
14863 (vsliq_m_n_u32): Remove.
14864 (vsliq_m_n_u16): Remove.
14865 (__arm_vsliq_n_u8): Remove.
14866 (__arm_vsliq_n_s8): Remove.
14867 (__arm_vsliq_n_u16): Remove.
14868 (__arm_vsliq_n_s16): Remove.
14869 (__arm_vsliq_n_u32): Remove.
14870 (__arm_vsliq_n_s32): Remove.
14871 (__arm_vsliq_m_n_s8): Remove.
14872 (__arm_vsliq_m_n_s32): Remove.
14873 (__arm_vsliq_m_n_s16): Remove.
14874 (__arm_vsliq_m_n_u8): Remove.
14875 (__arm_vsliq_m_n_u32): Remove.
14876 (__arm_vsliq_m_n_u16): Remove.
14877 (__arm_vsliq): Remove.
14878 (__arm_vsliq_m): Remove.
14880 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
14882 * config/arm/iterators.md (mve_insn>): Add vsli.
14883 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
14884 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
14885 (mve_vsliq_m_n_<supf><mode>): Rename into ...
14886 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
14888 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
14890 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
14891 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
14893 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
14895 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
14896 * config/arm/arm-mve-builtins-base.def (vpselq): New.
14897 * config/arm/arm-mve-builtins-base.h (vpselq): New.
14898 * config/arm/arm_mve.h (vpselq): Remove.
14899 (vpselq_u8): Remove.
14900 (vpselq_s8): Remove.
14901 (vpselq_u16): Remove.
14902 (vpselq_s16): Remove.
14903 (vpselq_u32): Remove.
14904 (vpselq_s32): Remove.
14905 (vpselq_u64): Remove.
14906 (vpselq_s64): Remove.
14907 (vpselq_f16): Remove.
14908 (vpselq_f32): Remove.
14909 (__arm_vpselq_u8): Remove.
14910 (__arm_vpselq_s8): Remove.
14911 (__arm_vpselq_u16): Remove.
14912 (__arm_vpselq_s16): Remove.
14913 (__arm_vpselq_u32): Remove.
14914 (__arm_vpselq_s32): Remove.
14915 (__arm_vpselq_u64): Remove.
14916 (__arm_vpselq_s64): Remove.
14917 (__arm_vpselq_f16): Remove.
14918 (__arm_vpselq_f32): Remove.
14919 (__arm_vpselq): Remove.
14921 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
14923 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
14924 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
14926 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
14928 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
14930 * config/arm/iterators.md (MVE_VPSELQ_F): New.
14931 (mve_insn): Add vpsel.
14932 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
14933 (@mve_<mve_insn>q_<supf><mode>): ... this.
14934 (@mve_vpselq_f<mode>): Rename into ...
14935 (@mve_<mve_insn>q_f<mode>): ... this.
14937 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
14939 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
14940 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
14941 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
14942 * config/arm/arm-mve-builtins.cc
14943 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
14945 * config/arm/arm_mve.h (vfmaq): Remove.
14949 (vfmasq_m): Remove.
14951 (vfmaq_f16): Remove.
14952 (vfmaq_n_f16): Remove.
14953 (vfmasq_n_f16): Remove.
14954 (vfmsq_f16): Remove.
14955 (vfmaq_f32): Remove.
14956 (vfmaq_n_f32): Remove.
14957 (vfmasq_n_f32): Remove.
14958 (vfmsq_f32): Remove.
14959 (vfmaq_m_f32): Remove.
14960 (vfmaq_m_f16): Remove.
14961 (vfmaq_m_n_f32): Remove.
14962 (vfmaq_m_n_f16): Remove.
14963 (vfmasq_m_n_f32): Remove.
14964 (vfmasq_m_n_f16): Remove.
14965 (vfmsq_m_f32): Remove.
14966 (vfmsq_m_f16): Remove.
14967 (__arm_vfmaq_f16): Remove.
14968 (__arm_vfmaq_n_f16): Remove.
14969 (__arm_vfmasq_n_f16): Remove.
14970 (__arm_vfmsq_f16): Remove.
14971 (__arm_vfmaq_f32): Remove.
14972 (__arm_vfmaq_n_f32): Remove.
14973 (__arm_vfmasq_n_f32): Remove.
14974 (__arm_vfmsq_f32): Remove.
14975 (__arm_vfmaq_m_f32): Remove.
14976 (__arm_vfmaq_m_f16): Remove.
14977 (__arm_vfmaq_m_n_f32): Remove.
14978 (__arm_vfmaq_m_n_f16): Remove.
14979 (__arm_vfmasq_m_n_f32): Remove.
14980 (__arm_vfmasq_m_n_f16): Remove.
14981 (__arm_vfmsq_m_f32): Remove.
14982 (__arm_vfmsq_m_f16): Remove.
14983 (__arm_vfmaq): Remove.
14984 (__arm_vfmasq): Remove.
14985 (__arm_vfmsq): Remove.
14986 (__arm_vfmaq_m): Remove.
14987 (__arm_vfmasq_m): Remove.
14988 (__arm_vfmsq_m): Remove.
14990 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
14992 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
14994 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
14995 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
14996 (mve_insn): Add vfma, vfmas, vfms.
14997 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
14999 (@mve_<mve_insn>q_f<mode>): ... this.
15000 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
15001 (@mve_<mve_insn>q_n_f<mode>): ... this.
15002 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
15003 @mve_<mve_insn>q_m_f<mode>.
15004 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
15005 @mve_<mve_insn>q_m_n_f<mode>.
15007 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15009 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
15010 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
15012 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15014 * config/arm/arm-mve-builtins-base.cc
15015 (FUNCTION_WITH_RTX_M_N_NO_F): New.
15017 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
15018 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
15019 * config/arm/arm_mve.h (vmvnq): Remove.
15022 (vmvnq_s8): Remove.
15023 (vmvnq_s16): Remove.
15024 (vmvnq_s32): Remove.
15025 (vmvnq_n_s16): Remove.
15026 (vmvnq_n_s32): Remove.
15027 (vmvnq_u8): Remove.
15028 (vmvnq_u16): Remove.
15029 (vmvnq_u32): Remove.
15030 (vmvnq_n_u16): Remove.
15031 (vmvnq_n_u32): Remove.
15032 (vmvnq_m_u8): Remove.
15033 (vmvnq_m_s8): Remove.
15034 (vmvnq_m_u16): Remove.
15035 (vmvnq_m_s16): Remove.
15036 (vmvnq_m_u32): Remove.
15037 (vmvnq_m_s32): Remove.
15038 (vmvnq_m_n_s16): Remove.
15039 (vmvnq_m_n_u16): Remove.
15040 (vmvnq_m_n_s32): Remove.
15041 (vmvnq_m_n_u32): Remove.
15042 (vmvnq_x_s8): Remove.
15043 (vmvnq_x_s16): Remove.
15044 (vmvnq_x_s32): Remove.
15045 (vmvnq_x_u8): Remove.
15046 (vmvnq_x_u16): Remove.
15047 (vmvnq_x_u32): Remove.
15048 (vmvnq_x_n_s16): Remove.
15049 (vmvnq_x_n_s32): Remove.
15050 (vmvnq_x_n_u16): Remove.
15051 (vmvnq_x_n_u32): Remove.
15052 (__arm_vmvnq_s8): Remove.
15053 (__arm_vmvnq_s16): Remove.
15054 (__arm_vmvnq_s32): Remove.
15055 (__arm_vmvnq_n_s16): Remove.
15056 (__arm_vmvnq_n_s32): Remove.
15057 (__arm_vmvnq_u8): Remove.
15058 (__arm_vmvnq_u16): Remove.
15059 (__arm_vmvnq_u32): Remove.
15060 (__arm_vmvnq_n_u16): Remove.
15061 (__arm_vmvnq_n_u32): Remove.
15062 (__arm_vmvnq_m_u8): Remove.
15063 (__arm_vmvnq_m_s8): Remove.
15064 (__arm_vmvnq_m_u16): Remove.
15065 (__arm_vmvnq_m_s16): Remove.
15066 (__arm_vmvnq_m_u32): Remove.
15067 (__arm_vmvnq_m_s32): Remove.
15068 (__arm_vmvnq_m_n_s16): Remove.
15069 (__arm_vmvnq_m_n_u16): Remove.
15070 (__arm_vmvnq_m_n_s32): Remove.
15071 (__arm_vmvnq_m_n_u32): Remove.
15072 (__arm_vmvnq_x_s8): Remove.
15073 (__arm_vmvnq_x_s16): Remove.
15074 (__arm_vmvnq_x_s32): Remove.
15075 (__arm_vmvnq_x_u8): Remove.
15076 (__arm_vmvnq_x_u16): Remove.
15077 (__arm_vmvnq_x_u32): Remove.
15078 (__arm_vmvnq_x_n_s16): Remove.
15079 (__arm_vmvnq_x_n_s32): Remove.
15080 (__arm_vmvnq_x_n_u16): Remove.
15081 (__arm_vmvnq_x_n_u32): Remove.
15082 (__arm_vmvnq): Remove.
15083 (__arm_vmvnq_m): Remove.
15084 (__arm_vmvnq_x): Remove.
15086 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15088 * config/arm/iterators.md (mve_insn): Add vmvn.
15089 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
15090 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
15091 (mve_vmvnq_m_<supf><mode>): Rename into ...
15092 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
15093 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
15094 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
15096 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15098 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
15099 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
15101 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15103 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
15104 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
15105 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
15106 * config/arm/arm_mve.h (vbrsrq): Remove.
15107 (vbrsrq_m): Remove.
15108 (vbrsrq_x): Remove.
15109 (vbrsrq_n_f16): Remove.
15110 (vbrsrq_n_f32): Remove.
15111 (vbrsrq_n_u8): Remove.
15112 (vbrsrq_n_s8): Remove.
15113 (vbrsrq_n_u16): Remove.
15114 (vbrsrq_n_s16): Remove.
15115 (vbrsrq_n_u32): Remove.
15116 (vbrsrq_n_s32): Remove.
15117 (vbrsrq_m_n_s8): Remove.
15118 (vbrsrq_m_n_s32): Remove.
15119 (vbrsrq_m_n_s16): Remove.
15120 (vbrsrq_m_n_u8): Remove.
15121 (vbrsrq_m_n_u32): Remove.
15122 (vbrsrq_m_n_u16): Remove.
15123 (vbrsrq_m_n_f32): Remove.
15124 (vbrsrq_m_n_f16): Remove.
15125 (vbrsrq_x_n_s8): Remove.
15126 (vbrsrq_x_n_s16): Remove.
15127 (vbrsrq_x_n_s32): Remove.
15128 (vbrsrq_x_n_u8): Remove.
15129 (vbrsrq_x_n_u16): Remove.
15130 (vbrsrq_x_n_u32): Remove.
15131 (vbrsrq_x_n_f16): Remove.
15132 (vbrsrq_x_n_f32): Remove.
15133 (__arm_vbrsrq_n_u8): Remove.
15134 (__arm_vbrsrq_n_s8): Remove.
15135 (__arm_vbrsrq_n_u16): Remove.
15136 (__arm_vbrsrq_n_s16): Remove.
15137 (__arm_vbrsrq_n_u32): Remove.
15138 (__arm_vbrsrq_n_s32): Remove.
15139 (__arm_vbrsrq_m_n_s8): Remove.
15140 (__arm_vbrsrq_m_n_s32): Remove.
15141 (__arm_vbrsrq_m_n_s16): Remove.
15142 (__arm_vbrsrq_m_n_u8): Remove.
15143 (__arm_vbrsrq_m_n_u32): Remove.
15144 (__arm_vbrsrq_m_n_u16): Remove.
15145 (__arm_vbrsrq_x_n_s8): Remove.
15146 (__arm_vbrsrq_x_n_s16): Remove.
15147 (__arm_vbrsrq_x_n_s32): Remove.
15148 (__arm_vbrsrq_x_n_u8): Remove.
15149 (__arm_vbrsrq_x_n_u16): Remove.
15150 (__arm_vbrsrq_x_n_u32): Remove.
15151 (__arm_vbrsrq_n_f16): Remove.
15152 (__arm_vbrsrq_n_f32): Remove.
15153 (__arm_vbrsrq_m_n_f32): Remove.
15154 (__arm_vbrsrq_m_n_f16): Remove.
15155 (__arm_vbrsrq_x_n_f16): Remove.
15156 (__arm_vbrsrq_x_n_f32): Remove.
15157 (__arm_vbrsrq): Remove.
15158 (__arm_vbrsrq_m): Remove.
15159 (__arm_vbrsrq_x): Remove.
15161 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15163 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
15164 (mve_insn): Add vbrsr.
15165 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
15166 (@mve_<mve_insn>q_n_f<mode>): ... this.
15167 (mve_vbrsrq_n_<supf><mode>): Rename into ...
15168 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
15169 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
15170 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
15171 (mve_vbrsrq_m_n_f<mode>): Rename into ...
15172 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
15174 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15176 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
15177 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
15179 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15181 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
15182 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
15183 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
15184 * config/arm/arm_mve.h (vqshluq): Remove.
15185 (vqshluq_m): Remove.
15186 (vqshluq_n_s8): Remove.
15187 (vqshluq_n_s16): Remove.
15188 (vqshluq_n_s32): Remove.
15189 (vqshluq_m_n_s8): Remove.
15190 (vqshluq_m_n_s16): Remove.
15191 (vqshluq_m_n_s32): Remove.
15192 (__arm_vqshluq_n_s8): Remove.
15193 (__arm_vqshluq_n_s16): Remove.
15194 (__arm_vqshluq_n_s32): Remove.
15195 (__arm_vqshluq_m_n_s8): Remove.
15196 (__arm_vqshluq_m_n_s16): Remove.
15197 (__arm_vqshluq_m_n_s32): Remove.
15198 (__arm_vqshluq): Remove.
15199 (__arm_vqshluq_m): Remove.
15201 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15203 * config/arm/iterators.md (mve_insn): Add vqshlu.
15204 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
15205 (VQSHLUQ_M_N, VQSHLUQ_N): New.
15206 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
15207 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
15208 (mve_vqshluq_m_n_s<mode>): Change name into ...
15209 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
15211 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15213 * config/arm/arm-mve-builtins-shapes.cc
15214 (binary_lshift_unsigned): New.
15215 * config/arm/arm-mve-builtins-shapes.h
15216 (binary_lshift_unsigned): New.
15218 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15220 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
15221 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
15222 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
15223 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
15224 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
15225 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
15226 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
15227 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
15228 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
15229 (vrmlaldavhaxq): Remove.
15230 (vrmlsldavhaq): Remove.
15231 (vrmlsldavhaxq): Remove.
15232 (vrmlaldavhaq_p): Remove.
15233 (vrmlaldavhaxq_p): Remove.
15234 (vrmlsldavhaq_p): Remove.
15235 (vrmlsldavhaxq_p): Remove.
15236 (vrmlaldavhaq_s32): Remove.
15237 (vrmlaldavhaq_u32): Remove.
15238 (vrmlaldavhaxq_s32): Remove.
15239 (vrmlsldavhaq_s32): Remove.
15240 (vrmlsldavhaxq_s32): Remove.
15241 (vrmlaldavhaq_p_s32): Remove.
15242 (vrmlaldavhaq_p_u32): Remove.
15243 (vrmlaldavhaxq_p_s32): Remove.
15244 (vrmlsldavhaq_p_s32): Remove.
15245 (vrmlsldavhaxq_p_s32): Remove.
15246 (__arm_vrmlaldavhaq_s32): Remove.
15247 (__arm_vrmlaldavhaq_u32): Remove.
15248 (__arm_vrmlaldavhaxq_s32): Remove.
15249 (__arm_vrmlsldavhaq_s32): Remove.
15250 (__arm_vrmlsldavhaxq_s32): Remove.
15251 (__arm_vrmlaldavhaq_p_s32): Remove.
15252 (__arm_vrmlaldavhaq_p_u32): Remove.
15253 (__arm_vrmlaldavhaxq_p_s32): Remove.
15254 (__arm_vrmlsldavhaq_p_s32): Remove.
15255 (__arm_vrmlsldavhaxq_p_s32): Remove.
15256 (__arm_vrmlaldavhaq): Remove.
15257 (__arm_vrmlaldavhaxq): Remove.
15258 (__arm_vrmlsldavhaq): Remove.
15259 (__arm_vrmlsldavhaxq): Remove.
15260 (__arm_vrmlaldavhaq_p): Remove.
15261 (__arm_vrmlaldavhaxq_p): Remove.
15262 (__arm_vrmlsldavhaq_p): Remove.
15263 (__arm_vrmlsldavhaxq_p): Remove.
15265 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15267 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
15268 (MVE_VRMLxLDAVHAxQ_P): New.
15269 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
15271 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
15272 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
15274 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
15275 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
15276 (mve_vrmlsldavhaq_sv4si): Merge into ...
15277 (@mve_<mve_insn>q_<supf>v4si): ... this.
15278 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
15279 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
15280 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
15281 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
15283 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15285 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
15286 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
15288 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
15289 * config/arm/arm_mve.h (vqdmulltq): Remove.
15290 (vqdmullbq): Remove.
15291 (vqdmullbq_m): Remove.
15292 (vqdmulltq_m): Remove.
15293 (vqdmulltq_s16): Remove.
15294 (vqdmulltq_n_s16): Remove.
15295 (vqdmullbq_s16): Remove.
15296 (vqdmullbq_n_s16): Remove.
15297 (vqdmulltq_s32): Remove.
15298 (vqdmulltq_n_s32): Remove.
15299 (vqdmullbq_s32): Remove.
15300 (vqdmullbq_n_s32): Remove.
15301 (vqdmullbq_m_n_s32): Remove.
15302 (vqdmullbq_m_n_s16): Remove.
15303 (vqdmullbq_m_s32): Remove.
15304 (vqdmullbq_m_s16): Remove.
15305 (vqdmulltq_m_n_s32): Remove.
15306 (vqdmulltq_m_n_s16): Remove.
15307 (vqdmulltq_m_s32): Remove.
15308 (vqdmulltq_m_s16): Remove.
15309 (__arm_vqdmulltq_s16): Remove.
15310 (__arm_vqdmulltq_n_s16): Remove.
15311 (__arm_vqdmullbq_s16): Remove.
15312 (__arm_vqdmullbq_n_s16): Remove.
15313 (__arm_vqdmulltq_s32): Remove.
15314 (__arm_vqdmulltq_n_s32): Remove.
15315 (__arm_vqdmullbq_s32): Remove.
15316 (__arm_vqdmullbq_n_s32): Remove.
15317 (__arm_vqdmullbq_m_n_s32): Remove.
15318 (__arm_vqdmullbq_m_n_s16): Remove.
15319 (__arm_vqdmullbq_m_s32): Remove.
15320 (__arm_vqdmullbq_m_s16): Remove.
15321 (__arm_vqdmulltq_m_n_s32): Remove.
15322 (__arm_vqdmulltq_m_n_s16): Remove.
15323 (__arm_vqdmulltq_m_s32): Remove.
15324 (__arm_vqdmulltq_m_s16): Remove.
15325 (__arm_vqdmulltq): Remove.
15326 (__arm_vqdmullbq): Remove.
15327 (__arm_vqdmullbq_m): Remove.
15328 (__arm_vqdmulltq_m): Remove.
15330 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15332 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
15333 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
15334 (mve_insn): Add vqdmullb, vqdmullt.
15335 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
15336 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
15338 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
15339 (mve_vqdmulltq_n_s<mode>): Merge into ...
15340 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
15341 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
15342 (@mve_<mve_insn>q_<supf><mode>): ... this.
15343 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
15345 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
15346 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
15347 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
15349 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
15351 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
15352 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
15354 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
15356 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
15357 Drop unused parameter.
15358 (riscv_select_multilib): Ditto.
15359 (riscv_compute_multilib): Update call site of
15360 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
15362 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
15364 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
15365 * config/riscv/riscv-protos.h (expand_vec_init): New function.
15366 * config/riscv/riscv-v.cc (class rvv_builder): New class.
15367 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
15368 (rvv_builder::get_merged_repeating_sequence): Ditto.
15369 (expand_vector_init_insert_elems): Ditto.
15370 (expand_vec_init): Ditto.
15371 * config/riscv/vector-iterators.md: New attribute.
15373 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
15375 * config/rs6000/rs6000-builtins.def
15376 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
15378 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
15379 xsiexpdpf to xsiexpdpf_di.
15380 * config/rs6000/vsx.md (xsiexpdp): Rename to...
15381 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
15382 replace TARGET_64BIT with TARGET_POWERPC64.
15383 (xsiexpdpf): Rename to...
15384 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
15385 replace TARGET_64BIT with TARGET_POWERPC64.
15387 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
15389 * config/rs6000/rs6000-builtins.def
15390 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
15392 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
15395 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
15397 * config/rs6000/rs6000-builtins.def
15398 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
15399 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
15401 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
15402 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
15403 TARGET_64BIT check.
15404 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
15405 requirement when it has a 64-bit argument.
15407 2023-05-12 Pan Li <pan2.li@intel.com>
15408 Richard Sandiford <richard.sandiford@arm.com>
15409 Richard Biener <rguenther@suse.de>
15410 Jakub Jelinek <jakub@redhat.com>
15412 * mux-utils.h: Add overload operator == and != for pointer_mux.
15413 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
15414 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
15415 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
15416 (dv_as_decl): Ditto.
15417 (dv_as_opaque): Removed due to unnecessary.
15418 (struct variable_hasher): Take decl_or_value as compare_type.
15419 (variable_hasher::equal): Diito.
15420 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
15421 (dv_from_value): Ditto.
15422 (attrs_list_member): Ditto.
15423 (vars_copy): Ditto.
15424 (var_reg_decl_set): Ditto.
15425 (var_reg_delete_and_set): Ditto.
15426 (find_loc_in_1pdv): Ditto.
15427 (canonicalize_values_star): Ditto.
15428 (variable_post_merge_new_vals): Ditto.
15429 (dump_onepart_variable_differences): Ditto.
15430 (variable_different_p): Ditto.
15431 (set_slot_part): Ditto.
15432 (clobber_slot_part): Ditto.
15433 (clobber_variable_part): Ditto.
15435 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
15437 * match.pd: simplify vector shift + bit_and + multiply.
15439 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15441 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
15442 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
15443 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
15444 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
15445 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
15446 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
15447 * config/arm/arm-mve-builtins.cc
15448 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
15449 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
15450 * config/arm/arm_mve.h (vqrdmlashq): Remove.
15451 (vqrdmlahq): Remove.
15452 (vqdmlashq): Remove.
15453 (vqdmlahq): Remove.
15457 (vmlasq_m): Remove.
15458 (vqdmlashq_m): Remove.
15459 (vqdmlahq_m): Remove.
15460 (vqrdmlahq_m): Remove.
15461 (vqrdmlashq_m): Remove.
15462 (vmlasq_n_u8): Remove.
15463 (vmlaq_n_u8): Remove.
15464 (vqrdmlashq_n_s8): Remove.
15465 (vqrdmlahq_n_s8): Remove.
15466 (vqdmlahq_n_s8): Remove.
15467 (vqdmlashq_n_s8): Remove.
15468 (vmlasq_n_s8): Remove.
15469 (vmlaq_n_s8): Remove.
15470 (vmlasq_n_u16): Remove.
15471 (vmlaq_n_u16): Remove.
15472 (vqrdmlashq_n_s16): Remove.
15473 (vqrdmlahq_n_s16): Remove.
15474 (vqdmlashq_n_s16): Remove.
15475 (vqdmlahq_n_s16): Remove.
15476 (vmlasq_n_s16): Remove.
15477 (vmlaq_n_s16): Remove.
15478 (vmlasq_n_u32): Remove.
15479 (vmlaq_n_u32): Remove.
15480 (vqrdmlashq_n_s32): Remove.
15481 (vqrdmlahq_n_s32): Remove.
15482 (vqdmlashq_n_s32): Remove.
15483 (vqdmlahq_n_s32): Remove.
15484 (vmlasq_n_s32): Remove.
15485 (vmlaq_n_s32): Remove.
15486 (vmlaq_m_n_s8): Remove.
15487 (vmlaq_m_n_s32): Remove.
15488 (vmlaq_m_n_s16): Remove.
15489 (vmlaq_m_n_u8): Remove.
15490 (vmlaq_m_n_u32): Remove.
15491 (vmlaq_m_n_u16): Remove.
15492 (vmlasq_m_n_s8): Remove.
15493 (vmlasq_m_n_s32): Remove.
15494 (vmlasq_m_n_s16): Remove.
15495 (vmlasq_m_n_u8): Remove.
15496 (vmlasq_m_n_u32): Remove.
15497 (vmlasq_m_n_u16): Remove.
15498 (vqdmlashq_m_n_s8): Remove.
15499 (vqdmlashq_m_n_s32): Remove.
15500 (vqdmlashq_m_n_s16): Remove.
15501 (vqdmlahq_m_n_s8): Remove.
15502 (vqdmlahq_m_n_s32): Remove.
15503 (vqdmlahq_m_n_s16): Remove.
15504 (vqrdmlahq_m_n_s8): Remove.
15505 (vqrdmlahq_m_n_s32): Remove.
15506 (vqrdmlahq_m_n_s16): Remove.
15507 (vqrdmlashq_m_n_s8): Remove.
15508 (vqrdmlashq_m_n_s32): Remove.
15509 (vqrdmlashq_m_n_s16): Remove.
15510 (__arm_vmlasq_n_u8): Remove.
15511 (__arm_vmlaq_n_u8): Remove.
15512 (__arm_vqrdmlashq_n_s8): Remove.
15513 (__arm_vqdmlashq_n_s8): Remove.
15514 (__arm_vqrdmlahq_n_s8): Remove.
15515 (__arm_vqdmlahq_n_s8): Remove.
15516 (__arm_vmlasq_n_s8): Remove.
15517 (__arm_vmlaq_n_s8): Remove.
15518 (__arm_vmlasq_n_u16): Remove.
15519 (__arm_vmlaq_n_u16): Remove.
15520 (__arm_vqrdmlashq_n_s16): Remove.
15521 (__arm_vqdmlashq_n_s16): Remove.
15522 (__arm_vqrdmlahq_n_s16): Remove.
15523 (__arm_vqdmlahq_n_s16): Remove.
15524 (__arm_vmlasq_n_s16): Remove.
15525 (__arm_vmlaq_n_s16): Remove.
15526 (__arm_vmlasq_n_u32): Remove.
15527 (__arm_vmlaq_n_u32): Remove.
15528 (__arm_vqrdmlashq_n_s32): Remove.
15529 (__arm_vqdmlashq_n_s32): Remove.
15530 (__arm_vqrdmlahq_n_s32): Remove.
15531 (__arm_vqdmlahq_n_s32): Remove.
15532 (__arm_vmlasq_n_s32): Remove.
15533 (__arm_vmlaq_n_s32): Remove.
15534 (__arm_vmlaq_m_n_s8): Remove.
15535 (__arm_vmlaq_m_n_s32): Remove.
15536 (__arm_vmlaq_m_n_s16): Remove.
15537 (__arm_vmlaq_m_n_u8): Remove.
15538 (__arm_vmlaq_m_n_u32): Remove.
15539 (__arm_vmlaq_m_n_u16): Remove.
15540 (__arm_vmlasq_m_n_s8): Remove.
15541 (__arm_vmlasq_m_n_s32): Remove.
15542 (__arm_vmlasq_m_n_s16): Remove.
15543 (__arm_vmlasq_m_n_u8): Remove.
15544 (__arm_vmlasq_m_n_u32): Remove.
15545 (__arm_vmlasq_m_n_u16): Remove.
15546 (__arm_vqdmlahq_m_n_s8): Remove.
15547 (__arm_vqdmlahq_m_n_s32): Remove.
15548 (__arm_vqdmlahq_m_n_s16): Remove.
15549 (__arm_vqrdmlahq_m_n_s8): Remove.
15550 (__arm_vqrdmlahq_m_n_s32): Remove.
15551 (__arm_vqrdmlahq_m_n_s16): Remove.
15552 (__arm_vqrdmlashq_m_n_s8): Remove.
15553 (__arm_vqrdmlashq_m_n_s32): Remove.
15554 (__arm_vqrdmlashq_m_n_s16): Remove.
15555 (__arm_vqdmlashq_m_n_s8): Remove.
15556 (__arm_vqdmlashq_m_n_s16): Remove.
15557 (__arm_vqdmlashq_m_n_s32): Remove.
15558 (__arm_vmlasq): Remove.
15559 (__arm_vmlaq): Remove.
15560 (__arm_vqrdmlashq): Remove.
15561 (__arm_vqdmlashq): Remove.
15562 (__arm_vqrdmlahq): Remove.
15563 (__arm_vqdmlahq): Remove.
15564 (__arm_vmlaq_m): Remove.
15565 (__arm_vmlasq_m): Remove.
15566 (__arm_vqdmlahq_m): Remove.
15567 (__arm_vqrdmlahq_m): Remove.
15568 (__arm_vqrdmlashq_m): Remove.
15569 (__arm_vqdmlashq_m): Remove.
15571 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15573 * config/arm/iterators.md (MVE_VMLxQ_N): New.
15574 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
15576 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
15578 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
15579 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
15580 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
15581 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
15582 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
15584 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15586 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
15587 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
15589 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15591 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
15592 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
15593 (vqrdmlsdhxq): New.
15594 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
15595 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
15596 (vqrdmlsdhxq): New.
15597 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
15598 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
15599 (vqrdmlsdhxq): New.
15600 * config/arm/arm-mve-builtins.cc
15601 (function_instance::has_inactive_argument): Handle vqrdmladhq,
15602 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
15603 vqdmlsdhq, vqdmlsdhxq.
15604 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
15605 (vqrdmlsdhq): Remove.
15606 (vqrdmladhxq): Remove.
15607 (vqrdmladhq): Remove.
15608 (vqdmlsdhxq): Remove.
15609 (vqdmlsdhq): Remove.
15610 (vqdmladhxq): Remove.
15611 (vqdmladhq): Remove.
15612 (vqdmladhq_m): Remove.
15613 (vqdmladhxq_m): Remove.
15614 (vqdmlsdhq_m): Remove.
15615 (vqdmlsdhxq_m): Remove.
15616 (vqrdmladhq_m): Remove.
15617 (vqrdmladhxq_m): Remove.
15618 (vqrdmlsdhq_m): Remove.
15619 (vqrdmlsdhxq_m): Remove.
15620 (vqrdmlsdhxq_s8): Remove.
15621 (vqrdmlsdhq_s8): Remove.
15622 (vqrdmladhxq_s8): Remove.
15623 (vqrdmladhq_s8): Remove.
15624 (vqdmlsdhxq_s8): Remove.
15625 (vqdmlsdhq_s8): Remove.
15626 (vqdmladhxq_s8): Remove.
15627 (vqdmladhq_s8): Remove.
15628 (vqrdmlsdhxq_s16): Remove.
15629 (vqrdmlsdhq_s16): Remove.
15630 (vqrdmladhxq_s16): Remove.
15631 (vqrdmladhq_s16): Remove.
15632 (vqdmlsdhxq_s16): Remove.
15633 (vqdmlsdhq_s16): Remove.
15634 (vqdmladhxq_s16): Remove.
15635 (vqdmladhq_s16): Remove.
15636 (vqrdmlsdhxq_s32): Remove.
15637 (vqrdmlsdhq_s32): Remove.
15638 (vqrdmladhxq_s32): Remove.
15639 (vqrdmladhq_s32): Remove.
15640 (vqdmlsdhxq_s32): Remove.
15641 (vqdmlsdhq_s32): Remove.
15642 (vqdmladhxq_s32): Remove.
15643 (vqdmladhq_s32): Remove.
15644 (vqdmladhq_m_s8): Remove.
15645 (vqdmladhq_m_s32): Remove.
15646 (vqdmladhq_m_s16): Remove.
15647 (vqdmladhxq_m_s8): Remove.
15648 (vqdmladhxq_m_s32): Remove.
15649 (vqdmladhxq_m_s16): Remove.
15650 (vqdmlsdhq_m_s8): Remove.
15651 (vqdmlsdhq_m_s32): Remove.
15652 (vqdmlsdhq_m_s16): Remove.
15653 (vqdmlsdhxq_m_s8): Remove.
15654 (vqdmlsdhxq_m_s32): Remove.
15655 (vqdmlsdhxq_m_s16): Remove.
15656 (vqrdmladhq_m_s8): Remove.
15657 (vqrdmladhq_m_s32): Remove.
15658 (vqrdmladhq_m_s16): Remove.
15659 (vqrdmladhxq_m_s8): Remove.
15660 (vqrdmladhxq_m_s32): Remove.
15661 (vqrdmladhxq_m_s16): Remove.
15662 (vqrdmlsdhq_m_s8): Remove.
15663 (vqrdmlsdhq_m_s32): Remove.
15664 (vqrdmlsdhq_m_s16): Remove.
15665 (vqrdmlsdhxq_m_s8): Remove.
15666 (vqrdmlsdhxq_m_s32): Remove.
15667 (vqrdmlsdhxq_m_s16): Remove.
15668 (__arm_vqrdmlsdhxq_s8): Remove.
15669 (__arm_vqrdmlsdhq_s8): Remove.
15670 (__arm_vqrdmladhxq_s8): Remove.
15671 (__arm_vqrdmladhq_s8): Remove.
15672 (__arm_vqdmlsdhxq_s8): Remove.
15673 (__arm_vqdmlsdhq_s8): Remove.
15674 (__arm_vqdmladhxq_s8): Remove.
15675 (__arm_vqdmladhq_s8): Remove.
15676 (__arm_vqrdmlsdhxq_s16): Remove.
15677 (__arm_vqrdmlsdhq_s16): Remove.
15678 (__arm_vqrdmladhxq_s16): Remove.
15679 (__arm_vqrdmladhq_s16): Remove.
15680 (__arm_vqdmlsdhxq_s16): Remove.
15681 (__arm_vqdmlsdhq_s16): Remove.
15682 (__arm_vqdmladhxq_s16): Remove.
15683 (__arm_vqdmladhq_s16): Remove.
15684 (__arm_vqrdmlsdhxq_s32): Remove.
15685 (__arm_vqrdmlsdhq_s32): Remove.
15686 (__arm_vqrdmladhxq_s32): Remove.
15687 (__arm_vqrdmladhq_s32): Remove.
15688 (__arm_vqdmlsdhxq_s32): Remove.
15689 (__arm_vqdmlsdhq_s32): Remove.
15690 (__arm_vqdmladhxq_s32): Remove.
15691 (__arm_vqdmladhq_s32): Remove.
15692 (__arm_vqdmladhq_m_s8): Remove.
15693 (__arm_vqdmladhq_m_s32): Remove.
15694 (__arm_vqdmladhq_m_s16): Remove.
15695 (__arm_vqdmladhxq_m_s8): Remove.
15696 (__arm_vqdmladhxq_m_s32): Remove.
15697 (__arm_vqdmladhxq_m_s16): Remove.
15698 (__arm_vqdmlsdhq_m_s8): Remove.
15699 (__arm_vqdmlsdhq_m_s32): Remove.
15700 (__arm_vqdmlsdhq_m_s16): Remove.
15701 (__arm_vqdmlsdhxq_m_s8): Remove.
15702 (__arm_vqdmlsdhxq_m_s32): Remove.
15703 (__arm_vqdmlsdhxq_m_s16): Remove.
15704 (__arm_vqrdmladhq_m_s8): Remove.
15705 (__arm_vqrdmladhq_m_s32): Remove.
15706 (__arm_vqrdmladhq_m_s16): Remove.
15707 (__arm_vqrdmladhxq_m_s8): Remove.
15708 (__arm_vqrdmladhxq_m_s32): Remove.
15709 (__arm_vqrdmladhxq_m_s16): Remove.
15710 (__arm_vqrdmlsdhq_m_s8): Remove.
15711 (__arm_vqrdmlsdhq_m_s32): Remove.
15712 (__arm_vqrdmlsdhq_m_s16): Remove.
15713 (__arm_vqrdmlsdhxq_m_s8): Remove.
15714 (__arm_vqrdmlsdhxq_m_s32): Remove.
15715 (__arm_vqrdmlsdhxq_m_s16): Remove.
15716 (__arm_vqrdmlsdhxq): Remove.
15717 (__arm_vqrdmlsdhq): Remove.
15718 (__arm_vqrdmladhxq): Remove.
15719 (__arm_vqrdmladhq): Remove.
15720 (__arm_vqdmlsdhxq): Remove.
15721 (__arm_vqdmlsdhq): Remove.
15722 (__arm_vqdmladhxq): Remove.
15723 (__arm_vqdmladhq): Remove.
15724 (__arm_vqdmladhq_m): Remove.
15725 (__arm_vqdmladhxq_m): Remove.
15726 (__arm_vqdmlsdhq_m): Remove.
15727 (__arm_vqdmlsdhxq_m): Remove.
15728 (__arm_vqrdmladhq_m): Remove.
15729 (__arm_vqrdmladhxq_m): Remove.
15730 (__arm_vqrdmlsdhq_m): Remove.
15731 (__arm_vqrdmlsdhxq_m): Remove.
15733 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15735 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
15736 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
15737 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
15738 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
15739 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
15740 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
15741 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
15742 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
15743 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
15744 (mve_vqdmladhq_s<mode>): Merge into ...
15745 (@mve_<mve_insn>q_<supf><mode>): ... this.
15747 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15749 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
15750 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
15752 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15754 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
15755 (vmlsldavaq, vmlsldavaxq): New.
15756 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
15757 (vmlsldavaq, vmlsldavaxq): New.
15758 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
15759 (vmlsldavaq, vmlsldavaxq): New.
15760 * config/arm/arm_mve.h (vmlaldavaq): Remove.
15761 (vmlaldavaxq): Remove.
15762 (vmlsldavaq): Remove.
15763 (vmlsldavaxq): Remove.
15764 (vmlaldavaq_p): Remove.
15765 (vmlaldavaxq_p): Remove.
15766 (vmlsldavaq_p): Remove.
15767 (vmlsldavaxq_p): Remove.
15768 (vmlaldavaq_s16): Remove.
15769 (vmlaldavaxq_s16): Remove.
15770 (vmlsldavaq_s16): Remove.
15771 (vmlsldavaxq_s16): Remove.
15772 (vmlaldavaq_u16): Remove.
15773 (vmlaldavaq_s32): Remove.
15774 (vmlaldavaxq_s32): Remove.
15775 (vmlsldavaq_s32): Remove.
15776 (vmlsldavaxq_s32): Remove.
15777 (vmlaldavaq_u32): Remove.
15778 (vmlaldavaq_p_s32): Remove.
15779 (vmlaldavaq_p_s16): Remove.
15780 (vmlaldavaq_p_u32): Remove.
15781 (vmlaldavaq_p_u16): Remove.
15782 (vmlaldavaxq_p_s32): Remove.
15783 (vmlaldavaxq_p_s16): Remove.
15784 (vmlsldavaq_p_s32): Remove.
15785 (vmlsldavaq_p_s16): Remove.
15786 (vmlsldavaxq_p_s32): Remove.
15787 (vmlsldavaxq_p_s16): Remove.
15788 (__arm_vmlaldavaq_s16): Remove.
15789 (__arm_vmlaldavaxq_s16): Remove.
15790 (__arm_vmlsldavaq_s16): Remove.
15791 (__arm_vmlsldavaxq_s16): Remove.
15792 (__arm_vmlaldavaq_u16): Remove.
15793 (__arm_vmlaldavaq_s32): Remove.
15794 (__arm_vmlaldavaxq_s32): Remove.
15795 (__arm_vmlsldavaq_s32): Remove.
15796 (__arm_vmlsldavaxq_s32): Remove.
15797 (__arm_vmlaldavaq_u32): Remove.
15798 (__arm_vmlaldavaq_p_s32): Remove.
15799 (__arm_vmlaldavaq_p_s16): Remove.
15800 (__arm_vmlaldavaq_p_u32): Remove.
15801 (__arm_vmlaldavaq_p_u16): Remove.
15802 (__arm_vmlaldavaxq_p_s32): Remove.
15803 (__arm_vmlaldavaxq_p_s16): Remove.
15804 (__arm_vmlsldavaq_p_s32): Remove.
15805 (__arm_vmlsldavaq_p_s16): Remove.
15806 (__arm_vmlsldavaxq_p_s32): Remove.
15807 (__arm_vmlsldavaxq_p_s16): Remove.
15808 (__arm_vmlaldavaq): Remove.
15809 (__arm_vmlaldavaxq): Remove.
15810 (__arm_vmlsldavaq): Remove.
15811 (__arm_vmlsldavaxq): Remove.
15812 (__arm_vmlaldavaq_p): Remove.
15813 (__arm_vmlaldavaxq_p): Remove.
15814 (__arm_vmlsldavaq_p): Remove.
15815 (__arm_vmlsldavaxq_p): Remove.
15817 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15819 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
15821 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
15822 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
15823 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
15824 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
15825 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
15826 (mve_vmlaldavaxq_s<mode>): Merge into ...
15827 (@mve_<mve_insn>q_<supf><mode>): ... this.
15828 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
15829 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
15831 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
15833 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15835 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
15836 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
15838 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15840 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
15841 (vrmlsldavhq, vrmlsldavhxq): New.
15842 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
15843 (vrmlsldavhq, vrmlsldavhxq): New.
15844 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
15845 (vrmlsldavhq, vrmlsldavhxq): New.
15846 * config/arm/arm-mve-builtins-functions.h
15847 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
15848 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
15849 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
15850 (vrmlsldavhxq): Remove.
15851 (vrmlsldavhq): Remove.
15852 (vrmlaldavhxq): Remove.
15853 (vrmlaldavhq_p): Remove.
15854 (vrmlaldavhxq_p): Remove.
15855 (vrmlsldavhq_p): Remove.
15856 (vrmlsldavhxq_p): Remove.
15857 (vrmlaldavhq_u32): Remove.
15858 (vrmlsldavhxq_s32): Remove.
15859 (vrmlsldavhq_s32): Remove.
15860 (vrmlaldavhxq_s32): Remove.
15861 (vrmlaldavhq_s32): Remove.
15862 (vrmlaldavhq_p_s32): Remove.
15863 (vrmlaldavhxq_p_s32): Remove.
15864 (vrmlsldavhq_p_s32): Remove.
15865 (vrmlsldavhxq_p_s32): Remove.
15866 (vrmlaldavhq_p_u32): Remove.
15867 (__arm_vrmlaldavhq_u32): Remove.
15868 (__arm_vrmlsldavhxq_s32): Remove.
15869 (__arm_vrmlsldavhq_s32): Remove.
15870 (__arm_vrmlaldavhxq_s32): Remove.
15871 (__arm_vrmlaldavhq_s32): Remove.
15872 (__arm_vrmlaldavhq_p_s32): Remove.
15873 (__arm_vrmlaldavhxq_p_s32): Remove.
15874 (__arm_vrmlsldavhq_p_s32): Remove.
15875 (__arm_vrmlsldavhxq_p_s32): Remove.
15876 (__arm_vrmlaldavhq_p_u32): Remove.
15877 (__arm_vrmlaldavhq): Remove.
15878 (__arm_vrmlsldavhxq): Remove.
15879 (__arm_vrmlsldavhq): Remove.
15880 (__arm_vrmlaldavhxq): Remove.
15881 (__arm_vrmlaldavhq_p): Remove.
15882 (__arm_vrmlaldavhxq_p): Remove.
15883 (__arm_vrmlsldavhq_p): Remove.
15884 (__arm_vrmlsldavhxq_p): Remove.
15886 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15888 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
15890 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
15891 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
15892 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
15893 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
15894 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
15895 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
15896 (@mve_<mve_insn>q_<supf>v4si): ... this.
15897 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
15898 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
15900 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
15902 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15904 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
15905 (vmlsldavq, vmlsldavxq): New.
15906 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
15907 (vmlsldavq, vmlsldavxq): New.
15908 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
15909 (vmlsldavq, vmlsldavxq): New.
15910 * config/arm/arm_mve.h (vmlaldavq): Remove.
15911 (vmlsldavxq): Remove.
15912 (vmlsldavq): Remove.
15913 (vmlaldavxq): Remove.
15914 (vmlaldavq_p): Remove.
15915 (vmlaldavxq_p): Remove.
15916 (vmlsldavq_p): Remove.
15917 (vmlsldavxq_p): Remove.
15918 (vmlaldavq_u16): Remove.
15919 (vmlsldavxq_s16): Remove.
15920 (vmlsldavq_s16): Remove.
15921 (vmlaldavxq_s16): Remove.
15922 (vmlaldavq_s16): Remove.
15923 (vmlaldavq_u32): Remove.
15924 (vmlsldavxq_s32): Remove.
15925 (vmlsldavq_s32): Remove.
15926 (vmlaldavxq_s32): Remove.
15927 (vmlaldavq_s32): Remove.
15928 (vmlaldavq_p_s16): Remove.
15929 (vmlaldavxq_p_s16): Remove.
15930 (vmlsldavq_p_s16): Remove.
15931 (vmlsldavxq_p_s16): Remove.
15932 (vmlaldavq_p_u16): Remove.
15933 (vmlaldavq_p_s32): Remove.
15934 (vmlaldavxq_p_s32): Remove.
15935 (vmlsldavq_p_s32): Remove.
15936 (vmlsldavxq_p_s32): Remove.
15937 (vmlaldavq_p_u32): Remove.
15938 (__arm_vmlaldavq_u16): Remove.
15939 (__arm_vmlsldavxq_s16): Remove.
15940 (__arm_vmlsldavq_s16): Remove.
15941 (__arm_vmlaldavxq_s16): Remove.
15942 (__arm_vmlaldavq_s16): Remove.
15943 (__arm_vmlaldavq_u32): Remove.
15944 (__arm_vmlsldavxq_s32): Remove.
15945 (__arm_vmlsldavq_s32): Remove.
15946 (__arm_vmlaldavxq_s32): Remove.
15947 (__arm_vmlaldavq_s32): Remove.
15948 (__arm_vmlaldavq_p_s16): Remove.
15949 (__arm_vmlaldavxq_p_s16): Remove.
15950 (__arm_vmlsldavq_p_s16): Remove.
15951 (__arm_vmlsldavxq_p_s16): Remove.
15952 (__arm_vmlaldavq_p_u16): Remove.
15953 (__arm_vmlaldavq_p_s32): Remove.
15954 (__arm_vmlaldavxq_p_s32): Remove.
15955 (__arm_vmlsldavq_p_s32): Remove.
15956 (__arm_vmlsldavxq_p_s32): Remove.
15957 (__arm_vmlaldavq_p_u32): Remove.
15958 (__arm_vmlaldavq): Remove.
15959 (__arm_vmlsldavxq): Remove.
15960 (__arm_vmlsldavq): Remove.
15961 (__arm_vmlaldavxq): Remove.
15962 (__arm_vmlaldavq_p): Remove.
15963 (__arm_vmlaldavxq_p): Remove.
15964 (__arm_vmlsldavq_p): Remove.
15965 (__arm_vmlsldavxq_p): Remove.
15967 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15969 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
15970 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
15971 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
15972 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
15973 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
15974 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
15975 (mve_vmlsldavxq_s<mode>): Merge into ...
15976 (@mve_<mve_insn>q_<supf><mode>): ... this.
15977 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
15978 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
15980 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
15982 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15984 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
15985 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
15987 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
15989 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
15990 * config/arm/arm-mve-builtins-base.def (vabavq): New.
15991 * config/arm/arm-mve-builtins-base.h (vabavq): New.
15992 * config/arm/arm_mve.h (vabavq): Remove.
15993 (vabavq_p): Remove.
15994 (vabavq_s8): Remove.
15995 (vabavq_s16): Remove.
15996 (vabavq_s32): Remove.
15997 (vabavq_u8): Remove.
15998 (vabavq_u16): Remove.
15999 (vabavq_u32): Remove.
16000 (vabavq_p_s8): Remove.
16001 (vabavq_p_u8): Remove.
16002 (vabavq_p_s16): Remove.
16003 (vabavq_p_u16): Remove.
16004 (vabavq_p_s32): Remove.
16005 (vabavq_p_u32): Remove.
16006 (__arm_vabavq_s8): Remove.
16007 (__arm_vabavq_s16): Remove.
16008 (__arm_vabavq_s32): Remove.
16009 (__arm_vabavq_u8): Remove.
16010 (__arm_vabavq_u16): Remove.
16011 (__arm_vabavq_u32): Remove.
16012 (__arm_vabavq_p_s8): Remove.
16013 (__arm_vabavq_p_u8): Remove.
16014 (__arm_vabavq_p_s16): Remove.
16015 (__arm_vabavq_p_u16): Remove.
16016 (__arm_vabavq_p_s32): Remove.
16017 (__arm_vabavq_p_u32): Remove.
16018 (__arm_vabavq): Remove.
16019 (__arm_vabavq_p): Remove.
16021 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16023 * config/arm/iterators.md (mve_insn): Add vabav.
16024 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
16025 (@mve_<mve_insn>q_<supf><mode>): ... this,.
16026 (mve_vabavq_p_<supf><mode>): Rename into ...
16027 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
16029 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16031 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
16032 (vmlsdavaq, vmlsdavaxq): New.
16033 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
16034 (vmlsdavaq, vmlsdavaxq): New.
16035 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
16036 (vmlsdavaq, vmlsdavaxq): New.
16037 * config/arm/arm_mve.h (vmladavaq): Remove.
16038 (vmlsdavaxq): Remove.
16039 (vmlsdavaq): Remove.
16040 (vmladavaxq): Remove.
16041 (vmladavaq_p): Remove.
16042 (vmladavaxq_p): Remove.
16043 (vmlsdavaq_p): Remove.
16044 (vmlsdavaxq_p): Remove.
16045 (vmladavaq_u8): Remove.
16046 (vmlsdavaxq_s8): Remove.
16047 (vmlsdavaq_s8): Remove.
16048 (vmladavaxq_s8): Remove.
16049 (vmladavaq_s8): Remove.
16050 (vmladavaq_u16): Remove.
16051 (vmlsdavaxq_s16): Remove.
16052 (vmlsdavaq_s16): Remove.
16053 (vmladavaxq_s16): Remove.
16054 (vmladavaq_s16): Remove.
16055 (vmladavaq_u32): Remove.
16056 (vmlsdavaxq_s32): Remove.
16057 (vmlsdavaq_s32): Remove.
16058 (vmladavaxq_s32): Remove.
16059 (vmladavaq_s32): Remove.
16060 (vmladavaq_p_s8): Remove.
16061 (vmladavaq_p_s32): Remove.
16062 (vmladavaq_p_s16): Remove.
16063 (vmladavaq_p_u8): Remove.
16064 (vmladavaq_p_u32): Remove.
16065 (vmladavaq_p_u16): Remove.
16066 (vmladavaxq_p_s8): Remove.
16067 (vmladavaxq_p_s32): Remove.
16068 (vmladavaxq_p_s16): Remove.
16069 (vmlsdavaq_p_s8): Remove.
16070 (vmlsdavaq_p_s32): Remove.
16071 (vmlsdavaq_p_s16): Remove.
16072 (vmlsdavaxq_p_s8): Remove.
16073 (vmlsdavaxq_p_s32): Remove.
16074 (vmlsdavaxq_p_s16): Remove.
16075 (__arm_vmladavaq_u8): Remove.
16076 (__arm_vmlsdavaxq_s8): Remove.
16077 (__arm_vmlsdavaq_s8): Remove.
16078 (__arm_vmladavaxq_s8): Remove.
16079 (__arm_vmladavaq_s8): Remove.
16080 (__arm_vmladavaq_u16): Remove.
16081 (__arm_vmlsdavaxq_s16): Remove.
16082 (__arm_vmlsdavaq_s16): Remove.
16083 (__arm_vmladavaxq_s16): Remove.
16084 (__arm_vmladavaq_s16): Remove.
16085 (__arm_vmladavaq_u32): Remove.
16086 (__arm_vmlsdavaxq_s32): Remove.
16087 (__arm_vmlsdavaq_s32): Remove.
16088 (__arm_vmladavaxq_s32): Remove.
16089 (__arm_vmladavaq_s32): Remove.
16090 (__arm_vmladavaq_p_s8): Remove.
16091 (__arm_vmladavaq_p_s32): Remove.
16092 (__arm_vmladavaq_p_s16): Remove.
16093 (__arm_vmladavaq_p_u8): Remove.
16094 (__arm_vmladavaq_p_u32): Remove.
16095 (__arm_vmladavaq_p_u16): Remove.
16096 (__arm_vmladavaxq_p_s8): Remove.
16097 (__arm_vmladavaxq_p_s32): Remove.
16098 (__arm_vmladavaxq_p_s16): Remove.
16099 (__arm_vmlsdavaq_p_s8): Remove.
16100 (__arm_vmlsdavaq_p_s32): Remove.
16101 (__arm_vmlsdavaq_p_s16): Remove.
16102 (__arm_vmlsdavaxq_p_s8): Remove.
16103 (__arm_vmlsdavaxq_p_s32): Remove.
16104 (__arm_vmlsdavaxq_p_s16): Remove.
16105 (__arm_vmladavaq): Remove.
16106 (__arm_vmlsdavaxq): Remove.
16107 (__arm_vmlsdavaq): Remove.
16108 (__arm_vmladavaxq): Remove.
16109 (__arm_vmladavaq_p): Remove.
16110 (__arm_vmladavaxq_p): Remove.
16111 (__arm_vmlsdavaq_p): Remove.
16112 (__arm_vmlsdavaxq_p): Remove.
16114 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16116 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
16117 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
16119 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16121 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
16122 (vmlsdavq, vmlsdavxq): New.
16123 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
16124 (vmlsdavq, vmlsdavxq): New.
16125 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
16126 (vmlsdavq, vmlsdavxq): New.
16127 * config/arm/arm_mve.h (vmladavq): Remove.
16128 (vmlsdavxq): Remove.
16129 (vmlsdavq): Remove.
16130 (vmladavxq): Remove.
16131 (vmladavq_p): Remove.
16132 (vmlsdavxq_p): Remove.
16133 (vmlsdavq_p): Remove.
16134 (vmladavxq_p): Remove.
16135 (vmladavq_u8): Remove.
16136 (vmlsdavxq_s8): Remove.
16137 (vmlsdavq_s8): Remove.
16138 (vmladavxq_s8): Remove.
16139 (vmladavq_s8): Remove.
16140 (vmladavq_u16): Remove.
16141 (vmlsdavxq_s16): Remove.
16142 (vmlsdavq_s16): Remove.
16143 (vmladavxq_s16): Remove.
16144 (vmladavq_s16): Remove.
16145 (vmladavq_u32): Remove.
16146 (vmlsdavxq_s32): Remove.
16147 (vmlsdavq_s32): Remove.
16148 (vmladavxq_s32): Remove.
16149 (vmladavq_s32): Remove.
16150 (vmladavq_p_u8): Remove.
16151 (vmlsdavxq_p_s8): Remove.
16152 (vmlsdavq_p_s8): Remove.
16153 (vmladavxq_p_s8): Remove.
16154 (vmladavq_p_s8): Remove.
16155 (vmladavq_p_u16): Remove.
16156 (vmlsdavxq_p_s16): Remove.
16157 (vmlsdavq_p_s16): Remove.
16158 (vmladavxq_p_s16): Remove.
16159 (vmladavq_p_s16): Remove.
16160 (vmladavq_p_u32): Remove.
16161 (vmlsdavxq_p_s32): Remove.
16162 (vmlsdavq_p_s32): Remove.
16163 (vmladavxq_p_s32): Remove.
16164 (vmladavq_p_s32): Remove.
16165 (__arm_vmladavq_u8): Remove.
16166 (__arm_vmlsdavxq_s8): Remove.
16167 (__arm_vmlsdavq_s8): Remove.
16168 (__arm_vmladavxq_s8): Remove.
16169 (__arm_vmladavq_s8): Remove.
16170 (__arm_vmladavq_u16): Remove.
16171 (__arm_vmlsdavxq_s16): Remove.
16172 (__arm_vmlsdavq_s16): Remove.
16173 (__arm_vmladavxq_s16): Remove.
16174 (__arm_vmladavq_s16): Remove.
16175 (__arm_vmladavq_u32): Remove.
16176 (__arm_vmlsdavxq_s32): Remove.
16177 (__arm_vmlsdavq_s32): Remove.
16178 (__arm_vmladavxq_s32): Remove.
16179 (__arm_vmladavq_s32): Remove.
16180 (__arm_vmladavq_p_u8): Remove.
16181 (__arm_vmlsdavxq_p_s8): Remove.
16182 (__arm_vmlsdavq_p_s8): Remove.
16183 (__arm_vmladavxq_p_s8): Remove.
16184 (__arm_vmladavq_p_s8): Remove.
16185 (__arm_vmladavq_p_u16): Remove.
16186 (__arm_vmlsdavxq_p_s16): Remove.
16187 (__arm_vmlsdavq_p_s16): Remove.
16188 (__arm_vmladavxq_p_s16): Remove.
16189 (__arm_vmladavq_p_s16): Remove.
16190 (__arm_vmladavq_p_u32): Remove.
16191 (__arm_vmlsdavxq_p_s32): Remove.
16192 (__arm_vmlsdavq_p_s32): Remove.
16193 (__arm_vmladavxq_p_s32): Remove.
16194 (__arm_vmladavq_p_s32): Remove.
16195 (__arm_vmladavq): Remove.
16196 (__arm_vmlsdavxq): Remove.
16197 (__arm_vmlsdavq): Remove.
16198 (__arm_vmladavxq): Remove.
16199 (__arm_vmladavq_p): Remove.
16200 (__arm_vmlsdavxq_p): Remove.
16201 (__arm_vmlsdavq_p): Remove.
16202 (__arm_vmladavxq_p): Remove.
16204 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16206 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
16207 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
16208 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
16209 vmlsdavax, vmlsdav, vmlsdavx.
16210 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
16211 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
16212 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
16214 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
16215 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
16216 (mve_vmlsdavxq_s<mode>): Merge into ...
16217 (@mve_<mve_insn>q_<supf><mode>): ... this.
16218 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
16219 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
16221 (@mve_<mve_insn>q_<supf><mode>): ... this.
16222 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
16223 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
16224 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
16225 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
16226 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
16228 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
16230 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16232 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
16233 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
16235 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16237 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
16238 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
16239 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
16240 * config/arm/arm_mve.h (vaddlvaq): Remove.
16241 (vaddlvaq_p): Remove.
16242 (vaddlvaq_u32): Remove.
16243 (vaddlvaq_s32): Remove.
16244 (vaddlvaq_p_s32): Remove.
16245 (vaddlvaq_p_u32): Remove.
16246 (__arm_vaddlvaq_u32): Remove.
16247 (__arm_vaddlvaq_s32): Remove.
16248 (__arm_vaddlvaq_p_s32): Remove.
16249 (__arm_vaddlvaq_p_u32): Remove.
16250 (__arm_vaddlvaq): Remove.
16251 (__arm_vaddlvaq_p): Remove.
16253 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16255 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
16256 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
16258 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16260 * config/arm/iterators.md (mve_insn): Add vaddlva.
16261 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
16262 (@mve_<mve_insn>q_<supf>v4si): ... this.
16263 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
16264 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
16266 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
16269 * config/i386/i386.cc (ix86_widen_mult_cost):
16270 Handle V4HImode and V2SImode.
16272 2023-05-11 Andrew Pinski <apinski@marvell.com>
16274 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
16275 defined by a phi node with more than one uses, allow for the
16276 only uses are in that same defining statement.
16278 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
16280 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
16283 2023-05-11 Pan Li <pan2.li@intel.com>
16285 * config/riscv/vector.md: Add comments for simplifying to vmset.
16287 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
16289 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
16291 (v<optab><mode>3): Add vector shift pattern.
16292 * config/riscv/vector-iterators.md: New iterator.
16294 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
16296 * config/riscv/autovec.md: Use renamed functions.
16297 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
16298 (emit_vlmax_reg_op): To this.
16299 (emit_nonvlmax_op): Rename.
16300 (emit_len_op): To this.
16301 (emit_nonvlmax_binop): Rename.
16302 (emit_len_binop): To this.
16303 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
16304 (emit_pred_binop): Remove vlmax_p.
16305 (emit_vlmax_op): Rename.
16306 (emit_vlmax_reg_op): To this.
16307 (emit_nonvlmax_op): Rename.
16308 (emit_len_op): To this.
16309 (emit_nonvlmax_binop): Rename.
16310 (emit_len_binop): To this.
16311 (sew64_scalar_helper): Use renamed functions.
16312 (expand_tuple_move): Use renamed functions.
16313 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
16315 * config/riscv/vector.md: Use renamed functions.
16317 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
16318 Michael Collison <collison@rivosinc.com>
16320 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
16321 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
16322 * config/riscv/riscv-v.cc (emit_pred_op): New function.
16323 (set_expander_dest_and_mask): New function.
16324 (emit_pred_binop): New function.
16325 (emit_nonvlmax_binop): New function.
16327 2023-05-11 Pan Li <pan2.li@intel.com>
16329 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
16330 * gimple-loop-interchange.cc
16331 (tree_loop_interchange::map_inductions_to_loop): Ditto.
16332 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
16333 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
16334 * tree-ssa-loop-manip.cc (create_iv): Ditto.
16335 (tree_transform_and_unroll_loop): Ditto.
16336 (canonicalize_loop_ivs): Ditto.
16337 * tree-ssa-loop-manip.h (create_iv): Ditto.
16338 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
16339 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
16341 (vect_set_loop_condition_normal): Ditto.
16342 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
16343 * tree-vect-stmts.cc (vectorizable_store): Ditto.
16344 (vectorizable_load): Ditto.
16346 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16348 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
16349 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
16350 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
16351 * config/arm/arm_mve.h (vmovlbq): Remove.
16353 (vmovlbq_m): Remove.
16354 (vmovltq_m): Remove.
16355 (vmovlbq_x): Remove.
16356 (vmovltq_x): Remove.
16357 (vmovlbq_s8): Remove.
16358 (vmovlbq_s16): Remove.
16359 (vmovltq_s8): Remove.
16360 (vmovltq_s16): Remove.
16361 (vmovltq_u8): Remove.
16362 (vmovltq_u16): Remove.
16363 (vmovlbq_u8): Remove.
16364 (vmovlbq_u16): Remove.
16365 (vmovlbq_m_s8): Remove.
16366 (vmovltq_m_s8): Remove.
16367 (vmovlbq_m_u8): Remove.
16368 (vmovltq_m_u8): Remove.
16369 (vmovlbq_m_s16): Remove.
16370 (vmovltq_m_s16): Remove.
16371 (vmovlbq_m_u16): Remove.
16372 (vmovltq_m_u16): Remove.
16373 (vmovlbq_x_s8): Remove.
16374 (vmovlbq_x_s16): Remove.
16375 (vmovlbq_x_u8): Remove.
16376 (vmovlbq_x_u16): Remove.
16377 (vmovltq_x_s8): Remove.
16378 (vmovltq_x_s16): Remove.
16379 (vmovltq_x_u8): Remove.
16380 (vmovltq_x_u16): Remove.
16381 (__arm_vmovlbq_s8): Remove.
16382 (__arm_vmovlbq_s16): Remove.
16383 (__arm_vmovltq_s8): Remove.
16384 (__arm_vmovltq_s16): Remove.
16385 (__arm_vmovltq_u8): Remove.
16386 (__arm_vmovltq_u16): Remove.
16387 (__arm_vmovlbq_u8): Remove.
16388 (__arm_vmovlbq_u16): Remove.
16389 (__arm_vmovlbq_m_s8): Remove.
16390 (__arm_vmovltq_m_s8): Remove.
16391 (__arm_vmovlbq_m_u8): Remove.
16392 (__arm_vmovltq_m_u8): Remove.
16393 (__arm_vmovlbq_m_s16): Remove.
16394 (__arm_vmovltq_m_s16): Remove.
16395 (__arm_vmovlbq_m_u16): Remove.
16396 (__arm_vmovltq_m_u16): Remove.
16397 (__arm_vmovlbq_x_s8): Remove.
16398 (__arm_vmovlbq_x_s16): Remove.
16399 (__arm_vmovlbq_x_u8): Remove.
16400 (__arm_vmovlbq_x_u16): Remove.
16401 (__arm_vmovltq_x_s8): Remove.
16402 (__arm_vmovltq_x_s16): Remove.
16403 (__arm_vmovltq_x_u8): Remove.
16404 (__arm_vmovltq_x_u16): Remove.
16405 (__arm_vmovlbq): Remove.
16406 (__arm_vmovltq): Remove.
16407 (__arm_vmovlbq_m): Remove.
16408 (__arm_vmovltq_m): Remove.
16409 (__arm_vmovlbq_x): Remove.
16410 (__arm_vmovltq_x): Remove.
16412 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16414 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
16415 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
16417 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16419 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
16420 (VMOVLBQ, VMOVLTQ): Merge into ...
16421 (VMOVLxQ): ... this.
16422 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
16423 (VMOVLxQ_M): ... this.
16424 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
16425 (mve_vmovlbq_<supf><mode>): Merge into ...
16426 (@mve_<mve_insn>q_<supf><mode>): ... this.
16427 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
16429 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
16431 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16433 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
16434 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
16435 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
16436 * config/arm/arm-mve-builtins-functions.h
16437 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
16438 * config/arm/arm_mve.h (vaddlvq): Remove.
16439 (vaddlvq_p): Remove.
16440 (vaddlvq_s32): Remove.
16441 (vaddlvq_u32): Remove.
16442 (vaddlvq_p_s32): Remove.
16443 (vaddlvq_p_u32): Remove.
16444 (__arm_vaddlvq_s32): Remove.
16445 (__arm_vaddlvq_u32): Remove.
16446 (__arm_vaddlvq_p_s32): Remove.
16447 (__arm_vaddlvq_p_u32): Remove.
16448 (__arm_vaddlvq): Remove.
16449 (__arm_vaddlvq_p): Remove.
16451 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16453 * config/arm/iterators.md (mve_insn): Add vaddlv.
16454 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
16455 (@mve_<mve_insn>q_<supf>v4si): ... this.
16456 (mve_vaddlvq_p_<supf>v4si): Rename into ...
16457 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
16459 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16461 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
16462 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
16464 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16466 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
16467 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
16468 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
16469 * config/arm/arm_mve.h (vaddvaq): Remove.
16470 (vaddvaq_p): Remove.
16471 (vaddvaq_u8): Remove.
16472 (vaddvaq_s8): Remove.
16473 (vaddvaq_u16): Remove.
16474 (vaddvaq_s16): Remove.
16475 (vaddvaq_u32): Remove.
16476 (vaddvaq_s32): Remove.
16477 (vaddvaq_p_u8): Remove.
16478 (vaddvaq_p_s8): Remove.
16479 (vaddvaq_p_u16): Remove.
16480 (vaddvaq_p_s16): Remove.
16481 (vaddvaq_p_u32): Remove.
16482 (vaddvaq_p_s32): Remove.
16483 (__arm_vaddvaq_u8): Remove.
16484 (__arm_vaddvaq_s8): Remove.
16485 (__arm_vaddvaq_u16): Remove.
16486 (__arm_vaddvaq_s16): Remove.
16487 (__arm_vaddvaq_u32): Remove.
16488 (__arm_vaddvaq_s32): Remove.
16489 (__arm_vaddvaq_p_u8): Remove.
16490 (__arm_vaddvaq_p_s8): Remove.
16491 (__arm_vaddvaq_p_u16): Remove.
16492 (__arm_vaddvaq_p_s16): Remove.
16493 (__arm_vaddvaq_p_u32): Remove.
16494 (__arm_vaddvaq_p_s32): Remove.
16495 (__arm_vaddvaq): Remove.
16496 (__arm_vaddvaq_p): Remove.
16498 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16500 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
16501 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
16503 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16505 * config/arm/iterators.md (mve_insn): Add vaddva.
16506 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
16507 (@mve_<mve_insn>q_<supf><mode>): ... this.
16508 (mve_vaddvaq_p_<supf><mode>): Rename into ...
16509 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
16511 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16513 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
16514 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
16515 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
16516 * config/arm/arm_mve.h (vaddvq): Remove.
16517 (vaddvq_p): Remove.
16518 (vaddvq_s8): Remove.
16519 (vaddvq_s16): Remove.
16520 (vaddvq_s32): Remove.
16521 (vaddvq_u8): Remove.
16522 (vaddvq_u16): Remove.
16523 (vaddvq_u32): Remove.
16524 (vaddvq_p_u8): Remove.
16525 (vaddvq_p_s8): Remove.
16526 (vaddvq_p_u16): Remove.
16527 (vaddvq_p_s16): Remove.
16528 (vaddvq_p_u32): Remove.
16529 (vaddvq_p_s32): Remove.
16530 (__arm_vaddvq_s8): Remove.
16531 (__arm_vaddvq_s16): Remove.
16532 (__arm_vaddvq_s32): Remove.
16533 (__arm_vaddvq_u8): Remove.
16534 (__arm_vaddvq_u16): Remove.
16535 (__arm_vaddvq_u32): Remove.
16536 (__arm_vaddvq_p_u8): Remove.
16537 (__arm_vaddvq_p_s8): Remove.
16538 (__arm_vaddvq_p_u16): Remove.
16539 (__arm_vaddvq_p_s16): Remove.
16540 (__arm_vaddvq_p_u32): Remove.
16541 (__arm_vaddvq_p_s32): Remove.
16542 (__arm_vaddvq): Remove.
16543 (__arm_vaddvq_p): Remove.
16545 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16547 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
16548 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
16550 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16552 * config/arm/iterators.md (mve_insn): Add vaddv.
16553 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
16554 (@mve_<mve_insn>q_<supf><mode>): ... this.
16555 (mve_vaddvq_p_<supf><mode>): Rename into ...
16556 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
16557 * config/arm/vec-common.md: Use gen_mve_q instead of
16560 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16562 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
16564 * config/arm/arm-mve-builtins-base.def (vdupq): New.
16565 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
16566 * config/arm/arm_mve.h (vdupq_n): Remove.
16568 (vdupq_n_f16): Remove.
16569 (vdupq_n_f32): Remove.
16570 (vdupq_n_s8): Remove.
16571 (vdupq_n_s16): Remove.
16572 (vdupq_n_s32): Remove.
16573 (vdupq_n_u8): Remove.
16574 (vdupq_n_u16): Remove.
16575 (vdupq_n_u32): Remove.
16576 (vdupq_m_n_u8): Remove.
16577 (vdupq_m_n_s8): Remove.
16578 (vdupq_m_n_u16): Remove.
16579 (vdupq_m_n_s16): Remove.
16580 (vdupq_m_n_u32): Remove.
16581 (vdupq_m_n_s32): Remove.
16582 (vdupq_m_n_f16): Remove.
16583 (vdupq_m_n_f32): Remove.
16584 (vdupq_x_n_s8): Remove.
16585 (vdupq_x_n_s16): Remove.
16586 (vdupq_x_n_s32): Remove.
16587 (vdupq_x_n_u8): Remove.
16588 (vdupq_x_n_u16): Remove.
16589 (vdupq_x_n_u32): Remove.
16590 (vdupq_x_n_f16): Remove.
16591 (vdupq_x_n_f32): Remove.
16592 (__arm_vdupq_n_s8): Remove.
16593 (__arm_vdupq_n_s16): Remove.
16594 (__arm_vdupq_n_s32): Remove.
16595 (__arm_vdupq_n_u8): Remove.
16596 (__arm_vdupq_n_u16): Remove.
16597 (__arm_vdupq_n_u32): Remove.
16598 (__arm_vdupq_m_n_u8): Remove.
16599 (__arm_vdupq_m_n_s8): Remove.
16600 (__arm_vdupq_m_n_u16): Remove.
16601 (__arm_vdupq_m_n_s16): Remove.
16602 (__arm_vdupq_m_n_u32): Remove.
16603 (__arm_vdupq_m_n_s32): Remove.
16604 (__arm_vdupq_x_n_s8): Remove.
16605 (__arm_vdupq_x_n_s16): Remove.
16606 (__arm_vdupq_x_n_s32): Remove.
16607 (__arm_vdupq_x_n_u8): Remove.
16608 (__arm_vdupq_x_n_u16): Remove.
16609 (__arm_vdupq_x_n_u32): Remove.
16610 (__arm_vdupq_n_f16): Remove.
16611 (__arm_vdupq_n_f32): Remove.
16612 (__arm_vdupq_m_n_f16): Remove.
16613 (__arm_vdupq_m_n_f32): Remove.
16614 (__arm_vdupq_x_n_f16): Remove.
16615 (__arm_vdupq_x_n_f32): Remove.
16616 (__arm_vdupq_n): Remove.
16617 (__arm_vdupq_m): Remove.
16619 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16621 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
16622 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
16624 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16626 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
16627 (MVE_FP_N_VDUPQ_ONLY): New.
16628 (mve_insn): Add vdupq.
16629 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
16630 (@mve_<mve_insn>q_n_f<mode>): ... this.
16631 (mve_vdupq_n_<supf><mode>): Rename into ...
16632 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
16633 (mve_vdupq_m_n_<supf><mode>): Rename into ...
16634 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
16635 (mve_vdupq_m_n_f<mode>): Rename into ...
16636 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
16638 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16640 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
16642 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
16644 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
16646 * config/arm/arm_mve.h (vrev16q): Remove.
16649 (vrev64q_m): Remove.
16650 (vrev16q_m): Remove.
16651 (vrev32q_m): Remove.
16652 (vrev16q_x): Remove.
16653 (vrev32q_x): Remove.
16654 (vrev64q_x): Remove.
16655 (vrev64q_f16): Remove.
16656 (vrev64q_f32): Remove.
16657 (vrev32q_f16): Remove.
16658 (vrev16q_s8): Remove.
16659 (vrev32q_s8): Remove.
16660 (vrev32q_s16): Remove.
16661 (vrev64q_s8): Remove.
16662 (vrev64q_s16): Remove.
16663 (vrev64q_s32): Remove.
16664 (vrev64q_u8): Remove.
16665 (vrev64q_u16): Remove.
16666 (vrev64q_u32): Remove.
16667 (vrev32q_u8): Remove.
16668 (vrev32q_u16): Remove.
16669 (vrev16q_u8): Remove.
16670 (vrev64q_m_u8): Remove.
16671 (vrev64q_m_s8): Remove.
16672 (vrev64q_m_u16): Remove.
16673 (vrev64q_m_s16): Remove.
16674 (vrev64q_m_u32): Remove.
16675 (vrev64q_m_s32): Remove.
16676 (vrev16q_m_s8): Remove.
16677 (vrev32q_m_f16): Remove.
16678 (vrev16q_m_u8): Remove.
16679 (vrev32q_m_s8): Remove.
16680 (vrev64q_m_f16): Remove.
16681 (vrev32q_m_u8): Remove.
16682 (vrev32q_m_s16): Remove.
16683 (vrev64q_m_f32): Remove.
16684 (vrev32q_m_u16): Remove.
16685 (vrev16q_x_s8): Remove.
16686 (vrev16q_x_u8): Remove.
16687 (vrev32q_x_s8): Remove.
16688 (vrev32q_x_s16): Remove.
16689 (vrev32q_x_u8): Remove.
16690 (vrev32q_x_u16): Remove.
16691 (vrev64q_x_s8): Remove.
16692 (vrev64q_x_s16): Remove.
16693 (vrev64q_x_s32): Remove.
16694 (vrev64q_x_u8): Remove.
16695 (vrev64q_x_u16): Remove.
16696 (vrev64q_x_u32): Remove.
16697 (vrev32q_x_f16): Remove.
16698 (vrev64q_x_f16): Remove.
16699 (vrev64q_x_f32): Remove.
16700 (__arm_vrev16q_s8): Remove.
16701 (__arm_vrev32q_s8): Remove.
16702 (__arm_vrev32q_s16): Remove.
16703 (__arm_vrev64q_s8): Remove.
16704 (__arm_vrev64q_s16): Remove.
16705 (__arm_vrev64q_s32): Remove.
16706 (__arm_vrev64q_u8): Remove.
16707 (__arm_vrev64q_u16): Remove.
16708 (__arm_vrev64q_u32): Remove.
16709 (__arm_vrev32q_u8): Remove.
16710 (__arm_vrev32q_u16): Remove.
16711 (__arm_vrev16q_u8): Remove.
16712 (__arm_vrev64q_m_u8): Remove.
16713 (__arm_vrev64q_m_s8): Remove.
16714 (__arm_vrev64q_m_u16): Remove.
16715 (__arm_vrev64q_m_s16): Remove.
16716 (__arm_vrev64q_m_u32): Remove.
16717 (__arm_vrev64q_m_s32): Remove.
16718 (__arm_vrev16q_m_s8): Remove.
16719 (__arm_vrev16q_m_u8): Remove.
16720 (__arm_vrev32q_m_s8): Remove.
16721 (__arm_vrev32q_m_u8): Remove.
16722 (__arm_vrev32q_m_s16): Remove.
16723 (__arm_vrev32q_m_u16): Remove.
16724 (__arm_vrev16q_x_s8): Remove.
16725 (__arm_vrev16q_x_u8): Remove.
16726 (__arm_vrev32q_x_s8): Remove.
16727 (__arm_vrev32q_x_s16): Remove.
16728 (__arm_vrev32q_x_u8): Remove.
16729 (__arm_vrev32q_x_u16): Remove.
16730 (__arm_vrev64q_x_s8): Remove.
16731 (__arm_vrev64q_x_s16): Remove.
16732 (__arm_vrev64q_x_s32): Remove.
16733 (__arm_vrev64q_x_u8): Remove.
16734 (__arm_vrev64q_x_u16): Remove.
16735 (__arm_vrev64q_x_u32): Remove.
16736 (__arm_vrev64q_f16): Remove.
16737 (__arm_vrev64q_f32): Remove.
16738 (__arm_vrev32q_f16): Remove.
16739 (__arm_vrev32q_m_f16): Remove.
16740 (__arm_vrev64q_m_f16): Remove.
16741 (__arm_vrev64q_m_f32): Remove.
16742 (__arm_vrev32q_x_f16): Remove.
16743 (__arm_vrev64q_x_f16): Remove.
16744 (__arm_vrev64q_x_f32): Remove.
16745 (__arm_vrev16q): Remove.
16746 (__arm_vrev32q): Remove.
16747 (__arm_vrev64q): Remove.
16748 (__arm_vrev64q_m): Remove.
16749 (__arm_vrev16q_m): Remove.
16750 (__arm_vrev32q_m): Remove.
16751 (__arm_vrev16q_x): Remove.
16752 (__arm_vrev32q_x): Remove.
16753 (__arm_vrev64q_x): Remove.
16755 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16757 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
16758 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
16759 (MVE_FP_M_VREV32Q_ONLY): New iterators.
16760 (mve_insn): Add vrev16q, vrev32q, vrev64q.
16761 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
16762 (@mve_<mve_insn>q_f<mode>): ... this
16763 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
16764 (mve_vrev64q_<supf><mode>): Rename into ...
16765 (@mve_<mve_insn>q_<supf><mode>): ... this.
16766 (mve_vrev32q_<supf><mode>): Rename into
16767 @mve_<mve_insn>q_<supf><mode>.
16768 (mve_vrev16q_<supf>v16qi): Rename into
16769 @mve_<mve_insn>q_<supf><mode>.
16770 (mve_vrev64q_m_<supf><mode>): Rename into
16771 @mve_<mve_insn>q_m_<supf><mode>.
16772 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
16773 (mve_vrev32q_m_<supf><mode>): Rename into
16774 @mve_<mve_insn>q_m_<supf><mode>.
16775 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
16776 (mve_vrev16q_m_<supf>v16qi): Rename into
16777 @mve_<mve_insn>q_m_<supf><mode>.
16779 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
16781 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
16782 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
16783 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
16784 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
16785 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
16786 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
16787 * config/arm/arm-mve-builtins-functions.h (class
16788 unspec_based_mve_function_exact_insn_vcmp): New.
16789 * config/arm/arm-mve-builtins.cc
16790 (function_instance::has_inactive_argument): Handle vcmp.
16791 * config/arm/arm_mve.h (vcmpneq): Remove.
16799 (vcmpneq_m): Remove.
16800 (vcmphiq_m): Remove.
16801 (vcmpeqq_m): Remove.
16802 (vcmpcsq_m): Remove.
16803 (vcmpcsq_m_n): Remove.
16804 (vcmpltq_m): Remove.
16805 (vcmpleq_m): Remove.
16806 (vcmpgtq_m): Remove.
16807 (vcmpgeq_m): Remove.
16808 (vcmpneq_s8): Remove.
16809 (vcmpneq_s16): Remove.
16810 (vcmpneq_s32): Remove.
16811 (vcmpneq_u8): Remove.
16812 (vcmpneq_u16): Remove.
16813 (vcmpneq_u32): Remove.
16814 (vcmpneq_n_u8): Remove.
16815 (vcmphiq_u8): Remove.
16816 (vcmphiq_n_u8): Remove.
16817 (vcmpeqq_u8): Remove.
16818 (vcmpeqq_n_u8): Remove.
16819 (vcmpcsq_u8): Remove.
16820 (vcmpcsq_n_u8): Remove.
16821 (vcmpneq_n_s8): Remove.
16822 (vcmpltq_s8): Remove.
16823 (vcmpltq_n_s8): Remove.
16824 (vcmpleq_s8): Remove.
16825 (vcmpleq_n_s8): Remove.
16826 (vcmpgtq_s8): Remove.
16827 (vcmpgtq_n_s8): Remove.
16828 (vcmpgeq_s8): Remove.
16829 (vcmpgeq_n_s8): Remove.
16830 (vcmpeqq_s8): Remove.
16831 (vcmpeqq_n_s8): Remove.
16832 (vcmpneq_n_u16): Remove.
16833 (vcmphiq_u16): Remove.
16834 (vcmphiq_n_u16): Remove.
16835 (vcmpeqq_u16): Remove.
16836 (vcmpeqq_n_u16): Remove.
16837 (vcmpcsq_u16): Remove.
16838 (vcmpcsq_n_u16): Remove.
16839 (vcmpneq_n_s16): Remove.
16840 (vcmpltq_s16): Remove.
16841 (vcmpltq_n_s16): Remove.
16842 (vcmpleq_s16): Remove.
16843 (vcmpleq_n_s16): Remove.
16844 (vcmpgtq_s16): Remove.
16845 (vcmpgtq_n_s16): Remove.
16846 (vcmpgeq_s16): Remove.
16847 (vcmpgeq_n_s16): Remove.
16848 (vcmpeqq_s16): Remove.
16849 (vcmpeqq_n_s16): Remove.
16850 (vcmpneq_n_u32): Remove.
16851 (vcmphiq_u32): Remove.
16852 (vcmphiq_n_u32): Remove.
16853 (vcmpeqq_u32): Remove.
16854 (vcmpeqq_n_u32): Remove.
16855 (vcmpcsq_u32): Remove.
16856 (vcmpcsq_n_u32): Remove.
16857 (vcmpneq_n_s32): Remove.
16858 (vcmpltq_s32): Remove.
16859 (vcmpltq_n_s32): Remove.
16860 (vcmpleq_s32): Remove.
16861 (vcmpleq_n_s32): Remove.
16862 (vcmpgtq_s32): Remove.
16863 (vcmpgtq_n_s32): Remove.
16864 (vcmpgeq_s32): Remove.
16865 (vcmpgeq_n_s32): Remove.
16866 (vcmpeqq_s32): Remove.
16867 (vcmpeqq_n_s32): Remove.
16868 (vcmpneq_n_f16): Remove.
16869 (vcmpneq_f16): Remove.
16870 (vcmpltq_n_f16): Remove.
16871 (vcmpltq_f16): Remove.
16872 (vcmpleq_n_f16): Remove.
16873 (vcmpleq_f16): Remove.
16874 (vcmpgtq_n_f16): Remove.
16875 (vcmpgtq_f16): Remove.
16876 (vcmpgeq_n_f16): Remove.
16877 (vcmpgeq_f16): Remove.
16878 (vcmpeqq_n_f16): Remove.
16879 (vcmpeqq_f16): Remove.
16880 (vcmpneq_n_f32): Remove.
16881 (vcmpneq_f32): Remove.
16882 (vcmpltq_n_f32): Remove.
16883 (vcmpltq_f32): Remove.
16884 (vcmpleq_n_f32): Remove.
16885 (vcmpleq_f32): Remove.
16886 (vcmpgtq_n_f32): Remove.
16887 (vcmpgtq_f32): Remove.
16888 (vcmpgeq_n_f32): Remove.
16889 (vcmpgeq_f32): Remove.
16890 (vcmpeqq_n_f32): Remove.
16891 (vcmpeqq_f32): Remove.
16892 (vcmpeqq_m_f16): Remove.
16893 (vcmpeqq_m_f32): Remove.
16894 (vcmpneq_m_u8): Remove.
16895 (vcmpneq_m_n_u8): Remove.
16896 (vcmphiq_m_u8): Remove.
16897 (vcmphiq_m_n_u8): Remove.
16898 (vcmpeqq_m_u8): Remove.
16899 (vcmpeqq_m_n_u8): Remove.
16900 (vcmpcsq_m_u8): Remove.
16901 (vcmpcsq_m_n_u8): Remove.
16902 (vcmpneq_m_s8): Remove.
16903 (vcmpneq_m_n_s8): Remove.
16904 (vcmpltq_m_s8): Remove.
16905 (vcmpltq_m_n_s8): Remove.
16906 (vcmpleq_m_s8): Remove.
16907 (vcmpleq_m_n_s8): Remove.
16908 (vcmpgtq_m_s8): Remove.
16909 (vcmpgtq_m_n_s8): Remove.
16910 (vcmpgeq_m_s8): Remove.
16911 (vcmpgeq_m_n_s8): Remove.
16912 (vcmpeqq_m_s8): Remove.
16913 (vcmpeqq_m_n_s8): Remove.
16914 (vcmpneq_m_u16): Remove.
16915 (vcmpneq_m_n_u16): Remove.
16916 (vcmphiq_m_u16): Remove.
16917 (vcmphiq_m_n_u16): Remove.
16918 (vcmpeqq_m_u16): Remove.
16919 (vcmpeqq_m_n_u16): Remove.
16920 (vcmpcsq_m_u16): Remove.
16921 (vcmpcsq_m_n_u16): Remove.
16922 (vcmpneq_m_s16): Remove.
16923 (vcmpneq_m_n_s16): Remove.
16924 (vcmpltq_m_s16): Remove.
16925 (vcmpltq_m_n_s16): Remove.
16926 (vcmpleq_m_s16): Remove.
16927 (vcmpleq_m_n_s16): Remove.
16928 (vcmpgtq_m_s16): Remove.
16929 (vcmpgtq_m_n_s16): Remove.
16930 (vcmpgeq_m_s16): Remove.
16931 (vcmpgeq_m_n_s16): Remove.
16932 (vcmpeqq_m_s16): Remove.
16933 (vcmpeqq_m_n_s16): Remove.
16934 (vcmpneq_m_u32): Remove.
16935 (vcmpneq_m_n_u32): Remove.
16936 (vcmphiq_m_u32): Remove.
16937 (vcmphiq_m_n_u32): Remove.
16938 (vcmpeqq_m_u32): Remove.
16939 (vcmpeqq_m_n_u32): Remove.
16940 (vcmpcsq_m_u32): Remove.
16941 (vcmpcsq_m_n_u32): Remove.
16942 (vcmpneq_m_s32): Remove.
16943 (vcmpneq_m_n_s32): Remove.
16944 (vcmpltq_m_s32): Remove.
16945 (vcmpltq_m_n_s32): Remove.
16946 (vcmpleq_m_s32): Remove.
16947 (vcmpleq_m_n_s32): Remove.
16948 (vcmpgtq_m_s32): Remove.
16949 (vcmpgtq_m_n_s32): Remove.
16950 (vcmpgeq_m_s32): Remove.
16951 (vcmpgeq_m_n_s32): Remove.
16952 (vcmpeqq_m_s32): Remove.
16953 (vcmpeqq_m_n_s32): Remove.
16954 (vcmpeqq_m_n_f16): Remove.
16955 (vcmpgeq_m_f16): Remove.
16956 (vcmpgeq_m_n_f16): Remove.
16957 (vcmpgtq_m_f16): Remove.
16958 (vcmpgtq_m_n_f16): Remove.
16959 (vcmpleq_m_f16): Remove.
16960 (vcmpleq_m_n_f16): Remove.
16961 (vcmpltq_m_f16): Remove.
16962 (vcmpltq_m_n_f16): Remove.
16963 (vcmpneq_m_f16): Remove.
16964 (vcmpneq_m_n_f16): Remove.
16965 (vcmpeqq_m_n_f32): Remove.
16966 (vcmpgeq_m_f32): Remove.
16967 (vcmpgeq_m_n_f32): Remove.
16968 (vcmpgtq_m_f32): Remove.
16969 (vcmpgtq_m_n_f32): Remove.
16970 (vcmpleq_m_f32): Remove.
16971 (vcmpleq_m_n_f32): Remove.
16972 (vcmpltq_m_f32): Remove.
16973 (vcmpltq_m_n_f32): Remove.
16974 (vcmpneq_m_f32): Remove.
16975 (vcmpneq_m_n_f32): Remove.
16976 (__arm_vcmpneq_s8): Remove.
16977 (__arm_vcmpneq_s16): Remove.
16978 (__arm_vcmpneq_s32): Remove.
16979 (__arm_vcmpneq_u8): Remove.
16980 (__arm_vcmpneq_u16): Remove.
16981 (__arm_vcmpneq_u32): Remove.
16982 (__arm_vcmpneq_n_u8): Remove.
16983 (__arm_vcmphiq_u8): Remove.
16984 (__arm_vcmphiq_n_u8): Remove.
16985 (__arm_vcmpeqq_u8): Remove.
16986 (__arm_vcmpeqq_n_u8): Remove.
16987 (__arm_vcmpcsq_u8): Remove.
16988 (__arm_vcmpcsq_n_u8): Remove.
16989 (__arm_vcmpneq_n_s8): Remove.
16990 (__arm_vcmpltq_s8): Remove.
16991 (__arm_vcmpltq_n_s8): Remove.
16992 (__arm_vcmpleq_s8): Remove.
16993 (__arm_vcmpleq_n_s8): Remove.
16994 (__arm_vcmpgtq_s8): Remove.
16995 (__arm_vcmpgtq_n_s8): Remove.
16996 (__arm_vcmpgeq_s8): Remove.
16997 (__arm_vcmpgeq_n_s8): Remove.
16998 (__arm_vcmpeqq_s8): Remove.
16999 (__arm_vcmpeqq_n_s8): Remove.
17000 (__arm_vcmpneq_n_u16): Remove.
17001 (__arm_vcmphiq_u16): Remove.
17002 (__arm_vcmphiq_n_u16): Remove.
17003 (__arm_vcmpeqq_u16): Remove.
17004 (__arm_vcmpeqq_n_u16): Remove.
17005 (__arm_vcmpcsq_u16): Remove.
17006 (__arm_vcmpcsq_n_u16): Remove.
17007 (__arm_vcmpneq_n_s16): Remove.
17008 (__arm_vcmpltq_s16): Remove.
17009 (__arm_vcmpltq_n_s16): Remove.
17010 (__arm_vcmpleq_s16): Remove.
17011 (__arm_vcmpleq_n_s16): Remove.
17012 (__arm_vcmpgtq_s16): Remove.
17013 (__arm_vcmpgtq_n_s16): Remove.
17014 (__arm_vcmpgeq_s16): Remove.
17015 (__arm_vcmpgeq_n_s16): Remove.
17016 (__arm_vcmpeqq_s16): Remove.
17017 (__arm_vcmpeqq_n_s16): Remove.
17018 (__arm_vcmpneq_n_u32): Remove.
17019 (__arm_vcmphiq_u32): Remove.
17020 (__arm_vcmphiq_n_u32): Remove.
17021 (__arm_vcmpeqq_u32): Remove.
17022 (__arm_vcmpeqq_n_u32): Remove.
17023 (__arm_vcmpcsq_u32): Remove.
17024 (__arm_vcmpcsq_n_u32): Remove.
17025 (__arm_vcmpneq_n_s32): Remove.
17026 (__arm_vcmpltq_s32): Remove.
17027 (__arm_vcmpltq_n_s32): Remove.
17028 (__arm_vcmpleq_s32): Remove.
17029 (__arm_vcmpleq_n_s32): Remove.
17030 (__arm_vcmpgtq_s32): Remove.
17031 (__arm_vcmpgtq_n_s32): Remove.
17032 (__arm_vcmpgeq_s32): Remove.
17033 (__arm_vcmpgeq_n_s32): Remove.
17034 (__arm_vcmpeqq_s32): Remove.
17035 (__arm_vcmpeqq_n_s32): Remove.
17036 (__arm_vcmpneq_m_u8): Remove.
17037 (__arm_vcmpneq_m_n_u8): Remove.
17038 (__arm_vcmphiq_m_u8): Remove.
17039 (__arm_vcmphiq_m_n_u8): Remove.
17040 (__arm_vcmpeqq_m_u8): Remove.
17041 (__arm_vcmpeqq_m_n_u8): Remove.
17042 (__arm_vcmpcsq_m_u8): Remove.
17043 (__arm_vcmpcsq_m_n_u8): Remove.
17044 (__arm_vcmpneq_m_s8): Remove.
17045 (__arm_vcmpneq_m_n_s8): Remove.
17046 (__arm_vcmpltq_m_s8): Remove.
17047 (__arm_vcmpltq_m_n_s8): Remove.
17048 (__arm_vcmpleq_m_s8): Remove.
17049 (__arm_vcmpleq_m_n_s8): Remove.
17050 (__arm_vcmpgtq_m_s8): Remove.
17051 (__arm_vcmpgtq_m_n_s8): Remove.
17052 (__arm_vcmpgeq_m_s8): Remove.
17053 (__arm_vcmpgeq_m_n_s8): Remove.
17054 (__arm_vcmpeqq_m_s8): Remove.
17055 (__arm_vcmpeqq_m_n_s8): Remove.
17056 (__arm_vcmpneq_m_u16): Remove.
17057 (__arm_vcmpneq_m_n_u16): Remove.
17058 (__arm_vcmphiq_m_u16): Remove.
17059 (__arm_vcmphiq_m_n_u16): Remove.
17060 (__arm_vcmpeqq_m_u16): Remove.
17061 (__arm_vcmpeqq_m_n_u16): Remove.
17062 (__arm_vcmpcsq_m_u16): Remove.
17063 (__arm_vcmpcsq_m_n_u16): Remove.
17064 (__arm_vcmpneq_m_s16): Remove.
17065 (__arm_vcmpneq_m_n_s16): Remove.
17066 (__arm_vcmpltq_m_s16): Remove.
17067 (__arm_vcmpltq_m_n_s16): Remove.
17068 (__arm_vcmpleq_m_s16): Remove.
17069 (__arm_vcmpleq_m_n_s16): Remove.
17070 (__arm_vcmpgtq_m_s16): Remove.
17071 (__arm_vcmpgtq_m_n_s16): Remove.
17072 (__arm_vcmpgeq_m_s16): Remove.
17073 (__arm_vcmpgeq_m_n_s16): Remove.
17074 (__arm_vcmpeqq_m_s16): Remove.
17075 (__arm_vcmpeqq_m_n_s16): Remove.
17076 (__arm_vcmpneq_m_u32): Remove.
17077 (__arm_vcmpneq_m_n_u32): Remove.
17078 (__arm_vcmphiq_m_u32): Remove.
17079 (__arm_vcmphiq_m_n_u32): Remove.
17080 (__arm_vcmpeqq_m_u32): Remove.
17081 (__arm_vcmpeqq_m_n_u32): Remove.
17082 (__arm_vcmpcsq_m_u32): Remove.
17083 (__arm_vcmpcsq_m_n_u32): Remove.
17084 (__arm_vcmpneq_m_s32): Remove.
17085 (__arm_vcmpneq_m_n_s32): Remove.
17086 (__arm_vcmpltq_m_s32): Remove.
17087 (__arm_vcmpltq_m_n_s32): Remove.
17088 (__arm_vcmpleq_m_s32): Remove.
17089 (__arm_vcmpleq_m_n_s32): Remove.
17090 (__arm_vcmpgtq_m_s32): Remove.
17091 (__arm_vcmpgtq_m_n_s32): Remove.
17092 (__arm_vcmpgeq_m_s32): Remove.
17093 (__arm_vcmpgeq_m_n_s32): Remove.
17094 (__arm_vcmpeqq_m_s32): Remove.
17095 (__arm_vcmpeqq_m_n_s32): Remove.
17096 (__arm_vcmpneq_n_f16): Remove.
17097 (__arm_vcmpneq_f16): Remove.
17098 (__arm_vcmpltq_n_f16): Remove.
17099 (__arm_vcmpltq_f16): Remove.
17100 (__arm_vcmpleq_n_f16): Remove.
17101 (__arm_vcmpleq_f16): Remove.
17102 (__arm_vcmpgtq_n_f16): Remove.
17103 (__arm_vcmpgtq_f16): Remove.
17104 (__arm_vcmpgeq_n_f16): Remove.
17105 (__arm_vcmpgeq_f16): Remove.
17106 (__arm_vcmpeqq_n_f16): Remove.
17107 (__arm_vcmpeqq_f16): Remove.
17108 (__arm_vcmpneq_n_f32): Remove.
17109 (__arm_vcmpneq_f32): Remove.
17110 (__arm_vcmpltq_n_f32): Remove.
17111 (__arm_vcmpltq_f32): Remove.
17112 (__arm_vcmpleq_n_f32): Remove.
17113 (__arm_vcmpleq_f32): Remove.
17114 (__arm_vcmpgtq_n_f32): Remove.
17115 (__arm_vcmpgtq_f32): Remove.
17116 (__arm_vcmpgeq_n_f32): Remove.
17117 (__arm_vcmpgeq_f32): Remove.
17118 (__arm_vcmpeqq_n_f32): Remove.
17119 (__arm_vcmpeqq_f32): Remove.
17120 (__arm_vcmpeqq_m_f16): Remove.
17121 (__arm_vcmpeqq_m_f32): Remove.
17122 (__arm_vcmpeqq_m_n_f16): Remove.
17123 (__arm_vcmpgeq_m_f16): Remove.
17124 (__arm_vcmpgeq_m_n_f16): Remove.
17125 (__arm_vcmpgtq_m_f16): Remove.
17126 (__arm_vcmpgtq_m_n_f16): Remove.
17127 (__arm_vcmpleq_m_f16): Remove.
17128 (__arm_vcmpleq_m_n_f16): Remove.
17129 (__arm_vcmpltq_m_f16): Remove.
17130 (__arm_vcmpltq_m_n_f16): Remove.
17131 (__arm_vcmpneq_m_f16): Remove.
17132 (__arm_vcmpneq_m_n_f16): Remove.
17133 (__arm_vcmpeqq_m_n_f32): Remove.
17134 (__arm_vcmpgeq_m_f32): Remove.
17135 (__arm_vcmpgeq_m_n_f32): Remove.
17136 (__arm_vcmpgtq_m_f32): Remove.
17137 (__arm_vcmpgtq_m_n_f32): Remove.
17138 (__arm_vcmpleq_m_f32): Remove.
17139 (__arm_vcmpleq_m_n_f32): Remove.
17140 (__arm_vcmpltq_m_f32): Remove.
17141 (__arm_vcmpltq_m_n_f32): Remove.
17142 (__arm_vcmpneq_m_f32): Remove.
17143 (__arm_vcmpneq_m_n_f32): Remove.
17144 (__arm_vcmpneq): Remove.
17145 (__arm_vcmphiq): Remove.
17146 (__arm_vcmpeqq): Remove.
17147 (__arm_vcmpcsq): Remove.
17148 (__arm_vcmpltq): Remove.
17149 (__arm_vcmpleq): Remove.
17150 (__arm_vcmpgtq): Remove.
17151 (__arm_vcmpgeq): Remove.
17152 (__arm_vcmpneq_m): Remove.
17153 (__arm_vcmphiq_m): Remove.
17154 (__arm_vcmpeqq_m): Remove.
17155 (__arm_vcmpcsq_m): Remove.
17156 (__arm_vcmpltq_m): Remove.
17157 (__arm_vcmpleq_m): Remove.
17158 (__arm_vcmpgtq_m): Remove.
17159 (__arm_vcmpgeq_m): Remove.
17161 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
17163 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
17164 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
17166 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
17168 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
17169 (MVE_CMP_M_N_F, mve_cmp_op1): New.
17172 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
17173 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
17174 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
17175 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
17176 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
17177 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
17178 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
17179 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
17180 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
17181 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
17183 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
17184 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
17185 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
17186 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
17187 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
17189 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
17190 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
17191 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
17192 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
17193 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
17195 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
17197 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
17198 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
17199 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
17202 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
17204 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
17205 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
17206 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
17207 Simplify parity(rotate(x,y)) as parity(x).
17209 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17211 * config/riscv/autovec.md (@vec_series<mode>): New pattern
17212 * config/riscv/riscv-protos.h (expand_vec_series): New function.
17213 * config/riscv/riscv-v.cc (emit_binop): Ditto.
17214 (emit_index_op): Ditto.
17215 (expand_vec_series): Ditto.
17216 (expand_const_vector): Add series vector handling.
17217 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
17219 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
17221 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
17222 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
17223 (*concat<mode><dwi>3_2): Likewise.
17224 (*concat<mode><dwi>3_3): Likewise.
17225 (*concat<mode><dwi>3_4): Likewise.
17226 (*concat<mode><dwi>3_5): Likewise.
17227 (*concat<mode><dwi>3_6): Likewise.
17228 (*concat<mode><dwi>3_7): Likewise.
17230 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
17233 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
17234 (<insn>v4qiv4hi2): New expander.
17235 (<insn>v2hiv2si2): Ditto.
17236 (<insn>v2qiv2si2): Ditto.
17237 (<insn>v2qiv2hi2): Ditto.
17239 2023-05-10 Jeff Law <jlaw@ventanamicro>
17241 * config/h8300/constraints.md (Q): Make this a special memory
17245 2023-05-10 Jakub Jelinek <jakub@redhat.com>
17248 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
17249 if t is void_list_node.
17251 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17253 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
17254 (aarch64_sqmovun<mode>_insn_be): Delete.
17255 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
17256 (aarch64_sqmovun<mode>): Delete expander.
17258 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17261 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
17263 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
17264 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
17265 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
17267 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17270 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
17272 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
17273 (aarch64_<sur>qadd<mode>): Rename to...
17274 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
17276 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17278 * config/aarch64/aarch64-simd.md
17279 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
17280 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
17281 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
17282 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
17284 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17287 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
17288 (aarch64_xtn<mode>_insn_be): Likewise.
17289 (trunc<mode><Vnarrowq>2): Rename to...
17290 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
17291 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
17292 (aarch64_<su>qmovn<mode>): Likewise.
17293 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
17294 (aarch64_<su>qmovn<mode>_insn_le): Delete.
17295 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
17297 2023-05-10 Li Xu <xuli1@eswincomputing.com>
17299 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
17300 intruction replace null avl with (const_int 0).
17302 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17304 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
17307 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17310 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
17311 (source_equal_p): Fix dead loop in vsetvl avl checking.
17313 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
17315 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
17316 of modeadjusted_dccr.
17318 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17320 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
17321 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
17322 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
17323 * config/arm/arm-mve-builtins.cc
17324 (function_instance::has_inactive_argument): Handle vmaxaq and
17326 * config/arm/arm_mve.h (vminaq): Remove.
17328 (vminaq_m): Remove.
17329 (vmaxaq_m): Remove.
17330 (vminaq_s8): Remove.
17331 (vmaxaq_s8): Remove.
17332 (vminaq_s16): Remove.
17333 (vmaxaq_s16): Remove.
17334 (vminaq_s32): Remove.
17335 (vmaxaq_s32): Remove.
17336 (vminaq_m_s8): Remove.
17337 (vmaxaq_m_s8): Remove.
17338 (vminaq_m_s16): Remove.
17339 (vmaxaq_m_s16): Remove.
17340 (vminaq_m_s32): Remove.
17341 (vmaxaq_m_s32): Remove.
17342 (__arm_vminaq_s8): Remove.
17343 (__arm_vmaxaq_s8): Remove.
17344 (__arm_vminaq_s16): Remove.
17345 (__arm_vmaxaq_s16): Remove.
17346 (__arm_vminaq_s32): Remove.
17347 (__arm_vmaxaq_s32): Remove.
17348 (__arm_vminaq_m_s8): Remove.
17349 (__arm_vmaxaq_m_s8): Remove.
17350 (__arm_vminaq_m_s16): Remove.
17351 (__arm_vmaxaq_m_s16): Remove.
17352 (__arm_vminaq_m_s32): Remove.
17353 (__arm_vmaxaq_m_s32): Remove.
17354 (__arm_vminaq): Remove.
17355 (__arm_vmaxaq): Remove.
17356 (__arm_vminaq_m): Remove.
17357 (__arm_vmaxaq_m): Remove.
17359 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17361 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
17363 (mve_insn): Add vmaxa, vmina.
17364 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
17365 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
17367 (@mve_<mve_insn>q_<supf><mode>): ... this.
17368 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
17369 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
17371 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17373 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
17374 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
17376 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17378 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
17379 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
17380 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
17381 * config/arm/arm-mve-builtins.cc
17382 (function_instance::has_inactive_argument): Handle vmaxnmaq and
17384 * config/arm/arm_mve.h (vminnmaq): Remove.
17385 (vmaxnmaq): Remove.
17386 (vmaxnmaq_m): Remove.
17387 (vminnmaq_m): Remove.
17388 (vminnmaq_f16): Remove.
17389 (vmaxnmaq_f16): Remove.
17390 (vminnmaq_f32): Remove.
17391 (vmaxnmaq_f32): Remove.
17392 (vmaxnmaq_m_f16): Remove.
17393 (vminnmaq_m_f16): Remove.
17394 (vmaxnmaq_m_f32): Remove.
17395 (vminnmaq_m_f32): Remove.
17396 (__arm_vminnmaq_f16): Remove.
17397 (__arm_vmaxnmaq_f16): Remove.
17398 (__arm_vminnmaq_f32): Remove.
17399 (__arm_vmaxnmaq_f32): Remove.
17400 (__arm_vmaxnmaq_m_f16): Remove.
17401 (__arm_vminnmaq_m_f16): Remove.
17402 (__arm_vmaxnmaq_m_f32): Remove.
17403 (__arm_vminnmaq_m_f32): Remove.
17404 (__arm_vminnmaq): Remove.
17405 (__arm_vmaxnmaq): Remove.
17406 (__arm_vmaxnmaq_m): Remove.
17407 (__arm_vminnmaq_m): Remove.
17409 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17411 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
17412 (MVE_VMAXNMA_VMINNMAQ_M): New.
17413 (mve_insn): Add vmaxnma, vminnma.
17414 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
17416 (@mve_<mve_insn>q_f<mode>): ... this.
17417 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
17418 (@mve_<mve_insn>q_m_f<mode>): ... this.
17420 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17422 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
17423 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
17424 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
17425 (vminnmavq, vminnmvq): New.
17426 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
17427 (vminnmavq, vminnmvq): New.
17428 * config/arm/arm_mve.h (vminnmvq): Remove.
17429 (vminnmavq): Remove.
17430 (vmaxnmvq): Remove.
17431 (vmaxnmavq): Remove.
17432 (vmaxnmavq_p): Remove.
17433 (vmaxnmvq_p): Remove.
17434 (vminnmavq_p): Remove.
17435 (vminnmvq_p): Remove.
17436 (vminnmvq_f16): Remove.
17437 (vminnmavq_f16): Remove.
17438 (vmaxnmvq_f16): Remove.
17439 (vmaxnmavq_f16): Remove.
17440 (vminnmvq_f32): Remove.
17441 (vminnmavq_f32): Remove.
17442 (vmaxnmvq_f32): Remove.
17443 (vmaxnmavq_f32): Remove.
17444 (vmaxnmavq_p_f16): Remove.
17445 (vmaxnmvq_p_f16): Remove.
17446 (vminnmavq_p_f16): Remove.
17447 (vminnmvq_p_f16): Remove.
17448 (vmaxnmavq_p_f32): Remove.
17449 (vmaxnmvq_p_f32): Remove.
17450 (vminnmavq_p_f32): Remove.
17451 (vminnmvq_p_f32): Remove.
17452 (__arm_vminnmvq_f16): Remove.
17453 (__arm_vminnmavq_f16): Remove.
17454 (__arm_vmaxnmvq_f16): Remove.
17455 (__arm_vmaxnmavq_f16): Remove.
17456 (__arm_vminnmvq_f32): Remove.
17457 (__arm_vminnmavq_f32): Remove.
17458 (__arm_vmaxnmvq_f32): Remove.
17459 (__arm_vmaxnmavq_f32): Remove.
17460 (__arm_vmaxnmavq_p_f16): Remove.
17461 (__arm_vmaxnmvq_p_f16): Remove.
17462 (__arm_vminnmavq_p_f16): Remove.
17463 (__arm_vminnmvq_p_f16): Remove.
17464 (__arm_vmaxnmavq_p_f32): Remove.
17465 (__arm_vmaxnmvq_p_f32): Remove.
17466 (__arm_vminnmavq_p_f32): Remove.
17467 (__arm_vminnmvq_p_f32): Remove.
17468 (__arm_vminnmvq): Remove.
17469 (__arm_vminnmavq): Remove.
17470 (__arm_vmaxnmvq): Remove.
17471 (__arm_vmaxnmavq): Remove.
17472 (__arm_vmaxnmavq_p): Remove.
17473 (__arm_vmaxnmvq_p): Remove.
17474 (__arm_vminnmavq_p): Remove.
17475 (__arm_vminnmvq_p): Remove.
17476 (__arm_vmaxnmavq_m): Remove.
17477 (__arm_vmaxnmvq_m): Remove.
17479 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17481 * config/arm/arm-mve-builtins-functions.h
17482 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
17484 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17486 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
17487 (MVE_VMAXNMxV_MINNMxVQ_P): New.
17488 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
17489 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
17490 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
17491 (@mve_<mve_insn>q_f<mode>): ... this.
17492 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
17493 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
17494 (@mve_<mve_insn>q_p_f<mode>): ... this.
17496 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17498 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
17499 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
17500 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
17501 * config/arm/arm_mve.h (vminnmq): Remove.
17503 (vmaxnmq_m): Remove.
17504 (vminnmq_m): Remove.
17505 (vminnmq_x): Remove.
17506 (vmaxnmq_x): Remove.
17507 (vminnmq_f16): Remove.
17508 (vmaxnmq_f16): Remove.
17509 (vminnmq_f32): Remove.
17510 (vmaxnmq_f32): Remove.
17511 (vmaxnmq_m_f32): Remove.
17512 (vmaxnmq_m_f16): Remove.
17513 (vminnmq_m_f32): Remove.
17514 (vminnmq_m_f16): Remove.
17515 (vminnmq_x_f16): Remove.
17516 (vminnmq_x_f32): Remove.
17517 (vmaxnmq_x_f16): Remove.
17518 (vmaxnmq_x_f32): Remove.
17519 (__arm_vminnmq_f16): Remove.
17520 (__arm_vmaxnmq_f16): Remove.
17521 (__arm_vminnmq_f32): Remove.
17522 (__arm_vmaxnmq_f32): Remove.
17523 (__arm_vmaxnmq_m_f32): Remove.
17524 (__arm_vmaxnmq_m_f16): Remove.
17525 (__arm_vminnmq_m_f32): Remove.
17526 (__arm_vminnmq_m_f16): Remove.
17527 (__arm_vminnmq_x_f16): Remove.
17528 (__arm_vminnmq_x_f32): Remove.
17529 (__arm_vmaxnmq_x_f16): Remove.
17530 (__arm_vmaxnmq_x_f32): Remove.
17531 (__arm_vminnmq): Remove.
17532 (__arm_vmaxnmq): Remove.
17533 (__arm_vmaxnmq_m): Remove.
17534 (__arm_vminnmq_m): Remove.
17535 (__arm_vminnmq_x): Remove.
17536 (__arm_vmaxnmq_x): Remove.
17538 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17540 * config/arm/iterators.md (MAX_MIN_F): New.
17541 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
17542 (mve_insn): Add vmaxnm, vminnm.
17543 (max_min_f_str): New.
17544 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
17546 (@mve_<max_min_f_str>q_f<mode>): ... this.
17547 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
17548 (@mve_<mve_insn>q_m_f<mode>): ... this.
17550 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17552 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
17553 (smax<mode>3): Likewise.
17555 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17557 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
17558 (FUNCTION_PRED_P_S): New.
17559 (vmaxavq, vminavq, vmaxvq, vminvq): New.
17560 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
17562 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
17564 * config/arm/arm_mve.h (vminvq): Remove.
17566 (vminvq_p): Remove.
17567 (vmaxvq_p): Remove.
17568 (vminvq_u8): Remove.
17569 (vmaxvq_u8): Remove.
17570 (vminvq_s8): Remove.
17571 (vmaxvq_s8): Remove.
17572 (vminvq_u16): Remove.
17573 (vmaxvq_u16): Remove.
17574 (vminvq_s16): Remove.
17575 (vmaxvq_s16): Remove.
17576 (vminvq_u32): Remove.
17577 (vmaxvq_u32): Remove.
17578 (vminvq_s32): Remove.
17579 (vmaxvq_s32): Remove.
17580 (vminvq_p_u8): Remove.
17581 (vmaxvq_p_u8): Remove.
17582 (vminvq_p_s8): Remove.
17583 (vmaxvq_p_s8): Remove.
17584 (vminvq_p_u16): Remove.
17585 (vmaxvq_p_u16): Remove.
17586 (vminvq_p_s16): Remove.
17587 (vmaxvq_p_s16): Remove.
17588 (vminvq_p_u32): Remove.
17589 (vmaxvq_p_u32): Remove.
17590 (vminvq_p_s32): Remove.
17591 (vmaxvq_p_s32): Remove.
17592 (__arm_vminvq_u8): Remove.
17593 (__arm_vmaxvq_u8): Remove.
17594 (__arm_vminvq_s8): Remove.
17595 (__arm_vmaxvq_s8): Remove.
17596 (__arm_vminvq_u16): Remove.
17597 (__arm_vmaxvq_u16): Remove.
17598 (__arm_vminvq_s16): Remove.
17599 (__arm_vmaxvq_s16): Remove.
17600 (__arm_vminvq_u32): Remove.
17601 (__arm_vmaxvq_u32): Remove.
17602 (__arm_vminvq_s32): Remove.
17603 (__arm_vmaxvq_s32): Remove.
17604 (__arm_vminvq_p_u8): Remove.
17605 (__arm_vmaxvq_p_u8): Remove.
17606 (__arm_vminvq_p_s8): Remove.
17607 (__arm_vmaxvq_p_s8): Remove.
17608 (__arm_vminvq_p_u16): Remove.
17609 (__arm_vmaxvq_p_u16): Remove.
17610 (__arm_vminvq_p_s16): Remove.
17611 (__arm_vmaxvq_p_s16): Remove.
17612 (__arm_vminvq_p_u32): Remove.
17613 (__arm_vmaxvq_p_u32): Remove.
17614 (__arm_vminvq_p_s32): Remove.
17615 (__arm_vmaxvq_p_s32): Remove.
17616 (__arm_vminvq): Remove.
17617 (__arm_vmaxvq): Remove.
17618 (__arm_vminvq_p): Remove.
17619 (__arm_vmaxvq_p): Remove.
17622 (vminavq_p): Remove.
17623 (vmaxavq_p): Remove.
17624 (vminavq_s8): Remove.
17625 (vmaxavq_s8): Remove.
17626 (vminavq_s16): Remove.
17627 (vmaxavq_s16): Remove.
17628 (vminavq_s32): Remove.
17629 (vmaxavq_s32): Remove.
17630 (vminavq_p_s8): Remove.
17631 (vmaxavq_p_s8): Remove.
17632 (vminavq_p_s16): Remove.
17633 (vmaxavq_p_s16): Remove.
17634 (vminavq_p_s32): Remove.
17635 (vmaxavq_p_s32): Remove.
17636 (__arm_vminavq_s8): Remove.
17637 (__arm_vmaxavq_s8): Remove.
17638 (__arm_vminavq_s16): Remove.
17639 (__arm_vmaxavq_s16): Remove.
17640 (__arm_vminavq_s32): Remove.
17641 (__arm_vmaxavq_s32): Remove.
17642 (__arm_vminavq_p_s8): Remove.
17643 (__arm_vmaxavq_p_s8): Remove.
17644 (__arm_vminavq_p_s16): Remove.
17645 (__arm_vmaxavq_p_s16): Remove.
17646 (__arm_vminavq_p_s32): Remove.
17647 (__arm_vmaxavq_p_s32): Remove.
17648 (__arm_vminavq): Remove.
17649 (__arm_vmaxavq): Remove.
17650 (__arm_vminavq_p): Remove.
17651 (__arm_vmaxavq_p): Remove.
17653 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17655 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
17656 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
17657 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
17658 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
17659 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
17660 (@mve_<mve_insn>q_<supf><mode>): ... this.
17661 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
17662 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
17663 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
17665 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17667 * config/arm/arm-mve-builtins-functions.h (class
17668 unspec_mve_function_exact_insn_pred_p): New.
17670 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17672 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
17673 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
17675 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17677 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
17678 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
17680 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
17682 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
17684 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
17685 (ADJUST_REG_ALLOC_ORDER): Likewise.
17686 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
17688 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
17689 Upa rather than Upl for unpredicated movprfx alternatives.
17691 2023-05-09 Jeff Law <jlaw@ventanamicro>
17693 * config/h8300/testcompare.md: Add peephole2 which uses a memory
17694 load to set flags, thus eliminating a compare against zero.
17696 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17698 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
17699 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
17700 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
17701 * config/arm/arm_mve.h (vshlltq): Remove.
17703 (vshllbq_m): Remove.
17704 (vshlltq_m): Remove.
17705 (vshllbq_x): Remove.
17706 (vshlltq_x): Remove.
17707 (vshlltq_n_u8): Remove.
17708 (vshllbq_n_u8): Remove.
17709 (vshlltq_n_s8): Remove.
17710 (vshllbq_n_s8): Remove.
17711 (vshlltq_n_u16): Remove.
17712 (vshllbq_n_u16): Remove.
17713 (vshlltq_n_s16): Remove.
17714 (vshllbq_n_s16): Remove.
17715 (vshllbq_m_n_s8): Remove.
17716 (vshllbq_m_n_s16): Remove.
17717 (vshllbq_m_n_u8): Remove.
17718 (vshllbq_m_n_u16): Remove.
17719 (vshlltq_m_n_s8): Remove.
17720 (vshlltq_m_n_s16): Remove.
17721 (vshlltq_m_n_u8): Remove.
17722 (vshlltq_m_n_u16): Remove.
17723 (vshllbq_x_n_s8): Remove.
17724 (vshllbq_x_n_s16): Remove.
17725 (vshllbq_x_n_u8): Remove.
17726 (vshllbq_x_n_u16): Remove.
17727 (vshlltq_x_n_s8): Remove.
17728 (vshlltq_x_n_s16): Remove.
17729 (vshlltq_x_n_u8): Remove.
17730 (vshlltq_x_n_u16): Remove.
17731 (__arm_vshlltq_n_u8): Remove.
17732 (__arm_vshllbq_n_u8): Remove.
17733 (__arm_vshlltq_n_s8): Remove.
17734 (__arm_vshllbq_n_s8): Remove.
17735 (__arm_vshlltq_n_u16): Remove.
17736 (__arm_vshllbq_n_u16): Remove.
17737 (__arm_vshlltq_n_s16): Remove.
17738 (__arm_vshllbq_n_s16): Remove.
17739 (__arm_vshllbq_m_n_s8): Remove.
17740 (__arm_vshllbq_m_n_s16): Remove.
17741 (__arm_vshllbq_m_n_u8): Remove.
17742 (__arm_vshllbq_m_n_u16): Remove.
17743 (__arm_vshlltq_m_n_s8): Remove.
17744 (__arm_vshlltq_m_n_s16): Remove.
17745 (__arm_vshlltq_m_n_u8): Remove.
17746 (__arm_vshlltq_m_n_u16): Remove.
17747 (__arm_vshllbq_x_n_s8): Remove.
17748 (__arm_vshllbq_x_n_s16): Remove.
17749 (__arm_vshllbq_x_n_u8): Remove.
17750 (__arm_vshllbq_x_n_u16): Remove.
17751 (__arm_vshlltq_x_n_s8): Remove.
17752 (__arm_vshlltq_x_n_s16): Remove.
17753 (__arm_vshlltq_x_n_u8): Remove.
17754 (__arm_vshlltq_x_n_u16): Remove.
17755 (__arm_vshlltq): Remove.
17756 (__arm_vshllbq): Remove.
17757 (__arm_vshllbq_m): Remove.
17758 (__arm_vshlltq_m): Remove.
17759 (__arm_vshllbq_x): Remove.
17760 (__arm_vshlltq_x): Remove.
17762 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17764 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
17765 (VSHLLBQ_N, VSHLLTQ_N): Remove.
17767 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
17768 (VSHLLxQ_M_N): New.
17769 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
17770 (mve_vshlltq_n_<supf><mode>): Merge into ...
17771 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17772 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
17774 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17776 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17778 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
17779 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
17781 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17783 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
17784 (vqmovntq, vqmovunbq, vqmovuntq): New.
17785 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
17786 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
17787 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
17788 (vqmovntq, vqmovunbq, vqmovuntq): New.
17789 * config/arm/arm-mve-builtins.cc
17790 (function_instance::has_inactive_argument): Handle vmovnbq,
17791 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
17792 * config/arm/arm_mve.h (vqmovntq): Remove.
17793 (vqmovnbq): Remove.
17794 (vqmovnbq_m): Remove.
17795 (vqmovntq_m): Remove.
17796 (vqmovntq_u16): Remove.
17797 (vqmovnbq_u16): Remove.
17798 (vqmovntq_s16): Remove.
17799 (vqmovnbq_s16): Remove.
17800 (vqmovntq_u32): Remove.
17801 (vqmovnbq_u32): Remove.
17802 (vqmovntq_s32): Remove.
17803 (vqmovnbq_s32): Remove.
17804 (vqmovnbq_m_s16): Remove.
17805 (vqmovntq_m_s16): Remove.
17806 (vqmovnbq_m_u16): Remove.
17807 (vqmovntq_m_u16): Remove.
17808 (vqmovnbq_m_s32): Remove.
17809 (vqmovntq_m_s32): Remove.
17810 (vqmovnbq_m_u32): Remove.
17811 (vqmovntq_m_u32): Remove.
17812 (__arm_vqmovntq_u16): Remove.
17813 (__arm_vqmovnbq_u16): Remove.
17814 (__arm_vqmovntq_s16): Remove.
17815 (__arm_vqmovnbq_s16): Remove.
17816 (__arm_vqmovntq_u32): Remove.
17817 (__arm_vqmovnbq_u32): Remove.
17818 (__arm_vqmovntq_s32): Remove.
17819 (__arm_vqmovnbq_s32): Remove.
17820 (__arm_vqmovnbq_m_s16): Remove.
17821 (__arm_vqmovntq_m_s16): Remove.
17822 (__arm_vqmovnbq_m_u16): Remove.
17823 (__arm_vqmovntq_m_u16): Remove.
17824 (__arm_vqmovnbq_m_s32): Remove.
17825 (__arm_vqmovntq_m_s32): Remove.
17826 (__arm_vqmovnbq_m_u32): Remove.
17827 (__arm_vqmovntq_m_u32): Remove.
17828 (__arm_vqmovntq): Remove.
17829 (__arm_vqmovnbq): Remove.
17830 (__arm_vqmovnbq_m): Remove.
17831 (__arm_vqmovntq_m): Remove.
17834 (vmovnbq_m): Remove.
17835 (vmovntq_m): Remove.
17836 (vmovntq_u16): Remove.
17837 (vmovnbq_u16): Remove.
17838 (vmovntq_s16): Remove.
17839 (vmovnbq_s16): Remove.
17840 (vmovntq_u32): Remove.
17841 (vmovnbq_u32): Remove.
17842 (vmovntq_s32): Remove.
17843 (vmovnbq_s32): Remove.
17844 (vmovnbq_m_s16): Remove.
17845 (vmovntq_m_s16): Remove.
17846 (vmovnbq_m_u16): Remove.
17847 (vmovntq_m_u16): Remove.
17848 (vmovnbq_m_s32): Remove.
17849 (vmovntq_m_s32): Remove.
17850 (vmovnbq_m_u32): Remove.
17851 (vmovntq_m_u32): Remove.
17852 (__arm_vmovntq_u16): Remove.
17853 (__arm_vmovnbq_u16): Remove.
17854 (__arm_vmovntq_s16): Remove.
17855 (__arm_vmovnbq_s16): Remove.
17856 (__arm_vmovntq_u32): Remove.
17857 (__arm_vmovnbq_u32): Remove.
17858 (__arm_vmovntq_s32): Remove.
17859 (__arm_vmovnbq_s32): Remove.
17860 (__arm_vmovnbq_m_s16): Remove.
17861 (__arm_vmovntq_m_s16): Remove.
17862 (__arm_vmovnbq_m_u16): Remove.
17863 (__arm_vmovntq_m_u16): Remove.
17864 (__arm_vmovnbq_m_s32): Remove.
17865 (__arm_vmovntq_m_s32): Remove.
17866 (__arm_vmovnbq_m_u32): Remove.
17867 (__arm_vmovntq_m_u32): Remove.
17868 (__arm_vmovntq): Remove.
17869 (__arm_vmovnbq): Remove.
17870 (__arm_vmovnbq_m): Remove.
17871 (__arm_vmovntq_m): Remove.
17872 (vqmovuntq): Remove.
17873 (vqmovunbq): Remove.
17874 (vqmovunbq_m): Remove.
17875 (vqmovuntq_m): Remove.
17876 (vqmovuntq_s16): Remove.
17877 (vqmovunbq_s16): Remove.
17878 (vqmovuntq_s32): Remove.
17879 (vqmovunbq_s32): Remove.
17880 (vqmovunbq_m_s16): Remove.
17881 (vqmovuntq_m_s16): Remove.
17882 (vqmovunbq_m_s32): Remove.
17883 (vqmovuntq_m_s32): Remove.
17884 (__arm_vqmovuntq_s16): Remove.
17885 (__arm_vqmovunbq_s16): Remove.
17886 (__arm_vqmovuntq_s32): Remove.
17887 (__arm_vqmovunbq_s32): Remove.
17888 (__arm_vqmovunbq_m_s16): Remove.
17889 (__arm_vqmovuntq_m_s16): Remove.
17890 (__arm_vqmovunbq_m_s32): Remove.
17891 (__arm_vqmovuntq_m_s32): Remove.
17892 (__arm_vqmovuntq): Remove.
17893 (__arm_vqmovunbq): Remove.
17894 (__arm_vqmovunbq_m): Remove.
17895 (__arm_vqmovuntq_m): Remove.
17897 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17899 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
17900 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
17903 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
17905 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
17906 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
17907 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
17908 (mve_vqmovuntq_s<mode>): Merge into ...
17909 (@mve_<mve_insn>q_<supf><mode>): ... this.
17910 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
17911 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
17912 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
17913 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
17915 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17917 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
17918 (binary_move_narrow_unsigned): New.
17919 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
17920 (binary_move_narrow_unsigned): New.
17922 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
17924 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
17925 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
17926 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
17927 (vrndpq, vrndq, vrndxq): New.
17928 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
17929 (vrndpq, vrndq, vrndxq): New.
17930 * config/arm/arm_mve.h (vrndxq): Remove.
17936 (vrndaq_m): Remove.
17937 (vrndmq_m): Remove.
17938 (vrndnq_m): Remove.
17939 (vrndpq_m): Remove.
17941 (vrndxq_m): Remove.
17943 (vrndnq_x): Remove.
17944 (vrndmq_x): Remove.
17945 (vrndpq_x): Remove.
17946 (vrndaq_x): Remove.
17947 (vrndxq_x): Remove.
17948 (vrndxq_f16): Remove.
17949 (vrndxq_f32): Remove.
17950 (vrndq_f16): Remove.
17951 (vrndq_f32): Remove.
17952 (vrndpq_f16): Remove.
17953 (vrndpq_f32): Remove.
17954 (vrndnq_f16): Remove.
17955 (vrndnq_f32): Remove.
17956 (vrndmq_f16): Remove.
17957 (vrndmq_f32): Remove.
17958 (vrndaq_f16): Remove.
17959 (vrndaq_f32): Remove.
17960 (vrndaq_m_f16): Remove.
17961 (vrndmq_m_f16): Remove.
17962 (vrndnq_m_f16): Remove.
17963 (vrndpq_m_f16): Remove.
17964 (vrndq_m_f16): Remove.
17965 (vrndxq_m_f16): Remove.
17966 (vrndaq_m_f32): Remove.
17967 (vrndmq_m_f32): Remove.
17968 (vrndnq_m_f32): Remove.
17969 (vrndpq_m_f32): Remove.
17970 (vrndq_m_f32): Remove.
17971 (vrndxq_m_f32): Remove.
17972 (vrndq_x_f16): Remove.
17973 (vrndq_x_f32): Remove.
17974 (vrndnq_x_f16): Remove.
17975 (vrndnq_x_f32): Remove.
17976 (vrndmq_x_f16): Remove.
17977 (vrndmq_x_f32): Remove.
17978 (vrndpq_x_f16): Remove.
17979 (vrndpq_x_f32): Remove.
17980 (vrndaq_x_f16): Remove.
17981 (vrndaq_x_f32): Remove.
17982 (vrndxq_x_f16): Remove.
17983 (vrndxq_x_f32): Remove.
17984 (__arm_vrndxq_f16): Remove.
17985 (__arm_vrndxq_f32): Remove.
17986 (__arm_vrndq_f16): Remove.
17987 (__arm_vrndq_f32): Remove.
17988 (__arm_vrndpq_f16): Remove.
17989 (__arm_vrndpq_f32): Remove.
17990 (__arm_vrndnq_f16): Remove.
17991 (__arm_vrndnq_f32): Remove.
17992 (__arm_vrndmq_f16): Remove.
17993 (__arm_vrndmq_f32): Remove.
17994 (__arm_vrndaq_f16): Remove.
17995 (__arm_vrndaq_f32): Remove.
17996 (__arm_vrndaq_m_f16): Remove.
17997 (__arm_vrndmq_m_f16): Remove.
17998 (__arm_vrndnq_m_f16): Remove.
17999 (__arm_vrndpq_m_f16): Remove.
18000 (__arm_vrndq_m_f16): Remove.
18001 (__arm_vrndxq_m_f16): Remove.
18002 (__arm_vrndaq_m_f32): Remove.
18003 (__arm_vrndmq_m_f32): Remove.
18004 (__arm_vrndnq_m_f32): Remove.
18005 (__arm_vrndpq_m_f32): Remove.
18006 (__arm_vrndq_m_f32): Remove.
18007 (__arm_vrndxq_m_f32): Remove.
18008 (__arm_vrndq_x_f16): Remove.
18009 (__arm_vrndq_x_f32): Remove.
18010 (__arm_vrndnq_x_f16): Remove.
18011 (__arm_vrndnq_x_f32): Remove.
18012 (__arm_vrndmq_x_f16): Remove.
18013 (__arm_vrndmq_x_f32): Remove.
18014 (__arm_vrndpq_x_f16): Remove.
18015 (__arm_vrndpq_x_f32): Remove.
18016 (__arm_vrndaq_x_f16): Remove.
18017 (__arm_vrndaq_x_f32): Remove.
18018 (__arm_vrndxq_x_f16): Remove.
18019 (__arm_vrndxq_x_f32): Remove.
18020 (__arm_vrndxq): Remove.
18021 (__arm_vrndq): Remove.
18022 (__arm_vrndpq): Remove.
18023 (__arm_vrndnq): Remove.
18024 (__arm_vrndmq): Remove.
18025 (__arm_vrndaq): Remove.
18026 (__arm_vrndaq_m): Remove.
18027 (__arm_vrndmq_m): Remove.
18028 (__arm_vrndnq_m): Remove.
18029 (__arm_vrndpq_m): Remove.
18030 (__arm_vrndq_m): Remove.
18031 (__arm_vrndxq_m): Remove.
18032 (__arm_vrndq_x): Remove.
18033 (__arm_vrndnq_x): Remove.
18034 (__arm_vrndmq_x): Remove.
18035 (__arm_vrndpq_x): Remove.
18036 (__arm_vrndaq_x): Remove.
18037 (__arm_vrndxq_x): Remove.
18039 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
18041 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
18042 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
18043 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
18044 (vclzq, vqabsq, vqnegq): New.
18045 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
18046 (vqabsq, vqnegq): New.
18047 * config/arm/arm_mve.h (vabsq): Remove.
18050 (vabsq_f16): Remove.
18051 (vabsq_f32): Remove.
18052 (vabsq_s8): Remove.
18053 (vabsq_s16): Remove.
18054 (vabsq_s32): Remove.
18055 (vabsq_m_s8): Remove.
18056 (vabsq_m_s16): Remove.
18057 (vabsq_m_s32): Remove.
18058 (vabsq_m_f16): Remove.
18059 (vabsq_m_f32): Remove.
18060 (vabsq_x_s8): Remove.
18061 (vabsq_x_s16): Remove.
18062 (vabsq_x_s32): Remove.
18063 (vabsq_x_f16): Remove.
18064 (vabsq_x_f32): Remove.
18065 (__arm_vabsq_s8): Remove.
18066 (__arm_vabsq_s16): Remove.
18067 (__arm_vabsq_s32): Remove.
18068 (__arm_vabsq_m_s8): Remove.
18069 (__arm_vabsq_m_s16): Remove.
18070 (__arm_vabsq_m_s32): Remove.
18071 (__arm_vabsq_x_s8): Remove.
18072 (__arm_vabsq_x_s16): Remove.
18073 (__arm_vabsq_x_s32): Remove.
18074 (__arm_vabsq_f16): Remove.
18075 (__arm_vabsq_f32): Remove.
18076 (__arm_vabsq_m_f16): Remove.
18077 (__arm_vabsq_m_f32): Remove.
18078 (__arm_vabsq_x_f16): Remove.
18079 (__arm_vabsq_x_f32): Remove.
18080 (__arm_vabsq): Remove.
18081 (__arm_vabsq_m): Remove.
18082 (__arm_vabsq_x): Remove.
18086 (vnegq_f16): Remove.
18087 (vnegq_f32): Remove.
18088 (vnegq_s8): Remove.
18089 (vnegq_s16): Remove.
18090 (vnegq_s32): Remove.
18091 (vnegq_m_s8): Remove.
18092 (vnegq_m_s16): Remove.
18093 (vnegq_m_s32): Remove.
18094 (vnegq_m_f16): Remove.
18095 (vnegq_m_f32): Remove.
18096 (vnegq_x_s8): Remove.
18097 (vnegq_x_s16): Remove.
18098 (vnegq_x_s32): Remove.
18099 (vnegq_x_f16): Remove.
18100 (vnegq_x_f32): Remove.
18101 (__arm_vnegq_s8): Remove.
18102 (__arm_vnegq_s16): Remove.
18103 (__arm_vnegq_s32): Remove.
18104 (__arm_vnegq_m_s8): Remove.
18105 (__arm_vnegq_m_s16): Remove.
18106 (__arm_vnegq_m_s32): Remove.
18107 (__arm_vnegq_x_s8): Remove.
18108 (__arm_vnegq_x_s16): Remove.
18109 (__arm_vnegq_x_s32): Remove.
18110 (__arm_vnegq_f16): Remove.
18111 (__arm_vnegq_f32): Remove.
18112 (__arm_vnegq_m_f16): Remove.
18113 (__arm_vnegq_m_f32): Remove.
18114 (__arm_vnegq_x_f16): Remove.
18115 (__arm_vnegq_x_f32): Remove.
18116 (__arm_vnegq): Remove.
18117 (__arm_vnegq_m): Remove.
18118 (__arm_vnegq_x): Remove.
18122 (vclsq_s8): Remove.
18123 (vclsq_s16): Remove.
18124 (vclsq_s32): Remove.
18125 (vclsq_m_s8): Remove.
18126 (vclsq_m_s16): Remove.
18127 (vclsq_m_s32): Remove.
18128 (vclsq_x_s8): Remove.
18129 (vclsq_x_s16): Remove.
18130 (vclsq_x_s32): Remove.
18131 (__arm_vclsq_s8): Remove.
18132 (__arm_vclsq_s16): Remove.
18133 (__arm_vclsq_s32): Remove.
18134 (__arm_vclsq_m_s8): Remove.
18135 (__arm_vclsq_m_s16): Remove.
18136 (__arm_vclsq_m_s32): Remove.
18137 (__arm_vclsq_x_s8): Remove.
18138 (__arm_vclsq_x_s16): Remove.
18139 (__arm_vclsq_x_s32): Remove.
18140 (__arm_vclsq): Remove.
18141 (__arm_vclsq_m): Remove.
18142 (__arm_vclsq_x): Remove.
18146 (vclzq_s8): Remove.
18147 (vclzq_s16): Remove.
18148 (vclzq_s32): Remove.
18149 (vclzq_u8): Remove.
18150 (vclzq_u16): Remove.
18151 (vclzq_u32): Remove.
18152 (vclzq_m_u8): Remove.
18153 (vclzq_m_s8): Remove.
18154 (vclzq_m_u16): Remove.
18155 (vclzq_m_s16): Remove.
18156 (vclzq_m_u32): Remove.
18157 (vclzq_m_s32): Remove.
18158 (vclzq_x_s8): Remove.
18159 (vclzq_x_s16): Remove.
18160 (vclzq_x_s32): Remove.
18161 (vclzq_x_u8): Remove.
18162 (vclzq_x_u16): Remove.
18163 (vclzq_x_u32): Remove.
18164 (__arm_vclzq_s8): Remove.
18165 (__arm_vclzq_s16): Remove.
18166 (__arm_vclzq_s32): Remove.
18167 (__arm_vclzq_u8): Remove.
18168 (__arm_vclzq_u16): Remove.
18169 (__arm_vclzq_u32): Remove.
18170 (__arm_vclzq_m_u8): Remove.
18171 (__arm_vclzq_m_s8): Remove.
18172 (__arm_vclzq_m_u16): Remove.
18173 (__arm_vclzq_m_s16): Remove.
18174 (__arm_vclzq_m_u32): Remove.
18175 (__arm_vclzq_m_s32): Remove.
18176 (__arm_vclzq_x_s8): Remove.
18177 (__arm_vclzq_x_s16): Remove.
18178 (__arm_vclzq_x_s32): Remove.
18179 (__arm_vclzq_x_u8): Remove.
18180 (__arm_vclzq_x_u16): Remove.
18181 (__arm_vclzq_x_u32): Remove.
18182 (__arm_vclzq): Remove.
18183 (__arm_vclzq_m): Remove.
18184 (__arm_vclzq_x): Remove.
18187 (vqnegq_m): Remove.
18188 (vqabsq_m): Remove.
18189 (vqabsq_s8): Remove.
18190 (vqabsq_s16): Remove.
18191 (vqabsq_s32): Remove.
18192 (vqnegq_s8): Remove.
18193 (vqnegq_s16): Remove.
18194 (vqnegq_s32): Remove.
18195 (vqnegq_m_s8): Remove.
18196 (vqabsq_m_s8): Remove.
18197 (vqnegq_m_s16): Remove.
18198 (vqabsq_m_s16): Remove.
18199 (vqnegq_m_s32): Remove.
18200 (vqabsq_m_s32): Remove.
18201 (__arm_vqabsq_s8): Remove.
18202 (__arm_vqabsq_s16): Remove.
18203 (__arm_vqabsq_s32): Remove.
18204 (__arm_vqnegq_s8): Remove.
18205 (__arm_vqnegq_s16): Remove.
18206 (__arm_vqnegq_s32): Remove.
18207 (__arm_vqnegq_m_s8): Remove.
18208 (__arm_vqabsq_m_s8): Remove.
18209 (__arm_vqnegq_m_s16): Remove.
18210 (__arm_vqabsq_m_s16): Remove.
18211 (__arm_vqnegq_m_s32): Remove.
18212 (__arm_vqabsq_m_s32): Remove.
18213 (__arm_vqabsq): Remove.
18214 (__arm_vqnegq): Remove.
18215 (__arm_vqnegq_m): Remove.
18216 (__arm_vqabsq_m): Remove.
18218 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
18220 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
18221 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
18222 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
18223 vrndm, vrndn, vrndp, vrnd, vrndx.
18224 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
18225 VQABSQ_M_S, VQNEGQ_M_S.
18227 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
18228 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
18229 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
18230 (@mve_<mve_insn>q_f<mode>): ... this.
18231 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
18232 (mve_v<absneg_str>q_f<mode>): ... this.
18233 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
18234 (mve_v<absneg_str>q_s<mode>): ... this.
18235 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
18236 (@mve_<mve_insn>q_<supf><mode>): ... this.
18237 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
18238 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
18239 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
18240 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
18241 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
18242 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
18243 (mve_vrndxq_m_f<mode>): Merge into ...
18244 (@mve_<mve_insn>q_m_f<mode>): ... this.
18246 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
18248 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
18249 * config/arm/arm-mve-builtins-shapes.h (unary): New.
18251 2023-05-09 Jakub Jelinek <jakub@redhat.com>
18253 * mux-utils.h: Fix comment typo, avoides -> avoids.
18255 2023-05-09 Jakub Jelinek <jakub@redhat.com>
18257 PR tree-optimization/109778
18258 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
18259 wi::zext (x, width) rather than x if width != precision, rather
18260 than using wi::zext (right, width) after the shift.
18261 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
18262 of wi::lrotate or wi::rrotate.
18264 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
18266 * genmatch.cc (get_out_file): Make static and rename to ...
18267 (choose_output): ... this. Reimplement. Update all uses ...
18268 (decision_tree::gen): ... here and ...
18271 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
18273 * genmatch.cc (showUsage): Reimplement as ...
18274 (usage): ...this. Adjust all uses.
18275 (main): Print usage when no arguments. Add missing 'return 1'.
18277 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
18279 * genmatch.cc (header_file): Make static.
18280 (emit_func): Rename to...
18281 (fp_decl): ... this. Adjust all uses.
18282 (fp_decl_done): New function. Use it...
18283 (decision_tree::gen): ... here and...
18284 (write_predicate): ... here.
18287 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
18289 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
18292 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
18293 Uros Bizjak <ubizjak@gmail.com>
18295 * config/i386/i386.md (any_or_plus): Move definition earlier.
18296 (*insvti_highpart_1): New define_insn_and_split to overwrite
18297 (insv) the highpart of a TImode register/memory.
18299 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
18301 * auto-profile.cc (auto_profile): Check todo from early_inline
18302 to see if cleanup_tree_vfg needs to be called.
18303 (early_inline): Return todo from early_inliner.
18305 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
18307 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
18309 (pass_vsetvl::get_block_info): New.
18310 (pass_vsetvl::update_vector_info): New.
18311 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
18312 (pass_vsetvl::compute_local_backward_infos): Ditto.
18313 (pass_vsetvl::transfer_before): Ditto.
18314 (pass_vsetvl::transfer_after): Ditto.
18315 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
18316 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
18317 (pass_vsetvl::cleanup_insns): Ditto.
18318 (pass_vsetvl::compute_local_backward_infos): Use
18319 update_vector_info.
18321 2023-05-08 Jeff Law <jlaw@ventanamicro>
18323 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
18325 2023-05-08 Richard Biener <rguenther@suse.de>
18326 Michael Meissner <meissner@linux.ibm.com>
18328 PR middle-end/108623
18329 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
18330 Align bit fields > 1 bit to at least an 8-bit boundary.
18332 2023-05-08 Andrew Pinski <apinski@marvell.com>
18334 PR tree-optimization/109424
18335 PR tree-optimization/59424
18336 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
18337 (factor_out_conditional_operation): This and add support for all unary
18339 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
18340 to call factor_out_conditional_operation instead.
18342 2023-05-08 Andrew Pinski <apinski@marvell.com>
18344 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
18345 over factor_out_conditional_conversion.
18347 2023-05-08 Andrew Pinski <apinski@marvell.com>
18349 PR tree-optimization/49959
18350 PR tree-optimization/103771
18351 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
18352 Diamond shapped bb form for factor_out_conditional_conversion.
18354 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18356 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
18357 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
18358 (riscv_vector_get_mask_mode): Ditto.
18359 (get_mask_policy_no_pred): Ditto.
18360 (get_tail_policy_no_pred): Ditto.
18361 (get_mask_mode): New function.
18362 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
18363 (get_tail_policy_no_pred): Ditto.
18364 (riscv_vector_mask_mode_p): Ditto.
18365 (riscv_vector_get_mask_mode): Ditto.
18366 (get_mask_mode): New function.
18367 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
18369 (get_tail_policy_for_pred): Ditto.
18370 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
18371 (get_mask_policy_for_pred): Ditto
18372 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
18374 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
18376 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
18377 (riscv_select_multilib): New.
18378 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
18379 also handle select_by_abi.
18380 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
18381 to select_by_abi_arch_cmodel from 1.
18382 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
18383 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
18385 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
18387 * Makefile.in: (gimple-match-head.o-warn): Remove.
18388 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
18389 gimple-match-exports.cc.
18390 (gimple-match-auto.h): Only depend on s-gimple-match.
18391 (generic-match-auto.h): Likewise.
18393 2023-05-08 Andrew Pinski <apinski@marvell.com>
18395 PR tree-optimization/109691
18396 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
18398 If the removed statement can throw, have need_eh_cleanup
18399 include the bb of that statement.
18400 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
18401 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
18403 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
18404 Initialize dceworklist instead of stmts_to_remove.
18405 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
18406 Destore dceworklist instead of stmts_to_remove.
18407 (substitute_and_fold_dom_walker::before_dom_children):
18408 Set dceworklist instead of adding to stmts_to_remove.
18409 (substitute_and_fold_engine::substitute_and_fold):
18410 Call simple_dce_from_worklist instead of poping
18412 Don't update the stat on removal statements.
18414 2023-05-07 Andrew Pinski <apinski@marvell.com>
18417 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
18418 Change argument type to aarch64_feature_flags.
18419 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
18420 constructor argument type to aarch64_feature_flags.
18421 Change m_old_asm_isa_flags to be aarch64_feature_flags.
18423 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
18425 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
18426 more parallel code if can_create_pseudo_p.
18428 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
18431 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
18432 immediately before moving a multi-word register by parts.
18434 2023-05-06 Jeff Law <jlaw@ventanamicro>
18436 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
18438 2023-05-06 Michael Collison <collison@rivosinc.com>
18440 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
18441 Check that GET_MODE_NUNITS is a multiple of 2.
18443 2023-05-06 Michael Collison <collison@rivosinc.com>
18445 * config/riscv/riscv.cc
18446 (riscv_estimated_poly_value): Implement
18447 TARGET_ESTIMATED_POLY_VALUE.
18448 (riscv_preferred_simd_mode): Implement
18449 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
18450 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
18451 (riscv_empty_mask_is_expensive): Implement
18452 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
18453 (riscv_vectorize_create_costs): Implement
18454 TARGET_VECTORIZE_CREATE_COSTS.
18455 (riscv_support_vector_misalignment): Implement
18456 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
18457 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
18458 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
18459 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
18460 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
18462 2023-05-06 Jeff Law <jlaw@ventanamicro>
18464 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
18465 duplicate definition.
18467 2023-05-06 Michael Collison <collison@rivosinc.com>
18469 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
18470 (riscv_vector_preferred_simd_mode): Ditto.
18471 (get_mask_policy_no_pred): Ditto.
18472 (get_tail_policy_no_pred): Ditto.
18473 (riscv_vector_mask_mode_p): Ditto.
18474 (riscv_vector_get_mask_mode): Ditto.
18476 2023-05-06 Michael Collison <collison@rivosinc.com>
18478 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
18479 Remove static declaration to to make externally visible.
18480 (get_mask_policy_for_pred): Ditto.
18481 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
18482 New external declaration.
18483 (get_mask_policy_for_pred): Ditto.
18485 2023-05-06 Michael Collison <collison@rivosinc.com>
18487 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
18488 (riscv_vector_get_mask_mode): Ditto.
18489 (get_mask_policy_no_pred): Ditto.
18490 (get_tail_policy_no_pred): Ditto.
18492 2023-05-06 Xi Ruoyao <xry111@xry111.site>
18494 * config/loongarch/loongarch.h (struct machine_function): Add
18495 reg_is_wrapped_separately array for register wrapping
18497 * config/loongarch/loongarch.cc
18498 (loongarch_get_separate_components): New function.
18499 (loongarch_components_for_bb): Likewise.
18500 (loongarch_disqualify_components): Likewise.
18501 (loongarch_process_components): Likewise.
18502 (loongarch_emit_prologue_components): Likewise.
18503 (loongarch_emit_epilogue_components): Likewise.
18504 (loongarch_set_handled_components): Likewise.
18505 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
18506 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
18507 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
18508 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
18509 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
18510 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
18511 (loongarch_for_each_saved_reg): Skip registers that are wrapped
18514 2023-05-06 Xi Ruoyao <xry111@xry111.site>
18517 * Makefile.in (s-macro_list): Pass -nostdinc to
18520 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18522 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
18523 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
18524 (preferred_simd_mode): Ditto.
18525 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
18526 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
18527 (riscv_preferred_simd_mode): New function.
18528 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
18529 * config/riscv/vector.md: Add autovec.md.
18530 * config/riscv/autovec.md: New file.
18532 2023-05-06 Jakub Jelinek <jakub@redhat.com>
18534 * real.h (dconst_pi): Define.
18535 (dconst_e_ptr): Formatting fix.
18536 (dconst_pi_ptr): Declare.
18537 * real.cc (dconst_pi_ptr): New function.
18538 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
18539 boundaries range with range computed from sin/cos of the particular
18540 bounds if the argument range is shorter than 2*pi.
18541 (cfn_sincos::op1_range): Take bulps into account when determining
18542 which result ranges are always invalid or behave like known NAN.
18544 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
18546 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
18547 pass type to vrange_storage::equal_p.
18548 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
18549 (irange_storage::equal_p): Same.
18550 (frange_storage::equal_p): Same.
18551 * value-range-storage.h (class frange_storage): Same.
18553 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18556 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
18557 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
18559 2023-05-06 liuhongt <hongtao.liu@intel.com>
18561 * combine.cc (maybe_swap_commutative_operands): Canonicalize
18562 vec_merge when mask is constant.
18563 * doc/md.texi: Document vec_merge canonicalization.
18565 2023-05-06 Jakub Jelinek <jakub@redhat.com>
18567 * value-range.h (frange_arithmetic): Declare.
18568 * range-op-float.cc (frange_arithmetic): No longer static.
18569 * gimple-range-op.cc (frange_mpfr_arg1): New function.
18570 (cfn_sqrt::fold_range): Intersect the generic boundaries range
18571 with range computed from sqrt of the particular bounds.
18572 (cfn_sqrt::op1_range): Intersect the generic boundaries range
18573 with range computed from squared particular bounds.
18575 2023-05-06 Jakub Jelinek <jakub@redhat.com>
18577 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
18578 earlier with helper variables also renamed.
18579 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
18580 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
18581 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
18583 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
18585 * config/cris/cris.md (splitop): Add PLUS.
18586 * config/cris/cris.cc (cris_split_constant): Also handle
18587 PLUS when a split into two insns may be useful.
18589 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
18591 * config/cris/cris.md (movandsplit1): New define_peephole2.
18593 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
18595 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
18597 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
18599 * doc/md.texi (define_peephole2): Document order of scanning.
18601 2023-05-05 Pan Li <pan2.li@intel.com>
18602 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18604 * config/riscv/vector.md: Allow const as the operand of RVV
18605 indexed load/store.
18607 2023-05-05 Pan Li <pan2.li@intel.com>
18609 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
18610 consumed by simplify_rtx.
18612 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
18614 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
18615 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
18616 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
18617 * config/arm/arm_mve.h (vshrq): Remove.
18619 (vrshrq_m): Remove.
18621 (vrshrq_x): Remove.
18623 (vshrq_n_s8): Remove.
18624 (vshrq_n_s16): Remove.
18625 (vshrq_n_s32): Remove.
18626 (vshrq_n_u8): Remove.
18627 (vshrq_n_u16): Remove.
18628 (vshrq_n_u32): Remove.
18629 (vrshrq_n_u8): Remove.
18630 (vrshrq_n_s8): Remove.
18631 (vrshrq_n_u16): Remove.
18632 (vrshrq_n_s16): Remove.
18633 (vrshrq_n_u32): Remove.
18634 (vrshrq_n_s32): Remove.
18635 (vrshrq_m_n_s8): Remove.
18636 (vrshrq_m_n_s32): Remove.
18637 (vrshrq_m_n_s16): Remove.
18638 (vrshrq_m_n_u8): Remove.
18639 (vrshrq_m_n_u32): Remove.
18640 (vrshrq_m_n_u16): Remove.
18641 (vshrq_m_n_s8): Remove.
18642 (vshrq_m_n_s32): Remove.
18643 (vshrq_m_n_s16): Remove.
18644 (vshrq_m_n_u8): Remove.
18645 (vshrq_m_n_u32): Remove.
18646 (vshrq_m_n_u16): Remove.
18647 (vrshrq_x_n_s8): Remove.
18648 (vrshrq_x_n_s16): Remove.
18649 (vrshrq_x_n_s32): Remove.
18650 (vrshrq_x_n_u8): Remove.
18651 (vrshrq_x_n_u16): Remove.
18652 (vrshrq_x_n_u32): Remove.
18653 (vshrq_x_n_s8): Remove.
18654 (vshrq_x_n_s16): Remove.
18655 (vshrq_x_n_s32): Remove.
18656 (vshrq_x_n_u8): Remove.
18657 (vshrq_x_n_u16): Remove.
18658 (vshrq_x_n_u32): Remove.
18659 (__arm_vshrq_n_s8): Remove.
18660 (__arm_vshrq_n_s16): Remove.
18661 (__arm_vshrq_n_s32): Remove.
18662 (__arm_vshrq_n_u8): Remove.
18663 (__arm_vshrq_n_u16): Remove.
18664 (__arm_vshrq_n_u32): Remove.
18665 (__arm_vrshrq_n_u8): Remove.
18666 (__arm_vrshrq_n_s8): Remove.
18667 (__arm_vrshrq_n_u16): Remove.
18668 (__arm_vrshrq_n_s16): Remove.
18669 (__arm_vrshrq_n_u32): Remove.
18670 (__arm_vrshrq_n_s32): Remove.
18671 (__arm_vrshrq_m_n_s8): Remove.
18672 (__arm_vrshrq_m_n_s32): Remove.
18673 (__arm_vrshrq_m_n_s16): Remove.
18674 (__arm_vrshrq_m_n_u8): Remove.
18675 (__arm_vrshrq_m_n_u32): Remove.
18676 (__arm_vrshrq_m_n_u16): Remove.
18677 (__arm_vshrq_m_n_s8): Remove.
18678 (__arm_vshrq_m_n_s32): Remove.
18679 (__arm_vshrq_m_n_s16): Remove.
18680 (__arm_vshrq_m_n_u8): Remove.
18681 (__arm_vshrq_m_n_u32): Remove.
18682 (__arm_vshrq_m_n_u16): Remove.
18683 (__arm_vrshrq_x_n_s8): Remove.
18684 (__arm_vrshrq_x_n_s16): Remove.
18685 (__arm_vrshrq_x_n_s32): Remove.
18686 (__arm_vrshrq_x_n_u8): Remove.
18687 (__arm_vrshrq_x_n_u16): Remove.
18688 (__arm_vrshrq_x_n_u32): Remove.
18689 (__arm_vshrq_x_n_s8): Remove.
18690 (__arm_vshrq_x_n_s16): Remove.
18691 (__arm_vshrq_x_n_s32): Remove.
18692 (__arm_vshrq_x_n_u8): Remove.
18693 (__arm_vshrq_x_n_u16): Remove.
18694 (__arm_vshrq_x_n_u32): Remove.
18695 (__arm_vshrq): Remove.
18696 (__arm_vrshrq): Remove.
18697 (__arm_vrshrq_m): Remove.
18698 (__arm_vshrq_m): Remove.
18699 (__arm_vrshrq_x): Remove.
18700 (__arm_vshrq_x): Remove.
18702 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
18704 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
18705 (mve_insn): Add vrshr, vshr.
18706 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
18707 (mve_vrshrq_n_<supf><mode>): Merge into ...
18708 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
18709 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
18711 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
18713 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
18715 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
18716 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
18718 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
18720 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
18721 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
18722 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
18723 (vqrshrunbq, vqrshruntq): New.
18724 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
18725 (vqrshrunbq, vqrshruntq): New.
18726 * config/arm/arm-mve-builtins.cc
18727 (function_instance::has_inactive_argument): Handle vqshrunbq,
18728 vqshruntq, vqrshrunbq, vqrshruntq.
18729 * config/arm/arm_mve.h (vqrshrunbq): Remove.
18730 (vqrshruntq): Remove.
18731 (vqrshrunbq_m): Remove.
18732 (vqrshruntq_m): Remove.
18733 (vqrshrunbq_n_s16): Remove.
18734 (vqrshrunbq_n_s32): Remove.
18735 (vqrshruntq_n_s16): Remove.
18736 (vqrshruntq_n_s32): Remove.
18737 (vqrshrunbq_m_n_s32): Remove.
18738 (vqrshrunbq_m_n_s16): Remove.
18739 (vqrshruntq_m_n_s32): Remove.
18740 (vqrshruntq_m_n_s16): Remove.
18741 (__arm_vqrshrunbq_n_s16): Remove.
18742 (__arm_vqrshrunbq_n_s32): Remove.
18743 (__arm_vqrshruntq_n_s16): Remove.
18744 (__arm_vqrshruntq_n_s32): Remove.
18745 (__arm_vqrshrunbq_m_n_s32): Remove.
18746 (__arm_vqrshrunbq_m_n_s16): Remove.
18747 (__arm_vqrshruntq_m_n_s32): Remove.
18748 (__arm_vqrshruntq_m_n_s16): Remove.
18749 (__arm_vqrshrunbq): Remove.
18750 (__arm_vqrshruntq): Remove.
18751 (__arm_vqrshrunbq_m): Remove.
18752 (__arm_vqrshruntq_m): Remove.
18753 (vqshrunbq): Remove.
18754 (vqshruntq): Remove.
18755 (vqshrunbq_m): Remove.
18756 (vqshruntq_m): Remove.
18757 (vqshrunbq_n_s16): Remove.
18758 (vqshruntq_n_s16): Remove.
18759 (vqshrunbq_n_s32): Remove.
18760 (vqshruntq_n_s32): Remove.
18761 (vqshrunbq_m_n_s32): Remove.
18762 (vqshrunbq_m_n_s16): Remove.
18763 (vqshruntq_m_n_s32): Remove.
18764 (vqshruntq_m_n_s16): Remove.
18765 (__arm_vqshrunbq_n_s16): Remove.
18766 (__arm_vqshruntq_n_s16): Remove.
18767 (__arm_vqshrunbq_n_s32): Remove.
18768 (__arm_vqshruntq_n_s32): Remove.
18769 (__arm_vqshrunbq_m_n_s32): Remove.
18770 (__arm_vqshrunbq_m_n_s16): Remove.
18771 (__arm_vqshruntq_m_n_s32): Remove.
18772 (__arm_vqshruntq_m_n_s16): Remove.
18773 (__arm_vqshrunbq): Remove.
18774 (__arm_vqshruntq): Remove.
18775 (__arm_vqshrunbq_m): Remove.
18776 (__arm_vqshruntq_m): Remove.
18778 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
18780 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
18781 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
18782 (MVE_SHRN_M_N): Likewise.
18783 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
18784 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
18786 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
18787 (mve_vqrshruntq_n_s<mode>): Remove.
18788 (mve_vqshrunbq_n_s<mode>): Remove.
18789 (mve_vqshruntq_n_s<mode>): Remove.
18790 (mve_vqrshrunbq_m_n_s<mode>): Remove.
18791 (mve_vqrshruntq_m_n_s<mode>): Remove.
18792 (mve_vqshrunbq_m_n_s<mode>): Remove.
18793 (mve_vqshruntq_m_n_s<mode>): Remove.
18795 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
18797 * config/arm/arm-mve-builtins-shapes.cc
18798 (binary_rshift_narrow_unsigned): New.
18799 * config/arm/arm-mve-builtins-shapes.h
18800 (binary_rshift_narrow_unsigned): New.
18802 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
18804 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
18805 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
18806 (vqrshrnbq, vqrshrntq): New.
18807 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
18808 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
18810 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
18811 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
18812 * config/arm/arm-mve-builtins.cc
18813 (function_instance::has_inactive_argument): Handle vshrnbq,
18814 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
18816 * config/arm/arm_mve.h (vshrnbq): Remove.
18818 (vshrnbq_m): Remove.
18819 (vshrntq_m): Remove.
18820 (vshrnbq_n_s16): Remove.
18821 (vshrntq_n_s16): Remove.
18822 (vshrnbq_n_u16): Remove.
18823 (vshrntq_n_u16): Remove.
18824 (vshrnbq_n_s32): Remove.
18825 (vshrntq_n_s32): Remove.
18826 (vshrnbq_n_u32): Remove.
18827 (vshrntq_n_u32): Remove.
18828 (vshrnbq_m_n_s32): Remove.
18829 (vshrnbq_m_n_s16): Remove.
18830 (vshrnbq_m_n_u32): Remove.
18831 (vshrnbq_m_n_u16): Remove.
18832 (vshrntq_m_n_s32): Remove.
18833 (vshrntq_m_n_s16): Remove.
18834 (vshrntq_m_n_u32): Remove.
18835 (vshrntq_m_n_u16): Remove.
18836 (__arm_vshrnbq_n_s16): Remove.
18837 (__arm_vshrntq_n_s16): Remove.
18838 (__arm_vshrnbq_n_u16): Remove.
18839 (__arm_vshrntq_n_u16): Remove.
18840 (__arm_vshrnbq_n_s32): Remove.
18841 (__arm_vshrntq_n_s32): Remove.
18842 (__arm_vshrnbq_n_u32): Remove.
18843 (__arm_vshrntq_n_u32): Remove.
18844 (__arm_vshrnbq_m_n_s32): Remove.
18845 (__arm_vshrnbq_m_n_s16): Remove.
18846 (__arm_vshrnbq_m_n_u32): Remove.
18847 (__arm_vshrnbq_m_n_u16): Remove.
18848 (__arm_vshrntq_m_n_s32): Remove.
18849 (__arm_vshrntq_m_n_s16): Remove.
18850 (__arm_vshrntq_m_n_u32): Remove.
18851 (__arm_vshrntq_m_n_u16): Remove.
18852 (__arm_vshrnbq): Remove.
18853 (__arm_vshrntq): Remove.
18854 (__arm_vshrnbq_m): Remove.
18855 (__arm_vshrntq_m): Remove.
18856 (vrshrnbq): Remove.
18857 (vrshrntq): Remove.
18858 (vrshrnbq_m): Remove.
18859 (vrshrntq_m): Remove.
18860 (vrshrnbq_n_s16): Remove.
18861 (vrshrntq_n_s16): Remove.
18862 (vrshrnbq_n_u16): Remove.
18863 (vrshrntq_n_u16): Remove.
18864 (vrshrnbq_n_s32): Remove.
18865 (vrshrntq_n_s32): Remove.
18866 (vrshrnbq_n_u32): Remove.
18867 (vrshrntq_n_u32): Remove.
18868 (vrshrnbq_m_n_s32): Remove.
18869 (vrshrnbq_m_n_s16): Remove.
18870 (vrshrnbq_m_n_u32): Remove.
18871 (vrshrnbq_m_n_u16): Remove.
18872 (vrshrntq_m_n_s32): Remove.
18873 (vrshrntq_m_n_s16): Remove.
18874 (vrshrntq_m_n_u32): Remove.
18875 (vrshrntq_m_n_u16): Remove.
18876 (__arm_vrshrnbq_n_s16): Remove.
18877 (__arm_vrshrntq_n_s16): Remove.
18878 (__arm_vrshrnbq_n_u16): Remove.
18879 (__arm_vrshrntq_n_u16): Remove.
18880 (__arm_vrshrnbq_n_s32): Remove.
18881 (__arm_vrshrntq_n_s32): Remove.
18882 (__arm_vrshrnbq_n_u32): Remove.
18883 (__arm_vrshrntq_n_u32): Remove.
18884 (__arm_vrshrnbq_m_n_s32): Remove.
18885 (__arm_vrshrnbq_m_n_s16): Remove.
18886 (__arm_vrshrnbq_m_n_u32): Remove.
18887 (__arm_vrshrnbq_m_n_u16): Remove.
18888 (__arm_vrshrntq_m_n_s32): Remove.
18889 (__arm_vrshrntq_m_n_s16): Remove.
18890 (__arm_vrshrntq_m_n_u32): Remove.
18891 (__arm_vrshrntq_m_n_u16): Remove.
18892 (__arm_vrshrnbq): Remove.
18893 (__arm_vrshrntq): Remove.
18894 (__arm_vrshrnbq_m): Remove.
18895 (__arm_vrshrntq_m): Remove.
18896 (vqshrnbq): Remove.
18897 (vqshrntq): Remove.
18898 (vqshrnbq_m): Remove.
18899 (vqshrntq_m): Remove.
18900 (vqshrnbq_n_s16): Remove.
18901 (vqshrntq_n_s16): Remove.
18902 (vqshrnbq_n_u16): Remove.
18903 (vqshrntq_n_u16): Remove.
18904 (vqshrnbq_n_s32): Remove.
18905 (vqshrntq_n_s32): Remove.
18906 (vqshrnbq_n_u32): Remove.
18907 (vqshrntq_n_u32): Remove.
18908 (vqshrnbq_m_n_s32): Remove.
18909 (vqshrnbq_m_n_s16): Remove.
18910 (vqshrnbq_m_n_u32): Remove.
18911 (vqshrnbq_m_n_u16): Remove.
18912 (vqshrntq_m_n_s32): Remove.
18913 (vqshrntq_m_n_s16): Remove.
18914 (vqshrntq_m_n_u32): Remove.
18915 (vqshrntq_m_n_u16): Remove.
18916 (__arm_vqshrnbq_n_s16): Remove.
18917 (__arm_vqshrntq_n_s16): Remove.
18918 (__arm_vqshrnbq_n_u16): Remove.
18919 (__arm_vqshrntq_n_u16): Remove.
18920 (__arm_vqshrnbq_n_s32): Remove.
18921 (__arm_vqshrntq_n_s32): Remove.
18922 (__arm_vqshrnbq_n_u32): Remove.
18923 (__arm_vqshrntq_n_u32): Remove.
18924 (__arm_vqshrnbq_m_n_s32): Remove.
18925 (__arm_vqshrnbq_m_n_s16): Remove.
18926 (__arm_vqshrnbq_m_n_u32): Remove.
18927 (__arm_vqshrnbq_m_n_u16): Remove.
18928 (__arm_vqshrntq_m_n_s32): Remove.
18929 (__arm_vqshrntq_m_n_s16): Remove.
18930 (__arm_vqshrntq_m_n_u32): Remove.
18931 (__arm_vqshrntq_m_n_u16): Remove.
18932 (__arm_vqshrnbq): Remove.
18933 (__arm_vqshrntq): Remove.
18934 (__arm_vqshrnbq_m): Remove.
18935 (__arm_vqshrntq_m): Remove.
18936 (vqrshrnbq): Remove.
18937 (vqrshrntq): Remove.
18938 (vqrshrnbq_m): Remove.
18939 (vqrshrntq_m): Remove.
18940 (vqrshrnbq_n_s16): Remove.
18941 (vqrshrnbq_n_u16): Remove.
18942 (vqrshrnbq_n_s32): Remove.
18943 (vqrshrnbq_n_u32): Remove.
18944 (vqrshrntq_n_s16): Remove.
18945 (vqrshrntq_n_u16): Remove.
18946 (vqrshrntq_n_s32): Remove.
18947 (vqrshrntq_n_u32): Remove.
18948 (vqrshrnbq_m_n_s32): Remove.
18949 (vqrshrnbq_m_n_s16): Remove.
18950 (vqrshrnbq_m_n_u32): Remove.
18951 (vqrshrnbq_m_n_u16): Remove.
18952 (vqrshrntq_m_n_s32): Remove.
18953 (vqrshrntq_m_n_s16): Remove.
18954 (vqrshrntq_m_n_u32): Remove.
18955 (vqrshrntq_m_n_u16): Remove.
18956 (__arm_vqrshrnbq_n_s16): Remove.
18957 (__arm_vqrshrnbq_n_u16): Remove.
18958 (__arm_vqrshrnbq_n_s32): Remove.
18959 (__arm_vqrshrnbq_n_u32): Remove.
18960 (__arm_vqrshrntq_n_s16): Remove.
18961 (__arm_vqrshrntq_n_u16): Remove.
18962 (__arm_vqrshrntq_n_s32): Remove.
18963 (__arm_vqrshrntq_n_u32): Remove.
18964 (__arm_vqrshrnbq_m_n_s32): Remove.
18965 (__arm_vqrshrnbq_m_n_s16): Remove.
18966 (__arm_vqrshrnbq_m_n_u32): Remove.
18967 (__arm_vqrshrnbq_m_n_u16): Remove.
18968 (__arm_vqrshrntq_m_n_s32): Remove.
18969 (__arm_vqrshrntq_m_n_s16): Remove.
18970 (__arm_vqrshrntq_m_n_u32): Remove.
18971 (__arm_vqrshrntq_m_n_u16): Remove.
18972 (__arm_vqrshrnbq): Remove.
18973 (__arm_vqrshrntq): Remove.
18974 (__arm_vqrshrnbq_m): Remove.
18975 (__arm_vqrshrntq_m): Remove.
18977 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
18979 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
18980 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
18981 vrshrnt, vshrnb, vshrnt.
18983 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
18984 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
18985 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
18986 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
18987 (mve_vshrntq_n_<supf><mode>): Merge into ...
18988 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
18989 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
18990 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
18991 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
18992 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
18994 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
18996 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
18998 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
19000 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
19002 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19004 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
19005 (vmaxq, vminq): New.
19006 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
19007 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
19008 * config/arm/arm_mve.h (vminq): Remove.
19014 (vminq_u8): Remove.
19015 (vmaxq_u8): Remove.
19016 (vminq_s8): Remove.
19017 (vmaxq_s8): Remove.
19018 (vminq_u16): Remove.
19019 (vmaxq_u16): Remove.
19020 (vminq_s16): Remove.
19021 (vmaxq_s16): Remove.
19022 (vminq_u32): Remove.
19023 (vmaxq_u32): Remove.
19024 (vminq_s32): Remove.
19025 (vmaxq_s32): Remove.
19026 (vmaxq_m_s8): Remove.
19027 (vmaxq_m_s32): Remove.
19028 (vmaxq_m_s16): Remove.
19029 (vmaxq_m_u8): Remove.
19030 (vmaxq_m_u32): Remove.
19031 (vmaxq_m_u16): Remove.
19032 (vminq_m_s8): Remove.
19033 (vminq_m_s32): Remove.
19034 (vminq_m_s16): Remove.
19035 (vminq_m_u8): Remove.
19036 (vminq_m_u32): Remove.
19037 (vminq_m_u16): Remove.
19038 (vminq_x_s8): Remove.
19039 (vminq_x_s16): Remove.
19040 (vminq_x_s32): Remove.
19041 (vminq_x_u8): Remove.
19042 (vminq_x_u16): Remove.
19043 (vminq_x_u32): Remove.
19044 (vmaxq_x_s8): Remove.
19045 (vmaxq_x_s16): Remove.
19046 (vmaxq_x_s32): Remove.
19047 (vmaxq_x_u8): Remove.
19048 (vmaxq_x_u16): Remove.
19049 (vmaxq_x_u32): Remove.
19050 (__arm_vminq_u8): Remove.
19051 (__arm_vmaxq_u8): Remove.
19052 (__arm_vminq_s8): Remove.
19053 (__arm_vmaxq_s8): Remove.
19054 (__arm_vminq_u16): Remove.
19055 (__arm_vmaxq_u16): Remove.
19056 (__arm_vminq_s16): Remove.
19057 (__arm_vmaxq_s16): Remove.
19058 (__arm_vminq_u32): Remove.
19059 (__arm_vmaxq_u32): Remove.
19060 (__arm_vminq_s32): Remove.
19061 (__arm_vmaxq_s32): Remove.
19062 (__arm_vmaxq_m_s8): Remove.
19063 (__arm_vmaxq_m_s32): Remove.
19064 (__arm_vmaxq_m_s16): Remove.
19065 (__arm_vmaxq_m_u8): Remove.
19066 (__arm_vmaxq_m_u32): Remove.
19067 (__arm_vmaxq_m_u16): Remove.
19068 (__arm_vminq_m_s8): Remove.
19069 (__arm_vminq_m_s32): Remove.
19070 (__arm_vminq_m_s16): Remove.
19071 (__arm_vminq_m_u8): Remove.
19072 (__arm_vminq_m_u32): Remove.
19073 (__arm_vminq_m_u16): Remove.
19074 (__arm_vminq_x_s8): Remove.
19075 (__arm_vminq_x_s16): Remove.
19076 (__arm_vminq_x_s32): Remove.
19077 (__arm_vminq_x_u8): Remove.
19078 (__arm_vminq_x_u16): Remove.
19079 (__arm_vminq_x_u32): Remove.
19080 (__arm_vmaxq_x_s8): Remove.
19081 (__arm_vmaxq_x_s16): Remove.
19082 (__arm_vmaxq_x_s32): Remove.
19083 (__arm_vmaxq_x_u8): Remove.
19084 (__arm_vmaxq_x_u16): Remove.
19085 (__arm_vmaxq_x_u32): Remove.
19086 (__arm_vminq): Remove.
19087 (__arm_vmaxq): Remove.
19088 (__arm_vmaxq_m): Remove.
19089 (__arm_vminq_m): Remove.
19090 (__arm_vminq_x): Remove.
19091 (__arm_vmaxq_x): Remove.
19093 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19095 * config/arm/iterators.md (MAX_MIN_SU): New.
19096 (max_min_su_str): New.
19097 (max_min_supf): New.
19098 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
19099 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
19100 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
19102 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19104 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
19105 (vqshlq, vshlq): New.
19106 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
19107 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
19108 * config/arm/arm_mve.h (vshlq): Remove.
19111 (vshlq_m_r): Remove.
19113 (vshlq_m_n): Remove.
19115 (vshlq_x_n): Remove.
19116 (vshlq_s8): Remove.
19117 (vshlq_s16): Remove.
19118 (vshlq_s32): Remove.
19119 (vshlq_u8): Remove.
19120 (vshlq_u16): Remove.
19121 (vshlq_u32): Remove.
19122 (vshlq_r_u8): Remove.
19123 (vshlq_n_u8): Remove.
19124 (vshlq_r_s8): Remove.
19125 (vshlq_n_s8): Remove.
19126 (vshlq_r_u16): Remove.
19127 (vshlq_n_u16): Remove.
19128 (vshlq_r_s16): Remove.
19129 (vshlq_n_s16): Remove.
19130 (vshlq_r_u32): Remove.
19131 (vshlq_n_u32): Remove.
19132 (vshlq_r_s32): Remove.
19133 (vshlq_n_s32): Remove.
19134 (vshlq_m_r_u8): Remove.
19135 (vshlq_m_r_s8): Remove.
19136 (vshlq_m_r_u16): Remove.
19137 (vshlq_m_r_s16): Remove.
19138 (vshlq_m_r_u32): Remove.
19139 (vshlq_m_r_s32): Remove.
19140 (vshlq_m_u8): Remove.
19141 (vshlq_m_s8): Remove.
19142 (vshlq_m_u16): Remove.
19143 (vshlq_m_s16): Remove.
19144 (vshlq_m_u32): Remove.
19145 (vshlq_m_s32): Remove.
19146 (vshlq_m_n_s8): Remove.
19147 (vshlq_m_n_s32): Remove.
19148 (vshlq_m_n_s16): Remove.
19149 (vshlq_m_n_u8): Remove.
19150 (vshlq_m_n_u32): Remove.
19151 (vshlq_m_n_u16): Remove.
19152 (vshlq_x_s8): Remove.
19153 (vshlq_x_s16): Remove.
19154 (vshlq_x_s32): Remove.
19155 (vshlq_x_u8): Remove.
19156 (vshlq_x_u16): Remove.
19157 (vshlq_x_u32): Remove.
19158 (vshlq_x_n_s8): Remove.
19159 (vshlq_x_n_s16): Remove.
19160 (vshlq_x_n_s32): Remove.
19161 (vshlq_x_n_u8): Remove.
19162 (vshlq_x_n_u16): Remove.
19163 (vshlq_x_n_u32): Remove.
19164 (__arm_vshlq_s8): Remove.
19165 (__arm_vshlq_s16): Remove.
19166 (__arm_vshlq_s32): Remove.
19167 (__arm_vshlq_u8): Remove.
19168 (__arm_vshlq_u16): Remove.
19169 (__arm_vshlq_u32): Remove.
19170 (__arm_vshlq_r_u8): Remove.
19171 (__arm_vshlq_n_u8): Remove.
19172 (__arm_vshlq_r_s8): Remove.
19173 (__arm_vshlq_n_s8): Remove.
19174 (__arm_vshlq_r_u16): Remove.
19175 (__arm_vshlq_n_u16): Remove.
19176 (__arm_vshlq_r_s16): Remove.
19177 (__arm_vshlq_n_s16): Remove.
19178 (__arm_vshlq_r_u32): Remove.
19179 (__arm_vshlq_n_u32): Remove.
19180 (__arm_vshlq_r_s32): Remove.
19181 (__arm_vshlq_n_s32): Remove.
19182 (__arm_vshlq_m_r_u8): Remove.
19183 (__arm_vshlq_m_r_s8): Remove.
19184 (__arm_vshlq_m_r_u16): Remove.
19185 (__arm_vshlq_m_r_s16): Remove.
19186 (__arm_vshlq_m_r_u32): Remove.
19187 (__arm_vshlq_m_r_s32): Remove.
19188 (__arm_vshlq_m_u8): Remove.
19189 (__arm_vshlq_m_s8): Remove.
19190 (__arm_vshlq_m_u16): Remove.
19191 (__arm_vshlq_m_s16): Remove.
19192 (__arm_vshlq_m_u32): Remove.
19193 (__arm_vshlq_m_s32): Remove.
19194 (__arm_vshlq_m_n_s8): Remove.
19195 (__arm_vshlq_m_n_s32): Remove.
19196 (__arm_vshlq_m_n_s16): Remove.
19197 (__arm_vshlq_m_n_u8): Remove.
19198 (__arm_vshlq_m_n_u32): Remove.
19199 (__arm_vshlq_m_n_u16): Remove.
19200 (__arm_vshlq_x_s8): Remove.
19201 (__arm_vshlq_x_s16): Remove.
19202 (__arm_vshlq_x_s32): Remove.
19203 (__arm_vshlq_x_u8): Remove.
19204 (__arm_vshlq_x_u16): Remove.
19205 (__arm_vshlq_x_u32): Remove.
19206 (__arm_vshlq_x_n_s8): Remove.
19207 (__arm_vshlq_x_n_s16): Remove.
19208 (__arm_vshlq_x_n_s32): Remove.
19209 (__arm_vshlq_x_n_u8): Remove.
19210 (__arm_vshlq_x_n_u16): Remove.
19211 (__arm_vshlq_x_n_u32): Remove.
19212 (__arm_vshlq): Remove.
19213 (__arm_vshlq_r): Remove.
19214 (__arm_vshlq_n): Remove.
19215 (__arm_vshlq_m_r): Remove.
19216 (__arm_vshlq_m): Remove.
19217 (__arm_vshlq_m_n): Remove.
19218 (__arm_vshlq_x): Remove.
19219 (__arm_vshlq_x_n): Remove.
19221 (vqshlq_r): Remove.
19222 (vqshlq_n): Remove.
19223 (vqshlq_m_r): Remove.
19224 (vqshlq_m_n): Remove.
19225 (vqshlq_m): Remove.
19226 (vqshlq_u8): Remove.
19227 (vqshlq_r_u8): Remove.
19228 (vqshlq_n_u8): Remove.
19229 (vqshlq_s8): Remove.
19230 (vqshlq_r_s8): Remove.
19231 (vqshlq_n_s8): Remove.
19232 (vqshlq_u16): Remove.
19233 (vqshlq_r_u16): Remove.
19234 (vqshlq_n_u16): Remove.
19235 (vqshlq_s16): Remove.
19236 (vqshlq_r_s16): Remove.
19237 (vqshlq_n_s16): Remove.
19238 (vqshlq_u32): Remove.
19239 (vqshlq_r_u32): Remove.
19240 (vqshlq_n_u32): Remove.
19241 (vqshlq_s32): Remove.
19242 (vqshlq_r_s32): Remove.
19243 (vqshlq_n_s32): Remove.
19244 (vqshlq_m_r_u8): Remove.
19245 (vqshlq_m_r_s8): Remove.
19246 (vqshlq_m_r_u16): Remove.
19247 (vqshlq_m_r_s16): Remove.
19248 (vqshlq_m_r_u32): Remove.
19249 (vqshlq_m_r_s32): Remove.
19250 (vqshlq_m_n_s8): Remove.
19251 (vqshlq_m_n_s32): Remove.
19252 (vqshlq_m_n_s16): Remove.
19253 (vqshlq_m_n_u8): Remove.
19254 (vqshlq_m_n_u32): Remove.
19255 (vqshlq_m_n_u16): Remove.
19256 (vqshlq_m_s8): Remove.
19257 (vqshlq_m_s32): Remove.
19258 (vqshlq_m_s16): Remove.
19259 (vqshlq_m_u8): Remove.
19260 (vqshlq_m_u32): Remove.
19261 (vqshlq_m_u16): Remove.
19262 (__arm_vqshlq_u8): Remove.
19263 (__arm_vqshlq_r_u8): Remove.
19264 (__arm_vqshlq_n_u8): Remove.
19265 (__arm_vqshlq_s8): Remove.
19266 (__arm_vqshlq_r_s8): Remove.
19267 (__arm_vqshlq_n_s8): Remove.
19268 (__arm_vqshlq_u16): Remove.
19269 (__arm_vqshlq_r_u16): Remove.
19270 (__arm_vqshlq_n_u16): Remove.
19271 (__arm_vqshlq_s16): Remove.
19272 (__arm_vqshlq_r_s16): Remove.
19273 (__arm_vqshlq_n_s16): Remove.
19274 (__arm_vqshlq_u32): Remove.
19275 (__arm_vqshlq_r_u32): Remove.
19276 (__arm_vqshlq_n_u32): Remove.
19277 (__arm_vqshlq_s32): Remove.
19278 (__arm_vqshlq_r_s32): Remove.
19279 (__arm_vqshlq_n_s32): Remove.
19280 (__arm_vqshlq_m_r_u8): Remove.
19281 (__arm_vqshlq_m_r_s8): Remove.
19282 (__arm_vqshlq_m_r_u16): Remove.
19283 (__arm_vqshlq_m_r_s16): Remove.
19284 (__arm_vqshlq_m_r_u32): Remove.
19285 (__arm_vqshlq_m_r_s32): Remove.
19286 (__arm_vqshlq_m_n_s8): Remove.
19287 (__arm_vqshlq_m_n_s32): Remove.
19288 (__arm_vqshlq_m_n_s16): Remove.
19289 (__arm_vqshlq_m_n_u8): Remove.
19290 (__arm_vqshlq_m_n_u32): Remove.
19291 (__arm_vqshlq_m_n_u16): Remove.
19292 (__arm_vqshlq_m_s8): Remove.
19293 (__arm_vqshlq_m_s32): Remove.
19294 (__arm_vqshlq_m_s16): Remove.
19295 (__arm_vqshlq_m_u8): Remove.
19296 (__arm_vqshlq_m_u32): Remove.
19297 (__arm_vqshlq_m_u16): Remove.
19298 (__arm_vqshlq): Remove.
19299 (__arm_vqshlq_r): Remove.
19300 (__arm_vqshlq_n): Remove.
19301 (__arm_vqshlq_m_r): Remove.
19302 (__arm_vqshlq_m_n): Remove.
19303 (__arm_vqshlq_m): Remove.
19305 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19307 * config/arm/arm-mve-builtins-functions.h (class
19308 unspec_mve_function_exact_insn_vshl): New.
19310 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19312 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
19313 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
19315 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19317 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
19318 (finish_opt_n_resolution): Handle MODE_r.
19319 * config/arm/arm-mve-builtins.def (r): New mode.
19321 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19323 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
19324 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
19326 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19328 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
19330 * config/arm/arm-mve-builtins-base.def (vabdq): New.
19331 * config/arm/arm-mve-builtins-base.h (vabdq): New.
19332 * config/arm/arm_mve.h (vabdq): Remove.
19335 (vabdq_u8): Remove.
19336 (vabdq_s8): Remove.
19337 (vabdq_u16): Remove.
19338 (vabdq_s16): Remove.
19339 (vabdq_u32): Remove.
19340 (vabdq_s32): Remove.
19341 (vabdq_f16): Remove.
19342 (vabdq_f32): Remove.
19343 (vabdq_m_s8): Remove.
19344 (vabdq_m_s32): Remove.
19345 (vabdq_m_s16): Remove.
19346 (vabdq_m_u8): Remove.
19347 (vabdq_m_u32): Remove.
19348 (vabdq_m_u16): Remove.
19349 (vabdq_m_f32): Remove.
19350 (vabdq_m_f16): Remove.
19351 (vabdq_x_s8): Remove.
19352 (vabdq_x_s16): Remove.
19353 (vabdq_x_s32): Remove.
19354 (vabdq_x_u8): Remove.
19355 (vabdq_x_u16): Remove.
19356 (vabdq_x_u32): Remove.
19357 (vabdq_x_f16): Remove.
19358 (vabdq_x_f32): Remove.
19359 (__arm_vabdq_u8): Remove.
19360 (__arm_vabdq_s8): Remove.
19361 (__arm_vabdq_u16): Remove.
19362 (__arm_vabdq_s16): Remove.
19363 (__arm_vabdq_u32): Remove.
19364 (__arm_vabdq_s32): Remove.
19365 (__arm_vabdq_m_s8): Remove.
19366 (__arm_vabdq_m_s32): Remove.
19367 (__arm_vabdq_m_s16): Remove.
19368 (__arm_vabdq_m_u8): Remove.
19369 (__arm_vabdq_m_u32): Remove.
19370 (__arm_vabdq_m_u16): Remove.
19371 (__arm_vabdq_x_s8): Remove.
19372 (__arm_vabdq_x_s16): Remove.
19373 (__arm_vabdq_x_s32): Remove.
19374 (__arm_vabdq_x_u8): Remove.
19375 (__arm_vabdq_x_u16): Remove.
19376 (__arm_vabdq_x_u32): Remove.
19377 (__arm_vabdq_f16): Remove.
19378 (__arm_vabdq_f32): Remove.
19379 (__arm_vabdq_m_f32): Remove.
19380 (__arm_vabdq_m_f16): Remove.
19381 (__arm_vabdq_x_f16): Remove.
19382 (__arm_vabdq_x_f32): Remove.
19383 (__arm_vabdq): Remove.
19384 (__arm_vabdq_m): Remove.
19385 (__arm_vabdq_x): Remove.
19387 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19389 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
19390 (MVE_FP_VABDQ_ONLY): New.
19391 (mve_insn): Add vabd.
19392 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
19393 (@mve_<mve_insn>q_f<mode>): ... this.
19394 (mve_vabdq_m_f<mode>): Remove.
19396 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19398 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
19399 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
19400 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
19401 * config/arm/arm_mve.h (vqrdmulhq): Remove.
19402 (vqrdmulhq_m): Remove.
19403 (vqrdmulhq_s8): Remove.
19404 (vqrdmulhq_n_s8): Remove.
19405 (vqrdmulhq_s16): Remove.
19406 (vqrdmulhq_n_s16): Remove.
19407 (vqrdmulhq_s32): Remove.
19408 (vqrdmulhq_n_s32): Remove.
19409 (vqrdmulhq_m_n_s8): Remove.
19410 (vqrdmulhq_m_n_s32): Remove.
19411 (vqrdmulhq_m_n_s16): Remove.
19412 (vqrdmulhq_m_s8): Remove.
19413 (vqrdmulhq_m_s32): Remove.
19414 (vqrdmulhq_m_s16): Remove.
19415 (__arm_vqrdmulhq_s8): Remove.
19416 (__arm_vqrdmulhq_n_s8): Remove.
19417 (__arm_vqrdmulhq_s16): Remove.
19418 (__arm_vqrdmulhq_n_s16): Remove.
19419 (__arm_vqrdmulhq_s32): Remove.
19420 (__arm_vqrdmulhq_n_s32): Remove.
19421 (__arm_vqrdmulhq_m_n_s8): Remove.
19422 (__arm_vqrdmulhq_m_n_s32): Remove.
19423 (__arm_vqrdmulhq_m_n_s16): Remove.
19424 (__arm_vqrdmulhq_m_s8): Remove.
19425 (__arm_vqrdmulhq_m_s32): Remove.
19426 (__arm_vqrdmulhq_m_s16): Remove.
19427 (__arm_vqrdmulhq): Remove.
19428 (__arm_vqrdmulhq_m): Remove.
19430 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19432 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
19433 (MVE_SHIFT_N, MVE_SHIFT_R): New.
19434 (mve_insn): Add vqshl, vshl.
19435 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
19436 (mve_vshlq_n_<supf><mode>): Merge into ...
19437 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19438 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
19440 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
19441 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
19443 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
19444 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
19446 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19447 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
19449 (@mve_<mve_insn>q_<supf><mode>): ... this.
19451 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19453 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
19454 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
19455 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
19456 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
19458 * config/arm/arm_mve.h (vrshlq): Remove.
19459 (vrshlq_m_n): Remove.
19460 (vrshlq_m): Remove.
19461 (vrshlq_x): Remove.
19462 (vrshlq_u8): Remove.
19463 (vrshlq_n_u8): Remove.
19464 (vrshlq_s8): Remove.
19465 (vrshlq_n_s8): Remove.
19466 (vrshlq_u16): Remove.
19467 (vrshlq_n_u16): Remove.
19468 (vrshlq_s16): Remove.
19469 (vrshlq_n_s16): Remove.
19470 (vrshlq_u32): Remove.
19471 (vrshlq_n_u32): Remove.
19472 (vrshlq_s32): Remove.
19473 (vrshlq_n_s32): Remove.
19474 (vrshlq_m_n_u8): Remove.
19475 (vrshlq_m_n_s8): Remove.
19476 (vrshlq_m_n_u16): Remove.
19477 (vrshlq_m_n_s16): Remove.
19478 (vrshlq_m_n_u32): Remove.
19479 (vrshlq_m_n_s32): Remove.
19480 (vrshlq_m_s8): Remove.
19481 (vrshlq_m_s32): Remove.
19482 (vrshlq_m_s16): Remove.
19483 (vrshlq_m_u8): Remove.
19484 (vrshlq_m_u32): Remove.
19485 (vrshlq_m_u16): Remove.
19486 (vrshlq_x_s8): Remove.
19487 (vrshlq_x_s16): Remove.
19488 (vrshlq_x_s32): Remove.
19489 (vrshlq_x_u8): Remove.
19490 (vrshlq_x_u16): Remove.
19491 (vrshlq_x_u32): Remove.
19492 (__arm_vrshlq_u8): Remove.
19493 (__arm_vrshlq_n_u8): Remove.
19494 (__arm_vrshlq_s8): Remove.
19495 (__arm_vrshlq_n_s8): Remove.
19496 (__arm_vrshlq_u16): Remove.
19497 (__arm_vrshlq_n_u16): Remove.
19498 (__arm_vrshlq_s16): Remove.
19499 (__arm_vrshlq_n_s16): Remove.
19500 (__arm_vrshlq_u32): Remove.
19501 (__arm_vrshlq_n_u32): Remove.
19502 (__arm_vrshlq_s32): Remove.
19503 (__arm_vrshlq_n_s32): Remove.
19504 (__arm_vrshlq_m_n_u8): Remove.
19505 (__arm_vrshlq_m_n_s8): Remove.
19506 (__arm_vrshlq_m_n_u16): Remove.
19507 (__arm_vrshlq_m_n_s16): Remove.
19508 (__arm_vrshlq_m_n_u32): Remove.
19509 (__arm_vrshlq_m_n_s32): Remove.
19510 (__arm_vrshlq_m_s8): Remove.
19511 (__arm_vrshlq_m_s32): Remove.
19512 (__arm_vrshlq_m_s16): Remove.
19513 (__arm_vrshlq_m_u8): Remove.
19514 (__arm_vrshlq_m_u32): Remove.
19515 (__arm_vrshlq_m_u16): Remove.
19516 (__arm_vrshlq_x_s8): Remove.
19517 (__arm_vrshlq_x_s16): Remove.
19518 (__arm_vrshlq_x_s32): Remove.
19519 (__arm_vrshlq_x_u8): Remove.
19520 (__arm_vrshlq_x_u16): Remove.
19521 (__arm_vrshlq_x_u32): Remove.
19522 (__arm_vrshlq): Remove.
19523 (__arm_vrshlq_m_n): Remove.
19524 (__arm_vrshlq_m): Remove.
19525 (__arm_vrshlq_x): Remove.
19527 (vqrshlq_m_n): Remove.
19528 (vqrshlq_m): Remove.
19529 (vqrshlq_u8): Remove.
19530 (vqrshlq_n_u8): Remove.
19531 (vqrshlq_s8): Remove.
19532 (vqrshlq_n_s8): Remove.
19533 (vqrshlq_u16): Remove.
19534 (vqrshlq_n_u16): Remove.
19535 (vqrshlq_s16): Remove.
19536 (vqrshlq_n_s16): Remove.
19537 (vqrshlq_u32): Remove.
19538 (vqrshlq_n_u32): Remove.
19539 (vqrshlq_s32): Remove.
19540 (vqrshlq_n_s32): Remove.
19541 (vqrshlq_m_n_u8): Remove.
19542 (vqrshlq_m_n_s8): Remove.
19543 (vqrshlq_m_n_u16): Remove.
19544 (vqrshlq_m_n_s16): Remove.
19545 (vqrshlq_m_n_u32): Remove.
19546 (vqrshlq_m_n_s32): Remove.
19547 (vqrshlq_m_s8): Remove.
19548 (vqrshlq_m_s32): Remove.
19549 (vqrshlq_m_s16): Remove.
19550 (vqrshlq_m_u8): Remove.
19551 (vqrshlq_m_u32): Remove.
19552 (vqrshlq_m_u16): Remove.
19553 (__arm_vqrshlq_u8): Remove.
19554 (__arm_vqrshlq_n_u8): Remove.
19555 (__arm_vqrshlq_s8): Remove.
19556 (__arm_vqrshlq_n_s8): Remove.
19557 (__arm_vqrshlq_u16): Remove.
19558 (__arm_vqrshlq_n_u16): Remove.
19559 (__arm_vqrshlq_s16): Remove.
19560 (__arm_vqrshlq_n_s16): Remove.
19561 (__arm_vqrshlq_u32): Remove.
19562 (__arm_vqrshlq_n_u32): Remove.
19563 (__arm_vqrshlq_s32): Remove.
19564 (__arm_vqrshlq_n_s32): Remove.
19565 (__arm_vqrshlq_m_n_u8): Remove.
19566 (__arm_vqrshlq_m_n_s8): Remove.
19567 (__arm_vqrshlq_m_n_u16): Remove.
19568 (__arm_vqrshlq_m_n_s16): Remove.
19569 (__arm_vqrshlq_m_n_u32): Remove.
19570 (__arm_vqrshlq_m_n_s32): Remove.
19571 (__arm_vqrshlq_m_s8): Remove.
19572 (__arm_vqrshlq_m_s32): Remove.
19573 (__arm_vqrshlq_m_s16): Remove.
19574 (__arm_vqrshlq_m_u8): Remove.
19575 (__arm_vqrshlq_m_u32): Remove.
19576 (__arm_vqrshlq_m_u16): Remove.
19577 (__arm_vqrshlq): Remove.
19578 (__arm_vqrshlq_m_n): Remove.
19579 (__arm_vqrshlq_m): Remove.
19581 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19583 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
19584 (mve_insn): Add vqrshl, vrshl.
19585 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
19586 (mve_vrshlq_n_<supf><mode>): Merge into ...
19587 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19588 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
19590 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19592 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
19594 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
19595 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
19597 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19600 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
19601 denegrate PHI optmization.
19603 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
19605 * config/i386/predicates.md (register_no_SP_operand):
19606 Rename from index_register_operand.
19607 (call_register_operand): Update for rename.
19608 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
19610 2023-05-05 Tamar Christina <tamar.christina@arm.com>
19613 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
19614 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
19615 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
19616 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
19617 (s-match): Split into s-generic-match and s-gimple-match.
19618 * configure.ac (with-matchpd-partitions,
19619 DEFAULT_MATCHPD_PARTITIONS): New.
19620 * configure: Regenerate.
19622 2023-05-05 Tamar Christina <tamar.christina@arm.com>
19625 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
19626 (decision_tree::gen): Accept list of files instead of single and update
19627 to write function definition to header and main file.
19628 (write_predicate): Likewise.
19629 (write_header): Emit pragmas and new includes.
19630 (main): Create file buffers and cleanup.
19631 (showUsage, write_header_includes): New.
19633 2023-05-05 Tamar Christina <tamar.christina@arm.com>
19636 * Makefile.in (OBJS): Add gimple-match-exports.o.
19637 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
19638 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
19639 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
19640 gimple_resimplify5, constant_for_folding, convert_conditional_op,
19641 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
19642 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
19643 do_valueize, try_conditional_simplification, gimple_extract,
19644 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
19645 commutative_ternary_op_p, first_commutative_argument,
19646 associative_binary_op_p, directly_supported_p,
19647 get_conditional_internal_fn): Moved to gimple-match-exports.cc
19648 * gimple-match-exports.cc: New file.
19650 2023-05-05 Tamar Christina <tamar.christina@arm.com>
19653 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
19655 (dt_simplify::gen_1): Use it.
19657 2023-05-05 Tamar Christina <tamar.christina@arm.com>
19660 * genmatch.cc (output_line_directive): Only emit commented directive
19663 2023-05-05 Tamar Christina <tamar.christina@arm.com>
19666 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
19668 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
19670 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
19671 unused in_mode/in_n variables.
19673 2023-05-05 Richard Biener <rguenther@suse.de>
19675 PR tree-optimization/109735
19676 * tree-vect-stmts.cc (vectorizable_operation): Perform
19677 conversion for POINTER_DIFF_EXPR unconditionally.
19679 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
19681 * config/i386/mmx.md (mulv2si3): New expander.
19682 (*mulv2si3): New insn pattern.
19684 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
19685 Thomas Schwinge <thomas@codesourcery.com>
19688 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
19689 alongside reverse-offload function table to prevent NULL values
19690 of the function addresses.
19692 2023-05-05 Jakub Jelinek <jakub@redhat.com>
19694 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
19696 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
19698 2023-05-05 Andrew Pinski <apinski@marvell.com>
19700 PR tree-optimization/109732
19701 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
19702 of the argtrue/argfalse.
19704 2023-05-05 Andrew Pinski <apinski@marvell.com>
19706 PR tree-optimization/109722
19707 * match.pd: Extend the `ABS<a> == 0` pattern
19708 to cover `ABSU<a> == 0` too.
19710 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
19713 * config/i386/predicates.md (index_reg_operand): New predicate.
19714 * config/i386/i386.md (ashift to lea spliter): Use
19715 general_reg_operand and index_reg_operand predicates.
19717 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19719 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
19720 Rename and reimplement with RTL codes to...
19721 (aarch64_<optab>hn2<mode>_insn_le): .. This.
19722 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
19723 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
19725 (aarch64_<optab>hn2<mode>_insn_be): ... This.
19726 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
19727 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
19728 (aarch64_<optab>hn2<mode>): ... This.
19729 (aarch64_r<optab>hn2<mode>): New expander.
19730 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
19731 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
19732 (ADDSUBHN): Delete.
19733 (sur): Remove handling of the above.
19734 (addsub): Likewise.
19736 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19738 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
19740 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
19741 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
19742 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
19743 (aarch64_<sur><addsub>hn<mode>): Delete.
19744 (aarch64_<optab>hn<mode>): New define_expand.
19745 (aarch64_r<optab>hn<mode>): Likewise.
19746 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
19749 2023-05-04 Andrew Pinski <apinski@marvell.com>
19751 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
19752 diamond form bb with forwarder only empty blocks better.
19754 2023-05-04 Andrew Pinski <apinski@marvell.com>
19756 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
19757 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
19758 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
19759 of an inline version of it.
19760 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
19761 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
19763 2023-05-04 Andrew Pinski <apinski@marvell.com>
19765 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
19766 the default argument value for dce_ssa_names to nullptr.
19767 Check to make sure dce_ssa_names is a non-nullptr before
19768 calling simple_dce_from_worklist.
19770 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
19772 * config/i386/predicates.md (index_register_operand): Reject
19773 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
19774 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
19775 (call_register_no_elim_operand): Rewrite as ...
19776 (call_register_operand): ... this.
19777 (call_insn_operand): Use call_register_operand predicate.
19779 2023-05-04 Richard Biener <rguenther@suse.de>
19781 PR tree-optimization/109721
19782 * tree-vect-stmts.cc (vectorizable_operation): Make sure
19783 to test word_mode for all !target_support_p operations.
19785 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19788 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
19789 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
19790 (aarch64_mla<mode>): Rename to...
19791 (aarch64_mla<mode><vczle><vczbe>): ... This.
19792 (*aarch64_mla_elt<mode>): Rename to...
19793 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
19794 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
19795 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
19796 (aarch64_mla_n<mode>): Rename to...
19797 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
19798 (aarch64_mls<mode>): Rename to...
19799 (aarch64_mls<mode><vczle><vczbe>): ... This.
19800 (*aarch64_mls_elt<mode>): Rename to...
19801 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
19802 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
19803 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
19804 (aarch64_mls_n<mode>): Rename to...
19805 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
19806 (fma<mode>4): Rename to...
19807 (fma<mode>4<vczle><vczbe>): ... This.
19808 (*aarch64_fma4_elt<mode>): Rename to...
19809 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
19810 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
19811 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
19812 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
19813 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
19814 (fnma<mode>4): Rename to...
19815 (fnma<mode>4<vczle><vczbe>): ... This.
19816 (*aarch64_fnma4_elt<mode>): Rename to...
19817 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
19818 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
19819 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
19820 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
19821 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
19822 (aarch64_simd_bsl<mode>_internal): Rename to...
19823 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
19824 (*aarch64_simd_bsl<mode>_alt): Rename to...
19825 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
19827 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19830 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
19831 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
19832 (fabd<mode>3): Rename to...
19833 (fabd<mode>3<vczle><vczbe>): ... This.
19834 (aarch64_<optab>p<mode>): Rename to...
19835 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
19836 (aarch64_faddp<mode>): Rename to...
19837 (aarch64_faddp<mode><vczle><vczbe>): ... This.
19839 2023-05-04 Martin Liska <mliska@suse.cz>
19841 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
19842 (print_version): Use it.
19843 (generate_results): Likewise.
19845 2023-05-04 Richard Biener <rguenther@suse.de>
19847 * tree-cfg.h (last_stmt): Rename to ...
19848 (last_nondebug_stmt): ... this.
19849 * tree-cfg.cc (last_stmt): Rename to ...
19850 (last_nondebug_stmt): ... this.
19851 (assign_discriminators): Adjust.
19852 (group_case_labels_stmt): Likewise.
19853 (gimple_can_duplicate_bb_p): Likewise.
19854 (execute_fixup_cfg): Likewise.
19855 * auto-profile.cc (afdo_propagate_circuit): Likewise.
19856 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
19857 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
19858 (determine_parallel_type): Likewise.
19859 (adjust_context_and_scope): Likewise.
19860 (expand_task_call): Likewise.
19861 (remove_exit_barrier): Likewise.
19862 (expand_omp_taskreg): Likewise.
19863 (expand_omp_for_init_counts): Likewise.
19864 (expand_omp_for_init_vars): Likewise.
19865 (expand_omp_for_static_chunk): Likewise.
19866 (expand_omp_simd): Likewise.
19867 (expand_oacc_for): Likewise.
19868 (expand_omp_for): Likewise.
19869 (expand_omp_sections): Likewise.
19870 (expand_omp_atomic_fetch_op): Likewise.
19871 (expand_omp_atomic_cas): Likewise.
19872 (expand_omp_atomic): Likewise.
19873 (expand_omp_target): Likewise.
19874 (expand_omp): Likewise.
19875 (omp_make_gimple_edges): Likewise.
19876 * trans-mem.cc (tm_region_init): Likewise.
19877 * tree-inline.cc (redirect_all_calls): Likewise.
19878 * tree-parloops.cc (gen_parallel_loop): Likewise.
19879 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
19880 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
19882 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
19883 (may_eliminate_iv): Likewise.
19884 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
19885 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
19887 (estimate_numbers_of_iterations): Likewise.
19888 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
19889 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
19890 (set_predicates_for_bb): Likewise.
19891 (init_loop_unswitch_info): Likewise.
19892 (hoist_guard): Likewise.
19893 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
19894 (minmax_replacement): Likewise.
19895 * tree-ssa-reassoc.cc (update_range_test): Likewise.
19896 (optimize_range_tests_to_bit_test): Likewise.
19897 (optimize_range_tests_var_bound): Likewise.
19898 (optimize_range_tests): Likewise.
19899 (no_side_effect_bb): Likewise.
19900 (suitable_cond_bb): Likewise.
19901 (maybe_optimize_range_tests): Likewise.
19902 (reassociate_bb): Likewise.
19903 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
19905 2023-05-04 Jakub Jelinek <jakub@redhat.com>
19908 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
19909 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
19910 for it only if it still has TImode. Don't decide whether to call
19911 fix_debug_reg_uses based on whether SRC is ever set or not.
19913 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
19915 * config/cris/cris.cc (cris_split_constant): New function.
19916 * config/cris/cris.md (splitop): New iterator.
19917 (opsplit1): New define_peephole2.
19918 * config/cris/cris-protos.h (cris_split_constant): Declare.
19919 (cris_splittable_constant_p): New macro.
19921 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
19923 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
19926 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
19928 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
19929 lra_in_progress, not reload_in_progress.
19930 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
19931 * config/cris/constraints.md ("Q"): Ditto.
19933 2023-05-03 Andrew Pinski <apinski@marvell.com>
19935 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
19936 stats on removed number of statements and phis.
19938 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
19940 PR tree-optimization/109711
19941 * value-range.cc (irange::verify_range): Allow types of
19944 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
19947 * calls.cc (can_implement_as_sibling_call_p): Reject calls
19948 to __sanitizer_cov_trace_pc.
19950 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
19953 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
19954 a new ABI break parameter for GCC 14. Set it to the alignment
19955 of enums that have an underlying type. Take the true alignment
19956 of such enums from the TYPE_ALIGN of the underlying type's
19958 (aarch64_function_arg_boundary): Update accordingly.
19959 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
19960 Warn about ABI differences.
19962 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
19965 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
19966 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
19967 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
19968 (aarch64_gimplify_va_arg_expr): Likewise.
19970 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
19972 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
19973 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
19974 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
19976 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
19977 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
19978 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
19979 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
19980 * config/arm/arm_mve.h (vhsubq): Remove.
19982 (vhaddq_m): Remove.
19983 (vhsubq_m): Remove.
19984 (vhaddq_x): Remove.
19985 (vhsubq_x): Remove.
19986 (vhsubq_u8): Remove.
19987 (vhsubq_n_u8): Remove.
19988 (vhaddq_u8): Remove.
19989 (vhaddq_n_u8): Remove.
19990 (vhsubq_s8): Remove.
19991 (vhsubq_n_s8): Remove.
19992 (vhaddq_s8): Remove.
19993 (vhaddq_n_s8): Remove.
19994 (vhsubq_u16): Remove.
19995 (vhsubq_n_u16): Remove.
19996 (vhaddq_u16): Remove.
19997 (vhaddq_n_u16): Remove.
19998 (vhsubq_s16): Remove.
19999 (vhsubq_n_s16): Remove.
20000 (vhaddq_s16): Remove.
20001 (vhaddq_n_s16): Remove.
20002 (vhsubq_u32): Remove.
20003 (vhsubq_n_u32): Remove.
20004 (vhaddq_u32): Remove.
20005 (vhaddq_n_u32): Remove.
20006 (vhsubq_s32): Remove.
20007 (vhsubq_n_s32): Remove.
20008 (vhaddq_s32): Remove.
20009 (vhaddq_n_s32): Remove.
20010 (vhaddq_m_n_s8): Remove.
20011 (vhaddq_m_n_s32): Remove.
20012 (vhaddq_m_n_s16): Remove.
20013 (vhaddq_m_n_u8): Remove.
20014 (vhaddq_m_n_u32): Remove.
20015 (vhaddq_m_n_u16): Remove.
20016 (vhaddq_m_s8): Remove.
20017 (vhaddq_m_s32): Remove.
20018 (vhaddq_m_s16): Remove.
20019 (vhaddq_m_u8): Remove.
20020 (vhaddq_m_u32): Remove.
20021 (vhaddq_m_u16): Remove.
20022 (vhsubq_m_n_s8): Remove.
20023 (vhsubq_m_n_s32): Remove.
20024 (vhsubq_m_n_s16): Remove.
20025 (vhsubq_m_n_u8): Remove.
20026 (vhsubq_m_n_u32): Remove.
20027 (vhsubq_m_n_u16): Remove.
20028 (vhsubq_m_s8): Remove.
20029 (vhsubq_m_s32): Remove.
20030 (vhsubq_m_s16): Remove.
20031 (vhsubq_m_u8): Remove.
20032 (vhsubq_m_u32): Remove.
20033 (vhsubq_m_u16): Remove.
20034 (vhaddq_x_n_s8): Remove.
20035 (vhaddq_x_n_s16): Remove.
20036 (vhaddq_x_n_s32): Remove.
20037 (vhaddq_x_n_u8): Remove.
20038 (vhaddq_x_n_u16): Remove.
20039 (vhaddq_x_n_u32): Remove.
20040 (vhaddq_x_s8): Remove.
20041 (vhaddq_x_s16): Remove.
20042 (vhaddq_x_s32): Remove.
20043 (vhaddq_x_u8): Remove.
20044 (vhaddq_x_u16): Remove.
20045 (vhaddq_x_u32): Remove.
20046 (vhsubq_x_n_s8): Remove.
20047 (vhsubq_x_n_s16): Remove.
20048 (vhsubq_x_n_s32): Remove.
20049 (vhsubq_x_n_u8): Remove.
20050 (vhsubq_x_n_u16): Remove.
20051 (vhsubq_x_n_u32): Remove.
20052 (vhsubq_x_s8): Remove.
20053 (vhsubq_x_s16): Remove.
20054 (vhsubq_x_s32): Remove.
20055 (vhsubq_x_u8): Remove.
20056 (vhsubq_x_u16): Remove.
20057 (vhsubq_x_u32): Remove.
20058 (__arm_vhsubq_u8): Remove.
20059 (__arm_vhsubq_n_u8): Remove.
20060 (__arm_vhaddq_u8): Remove.
20061 (__arm_vhaddq_n_u8): Remove.
20062 (__arm_vhsubq_s8): Remove.
20063 (__arm_vhsubq_n_s8): Remove.
20064 (__arm_vhaddq_s8): Remove.
20065 (__arm_vhaddq_n_s8): Remove.
20066 (__arm_vhsubq_u16): Remove.
20067 (__arm_vhsubq_n_u16): Remove.
20068 (__arm_vhaddq_u16): Remove.
20069 (__arm_vhaddq_n_u16): Remove.
20070 (__arm_vhsubq_s16): Remove.
20071 (__arm_vhsubq_n_s16): Remove.
20072 (__arm_vhaddq_s16): Remove.
20073 (__arm_vhaddq_n_s16): Remove.
20074 (__arm_vhsubq_u32): Remove.
20075 (__arm_vhsubq_n_u32): Remove.
20076 (__arm_vhaddq_u32): Remove.
20077 (__arm_vhaddq_n_u32): Remove.
20078 (__arm_vhsubq_s32): Remove.
20079 (__arm_vhsubq_n_s32): Remove.
20080 (__arm_vhaddq_s32): Remove.
20081 (__arm_vhaddq_n_s32): Remove.
20082 (__arm_vhaddq_m_n_s8): Remove.
20083 (__arm_vhaddq_m_n_s32): Remove.
20084 (__arm_vhaddq_m_n_s16): Remove.
20085 (__arm_vhaddq_m_n_u8): Remove.
20086 (__arm_vhaddq_m_n_u32): Remove.
20087 (__arm_vhaddq_m_n_u16): Remove.
20088 (__arm_vhaddq_m_s8): Remove.
20089 (__arm_vhaddq_m_s32): Remove.
20090 (__arm_vhaddq_m_s16): Remove.
20091 (__arm_vhaddq_m_u8): Remove.
20092 (__arm_vhaddq_m_u32): Remove.
20093 (__arm_vhaddq_m_u16): Remove.
20094 (__arm_vhsubq_m_n_s8): Remove.
20095 (__arm_vhsubq_m_n_s32): Remove.
20096 (__arm_vhsubq_m_n_s16): Remove.
20097 (__arm_vhsubq_m_n_u8): Remove.
20098 (__arm_vhsubq_m_n_u32): Remove.
20099 (__arm_vhsubq_m_n_u16): Remove.
20100 (__arm_vhsubq_m_s8): Remove.
20101 (__arm_vhsubq_m_s32): Remove.
20102 (__arm_vhsubq_m_s16): Remove.
20103 (__arm_vhsubq_m_u8): Remove.
20104 (__arm_vhsubq_m_u32): Remove.
20105 (__arm_vhsubq_m_u16): Remove.
20106 (__arm_vhaddq_x_n_s8): Remove.
20107 (__arm_vhaddq_x_n_s16): Remove.
20108 (__arm_vhaddq_x_n_s32): Remove.
20109 (__arm_vhaddq_x_n_u8): Remove.
20110 (__arm_vhaddq_x_n_u16): Remove.
20111 (__arm_vhaddq_x_n_u32): Remove.
20112 (__arm_vhaddq_x_s8): Remove.
20113 (__arm_vhaddq_x_s16): Remove.
20114 (__arm_vhaddq_x_s32): Remove.
20115 (__arm_vhaddq_x_u8): Remove.
20116 (__arm_vhaddq_x_u16): Remove.
20117 (__arm_vhaddq_x_u32): Remove.
20118 (__arm_vhsubq_x_n_s8): Remove.
20119 (__arm_vhsubq_x_n_s16): Remove.
20120 (__arm_vhsubq_x_n_s32): Remove.
20121 (__arm_vhsubq_x_n_u8): Remove.
20122 (__arm_vhsubq_x_n_u16): Remove.
20123 (__arm_vhsubq_x_n_u32): Remove.
20124 (__arm_vhsubq_x_s8): Remove.
20125 (__arm_vhsubq_x_s16): Remove.
20126 (__arm_vhsubq_x_s32): Remove.
20127 (__arm_vhsubq_x_u8): Remove.
20128 (__arm_vhsubq_x_u16): Remove.
20129 (__arm_vhsubq_x_u32): Remove.
20130 (__arm_vhsubq): Remove.
20131 (__arm_vhaddq): Remove.
20132 (__arm_vhaddq_m): Remove.
20133 (__arm_vhsubq_m): Remove.
20134 (__arm_vhaddq_x): Remove.
20135 (__arm_vhsubq_x): Remove.
20137 (vmulhq_m): Remove.
20138 (vmulhq_x): Remove.
20139 (vmulhq_u8): Remove.
20140 (vmulhq_s8): Remove.
20141 (vmulhq_u16): Remove.
20142 (vmulhq_s16): Remove.
20143 (vmulhq_u32): Remove.
20144 (vmulhq_s32): Remove.
20145 (vmulhq_m_s8): Remove.
20146 (vmulhq_m_s32): Remove.
20147 (vmulhq_m_s16): Remove.
20148 (vmulhq_m_u8): Remove.
20149 (vmulhq_m_u32): Remove.
20150 (vmulhq_m_u16): Remove.
20151 (vmulhq_x_s8): Remove.
20152 (vmulhq_x_s16): Remove.
20153 (vmulhq_x_s32): Remove.
20154 (vmulhq_x_u8): Remove.
20155 (vmulhq_x_u16): Remove.
20156 (vmulhq_x_u32): Remove.
20157 (__arm_vmulhq_u8): Remove.
20158 (__arm_vmulhq_s8): Remove.
20159 (__arm_vmulhq_u16): Remove.
20160 (__arm_vmulhq_s16): Remove.
20161 (__arm_vmulhq_u32): Remove.
20162 (__arm_vmulhq_s32): Remove.
20163 (__arm_vmulhq_m_s8): Remove.
20164 (__arm_vmulhq_m_s32): Remove.
20165 (__arm_vmulhq_m_s16): Remove.
20166 (__arm_vmulhq_m_u8): Remove.
20167 (__arm_vmulhq_m_u32): Remove.
20168 (__arm_vmulhq_m_u16): Remove.
20169 (__arm_vmulhq_x_s8): Remove.
20170 (__arm_vmulhq_x_s16): Remove.
20171 (__arm_vmulhq_x_s32): Remove.
20172 (__arm_vmulhq_x_u8): Remove.
20173 (__arm_vmulhq_x_u16): Remove.
20174 (__arm_vmulhq_x_u32): Remove.
20175 (__arm_vmulhq): Remove.
20176 (__arm_vmulhq_m): Remove.
20177 (__arm_vmulhq_x): Remove.
20180 (vqaddq_m): Remove.
20181 (vqsubq_m): Remove.
20182 (vqsubq_u8): Remove.
20183 (vqsubq_n_u8): Remove.
20184 (vqaddq_u8): Remove.
20185 (vqaddq_n_u8): Remove.
20186 (vqsubq_s8): Remove.
20187 (vqsubq_n_s8): Remove.
20188 (vqaddq_s8): Remove.
20189 (vqaddq_n_s8): Remove.
20190 (vqsubq_u16): Remove.
20191 (vqsubq_n_u16): Remove.
20192 (vqaddq_u16): Remove.
20193 (vqaddq_n_u16): Remove.
20194 (vqsubq_s16): Remove.
20195 (vqsubq_n_s16): Remove.
20196 (vqaddq_s16): Remove.
20197 (vqaddq_n_s16): Remove.
20198 (vqsubq_u32): Remove.
20199 (vqsubq_n_u32): Remove.
20200 (vqaddq_u32): Remove.
20201 (vqaddq_n_u32): Remove.
20202 (vqsubq_s32): Remove.
20203 (vqsubq_n_s32): Remove.
20204 (vqaddq_s32): Remove.
20205 (vqaddq_n_s32): Remove.
20206 (vqaddq_m_n_s8): Remove.
20207 (vqaddq_m_n_s32): Remove.
20208 (vqaddq_m_n_s16): Remove.
20209 (vqaddq_m_n_u8): Remove.
20210 (vqaddq_m_n_u32): Remove.
20211 (vqaddq_m_n_u16): Remove.
20212 (vqaddq_m_s8): Remove.
20213 (vqaddq_m_s32): Remove.
20214 (vqaddq_m_s16): Remove.
20215 (vqaddq_m_u8): Remove.
20216 (vqaddq_m_u32): Remove.
20217 (vqaddq_m_u16): Remove.
20218 (vqsubq_m_n_s8): Remove.
20219 (vqsubq_m_n_s32): Remove.
20220 (vqsubq_m_n_s16): Remove.
20221 (vqsubq_m_n_u8): Remove.
20222 (vqsubq_m_n_u32): Remove.
20223 (vqsubq_m_n_u16): Remove.
20224 (vqsubq_m_s8): Remove.
20225 (vqsubq_m_s32): Remove.
20226 (vqsubq_m_s16): Remove.
20227 (vqsubq_m_u8): Remove.
20228 (vqsubq_m_u32): Remove.
20229 (vqsubq_m_u16): Remove.
20230 (__arm_vqsubq_u8): Remove.
20231 (__arm_vqsubq_n_u8): Remove.
20232 (__arm_vqaddq_u8): Remove.
20233 (__arm_vqaddq_n_u8): Remove.
20234 (__arm_vqsubq_s8): Remove.
20235 (__arm_vqsubq_n_s8): Remove.
20236 (__arm_vqaddq_s8): Remove.
20237 (__arm_vqaddq_n_s8): Remove.
20238 (__arm_vqsubq_u16): Remove.
20239 (__arm_vqsubq_n_u16): Remove.
20240 (__arm_vqaddq_u16): Remove.
20241 (__arm_vqaddq_n_u16): Remove.
20242 (__arm_vqsubq_s16): Remove.
20243 (__arm_vqsubq_n_s16): Remove.
20244 (__arm_vqaddq_s16): Remove.
20245 (__arm_vqaddq_n_s16): Remove.
20246 (__arm_vqsubq_u32): Remove.
20247 (__arm_vqsubq_n_u32): Remove.
20248 (__arm_vqaddq_u32): Remove.
20249 (__arm_vqaddq_n_u32): Remove.
20250 (__arm_vqsubq_s32): Remove.
20251 (__arm_vqsubq_n_s32): Remove.
20252 (__arm_vqaddq_s32): Remove.
20253 (__arm_vqaddq_n_s32): Remove.
20254 (__arm_vqaddq_m_n_s8): Remove.
20255 (__arm_vqaddq_m_n_s32): Remove.
20256 (__arm_vqaddq_m_n_s16): Remove.
20257 (__arm_vqaddq_m_n_u8): Remove.
20258 (__arm_vqaddq_m_n_u32): Remove.
20259 (__arm_vqaddq_m_n_u16): Remove.
20260 (__arm_vqaddq_m_s8): Remove.
20261 (__arm_vqaddq_m_s32): Remove.
20262 (__arm_vqaddq_m_s16): Remove.
20263 (__arm_vqaddq_m_u8): Remove.
20264 (__arm_vqaddq_m_u32): Remove.
20265 (__arm_vqaddq_m_u16): Remove.
20266 (__arm_vqsubq_m_n_s8): Remove.
20267 (__arm_vqsubq_m_n_s32): Remove.
20268 (__arm_vqsubq_m_n_s16): Remove.
20269 (__arm_vqsubq_m_n_u8): Remove.
20270 (__arm_vqsubq_m_n_u32): Remove.
20271 (__arm_vqsubq_m_n_u16): Remove.
20272 (__arm_vqsubq_m_s8): Remove.
20273 (__arm_vqsubq_m_s32): Remove.
20274 (__arm_vqsubq_m_s16): Remove.
20275 (__arm_vqsubq_m_u8): Remove.
20276 (__arm_vqsubq_m_u32): Remove.
20277 (__arm_vqsubq_m_u16): Remove.
20278 (__arm_vqsubq): Remove.
20279 (__arm_vqaddq): Remove.
20280 (__arm_vqaddq_m): Remove.
20281 (__arm_vqsubq_m): Remove.
20282 (vqdmulhq): Remove.
20283 (vqdmulhq_m): Remove.
20284 (vqdmulhq_s8): Remove.
20285 (vqdmulhq_n_s8): Remove.
20286 (vqdmulhq_s16): Remove.
20287 (vqdmulhq_n_s16): Remove.
20288 (vqdmulhq_s32): Remove.
20289 (vqdmulhq_n_s32): Remove.
20290 (vqdmulhq_m_n_s8): Remove.
20291 (vqdmulhq_m_n_s32): Remove.
20292 (vqdmulhq_m_n_s16): Remove.
20293 (vqdmulhq_m_s8): Remove.
20294 (vqdmulhq_m_s32): Remove.
20295 (vqdmulhq_m_s16): Remove.
20296 (__arm_vqdmulhq_s8): Remove.
20297 (__arm_vqdmulhq_n_s8): Remove.
20298 (__arm_vqdmulhq_s16): Remove.
20299 (__arm_vqdmulhq_n_s16): Remove.
20300 (__arm_vqdmulhq_s32): Remove.
20301 (__arm_vqdmulhq_n_s32): Remove.
20302 (__arm_vqdmulhq_m_n_s8): Remove.
20303 (__arm_vqdmulhq_m_n_s32): Remove.
20304 (__arm_vqdmulhq_m_n_s16): Remove.
20305 (__arm_vqdmulhq_m_s8): Remove.
20306 (__arm_vqdmulhq_m_s32): Remove.
20307 (__arm_vqdmulhq_m_s16): Remove.
20308 (__arm_vqdmulhq): Remove.
20309 (__arm_vqdmulhq_m): Remove.
20311 (vrhaddq_m): Remove.
20312 (vrhaddq_x): Remove.
20313 (vrhaddq_u8): Remove.
20314 (vrhaddq_s8): Remove.
20315 (vrhaddq_u16): Remove.
20316 (vrhaddq_s16): Remove.
20317 (vrhaddq_u32): Remove.
20318 (vrhaddq_s32): Remove.
20319 (vrhaddq_m_s8): Remove.
20320 (vrhaddq_m_s32): Remove.
20321 (vrhaddq_m_s16): Remove.
20322 (vrhaddq_m_u8): Remove.
20323 (vrhaddq_m_u32): Remove.
20324 (vrhaddq_m_u16): Remove.
20325 (vrhaddq_x_s8): Remove.
20326 (vrhaddq_x_s16): Remove.
20327 (vrhaddq_x_s32): Remove.
20328 (vrhaddq_x_u8): Remove.
20329 (vrhaddq_x_u16): Remove.
20330 (vrhaddq_x_u32): Remove.
20331 (__arm_vrhaddq_u8): Remove.
20332 (__arm_vrhaddq_s8): Remove.
20333 (__arm_vrhaddq_u16): Remove.
20334 (__arm_vrhaddq_s16): Remove.
20335 (__arm_vrhaddq_u32): Remove.
20336 (__arm_vrhaddq_s32): Remove.
20337 (__arm_vrhaddq_m_s8): Remove.
20338 (__arm_vrhaddq_m_s32): Remove.
20339 (__arm_vrhaddq_m_s16): Remove.
20340 (__arm_vrhaddq_m_u8): Remove.
20341 (__arm_vrhaddq_m_u32): Remove.
20342 (__arm_vrhaddq_m_u16): Remove.
20343 (__arm_vrhaddq_x_s8): Remove.
20344 (__arm_vrhaddq_x_s16): Remove.
20345 (__arm_vrhaddq_x_s32): Remove.
20346 (__arm_vrhaddq_x_u8): Remove.
20347 (__arm_vrhaddq_x_u16): Remove.
20348 (__arm_vrhaddq_x_u32): Remove.
20349 (__arm_vrhaddq): Remove.
20350 (__arm_vrhaddq_m): Remove.
20351 (__arm_vrhaddq_x): Remove.
20353 (vrmulhq_m): Remove.
20354 (vrmulhq_x): Remove.
20355 (vrmulhq_u8): Remove.
20356 (vrmulhq_s8): Remove.
20357 (vrmulhq_u16): Remove.
20358 (vrmulhq_s16): Remove.
20359 (vrmulhq_u32): Remove.
20360 (vrmulhq_s32): Remove.
20361 (vrmulhq_m_s8): Remove.
20362 (vrmulhq_m_s32): Remove.
20363 (vrmulhq_m_s16): Remove.
20364 (vrmulhq_m_u8): Remove.
20365 (vrmulhq_m_u32): Remove.
20366 (vrmulhq_m_u16): Remove.
20367 (vrmulhq_x_s8): Remove.
20368 (vrmulhq_x_s16): Remove.
20369 (vrmulhq_x_s32): Remove.
20370 (vrmulhq_x_u8): Remove.
20371 (vrmulhq_x_u16): Remove.
20372 (vrmulhq_x_u32): Remove.
20373 (__arm_vrmulhq_u8): Remove.
20374 (__arm_vrmulhq_s8): Remove.
20375 (__arm_vrmulhq_u16): Remove.
20376 (__arm_vrmulhq_s16): Remove.
20377 (__arm_vrmulhq_u32): Remove.
20378 (__arm_vrmulhq_s32): Remove.
20379 (__arm_vrmulhq_m_s8): Remove.
20380 (__arm_vrmulhq_m_s32): Remove.
20381 (__arm_vrmulhq_m_s16): Remove.
20382 (__arm_vrmulhq_m_u8): Remove.
20383 (__arm_vrmulhq_m_u32): Remove.
20384 (__arm_vrmulhq_m_u16): Remove.
20385 (__arm_vrmulhq_x_s8): Remove.
20386 (__arm_vrmulhq_x_s16): Remove.
20387 (__arm_vrmulhq_x_s32): Remove.
20388 (__arm_vrmulhq_x_u8): Remove.
20389 (__arm_vrmulhq_x_u16): Remove.
20390 (__arm_vrmulhq_x_u32): Remove.
20391 (__arm_vrmulhq): Remove.
20392 (__arm_vrmulhq_m): Remove.
20393 (__arm_vrmulhq_x): Remove.
20395 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20397 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
20398 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
20399 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
20400 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
20401 * config/arm/mve.md (mve_vabdq_<supf><mode>)
20402 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
20403 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
20404 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
20405 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
20406 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
20407 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
20409 (@mve_<mve_insn>q_<supf><mode>): ... this.
20410 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
20411 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
20412 gen_mve_vhaddq / gen_mve_vrhaddq.
20414 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20416 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
20417 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
20418 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
20419 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
20420 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
20421 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
20422 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
20423 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
20424 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
20425 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
20426 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
20427 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
20428 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20430 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20432 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
20433 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
20435 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
20436 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
20437 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
20438 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
20439 (mve_vqsubq_n_<supf><mode>): Merge into ...
20440 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20442 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20444 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
20445 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
20446 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
20447 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
20448 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
20449 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
20450 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
20451 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
20452 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
20453 (mve_vshlq_m_<supf><mode>): Merged into
20454 @mve_<mve_insn>q_m_<supf><mode>.
20455 (mve_vabdq_m_<supf><mode>): Likewise.
20456 (mve_vhaddq_m_<supf><mode>): Likewise.
20457 (mve_vhsubq_m_<supf><mode>): Likewise.
20458 (mve_vmaxq_m_<supf><mode>): Likewise.
20459 (mve_vminq_m_<supf><mode>): Likewise.
20460 (mve_vmulhq_m_<supf><mode>): Likewise.
20461 (mve_vqaddq_m_<supf><mode>): Likewise.
20462 (mve_vqrshlq_m_<supf><mode>): Likewise.
20463 (mve_vqshlq_m_<supf><mode>): Likewise.
20464 (mve_vqsubq_m_<supf><mode>): Likewise.
20465 (mve_vrhaddq_m_<supf><mode>): Likewise.
20466 (mve_vrmulhq_m_<supf><mode>): Likewise.
20467 (mve_vrshlq_m_<supf><mode>): Likewise.
20468 (mve_vqdmladhq_m_s<mode>): Likewise.
20469 (mve_vqdmladhxq_m_s<mode>): Likewise.
20470 (mve_vqdmlsdhq_m_s<mode>): Likewise.
20471 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
20472 (mve_vqdmulhq_m_s<mode>): Likewise.
20473 (mve_vqrdmladhq_m_s<mode>): Likewise.
20474 (mve_vqrdmladhxq_m_s<mode>): Likewise.
20475 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
20476 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
20477 (mve_vqrdmulhq_m_s<mode>): Likewise.
20479 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20481 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
20482 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
20483 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
20484 * config/arm/arm_mve.h (vcreateq_f16): Remove.
20485 (vcreateq_f32): Remove.
20486 (vcreateq_u8): Remove.
20487 (vcreateq_u16): Remove.
20488 (vcreateq_u32): Remove.
20489 (vcreateq_u64): Remove.
20490 (vcreateq_s8): Remove.
20491 (vcreateq_s16): Remove.
20492 (vcreateq_s32): Remove.
20493 (vcreateq_s64): Remove.
20494 (__arm_vcreateq_u8): Remove.
20495 (__arm_vcreateq_u16): Remove.
20496 (__arm_vcreateq_u32): Remove.
20497 (__arm_vcreateq_u64): Remove.
20498 (__arm_vcreateq_s8): Remove.
20499 (__arm_vcreateq_s16): Remove.
20500 (__arm_vcreateq_s32): Remove.
20501 (__arm_vcreateq_s64): Remove.
20502 (__arm_vcreateq_f16): Remove.
20503 (__arm_vcreateq_f32): Remove.
20505 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20507 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
20508 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
20509 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
20510 (@mve_<mve_insn>q_f<mode>): ... this.
20511 (mve_vcreateq_<supf><mode>): Rename into ...
20512 (@mve_<mve_insn>q_<supf><mode>): ... this.
20514 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20516 * config/arm/arm-mve-builtins-shapes.cc (create): New.
20517 * config/arm/arm-mve-builtins-shapes.h: (create): New.
20519 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20521 * config/arm/arm-mve-builtins-functions.h (class
20522 unspec_mve_function_exact_insn): New.
20524 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20526 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
20528 * config/arm/arm-mve-builtins-base.def (vorrq): New.
20529 * config/arm/arm-mve-builtins-base.h (vorrq): New.
20530 * config/arm/arm-mve-builtins.cc
20531 (function_instance::has_inactive_argument): Handle vorrq.
20532 * config/arm/arm_mve.h (vorrq): Remove.
20533 (vorrq_m_n): Remove.
20536 (vorrq_u8): Remove.
20537 (vorrq_s8): Remove.
20538 (vorrq_u16): Remove.
20539 (vorrq_s16): Remove.
20540 (vorrq_u32): Remove.
20541 (vorrq_s32): Remove.
20542 (vorrq_n_u16): Remove.
20543 (vorrq_f16): Remove.
20544 (vorrq_n_s16): Remove.
20545 (vorrq_n_u32): Remove.
20546 (vorrq_f32): Remove.
20547 (vorrq_n_s32): Remove.
20548 (vorrq_m_n_s16): Remove.
20549 (vorrq_m_n_u16): Remove.
20550 (vorrq_m_n_s32): Remove.
20551 (vorrq_m_n_u32): Remove.
20552 (vorrq_m_s8): Remove.
20553 (vorrq_m_s32): Remove.
20554 (vorrq_m_s16): Remove.
20555 (vorrq_m_u8): Remove.
20556 (vorrq_m_u32): Remove.
20557 (vorrq_m_u16): Remove.
20558 (vorrq_m_f32): Remove.
20559 (vorrq_m_f16): Remove.
20560 (vorrq_x_s8): Remove.
20561 (vorrq_x_s16): Remove.
20562 (vorrq_x_s32): Remove.
20563 (vorrq_x_u8): Remove.
20564 (vorrq_x_u16): Remove.
20565 (vorrq_x_u32): Remove.
20566 (vorrq_x_f16): Remove.
20567 (vorrq_x_f32): Remove.
20568 (__arm_vorrq_u8): Remove.
20569 (__arm_vorrq_s8): Remove.
20570 (__arm_vorrq_u16): Remove.
20571 (__arm_vorrq_s16): Remove.
20572 (__arm_vorrq_u32): Remove.
20573 (__arm_vorrq_s32): Remove.
20574 (__arm_vorrq_n_u16): Remove.
20575 (__arm_vorrq_n_s16): Remove.
20576 (__arm_vorrq_n_u32): Remove.
20577 (__arm_vorrq_n_s32): Remove.
20578 (__arm_vorrq_m_n_s16): Remove.
20579 (__arm_vorrq_m_n_u16): Remove.
20580 (__arm_vorrq_m_n_s32): Remove.
20581 (__arm_vorrq_m_n_u32): Remove.
20582 (__arm_vorrq_m_s8): Remove.
20583 (__arm_vorrq_m_s32): Remove.
20584 (__arm_vorrq_m_s16): Remove.
20585 (__arm_vorrq_m_u8): Remove.
20586 (__arm_vorrq_m_u32): Remove.
20587 (__arm_vorrq_m_u16): Remove.
20588 (__arm_vorrq_x_s8): Remove.
20589 (__arm_vorrq_x_s16): Remove.
20590 (__arm_vorrq_x_s32): Remove.
20591 (__arm_vorrq_x_u8): Remove.
20592 (__arm_vorrq_x_u16): Remove.
20593 (__arm_vorrq_x_u32): Remove.
20594 (__arm_vorrq_f16): Remove.
20595 (__arm_vorrq_f32): Remove.
20596 (__arm_vorrq_m_f32): Remove.
20597 (__arm_vorrq_m_f16): Remove.
20598 (__arm_vorrq_x_f16): Remove.
20599 (__arm_vorrq_x_f32): Remove.
20600 (__arm_vorrq): Remove.
20601 (__arm_vorrq_m_n): Remove.
20602 (__arm_vorrq_m): Remove.
20603 (__arm_vorrq_x): Remove.
20605 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20607 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
20608 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
20609 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
20610 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
20612 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20614 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
20615 (vandq,veorq): New.
20616 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
20617 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
20618 * config/arm/arm_mve.h (vandq): Remove.
20621 (vandq_u8): Remove.
20622 (vandq_s8): Remove.
20623 (vandq_u16): Remove.
20624 (vandq_s16): Remove.
20625 (vandq_u32): Remove.
20626 (vandq_s32): Remove.
20627 (vandq_f16): Remove.
20628 (vandq_f32): Remove.
20629 (vandq_m_s8): Remove.
20630 (vandq_m_s32): Remove.
20631 (vandq_m_s16): Remove.
20632 (vandq_m_u8): Remove.
20633 (vandq_m_u32): Remove.
20634 (vandq_m_u16): Remove.
20635 (vandq_m_f32): Remove.
20636 (vandq_m_f16): Remove.
20637 (vandq_x_s8): Remove.
20638 (vandq_x_s16): Remove.
20639 (vandq_x_s32): Remove.
20640 (vandq_x_u8): Remove.
20641 (vandq_x_u16): Remove.
20642 (vandq_x_u32): Remove.
20643 (vandq_x_f16): Remove.
20644 (vandq_x_f32): Remove.
20645 (__arm_vandq_u8): Remove.
20646 (__arm_vandq_s8): Remove.
20647 (__arm_vandq_u16): Remove.
20648 (__arm_vandq_s16): Remove.
20649 (__arm_vandq_u32): Remove.
20650 (__arm_vandq_s32): Remove.
20651 (__arm_vandq_m_s8): Remove.
20652 (__arm_vandq_m_s32): Remove.
20653 (__arm_vandq_m_s16): Remove.
20654 (__arm_vandq_m_u8): Remove.
20655 (__arm_vandq_m_u32): Remove.
20656 (__arm_vandq_m_u16): Remove.
20657 (__arm_vandq_x_s8): Remove.
20658 (__arm_vandq_x_s16): Remove.
20659 (__arm_vandq_x_s32): Remove.
20660 (__arm_vandq_x_u8): Remove.
20661 (__arm_vandq_x_u16): Remove.
20662 (__arm_vandq_x_u32): Remove.
20663 (__arm_vandq_f16): Remove.
20664 (__arm_vandq_f32): Remove.
20665 (__arm_vandq_m_f32): Remove.
20666 (__arm_vandq_m_f16): Remove.
20667 (__arm_vandq_x_f16): Remove.
20668 (__arm_vandq_x_f32): Remove.
20669 (__arm_vandq): Remove.
20670 (__arm_vandq_m): Remove.
20671 (__arm_vandq_x): Remove.
20674 (veorq_u8): Remove.
20675 (veorq_s8): Remove.
20676 (veorq_u16): Remove.
20677 (veorq_s16): Remove.
20678 (veorq_u32): Remove.
20679 (veorq_s32): Remove.
20680 (veorq_f16): Remove.
20681 (veorq_f32): Remove.
20682 (veorq_m_s8): Remove.
20683 (veorq_m_s32): Remove.
20684 (veorq_m_s16): Remove.
20685 (veorq_m_u8): Remove.
20686 (veorq_m_u32): Remove.
20687 (veorq_m_u16): Remove.
20688 (veorq_m_f32): Remove.
20689 (veorq_m_f16): Remove.
20690 (veorq_x_s8): Remove.
20691 (veorq_x_s16): Remove.
20692 (veorq_x_s32): Remove.
20693 (veorq_x_u8): Remove.
20694 (veorq_x_u16): Remove.
20695 (veorq_x_u32): Remove.
20696 (veorq_x_f16): Remove.
20697 (veorq_x_f32): Remove.
20698 (__arm_veorq_u8): Remove.
20699 (__arm_veorq_s8): Remove.
20700 (__arm_veorq_u16): Remove.
20701 (__arm_veorq_s16): Remove.
20702 (__arm_veorq_u32): Remove.
20703 (__arm_veorq_s32): Remove.
20704 (__arm_veorq_m_s8): Remove.
20705 (__arm_veorq_m_s32): Remove.
20706 (__arm_veorq_m_s16): Remove.
20707 (__arm_veorq_m_u8): Remove.
20708 (__arm_veorq_m_u32): Remove.
20709 (__arm_veorq_m_u16): Remove.
20710 (__arm_veorq_x_s8): Remove.
20711 (__arm_veorq_x_s16): Remove.
20712 (__arm_veorq_x_s32): Remove.
20713 (__arm_veorq_x_u8): Remove.
20714 (__arm_veorq_x_u16): Remove.
20715 (__arm_veorq_x_u32): Remove.
20716 (__arm_veorq_f16): Remove.
20717 (__arm_veorq_f32): Remove.
20718 (__arm_veorq_m_f32): Remove.
20719 (__arm_veorq_m_f16): Remove.
20720 (__arm_veorq_x_f16): Remove.
20721 (__arm_veorq_x_f32): Remove.
20722 (__arm_veorq): Remove.
20723 (__arm_veorq_m): Remove.
20724 (__arm_veorq_x): Remove.
20726 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20728 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
20729 (MVE_FP_M_BINARY_LOGIC): New.
20730 (MVE_INT_M_N_BINARY_LOGIC): New.
20731 (MVE_INT_N_BINARY_LOGIC): New.
20732 (mve_insn): Add vand, veor, vorr, vbic.
20733 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
20734 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
20735 (mve_vbicq_m_<supf><mode>): Merge into ...
20736 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20737 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
20738 (mve_vbicq_m_f<mode>): Merge into ...
20739 (@mve_<mve_insn>q_m_f<mode>): ... this.
20740 (mve_vorrq_n_<supf><mode>)
20741 (mve_vbicq_n_<supf><mode>): Merge into ...
20742 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20743 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
20745 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20747 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20749 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
20750 * config/arm/arm-mve-builtins-shapes.h (binary): New.
20752 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
20754 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
20756 (vaddq, vmulq, vsubq): New.
20757 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
20758 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
20759 * config/arm/arm_mve.h (vaddq): Remove.
20762 (vaddq_n_u8): Remove.
20763 (vaddq_n_s8): Remove.
20764 (vaddq_n_u16): Remove.
20765 (vaddq_n_s16): Remove.
20766 (vaddq_n_u32): Remove.
20767 (vaddq_n_s32): Remove.
20768 (vaddq_n_f16): Remove.
20769 (vaddq_n_f32): Remove.
20770 (vaddq_m_n_s8): Remove.
20771 (vaddq_m_n_s32): Remove.
20772 (vaddq_m_n_s16): Remove.
20773 (vaddq_m_n_u8): Remove.
20774 (vaddq_m_n_u32): Remove.
20775 (vaddq_m_n_u16): Remove.
20776 (vaddq_m_s8): Remove.
20777 (vaddq_m_s32): Remove.
20778 (vaddq_m_s16): Remove.
20779 (vaddq_m_u8): Remove.
20780 (vaddq_m_u32): Remove.
20781 (vaddq_m_u16): Remove.
20782 (vaddq_m_f32): Remove.
20783 (vaddq_m_f16): Remove.
20784 (vaddq_m_n_f32): Remove.
20785 (vaddq_m_n_f16): Remove.
20786 (vaddq_s8): Remove.
20787 (vaddq_s16): Remove.
20788 (vaddq_s32): Remove.
20789 (vaddq_u8): Remove.
20790 (vaddq_u16): Remove.
20791 (vaddq_u32): Remove.
20792 (vaddq_f16): Remove.
20793 (vaddq_f32): Remove.
20794 (vaddq_x_s8): Remove.
20795 (vaddq_x_s16): Remove.
20796 (vaddq_x_s32): Remove.
20797 (vaddq_x_n_s8): Remove.
20798 (vaddq_x_n_s16): Remove.
20799 (vaddq_x_n_s32): Remove.
20800 (vaddq_x_u8): Remove.
20801 (vaddq_x_u16): Remove.
20802 (vaddq_x_u32): Remove.
20803 (vaddq_x_n_u8): Remove.
20804 (vaddq_x_n_u16): Remove.
20805 (vaddq_x_n_u32): Remove.
20806 (vaddq_x_f16): Remove.
20807 (vaddq_x_f32): Remove.
20808 (vaddq_x_n_f16): Remove.
20809 (vaddq_x_n_f32): Remove.
20810 (__arm_vaddq_n_u8): Remove.
20811 (__arm_vaddq_n_s8): Remove.
20812 (__arm_vaddq_n_u16): Remove.
20813 (__arm_vaddq_n_s16): Remove.
20814 (__arm_vaddq_n_u32): Remove.
20815 (__arm_vaddq_n_s32): Remove.
20816 (__arm_vaddq_m_n_s8): Remove.
20817 (__arm_vaddq_m_n_s32): Remove.
20818 (__arm_vaddq_m_n_s16): Remove.
20819 (__arm_vaddq_m_n_u8): Remove.
20820 (__arm_vaddq_m_n_u32): Remove.
20821 (__arm_vaddq_m_n_u16): Remove.
20822 (__arm_vaddq_m_s8): Remove.
20823 (__arm_vaddq_m_s32): Remove.
20824 (__arm_vaddq_m_s16): Remove.
20825 (__arm_vaddq_m_u8): Remove.
20826 (__arm_vaddq_m_u32): Remove.
20827 (__arm_vaddq_m_u16): Remove.
20828 (__arm_vaddq_s8): Remove.
20829 (__arm_vaddq_s16): Remove.
20830 (__arm_vaddq_s32): Remove.
20831 (__arm_vaddq_u8): Remove.
20832 (__arm_vaddq_u16): Remove.
20833 (__arm_vaddq_u32): Remove.
20834 (__arm_vaddq_x_s8): Remove.
20835 (__arm_vaddq_x_s16): Remove.
20836 (__arm_vaddq_x_s32): Remove.
20837 (__arm_vaddq_x_n_s8): Remove.
20838 (__arm_vaddq_x_n_s16): Remove.
20839 (__arm_vaddq_x_n_s32): Remove.
20840 (__arm_vaddq_x_u8): Remove.
20841 (__arm_vaddq_x_u16): Remove.
20842 (__arm_vaddq_x_u32): Remove.
20843 (__arm_vaddq_x_n_u8): Remove.
20844 (__arm_vaddq_x_n_u16): Remove.
20845 (__arm_vaddq_x_n_u32): Remove.
20846 (__arm_vaddq_n_f16): Remove.
20847 (__arm_vaddq_n_f32): Remove.
20848 (__arm_vaddq_m_f32): Remove.
20849 (__arm_vaddq_m_f16): Remove.
20850 (__arm_vaddq_m_n_f32): Remove.
20851 (__arm_vaddq_m_n_f16): Remove.
20852 (__arm_vaddq_f16): Remove.
20853 (__arm_vaddq_f32): Remove.
20854 (__arm_vaddq_x_f16): Remove.
20855 (__arm_vaddq_x_f32): Remove.
20856 (__arm_vaddq_x_n_f16): Remove.
20857 (__arm_vaddq_x_n_f32): Remove.
20858 (__arm_vaddq): Remove.
20859 (__arm_vaddq_m): Remove.
20860 (__arm_vaddq_x): Remove.
20864 (vmulq_u8): Remove.
20865 (vmulq_n_u8): Remove.
20866 (vmulq_s8): Remove.
20867 (vmulq_n_s8): Remove.
20868 (vmulq_u16): Remove.
20869 (vmulq_n_u16): Remove.
20870 (vmulq_s16): Remove.
20871 (vmulq_n_s16): Remove.
20872 (vmulq_u32): Remove.
20873 (vmulq_n_u32): Remove.
20874 (vmulq_s32): Remove.
20875 (vmulq_n_s32): Remove.
20876 (vmulq_n_f16): Remove.
20877 (vmulq_f16): Remove.
20878 (vmulq_n_f32): Remove.
20879 (vmulq_f32): Remove.
20880 (vmulq_m_n_s8): Remove.
20881 (vmulq_m_n_s32): Remove.
20882 (vmulq_m_n_s16): Remove.
20883 (vmulq_m_n_u8): Remove.
20884 (vmulq_m_n_u32): Remove.
20885 (vmulq_m_n_u16): Remove.
20886 (vmulq_m_s8): Remove.
20887 (vmulq_m_s32): Remove.
20888 (vmulq_m_s16): Remove.
20889 (vmulq_m_u8): Remove.
20890 (vmulq_m_u32): Remove.
20891 (vmulq_m_u16): Remove.
20892 (vmulq_m_f32): Remove.
20893 (vmulq_m_f16): Remove.
20894 (vmulq_m_n_f32): Remove.
20895 (vmulq_m_n_f16): Remove.
20896 (vmulq_x_s8): Remove.
20897 (vmulq_x_s16): Remove.
20898 (vmulq_x_s32): Remove.
20899 (vmulq_x_n_s8): Remove.
20900 (vmulq_x_n_s16): Remove.
20901 (vmulq_x_n_s32): Remove.
20902 (vmulq_x_u8): Remove.
20903 (vmulq_x_u16): Remove.
20904 (vmulq_x_u32): Remove.
20905 (vmulq_x_n_u8): Remove.
20906 (vmulq_x_n_u16): Remove.
20907 (vmulq_x_n_u32): Remove.
20908 (vmulq_x_f16): Remove.
20909 (vmulq_x_f32): Remove.
20910 (vmulq_x_n_f16): Remove.
20911 (vmulq_x_n_f32): Remove.
20912 (__arm_vmulq_u8): Remove.
20913 (__arm_vmulq_n_u8): Remove.
20914 (__arm_vmulq_s8): Remove.
20915 (__arm_vmulq_n_s8): Remove.
20916 (__arm_vmulq_u16): Remove.
20917 (__arm_vmulq_n_u16): Remove.
20918 (__arm_vmulq_s16): Remove.
20919 (__arm_vmulq_n_s16): Remove.
20920 (__arm_vmulq_u32): Remove.
20921 (__arm_vmulq_n_u32): Remove.
20922 (__arm_vmulq_s32): Remove.
20923 (__arm_vmulq_n_s32): Remove.
20924 (__arm_vmulq_m_n_s8): Remove.
20925 (__arm_vmulq_m_n_s32): Remove.
20926 (__arm_vmulq_m_n_s16): Remove.
20927 (__arm_vmulq_m_n_u8): Remove.
20928 (__arm_vmulq_m_n_u32): Remove.
20929 (__arm_vmulq_m_n_u16): Remove.
20930 (__arm_vmulq_m_s8): Remove.
20931 (__arm_vmulq_m_s32): Remove.
20932 (__arm_vmulq_m_s16): Remove.
20933 (__arm_vmulq_m_u8): Remove.
20934 (__arm_vmulq_m_u32): Remove.
20935 (__arm_vmulq_m_u16): Remove.
20936 (__arm_vmulq_x_s8): Remove.
20937 (__arm_vmulq_x_s16): Remove.
20938 (__arm_vmulq_x_s32): Remove.
20939 (__arm_vmulq_x_n_s8): Remove.
20940 (__arm_vmulq_x_n_s16): Remove.
20941 (__arm_vmulq_x_n_s32): Remove.
20942 (__arm_vmulq_x_u8): Remove.
20943 (__arm_vmulq_x_u16): Remove.
20944 (__arm_vmulq_x_u32): Remove.
20945 (__arm_vmulq_x_n_u8): Remove.
20946 (__arm_vmulq_x_n_u16): Remove.
20947 (__arm_vmulq_x_n_u32): Remove.
20948 (__arm_vmulq_n_f16): Remove.
20949 (__arm_vmulq_f16): Remove.
20950 (__arm_vmulq_n_f32): Remove.
20951 (__arm_vmulq_f32): Remove.
20952 (__arm_vmulq_m_f32): Remove.
20953 (__arm_vmulq_m_f16): Remove.
20954 (__arm_vmulq_m_n_f32): Remove.
20955 (__arm_vmulq_m_n_f16): Remove.
20956 (__arm_vmulq_x_f16): Remove.
20957 (__arm_vmulq_x_f32): Remove.
20958 (__arm_vmulq_x_n_f16): Remove.
20959 (__arm_vmulq_x_n_f32): Remove.
20960 (__arm_vmulq): Remove.
20961 (__arm_vmulq_m): Remove.
20962 (__arm_vmulq_x): Remove.
20966 (vsubq_n_f16): Remove.
20967 (vsubq_n_f32): Remove.
20968 (vsubq_u8): Remove.
20969 (vsubq_n_u8): Remove.
20970 (vsubq_s8): Remove.
20971 (vsubq_n_s8): Remove.
20972 (vsubq_u16): Remove.
20973 (vsubq_n_u16): Remove.
20974 (vsubq_s16): Remove.
20975 (vsubq_n_s16): Remove.
20976 (vsubq_u32): Remove.
20977 (vsubq_n_u32): Remove.
20978 (vsubq_s32): Remove.
20979 (vsubq_n_s32): Remove.
20980 (vsubq_f16): Remove.
20981 (vsubq_f32): Remove.
20982 (vsubq_m_s8): Remove.
20983 (vsubq_m_u8): Remove.
20984 (vsubq_m_s16): Remove.
20985 (vsubq_m_u16): Remove.
20986 (vsubq_m_s32): Remove.
20987 (vsubq_m_u32): Remove.
20988 (vsubq_m_n_s8): Remove.
20989 (vsubq_m_n_s32): Remove.
20990 (vsubq_m_n_s16): Remove.
20991 (vsubq_m_n_u8): Remove.
20992 (vsubq_m_n_u32): Remove.
20993 (vsubq_m_n_u16): Remove.
20994 (vsubq_m_f32): Remove.
20995 (vsubq_m_f16): Remove.
20996 (vsubq_m_n_f32): Remove.
20997 (vsubq_m_n_f16): Remove.
20998 (vsubq_x_s8): Remove.
20999 (vsubq_x_s16): Remove.
21000 (vsubq_x_s32): Remove.
21001 (vsubq_x_n_s8): Remove.
21002 (vsubq_x_n_s16): Remove.
21003 (vsubq_x_n_s32): Remove.
21004 (vsubq_x_u8): Remove.
21005 (vsubq_x_u16): Remove.
21006 (vsubq_x_u32): Remove.
21007 (vsubq_x_n_u8): Remove.
21008 (vsubq_x_n_u16): Remove.
21009 (vsubq_x_n_u32): Remove.
21010 (vsubq_x_f16): Remove.
21011 (vsubq_x_f32): Remove.
21012 (vsubq_x_n_f16): Remove.
21013 (vsubq_x_n_f32): Remove.
21014 (__arm_vsubq_u8): Remove.
21015 (__arm_vsubq_n_u8): Remove.
21016 (__arm_vsubq_s8): Remove.
21017 (__arm_vsubq_n_s8): Remove.
21018 (__arm_vsubq_u16): Remove.
21019 (__arm_vsubq_n_u16): Remove.
21020 (__arm_vsubq_s16): Remove.
21021 (__arm_vsubq_n_s16): Remove.
21022 (__arm_vsubq_u32): Remove.
21023 (__arm_vsubq_n_u32): Remove.
21024 (__arm_vsubq_s32): Remove.
21025 (__arm_vsubq_n_s32): Remove.
21026 (__arm_vsubq_m_s8): Remove.
21027 (__arm_vsubq_m_u8): Remove.
21028 (__arm_vsubq_m_s16): Remove.
21029 (__arm_vsubq_m_u16): Remove.
21030 (__arm_vsubq_m_s32): Remove.
21031 (__arm_vsubq_m_u32): Remove.
21032 (__arm_vsubq_m_n_s8): Remove.
21033 (__arm_vsubq_m_n_s32): Remove.
21034 (__arm_vsubq_m_n_s16): Remove.
21035 (__arm_vsubq_m_n_u8): Remove.
21036 (__arm_vsubq_m_n_u32): Remove.
21037 (__arm_vsubq_m_n_u16): Remove.
21038 (__arm_vsubq_x_s8): Remove.
21039 (__arm_vsubq_x_s16): Remove.
21040 (__arm_vsubq_x_s32): Remove.
21041 (__arm_vsubq_x_n_s8): Remove.
21042 (__arm_vsubq_x_n_s16): Remove.
21043 (__arm_vsubq_x_n_s32): Remove.
21044 (__arm_vsubq_x_u8): Remove.
21045 (__arm_vsubq_x_u16): Remove.
21046 (__arm_vsubq_x_u32): Remove.
21047 (__arm_vsubq_x_n_u8): Remove.
21048 (__arm_vsubq_x_n_u16): Remove.
21049 (__arm_vsubq_x_n_u32): Remove.
21050 (__arm_vsubq_n_f16): Remove.
21051 (__arm_vsubq_n_f32): Remove.
21052 (__arm_vsubq_f16): Remove.
21053 (__arm_vsubq_f32): Remove.
21054 (__arm_vsubq_m_f32): Remove.
21055 (__arm_vsubq_m_f16): Remove.
21056 (__arm_vsubq_m_n_f32): Remove.
21057 (__arm_vsubq_m_n_f16): Remove.
21058 (__arm_vsubq_x_f16): Remove.
21059 (__arm_vsubq_x_f32): Remove.
21060 (__arm_vsubq_x_n_f16): Remove.
21061 (__arm_vsubq_x_n_f32): Remove.
21062 (__arm_vsubq): Remove.
21063 (__arm_vsubq_m): Remove.
21064 (__arm_vsubq_x): Remove.
21065 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
21067 (vmulq_u, vmulq_s, vmulq_f): Remove.
21068 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
21069 (mve_vmulq_<supf><mode>): Remove.
21071 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
21073 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
21074 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
21075 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
21077 * config/arm/mve.md
21078 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
21080 (@mve_<mve_insn>q_n_f<mode>): ... this.
21081 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
21082 (mve_vsubq_n_<supf><mode>): Factorize into ...
21083 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21084 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
21086 (mve_<mve_addsubmul>q<mode>): ... this.
21087 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
21089 (mve_<mve_addsubmul>q_f<mode>): ... this.
21090 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
21091 (mve_vsubq_m_<supf><mode>): Factorize into ...
21092 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
21093 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
21094 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
21095 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21096 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
21098 (@mve_<mve_insn>q_m_f<mode>): ... this.
21099 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
21100 (mve_vsubq_m_n_f<mode>): Factorize into ...
21101 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
21103 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
21105 * config/arm/arm-mve-builtins-functions.h (class
21106 unspec_based_mve_function_base): New.
21107 (class unspec_based_mve_function_exact_insn): New.
21109 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
21111 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
21112 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
21114 2023-05-03 Murray Steele <murray.steele@arm.com>
21115 Christophe Lyon <christophe.lyon@arm.com>
21117 * config/arm/arm-mve-builtins-base.cc (class
21118 vuninitializedq_impl): New.
21119 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
21120 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
21122 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
21123 * config/arm/arm-mve-builtins-shapes.h (inherent): New
21125 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
21126 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
21127 (__arm_vuninitializedq_u8): Remove.
21128 (__arm_vuninitializedq_u16): Remove.
21129 (__arm_vuninitializedq_u32): Remove.
21130 (__arm_vuninitializedq_u64): Remove.
21131 (__arm_vuninitializedq_s8): Remove.
21132 (__arm_vuninitializedq_s16): Remove.
21133 (__arm_vuninitializedq_s32): Remove.
21134 (__arm_vuninitializedq_s64): Remove.
21135 (__arm_vuninitializedq_f16): Remove.
21136 (__arm_vuninitializedq_f32): Remove.
21138 2023-05-03 Murray Steele <murray.steele@arm.com>
21139 Christophe Lyon <christophe.lyon@arm.com>
21141 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
21142 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
21143 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
21144 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
21145 (parse_type): Likewise.
21146 (parse_signature): Likewise.
21147 (build_one): Likewise.
21148 (build_all): Likewise.
21149 (overloaded_base): New struct.
21150 (unary_convert_def): Likewise.
21151 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
21152 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
21154 (TYPES_reinterpret_unsigned1): Likewise.
21155 (TYPES_reinterpret_integer): Likewise.
21156 (TYPES_reinterpret_integer1): Likewise.
21157 (TYPES_reinterpret_float1): Likewise.
21158 (TYPES_reinterpret_float): Likewise.
21159 (reinterpret_integer): New.
21160 (reinterpret_float): New.
21161 (handle_arm_mve_h): Register builtins.
21162 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
21163 (vreinterpretq_s32): Likewise.
21164 (vreinterpretq_s64): Likewise.
21165 (vreinterpretq_s8): Likewise.
21166 (vreinterpretq_u16): Likewise.
21167 (vreinterpretq_u32): Likewise.
21168 (vreinterpretq_u64): Likewise.
21169 (vreinterpretq_u8): Likewise.
21170 (vreinterpretq_f16): Likewise.
21171 (vreinterpretq_f32): Likewise.
21172 (vreinterpretq_s16_s32): Likewise.
21173 (vreinterpretq_s16_s64): Likewise.
21174 (vreinterpretq_s16_s8): Likewise.
21175 (vreinterpretq_s16_u16): Likewise.
21176 (vreinterpretq_s16_u32): Likewise.
21177 (vreinterpretq_s16_u64): Likewise.
21178 (vreinterpretq_s16_u8): Likewise.
21179 (vreinterpretq_s32_s16): Likewise.
21180 (vreinterpretq_s32_s64): Likewise.
21181 (vreinterpretq_s32_s8): Likewise.
21182 (vreinterpretq_s32_u16): Likewise.
21183 (vreinterpretq_s32_u32): Likewise.
21184 (vreinterpretq_s32_u64): Likewise.
21185 (vreinterpretq_s32_u8): Likewise.
21186 (vreinterpretq_s64_s16): Likewise.
21187 (vreinterpretq_s64_s32): Likewise.
21188 (vreinterpretq_s64_s8): Likewise.
21189 (vreinterpretq_s64_u16): Likewise.
21190 (vreinterpretq_s64_u32): Likewise.
21191 (vreinterpretq_s64_u64): Likewise.
21192 (vreinterpretq_s64_u8): Likewise.
21193 (vreinterpretq_s8_s16): Likewise.
21194 (vreinterpretq_s8_s32): Likewise.
21195 (vreinterpretq_s8_s64): Likewise.
21196 (vreinterpretq_s8_u16): Likewise.
21197 (vreinterpretq_s8_u32): Likewise.
21198 (vreinterpretq_s8_u64): Likewise.
21199 (vreinterpretq_s8_u8): Likewise.
21200 (vreinterpretq_u16_s16): Likewise.
21201 (vreinterpretq_u16_s32): Likewise.
21202 (vreinterpretq_u16_s64): Likewise.
21203 (vreinterpretq_u16_s8): Likewise.
21204 (vreinterpretq_u16_u32): Likewise.
21205 (vreinterpretq_u16_u64): Likewise.
21206 (vreinterpretq_u16_u8): Likewise.
21207 (vreinterpretq_u32_s16): Likewise.
21208 (vreinterpretq_u32_s32): Likewise.
21209 (vreinterpretq_u32_s64): Likewise.
21210 (vreinterpretq_u32_s8): Likewise.
21211 (vreinterpretq_u32_u16): Likewise.
21212 (vreinterpretq_u32_u64): Likewise.
21213 (vreinterpretq_u32_u8): Likewise.
21214 (vreinterpretq_u64_s16): Likewise.
21215 (vreinterpretq_u64_s32): Likewise.
21216 (vreinterpretq_u64_s64): Likewise.
21217 (vreinterpretq_u64_s8): Likewise.
21218 (vreinterpretq_u64_u16): Likewise.
21219 (vreinterpretq_u64_u32): Likewise.
21220 (vreinterpretq_u64_u8): Likewise.
21221 (vreinterpretq_u8_s16): Likewise.
21222 (vreinterpretq_u8_s32): Likewise.
21223 (vreinterpretq_u8_s64): Likewise.
21224 (vreinterpretq_u8_s8): Likewise.
21225 (vreinterpretq_u8_u16): Likewise.
21226 (vreinterpretq_u8_u32): Likewise.
21227 (vreinterpretq_u8_u64): Likewise.
21228 (vreinterpretq_s32_f16): Likewise.
21229 (vreinterpretq_s32_f32): Likewise.
21230 (vreinterpretq_u16_f16): Likewise.
21231 (vreinterpretq_u16_f32): Likewise.
21232 (vreinterpretq_u32_f16): Likewise.
21233 (vreinterpretq_u32_f32): Likewise.
21234 (vreinterpretq_u64_f16): Likewise.
21235 (vreinterpretq_u64_f32): Likewise.
21236 (vreinterpretq_u8_f16): Likewise.
21237 (vreinterpretq_u8_f32): Likewise.
21238 (vreinterpretq_f16_f32): Likewise.
21239 (vreinterpretq_f16_s16): Likewise.
21240 (vreinterpretq_f16_s32): Likewise.
21241 (vreinterpretq_f16_s64): Likewise.
21242 (vreinterpretq_f16_s8): Likewise.
21243 (vreinterpretq_f16_u16): Likewise.
21244 (vreinterpretq_f16_u32): Likewise.
21245 (vreinterpretq_f16_u64): Likewise.
21246 (vreinterpretq_f16_u8): Likewise.
21247 (vreinterpretq_f32_f16): Likewise.
21248 (vreinterpretq_f32_s16): Likewise.
21249 (vreinterpretq_f32_s32): Likewise.
21250 (vreinterpretq_f32_s64): Likewise.
21251 (vreinterpretq_f32_s8): Likewise.
21252 (vreinterpretq_f32_u16): Likewise.
21253 (vreinterpretq_f32_u32): Likewise.
21254 (vreinterpretq_f32_u64): Likewise.
21255 (vreinterpretq_f32_u8): Likewise.
21256 (vreinterpretq_s16_f16): Likewise.
21257 (vreinterpretq_s16_f32): Likewise.
21258 (vreinterpretq_s64_f16): Likewise.
21259 (vreinterpretq_s64_f32): Likewise.
21260 (vreinterpretq_s8_f16): Likewise.
21261 (vreinterpretq_s8_f32): Likewise.
21262 (__arm_vreinterpretq_f16): Likewise.
21263 (__arm_vreinterpretq_f32): Likewise.
21264 (__arm_vreinterpretq_s16): Likewise.
21265 (__arm_vreinterpretq_s32): Likewise.
21266 (__arm_vreinterpretq_s64): Likewise.
21267 (__arm_vreinterpretq_s8): Likewise.
21268 (__arm_vreinterpretq_u16): Likewise.
21269 (__arm_vreinterpretq_u32): Likewise.
21270 (__arm_vreinterpretq_u64): Likewise.
21271 (__arm_vreinterpretq_u8): Likewise.
21272 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
21273 (__arm_vreinterpretq_s16_s64): Likewise.
21274 (__arm_vreinterpretq_s16_s8): Likewise.
21275 (__arm_vreinterpretq_s16_u16): Likewise.
21276 (__arm_vreinterpretq_s16_u32): Likewise.
21277 (__arm_vreinterpretq_s16_u64): Likewise.
21278 (__arm_vreinterpretq_s16_u8): Likewise.
21279 (__arm_vreinterpretq_s32_s16): Likewise.
21280 (__arm_vreinterpretq_s32_s64): Likewise.
21281 (__arm_vreinterpretq_s32_s8): Likewise.
21282 (__arm_vreinterpretq_s32_u16): Likewise.
21283 (__arm_vreinterpretq_s32_u32): Likewise.
21284 (__arm_vreinterpretq_s32_u64): Likewise.
21285 (__arm_vreinterpretq_s32_u8): Likewise.
21286 (__arm_vreinterpretq_s64_s16): Likewise.
21287 (__arm_vreinterpretq_s64_s32): Likewise.
21288 (__arm_vreinterpretq_s64_s8): Likewise.
21289 (__arm_vreinterpretq_s64_u16): Likewise.
21290 (__arm_vreinterpretq_s64_u32): Likewise.
21291 (__arm_vreinterpretq_s64_u64): Likewise.
21292 (__arm_vreinterpretq_s64_u8): Likewise.
21293 (__arm_vreinterpretq_s8_s16): Likewise.
21294 (__arm_vreinterpretq_s8_s32): Likewise.
21295 (__arm_vreinterpretq_s8_s64): Likewise.
21296 (__arm_vreinterpretq_s8_u16): Likewise.
21297 (__arm_vreinterpretq_s8_u32): Likewise.
21298 (__arm_vreinterpretq_s8_u64): Likewise.
21299 (__arm_vreinterpretq_s8_u8): Likewise.
21300 (__arm_vreinterpretq_u16_s16): Likewise.
21301 (__arm_vreinterpretq_u16_s32): Likewise.
21302 (__arm_vreinterpretq_u16_s64): Likewise.
21303 (__arm_vreinterpretq_u16_s8): Likewise.
21304 (__arm_vreinterpretq_u16_u32): Likewise.
21305 (__arm_vreinterpretq_u16_u64): Likewise.
21306 (__arm_vreinterpretq_u16_u8): Likewise.
21307 (__arm_vreinterpretq_u32_s16): Likewise.
21308 (__arm_vreinterpretq_u32_s32): Likewise.
21309 (__arm_vreinterpretq_u32_s64): Likewise.
21310 (__arm_vreinterpretq_u32_s8): Likewise.
21311 (__arm_vreinterpretq_u32_u16): Likewise.
21312 (__arm_vreinterpretq_u32_u64): Likewise.
21313 (__arm_vreinterpretq_u32_u8): Likewise.
21314 (__arm_vreinterpretq_u64_s16): Likewise.
21315 (__arm_vreinterpretq_u64_s32): Likewise.
21316 (__arm_vreinterpretq_u64_s64): Likewise.
21317 (__arm_vreinterpretq_u64_s8): Likewise.
21318 (__arm_vreinterpretq_u64_u16): Likewise.
21319 (__arm_vreinterpretq_u64_u32): Likewise.
21320 (__arm_vreinterpretq_u64_u8): Likewise.
21321 (__arm_vreinterpretq_u8_s16): Likewise.
21322 (__arm_vreinterpretq_u8_s32): Likewise.
21323 (__arm_vreinterpretq_u8_s64): Likewise.
21324 (__arm_vreinterpretq_u8_s8): Likewise.
21325 (__arm_vreinterpretq_u8_u16): Likewise.
21326 (__arm_vreinterpretq_u8_u32): Likewise.
21327 (__arm_vreinterpretq_u8_u64): Likewise.
21328 (__arm_vreinterpretq_s32_f16): Likewise.
21329 (__arm_vreinterpretq_s32_f32): Likewise.
21330 (__arm_vreinterpretq_s16_f16): Likewise.
21331 (__arm_vreinterpretq_s16_f32): Likewise.
21332 (__arm_vreinterpretq_s64_f16): Likewise.
21333 (__arm_vreinterpretq_s64_f32): Likewise.
21334 (__arm_vreinterpretq_s8_f16): Likewise.
21335 (__arm_vreinterpretq_s8_f32): Likewise.
21336 (__arm_vreinterpretq_u16_f16): Likewise.
21337 (__arm_vreinterpretq_u16_f32): Likewise.
21338 (__arm_vreinterpretq_u32_f16): Likewise.
21339 (__arm_vreinterpretq_u32_f32): Likewise.
21340 (__arm_vreinterpretq_u64_f16): Likewise.
21341 (__arm_vreinterpretq_u64_f32): Likewise.
21342 (__arm_vreinterpretq_u8_f16): Likewise.
21343 (__arm_vreinterpretq_u8_f32): Likewise.
21344 (__arm_vreinterpretq_f16_f32): Likewise.
21345 (__arm_vreinterpretq_f16_s16): Likewise.
21346 (__arm_vreinterpretq_f16_s32): Likewise.
21347 (__arm_vreinterpretq_f16_s64): Likewise.
21348 (__arm_vreinterpretq_f16_s8): Likewise.
21349 (__arm_vreinterpretq_f16_u16): Likewise.
21350 (__arm_vreinterpretq_f16_u32): Likewise.
21351 (__arm_vreinterpretq_f16_u64): Likewise.
21352 (__arm_vreinterpretq_f16_u8): Likewise.
21353 (__arm_vreinterpretq_f32_f16): Likewise.
21354 (__arm_vreinterpretq_f32_s16): Likewise.
21355 (__arm_vreinterpretq_f32_s32): Likewise.
21356 (__arm_vreinterpretq_f32_s64): Likewise.
21357 (__arm_vreinterpretq_f32_s8): Likewise.
21358 (__arm_vreinterpretq_f32_u16): Likewise.
21359 (__arm_vreinterpretq_f32_u32): Likewise.
21360 (__arm_vreinterpretq_f32_u64): Likewise.
21361 (__arm_vreinterpretq_f32_u8): Likewise.
21362 (__arm_vreinterpretq_s16): Likewise.
21363 (__arm_vreinterpretq_s32): Likewise.
21364 (__arm_vreinterpretq_s64): Likewise.
21365 (__arm_vreinterpretq_s8): Likewise.
21366 (__arm_vreinterpretq_u16): Likewise.
21367 (__arm_vreinterpretq_u32): Likewise.
21368 (__arm_vreinterpretq_u64): Likewise.
21369 (__arm_vreinterpretq_u8): Likewise.
21370 (__arm_vreinterpretq_f16): Likewise.
21371 (__arm_vreinterpretq_f32): Likewise.
21372 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
21373 * config/arm/unspecs.md: (REINTERPRET): New unspec.
21375 2023-05-03 Murray Steele <murray.steele@arm.com>
21376 Christophe Lyon <christophe.lyon@arm.com>
21377 Christophe Lyon <christophe.lyon@arm.com
21379 * config.gcc: Add arm-mve-builtins-base.o and
21380 arm-mve-builtins-shapes.o to extra_objs.
21381 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
21383 (arm_expand_builtin): Likewise
21384 (arm_check_builtin_call): Likewise
21385 (arm_describe_resolver): Likewise.
21386 * config/arm/arm-builtins.h (enum resolver_ident): Add
21388 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
21389 (arm_resolve_overloaded_builtin): Handle MVE builtins.
21390 (arm_register_target_pragmas): Register arm_check_builtin_call.
21391 * config/arm/arm-mve-builtins.cc (class registered_function): New
21393 (struct registered_function_hasher): New struct.
21394 (pred_suffixes): New table.
21395 (mode_suffixes): New table.
21396 (type_suffix_info): New table.
21397 (TYPES_float16): New.
21398 (TYPES_all_float): New.
21399 (TYPES_integer_8): New.
21400 (TYPES_integer_8_16): New.
21401 (TYPES_integer_16_32): New.
21402 (TYPES_integer_32): New.
21403 (TYPES_signed_16_32): New.
21404 (TYPES_signed_32): New.
21405 (TYPES_all_signed): New.
21406 (TYPES_all_unsigned): New.
21407 (TYPES_all_integer): New.
21408 (TYPES_all_integer_with_64): New.
21409 (DEF_VECTOR_TYPE): New.
21410 (DEF_DOUBLE_TYPE): New.
21411 (DEF_MVE_TYPES_ARRAY): New.
21412 (all_integer): New.
21413 (all_integer_with_64): New.
21417 (all_unsigned): New.
21419 (integer_8_16): New.
21420 (integer_16_32): New.
21422 (signed_16_32): New.
21424 (register_vector_type): Use void_type_node for mve.fp-only types when
21425 mve.fp is not enabled.
21426 (register_builtin_tuple_types): Likewise.
21427 (handle_arm_mve_h): New function..
21428 (matches_type_p): Likewise..
21429 (report_out_of_range): Likewise.
21430 (report_not_enum): Likewise.
21431 (report_missing_float): Likewise.
21432 (report_non_ice): Likewise.
21433 (check_requires_float): Likewise.
21434 (function_instance::hash): Likewise
21435 (function_instance::call_properties): Likewise.
21436 (function_instance::reads_global_state_p): Likewise.
21437 (function_instance::modifies_global_state_p): Likewise.
21438 (function_instance::could_trap_p): Likewise.
21439 (function_instance::has_inactive_argument): Likewise.
21440 (registered_function_hasher::hash): Likewise.
21441 (registered_function_hasher::equal): Likewise.
21442 (function_builder::function_builder): Likewise.
21443 (function_builder::~function_builder): Likewise.
21444 (function_builder::append_name): Likewise.
21445 (function_builder::finish_name): Likewise.
21446 (function_builder::get_name): Likewise.
21447 (add_attribute): Likewise.
21448 (function_builder::get_attributes): Likewise.
21449 (function_builder::add_function): Likewise.
21450 (function_builder::add_unique_function): Likewise.
21451 (function_builder::add_overloaded_function): Likewise.
21452 (function_builder::add_overloaded_functions): Likewise.
21453 (function_builder::register_function_group): Likewise.
21454 (function_call_info::function_call_info): Likewise.
21455 (function_resolver::function_resolver): Likewise.
21456 (function_resolver::get_vector_type): Likewise.
21457 (function_resolver::get_scalar_type_name): Likewise.
21458 (function_resolver::get_argument_type): Likewise.
21459 (function_resolver::scalar_argument_p): Likewise.
21460 (function_resolver::report_no_such_form): Likewise.
21461 (function_resolver::lookup_form): Likewise.
21462 (function_resolver::resolve_to): Likewise.
21463 (function_resolver::infer_vector_or_tuple_type): Likewise.
21464 (function_resolver::infer_vector_type): Likewise.
21465 (function_resolver::require_vector_or_scalar_type): Likewise.
21466 (function_resolver::require_vector_type): Likewise.
21467 (function_resolver::require_matching_vector_type): Likewise.
21468 (function_resolver::require_derived_vector_type): Likewise.
21469 (function_resolver::require_derived_scalar_type): Likewise.
21470 (function_resolver::require_integer_immediate): Likewise.
21471 (function_resolver::require_scalar_type): Likewise.
21472 (function_resolver::check_num_arguments): Likewise.
21473 (function_resolver::check_gp_argument): Likewise.
21474 (function_resolver::finish_opt_n_resolution): Likewise.
21475 (function_resolver::resolve_unary): Likewise.
21476 (function_resolver::resolve_unary_n): Likewise.
21477 (function_resolver::resolve_uniform): Likewise.
21478 (function_resolver::resolve_uniform_opt_n): Likewise.
21479 (function_resolver::resolve): Likewise.
21480 (function_checker::function_checker): Likewise.
21481 (function_checker::argument_exists_p): Likewise.
21482 (function_checker::require_immediate): Likewise.
21483 (function_checker::require_immediate_enum): Likewise.
21484 (function_checker::require_immediate_range): Likewise.
21485 (function_checker::check): Likewise.
21486 (gimple_folder::gimple_folder): Likewise.
21487 (gimple_folder::fold): Likewise.
21488 (function_expander::function_expander): Likewise.
21489 (function_expander::direct_optab_handler): Likewise.
21490 (function_expander::get_fallback_value): Likewise.
21491 (function_expander::get_reg_target): Likewise.
21492 (function_expander::add_output_operand): Likewise.
21493 (function_expander::add_input_operand): Likewise.
21494 (function_expander::add_integer_operand): Likewise.
21495 (function_expander::generate_insn): Likewise.
21496 (function_expander::use_exact_insn): Likewise.
21497 (function_expander::use_unpred_insn): Likewise.
21498 (function_expander::use_pred_x_insn): Likewise.
21499 (function_expander::use_cond_insn): Likewise.
21500 (function_expander::map_to_rtx_codes): Likewise.
21501 (function_expander::expand): Likewise.
21502 (resolve_overloaded_builtin): Likewise.
21503 (check_builtin_call): Likewise.
21504 (gimple_fold_builtin): Likewise.
21505 (expand_builtin): Likewise.
21506 (gt_ggc_mx): Likewise.
21507 (gt_pch_nx): Likewise.
21508 (gt_pch_nx): Likewise.
21509 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
21520 (offset): New mode.
21521 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
21522 (CP_READ_FPCR): Likewise.
21523 (CP_RAISE_FP_EXCEPTIONS): Likewise.
21524 (CP_READ_MEMORY): Likewise.
21525 (CP_WRITE_MEMORY): Likewise.
21526 (enum units_index): New enum.
21527 (enum predication_index): New.
21528 (enum type_class_index): New.
21529 (enum mode_suffix_index): New enum.
21530 (enum type_suffix_index): New.
21531 (struct mode_suffix_info): New struct.
21532 (struct type_suffix_info): New.
21533 (struct function_group_info): Likewise.
21534 (class function_instance): Likewise.
21535 (class registered_function): Likewise.
21536 (class function_builder): Likewise.
21537 (class function_call_info): Likewise.
21538 (class function_resolver): Likewise.
21539 (class function_checker): Likewise.
21540 (class gimple_folder): Likewise.
21541 (class function_expander): Likewise.
21542 (get_mve_pred16_t): Likewise.
21543 (find_mode_suffix): New function.
21544 (class function_base): Likewise.
21545 (class function_shape): Likewise.
21546 (function_instance::operator==): New function.
21547 (function_instance::operator!=): Likewise.
21548 (function_instance::vectors_per_tuple): Likewise.
21549 (function_instance::mode_suffix): Likewise.
21550 (function_instance::type_suffix): Likewise.
21551 (function_instance::scalar_type): Likewise.
21552 (function_instance::vector_type): Likewise.
21553 (function_instance::tuple_type): Likewise.
21554 (function_instance::vector_mode): Likewise.
21555 (function_call_info::function_returns_void_p): Likewise.
21556 (function_base::call_properties): Likewise.
21557 * config/arm/arm-protos.h (enum arm_builtin_class): Add
21559 (handle_arm_mve_h): New.
21560 (resolve_overloaded_builtin): New.
21561 (check_builtin_call): New.
21562 (gimple_fold_builtin): New.
21563 (expand_builtin): New.
21564 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
21565 arm_gimple_fold_builtin.
21566 (arm_gimple_fold_builtin): New function.
21567 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
21568 * config/arm/predicates.md (arm_any_register_operand): New predicate.
21569 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
21570 (arm-mve-builtins-shapes.o): New target.
21571 (arm-mve-builtins-base.o): New target.
21572 * config/arm/arm-mve-builtins-base.cc: New file.
21573 * config/arm/arm-mve-builtins-base.def: New file.
21574 * config/arm/arm-mve-builtins-base.h: New file.
21575 * config/arm/arm-mve-builtins-functions.h: New file.
21576 * config/arm/arm-mve-builtins-shapes.cc: New file.
21577 * config/arm/arm-mve-builtins-shapes.h: New file.
21579 2023-05-03 Murray Steele <murray.steele@arm.com>
21580 Christophe Lyon <christophe.lyon@arm.com>
21581 Christophe Lyon <christophe.lyon@arm.com>
21583 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
21585 (arm_init_builtin): Use arm_general_add_builtin_function instead
21586 of arm_add_builtin_function.
21587 (arm_init_acle_builtins): Likewise.
21588 (arm_init_mve_builtins): Likewise.
21589 (arm_init_crypto_builtins): Likewise.
21590 (arm_init_builtins): Likewise.
21591 (arm_general_builtin_decl): New function.
21592 (arm_builtin_decl): Defer to numberspace-specialized functions.
21593 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
21594 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
21595 (arm_general_expand_builtin_1): ... specialize for general builtins.
21596 (arm_expand_acle_builtin): Use arm_general_expand_builtin
21597 instead of arm_expand_builtin.
21598 (arm_expand_mve_builtin): Likewise.
21599 (arm_expand_neon_builtin): Likewise.
21600 (arm_expand_vfp_builtin): Likewise.
21601 (arm_general_expand_builtin): New function.
21602 (arm_expand_builtin): Specialize for general builtins.
21603 (arm_general_check_builtin_call): New function.
21604 (arm_check_builtin_call): Specialize for general builtins.
21605 (arm_describe_resolver): Validate numberspace.
21606 (arm_cde_end_args): Likewise.
21607 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
21608 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
21610 2023-05-03 Martin Liska <mliska@suse.cz>
21613 * config/riscv/sync.md: Add gcc_unreachable to a switch.
21615 2023-05-03 Richard Biener <rguenther@suse.de>
21617 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
21618 (patch_loop_exit): Likewise.
21619 (connect_loops): Likewise.
21620 (split_loop): Likewise.
21621 (control_dep_semi_invariant_p): Likewise.
21622 (do_split_loop_on_cond): Likewise.
21623 (split_loop_on_cond): Likewise.
21624 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
21626 (simplify_loop_version): Likewise.
21627 (evaluate_bbs): Likewise.
21628 (find_loop_guard): Likewise.
21629 (clean_up_after_unswitching): Likewise.
21630 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
21632 (optimize_spaceship): Take a gcond * argument, avoid
21634 (math_opts_dom_walker::after_dom_children): Adjust call to
21635 optimize_spaceship.
21636 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
21637 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
21640 2023-05-03 Andreas Schwab <schwab@suse.de>
21642 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
21644 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21646 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
21648 (class vlseg): New class.
21649 (class vsseg): Ditto.
21650 (class vlsseg): Ditto.
21651 (class vssseg): Ditto.
21652 (class seg_indexed_load): Ditto.
21653 (class seg_indexed_store): Ditto.
21654 (class vlsegff): Ditto.
21656 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
21657 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
21667 * config/riscv/riscv-vector-builtins-shapes.cc (struct
21668 seg_loadstore_def): Ditto.
21669 (struct seg_indexed_loadstore_def): Ditto.
21670 (struct seg_fault_load_def): Ditto.
21672 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
21673 * config/riscv/riscv-vector-builtins.cc
21674 (function_builder::append_nf): New function.
21675 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
21676 Change ptr from double into float.
21677 (vfloat32m1x3_t): Ditto.
21678 (vfloat32m1x4_t): Ditto.
21679 (vfloat32m1x5_t): Ditto.
21680 (vfloat32m1x6_t): Ditto.
21681 (vfloat32m1x7_t): Ditto.
21682 (vfloat32m1x8_t): Ditto.
21683 (vfloat32m2x2_t): Ditto.
21684 (vfloat32m2x3_t): Ditto.
21685 (vfloat32m2x4_t): Ditto.
21686 (vfloat32m4x2_t): Ditto.
21687 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
21688 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
21690 * config/riscv/riscv.md: Add segment instructions.
21691 * config/riscv/vector-iterators.md: Support segment intrinsics.
21692 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
21694 (@pred_unit_strided_store<mode>): Ditto.
21695 (@pred_strided_load<mode>): Ditto.
21696 (@pred_strided_store<mode>): Ditto.
21697 (@pred_fault_load<mode>): Ditto.
21698 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
21699 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
21700 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
21701 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
21702 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
21703 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
21704 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
21705 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
21706 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
21707 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
21708 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
21709 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
21710 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
21711 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
21713 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21715 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
21716 tuple type support.
21718 (floattype): Ditto.
21720 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
21721 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
21723 (vget): Add tuple type vget.
21724 * config/riscv/riscv-vector-builtins-types.def
21725 (DEF_RVV_TUPLE_OPS): New macro.
21726 (vint8mf8x2_t): Ditto.
21727 (vuint8mf8x2_t): Ditto.
21728 (vint8mf8x3_t): Ditto.
21729 (vuint8mf8x3_t): Ditto.
21730 (vint8mf8x4_t): Ditto.
21731 (vuint8mf8x4_t): Ditto.
21732 (vint8mf8x5_t): Ditto.
21733 (vuint8mf8x5_t): Ditto.
21734 (vint8mf8x6_t): Ditto.
21735 (vuint8mf8x6_t): Ditto.
21736 (vint8mf8x7_t): Ditto.
21737 (vuint8mf8x7_t): Ditto.
21738 (vint8mf8x8_t): Ditto.
21739 (vuint8mf8x8_t): Ditto.
21740 (vint8mf4x2_t): Ditto.
21741 (vuint8mf4x2_t): Ditto.
21742 (vint8mf4x3_t): Ditto.
21743 (vuint8mf4x3_t): Ditto.
21744 (vint8mf4x4_t): Ditto.
21745 (vuint8mf4x4_t): Ditto.
21746 (vint8mf4x5_t): Ditto.
21747 (vuint8mf4x5_t): Ditto.
21748 (vint8mf4x6_t): Ditto.
21749 (vuint8mf4x6_t): Ditto.
21750 (vint8mf4x7_t): Ditto.
21751 (vuint8mf4x7_t): Ditto.
21752 (vint8mf4x8_t): Ditto.
21753 (vuint8mf4x8_t): Ditto.
21754 (vint8mf2x2_t): Ditto.
21755 (vuint8mf2x2_t): Ditto.
21756 (vint8mf2x3_t): Ditto.
21757 (vuint8mf2x3_t): Ditto.
21758 (vint8mf2x4_t): Ditto.
21759 (vuint8mf2x4_t): Ditto.
21760 (vint8mf2x5_t): Ditto.
21761 (vuint8mf2x5_t): Ditto.
21762 (vint8mf2x6_t): Ditto.
21763 (vuint8mf2x6_t): Ditto.
21764 (vint8mf2x7_t): Ditto.
21765 (vuint8mf2x7_t): Ditto.
21766 (vint8mf2x8_t): Ditto.
21767 (vuint8mf2x8_t): Ditto.
21768 (vint8m1x2_t): Ditto.
21769 (vuint8m1x2_t): Ditto.
21770 (vint8m1x3_t): Ditto.
21771 (vuint8m1x3_t): Ditto.
21772 (vint8m1x4_t): Ditto.
21773 (vuint8m1x4_t): Ditto.
21774 (vint8m1x5_t): Ditto.
21775 (vuint8m1x5_t): Ditto.
21776 (vint8m1x6_t): Ditto.
21777 (vuint8m1x6_t): Ditto.
21778 (vint8m1x7_t): Ditto.
21779 (vuint8m1x7_t): Ditto.
21780 (vint8m1x8_t): Ditto.
21781 (vuint8m1x8_t): Ditto.
21782 (vint8m2x2_t): Ditto.
21783 (vuint8m2x2_t): Ditto.
21784 (vint8m2x3_t): Ditto.
21785 (vuint8m2x3_t): Ditto.
21786 (vint8m2x4_t): Ditto.
21787 (vuint8m2x4_t): Ditto.
21788 (vint8m4x2_t): Ditto.
21789 (vuint8m4x2_t): Ditto.
21790 (vint16mf4x2_t): Ditto.
21791 (vuint16mf4x2_t): Ditto.
21792 (vint16mf4x3_t): Ditto.
21793 (vuint16mf4x3_t): Ditto.
21794 (vint16mf4x4_t): Ditto.
21795 (vuint16mf4x4_t): Ditto.
21796 (vint16mf4x5_t): Ditto.
21797 (vuint16mf4x5_t): Ditto.
21798 (vint16mf4x6_t): Ditto.
21799 (vuint16mf4x6_t): Ditto.
21800 (vint16mf4x7_t): Ditto.
21801 (vuint16mf4x7_t): Ditto.
21802 (vint16mf4x8_t): Ditto.
21803 (vuint16mf4x8_t): Ditto.
21804 (vint16mf2x2_t): Ditto.
21805 (vuint16mf2x2_t): Ditto.
21806 (vint16mf2x3_t): Ditto.
21807 (vuint16mf2x3_t): Ditto.
21808 (vint16mf2x4_t): Ditto.
21809 (vuint16mf2x4_t): Ditto.
21810 (vint16mf2x5_t): Ditto.
21811 (vuint16mf2x5_t): Ditto.
21812 (vint16mf2x6_t): Ditto.
21813 (vuint16mf2x6_t): Ditto.
21814 (vint16mf2x7_t): Ditto.
21815 (vuint16mf2x7_t): Ditto.
21816 (vint16mf2x8_t): Ditto.
21817 (vuint16mf2x8_t): Ditto.
21818 (vint16m1x2_t): Ditto.
21819 (vuint16m1x2_t): Ditto.
21820 (vint16m1x3_t): Ditto.
21821 (vuint16m1x3_t): Ditto.
21822 (vint16m1x4_t): Ditto.
21823 (vuint16m1x4_t): Ditto.
21824 (vint16m1x5_t): Ditto.
21825 (vuint16m1x5_t): Ditto.
21826 (vint16m1x6_t): Ditto.
21827 (vuint16m1x6_t): Ditto.
21828 (vint16m1x7_t): Ditto.
21829 (vuint16m1x7_t): Ditto.
21830 (vint16m1x8_t): Ditto.
21831 (vuint16m1x8_t): Ditto.
21832 (vint16m2x2_t): Ditto.
21833 (vuint16m2x2_t): Ditto.
21834 (vint16m2x3_t): Ditto.
21835 (vuint16m2x3_t): Ditto.
21836 (vint16m2x4_t): Ditto.
21837 (vuint16m2x4_t): Ditto.
21838 (vint16m4x2_t): Ditto.
21839 (vuint16m4x2_t): Ditto.
21840 (vint32mf2x2_t): Ditto.
21841 (vuint32mf2x2_t): Ditto.
21842 (vint32mf2x3_t): Ditto.
21843 (vuint32mf2x3_t): Ditto.
21844 (vint32mf2x4_t): Ditto.
21845 (vuint32mf2x4_t): Ditto.
21846 (vint32mf2x5_t): Ditto.
21847 (vuint32mf2x5_t): Ditto.
21848 (vint32mf2x6_t): Ditto.
21849 (vuint32mf2x6_t): Ditto.
21850 (vint32mf2x7_t): Ditto.
21851 (vuint32mf2x7_t): Ditto.
21852 (vint32mf2x8_t): Ditto.
21853 (vuint32mf2x8_t): Ditto.
21854 (vint32m1x2_t): Ditto.
21855 (vuint32m1x2_t): Ditto.
21856 (vint32m1x3_t): Ditto.
21857 (vuint32m1x3_t): Ditto.
21858 (vint32m1x4_t): Ditto.
21859 (vuint32m1x4_t): Ditto.
21860 (vint32m1x5_t): Ditto.
21861 (vuint32m1x5_t): Ditto.
21862 (vint32m1x6_t): Ditto.
21863 (vuint32m1x6_t): Ditto.
21864 (vint32m1x7_t): Ditto.
21865 (vuint32m1x7_t): Ditto.
21866 (vint32m1x8_t): Ditto.
21867 (vuint32m1x8_t): Ditto.
21868 (vint32m2x2_t): Ditto.
21869 (vuint32m2x2_t): Ditto.
21870 (vint32m2x3_t): Ditto.
21871 (vuint32m2x3_t): Ditto.
21872 (vint32m2x4_t): Ditto.
21873 (vuint32m2x4_t): Ditto.
21874 (vint32m4x2_t): Ditto.
21875 (vuint32m4x2_t): Ditto.
21876 (vint64m1x2_t): Ditto.
21877 (vuint64m1x2_t): Ditto.
21878 (vint64m1x3_t): Ditto.
21879 (vuint64m1x3_t): Ditto.
21880 (vint64m1x4_t): Ditto.
21881 (vuint64m1x4_t): Ditto.
21882 (vint64m1x5_t): Ditto.
21883 (vuint64m1x5_t): Ditto.
21884 (vint64m1x6_t): Ditto.
21885 (vuint64m1x6_t): Ditto.
21886 (vint64m1x7_t): Ditto.
21887 (vuint64m1x7_t): Ditto.
21888 (vint64m1x8_t): Ditto.
21889 (vuint64m1x8_t): Ditto.
21890 (vint64m2x2_t): Ditto.
21891 (vuint64m2x2_t): Ditto.
21892 (vint64m2x3_t): Ditto.
21893 (vuint64m2x3_t): Ditto.
21894 (vint64m2x4_t): Ditto.
21895 (vuint64m2x4_t): Ditto.
21896 (vint64m4x2_t): Ditto.
21897 (vuint64m4x2_t): Ditto.
21898 (vfloat32mf2x2_t): Ditto.
21899 (vfloat32mf2x3_t): Ditto.
21900 (vfloat32mf2x4_t): Ditto.
21901 (vfloat32mf2x5_t): Ditto.
21902 (vfloat32mf2x6_t): Ditto.
21903 (vfloat32mf2x7_t): Ditto.
21904 (vfloat32mf2x8_t): Ditto.
21905 (vfloat32m1x2_t): Ditto.
21906 (vfloat32m1x3_t): Ditto.
21907 (vfloat32m1x4_t): Ditto.
21908 (vfloat32m1x5_t): Ditto.
21909 (vfloat32m1x6_t): Ditto.
21910 (vfloat32m1x7_t): Ditto.
21911 (vfloat32m1x8_t): Ditto.
21912 (vfloat32m2x2_t): Ditto.
21913 (vfloat32m2x3_t): Ditto.
21914 (vfloat32m2x4_t): Ditto.
21915 (vfloat32m4x2_t): Ditto.
21916 (vfloat64m1x2_t): Ditto.
21917 (vfloat64m1x3_t): Ditto.
21918 (vfloat64m1x4_t): Ditto.
21919 (vfloat64m1x5_t): Ditto.
21920 (vfloat64m1x6_t): Ditto.
21921 (vfloat64m1x7_t): Ditto.
21922 (vfloat64m1x8_t): Ditto.
21923 (vfloat64m2x2_t): Ditto.
21924 (vfloat64m2x3_t): Ditto.
21925 (vfloat64m2x4_t): Ditto.
21926 (vfloat64m4x2_t): Ditto.
21927 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
21929 (DEF_RVV_TYPE_INDEX): Ditto.
21930 (rvv_arg_type_info::get_tuple_subpart_type): New function.
21931 (DEF_RVV_TUPLE_TYPE): New macro.
21932 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
21933 Adapt for tuple vget/vset support.
21934 (vint8mf4_t): Ditto.
21935 (vuint8mf4_t): Ditto.
21936 (vint8mf2_t): Ditto.
21937 (vuint8mf2_t): Ditto.
21938 (vint8m1_t): Ditto.
21939 (vuint8m1_t): Ditto.
21940 (vint8m2_t): Ditto.
21941 (vuint8m2_t): Ditto.
21942 (vint8m4_t): Ditto.
21943 (vuint8m4_t): Ditto.
21944 (vint8m8_t): Ditto.
21945 (vuint8m8_t): Ditto.
21946 (vint16mf4_t): Ditto.
21947 (vuint16mf4_t): Ditto.
21948 (vint16mf2_t): Ditto.
21949 (vuint16mf2_t): Ditto.
21950 (vint16m1_t): Ditto.
21951 (vuint16m1_t): Ditto.
21952 (vint16m2_t): Ditto.
21953 (vuint16m2_t): Ditto.
21954 (vint16m4_t): Ditto.
21955 (vuint16m4_t): Ditto.
21956 (vint16m8_t): Ditto.
21957 (vuint16m8_t): Ditto.
21958 (vint32mf2_t): Ditto.
21959 (vuint32mf2_t): Ditto.
21960 (vint32m1_t): Ditto.
21961 (vuint32m1_t): Ditto.
21962 (vint32m2_t): Ditto.
21963 (vuint32m2_t): Ditto.
21964 (vint32m4_t): Ditto.
21965 (vuint32m4_t): Ditto.
21966 (vint32m8_t): Ditto.
21967 (vuint32m8_t): Ditto.
21968 (vint64m1_t): Ditto.
21969 (vuint64m1_t): Ditto.
21970 (vint64m2_t): Ditto.
21971 (vuint64m2_t): Ditto.
21972 (vint64m4_t): Ditto.
21973 (vuint64m4_t): Ditto.
21974 (vint64m8_t): Ditto.
21975 (vuint64m8_t): Ditto.
21976 (vfloat32mf2_t): Ditto.
21977 (vfloat32m1_t): Ditto.
21978 (vfloat32m2_t): Ditto.
21979 (vfloat32m4_t): Ditto.
21980 (vfloat32m8_t): Ditto.
21981 (vfloat64m1_t): Ditto.
21982 (vfloat64m2_t): Ditto.
21983 (vfloat64m4_t): Ditto.
21984 (vfloat64m8_t): Ditto.
21985 (tuple_subpart): Add tuple subpart base type.
21986 * config/riscv/riscv-vector-builtins.h (struct
21987 rvv_arg_type_info): Ditto.
21988 (tuple_type_field): New function.
21990 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21992 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
21993 (RVV_TUPLE_PARTIAL_MODES): Ditto.
21994 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
21997 (get_subpart_mode): Ditto.
21998 (get_tuple_mode): Ditto.
21999 (expand_tuple_move): Ditto.
22000 * config/riscv/riscv-v.cc (ENTRY): New macro.
22001 (TUPLE_ENTRY): Ditto.
22002 (get_nf): New function.
22003 (get_subpart_mode): Ditto.
22004 (get_tuple_mode): Ditto.
22005 (expand_tuple_move): Ditto.
22006 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
22008 (register_tuple_type): New function
22009 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
22011 (vint8mf8x2_t): New macro.
22012 (vuint8mf8x2_t): Ditto.
22013 (vint8mf8x3_t): Ditto.
22014 (vuint8mf8x3_t): Ditto.
22015 (vint8mf8x4_t): Ditto.
22016 (vuint8mf8x4_t): Ditto.
22017 (vint8mf8x5_t): Ditto.
22018 (vuint8mf8x5_t): Ditto.
22019 (vint8mf8x6_t): Ditto.
22020 (vuint8mf8x6_t): Ditto.
22021 (vint8mf8x7_t): Ditto.
22022 (vuint8mf8x7_t): Ditto.
22023 (vint8mf8x8_t): Ditto.
22024 (vuint8mf8x8_t): Ditto.
22025 (vint8mf4x2_t): Ditto.
22026 (vuint8mf4x2_t): Ditto.
22027 (vint8mf4x3_t): Ditto.
22028 (vuint8mf4x3_t): Ditto.
22029 (vint8mf4x4_t): Ditto.
22030 (vuint8mf4x4_t): Ditto.
22031 (vint8mf4x5_t): Ditto.
22032 (vuint8mf4x5_t): Ditto.
22033 (vint8mf4x6_t): Ditto.
22034 (vuint8mf4x6_t): Ditto.
22035 (vint8mf4x7_t): Ditto.
22036 (vuint8mf4x7_t): Ditto.
22037 (vint8mf4x8_t): Ditto.
22038 (vuint8mf4x8_t): Ditto.
22039 (vint8mf2x2_t): Ditto.
22040 (vuint8mf2x2_t): Ditto.
22041 (vint8mf2x3_t): Ditto.
22042 (vuint8mf2x3_t): Ditto.
22043 (vint8mf2x4_t): Ditto.
22044 (vuint8mf2x4_t): Ditto.
22045 (vint8mf2x5_t): Ditto.
22046 (vuint8mf2x5_t): Ditto.
22047 (vint8mf2x6_t): Ditto.
22048 (vuint8mf2x6_t): Ditto.
22049 (vint8mf2x7_t): Ditto.
22050 (vuint8mf2x7_t): Ditto.
22051 (vint8mf2x8_t): Ditto.
22052 (vuint8mf2x8_t): Ditto.
22053 (vint8m1x2_t): Ditto.
22054 (vuint8m1x2_t): Ditto.
22055 (vint8m1x3_t): Ditto.
22056 (vuint8m1x3_t): Ditto.
22057 (vint8m1x4_t): Ditto.
22058 (vuint8m1x4_t): Ditto.
22059 (vint8m1x5_t): Ditto.
22060 (vuint8m1x5_t): Ditto.
22061 (vint8m1x6_t): Ditto.
22062 (vuint8m1x6_t): Ditto.
22063 (vint8m1x7_t): Ditto.
22064 (vuint8m1x7_t): Ditto.
22065 (vint8m1x8_t): Ditto.
22066 (vuint8m1x8_t): Ditto.
22067 (vint8m2x2_t): Ditto.
22068 (vuint8m2x2_t): Ditto.
22069 (vint8m2x3_t): Ditto.
22070 (vuint8m2x3_t): Ditto.
22071 (vint8m2x4_t): Ditto.
22072 (vuint8m2x4_t): Ditto.
22073 (vint8m4x2_t): Ditto.
22074 (vuint8m4x2_t): Ditto.
22075 (vint16mf4x2_t): Ditto.
22076 (vuint16mf4x2_t): Ditto.
22077 (vint16mf4x3_t): Ditto.
22078 (vuint16mf4x3_t): Ditto.
22079 (vint16mf4x4_t): Ditto.
22080 (vuint16mf4x4_t): Ditto.
22081 (vint16mf4x5_t): Ditto.
22082 (vuint16mf4x5_t): Ditto.
22083 (vint16mf4x6_t): Ditto.
22084 (vuint16mf4x6_t): Ditto.
22085 (vint16mf4x7_t): Ditto.
22086 (vuint16mf4x7_t): Ditto.
22087 (vint16mf4x8_t): Ditto.
22088 (vuint16mf4x8_t): Ditto.
22089 (vint16mf2x2_t): Ditto.
22090 (vuint16mf2x2_t): Ditto.
22091 (vint16mf2x3_t): Ditto.
22092 (vuint16mf2x3_t): Ditto.
22093 (vint16mf2x4_t): Ditto.
22094 (vuint16mf2x4_t): Ditto.
22095 (vint16mf2x5_t): Ditto.
22096 (vuint16mf2x5_t): Ditto.
22097 (vint16mf2x6_t): Ditto.
22098 (vuint16mf2x6_t): Ditto.
22099 (vint16mf2x7_t): Ditto.
22100 (vuint16mf2x7_t): Ditto.
22101 (vint16mf2x8_t): Ditto.
22102 (vuint16mf2x8_t): Ditto.
22103 (vint16m1x2_t): Ditto.
22104 (vuint16m1x2_t): Ditto.
22105 (vint16m1x3_t): Ditto.
22106 (vuint16m1x3_t): Ditto.
22107 (vint16m1x4_t): Ditto.
22108 (vuint16m1x4_t): Ditto.
22109 (vint16m1x5_t): Ditto.
22110 (vuint16m1x5_t): Ditto.
22111 (vint16m1x6_t): Ditto.
22112 (vuint16m1x6_t): Ditto.
22113 (vint16m1x7_t): Ditto.
22114 (vuint16m1x7_t): Ditto.
22115 (vint16m1x8_t): Ditto.
22116 (vuint16m1x8_t): Ditto.
22117 (vint16m2x2_t): Ditto.
22118 (vuint16m2x2_t): Ditto.
22119 (vint16m2x3_t): Ditto.
22120 (vuint16m2x3_t): Ditto.
22121 (vint16m2x4_t): Ditto.
22122 (vuint16m2x4_t): Ditto.
22123 (vint16m4x2_t): Ditto.
22124 (vuint16m4x2_t): Ditto.
22125 (vint32mf2x2_t): Ditto.
22126 (vuint32mf2x2_t): Ditto.
22127 (vint32mf2x3_t): Ditto.
22128 (vuint32mf2x3_t): Ditto.
22129 (vint32mf2x4_t): Ditto.
22130 (vuint32mf2x4_t): Ditto.
22131 (vint32mf2x5_t): Ditto.
22132 (vuint32mf2x5_t): Ditto.
22133 (vint32mf2x6_t): Ditto.
22134 (vuint32mf2x6_t): Ditto.
22135 (vint32mf2x7_t): Ditto.
22136 (vuint32mf2x7_t): Ditto.
22137 (vint32mf2x8_t): Ditto.
22138 (vuint32mf2x8_t): Ditto.
22139 (vint32m1x2_t): Ditto.
22140 (vuint32m1x2_t): Ditto.
22141 (vint32m1x3_t): Ditto.
22142 (vuint32m1x3_t): Ditto.
22143 (vint32m1x4_t): Ditto.
22144 (vuint32m1x4_t): Ditto.
22145 (vint32m1x5_t): Ditto.
22146 (vuint32m1x5_t): Ditto.
22147 (vint32m1x6_t): Ditto.
22148 (vuint32m1x6_t): Ditto.
22149 (vint32m1x7_t): Ditto.
22150 (vuint32m1x7_t): Ditto.
22151 (vint32m1x8_t): Ditto.
22152 (vuint32m1x8_t): Ditto.
22153 (vint32m2x2_t): Ditto.
22154 (vuint32m2x2_t): Ditto.
22155 (vint32m2x3_t): Ditto.
22156 (vuint32m2x3_t): Ditto.
22157 (vint32m2x4_t): Ditto.
22158 (vuint32m2x4_t): Ditto.
22159 (vint32m4x2_t): Ditto.
22160 (vuint32m4x2_t): Ditto.
22161 (vint64m1x2_t): Ditto.
22162 (vuint64m1x2_t): Ditto.
22163 (vint64m1x3_t): Ditto.
22164 (vuint64m1x3_t): Ditto.
22165 (vint64m1x4_t): Ditto.
22166 (vuint64m1x4_t): Ditto.
22167 (vint64m1x5_t): Ditto.
22168 (vuint64m1x5_t): Ditto.
22169 (vint64m1x6_t): Ditto.
22170 (vuint64m1x6_t): Ditto.
22171 (vint64m1x7_t): Ditto.
22172 (vuint64m1x7_t): Ditto.
22173 (vint64m1x8_t): Ditto.
22174 (vuint64m1x8_t): Ditto.
22175 (vint64m2x2_t): Ditto.
22176 (vuint64m2x2_t): Ditto.
22177 (vint64m2x3_t): Ditto.
22178 (vuint64m2x3_t): Ditto.
22179 (vint64m2x4_t): Ditto.
22180 (vuint64m2x4_t): Ditto.
22181 (vint64m4x2_t): Ditto.
22182 (vuint64m4x2_t): Ditto.
22183 (vfloat32mf2x2_t): Ditto.
22184 (vfloat32mf2x3_t): Ditto.
22185 (vfloat32mf2x4_t): Ditto.
22186 (vfloat32mf2x5_t): Ditto.
22187 (vfloat32mf2x6_t): Ditto.
22188 (vfloat32mf2x7_t): Ditto.
22189 (vfloat32mf2x8_t): Ditto.
22190 (vfloat32m1x2_t): Ditto.
22191 (vfloat32m1x3_t): Ditto.
22192 (vfloat32m1x4_t): Ditto.
22193 (vfloat32m1x5_t): Ditto.
22194 (vfloat32m1x6_t): Ditto.
22195 (vfloat32m1x7_t): Ditto.
22196 (vfloat32m1x8_t): Ditto.
22197 (vfloat32m2x2_t): Ditto.
22198 (vfloat32m2x3_t): Ditto.
22199 (vfloat32m2x4_t): Ditto.
22200 (vfloat32m4x2_t): Ditto.
22201 (vfloat64m1x2_t): Ditto.
22202 (vfloat64m1x3_t): Ditto.
22203 (vfloat64m1x4_t): Ditto.
22204 (vfloat64m1x5_t): Ditto.
22205 (vfloat64m1x6_t): Ditto.
22206 (vfloat64m1x7_t): Ditto.
22207 (vfloat64m1x8_t): Ditto.
22208 (vfloat64m2x2_t): Ditto.
22209 (vfloat64m2x3_t): Ditto.
22210 (vfloat64m2x4_t): Ditto.
22211 (vfloat64m4x2_t): Ditto.
22212 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
22214 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
22215 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
22217 (TUPLE_ENTRY): Ditto.
22218 (riscv_v_ext_mode_p): New function.
22219 (riscv_v_adjust_nunits): Add tuple mode adjustment.
22220 (riscv_classify_address): Ditto.
22221 (riscv_binary_cost): Ditto.
22222 (riscv_rtx_costs): Ditto.
22223 (riscv_secondary_memory_needed): Ditto.
22224 (riscv_hard_regno_nregs): Ditto.
22225 (riscv_hard_regno_mode_ok): Ditto.
22226 (riscv_vector_mode_supported_p): Ditto.
22227 (riscv_regmode_natural_size): Ditto.
22228 (riscv_array_mode): New function.
22229 (TARGET_ARRAY_MODE): New target hook.
22230 * config/riscv/riscv.md: Add tuple modes.
22231 * config/riscv/vector-iterators.md: Ditto.
22232 * config/riscv/vector.md (mov<mode>): Add tuple modes data
22234 (*mov<VT:mode>_<P:mode>): Ditto.
22236 2023-05-03 Richard Biener <rguenther@suse.de>
22238 * cse.cc (cse_insn): Track an equivalence to the destination
22239 separately and delay using src_related for it.
22241 2023-05-03 Richard Biener <rguenther@suse.de>
22243 * cse.cc (HASH): Turn into inline function and mix
22244 in another HASH_SHIFT bits.
22245 (SAFE_HASH): Likewise.
22247 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22250 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
22251 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
22253 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22256 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
22257 (add<mode>3<vczle><vczbe>): ... This.
22258 (sub<mode>3): Rename to...
22259 (sub<mode>3<vczle><vczbe>): ... This.
22260 (mul<mode>3): Rename to...
22261 (mul<mode>3<vczle><vczbe>): ... This.
22262 (*div<mode>3): Rename to...
22263 (*div<mode>3<vczle><vczbe>): ... This.
22264 (neg<mode>2): Rename to...
22265 (neg<mode>2<vczle><vczbe>): ... This.
22266 (abs<mode>2): Rename to...
22267 (abs<mode>2<vczle><vczbe>): ... This.
22268 (<frint_pattern><mode>2): Rename to...
22269 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
22270 (<fmaxmin><mode>3): Rename to...
22271 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
22272 (*sqrt<mode>2): Rename to...
22273 (*sqrt<mode>2<vczle><vczbe>): ... This.
22275 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
22277 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
22279 2023-05-03 Martin Liska <mliska@suse.cz>
22281 PR tree-optimization/109693
22282 * value-range-storage.cc (vrange_allocator::vrange_allocator):
22283 Remove unused field.
22284 * value-range-storage.h: Likewise.
22286 2023-05-02 Andrew Pinski <apinski@marvell.com>
22288 * tree-ssa-phiopt.cc (move_stmt): New function.
22289 (match_simplify_replacement): Use move_stmt instead
22290 of the inlined version.
22292 2023-05-02 Andrew Pinski <apinski@marvell.com>
22294 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
22297 2023-05-02 Andrew Pinski <apinski@marvell.com>
22299 PR tree-optimization/109702
22300 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
22301 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
22303 2023-05-02 Andrew Pinski <apinski@marvell.com>
22306 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
22307 insn_and_split pattern.
22309 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
22311 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
22314 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
22316 * config/riscv/sync.md (mem_thread_fence_1): Change fence
22317 depending on the given memory model.
22319 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
22321 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
22322 riscv_union_memmodels function to sync.md.
22323 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
22324 get the union of two memmodels in sync.md.
22325 (riscv_print_operand): Add %I and %J flags that output the
22326 optimal LR/SC flag bits for a given memory model.
22327 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
22328 bits on SC op and replace with optimized %I, %J flags.
22330 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
22332 * config/riscv/riscv.cc
22333 (riscv_memmodel_needs_amo_release): Change function name.
22334 (riscv_print_operand): Remove unneeded %F case.
22335 * config/riscv/sync.md: Remove unneeded fences.
22337 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
22340 * config/riscv/sync.md (atomic_store<mode>): Use simple store
22341 instruction in combination with fence(s).
22343 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
22345 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
22346 of %A to include release bits.
22348 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
22350 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
22351 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
22354 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
22356 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
22357 sequentially consistent LR.aqrl/SC.rl pairs.
22359 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
22361 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
22362 sanitize memmodel input with memmodel_base.
22364 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
22365 Pan Li <pan2.li@intel.com>
22368 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
22370 2023-05-02 Romain Naour <romain.naour@gmail.com>
22372 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
22375 2023-05-02 Martin Liska <mliska@suse.cz>
22377 * doc/invoke.texi: Update documentation based on param.opt file.
22379 2023-05-02 Richard Biener <rguenther@suse.de>
22381 PR tree-optimization/109672
22382 * tree-vect-stmts.cc (vectorizable_operation): For plus,
22383 minus and negate always check the vector mode is word mode.
22385 2023-05-01 Andrew Pinski <apinski@marvell.com>
22387 * tree-ssa-phiopt.cc: Update comment about
22388 how the transformation are implemented.
22390 2023-05-01 Jeff Law <jlaw@ventanamicro>
22392 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
22394 2023-05-01 Jeff Law <jlaw@ventanamicro>
22396 * config/cris/cris.cc (TARGET_LRA_P): Remove.
22397 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
22398 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
22399 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
22400 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
22401 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
22403 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
22405 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
22406 * print-tree.cc (print_decl_identifier): Implement it.
22407 * toplev.cc (output_stack_usage_1): Use it.
22409 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22411 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
22414 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22416 * value-range.h (irange::set_nonzero): Inline.
22418 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22420 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
22422 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
22423 invalid_range, as it is an inverse range.
22424 * tree-vrp.cc (find_case_label_range): Avoid trees.
22425 * value-range.cc (irange::irange_set): Delete.
22426 (irange::irange_set_1bit_anti_range): Delete.
22427 (irange::irange_set_anti_range): Delete.
22428 (irange::set): Cleanup.
22429 * value-range.h (class irange): Remove irange_set,
22430 irange_set_anti_range, irange_set_1bit_anti_range.
22431 (irange::set_undefined): Remove set to m_type.
22433 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22435 * range-op.cc (update_known_bitmask): Adjust for irange containing
22436 wide_ints internally.
22437 * tree-ssanames.cc (set_nonzero_bits): Same.
22438 * tree-ssanames.h (set_nonzero_bits): Same.
22439 * value-range-storage.cc (irange_storage::set_irange): Same.
22440 (irange_storage::get_irange): Same.
22441 * value-range.cc (irange::operator=): Same.
22442 (irange::irange_set): Same.
22443 (irange::irange_set_1bit_anti_range): Same.
22444 (irange::irange_set_anti_range): Same.
22445 (irange::set): Same.
22446 (irange::verify_range): Same.
22447 (irange::contains_p): Same.
22448 (irange::irange_single_pair_union): Same.
22449 (irange::union_): Same.
22450 (irange::irange_contains_p): Same.
22451 (irange::intersect): Same.
22452 (irange::invert): Same.
22453 (irange::set_range_from_nonzero_bits): Same.
22454 (irange::set_nonzero_bits): Same.
22455 (mask_to_wi): Same.
22456 (irange::intersect_nonzero_bits): Same.
22457 (irange::union_nonzero_bits): Same.
22460 (tree_range): Same.
22461 (range_tests_strict_enum): Same.
22462 (range_tests_misc): Same.
22463 (range_tests_nonzero_bits): Same.
22464 * value-range.h (irange::type): Same.
22465 (irange::varying_compatible_p): Same.
22466 (irange::irange): Same.
22467 (int_range::int_range): Same.
22468 (irange::set_undefined): Same.
22469 (irange::set_varying): Same.
22470 (irange::lower_bound): Same.
22471 (irange::upper_bound): Same.
22473 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22475 * gimple-range-fold.cc (tree_lower_bound): Delete.
22476 (tree_upper_bound): Delete.
22477 (vrp_val_max): Delete.
22478 (vrp_val_min): Delete.
22479 (fold_using_range::range_of_ssa_name_with_loop_info): Call
22480 range_of_var_in_loop.
22481 * vr-values.cc (valid_value_p): Delete.
22482 (fix_overflow): Delete.
22483 (get_scev_info): New.
22484 (bounds_of_var_in_loop): Refactor into...
22485 (induction_variable_may_overflow_p): ...this,
22486 (range_from_loop_direction): ...and this,
22487 (range_of_var_in_loop): ...and this.
22488 * vr-values.h (bounds_of_var_in_loop): Delete.
22489 (range_of_var_in_loop): New.
22491 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22493 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
22495 (vrp_val_max): New.
22496 (vrp_val_min): New.
22497 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
22498 * range-op.cc (max_limit): Same.
22500 (plus_minus_ranges): Same.
22501 (operator_rshift::op1_range): Same.
22502 (operator_cast::inside_domain_p): Same.
22503 * value-range.cc (vrp_val_is_max): Delete.
22504 (vrp_val_is_min): Delete.
22505 (range_tests_misc): Use irange_val_*.
22506 * value-range.h (vrp_val_is_min): Delete.
22507 (vrp_val_is_max): Delete.
22508 (vrp_val_max): Delete.
22509 (irange_val_min): New.
22510 (vrp_val_min): Delete.
22511 (irange_val_max): New.
22512 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
22514 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22516 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
22517 * gimple-fold.cc (size_must_be_zero_p): Same.
22518 * gimple-loop-versioning.cc
22519 (loop_versioning::prune_loop_conditions): Same.
22520 * gimple-range-edge.cc (gcond_edge_range): Same.
22521 (gimple_outgoing_range::calc_switch_ranges): Same.
22522 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
22523 (adjust_realpart_expr): Same.
22524 (fold_using_range::range_of_address): Same.
22525 (fold_using_range::relation_fold_and_or): Same.
22526 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
22527 (range_is_either_true_or_false): Same.
22528 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
22529 (cfn_clz::fold_range): Same.
22530 (cfn_ctz::fold_range): Same.
22531 * gimple-range-tests.cc (class test_expr_eval): Same.
22532 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
22533 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
22534 (propagate_vr_across_jump_function): Same.
22535 (decide_whether_version_node): Same.
22536 * ipa-prop.cc (ipa_get_value_range): Same.
22537 * ipa-prop.h (ipa_range_set_and_normalize): Same.
22538 * range-op.cc (get_shift_range): Same.
22539 (value_range_from_overflowed_bounds): Same.
22540 (value_range_with_overflow): Same.
22541 (create_possibly_reversed_range): Same.
22542 (equal_op1_op2_relation): Same.
22543 (not_equal_op1_op2_relation): Same.
22544 (lt_op1_op2_relation): Same.
22545 (le_op1_op2_relation): Same.
22546 (gt_op1_op2_relation): Same.
22547 (ge_op1_op2_relation): Same.
22548 (operator_mult::op1_range): Same.
22549 (operator_exact_divide::op1_range): Same.
22550 (operator_lshift::op1_range): Same.
22551 (operator_rshift::op1_range): Same.
22552 (operator_cast::op1_range): Same.
22553 (operator_logical_and::fold_range): Same.
22554 (set_nonzero_range_from_mask): Same.
22555 (operator_bitwise_or::op1_range): Same.
22556 (operator_bitwise_xor::op1_range): Same.
22557 (operator_addr_expr::fold_range): Same.
22558 (pointer_plus_operator::wi_fold): Same.
22559 (pointer_or_operator::op1_range): Same.
22566 (range_op_cast_tests): Same.
22567 (range_op_lshift_tests): Same.
22568 (range_op_rshift_tests): Same.
22569 (range_op_bitwise_and_tests): Same.
22570 (range_relational_tests): Same.
22571 * range.cc (range_zero): Same.
22572 (range_nonzero): Same.
22573 * range.h (range_true): Same.
22574 (range_false): Same.
22575 (range_true_and_false): Same.
22576 * tree-data-ref.cc (split_constant_offset_1): Same.
22577 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
22578 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
22579 (find_unswitching_predicates_for_bb): Same.
22580 * tree-ssa-phiopt.cc (value_replacement): Same.
22581 * tree-ssa-threadbackward.cc
22582 (back_threader::find_taken_edge_cond): Same.
22583 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
22584 * tree-vrp.cc (find_case_label_range): Same.
22585 * value-query.cc (range_query::get_tree_range): Same.
22586 * value-range.cc (irange::set_nonnegative): Same.
22587 (frange::contains_p): Same.
22588 (frange::singleton_p): Same.
22589 (frange::internal_singleton_p): Same.
22590 (irange::irange_set): Same.
22591 (irange::irange_set_1bit_anti_range): Same.
22592 (irange::irange_set_anti_range): Same.
22593 (irange::set): Same.
22594 (irange::operator==): Same.
22595 (irange::singleton_p): Same.
22596 (irange::contains_p): Same.
22597 (irange::set_range_from_nonzero_bits): Same.
22598 (DEFINE_INT_RANGE_INSTANCE): Same.
22608 (range_uint128): New.
22609 (range_uchar): New.
22611 (build_range3): Convert to irange wide_int API.
22612 (range_tests_irange3): Same.
22613 (range_tests_int_range_max): Same.
22614 (range_tests_strict_enum): Same.
22615 (range_tests_misc): Same.
22616 (range_tests_nonzero_bits): Same.
22617 (range_tests_nan): Same.
22618 (range_tests_signed_zeros): Same.
22619 * value-range.h (Value_Range::Value_Range): Same.
22620 (irange::set): Same.
22621 (irange::nonzero_p): Same.
22622 (irange::contains_p): Same.
22623 (range_includes_zero_p): Same.
22624 (irange::set_nonzero): Same.
22625 (irange::set_zero): Same.
22626 (contains_zero_p): Same.
22627 (frange::contains_p): Same.
22629 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
22630 (bounds_of_var_in_loop): Same.
22631 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
22633 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22635 * value-range.cc (irange::irange_union): Rename to...
22636 (irange::union_): ...this.
22637 (irange::irange_intersect): Rename to...
22638 (irange::intersect): ...this.
22639 * value-range.h (irange::union_): Delete.
22640 (irange::intersect): Delete.
22642 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22644 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
22646 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22648 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
22650 (compare_ranges): Delete.
22651 (compare_range_with_value): Delete.
22652 (bounds_of_var_in_loop): Tidy up by using ranger API.
22653 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
22654 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
22655 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
22656 strict_overflow_p and only_ranges.
22657 (simplify_using_ranges::legacy_fold_cond): Adjust call to
22658 legacy_fold_cond_overflow.
22659 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
22661 (range_fits_type_p): Rename value_range to irange.
22662 * vr-values.h (range_fits_type_p): Adjust prototype.
22664 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22666 * value-range.cc (irange::irange_set_anti_range): Remove uses of
22667 tree_lower_bound and tree_upper_bound.
22668 (irange::verify_range): Same.
22669 (irange::operator==): Same.
22670 (irange::singleton_p): Same.
22671 * value-range.h (irange::tree_lower_bound): Delete.
22672 (irange::tree_upper_bound): Delete.
22673 (irange::lower_bound): Delete.
22674 (irange::upper_bound): Delete.
22675 (irange::zero_p): Remove uses of tree_lower_bound and
22678 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22680 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
22682 (determine_value_range): Same.
22683 (record_nonwrapping_iv): Same.
22684 (infer_loop_bounds_from_signedness): Same.
22685 (scev_var_range_cant_overflow): Same.
22686 * tree-vrp.cc (operand_less_p): Delete.
22687 * tree-vrp.h (operand_less_p): Delete.
22688 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
22689 (irange::value_inside_range): Delete.
22690 * value-range.h (vrange::kind): Delete.
22691 (irange::num_pairs): Remove check of m_kind.
22692 (irange::min): Delete.
22693 (irange::max): Delete.
22695 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
22697 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
22698 for vrange_storage.
22699 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
22700 (sbr_vector::grow): Same.
22701 (sbr_vector::set_bb_range): Same.
22702 (sbr_vector::get_bb_range): Same.
22703 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
22704 (sbr_sparse_bitmap::set_bb_range): Same.
22705 (sbr_sparse_bitmap::get_bb_range): Same.
22706 (block_range_cache::block_range_cache): Same.
22707 (ssa_global_cache::ssa_global_cache): Same.
22708 (ssa_global_cache::get_global_range): Same.
22709 (ssa_global_cache::set_global_range): Same.
22710 * gimple-range-cache.h: Same.
22711 * gimple-range-edge.cc
22712 (gimple_outgoing_range::gimple_outgoing_range): Same.
22713 (gimple_outgoing_range::switch_edge_range): Same.
22714 (gimple_outgoing_range::calc_switch_ranges): Same.
22715 * gimple-range-edge.h: Same.
22716 * gimple-range-infer.cc
22717 (infer_range_manager::infer_range_manager): Same.
22718 (infer_range_manager::get_nonzero): Same.
22719 (infer_range_manager::maybe_adjust_range): Same.
22720 (infer_range_manager::add_range): Same.
22721 * gimple-range-infer.h: Rename obstack_vrange_allocator to
22723 * tree-core.h (struct irange_storage_slot): Remove.
22724 (struct tree_ssa_name): Remove irange_info and frange_info. Make
22725 range_info a pointer to vrange_storage.
22726 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
22727 (range_info_alloc): Same.
22728 (range_info_free): Same.
22729 (range_info_get_range): Same.
22730 (range_info_set_range): Same.
22731 (get_nonzero_bits): Same.
22732 * value-query.cc (get_ssa_name_range_info): Same.
22733 * value-range-storage.cc (class vrange_internal_alloc): New.
22734 (class vrange_obstack_alloc): New.
22735 (class vrange_ggc_alloc): New.
22736 (vrange_allocator::vrange_allocator): New.
22737 (vrange_allocator::~vrange_allocator): New.
22738 (vrange_storage::alloc_slot): New.
22739 (vrange_allocator::alloc): New.
22740 (vrange_allocator::free): New.
22741 (vrange_allocator::clone): New.
22742 (vrange_allocator::clone_varying): New.
22743 (vrange_allocator::clone_undefined): New.
22744 (vrange_storage::alloc): New.
22745 (vrange_storage::set_vrange): Remove slot argument.
22746 (vrange_storage::get_vrange): Same.
22747 (vrange_storage::fits_p): Same.
22748 (vrange_storage::equal_p): New.
22749 (irange_storage::write_lengths_address): New.
22750 (irange_storage::lengths_address): New.
22751 (irange_storage_slot::alloc_slot): Remove.
22752 (irange_storage::alloc): New.
22753 (irange_storage_slot::irange_storage_slot): Remove.
22754 (irange_storage::irange_storage): New.
22755 (write_wide_int): New.
22756 (irange_storage_slot::set_irange): Remove.
22757 (irange_storage::set_irange): New.
22758 (read_wide_int): New.
22759 (irange_storage_slot::get_irange): Remove.
22760 (irange_storage::get_irange): New.
22761 (irange_storage_slot::size): Remove.
22762 (irange_storage::equal_p): New.
22763 (irange_storage_slot::num_wide_ints_needed): Remove.
22764 (irange_storage::size): New.
22765 (irange_storage_slot::fits_p): Remove.
22766 (irange_storage::fits_p): New.
22767 (irange_storage_slot::dump): Remove.
22768 (irange_storage::dump): New.
22769 (frange_storage_slot::alloc_slot): Remove.
22770 (frange_storage::alloc): New.
22771 (frange_storage_slot::set_frange): Remove.
22772 (frange_storage::set_frange): New.
22773 (frange_storage_slot::get_frange): Remove.
22774 (frange_storage::get_frange): New.
22775 (frange_storage_slot::fits_p): Remove.
22776 (frange_storage::equal_p): New.
22777 (frange_storage::fits_p): New.
22778 (ggc_vrange_allocator): New.
22779 (ggc_alloc_vrange_storage): New.
22780 * value-range-storage.h (class vrange_storage): Rewrite.
22781 (class irange_storage): Rewrite.
22782 (class frange_storage): Rewrite.
22783 (class obstack_vrange_allocator): Remove.
22784 (class ggc_vrange_allocator): Remove.
22785 (vrange_allocator::alloc_vrange): Remove.
22786 (vrange_allocator::alloc_irange): Remove.
22787 (vrange_allocator::alloc_frange): Remove.
22788 (ggc_alloc_vrange_storage): New.
22789 * value-range.h (class irange): Rename vrange_allocator to
22791 (class frange): Same.
22793 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
22795 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
22796 inc to avoid clobbering the carry flag.
22798 2023-04-30 Andrew Pinski <apinski@marvell.com>
22800 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
22801 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
22803 2023-04-30 Andrew Pinski <apinski@marvell.com>
22805 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
22806 Allow some builtin/internal function calls which
22807 are known not to trap/throw.
22808 (phiopt_worker::match_simplify_replacement):
22809 Use name instead of getting the lhs again.
22811 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
22813 * configure: Regenerate.
22814 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
22816 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
22818 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
22819 emit_insn_if_valid_for_reload.
22820 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
22821 to be recognized, also try emitting a parallel that clobbers
22822 TARGET_FLAGS_REGNUM, as applicable.
22824 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
22826 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
22828 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
22829 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
22831 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
22833 * config/stormy16/stormy16.md (any_lshift): New code iterator.
22834 (any_or_plus): Likewise.
22835 (any_rotate): Likewise.
22836 (*<any_lshift>_and_internal): New define_insn_and_split to
22837 recognize a logical shift followed by an AND, and split it
22838 again after reload.
22839 (*swpn): New define_insn matching xstormy16's swpn.
22840 (*swpn_zext): New define_insn recognizing swpn followed by
22841 zero_extendqihi2, i.e. with the high byte set to zero.
22842 (*swpn_sext): Likewise, for swpn followed by cbw.
22843 (*swpn_sext_2): Likewise, for an alternate RTL form.
22844 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
22845 sequence is split in the correct place to recognize the *swpn_zext
22846 followed by any_or_plus (ior, xor or plus) instruction.
22848 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
22851 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
22852 (lm32-*-uclinux*): Likewise.
22854 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
22856 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
22857 for riscv_use_save_libcall.
22858 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
22859 (riscv_compute_frame_info): restructure to decouple stack allocation
22860 for rv32e w/o save-restore.
22862 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
22864 * doc/install.texi: Fix documentation typo
22866 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
22868 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
22869 (u): Add div/udiv cases.
22870 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
22871 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
22873 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
22874 (thead_c906_tune_info): Likewise.
22875 (optimize_size_tune_info): Likewise.
22876 (riscv_use_divmod_expander): New function.
22877 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
22879 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
22881 * config/riscv/bitmanip.md: Added clmulr instruction.
22882 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
22883 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
22885 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
22886 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
22887 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
22888 functions to riscv-cmo.def.
22889 * config/riscv/generic.md: Add clmul to list of instructions
22890 using the generic_imul reservation.
22892 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
22894 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
22896 2023-04-28 Andrew Pinski <apinski@marvell.com>
22898 PR tree-optimization/100958
22899 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
22900 (pass_phiopt::execute): Don't call two_value_replacement.
22901 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
22902 handle what two_value_replacement did.
22904 2023-04-28 Andrew Pinski <apinski@marvell.com>
22906 * match.pd: Add patterns for
22907 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
22909 2023-04-28 Andrew Pinski <apinski@marvell.com>
22911 * match.pd: Factor out the deciding the min/max from
22912 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
22914 * fold-const.cc (minmax_from_comparison): this new function.
22915 * fold-const.h (minmax_from_comparison): New prototype.
22917 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
22919 PR rtl-optimization/109476
22920 * lower-subreg.cc: Include explow.h for force_reg.
22921 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
22922 If decomposing a suitable LSHIFTRT and we're not splitting
22923 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
22924 instead of setting a high part SUBREG to zero, which helps combine.
22925 (decompose_multiword_subregs): Update call to resolve_shift_zext.
22927 2023-04-28 Richard Biener <rguenther@suse.de>
22929 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
22931 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
22932 gather-scatter info and cost emulated scatters accordingly.
22933 (get_load_store_type): Support emulated scatters.
22934 (vectorizable_store): Likewise. Emulate them by extracting
22935 scalar offsets and data, doing scalar stores.
22937 2023-04-28 Richard Biener <rguenther@suse.de>
22939 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
22940 Tame down element extracts and scalar loads for gather/scatter
22941 similar to elementwise strided accesses.
22943 2023-04-28 Pan Li <pan2.li@intel.com>
22944 kito-cheng <kito.cheng@sifive.com>
22946 * config/riscv/vector.md: Add new define split to perform
22947 the simplification.
22949 2023-04-28 Richard Biener <rguenther@suse.de>
22952 * ipa-param-manipulation.cc
22953 (ipa_param_body_adjustments::modify_expression): Allow
22954 conversion of a register to a non-register type. Elide
22955 conversions inside BIT_FIELD_REFs.
22957 2023-04-28 Richard Biener <rguenther@suse.de>
22959 PR tree-optimization/109644
22960 * tree-cfg.cc (verify_types_in_gimple_reference): Check
22961 register constraints on the outermost VIEW_CONVERT_EXPR
22962 only. Do not allow register or invariant bases on
22963 multi-level or possibly variable index handled components.
22965 2023-04-28 Richard Biener <rguenther@suse.de>
22967 * gimplify.cc (gimplify_compound_lval): When there's a
22968 non-register type produced by one of the handled component
22969 operations make sure we get a non-register base.
22971 2023-04-28 Richard Biener <rguenther@suse.de>
22973 PR tree-optimization/108752
22974 * tree-vect-generic.cc (build_replicated_const): Rename
22975 to build_replicated_int_cst and move to tree.{h,cc}.
22976 (do_plus_minus): Adjust.
22977 (do_negate): Likewise.
22978 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
22979 arithmetic vector operations in lowered form.
22980 * tree.h (build_replicated_int_cst): Declare.
22981 * tree.cc (build_replicated_int_cst): Moved from
22982 tree-vect-generic.cc build_replicated_const.
22984 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22987 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
22988 (aarch64_rbit<mode><vczle><vczbe>): ... This.
22989 (neg<mode>2): Rename to...
22990 (neg<mode>2<vczle><vczbe>): ... This.
22991 (abs<mode>2): Rename to...
22992 (abs<mode>2<vczle><vczbe>): ... This.
22993 (aarch64_abs<mode>): Rename to...
22994 (aarch64_abs<mode><vczle><vczbe>): ... This.
22995 (one_cmpl<mode>2): Rename to...
22996 (one_cmpl<mode>2<vczle><vczbe>): ... This.
22997 (clrsb<mode>2): Rename to...
22998 (clrsb<mode>2<vczle><vczbe>): ... This.
22999 (clz<mode>2): Rename to...
23000 (clz<mode>2<vczle><vczbe>): ... This.
23001 (popcount<mode>2): Rename to...
23002 (popcount<mode>2<vczle><vczbe>): ... This.
23004 2023-04-28 Jakub Jelinek <jakub@redhat.com>
23006 * gimple-range-op.cc (class cfn_sqrt): New type.
23007 (op_cfn_sqrt): New variable.
23008 (gimple_range_op_handler::maybe_builtin_call): Handle
23009 CASE_CFN_SQRT{,_FN}.
23011 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
23012 Jakub Jelinek <jakub@redhat.com>
23014 * value-range.h (frange_nextafter): Declare.
23015 * gimple-range-op.cc (class cfn_sincos): New.
23016 (op_cfn_sin, op_cfn_cos): New variables.
23017 (gimple_range_op_handler::maybe_builtin_call): Handle
23018 CASE_CFN_{SIN,COS}{,_FN}.
23020 2023-04-28 Jakub Jelinek <jakub@redhat.com>
23022 * target.def (libm_function_max_error): New target hook.
23023 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
23024 * doc/tm.texi: Regenerated.
23025 * targhooks.h (default_libm_function_max_error,
23026 glibc_linux_libm_function_max_error): Declare.
23027 * targhooks.cc: Include case-cfn-macros.h.
23028 (default_libm_function_max_error,
23029 glibc_linux_libm_function_max_error): New functions.
23030 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
23031 * config/linux-protos.h (linux_libm_function_max_error): Declare.
23032 * config/linux.cc: Include target.h and targhooks.h.
23033 (linux_libm_function_max_error): New function.
23034 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
23035 (arc_libm_function_max_error): New function.
23036 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
23037 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
23038 (ix86_libm_function_max_error): New function.
23039 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
23040 * config/rs6000/rs6000-protos.h
23041 (rs6000_linux_libm_function_max_error): Declare.
23042 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
23043 and case-cfn-macros.h.
23044 (rs6000_linux_libm_function_max_error): New function.
23045 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
23046 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
23047 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
23048 (or1k_libm_function_max_error): New function.
23049 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
23051 2023-04-28 Alexandre Oliva <oliva@adacore.com>
23053 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
23054 Move detach value calls...
23055 (pass_harden_conditional_branches::execute): ... here.
23056 (pass_harden_compares::execute): Detach values before
23059 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
23061 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
23062 (cml<addsub_as><mode>4): Likewise.
23063 (vec_addsub<mode>3): Likewise.
23064 (cadd<rot><mode>3): Likewise.
23065 (vec_fmaddsub<mode>4): Likewise.
23066 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
23068 2023-04-27 Andrew Pinski <apinski@marvell.com>
23070 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
23071 up to 2 min/max expressions in the sequence/match code.
23073 2023-04-27 Andrew Pinski <apinski@marvell.com>
23075 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
23077 * tree-eh.cc (operation_could_trap_helper_p): Treate
23078 MIN_EXPR/MAX_EXPR similar as other comparisons.
23080 2023-04-27 Andrew Pinski <apinski@marvell.com>
23082 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
23084 (cond_if_else_store_replacement): Likewise.
23085 (get_non_trapping): Likewise.
23086 (store_elim_worker): Move into ...
23087 (pass_cselim::execute): This.
23089 2023-04-27 Andrew Pinski <apinski@marvell.com>
23091 * tree-ssa-phiopt.cc (two_value_replacement): Remove
23093 (match_simplify_replacement): Likewise.
23094 (factor_out_conditional_conversion): Likewise.
23095 (value_replacement): Likewise.
23096 (minmax_replacement): Likewise.
23097 (spaceship_replacement): Likewise.
23098 (cond_removal_in_builtin_zero_pattern): Likewise.
23099 (hoist_adjacent_loads): Likewise.
23100 (tree_ssa_phiopt_worker): Move into ...
23101 (pass_phiopt::execute): this.
23103 2023-04-27 Andrew Pinski <apinski@marvell.com>
23105 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
23106 do_store_elim argument and split that part out to ...
23107 (store_elim_worker): This new function.
23108 (pass_cselim::execute): Call store_elim_worker.
23109 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
23111 2023-04-27 Jan Hubicka <jh@suse.cz>
23113 * cfgloopmanip.h (unloop_loops): Export.
23114 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
23115 that no longer loop.
23116 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
23117 vectors of loops to unloop.
23118 (canonicalize_induction_variables): Free vectors here.
23119 (tree_unroll_loops_completely): Free vectors here.
23121 2023-04-27 Richard Biener <rguenther@suse.de>
23123 PR tree-optimization/109170
23124 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
23125 Handle __builtin_expect and similar via cfn_pass_through_arg1
23126 and inspecting the calls fnspec.
23127 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
23128 and BUILT_IN_EXPECT_WITH_PROBABILITY.
23130 2023-04-27 Alexandre Oliva <oliva@adacore.com>
23132 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
23134 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
23136 PR tree-optimization/109639
23137 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
23138 (propagate_vr_across_jump_function): Same.
23139 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
23140 * ipa-prop.h (ipa_range_set_and_normalize): New.
23141 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
23143 2023-04-27 Richard Biener <rguenther@suse.de>
23145 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
23146 create a CTOR operand in the result when simplifying GIMPLE.
23148 2023-04-27 Richard Biener <rguenther@suse.de>
23150 * gimplify.cc (gimplify_compound_lval): When the base
23151 gimplified to a register make sure to split up chains
23154 2023-04-27 Richard Biener <rguenther@suse.de>
23157 * ipa-param-manipulation.h
23158 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
23160 * ipa-param-manipulation.cc
23161 (ipa_param_body_adjustments::modify_expression): Likewise.
23162 When we need a conversion and the replacement is a register
23163 split the conversion out.
23164 (ipa_param_body_adjustments::modify_assignment): Pass
23165 extra_stmts to RHS modify_expression.
23167 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
23169 * doc/extend.texi (Zero Length): Describe example.
23171 2023-04-27 Richard Biener <rguenther@suse.de>
23173 PR tree-optimization/109594
23174 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
23175 what we rewrite to a register based on the above.
23177 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
23179 * config/riscv/riscv.cc: Fix whitespace.
23180 * config/riscv/sync.md: Fix whitespace.
23182 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
23184 PR tree-optimization/108697
23185 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
23186 not clear the vector on an out of range query.
23187 (ssa_cache::dump): Use dump_range_query instead of get_range.
23188 (ssa_cache::dump_range_query): New.
23189 (ssa_lazy_cache::dump_range_query): New.
23190 (ssa_lazy_cache::set_range): New.
23191 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
23192 (class ssa_lazy_cache): New.
23193 (ssa_lazy_cache::ssa_lazy_cache): New.
23194 (ssa_lazy_cache::~ssa_lazy_cache): New.
23195 (ssa_lazy_cache::get_range): New.
23196 (ssa_lazy_cache::clear_range): New.
23197 (ssa_lazy_cache::clear): New.
23198 (ssa_lazy_cache::dump): New.
23199 * gimple-range-path.cc (path_range_query::path_range_query): Do
23200 not allocate a ssa_cache object nor has_cache bitmap.
23201 (path_range_query::~path_range_query): Do not free objects.
23202 (path_range_query::clear_cache): Remove.
23203 (path_range_query::get_cache): Adjust.
23204 (path_range_query::set_cache): Remove.
23205 (path_range_query::dump): Don't call through a pointer.
23206 (path_range_query::internal_range_of_expr): Set cache directly.
23207 (path_range_query::reset_path): Clear cache directly.
23208 (path_range_query::ssa_range_in_phi): Fold with globals only.
23209 (path_range_query::compute_ranges_in_phis): Simply set range.
23210 (path_range_query::compute_ranges_in_block): Call cache directly.
23211 * gimple-range-path.h (class path_range_query): Replace bitmap
23212 and cache pointer with lazy cache object.
23213 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
23215 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
23217 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
23218 (ssa_cache::~ssa_cache): Rename.
23219 (ssa_cache::has_range): New.
23220 (ssa_cache::get_range): Rename.
23221 (ssa_cache::set_range): Rename.
23222 (ssa_cache::clear_range): Rename.
23223 (ssa_cache::clear): Rename.
23224 (ssa_cache::dump): Rename and use get_range.
23225 (ranger_cache::get_global_range): Use get_range and set_range.
23226 (ranger_cache::range_of_def): Use get_range.
23227 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
23228 (class ranger_cache): Use ssa_cache.
23229 * gimple-range-path.cc (path_range_query::path_range_query): Use
23231 (path_range_query::get_cache): Use get_range.
23232 (path_range_query::set_cache): Use set_range.
23233 * gimple-range-path.h (class path_range_query): Use ssa_cache.
23234 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
23235 (assume_query::range_of_expr): Use get_range.
23236 (assume_query::assume_query): Use set_range.
23237 (assume_query::calculate_op): Use get_range and set_range.
23238 * gimple-range.h (class assume_query): Use ssa_cache.
23240 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
23242 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
23243 and local to optionally zero memory.
23244 (br_vector::grow): Only zero memory if flag is set.
23245 (class sbr_lazy_vector): New.
23246 (sbr_lazy_vector::sbr_lazy_vector): New.
23247 (sbr_lazy_vector::set_bb_range): New.
23248 (sbr_lazy_vector::get_bb_range): New.
23249 (sbr_lazy_vector::bb_range_p): New.
23250 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
23251 * gimple-range-gori.cc (gori_map::calculate_gori): Use
23252 param_vrp_switch_limit.
23253 (gori_compute::gori_compute): Use param_vrp_switch_limit.
23254 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
23255 (vrp_switch_limit): Rename from evrp_switch_limit.
23256 (vrp_vector_threshold): New.
23258 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
23260 * value-relation.cc (dom_oracle::query_relation): Check early for lack
23262 * value-relation.h (equiv_oracle::has_equiv_p): New.
23264 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
23266 PR tree-optimization/109417
23267 * gimple-range-gori.cc (range_def_chain::register_dependency):
23268 Save the ssa version number, not the pointer.
23269 (gori_compute::may_recompute_p): No need to check if a dependency
23270 is in the free list.
23271 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
23272 fields to be unsigned int instead of trees.
23273 (ange_def_chain::depend1): Adjust.
23274 (ange_def_chain::depend2): Adjust.
23275 * gimple-range.h: Include "ssa.h" to inline ssa_name().
23277 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
23279 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
23280 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
23281 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
23283 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
23286 * config/riscv/riscv-protos.h: Add helper function stubs.
23287 * config/riscv/riscv.cc: Add helper functions for subword masking.
23288 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
23289 -mno-inline-atomics.
23290 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
23291 fetch_and_nand, CAS, and exchange ops.
23292 * doc/invoke.texi: Add blurb regarding new command-line flags
23293 -minline-atomics and -mno-inline-atomics.
23295 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23297 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
23298 Reimplement using standard RTL codes instead of unspec.
23299 (aarch64_rshrn2<mode>_insn_be): Likewise.
23300 (aarch64_rshrn2<mode>): Adjust for the above.
23301 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
23303 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23305 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
23306 with standard RTL codes instead of an UNSPEC.
23307 (aarch64_rshrn<mode>_insn_be): Likewise.
23308 (aarch64_rshrn<mode>): Adjust for the above.
23309 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
23311 2023-04-26 Pan Li <pan2.li@intel.com>
23312 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23314 * config/riscv/riscv.cc (riscv_classify_address): Allow
23315 const0_rtx for the RVV load/store.
23317 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23319 * range-op.cc (range_op_cast_tests): Remove legacy support.
23320 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
23321 * value-range.cc (irange::operator=): Same.
23322 (get_legacy_range): Same.
23323 (irange::copy_legacy_to_multi_range): Delete.
23324 (irange::copy_to_legacy): Delete.
23325 (irange::irange_set_anti_range): Delete.
23326 (irange::set): Remove legacy support.
23327 (irange::verify_range): Same.
23328 (irange::legacy_lower_bound): Delete.
23329 (irange::legacy_upper_bound): Delete.
23330 (irange::legacy_equal_p): Delete.
23331 (irange::operator==): Remove legacy support.
23332 (irange::singleton_p): Same.
23333 (irange::value_inside_range): Same.
23334 (irange::contains_p): Same.
23335 (intersect_ranges): Delete.
23336 (irange::legacy_intersect): Delete.
23337 (union_ranges): Delete.
23338 (irange::legacy_union): Delete.
23339 (irange::legacy_verbose_union_): Delete.
23340 (irange::legacy_verbose_intersect): Delete.
23341 (irange::irange_union): Remove legacy support.
23342 (irange::irange_intersect): Same.
23343 (irange::intersect): Same.
23344 (irange::invert): Same.
23345 (ranges_from_anti_range): Delete.
23346 (gt_pch_nx): Adjust for legacy removal.
23348 (range_tests_legacy): Delete.
23349 (range_tests_misc): Adjust for legacy removal.
23350 (range_tests): Same.
23351 * value-range.h (class irange): Same.
23352 (irange::legacy_mode_p): Delete.
23353 (ranges_from_anti_range): Delete.
23354 (irange::nonzero_p): Adjust for legacy removal.
23355 (irange::lower_bound): Same.
23356 (irange::upper_bound): Same.
23357 (irange::union_): Same.
23358 (irange::intersect): Same.
23359 (irange::set_nonzero): Same.
23360 (irange::set_zero): Same.
23361 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
23363 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23365 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
23366 of range_has_numeric_bounds_p with irange API.
23367 (range_has_numeric_bounds_p): Delete.
23368 * value-range.h (range_has_numeric_bounds_p): Delete.
23370 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23372 * tree-data-ref.cc (compute_distributive_range): Replace uses of
23373 range_int_cst_p with irange API.
23374 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
23375 * tree-vrp.h (range_int_cst_p): Delete.
23376 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
23377 range_int_cst_p with irange API.
23378 (vr_set_zero_nonzero_bits): Same.
23379 (range_fits_type_p): Same.
23380 (simplify_using_ranges::simplify_casted_cond): Same.
23381 * tree-vrp.cc (range_int_cst_p): Remove.
23383 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23385 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
23387 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23389 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
23390 API uses to new API.
23391 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
23392 * internal-fn.cc (get_min_precision): Same.
23394 * tree-affine.cc (expr_to_aff_combination): Same.
23395 * tree-data-ref.cc (dr_step_indicator): Same.
23396 * tree-dfa.cc (get_ref_base_and_extent): Same.
23397 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
23398 * tree-ssa-phiopt.cc (two_value_replacement): Same.
23399 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
23400 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
23401 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
23402 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
23403 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
23404 * tree.cc (get_range_pos_neg): Same.
23406 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23408 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
23409 vrange::dump instead of ad-hoc dumper.
23410 * tree-ssa-strlen.cc (dump_strlen_info): Same.
23411 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
23414 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23416 * range-op.cc (operator_cast::op1_range): Use
23417 create_possibly_reversed_range.
23418 (operator_bitwise_and::simple_op1_range_solver): Same.
23419 * value-range.cc (swap_out_of_order_endpoints): Delete.
23420 (irange::set): Remove call to swap_out_of_order_endpoints.
23422 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23424 * builtins.cc (determine_block_size): Convert use of legacy API to
23426 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
23427 (array_bounds_checker::check_array_ref): Same.
23428 * gimple-ssa-warn-restrict.cc
23429 (builtin_memref::extend_offset_range): Same.
23430 * ipa-cp.cc (ipcp_store_vr_results): Same.
23431 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
23432 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
23433 (ipa_write_jump_function): Same.
23434 * pointer-query.cc (get_size_range): Same.
23435 * tree-data-ref.cc (split_constant_offset): Same.
23436 * tree-ssa-strlen.cc (get_range): Same.
23437 (maybe_diag_stxncpy_trunc): Same.
23438 (strlen_pass::get_len_or_size): Same.
23439 (strlen_pass::count_nonzero_bytes_addr): Same.
23440 * tree-vect-patterns.cc (vect_get_range_info): Same.
23441 * value-range.cc (irange::maybe_anti_range): Remove.
23442 (get_legacy_range): New.
23443 (irange::copy_to_legacy): Use get_legacy_range.
23444 (ranges_from_anti_range): Same.
23445 * value-range.h (class irange): Remove maybe_anti_range.
23446 (get_legacy_range): New.
23447 * vr-values.cc (check_for_binary_op_overflow): Convert use of
23448 legacy API to get_legacy_range.
23449 (compare_ranges): Same.
23450 (compare_range_with_value): Same.
23451 (bounds_of_var_in_loop): Same.
23452 (find_case_label_ranges): Same.
23453 (simplify_using_ranges::simplify_switch_using_ranges): Same.
23455 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23457 * value-range-pretty-print.cc (vrange_printer::visit): Remove
23459 * value-range.cc (irange::constant_p): Remove.
23460 (irange::get_nonzero_bits_from_range): Remove constant_p use.
23461 * value-range.h (class irange): Remove constant_p.
23462 (irange::num_pairs): Remove constant_p use.
23464 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23466 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
23468 (irange::set): Same.
23469 (irange::legacy_lower_bound): Same.
23470 (irange::legacy_upper_bound): Same.
23471 (irange::contains_p): Same.
23472 (range_tests_legacy): Same.
23473 (irange::normalize_addresses): Remove.
23474 (irange::normalize_symbolics): Remove.
23475 (irange::symbolic_p): Remove.
23476 * value-range.h (class irange): Remove symbolic_p,
23477 normalize_symbolics, and normalize_addresses.
23478 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
23479 Remove symbolics support.
23481 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23483 * value-range.cc (irange::may_contain_p): Remove.
23484 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
23485 usage with contains_p.
23486 * vr-values.cc (compare_range_with_value): Same.
23488 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23490 * tree-vrp.cc (supported_types_p): Remove.
23491 (defined_ranges_p): Remove.
23492 (range_fold_binary_expr): Remove.
23493 (range_fold_unary_expr): Remove.
23494 * tree-vrp.h (range_fold_unary_expr): Remove.
23495 (range_fold_binary_expr): Remove.
23497 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23499 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
23500 (ipa_value_range_from_jfunc): Same.
23501 (propagate_vr_across_jump_function): Same.
23502 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
23503 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
23504 * vr-values.cc (bounds_of_var_in_loop): Same.
23506 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23508 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
23509 Add irange argument.
23510 (check_out_of_bounds_and_warn): Remove check for vr.
23511 (array_bounds_checker::check_array_ref): Remove pointer qualifier
23512 for vr and adjust accordingly.
23513 * gimple-array-bounds.h (get_value_range): Add irange argument.
23514 * value-query.cc (class equiv_allocator): Delete.
23515 (range_query::get_value_range): Delete.
23516 (range_query::range_query): Remove allocator access.
23517 (range_query::~range_query): Same.
23518 * value-query.h (get_value_range): Delete.
23520 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
23521 call to get_value_range.
23522 (check_for_binary_op_overflow): Same.
23523 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
23524 (simplify_using_ranges::simplify_abs_using_ranges): Same.
23525 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
23526 (simplify_using_ranges::simplify_casted_cond): Same.
23527 (simplify_using_ranges::simplify_switch_using_ranges): Same.
23528 (simplify_using_ranges::two_valued_val_range_p): Same.
23530 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23533 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
23535 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
23536 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
23537 (simplify_using_ranges::legacy_fold_cond): ...this.
23538 (simplify_using_ranges::fold_cond): Rename
23539 vrp_evaluate_conditional_warnv_with_ops to
23540 legacy_fold_cond_overflow.
23541 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
23542 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
23543 legacy_fold_cond_overflow respectively.
23545 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
23547 * vr-values.cc (get_vr_for_comparison): Remove.
23548 (compare_name_with_value): Same.
23549 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
23550 compare_name_with_value.
23551 * vr-values.h: Remove compare_name_with_value.
23552 Remove get_vr_for_comparison.
23554 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
23556 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
23557 (bswapsi2): New define_insn.
23558 (swaphi): New define_insn to exchange two registers (swpw).
23559 (define_peephole2): Recognize exchange of registers as swaphi.
23561 2023-04-26 Richard Biener <rguenther@suse.de>
23563 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
23565 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
23566 * predict.cc (apply_return_prediction): Likewise.
23567 * sese.cc (set_ifsese_condition): Likewise. Simplify.
23568 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
23569 (make_edges_bb): Likewise.
23570 (make_cond_expr_edges): Likewise.
23571 (end_recording_case_labels): Likewise.
23572 (make_gimple_asm_edges): Likewise.
23573 (cleanup_dead_labels): Likewise.
23574 (group_case_labels): Likewise.
23575 (gimple_can_merge_blocks_p): Likewise.
23576 (gimple_merge_blocks): Likewise.
23577 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
23578 (gimple_duplicate_sese_tail): Avoid last_stmt.
23579 (find_loop_dist_alias): Likewise.
23580 (gimple_block_ends_with_condjump_p): Likewise.
23581 (gimple_purge_dead_eh_edges): Likewise.
23582 (gimple_purge_dead_abnormal_call_edges): Likewise.
23583 (pass_warn_function_return::execute): Likewise.
23584 (execute_fixup_cfg): Likewise.
23585 * tree-eh.cc (redirect_eh_edge_1): Likewise.
23586 (pass_lower_resx::execute): Likewise.
23587 (pass_lower_eh_dispatch::execute): Likewise.
23588 (cleanup_empty_eh): Likewise.
23589 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
23590 (predicate_bbs): Likewise.
23591 (ifcvt_split_critical_edges): Likewise.
23592 * tree-loop-distribution.cc (create_edge_for_control_dependence):
23594 (loop_distribution::transform_reduction_loop): Likewise.
23595 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
23596 (try_transform_to_exit_first_loop_alt): Likewise.
23597 (transform_to_exit_first_loop): Likewise.
23598 (create_parallel_loop): Likewise.
23599 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
23600 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
23601 (eliminate_unnecessary_stmts): Likewise.
23603 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
23605 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
23606 (pass_tree_ifcombine::execute): Likewise.
23607 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
23608 (should_duplicate_loop_header_p): Likewise.
23609 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
23610 (tree_estimate_loop_size): Likewise.
23611 (try_unroll_loop_completely): Likewise.
23612 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
23613 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
23614 (canonicalize_loop_ivs): Likewise.
23615 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
23616 (bound_difference): Likewise.
23617 (number_of_iterations_popcount): Likewise.
23618 (number_of_iterations_cltz): Likewise.
23619 (number_of_iterations_cltz_complement): Likewise.
23620 (simplify_using_initial_conditions): Likewise.
23621 (number_of_iterations_exit_assumptions): Likewise.
23622 (loop_niter_by_eval): Likewise.
23623 (estimate_numbers_of_iterations): Likewise.
23625 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23627 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
23629 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
23632 * config/rs6000/rs6000-builtins.def
23633 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
23634 __builtin_vsx_scalar_cmp_exp_qp_lt,
23635 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
23638 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
23641 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
23642 easy_vector_constant with const_vector_each_byte_same, add
23643 handlings in preparation for !easy_vector_constant, and update
23644 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
23645 * config/rs6000/predicates.md (const_vector_each_byte_same): New
23648 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23650 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
23651 (*pred_ltge<mode>_merge_tie_mask): Ditto.
23652 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
23653 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
23654 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
23655 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
23656 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
23658 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23660 * config/riscv/vector.md: Fix redundant vmv1r.v.
23662 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23664 * config/riscv/vector.md: Fix RA constraint.
23666 2023-04-26 Pan Li <pan2.li@intel.com>
23669 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
23670 check for vn_reference equal.
23672 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23674 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
23675 auto-vectorization preference.
23676 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
23677 auto-vectorization.
23678 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
23680 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
23682 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
23683 and bclridisi_nottwobits patterns.
23684 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
23685 predicate to avoid splitting arith constants.
23686 (const_nottwobits_not_arith_operand): New predicate.
23688 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
23690 * recog.cc (peep2_attempt, peep2_update_life): Correct
23691 head-comment description of parameter match_len.
23693 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
23695 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
23696 riscv_split_symbol() drop in_splitter arg.
23697 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
23698 riscv_split_symbol() drop in_splitter arg.
23699 riscv_force_temporary() drop in_splitter arg.
23700 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
23701 riscv_split_symbol() drop in_splitter arg.
23703 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
23705 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
23706 superfluous debug temporaries for single GIMPLE assignments.
23708 2023-04-25 Richard Biener <rguenther@suse.de>
23710 PR tree-optimization/109609
23711 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
23713 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
23714 the size given by arg_max_access_size_given_by_arg_p as
23715 maximum, not exact, size.
23717 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23720 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
23721 (orn<mode>3<vczle><vczbe>): ... This.
23722 (bic<mode>3): Rename to...
23723 (bic<mode>3<vczle><vczbe>): ... This.
23724 (<su><maxmin><mode>3): Rename to...
23725 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
23727 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23729 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
23730 * config/aarch64/iterators.md (VQDIV): New mode iterator.
23731 (vnx2di): New mode attribute.
23733 2023-04-25 Richard Biener <rguenther@suse.de>
23735 PR rtl-optimization/109585
23736 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
23738 2023-04-25 Jakub Jelinek <jakub@redhat.com>
23741 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
23742 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
23743 is larger than signed int maximum.
23745 2023-04-25 Martin Liska <mliska@suse.cz>
23747 * doc/gcov.texi: Document the new "calls" field and document
23748 the API bump. Mention also "block_ids" for lines.
23749 * gcov.cc (output_intermediate_json_line): Output info about
23750 calls and extend branches as well.
23751 (generate_results): Bump version to 2.
23752 (output_line_details): Use block ID instead of a non-sensual
23755 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
23757 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
23758 length attribute for the first (memory operand) alternative.
23760 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
23762 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
23763 * config/aarch64/constraints.md: Make "Umn" relaxed memory
23765 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
23767 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
23769 * value-range.cc (frange::set): Adjust constructor.
23770 * value-range.h (nan_state::nan_state): Replace default
23771 constructor with one taking an argument.
23773 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
23775 * ipa-cp.cc (ipa_range_contains_p): New.
23776 (decide_whether_version_node): Use it.
23778 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
23780 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
23781 simplify two successive VEC_PERM_EXPRs with same VLA mask,
23782 where mask chooses elements in reverse order.
23784 2023-04-24 Andrew Pinski <apinski@marvell.com>
23786 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
23787 and support diamond shaped basic block form.
23788 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
23790 2023-04-24 Andrew Pinski <apinski@marvell.com>
23792 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
23793 Instead of calling last_and_only_stmt, look for the last statement
23796 2023-04-24 Andrew Pinski <apinski@marvell.com>
23798 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
23800 (match_simplify_replacement): Call
23801 empty_bb_or_one_feeding_into_p instead of doing it inline.
23803 2023-04-24 Andrew Pinski <apinski@marvell.com>
23805 PR tree-optimization/68894
23806 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
23807 continue for the do_hoist_loads diamond case.
23809 2023-04-24 Andrew Pinski <apinski@marvell.com>
23811 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
23812 code for better code readability.
23814 2023-04-24 Andrew Pinski <apinski@marvell.com>
23816 PR tree-optimization/109604
23817 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
23818 diamond form check from ...
23819 (minmax_replacement): Here.
23821 2023-04-24 Patrick Palka <ppalka@redhat.com>
23823 * tree.cc (strip_array_types): Don't define here.
23824 (is_typedef_decl): Don't define here.
23825 (typedef_variant_p): Don't define here.
23826 * tree.h (strip_array_types): Define here.
23827 (is_typedef_decl): Define here.
23828 (typedef_variant_p): Define here.
23830 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
23832 * doc/generic.texi (OpenMP): Add != to allowed
23833 conditions and state that vars can be unsigned.
23834 * tree.def (OMP_FOR): Likewise.
23836 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23838 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
23840 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
23842 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
23843 Remove explicit Solaris 11 references.
23845 (Options specification, --with-gnu-as): as and gas always differ
23847 Remove /usr/ccs/bin reference.
23848 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
23849 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
23850 (*-*-solaris2*): ... here.
23851 Update bundled GCC versions.
23852 Don't refer to pre-built binaries.
23853 Remove /bin/sh warning.
23854 Update assembler, linker recommendations.
23855 Document GNAT bootstrap compiler.
23856 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
23857 (sparc64-*-solaris2*): Move content...
23858 (sparcv9-*-solaris2*): ...here.
23859 Add GDC for 64-bit bootstrap compilers.
23861 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23864 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
23866 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
23869 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23871 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
23872 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
23873 (aarch64_<su>abal2<mode>): New define_expand.
23874 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
23875 (aarch64_rtx_costs): Handle ABD rtxes.
23876 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
23877 * config/aarch64/iterators.md (ABAL2): Delete.
23878 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
23880 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23882 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
23883 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
23884 (<sur>sadv16qi): Rename to...
23885 (<su>sadv16qi): ... This. Adjust for the above.
23886 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
23887 (<su>sad<vsi2qi>): ... This. Adjust for the above.
23888 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
23889 * config/aarch64/iterators.md (ABAL): Delete.
23890 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
23892 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23894 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
23895 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
23896 (aarch64_<su>abdl2<mode>): New define_expand.
23897 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
23898 * config/aarch64/iterators.md (ABDL2): Delete.
23899 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
23901 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23903 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
23904 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
23906 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
23907 * config/aarch64/iterators.md (ABDL): Delete.
23908 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
23910 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23912 * config/aarch64/aarch64-simd.md
23913 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
23915 2023-04-24 Richard Biener <rguenther@suse.de>
23917 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
23919 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
23921 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
23922 (set_switch_stmt_execution_predicate): Likewise.
23923 (phi_result_unknown_predicate): Likewise.
23924 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
23925 (ipa_analyze_indirect_call_uses): Likewise.
23926 * predict.cc (predict_iv_comparison): Likewise.
23927 (predict_extra_loop_exits): Likewise.
23928 (predict_loops): Likewise.
23929 (tree_predict_by_opcode): Likewise.
23930 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
23932 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
23933 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
23934 (replace_phi_edge_with_variable): Likewise.
23935 (two_value_replacement): Likewise.
23936 (value_replacement): Likewise.
23937 (minmax_replacement): Likewise.
23938 (spaceship_replacement): Likewise.
23939 (cond_removal_in_builtin_zero_pattern): Likewise.
23940 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
23941 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
23942 (vn_phi_lookup): Likewise.
23943 (vn_phi_insert): Likewise.
23944 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
23945 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
23947 (back_threader_profitability::possibly_profitable_path_p):
23949 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
23951 * tree-switch-conversion.cc (pass_convert_switch::execute):
23953 (pass_lower_switch<O0>::execute): Likewise.
23954 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
23955 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
23956 * tree-vect-slp.cc (vect_slp_function): Likewise.
23957 * tree-vect-stmts.cc (cfun_returns): Likewise.
23958 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
23959 (vect_loop_dist_alias_call): Likewise.
23961 2023-04-24 Richard Biener <rguenther@suse.de>
23963 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
23965 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23967 * config/riscv/riscv-vsetvl.cc
23968 (vector_infos_manager::all_avail_in_compatible_p): New function.
23969 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
23970 * config/riscv/riscv-vsetvl.h: New function.
23972 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23974 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
23975 comment for cleanup_insns.
23977 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23979 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
23980 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
23981 with the fault first load property.
23983 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23985 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
23986 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
23988 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23991 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
23992 (aarch64_addp<mode><vczle><vczbe>): ... This.
23994 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
23996 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
23997 provide reasonable values for common arithmetic operations and
23998 immediate operands (in several machine modes).
24000 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
24002 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
24003 format specifier to output high_part register name of SImode reg.
24004 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
24005 (zero_extendqihi2): Fix lengths, consistent formatting and add
24006 "and Rx,#255" alternative, for documentation purposes.
24007 (zero_extendhisi2): New define_insn.
24009 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
24011 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
24012 SImode shifts by two by performing a single bit SImode shift twice.
24014 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
24016 PR tree-optimization/109593
24017 * value-range.cc (frange::operator==): Handle NANs.
24019 2023-04-23 liuhongt <hongtao.liu@intel.com>
24021 PR rtl-optimization/108707
24022 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
24023 GENERAL_REGS when preferred reg_class is not known.
24025 2023-04-22 Andrew Pinski <apinski@marvell.com>
24027 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
24028 Change the code around slightly to move diamond
24029 handling for do_store_elim/do_hoist_loads out of
24032 2023-04-22 Andrew Pinski <apinski@marvell.com>
24034 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
24035 Remove check on empty_block_p.
24037 2023-04-22 Jakub Jelinek <jakub@redhat.com>
24039 PR bootstrap/109589
24040 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
24041 * realmpfr.h (class auto_mpfr): Likewise.
24043 2023-04-22 Jakub Jelinek <jakub@redhat.com>
24045 PR tree-optimization/109583
24046 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
24047 if vec_mode is not VECTOR_MODE_P.
24049 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
24050 Ondrej Kubanek <kubanek0ondrej@gmail.com>
24052 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
24053 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
24054 loop profile and bounds after header duplication.
24055 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
24056 Break out from try_peel_loop; fix handling of 0 iterations.
24057 (try_peel_loop): Use adjust_loop_info_after_peeling.
24059 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
24061 PR tree-optimization/109546
24062 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
24063 not fold conditions with ADDR_EXPR early.
24065 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24067 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
24068 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
24070 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
24071 (*aarch64_<optab><mode>3_zero): Define.
24072 (*aarch64_<optab><mode>3_cssc): Likewise.
24073 * config/aarch64/iterators.md (maxminand): New code attribute.
24075 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24078 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
24079 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
24081 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
24082 (aarch64_override_options_internal): Handle the above.
24083 (aarch64_output_load_tp): New function.
24084 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
24085 aarch64_output_load_tp.
24086 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
24087 (mtp=): New option.
24088 * doc/invoke.texi (AArch64 Options): Document -mtp=.
24090 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24093 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
24094 (add_vec_concat_subst_be): Likewise.
24097 (add<mode>3): Rename to...
24098 (add<mode>3<vczle><vczbe>): ... This.
24099 (sub<mode>3): Rename to...
24100 (sub<mode>3<vczle><vczbe>): ... This.
24101 (mul<mode>3): Rename to...
24102 (mul<mode>3<vczle><vczbe>): ... This.
24103 (and<mode>3): Rename to...
24104 (and<mode>3<vczle><vczbe>): ... This.
24105 (ior<mode>3): Rename to...
24106 (ior<mode>3<vczle><vczbe>): ... This.
24107 (xor<mode>3): Rename to...
24108 (xor<mode>3<vczle><vczbe>): ... This.
24109 * config/aarch64/iterators.md (VDZ): Define.
24111 2023-04-21 Patrick Palka <ppalka@redhat.com>
24113 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
24116 2023-04-21 Jan Hubicka <jh@suse.cz>
24118 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
24121 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
24123 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
24124 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
24126 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
24128 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
24129 force_reg instead of copy_to_mode_reg.
24130 (aarch64_expand_vector_init): Likewise.
24132 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
24134 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
24135 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
24136 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
24137 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
24138 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
24139 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
24140 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
24141 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
24142 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
24143 * config/i386/predicates.md (index_register_operand):
24144 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
24145 * config/i386/i386.cc (ix86_legitimate_address_p): Use
24146 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
24147 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
24149 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
24150 Ondrej Kubanek <kubanek0ondrej@gmail.com>
24152 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
24155 2023-04-21 Richard Biener <rguenther@suse.de>
24157 * is-a.h (safe_is_a): New.
24159 2023-04-21 Richard Biener <rguenther@suse.de>
24161 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
24162 (gphi_iterator::operator*): Likewise.
24164 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
24165 Michal Jires <michal@jires.eu>
24167 * ipa-inline.cc (class inline_badness): New class.
24168 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
24170 (update_edge_key): Update.
24171 (lookup_recursive_calls): Likewise.
24172 (recursive_inlining): Likewise.
24173 (add_new_edges_to_heap): Likewise.
24174 (inline_small_functions): Likewise.
24176 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
24178 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
24180 2023-04-21 Richard Biener <rguenther@suse.de>
24182 PR tree-optimization/109573
24183 * tree-vect-loop.cc (vectorizable_live_operation): Allow
24184 unhandled SSA copy as well. Demote assert to checking only.
24186 2023-04-21 Richard Biener <rguenther@suse.de>
24188 * df-core.cc (df_analyze): Compute RPO on the reverse graph
24189 for DF_BACKWARD problems.
24190 (loop_post_order_compute): Rename to ...
24191 (loop_rev_post_order_compute): ... this, compute a RPO.
24192 (loop_inverted_post_order_compute): Rename to ...
24193 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
24194 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
24195 problems, RPO on the inverted graph for DF_BACKWARD.
24197 2023-04-21 Richard Biener <rguenther@suse.de>
24199 * cfganal.h (inverted_rev_post_order_compute): Rename
24201 (inverted_post_order_compute): ... this. Add struct function
24202 argument, change allocation to a C array.
24203 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
24204 * lcm.cc (compute_antinout_edge): Adjust.
24205 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
24206 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
24207 * tree-ssa-pre.cc (compute_antic): Likewise.
24209 2023-04-21 Richard Biener <rguenther@suse.de>
24211 * df.h (df_d::postorder_inverted): Change back to int *,
24213 * df-core.cc (rest_of_handle_df_finish): Adjust.
24214 (df_analyze_1): Likewise.
24215 (df_analyze): For DF_FORWARD problems use RPO on the forward
24217 (loop_inverted_post_order_compute): Adjust API.
24218 (df_analyze_loop): Adjust.
24219 (df_get_n_blocks): Likewise.
24220 (df_get_postorder): Likewise.
24222 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24225 * config/riscv/riscv-vsetvl.cc
24226 (vector_infos_manager::all_empty_predecessor_p): New function.
24227 (pass_vsetvl::backward_demand_fusion): Ditto.
24228 * config/riscv/riscv-vsetvl.h: Ditto.
24230 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
24233 * config/riscv/generic.md: Change standard names to insn names.
24235 2023-04-21 Richard Biener <rguenther@suse.de>
24237 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
24238 (compute_laterin): Use RPO.
24239 (compute_available): Likewise.
24241 2023-04-21 Peng Fan <fanpeng@loongson.cn>
24243 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
24245 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24248 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
24249 (vector_insn_info::skip_avl_compatible_p): Ditto.
24250 (vector_insn_info::merge): Remove default value.
24251 (pass_vsetvl::compute_local_backward_infos): Ditto.
24252 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
24253 * config/riscv/riscv-vsetvl.h: Ditto.
24255 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
24257 * doc/extend.texi (Common Function Attributes): Remove duplicate
24260 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
24262 PR tree-optimization/109564
24263 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
24264 UNDEFINED range names when deciding if all PHI arguments are the same,
24266 2023-04-20 Jakub Jelinek <jakub@redhat.com>
24268 PR tree-optimization/109011
24269 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
24270 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
24271 .CTZ (X) = PREC - .POPCOUNT (X | -X).
24273 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
24275 * lra-constraints.cc (match_reload): Exclude some hard regs for
24276 multi-reg inout reload pseudos used in asm in different mode.
24278 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
24280 * config/arm/arm.cc (thumb1_legitimate_address_p):
24281 Use VIRTUAL_REGISTER_P predicate.
24282 (arm_eliminable_register): Ditto.
24283 * config/avr/avr.md (push<mode>_1): Ditto.
24284 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
24285 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
24286 * config/i386/predicates.md (register_no_elim_operand): Ditto.
24287 * config/iq2000/predicates.md (call_insn_operand): Ditto.
24288 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
24290 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
24293 * config/i386/predicates.md (extract_operator): New predicate.
24294 * config/i386/i386.md (any_extract): Remove code iterator.
24295 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
24296 (*cmpqi_ext<mode>_1): Ditto.
24297 (*cmpqi_ext<mode>_2): Ditto.
24298 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
24299 (*cmpqi_ext<mode>_3): Ditto.
24300 (*cmpqi_ext<mode>_4): Ditto.
24301 (*extzvqi_mem_rex64): Ditto.
24303 (*insvqi_2): Ditto.
24304 (*extendqi<SWI24:mode>_ext_1): Ditto.
24305 (*addqi_ext<mode>_0): Ditto.
24306 (*addqi_ext<mode>_1): Ditto.
24307 (*addqi_ext<mode>_2): Ditto.
24308 (*subqi_ext<mode>_0): Ditto.
24309 (*subqi_ext<mode>_2): Ditto.
24310 (*testqi_ext<mode>_1): Ditto.
24311 (*testqi_ext<mode>_2): Ditto.
24312 (*andqi_ext<mode>_0): Ditto.
24313 (*andqi_ext<mode>_1): Ditto.
24314 (*andqi_ext<mode>_1_cc): Ditto.
24315 (*andqi_ext<mode>_2): Ditto.
24316 (*<any_or:code>qi_ext<mode>_0): Ditto.
24317 (*<any_or:code>qi_ext<mode>_1): Ditto.
24318 (*<any_or:code>qi_ext<mode>_2): Ditto.
24319 (*xorqi_ext<mode>_1_cc): Ditto.
24320 (*negqi_ext<mode>_2): Ditto.
24321 (*ashlqi_ext<mode>_2): Ditto.
24322 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
24324 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
24327 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
24328 <bitmanip_insn> as the type to allow for fine grained control of
24329 scheduling these insns.
24330 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
24332 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
24333 pcnt, signed and unsigned min/max.
24335 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24336 kito-cheng <kito.cheng@sifive.com>
24338 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
24340 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24341 kito-cheng <kito.cheng@sifive.com>
24344 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
24345 (pass_vsetvl::cleanup_insns): Fix bug.
24347 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
24349 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
24350 (ldexp<mode>3): Delete.
24351 (ldexp<mode>3<exec>): Change "B" to "A".
24353 2023-04-20 Jakub Jelinek <jakub@redhat.com>
24354 Jonathan Wakely <jwakely@redhat.com>
24356 * tree.h (built_in_function_equal_p): New helper function.
24357 (fndecl_built_in_p): Turn into variadic template to support
24358 1 or more built_in_function arguments.
24359 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
24360 * gimplify.cc (goa_stabilize_expr): Likewise.
24361 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
24362 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
24363 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
24364 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
24365 cgraph_update_edges_for_call_stmt_node,
24366 cgraph_edge::verify_corresponds_to_fndecl,
24367 cgraph_node::verify_node): Likewise.
24368 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
24369 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
24370 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
24372 2023-04-20 Jakub Jelinek <jakub@redhat.com>
24374 PR tree-optimization/109011
24375 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
24376 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
24377 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
24378 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
24379 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
24381 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
24383 2023-04-20 Richard Biener <rguenther@suse.de>
24385 * df-core.cc (rest_of_handle_df_initialize): Remove
24386 computation of df->postorder, df->postorder_inverted and
24389 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
24391 * common/config/i386/i386-common.cc
24392 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
24393 (ix86_handle_option): Set AVX flag for VAES.
24394 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
24395 Add OPTION_MASK_ISA2_VAES_UNSET.
24396 (def_builtin): Share builtin between AES and VAES.
24397 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
24399 * config/i386/i386.md (aes): New isa attribute.
24400 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
24401 (aesenclast): Ditto.
24403 (aesdeclast): Ditto.
24404 * config/i386/vaesintrin.h: Remove redundant avx target push.
24405 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
24406 (_mm_aesdeclast_si128): Ditto.
24407 (_mm_aesenc_si128): Ditto.
24408 (_mm_aesenclast_si128): Ditto.
24410 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
24412 * config/i386/avx2intrin.h
24413 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
24414 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
24415 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
24416 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
24417 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
24418 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
24419 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
24420 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
24421 (_mm_reduce_add_epi16): New instrinsics.
24422 (_mm_reduce_mul_epi16): Ditto.
24423 (_mm_reduce_and_epi16): Ditto.
24424 (_mm_reduce_or_epi16): Ditto.
24425 (_mm_reduce_max_epi16): Ditto.
24426 (_mm_reduce_max_epu16): Ditto.
24427 (_mm_reduce_min_epi16): Ditto.
24428 (_mm_reduce_min_epu16): Ditto.
24429 (_mm256_reduce_add_epi16): Ditto.
24430 (_mm256_reduce_mul_epi16): Ditto.
24431 (_mm256_reduce_and_epi16): Ditto.
24432 (_mm256_reduce_or_epi16): Ditto.
24433 (_mm256_reduce_max_epi16): Ditto.
24434 (_mm256_reduce_max_epu16): Ditto.
24435 (_mm256_reduce_min_epi16): Ditto.
24436 (_mm256_reduce_min_epu16): Ditto.
24437 (_mm_reduce_add_epi8): Ditto.
24438 (_mm_reduce_mul_epi8): Ditto.
24439 (_mm_reduce_and_epi8): Ditto.
24440 (_mm_reduce_or_epi8): Ditto.
24441 (_mm_reduce_max_epi8): Ditto.
24442 (_mm_reduce_max_epu8): Ditto.
24443 (_mm_reduce_min_epi8): Ditto.
24444 (_mm_reduce_min_epu8): Ditto.
24445 (_mm256_reduce_add_epi8): Ditto.
24446 (_mm256_reduce_mul_epi8): Ditto.
24447 (_mm256_reduce_and_epi8): Ditto.
24448 (_mm256_reduce_or_epi8): Ditto.
24449 (_mm256_reduce_max_epi8): Ditto.
24450 (_mm256_reduce_max_epu8): Ditto.
24451 (_mm256_reduce_min_epi8): Ditto.
24452 (_mm256_reduce_min_epu8): Ditto.
24453 * config/i386/avx512vlbwintrin.h:
24454 (_mm_mask_reduce_add_epi16): Ditto.
24455 (_mm_mask_reduce_mul_epi16): Ditto.
24456 (_mm_mask_reduce_and_epi16): Ditto.
24457 (_mm_mask_reduce_or_epi16): Ditto.
24458 (_mm_mask_reduce_max_epi16): Ditto.
24459 (_mm_mask_reduce_max_epu16): Ditto.
24460 (_mm_mask_reduce_min_epi16): Ditto.
24461 (_mm_mask_reduce_min_epu16): Ditto.
24462 (_mm256_mask_reduce_add_epi16): Ditto.
24463 (_mm256_mask_reduce_mul_epi16): Ditto.
24464 (_mm256_mask_reduce_and_epi16): Ditto.
24465 (_mm256_mask_reduce_or_epi16): Ditto.
24466 (_mm256_mask_reduce_max_epi16): Ditto.
24467 (_mm256_mask_reduce_max_epu16): Ditto.
24468 (_mm256_mask_reduce_min_epi16): Ditto.
24469 (_mm256_mask_reduce_min_epu16): Ditto.
24470 (_mm_mask_reduce_add_epi8): Ditto.
24471 (_mm_mask_reduce_mul_epi8): Ditto.
24472 (_mm_mask_reduce_and_epi8): Ditto.
24473 (_mm_mask_reduce_or_epi8): Ditto.
24474 (_mm_mask_reduce_max_epi8): Ditto.
24475 (_mm_mask_reduce_max_epu8): Ditto.
24476 (_mm_mask_reduce_min_epi8): Ditto.
24477 (_mm_mask_reduce_min_epu8): Ditto.
24478 (_mm256_mask_reduce_add_epi8): Ditto.
24479 (_mm256_mask_reduce_mul_epi8): Ditto.
24480 (_mm256_mask_reduce_and_epi8): Ditto.
24481 (_mm256_mask_reduce_or_epi8): Ditto.
24482 (_mm256_mask_reduce_max_epi8): Ditto.
24483 (_mm256_mask_reduce_max_epu8): Ditto.
24484 (_mm256_mask_reduce_min_epi8): Ditto.
24485 (_mm256_mask_reduce_min_epu8): Ditto.
24487 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
24489 * common/config/i386/i386-common.cc
24490 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
24491 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
24492 (OPTION_MASK_ISA_AVX_UNSET):
24493 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
24494 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
24495 * config/i386/i386.md (vpclmulqdqvl): New.
24496 * config/i386/sse.md (pclmulqdq): Add evex encoding.
24497 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
24500 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
24502 * config/i386/avx512vlbwintrin.h
24503 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
24504 (_mm_mask_blend_epi8): Ditto.
24505 (_mm256_mask_blend_epi16): Ditto.
24506 (_mm256_mask_blend_epi8): Ditto.
24507 * config/i386/avx512vlintrin.h
24508 (_mm256_mask_blend_pd): Ditto.
24509 (_mm256_mask_blend_ps): Ditto.
24510 (_mm256_mask_blend_epi64): Ditto.
24511 (_mm256_mask_blend_epi32): Ditto.
24512 (_mm_mask_blend_pd): Ditto.
24513 (_mm_mask_blend_ps): Ditto.
24514 (_mm_mask_blend_epi64): Ditto.
24515 (_mm_mask_blend_epi32): Ditto.
24516 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
24517 (VF_AVX512HFBFVL): Move it before the first usage.
24518 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
24519 to VF_AVX512HFBFVL.
24521 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
24523 * common/config/i386/i386-common.cc
24524 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
24525 to OPTION_MASK_ISA_AVX512BW_SET.
24526 (OPTION_MASK_ISA_AVX512F_UNSET):
24527 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
24528 (OPTION_MASK_ISA_AVX512BW_UNSET):
24529 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
24530 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
24531 * config/i386/avx512vbmi2vlintrin.h: Ditto.
24532 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
24533 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
24534 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
24535 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
24537 (compressstore<mode>_mask): Ditto.
24538 (expand<mode>_mask): Ditto.
24539 (expand<mode>_maskz): Ditto.
24540 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
24541 VI12_VI48F_AVX512VL.
24543 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
24545 * common/config/i386/i386-common.cc
24546 (OPTION_MASK_ISA_AVX512BITALG_SET):
24547 Change OPTION_MASK_ISA_AVX512F_SET
24548 to OPTION_MASK_ISA_AVX512BW_SET.
24549 (OPTION_MASK_ISA_AVX512F_UNSET):
24550 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
24551 (OPTION_MASK_ISA_AVX512BW_UNSET):
24552 Add OPTION_MASK_ISA_AVX512BITALG_SET.
24553 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
24554 * config/i386/i386-builtin.def:
24555 Remove redundant OPTION_MASK_ISA_AVX512BW.
24556 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
24557 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
24558 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
24560 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
24562 * config/i386/i386-expand.cc
24563 (ix86_check_builtin_isa_match): Correct wrong comments.
24564 Add a new macro SHARE_BUILTIN and refactor the current if
24567 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
24569 * config/i386/cpuid.h: Open a new section for Extended Features
24570 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
24573 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
24575 * config/i386/sse.md: Modify insn vperm{i,f}
24578 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
24580 * config/xtensa/xtensa-opts.h: New header.
24581 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
24582 xtensa_strict_align.
24583 * config/xtensa/xtensa.cc (xtensa_option_override): When
24584 -m[no-]strict-align is not specified in the command line set
24585 xtensa_strict_align to 0 if the hardware supports both unaligned
24586 loads and stores or to 1 otherwise.
24587 * config/xtensa/xtensa.opt (mstrict-align): New option.
24588 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
24590 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
24592 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
24595 2023-04-19 Andrew Pinski <apinski@marvell.com>
24597 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
24599 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24601 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
24602 (VECTOR_BOOL_MODE): Ditto.
24603 (ADJUST_NUNITS): Ditto.
24604 (ADJUST_ALIGNMENT): Ditto.
24605 (ADJUST_BYTESIZE): Ditto.
24606 (ADJUST_PRECISION): Ditto.
24607 (RVV_MODES): Ditto.
24608 (VECTOR_MODE_WITH_PREFIX): Ditto.
24609 * config/riscv/riscv-v.cc (ENTRY): Ditto.
24610 (get_vlmul): Ditto.
24611 (get_ratio): Ditto.
24612 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
24613 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
24614 (vbool64_t): Ditto.
24615 (vbool32_t): Ditto.
24616 (vbool16_t): Ditto.
24621 (vint8mf8_t): Ditto.
24622 (vuint8mf8_t): Ditto.
24623 (vint8mf4_t): Ditto.
24624 (vuint8mf4_t): Ditto.
24625 (vint8mf2_t): Ditto.
24626 (vuint8mf2_t): Ditto.
24627 (vint8m1_t): Ditto.
24628 (vuint8m1_t): Ditto.
24629 (vint8m2_t): Ditto.
24630 (vuint8m2_t): Ditto.
24631 (vint8m4_t): Ditto.
24632 (vuint8m4_t): Ditto.
24633 (vint8m8_t): Ditto.
24634 (vuint8m8_t): Ditto.
24635 (vint16mf4_t): Ditto.
24636 (vuint16mf4_t): Ditto.
24637 (vint16mf2_t): Ditto.
24638 (vuint16mf2_t): Ditto.
24639 (vint16m1_t): Ditto.
24640 (vuint16m1_t): Ditto.
24641 (vint16m2_t): Ditto.
24642 (vuint16m2_t): Ditto.
24643 (vint16m4_t): Ditto.
24644 (vuint16m4_t): Ditto.
24645 (vint16m8_t): Ditto.
24646 (vuint16m8_t): Ditto.
24647 (vint32mf2_t): Ditto.
24648 (vuint32mf2_t): Ditto.
24649 (vint32m1_t): Ditto.
24650 (vuint32m1_t): Ditto.
24651 (vint32m2_t): Ditto.
24652 (vuint32m2_t): Ditto.
24653 (vint32m4_t): Ditto.
24654 (vuint32m4_t): Ditto.
24655 (vint32m8_t): Ditto.
24656 (vuint32m8_t): Ditto.
24657 (vint64m1_t): Ditto.
24658 (vuint64m1_t): Ditto.
24659 (vint64m2_t): Ditto.
24660 (vuint64m2_t): Ditto.
24661 (vint64m4_t): Ditto.
24662 (vuint64m4_t): Ditto.
24663 (vint64m8_t): Ditto.
24664 (vuint64m8_t): Ditto.
24665 (vfloat32mf2_t): Ditto.
24666 (vfloat32m1_t): Ditto.
24667 (vfloat32m2_t): Ditto.
24668 (vfloat32m4_t): Ditto.
24669 (vfloat32m8_t): Ditto.
24670 (vfloat64m1_t): Ditto.
24671 (vfloat64m2_t): Ditto.
24672 (vfloat64m4_t): Ditto.
24673 (vfloat64m8_t): Ditto.
24674 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
24675 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
24676 (riscv_convert_vector_bits): Ditto.
24677 * config/riscv/riscv.md:
24678 * config/riscv/vector-iterators.md:
24679 * config/riscv/vector.md
24680 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
24681 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
24682 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
24683 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
24684 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
24685 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
24686 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
24687 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
24688 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
24690 2023-04-19 Pan Li <pan2.li@intel.com>
24692 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
24693 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
24695 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
24699 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
24700 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
24701 for operand 0. Use any_extract code iterator.
24702 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
24703 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
24704 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
24705 (*cmpqi_ext<mode>_1): Use general_operand predicate
24706 for operand 1. Use any_extract code iterator.
24707 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
24708 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
24710 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24712 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
24713 (aarch64_uaddw2<mode>): Delete.
24714 (aarch64_ssubw2<mode>): Delete.
24715 (aarch64_usubw2<mode>): Delete.
24716 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
24718 2023-04-19 Richard Biener <rguenther@suse.de>
24720 * tree-ssa-structalias.cc (do_ds_constraint): Use
24721 solve_add_graph_edge.
24723 2023-04-19 Richard Biener <rguenther@suse.de>
24725 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
24727 (do_sd_constraint): ... here.
24729 2023-04-19 Richard Biener <rguenther@suse.de>
24731 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
24732 rejecting the merge when A contains only a non-local label.
24734 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
24736 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
24737 (VIRTUAL_REGISTER_NUM_P): Ditto.
24738 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
24739 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
24740 * function.cc (instantiate_decl_rtl): Ditto.
24741 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
24742 (nonzero_address_p): Ditto.
24743 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
24745 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
24747 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
24749 2023-04-19 Richard Biener <rguenther@suse.de>
24751 * system.h (auto_mpz::operator->()): New.
24752 * realmpfr.h (auto_mpfr::operator->()): New.
24753 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
24754 * real.cc (real_from_string): Likewise.
24755 (dconst_e_ptr): Likewise.
24756 (dconst_sqrt2_ptr): Likewise.
24757 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
24759 (bound_difference_of_offsetted_base): Likewise.
24760 (number_of_iterations_ne): Likewise.
24761 (number_of_iterations_lt_to_ne): Likewise.
24762 * ubsan.cc: Include realmpfr.h.
24763 (ubsan_instrument_float_cast): Use auto_mpfr.
24765 2023-04-19 Richard Biener <rguenther@suse.de>
24767 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
24768 edges, remove edges from escaped after special-casing them.
24770 2023-04-19 Richard Biener <rguenther@suse.de>
24772 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
24775 2023-04-19 Richard Biener <rguenther@suse.de>
24777 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
24778 to the LHS varinfo solution member.
24780 2023-04-19 Richard Biener <rguenther@suse.de>
24782 * tree-ssa-structalias.cc (topo_visit): Look at the real
24783 destination of edges.
24785 2023-04-19 Richard Biener <rguenther@suse.de>
24787 PR tree-optimization/44794
24788 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
24789 If an epilogue loop is required set its iteration upper bound.
24791 2023-04-19 Xi Ruoyao <xry111@xry111.site>
24794 * config/loongarch/loongarch-protos.h
24795 (loongarch_expand_block_move): Add a parameter as alignment RTX.
24796 * config/loongarch/loongarch.h:
24797 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
24798 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
24799 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
24800 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
24801 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
24802 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
24803 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
24804 Take the alignment from the parameter, but set it to
24805 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
24806 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
24807 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
24808 (loongarch_block_move_straight): When there are left-over bytes,
24809 half the mode size instead of falling back to byte mode at once.
24810 (loongarch_block_move_loop): Limit the length of loop body with
24811 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
24812 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
24813 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
24814 to loongarch_expand_block_move.
24816 2023-04-19 Xi Ruoyao <xry111@xry111.site>
24818 * config/loongarch/loongarch.cc
24819 (loongarch_setup_incoming_varargs): Don't save more GARs than
24820 cfun->va_list_gpr_size / UNITS_PER_WORD.
24822 2023-04-19 Richard Biener <rguenther@suse.de>
24824 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
24825 no epilogue condition.
24827 2023-04-19 Richard Biener <rguenther@suse.de>
24829 * gimple.h (gimple_assign_load): Outline...
24830 * gimple.cc (gimple_assign_load): ... here. Avoid
24831 get_base_address and instead just strip the outermost
24832 handled component, treating a remaining handled component
24835 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24837 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
24839 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
24841 2023-04-19 Jakub Jelinek <jakub@redhat.com>
24843 PR tree-optimization/109011
24844 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
24845 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
24846 CLZ, CTZ and FFS. Remove vargs variable, use
24847 gimple_build_call_internal rather than gimple_build_call_internal_vec.
24848 (vect_vect_recog_func_ptrs): Adjust popcount entry.
24850 2023-04-19 Jakub Jelinek <jakub@redhat.com>
24853 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
24854 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
24855 a new REG rather than the SUBREG.
24857 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
24859 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
24862 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24865 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
24866 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
24868 2023-04-19 Richard Biener <rguenther@suse.de>
24870 PR rtl-optimization/109237
24871 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
24872 TREE_VISITED on INSN_VAR_LOCATION_DECL.
24873 (delete_trivially_dead_insns): Maintain TREE_VISITED on
24874 active debug bind INSN_VAR_LOCATION_DECL.
24876 2023-04-19 Richard Biener <rguenther@suse.de>
24878 PR rtl-optimization/109237
24879 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
24881 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
24883 * doc/install.texi (enable-decimal-float): Add AArch64.
24885 2023-04-19 liuhongt <hongtao.liu@intel.com>
24887 PR rtl-optimization/109351
24888 * ira.cc (setup_class_subset_and_memory_move_costs): Check
24889 hard_regno_mode_ok before setting lowest memory move cost for
24890 the mode with different reg classes.
24892 2023-04-18 Jason Merrill <jason@redhat.com>
24894 * doc/invoke.texi: Remove stray @gol.
24896 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
24898 * ifcvt.cc (cond_move_process_if_block): Consider the result of
24899 targetm.noce_conversion_profitable_p() when replacing the original
24900 sequence with the converted one.
24902 2023-04-18 Mark Harmstone <mark@harmstone.com>
24904 * common.opt (gcodeview): Add new option.
24905 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
24906 * opts.cc (command_handle_option): Similarly.
24907 * doc/invoke.texi: Add documentation for -gcodeview.
24909 2023-04-18 Andrew Pinski <apinski@marvell.com>
24911 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
24912 (make_pass_phiopt): Make execute out of line.
24913 (tree_ssa_cs_elim): Move code into ...
24914 (pass_cselim::execute): here.
24916 2023-04-18 Sam James <sam@gentoo.org>
24918 * system.h: Drop unused INCLUDE_PTHREAD_H.
24920 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
24922 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
24925 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
24927 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
24928 (bswapdi2, bswapsi2): Similarly.
24930 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
24933 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
24934 Use CODE_FOR_sse4_1_insertps_v4sf.
24935 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
24936 (expand_vec_perm_1): Call expand_vec_per_insertps.
24937 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
24938 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
24939 (@sse4_1_insertps_<mode>): New insn pattern.
24940 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
24941 pattern from sse4_1_insertps using VI4F_128 mode iterator.
24943 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
24945 * value-range.cc (gt_ggc_mx): New.
24947 * value-range.h (class vrange): Add GTY marker.
24948 (class frange): Same.
24949 (gt_ggc_mx): Remove.
24950 (gt_pch_nx): Remove.
24952 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
24954 * lra-constraints.cc (constraint_unique): New.
24955 (process_address_1): Apply constraint_unique test.
24956 * recog.cc (constrain_operands): Allow relaxed memory
24959 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
24961 * doc/extend.texi (Target Builtins): Add RISC-V Vector
24963 (RISC-V Vector Intrinsics): Document GCC implemented which
24964 version of RISC-V vector intrinsics and its reference.
24966 2023-04-18 Richard Biener <rguenther@suse.de>
24968 PR middle-end/108786
24969 * bitmap.h (bitmap_clear_first_set_bit): New.
24970 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
24971 bitmap_first_set_bit and add optional clearing of the bit.
24972 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
24973 (bitmap_clear_first_set_bit): Likewise.
24974 * df-core.cc (df_worklist_dataflow_doublequeue): Use
24975 bitmap_clear_first_set_bit.
24976 * graphite-scop-detection.cc (scop_detection::merge_sese):
24978 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
24979 (sanitize_asan_mark_poison): Likewise.
24980 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
24981 * tree-into-ssa.cc (rewrite_blocks): Likewise.
24982 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
24983 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
24985 2023-04-18 Richard Biener <rguenther@suse.de>
24987 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
24988 (dump_sa_points_to_info): ... this function.
24989 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
24990 and call dump_sa_stats guarded with TDF_STATS.
24991 (ipa_pta_execute): Likewise.
24992 (compute_may_aliases): Guard dump_alias_info with
24993 TDF_DETAILS|TDF_ALIAS.
24995 2023-04-18 Andrew Pinski <apinski@marvell.com>
24997 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
24998 the expression that is being tried when TDF_FOLDING
25000 (phiopt_worker::match_simplify_replacement): Dump
25001 the sequence which was created by gimple_simplify_phiopt
25002 when TDF_FOLDING is true.
25004 2023-04-18 Andrew Pinski <apinski@marvell.com>
25006 * tree-ssa-phiopt.cc (match_simplify_replacement):
25007 Simplify code that does the movement slightly.
25009 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25011 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
25013 (rev16<mode>2): Rename to...
25014 (aarch64_rev16<mode>2_alt1): ... This.
25015 (rev16<mode>2_alt): Rename to...
25016 (*aarch64_rev16<mode>2_alt2): ... This.
25018 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
25020 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
25021 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
25023 * range-op-float.cc (zero_range): Use dconstm0.
25024 (zero_to_inf_range): Same.
25025 * real.h (dconstm0): New.
25026 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
25027 (frange::set_zero): Do not declare dconstm0.
25029 2023-04-18 Richard Biener <rguenther@suse.de>
25031 * system.h (class auto_mpz): New,
25032 * realmpfr.h (class auto_mpfr): Likewise.
25033 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
25034 (do_mpfr_arg2): Likewise.
25035 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
25037 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25039 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
25040 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
25042 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
25044 * value-range.cc (frange::operator==): Adjust for NAN.
25045 (range_tests_nan): Remove some NAN tests.
25047 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
25049 * inchash.cc (hash::add_real_value): New.
25050 * inchash.h (class hash): Add add_real_value.
25051 * value-range.cc (add_vrange): New.
25052 * value-range.h (inchash::add_vrange): New.
25054 2023-04-18 Richard Biener <rguenther@suse.de>
25056 PR tree-optimization/109539
25057 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
25058 Re-implement pointer relatedness for PHIs.
25060 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
25062 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
25063 (SV_FP): New iterator.
25064 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
25065 (recip<mode>2): Unify the two patterns using SV_FP.
25066 (div_scale<mode><exec_vcc>): New insn.
25067 (div_fmas<mode><exec>): New insn.
25068 (div_fixup<mode><exec>): New insn.
25069 (div<mode>3): Unify the two expanders and rewrite using hardfp.
25070 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
25071 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
25072 and UNSPEC_DIV_FIXUP.
25073 (vccwait): New attribute.
25075 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25077 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
25078 if the argument matches that.
25080 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25082 * config/aarch64/atomics.md
25083 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
25084 Use SD_HSDI for destination mode iterator.
25086 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
25088 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
25089 of z-extensions and s-extensions.
25090 (riscv_subset_list::parse): Likewise.
25092 2023-04-18 Jakub Jelinek <jakub@redhat.com>
25094 PR tree-optimization/109240
25095 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
25096 first vec_perm operand and minus as second using fneg/fadd and
25097 minus as first vec_perm operand and plus as second using fneg/fsub.
25099 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
25101 * data-streamer.cc (bp_pack_real_value): New.
25102 (bp_unpack_real_value): New.
25103 * data-streamer.h (bp_pack_real_value): New.
25104 (bp_unpack_real_value): New.
25105 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
25106 bp_unpack_real_value.
25107 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
25108 bp_pack_real_value.
25110 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
25112 * wide-int.h (WIDE_INT_MAX_HWIS): New.
25113 (class fixed_wide_int_storage): Use it.
25114 (trailing_wide_ints <N>::set_precision): Use it.
25115 (trailing_wide_ints <N>::extra_size): Use it.
25117 2023-04-18 Xi Ruoyao <xry111@xry111.site>
25119 * config/loongarch/loongarch-protos.h
25120 (loongarch_addu16i_imm12_operand_p): New function prototype.
25121 (loongarch_split_plus_constant): Likewise.
25122 * config/loongarch/loongarch.cc
25123 (loongarch_addu16i_imm12_operand_p): New function.
25124 (loongarch_split_plus_constant): Likewise.
25125 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
25126 (DUAL_IMM12_OPERAND): Likewise.
25127 (DUAL_ADDU16I_OPERAND): Likewise.
25128 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
25130 * config/loongarch/predicates.md (const_dual_imm12_operand): New
25132 (const_addu16i_operand): Likewise.
25133 (const_addu16i_imm12_di_operand): Likewise.
25134 (const_addu16i_imm12_si_operand): Likewise.
25135 (plus_di_operand): Likewise.
25136 (plus_si_operand): Likewise.
25137 (plus_si_extend_operand): Likewise.
25138 * config/loongarch/loongarch.md (add<mode>3): Convert to
25139 define_insn_and_split. Use plus_<mode>_operand predicate
25140 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
25141 and Le constraints.
25142 (*addsi3_extended): Convert to define_insn_and_split. Use
25143 plus_si_extend_operand instead of arith_operand. Add
25144 alternatives for La and Le alternatives.
25146 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
25148 * value-range.h (Value_Range::Value_Range): New.
25149 (Value_Range::contains_p): New.
25151 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
25153 * value-range.h (class vrange): Make m_discriminator const.
25154 (class irange): Make m_max_ranges const. Adjust constructors
25156 (class unsupported_range): Construct vrange appropriately.
25157 (class frange): Same.
25159 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
25161 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
25164 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
25166 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
25168 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
25170 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
25172 (riscv_expand_epilogue): Likewise.
25174 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
25176 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
25178 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
25180 2023-04-17 Andrew Pinski <apinski@marvell.com>
25182 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
25185 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
25187 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
25190 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
25192 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
25193 parameter remaining_size.
25194 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
25195 (riscv_expand_prologue): Likewise.
25196 (riscv_expand_epilogue): Likewise.
25198 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
25200 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
25201 roriw for constant counts.
25202 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
25203 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
25204 (simplify_context::simplify_binary_operation_1): Use it.
25205 * expmed.cc (expand_shift_1): Likewise.
25207 2023-04-17 Martin Jambor <mjambor@suse.cz>
25211 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
25212 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
25213 (ipa_zap_jf_refdesc): New function.
25214 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
25215 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
25216 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
25217 the new parameter of find_reference.
25218 (adjust_references_in_caller): Likewise. Make sure the constant jump
25219 function is not used to decrement a refdec counter again. Only
25220 decrement refdesc counters when the pass_through jump function allows
25221 it. Added a detailed dump when decrementing refdesc counters.
25222 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
25223 (ipa_set_jf_simple_pass_through): Initialize the new flag.
25224 (ipa_set_jf_unary_pass_through): Likewise.
25225 (ipa_set_jf_arith_pass_through): Likewise.
25226 (remove_described_reference): Provide a value for the new parameter of
25228 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
25229 the previous pass_through had a flag mandating that we do so.
25230 (propagate_controlled_uses): Likewise. Only decrement refdesc
25231 counters when the pass_through jump function allows it.
25232 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
25233 parameter of find_reference.
25234 (ipa_write_jump_function): Assert the new flag does not have to be
25236 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
25239 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
25240 Di Zhao <di.zhao@amperecomputing.com>
25242 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
25243 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
25244 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
25245 Check for the above tuning option when processing loads.
25247 2023-04-17 Richard Biener <rguenther@suse.de>
25249 PR tree-optimization/109524
25250 * tree-vrp.cc (remove_unreachable::m_list): Change to a
25251 vector of pairs of block indices.
25252 (remove_unreachable::maybe_register_block): Adjust.
25253 (remove_unreachable::remove_and_update_globals): Likewise.
25254 Deal with removed blocks.
25256 2023-04-16 Jeff Law <jlaw@ventanamicro>
25259 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
25260 TARGET_SFB_ALU, force the true arm into a register.
25262 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
25265 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
25266 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
25268 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
25269 (pa_function_arg_size): Change return type to int. Return zero
25270 for arguments larger than 1 GB. Update comments.
25272 2023-04-15 Jakub Jelinek <jakub@redhat.com>
25274 PR tree-optimization/109154
25275 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
25276 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
25278 2023-04-15 Jason Merrill <jason@redhat.com>
25281 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
25282 Overhaul lhs_ref.ref analysis.
25284 2023-04-14 Richard Biener <rguenther@suse.de>
25286 PR tree-optimization/109502
25287 * tree-vect-stmts.cc (vectorizable_assignment): Fix
25288 check for conversion between mask and non-mask types.
25290 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
25291 Jakub Jelinek <jakub@redhat.com>
25295 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
25296 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
25297 smaller than word_mode.
25298 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
25299 <case AND>: Likewise.
25301 2023-04-14 Jakub Jelinek <jakub@redhat.com>
25303 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
25306 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
25308 PR tree-optimization/108139
25309 PR tree-optimization/109462
25310 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
25311 equivalency check for PHI nodes.
25312 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
25313 does not dominate single-arg equivalency edges.
25315 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
25318 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
25319 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
25321 2023-04-13 Richard Biener <rguenther@suse.de>
25323 PR tree-optimization/109491
25324 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
25325 NULL operands test.
25327 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25330 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
25331 (vint16mf4_t): Ditto.
25332 (vint32mf2_t): Ditto.
25333 (vint64m1_t): Ditto.
25334 (vint64m2_t): Ditto.
25335 (vint64m4_t): Ditto.
25336 (vint64m8_t): Ditto.
25337 (vuint8mf8_t): Ditto.
25338 (vuint16mf4_t): Ditto.
25339 (vuint32mf2_t): Ditto.
25340 (vuint64m1_t): Ditto.
25341 (vuint64m2_t): Ditto.
25342 (vuint64m4_t): Ditto.
25343 (vuint64m8_t): Ditto.
25344 (vfloat32mf2_t): Ditto.
25345 (vbool64_t): Ditto.
25346 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
25347 (register_vector_type): Ditto.
25348 (check_required_extensions): Fix condition.
25349 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
25350 (RVV_REQUIRE_ELEN_64): New define.
25351 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
25352 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
25353 (TARGET_VECTOR_FP64): Ditto.
25354 (ENTRY): Fix predicate.
25355 * config/riscv/vector-iterators.md: Fix predicate.
25357 2023-04-12 Jakub Jelinek <jakub@redhat.com>
25359 PR tree-optimization/109410
25360 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
25361 block if first statement of the function is a call to returns_twice
25364 2023-04-12 Jakub Jelinek <jakub@redhat.com>
25367 * config/i386/i386.cc: Include rtl-error.h.
25368 (ix86_print_operand): For z modifier warning, use warning_for_asm
25369 if this_is_asm_operands. For Z modifier errors, use %c and code
25370 instead of hardcoded Z.
25372 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
25374 * config/i386/x-mingw32-utf8: Remove extrataneous $@
25376 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
25378 PR tree-optimization/109462
25379 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
25380 check for equivalences if NAME is a phi node.
25382 2023-04-12 Richard Biener <rguenther@suse.de>
25384 PR tree-optimization/109473
25385 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
25386 Convert scalar result to the computation type before performing
25387 the reduction adjustment.
25389 2023-04-12 Richard Biener <rguenther@suse.de>
25391 PR tree-optimization/109469
25392 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
25393 a returns-twice call.
25395 2023-04-12 Richard Biener <rguenther@suse.de>
25397 PR tree-optimization/109434
25398 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
25399 handle possibly throwing calls when processing the LHS
25400 and may-defs are not OK.
25402 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
25404 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
25405 predicate to avoid splitting arith constants.
25407 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
25408 Pan Li <pan2.li@intel.com>
25409 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25410 Kito Cheng <kito.cheng@sifive.com>
25413 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
25414 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
25415 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
25416 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
25417 (riscv_zero_call_used_regs): New.
25418 (TARGET_ZERO_CALL_USED_REGS): New.
25420 2023-04-11 Martin Liska <mliska@suse.cz>
25423 * opts.cc (finish_options): Drop also
25424 x_flag_var_tracking_assignments.
25426 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
25428 PR tree-optimization/108888
25429 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
25431 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
25434 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
25435 (vsx_sign_extend_v16qi_<mode>): ... this.
25436 (vsx_sign_extend_hi_<mode>): Rename to...
25437 (vsx_sign_extend_v8hi_<mode>): ... this.
25438 (vsx_sign_extend_si_v2di): Rename to...
25439 (vsx_sign_extend_v4si_v2di): ... this.
25440 (vsignextend_qi_<mode>): Remove.
25441 (vsignextend_hi_<mode>): Remove.
25442 (vsignextend_si_v2di): Remove.
25443 (vsignextend_v2di_v1ti): Remove.
25444 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
25445 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
25446 with gen_vsx_sign_extend_v16qi_v4si.
25447 * config/rs6000/rs6000.md (split for DI constant generation):
25448 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
25449 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
25450 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
25451 with gen_vsx_sign_extend_v16qi_si.
25452 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
25453 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
25454 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
25455 vsx_sign_extend_v16qi_v4si.
25456 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
25457 vsx_sign_extend_v8hi_v2di.
25458 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
25459 vsx_sign_extend_v8hi_v4si.
25460 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
25461 vsx_sign_extend_si_v2di.
25462 (__builtin_altivec_vsignext): Set bif-pattern to
25463 vsx_sign_extend_v2di_v1ti.
25464 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
25465 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
25466 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
25467 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
25469 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
25472 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
25473 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
25475 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
25477 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
25479 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
25481 * common/config/i386/cpuinfo.h (get_available_features):
25482 Detect AMX-COMPLEX.
25483 * common/config/i386/i386-common.cc
25484 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
25485 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
25486 (ix86_handle_option): Handle -mamx-complex.
25487 * common/config/i386/i386-cpuinfo.h (enum processor_features):
25488 Add FEATURE_AMX_COMPLEX.
25489 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
25491 * config.gcc: Add amxcomplexintrin.h.
25492 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
25493 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
25495 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
25496 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
25497 Handle amx-complex.
25498 * config/i386/i386.opt: Add option -mamx-complex.
25499 * config/i386/immintrin.h: Include amxcomplexintrin.h.
25500 * doc/extend.texi: Document amx-complex.
25501 * doc/invoke.texi: Document -mamx-complex.
25502 * doc/sourcebuild.texi: Document target amx-complex.
25503 * config/i386/amxcomplexintrin.h: New file.
25505 2023-04-08 Jakub Jelinek <jakub@redhat.com>
25507 PR tree-optimization/109392
25508 * tree-vect-generic.cc (tree_vec_extract): Handle failure
25509 of maybe_push_res_to_seq better.
25511 2023-04-08 Jakub Jelinek <jakub@redhat.com>
25513 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
25515 (SYSTEM_H): Depend on $(HASHTAB_H).
25516 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
25517 dependency on $(RTL_BASE_H), remove redundant dependency on
25520 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
25523 * config/arm/arm.cc (arm_effective_regno): New function.
25524 (mve_vector_mem_operand): Use it.
25526 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
25528 PR tree-optimization/109417
25529 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
25530 dependency is in SSA_NAME_FREE_LIST.
25532 2023-04-06 Andrew Pinski <apinski@marvell.com>
25534 PR tree-optimization/109427
25535 * params.opt (-param=vect-induction-float=):
25536 Fix option attribute typo for IntegerRange.
25538 2023-04-05 Jeff Law <jlaw@ventanamicro>
25541 * combine.cc (combine_instructions): Force re-recognition when
25542 after restoring the body of an insn to its original form.
25544 2023-04-05 Martin Jambor <mjambor@suse.cz>
25547 * ipa-sra.cc (zap_useless_ipcp_results): New function.
25548 (process_isra_node_results): Call it.
25550 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25552 * config/riscv/vector.md: Fix incorrect operand order.
25554 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25556 * config/riscv/riscv-vsetvl.cc
25557 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
25560 2023-04-05 Li Xu <xuli1@eswincomputing.com>
25562 * config/riscv/riscv-vector-builtins.def: Fix typo.
25563 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
25564 * config/riscv/vector-iterators.md: Ditto.
25566 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
25568 * doc/md.texi (Including Patterns): Fix page break.
25570 2023-04-04 Jakub Jelinek <jakub@redhat.com>
25572 PR tree-optimization/109386
25573 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
25574 foperator_le::op1_range, foperator_le::op2_range,
25575 foperator_gt::op1_range, foperator_gt::op2_range,
25576 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
25577 BRS_FALSE case even if the other op is maybe_isnan, not just
25579 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
25580 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
25581 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
25582 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
25583 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
25584 not just known_isnan.
25586 2023-04-04 Marek Polacek <polacek@redhat.com>
25588 PR sanitizer/109107
25589 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
25591 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
25593 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
25595 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
25596 (mve_vcreateq_f<mode>): Swap operands.
25598 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
25600 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
25602 2023-04-04 Jakub Jelinek <jakub@redhat.com>
25605 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
25606 Reword diagnostics about zfinx conflict with f, formatting fixes.
25608 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
25610 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
25612 2023-04-04 Richard Biener <rguenther@suse.de>
25614 PR tree-optimization/109304
25615 * tree-profile.cc (tree_profiling): Use symtab node
25616 availability to decide whether to skip adjusting calls.
25617 Do not adjust calls to internal functions.
25619 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
25622 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
25623 function for permutation control vector by considering big endianness.
25625 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
25628 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
25629 (rs6000_vprtyb<mode>2): ... this.
25630 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
25631 rs6000_vprtybv2di2.
25632 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
25633 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
25634 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
25635 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
25637 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
25638 Sandra Loosemore <sandra@codesourcery.com>
25640 * doc/md.texi (Insn Splitting): Tweak wording for readability.
25642 2023-04-03 Martin Jambor <mjambor@suse.cz>
25645 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
25646 offset + size will be representable in unsigned int.
25648 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
25650 * configure.ac (ZSTD_LIB): Move before zstd.h check.
25651 Unset gcc_cv_header_zstd_h without libzstd.
25652 * configure: Regenerate.
25654 2023-04-03 Martin Liska <mliska@suse.cz>
25656 * doc/invoke.texi: Document new param.
25658 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
25660 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
25661 new check_effective_target function.
25663 2023-04-03 Li Xu <xuli1@eswincomputing.com>
25665 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
25666 (vfloat32m8_t): Likewise
25668 2023-04-03 liuhongt <hongtao.liu@intel.com>
25670 * doc/md.texi: Document signbitm2.
25672 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25673 kito-cheng <kito.cheng@sifive.com>
25675 * config/riscv/vector.md: Fix RA constraint.
25677 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25679 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
25680 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
25681 * config/riscv/vector.md: Fix scalar move bug.
25683 2023-04-01 Jakub Jelinek <jakub@redhat.com>
25685 * range-op-float.cc (foperator_equal::fold_range): If at least
25686 one of the op ranges is not singleton and neither is NaN and all
25687 4 bounds are zero, return [1, 1].
25688 (foperator_not_equal::fold_range): In the same case return [0, 0].
25690 2023-04-01 Jakub Jelinek <jakub@redhat.com>
25692 * range-op-float.cc (foperator_equal::fold_range): Perform the
25693 non-singleton handling regardless of maybe_isnan (op1, op2).
25694 (foperator_not_equal::fold_range): Likewise.
25695 (foperator_lt::fold_range, foperator_le::fold_range,
25696 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
25697 real_* comparison check which results in range_false (type)
25698 even if maybe_isnan (op1, op2). Simplify.
25699 (foperator_ltgt): New class.
25700 (fop_ltgt): New variable.
25701 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
25704 2023-04-01 Jakub Jelinek <jakub@redhat.com>
25707 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
25708 returns VOIDmode, handle it like if the register isn't used for
25709 passing arguments at all.
25710 (apply_result_size): If targetm.calls.get_raw_result_mode returns
25711 VOIDmode, handle it like if the register isn't used for returning
25713 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
25714 means to return VOIDmode.
25715 * doc/tm.texi: Regenerated.
25716 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
25717 TARGET_SVE for P0_REGNUM.
25718 (aarch64_function_arg_regno_p): Also return true for p0-p3.
25719 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
25721 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
25723 * lra-constraints.cc: (combine_reload_insn): New function.
25725 2023-03-31 Jakub Jelinek <jakub@redhat.com>
25727 PR tree-optimization/91645
25728 * range-op-float.cc (foperator_unordered_lt::fold_range,
25729 foperator_unordered_le::fold_range,
25730 foperator_unordered_gt::fold_range,
25731 foperator_unordered_ge::fold_range,
25732 foperator_unordered_equal::fold_range): Call the ordered
25733 fold_range on ranges with cleared NaNs.
25734 * value-query.cc (range_query::get_tree_range): Handle also
25735 COMPARISON_CLASS_P trees.
25737 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
25738 Andrew Pinski <pinskia@gmail.com>
25741 * config/riscv/t-riscv: Add missing dependencies.
25743 2023-03-31 liuhongt <hongtao.liu@intel.com>
25745 * config/i386/i386.cc (inline_memory_move_cost): Return 100
25746 for MASK_REGS when MODE_SIZE > 8.
25748 2023-03-31 liuhongt <hongtao.liu@intel.com>
25751 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
25752 ufloat/ufix to floatuns/fixuns.
25753 * config/i386/i386-expand.cc
25754 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
25755 * config/i386/sse.md
25756 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
25758 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
25759 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
25761 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
25763 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
25765 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
25766 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
25767 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
25768 (ufloatv2siv2df2<mask_name>): Renamed to ..
25769 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
25770 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
25772 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
25774 (ufix_notruncv2dfv2si2): Renamed to ..
25775 (fixuns_notruncv2dfv2si2):.. this.
25776 (ufix_notruncv2dfv2si2_mask): Renamed to ..
25777 (fixuns_notruncv2dfv2si2_mask): .. this.
25778 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
25779 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
25780 (ufix_truncv2dfv2si2): Renamed to ..
25781 (*fixuns_truncv2dfv2si2): .. this.
25782 (ufix_truncv2dfv2si2_mask): Renamed to ..
25783 (fixuns_truncv2dfv2si2_mask): .. this.
25784 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
25785 (*fixuns_truncv2dfv2si2_mask_1): .. this.
25786 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
25787 (fixuns_truncv4dfv4si2<mask_name>): .. this.
25788 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
25790 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
25792 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
25793 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
25796 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
25798 PR tree-optimization/109154
25799 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
25800 * gimple-range-gori.h (may_recompute_p): Add depth param.
25801 * params.opt (ranger-recompute-depth): New param.
25803 2023-03-30 Jason Merrill <jason@redhat.com>
25807 * cgraph.h: Move reset() from cgraph_node to symtab_node.
25808 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
25809 remove_from_same_comdat_group.
25811 2023-03-30 Richard Biener <rguenther@suse.de>
25813 PR tree-optimization/107561
25814 * gimple-ssa-warn-access.cc (get_size_range): Add flags
25815 argument and pass it on.
25816 (check_access): When querying for the size range pass
25817 SR_ALLOW_ZERO when the known destination size is zero.
25819 2023-03-30 Richard Biener <rguenther@suse.de>
25821 PR tree-optimization/109342
25822 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
25823 overload for edge. When that edge is a backedge use
25824 dominated_by_p directly.
25826 2023-03-30 liuhongt <hongtao.liu@intel.com>
25828 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
25829 vpblendd instead of vpblendw for V4SI under avx2.
25831 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
25833 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
25834 for many quick operands, for register-sized modes.
25836 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
25838 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
25841 2023-03-29 Martin Liska <mliska@suse.cz>
25843 PR bootstrap/109310
25844 * configure.ac: Emit a warning for deprecated option
25845 --enable-link-mutex.
25846 * configure: Regenerate.
25848 2023-03-29 Richard Biener <rguenther@suse.de>
25850 PR tree-optimization/109331
25851 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
25852 discover a taken edge make sure to cleanup the CFG.
25854 2023-03-29 Richard Biener <rguenther@suse.de>
25856 PR tree-optimization/109327
25857 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
25858 already removed stmts when draining to_remove.
25860 2023-03-29 Richard Biener <rguenther@suse.de>
25863 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
25864 so we can re-create the DIE for the type if required.
25866 2023-03-29 Jakub Jelinek <jakub@redhat.com>
25867 Richard Biener <rguenther@suse.de>
25869 PR tree-optimization/109301
25870 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
25871 properties_provided from PROP_gimple_opt_math to 0.
25872 (pass_data_expand_powcabs): Change properties_provided from 0 to
25873 PROP_gimple_opt_math.
25875 2023-03-29 Richard Biener <rguenther@suse.de>
25877 PR tree-optimization/109154
25878 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
25879 inverted condition specially by inverting at the caller.
25880 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
25882 2023-03-28 David Malcolm <dmalcolm@redhat.com>
25885 * diagnostic-show-locus.cc (column_range::column_range): Factor
25886 out assertion conditional into...
25887 (column_range::valid_p): ...this new function.
25888 (line_corrections::add_hint): Don't attempt to consolidate hints
25889 if it would lead to invalid column_range instances.
25891 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
25894 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
25895 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
25898 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
25900 PR rtl-optimization/109187
25901 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
25902 subtraction in three-way comparison.
25904 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
25906 PR tree-optimization/109265
25907 PR tree-optimization/109274
25908 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
25909 not create a relation record is op1 and op2 are the same symbol.
25910 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
25911 handler for this stmt, but create a new record only if this statement
25912 generates a relation based on the ranges.
25913 (gori_compute::compute_operand2_range): Ditto.
25914 * value-relation.h (value_relation::set_relation): Always create the
25915 record that is requested.
25917 2023-03-28 Richard Biener <rguenther@suse.de>
25919 PR tree-optimization/107087
25920 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
25921 executable regions to avoid useless work and to better
25922 propagate degenerate PHIs.
25924 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
25926 * config/i386/x-mingw32-utf8: update comments.
25928 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
25931 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
25932 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
25934 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
25936 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
25937 after inlining. Record which decls are loaded from. Fix handling
25938 of vops for loads and stores.
25939 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
25940 (aarch64_accesses_vector_load_decl_p): Likewise.
25941 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
25943 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
25944 that loads from a decl, treat vector stores to those decls as
25946 (aarch64_vector_costs::finish_cost): ...and in that case,
25947 if the vector code does nothing more than a store, give the
25948 prologue a zero cost as well.
25950 2023-03-28 Richard Biener <rguenther@suse.de>
25953 PR tree-optimization/108129
25954 * genmatch.cc (lower_for): For (match ...) delay
25955 substituting into the match operator if possible.
25956 (dt_operand::gen_gimple_expr): For user_id look at the
25957 first substitute for determining how to access operands.
25958 (dt_operand::gen_generic_expr): Likewise.
25959 (dt_node::gen_kids): Properly sort user_ids according
25960 to their substitutes.
25961 (dt_node::gen_kids_1): Code-generate user_id matching.
25963 2023-03-28 Jakub Jelinek <jakub@redhat.com>
25964 Jonathan Wakely <jwakely@redhat.com>
25966 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
25967 Use subcommand rather than sub-command in function comments.
25969 2023-03-28 Jakub Jelinek <jakub@redhat.com>
25971 PR tree-optimization/109154
25972 * value-range.h (frange::flush_denormals_to_zero): Make it public
25973 rather than private.
25974 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
25976 * range-op-float.cc (range_operator_float::fold_range): Call
25977 flush_denormals_to_zero.
25979 2023-03-28 Jakub Jelinek <jakub@redhat.com>
25981 PR middle-end/106190
25982 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
25983 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
25985 2023-03-28 Jakub Jelinek <jakub@redhat.com>
25987 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
25988 as 4th argument to set to avoid clear_nan and union_ calls.
25990 2023-03-28 Jakub Jelinek <jakub@redhat.com>
25993 * config/i386/i386.cc (assign_386_stack_local): For DImode
25994 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
25995 align 32 rather than 0 to assign_stack_local.
25997 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
26000 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
26001 on operand #3 to get the final condition code. Use std::swap.
26002 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
26003 (fucmp<gcond:code>8<P:mode>_vis): Move around.
26004 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
26005 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
26007 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
26009 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
26010 top-level sections.
26012 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
26014 * config.host: Pull in i386/x-mingw32-utf8 Makefile
26015 fragment and reference utf8rc-mingw32.o explicitly
26017 * config/i386/sym-mingw32.cc: prevent name mangling of
26019 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
26020 depend on manifest file explicitly.
26022 2023-03-28 Richard Biener <rguenther@suse.de>
26025 2023-03-27 Richard Biener <rguenther@suse.de>
26027 PR rtl-optimization/109237
26028 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
26030 2023-03-28 Richard Biener <rguenther@suse.de>
26032 * common.opt (gdwarf): Remove Negative(gdwarf-).
26034 2023-03-28 Richard Biener <rguenther@suse.de>
26036 * common.opt (gdwarf): Add RejectNegative.
26037 (gdwarf-): Likewise.
26041 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
26043 * config/cris/constraints.md ("T"): Correct to
26044 define_memory_constraint.
26046 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
26048 * config/cris/cris.md (BW2): New mode-iterator.
26049 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
26052 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
26054 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
26055 for possible eliminable compares.
26057 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
26059 * config/cris/constraints.md ("R"): Remove unused constraint.
26061 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
26063 PR gcov-profile/109297
26064 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
26065 (merge_stream_usage): Likewise.
26066 (overlap_usage): Likewise.
26068 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
26071 * config/riscv/thead.md: Add missing mode specifiers.
26073 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
26074 Jiangning Liu <jiangning.liu@amperecomputing.com>
26075 Manolis Tsamis <manolis.tsamis@vrull.eu>
26077 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
26079 2023-03-27 Richard Biener <rguenther@suse.de>
26081 PR rtl-optimization/109237
26082 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
26084 2023-03-27 Richard Biener <rguenther@suse.de>
26087 * lto-wrapper.cc (run_gcc): Parse alternate debug options
26088 as well, they always enable debug.
26090 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
26093 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
26095 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
26097 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
26100 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
26101 than zero when calling vec_sld.
26102 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
26103 zero when calling vec_sld.
26104 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
26105 than zero when calling vec_sld.
26107 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
26109 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
26110 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
26111 loops are represented and which fields are vectors. Add
26112 documentation for OMP_FOR_PRE_BODY field. Document internal
26113 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
26114 * tree.def (OMP_FOR): Make documentation consistent with the
26115 Texinfo manual, to fill some gaps and correct errors.
26117 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
26120 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
26121 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
26122 (handle_move_double): Call it before handle_movsi.
26123 * config/m68k/m68k-protos.h: Declare it.
26125 2023-03-26 Jakub Jelinek <jakub@redhat.com>
26127 PR tree-optimization/109230
26128 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
26130 2023-03-26 Jakub Jelinek <jakub@redhat.com>
26133 * predict.cc (compute_function_frequency): Don't call
26134 warn_function_cold if function already has cold attribute.
26136 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
26138 * doc/install.texi: Remove anachronistic note
26139 related to languages built and separate source tarballs.
26141 2023-03-25 David Malcolm <dmalcolm@redhat.com>
26144 * diagnostic-format-sarif.cc (read_until_eof): Delete.
26145 (maybe_read_file): Delete.
26146 (sarif_builder::maybe_make_artifact_content_object): Use
26147 get_source_file_content rather than maybe_read_file.
26148 Reject it if it's not valid UTF-8.
26149 * input.cc (file_cache_slot::get_full_file_content): New.
26150 (get_source_file_content): New.
26151 (selftest::check_cpp_valid_utf8_p): New.
26152 (selftest::test_cpp_valid_utf8_p): New.
26153 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
26154 * input.h (get_source_file_content): New prototype.
26156 2023-03-24 David Malcolm <dmalcolm@redhat.com>
26158 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
26160 (Special Functions for Debugging the Analyzer): Convert to a
26161 table, and rewrite in places.
26162 (Other Debugging Techniques): Add notes on how to compare two
26163 different exploded graphs.
26165 2023-03-24 David Malcolm <dmalcolm@redhat.com>
26168 * json.cc: Update comments to indicate that we now preserve
26169 insertion order of keys within objects.
26170 (object::print): Traverse keys in insertion order.
26171 (object::set): Preserve insertion order of keys.
26172 (selftest::test_writing_objects): Add an additional key to verify
26173 that we preserve insertion order.
26174 * json.h (object::m_keys): New field.
26176 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
26178 PR tree-optimization/109238
26179 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
26180 predecessors which this block dominates.
26182 2023-03-24 Richard Biener <rguenther@suse.de>
26184 PR tree-optimization/106912
26185 * tree-profile.cc (tree_profiling): Update stmts only when
26186 profiling or testing coverage. Make sure to update calls
26187 fntype, stripping 'const' there.
26189 2023-03-24 Jakub Jelinek <jakub@redhat.com>
26191 PR middle-end/109258
26192 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
26193 if target == const0_rtx.
26195 2023-03-24 Alexandre Oliva <oliva@adacore.com>
26197 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
26198 Document options and effective targets.
26200 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
26202 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
26205 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
26207 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
26208 non-earlyclobber alternative.
26210 2023-03-23 Andrew Pinski <apinski@marvell.com>
26213 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
26216 2023-03-23 Richard Biener <rguenther@suse.de>
26218 PR tree-optimization/107569
26219 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
26220 Do not push SSA names with zero uses as available leader.
26221 (process_bb): Likewise.
26223 2023-03-23 Richard Biener <rguenther@suse.de>
26225 PR tree-optimization/109262
26226 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
26227 combining a piecewise complex load avoid touching loads
26228 that throw internally. Use fun, not cfun throughout.
26230 2023-03-23 Jakub Jelinek <jakub@redhat.com>
26232 * value-range.cc (irange::irange_union, irange::intersect): Fix
26233 comment spelling bugs.
26234 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
26235 * gimple-range-trace.h: Likewise.
26236 * gimple-range-edge.cc: Likewise.
26237 (gimple_outgoing_range_stmt_p,
26238 gimple_outgoing_range::switch_edge_range,
26239 gimple_outgoing_range::edge_range_p): Likewise.
26240 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
26241 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
26242 assume_query::assume_query, assume_query::calculate_phi): Likewise.
26243 * gimple-range-edge.h: Likewise.
26244 * value-range.h (Value_Range::set, Value_Range::lower_bound,
26245 Value_Range::upper_bound, frange::set_undefined): Likewise.
26246 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
26247 gori_compute): Likewise.
26248 * gimple-range-fold.h (fold_using_range): Likewise.
26249 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
26251 * gimple-range-gori.cc (range_def_chain::in_chain_p,
26252 range_def_chain::dump, gori_map::calculate_gori,
26253 gori_compute::compute_operand_range_switch,
26254 gori_compute::logical_combine, gori_compute::refine_using_relation,
26255 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
26257 * gimple-range.h: Likewise.
26258 (enable_ranger): Likewise.
26259 * range-op.h (empty_range_varying): Likewise.
26260 * value-query.h (value_query): Likewise.
26261 * gimple-range-cache.cc (block_range_cache::set_bb_range,
26262 block_range_cache::dump, ssa_global_cache::clear_global_range,
26263 temporal_cache::temporal_value, temporal_cache::current_p,
26264 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
26265 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
26267 * gimple-range-fold.cc (fur_edge::get_phi_operand,
26268 fur_stmt::get_operand, gimple_range_adjustment,
26269 fold_using_range::range_of_phi,
26270 fold_using_range::relation_fold_and_or): Likewise.
26271 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
26272 * value-query.cc (range_query::value_of_expr,
26273 range_query::value_on_edge, range_query::query_relation): Likewise.
26274 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
26275 intersect_range_with_nonzero_bits): Likewise.
26276 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
26277 exit_range): Likewise.
26278 * value-relation.h: Likewise.
26279 (equiv_oracle, relation_trio::relation_trio, value_relation,
26280 value_relation::value_relation, pe_min): Likewise.
26281 * range-op-float.cc (range_operator_float::rv_fold,
26282 frange_arithmetic, foperator_unordered_equal::op1_range,
26283 foperator_div::rv_fold): Likewise.
26284 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
26285 * value-relation.cc (equiv_oracle::query_relation,
26286 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
26287 value_relation::apply_transitive, relation_chain_head::find_relation,
26288 dom_oracle::query_relation, dom_oracle::find_relation_block,
26289 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
26290 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
26291 create_possibly_reversed_range, adjust_op1_for_overflow,
26292 operator_mult::wi_fold, operator_exact_divide::op1_range,
26293 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
26294 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
26295 range_op_lshift_tests): Likewise.
26297 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
26299 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
26300 (move_callee_saved_registers): Detect the bug condition early.
26302 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
26304 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
26305 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
26307 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
26308 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
26309 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
26310 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
26311 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
26313 2023-03-23 Jakub Jelinek <jakub@redhat.com>
26315 PR tree-optimization/109176
26316 * tree-vect-generic.cc (expand_vector_condition): If a has
26317 vector boolean type and is a comparison, also check if both
26318 the comparison and VEC_COND_EXPR could be successfully expanded
26321 2023-03-23 Pan Li <pan2.li@intel.com>
26322 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26326 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
26327 for vector mask modes.
26328 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
26329 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
26331 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
26333 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
26335 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26338 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
26339 (emit_vlmax_op): Ditto.
26340 * config/riscv/riscv-v.cc (get_sew): New function.
26341 (emit_vlmax_vsetvl): Adapt function.
26342 (emit_pred_op): Ditto.
26343 (emit_vlmax_op): Ditto.
26344 (emit_nonvlmax_op): Ditto.
26345 (legitimize_move): Fix LRA ICE.
26346 (gen_no_side_effects_vsetvl_rtx): Adapt function.
26347 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
26348 (@mov<VB:mode><P:mode>_lra): Ditto.
26349 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
26350 (*mov<VB:mode><P:mode>_lra): Ditto.
26352 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26355 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
26356 __riscv_vlenb support.
26358 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
26359 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
26360 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
26362 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
26363 * config/riscv/riscv-vector-builtins.cc: Ditto.
26365 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26366 kito-cheng <kito.cheng@sifive.com>
26368 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
26369 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
26370 (pass_vsetvl::need_vsetvl): Fix bugs.
26371 (pass_vsetvl::backward_demand_fusion): Fix bugs.
26372 (pass_vsetvl::demand_fusion): Fix bugs.
26373 (eliminate_insn): Fix bugs.
26374 (insert_vsetvl): Ditto.
26375 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
26376 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
26377 * config/riscv/vector.md: Ditto.
26379 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26380 kito-cheng <kito.cheng@sifive.com>
26382 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
26383 * config/riscv/vector-iterators.md (nmsac): Ditto.
26389 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
26390 (@pred_mul_plus<mode>): Ditto.
26391 (*pred_madd<mode>): Ditto.
26392 (*pred_macc<mode>): Ditto.
26393 (*pred_mul_plus<mode>): Ditto.
26394 (@pred_mul_plus<mode>_scalar): Ditto.
26395 (*pred_madd<mode>_scalar): Ditto.
26396 (*pred_macc<mode>_scalar): Ditto.
26397 (*pred_mul_plus<mode>_scalar): Ditto.
26398 (*pred_madd<mode>_extended_scalar): Ditto.
26399 (*pred_macc<mode>_extended_scalar): Ditto.
26400 (*pred_mul_plus<mode>_extended_scalar): Ditto.
26401 (@pred_minus_mul<mode>): Ditto.
26402 (*pred_<madd_nmsub><mode>): Ditto.
26403 (*pred_nmsub<mode>): Ditto.
26404 (*pred_<macc_nmsac><mode>): Ditto.
26405 (*pred_nmsac<mode>): Ditto.
26406 (*pred_mul_<optab><mode>): Ditto.
26407 (*pred_minus_mul<mode>): Ditto.
26408 (@pred_mul_<optab><mode>_scalar): Ditto.
26409 (@pred_minus_mul<mode>_scalar): Ditto.
26410 (*pred_<madd_nmsub><mode>_scalar): Ditto.
26411 (*pred_nmsub<mode>_scalar): Ditto.
26412 (*pred_<macc_nmsac><mode>_scalar): Ditto.
26413 (*pred_nmsac<mode>_scalar): Ditto.
26414 (*pred_mul_<optab><mode>_scalar): Ditto.
26415 (*pred_minus_mul<mode>_scalar): Ditto.
26416 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
26417 (*pred_nmsub<mode>_extended_scalar): Ditto.
26418 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
26419 (*pred_nmsac<mode>_extended_scalar): Ditto.
26420 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
26421 (*pred_minus_mul<mode>_extended_scalar): Ditto.
26422 (*pred_<madd_msub><mode>): Ditto.
26423 (*pred_<macc_msac><mode>): Ditto.
26424 (*pred_<madd_msub><mode>_scalar): Ditto.
26425 (*pred_<macc_msac><mode>_scalar): Ditto.
26426 (@pred_neg_mul_<optab><mode>): Ditto.
26427 (@pred_mul_neg_<optab><mode>): Ditto.
26428 (*pred_<nmadd_msub><mode>): Ditto.
26429 (*pred_<nmsub_nmadd><mode>): Ditto.
26430 (*pred_<nmacc_msac><mode>): Ditto.
26431 (*pred_<nmsac_nmacc><mode>): Ditto.
26432 (*pred_neg_mul_<optab><mode>): Ditto.
26433 (*pred_mul_neg_<optab><mode>): Ditto.
26434 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
26435 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
26436 (*pred_<nmadd_msub><mode>_scalar): Ditto.
26437 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
26438 (*pred_<nmacc_msac><mode>_scalar): Ditto.
26439 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
26440 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
26441 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
26442 (@pred_widen_neg_mul_<optab><mode>): Ditto.
26443 (@pred_widen_mul_neg_<optab><mode>): Ditto.
26444 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
26445 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
26447 2023-03-23 liuhongt <hongtao.liu@intel.com>
26449 * builtins.cc (builtin_memset_read_str): Replace
26450 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
26451 (builtin_memset_gen_str): Ditto.
26452 * config/i386/i386-expand.cc
26453 (ix86_convert_const_wide_int_to_broadcast): Replace
26454 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
26455 (ix86_expand_vector_move): Ditto.
26456 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
26458 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
26459 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
26460 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
26461 * doc/tm.texi.in: Ditto.
26462 * target.def: Ditto.
26464 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
26466 * lra.cc (lra): Do not repeat inheritance and live range splitting
26467 when asm error is found.
26469 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
26471 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
26472 (gcn_expand_dpp_distribute_even_insn)
26473 (gcn_expand_dpp_distribute_odd_insn): Declare.
26474 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
26475 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
26476 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
26477 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
26478 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
26479 (fms<mode>4_negop2): New patterns.
26480 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
26481 (gcn_expand_dpp_distribute_even_insn)
26482 (gcn_expand_dpp_distribute_odd_insn): New functions.
26483 * config/gcn/gcn.md: Add entries to unspec enum.
26485 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
26487 PR tree-optimization/109008
26488 * value-range.cc (frange::set): Add nan_state argument.
26489 * value-range.h (class nan_state): New.
26490 (frange::get_nan_state): New.
26492 2023-03-22 Martin Liska <mliska@suse.cz>
26494 * configure: Regenerate.
26496 2023-03-21 Joseph Myers <joseph@codesourcery.com>
26498 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
26501 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
26503 PR tree-optimization/109192
26504 * gimple-range-gori.cc (gori_compute::compute_operand_range):
26505 Terminate gori calculations if a relation is not relevant.
26506 * value-relation.h (value_relation::set_relation): Allow
26507 equality between op1 and op2 if they are the same.
26509 2023-03-21 Richard Biener <rguenther@suse.de>
26511 PR tree-optimization/109219
26512 * tree-vect-loop.cc (vectorizable_reduction): Check
26513 slp_node, not STMT_SLP_TYPE.
26514 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
26515 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
26516 Remove assertion on STMT_SLP_TYPE.
26518 2023-03-21 Jakub Jelinek <jakub@redhat.com>
26520 PR tree-optimization/109215
26521 * tree.h (enum special_array_member): Adjust comments for int_0
26523 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
26524 has zero sized element type and the array has variable number of
26525 elements or constant one or more elements.
26526 (component_ref_size): Adjust comments, formatting fix.
26528 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
26530 * configure.ac: Add check for the Texinfo 6.8
26531 CONTENTS_OUTPUT_LOCATION customization variable and set it if
26533 * configure: Regenerate.
26534 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
26535 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
26536 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
26537 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
26539 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
26541 * doc/extend.texi: Associate use_hazard_barrier_return index
26542 entry with its attribute.
26543 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
26546 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
26548 * doc/implement-c.texi: Remove usage of @gol.
26549 * doc/invoke.texi: Ditto.
26550 * doc/sourcebuild.texi: Ditto.
26551 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
26552 texinfo.tex versions, the bug it was working around appears to
26555 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
26557 * doc/include/texinfo.tex: Update to 2023-01-17.19.
26559 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
26561 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
26562 @enddefbuiltin for defining built-in functions.
26563 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
26564 places where it should be used.
26566 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
26568 * doc/extend.texi (Formatted Output Function Checking): New
26569 subsection for grouping together printf et al.
26570 (Exception handling) Fix missing @ sign before copyright
26571 header, which lead to the copyright line leaking into
26572 '(gcc)Exception handling'.
26573 * doc/gcc.texi: Set document language to en_US.
26574 (@copying): Wrap front cover texts in quotations, move in manual
26577 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
26579 * doc/gcc.texi: Add the Indices appendix, to make texinfo
26580 generate nice indices overview page.
26582 2023-03-21 Richard Biener <rguenther@suse.de>
26584 PR tree-optimization/109170
26585 * gimple-range-op.cc (cfn_pass_through_arg1): New.
26586 (gimple_range_op_handler::maybe_builtin_call): Handle
26587 __builtin_expect via cfn_pass_through_arg1.
26589 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
26592 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
26593 (init_float128_ieee): Delete code to switch complex multiply and divide
26595 (complex_multiply_builtin_code): New helper function.
26596 (complex_divide_builtin_code): Likewise.
26597 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
26598 of complex 128-bit multiply and divide built-in functions.
26600 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
26603 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
26605 2023-03-19 Jonny Grant <jg@jguk.org>
26607 * doc/extend.texi (Common Function Attributes) <nonnull>:
26610 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
26612 PR rtl-optimization/109179
26613 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
26614 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
26616 2023-03-17 Jakub Jelinek <jakub@redhat.com>
26619 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
26621 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
26622 to allocate_struct_function instead of false.
26623 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
26624 nor DECL_RESULT here. Pass true as ABSTRACT_P to
26625 push_struct_function. Call targetm.target_option.relayout_function
26627 (tree_function_versioning): Formatting fix.
26629 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
26631 * lra-constraints.cc: Include hooks.h.
26632 (combine_reload_insn): New function.
26633 (lra_constraints): Call it.
26635 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26636 kito-cheng <kito.cheng@sifive.com>
26638 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
26639 as legitimate value.
26640 * config/riscv/riscv-vector-builtins.cc
26641 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
26642 (function_expander::use_widen_ternop_insn): Ditto.
26643 * config/riscv/vector.md (@vundefined<mode>): New pattern.
26644 (pred_mul_<optab><mode>_undef_merge): Remove.
26645 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
26646 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
26647 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
26648 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
26650 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26653 * config/riscv/riscv.md: Fix subreg bug.
26655 2023-03-17 Jakub Jelinek <jakub@redhat.com>
26657 PR middle-end/108685
26658 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
26659 use its loop_father rather than BODY_BB's loop_father.
26660 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
26661 If broken_loop with ordered > collapse and at least one of those
26662 extra loops aren't guaranteed to have at least one iteration, change
26663 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
26664 loop_father to l0_bb's loop_father rather than l1_bb's.
26666 2023-03-17 Jakub Jelinek <jakub@redhat.com>
26669 * gdbhooks.py (TreePrinter.to_string): Wrap
26670 gdb.parse_and_eval('tree_code_type') in a try block, parse
26671 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
26672 raises exception. Update comments for the recent tree_code_type
26675 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
26677 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
26678 issues. Add more line breaks to example so it doesn't overflow
26681 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
26683 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
26684 line breaks in examples.
26685 <malloc>: Fix bad line breaks in running text, also copy-edit
26687 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
26688 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
26690 (C++ Dialect Options) <-fcontracts>: Add line break in example.
26691 <-Wctad-maybe-unsupported>: Likewise.
26692 <-Winvalid-constexpr>: Likewise.
26693 (Warning Options) <-Wdangling-pointer>: Likewise.
26694 <-Winterference-size>: Likewise.
26695 <-Wvla-parameter>: Likewise.
26696 (Static Analyzer Options): Fix bad line breaks in running text,
26697 plus add some missing markup.
26698 (Optimize Options) <openacc-privatization>: Fix more bad line
26699 breaks in running text.
26701 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
26703 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
26704 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
26705 (expand_vec_perm_2perm_pblendv): Ditto.
26707 2023-03-16 Martin Liska <mliska@suse.cz>
26709 PR middle-end/106133
26710 * gcc.cc (driver_handle_option): Use x_main_input_basename
26711 if x_dump_base_name is null.
26712 * opts.cc (common_handle_option): Likewise.
26714 2023-03-16 Richard Biener <rguenther@suse.de>
26716 PR tree-optimization/109123
26717 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
26718 Do not emit -Wuse-after-free late.
26719 (pass_waccess::check_call): Always check call pointer uses.
26721 2023-03-16 Richard Biener <rguenther@suse.de>
26723 PR tree-optimization/109141
26724 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
26725 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
26727 (renumber_gimple_stmt_uids): ... here and
26728 (renumber_gimple_stmt_uids_in_blocks): ... here.
26729 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
26730 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
26732 (pass_waccess::check_pointer_uses): Process all PHIs.
26734 2023-03-15 David Malcolm <dmalcolm@redhat.com>
26737 * diagnostic-format-sarif.cc (class sarif_invocation): New.
26738 (class sarif_ice_notification): New.
26739 (sarif_builder::m_invocation_obj): New field.
26740 (sarif_invocation::add_notification_for_ice): New.
26741 (sarif_invocation::prepare_to_flush): New.
26742 (sarif_ice_notification::sarif_ice_notification): New.
26743 (sarif_builder::sarif_builder): Add m_invocation_obj.
26744 (sarif_builder::end_diagnostic): Special-case DK_ICE and
26746 (sarif_builder::flush_to_file): Call prepare_to_flush on
26747 m_invocation_obj. Pass the latter to make_top_level_object.
26748 (sarif_builder::make_result_object): Move creation of "locations"
26750 (sarif_builder::make_locations_arr): ...this new function.
26751 (sarif_builder::make_top_level_object): Add "invocation_obj" param
26752 and pass it to make_run_object.
26753 (sarif_builder::make_run_object): Add "invocation_obj" param and
26755 (sarif_ice_handler): New callback.
26756 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
26757 * diagnostic.cc (diagnostic_initialize): Initialize new field
26759 (diagnostic_action_after_output): If it is set, make one attempt
26760 to call ice_handler_cb.
26761 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
26763 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
26765 * config/i386/i386-expand.cc (expand_vec_perm_blend):
26766 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
26767 and fix V2HImode handling.
26768 (expand_vec_perm_1): Try to emit BLEND instruction
26769 before MOVSS/MOVSD.
26770 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
26772 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
26774 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
26776 2023-03-15 Richard Biener <rguenther@suse.de>
26778 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
26779 Do not diagnose clobbers.
26781 2023-03-15 Richard Biener <rguenther@suse.de>
26783 PR tree-optimization/109139
26784 * tree-ssa-live.cc (remove_unused_locals): Look at the
26785 base address for unused decls on the LHS of .DEFERRED_INIT.
26787 2023-03-15 Xi Ruoyao <xry111@xry111.site>
26790 * builtins.cc (inline_string_cmp): Force the character
26791 difference into "result" pseudo-register, instead of reassign
26792 the pseudo-register.
26794 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
26796 * config.gcc: Add thead.o to RISC-V extra_objs.
26797 * config/riscv/peephole.md: Add mempair peephole passes.
26798 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
26800 (th_mempair_operands_p): Likewise.
26801 (th_mempair_order_operands): Likewise.
26802 (th_mempair_prepare_save_restore_operands): Likewise.
26803 (th_mempair_save_restore_regs): Likewise.
26804 (th_mempair_output_move): Likewise.
26805 * config/riscv/riscv.cc (riscv_save_reg): Move code.
26806 (riscv_restore_reg): Move code.
26807 (riscv_for_each_saved_reg): Add code to emit mempair insns.
26808 * config/riscv/t-riscv: Add thead.cc.
26809 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
26811 (*th_mempair_store_<GPR:mode>2): Likewise.
26812 (*th_mempair_load_extendsidi2): Likewise.
26813 (*th_mempair_load_zero_extendsidi2): Likewise.
26814 * config/riscv/thead.cc: New file.
26816 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
26818 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
26819 New constraint "th_f_fmv".
26820 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
26822 * config/riscv/riscv.cc (riscv_split_doubleword_move):
26823 Add split code for XTheadFmv.
26824 (riscv_secondary_memory_needed): XTheadFmv does not need
26826 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
26827 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
26828 movdf_hardfloat_rv32.
26829 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
26830 (th_fmv_x_w): New INSN.
26831 (th_fmv_x_hw): New INSN.
26833 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
26835 * config/riscv/riscv.md (maddhisi4): New expand.
26836 (msubhisi4): New expand.
26837 * config/riscv/thead.md (*th_mula<mode>): New pattern.
26838 (*th_mulawsi): New pattern.
26839 (*th_mulawsi2): New pattern.
26840 (*th_maddhisi4): New pattern.
26841 (*th_sextw_maddhisi4): New pattern.
26842 (*th_muls<mode>): New pattern.
26843 (*th_mulswsi): New pattern.
26844 (*th_mulswsi2): New pattern.
26845 (*th_msubhisi4): New pattern.
26846 (*th_sextw_msubhisi4): New pattern.
26848 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
26850 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
26851 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
26853 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
26855 (riscv_expand_conditional_move): New function.
26856 (riscv_expand_conditional_move_onesided): New function.
26857 * config/riscv/riscv.md: Add support for XTheadCondMov.
26858 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
26859 support for XTheadCondMov.
26860 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
26862 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
26864 * config/riscv/bitmanip.md (clzdi2): New expand.
26865 (clzsi2): New expand.
26866 (ctz<mode>2): New expand.
26867 (popcount<mode>2): New expand.
26868 (<bitmanip_optab>si2): Rename INSN.
26869 (*<bitmanip_optab>si2): Hide INSN name.
26870 (<bitmanip_optab>di2): Rename INSN.
26871 (*<bitmanip_optab>di2): Hide INSN name.
26872 (rotrsi3): Remove INSN.
26873 (rotr<mode>3): Add expand.
26874 (*rotrsi3): New INSN.
26875 (rotrdi3): Rename INSN.
26876 (*rotrdi3): Hide INSN name.
26877 (rotrsi3_sext): Rename INSN.
26878 (*rotrsi3_sext): Hide INSN name.
26879 (bswap<mode>2): Remove INSN.
26880 (bswapdi2): Add expand.
26881 (bswapsi2): Add expand.
26882 (*bswap<mode>2): Hide INSN name.
26883 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
26885 * config/riscv/riscv.md (extv<mode>): New expand.
26886 (extzv<mode>): New expand.
26887 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
26888 (*th_ext<mode>): New INSN.
26889 (*th_extu<mode>): New INSN.
26890 (*th_clz<mode>2): New INSN.
26891 (*th_rev<mode>2): New INSN.
26893 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
26895 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
26896 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
26898 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
26900 * config/riscv/riscv.md: Include thead.md
26901 * config/riscv/thead.md: New file.
26903 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
26905 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
26907 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
26909 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
26910 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
26911 (MASK_XTHEADBB): New.
26912 (MASK_XTHEADBS): New.
26913 (MASK_XTHEADCMO): New.
26914 (MASK_XTHEADCONDMOV): New.
26915 (MASK_XTHEADFMEMIDX): New.
26916 (MASK_XTHEADFMV): New.
26917 (MASK_XTHEADINT): New.
26918 (MASK_XTHEADMAC): New.
26919 (MASK_XTHEADMEMIDX): New.
26920 (MASK_XTHEADMEMPAIR): New.
26921 (MASK_XTHEADSYNC): New.
26922 (TARGET_XTHEADBA): New.
26923 (TARGET_XTHEADBB): New.
26924 (TARGET_XTHEADBS): New.
26925 (TARGET_XTHEADCMO): New.
26926 (TARGET_XTHEADCONDMOV): New.
26927 (TARGET_XTHEADFMEMIDX): New.
26928 (TARGET_XTHEADFMV): New.
26929 (TARGET_XTHEADINT): New.
26930 (TARGET_XTHEADMAC): New.
26931 (TARGET_XTHEADMEMIDX): New.
26932 (TARGET_XTHEADMEMPAIR): new.
26933 (TARGET_XTHEADSYNC): New.
26934 * config/riscv/riscv.opt: Add riscv_xthead_subext.
26936 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
26939 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
26940 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
26941 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
26943 2023-03-14 Jakub Jelinek <jakub@redhat.com>
26946 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
26947 when lo is equal to dhi and hi is a MEM which uses dlo register.
26949 2023-03-14 Martin Jambor <mjambor@suse.cz>
26952 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
26953 global0 instead of zeroing when it does not have as many counts as
26956 2023-03-14 Martin Jambor <mjambor@suse.cz>
26959 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
26960 ipa count, remove assert, lenient_count_portion_handling, dump
26961 also orig_node_count.
26963 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
26965 * config/i386/i386-expand.cc (expand_vec_perm_movs):
26966 Handle V2SImode for TARGET_MMX_WITH_SSE.
26967 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
26968 using V2FI mode iterator to handle both V2SI and V2SF modes.
26970 2023-03-14 Sam James <sam@gentoo.org>
26972 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
26973 including <sstream> earlier.
26974 * system.h: Add INCLUDE_SSTREAM.
26976 2023-03-14 Richard Biener <rguenther@suse.de>
26978 * tree-ssa-live.cc (remove_unused_locals): Do not treat
26979 the .DEFERRED_INIT of a variable as use, instead remove
26980 that if it is the only use.
26982 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
26984 PR rtl-optimization/107762
26985 * expr.cc (emit_group_store): Revert latest change.
26987 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
26989 PR tree-optimization/109005
26990 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
26991 aggregate type check.
26993 2023-03-14 Jakub Jelinek <jakub@redhat.com>
26995 PR tree-optimization/109115
26996 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
26997 r.upper_bound () on r.undefined_p () range.
26999 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
27001 PR tree-optimization/106896
27002 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
27003 implementatoin with probability_in; avoid some asserts.
27005 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
27007 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
27009 2023-03-13 Sean Bright <sean@seanbright.com>
27011 * doc/invoke.texi (Warning Options): Remove errant 'See'
27014 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27016 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
27017 REG_OK_FOR_BASE_P): Remove.
27019 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27021 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
27022 (=vd,vd,vr,vr): Ditto.
27023 * config/riscv/vector.md: Ditto.
27025 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27027 * config/riscv/riscv-vector-builtins.cc
27028 (function_expander::use_compare_insn): Add operand predicate check.
27030 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27032 * config/riscv/vector.md: Fine tune RA constraints.
27034 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
27036 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
27037 hsaco assemble/link.
27039 2023-03-13 Richard Biener <rguenther@suse.de>
27041 PR tree-optimization/109046
27042 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
27043 piecewise complex loads.
27045 2023-03-12 Jakub Jelinek <jakub@redhat.com>
27047 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
27048 (aarch64_bf16_ptr_type_node): Adjust comment.
27049 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
27050 bfloat16_type_node rather than aarch64_bf16_type_node.
27051 (aarch64_libgcc_floating_mode_supported_p,
27052 aarch64_scalar_mode_supported_p): Also support BFmode.
27053 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
27054 (aarch64_invalid_binary_op): Remove BFmode related rejections.
27055 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
27056 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
27057 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
27058 aarch64_bf16_type_node.
27059 (aarch64_init_simd_builtin_types): Likewise.
27060 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
27061 which is created in tree.cc already.
27062 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
27064 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
27066 PR middle-end/109031
27067 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
27068 ensure that the type of x is as wide or wider than the type of a.
27070 2023-03-12 Tamar Christina <tamar.christina@arm.com>
27073 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
27074 (*bitmask_shift_plus<mode>): New.
27075 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
27076 (@aarch64_bitmask_udiv<mode>3): Remove.
27077 * config/aarch64/aarch64.cc
27078 (aarch64_vectorize_can_special_div_by_constant,
27079 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
27080 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
27081 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
27083 2023-03-12 Tamar Christina <tamar.christina@arm.com>
27086 * target.def (preferred_div_as_shifts_over_mult): New.
27087 * doc/tm.texi.in: Document it.
27088 * doc/tm.texi: Regenerate.
27089 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
27090 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
27091 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
27093 2023-03-12 Tamar Christina <tamar.christina@arm.com>
27094 Richard Sandiford <richard.sandiford@arm.com>
27097 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
27100 2023-03-12 Tamar Christina <tamar.christina@arm.com>
27101 Andrew MacLeod <amacleod@redhat.com>
27104 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
27105 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
27107 (gimple_range_op_handler::maybe_non_standard): New.
27108 * range-op.cc (class operator_widen_plus_signed,
27109 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
27110 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
27111 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
27112 operator_widen_mult_unsigned::wi_fold,
27113 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
27114 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
27115 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
27116 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
27118 2023-03-12 Tamar Christina <tamar.christina@arm.com>
27121 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
27122 * doc/tm.texi.in: Likewise.
27123 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
27124 * expmed.cc (expand_divmod): Likewise.
27125 * expmed.h (expand_divmod): Likewise.
27126 * expr.cc (force_operand, expand_expr_divmod): Likewise.
27127 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
27128 * target.def (can_special_div_by_const): Remove.
27129 * target.h: Remove tree-core.h include
27130 * targhooks.cc (default_can_special_div_by_const): Remove.
27131 * targhooks.h (default_can_special_div_by_const): Remove.
27132 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
27133 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
27134 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
27136 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
27138 * doc/install.texi2html: Fix issue number typo in comment.
27140 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
27142 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
27145 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
27147 * doc/invoke.texi (Optimize Options): Add markup to
27148 description of asan-kernel-mem-intrinsic-prefix, and clarify
27151 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
27153 * doc/extend.texi (Named Address Spaces): Drop a redundant link
27156 2023-03-11 Jeff Law <jlaw@ventanamicro>
27159 * doc/extend.texi: Clarify Attribute Syntax a bit.
27161 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
27163 * doc/install.texi (Prerequisites): Suggest using newer versions
27165 (Final install): Clean up and modernize discussion of how to
27166 build or obtain the GCC manuals.
27167 * doc/install.texi2html: Update comment to point to the PR instead
27168 of "makeinfo 4.7 brokenness" (it's not specific to that version).
27170 2023-03-10 Jakub Jelinek <jakub@redhat.com>
27173 * optabs.cc (expand_fix): For conversions from BFmode to integral,
27174 use shifts to convert it to SFmode first and then convert SFmode
27177 2023-03-10 Andrew Pinski <apinski@marvell.com>
27179 * config/aarch64/aarch64.md: Add a new define_split
27182 2023-03-10 Richard Biener <rguenther@suse.de>
27184 * tree-ssa-structalias.cc (solve_graph): Immediately
27185 iterate self-cycles.
27187 2023-03-10 Jakub Jelinek <jakub@redhat.com>
27189 PR tree-optimization/109008
27190 * range-op-float.cc (float_widen_lhs_range): If not
27191 -frounding-math and not IBM double double format, extend lhs
27192 range just by 0.5ulp rather than 1ulp in each direction.
27194 2023-03-10 Jakub Jelinek <jakub@redhat.com>
27197 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
27199 * config/i386/t-cygwin-w64: Remove.
27201 2023-03-10 Jakub Jelinek <jakub@redhat.com>
27204 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
27205 C++14, don't declare as extern const arrays.
27206 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
27207 static constexpr member arrays for C++11 or C++14.
27208 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
27209 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
27210 (TREE_CODE_LENGTH): For C++11 or C++14 use
27211 tree_code_length_tmpl <0>::tree_code_length instead of
27213 * tree.cc (tree_code_type, tree_code_length): Remove.
27215 2023-03-10 Jakub Jelinek <jakub@redhat.com>
27218 * common.opt (fcanon-prefix-map): New option.
27219 * opts.cc: Include file-prefix-map.h.
27220 (flag_canon_prefix_map): New variable.
27221 (common_handle_option): Handle OPT_fcanon_prefix_map.
27222 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
27223 * file-prefix-map.h (flag_canon_prefix_map): Declare.
27224 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
27226 (add_prefix_map): Initialize canonicalize member from
27227 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
27228 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
27229 use lrealpath result only for map->canonicalize map entries.
27230 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
27231 * opts-global.cc (handle_common_deferred_options): Clear
27232 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
27233 * doc/invoke.texi (-fcanon-prefix-map): Document.
27234 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
27235 see also for -fcanon-prefix-map.
27236 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
27238 2023-03-10 Jakub Jelinek <jakub@redhat.com>
27241 * cgraphunit.cc (check_global_declaration): Don't warn for unused
27242 variables which have OPT_Wunused_variable warning suppressed.
27244 2023-03-10 Jakub Jelinek <jakub@redhat.com>
27246 PR tree-optimization/109008
27247 * range-op-float.cc (float_widen_lhs_range): If lb is
27248 minimum representable finite number or ub is maximum
27249 representable finite number, instead of widening it to
27250 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
27251 Temporarily clear flag_finite_math_only when canonicalizing
27254 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27256 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
27257 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
27258 (gimple_fold_builtin): Ditto.
27259 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
27260 (class vleff): Ditto.
27262 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
27263 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
27265 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
27266 (struct fault_load_def): Ditto.
27268 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
27269 * config/riscv/riscv-vector-builtins.cc
27270 (rvv_arg_type_info::get_tree_type): Add size_ptr.
27271 (gimple_folder::gimple_folder): New class.
27272 (gimple_folder::fold): Ditto.
27273 (gimple_fold_builtin): New function.
27274 (get_read_vl_instance): Ditto.
27275 (get_read_vl_decl): Ditto.
27276 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
27277 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
27278 (get_read_vl_instance): New function.
27279 (get_read_vl_decl): Ditto.
27280 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
27281 (read_vl_insn_p): Ditto.
27282 (available_occurrence_p): Ditto.
27283 (backward_propagate_worthwhile_p): Ditto.
27284 (gen_vsetvl_pat): Adapt for vleff support.
27285 (get_forward_read_vl_insn): New function.
27286 (get_backward_fault_first_load_insn): Ditto.
27287 (source_equal_p): Adapt for vleff support.
27288 (first_ratio_invalid_for_second_sew_p): Remove.
27289 (first_ratio_invalid_for_second_lmul_p): Ditto.
27290 (first_lmul_less_than_second_lmul_p): Ditto.
27291 (first_ratio_less_than_second_ratio_p): Ditto.
27292 (support_relaxed_compatible_p): New function.
27293 (vector_insn_info::operator>): Remove.
27294 (vector_insn_info::operator>=): Refine.
27295 (vector_insn_info::parse_insn): Adapt for vleff support.
27296 (vector_insn_info::compatible_p): Ditto.
27297 (vector_insn_info::update_fault_first_load_avl): New function.
27298 (pass_vsetvl::transfer_after): Adapt for vleff support.
27299 (pass_vsetvl::demand_fusion): Ditto.
27300 (pass_vsetvl::cleanup_insns): Ditto.
27301 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
27302 redundant condtions.
27303 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
27304 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
27305 * config/riscv/riscv.md: Adapt for vleff support.
27306 * config/riscv/t-riscv: Ditto.
27307 * config/riscv/vector-iterators.md: New iterator.
27308 * config/riscv/vector.md (read_vlsi): New pattern.
27309 (read_vldi_zero_extend): Ditto.
27310 (@pred_fault_load<mode>): Ditto.
27312 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27314 * config/riscv/riscv-vector-builtins.cc
27315 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
27316 (function_expander::use_widen_ternop_insn): Ditto.
27317 * optabs.cc (maybe_gen_insn): Extend nops handling.
27319 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27321 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
27322 patterns according to RVV ISA.
27323 * config/riscv/vector-iterators.md: New iterators.
27324 * config/riscv/vector.md
27325 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
27326 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
27327 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
27328 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
27329 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
27330 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
27331 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
27332 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
27333 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
27334 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
27335 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
27336 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
27337 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
27338 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
27340 2023-03-10 Michael Collison <collison@rivosinc.com>
27342 * tree-vect-loop-manip.cc (vect_do_peeling): Use
27343 result of constant_lower_bound instead of vf for the lower
27344 bound of the epilog loop trip count.
27346 2023-03-09 Tamar Christina <tamar.christina@arm.com>
27348 * passes.cc (emergency_dump_function): Finish graph generation.
27350 2023-03-09 Tamar Christina <tamar.christina@arm.com>
27352 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
27353 and bottom bit only.
27355 2023-03-09 Andrew Pinski <apinski@marvell.com>
27357 PR tree-optimization/108980
27358 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
27359 Reorgnize the call to warning for not strict flexible arrays
27360 to be before the check of warned.
27362 2023-03-09 Jason Merrill <jason@redhat.com>
27364 * doc/extend.texi: Comment out __is_deducible docs.
27366 2023-03-09 Jason Merrill <jason@redhat.com>
27369 * doc/extend.texi (Type Traits):: Document __is_deducible.
27371 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
27374 * config.host: add object for x86_64-*-mingw*.
27375 * config/i386/sym-mingw32.cc: dummy file to attach
27377 * config/i386/utf8-mingw32.rc: windres resource file.
27378 * config/i386/winnt-utf8.manifest: XML manifest to
27380 * config/i386/x-mingw32: reference to x-mingw32-utf8.
27381 * config/i386/x-mingw32-utf8: Makefile fragment to
27382 embed UTF-8 manifest.
27384 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
27386 * lra-constraints.cc (process_alt_operands): Use operand modes for
27387 clobbered regs instead of the biggest access mode.
27389 2023-03-09 Richard Biener <rguenther@suse.de>
27391 PR middle-end/108995
27392 * fold-const.cc (extract_muldiv_1): Avoid folding
27393 (CST * b) / CST2 when sanitizing overflow and we rely on
27394 overflow being undefined.
27396 2023-03-09 Jakub Jelinek <jakub@redhat.com>
27397 Richard Biener <rguenther@suse.de>
27399 PR tree-optimization/109008
27400 * range-op-float.cc (float_widen_lhs_range): New function.
27401 (foperator_plus::op1_range, foperator_minus::op1_range,
27402 foperator_minus::op2_range, foperator_mult::op1_range,
27403 foperator_div::op1_range, foperator_div::op2_range): Use it.
27405 2023-03-07 Jonathan Grant <jg@jguk.org>
27408 * doc/invoke.texi (Instrumentation Options): Clarify
27409 LeakSanitizer behavior.
27411 2023-03-07 Benson Muite <benson_muite@emailplus.org>
27413 * doc/install.texi (Prerequisites): Add link to gmplib.org.
27415 2023-03-07 Pan Li <pan2.li@intel.com>
27416 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27420 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
27422 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
27423 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
27424 * genmodes.cc (adj_precision): New.
27425 (ADJUST_PRECISION): New.
27426 (emit_mode_adjustments): Handle ADJUST_PRECISION.
27428 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
27430 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
27432 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
27434 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
27435 {s|u}{max|min} in QI, HI and DI modes.
27436 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
27437 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
27438 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
27439 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
27442 2023-03-06 Richard Biener <rguenther@suse.de>
27444 PR tree-optimization/109025
27445 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
27446 the inner LC PHI use is the inner loop PHI latch definition
27447 before classifying an outer PHI as double reduction.
27449 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
27452 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
27454 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
27455 (X86_TUNE_USE_SCATTER): Likewise.
27457 2023-03-06 Xi Ruoyao <xry111@xry111.site>
27460 * config/loongarch/loongarch.h (FP_RETURN): Use
27461 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
27462 (UNITS_PER_FP_ARG): Likewise.
27464 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27466 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
27467 (pass_vsetvl::backward_demand_fusion): Ditto.
27469 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
27470 SiYu Wu <siyu@isrc.iscas.ac.cn>
27472 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
27474 (riscv_sm3p1_<mode>): New.
27475 (riscv_sm4ed_<mode>): New.
27476 (riscv_sm4ks_<mode>): New.
27477 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
27478 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
27479 ZKSH's built-in functions.
27481 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
27482 SiYu Wu <siyu@isrc.iscas.ac.cn>
27484 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
27485 (riscv_sha256sig1_<mode>): New.
27486 (riscv_sha256sum0_<mode>): New.
27487 (riscv_sha256sum1_<mode>): New.
27488 (riscv_sha512sig0h): New.
27489 (riscv_sha512sig0l): New.
27490 (riscv_sha512sig1h): New.
27491 (riscv_sha512sig1l): New.
27492 (riscv_sha512sum0r): New.
27493 (riscv_sha512sum1r): New.
27494 (riscv_sha512sig0): New.
27495 (riscv_sha512sig1): New.
27496 (riscv_sha512sum0): New.
27497 (riscv_sha512sum1): New.
27498 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
27499 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
27500 built-in functions.
27501 (DIRECT_BUILTIN): Add new.
27503 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
27504 SiYu Wu <siyu@isrc.iscas.ac.cn>
27506 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
27508 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
27509 (riscv_aes32dsmi): New.
27510 (riscv_aes64ds): New.
27511 (riscv_aes64dsm): New.
27512 (riscv_aes64im): New.
27513 (riscv_aes64ks1i): New.
27514 (riscv_aes64ks2): New.
27515 (riscv_aes32esi): New.
27516 (riscv_aes32esmi): New.
27517 (riscv_aes64es): New.
27518 (riscv_aes64esm): New.
27519 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
27520 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
27521 ZKNE's built-in functions.
27523 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
27524 SiYu Wu <siyu@isrc.iscas.ac.cn>
27526 * config/riscv/bitmanip.md: Add ZBKB's instructions.
27527 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
27528 * config/riscv/riscv.md: Add new type for crypto instructions.
27529 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
27531 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
27532 extension's built-in function file.
27534 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
27535 SiYu Wu <siyu@isrc.iscas.ac.cn>
27537 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
27538 (RISCV_FTYPE_NAME3): New.
27539 (RISCV_ATYPE_QI): New.
27540 (RISCV_ATYPE_HI): New.
27541 (RISCV_FTYPE_ATYPES2): New.
27542 (RISCV_FTYPE_ATYPES3): New.
27543 * config/riscv/riscv-ftypes.def (2): New.
27546 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
27548 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
27551 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27552 kito-cheng <kito.cheng@sifive.com>
27554 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
27555 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
27556 (riscv_register_pragmas): Add builtin function check call.
27557 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
27558 (check_builtin_call): New function.
27559 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
27560 (class vreinterpret): Ditto.
27561 (class vlmul_ext): Ditto.
27562 (class vlmul_trunc): Ditto.
27563 (class vset): Ditto.
27564 (class vget): Ditto.
27566 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
27567 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
27583 (vundefined): Add new intrinsic.
27584 (vreinterpret): Ditto.
27585 (vlmul_ext): Ditto.
27586 (vlmul_trunc): Ditto.
27589 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
27590 (struct narrow_alu_def): Ditto.
27591 (struct reduc_alu_def): Ditto.
27592 (struct vundefined_def): Ditto.
27593 (struct misc_def): Ditto.
27594 (struct vset_def): Ditto.
27595 (struct vget_def): Ditto.
27597 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
27598 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
27599 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
27600 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
27601 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
27602 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
27603 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
27604 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
27605 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
27606 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
27607 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
27608 (DEF_RVV_LMUL1_OPS): Ditto.
27609 (DEF_RVV_LMUL2_OPS): Ditto.
27610 (DEF_RVV_LMUL4_OPS): Ditto.
27611 (vint16mf4_t): Ditto.
27612 (vint16mf2_t): Ditto.
27613 (vint16m1_t): Ditto.
27614 (vint16m2_t): Ditto.
27615 (vint16m4_t): Ditto.
27616 (vint16m8_t): Ditto.
27617 (vint32mf2_t): Ditto.
27618 (vint32m1_t): Ditto.
27619 (vint32m2_t): Ditto.
27620 (vint32m4_t): Ditto.
27621 (vint32m8_t): Ditto.
27622 (vint64m1_t): Ditto.
27623 (vint64m2_t): Ditto.
27624 (vint64m4_t): Ditto.
27625 (vint64m8_t): Ditto.
27626 (vuint16mf4_t): Ditto.
27627 (vuint16mf2_t): Ditto.
27628 (vuint16m1_t): Ditto.
27629 (vuint16m2_t): Ditto.
27630 (vuint16m4_t): Ditto.
27631 (vuint16m8_t): Ditto.
27632 (vuint32mf2_t): Ditto.
27633 (vuint32m1_t): Ditto.
27634 (vuint32m2_t): Ditto.
27635 (vuint32m4_t): Ditto.
27636 (vuint32m8_t): Ditto.
27637 (vuint64m1_t): Ditto.
27638 (vuint64m2_t): Ditto.
27639 (vuint64m4_t): Ditto.
27640 (vuint64m8_t): Ditto.
27641 (vint8mf4_t): Ditto.
27642 (vint8mf2_t): Ditto.
27643 (vint8m1_t): Ditto.
27644 (vint8m2_t): Ditto.
27645 (vint8m4_t): Ditto.
27646 (vint8m8_t): Ditto.
27647 (vuint8mf4_t): Ditto.
27648 (vuint8mf2_t): Ditto.
27649 (vuint8m1_t): Ditto.
27650 (vuint8m2_t): Ditto.
27651 (vuint8m4_t): Ditto.
27652 (vuint8m8_t): Ditto.
27653 (vint8mf8_t): Ditto.
27654 (vuint8mf8_t): Ditto.
27655 (vfloat32mf2_t): Ditto.
27656 (vfloat32m1_t): Ditto.
27657 (vfloat32m2_t): Ditto.
27658 (vfloat32m4_t): Ditto.
27659 (vfloat64m1_t): Ditto.
27660 (vfloat64m2_t): Ditto.
27661 (vfloat64m4_t): Ditto.
27662 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
27663 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
27664 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
27665 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
27666 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
27667 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
27668 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
27669 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
27670 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
27671 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
27672 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
27673 (DEF_RVV_LMUL1_OPS): Ditto.
27674 (DEF_RVV_LMUL2_OPS): Ditto.
27675 (DEF_RVV_LMUL4_OPS): Ditto.
27676 (DEF_RVV_TYPE_INDEX): Ditto.
27677 (required_extensions_p): Adapt for new intrinsic support/
27678 (get_required_extensions): New function.
27679 (check_required_extensions): Ditto.
27680 (unsigned_base_type_p): Remove.
27681 (rvv_arg_type_info::get_scalar_ptr_type): New function.
27682 (get_mode_for_bitsize): Remove.
27683 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
27684 (rvv_arg_type_info::get_base_vector_type): Ditto.
27685 (rvv_arg_type_info::get_function_type_index): Ditto.
27686 (DEF_RVV_BASE_TYPE): New def.
27687 (function_builder::apply_predication): New class.
27688 (function_expander::mask_mode): Ditto.
27689 (function_checker::function_checker): Ditto.
27690 (function_checker::report_non_ice): Ditto.
27691 (function_checker::report_out_of_range): Ditto.
27692 (function_checker::require_immediate): Ditto.
27693 (function_checker::require_immediate_range): Ditto.
27694 (function_checker::check): Ditto.
27695 (check_builtin_call): Ditto.
27696 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
27697 (DEF_RVV_BASE_TYPE): Ditto.
27698 (DEF_RVV_TYPE_INDEX): Ditto.
27699 (vbool64_t): Ditto.
27700 (vbool32_t): Ditto.
27701 (vbool16_t): Ditto.
27706 (vuint8mf8_t): Ditto.
27707 (vuint8mf4_t): Ditto.
27708 (vuint8mf2_t): Ditto.
27709 (vuint8m1_t): Ditto.
27710 (vuint8m2_t): Ditto.
27711 (vint8m4_t): Ditto.
27712 (vuint8m4_t): Ditto.
27713 (vint8m8_t): Ditto.
27714 (vuint8m8_t): Ditto.
27715 (vint16mf4_t): Ditto.
27716 (vuint16mf2_t): Ditto.
27717 (vuint16m1_t): Ditto.
27718 (vuint16m2_t): Ditto.
27719 (vuint16m4_t): Ditto.
27720 (vuint16m8_t): Ditto.
27721 (vint32mf2_t): Ditto.
27722 (vuint32m1_t): Ditto.
27723 (vuint32m2_t): Ditto.
27724 (vuint32m4_t): Ditto.
27725 (vuint32m8_t): Ditto.
27726 (vuint64m1_t): Ditto.
27727 (vuint64m2_t): Ditto.
27728 (vuint64m4_t): Ditto.
27729 (vuint64m8_t): Ditto.
27730 (vfloat32mf2_t): Ditto.
27731 (vfloat32m1_t): Ditto.
27732 (vfloat32m2_t): Ditto.
27733 (vfloat32m4_t): Ditto.
27734 (vfloat32m8_t): Ditto.
27735 (vfloat64m1_t): Ditto.
27736 (vfloat64m4_t): Ditto.
27737 (vector): Move it def.
27740 (signed_vector): Ditto.
27741 (unsigned_vector): Ditto.
27742 (unsigned_scalar): Ditto.
27743 (vector_ptr): Ditto.
27744 (scalar_ptr): Ditto.
27745 (scalar_const_ptr): Ditto.
27749 (unsigned_long): Ditto.
27751 (eew8_index): Ditto.
27752 (eew16_index): Ditto.
27753 (eew32_index): Ditto.
27754 (eew64_index): Ditto.
27755 (shift_vector): Ditto.
27756 (double_trunc_vector): Ditto.
27757 (quad_trunc_vector): Ditto.
27758 (oct_trunc_vector): Ditto.
27759 (double_trunc_scalar): Ditto.
27760 (double_trunc_signed_vector): Ditto.
27761 (double_trunc_unsigned_vector): Ditto.
27762 (double_trunc_unsigned_scalar): Ditto.
27763 (double_trunc_float_vector): Ditto.
27764 (float_vector): Ditto.
27765 (lmul1_vector): Ditto.
27766 (widen_lmul1_vector): Ditto.
27767 (eew8_interpret): Ditto.
27768 (eew16_interpret): Ditto.
27769 (eew32_interpret): Ditto.
27770 (eew64_interpret): Ditto.
27771 (vlmul_ext_x2): Ditto.
27772 (vlmul_ext_x4): Ditto.
27773 (vlmul_ext_x8): Ditto.
27774 (vlmul_ext_x16): Ditto.
27775 (vlmul_ext_x32): Ditto.
27776 (vlmul_ext_x64): Ditto.
27777 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
27778 (struct function_type_info): New function.
27779 (struct rvv_arg_type_info): Ditto.
27780 (class function_checker): New class.
27781 (rvv_arg_type_info::get_scalar_type): New function.
27782 (rvv_arg_type_info::get_vector_type): Ditto.
27783 (function_expander::ret_mode): New function.
27784 (function_checker::arg_mode): Ditto.
27785 (function_checker::ret_mode): Ditto.
27786 * config/riscv/t-riscv: Add generator.
27787 * config/riscv/vector-iterators.md: New iterators.
27788 * config/riscv/vector.md (vundefined<mode>): New pattern.
27789 (@vundefined<mode>): Ditto.
27790 (@vreinterpret<mode>): Ditto.
27791 (@vlmul_extx2<mode>): Ditto.
27792 (@vlmul_extx4<mode>): Ditto.
27793 (@vlmul_extx8<mode>): Ditto.
27794 (@vlmul_extx16<mode>): Ditto.
27795 (@vlmul_extx32<mode>): Ditto.
27796 (@vlmul_extx64<mode>): Ditto.
27797 (*vlmul_extx2<mode>): Ditto.
27798 (*vlmul_extx4<mode>): Ditto.
27799 (*vlmul_extx8<mode>): Ditto.
27800 (*vlmul_extx16<mode>): Ditto.
27801 (*vlmul_extx32<mode>): Ditto.
27802 (*vlmul_extx64<mode>): Ditto.
27803 * config/riscv/genrvv-type-indexer.cc: New file.
27805 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27807 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
27808 (slide1_sew64_helper): New function.
27809 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
27810 (get_unknown_min_value): Ditto.
27811 (force_vector_length_operand): Ditto.
27812 (gen_no_side_effects_vsetvl_rtx): Ditto.
27813 (get_vl_x2_rtx): Ditto.
27814 (slide1_sew64_helper): Ditto.
27815 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
27816 (class vrgather): Ditto.
27817 (class vrgatherei16): Ditto.
27818 (class vcompress): Ditto.
27820 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
27821 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
27822 (vslidedown): Ditto.
27823 (vslide1up): Ditto.
27824 (vslide1down): Ditto.
27825 (vfslide1up): Ditto.
27826 (vfslide1down): Ditto.
27828 (vrgatherei16): Ditto.
27829 (vcompress): Ditto.
27830 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
27831 (vint8mf8_t): Ditto.
27832 (vint8mf4_t): Ditto.
27833 (vint8mf2_t): Ditto.
27834 (vint8m1_t): Ditto.
27835 (vint8m2_t): Ditto.
27836 (vint8m4_t): Ditto.
27837 (vint16mf4_t): Ditto.
27838 (vint16mf2_t): Ditto.
27839 (vint16m1_t): Ditto.
27840 (vint16m2_t): Ditto.
27841 (vint16m4_t): Ditto.
27842 (vint16m8_t): Ditto.
27843 (vint32mf2_t): Ditto.
27844 (vint32m1_t): Ditto.
27845 (vint32m2_t): Ditto.
27846 (vint32m4_t): Ditto.
27847 (vint32m8_t): Ditto.
27848 (vint64m1_t): Ditto.
27849 (vint64m2_t): Ditto.
27850 (vint64m4_t): Ditto.
27851 (vint64m8_t): Ditto.
27852 (vuint8mf8_t): Ditto.
27853 (vuint8mf4_t): Ditto.
27854 (vuint8mf2_t): Ditto.
27855 (vuint8m1_t): Ditto.
27856 (vuint8m2_t): Ditto.
27857 (vuint8m4_t): Ditto.
27858 (vuint16mf4_t): Ditto.
27859 (vuint16mf2_t): Ditto.
27860 (vuint16m1_t): Ditto.
27861 (vuint16m2_t): Ditto.
27862 (vuint16m4_t): Ditto.
27863 (vuint16m8_t): Ditto.
27864 (vuint32mf2_t): Ditto.
27865 (vuint32m1_t): Ditto.
27866 (vuint32m2_t): Ditto.
27867 (vuint32m4_t): Ditto.
27868 (vuint32m8_t): Ditto.
27869 (vuint64m1_t): Ditto.
27870 (vuint64m2_t): Ditto.
27871 (vuint64m4_t): Ditto.
27872 (vuint64m8_t): Ditto.
27873 (vfloat32mf2_t): Ditto.
27874 (vfloat32m1_t): Ditto.
27875 (vfloat32m2_t): Ditto.
27876 (vfloat32m4_t): Ditto.
27877 (vfloat32m8_t): Ditto.
27878 (vfloat64m1_t): Ditto.
27879 (vfloat64m2_t): Ditto.
27880 (vfloat64m4_t): Ditto.
27881 (vfloat64m8_t): Ditto.
27882 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
27883 * config/riscv/riscv.md: Adjust RVV instruction types.
27884 * config/riscv/vector-iterators.md (down): New iterator.
27885 (=vd,vr): New attribute.
27886 (UNSPEC_VSLIDE1UP): New unspec.
27887 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
27888 (*pred_slide<ud><mode>): Ditto.
27889 (*pred_slide<ud><mode>_extended): Ditto.
27890 (@pred_gather<mode>): Ditto.
27891 (@pred_gather<mode>_scalar): Ditto.
27892 (@pred_gatherei16<mode>): Ditto.
27893 (@pred_compress<mode>): Ditto.
27895 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27897 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
27899 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27901 * config/riscv/constraints.md (Wb1): New constraint.
27902 * config/riscv/predicates.md
27903 (vector_least_significant_set_mask_operand): New predicate.
27904 (vector_broadcast_mask_operand): Ditto.
27905 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
27906 (gen_scalar_move_mask): New function.
27907 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
27908 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
27909 (class vmv_s): Ditto.
27911 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
27912 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
27916 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
27918 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
27919 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
27920 (function_expander::use_exact_insn): New function.
27921 (function_expander::use_contiguous_load_insn): New function.
27922 (function_expander::use_contiguous_store_insn): New function.
27923 (function_expander::use_ternop_insn): New function.
27924 (function_expander::use_widen_ternop_insn): New function.
27925 (function_expander::use_scalar_move_insn): New function.
27926 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
27927 * config/riscv/riscv-vector-builtins.h
27928 (function_expander::add_scalar_move_mask_operand): New class.
27929 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
27930 (scalar_move_insn_p): Ditto.
27931 (has_vsetvl_killed_avl_p): Ditto.
27932 (anticipatable_occurrence_p): Ditto.
27933 (insert_vsetvl): Ditto.
27934 (get_vl_vtype_info): Ditto.
27935 (calculate_sew): Ditto.
27936 (calculate_vlmul): Ditto.
27937 (incompatible_avl_p): Ditto.
27938 (different_sew_p): Ditto.
27939 (different_lmul_p): Ditto.
27940 (different_ratio_p): Ditto.
27941 (different_tail_policy_p): Ditto.
27942 (different_mask_policy_p): Ditto.
27943 (possible_zero_avl_p): Ditto.
27944 (first_ratio_invalid_for_second_sew_p): Ditto.
27945 (first_ratio_invalid_for_second_lmul_p): Ditto.
27946 (second_ratio_invalid_for_first_sew_p): Ditto.
27947 (second_ratio_invalid_for_first_lmul_p): Ditto.
27948 (second_sew_less_than_first_sew_p): Ditto.
27949 (first_sew_less_than_second_sew_p): Ditto.
27950 (compare_lmul): Ditto.
27951 (second_lmul_less_than_first_lmul_p): Ditto.
27952 (first_lmul_less_than_second_lmul_p): Ditto.
27953 (first_ratio_less_than_second_ratio_p): Ditto.
27954 (second_ratio_less_than_first_ratio_p): Ditto.
27955 (DEF_INCOMPATIBLE_COND): Ditto.
27956 (greatest_sew): Ditto.
27957 (first_sew): Ditto.
27958 (second_sew): Ditto.
27959 (first_vlmul): Ditto.
27960 (second_vlmul): Ditto.
27961 (first_ratio): Ditto.
27962 (second_ratio): Ditto.
27963 (vlmul_for_first_sew_second_ratio): Ditto.
27964 (ratio_for_second_sew_first_vlmul): Ditto.
27965 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
27966 (always_unavailable): Ditto.
27967 (avl_unavailable_p): Ditto.
27968 (sew_unavailable_p): Ditto.
27969 (lmul_unavailable_p): Ditto.
27970 (ge_sew_unavailable_p): Ditto.
27971 (ge_sew_lmul_unavailable_p): Ditto.
27972 (ge_sew_ratio_unavailable_p): Ditto.
27973 (DEF_UNAVAILABLE_COND): Ditto.
27974 (same_sew_lmul_demand_p): Ditto.
27975 (propagate_avl_across_demands_p): Ditto.
27976 (reg_available_p): Ditto.
27977 (avl_info::has_non_zero_avl): Ditto.
27978 (vl_vtype_info::has_non_zero_avl): Ditto.
27979 (vector_insn_info::operator>=): Refactor.
27980 (vector_insn_info::parse_insn): Adjust for scalar move.
27981 (vector_insn_info::demand_vl_vtype): Remove.
27982 (vector_insn_info::compatible_p): New function.
27983 (vector_insn_info::compatible_avl_p): Ditto.
27984 (vector_insn_info::compatible_vtype_p): Ditto.
27985 (vector_insn_info::available_p): Ditto.
27986 (vector_insn_info::merge): Ditto.
27987 (vector_insn_info::fuse_avl): Ditto.
27988 (vector_insn_info::fuse_sew_lmul): Ditto.
27989 (vector_insn_info::fuse_tail_policy): Ditto.
27990 (vector_insn_info::fuse_mask_policy): Ditto.
27991 (vector_insn_info::dump): Ditto.
27992 (vector_infos_manager::release): Ditto.
27993 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
27994 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
27995 (pass_vsetvl::hard_empty_block_p): Ditto.
27996 (pass_vsetvl::backward_demand_fusion): Ditto.
27997 (pass_vsetvl::forward_demand_fusion): Ditto.
27998 (pass_vsetvl::refine_vsetvls): Ditto.
27999 (pass_vsetvl::cleanup_vsetvls): Ditto.
28000 (pass_vsetvl::commit_vsetvls): Ditto.
28001 (pass_vsetvl::propagate_avl): Ditto.
28002 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
28003 (struct demands_pair): Ditto.
28004 (struct demands_cond): Ditto.
28005 (struct demands_fuse_rule): Ditto.
28006 * config/riscv/vector-iterators.md: New iterator.
28007 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
28008 (*pred_broadcast<mode>): Ditto.
28009 (*pred_broadcast<mode>_extended_scalar): Ditto.
28010 (@pred_extract_first<mode>): Ditto.
28011 (*pred_extract_first<mode>): Ditto.
28012 (@pred_extract_first_trunc<mode>): Ditto.
28013 * config/riscv/riscv-vsetvl.def: New file.
28015 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
28017 * config/riscv/bitmanip.md: allow 0 constant in max/min
28020 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
28022 * config/riscv/bitmanip.md: Fix wrong index in the check.
28024 2023-03-04 Jakub Jelinek <jakub@redhat.com>
28026 PR middle-end/109006
28027 * vec.cc (test_auto_alias): Adjust comment for removal of
28029 * read-rtl-function.cc (function_reader::parse_block): Likewise.
28030 * gdbhooks.py: Likewise.
28032 2023-03-04 Jakub Jelinek <jakub@redhat.com>
28034 PR testsuite/108973
28035 * selftest-diagnostic.cc
28036 (test_diagnostic_context::test_diagnostic_context): Set
28037 caret_max_width to 80.
28039 2023-03-03 Alexandre Oliva <oliva@adacore.com>
28041 * gimple-ssa-warn-access.cc
28042 (pass_waccess::check_dangling_stores): Skip non-stores.
28044 2023-03-03 Alexandre Oliva <oliva@adacore.com>
28046 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
28047 after vmsr and vmrs, and lower the case of P0.
28049 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
28051 PR middle-end/109006
28052 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
28054 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
28056 PR middle-end/109006
28057 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
28059 2023-03-03 Jakub Jelinek <jakub@redhat.com>
28062 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
28063 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
28064 suppressed on stmt. For [static %E] warning, print access_nelts
28065 rather than access_size. Fix up comment wording.
28067 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
28069 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
28070 arch14 instead of z16.
28072 2023-03-03 Anthony Green <green@moxielogic.com>
28074 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
28076 2023-03-03 Anthony Green <green@moxielogic.com>
28078 * config/moxie/constraints.md (A, B, W): Change
28079 define_constraint to define_memory_constraint.
28081 2023-03-03 Xi Ruoyao <xry111@xry111.site>
28083 * toplev.cc (process_options): Fix the spelling of
28084 "-fstack-clash-protection".
28086 2023-03-03 Richard Biener <rguenther@suse.de>
28088 PR tree-optimization/109002
28089 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
28090 PHI-translate ANTIC_IN.
28092 2023-03-03 Jakub Jelinek <jakub@redhat.com>
28094 PR tree-optimization/108988
28095 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
28096 size_type_node before passing it as argument to fwrite. Formatting
28099 2023-03-03 Richard Biener <rguenther@suse.de>
28102 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
28103 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
28104 * config/i386/i386-features.h (scalar_chain::max_visits): New.
28105 (scalar_chain::build): Add bitmap parameter, return boolean.
28106 (scalar_chain::add_insn): Likewise.
28107 (scalar_chain::analyze_register_chain): Likewise.
28108 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
28109 Initialize max_visits.
28110 (scalar_chain::analyze_register_chain): When we exhaust
28111 max_visits, abort. Also abort when running into any
28113 (scalar_chain::add_insn): Propagate abort.
28114 (scalar_chain::build): Likewise. When aborting amend
28115 the set of disallowed insn with the insns set.
28116 (convert_scalars_to_vector): Adjust. Do not convert aborted
28119 2023-03-03 Richard Biener <rguenther@suse.de>
28122 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
28123 generate a DIE for a function scope static.
28125 2023-03-03 Alexandre Oliva <oliva@adacore.com>
28127 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
28129 2023-03-02 Jakub Jelinek <jakub@redhat.com>
28132 * target.h (emit_support_tinfos_callback): New typedef.
28133 * targhooks.h (default_emit_support_tinfos): Declare.
28134 * targhooks.cc (default_emit_support_tinfos): New function.
28135 * target.def (emit_support_tinfos): New target hook.
28136 * doc/tm.texi.in (emit_support_tinfos): Document it.
28137 * doc/tm.texi: Regenerated.
28138 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
28139 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
28141 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
28143 * ira-costs.cc: Include print-rtl.h.
28144 (record_reg_classes, scan_one_insn): Add code to print debug info.
28145 (record_operand_costs): Find and use smaller cost for hard reg
28148 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
28149 Paul-Antoine Arras <pa@codesourcery.com>
28151 * builtins.cc (mathfn_built_in_explicit): New.
28152 * config/gcn/gcn.cc: Include case-cfn-macros.h.
28153 (mathfn_built_in_explicit): Add prototype.
28154 (gcn_vectorize_builtin_vectorized_function): New.
28155 (gcn_libc_has_function): New.
28156 (TARGET_LIBC_HAS_FUNCTION): Define.
28157 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
28159 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
28161 PR tree-optimization/108979
28162 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
28163 operations on invariants.
28165 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
28167 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
28168 * config/s390/s390.cc (s390_option_override_internal): Make
28169 partial vector usage the default from z13 on.
28170 * config/s390/vector.md (len_load_v16qi): Add.
28171 (len_store_v16qi): Add.
28173 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
28175 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
28176 of constant 0 offset.
28178 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
28180 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
28182 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
28184 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
28186 * config.gcc: add -with-{no-}msa build option.
28187 * config/mips/mips.h: Likewise.
28188 * doc/install.texi: Likewise.
28190 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
28192 PR tree-optimization/108603
28193 * explow.cc (convert_memory_address_addr_space_1): Only wrap
28194 the result of a recursive call in a CONST if no instructions
28197 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
28199 PR tree-optimization/108430
28200 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
28201 of inverted condition.
28203 2023-03-02 Jakub Jelinek <jakub@redhat.com>
28206 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
28207 comparison copy the bytes from ptr to a temporary buffer and clearing
28208 padding bits in there.
28210 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
28212 PR middle-end/108545
28213 * gimplify.cc (struct tree_operand_hash_no_se): New.
28214 (omp_index_mapping_groups_1, omp_index_mapping_groups,
28215 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
28216 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
28217 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
28218 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
28219 of tree_operand_hash.
28221 2023-03-01 LIU Hao <lh_mouse@126.com>
28224 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
28225 Remove the size limit `pch_VA_max_size`
28227 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
28229 PR middle-end/108546
28230 * omp-low.cc (lower_omp_target): Remove optional handling
28231 on the receiver side, i.e. inside target (data), for
28234 2023-03-01 Jakub Jelinek <jakub@redhat.com>
28237 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
28238 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
28240 2023-03-01 Richard Biener <rguenther@suse.de>
28242 PR tree-optimization/108970
28243 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
28244 Check we can copy the BBs.
28245 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
28247 (vect_do_peeling): Streamline error handling.
28249 2023-03-01 Richard Biener <rguenther@suse.de>
28251 PR tree-optimization/108950
28252 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
28253 Check oprnd0 is defined in the loop.
28254 * tree-vect-loop.cc (vectorizable_reduction): Record all
28255 operands vector types, compute that of invariants and
28256 properly update their SLP nodes.
28258 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
28261 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
28262 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
28264 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
28266 PR middle-end/107411
28267 PR middle-end/107411
28268 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
28270 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
28271 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
28273 2023-02-28 Jakub Jelinek <jakub@redhat.com>
28275 PR sanitizer/108894
28276 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
28277 comparison rather than index > bound.
28278 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
28279 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
28280 * doc/invoke.texi (-fsanitize=bounds): Document that whether
28281 flexible array member-like arrays are instrumented or not depends
28282 on -fstrict-flex-arrays* options of strict_flex_array attributes.
28283 (-fsanitize=bounds-strict): Document that flexible array members
28284 are not instrumented.
28286 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
28290 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
28291 (fmod<mode>3): Ditto.
28292 (fpremxf4_i387): Ditto.
28293 (reminderxf3): Ditto.
28294 (reminder<mode>3): Ditto.
28295 (fprem1xf4_i387): Ditto.
28297 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
28299 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
28300 generating FFS with mismatched operand and result modes, by using
28301 an explicit SIGN_EXTEND/ZERO_EXTEND.
28302 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
28303 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
28305 2023-02-27 Patrick Palka <ppalka@redhat.com>
28307 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
28308 * lra-int.h (lra_change_class): Likewise.
28309 * recog.h (which_op_alt): Likewise.
28310 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
28313 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28315 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
28317 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
28319 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
28320 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
28322 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
28324 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
28325 (xtensa_get_config_v3): New functions.
28327 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28329 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
28331 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
28333 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
28334 the macro to 0x1000000000.
28336 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
28339 * doc/gm2.texi (-fm2-pathname): New option documented.
28340 (-fm2-pathnameI): New option documented.
28341 (-fm2-prefix=): New option documented.
28342 (-fruntime-modules=): Update default module list.
28344 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
28347 * config/xtensa/xtensa-protos.h
28348 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
28349 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
28350 to xtensa_expand_call.
28351 (xtensa_expand_call): Emit the call and add a clobber expression
28352 for the static chain to it in case of windowed ABI.
28353 * config/xtensa/xtensa.md (call, call_value, sibcall)
28354 (sibcall_value): Call xtensa_expand_call and complete expansion
28355 right after that call.
28357 2023-02-24 Richard Biener <rguenther@suse.de>
28359 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
28360 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
28361 changing alignment of vec<T, A, vl_embed> and simplifying
28363 (vec<T, A, vl_embed>::address): Compute as this + 1.
28364 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
28365 vector instead of the offset of the m_vecdata member.
28366 (auto_vec<T, N>::m_data): Turn storage into
28367 uninitialized unsigned char.
28368 (auto_vec<T, N>::auto_vec): Allow allocation of one
28369 stack member. Initialize m_vec in a special way to
28370 avoid later stringop overflow diagnostics.
28371 * vec.cc (test_auto_alias): New.
28372 (vec_cc_tests): Call it.
28374 2023-02-24 Richard Biener <rguenther@suse.de>
28376 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
28377 take a const reference to the object, use address to
28379 (vec<T, A, vl_embed>::contains): Use address to access data.
28380 (vec<T, A, vl_embed>::operator[]): Use address instead of
28381 m_vecdata to access data.
28382 (vec<T, A, vl_embed>::iterate): Likewise.
28383 (vec<T, A, vl_embed>::copy): Likewise.
28384 (vec<T, A, vl_embed>::quick_push): Likewise.
28385 (vec<T, A, vl_embed>::pop): Likewise.
28386 (vec<T, A, vl_embed>::quick_insert): Likewise.
28387 (vec<T, A, vl_embed>::ordered_remove): Likewise.
28388 (vec<T, A, vl_embed>::unordered_remove): Likewise.
28389 (vec<T, A, vl_embed>::block_remove): Likewise.
28390 (vec<T, A, vl_heap>::address): Likewise.
28392 2023-02-24 Martin Liska <mliska@suse.cz>
28394 PR sanitizer/108834
28395 * asan.cc (asan_add_global): Use proper TU name for normal
28396 global variables (and aux_base_name for the artificial one).
28398 2023-02-24 Jakub Jelinek <jakub@redhat.com>
28400 * config/i386/i386-builtin.def: Update description of BDESC
28401 and BDESC_FIRST in file comment to include mask2.
28403 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28405 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
28407 2023-02-24 Jakub Jelinek <jakub@redhat.com>
28409 PR middle-end/108854
28410 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
28411 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
28412 nodes and adjust their DECL_CONTEXT.
28414 2023-02-24 Jakub Jelinek <jakub@redhat.com>
28417 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
28418 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
28419 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
28420 __builtin_ia32_cvtne2ps2bf16_v8bf,
28421 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
28422 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
28423 __builtin_ia32_cvtneps2bf16_v8sf_mask,
28424 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
28425 __builtin_ia32_cvtneps2bf16_v4sf_mask,
28426 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
28427 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
28428 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
28429 __builtin_ia32_dpbf16ps_v4sf_mask,
28430 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
28431 OPTION_MASK_ISA_AVX512VL.
28433 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
28435 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
28436 Add non-compact 32-bit multilibs.
28438 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
28440 * config/mips/mips.md (*clo<mode>2): New pattern.
28442 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
28444 * config/mips/mips.h (machine_function): New variable
28445 use_hazard_barrier_return_p.
28446 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
28447 (mips_hb_return_internal): New insn pattern.
28448 * config/mips/mips.cc (mips_attribute_table): Add attribute
28449 use_hazard_barrier_return.
28450 (mips_use_hazard_barrier_return_p): New static function.
28451 (mips_function_attr_inlinable_p): Likewise.
28452 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
28453 Emit error for unsupported architecture choice.
28454 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
28455 Return false for use_hazard_barrier_return.
28456 (mips_expand_epilogue): Emit hazard barrier return.
28457 * doc/extend.texi: Document use_hazard_barrier_return.
28459 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
28461 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
28462 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
28463 for the gcc-internal headers.
28465 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
28467 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
28468 and $(POSTCOMPILE) instead of manual dependency listing.
28469 * config/xtensa/xtensa-dynconfig.c: Rename to ...
28470 * config/xtensa/xtensa-dynconfig.cc: ... this.
28472 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
28474 * doc/cfg.texi: Reorder index entries around @items.
28475 * doc/cpp.texi: Ditto.
28476 * doc/cppenv.texi: Ditto.
28477 * doc/cppopts.texi: Ditto.
28478 * doc/generic.texi: Ditto.
28479 * doc/install.texi: Ditto.
28480 * doc/extend.texi: Ditto.
28481 * doc/invoke.texi: Ditto.
28482 * doc/md.texi: Ditto.
28483 * doc/rtl.texi: Ditto.
28484 * doc/tm.texi.in: Ditto.
28485 * doc/trouble.texi: Ditto.
28486 * doc/tm.texi: Regenerate.
28488 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28490 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
28491 the occurrence of general-purpose register used only once and for
28492 transferring intermediate value.
28494 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28496 * config/xtensa/xtensa.cc (machine_function): Add new member
28497 'eliminated_callee_saved_bmp'.
28498 (xtensa_can_eliminate_callee_saved_reg_p): New function to
28499 determine whether the register can be eliminated or not.
28500 (xtensa_expand_prologue): Add invoking the above function and
28501 elimination the use of callee-saved register by using its stack
28502 slot through the stack pointer (or the frame pointer if needed)
28504 (xtensa_expand_prologue): Modify to not emit register restoration
28505 insn from its stack slot if the register is already eliminated.
28507 2023-02-23 Jakub Jelinek <jakub@redhat.com>
28509 PR translation/108890
28510 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
28511 around fatal_error format strings.
28513 2023-02-23 Richard Biener <rguenther@suse.de>
28515 * tree-ssa-structalias.cc (handle_lhs_call): Do not
28516 re-create rhsc, only truncate it.
28518 2023-02-23 Jakub Jelinek <jakub@redhat.com>
28520 PR middle-end/106258
28521 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
28522 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
28524 2023-02-23 Richard Biener <rguenther@suse.de>
28526 * tree-if-conv.cc (tree_if_conversion): Properly manage
28527 memory of refs and the contained data references.
28529 2023-02-23 Richard Biener <rguenther@suse.de>
28531 PR tree-optimization/108888
28532 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
28533 calls to predicate.
28534 (predicate_statements): Only predicate calls with PLF_2.
28536 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28538 * config/xtensa/xtensa.md
28539 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
28540 Add missing "SI:" to PLUS RTXes.
28542 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
28545 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
28546 Emit (use (reg:SI A0_REG)) at the end in the sibling call
28547 (i.e. the same place as (return) in the normal call).
28549 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
28552 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
28555 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
28557 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
28558 (sibcall_value, sibcall_value_internal): Add 'use' expression
28561 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
28563 * doc/cppdiropts.texi: Reorder @opindex commands to precede
28564 @items they relate to.
28565 * doc/cppopts.texi: Ditto.
28566 * doc/cppwarnopts.texi: Ditto.
28567 * doc/invoke.texi: Ditto.
28568 * doc/lto.texi: Ditto.
28570 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
28572 * internal-fn.cc (expand_MASK_CALL): New.
28573 * internal-fn.def (MASK_CALL): New.
28574 * internal-fn.h (expand_MASK_CALL): New prototype.
28575 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
28576 for mask arguments also.
28577 * tree-if-conv.cc: Include cgraph.h.
28578 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
28579 (predicate_statements): Convert functions to IFN_MASK_CALL.
28580 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
28581 IFN_MASK_CALL as a SIMD function call.
28582 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
28583 IFN_MASK_CALL as an inbranch SIMD function call.
28584 Generate the mask vector arguments.
28586 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28588 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
28589 (class widen_reducop): Ditto.
28590 (class freducop): Ditto.
28591 (class widen_freducop): Ditto.
28593 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
28594 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
28603 (vwredsumu): Ditto.
28604 (vfredusum): Ditto.
28605 (vfredosum): Ditto.
28608 (vfwredosum): Ditto.
28609 (vfwredusum): Ditto.
28610 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
28612 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
28613 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
28614 (DEF_RVV_WU_OPS): Ditto.
28615 (DEF_RVV_WF_OPS): Ditto.
28616 (vint8mf8_t): Ditto.
28617 (vint8mf4_t): Ditto.
28618 (vint8mf2_t): Ditto.
28619 (vint8m1_t): Ditto.
28620 (vint8m2_t): Ditto.
28621 (vint8m4_t): Ditto.
28622 (vint8m8_t): Ditto.
28623 (vint16mf4_t): Ditto.
28624 (vint16mf2_t): Ditto.
28625 (vint16m1_t): Ditto.
28626 (vint16m2_t): Ditto.
28627 (vint16m4_t): Ditto.
28628 (vint16m8_t): Ditto.
28629 (vint32mf2_t): Ditto.
28630 (vint32m1_t): Ditto.
28631 (vint32m2_t): Ditto.
28632 (vint32m4_t): Ditto.
28633 (vint32m8_t): Ditto.
28634 (vuint8mf8_t): Ditto.
28635 (vuint8mf4_t): Ditto.
28636 (vuint8mf2_t): Ditto.
28637 (vuint8m1_t): Ditto.
28638 (vuint8m2_t): Ditto.
28639 (vuint8m4_t): Ditto.
28640 (vuint8m8_t): Ditto.
28641 (vuint16mf4_t): Ditto.
28642 (vuint16mf2_t): Ditto.
28643 (vuint16m1_t): Ditto.
28644 (vuint16m2_t): Ditto.
28645 (vuint16m4_t): Ditto.
28646 (vuint16m8_t): Ditto.
28647 (vuint32mf2_t): Ditto.
28648 (vuint32m1_t): Ditto.
28649 (vuint32m2_t): Ditto.
28650 (vuint32m4_t): Ditto.
28651 (vuint32m8_t): Ditto.
28652 (vfloat32mf2_t): Ditto.
28653 (vfloat32m1_t): Ditto.
28654 (vfloat32m2_t): Ditto.
28655 (vfloat32m4_t): Ditto.
28656 (vfloat32m8_t): Ditto.
28657 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
28658 (DEF_RVV_WU_OPS): Ditto.
28659 (DEF_RVV_WF_OPS): Ditto.
28660 (required_extensions_p): Add reduction support.
28661 (rvv_arg_type_info::get_base_vector_type): Ditto.
28662 (rvv_arg_type_info::get_tree_type): Ditto.
28663 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
28664 * config/riscv/riscv.md: Ditto.
28665 * config/riscv/vector-iterators.md (minu): Ditto.
28666 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
28667 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
28668 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
28669 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
28670 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
28671 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
28672 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
28674 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28676 * config/riscv/iterators.md: New iterator.
28677 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
28678 (enum ternop_type): New enum.
28679 (class vmacc): New class.
28680 (class imac): Ditto.
28681 (class vnmsac): Ditto.
28682 (enum widen_ternop_type): New enum.
28683 (class vmadd): Ditto.
28684 (class vnmsub): Ditto.
28685 (class iwmac): Ditto.
28686 (class vwmacc): Ditto.
28687 (class vwmaccu): Ditto.
28688 (class vwmaccsu): Ditto.
28689 (class vwmaccus): Ditto.
28690 (class reverse_binop): Ditto.
28691 (class vfmacc): Ditto.
28692 (class vfnmsac): Ditto.
28693 (class vfmadd): Ditto.
28694 (class vfnmsub): Ditto.
28695 (class vfnmacc): Ditto.
28696 (class vfmsac): Ditto.
28697 (class vfnmadd): Ditto.
28698 (class vfmsub): Ditto.
28699 (class vfwmacc): Ditto.
28700 (class vfwnmacc): Ditto.
28701 (class vfwmsac): Ditto.
28702 (class vfwnmsac): Ditto.
28703 (class float_misc): Ditto.
28704 (class fcmp): Ditto.
28705 (class vfclass): Ditto.
28706 (class vfcvt_x): Ditto.
28707 (class vfcvt_rtz_x): Ditto.
28708 (class vfcvt_f): Ditto.
28709 (class vfwcvt_x): Ditto.
28710 (class vfwcvt_rtz_x): Ditto.
28711 (class vfwcvt_f): Ditto.
28712 (class vfncvt_x): Ditto.
28713 (class vfncvt_rtz_x): Ditto.
28714 (class vfncvt_f): Ditto.
28715 (class vfncvt_rod_f): Ditto.
28717 * config/riscv/riscv-vector-builtins-bases.h:
28718 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
28762 (vfcvt_rtz_x): Ditto.
28763 (vfcvt_rtz_xu): Ditto.
28766 (vfwcvt_xu): Ditto.
28767 (vfwcvt_rtz_x): Ditto.
28768 (vfwcvt_rtz_xu): Ditto.
28771 (vfncvt_xu): Ditto.
28772 (vfncvt_rtz_x): Ditto.
28773 (vfncvt_rtz_xu): Ditto.
28775 (vfncvt_rod_f): Ditto.
28776 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
28777 (struct move_def): Ditto.
28778 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
28779 (DEF_RVV_CONVERT_I_OPS): Ditto.
28780 (DEF_RVV_CONVERT_U_OPS): Ditto.
28781 (DEF_RVV_WCONVERT_I_OPS): Ditto.
28782 (DEF_RVV_WCONVERT_U_OPS): Ditto.
28783 (DEF_RVV_WCONVERT_F_OPS): Ditto.
28784 (vfloat64m1_t): Ditto.
28785 (vfloat64m2_t): Ditto.
28786 (vfloat64m4_t): Ditto.
28787 (vfloat64m8_t): Ditto.
28788 (vint32mf2_t): Ditto.
28789 (vint32m1_t): Ditto.
28790 (vint32m2_t): Ditto.
28791 (vint32m4_t): Ditto.
28792 (vint32m8_t): Ditto.
28793 (vint64m1_t): Ditto.
28794 (vint64m2_t): Ditto.
28795 (vint64m4_t): Ditto.
28796 (vint64m8_t): Ditto.
28797 (vuint32mf2_t): Ditto.
28798 (vuint32m1_t): Ditto.
28799 (vuint32m2_t): Ditto.
28800 (vuint32m4_t): Ditto.
28801 (vuint32m8_t): Ditto.
28802 (vuint64m1_t): Ditto.
28803 (vuint64m2_t): Ditto.
28804 (vuint64m4_t): Ditto.
28805 (vuint64m8_t): Ditto.
28806 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
28807 (DEF_RVV_CONVERT_U_OPS): Ditto.
28808 (DEF_RVV_WCONVERT_I_OPS): Ditto.
28809 (DEF_RVV_WCONVERT_U_OPS): Ditto.
28810 (DEF_RVV_WCONVERT_F_OPS): Ditto.
28811 (DEF_RVV_F_OPS): Ditto.
28812 (DEF_RVV_WEXTF_OPS): Ditto.
28813 (required_extensions_p): Adjust for floating-point support.
28814 (check_required_extensions): Ditto.
28815 (unsigned_base_type_p): Ditto.
28816 (get_mode_for_bitsize): Ditto.
28817 (rvv_arg_type_info::get_base_vector_type): Ditto.
28818 (rvv_arg_type_info::get_tree_type): Ditto.
28819 * config/riscv/riscv-vector-builtins.def (v_f): New define.
28822 (xu_v): New define.
28824 (xu_w): New define.
28825 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
28826 (function_expander::arg_mode): New function.
28827 * config/riscv/vector-iterators.md (sof): New iterator.
28833 (fixuns_trunc): Ditto.
28835 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
28836 (@pred_<optab><mode>): Ditto.
28837 (@pred_<optab><mode>_scalar): Ditto.
28838 (@pred_<optab><mode>_reverse_scalar): Ditto.
28839 (@pred_<copysign><mode>): Ditto.
28840 (@pred_<copysign><mode>_scalar): Ditto.
28841 (@pred_mul_<optab><mode>): Ditto.
28842 (pred_mul_<optab><mode>_undef_merge): Ditto.
28843 (*pred_<madd_nmsub><mode>): Ditto.
28844 (*pred_<macc_nmsac><mode>): Ditto.
28845 (*pred_mul_<optab><mode>): Ditto.
28846 (@pred_mul_<optab><mode>_scalar): Ditto.
28847 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
28848 (*pred_<madd_nmsub><mode>_scalar): Ditto.
28849 (*pred_<macc_nmsac><mode>_scalar): Ditto.
28850 (*pred_mul_<optab><mode>_scalar): Ditto.
28851 (@pred_neg_mul_<optab><mode>): Ditto.
28852 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
28853 (*pred_<nmadd_msub><mode>): Ditto.
28854 (*pred_<nmacc_msac><mode>): Ditto.
28855 (*pred_neg_mul_<optab><mode>): Ditto.
28856 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
28857 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
28858 (*pred_<nmadd_msub><mode>_scalar): Ditto.
28859 (*pred_<nmacc_msac><mode>_scalar): Ditto.
28860 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
28861 (@pred_<misc_op><mode>): Ditto.
28862 (@pred_class<mode>): Ditto.
28863 (@pred_dual_widen_<optab><mode>): Ditto.
28864 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
28865 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
28866 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
28867 (@pred_widen_mul_<optab><mode>): Ditto.
28868 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
28869 (@pred_widen_neg_mul_<optab><mode>): Ditto.
28870 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
28871 (@pred_cmp<mode>): Ditto.
28872 (*pred_cmp<mode>): Ditto.
28873 (*pred_cmp<mode>_narrow): Ditto.
28874 (@pred_cmp<mode>_scalar): Ditto.
28875 (*pred_cmp<mode>_scalar): Ditto.
28876 (*pred_cmp<mode>_scalar_narrow): Ditto.
28877 (@pred_eqne<mode>_scalar): Ditto.
28878 (*pred_eqne<mode>_scalar): Ditto.
28879 (*pred_eqne<mode>_scalar_narrow): Ditto.
28880 (@pred_merge<mode>_scalar): Ditto.
28881 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
28882 (@pred_<fix_cvt><mode>): Ditto.
28883 (@pred_<float_cvt><mode>): Ditto.
28884 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
28885 (@pred_widen_<fix_cvt><mode>): Ditto.
28886 (@pred_widen_<float_cvt><mode>): Ditto.
28887 (@pred_extend<mode>): Ditto.
28888 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
28889 (@pred_narrow_<fix_cvt><mode>): Ditto.
28890 (@pred_narrow_<float_cvt><mode>): Ditto.
28891 (@pred_trunc<mode>): Ditto.
28892 (@pred_rod_trunc<mode>): Ditto.
28894 2023-02-22 Jakub Jelinek <jakub@redhat.com>
28896 PR middle-end/106258
28897 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
28898 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
28899 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
28900 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
28902 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
28904 * common.opt (-Wcomplain-wrong-lang): New.
28905 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
28906 * opts-common.cc (prune_options): Handle it.
28907 * opts-global.cc (complain_wrong_lang): Use it.
28909 2023-02-21 David Malcolm <dmalcolm@redhat.com>
28912 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
28914 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
28917 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
28919 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
28920 (sibcall_value, sibcall_value_internal): Add 'use' expression
28923 2023-02-21 Richard Biener <rguenther@suse.de>
28925 PR tree-optimization/108691
28926 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
28927 assert about calls_setjmp not becoming true when it was false.
28929 2023-02-21 Richard Biener <rguenther@suse.de>
28931 PR tree-optimization/108793
28932 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
28933 Use convert operands to niter_type when computing num.
28935 2023-02-21 Richard Biener <rguenther@suse.de>
28938 2023-02-13 Richard Biener <rguenther@suse.de>
28940 PR tree-optimization/108691
28941 * tree-cfg.cc (notice_special_calls): When the CFG is built
28942 honor gimple_call_ctrl_altering_p.
28943 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
28944 temporarily if the call is not control-altering.
28945 * calls.cc (emit_call_1): Do not add REG_SETJMP if
28946 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
28948 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28950 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
28951 true if register A0 (return address register) when -Og is specified.
28953 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
28955 * config/i386/predicates.md
28956 (general_x64constmem_operand): New predicate.
28957 * config/i386/i386.md (*cmpqi_ext<mode>_1):
28958 Use nonimm_x64constmem_operand.
28959 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
28960 (*addqi_ext<mode>_1): Ditto.
28961 (*testqi_ext<mode>_1): Ditto.
28962 (*andqi_ext<mode>_1): Ditto.
28963 (*andqi_ext<mode>_1_cc): Ditto.
28964 (*<any_or:code>qi_ext<mode>_1): Ditto.
28965 (*xorqi_ext<mode>_1_cc): Ditto.
28967 2023-02-20 Jakub Jelinek <jakub2redhat.com>
28970 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
28971 gen_umadddi4_highpart{,_le}.
28973 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
28975 * config/riscv/riscv.md (prefetch): Use r instead of p for the
28977 (riscv_prefetchi_<mode>): Ditto.
28979 2023-02-20 Richard Biener <rguenther@suse.de>
28981 PR tree-optimization/108816
28982 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
28983 versioning condition split prerequesite, assert required
28986 2023-02-20 Richard Biener <rguenther@suse.de>
28988 PR tree-optimization/108825
28989 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
28990 loop-local verfication only verify there's no pending SSA
28993 2023-02-20 Richard Biener <rguenther@suse.de>
28995 PR tree-optimization/108819
28996 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
28997 we have an SSA name as iv_2 as expected.
28999 2023-02-18 Jakub Jelinek <jakub@redhat.com>
29001 PR tree-optimization/108819
29002 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
29004 2023-02-18 Jakub Jelinek <jakub@redhat.com>
29007 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
29008 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
29010 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
29011 with ix86_replace_reg_with_reg.
29013 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
29015 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
29017 2023-02-18 Xi Ruoyao <xry111@xry111.site>
29019 * config.gcc (triplet_abi): Set its value based on $with_abi,
29020 instead of $target.
29021 (la_canonical_triplet): Set it after $triplet_abi is set
29023 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
29024 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
29027 2023-02-18 Andrew Pinski <apinski@marvell.com>
29029 * match.pd: Remove #if GIMPLE around the
29032 2023-02-18 Andrew Pinski <apinski@marvell.com>
29034 * value-query.h (get_range_query): Return the global ranges
29035 for a nullptr func.
29037 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
29039 * doc/invoke.texi (@item -Wall): Fix typo in
29042 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
29045 * config/i386/predicates.md
29046 (nonimm_x64constmem_operand): New predicate.
29047 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
29048 (*subqi_ext<mode>_0): Ditto.
29049 (*andqi_ext<mode>_0): Ditto.
29050 (*<any_or:code>qi_ext<mode>_0): Ditto.
29052 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
29055 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
29056 int_outermode instead of GET_MODE (tem) to prevent
29057 VOIDmode from entering simplify_gen_subreg.
29059 2023-02-17 Richard Biener <rguenther@suse.de>
29061 PR tree-optimization/108821
29062 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
29063 move volatile accesses.
29065 2023-02-17 Richard Biener <rguenther@suse.de>
29067 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
29068 called on virtual operands.
29069 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
29070 ssa_undefined_value_p calls.
29071 (vn_phi_insert): Likewise.
29072 (set_ssa_val_to): Likewise.
29073 (visit_phi): Avoid extra work with equivalences for
29074 virtual operand PHIs.
29076 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29078 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
29080 (class mask_nlogic): Ditto.
29081 (class mask_notlogic): Ditto.
29082 (class vmmv): Ditto.
29083 (class vmclr): Ditto.
29084 (class vmset): Ditto.
29085 (class vmnot): Ditto.
29086 (class vcpop): Ditto.
29087 (class vfirst): Ditto.
29088 (class mask_misc): Ditto.
29089 (class viota): Ditto.
29090 (class vid): Ditto.
29092 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29093 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
29112 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
29113 (struct mask_alu_def): Ditto.
29115 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
29116 * config/riscv/riscv-vector-builtins.cc: Ditto.
29117 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
29118 for dest it scalar RVV intrinsics.
29119 * config/riscv/vector-iterators.md (sof): New iterator.
29120 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
29121 (@pred_<optab>not<mode>): New pattern.
29122 (@pred_popcount<VB:mode><P:mode>): New pattern.
29123 (@pred_ffs<VB:mode><P:mode>): New pattern.
29124 (@pred_<misc_op><mode>): New pattern.
29125 (@pred_iota<mode>): New pattern.
29126 (@pred_series<mode>): New pattern.
29128 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29130 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
29134 * config/riscv/riscv-vector-builtins.cc: Ditto.
29136 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29137 kito-cheng <kito.cheng@sifive.com>
29139 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
29140 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
29141 (sew64_scalar_helper): New function.
29142 * config/riscv/vector.md: Normalization.
29144 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29146 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
29208 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29210 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
29211 (@pred_<optab><mode>_scalar): Ditto.
29212 (*pred_<optab><mode>_scalar): Ditto.
29213 (*pred_<optab><mode>_extended_scalar): Ditto.
29215 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29217 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
29218 (init_builtins): Ditto.
29219 (mangle_builtin_type): Ditto.
29220 (verify_type_context): Ditto.
29221 (handle_pragma_vector): Ditto.
29222 (builtin_decl): Ditto.
29223 (expand_builtin): Ditto.
29224 (const_vec_all_same_in_range_p): Ditto.
29225 (legitimize_move): Ditto.
29226 (emit_vlmax_op): Ditto.
29227 (emit_nonvlmax_op): Ditto.
29228 (get_vlmul): Ditto.
29229 (get_ratio): Ditto.
29232 (get_avl_type): Ditto.
29233 (calculate_ratio): Ditto.
29234 (enum vlmul_type): Ditto.
29236 (neg_simm5_p): Ditto.
29237 (has_vi_variant_p): Ditto.
29239 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29241 * config/riscv/riscv-protos.h (simm32_p): Remove.
29242 * config/riscv/riscv-v.cc (simm32_p): Ditto.
29243 * config/riscv/vector.md: Use immediate_operand
29244 instead of riscv_vector::simm32_p.
29246 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
29248 * doc/invoke.texi (Optimize Options): Reword the explanation
29249 getting minimal, maximal and default values of a parameter.
29251 2023-02-16 Patrick Palka <ppalka@redhat.com>
29253 * addresses.h: Mechanically drop 'static' from 'static inline'
29254 functions via s/^static inline/inline/g.
29255 * asan.h: Likewise.
29256 * attribs.h: Likewise.
29257 * basic-block.h: Likewise.
29258 * bitmap.h: Likewise.
29259 * cfghooks.h: Likewise.
29260 * cfgloop.h: Likewise.
29261 * cgraph.h: Likewise.
29262 * cselib.h: Likewise.
29263 * data-streamer.h: Likewise.
29264 * debug.h: Likewise.
29266 * diagnostic.h: Likewise.
29267 * dominance.h: Likewise.
29268 * dumpfile.h: Likewise.
29269 * emit-rtl.h: Likewise.
29270 * except.h: Likewise.
29271 * expmed.h: Likewise.
29272 * expr.h: Likewise.
29273 * fixed-value.h: Likewise.
29274 * gengtype.h: Likewise.
29275 * gimple-expr.h: Likewise.
29276 * gimple-iterator.h: Likewise.
29277 * gimple-predict.h: Likewise.
29278 * gimple-range-fold.h: Likewise.
29279 * gimple-ssa.h: Likewise.
29280 * gimple.h: Likewise.
29281 * graphite.h: Likewise.
29282 * hard-reg-set.h: Likewise.
29283 * hash-map.h: Likewise.
29284 * hash-set.h: Likewise.
29285 * hash-table.h: Likewise.
29286 * hwint.h: Likewise.
29287 * input.h: Likewise.
29288 * insn-addr.h: Likewise.
29289 * internal-fn.h: Likewise.
29290 * ipa-fnsummary.h: Likewise.
29291 * ipa-icf-gimple.h: Likewise.
29292 * ipa-inline.h: Likewise.
29293 * ipa-modref.h: Likewise.
29294 * ipa-prop.h: Likewise.
29295 * ira-int.h: Likewise.
29297 * lra-int.h: Likewise.
29299 * lto-streamer.h: Likewise.
29300 * memmodel.h: Likewise.
29301 * omp-general.h: Likewise.
29302 * optabs-query.h: Likewise.
29303 * optabs.h: Likewise.
29304 * plugin.h: Likewise.
29305 * pretty-print.h: Likewise.
29306 * range.h: Likewise.
29307 * read-md.h: Likewise.
29308 * recog.h: Likewise.
29309 * regs.h: Likewise.
29310 * rtl-iter.h: Likewise.
29312 * sbitmap.h: Likewise.
29313 * sched-int.h: Likewise.
29314 * sel-sched-ir.h: Likewise.
29315 * sese.h: Likewise.
29316 * sparseset.h: Likewise.
29317 * ssa-iterators.h: Likewise.
29318 * system.h: Likewise.
29319 * target-globals.h: Likewise.
29320 * target.h: Likewise.
29321 * timevar.h: Likewise.
29322 * tree-chrec.h: Likewise.
29323 * tree-data-ref.h: Likewise.
29324 * tree-iterator.h: Likewise.
29325 * tree-outof-ssa.h: Likewise.
29326 * tree-phinodes.h: Likewise.
29327 * tree-scalar-evolution.h: Likewise.
29328 * tree-sra.h: Likewise.
29329 * tree-ssa-alias.h: Likewise.
29330 * tree-ssa-live.h: Likewise.
29331 * tree-ssa-loop-manip.h: Likewise.
29332 * tree-ssa-loop.h: Likewise.
29333 * tree-ssa-operands.h: Likewise.
29334 * tree-ssa-propagate.h: Likewise.
29335 * tree-ssa-sccvn.h: Likewise.
29336 * tree-ssa.h: Likewise.
29337 * tree-ssanames.h: Likewise.
29338 * tree-streamer.h: Likewise.
29339 * tree-switch-conversion.h: Likewise.
29340 * tree-vectorizer.h: Likewise.
29341 * tree.h: Likewise.
29342 * wide-int.h: Likewise.
29344 2023-02-16 Jakub Jelinek <jakub@redhat.com>
29346 PR tree-optimization/108657
29347 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
29348 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
29349 is a call to internal or builtin function.
29351 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
29353 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
29354 using-declaration to unhide functions.
29356 2023-02-16 Jakub Jelinek <jakub@redhat.com>
29358 PR tree-optimization/108783
29359 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
29360 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
29361 t to curr->op. Otherwise, punt if either newop1 or newop2 are
29362 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
29364 2023-02-16 Richard Biener <rguenther@suse.de>
29366 PR tree-optimization/108791
29367 * tree-ssa-forwprop.cc (optimize_vector_load): Build
29368 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
29371 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
29374 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
29375 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
29376 (ix86_expand_prologue): Likewise.
29378 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
29380 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
29382 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
29384 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
29385 int248_register_operand predicate in zero_extract sub-RTX.
29386 (*cmpqi_ext<mode>_2): Ditto.
29387 (*cmpqi_ext<mode>_3): Ditto.
29388 (*cmpqi_ext<mode>_4): Ditto.
29389 (*extzvqi_mem_rex64): Ditto.
29391 (*insvqi_1_mem_rex64): Ditto.
29392 (@insv<mode>_1): Ditto.
29393 (*insvqi_1): Ditto.
29394 (*insvqi_2): Ditto.
29395 (*insvqi_3): Ditto.
29396 (*extendqi<SWI24:mode>_ext_1): Ditto.
29397 (*addqi_ext<mode>_1): Ditto.
29398 (*addqi_ext<mode>_2): Ditto.
29399 (*subqi_ext<mode>_2): Ditto.
29400 (*testqi_ext<mode>_1): Ditto.
29401 (*testqi_ext<mode>_2): Ditto.
29402 (*andqi_ext<mode>_1): Ditto.
29403 (*andqi_ext<mode>_1_cc): Ditto.
29404 (*andqi_ext<mode>_2): Ditto.
29405 (*<any_or:code>qi_ext<mode>_1): Ditto.
29406 (*<any_or:code>qi_ext<mode>_2): Ditto.
29407 (*xorqi_ext<mode>_1_cc): Ditto.
29408 (*negqi_ext<mode>_2): Ditto.
29409 (*ashlqi_ext<mode>_2): Ditto.
29410 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
29412 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
29414 * config/i386/predicates.md (int248_register_operand):
29415 Rename from extr_register_operand.
29416 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
29417 (*extzx<mode>): Ditto.
29418 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
29419 (*ashl<mode>3_mask): Ditto.
29420 (*<any_shiftrt:insn><mode>3_mask): Ditto.
29421 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
29422 (*<any_rotate:insn><mode>3_mask): Ditto.
29423 (*<btsc><mode>_mask): Ditto.
29424 (*btr<mode>_mask): Ditto.
29425 (*jcc_bt<mode>_mask_1): Ditto.
29427 2023-02-15 Richard Biener <rguenther@suse.de>
29429 PR middle-end/26854
29430 * df-core.cc (df_worklist_propagate_forward): Put later
29431 blocks on worklist and only earlier blocks on pending.
29432 (df_worklist_propagate_backward): Likewise.
29433 (df_worklist_dataflow_doublequeue): Change the iteration
29434 to process new blocks in the same iteration if that
29435 maintains the iteration order.
29437 2023-02-15 Marek Polacek <polacek@redhat.com>
29439 PR middle-end/106080
29440 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
29443 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29445 * config/riscv/predicates.md: Refine codes.
29446 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
29447 * config/riscv/riscv-v.cc: Refine codes.
29448 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
29450 (class imac): New class.
29451 (enum widen_ternop_type): New enum.
29452 (class iwmac): New class.
29454 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29455 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
29463 * config/riscv/riscv-vector-builtins.cc
29464 (function_builder::apply_predication): Adjust for multiply-add support.
29465 (function_expander::add_vundef_operand): Refine codes.
29466 (function_expander::use_ternop_insn): New function.
29467 (function_expander::use_widen_ternop_insn): Ditto.
29468 * config/riscv/riscv-vector-builtins.h: New function.
29469 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
29470 (pred_mul_<optab><mode>_undef_merge): Ditto.
29471 (*pred_<madd_nmsub><mode>): Ditto.
29472 (*pred_<macc_nmsac><mode>): Ditto.
29473 (*pred_mul_<optab><mode>): Ditto.
29474 (@pred_mul_<optab><mode>_scalar): Ditto.
29475 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
29476 (*pred_<madd_nmsub><mode>_scalar): Ditto.
29477 (*pred_<macc_nmsac><mode>_scalar): Ditto.
29478 (*pred_mul_<optab><mode>_scalar): Ditto.
29479 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
29480 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
29481 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
29482 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
29483 (@pred_widen_mul_plus<su><mode>): Ditto.
29484 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
29485 (@pred_widen_mul_plussu<mode>): Ditto.
29486 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
29487 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
29489 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29491 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
29492 (vector_all_trues_mask_operand): New predicate.
29493 (vector_undef_operand): New predicate.
29494 (ltge_operator): New predicate.
29495 (comparison_except_ltge_operator): New predicate.
29496 (comparison_except_eqge_operator): New predicate.
29497 (ge_operator): New predicate.
29498 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
29499 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
29501 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29502 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
29512 * config/riscv/riscv-vector-builtins-shapes.cc
29513 (struct return_mask_def): Adjust for compare support.
29514 * config/riscv/riscv-vector-builtins.cc
29515 (function_expander::use_compare_insn): New function.
29516 * config/riscv/riscv-vector-builtins.h
29517 (function_expander::add_integer_operand): Ditto.
29518 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
29519 * config/riscv/riscv.md: Add vector min/max attributes.
29520 * config/riscv/vector-iterators.md (xnor): New iterator.
29521 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
29522 (*pred_cmp<mode>): Ditto.
29523 (*pred_cmp<mode>_narrow): Ditto.
29524 (@pred_ltge<mode>): Ditto.
29525 (*pred_ltge<mode>): Ditto.
29526 (*pred_ltge<mode>_narrow): Ditto.
29527 (@pred_cmp<mode>_scalar): Ditto.
29528 (*pred_cmp<mode>_scalar): Ditto.
29529 (*pred_cmp<mode>_scalar_narrow): Ditto.
29530 (@pred_eqne<mode>_scalar): Ditto.
29531 (*pred_eqne<mode>_scalar): Ditto.
29532 (*pred_eqne<mode>_scalar_narrow): Ditto.
29533 (*pred_cmp<mode>_extended_scalar): Ditto.
29534 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
29535 (*pred_eqne<mode>_extended_scalar): Ditto.
29536 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
29537 (@pred_ge<mode>_scalar): Ditto.
29538 (@pred_<optab><mode>): Ditto.
29539 (@pred_n<optab><mode>): Ditto.
29540 (@pred_<optab>n<mode>): Ditto.
29541 (@pred_not<mode>): Ditto.
29543 2023-02-15 Martin Jambor <mjambor@suse.cz>
29546 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
29547 creation of non-scalar replacements even if IPA-CP knows their
29550 2023-02-15 Jakub Jelinek <jakub@redhat.com>
29554 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
29555 expander, change operand 3 to be TImode, emit maddlddi4 and
29556 umadddi4_highpart{,_le} with its low half and finally add the high
29557 half to the result.
29559 2023-02-15 Martin Liska <mliska@suse.cz>
29561 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
29563 2023-02-15 Richard Biener <rguenther@suse.de>
29565 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
29566 for with_poison and alias worklist to it.
29567 (sanitize_asan_mark_poison): Likewise.
29569 2023-02-15 Richard Biener <rguenther@suse.de>
29572 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
29573 Combine bitmap test and set.
29574 (scalar_chain::add_insn): Likewise.
29575 (scalar_chain::analyze_register_chain): Remove redundant
29576 attempt to add to queue and instead strengthen assert.
29577 Sink common attempts to mark the def dual-mode.
29578 (scalar_chain::add_to_queue): Remove redundant insn bitmap
29581 2023-02-15 Richard Biener <rguenther@suse.de>
29584 * config/i386/i386-features.cc (convert_scalars_to_vector):
29585 Switch candidates bitmaps to tree view before building the chains.
29587 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
29589 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
29590 "failure trying to reload" call.
29592 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
29594 * gdbinit.in (phrs): New command.
29595 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
29596 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
29598 2023-02-14 David Faust <david.faust@oracle.com>
29601 * config/bpf/constraints.md (q): New memory constraint.
29602 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
29603 (zero_extendqidi2): Likewise.
29604 (zero_extendsidi2): Likewise.
29605 (*mov<MM:mode>): Likewise.
29607 2023-02-14 Andrew Pinski <apinski@marvell.com>
29609 PR tree-optimization/108355
29610 PR tree-optimization/96921
29611 * match.pd: Add pattern for "1 - bool_val".
29613 2023-02-14 Richard Biener <rguenther@suse.de>
29615 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
29616 basic block index hashing on the availability of ->cclhs.
29617 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
29618 rely on ->cclhs availability.
29619 (vn_phi_lookup): Set ->cclhs only when we are eventually
29620 going to CSE the PHI.
29621 (vn_phi_insert): Likewise.
29623 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
29625 * gimplify.cc (gimplify_save_expr): Add missing guard.
29627 2023-02-14 Richard Biener <rguenther@suse.de>
29629 PR tree-optimization/108782
29630 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
29631 Make sure we're not vectorizing an inner loop.
29633 2023-02-14 Jakub Jelinek <jakub@redhat.com>
29635 PR sanitizer/108777
29636 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
29637 * asan.h (asan_memfn_rtl): Declare.
29638 * asan.cc (asan_memfn_rtls): New variable.
29639 (asan_memfn_rtl): New function.
29640 * builtins.cc (expand_builtin): If
29641 param_asan_kernel_mem_intrinsic_prefix and function is
29642 kernel-{,hw}address sanitized, emit calls to
29643 __{,hw}asan_{memcpy,memmove,memset} rather than
29644 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
29645 instead of flag_sanitize & SANITIZE_ADDRESS to check if
29646 asan_intercepted_p functions shouldn't be expanded inline.
29648 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
29650 PR tree-optimization/96373
29651 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
29652 operations on the loop mask. Reject partial vectors if this isn't
29655 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
29657 PR rtl-optimization/108681
29658 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
29659 code to handle bare uses and clobbers.
29661 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
29663 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
29664 caller_save_p flag when clearing defined_p flag.
29665 (setup_reg_equiv): Ditto.
29666 * lra-constraints.cc (lra_constraints): Ditto.
29668 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
29671 * config/i386/predicates.md (extr_register_operand):
29672 New special predicate.
29673 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
29674 as operand 1 predicate.
29675 (*exzv<mode>): Ditto.
29676 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
29678 2023-02-13 Richard Biener <rguenther@suse.de>
29680 PR tree-optimization/28614
29681 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
29682 walking all edges in most cases.
29683 (vn_nary_op_insert_pieces_predicated): Avoid repeated
29684 calls to can_track_predicate_on_edge unless checking is
29686 (process_bb): Instead call it once here for each edge
29687 we register possibly multiple predicates on.
29689 2023-02-13 Richard Biener <rguenther@suse.de>
29691 PR tree-optimization/108691
29692 * tree-cfg.cc (notice_special_calls): When the CFG is built
29693 honor gimple_call_ctrl_altering_p.
29694 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
29695 temporarily if the call is not control-altering.
29696 * calls.cc (emit_call_1): Do not add REG_SETJMP if
29697 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
29699 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
29702 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
29703 (struct s390_sched_state): Initialise to zero.
29704 (s390_sched_variable_issue): For better debuggability also emit
29706 (s390_sched_init): Unconditionally reset scheduler state.
29708 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
29710 * ifcvt.h (noce_if_info::cond_inverted): New field.
29711 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
29712 values when cond_inverted is true.
29713 (noce_find_if_block): Allow the condition to be inverted when
29714 handling conditional moves.
29716 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
29718 * config/s390/predicates.md (execute_operation): Use
29719 constrain_operands instead of extract_constrain_insn in order to
29720 determine wheter there exists a valid alternative.
29722 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
29724 * common/config/arc/arc-common.cc (arc_option_optimization_table):
29725 Remove millicode from list.
29727 2023-02-13 Martin Liska <mliska@suse.cz>
29729 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
29731 2023-02-13 Richard Biener <rguenther@suse.de>
29733 PR tree-optimization/106722
29734 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
29735 whether we marked a stmt.
29736 (mark_control_dependent_edges_necessary): When
29737 mark_last_stmt_necessary didn't mark any stmt make sure
29738 to mark its control dependent edges.
29739 (propagate_necessity): Likewise.
29741 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
29743 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
29744 (DWARF_FRAME_REGISTERS): New.
29745 (DWARF_REG_TO_UNWIND_COLUMN): New.
29747 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
29749 * doc/sourcebuild.texi: Remove (broken) direct reference to
29750 "The GNU configure and build system".
29752 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
29754 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
29755 gen_add3_insn to gen_rtx_SET.
29756 (riscv_adjust_libcall_cfi_epilogue): Likewise.
29758 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29760 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
29761 (class vnclip): Ditto.
29763 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29764 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
29773 * config/riscv/vector-iterators.md (su): Add instruction.
29776 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
29777 (@pred_<sat_op><mode>_scalar): Ditto.
29778 (*pred_<sat_op><mode>_scalar): Ditto.
29779 (*pred_<sat_op><mode>_extended_scalar): Ditto.
29780 (@pred_narrow_clip<v_su><mode>): Ditto.
29781 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
29783 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29785 * config/riscv/constraints.md (Wbr): Remove unused constraint.
29786 * config/riscv/predicates.md: Fix move operand predicate.
29787 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
29788 (class vncvt_x): Ditto.
29789 (class vmerge): Ditto.
29790 (class vmv_v): Ditto.
29792 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29793 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
29800 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
29801 (struct move_def): Ditto.
29803 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
29804 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
29805 (DEF_RVV_WEXTU_OPS): Ditto
29806 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
29811 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
29812 * config/riscv/vector-iterators.md (nmsac):New iterator.
29813 (nmsub): New iterator.
29814 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
29815 (@pred_merge<mode>_scalar): New pattern.
29816 (*pred_merge<mode>_scalar): New pattern.
29817 (*pred_merge<mode>_extended_scalar): New pattern.
29818 (@pred_narrow_<optab><mode>): New pattern.
29819 (@pred_narrow_<optab><mode>_scalar): New pattern.
29820 (@pred_trunc<mode>): New pattern.
29822 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29824 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
29825 (class vmsbc): Ditto.
29826 (BASE): Define new class.
29827 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29828 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
29830 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
29833 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
29834 * config/riscv/riscv-vector-builtins.cc
29835 (function_expander::use_exact_insn): Adjust for new support
29836 * config/riscv/riscv-vector-builtins.h
29837 (function_base::has_merge_operand_p): New function.
29838 * config/riscv/vector-iterators.md: New iterator.
29839 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
29840 (@pred_msbc<mode>): Ditto.
29841 (@pred_madc<mode>_scalar): Ditto.
29842 (@pred_msbc<mode>_scalar): Ditto.
29843 (*pred_madc<mode>_scalar): Ditto.
29844 (*pred_madc<mode>_extended_scalar): Ditto.
29845 (*pred_msbc<mode>_scalar): Ditto.
29846 (*pred_msbc<mode>_extended_scalar): Ditto.
29847 (@pred_madc<mode>_overflow): Ditto.
29848 (@pred_msbc<mode>_overflow): Ditto.
29849 (@pred_madc<mode>_overflow_scalar): Ditto.
29850 (@pred_msbc<mode>_overflow_scalar): Ditto.
29851 (*pred_madc<mode>_overflow_scalar): Ditto.
29852 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
29853 (*pred_msbc<mode>_overflow_scalar): Ditto.
29854 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
29856 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29858 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
29859 * config/riscv/riscv-v.cc (simm32_p): Ditto.
29860 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
29861 (class vsbc): Ditto.
29863 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29864 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
29866 * config/riscv/riscv-vector-builtins-shapes.cc
29867 (struct no_mask_policy_def): Ditto.
29869 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
29870 * config/riscv/riscv-vector-builtins.cc
29871 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
29872 (rvv_arg_type_info::get_tree_type): Ditto.
29873 (function_expander::use_exact_insn): Ditto.
29874 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
29875 (function_base::use_mask_predication_p): New function.
29876 * config/riscv/vector-iterators.md: New iterator.
29877 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
29878 (@pred_sbc<mode>): Ditto.
29879 (@pred_adc<mode>_scalar): Ditto.
29880 (@pred_sbc<mode>_scalar): Ditto.
29881 (*pred_adc<mode>_scalar): Ditto.
29882 (*pred_adc<mode>_extended_scalar): Ditto.
29883 (*pred_sbc<mode>_scalar): Ditto.
29884 (*pred_sbc<mode>_extended_scalar): Ditto.
29886 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29888 * config/riscv/vector.md: use "zero" reg.
29890 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29892 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
29894 (class vwmulsu): Ditto.
29895 (class vwcvt): Ditto.
29896 (BASE): Add integer widening support.
29897 * config/riscv/riscv-vector-builtins-bases.h: Ditto
29898 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
29899 (vwsub): New class.
29900 (vwmul): New class.
29901 (vwmulu): New class.
29902 (vwmulsu): New class.
29903 (vwaddu): New class.
29904 (vwsubu): New class.
29905 (vwcvt_x): New class.
29906 (vwcvtu_x): New class.
29907 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
29909 (struct widen_alu_def): New class.
29910 (SHAPE): New class.
29911 * config/riscv/riscv-vector-builtins-shapes.h: New class.
29912 * config/riscv/riscv-vector-builtins.cc
29913 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
29914 (rvv_arg_type_info::get_tree_type): Ditto.
29915 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
29917 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
29919 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
29920 * config/riscv/riscv.h (X0_REGNUM): New constant.
29921 * config/riscv/vector-iterators.md: New iterators.
29922 * config/riscv/vector.md
29923 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
29925 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
29927 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
29928 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
29930 (@pred_widen_mulsu<mode>): Ditto.
29931 (@pred_widen_mulsu<mode>_scalar): Ditto.
29932 (@pred_<optab><mode>): Ditto.
29934 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29935 kito-cheng <kito.cheng@sifive.com>
29937 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
29938 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
29940 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29941 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
29945 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
29947 (DEF_RVV_FULL_V_U_OPS): Ditto.
29948 (vint8mf8_t): Ditto.
29949 (vint8mf4_t): Ditto.
29950 (vint8mf2_t): Ditto.
29951 (vint8m1_t): Ditto.
29952 (vint8m2_t): Ditto.
29953 (vint8m4_t): Ditto.
29954 (vint8m8_t): Ditto.
29955 (vint16mf4_t): Ditto.
29956 (vint16mf2_t): Ditto.
29957 (vint16m1_t): Ditto.
29958 (vint16m2_t): Ditto.
29959 (vint16m4_t): Ditto.
29960 (vint16m8_t): Ditto.
29961 (vint32mf2_t): Ditto.
29962 (vint32m1_t): Ditto.
29963 (vint32m2_t): Ditto.
29964 (vint32m4_t): Ditto.
29965 (vint32m8_t): Ditto.
29966 (vint64m1_t): Ditto.
29967 (vint64m2_t): Ditto.
29968 (vint64m4_t): Ditto.
29969 (vint64m8_t): Ditto.
29970 (vuint8mf8_t): Ditto.
29971 (vuint8mf4_t): Ditto.
29972 (vuint8mf2_t): Ditto.
29973 (vuint8m1_t): Ditto.
29974 (vuint8m2_t): Ditto.
29975 (vuint8m4_t): Ditto.
29976 (vuint8m8_t): Ditto.
29977 (vuint16mf4_t): Ditto.
29978 (vuint16mf2_t): Ditto.
29979 (vuint16m1_t): Ditto.
29980 (vuint16m2_t): Ditto.
29981 (vuint16m4_t): Ditto.
29982 (vuint16m8_t): Ditto.
29983 (vuint32mf2_t): Ditto.
29984 (vuint32m1_t): Ditto.
29985 (vuint32m2_t): Ditto.
29986 (vuint32m4_t): Ditto.
29987 (vuint32m8_t): Ditto.
29988 (vuint64m1_t): Ditto.
29989 (vuint64m2_t): Ditto.
29990 (vuint64m4_t): Ditto.
29991 (vuint64m8_t): Ditto.
29992 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
29993 (DEF_RVV_FULL_V_U_OPS): Ditto.
29994 (check_required_extensions): Add vmulh support.
29995 (rvv_arg_type_info::get_tree_type): Ditto.
29996 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
29997 (enum rvv_base_type): Ditto.
29998 * config/riscv/riscv.opt: Add 'V' extension flag.
29999 * config/riscv/vector-iterators.md (su): New iterator.
30000 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
30001 (@pred_mulh<v_su><mode>_scalar): Ditto.
30002 (*pred_mulh<v_su><mode>_scalar): Ditto.
30003 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
30005 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30007 * config/riscv/iterators.md: Add sign_extend/zero_extend.
30008 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
30010 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
30011 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
30014 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
30015 for vsext/vzext support.
30016 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
30018 (DEF_RVV_QEXTI_OPS): Ditto.
30019 (DEF_RVV_OEXTI_OPS): Ditto.
30020 (DEF_RVV_WEXTU_OPS): Ditto.
30021 (DEF_RVV_QEXTU_OPS): Ditto.
30022 (DEF_RVV_OEXTU_OPS): Ditto.
30023 (vint16mf4_t): Ditto.
30024 (vint16mf2_t): Ditto.
30025 (vint16m1_t): Ditto.
30026 (vint16m2_t): Ditto.
30027 (vint16m4_t): Ditto.
30028 (vint16m8_t): Ditto.
30029 (vint32mf2_t): Ditto.
30030 (vint32m1_t): Ditto.
30031 (vint32m2_t): Ditto.
30032 (vint32m4_t): Ditto.
30033 (vint32m8_t): Ditto.
30034 (vint64m1_t): Ditto.
30035 (vint64m2_t): Ditto.
30036 (vint64m4_t): Ditto.
30037 (vint64m8_t): Ditto.
30038 (vuint16mf4_t): Ditto.
30039 (vuint16mf2_t): Ditto.
30040 (vuint16m1_t): Ditto.
30041 (vuint16m2_t): Ditto.
30042 (vuint16m4_t): Ditto.
30043 (vuint16m8_t): Ditto.
30044 (vuint32mf2_t): Ditto.
30045 (vuint32m1_t): Ditto.
30046 (vuint32m2_t): Ditto.
30047 (vuint32m4_t): Ditto.
30048 (vuint32m8_t): Ditto.
30049 (vuint64m1_t): Ditto.
30050 (vuint64m2_t): Ditto.
30051 (vuint64m4_t): Ditto.
30052 (vuint64m8_t): Ditto.
30053 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
30054 (DEF_RVV_QEXTI_OPS): Ditto.
30055 (DEF_RVV_OEXTI_OPS): Ditto.
30056 (DEF_RVV_WEXTU_OPS): Ditto.
30057 (DEF_RVV_QEXTU_OPS): Ditto.
30058 (DEF_RVV_OEXTU_OPS): Ditto.
30059 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
30061 (rvv_arg_type_info::get_tree_type): Ditto.
30062 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
30063 * config/riscv/vector-iterators.md (z): New attribute.
30064 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
30065 (@pred_<optab><mode>_vf4): Ditto.
30066 (@pred_<optab><mode>_vf8): Ditto.
30068 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30070 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
30071 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
30072 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
30073 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30074 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
30078 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
30083 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
30084 (@pred_<optab><mode>_scalar): New pattern.
30085 (*pred_<optab><mode>_scalar): New pattern.
30086 (*pred_<optab><mode>_extended_scalar): New pattern.
30088 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30090 * config/riscv/iterators.md: Add neg and not.
30091 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
30093 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30094 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
30115 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
30116 (struct alu_def): Ditto.
30118 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
30119 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
30120 * config/riscv/vector-iterators.md: New iterator.
30121 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
30123 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30125 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
30127 2023-02-11 Jakub Jelinek <jakub@redhat.com>
30130 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
30131 item->offset bit position is too large to be representable as
30132 unsigned int byte position.
30134 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
30136 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
30138 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
30140 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
30141 valid_combine only when ira_use_lra_p is true.
30143 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
30145 * params.opt (ira-simple-lra-insn-threshold): Add new param.
30146 * ira.cc (ira): Use the param to switch on simple LRA.
30148 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
30150 PR tree-optimization/108687
30151 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
30152 back to RFD_NONE mode for calculations.
30153 (ranger_cache::propagate_cache): Call the internal edge range API
30154 with RFD_READ_ONLY instead of changing the external routine.
30156 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
30158 PR tree-optimization/108520
30159 * gimple-range-infer.cc (check_assume_func): Invoke
30160 gimple_range_global directly instead using global_range_query.
30161 * value-query.cc (get_range_global): Add function context and
30162 avoid calling nonnull_arg_p if not cfun.
30163 (gimple_range_global): Add function context pointer.
30164 * value-query.h (imple_range_global): Add function context.
30166 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30168 * config/riscv/constraints.md (Wdm): Adjust constraint.
30169 (Wbr): New constraint.
30170 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
30171 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
30172 (emit_vlmax_op): New function.
30173 (emit_nonvlmax_op): Ditto.
30175 (neg_simm5_p): Ditto.
30176 (has_vi_variant_p): Ditto.
30177 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
30178 (emit_vlmax_op): New function.
30179 (emit_nonvlmax_op): Ditto.
30180 (expand_const_vector): Adjust function.
30181 (legitimize_move): Ditto.
30182 (simm32_p): New function.
30184 (neg_simm5_p): Ditto.
30185 (has_vi_variant_p): Ditto.
30186 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
30188 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30189 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
30192 (vminu): Remove signed cases.
30194 (vdiv): Remove unsigned cases.
30196 (vdivu): Remove signed cases.
30200 (vrsub): New class.
30205 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
30206 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
30207 * config/riscv/vector-iterators.md: New iterators.
30208 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
30210 (@pred_<optab><mode>_scalar): New pattern.
30211 (@pred_sub<mode>_reverse_scalar): Ditto.
30212 (*pred_<optab><mode>_scalar): Ditto.
30213 (*pred_<optab><mode>_extended_scalar): Ditto.
30214 (*pred_sub<mode>_reverse_scalar): Ditto.
30215 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
30217 2023-02-10 Richard Biener <rguenther@suse.de>
30219 PR tree-optimization/108724
30220 * tree-vect-stmts.cc (vectorizable_operation): Avoid
30221 using word_mode vectors when vector lowering will
30222 decompose them to elementwise operations.
30224 2023-02-10 Jakub Jelinek <jakub@redhat.com>
30227 2023-02-09 Martin Liska <mliska@suse.cz>
30230 * doc/extend.texi: Document that the function
30231 does not work correctly for old VIA processors.
30233 2023-02-10 Andrew Pinski <apinski@marvell.com>
30234 Andrew Macleod <amacleod@redhat.com>
30236 PR tree-optimization/108684
30237 * tree-ssa-dce.cc (simple_dce_from_worklist):
30238 Check all ssa names and not just non-vdef ones
30239 before accepting the inline-asm.
30240 Call unlink_stmt_vdef on the statement before
30243 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
30245 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
30246 * ira.cc (validate_equiv_mem): Check memref address variance.
30247 (no_equiv): Clear caller_save_p flag.
30248 (update_equiv_regs): Define caller save equivalence for
30250 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
30251 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
30252 call_save_p. Use caller save equivalence depending on the arg.
30253 (split_reg): Adjust the call.
30255 2023-02-09 Jakub Jelinek <jakub@redhat.com>
30258 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
30259 (cpu_indicator_init): Call get_available_features for all CPUs with
30260 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
30263 2023-02-09 Jakub Jelinek <jakub@redhat.com>
30265 PR tree-optimization/108688
30266 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
30267 of BIT_INSERT_EXPR extracting exactly all inserted bits even
30268 when without mode precision. Formatting fixes.
30270 2023-02-09 Andrew Pinski <apinski@marvell.com>
30272 PR tree-optimization/108688
30273 * match.pd (bit_field_ref [bit_insert]): Avoid generating
30274 BIT_FIELD_REFs of non-mode-precision integral operands.
30276 2023-02-09 Martin Liska <mliska@suse.cz>
30279 * doc/extend.texi: Document that the function
30280 does not work correctly for old VIA processors.
30282 2023-02-09 Andreas Schwab <schwab@suse.de>
30284 * lto-wrapper.cc (merge_and_complain): Handle
30285 -funwind-tables and -fasynchronous-unwind-tables.
30286 (append_compiler_options): Likewise.
30288 2023-02-09 Richard Biener <rguenther@suse.de>
30290 PR tree-optimization/26854
30291 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
30292 view around insert_updated_phi_nodes_for.
30293 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
30295 (walk_aliased_vdefs_1): Likewise.
30297 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
30299 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
30301 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
30304 * config.gcc (tm_mlib_file): Define new variable.
30306 2023-02-08 Jakub Jelinek <jakub@redhat.com>
30308 PR tree-optimization/108692
30309 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
30310 widened_code which is different from code, don't call
30311 vect_look_through_possible_promotion but instead just check op is
30312 SSA_NAME with integral type for which vect_is_simple_use is true
30313 and call set_op on this_unprom.
30315 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
30317 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
30319 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
30321 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
30322 to 'aarch_ra_sign_key'.
30323 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
30325 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
30326 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
30327 * config/arm/arm.opt: Define.
30329 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
30331 PR tree-optimization/108316
30332 * tree-vect-stmts.cc (get_load_store_type): When using
30333 internal functions for gather/scatter, make sure that the type
30334 of the offset argument is consistent with the offset vector type.
30336 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
30339 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
30341 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
30342 * ira.cc (validate_equiv_mem): Check memref address variance.
30343 (update_equiv_regs): Define caller save equivalence for
30345 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
30346 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
30347 call_save_p. Use caller save equivalence depending on the arg.
30348 (split_reg): Adjust the call.
30350 2023-02-08 Jakub Jelinek <jakub@redhat.com>
30352 * tree.def (SAD_EXPR): Remove outdated comment about missing
30355 2023-02-07 Marek Polacek <polacek@redhat.com>
30357 * doc/invoke.texi: Update -fchar8_t documentation.
30359 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
30361 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
30362 * ira.cc (validate_equiv_mem): Check memref address variance.
30363 (update_equiv_regs): Define caller save equivalence for
30365 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
30366 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
30367 call_save_p. Use caller save equivalence depending on the arg.
30368 (split_reg): Adjust the call.
30370 2023-02-07 Richard Biener <rguenther@suse.de>
30372 PR tree-optimization/26854
30373 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
30374 instead of immediate uses.
30376 2023-02-07 Jakub Jelinek <jakub@redhat.com>
30378 PR tree-optimization/106923
30379 * ipa-split.cc (execute_split_functions): Don't split returns_twice
30382 2023-02-07 Jakub Jelinek <jakub@redhat.com>
30384 PR tree-optimization/106433
30385 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
30386 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
30388 2023-02-07 Jan Hubicka <jh@suse.cz>
30390 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
30393 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
30395 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
30396 (process_asm): Create a constructor for GCN_STACK_SIZE.
30397 (main): Parse the -mstack-size option.
30399 2023-02-06 Alex Coplan <alex.coplan@arm.com>
30402 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
30403 Use correct constraint for operand 3.
30405 2023-02-06 Martin Jambor <mjambor@suse.cz>
30407 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
30409 2023-02-06 Xi Ruoyao <xry111@xry111.site>
30411 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
30412 New define_int_iterator.
30413 (bytepick_d_ashift_amount): Likewise.
30414 (bytepick_imm): New define_int_attr.
30415 (bytepick_w_lshiftrt_amount): Likewise.
30416 (bytepick_d_lshiftrt_amount): Likewise.
30417 (bytepick_w_<bytepick_imm>): New define_insn template.
30418 (bytepick_w_<bytepick_imm>_extend): Likewise.
30419 (bytepick_d_<bytepick_imm>): Likewise.
30420 (bytepick_w): Remove unused define_insn.
30421 (bytepick_d): Likewise.
30422 (UNSPEC_BYTEPICK_W): Remove unused unspec.
30423 (UNSPEC_BYTEPICK_D): Likewise.
30424 * config/loongarch/predicates.md (const_0_to_3_operand):
30425 Remove unused define_predicate.
30426 (const_0_to_7_operand): Likewise.
30428 2023-02-06 Jakub Jelinek <jakub@redhat.com>
30430 PR tree-optimization/108655
30431 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
30432 or -fsanitize=unreachable -fsanitize-trap=unreachable return
30433 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
30435 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
30437 * doc/install.texi (Specific): Remove PW32.
30439 2023-02-03 Jakub Jelinek <jakub@redhat.com>
30441 PR tree-optimization/108647
30442 * range-op.cc (operator_equal::op1_range,
30443 operator_not_equal::op1_range): Don't test op2 bound
30444 equality if op2.undefined_p (), instead set_varying.
30445 (operator_lt::op1_range, operator_le::op1_range,
30446 operator_gt::op1_range, operator_ge::op1_range): Return false if
30447 op2.undefined_p ().
30448 (operator_lt::op2_range, operator_le::op2_range,
30449 operator_gt::op2_range, operator_ge::op2_range): Return false if
30450 op1.undefined_p ().
30452 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
30454 PR tree-optimization/108639
30455 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
30457 (irange::operator==): Same.
30459 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
30461 PR tree-optimization/108647
30462 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
30463 (foperator_lt::op2_range): Same.
30464 (foperator_le::op1_range): Same.
30465 (foperator_le::op2_range): Same.
30466 (foperator_gt::op1_range): Same.
30467 (foperator_gt::op2_range): Same.
30468 (foperator_ge::op1_range): Same.
30469 (foperator_ge::op2_range): Same.
30470 (foperator_unordered_lt::op1_range): Same.
30471 (foperator_unordered_lt::op2_range): Same.
30472 (foperator_unordered_le::op1_range): Same.
30473 (foperator_unordered_le::op2_range): Same.
30474 (foperator_unordered_gt::op1_range): Same.
30475 (foperator_unordered_gt::op2_range): Same.
30476 (foperator_unordered_ge::op1_range): Same.
30477 (foperator_unordered_ge::op2_range): Same.
30479 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
30481 PR tree-optimization/107570
30482 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
30484 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
30486 * doc/gm2.texi (Internals): Remove from menu.
30487 (Using): Comment out ifnohtml conditional.
30488 (Documentation): Use gcc url.
30489 (License): Node simplified.
30490 (Copying): New node. Include gpl_v3_without_node.
30491 (Contributing): Node simplified.
30492 (Internals): Commented out.
30493 (Libraries): Node simplified.
30496 (Functions): Ditto.
30498 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
30500 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
30502 (mve_vqshluq_m_n_s<mode>): Likewise.
30503 (mve_vshlq_m_<supf><mode>): Likewise.
30504 (mve_vsriq_m_n_<supf><mode>): Likewise.
30505 (mve_vsubq_m_<supf><mode>): Likewise.
30507 2023-02-03 Martin Jambor <mjambor@suse.cz>
30510 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
30511 when comparing to an IPA-CP value.
30512 (dump_list_of_param_indices): New function.
30513 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
30514 Dump removed candidates using dump_list_of_param_indices.
30515 * ipa-param-manipulation.cc
30516 (ipa_param_body_adjustments::modify_expression): Add assert checking
30517 sizes of a VIEW_CONVERT_EXPR will match.
30518 (ipa_param_body_adjustments::modify_assignment): Likewise.
30520 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
30522 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
30523 * config/riscv/riscv.cc: Ditto.
30525 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30527 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
30531 * config/riscv/vector.md: Ditto.
30533 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30535 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
30536 * config/riscv/riscv-vector-builtins-bases.cc: New class.
30537 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
30540 * config/riscv/riscv-vector-builtins.cc: Ditto.
30541 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
30543 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
30545 * toplev.cc (toplev::main): Only print the version information header
30546 from toplevel main().
30548 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
30550 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
30551 cond_{ashl|ashr|lshr}
30553 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
30555 PR rtl-optimization/108086
30556 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
30557 Adjust size-related commentary accordingly.
30559 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
30561 PR rtl-optimization/108508
30562 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
30563 the splay tree search gives the first clobber in the second group,
30564 make sure that the root of the first clobber group is updated
30565 correctly. Enter the new clobber group into the definition splay
30568 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
30570 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
30571 Fix finding best match score.
30573 2023-02-02 Jakub Jelinek <jakub@redhat.com>
30576 PR rtl-optimization/108463
30578 * cselib.cc (cselib_current_insn): Move declaration earlier.
30579 (cselib_hasher::equal): For debug only locs, temporarily override
30580 cselib_current_insn to their l->setting_insn for the
30581 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
30582 promote some debug locs.
30583 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
30584 when using cselib call cselib_lookup_from_insn on the address but
30585 don't substitute it.
30587 2023-02-02 Richard Biener <rguenther@suse.de>
30589 PR middle-end/108625
30590 * genmatch.cc (expr::gen_transform): Also disallow resimplification
30591 from pushing to lseq with force_leaf.
30592 (dt_simplify::gen_1): Likewise.
30594 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
30596 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
30597 (struct kernargs): Replace the common content with kernargs_abi.
30598 (struct heap): Delete.
30599 (main): Read GCN_STACK_SIZE envvar.
30600 Allocate space for the device stacks.
30601 Write the new kernargs fields.
30602 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
30603 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
30604 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
30605 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
30606 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
30607 Set up the stacks from the values in the kernargs, not private.
30608 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
30609 (gcn_hsa_declare_function_name): Turn off the private segment.
30610 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
30611 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
30612 * config/gcn/gcn.opt (mstack-size): Change the description.
30614 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
30617 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
30618 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
30619 addressing MVE predicate modes.
30620 (mve_bool_vec_to_const): Change to represent correct MVE predicate
30622 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
30624 (arm_vector_mode_supported_p): Likewise.
30625 (arm_mode_to_pred_mode): Add V2QI.
30626 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
30628 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
30629 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
30630 (v2qi_UP): New macro.
30631 (v4bi_UP): New macro.
30632 (v8bi_UP): New macro.
30633 (v16bi_UP): New macro.
30634 (arm_expand_builtin_args): Make it able to expand the new predicate
30636 * config/arm/arm-modes.def (V2QI): New mode.
30637 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
30638 Pred4x4_t): Remove unused predicate builtin types.
30639 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
30640 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
30641 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
30642 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
30643 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
30644 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
30645 of MODE_VECTOR_BOOL.
30646 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
30647 (MVE_VPRED): Likewise.
30648 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
30649 (MVE_vctp): New mode attribute.
30653 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
30654 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
30656 (mve_vpnothi): Rename this...
30657 (mve_vpnotv16bi): ... to this.
30658 (mve_vctp<mode1>q_mhi): Rename this...
30659 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
30660 (mve_vldrdq_gather_base_z_<supf>v2di,
30661 mve_vldrdq_gather_offset_z_<supf>v2di,
30662 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
30663 mve_vstrdq_scatter_base_p_<supf>v2di,
30664 mve_vstrdq_scatter_offset_p_<supf>v2di,
30665 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
30666 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
30667 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
30668 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
30669 mve_vldrdq_gather_base_wb_z_<supf>v2di,
30670 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
30671 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
30673 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
30675 (VCTP): ... with this.
30676 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
30677 (VCTP_M): ... with this.
30678 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
30679 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
30681 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
30684 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
30685 (arm_modes_tieable_p): Make MVE predicate modes tieable.
30686 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
30687 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
30688 simplify_subreg to simplify subregs where the outermode is not scalar.
30690 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
30693 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
30694 new qualifiers parameter and use unsigned short type for MVE predicate.
30695 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
30697 (arm_init_crypto_builtins): Likewise.
30699 2023-02-02 Jakub Jelinek <jakub@redhat.com>
30702 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
30703 * internal-fn.def (TRAP): Remove.
30704 * internal-fn.cc (expand_TRAP): Remove.
30705 * tree.cc (build_common_builtin_nodes): Define
30706 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
30707 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
30708 instead of BUILT_IN_TRAP.
30709 * gimple.cc (gimple_build_builtin_unreachable): Remove
30710 emitting internal function for BUILT_IN_TRAP.
30711 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
30712 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
30713 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
30714 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
30715 BUILT_IN_UNREACHABLE_TRAP.
30716 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
30717 * tree-cfg.cc (verify_gimple_call,
30718 pass_warn_function_return::execute): Likewise.
30719 * attribs.cc (decl_attributes): Don't report exclusions on
30720 BUILT_IN_UNREACHABLE_TRAP either.
30722 2023-02-02 liuhongt <hongtao.liu@intel.com>
30724 PR tree-optimization/108601
30725 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
30726 * tree-vect-loop.cc
30727 (vectorizable_nonlinear_induction): Remove
30728 vect_can_peel_nonlinear_iv_p.
30729 (vect_can_peel_nonlinear_iv_p): Don't peel
30730 nonlinear iv(mult or shift) for epilog when vf is not
30731 constant and moved the defination to ..
30732 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
30735 2023-02-02 Jakub Jelinek <jakub@redhat.com>
30737 PR middle-end/108435
30738 * tree-nested.cc (convert_nonlocal_omp_clauses)
30739 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
30740 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
30741 before calling declare_vars.
30742 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
30743 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
30744 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
30745 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
30747 2023-02-01 Tamar Christina <tamar.christina@arm.com>
30749 * common/config/aarch64/aarch64-common.cc
30750 (struct aarch64_option_extension): Add native_detect and document struct
30752 (all_extensions): Set new field native_detect.
30753 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
30756 2023-02-01 Martin Liska <mliska@suse.cz>
30758 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
30761 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
30763 PR tree-optimization/108356
30764 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
30765 do a search of the DOM tree for a range.
30767 2023-02-01 Martin Liska <mliska@suse.cz>
30770 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
30771 ony non-null values.
30772 * ipa.cc (walk_polymorphic_call_targets): Likewise.
30774 2023-02-01 Martin Liska <mliska@suse.cz>
30777 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
30780 2023-02-01 Jakub Jelinek <jakub@redhat.com>
30783 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
30784 subregs in DEBUG_INSNs.
30786 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
30788 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
30790 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
30792 * config/s390/s390.cc (s390_restore_gpr_p): New function.
30793 (s390_preserve_gpr_arg_in_range_p): New function.
30794 (s390_preserve_gpr_arg_p): New function.
30795 (s390_preserve_fpr_arg_p): New function.
30796 (s390_register_info_stdarg_fpr): Rename to ...
30797 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
30798 (s390_register_info_stdarg_gpr): Rename to ...
30799 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
30800 (s390_register_info): Use the renamed functions above.
30801 (s390_optimize_register_info): Likewise.
30802 (save_fpr): Generate CFI for -mpreserve-args.
30803 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
30804 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
30805 (s390_optimize_prologue): Likewise.
30806 * config/s390/s390.opt: New option -mpreserve-args
30808 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
30810 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
30811 (restore_gprs): Likewise.
30812 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
30813 frame pointer if a frame-pointer is used.
30814 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
30815 * config/s390/s390.md (stack_tie): Add a register operand and
30817 (@stack_tie<mode>): ... this.
30819 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
30821 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
30822 EMIT_CFI parameter.
30823 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
30824 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
30826 2023-02-01 Richard Biener <rguenther@suse.de>
30828 PR middle-end/108500
30829 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
30830 with tree traversal algorithm.
30832 2023-02-01 Jason Merrill <jason@redhat.com>
30834 * doc/invoke.texi: Document -Wno-changes-meaning.
30836 2023-02-01 David Malcolm <dmalcolm@redhat.com>
30838 * doc/invoke.texi (Static Analyzer Options): Add notes about
30839 limitations of -fanalyzer.
30841 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30843 * config/riscv/constraints.md (vj): New.
30845 * config/riscv/iterators.md: Add more opcode.
30846 * config/riscv/predicates.md (vector_arith_operand): New.
30847 (vector_neg_arith_operand): New.
30848 (vector_shift_operand): New.
30849 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
30850 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
30867 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
30884 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
30885 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
30886 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
30887 (DEF_RVV_U_OPS): New.
30888 (rvv_arg_type_info::get_base_vector_type): Handle
30889 RVV_BASE_shift_vector.
30890 (rvv_arg_type_info::get_tree_type): Ditto.
30891 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
30892 RVV_BASE_shift_vector.
30893 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
30894 * config/riscv/vector-iterators.md: Handle more opcode.
30895 * config/riscv/vector.md (@pred_<optab><mode>): New.
30897 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
30900 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
30903 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
30905 PR tree-optimization/108608
30906 * tree-vect-loop.cc (vect_transform_reduction): Handle single
30907 def-use cycles that involve function calls rather than tree codes.
30909 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
30911 PR tree-optimization/108385
30912 * gimple-range-gori.cc (gori_compute::compute_operand_range):
30913 Allow VARYING computations to continue if there is a relation.
30914 * range-op.cc (pointer_plus_operator::op2_range): New.
30916 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
30918 PR tree-optimization/108359
30919 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
30920 (range_operator::fold_range): If op1 is equivalent to op2 then
30921 invoke new fold_in_parts_equiv to operate on sub-components.
30922 * range-op.h (wi_fold_in_parts_equiv): New prototype.
30924 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
30926 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
30927 not abort calculations if there is a valid relation available.
30928 (gori_compute::refine_using_relation): Pass correct relation trio.
30929 (gori_compute::compute_operand1_range): Create trio and use it.
30930 (gori_compute::compute_operand2_range): Ditto.
30931 * range-op.cc (operator_plus::op1_range): Use correct trio member.
30932 (operator_minus::op1_range): Use correct trio member.
30933 * value-relation.cc (value_relation::create_trio): New.
30934 * value-relation.h (value_relation::create_trio): New prototype.
30936 2023-01-31 Jakub Jelinek <jakub@redhat.com>
30939 * config/i386/i386-expand.cc
30940 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
30941 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
30942 equal to bitsize of mode.
30944 2023-01-31 Jakub Jelinek <jakub@redhat.com>
30946 PR rtl-optimization/108596
30947 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
30948 ends with asm goto and has a crossing fallthrough edge to the same bb
30949 that contains at least one of its labels by restoring EDGE_CROSSING
30950 flag even on possible edge from cur_bb to new_bb successor.
30952 2023-01-31 Jakub Jelinek <jakub@redhat.com>
30955 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
30956 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
30957 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
30958 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
30959 uninitialized automatic variable __W.
30961 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
30963 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
30965 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30967 * config/riscv/riscv-protos.h (get_vector_mode): New function.
30968 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
30969 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
30970 (class loadstore): Adjust for indexed loads/stores support.
30972 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
30973 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
30989 * config/riscv/riscv-vector-builtins-shapes.cc
30990 (struct indexed_loadstore_def): New class.
30992 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
30993 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
30994 for indexed loads/stores support.
30995 (check_required_extensions): Ditto.
30996 (rvv_arg_type_info::get_base_vector_type): New function.
30997 (rvv_arg_type_info::get_tree_type): Ditto.
30998 (function_builder::add_unique_function): Adjust for indexed loads/stores
31000 (function_expander::use_exact_insn): New function.
31001 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
31002 indexed loads/stores support.
31003 (struct rvv_arg_type_info): Ditto.
31004 (function_expander::index_mode): New function.
31005 (function_base::apply_tail_policy_p): Ditto.
31006 (function_base::apply_mask_policy_p): Ditto.
31007 * config/riscv/vector-iterators.md (unspec): New unspec.
31008 * config/riscv/vector.md (unspec): Ditto.
31009 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
31011 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
31012 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
31013 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
31014 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
31015 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
31016 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
31017 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
31018 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
31019 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
31020 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
31021 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
31022 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
31023 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
31025 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
31027 * config.gcc: Recognize x86_64-*-gnu* targets and include
31029 * config/i386/gnu64.h: Define configuration for new target
31030 including ld.so location.
31032 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
31034 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
31035 ampere1a to include SM4.
31037 2023-01-30 Andrew Pinski <apinski@marvell.com>
31039 PR tree-optimization/108582
31040 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
31041 for middlebb to have no phi nodes.
31043 2023-01-30 Richard Biener <rguenther@suse.de>
31045 PR tree-optimization/108574
31046 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
31047 sameval and def, ignore the equivalence if there's the
31048 danger of oscillating between two values.
31050 2023-01-30 Andreas Schwab <schwab@suse.de>
31052 * common/config/riscv/riscv-common.cc
31053 (riscv_option_optimization_table)
31054 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
31055 -fasynchronous-unwind-tables and -funwind-tables.
31056 * config.gcc (riscv*-*-linux*): Define
31057 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
31059 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
31061 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
31062 value of includedir.
31064 2023-01-30 Richard Biener <rguenther@suse.de>
31067 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
31070 2023-01-30 liuhongt <hongtao.liu@intel.com>
31072 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
31073 * doc/invoke.texi: Ditto.
31075 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
31077 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
31078 (stmt_may_terminate_function_p): If assuming return or EH
31079 volatile asm is safe.
31080 (find_always_executed_bbs): Fix handling of terminating BBS and
31081 infinite loops; add debug output.
31082 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
31084 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
31086 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
31087 off-by-one in checking the permissible shift-amount.
31089 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
31091 * doc/extend.texi (Named Address Spaces): Update link to the
31094 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
31096 * doc/standards.texi (Standards): Fix markup.
31098 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
31100 * doc/standards.texi (Standards): Update link to Objective-C book.
31102 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
31104 * doc/invoke.texi (Instrumentation Options): Update reference to
31107 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
31109 * doc/standards.texi: Update Go1 link.
31111 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31113 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
31114 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
31117 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31118 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
31120 * config/riscv/riscv-vector-builtins.cc
31121 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
31122 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
31123 (@pred_strided_store<mode>): Ditto.
31125 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31127 * config/riscv/vector.md (tail_policy_op_idx): Remove.
31128 (mask_policy_op_idx): Remove.
31129 (avl_type_op_idx): Remove.
31131 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
31133 PR tree-optimization/96373
31134 * tree.h (sign_mask_for): Declare.
31135 * tree.cc (sign_mask_for): New function.
31136 (signed_or_unsigned_type_for): For vector types, try to use the
31137 related_int_vector_mode.
31138 * genmatch.cc (commutative_op): Handle conditional internal functions.
31139 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
31141 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
31143 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
31144 Use the likely minimum VF when bounding the denominators to
31145 the estimated number of iterations.
31147 2023-01-27 Richard Biener <rguenther@suse.de>
31150 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
31151 and -Ofast FP environment side-effects.
31153 2023-01-27 Richard Biener <rguenther@suse.de>
31156 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
31157 Don't add crtfastmath.o for -shared.
31159 2023-01-27 Richard Biener <rguenther@suse.de>
31162 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
31165 2023-01-27 Richard Biener <rguenther@suse.de>
31168 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
31169 crtfastmath.o for -shared.
31171 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
31173 PR tree-optimization/108306
31174 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
31175 varying for shifts that are always out of void range.
31176 (operator_rshift::fold_range): Return [0, 0] not
31177 varying for shifts that are always out of void range.
31179 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
31181 PR tree-optimization/108447
31182 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
31183 Do not attempt to fold HONOR_NAN types.
31185 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31187 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
31188 Remove _m suffix for "vop_m" C++ overloaded API name.
31190 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31192 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
31193 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31194 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
31196 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
31197 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
31198 (vbool64_t): Ditto.
31199 (vbool32_t): Ditto.
31200 (vbool16_t): Ditto.
31205 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
31206 (rvv_arg_type_info::get_tree_type): Ditto.
31207 (function_expander::use_contiguous_load_insn): Ditto.
31208 * config/riscv/vector.md (@pred_store<mode>): Ditto.
31210 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31212 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
31213 (vsetvl_discard_result_insn_p): New function.
31214 (reg_killed_by_bb_p): rename to find_reg_killed_by.
31215 (find_reg_killed_by): New name.
31216 (get_vl): allow it to be called by more functions.
31217 (has_vsetvl_killed_avl_p): Add condition.
31218 (get_avl): allow it to be called by more functions.
31219 (insn_should_be_added_p): New function.
31220 (get_all_nonphi_defs): Refine function.
31221 (get_all_sets): Ditto.
31222 (get_same_bb_set): New function.
31223 (any_insn_in_bb_p): Ditto.
31224 (any_set_in_bb_p): Ditto.
31225 (get_vl_vtype_info): Add VLMAX forward optimization.
31226 (source_equal_p): Fix issues.
31227 (extract_single_source): Refine.
31228 (avl_info::multiple_source_equal_p): New function.
31229 (avl_info::operator==): Adjust for final version.
31230 (vl_vtype_info::operator==): Ditto.
31231 (vl_vtype_info::same_avl_p): Ditto.
31232 (vector_insn_info::parse_insn): Ditto.
31233 (vector_insn_info::available_p): New function.
31234 (vector_insn_info::merge): Adjust for final version.
31235 (vector_insn_info::dump): Add hard_empty.
31236 (pass_vsetvl::hard_empty_block_p): New function.
31237 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
31238 (pass_vsetvl::forward_demand_fusion): Ditto.
31239 (pass_vsetvl::demand_fusion): Ditto.
31240 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
31241 (pass_vsetvl::compute_local_properties): Adjust for final version.
31242 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
31243 (pass_vsetvl::refine_vsetvls): Ditto.
31244 (pass_vsetvl::commit_vsetvls): Ditto.
31245 (pass_vsetvl::propagate_avl): New function.
31246 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
31247 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
31249 2023-01-27 Jakub Jelinek <jakub@redhat.com>
31252 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
31253 from size_t to int.
31255 2023-01-27 Jakub Jelinek <jakub@redhat.com>
31258 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
31259 redirection of calls to __builtin_trap in addition to redirection
31260 to __builtin_unreachable.
31262 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31264 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
31266 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31268 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
31269 (emit_vsetvl_insn): Ditto.
31271 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31273 * config/riscv/vector.md: Fix constraints.
31275 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31277 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
31279 2023-01-27 Patrick Palka <ppalka@redhat.com>
31280 Jakub Jelinek <jakub@redhat.com>
31282 * tree-core.h (tree_code_type, tree_code_length): For
31283 C++17 and later, add inline keyword, otherwise don't define
31284 the arrays, but declare extern arrays.
31285 * tree.cc (tree_code_type, tree_code_length): Define these
31286 arrays for C++14 and older.
31288 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31290 * config/riscv/riscv-vsetvl.h: Change it into public.
31292 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31294 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
31297 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31299 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
31301 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31303 * config/riscv/vector.md: Fix incorrect attributes.
31305 2023-01-27 Richard Biener <rguenther@suse.de>
31308 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
31309 Don't add crtfastmath.o for -shared.
31311 2023-01-27 Alexandre Oliva <oliva@gnu.org>
31313 * doc/options.texi (option, RejectNegative): Mention that
31314 -g-started options are also implicitly negatable.
31316 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
31318 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
31319 Use get_typenode_from_name to get fixed-width integer type
31321 * config/riscv/riscv-vector-builtins.def: Update define with
31322 fixed-width integer type nodes.
31324 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31326 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
31327 (real_insn_and_same_bb_p): New function.
31328 (same_bb_and_after_or_equal_p): Remove it.
31329 (before_p): New function.
31330 (reg_killed_by_bb_p): Ditto.
31331 (has_vsetvl_killed_avl_p): Ditto.
31332 (get_vl): Move location so that we can call it.
31333 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
31334 (available_occurrence_p): Ditto.
31335 (dominate_probability_p): Remove it.
31336 (can_backward_propagate_p): Remove it.
31337 (get_all_nonphi_defs): New function.
31338 (get_all_predecessors): Ditto.
31339 (any_insn_in_bb_p): Ditto.
31340 (insert_vsetvl): Adjust AVL REG.
31341 (source_equal_p): New function.
31342 (extract_single_source): Ditto.
31343 (avl_info::single_source_equal_p): Ditto.
31344 (avl_info::operator==): Adjust for AVL=REG.
31345 (vl_vtype_info::same_avl_p): Ditto.
31346 (vector_insn_info::set_demand_info): Remove it.
31347 (vector_insn_info::compatible_p): Adjust for AVL=REG.
31348 (vector_insn_info::compatible_avl_p): New function.
31349 (vector_insn_info::merge): Adjust AVL=REG.
31350 (vector_insn_info::dump): Ditto.
31351 (pass_vsetvl::merge_successors): Remove it.
31352 (enum fusion_type): New enum.
31353 (pass_vsetvl::get_backward_fusion_type): New function.
31354 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
31355 (pass_vsetvl::forward_demand_fusion): Ditto.
31356 (pass_vsetvl::demand_fusion): Ditto.
31357 (pass_vsetvl::prune_expressions): Ditto.
31358 (pass_vsetvl::compute_local_properties): Ditto.
31359 (pass_vsetvl::cleanup_vsetvls): Ditto.
31360 (pass_vsetvl::commit_vsetvls): Ditto.
31361 (pass_vsetvl::init): Ditto.
31362 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
31363 (enum merge_type): New enum.
31365 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31367 * config/riscv/riscv-vsetvl.cc
31368 (vector_infos_manager::vector_infos_manager): Add probability.
31369 (vector_infos_manager::dump): Ditto.
31370 (pass_vsetvl::compute_probabilities): Ditto.
31371 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
31373 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31375 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
31376 (vector_insn_info::merge): Ditto.
31377 (vector_insn_info::dump): Ditto.
31378 (pass_vsetvl::merge_successors): Ditto.
31379 (pass_vsetvl::backward_demand_fusion): Ditto.
31380 (pass_vsetvl::forward_demand_fusion): Ditto.
31381 (pass_vsetvl::commit_vsetvls): Ditto.
31382 * config/riscv/riscv-vsetvl.h: Ditto.
31384 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31386 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
31389 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31391 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
31393 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31395 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
31396 Add pre-check for redundant flow.
31398 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31400 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
31401 (vector_infos_manager::free_bitmap_vectors): Ditto.
31402 (pass_vsetvl::pre_vsetvl): Adjust codes.
31403 * config/riscv/riscv-vsetvl.h: New function declaration.
31405 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31407 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
31408 (vector_insn_info::set_demand_info): New function.
31409 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
31410 (pass_vsetvl::merge_successors): Ditto.
31411 (pass_vsetvl::compute_global_backward_infos): Ditto.
31412 (pass_vsetvl::backward_demand_fusion): Ditto.
31413 (pass_vsetvl::forward_demand_fusion): Ditto.
31414 (pass_vsetvl::demand_fusion): New function.
31415 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
31416 * config/riscv/riscv-vsetvl.h: New function declaration.
31418 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31420 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
31422 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31424 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
31425 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
31427 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31429 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
31430 (backward_propagate_worthwhile_p): Fix non-worthwhile.
31432 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31434 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
31436 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31438 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
31439 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
31440 (pass_vsetvl::commit_vsetvls): Ditto.
31441 * config/riscv/riscv-vsetvl.h: New function declaration.
31443 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31445 * config/riscv/vector.md:
31447 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31449 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
31450 pred_store for vse.
31451 * config/riscv/riscv-vector-builtins.cc
31452 (function_expander::add_mem_operand): Refine function.
31453 (function_expander::use_contiguous_load_insn): Adjust new
31455 (function_expander::use_contiguous_store_insn): Ditto.
31456 * config/riscv/riscv-vector-builtins.h: Refine function.
31457 * config/riscv/vector.md (@pred_store<mode>): New pattern.
31459 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31461 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
31463 2023-01-26 Marek Polacek <polacek@redhat.com>
31465 PR middle-end/108543
31466 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
31467 if it was previously set.
31469 2023-01-26 Jakub Jelinek <jakub@redhat.com>
31471 PR tree-optimization/108540
31472 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
31473 are singletons, use range_true even if op1 != op2
31474 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
31475 even if intersection of the ranges is empty and one has
31476 zero low bound and another zero high bound, use range_true_and_false
31477 rather than range_false.
31478 (foperator_not_equal::fold_range): If both op1 and op2
31479 are singletons, use range_false even if op1 != op2
31480 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
31481 even if intersection of the ranges is empty and one has
31482 zero low bound and another zero high bound, use range_true_and_false
31483 rather than range_true.
31485 2023-01-26 Jakub Jelinek <jakub@redhat.com>
31487 * value-relation.cc (kind_string): Add const.
31488 (rr_negate_table, rr_swap_table, rr_intersect_table,
31489 rr_union_table, rr_transitive_table): Add static const, change
31490 element type from relation_kind to unsigned char.
31491 (relation_negate, relation_swap, relation_intersect, relation_union,
31492 relation_transitive): Cast rr_*_table element to relation_kind.
31493 (relation_to_code): Add static const.
31494 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
31496 2023-01-26 Richard Biener <rguenther@suse.de>
31498 PR tree-optimization/108547
31499 * gimple-predicate-analysis.cc (value_sat_pred_p):
31502 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
31504 PR tree-optimization/108522
31505 * tree-object-size.cc (compute_object_offset): Make EXPR
31506 argument non-const. Call component_ref_field_offset.
31508 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31510 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
31511 FEATURE_STRING field.
31513 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
31515 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
31517 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
31521 * gcc.cc: Provide default specs for Modula-2 so that when the
31522 language is not built-in better diagnostics are emitted for
31523 attempts to use .mod or .m2i file extensions.
31525 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
31527 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
31529 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
31531 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
31533 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
31535 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
31538 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
31540 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
31542 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
31544 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
31546 2023-01-25 Richard Biener <rguenther@suse.de>
31548 PR tree-optimization/108523
31549 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
31550 backedge value for the result when using predication to
31553 2023-01-25 Richard Biener <rguenther@suse.de>
31555 * doc/lto.texi (Command line options): Reword and update reference
31556 to removed lto_read_all_file_options.
31558 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
31560 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
31563 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
31565 * doc/contrib.texi: Add Jose E. Marchesi.
31567 2023-01-25 Jakub Jelinek <jakub@redhat.com>
31569 PR tree-optimization/108498
31570 * gimple-ssa-store-merging.cc (class store_operand_info):
31571 End coment with full stop rather than comma.
31572 (split_group): Likewise.
31573 (merged_store_group::apply_stores): Clear string_concatenation if
31574 start or end aren't on a byte boundary.
31576 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
31577 Jakub Jelinek <jakub@redhat.com>
31579 PR tree-optimization/108522
31580 * tree-object-size.cc (compute_object_offset): Use
31581 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
31583 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31585 * config/xtensa/xtensa.md:
31586 Fix exit from loops detecting references before overwriting in the
31589 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
31591 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
31592 do elimination but only for hard register.
31593 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
31594 calls of get_hard_regno.
31596 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
31598 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
31601 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
31604 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
31605 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
31608 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
31610 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
31611 and only include 'csky/t-csky-linux' when enable multilib.
31612 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
31613 define it when disable multilib.
31615 2023-01-24 Richard Biener <rguenther@suse.de>
31617 PR tree-optimization/108500
31618 * dominance.h (calculate_dominance_info): Add parameter
31619 to indicate fast-query compute, defaulted to true.
31620 * dominance.cc (calculate_dominance_info): Honor
31621 fast-query compute parameter.
31622 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
31623 not compute the dominator fast-query DFS numbers.
31625 2023-01-24 Eric Biggers <ebiggers@google.com>
31628 * optc-save-gen.awk: Fix copy-and-paste error.
31630 2023-01-24 Jakub Jelinek <jakub@redhat.com>
31633 * cgraphbuild.cc: Include gimplify.h.
31634 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
31635 their corresponding DECL_VALUE_EXPR expressions after unsharing.
31637 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
31640 * config.gcc (tm_file): Move the variable out of loop.
31642 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
31643 Yang Yujie <yangyujie@loongson.cn>
31646 * config/loongarch/loongarch.cc (loongarch_classify_address):
31647 Add precessint for CONST_INT.
31648 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
31649 (loongarch_print_operand): Increase the processing of '%c'.
31650 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
31651 And port the public operand modifiers information to this document.
31653 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
31655 * doc/invoke.texi (-mbranch-protection): Update documentation.
31657 2023-01-23 Richard Biener <rguenther@suse.de>
31660 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
31662 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
31663 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
31664 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
31665 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
31667 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
31669 * config/arm/aout.h (ra_auth_code): Add entry in enum.
31670 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
31671 to dwarf frame expression.
31672 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
31673 (arm_expand_prologue): Update frame related information and reg notes
31674 for pac/pacbit insn.
31675 (arm_regno_class): Check for pac pseudo reigster.
31676 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
31677 (arm_init_machine_status): Set pacspval_needed to zero.
31678 (arm_debugger_regno): Check for PAC register.
31679 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
31681 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
31682 (arm_unwind_emit): Update REG_CFA_REGISTER case._
31683 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
31684 (DWARF_PAC_REGNUM): Define.
31685 (IS_PAC_REGNUM): Likewise.
31686 (enum reg_class): Add PAC_REG entry.
31687 (machine_function): Add pacbti_needed state to structure.
31688 * config/arm/arm.md (RA_AUTH_CODE): Define.
31690 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
31692 * config.gcc ($tm_file): Update variable.
31693 * config/arm/arm-mlib.h: Create new header file.
31694 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
31695 multilib arch directory.
31696 (MULTILIB_REUSE): Add multilib reuse rules.
31697 (MULTILIB_MATCHES): Add multilib match rules.
31699 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
31701 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
31702 * config/arm/arm-tables.opt: Regenerate.
31703 * config/arm/arm-tune.md: Likewise.
31704 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
31705 * (-mfix-cmse-cve-2021-35465): Likewise.
31707 2023-01-23 Richard Biener <rguenther@suse.de>
31709 PR tree-optimization/108482
31710 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
31711 .LOOP_DIST_ALIAS calls.
31713 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
31715 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
31716 * config/arm/arm-protos.h: Update.
31717 * config/arm/aarch-common-protos.h: Declare
31718 'aarch_bti_arch_check'.
31719 * config/arm/arm.cc (aarch_bti_enabled) Update.
31720 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
31721 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
31722 * config/arm/arm.md (bti_nop): New insn.
31723 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
31724 (aarch-bti-insert.o): New target.
31725 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
31726 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
31728 (gate): Make use of 'aarch_bti_arch_check'.
31729 * config/arm/arm-passes.def: New file.
31730 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
31732 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
31734 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
31735 'aarch-bti-insert.o'.
31736 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
31738 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
31739 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
31740 (aarch64_output_mi_thunk)
31741 (aarch64_print_patchable_function_entry)
31742 (aarch64_file_end_indicate_exec_stack): Update renamed function
31743 calls to renamed functions.
31744 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
31745 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
31747 * config/aarch64/aarch64-bti-insert.cc: Delete.
31748 * config/arm/aarch-bti-insert.cc: New file including and
31749 generalizing code from aarch64-bti-insert.cc.
31750 * config/arm/aarch-common-protos.h: Update.
31752 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
31754 * config/arm/arm.h (arm_arch8m_main): Declare it.
31755 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
31757 * config/arm/arm.cc (arm_arch8m_main): Define it.
31758 (arm_option_reconfigure_globals): Set arm_arch8m_main.
31759 (arm_compute_frame_layout, arm_expand_prologue)
31760 (thumb2_expand_return, arm_expand_epilogue)
31761 (arm_conditional_register_usage): Update for pac codegen.
31762 (arm_current_function_pac_enabled_p): New function.
31763 (aarch_bti_enabled) New function.
31764 (use_return_insn): Return zero when pac is enabled.
31765 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
31767 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
31768 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
31770 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
31772 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
31773 mbranch-protection.
31775 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
31776 Tejas Belagod <tbelagod@arm.com>
31778 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
31779 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
31781 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
31782 Tejas Belagod <tbelagod@arm.com>
31783 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
31785 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
31786 new pseudo register class _UVRSC_PAC.
31788 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
31789 Tejas Belagod <tbelagod@arm.com>
31791 * config/arm/arm-c.cc (arm_cpu_builtins): Define
31792 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
31793 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
31795 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
31796 Tejas Belagod <tbelagod@arm.com>
31798 * doc/sourcebuild.texi: Document arm_pacbti_hw.
31800 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
31801 Tejas Belagod <tbelagod@arm.com>
31802 Richard Earnshaw <Richard.Earnshaw@arm.com>
31804 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
31805 -mbranch-protection option and initialize appropriate data structures.
31806 * config/arm/arm.opt (-mbranch-protection): New option.
31807 * doc/invoke.texi (Arm Options): Document it.
31809 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
31810 Tejas Belagod <tbelagod@arm.com>
31812 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
31813 * config/arm/arm-cpus.in (pacbti): New feature.
31814 * doc/invoke.texi (Arm Options): Document it.
31816 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
31817 Tejas Belagod <tbelagod@arm.com>
31819 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
31820 (all_architectures): Fix comment.
31821 (aarch64_parse_extension): Rename return type, enum value names.
31822 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
31823 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
31824 Also rename corresponding enum values.
31825 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
31826 out aarch64_function_type and move it to common code as
31827 aarch_function_type in aarch-common.h.
31828 * config/aarch64/aarch64-protos.h: Include common types header,
31829 move out types aarch64_parse_opt_result and aarch64_key_type to
31831 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
31832 and functions out into aarch-common.h and aarch-common.cc. Fix up
31833 all the name changes resulting from the move.
31834 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
31836 * config/aarch64/aarch64.opt: Include aarch-common.h to import
31837 type move. Fix up name changes from factoring out common code and
31839 * config/arm/aarch-common-protos.h: Export factored out routines to both
31841 * config/arm/aarch-common.cc: Include newly factored out types.
31842 Move all mbranch-protection code and data structures from
31844 * config/arm/aarch-common.h: New header that declares types shared
31845 between aarch32 and aarch64 backends.
31846 * config/arm/arm-protos.h: Declare types and variables that are
31847 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
31848 aarch_ra_sign_scope and aarch_enable_bti.
31849 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
31850 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
31851 * config/arm/arm.cc: Add missing includes.
31853 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
31855 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
31857 2023-01-23 Richard Biener <rguenther@suse.de>
31859 PR tree-optimization/108449
31860 * cgraphunit.cc (check_global_declaration): Do not turn
31861 undefined statics into externs.
31863 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
31865 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
31866 and HI input modes.
31867 * config/pru/pru.md (clz): Fix generated code for QI and HI
31870 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
31872 * config/v850/v850.cc (v850_select_section): Put const volatile
31873 objects into read-only sections.
31875 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
31877 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
31878 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
31879 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
31881 2023-01-20 Jakub Jelinek <jakub@redhat.com>
31883 PR tree-optimization/108457
31884 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
31885 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
31886 argument instead of a temporary. Formatting fixes.
31888 2023-01-19 Jakub Jelinek <jakub@redhat.com>
31890 PR tree-optimization/108447
31891 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
31892 (relation_tests): Add self-tests for relation_{intersect,union}
31894 * selftest.h (relation_tests): Declare.
31895 * function-tests.cc (test_ranges): Call it.
31897 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
31900 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
31901 invalid third argument to __builtin_ia32_prefetch.
31903 2023-01-19 Jakub Jelinek <jakub@redhat.com>
31905 PR middle-end/108459
31906 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
31907 than fold_unary for NEGATE_EXPR.
31909 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
31912 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
31913 comment. Move assert about alignment a bit later.
31915 2023-01-19 Jakub Jelinek <jakub@redhat.com>
31917 PR tree-optimization/108440
31918 * tree-ssa-forwprop.cc: Include gimple-range.h.
31919 (simplify_rotate): For the forms with T2 wider than T and shift counts of
31920 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
31921 to B. For the forms with T2 wider than T and shift counts of
31922 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
31923 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
31924 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
31925 pass specific ranger instead of get_global_range_query.
31926 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
31929 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
31931 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
31932 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
31934 (aarch64_simd_vec_copy_lane<mode>): Likewise.
31935 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
31937 2023-01-19 Alexandre Oliva <oliva@adacore.com>
31940 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
31941 within debug insns.
31943 2023-01-18 Martin Jambor <mjambor@suse.cz>
31946 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
31947 lcone_of chain also do not need the body.
31949 2023-01-18 Richard Biener <rguenther@suse.de>
31952 2022-12-16 Richard Biener <rguenther@suse.de>
31954 PR middle-end/108086
31955 * tree-inline.cc (remap_ssa_name): Do not unshare the
31956 result from the decl_map.
31958 2023-01-18 Murray Steele <murray.steele@arm.com>
31961 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
31963 (__arm_vst1q_p_s8): Likewise.
31964 (__arm_vld1q_z_u8): Likewise.
31965 (__arm_vld1q_z_s8): Likewise.
31966 (__arm_vst1q_p_u16): Likewise.
31967 (__arm_vst1q_p_s16): Likewise.
31968 (__arm_vld1q_z_u16): Likewise.
31969 (__arm_vld1q_z_s16): Likewise.
31970 (__arm_vst1q_p_u32): Likewise.
31971 (__arm_vst1q_p_s32): Likewise.
31972 (__arm_vld1q_z_u32): Likewise.
31973 (__arm_vld1q_z_s32): Likewise.
31974 (__arm_vld1q_z_f16): Likewise.
31975 (__arm_vst1q_p_f16): Likewise.
31976 (__arm_vld1q_z_f32): Likewise.
31977 (__arm_vst1q_p_f32): Likewise.
31979 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31981 * config/xtensa/xtensa.md (xorsi3_internal):
31982 Rename from the original of "xorsi3".
31983 (xorsi3): New expansion pattern that emits addition rather than
31984 bitwise-XOR when the second source is a constant of -2147483648
31987 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
31988 Andrew Pinski <apinski@marvell.com>
31991 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
31992 vec_vsubcuqP with vec_vsubcuq.
31994 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
31997 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
31998 support for invalid uses of MMA opaque type in function arguments.
32000 2023-01-18 liuhongt <hongtao.liu@intel.com>
32003 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
32004 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
32005 -share or -mno-daz-ftz is specified.
32006 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
32007 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
32009 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
32011 * config/bpf/bpf.cc (bpf_option_override): Disable
32014 2023-01-17 Jakub Jelinek <jakub@redhat.com>
32016 PR tree-optimization/106523
32017 * tree-ssa-forwprop.cc (simplify_rotate): For the
32018 patterns with (-Y) & (B - 1) in one operand's shift
32019 count and Y in another, if T2 has wider precision than T,
32020 punt if Y could have a value in [B, B2 - 1] range.
32022 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
32025 * config/i386/i386.cc (x86_output_mi_thunk): Disable
32026 -mforce-indirect-call for PIC in 32-bit mode.
32028 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
32031 * ipa-modref.cc (modref_access_analysis::analyze): Use
32032 find_always_executed_bbs.
32033 * ipa-sra.cc (process_scan_results): Likewise.
32034 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
32035 (find_always_executed_bbs): New function.
32036 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
32037 (find_always_executed_bbs): Declare.
32039 2023-01-16 Jan Hubicka <jh@suse.cz>
32041 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
32042 by TARGET_USE_SCATTER.
32043 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
32044 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
32045 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
32046 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
32047 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
32048 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
32050 2023-01-16 Richard Biener <rguenther@suse.de>
32053 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
32055 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
32059 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
32060 (__ARM_mve_coerce3): Likewise.
32062 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
32064 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
32066 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
32068 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
32069 (number_of_iterations_bitcount): Add call to the above.
32070 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
32071 c[lt]z idiom recognition.
32073 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
32075 * doc/sourcebuild.texi: Add missing target attributes.
32077 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
32079 PR tree-optimization/94793
32080 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
32082 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
32083 (number_of_iterations_cltz_complement): New.
32084 (number_of_iterations_bitcount): Add call to the above.
32086 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
32088 * doc/extend.texi (Common Function Attributes): Fix grammar.
32090 2023-01-16 Jakub Jelinek <jakub@redhat.com>
32093 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
32094 * config/riscv/riscv-vsetvl.cc: Likewise.
32096 2023-01-16 Jakub Jelinek <jakub@redhat.com>
32099 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
32100 disable -Winit-self using pragma GCC diagnostic ignored.
32101 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
32103 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
32104 _mm256_undefined_si256): Likewise.
32105 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
32106 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
32107 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
32108 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
32110 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
32113 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
32114 support for invalid uses in inline asm, factor out the checking and
32115 erroring to lambda function check_and_error_invalid_use.
32117 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
32119 PR tree-optimization/107608
32120 * range-op-float.cc (range_operator_float::fold_range): Avoid
32121 folding into INF when flag_trapping_math.
32122 * value-range.h (frange::known_isinf): Return false for possible NANs.
32124 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
32126 * config.gcc (csky-*-*): Support --with-float=softfp.
32128 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32130 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
32131 Rename to xtensa_adjust_reg_alloc_order.
32132 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
32133 Ditto. And also remove code to reorder register numbers for
32134 leaf functions, rename the tables, and adjust the allocation
32135 order for the call0 ABI to use register A0 more.
32136 (xtensa_leaf_regs): Remove.
32137 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
32138 (order_regs_for_local_alloc): Rename as the above.
32139 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
32141 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
32143 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
32144 Change to define_insn_and_split to fold ldr+dup to ld1rq.
32145 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
32147 2023-01-14 Alexandre Oliva <oliva@adacore.com>
32149 * hash-table.h (is_deleted): Precheck !is_empty.
32150 (mark_deleted): Postcheck !is_empty.
32151 (copy constructor): Test is_empty before is_deleted.
32153 2023-01-14 Alexandre Oliva <oliva@adacore.com>
32156 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
32159 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
32161 PR rtl-optimization/108274
32162 * function.cc (thread_prologue_and_epilogue_insns): Also update the
32163 DF information for calls in a few more cases.
32165 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
32167 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
32168 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
32170 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
32171 (MAX_SYNC_LIBFUNC_SIZE): Define.
32172 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
32174 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
32175 libcall when sync libcalls are disabled.
32176 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
32177 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
32178 are disabled on 32-bit target.
32179 * config/pa/pa.opt (matomic-libcalls): New option.
32180 * doc/invoke.texi (HPPA Options): Update.
32182 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
32184 PR rtl-optimization/108117
32185 PR rtl-optimization/108132
32186 * sched-deps.cc (deps_analyze_insn): Do not schedule across
32187 calls before reload.
32189 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
32191 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
32192 options for -mlibarch.
32193 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
32194 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
32196 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
32198 * attribs.cc (strict_flex_array_level_of): Move this function to ...
32199 * attribs.h (strict_flex_array_level_of): Remove the declaration.
32200 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
32201 replace the referece to strict_flex_array_level_of with
32202 DECL_NOT_FLEXARRAY.
32203 * tree.cc (component_ref_size): Likewise.
32205 2023-01-13 Richard Biener <rguenther@suse.de>
32208 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
32209 crtfastmath.o for -shared.
32210 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
32212 2023-01-13 Richard Biener <rguenther@suse.de>
32215 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
32216 crtfastmath.o for -shared.
32217 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
32219 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
32222 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
32224 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
32226 (TARGET_DWARF_FRAME_REG_MODE): Define.
32228 2023-01-13 Richard Biener <rguenther@suse.de>
32231 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
32232 update EH info on the fly.
32234 2023-01-13 Richard Biener <rguenther@suse.de>
32236 PR tree-optimization/108387
32237 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
32238 value before inserting expression into the tables.
32240 2023-01-12 Andrew Pinski <apinski@marvell.com>
32241 Roger Sayle <roger@nextmovesoftware.com>
32243 PR tree-optimization/92342
32244 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
32245 Use tcc_comparison and :c for the multiply.
32246 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
32248 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
32249 Richard Sandiford <richard.sandiford@arm.com>
32252 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
32253 Check DECL_PACKED for bitfield.
32254 (aarch64_layout_arg): Warn when parameter passing ABI changes.
32255 (aarch64_function_arg_boundary): Do not warn here.
32256 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
32259 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
32260 Richard Sandiford <richard.sandiford@arm.com>
32262 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
32264 (aarch64_layout_arg): Factorize warning conditions.
32265 (aarch64_function_arg_boundary): Fix typo.
32266 * function.cc (currently_expanding_function_start): New variable.
32267 (expand_function_start): Handle
32268 currently_expanding_function_start.
32269 * function.h (currently_expanding_function_start): Declare.
32271 2023-01-12 Richard Biener <rguenther@suse.de>
32273 PR tree-optimization/99412
32274 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
32275 (swap_ops_for_binary_stmt): Remove reduction handling.
32276 (rewrite_expr_tree_parallel): Adjust.
32277 (reassociate_bb): Likewise.
32278 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
32280 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32282 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
32283 Rearrange the emitting codes.
32285 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32287 * config/xtensa/xtensa.md (*btrue):
32288 Correct value of the attribute "length" that depends on
32289 TARGET_DENSITY and operands, and add '?' character to the register
32290 constraint of the compared operand.
32292 2023-01-12 Alexandre Oliva <oliva@adacore.com>
32294 * hash-table.h (expand): Check elements and deleted counts.
32295 (verify): Likewise.
32297 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
32299 PR tree-optimization/71343
32300 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
32301 the value number of the expression X << C the same as the value
32302 number for the multiplication X * (1<<C).
32304 2023-01-11 David Faust <david.faust@oracle.com>
32307 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
32308 floating point modes.
32310 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
32312 PR tree-optimization/108199
32313 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
32314 for bit-field references.
32316 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
32318 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
32319 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
32320 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
32321 OPTION_MASK_P10_FUSION.
32323 2023-01-11 Richard Biener <rguenther@suse.de>
32325 PR tree-optimization/107767
32326 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
32327 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
32328 * tree-switch-conversion.cc (switch_conversion::collect):
32329 Count unique non-default targets accounting for later
32330 merging opportunities.
32332 2023-01-11 Martin Liska <mliska@suse.cz>
32334 PR middle-end/107976
32335 * params.opt: Limit JT params.
32336 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
32338 2023-01-11 Richard Biener <rguenther@suse.de>
32340 PR tree-optimization/108352
32341 * tree-ssa-threadbackward.cc
32342 (back_threader_profitability::profitable_path_p): Adjust
32343 heuristic that allows non-multi-way branch threads creating
32345 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
32346 (--param fsm-scale-path-stmts): Adjust.
32347 * params.opt (--param=fsm-scale-path-blocks=): Remove.
32348 (-param=fsm-scale-path-stmts=): Adjust description.
32350 2023-01-11 Richard Biener <rguenther@suse.de>
32352 PR tree-optimization/108353
32353 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
32355 (add_ssa_edge): Simplify.
32356 (add_control_edge): Likewise.
32357 (ssa_prop_init): Likewise.
32358 (ssa_prop_fini): Likewise.
32359 (ssa_propagation_engine::ssa_propagate): Likewise.
32361 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
32363 * config/s390/s390.md (*not<mode>): New pattern.
32365 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32367 * config/xtensa/xtensa.cc (xtensa_insn_cost):
32368 Let insn cost for size be obtained by applying COSTS_N_INSNS()
32369 to instruction length and then dividing by 3.
32371 2023-01-10 Richard Biener <rguenther@suse.de>
32373 PR tree-optimization/106293
32374 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
32375 process degenerate PHI defs.
32377 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
32379 PR rtl-optimization/106421
32380 * cprop.cc (bypass_block): Check that DEST is local to this
32381 function (non-NULL) before calling find_edge.
32383 2023-01-10 Martin Jambor <mjambor@suse.cz>
32386 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
32387 sort_replacements, lookup_first_base_replacement and
32388 m_sorted_replacements_p.
32389 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
32390 (ipa_param_body_adjustments::register_replacement): Set
32391 m_sorted_replacements_p to false.
32392 (compare_param_body_replacement): New function.
32393 (ipa_param_body_adjustments::sort_replacements): Likewise.
32394 (ipa_param_body_adjustments::common_initialization): Call
32396 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
32397 m_sorted_replacements_p.
32398 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
32400 (ipa_param_body_adjustments::lookup_first_base_replacement): New
32402 (ipa_param_body_adjustments::modify_call_stmt): Use
32403 lookup_first_base_replacement.
32404 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
32405 adjustments->sort_replacements.
32407 2023-01-10 Richard Biener <rguenther@suse.de>
32409 PR tree-optimization/108314
32410 * tree-vect-stmts.cc (vectorizable_condition): Do not
32411 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
32413 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
32415 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
32417 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
32419 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
32421 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
32423 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
32424 defines for soft float abi.
32426 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
32428 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
32429 (smart_bclri): Likewise.
32430 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
32431 (fast_bclri): Likewise.
32432 (fast_cmpnesi_i): Likewise.
32433 (*fast_cmpltsi_i): Likewise.
32434 (*fast_cmpgeusi_i): Likewise.
32436 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
32438 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
32439 flag_fp_int_builtin_inexact || !flag_trapping_math.
32440 (<frm_pattern><mode>2): Likewise.
32442 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
32444 * config/s390/s390.cc (s390_register_info): Check call_used_regs
32445 instead of hard-coding the register numbers for call saved
32447 (s390_optimize_register_info): Likewise.
32449 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
32451 * doc/gm2.texi (Overview): Fix @node markers.
32452 (Using): Likewise. Remove subsections that were moved to Overview
32453 from the menu and move others around.
32455 2023-01-09 Richard Biener <rguenther@suse.de>
32457 PR middle-end/108209
32458 * genmatch.cc (commutative_op): Fix return value for
32459 user-id with non-commutative first replacement.
32461 2023-01-09 Jakub Jelinek <jakub@redhat.com>
32464 * calls.cc (expand_call): For calls with
32465 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
32468 2023-01-09 Richard Biener <rguenther@suse.de>
32470 PR middle-end/69482
32471 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
32472 qualified accesses also force objects to memory.
32474 2023-01-09 Martin Liska <mliska@suse.cz>
32477 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
32478 NULL (deleleted value) to a hash_set.
32480 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32482 * config/xtensa/xtensa.md (*splice_bits):
32483 New insn_and_split pattern.
32485 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32487 * config/xtensa/xtensa.cc
32488 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
32489 New helper functions.
32490 (xtensa_set_return_address, xtensa_output_mi_thunk):
32491 Change to use the helper function.
32492 (xtensa_emit_adjust_stack_ptr): Ditto.
32493 And also change to try reusing the content of scratch register
32494 A9 if the register is not modified in the function body.
32496 2023-01-07 LIU Hao <lh_mouse@126.com>
32498 PR middle-end/108300
32499 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
32500 before <windows.h>.
32501 * diagnostic-color.cc: Likewise.
32502 * plugin.cc: Likewise.
32503 * prefix.cc: Likewise.
32505 2023-01-06 Joseph Myers <joseph@codesourcery.com>
32507 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
32508 for handling real integer types.
32510 2023-01-06 Tamar Christina <tamar.christina@arm.com>
32513 2022-12-12 Tamar Christina <tamar.christina@arm.com>
32515 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
32516 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
32517 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
32518 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
32519 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
32520 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
32521 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
32522 (aarch64_simd_dupv2hf): New.
32523 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
32525 * config/aarch64/iterators.md (VHSDF_P): New.
32526 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
32527 Vel, q, vp): Add V2HF.
32528 * config/arm/types.md (neon_fp_reduc_add_h): New.
32530 2023-01-06 Martin Liska <mliska@suse.cz>
32532 PR middle-end/107966
32533 * doc/options.texi: Fix Var documentation in internal manual.
32535 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
32538 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
32540 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
32541 RTL expansion to allow condition (mask) to be shared/reused,
32542 by avoiding overwriting pseudos and adding REG_EQUAL notes.
32544 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
32546 * common.opt: Add -static-libgm2.
32547 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
32548 * doc/gm2.texi: Document static-libgm2.
32549 * gcc.cc (driver_handle_option): Allow static-libgm2.
32551 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
32553 * common/config/i386/i386-common.cc (processor_alias_table):
32554 Use CPU_ZNVER4 for znver4.
32555 * config/i386/i386.md: Add znver4.md.
32556 * config/i386/znver4.md: New.
32558 2023-01-04 Jakub Jelinek <jakub@redhat.com>
32560 PR tree-optimization/108253
32561 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
32564 2023-01-04 Jakub Jelinek <jakub@redhat.com>
32566 PR middle-end/108237
32567 * generic-match-head.cc: Include tree-pass.h.
32568 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
32569 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
32570 resp. PROP_gimple_lvec property set.
32572 2023-01-04 Jakub Jelinek <jakub@redhat.com>
32574 PR sanitizer/108256
32575 * convert.cc (do_narrow): Punt for MULT_EXPR if original
32576 type doesn't wrap around and -fsanitize=signed-integer-overflow
32578 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
32580 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
32582 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
32583 * common/config/i386/i386-common.cc: Add Emeraldrapids.
32585 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
32587 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
32590 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
32592 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
32593 default constructor to initialize it.
32594 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
32595 for last and iterate to handle recursive calls. Delete leftover
32596 candidates at the end.
32597 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
32599 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
32600 gc_candidate bit when a clone is used.
32602 2023-01-03 Florian Weimer <fweimer@redhat.com>
32605 2023-01-02 Florian Weimer <fweimer@redhat.com>
32607 * dwarf2cfi.cc (init_return_column_size): Remove.
32608 (init_one_dwarf_reg_size): Adjust.
32609 (generate_dwarf_reg_sizes): New function. Extracted
32610 from expand_builtin_init_dwarf_reg_sizes.
32611 (expand_builtin_init_dwarf_reg_sizes): Call
32612 generate_dwarf_reg_sizes.
32613 * target.def (init_dwarf_reg_sizes_extra): Adjust
32615 * config/msp430/msp430.cc
32616 (msp430_init_dwarf_reg_sizes_extra): Adjust.
32617 * config/rs6000/rs6000.cc
32618 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
32619 * doc/tm.texi: Update.
32621 2023-01-03 Florian Weimer <fweimer@redhat.com>
32624 2023-01-02 Florian Weimer <fweimer@redhat.com>
32626 * debug.h (dwarf_reg_sizes_constant): Declare.
32627 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
32629 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
32631 PR tree-optimization/105043
32632 * doc/extend.texi (Object Size Checking): Split out into two
32633 subsections and mention _FORTIFY_SOURCE.
32635 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
32637 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
32638 RTL expansion to allow condition (mask) to be shared/reused,
32639 by avoiding overwriting pseudos and adding REG_EQUAL notes.
32641 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
32644 * config/i386/i386-features.cc
32645 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
32646 the gain/cost of converting a MEM operand.
32648 2023-01-03 Jakub Jelinek <jakub@redhat.com>
32650 PR middle-end/108264
32651 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
32652 from source which doesn't have scalar integral mode first convert
32655 2023-01-03 Jakub Jelinek <jakub@redhat.com>
32657 PR rtl-optimization/108263
32658 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
32661 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
32664 * config/i386/lujiazui.md (lujiazui_div): New automaton.
32665 (lua_div): New unit.
32666 (lua_idiv_qi): Correct unit in the reservation.
32667 (lua_idiv_qi_load): Ditto.
32668 (lua_idiv_hi): Ditto.
32669 (lua_idiv_hi_load): Ditto.
32670 (lua_idiv_si): Ditto.
32671 (lua_idiv_si_load): Ditto.
32672 (lua_idiv_di): Ditto.
32673 (lua_idiv_di_load): Ditto.
32674 (lua_fdiv_SF): Ditto.
32675 (lua_fdiv_SF_load): Ditto.
32676 (lua_fdiv_DF): Ditto.
32677 (lua_fdiv_DF_load): Ditto.
32678 (lua_fdiv_XF): Ditto.
32679 (lua_fdiv_XF_load): Ditto.
32680 (lua_ssediv_SF): Ditto.
32681 (lua_ssediv_load_SF): Ditto.
32682 (lua_ssediv_V4SF): Ditto.
32683 (lua_ssediv_load_V4SF): Ditto.
32684 (lua_ssediv_V8SF): Ditto.
32685 (lua_ssediv_load_V8SF): Ditto.
32686 (lua_ssediv_SD): Ditto.
32687 (lua_ssediv_load_SD): Ditto.
32688 (lua_ssediv_V2DF): Ditto.
32689 (lua_ssediv_load_V2DF): Ditto.
32690 (lua_ssediv_V4DF): Ditto.
32691 (lua_ssediv_load_V4DF): Ditto.
32693 2023-01-02 Florian Weimer <fweimer@redhat.com>
32695 * debug.h (dwarf_reg_sizes_constant): Declare.
32696 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
32698 2023-01-02 Florian Weimer <fweimer@redhat.com>
32700 * dwarf2cfi.cc (init_return_column_size): Remove.
32701 (init_one_dwarf_reg_size): Adjust.
32702 (generate_dwarf_reg_sizes): New function. Extracted
32703 from expand_builtin_init_dwarf_reg_sizes.
32704 (expand_builtin_init_dwarf_reg_sizes): Call
32705 generate_dwarf_reg_sizes.
32706 * target.def (init_dwarf_reg_sizes_extra): Adjust
32708 * config/msp430/msp430.cc
32709 (msp430_init_dwarf_reg_sizes_extra): Adjust.
32710 * config/rs6000/rs6000.cc
32711 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
32712 * doc/tm.texi: Update.
32714 2023-01-02 Jakub Jelinek <jakub@redhat.com>
32716 * gcc.cc (process_command): Update copyright notice dates.
32717 * gcov-dump.cc (print_version): Ditto.
32718 * gcov.cc (print_version): Ditto.
32719 * gcov-tool.cc (print_version): Ditto.
32720 * gengtype.cc (create_file): Ditto.
32721 * doc/cpp.texi: Bump @copying's copyright year.
32722 * doc/cppinternals.texi: Ditto.
32723 * doc/gcc.texi: Ditto.
32724 * doc/gccint.texi: Ditto.
32725 * doc/gcov.texi: Ditto.
32726 * doc/install.texi: Ditto.
32727 * doc/invoke.texi: Ditto.
32729 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
32730 Uroš Bizjak <ubizjak@gmail.com>
32732 * config/i386/i386.md (extendditi2): New define_insn.
32733 (define_split): Use DWIH mode iterator to treat new extendditi2
32734 identically to existing extendsidi2_1.
32735 (define_peephole2): Likewise.
32736 (define_peephole2): Likewise.
32737 (define_Split): Likewise.
32740 Copyright (C) 2023 Free Software Foundation, Inc.
32742 Copying and distribution of this file, with or without modification,
32743 are permitted in any medium without royalty provided the copyright
32744 notice and this notice are preserved.