1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* Must precede rtl.h for FFS. */
28 #include "hard-reg-set.h"
31 #include "insn-config.h"
37 /* The basic idea of common subexpression elimination is to go
38 through the code, keeping a record of expressions that would
39 have the same value at the current scan point, and replacing
40 expressions encountered with the cheapest equivalent expression.
42 It is too complicated to keep track of the different possibilities
43 when control paths merge; so, at each label, we forget all that is
44 known and start fresh. This can be described as processing each
45 basic block separately. Note, however, that these are not quite
46 the same as the basic blocks found by a later pass and used for
47 data flow analysis and register packing. We do not need to start fresh
48 after a conditional jump instruction if there is no label there.
50 We use two data structures to record the equivalent expressions:
51 a hash table for most expressions, and several vectors together
52 with "quantity numbers" to record equivalent (pseudo) registers.
54 The use of the special data structure for registers is desirable
55 because it is faster. It is possible because registers references
56 contain a fairly small number, the register number, taken from
57 a contiguously allocated series, and two register references are
58 identical if they have the same number. General expressions
59 do not have any such thing, so the only way to retrieve the
60 information recorded on an expression other than a register
61 is to keep it in a hash table.
63 Registers and "quantity numbers":
65 At the start of each basic block, all of the (hardware and pseudo)
66 registers used in the function are given distinct quantity
67 numbers to indicate their contents. During scan, when the code
68 copies one register into another, we copy the quantity number.
69 When a register is loaded in any other way, we allocate a new
70 quantity number to describe the value generated by this operation.
71 `reg_qty' records what quantity a register is currently thought
74 All real quantity numbers are greater than or equal to `max_reg'.
75 If register N has not been assigned a quantity, reg_qty[N] will equal N.
77 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
78 variables should be referenced with an index below `max_reg'.
80 We also maintain a bidirectional chain of registers for each
81 quantity number. `qty_first_reg', `qty_last_reg',
82 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
84 The first register in a chain is the one whose lifespan is least local.
85 Among equals, it is the one that was seen first.
86 We replace any equivalent register with that one.
88 If two registers have the same quantity number, it must be true that
89 REG expressions with `qty_mode' must be in the hash table for both
90 registers and must be in the same class.
92 The converse is not true. Since hard registers may be referenced in
93 any mode, two REG expressions might be equivalent in the hash table
94 but not have the same quantity number if the quantity number of one
95 of the registers is not the same mode as those expressions.
97 Constants and quantity numbers
99 When a quantity has a known constant value, that value is stored
100 in the appropriate element of qty_const. This is in addition to
101 putting the constant in the hash table as is usual for non-regs.
103 Whether a reg or a constant is preferred is determined by the configuration
104 macro CONST_COSTS and will often depend on the constant value. In any
105 event, expressions containing constants can be simplified, by fold_rtx.
107 When a quantity has a known nearly constant value (such as an address
108 of a stack slot), that value is stored in the appropriate element
111 Integer constants don't have a machine mode. However, cse
112 determines the intended machine mode from the destination
113 of the instruction that moves the constant. The machine mode
114 is recorded in the hash table along with the actual RTL
115 constant expression so that different modes are kept separate.
119 To record known equivalences among expressions in general
120 we use a hash table called `table'. It has a fixed number of buckets
121 that contain chains of `struct table_elt' elements for expressions.
122 These chains connect the elements whose expressions have the same
125 Other chains through the same elements connect the elements which
126 currently have equivalent values.
128 Register references in an expression are canonicalized before hashing
129 the expression. This is done using `reg_qty' and `qty_first_reg'.
130 The hash code of a register reference is computed using the quantity
131 number, not the register number.
133 When the value of an expression changes, it is necessary to remove from the
134 hash table not just that expression but all expressions whose values
135 could be different as a result.
137 1. If the value changing is in memory, except in special cases
138 ANYTHING referring to memory could be changed. That is because
139 nobody knows where a pointer does not point.
140 The function `invalidate_memory' removes what is necessary.
142 The special cases are when the address is constant or is
143 a constant plus a fixed register such as the frame pointer
144 or a static chain pointer. When such addresses are stored in,
145 we can tell exactly which other such addresses must be invalidated
146 due to overlap. `invalidate' does this.
147 All expressions that refer to non-constant
148 memory addresses are also invalidated. `invalidate_memory' does this.
150 2. If the value changing is a register, all expressions
151 containing references to that register, and only those,
154 Because searching the entire hash table for expressions that contain
155 a register is very slow, we try to figure out when it isn't necessary.
156 Precisely, this is necessary only when expressions have been
157 entered in the hash table using this register, and then the value has
158 changed, and then another expression wants to be added to refer to
159 the register's new value. This sequence of circumstances is rare
160 within any one basic block.
162 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
163 reg_tick[i] is incremented whenever a value is stored in register i.
164 reg_in_table[i] holds -1 if no references to register i have been
165 entered in the table; otherwise, it contains the value reg_tick[i] had
166 when the references were entered. If we want to enter a reference
167 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
168 Until we want to enter a new entry, the mere fact that the two vectors
169 don't match makes the entries be ignored if anyone tries to match them.
171 Registers themselves are entered in the hash table as well as in
172 the equivalent-register chains. However, the vectors `reg_tick'
173 and `reg_in_table' do not apply to expressions which are simple
174 register references. These expressions are removed from the table
175 immediately when they become invalid, and this can be done even if
176 we do not immediately search for all the expressions that refer to
179 A CLOBBER rtx in an instruction invalidates its operand for further
180 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
181 invalidates everything that resides in memory.
185 Constant expressions that differ only by an additive integer
186 are called related. When a constant expression is put in
187 the table, the related expression with no constant term
188 is also entered. These are made to point at each other
189 so that it is possible to find out if there exists any
190 register equivalent to an expression related to a given expression. */
192 /* One plus largest register number used in this function. */
196 /* One plus largest instruction UID used in this function at time of
199 static int max_insn_uid
;
201 /* Length of vectors indexed by quantity number.
202 We know in advance we will not need a quantity number this big. */
206 /* Next quantity number to be allocated.
207 This is 1 + the largest number needed so far. */
211 /* Indexed by quantity number, gives the first (or last) register
212 in the chain of registers that currently contain this quantity. */
214 static int *qty_first_reg
;
215 static int *qty_last_reg
;
217 /* Index by quantity number, gives the mode of the quantity. */
219 static enum machine_mode
*qty_mode
;
221 /* Indexed by quantity number, gives the rtx of the constant value of the
222 quantity, or zero if it does not have a known value.
223 A sum of the frame pointer (or arg pointer) plus a constant
224 can also be entered here. */
226 static rtx
*qty_const
;
228 /* Indexed by qty number, gives the insn that stored the constant value
229 recorded in `qty_const'. */
231 static rtx
*qty_const_insn
;
233 /* The next three variables are used to track when a comparison between a
234 quantity and some constant or register has been passed. In that case, we
235 know the results of the comparison in case we see it again. These variables
236 record a comparison that is known to be true. */
238 /* Indexed by qty number, gives the rtx code of a comparison with a known
239 result involving this quantity. If none, it is UNKNOWN. */
240 static enum rtx_code
*qty_comparison_code
;
242 /* Indexed by qty number, gives the constant being compared against in a
243 comparison of known result. If no such comparison, it is undefined.
244 If the comparison is not with a constant, it is zero. */
246 static rtx
*qty_comparison_const
;
248 /* Indexed by qty number, gives the quantity being compared against in a
249 comparison of known result. If no such comparison, if it undefined.
250 If the comparison is not with a register, it is -1. */
252 static int *qty_comparison_qty
;
255 /* For machines that have a CC0, we do not record its value in the hash
256 table since its use is guaranteed to be the insn immediately following
257 its definition and any other insn is presumed to invalidate it.
259 Instead, we store below the value last assigned to CC0. If it should
260 happen to be a constant, it is stored in preference to the actual
261 assigned value. In case it is a constant, we store the mode in which
262 the constant should be interpreted. */
264 static rtx prev_insn_cc0
;
265 static enum machine_mode prev_insn_cc0_mode
;
268 /* Previous actual insn. 0 if at first insn of basic block. */
270 static rtx prev_insn
;
272 /* Insn being scanned. */
274 static rtx this_insn
;
276 /* Index by register number, gives the quantity number
277 of the register's current contents. */
281 /* Index by register number, gives the number of the next (or
282 previous) register in the chain of registers sharing the same
285 Or -1 if this register is at the end of the chain.
287 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
289 static int *reg_next_eqv
;
290 static int *reg_prev_eqv
;
292 /* Index by register number, gives the number of times
293 that register has been altered in the current basic block. */
295 static int *reg_tick
;
297 /* Index by register number, gives the reg_tick value at which
298 rtx's containing this register are valid in the hash table.
299 If this does not equal the current reg_tick value, such expressions
300 existing in the hash table are invalid.
301 If this is -1, no expressions containing this register have been
302 entered in the table. */
304 static int *reg_in_table
;
306 /* A HARD_REG_SET containing all the hard registers for which there is
307 currently a REG expression in the hash table. Note the difference
308 from the above variables, which indicate if the REG is mentioned in some
309 expression in the table. */
311 static HARD_REG_SET hard_regs_in_table
;
313 /* A HARD_REG_SET containing all the hard registers that are invalidated
316 static HARD_REG_SET regs_invalidated_by_call
;
318 /* Two vectors of ints:
319 one containing max_reg -1's; the other max_reg + 500 (an approximation
320 for max_qty) elements where element i contains i.
321 These are used to initialize various other vectors fast. */
323 static int *all_minus_one
;
324 static int *consec_ints
;
326 /* CUID of insn that starts the basic block currently being cse-processed. */
328 static int cse_basic_block_start
;
330 /* CUID of insn that ends the basic block currently being cse-processed. */
332 static int cse_basic_block_end
;
334 /* Vector mapping INSN_UIDs to cuids.
335 The cuids are like uids but increase monotonically always.
336 We use them to see whether a reg is used outside a given basic block. */
338 static int *uid_cuid
;
340 /* Highest UID in UID_CUID. */
343 /* Get the cuid of an insn. */
345 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
347 /* Nonzero if cse has altered conditional jump insns
348 in such a way that jump optimization should be redone. */
350 static int cse_jumps_altered
;
352 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
353 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
354 to put in the note. */
355 static int recorded_label_ref
;
357 /* canon_hash stores 1 in do_not_record
358 if it notices a reference to CC0, PC, or some other volatile
361 static int do_not_record
;
363 #ifdef LOAD_EXTEND_OP
365 /* Scratch rtl used when looking for load-extended copy of a MEM. */
366 static rtx memory_extend_rtx
;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory
;
374 /* canon_hash stores 1 in hash_arg_in_struct
375 if it notices a reference to memory that's part of a structure. */
377 static int hash_arg_in_struct
;
379 /* The hash table contains buckets which are chains of `struct table_elt's,
380 each recording one expression's information.
381 That expression is in the `exp' field.
383 Those elements with the same hash code are chained in both directions
384 through the `next_same_hash' and `prev_same_hash' fields.
386 Each set of expressions with equivalent values
387 are on a two-way chain through the `next_same_value'
388 and `prev_same_value' fields, and all point with
389 the `first_same_value' field at the first element in
390 that chain. The chain is in order of increasing cost.
391 Each element's cost value is in its `cost' field.
393 The `in_memory' field is nonzero for elements that
394 involve any reference to memory. These elements are removed
395 whenever a write is done to an unidentified location in memory.
396 To be safe, we assume that a memory address is unidentified unless
397 the address is either a symbol constant or a constant plus
398 the frame pointer or argument pointer.
400 The `in_struct' field is nonzero for elements that
401 involve any reference to memory inside a structure or array.
403 The `related_value' field is used to connect related expressions
404 (that differ by adding an integer).
405 The related expressions are chained in a circular fashion.
406 `related_value' is zero for expressions for which this
409 The `cost' field stores the cost of this element's expression.
411 The `is_const' flag is set if the element is a constant (including
414 The `flag' field is used as a temporary during some search routines.
416 The `mode' field is usually the same as GET_MODE (`exp'), but
417 if `exp' is a CONST_INT and has no machine mode then the `mode'
418 field is the mode it was being used as. Each constant is
419 recorded separately for each mode it is used with. */
425 struct table_elt
*next_same_hash
;
426 struct table_elt
*prev_same_hash
;
427 struct table_elt
*next_same_value
;
428 struct table_elt
*prev_same_value
;
429 struct table_elt
*first_same_value
;
430 struct table_elt
*related_value
;
432 enum machine_mode mode
;
439 /* We don't want a lot of buckets, because we rarely have very many
440 things stored in the hash table, and a lot of buckets slows
441 down a lot of loops that happen frequently. */
444 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
445 register (hard registers may require `do_not_record' to be set). */
448 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
449 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
450 : canon_hash (X, M) % NBUCKETS)
452 /* Determine whether register number N is considered a fixed register for CSE.
453 It is desirable to replace other regs with fixed regs, to reduce need for
455 A reg wins if it is either the frame pointer or designated as fixed,
456 but not if it is an overlapping register. */
457 #ifdef OVERLAPPING_REGNO_P
458 #define FIXED_REGNO_P(N) \
459 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
460 || fixed_regs[N] || global_regs[N]) \
461 && ! OVERLAPPING_REGNO_P ((N)))
463 #define FIXED_REGNO_P(N) \
464 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
465 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
475 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
476 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
477 || ((N) < FIRST_PSEUDO_REGISTER \
478 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
480 /* A register is cheap if it is a user variable assigned to the register
481 or if its register number always corresponds to a cheap register. */
483 #define CHEAP_REG(N) \
484 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
485 || CHEAP_REGNO (REGNO (N)))
488 (GET_CODE (X) == REG \
489 ? (CHEAP_REG (X) ? 0 \
490 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
494 /* Determine if the quantity number for register X represents a valid index
495 into the `qty_...' variables. */
497 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
499 static struct table_elt
*table
[NBUCKETS
];
501 /* Chain of `struct table_elt's made so far for this function
502 but currently removed from the table. */
504 static struct table_elt
*free_element_chain
;
506 /* Number of `struct table_elt' structures made so far for this function. */
508 static int n_elements_made
;
510 /* Maximum value `n_elements_made' has had so far in this compilation
511 for functions previously processed. */
513 static int max_elements_made
;
515 /* Surviving equivalence class when two equivalence classes are merged
516 by recording the effects of a jump in the last insn. Zero if the
517 last insn was not a conditional jump. */
519 static struct table_elt
*last_jump_equiv_class
;
521 /* Set to the cost of a constant pool reference if one was found for a
522 symbolic constant. If this was found, it means we should try to
523 convert constants into constant pool entries if they don't fit in
526 static int constant_pool_entries_cost
;
528 /* Define maximum length of a branch path. */
530 #define PATHLENGTH 10
532 /* This data describes a block that will be processed by cse_basic_block. */
534 struct cse_basic_block_data
{
535 /* Lowest CUID value of insns in block. */
537 /* Highest CUID value of insns in block. */
539 /* Total number of SETs in block. */
541 /* Last insn in the block. */
543 /* Size of current branch path, if any. */
545 /* Current branch path, indicating which branches will be taken. */
547 /* The branch insn. */
549 /* Whether it should be taken or not. AROUND is the same as taken
550 except that it is used when the destination label is not preceded
552 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
556 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
557 virtual regs here because the simplify_*_operation routines are called
558 by integrate.c, which is called before virtual register instantiation. */
560 #define FIXED_BASE_PLUS_P(X) \
561 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
562 || (X) == arg_pointer_rtx \
563 || (X) == virtual_stack_vars_rtx \
564 || (X) == virtual_incoming_args_rtx \
565 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
566 && (XEXP (X, 0) == frame_pointer_rtx \
567 || XEXP (X, 0) == hard_frame_pointer_rtx \
568 || XEXP (X, 0) == arg_pointer_rtx \
569 || XEXP (X, 0) == virtual_stack_vars_rtx \
570 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
571 || GET_CODE (X) == ADDRESSOF)
573 /* Similar, but also allows reference to the stack pointer.
575 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
576 arg_pointer_rtx by itself is nonzero, because on at least one machine,
577 the i960, the arg pointer is zero when it is unused. */
579 #define NONZERO_BASE_PLUS_P(X) \
580 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
581 || (X) == virtual_stack_vars_rtx \
582 || (X) == virtual_incoming_args_rtx \
583 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
584 && (XEXP (X, 0) == frame_pointer_rtx \
585 || XEXP (X, 0) == hard_frame_pointer_rtx \
586 || XEXP (X, 0) == arg_pointer_rtx \
587 || XEXP (X, 0) == virtual_stack_vars_rtx \
588 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
589 || (X) == stack_pointer_rtx \
590 || (X) == virtual_stack_dynamic_rtx \
591 || (X) == virtual_outgoing_args_rtx \
592 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
593 && (XEXP (X, 0) == stack_pointer_rtx \
594 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
595 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
596 || GET_CODE (X) == ADDRESSOF)
598 static int notreg_cost
PROTO((rtx
));
599 static void new_basic_block
PROTO((void));
600 static void make_new_qty
PROTO((int));
601 static void make_regs_eqv
PROTO((int, int));
602 static void delete_reg_equiv
PROTO((int));
603 static int mention_regs
PROTO((rtx
));
604 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
605 static void free_element
PROTO((struct table_elt
*));
606 static void remove_from_table
PROTO((struct table_elt
*, unsigned));
607 static struct table_elt
*get_element
PROTO((void));
608 static struct table_elt
*lookup
PROTO((rtx
, unsigned, enum machine_mode
)),
609 *lookup_for_remove
PROTO((rtx
, unsigned, enum machine_mode
));
610 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
611 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, unsigned,
613 static void merge_equiv_classes
PROTO((struct table_elt
*,
614 struct table_elt
*));
615 static void invalidate
PROTO((rtx
, enum machine_mode
));
616 static int cse_rtx_varies_p
PROTO((rtx
));
617 static void remove_invalid_refs
PROTO((int));
618 static void rehash_using_reg
PROTO((rtx
));
619 static void invalidate_memory
PROTO((void));
620 static void invalidate_for_call
PROTO((void));
621 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
622 static unsigned canon_hash
PROTO((rtx
, enum machine_mode
));
623 static unsigned safe_hash
PROTO((rtx
, enum machine_mode
));
624 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
625 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
628 static int refers_to_p
PROTO((rtx
, rtx
));
629 static rtx canon_reg
PROTO((rtx
, rtx
));
630 static void find_best_addr
PROTO((rtx
, rtx
*));
631 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
633 enum machine_mode
*));
634 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
636 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
638 static rtx fold_rtx
PROTO((rtx
, rtx
));
639 static rtx equiv_constant
PROTO((rtx
));
640 static void record_jump_equiv
PROTO((rtx
, int));
641 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
643 static void cse_insn
PROTO((rtx
, int));
644 static int note_mem_written
PROTO((rtx
));
645 static void invalidate_from_clobbers
PROTO((rtx
));
646 static rtx cse_process_notes
PROTO((rtx
, rtx
));
647 static void cse_around_loop
PROTO((rtx
));
648 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
649 static void invalidate_skipped_block
PROTO((rtx
));
650 static void cse_check_loop_start
PROTO((rtx
, rtx
));
651 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
652 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
653 static void count_reg_usage
PROTO((rtx
, int *, rtx
, int));
655 extern int rtx_equal_function_value_matters
;
657 /* Return an estimate of the cost of computing rtx X.
658 One use is in cse, to decide which expression to keep in the hash table.
659 Another is in rtl generation, to pick the cheapest way to multiply.
660 Other uses like the latter are expected in the future. */
662 /* Internal function, to compute cost when X is not a register; called
663 from COST macro to keep it simple. */
669 return ((GET_CODE (x
) == SUBREG
670 && GET_CODE (SUBREG_REG (x
)) == REG
671 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
672 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
673 && (GET_MODE_SIZE (GET_MODE (x
))
674 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
675 && subreg_lowpart_p (x
)
676 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
677 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
678 ? (CHEAP_REG (SUBREG_REG (x
)) ? 0
679 : (REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
? 1
681 : rtx_cost (x
, SET
) * 2);
684 /* Return the right cost to give to an operation
685 to make the cost of the corresponding register-to-register instruction
686 N times that of a fast register-to-register instruction. */
688 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
691 rtx_cost (x
, outer_code
)
693 enum rtx_code outer_code
;
696 register enum rtx_code code
;
703 /* Compute the default costs of certain things.
704 Note that RTX_COSTS can override the defaults. */
710 /* Count multiplication by 2**n as a shift,
711 because if we are considering it, we would output it as a shift. */
712 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
713 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
716 total
= COSTS_N_INSNS (5);
722 total
= COSTS_N_INSNS (7);
725 /* Used in loop.c and combine.c as a marker. */
729 /* We don't want these to be used in substitutions because
730 we have no way of validating the resulting insn. So assign
731 anything containing an ASM_OPERANDS a very high cost. */
741 return ! CHEAP_REG (x
);
744 /* If we can't tie these modes, make this expensive. The larger
745 the mode, the more expensive it is. */
746 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
747 return COSTS_N_INSNS (2
748 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
751 RTX_COSTS (x
, code
, outer_code
);
753 CONST_COSTS (x
, code
, outer_code
);
756 /* Sum the costs of the sub-rtx's, plus cost of this operation,
757 which is already in total. */
759 fmt
= GET_RTX_FORMAT (code
);
760 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
762 total
+= rtx_cost (XEXP (x
, i
), code
);
763 else if (fmt
[i
] == 'E')
764 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
765 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
770 /* Clear the hash table and initialize each register with its own quantity,
771 for a new basic block. */
780 bzero ((char *) reg_tick
, max_reg
* sizeof (int));
782 bcopy ((char *) all_minus_one
, (char *) reg_in_table
,
783 max_reg
* sizeof (int));
784 bcopy ((char *) consec_ints
, (char *) reg_qty
, max_reg
* sizeof (int));
785 CLEAR_HARD_REG_SET (hard_regs_in_table
);
787 /* The per-quantity values used to be initialized here, but it is
788 much faster to initialize each as it is made in `make_new_qty'. */
790 for (i
= 0; i
< NBUCKETS
; i
++)
792 register struct table_elt
*this, *next
;
793 for (this = table
[i
]; this; this = next
)
795 next
= this->next_same_hash
;
800 bzero ((char *) table
, sizeof table
);
809 /* Say that register REG contains a quantity not in any register before
810 and initialize that quantity. */
818 if (next_qty
>= max_qty
)
821 q
= reg_qty
[reg
] = next_qty
++;
822 qty_first_reg
[q
] = reg
;
823 qty_last_reg
[q
] = reg
;
824 qty_const
[q
] = qty_const_insn
[q
] = 0;
825 qty_comparison_code
[q
] = UNKNOWN
;
827 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
830 /* Make reg NEW equivalent to reg OLD.
831 OLD is not changing; NEW is. */
834 make_regs_eqv (new, old
)
835 register int new, old
;
837 register int lastr
, firstr
;
838 register int q
= reg_qty
[old
];
840 /* Nothing should become eqv until it has a "non-invalid" qty number. */
841 if (! REGNO_QTY_VALID_P (old
))
845 firstr
= qty_first_reg
[q
];
846 lastr
= qty_last_reg
[q
];
848 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
849 hard regs. Among pseudos, if NEW will live longer than any other reg
850 of the same qty, and that is beyond the current basic block,
851 make it the new canonical replacement for this qty. */
852 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
853 /* Certain fixed registers might be of the class NO_REGS. This means
854 that not only can they not be allocated by the compiler, but
855 they cannot be used in substitutions or canonicalizations
857 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
858 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
859 || (new >= FIRST_PSEUDO_REGISTER
860 && (firstr
< FIRST_PSEUDO_REGISTER
861 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
862 || (uid_cuid
[REGNO_FIRST_UID (new)]
863 < cse_basic_block_start
))
864 && (uid_cuid
[REGNO_LAST_UID (new)]
865 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
867 reg_prev_eqv
[firstr
] = new;
868 reg_next_eqv
[new] = firstr
;
869 reg_prev_eqv
[new] = -1;
870 qty_first_reg
[q
] = new;
874 /* If NEW is a hard reg (known to be non-fixed), insert at end.
875 Otherwise, insert before any non-fixed hard regs that are at the
876 end. Registers of class NO_REGS cannot be used as an
877 equivalent for anything. */
878 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
879 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
880 && new >= FIRST_PSEUDO_REGISTER
)
881 lastr
= reg_prev_eqv
[lastr
];
882 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
883 if (reg_next_eqv
[lastr
] >= 0)
884 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
886 qty_last_reg
[q
] = new;
887 reg_next_eqv
[lastr
] = new;
888 reg_prev_eqv
[new] = lastr
;
892 /* Remove REG from its equivalence class. */
895 delete_reg_equiv (reg
)
898 register int q
= reg_qty
[reg
];
901 /* If invalid, do nothing. */
905 p
= reg_prev_eqv
[reg
];
906 n
= reg_next_eqv
[reg
];
915 qty_first_reg
[q
] = n
;
920 /* Remove any invalid expressions from the hash table
921 that refer to any of the registers contained in expression X.
923 Make sure that newly inserted references to those registers
924 as subexpressions will be considered valid.
926 mention_regs is not called when a register itself
927 is being stored in the table.
929 Return 1 if we have done something that may have changed the hash code
936 register enum rtx_code code
;
939 register int changed
= 0;
947 register int regno
= REGNO (x
);
948 register int endregno
949 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
950 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
953 for (i
= regno
; i
< endregno
; i
++)
955 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
956 remove_invalid_refs (i
);
958 reg_in_table
[i
] = reg_tick
[i
];
964 /* If X is a comparison or a COMPARE and either operand is a register
965 that does not have a quantity, give it one. This is so that a later
966 call to record_jump_equiv won't cause X to be assigned a different
967 hash code and not found in the table after that call.
969 It is not necessary to do this here, since rehash_using_reg can
970 fix up the table later, but doing this here eliminates the need to
971 call that expensive function in the most common case where the only
972 use of the register is in the comparison. */
974 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
976 if (GET_CODE (XEXP (x
, 0)) == REG
977 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
978 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
980 rehash_using_reg (XEXP (x
, 0));
984 if (GET_CODE (XEXP (x
, 1)) == REG
985 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
986 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
988 rehash_using_reg (XEXP (x
, 1));
993 fmt
= GET_RTX_FORMAT (code
);
994 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
996 changed
|= mention_regs (XEXP (x
, i
));
997 else if (fmt
[i
] == 'E')
998 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
999 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1004 /* Update the register quantities for inserting X into the hash table
1005 with a value equivalent to CLASSP.
1006 (If the class does not contain a REG, it is irrelevant.)
1007 If MODIFIED is nonzero, X is a destination; it is being modified.
1008 Note that delete_reg_equiv should be called on a register
1009 before insert_regs is done on that register with MODIFIED != 0.
1011 Nonzero value means that elements of reg_qty have changed
1012 so X's hash code may be different. */
1015 insert_regs (x
, classp
, modified
)
1017 struct table_elt
*classp
;
1020 if (GET_CODE (x
) == REG
)
1022 register int regno
= REGNO (x
);
1024 /* If REGNO is in the equivalence table already but is of the
1025 wrong mode for that equivalence, don't do anything here. */
1027 if (REGNO_QTY_VALID_P (regno
)
1028 && qty_mode
[reg_qty
[regno
]] != GET_MODE (x
))
1031 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
1034 for (classp
= classp
->first_same_value
;
1036 classp
= classp
->next_same_value
)
1037 if (GET_CODE (classp
->exp
) == REG
1038 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1040 make_regs_eqv (regno
, REGNO (classp
->exp
));
1044 make_new_qty (regno
);
1045 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1052 /* If X is a SUBREG, we will likely be inserting the inner register in the
1053 table. If that register doesn't have an assigned quantity number at
1054 this point but does later, the insertion that we will be doing now will
1055 not be accessible because its hash code will have changed. So assign
1056 a quantity number now. */
1058 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1059 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1061 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1062 mention_regs (SUBREG_REG (x
));
1066 return mention_regs (x
);
1069 /* Look in or update the hash table. */
1071 /* Put the element ELT on the list of free elements. */
1075 struct table_elt
*elt
;
1077 elt
->next_same_hash
= free_element_chain
;
1078 free_element_chain
= elt
;
1081 /* Return an element that is free for use. */
1083 static struct table_elt
*
1086 struct table_elt
*elt
= free_element_chain
;
1089 free_element_chain
= elt
->next_same_hash
;
1093 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1096 /* Remove table element ELT from use in the table.
1097 HASH is its hash code, made using the HASH macro.
1098 It's an argument because often that is known in advance
1099 and we save much time not recomputing it. */
1102 remove_from_table (elt
, hash
)
1103 register struct table_elt
*elt
;
1109 /* Mark this element as removed. See cse_insn. */
1110 elt
->first_same_value
= 0;
1112 /* Remove the table element from its equivalence class. */
1115 register struct table_elt
*prev
= elt
->prev_same_value
;
1116 register struct table_elt
*next
= elt
->next_same_value
;
1118 if (next
) next
->prev_same_value
= prev
;
1121 prev
->next_same_value
= next
;
1124 register struct table_elt
*newfirst
= next
;
1127 next
->first_same_value
= newfirst
;
1128 next
= next
->next_same_value
;
1133 /* Remove the table element from its hash bucket. */
1136 register struct table_elt
*prev
= elt
->prev_same_hash
;
1137 register struct table_elt
*next
= elt
->next_same_hash
;
1139 if (next
) next
->prev_same_hash
= prev
;
1142 prev
->next_same_hash
= next
;
1143 else if (table
[hash
] == elt
)
1147 /* This entry is not in the proper hash bucket. This can happen
1148 when two classes were merged by `merge_equiv_classes'. Search
1149 for the hash bucket that it heads. This happens only very
1150 rarely, so the cost is acceptable. */
1151 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1152 if (table
[hash
] == elt
)
1157 /* Remove the table element from its related-value circular chain. */
1159 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1161 register struct table_elt
*p
= elt
->related_value
;
1162 while (p
->related_value
!= elt
)
1163 p
= p
->related_value
;
1164 p
->related_value
= elt
->related_value
;
1165 if (p
->related_value
== p
)
1166 p
->related_value
= 0;
1172 /* Look up X in the hash table and return its table element,
1173 or 0 if X is not in the table.
1175 MODE is the machine-mode of X, or if X is an integer constant
1176 with VOIDmode then MODE is the mode with which X will be used.
1178 Here we are satisfied to find an expression whose tree structure
1181 static struct table_elt
*
1182 lookup (x
, hash
, mode
)
1185 enum machine_mode mode
;
1187 register struct table_elt
*p
;
1189 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1190 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1191 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1197 /* Like `lookup' but don't care whether the table element uses invalid regs.
1198 Also ignore discrepancies in the machine mode of a register. */
1200 static struct table_elt
*
1201 lookup_for_remove (x
, hash
, mode
)
1204 enum machine_mode mode
;
1206 register struct table_elt
*p
;
1208 if (GET_CODE (x
) == REG
)
1210 int regno
= REGNO (x
);
1211 /* Don't check the machine mode when comparing registers;
1212 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1213 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1214 if (GET_CODE (p
->exp
) == REG
1215 && REGNO (p
->exp
) == regno
)
1220 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1221 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1228 /* Look for an expression equivalent to X and with code CODE.
1229 If one is found, return that expression. */
1232 lookup_as_function (x
, code
)
1236 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1241 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1243 if (GET_CODE (p
->exp
) == code
1244 /* Make sure this is a valid entry in the table. */
1245 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1252 /* Insert X in the hash table, assuming HASH is its hash code
1253 and CLASSP is an element of the class it should go in
1254 (or 0 if a new class should be made).
1255 It is inserted at the proper position to keep the class in
1256 the order cheapest first.
1258 MODE is the machine-mode of X, or if X is an integer constant
1259 with VOIDmode then MODE is the mode with which X will be used.
1261 For elements of equal cheapness, the most recent one
1262 goes in front, except that the first element in the list
1263 remains first unless a cheaper element is added. The order of
1264 pseudo-registers does not matter, as canon_reg will be called to
1265 find the cheapest when a register is retrieved from the table.
1267 The in_memory field in the hash table element is set to 0.
1268 The caller must set it nonzero if appropriate.
1270 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1271 and if insert_regs returns a nonzero value
1272 you must then recompute its hash code before calling here.
1274 If necessary, update table showing constant values of quantities. */
1276 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1278 static struct table_elt
*
1279 insert (x
, classp
, hash
, mode
)
1281 register struct table_elt
*classp
;
1283 enum machine_mode mode
;
1285 register struct table_elt
*elt
;
1287 /* If X is a register and we haven't made a quantity for it,
1288 something is wrong. */
1289 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1292 /* If X is a hard register, show it is being put in the table. */
1293 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1295 int regno
= REGNO (x
);
1296 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1299 for (i
= regno
; i
< endregno
; i
++)
1300 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1303 /* If X is a label, show we recorded it. */
1304 if (GET_CODE (x
) == LABEL_REF
1305 || (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
, 0)) == PLUS
1306 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == LABEL_REF
))
1307 recorded_label_ref
= 1;
1309 /* Put an element for X into the right hash bucket. */
1311 elt
= get_element ();
1313 elt
->cost
= COST (x
);
1314 elt
->next_same_value
= 0;
1315 elt
->prev_same_value
= 0;
1316 elt
->next_same_hash
= table
[hash
];
1317 elt
->prev_same_hash
= 0;
1318 elt
->related_value
= 0;
1321 elt
->is_const
= (CONSTANT_P (x
)
1322 /* GNU C++ takes advantage of this for `this'
1323 (and other const values). */
1324 || (RTX_UNCHANGING_P (x
)
1325 && GET_CODE (x
) == REG
1326 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1327 || FIXED_BASE_PLUS_P (x
));
1330 table
[hash
]->prev_same_hash
= elt
;
1333 /* Put it into the proper value-class. */
1336 classp
= classp
->first_same_value
;
1337 if (CHEAPER (elt
, classp
))
1338 /* Insert at the head of the class */
1340 register struct table_elt
*p
;
1341 elt
->next_same_value
= classp
;
1342 classp
->prev_same_value
= elt
;
1343 elt
->first_same_value
= elt
;
1345 for (p
= classp
; p
; p
= p
->next_same_value
)
1346 p
->first_same_value
= elt
;
1350 /* Insert not at head of the class. */
1351 /* Put it after the last element cheaper than X. */
1352 register struct table_elt
*p
, *next
;
1353 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1355 /* Put it after P and before NEXT. */
1356 elt
->next_same_value
= next
;
1358 next
->prev_same_value
= elt
;
1359 elt
->prev_same_value
= p
;
1360 p
->next_same_value
= elt
;
1361 elt
->first_same_value
= classp
;
1365 elt
->first_same_value
= elt
;
1367 /* If this is a constant being set equivalent to a register or a register
1368 being set equivalent to a constant, note the constant equivalence.
1370 If this is a constant, it cannot be equivalent to a different constant,
1371 and a constant is the only thing that can be cheaper than a register. So
1372 we know the register is the head of the class (before the constant was
1375 If this is a register that is not already known equivalent to a
1376 constant, we must check the entire class.
1378 If this is a register that is already known equivalent to an insn,
1379 update `qty_const_insn' to show that `this_insn' is the latest
1380 insn making that quantity equivalent to the constant. */
1382 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
1383 && GET_CODE (x
) != REG
)
1385 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1386 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1387 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1390 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]]
1393 register struct table_elt
*p
;
1395 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1397 if (p
->is_const
&& GET_CODE (p
->exp
) != REG
)
1399 qty_const
[reg_qty
[REGNO (x
)]]
1400 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1401 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1407 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1408 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1409 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1411 /* If this is a constant with symbolic value,
1412 and it has a term with an explicit integer value,
1413 link it up with related expressions. */
1414 if (GET_CODE (x
) == CONST
)
1416 rtx subexp
= get_related_value (x
);
1418 struct table_elt
*subelt
, *subelt_prev
;
1422 /* Get the integer-free subexpression in the hash table. */
1423 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1424 subelt
= lookup (subexp
, subhash
, mode
);
1426 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1427 /* Initialize SUBELT's circular chain if it has none. */
1428 if (subelt
->related_value
== 0)
1429 subelt
->related_value
= subelt
;
1430 /* Find the element in the circular chain that precedes SUBELT. */
1431 subelt_prev
= subelt
;
1432 while (subelt_prev
->related_value
!= subelt
)
1433 subelt_prev
= subelt_prev
->related_value
;
1434 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1435 This way the element that follows SUBELT is the oldest one. */
1436 elt
->related_value
= subelt_prev
->related_value
;
1437 subelt_prev
->related_value
= elt
;
1444 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1445 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1446 the two classes equivalent.
1448 CLASS1 will be the surviving class; CLASS2 should not be used after this
1451 Any invalid entries in CLASS2 will not be copied. */
1454 merge_equiv_classes (class1
, class2
)
1455 struct table_elt
*class1
, *class2
;
1457 struct table_elt
*elt
, *next
, *new;
1459 /* Ensure we start with the head of the classes. */
1460 class1
= class1
->first_same_value
;
1461 class2
= class2
->first_same_value
;
1463 /* If they were already equal, forget it. */
1464 if (class1
== class2
)
1467 for (elt
= class2
; elt
; elt
= next
)
1471 enum machine_mode mode
= elt
->mode
;
1473 next
= elt
->next_same_value
;
1475 /* Remove old entry, make a new one in CLASS1's class.
1476 Don't do this for invalid entries as we cannot find their
1477 hash code (it also isn't necessary). */
1478 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1480 hash_arg_in_memory
= 0;
1481 hash_arg_in_struct
= 0;
1482 hash
= HASH (exp
, mode
);
1484 if (GET_CODE (exp
) == REG
)
1485 delete_reg_equiv (REGNO (exp
));
1487 remove_from_table (elt
, hash
);
1489 if (insert_regs (exp
, class1
, 0))
1491 rehash_using_reg (exp
);
1492 hash
= HASH (exp
, mode
);
1494 new = insert (exp
, class1
, hash
, mode
);
1495 new->in_memory
= hash_arg_in_memory
;
1496 new->in_struct
= hash_arg_in_struct
;
1501 /* Remove from the hash table, or mark as invalid,
1502 all expressions whose values could be altered by storing in X.
1503 X is a register, a subreg, or a memory reference with nonvarying address
1504 (because, when a memory reference with a varying address is stored in,
1505 all memory references are removed by invalidate_memory
1506 so specific invalidation is superfluous).
1507 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1508 instead of just the amount indicated by the mode of X. This is only used
1509 for bitfield stores into memory.
1511 A nonvarying address may be just a register or just
1512 a symbol reference, or it may be either of those plus
1513 a numeric offset. */
1516 invalidate (x
, full_mode
)
1518 enum machine_mode full_mode
;
1521 register struct table_elt
*p
;
1523 /* If X is a register, dependencies on its contents
1524 are recorded through the qty number mechanism.
1525 Just change the qty number of the register,
1526 mark it as invalid for expressions that refer to it,
1527 and remove it itself. */
1529 if (GET_CODE (x
) == REG
)
1531 register int regno
= REGNO (x
);
1532 register unsigned hash
= HASH (x
, GET_MODE (x
));
1534 /* Remove REGNO from any quantity list it might be on and indicate
1535 that it's value might have changed. If it is a pseudo, remove its
1536 entry from the hash table.
1538 For a hard register, we do the first two actions above for any
1539 additional hard registers corresponding to X. Then, if any of these
1540 registers are in the table, we must remove any REG entries that
1541 overlap these registers. */
1543 delete_reg_equiv (regno
);
1546 if (regno
>= FIRST_PSEUDO_REGISTER
)
1548 /* Because a register can be referenced in more than one mode,
1549 we might have to remove more than one table entry. */
1551 struct table_elt
*elt
;
1553 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1554 remove_from_table (elt
, hash
);
1558 HOST_WIDE_INT in_table
1559 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1560 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1561 int tregno
, tendregno
;
1562 register struct table_elt
*p
, *next
;
1564 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1566 for (i
= regno
+ 1; i
< endregno
; i
++)
1568 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1569 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1570 delete_reg_equiv (i
);
1575 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1576 for (p
= table
[hash
]; p
; p
= next
)
1578 next
= p
->next_same_hash
;
1580 if (GET_CODE (p
->exp
) != REG
1581 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1584 tregno
= REGNO (p
->exp
);
1586 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1587 if (tendregno
> regno
&& tregno
< endregno
)
1588 remove_from_table (p
, hash
);
1595 if (GET_CODE (x
) == SUBREG
)
1597 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1599 invalidate (SUBREG_REG (x
), VOIDmode
);
1603 /* X is not a register; it must be a memory reference with
1604 a nonvarying address. Remove all hash table elements
1605 that refer to overlapping pieces of memory. */
1607 if (GET_CODE (x
) != MEM
)
1610 if (full_mode
== VOIDmode
)
1611 full_mode
= GET_MODE (x
);
1613 for (i
= 0; i
< NBUCKETS
; i
++)
1615 register struct table_elt
*next
;
1616 for (p
= table
[i
]; p
; p
= next
)
1618 next
= p
->next_same_hash
;
1619 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1620 than checking all the aliases). */
1622 && (GET_CODE (p
->exp
) != MEM
1623 || true_dependence (x
, full_mode
, p
->exp
, cse_rtx_varies_p
)))
1624 remove_from_table (p
, i
);
1629 /* Remove all expressions that refer to register REGNO,
1630 since they are already invalid, and we are about to
1631 mark that register valid again and don't want the old
1632 expressions to reappear as valid. */
1635 remove_invalid_refs (regno
)
1639 register struct table_elt
*p
, *next
;
1641 for (i
= 0; i
< NBUCKETS
; i
++)
1642 for (p
= table
[i
]; p
; p
= next
)
1644 next
= p
->next_same_hash
;
1645 if (GET_CODE (p
->exp
) != REG
1646 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1647 remove_from_table (p
, i
);
1651 /* Recompute the hash codes of any valid entries in the hash table that
1652 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1654 This is called when we make a jump equivalence. */
1657 rehash_using_reg (x
)
1661 struct table_elt
*p
, *next
;
1664 if (GET_CODE (x
) == SUBREG
)
1667 /* If X is not a register or if the register is known not to be in any
1668 valid entries in the table, we have no work to do. */
1670 if (GET_CODE (x
) != REG
1671 || reg_in_table
[REGNO (x
)] < 0
1672 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1675 /* Scan all hash chains looking for valid entries that mention X.
1676 If we find one and it is in the wrong hash chain, move it. We can skip
1677 objects that are registers, since they are handled specially. */
1679 for (i
= 0; i
< NBUCKETS
; i
++)
1680 for (p
= table
[i
]; p
; p
= next
)
1682 next
= p
->next_same_hash
;
1683 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1684 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1685 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1687 if (p
->next_same_hash
)
1688 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1690 if (p
->prev_same_hash
)
1691 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1693 table
[i
] = p
->next_same_hash
;
1695 p
->next_same_hash
= table
[hash
];
1696 p
->prev_same_hash
= 0;
1698 table
[hash
]->prev_same_hash
= p
;
1704 /* Remove from the hash table any expression that is a call-clobbered
1705 register. Also update their TICK values. */
1708 invalidate_for_call ()
1710 int regno
, endregno
;
1713 struct table_elt
*p
, *next
;
1716 /* Go through all the hard registers. For each that is clobbered in
1717 a CALL_INSN, remove the register from quantity chains and update
1718 reg_tick if defined. Also see if any of these registers is currently
1721 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1722 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1724 delete_reg_equiv (regno
);
1725 if (reg_tick
[regno
] >= 0)
1728 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1731 /* In the case where we have no call-clobbered hard registers in the
1732 table, we are done. Otherwise, scan the table and remove any
1733 entry that overlaps a call-clobbered register. */
1736 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1737 for (p
= table
[hash
]; p
; p
= next
)
1739 next
= p
->next_same_hash
;
1743 remove_from_table (p
, hash
);
1747 if (GET_CODE (p
->exp
) != REG
1748 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1751 regno
= REGNO (p
->exp
);
1752 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1754 for (i
= regno
; i
< endregno
; i
++)
1755 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1757 remove_from_table (p
, hash
);
1763 /* Given an expression X of type CONST,
1764 and ELT which is its table entry (or 0 if it
1765 is not in the hash table),
1766 return an alternate expression for X as a register plus integer.
1767 If none can be found, return 0. */
1770 use_related_value (x
, elt
)
1772 struct table_elt
*elt
;
1774 register struct table_elt
*relt
= 0;
1775 register struct table_elt
*p
, *q
;
1776 HOST_WIDE_INT offset
;
1778 /* First, is there anything related known?
1779 If we have a table element, we can tell from that.
1780 Otherwise, must look it up. */
1782 if (elt
!= 0 && elt
->related_value
!= 0)
1784 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1786 rtx subexp
= get_related_value (x
);
1788 relt
= lookup (subexp
,
1789 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1796 /* Search all related table entries for one that has an
1797 equivalent register. */
1802 /* This loop is strange in that it is executed in two different cases.
1803 The first is when X is already in the table. Then it is searching
1804 the RELATED_VALUE list of X's class (RELT). The second case is when
1805 X is not in the table. Then RELT points to a class for the related
1808 Ensure that, whatever case we are in, that we ignore classes that have
1809 the same value as X. */
1811 if (rtx_equal_p (x
, p
->exp
))
1814 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1815 if (GET_CODE (q
->exp
) == REG
)
1821 p
= p
->related_value
;
1823 /* We went all the way around, so there is nothing to be found.
1824 Alternatively, perhaps RELT was in the table for some other reason
1825 and it has no related values recorded. */
1826 if (p
== relt
|| p
== 0)
1833 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1834 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1835 return plus_constant (q
->exp
, offset
);
1838 /* Hash an rtx. We are careful to make sure the value is never negative.
1839 Equivalent registers hash identically.
1840 MODE is used in hashing for CONST_INTs only;
1841 otherwise the mode of X is used.
1843 Store 1 in do_not_record if any subexpression is volatile.
1845 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1846 which does not have the RTX_UNCHANGING_P bit set.
1847 In this case, also store 1 in hash_arg_in_struct
1848 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1850 Note that cse_insn knows that the hash code of a MEM expression
1851 is just (int) MEM plus the hash code of the address. */
1854 canon_hash (x
, mode
)
1856 enum machine_mode mode
;
1859 register unsigned hash
= 0;
1860 register enum rtx_code code
;
1863 /* repeat is used to turn tail-recursion into iteration. */
1868 code
= GET_CODE (x
);
1873 register int regno
= REGNO (x
);
1875 /* On some machines, we can't record any non-fixed hard register,
1876 because extending its life will cause reload problems. We
1877 consider ap, fp, and sp to be fixed for this purpose.
1878 On all machines, we can't record any global registers. */
1880 if (regno
< FIRST_PSEUDO_REGISTER
1881 && (global_regs
[regno
]
1882 || (SMALL_REGISTER_CLASSES
1883 && ! fixed_regs
[regno
]
1884 && regno
!= FRAME_POINTER_REGNUM
1885 && regno
!= HARD_FRAME_POINTER_REGNUM
1886 && regno
!= ARG_POINTER_REGNUM
1887 && regno
!= STACK_POINTER_REGNUM
)))
1892 hash
+= ((unsigned) REG
<< 7) + (unsigned) reg_qty
[regno
];
1898 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
1899 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
1904 /* This is like the general case, except that it only counts
1905 the integers representing the constant. */
1906 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1907 if (GET_MODE (x
) != VOIDmode
)
1908 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1910 unsigned tem
= XINT (x
, i
);
1914 hash
+= ((unsigned) CONST_DOUBLE_LOW (x
)
1915 + (unsigned) CONST_DOUBLE_HIGH (x
));
1918 /* Assume there is only one rtx object for any given label. */
1921 += ((unsigned) LABEL_REF
<< 7) + (unsigned long) XEXP (x
, 0);
1926 += ((unsigned) SYMBOL_REF
<< 7) + (unsigned long) XSTR (x
, 0);
1930 if (MEM_VOLATILE_P (x
))
1935 if (! RTX_UNCHANGING_P (x
) || FIXED_BASE_PLUS_P (XEXP (x
, 0)))
1937 hash_arg_in_memory
= 1;
1938 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1940 /* Now that we have already found this special case,
1941 might as well speed it up as much as possible. */
1942 hash
+= (unsigned) MEM
;
1953 case UNSPEC_VOLATILE
:
1958 if (MEM_VOLATILE_P (x
))
1969 i
= GET_RTX_LENGTH (code
) - 1;
1970 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
1971 fmt
= GET_RTX_FORMAT (code
);
1976 rtx tem
= XEXP (x
, i
);
1978 /* If we are about to do the last recursive call
1979 needed at this level, change it into iteration.
1980 This function is called enough to be worth it. */
1986 hash
+= canon_hash (tem
, 0);
1988 else if (fmt
[i
] == 'E')
1989 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1990 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1991 else if (fmt
[i
] == 's')
1993 register unsigned char *p
= (unsigned char *) XSTR (x
, i
);
1998 else if (fmt
[i
] == 'i')
2000 register unsigned tem
= XINT (x
, i
);
2003 else if (fmt
[i
] == '0')
2011 /* Like canon_hash but with no side effects. */
2016 enum machine_mode mode
;
2018 int save_do_not_record
= do_not_record
;
2019 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2020 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2021 unsigned hash
= canon_hash (x
, mode
);
2022 hash_arg_in_memory
= save_hash_arg_in_memory
;
2023 hash_arg_in_struct
= save_hash_arg_in_struct
;
2024 do_not_record
= save_do_not_record
;
2028 /* Return 1 iff X and Y would canonicalize into the same thing,
2029 without actually constructing the canonicalization of either one.
2030 If VALIDATE is nonzero,
2031 we assume X is an expression being processed from the rtl
2032 and Y was found in the hash table. We check register refs
2033 in Y for being marked as valid.
2035 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2036 that is known to be in the register. Ordinarily, we don't allow them
2037 to match, because letting them match would cause unpredictable results
2038 in all the places that search a hash table chain for an equivalent
2039 for a given value. A possible equivalent that has different structure
2040 has its hash code computed from different data. Whether the hash code
2041 is the same as that of the the given value is pure luck. */
2044 exp_equiv_p (x
, y
, validate
, equal_values
)
2050 register enum rtx_code code
;
2053 /* Note: it is incorrect to assume an expression is equivalent to itself
2054 if VALIDATE is nonzero. */
2055 if (x
== y
&& !validate
)
2057 if (x
== 0 || y
== 0)
2060 code
= GET_CODE (x
);
2061 if (code
!= GET_CODE (y
))
2066 /* If X is a constant and Y is a register or vice versa, they may be
2067 equivalent. We only have to validate if Y is a register. */
2068 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2069 && REGNO_QTY_VALID_P (REGNO (y
))
2070 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2071 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2072 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2075 if (CONSTANT_P (y
) && code
== REG
2076 && REGNO_QTY_VALID_P (REGNO (x
))
2077 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2078 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2084 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2085 if (GET_MODE (x
) != GET_MODE (y
))
2095 return INTVAL (x
) == INTVAL (y
);
2098 return XEXP (x
, 0) == XEXP (y
, 0);
2101 return XSTR (x
, 0) == XSTR (y
, 0);
2105 int regno
= REGNO (y
);
2107 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2108 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2111 /* If the quantities are not the same, the expressions are not
2112 equivalent. If there are and we are not to validate, they
2113 are equivalent. Otherwise, ensure all regs are up-to-date. */
2115 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2121 for (i
= regno
; i
< endregno
; i
++)
2122 if (reg_in_table
[i
] != reg_tick
[i
])
2128 /* For commutative operations, check both orders. */
2136 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2137 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2138 validate
, equal_values
))
2139 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2140 validate
, equal_values
)
2141 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2142 validate
, equal_values
)));
2148 /* Compare the elements. If any pair of corresponding elements
2149 fail to match, return 0 for the whole things. */
2151 fmt
= GET_RTX_FORMAT (code
);
2152 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2157 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2162 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2164 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2165 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2166 validate
, equal_values
))
2171 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2176 if (XINT (x
, i
) != XINT (y
, i
))
2181 if (XWINT (x
, i
) != XWINT (y
, i
))
2196 /* Return 1 iff any subexpression of X matches Y.
2197 Here we do not require that X or Y be valid (for registers referred to)
2198 for being in the hash table. */
2205 register enum rtx_code code
;
2211 if (x
== 0 || y
== 0)
2214 code
= GET_CODE (x
);
2215 /* If X as a whole has the same code as Y, they may match.
2217 if (code
== GET_CODE (y
))
2219 if (exp_equiv_p (x
, y
, 0, 1))
2223 /* X does not match, so try its subexpressions. */
2225 fmt
= GET_RTX_FORMAT (code
);
2226 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2235 if (refers_to_p (XEXP (x
, i
), y
))
2238 else if (fmt
[i
] == 'E')
2241 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2242 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2249 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2250 set PBASE, PSTART, and PEND which correspond to the base of the address,
2251 the starting offset, and ending offset respectively.
2253 ADDR is known to be a nonvarying address. */
2255 /* ??? Despite what the comments say, this function is in fact frequently
2256 passed varying addresses. This does not appear to cause any problems. */
2259 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2263 HOST_WIDE_INT
*pstart
, *pend
;
2266 HOST_WIDE_INT start
, end
;
2272 /* Registers with nonvarying addresses usually have constant equivalents;
2273 but the frame pointer register is also possible. */
2274 if (GET_CODE (base
) == REG
2276 && REGNO_QTY_VALID_P (REGNO (base
))
2277 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2278 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2279 base
= qty_const
[reg_qty
[REGNO (base
)]];
2280 else if (GET_CODE (base
) == PLUS
2281 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2282 && GET_CODE (XEXP (base
, 0)) == REG
2284 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2285 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2286 == GET_MODE (XEXP (base
, 0)))
2287 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2289 start
= INTVAL (XEXP (base
, 1));
2290 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2292 /* This can happen as the result of virtual register instantiation,
2293 if the initial offset is too large to be a valid address. */
2294 else if (GET_CODE (base
) == PLUS
2295 && GET_CODE (XEXP (base
, 0)) == REG
2296 && GET_CODE (XEXP (base
, 1)) == REG
2298 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2299 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2300 == GET_MODE (XEXP (base
, 0)))
2301 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]]
2302 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 1)))
2303 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 1))]]
2304 == GET_MODE (XEXP (base
, 1)))
2305 && qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]])
2307 rtx tem
= qty_const
[reg_qty
[REGNO (XEXP (base
, 1))]];
2308 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2310 /* One of the two values must be a constant. */
2311 if (GET_CODE (base
) != CONST_INT
)
2313 if (GET_CODE (tem
) != CONST_INT
)
2315 start
= INTVAL (tem
);
2319 start
= INTVAL (base
);
2324 /* Handle everything that we can find inside an address that has been
2325 viewed as constant. */
2329 /* If no part of this switch does a "continue", the code outside
2330 will exit this loop. */
2332 switch (GET_CODE (base
))
2335 /* By definition, operand1 of a LO_SUM is the associated constant
2336 address. Use the associated constant address as the base
2338 base
= XEXP (base
, 1);
2342 /* Strip off CONST. */
2343 base
= XEXP (base
, 0);
2347 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2349 start
+= INTVAL (XEXP (base
, 1));
2350 base
= XEXP (base
, 0);
2356 /* Handle the case of an AND which is the negative of a power of
2357 two. This is used to represent unaligned memory operations. */
2358 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
2359 && exact_log2 (- INTVAL (XEXP (base
, 1))) > 0)
2361 set_nonvarying_address_components (XEXP (base
, 0), size
,
2362 pbase
, pstart
, pend
);
2364 /* Assume the worst misalignment. START is affected, but not
2365 END, so compensate but adjusting SIZE. Don't lose any
2366 constant we already had. */
2368 size
= *pend
- *pstart
- INTVAL (XEXP (base
, 1)) - 1;
2369 start
+= *pstart
+ INTVAL (XEXP (base
, 1)) + 1;
2382 if (GET_CODE (base
) == CONST_INT
)
2384 start
+= INTVAL (base
);
2390 /* Set the return values. */
2396 /* Return 1 if X has a value that can vary even between two
2397 executions of the program. 0 means X can be compared reliably
2398 against certain constants or near-constants. */
2401 cse_rtx_varies_p (x
)
2404 /* We need not check for X and the equivalence class being of the same
2405 mode because if X is equivalent to a constant in some mode, it
2406 doesn't vary in any mode. */
2408 if (GET_CODE (x
) == REG
2409 && REGNO_QTY_VALID_P (REGNO (x
))
2410 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2411 && qty_const
[reg_qty
[REGNO (x
)]] != 0)
2414 if (GET_CODE (x
) == PLUS
2415 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2416 && GET_CODE (XEXP (x
, 0)) == REG
2417 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2418 && (GET_MODE (XEXP (x
, 0))
2419 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]])
2420 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]])
2423 /* This can happen as the result of virtual register instantiation, if
2424 the initial constant is too large to be a valid address. This gives
2425 us a three instruction sequence, load large offset into a register,
2426 load fp minus a constant into a register, then a MEM which is the
2427 sum of the two `constant' registers. */
2428 if (GET_CODE (x
) == PLUS
2429 && GET_CODE (XEXP (x
, 0)) == REG
2430 && GET_CODE (XEXP (x
, 1)) == REG
2431 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2432 && (GET_MODE (XEXP (x
, 0))
2433 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]])
2434 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]]
2435 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1)))
2436 && (GET_MODE (XEXP (x
, 1))
2437 == qty_mode
[reg_qty
[REGNO (XEXP (x
, 1))]])
2438 && qty_const
[reg_qty
[REGNO (XEXP (x
, 1))]])
2441 return rtx_varies_p (x
);
2444 /* Canonicalize an expression:
2445 replace each register reference inside it
2446 with the "oldest" equivalent register.
2448 If INSN is non-zero and we are replacing a pseudo with a hard register
2449 or vice versa, validate_change is used to ensure that INSN remains valid
2450 after we make our substitution. The calls are made with IN_GROUP non-zero
2451 so apply_change_group must be called upon the outermost return from this
2452 function (unless INSN is zero). The result of apply_change_group can
2453 generally be discarded since the changes we are making are optional. */
2461 register enum rtx_code code
;
2467 code
= GET_CODE (x
);
2485 /* Never replace a hard reg, because hard regs can appear
2486 in more than one machine mode, and we must preserve the mode
2487 of each occurrence. Also, some hard regs appear in
2488 MEMs that are shared and mustn't be altered. Don't try to
2489 replace any reg that maps to a reg of class NO_REGS. */
2490 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2491 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2494 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2495 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2496 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2497 : gen_rtx_REG (qty_mode
[reg_qty
[REGNO (x
)]], first
));
2504 fmt
= GET_RTX_FORMAT (code
);
2505 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2511 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2514 /* If replacing pseudo with hard reg or vice versa, ensure the
2515 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2516 if (insn
!= 0 && new != 0
2517 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2518 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2519 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2520 || (insn_code
= recog_memoized (insn
)) < 0
2521 || insn_n_dups
[insn_code
] > 0))
2522 validate_change (insn
, &XEXP (x
, i
), new, 1);
2526 else if (fmt
[i
] == 'E')
2527 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2528 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2534 /* LOC is a location within INSN that is an operand address (the contents of
2535 a MEM). Find the best equivalent address to use that is valid for this
2538 On most CISC machines, complicated address modes are costly, and rtx_cost
2539 is a good approximation for that cost. However, most RISC machines have
2540 only a few (usually only one) memory reference formats. If an address is
2541 valid at all, it is often just as cheap as any other address. Hence, for
2542 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2543 costs of various addresses. For two addresses of equal cost, choose the one
2544 with the highest `rtx_cost' value as that has the potential of eliminating
2545 the most insns. For equal costs, we choose the first in the equivalence
2546 class. Note that we ignore the fact that pseudo registers are cheaper
2547 than hard registers here because we would also prefer the pseudo registers.
2551 find_best_addr (insn
, loc
)
2555 struct table_elt
*elt
, *p
;
2557 int found_better
= 1;
2558 int save_do_not_record
= do_not_record
;
2559 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2560 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2565 /* Do not try to replace constant addresses or addresses of local and
2566 argument slots. These MEM expressions are made only once and inserted
2567 in many instructions, as well as being used to control symbol table
2568 output. It is not safe to clobber them.
2570 There are some uncommon cases where the address is already in a register
2571 for some reason, but we cannot take advantage of that because we have
2572 no easy way to unshare the MEM. In addition, looking up all stack
2573 addresses is costly. */
2574 if ((GET_CODE (addr
) == PLUS
2575 && GET_CODE (XEXP (addr
, 0)) == REG
2576 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2577 && (regno
= REGNO (XEXP (addr
, 0)),
2578 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2579 || regno
== ARG_POINTER_REGNUM
))
2580 || (GET_CODE (addr
) == REG
2581 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2582 || regno
== HARD_FRAME_POINTER_REGNUM
2583 || regno
== ARG_POINTER_REGNUM
))
2584 || GET_CODE (addr
) == ADDRESSOF
2585 || CONSTANT_ADDRESS_P (addr
))
2588 /* If this address is not simply a register, try to fold it. This will
2589 sometimes simplify the expression. Many simplifications
2590 will not be valid, but some, usually applying the associative rule, will
2591 be valid and produce better code. */
2592 if (GET_CODE (addr
) != REG
)
2594 rtx folded
= fold_rtx (copy_rtx (addr
), NULL_RTX
);
2598 && (ADDRESS_COST (folded
) < ADDRESS_COST (addr
)
2599 || (ADDRESS_COST (folded
) == ADDRESS_COST (addr
)
2600 && rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)))
2602 && rtx_cost (folded
, MEM
) < rtx_cost (addr
, MEM
)
2604 && validate_change (insn
, loc
, folded
, 0))
2608 /* If this address is not in the hash table, we can't look for equivalences
2609 of the whole address. Also, ignore if volatile. */
2612 hash
= HASH (addr
, Pmode
);
2613 addr_volatile
= do_not_record
;
2614 do_not_record
= save_do_not_record
;
2615 hash_arg_in_memory
= save_hash_arg_in_memory
;
2616 hash_arg_in_struct
= save_hash_arg_in_struct
;
2621 elt
= lookup (addr
, hash
, Pmode
);
2623 #ifndef ADDRESS_COST
2626 int our_cost
= elt
->cost
;
2628 /* Find the lowest cost below ours that works. */
2629 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2630 if (elt
->cost
< our_cost
2631 && (GET_CODE (elt
->exp
) == REG
2632 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2633 && validate_change (insn
, loc
,
2634 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2641 /* We need to find the best (under the criteria documented above) entry
2642 in the class that is valid. We use the `flag' field to indicate
2643 choices that were invalid and iterate until we can't find a better
2644 one that hasn't already been tried. */
2646 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2649 while (found_better
)
2651 int best_addr_cost
= ADDRESS_COST (*loc
);
2652 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2653 struct table_elt
*best_elt
= elt
;
2656 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2658 && (GET_CODE (p
->exp
) == REG
2659 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2660 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2661 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2662 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2665 best_addr_cost
= ADDRESS_COST (p
->exp
);
2666 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2672 if (validate_change (insn
, loc
,
2673 canon_reg (copy_rtx (best_elt
->exp
),
2682 /* If the address is a binary operation with the first operand a register
2683 and the second a constant, do the same as above, but looking for
2684 equivalences of the register. Then try to simplify before checking for
2685 the best address to use. This catches a few cases: First is when we
2686 have REG+const and the register is another REG+const. We can often merge
2687 the constants and eliminate one insn and one register. It may also be
2688 that a machine has a cheap REG+REG+const. Finally, this improves the
2689 code on the Alpha for unaligned byte stores. */
2691 if (flag_expensive_optimizations
2692 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2693 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2694 && GET_CODE (XEXP (*loc
, 0)) == REG
2695 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2697 rtx c
= XEXP (*loc
, 1);
2700 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2701 do_not_record
= save_do_not_record
;
2702 hash_arg_in_memory
= save_hash_arg_in_memory
;
2703 hash_arg_in_struct
= save_hash_arg_in_struct
;
2705 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2709 /* We need to find the best (under the criteria documented above) entry
2710 in the class that is valid. We use the `flag' field to indicate
2711 choices that were invalid and iterate until we can't find a better
2712 one that hasn't already been tried. */
2714 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2717 while (found_better
)
2719 int best_addr_cost
= ADDRESS_COST (*loc
);
2720 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2721 struct table_elt
*best_elt
= elt
;
2722 rtx best_rtx
= *loc
;
2725 /* This is at worst case an O(n^2) algorithm, so limit our search
2726 to the first 32 elements on the list. This avoids trouble
2727 compiling code with very long basic blocks that can easily
2728 call cse_gen_binary so many times that we run out of memory. */
2731 for (p
= elt
->first_same_value
, count
= 0;
2733 p
= p
->next_same_value
, count
++)
2735 && (GET_CODE (p
->exp
) == REG
2736 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2738 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2740 if ((ADDRESS_COST (new) < best_addr_cost
2741 || (ADDRESS_COST (new) == best_addr_cost
2742 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2745 best_addr_cost
= ADDRESS_COST (new);
2746 best_rtx_cost
= (COST (new) + 1) >> 1;
2754 if (validate_change (insn
, loc
,
2755 canon_reg (copy_rtx (best_rtx
),
2766 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2767 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2768 what values are being compared.
2770 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2771 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2772 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2773 compared to produce cc0.
2775 The return value is the comparison operator and is either the code of
2776 A or the code corresponding to the inverse of the comparison. */
2778 static enum rtx_code
2779 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2782 enum machine_mode
*pmode1
, *pmode2
;
2786 arg1
= *parg1
, arg2
= *parg2
;
2788 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2790 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2792 /* Set non-zero when we find something of interest. */
2794 int reverse_code
= 0;
2795 struct table_elt
*p
= 0;
2797 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2798 On machines with CC0, this is the only case that can occur, since
2799 fold_rtx will return the COMPARE or item being compared with zero
2802 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2805 /* If ARG1 is a comparison operator and CODE is testing for
2806 STORE_FLAG_VALUE, get the inner arguments. */
2808 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2811 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2812 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2813 #ifdef FLOAT_STORE_FLAG_VALUE
2814 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2815 && FLOAT_STORE_FLAG_VALUE
< 0)
2820 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2821 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2822 #ifdef FLOAT_STORE_FLAG_VALUE
2823 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2824 && FLOAT_STORE_FLAG_VALUE
< 0)
2827 x
= arg1
, reverse_code
= 1;
2830 /* ??? We could also check for
2832 (ne (and (eq (...) (const_int 1))) (const_int 0))
2834 and related forms, but let's wait until we see them occurring. */
2837 /* Look up ARG1 in the hash table and see if it has an equivalence
2838 that lets us see what is being compared. */
2839 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2841 if (p
) p
= p
->first_same_value
;
2843 for (; p
; p
= p
->next_same_value
)
2845 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2847 /* If the entry isn't valid, skip it. */
2848 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2851 if (GET_CODE (p
->exp
) == COMPARE
2852 /* Another possibility is that this machine has a compare insn
2853 that includes the comparison code. In that case, ARG1 would
2854 be equivalent to a comparison operation that would set ARG1 to
2855 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2856 ORIG_CODE is the actual comparison being done; if it is an EQ,
2857 we must reverse ORIG_CODE. On machine with a negative value
2858 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2861 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2862 && (GET_MODE_BITSIZE (inner_mode
)
2863 <= HOST_BITS_PER_WIDE_INT
)
2864 && (STORE_FLAG_VALUE
2865 & ((HOST_WIDE_INT
) 1
2866 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2867 #ifdef FLOAT_STORE_FLAG_VALUE
2869 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2870 && FLOAT_STORE_FLAG_VALUE
< 0)
2873 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2878 else if ((code
== EQ
2880 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2881 && (GET_MODE_BITSIZE (inner_mode
)
2882 <= HOST_BITS_PER_WIDE_INT
)
2883 && (STORE_FLAG_VALUE
2884 & ((HOST_WIDE_INT
) 1
2885 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2886 #ifdef FLOAT_STORE_FLAG_VALUE
2888 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2889 && FLOAT_STORE_FLAG_VALUE
< 0)
2892 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2899 /* If this is fp + constant, the equivalent is a better operand since
2900 it may let us predict the value of the comparison. */
2901 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2908 /* If we didn't find a useful equivalence for ARG1, we are done.
2909 Otherwise, set up for the next iteration. */
2913 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2914 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2915 code
= GET_CODE (x
);
2918 code
= reverse_condition (code
);
2921 /* Return our results. Return the modes from before fold_rtx
2922 because fold_rtx might produce const_int, and then it's too late. */
2923 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2924 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2929 /* Try to simplify a unary operation CODE whose output mode is to be
2930 MODE with input operand OP whose mode was originally OP_MODE.
2931 Return zero if no simplification can be made. */
2934 simplify_unary_operation (code
, mode
, op
, op_mode
)
2936 enum machine_mode mode
;
2938 enum machine_mode op_mode
;
2940 register int width
= GET_MODE_BITSIZE (mode
);
2942 /* The order of these tests is critical so that, for example, we don't
2943 check the wrong mode (input vs. output) for a conversion operation,
2944 such as FIX. At some point, this should be simplified. */
2946 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
2948 if (code
== FLOAT
&& GET_MODE (op
) == VOIDmode
2949 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2951 HOST_WIDE_INT hv
, lv
;
2954 if (GET_CODE (op
) == CONST_INT
)
2955 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
2957 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
2959 #ifdef REAL_ARITHMETIC
2960 REAL_VALUE_FROM_INT (d
, lv
, hv
, mode
);
2964 d
= (double) (~ hv
);
2965 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2966 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2967 d
+= (double) (unsigned HOST_WIDE_INT
) (~ lv
);
2973 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2974 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2975 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
2977 #endif /* REAL_ARITHMETIC */
2978 d
= real_value_truncate (mode
, d
);
2979 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2981 else if (code
== UNSIGNED_FLOAT
&& GET_MODE (op
) == VOIDmode
2982 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2984 HOST_WIDE_INT hv
, lv
;
2987 if (GET_CODE (op
) == CONST_INT
)
2988 lv
= INTVAL (op
), hv
= INTVAL (op
) < 0 ? -1 : 0;
2990 lv
= CONST_DOUBLE_LOW (op
), hv
= CONST_DOUBLE_HIGH (op
);
2992 if (op_mode
== VOIDmode
)
2994 /* We don't know how to interpret negative-looking numbers in
2995 this case, so don't try to fold those. */
2999 else if (GET_MODE_BITSIZE (op_mode
) >= HOST_BITS_PER_WIDE_INT
* 2)
3002 hv
= 0, lv
&= GET_MODE_MASK (op_mode
);
3004 #ifdef REAL_ARITHMETIC
3005 REAL_VALUE_FROM_UNSIGNED_INT (d
, lv
, hv
, mode
);
3008 d
= (double) (unsigned HOST_WIDE_INT
) hv
;
3009 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
3010 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
3011 d
+= (double) (unsigned HOST_WIDE_INT
) lv
;
3012 #endif /* REAL_ARITHMETIC */
3013 d
= real_value_truncate (mode
, d
);
3014 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3018 if (GET_CODE (op
) == CONST_INT
3019 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3021 register HOST_WIDE_INT arg0
= INTVAL (op
);
3022 register HOST_WIDE_INT val
;
3035 val
= (arg0
>= 0 ? arg0
: - arg0
);
3039 /* Don't use ffs here. Instead, get low order bit and then its
3040 number. If arg0 is zero, this will return 0, as desired. */
3041 arg0
&= GET_MODE_MASK (mode
);
3042 val
= exact_log2 (arg0
& (- arg0
)) + 1;
3050 if (op_mode
== VOIDmode
)
3052 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3054 /* If we were really extending the mode,
3055 we would have to distinguish between zero-extension
3056 and sign-extension. */
3057 if (width
!= GET_MODE_BITSIZE (op_mode
))
3061 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3062 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3068 if (op_mode
== VOIDmode
)
3070 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
3072 /* If we were really extending the mode,
3073 we would have to distinguish between zero-extension
3074 and sign-extension. */
3075 if (width
!= GET_MODE_BITSIZE (op_mode
))
3079 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
3082 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
3084 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
3085 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3098 /* Clear the bits that don't belong in our mode,
3099 unless they and our sign bit are all one.
3100 So we get either a reasonable negative value or a reasonable
3101 unsigned value for this mode. */
3102 if (width
< HOST_BITS_PER_WIDE_INT
3103 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3104 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3105 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3107 return GEN_INT (val
);
3110 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3111 for a DImode operation on a CONST_INT. */
3112 else if (GET_MODE (op
) == VOIDmode
&& width
<= HOST_BITS_PER_INT
* 2
3113 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3115 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3117 if (GET_CODE (op
) == CONST_DOUBLE
)
3118 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3120 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3130 neg_double (l1
, h1
, &lv
, &hv
);
3135 neg_double (l1
, h1
, &lv
, &hv
);
3143 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3145 lv
= exact_log2 (l1
& (-l1
)) + 1;
3149 /* This is just a change-of-mode, so do nothing. */
3154 if (op_mode
== VOIDmode
3155 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3159 lv
= l1
& GET_MODE_MASK (op_mode
);
3163 if (op_mode
== VOIDmode
3164 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3168 lv
= l1
& GET_MODE_MASK (op_mode
);
3169 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3170 && (lv
& ((HOST_WIDE_INT
) 1
3171 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3172 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3174 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3185 return immed_double_const (lv
, hv
, mode
);
3188 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3189 else if (GET_CODE (op
) == CONST_DOUBLE
3190 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3196 if (setjmp (handler
))
3197 /* There used to be a warning here, but that is inadvisable.
3198 People may want to cause traps, and the natural way
3199 to do it should not get a warning. */
3202 set_float_handler (handler
);
3204 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3209 d
= REAL_VALUE_NEGATE (d
);
3213 if (REAL_VALUE_NEGATIVE (d
))
3214 d
= REAL_VALUE_NEGATE (d
);
3217 case FLOAT_TRUNCATE
:
3218 d
= real_value_truncate (mode
, d
);
3222 /* All this does is change the mode. */
3226 d
= REAL_VALUE_RNDZINT (d
);
3230 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3240 x
= CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
3241 set_float_handler (NULL_PTR
);
3245 else if (GET_CODE (op
) == CONST_DOUBLE
3246 && GET_MODE_CLASS (GET_MODE (op
)) == MODE_FLOAT
3247 && GET_MODE_CLASS (mode
) == MODE_INT
3248 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3254 if (setjmp (handler
))
3257 set_float_handler (handler
);
3259 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3264 val
= REAL_VALUE_FIX (d
);
3268 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3275 set_float_handler (NULL_PTR
);
3277 /* Clear the bits that don't belong in our mode,
3278 unless they and our sign bit are all one.
3279 So we get either a reasonable negative value or a reasonable
3280 unsigned value for this mode. */
3281 if (width
< HOST_BITS_PER_WIDE_INT
3282 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3283 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3284 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3286 /* If this would be an entire word for the target, but is not for
3287 the host, then sign-extend on the host so that the number will look
3288 the same way on the host that it would on the target.
3290 For example, when building a 64 bit alpha hosted 32 bit sparc
3291 targeted compiler, then we want the 32 bit unsigned value -1 to be
3292 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3293 The later confuses the sparc backend. */
3295 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
3296 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
3297 val
|= ((HOST_WIDE_INT
) (-1) << width
);
3299 return GEN_INT (val
);
3302 /* This was formerly used only for non-IEEE float.
3303 eggert@twinsun.com says it is safe for IEEE also. */
3306 /* There are some simplifications we can do even if the operands
3312 /* (not (not X)) == X, similarly for NEG. */
3313 if (GET_CODE (op
) == code
)
3314 return XEXP (op
, 0);
3318 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3319 becomes just the MINUS if its mode is MODE. This allows
3320 folding switch statements on machines using casesi (such as
3322 if (GET_CODE (op
) == TRUNCATE
3323 && GET_MODE (XEXP (op
, 0)) == mode
3324 && GET_CODE (XEXP (op
, 0)) == MINUS
3325 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3326 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3327 return XEXP (op
, 0);
3329 #ifdef POINTERS_EXTEND_UNSIGNED
3330 if (! POINTERS_EXTEND_UNSIGNED
3331 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3333 return convert_memory_address (Pmode
, op
);
3337 #ifdef POINTERS_EXTEND_UNSIGNED
3339 if (POINTERS_EXTEND_UNSIGNED
3340 && mode
== Pmode
&& GET_MODE (op
) == ptr_mode
3342 return convert_memory_address (Pmode
, op
);
3354 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3355 and OP1. Return 0 if no simplification is possible.
3357 Don't use this for relational operations such as EQ or LT.
3358 Use simplify_relational_operation instead. */
3361 simplify_binary_operation (code
, mode
, op0
, op1
)
3363 enum machine_mode mode
;
3366 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3368 int width
= GET_MODE_BITSIZE (mode
);
3371 /* Relational operations don't work here. We must know the mode
3372 of the operands in order to do the comparison correctly.
3373 Assuming a full word can give incorrect results.
3374 Consider comparing 128 with -128 in QImode. */
3376 if (GET_RTX_CLASS (code
) == '<')
3379 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3380 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3381 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3382 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3384 REAL_VALUE_TYPE f0
, f1
, value
;
3387 if (setjmp (handler
))
3390 set_float_handler (handler
);
3392 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3393 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3394 f0
= real_value_truncate (mode
, f0
);
3395 f1
= real_value_truncate (mode
, f1
);
3397 #ifdef REAL_ARITHMETIC
3398 #ifndef REAL_INFINITY
3399 if (code
== DIV
&& REAL_VALUES_EQUAL (f1
, dconst0
))
3402 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3416 #ifndef REAL_INFINITY
3423 value
= MIN (f0
, f1
);
3426 value
= MAX (f0
, f1
);
3433 value
= real_value_truncate (mode
, value
);
3434 set_float_handler (NULL_PTR
);
3435 return CONST_DOUBLE_FROM_REAL_VALUE (value
, mode
);
3437 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3439 /* We can fold some multi-word operations. */
3440 if (GET_MODE_CLASS (mode
) == MODE_INT
3441 && width
== HOST_BITS_PER_WIDE_INT
* 2
3442 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
3443 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3445 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3447 if (GET_CODE (op0
) == CONST_DOUBLE
)
3448 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3450 l1
= INTVAL (op0
), h1
= l1
< 0 ? -1 : 0;
3452 if (GET_CODE (op1
) == CONST_DOUBLE
)
3453 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3455 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3460 /* A - B == A + (-B). */
3461 neg_double (l2
, h2
, &lv
, &hv
);
3464 /* .. fall through ... */
3467 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3471 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3474 case DIV
: case MOD
: case UDIV
: case UMOD
:
3475 /* We'd need to include tree.h to do this and it doesn't seem worth
3480 lv
= l1
& l2
, hv
= h1
& h2
;
3484 lv
= l1
| l2
, hv
= h1
| h2
;
3488 lv
= l1
^ l2
, hv
= h1
^ h2
;
3494 && ((unsigned HOST_WIDE_INT
) l1
3495 < (unsigned HOST_WIDE_INT
) l2
)))
3504 && ((unsigned HOST_WIDE_INT
) l1
3505 > (unsigned HOST_WIDE_INT
) l2
)))
3512 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3514 && ((unsigned HOST_WIDE_INT
) l1
3515 < (unsigned HOST_WIDE_INT
) l2
)))
3522 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3524 && ((unsigned HOST_WIDE_INT
) l1
3525 > (unsigned HOST_WIDE_INT
) l2
)))
3531 case LSHIFTRT
: case ASHIFTRT
:
3533 case ROTATE
: case ROTATERT
:
3534 #ifdef SHIFT_COUNT_TRUNCATED
3535 if (SHIFT_COUNT_TRUNCATED
)
3536 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3539 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3542 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3543 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3545 else if (code
== ASHIFT
)
3546 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
, 1);
3547 else if (code
== ROTATE
)
3548 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3549 else /* code == ROTATERT */
3550 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3557 return immed_double_const (lv
, hv
, mode
);
3560 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3561 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3563 /* Even if we can't compute a constant result,
3564 there are some cases worth simplifying. */
3569 /* In IEEE floating point, x+0 is not the same as x. Similarly
3570 for the other optimizations below. */
3571 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3572 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3575 if (op1
== CONST0_RTX (mode
))
3578 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3579 if (GET_CODE (op0
) == NEG
)
3580 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3581 else if (GET_CODE (op1
) == NEG
)
3582 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3584 /* Handle both-operands-constant cases. We can only add
3585 CONST_INTs to constants since the sum of relocatable symbols
3586 can't be handled by most assemblers. Don't add CONST_INT
3587 to CONST_INT since overflow won't be computed properly if wider
3588 than HOST_BITS_PER_WIDE_INT. */
3590 if (CONSTANT_P (op0
) && GET_MODE (op0
) != VOIDmode
3591 && GET_CODE (op1
) == CONST_INT
)
3592 return plus_constant (op0
, INTVAL (op1
));
3593 else if (CONSTANT_P (op1
) && GET_MODE (op1
) != VOIDmode
3594 && GET_CODE (op0
) == CONST_INT
)
3595 return plus_constant (op1
, INTVAL (op0
));
3597 /* See if this is something like X * C - X or vice versa or
3598 if the multiplication is written as a shift. If so, we can
3599 distribute and make a new multiply, shift, or maybe just
3600 have X (if C is 2 in the example above). But don't make
3601 real multiply if we didn't have one before. */
3603 if (! FLOAT_MODE_P (mode
))
3605 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3606 rtx lhs
= op0
, rhs
= op1
;
3609 if (GET_CODE (lhs
) == NEG
)
3610 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3611 else if (GET_CODE (lhs
) == MULT
3612 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3614 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3617 else if (GET_CODE (lhs
) == ASHIFT
3618 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3619 && INTVAL (XEXP (lhs
, 1)) >= 0
3620 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3622 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3623 lhs
= XEXP (lhs
, 0);
3626 if (GET_CODE (rhs
) == NEG
)
3627 coeff1
= -1, rhs
= XEXP (rhs
, 0);
3628 else if (GET_CODE (rhs
) == MULT
3629 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3631 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3634 else if (GET_CODE (rhs
) == ASHIFT
3635 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3636 && INTVAL (XEXP (rhs
, 1)) >= 0
3637 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3639 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3640 rhs
= XEXP (rhs
, 0);
3643 if (rtx_equal_p (lhs
, rhs
))
3645 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3646 GEN_INT (coeff0
+ coeff1
));
3647 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3651 /* If one of the operands is a PLUS or a MINUS, see if we can
3652 simplify this by the associative law.
3653 Don't use the associative law for floating point.
3654 The inaccuracy makes it nonassociative,
3655 and subtle programs can break if operations are associated. */
3657 if (INTEGRAL_MODE_P (mode
)
3658 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3659 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3660 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3666 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3667 using cc0, in which case we want to leave it as a COMPARE
3668 so we can distinguish it from a register-register-copy.
3670 In IEEE floating point, x-0 is not the same as x. */
3672 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3673 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3674 && op1
== CONST0_RTX (mode
))
3677 /* Do nothing here. */
3682 /* None of these optimizations can be done for IEEE
3684 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3685 && FLOAT_MODE_P (mode
) && ! flag_fast_math
)
3688 /* We can't assume x-x is 0 even with non-IEEE floating point,
3689 but since it is zero except in very strange circumstances, we
3690 will treat it as zero with -ffast-math. */
3691 if (rtx_equal_p (op0
, op1
)
3692 && ! side_effects_p (op0
)
3693 && (! FLOAT_MODE_P (mode
) || flag_fast_math
))
3694 return CONST0_RTX (mode
);
3696 /* Change subtraction from zero into negation. */
3697 if (op0
== CONST0_RTX (mode
))
3698 return gen_rtx_NEG (mode
, op1
);
3700 /* (-1 - a) is ~a. */
3701 if (op0
== constm1_rtx
)
3702 return gen_rtx_NOT (mode
, op1
);
3704 /* Subtracting 0 has no effect. */
3705 if (op1
== CONST0_RTX (mode
))
3708 /* See if this is something like X * C - X or vice versa or
3709 if the multiplication is written as a shift. If so, we can
3710 distribute and make a new multiply, shift, or maybe just
3711 have X (if C is 2 in the example above). But don't make
3712 real multiply if we didn't have one before. */
3714 if (! FLOAT_MODE_P (mode
))
3716 HOST_WIDE_INT coeff0
= 1, coeff1
= 1;
3717 rtx lhs
= op0
, rhs
= op1
;
3720 if (GET_CODE (lhs
) == NEG
)
3721 coeff0
= -1, lhs
= XEXP (lhs
, 0);
3722 else if (GET_CODE (lhs
) == MULT
3723 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
)
3725 coeff0
= INTVAL (XEXP (lhs
, 1)), lhs
= XEXP (lhs
, 0);
3728 else if (GET_CODE (lhs
) == ASHIFT
3729 && GET_CODE (XEXP (lhs
, 1)) == CONST_INT
3730 && INTVAL (XEXP (lhs
, 1)) >= 0
3731 && INTVAL (XEXP (lhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3733 coeff0
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (lhs
, 1));
3734 lhs
= XEXP (lhs
, 0);
3737 if (GET_CODE (rhs
) == NEG
)
3738 coeff1
= - 1, rhs
= XEXP (rhs
, 0);
3739 else if (GET_CODE (rhs
) == MULT
3740 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
)
3742 coeff1
= INTVAL (XEXP (rhs
, 1)), rhs
= XEXP (rhs
, 0);
3745 else if (GET_CODE (rhs
) == ASHIFT
3746 && GET_CODE (XEXP (rhs
, 1)) == CONST_INT
3747 && INTVAL (XEXP (rhs
, 1)) >= 0
3748 && INTVAL (XEXP (rhs
, 1)) < HOST_BITS_PER_WIDE_INT
)
3750 coeff1
= ((HOST_WIDE_INT
) 1) << INTVAL (XEXP (rhs
, 1));
3751 rhs
= XEXP (rhs
, 0);
3754 if (rtx_equal_p (lhs
, rhs
))
3756 tem
= cse_gen_binary (MULT
, mode
, lhs
,
3757 GEN_INT (coeff0
- coeff1
));
3758 return (GET_CODE (tem
) == MULT
&& ! had_mult
) ? 0 : tem
;
3762 /* (a - (-b)) -> (a + b). */
3763 if (GET_CODE (op1
) == NEG
)
3764 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3766 /* If one of the operands is a PLUS or a MINUS, see if we can
3767 simplify this by the associative law.
3768 Don't use the associative law for floating point.
3769 The inaccuracy makes it nonassociative,
3770 and subtle programs can break if operations are associated. */
3772 if (INTEGRAL_MODE_P (mode
)
3773 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3774 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3775 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3778 /* Don't let a relocatable value get a negative coeff. */
3779 if (GET_CODE (op1
) == CONST_INT
&& GET_MODE (op0
) != VOIDmode
)
3780 return plus_constant (op0
, - INTVAL (op1
));
3782 /* (x - (x & y)) -> (x & ~y) */
3783 if (GET_CODE (op1
) == AND
)
3785 if (rtx_equal_p (op0
, XEXP (op1
, 0)))
3786 return cse_gen_binary (AND
, mode
, op0
, gen_rtx_NOT (mode
, XEXP (op1
, 1)));
3787 if (rtx_equal_p (op0
, XEXP (op1
, 1)))
3788 return cse_gen_binary (AND
, mode
, op0
, gen_rtx_NOT (mode
, XEXP (op1
, 0)));
3793 if (op1
== constm1_rtx
)
3795 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3797 return tem
? tem
: gen_rtx_NEG (mode
, op0
);
3800 /* In IEEE floating point, x*0 is not always 0. */
3801 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3802 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3803 && op1
== CONST0_RTX (mode
)
3804 && ! side_effects_p (op0
))
3807 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3808 However, ANSI says we can drop signals,
3809 so we can do this anyway. */
3810 if (op1
== CONST1_RTX (mode
))
3813 /* Convert multiply by constant power of two into shift unless
3814 we are still generating RTL. This test is a kludge. */
3815 if (GET_CODE (op1
) == CONST_INT
3816 && (val
= exact_log2 (INTVAL (op1
))) >= 0
3817 /* If the mode is larger than the host word size, and the
3818 uppermost bit is set, then this isn't a power of two due
3819 to implicit sign extension. */
3820 && (width
<= HOST_BITS_PER_WIDE_INT
3821 || val
!= HOST_BITS_PER_WIDE_INT
- 1)
3822 && ! rtx_equal_function_value_matters
)
3823 return gen_rtx_ASHIFT (mode
, op0
, GEN_INT (val
));
3825 if (GET_CODE (op1
) == CONST_DOUBLE
3826 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3830 int op1is2
, op1ism1
;
3832 if (setjmp (handler
))
3835 set_float_handler (handler
);
3836 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3837 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
3838 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
3839 set_float_handler (NULL_PTR
);
3841 /* x*2 is x+x and x*(-1) is -x */
3842 if (op1is2
&& GET_MODE (op0
) == mode
)
3843 return gen_rtx_PLUS (mode
, op0
, copy_rtx (op0
));
3845 else if (op1ism1
&& GET_MODE (op0
) == mode
)
3846 return gen_rtx_NEG (mode
, op0
);
3851 if (op1
== const0_rtx
)
3853 if (GET_CODE (op1
) == CONST_INT
3854 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3856 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3858 /* A | (~A) -> -1 */
3859 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3860 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3861 && ! side_effects_p (op0
)
3862 && GET_MODE_CLASS (mode
) != MODE_CC
)
3867 if (op1
== const0_rtx
)
3869 if (GET_CODE (op1
) == CONST_INT
3870 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3871 return gen_rtx_NOT (mode
, op0
);
3872 if (op0
== op1
&& ! side_effects_p (op0
)
3873 && GET_MODE_CLASS (mode
) != MODE_CC
)
3878 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3880 if (GET_CODE (op1
) == CONST_INT
3881 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3883 if (op0
== op1
&& ! side_effects_p (op0
)
3884 && GET_MODE_CLASS (mode
) != MODE_CC
)
3887 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3888 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3889 && ! side_effects_p (op0
)
3890 && GET_MODE_CLASS (mode
) != MODE_CC
)
3895 /* Convert divide by power of two into shift (divide by 1 handled
3897 if (GET_CODE (op1
) == CONST_INT
3898 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3899 return gen_rtx_LSHIFTRT (mode
, op0
, GEN_INT (arg1
));
3901 /* ... fall through ... */
3904 if (op1
== CONST1_RTX (mode
))
3907 /* In IEEE floating point, 0/x is not always 0. */
3908 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3909 || ! FLOAT_MODE_P (mode
) || flag_fast_math
)
3910 && op0
== CONST0_RTX (mode
)
3911 && ! side_effects_p (op1
))
3914 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3915 /* Change division by a constant into multiplication. Only do
3916 this with -ffast-math until an expert says it is safe in
3918 else if (GET_CODE (op1
) == CONST_DOUBLE
3919 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3920 && op1
!= CONST0_RTX (mode
)
3924 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3926 if (! REAL_VALUES_EQUAL (d
, dconst0
))
3928 #if defined (REAL_ARITHMETIC)
3929 REAL_ARITHMETIC (d
, rtx_to_tree_code (DIV
), dconst1
, d
);
3930 return gen_rtx_MULT (mode
, op0
,
3931 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3933 return gen_rtx_MULT (mode
, op0
,
3934 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3942 /* Handle modulus by power of two (mod with 1 handled below). */
3943 if (GET_CODE (op1
) == CONST_INT
3944 && exact_log2 (INTVAL (op1
)) > 0)
3945 return gen_rtx_AND (mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3947 /* ... fall through ... */
3950 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3951 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3957 /* Rotating ~0 always results in ~0. */
3958 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3959 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3960 && ! side_effects_p (op1
))
3963 /* ... fall through ... */
3968 if (op1
== const0_rtx
)
3970 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3975 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3976 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
3977 && ! side_effects_p (op0
))
3979 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3984 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3986 == (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
) >> 1)
3987 && ! side_effects_p (op0
))
3989 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3994 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3996 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4001 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
4003 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
4014 /* Get the integer argument values in two forms:
4015 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4017 arg0
= INTVAL (op0
);
4018 arg1
= INTVAL (op1
);
4020 if (width
< HOST_BITS_PER_WIDE_INT
)
4022 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4023 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4026 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4027 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4030 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4031 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4039 /* Compute the value of the arithmetic. */
4044 val
= arg0s
+ arg1s
;
4048 val
= arg0s
- arg1s
;
4052 val
= arg0s
* arg1s
;
4058 val
= arg0s
/ arg1s
;
4064 val
= arg0s
% arg1s
;
4070 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
4076 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
4092 /* If shift count is undefined, don't fold it; let the machine do
4093 what it wants. But truncate it if the machine will do that. */
4097 #ifdef SHIFT_COUNT_TRUNCATED
4098 if (SHIFT_COUNT_TRUNCATED
)
4102 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
4109 #ifdef SHIFT_COUNT_TRUNCATED
4110 if (SHIFT_COUNT_TRUNCATED
)
4114 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
4121 #ifdef SHIFT_COUNT_TRUNCATED
4122 if (SHIFT_COUNT_TRUNCATED
)
4126 val
= arg0s
>> arg1
;
4128 /* Bootstrap compiler may not have sign extended the right shift.
4129 Manually extend the sign to insure bootstrap cc matches gcc. */
4130 if (arg0s
< 0 && arg1
> 0)
4131 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
4140 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
4141 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
4149 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
4150 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
4154 /* Do nothing here. */
4158 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4162 val
= ((unsigned HOST_WIDE_INT
) arg0
4163 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4167 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4171 val
= ((unsigned HOST_WIDE_INT
) arg0
4172 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4179 /* Clear the bits that don't belong in our mode, unless they and our sign
4180 bit are all one. So we get either a reasonable negative value or a
4181 reasonable unsigned value for this mode. */
4182 if (width
< HOST_BITS_PER_WIDE_INT
4183 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4184 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4185 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4187 /* If this would be an entire word for the target, but is not for
4188 the host, then sign-extend on the host so that the number will look
4189 the same way on the host that it would on the target.
4191 For example, when building a 64 bit alpha hosted 32 bit sparc
4192 targeted compiler, then we want the 32 bit unsigned value -1 to be
4193 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4194 The later confuses the sparc backend. */
4196 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
&& BITS_PER_WORD
== width
4197 && (val
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
4198 val
|= ((HOST_WIDE_INT
) (-1) << width
);
4200 return GEN_INT (val
);
4203 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4206 Rather than test for specific case, we do this by a brute-force method
4207 and do all possible simplifications until no more changes occur. Then
4208 we rebuild the operation. */
4211 simplify_plus_minus (code
, mode
, op0
, op1
)
4213 enum machine_mode mode
;
4219 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
4220 int first
= 1, negate
= 0, changed
;
4223 bzero ((char *) ops
, sizeof ops
);
4225 /* Set up the two operands and then expand them until nothing has been
4226 changed. If we run out of room in our array, give up; this should
4227 almost never happen. */
4229 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
4236 for (i
= 0; i
< n_ops
; i
++)
4237 switch (GET_CODE (ops
[i
]))
4244 ops
[n_ops
] = XEXP (ops
[i
], 1);
4245 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
4246 ops
[i
] = XEXP (ops
[i
], 0);
4252 ops
[i
] = XEXP (ops
[i
], 0);
4253 negs
[i
] = ! negs
[i
];
4258 ops
[i
] = XEXP (ops
[i
], 0);
4264 /* ~a -> (-a - 1) */
4267 ops
[n_ops
] = constm1_rtx
;
4268 negs
[n_ops
++] = negs
[i
];
4269 ops
[i
] = XEXP (ops
[i
], 0);
4270 negs
[i
] = ! negs
[i
];
4277 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4285 /* If we only have two operands, we can't do anything. */
4289 /* Now simplify each pair of operands until nothing changes. The first
4290 time through just simplify constants against each other. */
4297 for (i
= 0; i
< n_ops
- 1; i
++)
4298 for (j
= i
+ 1; j
< n_ops
; j
++)
4299 if (ops
[i
] != 0 && ops
[j
] != 0
4300 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4302 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4303 enum rtx_code ncode
= PLUS
;
4305 if (negs
[i
] && ! negs
[j
])
4306 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4307 else if (! negs
[i
] && negs
[j
])
4310 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4313 ops
[i
] = tem
, ops
[j
] = 0;
4314 negs
[i
] = negs
[i
] && negs
[j
];
4315 if (GET_CODE (tem
) == NEG
)
4316 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4318 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4319 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4327 /* Pack all the operands to the lower-numbered entries and give up if
4328 we didn't reduce the number of operands we had. Make sure we
4329 count a CONST as two operands. If we have the same number of
4330 operands, but have made more CONSTs than we had, this is also
4331 an improvement, so accept it. */
4333 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4336 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4337 if (GET_CODE (ops
[j
]) == CONST
)
4341 if (i
+ n_consts
> input_ops
4342 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4347 /* If we have a CONST_INT, put it last. */
4348 for (i
= 0; i
< n_ops
- 1; i
++)
4349 if (GET_CODE (ops
[i
]) == CONST_INT
)
4351 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4352 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4355 /* Put a non-negated operand first. If there aren't any, make all
4356 operands positive and negate the whole thing later. */
4357 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4362 for (i
= 0; i
< n_ops
; i
++)
4368 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4369 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4372 /* Now make the result by performing the requested operations. */
4374 for (i
= 1; i
< n_ops
; i
++)
4375 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4377 return negate
? gen_rtx_NEG (mode
, result
) : result
;
4380 /* Make a binary operation by properly ordering the operands and
4381 seeing if the expression folds. */
4384 cse_gen_binary (code
, mode
, op0
, op1
)
4386 enum machine_mode mode
;
4391 /* Put complex operands first and constants second if commutative. */
4392 if (GET_RTX_CLASS (code
) == 'c'
4393 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4394 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4395 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4396 || (GET_CODE (op0
) == SUBREG
4397 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4398 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4399 tem
= op0
, op0
= op1
, op1
= tem
;
4401 /* If this simplifies, do it. */
4402 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4407 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4408 just form the operation. */
4410 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4411 && GET_MODE (op0
) != VOIDmode
)
4412 return plus_constant (op0
, INTVAL (op1
));
4413 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4414 && GET_MODE (op0
) != VOIDmode
)
4415 return plus_constant (op0
, - INTVAL (op1
));
4417 return gen_rtx_fmt_ee (code
, mode
, op0
, op1
);
4420 /* Like simplify_binary_operation except used for relational operators.
4421 MODE is the mode of the operands, not that of the result. If MODE
4422 is VOIDmode, both operands must also be VOIDmode and we compare the
4423 operands in "infinite precision".
4425 If no simplification is possible, this function returns zero. Otherwise,
4426 it returns either const_true_rtx or const0_rtx. */
4429 simplify_relational_operation (code
, mode
, op0
, op1
)
4431 enum machine_mode mode
;
4434 int equal
, op0lt
, op0ltu
, op1lt
, op1ltu
;
4437 /* If op0 is a compare, extract the comparison arguments from it. */
4438 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4439 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4441 /* We can't simplify MODE_CC values since we don't know what the
4442 actual comparison is. */
4443 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
4450 /* For integer comparisons of A and B maybe we can simplify A - B and can
4451 then simplify a comparison of that with zero. If A and B are both either
4452 a register or a CONST_INT, this can't help; testing for these cases will
4453 prevent infinite recursion here and speed things up.
4455 If CODE is an unsigned comparison, then we can never do this optimization,
4456 because it gives an incorrect result if the subtraction wraps around zero.
4457 ANSI C defines unsigned operations such that they never overflow, and
4458 thus such cases can not be ignored. */
4460 if (INTEGRAL_MODE_P (mode
) && op1
!= const0_rtx
4461 && ! ((GET_CODE (op0
) == REG
|| GET_CODE (op0
) == CONST_INT
)
4462 && (GET_CODE (op1
) == REG
|| GET_CODE (op1
) == CONST_INT
))
4463 && 0 != (tem
= simplify_binary_operation (MINUS
, mode
, op0
, op1
))
4464 && code
!= GTU
&& code
!= GEU
&& code
!= LTU
&& code
!= LEU
)
4465 return simplify_relational_operation (signed_condition (code
),
4466 mode
, tem
, const0_rtx
);
4468 /* For non-IEEE floating-point, if the two operands are equal, we know the
4470 if (rtx_equal_p (op0
, op1
)
4471 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4472 || ! FLOAT_MODE_P (GET_MODE (op0
)) || flag_fast_math
))
4473 equal
= 1, op0lt
= 0, op0ltu
= 0, op1lt
= 0, op1ltu
= 0;
4475 /* If the operands are floating-point constants, see if we can fold
4477 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4478 else if (GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
4479 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4481 REAL_VALUE_TYPE d0
, d1
;
4484 if (setjmp (handler
))
4487 set_float_handler (handler
);
4488 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4489 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4490 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4491 op0lt
= op0ltu
= REAL_VALUES_LESS (d0
, d1
);
4492 op1lt
= op1ltu
= REAL_VALUES_LESS (d1
, d0
);
4493 set_float_handler (NULL_PTR
);
4495 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4497 /* Otherwise, see if the operands are both integers. */
4498 else if ((GET_MODE_CLASS (mode
) == MODE_INT
|| mode
== VOIDmode
)
4499 && (GET_CODE (op0
) == CONST_DOUBLE
|| GET_CODE (op0
) == CONST_INT
)
4500 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
4502 int width
= GET_MODE_BITSIZE (mode
);
4503 HOST_WIDE_INT l0s
, h0s
, l1s
, h1s
;
4504 unsigned HOST_WIDE_INT l0u
, h0u
, l1u
, h1u
;
4506 /* Get the two words comprising each integer constant. */
4507 if (GET_CODE (op0
) == CONST_DOUBLE
)
4509 l0u
= l0s
= CONST_DOUBLE_LOW (op0
);
4510 h0u
= h0s
= CONST_DOUBLE_HIGH (op0
);
4514 l0u
= l0s
= INTVAL (op0
);
4515 h0u
= h0s
= l0s
< 0 ? -1 : 0;
4518 if (GET_CODE (op1
) == CONST_DOUBLE
)
4520 l1u
= l1s
= CONST_DOUBLE_LOW (op1
);
4521 h1u
= h1s
= CONST_DOUBLE_HIGH (op1
);
4525 l1u
= l1s
= INTVAL (op1
);
4526 h1u
= h1s
= l1s
< 0 ? -1 : 0;
4529 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4530 we have to sign or zero-extend the values. */
4531 if (width
!= 0 && width
<= HOST_BITS_PER_WIDE_INT
)
4532 h0u
= h1u
= 0, h0s
= l0s
< 0 ? -1 : 0, h1s
= l1s
< 0 ? -1 : 0;
4534 if (width
!= 0 && width
< HOST_BITS_PER_WIDE_INT
)
4536 l0u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4537 l1u
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4539 if (l0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4540 l0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4542 if (l1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4543 l1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4546 equal
= (h0u
== h1u
&& l0u
== l1u
);
4547 op0lt
= (h0s
< h1s
|| (h0s
== h1s
&& l0s
< l1s
));
4548 op1lt
= (h1s
< h0s
|| (h1s
== h0s
&& l1s
< l0s
));
4549 op0ltu
= (h0u
< h1u
|| (h0u
== h1u
&& l0u
< l1u
));
4550 op1ltu
= (h1u
< h0u
|| (h1u
== h0u
&& l1u
< l0u
));
4553 /* Otherwise, there are some code-specific tests we can make. */
4559 /* References to the frame plus a constant or labels cannot
4560 be zero, but a SYMBOL_REF can due to #pragma weak. */
4561 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4562 || GET_CODE (op0
) == LABEL_REF
)
4563 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4564 /* On some machines, the ap reg can be 0 sometimes. */
4565 && op0
!= arg_pointer_rtx
4572 if (((NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
)
4573 || GET_CODE (op0
) == LABEL_REF
)
4574 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4575 && op0
!= arg_pointer_rtx
4578 return const_true_rtx
;
4582 /* Unsigned values are never negative. */
4583 if (op1
== const0_rtx
)
4584 return const_true_rtx
;
4588 if (op1
== const0_rtx
)
4593 /* Unsigned values are never greater than the largest
4595 if (GET_CODE (op1
) == CONST_INT
4596 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4597 && INTEGRAL_MODE_P (mode
))
4598 return const_true_rtx
;
4602 if (GET_CODE (op1
) == CONST_INT
4603 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4604 && INTEGRAL_MODE_P (mode
))
4615 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4620 return equal
? const_true_rtx
: const0_rtx
;
4622 return ! equal
? const_true_rtx
: const0_rtx
;
4624 return op0lt
? const_true_rtx
: const0_rtx
;
4626 return op1lt
? const_true_rtx
: const0_rtx
;
4628 return op0ltu
? const_true_rtx
: const0_rtx
;
4630 return op1ltu
? const_true_rtx
: const0_rtx
;
4632 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4634 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4636 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4638 return equal
|| op1ltu
? const_true_rtx
: const0_rtx
;
4644 /* Simplify CODE, an operation with result mode MODE and three operands,
4645 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4646 a constant. Return 0 if no simplifications is possible. */
4649 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4651 enum machine_mode mode
, op0_mode
;
4654 int width
= GET_MODE_BITSIZE (mode
);
4656 /* VOIDmode means "infinite" precision. */
4658 width
= HOST_BITS_PER_WIDE_INT
;
4664 if (GET_CODE (op0
) == CONST_INT
4665 && GET_CODE (op1
) == CONST_INT
4666 && GET_CODE (op2
) == CONST_INT
4667 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4668 && width
<= HOST_BITS_PER_WIDE_INT
)
4670 /* Extracting a bit-field from a constant */
4671 HOST_WIDE_INT val
= INTVAL (op0
);
4673 if (BITS_BIG_ENDIAN
)
4674 val
>>= (GET_MODE_BITSIZE (op0_mode
)
4675 - INTVAL (op2
) - INTVAL (op1
));
4677 val
>>= INTVAL (op2
);
4679 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4681 /* First zero-extend. */
4682 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4683 /* If desired, propagate sign bit. */
4684 if (code
== SIGN_EXTRACT
4685 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4686 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4689 /* Clear the bits that don't belong in our mode,
4690 unless they and our sign bit are all one.
4691 So we get either a reasonable negative value or a reasonable
4692 unsigned value for this mode. */
4693 if (width
< HOST_BITS_PER_WIDE_INT
4694 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4695 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4696 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4698 return GEN_INT (val
);
4703 if (GET_CODE (op0
) == CONST_INT
)
4704 return op0
!= const0_rtx
? op1
: op2
;
4706 /* Convert a == b ? b : a to "a". */
4707 if (GET_CODE (op0
) == NE
&& ! side_effects_p (op0
)
4708 && rtx_equal_p (XEXP (op0
, 0), op1
)
4709 && rtx_equal_p (XEXP (op0
, 1), op2
))
4711 else if (GET_CODE (op0
) == EQ
&& ! side_effects_p (op0
)
4712 && rtx_equal_p (XEXP (op0
, 1), op1
)
4713 && rtx_equal_p (XEXP (op0
, 0), op2
))
4715 else if (GET_RTX_CLASS (GET_CODE (op0
)) == '<' && ! side_effects_p (op0
))
4718 temp
= simplify_relational_operation (GET_CODE (op0
), op0_mode
,
4719 XEXP (op0
, 0), XEXP (op0
, 1));
4720 /* See if any simplifications were possible. */
4721 if (temp
== const0_rtx
)
4723 else if (temp
== const1_rtx
)
4735 /* If X is a nontrivial arithmetic operation on an argument
4736 for which a constant value can be determined, return
4737 the result of operating on that value, as a constant.
4738 Otherwise, return X, possibly with one or more operands
4739 modified by recursive calls to this function.
4741 If X is a register whose contents are known, we do NOT
4742 return those contents here. equiv_constant is called to
4745 INSN is the insn that we may be modifying. If it is 0, make a copy
4746 of X before modifying it. */
4753 register enum rtx_code code
;
4754 register enum machine_mode mode
;
4761 /* Folded equivalents of first two operands of X. */
4765 /* Constant equivalents of first three operands of X;
4766 0 when no such equivalent is known. */
4771 /* The mode of the first operand of X. We need this for sign and zero
4773 enum machine_mode mode_arg0
;
4778 mode
= GET_MODE (x
);
4779 code
= GET_CODE (x
);
4788 /* No use simplifying an EXPR_LIST
4789 since they are used only for lists of args
4790 in a function call's REG_EQUAL note. */
4792 /* Changing anything inside an ADDRESSOF is incorrect; we don't
4793 want to (e.g.,) make (addressof (const_int 0)) just because
4794 the location is known to be zero. */
4800 return prev_insn_cc0
;
4804 /* If the next insn is a CODE_LABEL followed by a jump table,
4805 PC's value is a LABEL_REF pointing to that label. That
4806 lets us fold switch statements on the Vax. */
4807 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4809 rtx next
= next_nonnote_insn (insn
);
4811 if (next
&& GET_CODE (next
) == CODE_LABEL
4812 && NEXT_INSN (next
) != 0
4813 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4814 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4815 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4816 return gen_rtx_LABEL_REF (Pmode
, next
);
4821 /* See if we previously assigned a constant value to this SUBREG. */
4822 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4823 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4826 /* If this is a paradoxical SUBREG, we have no idea what value the
4827 extra bits would have. However, if the operand is equivalent
4828 to a SUBREG whose operand is the same as our mode, and all the
4829 modes are within a word, we can just use the inner operand
4830 because these SUBREGs just say how to treat the register.
4832 Similarly if we find an integer constant. */
4834 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4836 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4837 struct table_elt
*elt
;
4839 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4840 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4841 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4843 for (elt
= elt
->first_same_value
;
4844 elt
; elt
= elt
->next_same_value
)
4846 if (CONSTANT_P (elt
->exp
)
4847 && GET_MODE (elt
->exp
) == VOIDmode
)
4850 if (GET_CODE (elt
->exp
) == SUBREG
4851 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4852 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4853 return copy_rtx (SUBREG_REG (elt
->exp
));
4859 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4860 We might be able to if the SUBREG is extracting a single word in an
4861 integral mode or extracting the low part. */
4863 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4864 const_arg0
= equiv_constant (folded_arg0
);
4866 folded_arg0
= const_arg0
;
4868 if (folded_arg0
!= SUBREG_REG (x
))
4872 if (GET_MODE_CLASS (mode
) == MODE_INT
4873 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4874 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4875 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4876 GET_MODE (SUBREG_REG (x
)));
4877 if (new == 0 && subreg_lowpart_p (x
))
4878 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4883 /* If this is a narrowing SUBREG and our operand is a REG, see if
4884 we can find an equivalence for REG that is an arithmetic operation
4885 in a wider mode where both operands are paradoxical SUBREGs
4886 from objects of our result mode. In that case, we couldn't report
4887 an equivalent value for that operation, since we don't know what the
4888 extra bits will be. But we can find an equivalence for this SUBREG
4889 by folding that operation is the narrow mode. This allows us to
4890 fold arithmetic in narrow modes when the machine only supports
4891 word-sized arithmetic.
4893 Also look for a case where we have a SUBREG whose operand is the
4894 same as our result. If both modes are smaller than a word, we
4895 are simply interpreting a register in different modes and we
4896 can use the inner value. */
4898 if (GET_CODE (folded_arg0
) == REG
4899 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4900 && subreg_lowpart_p (x
))
4902 struct table_elt
*elt
;
4904 /* We can use HASH here since we know that canon_hash won't be
4906 elt
= lookup (folded_arg0
,
4907 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4908 GET_MODE (folded_arg0
));
4911 elt
= elt
->first_same_value
;
4913 for (; elt
; elt
= elt
->next_same_value
)
4915 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4917 /* Just check for unary and binary operations. */
4918 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4919 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4920 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4921 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4922 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4924 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4926 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4927 op0
= fold_rtx (op0
, NULL_RTX
);
4929 op0
= equiv_constant (op0
);
4931 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4934 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4935 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4936 && eltcode
!= DIV
&& eltcode
!= MOD
4937 && eltcode
!= UDIV
&& eltcode
!= UMOD
4938 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4939 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4940 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4941 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4943 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4944 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4945 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4947 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4949 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4950 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4952 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4953 op0
= fold_rtx (op0
, NULL_RTX
);
4956 op0
= equiv_constant (op0
);
4958 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4959 op1
= fold_rtx (op1
, NULL_RTX
);
4962 op1
= equiv_constant (op1
);
4964 /* If we are looking for the low SImode part of
4965 (ashift:DI c (const_int 32)), it doesn't work
4966 to compute that in SImode, because a 32-bit shift
4967 in SImode is unpredictable. We know the value is 0. */
4969 && GET_CODE (elt
->exp
) == ASHIFT
4970 && GET_CODE (op1
) == CONST_INT
4971 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
4973 if (INTVAL (op1
) < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
4975 /* If the count fits in the inner mode's width,
4976 but exceeds the outer mode's width,
4977 the value will get truncated to 0
4981 /* If the count exceeds even the inner mode's width,
4982 don't fold this expression. */
4985 else if (op0
&& op1
)
4986 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4990 else if (GET_CODE (elt
->exp
) == SUBREG
4991 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4992 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
4994 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4995 new = copy_rtx (SUBREG_REG (elt
->exp
));
5006 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5007 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5008 new = lookup_as_function (XEXP (x
, 0), code
);
5010 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
5014 /* If we are not actually processing an insn, don't try to find the
5015 best address. Not only don't we care, but we could modify the
5016 MEM in an invalid way since we have no insn to validate against. */
5018 find_best_addr (insn
, &XEXP (x
, 0));
5021 /* Even if we don't fold in the insn itself,
5022 we can safely do so here, in hopes of getting a constant. */
5023 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
5025 HOST_WIDE_INT offset
= 0;
5027 if (GET_CODE (addr
) == REG
5028 && REGNO_QTY_VALID_P (REGNO (addr
))
5029 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
5030 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
5031 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
5033 /* If address is constant, split it into a base and integer offset. */
5034 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
5036 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
5037 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
5039 base
= XEXP (XEXP (addr
, 0), 0);
5040 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
5042 else if (GET_CODE (addr
) == LO_SUM
5043 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
5044 base
= XEXP (addr
, 1);
5045 else if (GET_CODE (addr
) == ADDRESSOF
)
5046 return change_address (x
, VOIDmode
, addr
);
5048 /* If this is a constant pool reference, we can fold it into its
5049 constant to allow better value tracking. */
5050 if (base
&& GET_CODE (base
) == SYMBOL_REF
5051 && CONSTANT_POOL_ADDRESS_P (base
))
5053 rtx constant
= get_pool_constant (base
);
5054 enum machine_mode const_mode
= get_pool_mode (base
);
5057 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
5058 constant_pool_entries_cost
= COST (constant
);
5060 /* If we are loading the full constant, we have an equivalence. */
5061 if (offset
== 0 && mode
== const_mode
)
5064 /* If this actually isn't a constant (weird!), we can't do
5065 anything. Otherwise, handle the two most common cases:
5066 extracting a word from a multi-word constant, and extracting
5067 the low-order bits. Other cases don't seem common enough to
5069 if (! CONSTANT_P (constant
))
5072 if (GET_MODE_CLASS (mode
) == MODE_INT
5073 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
5074 && offset
% UNITS_PER_WORD
== 0
5075 && (new = operand_subword (constant
,
5076 offset
/ UNITS_PER_WORD
,
5077 0, const_mode
)) != 0)
5080 if (((BYTES_BIG_ENDIAN
5081 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
5082 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
5083 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
5087 /* If this is a reference to a label at a known position in a jump
5088 table, we also know its value. */
5089 if (base
&& GET_CODE (base
) == LABEL_REF
)
5091 rtx label
= XEXP (base
, 0);
5092 rtx table_insn
= NEXT_INSN (label
);
5094 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5095 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
5097 rtx table
= PATTERN (table_insn
);
5100 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5101 < XVECLEN (table
, 0)))
5102 return XVECEXP (table
, 0,
5103 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
5105 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
5106 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
5108 rtx table
= PATTERN (table_insn
);
5111 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
5112 < XVECLEN (table
, 1)))
5114 offset
/= GET_MODE_SIZE (GET_MODE (table
));
5115 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
5118 if (GET_MODE (table
) != Pmode
)
5119 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
5121 /* Indicate this is a constant. This isn't a
5122 valid form of CONST, but it will only be used
5123 to fold the next insns and then discarded, so
5124 it should be safe. */
5125 return gen_rtx_CONST (GET_MODE (new), new);
5134 for (i
= XVECLEN (x
, 3) - 1; i
>= 0; i
--)
5135 validate_change (insn
, &XVECEXP (x
, 3, i
),
5136 fold_rtx (XVECEXP (x
, 3, i
), insn
), 0);
5146 mode_arg0
= VOIDmode
;
5148 /* Try folding our operands.
5149 Then see which ones have constant values known. */
5151 fmt
= GET_RTX_FORMAT (code
);
5152 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5155 rtx arg
= XEXP (x
, i
);
5156 rtx folded_arg
= arg
, const_arg
= 0;
5157 enum machine_mode mode_arg
= GET_MODE (arg
);
5158 rtx cheap_arg
, expensive_arg
;
5159 rtx replacements
[2];
5162 /* Most arguments are cheap, so handle them specially. */
5163 switch (GET_CODE (arg
))
5166 /* This is the same as calling equiv_constant; it is duplicated
5168 if (REGNO_QTY_VALID_P (REGNO (arg
))
5169 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
5170 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
5171 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
5173 = gen_lowpart_if_possible (GET_MODE (arg
),
5174 qty_const
[reg_qty
[REGNO (arg
)]]);
5187 folded_arg
= prev_insn_cc0
;
5188 mode_arg
= prev_insn_cc0_mode
;
5189 const_arg
= equiv_constant (folded_arg
);
5194 folded_arg
= fold_rtx (arg
, insn
);
5195 const_arg
= equiv_constant (folded_arg
);
5198 /* For the first three operands, see if the operand
5199 is constant or equivalent to a constant. */
5203 folded_arg0
= folded_arg
;
5204 const_arg0
= const_arg
;
5205 mode_arg0
= mode_arg
;
5208 folded_arg1
= folded_arg
;
5209 const_arg1
= const_arg
;
5212 const_arg2
= const_arg
;
5216 /* Pick the least expensive of the folded argument and an
5217 equivalent constant argument. */
5218 if (const_arg
== 0 || const_arg
== folded_arg
5219 || COST (const_arg
) > COST (folded_arg
))
5220 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
5222 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
5224 /* Try to replace the operand with the cheapest of the two
5225 possibilities. If it doesn't work and this is either of the first
5226 two operands of a commutative operation, try swapping them.
5227 If THAT fails, try the more expensive, provided it is cheaper
5228 than what is already there. */
5230 if (cheap_arg
== XEXP (x
, i
))
5233 if (insn
== 0 && ! copied
)
5239 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
5241 j
< 2 && replacements
[j
]
5242 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
5245 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
5248 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
5250 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
5251 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
5253 if (apply_change_group ())
5255 /* Swap them back to be invalid so that this loop can
5256 continue and flag them to be swapped back later. */
5259 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
5271 /* Don't try to fold inside of a vector of expressions.
5272 Doing nothing is harmless. */
5276 /* If a commutative operation, place a constant integer as the second
5277 operand unless the first operand is also a constant integer. Otherwise,
5278 place any constant second unless the first operand is also a constant. */
5280 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
5282 if (must_swap
|| (const_arg0
5284 || (GET_CODE (const_arg0
) == CONST_INT
5285 && GET_CODE (const_arg1
) != CONST_INT
))))
5287 register rtx tem
= XEXP (x
, 0);
5289 if (insn
== 0 && ! copied
)
5295 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
5296 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5297 if (apply_change_group ())
5299 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5300 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5305 /* If X is an arithmetic operation, see if we can simplify it. */
5307 switch (GET_RTX_CLASS (code
))
5313 /* We can't simplify extension ops unless we know the
5315 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5316 && mode_arg0
== VOIDmode
)
5319 /* If we had a CONST, strip it off and put it back later if we
5321 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
5322 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
5324 new = simplify_unary_operation (code
, mode
,
5325 const_arg0
? const_arg0
: folded_arg0
,
5327 if (new != 0 && is_const
)
5328 new = gen_rtx_CONST (mode
, new);
5333 /* See what items are actually being compared and set FOLDED_ARG[01]
5334 to those values and CODE to the actual comparison code. If any are
5335 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5336 do anything if both operands are already known to be constant. */
5338 if (const_arg0
== 0 || const_arg1
== 0)
5340 struct table_elt
*p0
, *p1
;
5341 rtx
true = const_true_rtx
, false = const0_rtx
;
5342 enum machine_mode mode_arg1
;
5344 #ifdef FLOAT_STORE_FLAG_VALUE
5345 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5347 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5349 false = CONST0_RTX (mode
);
5353 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5354 &mode_arg0
, &mode_arg1
);
5355 const_arg0
= equiv_constant (folded_arg0
);
5356 const_arg1
= equiv_constant (folded_arg1
);
5358 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5359 what kinds of things are being compared, so we can't do
5360 anything with this comparison. */
5362 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5365 /* If we do not now have two constants being compared, see
5366 if we can nevertheless deduce some things about the
5368 if (const_arg0
== 0 || const_arg1
== 0)
5370 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5371 non-explicit constant? These aren't zero, but we
5372 don't know their sign. */
5373 if (const_arg1
== const0_rtx
5374 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5375 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5377 || GET_CODE (folded_arg0
) == SYMBOL_REF
5379 || GET_CODE (folded_arg0
) == LABEL_REF
5380 || GET_CODE (folded_arg0
) == CONST
))
5384 else if (code
== NE
)
5388 /* See if the two operands are the same. We don't do this
5389 for IEEE floating-point since we can't assume x == x
5390 since x might be a NaN. */
5392 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5393 || ! FLOAT_MODE_P (mode_arg0
) || flag_fast_math
)
5394 && (folded_arg0
== folded_arg1
5395 || (GET_CODE (folded_arg0
) == REG
5396 && GET_CODE (folded_arg1
) == REG
5397 && (reg_qty
[REGNO (folded_arg0
)]
5398 == reg_qty
[REGNO (folded_arg1
)]))
5399 || ((p0
= lookup (folded_arg0
,
5400 (safe_hash (folded_arg0
, mode_arg0
)
5401 % NBUCKETS
), mode_arg0
))
5402 && (p1
= lookup (folded_arg1
,
5403 (safe_hash (folded_arg1
, mode_arg0
)
5404 % NBUCKETS
), mode_arg0
))
5405 && p0
->first_same_value
== p1
->first_same_value
)))
5406 return ((code
== EQ
|| code
== LE
|| code
== GE
5407 || code
== LEU
|| code
== GEU
)
5410 /* If FOLDED_ARG0 is a register, see if the comparison we are
5411 doing now is either the same as we did before or the reverse
5412 (we only check the reverse if not floating-point). */
5413 else if (GET_CODE (folded_arg0
) == REG
)
5415 int qty
= reg_qty
[REGNO (folded_arg0
)];
5417 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5418 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5419 || (comparison_dominates_p (qty_comparison_code
[qty
],
5420 reverse_condition (code
))
5421 && ! FLOAT_MODE_P (mode_arg0
)))
5422 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5424 && rtx_equal_p (qty_comparison_const
[qty
],
5426 || (GET_CODE (folded_arg1
) == REG
5427 && (reg_qty
[REGNO (folded_arg1
)]
5428 == qty_comparison_qty
[qty
]))))
5429 return (comparison_dominates_p (qty_comparison_code
[qty
],
5436 /* If we are comparing against zero, see if the first operand is
5437 equivalent to an IOR with a constant. If so, we may be able to
5438 determine the result of this comparison. */
5440 if (const_arg1
== const0_rtx
)
5442 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5446 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5447 && GET_CODE (inner_const
) == CONST_INT
5448 && INTVAL (inner_const
) != 0)
5450 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5451 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5452 && (INTVAL (inner_const
)
5453 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5454 rtx
true = const_true_rtx
, false = const0_rtx
;
5456 #ifdef FLOAT_STORE_FLAG_VALUE
5457 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5459 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
,
5461 false = CONST0_RTX (mode
);
5485 new = simplify_relational_operation (code
, mode_arg0
,
5486 const_arg0
? const_arg0
: folded_arg0
,
5487 const_arg1
? const_arg1
: folded_arg1
);
5488 #ifdef FLOAT_STORE_FLAG_VALUE
5489 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5490 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5491 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE
, mode
));
5500 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5501 with that LABEL_REF as its second operand. If so, the result is
5502 the first operand of that MINUS. This handles switches with an
5503 ADDR_DIFF_VEC table. */
5504 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5507 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
5508 : lookup_as_function (folded_arg0
, MINUS
);
5510 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5511 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5514 /* Now try for a CONST of a MINUS like the above. */
5515 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
5516 : lookup_as_function (folded_arg0
, CONST
))) != 0
5517 && GET_CODE (XEXP (y
, 0)) == MINUS
5518 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5519 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg1
, 0))
5520 return XEXP (XEXP (y
, 0), 0);
5523 /* Likewise if the operands are in the other order. */
5524 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
5527 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
5528 : lookup_as_function (folded_arg1
, MINUS
);
5530 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5531 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
5534 /* Now try for a CONST of a MINUS like the above. */
5535 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
5536 : lookup_as_function (folded_arg1
, CONST
))) != 0
5537 && GET_CODE (XEXP (y
, 0)) == MINUS
5538 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
5539 && XEXP (XEXP (XEXP (y
, 0),1), 0) == XEXP (const_arg0
, 0))
5540 return XEXP (XEXP (y
, 0), 0);
5543 /* If second operand is a register equivalent to a negative
5544 CONST_INT, see if we can find a register equivalent to the
5545 positive constant. Make a MINUS if so. Don't do this for
5546 a non-negative constant since we might then alternate between
5547 chosing positive and negative constants. Having the positive
5548 constant previously-used is the more common case. Be sure
5549 the resulting constant is non-negative; if const_arg1 were
5550 the smallest negative number this would overflow: depending
5551 on the mode, this would either just be the same value (and
5552 hence not save anything) or be incorrect. */
5553 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
5554 && INTVAL (const_arg1
) < 0
5555 && - INTVAL (const_arg1
) >= 0
5556 && GET_CODE (folded_arg1
) == REG
)
5558 rtx new_const
= GEN_INT (- INTVAL (const_arg1
));
5560 = lookup (new_const
, safe_hash (new_const
, mode
) % NBUCKETS
,
5564 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
5565 if (GET_CODE (p
->exp
) == REG
)
5566 return cse_gen_binary (MINUS
, mode
, folded_arg0
,
5567 canon_reg (p
->exp
, NULL_RTX
));
5572 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5573 If so, produce (PLUS Z C2-C). */
5574 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5576 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5577 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5578 return fold_rtx (plus_constant (copy_rtx (y
),
5579 -INTVAL (const_arg1
)),
5583 /* ... fall through ... */
5586 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5587 case IOR
: case AND
: case XOR
:
5588 case MULT
: case DIV
: case UDIV
:
5589 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5590 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5591 is known to be of similar form, we may be able to replace the
5592 operation with a combined operation. This may eliminate the
5593 intermediate operation if every use is simplified in this way.
5594 Note that the similar optimization done by combine.c only works
5595 if the intermediate operation's result has only one reference. */
5597 if (GET_CODE (folded_arg0
) == REG
5598 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5601 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5602 rtx y
= lookup_as_function (folded_arg0
, code
);
5604 enum rtx_code associate_code
;
5608 || 0 == (inner_const
5609 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5610 || GET_CODE (inner_const
) != CONST_INT
5611 /* If we have compiled a statement like
5612 "if (x == (x & mask1))", and now are looking at
5613 "x & mask2", we will have a case where the first operand
5614 of Y is the same as our first operand. Unless we detect
5615 this case, an infinite loop will result. */
5616 || XEXP (y
, 0) == folded_arg0
)
5619 /* Don't associate these operations if they are a PLUS with the
5620 same constant and it is a power of two. These might be doable
5621 with a pre- or post-increment. Similarly for two subtracts of
5622 identical powers of two with post decrement. */
5624 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5626 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5627 || exact_log2 (INTVAL (const_arg1
)) >= 0
5629 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5630 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5635 /* Compute the code used to compose the constants. For example,
5636 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5639 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5640 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5642 new_const
= simplify_binary_operation (associate_code
, mode
,
5643 const_arg1
, inner_const
);
5648 /* If we are associating shift operations, don't let this
5649 produce a shift of the size of the object or larger.
5650 This could occur when we follow a sign-extend by a right
5651 shift on a machine that does a sign-extend as a pair
5654 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5655 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
5657 /* As an exception, we can turn an ASHIFTRT of this
5658 form into a shift of the number of bits - 1. */
5659 if (code
== ASHIFTRT
)
5660 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
5665 y
= copy_rtx (XEXP (y
, 0));
5667 /* If Y contains our first operand (the most common way this
5668 can happen is if Y is a MEM), we would do into an infinite
5669 loop if we tried to fold it. So don't in that case. */
5671 if (! reg_mentioned_p (folded_arg0
, y
))
5672 y
= fold_rtx (y
, insn
);
5674 return cse_gen_binary (code
, mode
, y
, new_const
);
5682 new = simplify_binary_operation (code
, mode
,
5683 const_arg0
? const_arg0
: folded_arg0
,
5684 const_arg1
? const_arg1
: folded_arg1
);
5688 /* (lo_sum (high X) X) is simply X. */
5689 if (code
== LO_SUM
&& const_arg0
!= 0
5690 && GET_CODE (const_arg0
) == HIGH
5691 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5697 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5698 const_arg0
? const_arg0
: folded_arg0
,
5699 const_arg1
? const_arg1
: folded_arg1
,
5700 const_arg2
? const_arg2
: XEXP (x
, 2));
5704 return new ? new : x
;
5707 /* Return a constant value currently equivalent to X.
5708 Return 0 if we don't know one. */
5714 if (GET_CODE (x
) == REG
5715 && REGNO_QTY_VALID_P (REGNO (x
))
5716 && qty_const
[reg_qty
[REGNO (x
)]])
5717 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5719 if (x
!= 0 && CONSTANT_P (x
))
5722 /* If X is a MEM, try to fold it outside the context of any insn to see if
5723 it might be equivalent to a constant. That handles the case where it
5724 is a constant-pool reference. Then try to look it up in the hash table
5725 in case it is something whose value we have seen before. */
5727 if (GET_CODE (x
) == MEM
)
5729 struct table_elt
*elt
;
5731 x
= fold_rtx (x
, NULL_RTX
);
5735 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5739 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5740 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5747 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5748 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5749 least-significant part of X.
5750 MODE specifies how big a part of X to return.
5752 If the requested operation cannot be done, 0 is returned.
5754 This is similar to gen_lowpart in emit-rtl.c. */
5757 gen_lowpart_if_possible (mode
, x
)
5758 enum machine_mode mode
;
5761 rtx result
= gen_lowpart_common (mode
, x
);
5765 else if (GET_CODE (x
) == MEM
)
5767 /* This is the only other case we handle. */
5768 register int offset
= 0;
5771 if (WORDS_BIG_ENDIAN
)
5772 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5773 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5774 if (BYTES_BIG_ENDIAN
)
5775 /* Adjust the address so that the address-after-the-data is
5777 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5778 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5779 new = gen_rtx_MEM (mode
, plus_constant (XEXP (x
, 0), offset
));
5780 if (! memory_address_p (mode
, XEXP (new, 0)))
5782 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5783 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5784 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5791 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5792 branch. It will be zero if not.
5794 In certain cases, this can cause us to add an equivalence. For example,
5795 if we are following the taken case of
5797 we can add the fact that `i' and '2' are now equivalent.
5799 In any case, we can record that this comparison was passed. If the same
5800 comparison is seen later, we will know its value. */
5803 record_jump_equiv (insn
, taken
)
5807 int cond_known_true
;
5809 enum machine_mode mode
, mode0
, mode1
;
5810 int reversed_nonequality
= 0;
5813 /* Ensure this is the right kind of insn. */
5814 if (! condjump_p (insn
) || simplejump_p (insn
))
5817 /* See if this jump condition is known true or false. */
5819 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5821 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5823 /* Get the type of comparison being done and the operands being compared.
5824 If we had to reverse a non-equality condition, record that fact so we
5825 know that it isn't valid for floating-point. */
5826 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5827 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5828 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5830 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5831 if (! cond_known_true
)
5833 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5834 code
= reverse_condition (code
);
5837 /* The mode is the mode of the non-constant. */
5839 if (mode1
!= VOIDmode
)
5842 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5845 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5846 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5847 Make any useful entries we can with that information. Called from
5848 above function and called recursively. */
5851 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5853 enum machine_mode mode
;
5855 int reversed_nonequality
;
5857 unsigned op0_hash
, op1_hash
;
5858 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5859 struct table_elt
*op0_elt
, *op1_elt
;
5861 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5862 we know that they are also equal in the smaller mode (this is also
5863 true for all smaller modes whether or not there is a SUBREG, but
5864 is not worth testing for with no SUBREG. */
5866 /* Note that GET_MODE (op0) may not equal MODE. */
5867 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5868 && (GET_MODE_SIZE (GET_MODE (op0
))
5869 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5871 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5872 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5874 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5875 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
5876 reversed_nonequality
);
5879 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5880 && (GET_MODE_SIZE (GET_MODE (op1
))
5881 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5883 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5884 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5886 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5887 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
5888 reversed_nonequality
);
5891 /* Similarly, if this is an NE comparison, and either is a SUBREG
5892 making a smaller mode, we know the whole thing is also NE. */
5894 /* Note that GET_MODE (op0) may not equal MODE;
5895 if we test MODE instead, we can get an infinite recursion
5896 alternating between two modes each wider than MODE. */
5898 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5899 && subreg_lowpart_p (op0
)
5900 && (GET_MODE_SIZE (GET_MODE (op0
))
5901 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
5903 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5904 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5906 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5907 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
5908 reversed_nonequality
);
5911 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5912 && subreg_lowpart_p (op1
)
5913 && (GET_MODE_SIZE (GET_MODE (op1
))
5914 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
5916 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5917 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5919 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5920 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
5921 reversed_nonequality
);
5924 /* Hash both operands. */
5927 hash_arg_in_memory
= 0;
5928 hash_arg_in_struct
= 0;
5929 op0_hash
= HASH (op0
, mode
);
5930 op0_in_memory
= hash_arg_in_memory
;
5931 op0_in_struct
= hash_arg_in_struct
;
5937 hash_arg_in_memory
= 0;
5938 hash_arg_in_struct
= 0;
5939 op1_hash
= HASH (op1
, mode
);
5940 op1_in_memory
= hash_arg_in_memory
;
5941 op1_in_struct
= hash_arg_in_struct
;
5946 /* Look up both operands. */
5947 op0_elt
= lookup (op0
, op0_hash
, mode
);
5948 op1_elt
= lookup (op1
, op1_hash
, mode
);
5950 /* If both operands are already equivalent or if they are not in the
5951 table but are identical, do nothing. */
5952 if ((op0_elt
!= 0 && op1_elt
!= 0
5953 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
5954 || op0
== op1
|| rtx_equal_p (op0
, op1
))
5957 /* If we aren't setting two things equal all we can do is save this
5958 comparison. Similarly if this is floating-point. In the latter
5959 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5960 If we record the equality, we might inadvertently delete code
5961 whose intent was to change -0 to +0. */
5963 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
5965 /* If we reversed a floating-point comparison, if OP0 is not a
5966 register, or if OP1 is neither a register or constant, we can't
5969 if (GET_CODE (op1
) != REG
)
5970 op1
= equiv_constant (op1
);
5972 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
5973 || GET_CODE (op0
) != REG
|| op1
== 0)
5976 /* Put OP0 in the hash table if it isn't already. This gives it a
5977 new quantity number. */
5980 if (insert_regs (op0
, NULL_PTR
, 0))
5982 rehash_using_reg (op0
);
5983 op0_hash
= HASH (op0
, mode
);
5985 /* If OP0 is contained in OP1, this changes its hash code
5986 as well. Faster to rehash than to check, except
5987 for the simple case of a constant. */
5988 if (! CONSTANT_P (op1
))
5989 op1_hash
= HASH (op1
,mode
);
5992 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
5993 op0_elt
->in_memory
= op0_in_memory
;
5994 op0_elt
->in_struct
= op0_in_struct
;
5997 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5998 if (GET_CODE (op1
) == REG
)
6000 /* Look it up again--in case op0 and op1 are the same. */
6001 op1_elt
= lookup (op1
, op1_hash
, mode
);
6003 /* Put OP1 in the hash table so it gets a new quantity number. */
6006 if (insert_regs (op1
, NULL_PTR
, 0))
6008 rehash_using_reg (op1
);
6009 op1_hash
= HASH (op1
, mode
);
6012 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6013 op1_elt
->in_memory
= op1_in_memory
;
6014 op1_elt
->in_struct
= op1_in_struct
;
6017 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
6018 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
6022 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
6023 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
6029 /* If either side is still missing an equivalence, make it now,
6030 then merge the equivalences. */
6034 if (insert_regs (op0
, NULL_PTR
, 0))
6036 rehash_using_reg (op0
);
6037 op0_hash
= HASH (op0
, mode
);
6040 op0_elt
= insert (op0
, NULL_PTR
, op0_hash
, mode
);
6041 op0_elt
->in_memory
= op0_in_memory
;
6042 op0_elt
->in_struct
= op0_in_struct
;
6047 if (insert_regs (op1
, NULL_PTR
, 0))
6049 rehash_using_reg (op1
);
6050 op1_hash
= HASH (op1
, mode
);
6053 op1_elt
= insert (op1
, NULL_PTR
, op1_hash
, mode
);
6054 op1_elt
->in_memory
= op1_in_memory
;
6055 op1_elt
->in_struct
= op1_in_struct
;
6058 merge_equiv_classes (op0_elt
, op1_elt
);
6059 last_jump_equiv_class
= op0_elt
;
6062 /* CSE processing for one instruction.
6063 First simplify sources and addresses of all assignments
6064 in the instruction, using previously-computed equivalents values.
6065 Then install the new sources and destinations in the table
6066 of available values.
6068 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
6071 /* Data on one SET contained in the instruction. */
6075 /* The SET rtx itself. */
6077 /* The SET_SRC of the rtx (the original value, if it is changing). */
6079 /* The hash-table element for the SET_SRC of the SET. */
6080 struct table_elt
*src_elt
;
6081 /* Hash value for the SET_SRC. */
6083 /* Hash value for the SET_DEST. */
6085 /* The SET_DEST, with SUBREG, etc., stripped. */
6087 /* Place where the pointer to the INNER_DEST was found. */
6088 rtx
*inner_dest_loc
;
6089 /* Nonzero if the SET_SRC is in memory. */
6091 /* Nonzero if the SET_SRC is in a structure. */
6093 /* Nonzero if the SET_SRC contains something
6094 whose value cannot be predicted and understood. */
6096 /* Original machine mode, in case it becomes a CONST_INT. */
6097 enum machine_mode mode
;
6098 /* A constant equivalent for SET_SRC, if any. */
6100 /* Hash value of constant equivalent for SET_SRC. */
6101 unsigned src_const_hash
;
6102 /* Table entry for constant equivalent for SET_SRC, if any. */
6103 struct table_elt
*src_const_elt
;
6107 cse_insn (insn
, in_libcall_block
)
6109 int in_libcall_block
;
6111 register rtx x
= PATTERN (insn
);
6114 register int n_sets
= 0;
6117 /* Records what this insn does to set CC0. */
6118 rtx this_insn_cc0
= 0;
6119 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
6123 struct table_elt
*src_eqv_elt
= 0;
6124 int src_eqv_volatile
;
6125 int src_eqv_in_memory
;
6126 int src_eqv_in_struct
;
6127 unsigned src_eqv_hash
;
6133 /* Find all the SETs and CLOBBERs in this instruction.
6134 Record all the SETs in the array `set' and count them.
6135 Also determine whether there is a CLOBBER that invalidates
6136 all memory references, or all references at varying addresses. */
6138 if (GET_CODE (insn
) == CALL_INSN
)
6140 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6141 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
6142 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
6145 if (GET_CODE (x
) == SET
)
6147 sets
= (struct set
*) alloca (sizeof (struct set
));
6150 /* Ignore SETs that are unconditional jumps.
6151 They never need cse processing, so this does not hurt.
6152 The reason is not efficiency but rather
6153 so that we can test at the end for instructions
6154 that have been simplified to unconditional jumps
6155 and not be misled by unchanged instructions
6156 that were unconditional jumps to begin with. */
6157 if (SET_DEST (x
) == pc_rtx
6158 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
6161 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6162 The hard function value register is used only once, to copy to
6163 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6164 Ensure we invalidate the destination register. On the 80386 no
6165 other code would invalidate it since it is a fixed_reg.
6166 We need not check the return of apply_change_group; see canon_reg. */
6168 else if (GET_CODE (SET_SRC (x
)) == CALL
)
6170 canon_reg (SET_SRC (x
), insn
);
6171 apply_change_group ();
6172 fold_rtx (SET_SRC (x
), insn
);
6173 invalidate (SET_DEST (x
), VOIDmode
);
6178 else if (GET_CODE (x
) == PARALLEL
)
6180 register int lim
= XVECLEN (x
, 0);
6182 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
6184 /* Find all regs explicitly clobbered in this insn,
6185 and ensure they are not replaced with any other regs
6186 elsewhere in this insn.
6187 When a reg that is clobbered is also used for input,
6188 we should presume that that is for a reason,
6189 and we should not substitute some other register
6190 which is not supposed to be clobbered.
6191 Therefore, this loop cannot be merged into the one below
6192 because a CALL may precede a CLOBBER and refer to the
6193 value clobbered. We must not let a canonicalization do
6194 anything in that case. */
6195 for (i
= 0; i
< lim
; i
++)
6197 register rtx y
= XVECEXP (x
, 0, i
);
6198 if (GET_CODE (y
) == CLOBBER
)
6200 rtx clobbered
= XEXP (y
, 0);
6202 if (GET_CODE (clobbered
) == REG
6203 || GET_CODE (clobbered
) == SUBREG
)
6204 invalidate (clobbered
, VOIDmode
);
6205 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6206 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6207 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6211 for (i
= 0; i
< lim
; i
++)
6213 register rtx y
= XVECEXP (x
, 0, i
);
6214 if (GET_CODE (y
) == SET
)
6216 /* As above, we ignore unconditional jumps and call-insns and
6217 ignore the result of apply_change_group. */
6218 if (GET_CODE (SET_SRC (y
)) == CALL
)
6220 canon_reg (SET_SRC (y
), insn
);
6221 apply_change_group ();
6222 fold_rtx (SET_SRC (y
), insn
);
6223 invalidate (SET_DEST (y
), VOIDmode
);
6225 else if (SET_DEST (y
) == pc_rtx
6226 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
6229 sets
[n_sets
++].rtl
= y
;
6231 else if (GET_CODE (y
) == CLOBBER
)
6233 /* If we clobber memory, canon the address.
6234 This does nothing when a register is clobbered
6235 because we have already invalidated the reg. */
6236 if (GET_CODE (XEXP (y
, 0)) == MEM
)
6237 canon_reg (XEXP (y
, 0), NULL_RTX
);
6239 else if (GET_CODE (y
) == USE
6240 && ! (GET_CODE (XEXP (y
, 0)) == REG
6241 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
6242 canon_reg (y
, NULL_RTX
);
6243 else if (GET_CODE (y
) == CALL
)
6245 /* The result of apply_change_group can be ignored; see
6247 canon_reg (y
, insn
);
6248 apply_change_group ();
6253 else if (GET_CODE (x
) == CLOBBER
)
6255 if (GET_CODE (XEXP (x
, 0)) == MEM
)
6256 canon_reg (XEXP (x
, 0), NULL_RTX
);
6259 /* Canonicalize a USE of a pseudo register or memory location. */
6260 else if (GET_CODE (x
) == USE
6261 && ! (GET_CODE (XEXP (x
, 0)) == REG
6262 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
6263 canon_reg (XEXP (x
, 0), NULL_RTX
);
6264 else if (GET_CODE (x
) == CALL
)
6266 /* The result of apply_change_group can be ignored; see canon_reg. */
6267 canon_reg (x
, insn
);
6268 apply_change_group ();
6272 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6273 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6274 is handled specially for this case, and if it isn't set, then there will
6275 be no equivalence for the destination. */
6276 if (n_sets
== 1 && REG_NOTES (insn
) != 0
6277 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
6278 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
6279 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
6280 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
6282 /* Canonicalize sources and addresses of destinations.
6283 We do this in a separate pass to avoid problems when a MATCH_DUP is
6284 present in the insn pattern. In that case, we want to ensure that
6285 we don't break the duplicate nature of the pattern. So we will replace
6286 both operands at the same time. Otherwise, we would fail to find an
6287 equivalent substitution in the loop calling validate_change below.
6289 We used to suppress canonicalization of DEST if it appears in SRC,
6290 but we don't do this any more. */
6292 for (i
= 0; i
< n_sets
; i
++)
6294 rtx dest
= SET_DEST (sets
[i
].rtl
);
6295 rtx src
= SET_SRC (sets
[i
].rtl
);
6296 rtx
new = canon_reg (src
, insn
);
6299 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
6300 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
6301 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
6302 || (insn_code
= recog_memoized (insn
)) < 0
6303 || insn_n_dups
[insn_code
] > 0)
6304 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
6306 SET_SRC (sets
[i
].rtl
) = new;
6308 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
6310 validate_change (insn
, &XEXP (dest
, 1),
6311 canon_reg (XEXP (dest
, 1), insn
), 1);
6312 validate_change (insn
, &XEXP (dest
, 2),
6313 canon_reg (XEXP (dest
, 2), insn
), 1);
6316 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
6317 || GET_CODE (dest
) == ZERO_EXTRACT
6318 || GET_CODE (dest
) == SIGN_EXTRACT
)
6319 dest
= XEXP (dest
, 0);
6321 if (GET_CODE (dest
) == MEM
)
6322 canon_reg (dest
, insn
);
6325 /* Now that we have done all the replacements, we can apply the change
6326 group and see if they all work. Note that this will cause some
6327 canonicalizations that would have worked individually not to be applied
6328 because some other canonicalization didn't work, but this should not
6331 The result of apply_change_group can be ignored; see canon_reg. */
6333 apply_change_group ();
6335 /* Set sets[i].src_elt to the class each source belongs to.
6336 Detect assignments from or to volatile things
6337 and set set[i] to zero so they will be ignored
6338 in the rest of this function.
6340 Nothing in this loop changes the hash table or the register chains. */
6342 for (i
= 0; i
< n_sets
; i
++)
6344 register rtx src
, dest
;
6345 register rtx src_folded
;
6346 register struct table_elt
*elt
= 0, *p
;
6347 enum machine_mode mode
;
6350 rtx src_related
= 0;
6351 struct table_elt
*src_const_elt
= 0;
6352 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
6353 int src_related_cost
= 10000, src_elt_cost
= 10000;
6354 /* Set non-zero if we need to call force_const_mem on with the
6355 contents of src_folded before using it. */
6356 int src_folded_force_flag
= 0;
6358 dest
= SET_DEST (sets
[i
].rtl
);
6359 src
= SET_SRC (sets
[i
].rtl
);
6361 /* If SRC is a constant that has no machine mode,
6362 hash it with the destination's machine mode.
6363 This way we can keep different modes separate. */
6365 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6366 sets
[i
].mode
= mode
;
6370 enum machine_mode eqvmode
= mode
;
6371 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6372 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6374 hash_arg_in_memory
= 0;
6375 hash_arg_in_struct
= 0;
6376 src_eqv
= fold_rtx (src_eqv
, insn
);
6377 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
6379 /* Find the equivalence class for the equivalent expression. */
6382 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
6384 src_eqv_volatile
= do_not_record
;
6385 src_eqv_in_memory
= hash_arg_in_memory
;
6386 src_eqv_in_struct
= hash_arg_in_struct
;
6389 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6390 value of the INNER register, not the destination. So it is not
6391 a valid substitution for the source. But save it for later. */
6392 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6395 src_eqv_here
= src_eqv
;
6397 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6398 simplified result, which may not necessarily be valid. */
6399 src_folded
= fold_rtx (src
, insn
);
6402 /* ??? This caused bad code to be generated for the m68k port with -O2.
6403 Suppose src is (CONST_INT -1), and that after truncation src_folded
6404 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6405 At the end we will add src and src_const to the same equivalence
6406 class. We now have 3 and -1 on the same equivalence class. This
6407 causes later instructions to be mis-optimized. */
6408 /* If storing a constant in a bitfield, pre-truncate the constant
6409 so we will be able to record it later. */
6410 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6411 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6413 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6415 if (GET_CODE (src
) == CONST_INT
6416 && GET_CODE (width
) == CONST_INT
6417 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6418 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6420 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6421 << INTVAL (width
)) - 1));
6425 /* Compute SRC's hash code, and also notice if it
6426 should not be recorded at all. In that case,
6427 prevent any further processing of this assignment. */
6429 hash_arg_in_memory
= 0;
6430 hash_arg_in_struct
= 0;
6433 sets
[i
].src_hash
= HASH (src
, mode
);
6434 sets
[i
].src_volatile
= do_not_record
;
6435 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6436 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6438 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6439 a pseudo that is set more than once, do not record SRC. Using
6440 SRC as a replacement for anything else will be incorrect in that
6441 situation. Note that this usually occurs only for stack slots,
6442 in which case all the RTL would be referring to SRC, so we don't
6443 lose any optimization opportunities by not having SRC in the
6446 if (GET_CODE (src
) == MEM
6447 && find_reg_note (insn
, REG_EQUIV
, src
) != 0
6448 && GET_CODE (dest
) == REG
6449 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
6450 && REG_N_SETS (REGNO (dest
)) != 1)
6451 sets
[i
].src_volatile
= 1;
6454 /* It is no longer clear why we used to do this, but it doesn't
6455 appear to still be needed. So let's try without it since this
6456 code hurts cse'ing widened ops. */
6457 /* If source is a perverse subreg (such as QI treated as an SI),
6458 treat it as volatile. It may do the work of an SI in one context
6459 where the extra bits are not being used, but cannot replace an SI
6461 if (GET_CODE (src
) == SUBREG
6462 && (GET_MODE_SIZE (GET_MODE (src
))
6463 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6464 sets
[i
].src_volatile
= 1;
6467 /* Locate all possible equivalent forms for SRC. Try to replace
6468 SRC in the insn with each cheaper equivalent.
6470 We have the following types of equivalents: SRC itself, a folded
6471 version, a value given in a REG_EQUAL note, or a value related
6474 Each of these equivalents may be part of an additional class
6475 of equivalents (if more than one is in the table, they must be in
6476 the same class; we check for this).
6478 If the source is volatile, we don't do any table lookups.
6480 We note any constant equivalent for possible later use in a
6483 if (!sets
[i
].src_volatile
)
6484 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6486 sets
[i
].src_elt
= elt
;
6488 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6490 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6492 /* The REG_EQUAL is indicating that two formerly distinct
6493 classes are now equivalent. So merge them. */
6494 merge_equiv_classes (elt
, src_eqv_elt
);
6495 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
6496 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
6502 else if (src_eqv_elt
)
6505 /* Try to find a constant somewhere and record it in `src_const'.
6506 Record its table element, if any, in `src_const_elt'. Look in
6507 any known equivalences first. (If the constant is not in the
6508 table, also set `sets[i].src_const_hash'). */
6510 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6514 src_const_elt
= elt
;
6519 && (CONSTANT_P (src_folded
)
6520 /* Consider (minus (label_ref L1) (label_ref L2)) as
6521 "constant" here so we will record it. This allows us
6522 to fold switch statements when an ADDR_DIFF_VEC is used. */
6523 || (GET_CODE (src_folded
) == MINUS
6524 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6525 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6526 src_const
= src_folded
, src_const_elt
= elt
;
6527 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6528 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6530 /* If we don't know if the constant is in the table, get its
6531 hash code and look it up. */
6532 if (src_const
&& src_const_elt
== 0)
6534 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
6535 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
6538 sets
[i
].src_const
= src_const
;
6539 sets
[i
].src_const_elt
= src_const_elt
;
6541 /* If the constant and our source are both in the table, mark them as
6542 equivalent. Otherwise, if a constant is in the table but the source
6543 isn't, set ELT to it. */
6544 if (src_const_elt
&& elt
6545 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6546 merge_equiv_classes (elt
, src_const_elt
);
6547 else if (src_const_elt
&& elt
== 0)
6548 elt
= src_const_elt
;
6550 /* See if there is a register linearly related to a constant
6551 equivalent of SRC. */
6553 && (GET_CODE (src_const
) == CONST
6554 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6556 src_related
= use_related_value (src_const
, src_const_elt
);
6559 struct table_elt
*src_related_elt
6560 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6561 if (src_related_elt
&& elt
)
6563 if (elt
->first_same_value
6564 != src_related_elt
->first_same_value
)
6565 /* This can occur when we previously saw a CONST
6566 involving a SYMBOL_REF and then see the SYMBOL_REF
6567 twice. Merge the involved classes. */
6568 merge_equiv_classes (elt
, src_related_elt
);
6571 src_related_elt
= 0;
6573 else if (src_related_elt
&& elt
== 0)
6574 elt
= src_related_elt
;
6578 /* See if we have a CONST_INT that is already in a register in a
6581 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6582 && GET_MODE_CLASS (mode
) == MODE_INT
6583 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6585 enum machine_mode wider_mode
;
6587 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6588 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6589 && src_related
== 0;
6590 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6592 struct table_elt
*const_elt
6593 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6598 for (const_elt
= const_elt
->first_same_value
;
6599 const_elt
; const_elt
= const_elt
->next_same_value
)
6600 if (GET_CODE (const_elt
->exp
) == REG
)
6602 src_related
= gen_lowpart_if_possible (mode
,
6609 /* Another possibility is that we have an AND with a constant in
6610 a mode narrower than a word. If so, it might have been generated
6611 as part of an "if" which would narrow the AND. If we already
6612 have done the AND in a wider mode, we can use a SUBREG of that
6615 if (flag_expensive_optimizations
&& ! src_related
6616 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6617 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6619 enum machine_mode tmode
;
6620 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6622 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6623 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6624 tmode
= GET_MODE_WIDER_MODE (tmode
))
6626 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6627 struct table_elt
*larger_elt
;
6631 PUT_MODE (new_and
, tmode
);
6632 XEXP (new_and
, 0) = inner
;
6633 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6634 if (larger_elt
== 0)
6637 for (larger_elt
= larger_elt
->first_same_value
;
6638 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6639 if (GET_CODE (larger_elt
->exp
) == REG
)
6642 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6652 #ifdef LOAD_EXTEND_OP
6653 /* See if a MEM has already been loaded with a widening operation;
6654 if it has, we can use a subreg of that. Many CISC machines
6655 also have such operations, but this is only likely to be
6656 beneficial these machines. */
6658 if (flag_expensive_optimizations
&& src_related
== 0
6659 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6660 && GET_MODE_CLASS (mode
) == MODE_INT
6661 && GET_CODE (src
) == MEM
&& ! do_not_record
6662 && LOAD_EXTEND_OP (mode
) != NIL
)
6664 enum machine_mode tmode
;
6666 /* Set what we are trying to extend and the operation it might
6667 have been extended with. */
6668 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
6669 XEXP (memory_extend_rtx
, 0) = src
;
6671 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6672 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6673 tmode
= GET_MODE_WIDER_MODE (tmode
))
6675 struct table_elt
*larger_elt
;
6677 PUT_MODE (memory_extend_rtx
, tmode
);
6678 larger_elt
= lookup (memory_extend_rtx
,
6679 HASH (memory_extend_rtx
, tmode
), tmode
);
6680 if (larger_elt
== 0)
6683 for (larger_elt
= larger_elt
->first_same_value
;
6684 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6685 if (GET_CODE (larger_elt
->exp
) == REG
)
6687 src_related
= gen_lowpart_if_possible (mode
,
6696 #endif /* LOAD_EXTEND_OP */
6698 if (src
== src_folded
)
6701 /* At this point, ELT, if non-zero, points to a class of expressions
6702 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6703 and SRC_RELATED, if non-zero, each contain additional equivalent
6704 expressions. Prune these latter expressions by deleting expressions
6705 already in the equivalence class.
6707 Check for an equivalent identical to the destination. If found,
6708 this is the preferred equivalent since it will likely lead to
6709 elimination of the insn. Indicate this by placing it in
6712 if (elt
) elt
= elt
->first_same_value
;
6713 for (p
= elt
; p
; p
= p
->next_same_value
)
6715 enum rtx_code code
= GET_CODE (p
->exp
);
6717 /* If the expression is not valid, ignore it. Then we do not
6718 have to check for validity below. In most cases, we can use
6719 `rtx_equal_p', since canonicalization has already been done. */
6720 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6723 /* Also skip paradoxical subregs, unless that's what we're
6726 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
6727 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
6729 && GET_CODE (src
) == SUBREG
6730 && GET_MODE (src
) == GET_MODE (p
->exp
)
6731 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
6732 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
6735 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6737 else if (src_folded
&& GET_CODE (src_folded
) == code
6738 && rtx_equal_p (src_folded
, p
->exp
))
6740 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6741 && rtx_equal_p (src_eqv_here
, p
->exp
))
6743 else if (src_related
&& GET_CODE (src_related
) == code
6744 && rtx_equal_p (src_related
, p
->exp
))
6747 /* This is the same as the destination of the insns, we want
6748 to prefer it. Copy it to src_related. The code below will
6749 then give it a negative cost. */
6750 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6755 /* Find the cheapest valid equivalent, trying all the available
6756 possibilities. Prefer items not in the hash table to ones
6757 that are when they are equal cost. Note that we can never
6758 worsen an insn as the current contents will also succeed.
6759 If we find an equivalent identical to the destination, use it as best,
6760 since this insn will probably be eliminated in that case. */
6763 if (rtx_equal_p (src
, dest
))
6766 src_cost
= COST (src
);
6771 if (rtx_equal_p (src_eqv_here
, dest
))
6774 src_eqv_cost
= COST (src_eqv_here
);
6779 if (rtx_equal_p (src_folded
, dest
))
6780 src_folded_cost
= -1;
6782 src_folded_cost
= COST (src_folded
);
6787 if (rtx_equal_p (src_related
, dest
))
6788 src_related_cost
= -1;
6790 src_related_cost
= COST (src_related
);
6793 /* If this was an indirect jump insn, a known label will really be
6794 cheaper even though it looks more expensive. */
6795 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6796 src_folded
= src_const
, src_folded_cost
= -1;
6798 /* Terminate loop when replacement made. This must terminate since
6799 the current contents will be tested and will always be valid. */
6804 /* Skip invalid entries. */
6805 while (elt
&& GET_CODE (elt
->exp
) != REG
6806 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6807 elt
= elt
->next_same_value
;
6809 /* A paradoxical subreg would be bad here: it'll be the right
6810 size, but later may be adjusted so that the upper bits aren't
6811 what we want. So reject it. */
6813 && GET_CODE (elt
->exp
) == SUBREG
6814 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
6815 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
6816 /* It is okay, though, if the rtx we're trying to match
6817 will ignore any of the bits we can't predict. */
6819 && GET_CODE (src
) == SUBREG
6820 && GET_MODE (src
) == GET_MODE (elt
->exp
)
6821 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
6822 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
6824 elt
= elt
->next_same_value
;
6828 if (elt
) src_elt_cost
= elt
->cost
;
6830 /* Find cheapest and skip it for the next time. For items
6831 of equal cost, use this order:
6832 src_folded, src, src_eqv, src_related and hash table entry. */
6833 if (src_folded_cost
<= src_cost
6834 && src_folded_cost
<= src_eqv_cost
6835 && src_folded_cost
<= src_related_cost
6836 && src_folded_cost
<= src_elt_cost
)
6838 trial
= src_folded
, src_folded_cost
= 10000;
6839 if (src_folded_force_flag
)
6840 trial
= force_const_mem (mode
, trial
);
6842 else if (src_cost
<= src_eqv_cost
6843 && src_cost
<= src_related_cost
6844 && src_cost
<= src_elt_cost
)
6845 trial
= src
, src_cost
= 10000;
6846 else if (src_eqv_cost
<= src_related_cost
6847 && src_eqv_cost
<= src_elt_cost
)
6848 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= 10000;
6849 else if (src_related_cost
<= src_elt_cost
)
6850 trial
= copy_rtx (src_related
), src_related_cost
= 10000;
6853 trial
= copy_rtx (elt
->exp
);
6854 elt
= elt
->next_same_value
;
6855 src_elt_cost
= 10000;
6858 /* We don't normally have an insn matching (set (pc) (pc)), so
6859 check for this separately here. We will delete such an
6862 Tablejump insns contain a USE of the table, so simply replacing
6863 the operand with the constant won't match. This is simply an
6864 unconditional branch, however, and is therefore valid. Just
6865 insert the substitution here and we will delete and re-emit
6868 if (n_sets
== 1 && dest
== pc_rtx
6870 || (GET_CODE (trial
) == LABEL_REF
6871 && ! condjump_p (insn
))))
6873 /* If TRIAL is a label in front of a jump table, we are
6874 really falling through the switch (this is how casesi
6875 insns work), so we must branch around the table. */
6876 if (GET_CODE (trial
) == CODE_LABEL
6877 && NEXT_INSN (trial
) != 0
6878 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6879 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6880 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6882 trial
= gen_rtx_LABEL_REF (Pmode
, get_label_after (trial
));
6884 SET_SRC (sets
[i
].rtl
) = trial
;
6885 cse_jumps_altered
= 1;
6889 /* Look for a substitution that makes a valid insn. */
6890 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6892 /* The result of apply_change_group can be ignored; see
6895 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6896 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6898 apply_change_group ();
6902 /* If we previously found constant pool entries for
6903 constants and this is a constant, try making a
6904 pool entry. Put it in src_folded unless we already have done
6905 this since that is where it likely came from. */
6907 else if (constant_pool_entries_cost
6908 && CONSTANT_P (trial
)
6909 && ! (GET_CODE (trial
) == CONST
6910 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
6912 || (GET_CODE (src_folded
) != MEM
6913 && ! src_folded_force_flag
))
6914 && GET_MODE_CLASS (mode
) != MODE_CC
6915 && mode
!= VOIDmode
)
6917 src_folded_force_flag
= 1;
6919 src_folded_cost
= constant_pool_entries_cost
;
6923 src
= SET_SRC (sets
[i
].rtl
);
6925 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6926 However, there is an important exception: If both are registers
6927 that are not the head of their equivalence class, replace SET_SRC
6928 with the head of the class. If we do not do this, we will have
6929 both registers live over a portion of the basic block. This way,
6930 their lifetimes will likely abut instead of overlapping. */
6931 if (GET_CODE (dest
) == REG
6932 && REGNO_QTY_VALID_P (REGNO (dest
))
6933 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6934 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6935 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6936 /* Don't do this if the original insn had a hard reg as
6938 && (GET_CODE (sets
[i
].src
) != REG
6939 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6940 /* We can't call canon_reg here because it won't do anything if
6941 SRC is a hard register. */
6943 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6945 src
= SET_SRC (sets
[i
].rtl
)
6946 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6947 : gen_rtx_REG (GET_MODE (src
), first
);
6949 /* If we had a constant that is cheaper than what we are now
6950 setting SRC to, use that constant. We ignored it when we
6951 thought we could make this into a no-op. */
6952 if (src_const
&& COST (src_const
) < COST (src
)
6953 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6957 /* If we made a change, recompute SRC values. */
6958 if (src
!= sets
[i
].src
)
6961 hash_arg_in_memory
= 0;
6962 hash_arg_in_struct
= 0;
6964 sets
[i
].src_hash
= HASH (src
, mode
);
6965 sets
[i
].src_volatile
= do_not_record
;
6966 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6967 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6968 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
6971 /* If this is a single SET, we are setting a register, and we have an
6972 equivalent constant, we want to add a REG_NOTE. We don't want
6973 to write a REG_EQUAL note for a constant pseudo since verifying that
6974 that pseudo hasn't been eliminated is a pain. Such a note also
6975 won't help anything. */
6976 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6977 && GET_CODE (src_const
) != REG
)
6979 tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6981 /* Record the actual constant value in a REG_EQUAL note, making
6982 a new one if one does not already exist. */
6984 XEXP (tem
, 0) = src_const
;
6986 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EQUAL
,
6987 src_const
, REG_NOTES (insn
));
6989 /* If storing a constant value in a register that
6990 previously held the constant value 0,
6991 record this fact with a REG_WAS_0 note on this insn.
6993 Note that the *register* is required to have previously held 0,
6994 not just any register in the quantity and we must point to the
6995 insn that set that register to zero.
6997 Rather than track each register individually, we just see if
6998 the last set for this quantity was for this register. */
7000 if (REGNO_QTY_VALID_P (REGNO (dest
))
7001 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
7003 /* See if we previously had a REG_WAS_0 note. */
7004 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7005 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
7007 if ((tem
= single_set (const_insn
)) != 0
7008 && rtx_equal_p (SET_DEST (tem
), dest
))
7011 XEXP (note
, 0) = const_insn
;
7013 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_WAS_0
,
7020 /* Now deal with the destination. */
7022 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
7024 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7025 to the MEM or REG within it. */
7026 while (GET_CODE (dest
) == SIGN_EXTRACT
7027 || GET_CODE (dest
) == ZERO_EXTRACT
7028 || GET_CODE (dest
) == SUBREG
7029 || GET_CODE (dest
) == STRICT_LOW_PART
)
7031 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
7032 dest
= XEXP (dest
, 0);
7035 sets
[i
].inner_dest
= dest
;
7037 if (GET_CODE (dest
) == MEM
)
7039 #ifdef PUSH_ROUNDING
7040 /* Stack pushes invalidate the stack pointer. */
7041 rtx addr
= XEXP (dest
, 0);
7042 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7043 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7044 && XEXP (addr
, 0) == stack_pointer_rtx
)
7045 invalidate (stack_pointer_rtx
, Pmode
);
7047 dest
= fold_rtx (dest
, insn
);
7050 /* Compute the hash code of the destination now,
7051 before the effects of this instruction are recorded,
7052 since the register values used in the address computation
7053 are those before this instruction. */
7054 sets
[i
].dest_hash
= HASH (dest
, mode
);
7056 /* Don't enter a bit-field in the hash table
7057 because the value in it after the store
7058 may not equal what was stored, due to truncation. */
7060 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
7061 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
7063 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
7065 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
7066 && GET_CODE (width
) == CONST_INT
7067 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
7068 && ! (INTVAL (src_const
)
7069 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
7070 /* Exception: if the value is constant,
7071 and it won't be truncated, record it. */
7075 /* This is chosen so that the destination will be invalidated
7076 but no new value will be recorded.
7077 We must invalidate because sometimes constant
7078 values can be recorded for bitfields. */
7079 sets
[i
].src_elt
= 0;
7080 sets
[i
].src_volatile
= 1;
7086 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7088 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
7090 PUT_CODE (insn
, NOTE
);
7091 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
7092 NOTE_SOURCE_FILE (insn
) = 0;
7093 cse_jumps_altered
= 1;
7094 /* One less use of the label this insn used to jump to. */
7095 if (JUMP_LABEL (insn
) != 0)
7096 --LABEL_NUSES (JUMP_LABEL (insn
));
7097 /* No more processing for this set. */
7101 /* If this SET is now setting PC to a label, we know it used to
7102 be a conditional or computed branch. So we see if we can follow
7103 it. If it was a computed branch, delete it and re-emit. */
7104 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
7108 /* If this is not in the format for a simple branch and
7109 we are the only SET in it, re-emit it. */
7110 if (! simplejump_p (insn
) && n_sets
== 1)
7112 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
7113 JUMP_LABEL (new) = XEXP (src
, 0);
7114 LABEL_NUSES (XEXP (src
, 0))++;
7119 /* Otherwise, force rerecognition, since it probably had
7120 a different pattern before.
7121 This shouldn't really be necessary, since whatever
7122 changed the source value above should have done this.
7123 Until the right place is found, might as well do this here. */
7124 INSN_CODE (insn
) = -1;
7126 /* Now that we've converted this jump to an unconditional jump,
7127 there is dead code after it. Delete the dead code until we
7128 reach a BARRIER, the end of the function, or a label. Do
7129 not delete NOTEs except for NOTE_INSN_DELETED since later
7130 phases assume these notes are retained. */
7134 while (NEXT_INSN (p
) != 0
7135 && GET_CODE (NEXT_INSN (p
)) != BARRIER
7136 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
7138 if (GET_CODE (NEXT_INSN (p
)) != NOTE
7139 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
7140 delete_insn (NEXT_INSN (p
));
7145 /* If we don't have a BARRIER immediately after INSN, put one there.
7146 Much code assumes that there are no NOTEs between a JUMP_INSN and
7149 if (NEXT_INSN (insn
) == 0
7150 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
7151 emit_barrier_before (NEXT_INSN (insn
));
7153 /* We might have two BARRIERs separated by notes. Delete the second
7156 if (p
!= insn
&& NEXT_INSN (p
) != 0
7157 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
7158 delete_insn (NEXT_INSN (p
));
7160 cse_jumps_altered
= 1;
7164 /* If destination is volatile, invalidate it and then do no further
7165 processing for this assignment. */
7167 else if (do_not_record
)
7169 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7170 || GET_CODE (dest
) == MEM
)
7171 invalidate (dest
, VOIDmode
);
7172 else if (GET_CODE (dest
) == STRICT_LOW_PART
7173 || GET_CODE (dest
) == ZERO_EXTRACT
)
7174 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7178 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
7179 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
7182 /* If setting CC0, record what it was set to, or a constant, if it
7183 is equivalent to a constant. If it is being set to a floating-point
7184 value, make a COMPARE with the appropriate constant of 0. If we
7185 don't do this, later code can interpret this as a test against
7186 const0_rtx, which can cause problems if we try to put it into an
7187 insn as a floating-point operand. */
7188 if (dest
== cc0_rtx
)
7190 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
7191 this_insn_cc0_mode
= mode
;
7192 if (FLOAT_MODE_P (mode
))
7193 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
7199 /* Now enter all non-volatile source expressions in the hash table
7200 if they are not already present.
7201 Record their equivalence classes in src_elt.
7202 This way we can insert the corresponding destinations into
7203 the same classes even if the actual sources are no longer in them
7204 (having been invalidated). */
7206 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
7207 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
7209 register struct table_elt
*elt
;
7210 register struct table_elt
*classp
= sets
[0].src_elt
;
7211 rtx dest
= SET_DEST (sets
[0].rtl
);
7212 enum machine_mode eqvmode
= GET_MODE (dest
);
7214 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7216 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
7219 if (insert_regs (src_eqv
, classp
, 0))
7221 rehash_using_reg (src_eqv
);
7222 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
7224 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
7225 elt
->in_memory
= src_eqv_in_memory
;
7226 elt
->in_struct
= src_eqv_in_struct
;
7229 /* Check to see if src_eqv_elt is the same as a set source which
7230 does not yet have an elt, and if so set the elt of the set source
7232 for (i
= 0; i
< n_sets
; i
++)
7233 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
7234 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
7235 sets
[i
].src_elt
= src_eqv_elt
;
7238 for (i
= 0; i
< n_sets
; i
++)
7239 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
7240 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
7242 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
7244 /* REG_EQUAL in setting a STRICT_LOW_PART
7245 gives an equivalent for the entire destination register,
7246 not just for the subreg being stored in now.
7247 This is a more interesting equivalence, so we arrange later
7248 to treat the entire reg as the destination. */
7249 sets
[i
].src_elt
= src_eqv_elt
;
7250 sets
[i
].src_hash
= src_eqv_hash
;
7254 /* Insert source and constant equivalent into hash table, if not
7256 register struct table_elt
*classp
= src_eqv_elt
;
7257 register rtx src
= sets
[i
].src
;
7258 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7259 enum machine_mode mode
7260 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
7262 if (sets
[i
].src_elt
== 0)
7264 register struct table_elt
*elt
;
7266 /* Note that these insert_regs calls cannot remove
7267 any of the src_elt's, because they would have failed to
7268 match if not still valid. */
7269 if (insert_regs (src
, classp
, 0))
7271 rehash_using_reg (src
);
7272 sets
[i
].src_hash
= HASH (src
, mode
);
7274 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
7275 elt
->in_memory
= sets
[i
].src_in_memory
;
7276 elt
->in_struct
= sets
[i
].src_in_struct
;
7277 sets
[i
].src_elt
= classp
= elt
;
7280 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
7281 && src
!= sets
[i
].src_const
7282 && ! rtx_equal_p (sets
[i
].src_const
, src
))
7283 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
7284 sets
[i
].src_const_hash
, mode
);
7287 else if (sets
[i
].src_elt
== 0)
7288 /* If we did not insert the source into the hash table (e.g., it was
7289 volatile), note the equivalence class for the REG_EQUAL value, if any,
7290 so that the destination goes into that class. */
7291 sets
[i
].src_elt
= src_eqv_elt
;
7293 invalidate_from_clobbers (x
);
7295 /* Some registers are invalidated by subroutine calls. Memory is
7296 invalidated by non-constant calls. */
7298 if (GET_CODE (insn
) == CALL_INSN
)
7300 if (! CONST_CALL_P (insn
))
7301 invalidate_memory ();
7302 invalidate_for_call ();
7305 /* Now invalidate everything set by this instruction.
7306 If a SUBREG or other funny destination is being set,
7307 sets[i].rtl is still nonzero, so here we invalidate the reg
7308 a part of which is being set. */
7310 for (i
= 0; i
< n_sets
; i
++)
7313 /* We can't use the inner dest, because the mode associated with
7314 a ZERO_EXTRACT is significant. */
7315 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7317 /* Needed for registers to remove the register from its
7318 previous quantity's chain.
7319 Needed for memory if this is a nonvarying address, unless
7320 we have just done an invalidate_memory that covers even those. */
7321 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7322 || GET_CODE (dest
) == MEM
)
7323 invalidate (dest
, VOIDmode
);
7324 else if (GET_CODE (dest
) == STRICT_LOW_PART
7325 || GET_CODE (dest
) == ZERO_EXTRACT
)
7326 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7329 /* Make sure registers mentioned in destinations
7330 are safe for use in an expression to be inserted.
7331 This removes from the hash table
7332 any invalid entry that refers to one of these registers.
7334 We don't care about the return value from mention_regs because
7335 we are going to hash the SET_DEST values unconditionally. */
7337 for (i
= 0; i
< n_sets
; i
++)
7338 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
7339 mention_regs (SET_DEST (sets
[i
].rtl
));
7341 /* We may have just removed some of the src_elt's from the hash table.
7342 So replace each one with the current head of the same class. */
7344 for (i
= 0; i
< n_sets
; i
++)
7347 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
7348 /* If elt was removed, find current head of same class,
7349 or 0 if nothing remains of that class. */
7351 register struct table_elt
*elt
= sets
[i
].src_elt
;
7353 while (elt
&& elt
->prev_same_value
)
7354 elt
= elt
->prev_same_value
;
7356 while (elt
&& elt
->first_same_value
== 0)
7357 elt
= elt
->next_same_value
;
7358 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
7362 /* Now insert the destinations into their equivalence classes. */
7364 for (i
= 0; i
< n_sets
; i
++)
7367 register rtx dest
= SET_DEST (sets
[i
].rtl
);
7368 register struct table_elt
*elt
;
7370 /* Don't record value if we are not supposed to risk allocating
7371 floating-point values in registers that might be wider than
7373 if ((flag_float_store
7374 && GET_CODE (dest
) == MEM
7375 && FLOAT_MODE_P (GET_MODE (dest
)))
7376 /* Don't record BLKmode values, because we don't know the
7377 size of it, and can't be sure that other BLKmode values
7378 have the same or smaller size. */
7379 || GET_MODE (dest
) == BLKmode
7380 /* Don't record values of destinations set inside a libcall block
7381 since we might delete the libcall. Things should have been set
7382 up so we won't want to reuse such a value, but we play it safe
7385 /* If we didn't put a REG_EQUAL value or a source into the hash
7386 table, there is no point is recording DEST. */
7387 || sets
[i
].src_elt
== 0
7388 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7389 or SIGN_EXTEND, don't record DEST since it can cause
7390 some tracking to be wrong.
7392 ??? Think about this more later. */
7393 || (GET_CODE (dest
) == SUBREG
7394 && (GET_MODE_SIZE (GET_MODE (dest
))
7395 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7396 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
7397 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
7400 /* STRICT_LOW_PART isn't part of the value BEING set,
7401 and neither is the SUBREG inside it.
7402 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7403 if (GET_CODE (dest
) == STRICT_LOW_PART
)
7404 dest
= SUBREG_REG (XEXP (dest
, 0));
7406 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
7407 /* Registers must also be inserted into chains for quantities. */
7408 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
7410 /* If `insert_regs' changes something, the hash code must be
7412 rehash_using_reg (dest
);
7413 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
7416 elt
= insert (dest
, sets
[i
].src_elt
,
7417 sets
[i
].dest_hash
, GET_MODE (dest
));
7418 elt
->in_memory
= (GET_CODE (sets
[i
].inner_dest
) == MEM
7419 && (! RTX_UNCHANGING_P (sets
[i
].inner_dest
)
7420 || FIXED_BASE_PLUS_P (XEXP (sets
[i
].inner_dest
,
7425 /* This implicitly assumes a whole struct
7426 need not have MEM_IN_STRUCT_P.
7427 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7428 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
7429 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
7432 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7433 narrower than M2, and both M1 and M2 are the same number of words,
7434 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7435 make that equivalence as well.
7437 However, BAR may have equivalences for which gen_lowpart_if_possible
7438 will produce a simpler value than gen_lowpart_if_possible applied to
7439 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7440 BAR's equivalences. If we don't get a simplified form, make
7441 the SUBREG. It will not be used in an equivalence, but will
7442 cause two similar assignments to be detected.
7444 Note the loop below will find SUBREG_REG (DEST) since we have
7445 already entered SRC and DEST of the SET in the table. */
7447 if (GET_CODE (dest
) == SUBREG
7448 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
7450 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1)/ UNITS_PER_WORD
)
7451 && (GET_MODE_SIZE (GET_MODE (dest
))
7452 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
7453 && sets
[i
].src_elt
!= 0)
7455 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
7456 struct table_elt
*elt
, *classp
= 0;
7458 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
7459 elt
= elt
->next_same_value
)
7463 struct table_elt
*src_elt
;
7465 /* Ignore invalid entries. */
7466 if (GET_CODE (elt
->exp
) != REG
7467 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
7470 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
7472 new_src
= gen_rtx_SUBREG (new_mode
, elt
->exp
, 0);
7474 src_hash
= HASH (new_src
, new_mode
);
7475 src_elt
= lookup (new_src
, src_hash
, new_mode
);
7477 /* Put the new source in the hash table is if isn't
7481 if (insert_regs (new_src
, classp
, 0))
7483 rehash_using_reg (new_src
);
7484 src_hash
= HASH (new_src
, new_mode
);
7486 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
7487 src_elt
->in_memory
= elt
->in_memory
;
7488 src_elt
->in_struct
= elt
->in_struct
;
7490 else if (classp
&& classp
!= src_elt
->first_same_value
)
7491 /* Show that two things that we've seen before are
7492 actually the same. */
7493 merge_equiv_classes (src_elt
, classp
);
7495 classp
= src_elt
->first_same_value
;
7496 /* Ignore invalid entries. */
7498 && GET_CODE (classp
->exp
) != REG
7499 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, 0))
7500 classp
= classp
->next_same_value
;
7505 /* Special handling for (set REG0 REG1)
7506 where REG0 is the "cheapest", cheaper than REG1.
7507 After cse, REG1 will probably not be used in the sequel,
7508 so (if easily done) change this insn to (set REG1 REG0) and
7509 replace REG1 with REG0 in the previous insn that computed their value.
7510 Then REG1 will become a dead store and won't cloud the situation
7511 for later optimizations.
7513 Do not make this change if REG1 is a hard register, because it will
7514 then be used in the sequel and we may be changing a two-operand insn
7515 into a three-operand insn.
7517 Also do not do this if we are operating on a copy of INSN. */
7519 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
7520 && NEXT_INSN (PREV_INSN (insn
)) == insn
7521 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
7522 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
7523 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
7524 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
7525 == REGNO (SET_DEST (sets
[0].rtl
))))
7527 rtx prev
= PREV_INSN (insn
);
7528 while (prev
&& GET_CODE (prev
) == NOTE
)
7529 prev
= PREV_INSN (prev
);
7531 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
7532 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
7534 rtx dest
= SET_DEST (sets
[0].rtl
);
7535 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
7537 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
7538 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
7539 SET_SRC (sets
[0].rtl
), 1);
7540 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
7541 apply_change_group ();
7543 /* If REG1 was equivalent to a constant, REG0 is not. */
7545 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
7547 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7548 any REG_WAS_0 note on INSN to PREV. */
7549 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
7551 remove_note (prev
, note
);
7553 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
7556 remove_note (insn
, note
);
7557 XEXP (note
, 1) = REG_NOTES (prev
);
7558 REG_NOTES (prev
) = note
;
7561 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7562 then we must delete it, because the value in REG0 has changed. */
7563 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7564 if (note
&& reg_mentioned_p (dest
, XEXP (note
, 0)))
7565 remove_note (insn
, note
);
7569 /* If this is a conditional jump insn, record any known equivalences due to
7570 the condition being tested. */
7572 last_jump_equiv_class
= 0;
7573 if (GET_CODE (insn
) == JUMP_INSN
7574 && n_sets
== 1 && GET_CODE (x
) == SET
7575 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
7576 record_jump_equiv (insn
, 0);
7579 /* If the previous insn set CC0 and this insn no longer references CC0,
7580 delete the previous insn. Here we use the fact that nothing expects CC0
7581 to be valid over an insn, which is true until the final pass. */
7582 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
7583 && (tem
= single_set (prev_insn
)) != 0
7584 && SET_DEST (tem
) == cc0_rtx
7585 && ! reg_mentioned_p (cc0_rtx
, x
))
7587 PUT_CODE (prev_insn
, NOTE
);
7588 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7589 NOTE_SOURCE_FILE (prev_insn
) = 0;
7592 prev_insn_cc0
= this_insn_cc0
;
7593 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7599 /* Remove from the ahsh table all expressions that reference memory. */
7601 invalidate_memory ()
7604 register struct table_elt
*p
, *next
;
7606 for (i
= 0; i
< NBUCKETS
; i
++)
7607 for (p
= table
[i
]; p
; p
= next
)
7609 next
= p
->next_same_hash
;
7611 remove_from_table (p
, i
);
7615 /* XXX ??? The name of this function bears little resemblance to
7616 what this function actually does. FIXME. */
7618 note_mem_written (addr
)
7621 /* Pushing or popping the stack invalidates just the stack pointer. */
7622 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7623 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7624 && GET_CODE (XEXP (addr
, 0)) == REG
7625 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7627 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7628 reg_tick
[STACK_POINTER_REGNUM
]++;
7630 /* This should be *very* rare. */
7631 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7632 invalidate (stack_pointer_rtx
, VOIDmode
);
7638 /* Perform invalidation on the basis of everything about an insn
7639 except for invalidating the actual places that are SET in it.
7640 This includes the places CLOBBERed, and anything that might
7641 alias with something that is SET or CLOBBERed.
7643 X is the pattern of the insn. */
7646 invalidate_from_clobbers (x
)
7649 if (GET_CODE (x
) == CLOBBER
)
7651 rtx ref
= XEXP (x
, 0);
7654 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7655 || GET_CODE (ref
) == MEM
)
7656 invalidate (ref
, VOIDmode
);
7657 else if (GET_CODE (ref
) == STRICT_LOW_PART
7658 || GET_CODE (ref
) == ZERO_EXTRACT
)
7659 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7662 else if (GET_CODE (x
) == PARALLEL
)
7665 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7667 register rtx y
= XVECEXP (x
, 0, i
);
7668 if (GET_CODE (y
) == CLOBBER
)
7670 rtx ref
= XEXP (y
, 0);
7671 if (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7672 || GET_CODE (ref
) == MEM
)
7673 invalidate (ref
, VOIDmode
);
7674 else if (GET_CODE (ref
) == STRICT_LOW_PART
7675 || GET_CODE (ref
) == ZERO_EXTRACT
)
7676 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
7682 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7683 and replace any registers in them with either an equivalent constant
7684 or the canonical form of the register. If we are inside an address,
7685 only do this if the address remains valid.
7687 OBJECT is 0 except when within a MEM in which case it is the MEM.
7689 Return the replacement for X. */
7692 cse_process_notes (x
, object
)
7696 enum rtx_code code
= GET_CODE (x
);
7697 char *fmt
= GET_RTX_FORMAT (code
);
7713 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7718 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7719 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7721 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7728 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7729 /* We don't substitute VOIDmode constants into these rtx,
7730 since they would impede folding. */
7731 if (GET_MODE (new) != VOIDmode
)
7732 validate_change (object
, &XEXP (x
, 0), new, 0);
7737 i
= reg_qty
[REGNO (x
)];
7739 /* Return a constant or a constant register. */
7740 if (REGNO_QTY_VALID_P (REGNO (x
))
7741 && qty_const
[i
] != 0
7742 && (CONSTANT_P (qty_const
[i
])
7743 || GET_CODE (qty_const
[i
]) == REG
))
7745 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7750 /* Otherwise, canonicalize this register. */
7751 return canon_reg (x
, NULL_RTX
);
7757 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7759 validate_change (object
, &XEXP (x
, i
),
7760 cse_process_notes (XEXP (x
, i
), object
), 0);
7765 /* Find common subexpressions between the end test of a loop and the beginning
7766 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7768 Often we have a loop where an expression in the exit test is used
7769 in the body of the loop. For example "while (*p) *q++ = *p++;".
7770 Because of the way we duplicate the loop exit test in front of the loop,
7771 however, we don't detect that common subexpression. This will be caught
7772 when global cse is implemented, but this is a quite common case.
7774 This function handles the most common cases of these common expressions.
7775 It is called after we have processed the basic block ending with the
7776 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7777 jumps to a label used only once. */
7780 cse_around_loop (loop_start
)
7785 struct table_elt
*p
;
7787 /* If the jump at the end of the loop doesn't go to the start, we don't
7789 for (insn
= PREV_INSN (loop_start
);
7790 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7791 insn
= PREV_INSN (insn
))
7795 || GET_CODE (insn
) != NOTE
7796 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7799 /* If the last insn of the loop (the end test) was an NE comparison,
7800 we will interpret it as an EQ comparison, since we fell through
7801 the loop. Any equivalences resulting from that comparison are
7802 therefore not valid and must be invalidated. */
7803 if (last_jump_equiv_class
)
7804 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7805 p
= p
->next_same_value
)
7806 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7807 || (GET_CODE (p
->exp
) == SUBREG
7808 && GET_CODE (SUBREG_REG (p
->exp
)) == REG
))
7809 invalidate (p
->exp
, VOIDmode
);
7810 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
7811 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
7812 invalidate (XEXP (p
->exp
, 0), GET_MODE (p
->exp
));
7814 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7815 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7817 The only thing we do with SET_DEST is invalidate entries, so we
7818 can safely process each SET in order. It is slightly less efficient
7819 to do so, but we only want to handle the most common cases.
7821 The gen_move_insn call in cse_set_around_loop may create new pseudos.
7822 These pseudos won't have valid entries in any of the tables indexed
7823 by register number, such as reg_qty. We avoid out-of-range array
7824 accesses by not processing any instructions created after cse started. */
7826 for (insn
= NEXT_INSN (loop_start
);
7827 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7828 && INSN_UID (insn
) < max_insn_uid
7829 && ! (GET_CODE (insn
) == NOTE
7830 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7831 insn
= NEXT_INSN (insn
))
7833 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7834 && (GET_CODE (PATTERN (insn
)) == SET
7835 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7836 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7837 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7838 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7839 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7840 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7841 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7842 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7847 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7848 since they are done elsewhere. This function is called via note_stores. */
7851 invalidate_skipped_set (dest
, set
)
7855 enum rtx_code code
= GET_CODE (dest
);
7858 && ! note_mem_written (dest
) /* If this is not a stack push ... */
7859 /* There are times when an address can appear varying and be a PLUS
7860 during this scan when it would be a fixed address were we to know
7861 the proper equivalences. So invalidate all memory if there is
7862 a BLKmode or nonscalar memory reference or a reference to a
7863 variable address. */
7864 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
7865 || cse_rtx_varies_p (XEXP (dest
, 0))))
7867 invalidate_memory ();
7871 if (GET_CODE (set
) == CLOBBER
7878 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
7879 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
7880 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
7881 invalidate (dest
, VOIDmode
);
7884 /* Invalidate all insns from START up to the end of the function or the
7885 next label. This called when we wish to CSE around a block that is
7886 conditionally executed. */
7889 invalidate_skipped_block (start
)
7894 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7895 insn
= NEXT_INSN (insn
))
7897 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7900 if (GET_CODE (insn
) == CALL_INSN
)
7902 if (! CONST_CALL_P (insn
))
7903 invalidate_memory ();
7904 invalidate_for_call ();
7907 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7911 /* Used for communication between the following two routines; contains a
7912 value to be checked for modification. */
7914 static rtx cse_check_loop_start_value
;
7916 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7917 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7920 cse_check_loop_start (x
, set
)
7924 if (cse_check_loop_start_value
== 0
7925 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7928 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7929 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7930 cse_check_loop_start_value
= 0;
7933 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7934 a loop that starts with the label at LOOP_START.
7936 If X is a SET, we see if its SET_SRC is currently in our hash table.
7937 If so, we see if it has a value equal to some register used only in the
7938 loop exit code (as marked by jump.c).
7940 If those two conditions are true, we search backwards from the start of
7941 the loop to see if that same value was loaded into a register that still
7942 retains its value at the start of the loop.
7944 If so, we insert an insn after the load to copy the destination of that
7945 load into the equivalent register and (try to) replace our SET_SRC with that
7948 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7951 cse_set_around_loop (x
, insn
, loop_start
)
7956 struct table_elt
*src_elt
;
7958 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7959 are setting PC or CC0 or whose SET_SRC is already a register. */
7960 if (GET_CODE (x
) == SET
7961 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7962 && GET_CODE (SET_SRC (x
)) != REG
)
7964 src_elt
= lookup (SET_SRC (x
),
7965 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7966 GET_MODE (SET_DEST (x
)));
7969 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7970 src_elt
= src_elt
->next_same_value
)
7971 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7972 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7976 /* Look for an insn in front of LOOP_START that sets
7977 something in the desired mode to SET_SRC (x) before we hit
7978 a label or CALL_INSN. */
7980 for (p
= prev_nonnote_insn (loop_start
);
7981 p
&& GET_CODE (p
) != CALL_INSN
7982 && GET_CODE (p
) != CODE_LABEL
;
7983 p
= prev_nonnote_insn (p
))
7984 if ((set
= single_set (p
)) != 0
7985 && GET_CODE (SET_DEST (set
)) == REG
7986 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7987 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7989 /* We now have to ensure that nothing between P
7990 and LOOP_START modified anything referenced in
7991 SET_SRC (x). We know that nothing within the loop
7992 can modify it, or we would have invalidated it in
7996 cse_check_loop_start_value
= SET_SRC (x
);
7997 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7998 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7999 note_stores (PATTERN (q
), cse_check_loop_start
);
8001 /* If nothing was changed and we can replace our
8002 SET_SRC, add an insn after P to copy its destination
8003 to what we will be replacing SET_SRC with. */
8004 if (cse_check_loop_start_value
8005 && validate_change (insn
, &SET_SRC (x
),
8007 emit_insn_after (gen_move_insn (src_elt
->exp
,
8015 /* Now invalidate anything modified by X. */
8016 note_mem_written (SET_DEST (x
));
8018 /* See comment on similar code in cse_insn for explanation of these tests. */
8019 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
8020 || GET_CODE (SET_DEST (x
)) == MEM
)
8021 invalidate (SET_DEST (x
), VOIDmode
);
8022 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
8023 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
8024 invalidate (XEXP (SET_DEST (x
), 0), GET_MODE (SET_DEST (x
)));
8027 /* Find the end of INSN's basic block and return its range,
8028 the total number of SETs in all the insns of the block, the last insn of the
8029 block, and the branch path.
8031 The branch path indicates which branches should be followed. If a non-zero
8032 path size is specified, the block should be rescanned and a different set
8033 of branches will be taken. The branch path is only used if
8034 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8036 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8037 used to describe the block. It is filled in with the information about
8038 the current block. The incoming structure's branch path, if any, is used
8039 to construct the output branch path. */
8042 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
8044 struct cse_basic_block_data
*data
;
8051 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
8052 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
8053 int path_size
= data
->path_size
;
8057 /* Update the previous branch path, if any. If the last branch was
8058 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8059 shorten the path by one and look at the previous branch. We know that
8060 at least one branch must have been taken if PATH_SIZE is non-zero. */
8061 while (path_size
> 0)
8063 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
8065 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
8072 /* Scan to end of this basic block. */
8073 while (p
&& GET_CODE (p
) != CODE_LABEL
)
8075 /* Don't cse out the end of a loop. This makes a difference
8076 only for the unusual loops that always execute at least once;
8077 all other loops have labels there so we will stop in any case.
8078 Cse'ing out the end of the loop is dangerous because it
8079 might cause an invariant expression inside the loop
8080 to be reused after the end of the loop. This would make it
8081 hard to move the expression out of the loop in loop.c,
8082 especially if it is one of several equivalent expressions
8083 and loop.c would like to eliminate it.
8085 If we are running after loop.c has finished, we can ignore
8086 the NOTE_INSN_LOOP_END. */
8088 if (! after_loop
&& GET_CODE (p
) == NOTE
8089 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
8092 /* Don't cse over a call to setjmp; on some machines (eg vax)
8093 the regs restored by the longjmp come from
8094 a later time than the setjmp. */
8095 if (GET_CODE (p
) == NOTE
8096 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
8099 /* A PARALLEL can have lots of SETs in it,
8100 especially if it is really an ASM_OPERANDS. */
8101 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
8102 && GET_CODE (PATTERN (p
)) == PARALLEL
)
8103 nsets
+= XVECLEN (PATTERN (p
), 0);
8104 else if (GET_CODE (p
) != NOTE
)
8107 /* Ignore insns made by CSE; they cannot affect the boundaries of
8110 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
8111 high_cuid
= INSN_CUID (p
);
8112 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
8113 low_cuid
= INSN_CUID (p
);
8115 /* See if this insn is in our branch path. If it is and we are to
8117 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
8119 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
8122 /* Point to next entry in path, if any. */
8126 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8127 was specified, we haven't reached our maximum path length, there are
8128 insns following the target of the jump, this is the only use of the
8129 jump label, and the target label is preceded by a BARRIER.
8131 Alternatively, we can follow the jump if it branches around a
8132 block of code and there are no other branches into the block.
8133 In this case invalidate_skipped_block will be called to invalidate any
8134 registers set in the block when following the jump. */
8136 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
8137 && GET_CODE (p
) == JUMP_INSN
8138 && GET_CODE (PATTERN (p
)) == SET
8139 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
8140 && JUMP_LABEL (p
) != 0
8141 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
8142 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
8144 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
8145 if ((GET_CODE (q
) != NOTE
8146 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
8147 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
8148 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
8151 /* If we ran into a BARRIER, this code is an extension of the
8152 basic block when the branch is taken. */
8153 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
8155 /* Don't allow ourself to keep walking around an
8156 always-executed loop. */
8157 if (next_real_insn (q
) == next
)
8163 /* Similarly, don't put a branch in our path more than once. */
8164 for (i
= 0; i
< path_entry
; i
++)
8165 if (data
->path
[i
].branch
== p
)
8168 if (i
!= path_entry
)
8171 data
->path
[path_entry
].branch
= p
;
8172 data
->path
[path_entry
++].status
= TAKEN
;
8174 /* This branch now ends our path. It was possible that we
8175 didn't see this branch the last time around (when the
8176 insn in front of the target was a JUMP_INSN that was
8177 turned into a no-op). */
8178 path_size
= path_entry
;
8181 /* Mark block so we won't scan it again later. */
8182 PUT_MODE (NEXT_INSN (p
), QImode
);
8184 /* Detect a branch around a block of code. */
8185 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
8189 if (next_real_insn (q
) == next
)
8195 for (i
= 0; i
< path_entry
; i
++)
8196 if (data
->path
[i
].branch
== p
)
8199 if (i
!= path_entry
)
8202 /* This is no_labels_between_p (p, q) with an added check for
8203 reaching the end of a function (in case Q precedes P). */
8204 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
8205 if (GET_CODE (tmp
) == CODE_LABEL
)
8210 data
->path
[path_entry
].branch
= p
;
8211 data
->path
[path_entry
++].status
= AROUND
;
8213 path_size
= path_entry
;
8216 /* Mark block so we won't scan it again later. */
8217 PUT_MODE (NEXT_INSN (p
), QImode
);
8224 data
->low_cuid
= low_cuid
;
8225 data
->high_cuid
= high_cuid
;
8226 data
->nsets
= nsets
;
8229 /* If all jumps in the path are not taken, set our path length to zero
8230 so a rescan won't be done. */
8231 for (i
= path_size
- 1; i
>= 0; i
--)
8232 if (data
->path
[i
].status
!= NOT_TAKEN
)
8236 data
->path_size
= 0;
8238 data
->path_size
= path_size
;
8240 /* End the current branch path. */
8241 data
->path
[path_size
].branch
= 0;
8244 /* Perform cse on the instructions of a function.
8245 F is the first instruction.
8246 NREGS is one plus the highest pseudo-reg number used in the instruction.
8248 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8249 (only if -frerun-cse-after-loop).
8251 Returns 1 if jump_optimize should be redone due to simplifications
8252 in conditional jump instructions. */
8255 cse_main (f
, nregs
, after_loop
, file
)
8261 struct cse_basic_block_data val
;
8262 register rtx insn
= f
;
8265 cse_jumps_altered
= 0;
8266 recorded_label_ref
= 0;
8267 constant_pool_entries_cost
= 0;
8271 init_alias_analysis ();
8275 max_insn_uid
= get_max_uid ();
8277 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
8278 consec_ints
= (int *) alloca (nregs
* sizeof (int));
8280 for (i
= 0; i
< nregs
; i
++)
8282 all_minus_one
[i
] = -1;
8286 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
8287 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
8288 reg_qty
= (int *) alloca (nregs
* sizeof (int));
8289 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
8290 reg_tick
= (int *) alloca (nregs
* sizeof (int));
8292 #ifdef LOAD_EXTEND_OP
8294 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8295 and change the code and mode as appropriate. */
8296 memory_extend_rtx
= gen_rtx_ZERO_EXTEND (VOIDmode
, NULL_RTX
);
8299 /* Discard all the free elements of the previous function
8300 since they are allocated in the temporarily obstack. */
8301 bzero ((char *) table
, sizeof table
);
8302 free_element_chain
= 0;
8303 n_elements_made
= 0;
8305 /* Find the largest uid. */
8307 max_uid
= get_max_uid ();
8308 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
8309 bzero ((char *) uid_cuid
, (max_uid
+ 1) * sizeof (int));
8311 /* Compute the mapping from uids to cuids.
8312 CUIDs are numbers assigned to insns, like uids,
8313 except that cuids increase monotonically through the code.
8314 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8315 between two insns is not affected by -g. */
8317 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
8319 if (GET_CODE (insn
) != NOTE
8320 || NOTE_LINE_NUMBER (insn
) < 0)
8321 INSN_CUID (insn
) = ++i
;
8323 /* Give a line number note the same cuid as preceding insn. */
8324 INSN_CUID (insn
) = i
;
8327 /* Initialize which registers are clobbered by calls. */
8329 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
8331 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8332 if ((call_used_regs
[i
]
8333 /* Used to check !fixed_regs[i] here, but that isn't safe;
8334 fixed regs are still call-clobbered, and sched can get
8335 confused if they can "live across calls".
8337 The frame pointer is always preserved across calls. The arg
8338 pointer is if it is fixed. The stack pointer usually is, unless
8339 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8340 will be present. If we are generating PIC code, the PIC offset
8341 table register is preserved across calls. */
8343 && i
!= STACK_POINTER_REGNUM
8344 && i
!= FRAME_POINTER_REGNUM
8345 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8346 && i
!= HARD_FRAME_POINTER_REGNUM
8348 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8349 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
8351 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8352 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
8356 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
8358 /* Loop over basic blocks.
8359 Compute the maximum number of qty's needed for each basic block
8360 (which is 2 for each SET). */
8364 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
8365 flag_cse_skip_blocks
);
8367 /* If this basic block was already processed or has no sets, skip it. */
8368 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
8370 PUT_MODE (insn
, VOIDmode
);
8371 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
8376 cse_basic_block_start
= val
.low_cuid
;
8377 cse_basic_block_end
= val
.high_cuid
;
8378 max_qty
= val
.nsets
* 2;
8381 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
8382 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
8385 /* Make MAX_QTY bigger to give us room to optimize
8386 past the end of this basic block, if that should prove useful. */
8392 /* If this basic block is being extended by following certain jumps,
8393 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8394 Otherwise, we start after this basic block. */
8395 if (val
.path_size
> 0)
8396 cse_basic_block (insn
, val
.last
, val
.path
, 0);
8399 int old_cse_jumps_altered
= cse_jumps_altered
;
8402 /* When cse changes a conditional jump to an unconditional
8403 jump, we want to reprocess the block, since it will give
8404 us a new branch path to investigate. */
8405 cse_jumps_altered
= 0;
8406 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
8407 if (cse_jumps_altered
== 0
8408 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8411 cse_jumps_altered
|= old_cse_jumps_altered
;
8419 /* Tell refers_to_mem_p that qty_const info is not available. */
8422 if (max_elements_made
< n_elements_made
)
8423 max_elements_made
= n_elements_made
;
8425 return cse_jumps_altered
|| recorded_label_ref
;
8428 /* Process a single basic block. FROM and TO and the limits of the basic
8429 block. NEXT_BRANCH points to the branch path when following jumps or
8430 a null path when not following jumps.
8432 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8433 loop. This is true when we are being called for the last time on a
8434 block and this CSE pass is before loop.c. */
8437 cse_basic_block (from
, to
, next_branch
, around_loop
)
8438 register rtx from
, to
;
8439 struct branch_path
*next_branch
;
8444 int in_libcall_block
= 0;
8447 /* Each of these arrays is undefined before max_reg, so only allocate
8448 the space actually needed and adjust the start below. */
8450 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8451 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8452 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
8453 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8454 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8456 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
8457 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
8458 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
8460 qty_first_reg
-= max_reg
;
8461 qty_last_reg
-= max_reg
;
8462 qty_mode
-= max_reg
;
8463 qty_const
-= max_reg
;
8464 qty_const_insn
-= max_reg
;
8465 qty_comparison_code
-= max_reg
;
8466 qty_comparison_qty
-= max_reg
;
8467 qty_comparison_const
-= max_reg
;
8471 /* TO might be a label. If so, protect it from being deleted. */
8472 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8475 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
8477 register enum rtx_code code
;
8479 struct table_elt
*p
, *next
;
8481 /* If we have processed 1,000 insns, flush the hash table to avoid
8482 extreme quadratic behavior.
8484 ??? This is a real kludge and needs to be done some other way.
8486 if (num_insns
++ > 1000)
8488 for (i
= 0; i
< NBUCKETS
; i
++)
8489 for (p
= table
[i
]; p
; p
= next
)
8491 next
= p
->next_same_hash
;
8493 if (GET_CODE (p
->exp
) == REG
)
8494 invalidate (p
->exp
, p
->mode
);
8496 remove_from_table (p
, i
);
8502 /* See if this is a branch that is part of the path. If so, and it is
8503 to be taken, do so. */
8504 if (next_branch
->branch
== insn
)
8506 enum taken status
= next_branch
++->status
;
8507 if (status
!= NOT_TAKEN
)
8509 if (status
== TAKEN
)
8510 record_jump_equiv (insn
, 1);
8512 invalidate_skipped_block (NEXT_INSN (insn
));
8514 /* Set the last insn as the jump insn; it doesn't affect cc0.
8515 Then follow this branch. */
8520 insn
= JUMP_LABEL (insn
);
8525 code
= GET_CODE (insn
);
8526 if (GET_MODE (insn
) == QImode
)
8527 PUT_MODE (insn
, VOIDmode
);
8529 if (GET_RTX_CLASS (code
) == 'i')
8531 /* Process notes first so we have all notes in canonical forms when
8532 looking for duplicate operations. */
8534 if (REG_NOTES (insn
))
8535 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
8537 /* Track when we are inside in LIBCALL block. Inside such a block,
8538 we do not want to record destinations. The last insn of a
8539 LIBCALL block is not considered to be part of the block, since
8540 its destination is the result of the block and hence should be
8543 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
8544 in_libcall_block
= 1;
8545 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8546 in_libcall_block
= 0;
8548 cse_insn (insn
, in_libcall_block
);
8551 /* If INSN is now an unconditional jump, skip to the end of our
8552 basic block by pretending that we just did the last insn in the
8553 basic block. If we are jumping to the end of our block, show
8554 that we can have one usage of TO. */
8556 if (simplejump_p (insn
))
8561 if (JUMP_LABEL (insn
) == to
)
8564 /* Maybe TO was deleted because the jump is unconditional.
8565 If so, there is nothing left in this basic block. */
8566 /* ??? Perhaps it would be smarter to set TO
8567 to whatever follows this insn,
8568 and pretend the basic block had always ended here. */
8569 if (INSN_DELETED_P (to
))
8572 insn
= PREV_INSN (to
);
8575 /* See if it is ok to keep on going past the label
8576 which used to end our basic block. Remember that we incremented
8577 the count of that label, so we decrement it here. If we made
8578 a jump unconditional, TO_USAGE will be one; in that case, we don't
8579 want to count the use in that jump. */
8581 if (to
!= 0 && NEXT_INSN (insn
) == to
8582 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
8584 struct cse_basic_block_data val
;
8587 insn
= NEXT_INSN (to
);
8589 if (LABEL_NUSES (to
) == 0)
8590 insn
= delete_insn (to
);
8592 /* If TO was the last insn in the function, we are done. */
8596 /* If TO was preceded by a BARRIER we are done with this block
8597 because it has no continuation. */
8598 prev
= prev_nonnote_insn (to
);
8599 if (prev
&& GET_CODE (prev
) == BARRIER
)
8602 /* Find the end of the following block. Note that we won't be
8603 following branches in this case. */
8606 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
8608 /* If the tables we allocated have enough space left
8609 to handle all the SETs in the next basic block,
8610 continue through it. Otherwise, return,
8611 and that block will be scanned individually. */
8612 if (val
.nsets
* 2 + next_qty
> max_qty
)
8615 cse_basic_block_start
= val
.low_cuid
;
8616 cse_basic_block_end
= val
.high_cuid
;
8619 /* Prevent TO from being deleted if it is a label. */
8620 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8623 /* Back up so we process the first insn in the extension. */
8624 insn
= PREV_INSN (insn
);
8628 if (next_qty
> max_qty
)
8631 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8632 the previous insn is the only insn that branches to the head of a loop,
8633 we can cse into the loop. Don't do this if we changed the jump
8634 structure of a loop unless we aren't going to be following jumps. */
8636 if ((cse_jumps_altered
== 0
8637 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8638 && around_loop
&& to
!= 0
8639 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8640 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8641 && JUMP_LABEL (PREV_INSN (to
)) != 0
8642 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8643 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8645 return to
? NEXT_INSN (to
) : 0;
8648 /* Count the number of times registers are used (not set) in X.
8649 COUNTS is an array in which we accumulate the count, INCR is how much
8650 we count each register usage.
8652 Don't count a usage of DEST, which is the SET_DEST of a SET which
8653 contains X in its SET_SRC. This is because such a SET does not
8654 modify the liveness of DEST. */
8657 count_reg_usage (x
, counts
, dest
, incr
)
8670 switch (code
= GET_CODE (x
))
8674 counts
[REGNO (x
)] += incr
;
8688 /* Unless we are setting a REG, count everything in SET_DEST. */
8689 if (GET_CODE (SET_DEST (x
)) != REG
)
8690 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
8692 /* If SRC has side-effects, then we can't delete this insn, so the
8693 usage of SET_DEST inside SRC counts.
8695 ??? Strictly-speaking, we might be preserving this insn
8696 because some other SET has side-effects, but that's hard
8697 to do and can't happen now. */
8698 count_reg_usage (SET_SRC (x
), counts
,
8699 side_effects_p (SET_SRC (x
)) ? NULL_RTX
: SET_DEST (x
),
8704 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, NULL_RTX
, incr
);
8706 /* ... falls through ... */
8709 count_reg_usage (PATTERN (x
), counts
, NULL_RTX
, incr
);
8711 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8714 count_reg_usage (REG_NOTES (x
), counts
, NULL_RTX
, incr
);
8719 if (REG_NOTE_KIND (x
) == REG_EQUAL
8720 || GET_CODE (XEXP (x
,0)) == USE
)
8721 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
8722 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
8729 fmt
= GET_RTX_FORMAT (code
);
8730 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8733 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
8734 else if (fmt
[i
] == 'E')
8735 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8736 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
8740 /* Scan all the insns and delete any that are dead; i.e., they store a register
8741 that is never used or they copy a register to itself.
8743 This is used to remove insns made obviously dead by cse. It improves the
8744 heuristics in loop since it won't try to move dead invariants out of loops
8745 or make givs for dead quantities. The remaining passes of the compilation
8746 are also sped up. */
8749 delete_dead_from_cse (insns
, nreg
)
8753 int *counts
= (int *) alloca (nreg
* sizeof (int));
8757 int in_libcall
= 0, dead_libcall
= 0;
8759 /* First count the number of times each register is used. */
8760 bzero ((char *) counts
, sizeof (int) * nreg
);
8761 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8762 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
8764 /* Go from the last insn to the first and delete insns that only set unused
8765 registers or copy a register to itself. As we delete an insn, remove
8766 usage counts for registers it uses. */
8767 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8772 prev
= prev_real_insn (insn
);
8774 /* Don't delete any insns that are part of a libcall block unless
8775 we can delete the whole libcall block.
8777 Flow or loop might get confused if we did that. Remember
8778 that we are scanning backwards. */
8779 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8785 /* See if there's a REG_EQUAL note on this insn and try to
8786 replace the source with the REG_EQUAL expression.
8788 We assume that insns with REG_RETVALs can only be reg->reg
8789 copies at this point. */
8790 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
8793 rtx set
= single_set (insn
);
8795 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
8798 find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
8803 else if (in_libcall
)
8804 live_insn
= ! dead_libcall
;
8805 else if (GET_CODE (PATTERN (insn
)) == SET
)
8807 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8808 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8812 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8813 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8814 && ((tem
= next_nonnote_insn (insn
)) == 0
8815 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8816 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8819 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8820 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8821 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8822 || side_effects_p (SET_SRC (PATTERN (insn
))))
8825 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8826 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8828 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8830 if (GET_CODE (elt
) == SET
)
8832 if (GET_CODE (SET_DEST (elt
)) == REG
8833 && SET_DEST (elt
) == SET_SRC (elt
))
8837 else if (GET_CODE (SET_DEST (elt
)) == CC0
8838 && ! side_effects_p (SET_SRC (elt
))
8839 && ((tem
= next_nonnote_insn (insn
)) == 0
8840 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8841 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8844 else if (GET_CODE (SET_DEST (elt
)) != REG
8845 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8846 || counts
[REGNO (SET_DEST (elt
))] != 0
8847 || side_effects_p (SET_SRC (elt
)))
8850 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8856 /* If this is a dead insn, delete it and show registers in it aren't
8861 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
8865 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))