PR target/60504
[official-gcc.git] / gcc / ira-int.h
blobe36bb9217d9fada2ed3e1203732a0799cbc6b70a
1 /* Integrated Register Allocator (IRA) intercommunication header file.
2 Copyright (C) 2006-2014 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #include "cfgloop.h"
22 #include "ira.h"
23 #include "alloc-pool.h"
25 /* To provide consistency in naming, all IRA external variables,
26 functions, common typedefs start with prefix ira_. */
28 #ifdef ENABLE_CHECKING
29 #define ENABLE_IRA_CHECKING
30 #endif
32 #ifdef ENABLE_IRA_CHECKING
33 #define ira_assert(c) gcc_assert (c)
34 #else
35 /* Always define and include C, so that warnings for empty body in an
36 'if' statement and unused variable do not occur. */
37 #define ira_assert(c) ((void)(0 && (c)))
38 #endif
40 /* Compute register frequency from edge frequency FREQ. It is
41 analogous to REG_FREQ_FROM_BB. When optimizing for size, or
42 profile driven feedback is available and the function is never
43 executed, frequency is always equivalent. Otherwise rescale the
44 edge frequency. */
45 #define REG_FREQ_FROM_EDGE_FREQ(freq) \
46 (optimize_size || (flag_branch_probabilities \
47 && !ENTRY_BLOCK_PTR_FOR_FN (cfun)->count) \
48 ? REG_FREQ_MAX : (freq * REG_FREQ_MAX / BB_FREQ_MAX) \
49 ? (freq * REG_FREQ_MAX / BB_FREQ_MAX) : 1)
51 /* A modified value of flag `-fira-verbose' used internally. */
52 extern int internal_flag_ira_verbose;
54 /* Dump file of the allocator if it is not NULL. */
55 extern FILE *ira_dump_file;
57 /* Typedefs for pointers to allocno live range, allocno, and copy of
58 allocnos. */
59 typedef struct live_range *live_range_t;
60 typedef struct ira_allocno *ira_allocno_t;
61 typedef struct ira_allocno_pref *ira_pref_t;
62 typedef struct ira_allocno_copy *ira_copy_t;
63 typedef struct ira_object *ira_object_t;
65 /* Definition of vector of allocnos and copies. */
67 /* Typedef for pointer to the subsequent structure. */
68 typedef struct ira_loop_tree_node *ira_loop_tree_node_t;
70 typedef unsigned short move_table[N_REG_CLASSES];
72 /* In general case, IRA is a regional allocator. The regions are
73 nested and form a tree. Currently regions are natural loops. The
74 following structure describes loop tree node (representing basic
75 block or loop). We need such tree because the loop tree from
76 cfgloop.h is not convenient for the optimization: basic blocks are
77 not a part of the tree from cfgloop.h. We also use the nodes for
78 storing additional information about basic blocks/loops for the
79 register allocation purposes. */
80 struct ira_loop_tree_node
82 /* The node represents basic block if children == NULL. */
83 basic_block bb; /* NULL for loop. */
84 /* NULL for BB or for loop tree root if we did not build CFG loop tree. */
85 struct loop *loop;
86 /* NEXT/SUBLOOP_NEXT is the next node/loop-node of the same parent.
87 SUBLOOP_NEXT is always NULL for BBs. */
88 ira_loop_tree_node_t subloop_next, next;
89 /* CHILDREN/SUBLOOPS is the first node/loop-node immediately inside
90 the node. They are NULL for BBs. */
91 ira_loop_tree_node_t subloops, children;
92 /* The node immediately containing given node. */
93 ira_loop_tree_node_t parent;
95 /* Loop level in range [0, ira_loop_tree_height). */
96 int level;
98 /* All the following members are defined only for nodes representing
99 loops. */
101 /* The loop number from CFG loop tree. The root number is 0. */
102 int loop_num;
104 /* True if the loop was marked for removal from the register
105 allocation. */
106 bool to_remove_p;
108 /* Allocnos in the loop corresponding to their regnos. If it is
109 NULL the loop does not form a separate register allocation region
110 (e.g. because it has abnormal enter/exit edges and we can not put
111 code for register shuffling on the edges if a different
112 allocation is used for a pseudo-register on different sides of
113 the edges). Caps are not in the map (remember we can have more
114 one cap with the same regno in a region). */
115 ira_allocno_t *regno_allocno_map;
117 /* True if there is an entry to given loop not from its parent (or
118 grandparent) basic block. For example, it is possible for two
119 adjacent loops inside another loop. */
120 bool entered_from_non_parent_p;
122 /* Maximal register pressure inside loop for given register class
123 (defined only for the pressure classes). */
124 int reg_pressure[N_REG_CLASSES];
126 /* Numbers of allocnos referred or living in the loop node (except
127 for its subloops). */
128 bitmap all_allocnos;
130 /* Numbers of allocnos living at the loop borders. */
131 bitmap border_allocnos;
133 /* Regnos of pseudos modified in the loop node (including its
134 subloops). */
135 bitmap modified_regnos;
137 /* Numbers of copies referred in the corresponding loop. */
138 bitmap local_copies;
141 /* The root of the loop tree corresponding to the all function. */
142 extern ira_loop_tree_node_t ira_loop_tree_root;
144 /* Height of the loop tree. */
145 extern int ira_loop_tree_height;
147 /* All nodes representing basic blocks are referred through the
148 following array. We can not use basic block member `aux' for this
149 because it is used for insertion of insns on edges. */
150 extern ira_loop_tree_node_t ira_bb_nodes;
152 /* Two access macros to the nodes representing basic blocks. */
153 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
154 #define IRA_BB_NODE_BY_INDEX(index) __extension__ \
155 (({ ira_loop_tree_node_t _node = (&ira_bb_nodes[index]); \
156 if (_node->children != NULL || _node->loop != NULL || _node->bb == NULL)\
158 fprintf (stderr, \
159 "\n%s: %d: error in %s: it is not a block node\n", \
160 __FILE__, __LINE__, __FUNCTION__); \
161 gcc_unreachable (); \
163 _node; }))
164 #else
165 #define IRA_BB_NODE_BY_INDEX(index) (&ira_bb_nodes[index])
166 #endif
168 #define IRA_BB_NODE(bb) IRA_BB_NODE_BY_INDEX ((bb)->index)
170 /* All nodes representing loops are referred through the following
171 array. */
172 extern ira_loop_tree_node_t ira_loop_nodes;
174 /* Two access macros to the nodes representing loops. */
175 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
176 #define IRA_LOOP_NODE_BY_INDEX(index) __extension__ \
177 (({ ira_loop_tree_node_t const _node = (&ira_loop_nodes[index]); \
178 if (_node->children == NULL || _node->bb != NULL \
179 || (_node->loop == NULL && current_loops != NULL)) \
181 fprintf (stderr, \
182 "\n%s: %d: error in %s: it is not a loop node\n", \
183 __FILE__, __LINE__, __FUNCTION__); \
184 gcc_unreachable (); \
186 _node; }))
187 #else
188 #define IRA_LOOP_NODE_BY_INDEX(index) (&ira_loop_nodes[index])
189 #endif
191 #define IRA_LOOP_NODE(loop) IRA_LOOP_NODE_BY_INDEX ((loop)->num)
194 /* The structure describes program points where a given allocno lives.
195 If the live ranges of two allocnos are intersected, the allocnos
196 are in conflict. */
197 struct live_range
199 /* Object whose live range is described by given structure. */
200 ira_object_t object;
201 /* Program point range. */
202 int start, finish;
203 /* Next structure describing program points where the allocno
204 lives. */
205 live_range_t next;
206 /* Pointer to structures with the same start/finish. */
207 live_range_t start_next, finish_next;
210 /* Program points are enumerated by numbers from range
211 0..IRA_MAX_POINT-1. There are approximately two times more program
212 points than insns. Program points are places in the program where
213 liveness info can be changed. In most general case (there are more
214 complicated cases too) some program points correspond to places
215 where input operand dies and other ones correspond to places where
216 output operands are born. */
217 extern int ira_max_point;
219 /* Arrays of size IRA_MAX_POINT mapping a program point to the allocno
220 live ranges with given start/finish point. */
221 extern live_range_t *ira_start_point_ranges, *ira_finish_point_ranges;
223 /* A structure representing conflict information for an allocno
224 (or one of its subwords). */
225 struct ira_object
227 /* The allocno associated with this record. */
228 ira_allocno_t allocno;
229 /* Vector of accumulated conflicting conflict_redords with NULL end
230 marker (if OBJECT_CONFLICT_VEC_P is true) or conflict bit vector
231 otherwise. */
232 void *conflicts_array;
233 /* Pointer to structures describing at what program point the
234 object lives. We always maintain the list in such way that *the
235 ranges in the list are not intersected and ordered by decreasing
236 their program points*. */
237 live_range_t live_ranges;
238 /* The subword within ALLOCNO which is represented by this object.
239 Zero means the lowest-order subword (or the entire allocno in case
240 it is not being tracked in subwords). */
241 int subword;
242 /* Allocated size of the conflicts array. */
243 unsigned int conflicts_array_size;
244 /* A unique number for every instance of this structure, which is used
245 to represent it in conflict bit vectors. */
246 int id;
247 /* Before building conflicts, MIN and MAX are initialized to
248 correspondingly minimal and maximal points of the accumulated
249 live ranges. Afterwards, they hold the minimal and maximal ids
250 of other ira_objects that this one can conflict with. */
251 int min, max;
252 /* Initial and accumulated hard registers conflicting with this
253 object and as a consequences can not be assigned to the allocno.
254 All non-allocatable hard regs and hard regs of register classes
255 different from given allocno one are included in the sets. */
256 HARD_REG_SET conflict_hard_regs, total_conflict_hard_regs;
257 /* Number of accumulated conflicts in the vector of conflicting
258 objects. */
259 int num_accumulated_conflicts;
260 /* TRUE if conflicts are represented by a vector of pointers to
261 ira_object structures. Otherwise, we use a bit vector indexed
262 by conflict ID numbers. */
263 unsigned int conflict_vec_p : 1;
266 /* A structure representing an allocno (allocation entity). Allocno
267 represents a pseudo-register in an allocation region. If
268 pseudo-register does not live in a region but it lives in the
269 nested regions, it is represented in the region by special allocno
270 called *cap*. There may be more one cap representing the same
271 pseudo-register in region. It means that the corresponding
272 pseudo-register lives in more one non-intersected subregion. */
273 struct ira_allocno
275 /* The allocno order number starting with 0. Each allocno has an
276 unique number and the number is never changed for the
277 allocno. */
278 int num;
279 /* Regno for allocno or cap. */
280 int regno;
281 /* Mode of the allocno which is the mode of the corresponding
282 pseudo-register. */
283 ENUM_BITFIELD (machine_mode) mode : 8;
284 /* Register class which should be used for allocation for given
285 allocno. NO_REGS means that we should use memory. */
286 ENUM_BITFIELD (reg_class) aclass : 16;
287 /* During the reload, value TRUE means that we should not reassign a
288 hard register to the allocno got memory earlier. It is set up
289 when we removed memory-memory move insn before each iteration of
290 the reload. */
291 unsigned int dont_reassign_p : 1;
292 #ifdef STACK_REGS
293 /* Set to TRUE if allocno can't be assigned to the stack hard
294 register correspondingly in this region and area including the
295 region and all its subregions recursively. */
296 unsigned int no_stack_reg_p : 1, total_no_stack_reg_p : 1;
297 #endif
298 /* TRUE value means that there is no sense to spill the allocno
299 during coloring because the spill will result in additional
300 reloads in reload pass. */
301 unsigned int bad_spill_p : 1;
302 /* TRUE if a hard register or memory has been assigned to the
303 allocno. */
304 unsigned int assigned_p : 1;
305 /* TRUE if conflicts for given allocno are represented by vector of
306 pointers to the conflicting allocnos. Otherwise, we use a bit
307 vector where a bit with given index represents allocno with the
308 same number. */
309 unsigned int conflict_vec_p : 1;
310 /* Hard register assigned to given allocno. Negative value means
311 that memory was allocated to the allocno. During the reload,
312 spilled allocno has value equal to the corresponding stack slot
313 number (0, ...) - 2. Value -1 is used for allocnos spilled by the
314 reload (at this point pseudo-register has only one allocno) which
315 did not get stack slot yet. */
316 short int hard_regno;
317 /* Allocnos with the same regno are linked by the following member.
318 Allocnos corresponding to inner loops are first in the list (it
319 corresponds to depth-first traverse of the loops). */
320 ira_allocno_t next_regno_allocno;
321 /* There may be different allocnos with the same regno in different
322 regions. Allocnos are bound to the corresponding loop tree node.
323 Pseudo-register may have only one regular allocno with given loop
324 tree node but more than one cap (see comments above). */
325 ira_loop_tree_node_t loop_tree_node;
326 /* Accumulated usage references of the allocno. Here and below,
327 word 'accumulated' means info for given region and all nested
328 subregions. In this case, 'accumulated' means sum of references
329 of the corresponding pseudo-register in this region and in all
330 nested subregions recursively. */
331 int nrefs;
332 /* Accumulated frequency of usage of the allocno. */
333 int freq;
334 /* Minimal accumulated and updated costs of usage register of the
335 allocno class. */
336 int class_cost, updated_class_cost;
337 /* Minimal accumulated, and updated costs of memory for the allocno.
338 At the allocation start, the original and updated costs are
339 equal. The updated cost may be changed after finishing
340 allocation in a region and starting allocation in a subregion.
341 The change reflects the cost of spill/restore code on the
342 subregion border if we assign memory to the pseudo in the
343 subregion. */
344 int memory_cost, updated_memory_cost;
345 /* Accumulated number of points where the allocno lives and there is
346 excess pressure for its class. Excess pressure for a register
347 class at some point means that there are more allocnos of given
348 register class living at the point than number of hard-registers
349 of the class available for the allocation. */
350 int excess_pressure_points_num;
351 /* Allocno hard reg preferences. */
352 ira_pref_t allocno_prefs;
353 /* Copies to other non-conflicting allocnos. The copies can
354 represent move insn or potential move insn usually because of two
355 operand insn constraints. */
356 ira_copy_t allocno_copies;
357 /* It is a allocno (cap) representing given allocno on upper loop tree
358 level. */
359 ira_allocno_t cap;
360 /* It is a link to allocno (cap) on lower loop level represented by
361 given cap. Null if given allocno is not a cap. */
362 ira_allocno_t cap_member;
363 /* The number of objects tracked in the following array. */
364 int num_objects;
365 /* An array of structures describing conflict information and live
366 ranges for each object associated with the allocno. There may be
367 more than one such object in cases where the allocno represents a
368 multi-word register. */
369 ira_object_t objects[2];
370 /* Accumulated frequency of calls which given allocno
371 intersects. */
372 int call_freq;
373 /* Accumulated number of the intersected calls. */
374 int calls_crossed_num;
375 /* The number of calls across which it is live, but which should not
376 affect register preferences. */
377 int cheap_calls_crossed_num;
378 /* Array of usage costs (accumulated and the one updated during
379 coloring) for each hard register of the allocno class. The
380 member value can be NULL if all costs are the same and equal to
381 CLASS_COST. For example, the costs of two different hard
382 registers can be different if one hard register is callee-saved
383 and another one is callee-used and the allocno lives through
384 calls. Another example can be case when for some insn the
385 corresponding pseudo-register value should be put in specific
386 register class (e.g. AREG for x86) which is a strict subset of
387 the allocno class (GENERAL_REGS for x86). We have updated costs
388 to reflect the situation when the usage cost of a hard register
389 is decreased because the allocno is connected to another allocno
390 by a copy and the another allocno has been assigned to the hard
391 register. */
392 int *hard_reg_costs, *updated_hard_reg_costs;
393 /* Array of decreasing costs (accumulated and the one updated during
394 coloring) for allocnos conflicting with given allocno for hard
395 regno of the allocno class. The member value can be NULL if all
396 costs are the same. These costs are used to reflect preferences
397 of other allocnos not assigned yet during assigning to given
398 allocno. */
399 int *conflict_hard_reg_costs, *updated_conflict_hard_reg_costs;
400 /* Different additional data. It is used to decrease size of
401 allocno data footprint. */
402 void *add_data;
406 /* All members of the allocno structures should be accessed only
407 through the following macros. */
408 #define ALLOCNO_NUM(A) ((A)->num)
409 #define ALLOCNO_REGNO(A) ((A)->regno)
410 #define ALLOCNO_REG(A) ((A)->reg)
411 #define ALLOCNO_NEXT_REGNO_ALLOCNO(A) ((A)->next_regno_allocno)
412 #define ALLOCNO_LOOP_TREE_NODE(A) ((A)->loop_tree_node)
413 #define ALLOCNO_CAP(A) ((A)->cap)
414 #define ALLOCNO_CAP_MEMBER(A) ((A)->cap_member)
415 #define ALLOCNO_NREFS(A) ((A)->nrefs)
416 #define ALLOCNO_FREQ(A) ((A)->freq)
417 #define ALLOCNO_HARD_REGNO(A) ((A)->hard_regno)
418 #define ALLOCNO_CALL_FREQ(A) ((A)->call_freq)
419 #define ALLOCNO_CALLS_CROSSED_NUM(A) ((A)->calls_crossed_num)
420 #define ALLOCNO_CHEAP_CALLS_CROSSED_NUM(A) ((A)->cheap_calls_crossed_num)
421 #define ALLOCNO_MEM_OPTIMIZED_DEST(A) ((A)->mem_optimized_dest)
422 #define ALLOCNO_MEM_OPTIMIZED_DEST_P(A) ((A)->mem_optimized_dest_p)
423 #define ALLOCNO_SOMEWHERE_RENAMED_P(A) ((A)->somewhere_renamed_p)
424 #define ALLOCNO_CHILD_RENAMED_P(A) ((A)->child_renamed_p)
425 #define ALLOCNO_DONT_REASSIGN_P(A) ((A)->dont_reassign_p)
426 #ifdef STACK_REGS
427 #define ALLOCNO_NO_STACK_REG_P(A) ((A)->no_stack_reg_p)
428 #define ALLOCNO_TOTAL_NO_STACK_REG_P(A) ((A)->total_no_stack_reg_p)
429 #endif
430 #define ALLOCNO_BAD_SPILL_P(A) ((A)->bad_spill_p)
431 #define ALLOCNO_ASSIGNED_P(A) ((A)->assigned_p)
432 #define ALLOCNO_MODE(A) ((A)->mode)
433 #define ALLOCNO_PREFS(A) ((A)->allocno_prefs)
434 #define ALLOCNO_COPIES(A) ((A)->allocno_copies)
435 #define ALLOCNO_HARD_REG_COSTS(A) ((A)->hard_reg_costs)
436 #define ALLOCNO_UPDATED_HARD_REG_COSTS(A) ((A)->updated_hard_reg_costs)
437 #define ALLOCNO_CONFLICT_HARD_REG_COSTS(A) \
438 ((A)->conflict_hard_reg_costs)
439 #define ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS(A) \
440 ((A)->updated_conflict_hard_reg_costs)
441 #define ALLOCNO_CLASS(A) ((A)->aclass)
442 #define ALLOCNO_CLASS_COST(A) ((A)->class_cost)
443 #define ALLOCNO_UPDATED_CLASS_COST(A) ((A)->updated_class_cost)
444 #define ALLOCNO_MEMORY_COST(A) ((A)->memory_cost)
445 #define ALLOCNO_UPDATED_MEMORY_COST(A) ((A)->updated_memory_cost)
446 #define ALLOCNO_EXCESS_PRESSURE_POINTS_NUM(A) \
447 ((A)->excess_pressure_points_num)
448 #define ALLOCNO_OBJECT(A,N) ((A)->objects[N])
449 #define ALLOCNO_NUM_OBJECTS(A) ((A)->num_objects)
450 #define ALLOCNO_ADD_DATA(A) ((A)->add_data)
452 /* Typedef for pointer to the subsequent structure. */
453 typedef struct ira_emit_data *ira_emit_data_t;
455 /* Allocno bound data used for emit pseudo live range split insns and
456 to flattening IR. */
457 struct ira_emit_data
459 /* TRUE if the allocno assigned to memory was a destination of
460 removed move (see ira-emit.c) at loop exit because the value of
461 the corresponding pseudo-register is not changed inside the
462 loop. */
463 unsigned int mem_optimized_dest_p : 1;
464 /* TRUE if the corresponding pseudo-register has disjoint live
465 ranges and the other allocnos of the pseudo-register except this
466 one changed REG. */
467 unsigned int somewhere_renamed_p : 1;
468 /* TRUE if allocno with the same REGNO in a subregion has been
469 renamed, in other words, got a new pseudo-register. */
470 unsigned int child_renamed_p : 1;
471 /* Final rtx representation of the allocno. */
472 rtx reg;
473 /* Non NULL if we remove restoring value from given allocno to
474 MEM_OPTIMIZED_DEST at loop exit (see ira-emit.c) because the
475 allocno value is not changed inside the loop. */
476 ira_allocno_t mem_optimized_dest;
479 #define ALLOCNO_EMIT_DATA(a) ((ira_emit_data_t) ALLOCNO_ADD_DATA (a))
481 /* Data used to emit live range split insns and to flattening IR. */
482 extern ira_emit_data_t ira_allocno_emit_data;
484 /* Abbreviation for frequent emit data access. */
485 static inline rtx
486 allocno_emit_reg (ira_allocno_t a)
488 return ALLOCNO_EMIT_DATA (a)->reg;
491 #define OBJECT_ALLOCNO(O) ((O)->allocno)
492 #define OBJECT_SUBWORD(O) ((O)->subword)
493 #define OBJECT_CONFLICT_ARRAY(O) ((O)->conflicts_array)
494 #define OBJECT_CONFLICT_VEC(O) ((ira_object_t *)(O)->conflicts_array)
495 #define OBJECT_CONFLICT_BITVEC(O) ((IRA_INT_TYPE *)(O)->conflicts_array)
496 #define OBJECT_CONFLICT_ARRAY_SIZE(O) ((O)->conflicts_array_size)
497 #define OBJECT_CONFLICT_VEC_P(O) ((O)->conflict_vec_p)
498 #define OBJECT_NUM_CONFLICTS(O) ((O)->num_accumulated_conflicts)
499 #define OBJECT_CONFLICT_HARD_REGS(O) ((O)->conflict_hard_regs)
500 #define OBJECT_TOTAL_CONFLICT_HARD_REGS(O) ((O)->total_conflict_hard_regs)
501 #define OBJECT_MIN(O) ((O)->min)
502 #define OBJECT_MAX(O) ((O)->max)
503 #define OBJECT_CONFLICT_ID(O) ((O)->id)
504 #define OBJECT_LIVE_RANGES(O) ((O)->live_ranges)
506 /* Map regno -> allocnos with given regno (see comments for
507 allocno member `next_regno_allocno'). */
508 extern ira_allocno_t *ira_regno_allocno_map;
510 /* Array of references to all allocnos. The order number of the
511 allocno corresponds to the index in the array. Removed allocnos
512 have NULL element value. */
513 extern ira_allocno_t *ira_allocnos;
515 /* The size of the previous array. */
516 extern int ira_allocnos_num;
518 /* Map a conflict id to its corresponding ira_object structure. */
519 extern ira_object_t *ira_object_id_map;
521 /* The size of the previous array. */
522 extern int ira_objects_num;
524 /* The following structure represents a hard register prefererence of
525 allocno. The preference represent move insns or potential move
526 insns usually because of two operand insn constraints. One move
527 operand is a hard register. */
528 struct ira_allocno_pref
530 /* The unique order number of the preference node starting with 0. */
531 int num;
532 /* Preferred hard register. */
533 int hard_regno;
534 /* Accumulated execution frequency of insns from which the
535 preference created. */
536 int freq;
537 /* Given allocno. */
538 ira_allocno_t allocno;
539 /* All prefernces with the same allocno are linked by the following
540 member. */
541 ira_pref_t next_pref;
544 /* Array of references to all allocno preferences. The order number
545 of the preference corresponds to the index in the array. */
546 extern ira_pref_t *ira_prefs;
548 /* Size of the previous array. */
549 extern int ira_prefs_num;
551 /* The following structure represents a copy of two allocnos. The
552 copies represent move insns or potential move insns usually because
553 of two operand insn constraints. To remove register shuffle, we
554 also create copies between allocno which is output of an insn and
555 allocno becoming dead in the insn. */
556 struct ira_allocno_copy
558 /* The unique order number of the copy node starting with 0. */
559 int num;
560 /* Allocnos connected by the copy. The first allocno should have
561 smaller order number than the second one. */
562 ira_allocno_t first, second;
563 /* Execution frequency of the copy. */
564 int freq;
565 bool constraint_p;
566 /* It is a move insn which is an origin of the copy. The member
567 value for the copy representing two operand insn constraints or
568 for the copy created to remove register shuffle is NULL. In last
569 case the copy frequency is smaller than the corresponding insn
570 execution frequency. */
571 rtx insn;
572 /* All copies with the same allocno as FIRST are linked by the two
573 following members. */
574 ira_copy_t prev_first_allocno_copy, next_first_allocno_copy;
575 /* All copies with the same allocno as SECOND are linked by the two
576 following members. */
577 ira_copy_t prev_second_allocno_copy, next_second_allocno_copy;
578 /* Region from which given copy is originated. */
579 ira_loop_tree_node_t loop_tree_node;
582 /* Array of references to all copies. The order number of the copy
583 corresponds to the index in the array. Removed copies have NULL
584 element value. */
585 extern ira_copy_t *ira_copies;
587 /* Size of the previous array. */
588 extern int ira_copies_num;
590 /* The following structure describes a stack slot used for spilled
591 pseudo-registers. */
592 struct ira_spilled_reg_stack_slot
594 /* pseudo-registers assigned to the stack slot. */
595 bitmap_head spilled_regs;
596 /* RTL representation of the stack slot. */
597 rtx mem;
598 /* Size of the stack slot. */
599 unsigned int width;
602 /* The number of elements in the following array. */
603 extern int ira_spilled_reg_stack_slots_num;
605 /* The following array contains info about spilled pseudo-registers
606 stack slots used in current function so far. */
607 extern struct ira_spilled_reg_stack_slot *ira_spilled_reg_stack_slots;
609 /* Correspondingly overall cost of the allocation, cost of the
610 allocnos assigned to hard-registers, cost of the allocnos assigned
611 to memory, cost of loads, stores and register move insns generated
612 for pseudo-register live range splitting (see ira-emit.c). */
613 extern int ira_overall_cost;
614 extern int ira_reg_cost, ira_mem_cost;
615 extern int ira_load_cost, ira_store_cost, ira_shuffle_cost;
616 extern int ira_move_loops_num, ira_additional_jumps_num;
619 /* This page contains a bitset implementation called 'min/max sets' used to
620 record conflicts in IRA.
621 They are named min/maxs set since we keep track of a minimum and a maximum
622 bit number for each set representing the bounds of valid elements. Otherwise,
623 the implementation resembles sbitmaps in that we store an array of integers
624 whose bits directly represent the members of the set. */
626 /* The type used as elements in the array, and the number of bits in
627 this type. */
629 #define IRA_INT_BITS HOST_BITS_PER_WIDE_INT
630 #define IRA_INT_TYPE HOST_WIDE_INT
632 /* Set, clear or test bit number I in R, a bit vector of elements with
633 minimal index and maximal index equal correspondingly to MIN and
634 MAX. */
635 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
637 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
638 (({ int _min = (MIN), _max = (MAX), _i = (I); \
639 if (_i < _min || _i > _max) \
641 fprintf (stderr, \
642 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
643 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
644 gcc_unreachable (); \
646 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
647 |= ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
650 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
651 (({ int _min = (MIN), _max = (MAX), _i = (I); \
652 if (_i < _min || _i > _max) \
654 fprintf (stderr, \
655 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
656 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
657 gcc_unreachable (); \
659 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
660 &= ~((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
662 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
663 (({ int _min = (MIN), _max = (MAX), _i = (I); \
664 if (_i < _min || _i > _max) \
666 fprintf (stderr, \
667 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
668 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
669 gcc_unreachable (); \
671 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
672 & ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
674 #else
676 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) \
677 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
678 |= ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
680 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) \
681 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
682 &= ~((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
684 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) \
685 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
686 & ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
688 #endif
690 /* The iterator for min/max sets. */
691 struct minmax_set_iterator {
693 /* Array containing the bit vector. */
694 IRA_INT_TYPE *vec;
696 /* The number of the current element in the vector. */
697 unsigned int word_num;
699 /* The number of bits in the bit vector. */
700 unsigned int nel;
702 /* The current bit index of the bit vector. */
703 unsigned int bit_num;
705 /* Index corresponding to the 1st bit of the bit vector. */
706 int start_val;
708 /* The word of the bit vector currently visited. */
709 unsigned IRA_INT_TYPE word;
712 /* Initialize the iterator I for bit vector VEC containing minimal and
713 maximal values MIN and MAX. */
714 static inline void
715 minmax_set_iter_init (minmax_set_iterator *i, IRA_INT_TYPE *vec, int min,
716 int max)
718 i->vec = vec;
719 i->word_num = 0;
720 i->nel = max < min ? 0 : max - min + 1;
721 i->start_val = min;
722 i->bit_num = 0;
723 i->word = i->nel == 0 ? 0 : vec[0];
726 /* Return TRUE if we have more allocnos to visit, in which case *N is
727 set to the number of the element to be visited. Otherwise, return
728 FALSE. */
729 static inline bool
730 minmax_set_iter_cond (minmax_set_iterator *i, int *n)
732 /* Skip words that are zeros. */
733 for (; i->word == 0; i->word = i->vec[i->word_num])
735 i->word_num++;
736 i->bit_num = i->word_num * IRA_INT_BITS;
738 /* If we have reached the end, break. */
739 if (i->bit_num >= i->nel)
740 return false;
743 /* Skip bits that are zero. */
744 for (; (i->word & 1) == 0; i->word >>= 1)
745 i->bit_num++;
747 *n = (int) i->bit_num + i->start_val;
749 return true;
752 /* Advance to the next element in the set. */
753 static inline void
754 minmax_set_iter_next (minmax_set_iterator *i)
756 i->word >>= 1;
757 i->bit_num++;
760 /* Loop over all elements of a min/max set given by bit vector VEC and
761 their minimal and maximal values MIN and MAX. In each iteration, N
762 is set to the number of next allocno. ITER is an instance of
763 minmax_set_iterator used to iterate over the set. */
764 #define FOR_EACH_BIT_IN_MINMAX_SET(VEC, MIN, MAX, N, ITER) \
765 for (minmax_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \
766 minmax_set_iter_cond (&(ITER), &(N)); \
767 minmax_set_iter_next (&(ITER)))
769 struct target_ira_int {
770 /* Initialized once. It is a maximal possible size of the allocated
771 struct costs. */
772 int x_max_struct_costs_size;
774 /* Allocated and initialized once, and used to initialize cost values
775 for each insn. */
776 struct costs *x_init_cost;
778 /* Allocated once, and used for temporary purposes. */
779 struct costs *x_temp_costs;
781 /* Allocated once, and used for the cost calculation. */
782 struct costs *x_op_costs[MAX_RECOG_OPERANDS];
783 struct costs *x_this_op_costs[MAX_RECOG_OPERANDS];
785 /* Hard registers that can not be used for the register allocator for
786 all functions of the current compilation unit. */
787 HARD_REG_SET x_no_unit_alloc_regs;
789 /* Map: hard regs X modes -> set of hard registers for storing value
790 of given mode starting with given hard register. */
791 HARD_REG_SET (x_ira_reg_mode_hard_regset
792 [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]);
794 /* Maximum cost of moving from a register in one class to a register
795 in another class. Based on TARGET_REGISTER_MOVE_COST. */
796 move_table *x_ira_register_move_cost[MAX_MACHINE_MODE];
798 /* Similar, but here we don't have to move if the first index is a
799 subset of the second so in that case the cost is zero. */
800 move_table *x_ira_may_move_in_cost[MAX_MACHINE_MODE];
802 /* Similar, but here we don't have to move if the first index is a
803 superset of the second so in that case the cost is zero. */
804 move_table *x_ira_may_move_out_cost[MAX_MACHINE_MODE];
806 /* Keep track of the last mode we initialized move costs for. */
807 int x_last_mode_for_init_move_cost;
809 /* Array analog of the macro MEMORY_MOVE_COST but they contain maximal
810 cost not minimal. */
811 short int x_ira_max_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
813 /* Map class->true if class is a possible allocno class, false
814 otherwise. */
815 bool x_ira_reg_allocno_class_p[N_REG_CLASSES];
817 /* Map class->true if class is a pressure class, false otherwise. */
818 bool x_ira_reg_pressure_class_p[N_REG_CLASSES];
820 /* Array of the number of hard registers of given class which are
821 available for allocation. The order is defined by the hard
822 register numbers. */
823 short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
825 /* Index (in ira_class_hard_regs; for given register class and hard
826 register (in general case a hard register can belong to several
827 register classes;. The index is negative for hard registers
828 unavailable for the allocation. */
829 short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
831 /* Array whose values are hard regset of hard registers available for
832 the allocation of given register class whose HARD_REGNO_MODE_OK
833 values for given mode are zero. */
834 HARD_REG_SET x_ira_prohibited_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
836 /* Index [CL][M] contains R if R appears somewhere in a register of the form:
838 (reg:M R'), R' not in x_ira_prohibited_class_mode_regs[CL][M]
840 For example, if:
842 - (reg:M 2) is valid and occupies two registers;
843 - register 2 belongs to CL; and
844 - register 3 belongs to the same pressure class as CL
846 then (reg:M 2) contributes to [CL][M] and registers 2 and 3 will be
847 in the set. */
848 HARD_REG_SET x_ira_useful_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
850 /* The value is number of elements in the subsequent array. */
851 int x_ira_important_classes_num;
853 /* The array containing all non-empty classes. Such classes is
854 important for calculation of the hard register usage costs. */
855 enum reg_class x_ira_important_classes[N_REG_CLASSES];
857 /* The array containing indexes of important classes in the previous
858 array. The array elements are defined only for important
859 classes. */
860 int x_ira_important_class_nums[N_REG_CLASSES];
862 /* Map class->true if class is an uniform class, false otherwise. */
863 bool x_ira_uniform_class_p[N_REG_CLASSES];
865 /* The biggest important class inside of intersection of the two
866 classes (that is calculated taking only hard registers available
867 for allocation into account;. If the both classes contain no hard
868 registers available for allocation, the value is calculated with
869 taking all hard-registers including fixed ones into account. */
870 enum reg_class x_ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES];
872 /* Classes with end marker LIM_REG_CLASSES which are intersected with
873 given class (the first index). That includes given class itself.
874 This is calculated taking only hard registers available for
875 allocation into account. */
876 enum reg_class x_ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES];
878 /* The biggest (smallest) important class inside of (covering) union
879 of the two classes (that is calculated taking only hard registers
880 available for allocation into account). If the both classes
881 contain no hard registers available for allocation, the value is
882 calculated with taking all hard-registers including fixed ones
883 into account. In other words, the value is the corresponding
884 reg_class_subunion (reg_class_superunion) value. */
885 enum reg_class x_ira_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
886 enum reg_class x_ira_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
888 /* For each reg class, table listing all the classes contained in it
889 (excluding the class itself. Non-allocatable registers are
890 excluded from the consideration). */
891 enum reg_class x_alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
893 /* Array whose values are hard regset of hard registers for which
894 move of the hard register in given mode into itself is
895 prohibited. */
896 HARD_REG_SET x_ira_prohibited_mode_move_regs[NUM_MACHINE_MODES];
898 /* Flag of that the above array has been initialized. */
899 bool x_ira_prohibited_mode_move_regs_initialized_p;
902 extern struct target_ira_int default_target_ira_int;
903 #if SWITCHABLE_TARGET
904 extern struct target_ira_int *this_target_ira_int;
905 #else
906 #define this_target_ira_int (&default_target_ira_int)
907 #endif
909 #define ira_reg_mode_hard_regset \
910 (this_target_ira_int->x_ira_reg_mode_hard_regset)
911 #define ira_register_move_cost \
912 (this_target_ira_int->x_ira_register_move_cost)
913 #define ira_max_memory_move_cost \
914 (this_target_ira_int->x_ira_max_memory_move_cost)
915 #define ira_may_move_in_cost \
916 (this_target_ira_int->x_ira_may_move_in_cost)
917 #define ira_may_move_out_cost \
918 (this_target_ira_int->x_ira_may_move_out_cost)
919 #define ira_reg_allocno_class_p \
920 (this_target_ira_int->x_ira_reg_allocno_class_p)
921 #define ira_reg_pressure_class_p \
922 (this_target_ira_int->x_ira_reg_pressure_class_p)
923 #define ira_non_ordered_class_hard_regs \
924 (this_target_ira_int->x_ira_non_ordered_class_hard_regs)
925 #define ira_class_hard_reg_index \
926 (this_target_ira_int->x_ira_class_hard_reg_index)
927 #define ira_prohibited_class_mode_regs \
928 (this_target_ira_int->x_ira_prohibited_class_mode_regs)
929 #define ira_useful_class_mode_regs \
930 (this_target_ira_int->x_ira_useful_class_mode_regs)
931 #define ira_important_classes_num \
932 (this_target_ira_int->x_ira_important_classes_num)
933 #define ira_important_classes \
934 (this_target_ira_int->x_ira_important_classes)
935 #define ira_important_class_nums \
936 (this_target_ira_int->x_ira_important_class_nums)
937 #define ira_uniform_class_p \
938 (this_target_ira_int->x_ira_uniform_class_p)
939 #define ira_reg_class_intersect \
940 (this_target_ira_int->x_ira_reg_class_intersect)
941 #define ira_reg_class_super_classes \
942 (this_target_ira_int->x_ira_reg_class_super_classes)
943 #define ira_reg_class_subunion \
944 (this_target_ira_int->x_ira_reg_class_subunion)
945 #define ira_reg_class_superunion \
946 (this_target_ira_int->x_ira_reg_class_superunion)
947 #define ira_prohibited_mode_move_regs \
948 (this_target_ira_int->x_ira_prohibited_mode_move_regs)
950 /* ira.c: */
952 extern void *ira_allocate (size_t);
953 extern void ira_free (void *addr);
954 extern bitmap ira_allocate_bitmap (void);
955 extern void ira_free_bitmap (bitmap);
956 extern void ira_print_disposition (FILE *);
957 extern void ira_debug_disposition (void);
958 extern void ira_debug_allocno_classes (void);
959 extern void ira_init_register_move_cost (enum machine_mode);
960 extern void ira_setup_alts (rtx insn, HARD_REG_SET &alts);
961 extern int ira_get_dup_out_num (int op_num, HARD_REG_SET &alts);
963 /* ira-build.c */
965 /* The current loop tree node and its regno allocno map. */
966 extern ira_loop_tree_node_t ira_curr_loop_tree_node;
967 extern ira_allocno_t *ira_curr_regno_allocno_map;
969 extern void ira_debug_pref (ira_pref_t);
970 extern void ira_debug_prefs (void);
971 extern void ira_debug_allocno_prefs (ira_allocno_t);
973 extern void ira_debug_copy (ira_copy_t);
974 extern void debug (ira_allocno_copy &ref);
975 extern void debug (ira_allocno_copy *ptr);
977 extern void ira_debug_copies (void);
978 extern void ira_debug_allocno_copies (ira_allocno_t);
979 extern void debug (ira_allocno &ref);
980 extern void debug (ira_allocno *ptr);
982 extern void ira_traverse_loop_tree (bool, ira_loop_tree_node_t,
983 void (*) (ira_loop_tree_node_t),
984 void (*) (ira_loop_tree_node_t));
985 extern ira_allocno_t ira_parent_allocno (ira_allocno_t);
986 extern ira_allocno_t ira_parent_or_cap_allocno (ira_allocno_t);
987 extern ira_allocno_t ira_create_allocno (int, bool, ira_loop_tree_node_t);
988 extern void ira_create_allocno_objects (ira_allocno_t);
989 extern void ira_set_allocno_class (ira_allocno_t, enum reg_class);
990 extern bool ira_conflict_vector_profitable_p (ira_object_t, int);
991 extern void ira_allocate_conflict_vec (ira_object_t, int);
992 extern void ira_allocate_object_conflicts (ira_object_t, int);
993 extern void ior_hard_reg_conflicts (ira_allocno_t, HARD_REG_SET *);
994 extern void ira_print_expanded_allocno (ira_allocno_t);
995 extern void ira_add_live_range_to_object (ira_object_t, int, int);
996 extern live_range_t ira_create_live_range (ira_object_t, int, int,
997 live_range_t);
998 extern live_range_t ira_copy_live_range_list (live_range_t);
999 extern live_range_t ira_merge_live_ranges (live_range_t, live_range_t);
1000 extern bool ira_live_ranges_intersect_p (live_range_t, live_range_t);
1001 extern void ira_finish_live_range (live_range_t);
1002 extern void ira_finish_live_range_list (live_range_t);
1003 extern void ira_free_allocno_updated_costs (ira_allocno_t);
1004 extern ira_pref_t ira_create_pref (ira_allocno_t, int, int);
1005 extern void ira_add_allocno_pref (ira_allocno_t, int, int);
1006 extern void ira_remove_pref (ira_pref_t);
1007 extern void ira_remove_allocno_prefs (ira_allocno_t);
1008 extern ira_copy_t ira_create_copy (ira_allocno_t, ira_allocno_t,
1009 int, bool, rtx, ira_loop_tree_node_t);
1010 extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int,
1011 bool, rtx, ira_loop_tree_node_t);
1013 extern int *ira_allocate_cost_vector (reg_class_t);
1014 extern void ira_free_cost_vector (int *, reg_class_t);
1016 extern void ira_flattening (int, int);
1017 extern bool ira_build (void);
1018 extern void ira_destroy (void);
1020 /* ira-costs.c */
1021 extern void ira_init_costs_once (void);
1022 extern void ira_init_costs (void);
1023 extern void ira_finish_costs_once (void);
1024 extern void ira_costs (void);
1025 extern void ira_tune_allocno_costs (void);
1027 /* ira-lives.c */
1029 extern void ira_rebuild_start_finish_chains (void);
1030 extern void ira_print_live_range_list (FILE *, live_range_t);
1031 extern void debug (live_range &ref);
1032 extern void debug (live_range *ptr);
1033 extern void ira_debug_live_range_list (live_range_t);
1034 extern void ira_debug_allocno_live_ranges (ira_allocno_t);
1035 extern void ira_debug_live_ranges (void);
1036 extern void ira_create_allocno_live_ranges (void);
1037 extern void ira_compress_allocno_live_ranges (void);
1038 extern void ira_finish_allocno_live_ranges (void);
1040 /* ira-conflicts.c */
1041 extern void ira_debug_conflicts (bool);
1042 extern void ira_build_conflicts (void);
1044 /* ira-color.c */
1045 extern void ira_debug_hard_regs_forest (void);
1046 extern int ira_loop_edge_freq (ira_loop_tree_node_t, int, bool);
1047 extern void ira_reassign_conflict_allocnos (int);
1048 extern void ira_initiate_assign (void);
1049 extern void ira_finish_assign (void);
1050 extern void ira_color (void);
1052 /* ira-emit.c */
1053 extern void ira_initiate_emit_data (void);
1054 extern void ira_finish_emit_data (void);
1055 extern void ira_emit (bool);
1059 /* Return true if equivalence of pseudo REGNO is not a lvalue. */
1060 static inline bool
1061 ira_equiv_no_lvalue_p (int regno)
1063 if (regno >= ira_reg_equiv_len)
1064 return false;
1065 return (ira_reg_equiv[regno].constant != NULL_RTX
1066 || ira_reg_equiv[regno].invariant != NULL_RTX
1067 || (ira_reg_equiv[regno].memory != NULL_RTX
1068 && MEM_READONLY_P (ira_reg_equiv[regno].memory)));
1073 /* Initialize register costs for MODE if necessary. */
1074 static inline void
1075 ira_init_register_move_cost_if_necessary (enum machine_mode mode)
1077 if (ira_register_move_cost[mode] == NULL)
1078 ira_init_register_move_cost (mode);
1083 /* The iterator for all allocnos. */
1084 struct ira_allocno_iterator {
1085 /* The number of the current element in IRA_ALLOCNOS. */
1086 int n;
1089 /* Initialize the iterator I. */
1090 static inline void
1091 ira_allocno_iter_init (ira_allocno_iterator *i)
1093 i->n = 0;
1096 /* Return TRUE if we have more allocnos to visit, in which case *A is
1097 set to the allocno to be visited. Otherwise, return FALSE. */
1098 static inline bool
1099 ira_allocno_iter_cond (ira_allocno_iterator *i, ira_allocno_t *a)
1101 int n;
1103 for (n = i->n; n < ira_allocnos_num; n++)
1104 if (ira_allocnos[n] != NULL)
1106 *a = ira_allocnos[n];
1107 i->n = n + 1;
1108 return true;
1110 return false;
1113 /* Loop over all allocnos. In each iteration, A is set to the next
1114 allocno. ITER is an instance of ira_allocno_iterator used to iterate
1115 the allocnos. */
1116 #define FOR_EACH_ALLOCNO(A, ITER) \
1117 for (ira_allocno_iter_init (&(ITER)); \
1118 ira_allocno_iter_cond (&(ITER), &(A));)
1120 /* The iterator for all objects. */
1121 struct ira_object_iterator {
1122 /* The number of the current element in ira_object_id_map. */
1123 int n;
1126 /* Initialize the iterator I. */
1127 static inline void
1128 ira_object_iter_init (ira_object_iterator *i)
1130 i->n = 0;
1133 /* Return TRUE if we have more objects to visit, in which case *OBJ is
1134 set to the object to be visited. Otherwise, return FALSE. */
1135 static inline bool
1136 ira_object_iter_cond (ira_object_iterator *i, ira_object_t *obj)
1138 int n;
1140 for (n = i->n; n < ira_objects_num; n++)
1141 if (ira_object_id_map[n] != NULL)
1143 *obj = ira_object_id_map[n];
1144 i->n = n + 1;
1145 return true;
1147 return false;
1150 /* Loop over all objects. In each iteration, OBJ is set to the next
1151 object. ITER is an instance of ira_object_iterator used to iterate
1152 the objects. */
1153 #define FOR_EACH_OBJECT(OBJ, ITER) \
1154 for (ira_object_iter_init (&(ITER)); \
1155 ira_object_iter_cond (&(ITER), &(OBJ));)
1157 /* The iterator for objects associated with an allocno. */
1158 struct ira_allocno_object_iterator {
1159 /* The number of the element the allocno's object array. */
1160 int n;
1163 /* Initialize the iterator I. */
1164 static inline void
1165 ira_allocno_object_iter_init (ira_allocno_object_iterator *i)
1167 i->n = 0;
1170 /* Return TRUE if we have more objects to visit in allocno A, in which
1171 case *O is set to the object to be visited. Otherwise, return
1172 FALSE. */
1173 static inline bool
1174 ira_allocno_object_iter_cond (ira_allocno_object_iterator *i, ira_allocno_t a,
1175 ira_object_t *o)
1177 int n = i->n++;
1178 if (n < ALLOCNO_NUM_OBJECTS (a))
1180 *o = ALLOCNO_OBJECT (a, n);
1181 return true;
1183 return false;
1186 /* Loop over all objects associated with allocno A. In each
1187 iteration, O is set to the next object. ITER is an instance of
1188 ira_allocno_object_iterator used to iterate the conflicts. */
1189 #define FOR_EACH_ALLOCNO_OBJECT(A, O, ITER) \
1190 for (ira_allocno_object_iter_init (&(ITER)); \
1191 ira_allocno_object_iter_cond (&(ITER), (A), &(O));)
1194 /* The iterator for prefs. */
1195 struct ira_pref_iterator {
1196 /* The number of the current element in IRA_PREFS. */
1197 int n;
1200 /* Initialize the iterator I. */
1201 static inline void
1202 ira_pref_iter_init (ira_pref_iterator *i)
1204 i->n = 0;
1207 /* Return TRUE if we have more prefs to visit, in which case *PREF is
1208 set to the pref to be visited. Otherwise, return FALSE. */
1209 static inline bool
1210 ira_pref_iter_cond (ira_pref_iterator *i, ira_pref_t *pref)
1212 int n;
1214 for (n = i->n; n < ira_prefs_num; n++)
1215 if (ira_prefs[n] != NULL)
1217 *pref = ira_prefs[n];
1218 i->n = n + 1;
1219 return true;
1221 return false;
1224 /* Loop over all prefs. In each iteration, P is set to the next
1225 pref. ITER is an instance of ira_pref_iterator used to iterate
1226 the prefs. */
1227 #define FOR_EACH_PREF(P, ITER) \
1228 for (ira_pref_iter_init (&(ITER)); \
1229 ira_pref_iter_cond (&(ITER), &(P));)
1232 /* The iterator for copies. */
1233 struct ira_copy_iterator {
1234 /* The number of the current element in IRA_COPIES. */
1235 int n;
1238 /* Initialize the iterator I. */
1239 static inline void
1240 ira_copy_iter_init (ira_copy_iterator *i)
1242 i->n = 0;
1245 /* Return TRUE if we have more copies to visit, in which case *CP is
1246 set to the copy to be visited. Otherwise, return FALSE. */
1247 static inline bool
1248 ira_copy_iter_cond (ira_copy_iterator *i, ira_copy_t *cp)
1250 int n;
1252 for (n = i->n; n < ira_copies_num; n++)
1253 if (ira_copies[n] != NULL)
1255 *cp = ira_copies[n];
1256 i->n = n + 1;
1257 return true;
1259 return false;
1262 /* Loop over all copies. In each iteration, C is set to the next
1263 copy. ITER is an instance of ira_copy_iterator used to iterate
1264 the copies. */
1265 #define FOR_EACH_COPY(C, ITER) \
1266 for (ira_copy_iter_init (&(ITER)); \
1267 ira_copy_iter_cond (&(ITER), &(C));)
1269 /* The iterator for object conflicts. */
1270 struct ira_object_conflict_iterator {
1272 /* TRUE if the conflicts are represented by vector of allocnos. */
1273 bool conflict_vec_p;
1275 /* The conflict vector or conflict bit vector. */
1276 void *vec;
1278 /* The number of the current element in the vector (of type
1279 ira_object_t or IRA_INT_TYPE). */
1280 unsigned int word_num;
1282 /* The bit vector size. It is defined only if
1283 OBJECT_CONFLICT_VEC_P is FALSE. */
1284 unsigned int size;
1286 /* The current bit index of bit vector. It is defined only if
1287 OBJECT_CONFLICT_VEC_P is FALSE. */
1288 unsigned int bit_num;
1290 /* The object id corresponding to the 1st bit of the bit vector. It
1291 is defined only if OBJECT_CONFLICT_VEC_P is FALSE. */
1292 int base_conflict_id;
1294 /* The word of bit vector currently visited. It is defined only if
1295 OBJECT_CONFLICT_VEC_P is FALSE. */
1296 unsigned IRA_INT_TYPE word;
1299 /* Initialize the iterator I with ALLOCNO conflicts. */
1300 static inline void
1301 ira_object_conflict_iter_init (ira_object_conflict_iterator *i,
1302 ira_object_t obj)
1304 i->conflict_vec_p = OBJECT_CONFLICT_VEC_P (obj);
1305 i->vec = OBJECT_CONFLICT_ARRAY (obj);
1306 i->word_num = 0;
1307 if (i->conflict_vec_p)
1308 i->size = i->bit_num = i->base_conflict_id = i->word = 0;
1309 else
1311 if (OBJECT_MIN (obj) > OBJECT_MAX (obj))
1312 i->size = 0;
1313 else
1314 i->size = ((OBJECT_MAX (obj) - OBJECT_MIN (obj)
1315 + IRA_INT_BITS)
1316 / IRA_INT_BITS) * sizeof (IRA_INT_TYPE);
1317 i->bit_num = 0;
1318 i->base_conflict_id = OBJECT_MIN (obj);
1319 i->word = (i->size == 0 ? 0 : ((IRA_INT_TYPE *) i->vec)[0]);
1323 /* Return TRUE if we have more conflicting allocnos to visit, in which
1324 case *A is set to the allocno to be visited. Otherwise, return
1325 FALSE. */
1326 static inline bool
1327 ira_object_conflict_iter_cond (ira_object_conflict_iterator *i,
1328 ira_object_t *pobj)
1330 ira_object_t obj;
1332 if (i->conflict_vec_p)
1334 obj = ((ira_object_t *) i->vec)[i->word_num++];
1335 if (obj == NULL)
1336 return false;
1338 else
1340 unsigned IRA_INT_TYPE word = i->word;
1341 unsigned int bit_num = i->bit_num;
1343 /* Skip words that are zeros. */
1344 for (; word == 0; word = ((IRA_INT_TYPE *) i->vec)[i->word_num])
1346 i->word_num++;
1348 /* If we have reached the end, break. */
1349 if (i->word_num * sizeof (IRA_INT_TYPE) >= i->size)
1350 return false;
1352 bit_num = i->word_num * IRA_INT_BITS;
1355 /* Skip bits that are zero. */
1356 for (; (word & 1) == 0; word >>= 1)
1357 bit_num++;
1359 obj = ira_object_id_map[bit_num + i->base_conflict_id];
1360 i->bit_num = bit_num + 1;
1361 i->word = word >> 1;
1364 *pobj = obj;
1365 return true;
1368 /* Loop over all objects conflicting with OBJ. In each iteration,
1369 CONF is set to the next conflicting object. ITER is an instance
1370 of ira_object_conflict_iterator used to iterate the conflicts. */
1371 #define FOR_EACH_OBJECT_CONFLICT(OBJ, CONF, ITER) \
1372 for (ira_object_conflict_iter_init (&(ITER), (OBJ)); \
1373 ira_object_conflict_iter_cond (&(ITER), &(CONF));)
1377 /* The function returns TRUE if at least one hard register from ones
1378 starting with HARD_REGNO and containing value of MODE are in set
1379 HARD_REGSET. */
1380 static inline bool
1381 ira_hard_reg_set_intersection_p (int hard_regno, enum machine_mode mode,
1382 HARD_REG_SET hard_regset)
1384 int i;
1386 gcc_assert (hard_regno >= 0);
1387 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1388 if (TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1389 return true;
1390 return false;
1393 /* Return number of hard registers in hard register SET. */
1394 static inline int
1395 hard_reg_set_size (HARD_REG_SET set)
1397 int i, size;
1399 for (size = i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1400 if (TEST_HARD_REG_BIT (set, i))
1401 size++;
1402 return size;
1405 /* The function returns TRUE if hard registers starting with
1406 HARD_REGNO and containing value of MODE are fully in set
1407 HARD_REGSET. */
1408 static inline bool
1409 ira_hard_reg_in_set_p (int hard_regno, enum machine_mode mode,
1410 HARD_REG_SET hard_regset)
1412 int i;
1414 ira_assert (hard_regno >= 0);
1415 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1416 if (!TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1417 return false;
1418 return true;
1423 /* To save memory we use a lazy approach for allocation and
1424 initialization of the cost vectors. We do this only when it is
1425 really necessary. */
1427 /* Allocate cost vector *VEC for hard registers of ACLASS and
1428 initialize the elements by VAL if it is necessary */
1429 static inline void
1430 ira_allocate_and_set_costs (int **vec, reg_class_t aclass, int val)
1432 int i, *reg_costs;
1433 int len;
1435 if (*vec != NULL)
1436 return;
1437 *vec = reg_costs = ira_allocate_cost_vector (aclass);
1438 len = ira_class_hard_regs_num[(int) aclass];
1439 for (i = 0; i < len; i++)
1440 reg_costs[i] = val;
1443 /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1444 values of vector SRC into the vector if it is necessary */
1445 static inline void
1446 ira_allocate_and_copy_costs (int **vec, enum reg_class aclass, int *src)
1448 int len;
1450 if (*vec != NULL || src == NULL)
1451 return;
1452 *vec = ira_allocate_cost_vector (aclass);
1453 len = ira_class_hard_regs_num[aclass];
1454 memcpy (*vec, src, sizeof (int) * len);
1457 /* Allocate cost vector *VEC for hard registers of ACLASS and add
1458 values of vector SRC into the vector if it is necessary */
1459 static inline void
1460 ira_allocate_and_accumulate_costs (int **vec, enum reg_class aclass, int *src)
1462 int i, len;
1464 if (src == NULL)
1465 return;
1466 len = ira_class_hard_regs_num[aclass];
1467 if (*vec == NULL)
1469 *vec = ira_allocate_cost_vector (aclass);
1470 memset (*vec, 0, sizeof (int) * len);
1472 for (i = 0; i < len; i++)
1473 (*vec)[i] += src[i];
1476 /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1477 values of vector SRC into the vector or initialize it by VAL (if
1478 SRC is null). */
1479 static inline void
1480 ira_allocate_and_set_or_copy_costs (int **vec, enum reg_class aclass,
1481 int val, int *src)
1483 int i, *reg_costs;
1484 int len;
1486 if (*vec != NULL)
1487 return;
1488 *vec = reg_costs = ira_allocate_cost_vector (aclass);
1489 len = ira_class_hard_regs_num[aclass];
1490 if (src != NULL)
1491 memcpy (reg_costs, src, sizeof (int) * len);
1492 else
1494 for (i = 0; i < len; i++)
1495 reg_costs[i] = val;
1499 extern rtx ira_create_new_reg (rtx);
1500 extern int first_moveable_pseudo, last_moveable_pseudo;