gcc/config/score/score.h

   1 /* score.h for Sunplus S+CORE processor
   2    Copyright (C) 2005, 2007, 2008, 2009, 2010, 2011
   3    Free Software Foundation, Inc.
   4    Contributed by Sunnorth.
   5
   6    This file is part of GCC.
   7
   8    GCC is free software; you can redistribute it and/or modify it
   9    under the terms of the GNU General Public License as published
  10    by the Free Software Foundation; either version 3, or (at your
  11    option) any later version.
  12
  13    GCC is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with GCC; see the file COPYING3.  If not see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 #include "score-conv.h"
  23
  24 #undef CC1_SPEC
  25 #define CC1_SPEC                 "%{!mel:-meb} %{mel:-mel } \
  26 %{!mscore*:-mscore7}    \
  27 %{mscore7:-mscore7}     \
  28 %{mscore7d:-mscore7d}   \
  29 %{G*}"
  30
  31 #undef ASM_SPEC
  32 #define ASM_SPEC                 "%{!mel:-EB} %{mel:-EL} \
  33 %{!mscore*:-march=score7}         \
  34 %{mscore7:-march=score7}          \
  35 %{mscore7d:-march=score7}         \
  36 %{march=score7:-march=score7}     \
  37 %{march=score7d:-march=score7}    \
  38 %{G*}"
  39
  40 #undef LINK_SPEC
  41 #define LINK_SPEC                "%{!mel:-EB} %{mel:-EL} \
  42 %{!mscore*:-mscore7_elf}          \
  43 %{mscore7:-mscore7_elf}           \
  44 %{mscore7d:-mscore7_elf}          \
  45 %{march=score7:-mscore7_elf}      \
  46 %{march=score7d:-mscore7_elf}     \
  47 %{G*}"
  48
  49 /* Run-time Target Specification.  */
  50 #define TARGET_CPU_CPP_BUILTINS()               \
  51   do {                                          \
  52     builtin_define ("SUNPLUS");                 \
  53     builtin_define ("__SCORE__");               \
  54     builtin_define ("__score__");               \
  55     if (TARGET_LITTLE_ENDIAN)                   \
  56       builtin_define ("__scorele__");           \
  57     else                                        \
  58       builtin_define ("__scorebe__");           \
  59     if (TARGET_SCORE7)                          \
  60       builtin_define ("__score7__");            \
  61     if (TARGET_SCORE7D)                         \
  62       builtin_define ("__score7d__");           \
  63   } while (0)
  64
  65 #define TARGET_DEFAULT         0
  66
  67 #define SCORE_GCC_VERSION      "1.6"
  68
  69 /* Target machine storage layout.  */
  70 #define BITS_BIG_ENDIAN        0
  71 #define BYTES_BIG_ENDIAN       (TARGET_LITTLE_ENDIAN == 0)
  72 #define WORDS_BIG_ENDIAN       (TARGET_LITTLE_ENDIAN == 0)
  73
  74 /* Width of a word, in units (bytes).  */
  75 #define UNITS_PER_WORD                 4
  76
  77 /* Define this macro if it is advisable to hold scalars in registers
  78    in a wider mode than that declared by the program.  In such cases,
  79    the value is constrained to be within the bounds of the declared
  80    type, but kept valid in the wider mode.  The signedness of the
  81    extension may differ from that of the type.  */
  82 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \
  83   if (GET_MODE_CLASS (MODE) == MODE_INT         \
  84       && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
  85     (MODE) = SImode;
  86
  87 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
  88 #define PARM_BOUNDARY                  BITS_PER_WORD
  89 #define STACK_BOUNDARY                 BITS_PER_WORD
  90
  91 /* Allocation boundary (in *bits*) for the code of a function.  */
  92 #define FUNCTION_BOUNDARY              BITS_PER_WORD
  93
  94 /* There is no point aligning anything to a rounder boundary than this.  */
  95 #define BIGGEST_ALIGNMENT              LONG_DOUBLE_TYPE_SIZE
  96
  97 /* If defined, a C expression to compute the alignment for a static
  98    variable.  TYPE is the data type, and ALIGN is the alignment that
  99    the object would ordinarily have.  The value of this macro is used
 100    instead of that alignment to align the object.
 101
 102    If this macro is not defined, then ALIGN is used.
 103
 104    One use of this macro is to increase alignment of medium-size
 105    data to make it all fit in fewer cache lines.  Another is to
 106    cause character arrays to be word-aligned so that `strcpy' calls
 107    that copy constants to character arrays can be done inline.  */
 108 #define DATA_ALIGNMENT(TYPE, ALIGN)                                      \
 109   ((((ALIGN) < BITS_PER_WORD)                                            \
 110     && (TREE_CODE (TYPE) == ARRAY_TYPE                                   \
 111         || TREE_CODE (TYPE) == UNION_TYPE                                \
 112         || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
 113
 114 /* If defined, a C expression to compute the alignment given to a
 115    constant that is being placed in memory.  EXP is the constant
 116    and ALIGN is the alignment that the object would ordinarily have.
 117    The value of this macro is used instead of that alignment to align
 118    the object.
 119
 120    If this macro is not defined, then ALIGN is used.
 121
 122    The typical use of this macro is to increase alignment for string
 123    constants to be word aligned so that `strcpy' calls that copy
 124    constants can be done inline.  */
 125 #define CONSTANT_ALIGNMENT(EXP, ALIGN)                                  \
 126   ((TREE_CODE (EXP) == STRING_CST  || TREE_CODE (EXP) == CONSTRUCTOR)   \
 127    && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
 128
 129 /* If defined, a C expression to compute the alignment for a local
 130    variable.  TYPE is the data type, and ALIGN is the alignment that
 131    the object would ordinarily have.  The value of this macro is used
 132    instead of that alignment to align the object.
 133
 134    If this macro is not defined, then ALIGN is used.
 135
 136    One use of this macro is to increase alignment of medium-size
 137    data to make it all fit in fewer cache lines.  */
 138 #define LOCAL_ALIGNMENT(TYPE, ALIGN)                                    \
 139   ((TREE_CODE (TYPE) == ARRAY_TYPE                                      \
 140     && TYPE_MODE (TREE_TYPE (TYPE)) == QImode                           \
 141     && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN))
 142
 143 /* Alignment of field after `int : 0' in a structure.  */
 144 #define EMPTY_FIELD_BOUNDARY           32
 145
 146 /* All accesses must be aligned.  */
 147 #define STRICT_ALIGNMENT               1
 148
 149 /* Score requires that structure alignment is affected by bitfields.  */
 150 #define PCC_BITFIELD_TYPE_MATTERS      1
 151
 152 /* long double is not a fixed mode, but the idea is that, if we
 153    support long double, we also want a 128-bit integer type.  */
 154 #define MAX_FIXED_MODE_SIZE            LONG_DOUBLE_TYPE_SIZE
 155
 156 /* Layout of Data Type.  */
 157 /* Set the sizes of the core types.  */
 158 #define INT_TYPE_SIZE                   32
 159 #define SHORT_TYPE_SIZE                 16
 160 #define LONG_TYPE_SIZE                  32
 161 #define LONG_LONG_TYPE_SIZE             64
 162 #define CHAR_TYPE_SIZE                  8
 163 #define FLOAT_TYPE_SIZE                 32
 164 #define DOUBLE_TYPE_SIZE                64
 165 #define LONG_DOUBLE_TYPE_SIZE           64
 166
 167 /* Define this as 1 if `char' should by default be signed; else as 0.  */
 168 #undef DEFAULT_SIGNED_CHAR
 169 #define DEFAULT_SIGNED_CHAR             1
 170
 171 /* Default definitions for size_t and ptrdiff_t.  */
 172 #define SIZE_TYPE                       "unsigned int"
 173
 174 #define UINTPTR_TYPE                    "long unsigned int"
 175
 176 /* Register Usage
 177
 178    S+core have:
 179    - 32 integer registers
 180    - 16 control registers (cond)
 181    - 16 special registers (ceh/cel/cnt/lcr/scr/arg/fp)
 182    - 32 coprocessors 1 registers
 183    - 32 coprocessors 2 registers
 184    - 32 coprocessors 3 registers.  */
 185 #define FIRST_PSEUDO_REGISTER           160
 186
 187 /* By default, fix the kernel registers (r30 and r31), the global
 188    pointer (r28) and the stack pointer (r0).  This can change
 189    depending on the command-line options.
 190
 191    Regarding coprocessor registers: without evidence to the contrary,
 192    it's best to assume that each coprocessor register has a unique
 193    use.  This can be overridden, in, e.g., TARGET_OPTION_OVERRIDE or
 194    TARGET_CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate
 195    for a particular target.  */
 196
 197 /* Control Registers, use mfcr/mtcr insn
 198     32        cr0         PSR
 199     33        cr1         Condition
 200     34        cr2         ECR
 201     35        cr3         EXCPVec
 202     36        cr4         CCR
 203     37        cr5         EPC
 204     38        cr6         EMA
 205     39        cr7         TLBLock
 206     40        cr8         TLBPT
 207     41        cr8         PEADDR
 208     42        cr10        TLBRPT
 209     43        cr11        PEVN
 210     44        cr12        PECTX
 211     45        cr13
 212     46        cr14
 213     47        cr15
 214
 215     Custom Engine Register, use mfce/mtce
 216     48        CEH        CEH
 217     49        CEL        CEL
 218
 219     Special-Purpose Register, use mfsr/mtsr
 220     50        sr0        CNT
 221     51        sr1        LCR
 222     52        sr2        SCR
 223
 224     53        ARG_POINTER_REGNUM
 225     54        FRAME_POINTER_REGNUM
 226     but Control register have 32 registers, cr16-cr31.  */
 227 #define FIXED_REGISTERS                                  \
 228 {                                                        \
 229   /* General Purpose Registers  */                       \
 230   1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,        \
 231   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,        \
 232   /* Control Registers  */                               \
 233   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 234   /* CEH/ CEL/ CNT/ LCR/ SCR / ARG_POINTER_REGNUM/ FRAME_POINTER_REGNUM */\
 235   0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 236   /* CP 1 Registers  */                                  \
 237   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 238   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 239   /* CP 2 Registers  */                                  \
 240   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 241   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 242   /* CP 3 Registers  */                                  \
 243   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 244   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 245 }
 246
 247 #define CALL_USED_REGISTERS                              \
 248 {                                                        \
 249   /* General purpose register  */                        \
 250   1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,        \
 251   0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 252   /* Control Registers  */                               \
 253   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 254   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 255   /* CP 1 Registers  */                                  \
 256   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 257   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 258   /* CP 2 Registers  */                                  \
 259   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 260   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 261   /* CP 3 Registers  */                                  \
 262   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 263   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,        \
 264 }
 265
 266 #define REG_ALLOC_ORDER                                                   \
 267 {   0,  1,  6,  7,  8,  9, 10, 11,  4,  5, 22, 23, 24, 25, 26, 27,        \
 268    12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 28, 29, 30, 31,  2,  3,        \
 269    32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,        \
 270    48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,        \
 271    64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,        \
 272    80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,        \
 273    96, 97, 98, 99,100,101,102,103,104,105,106,107,108,109,110,111,        \
 274   112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,        \
 275   128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,        \
 276   144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159        }
 277
 278 /* Macro to conditionally modify fixed_regs/call_used_regs.  */
 279 #define PIC_OFFSET_TABLE_REGNUM          29
 280
 281 #define HARD_REGNO_NREGS(REGNO, MODE) \
 282   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 283
 284 /* Return true if REGNO is suitable for holding a quantity of type MODE.  */
 285 #define HARD_REGNO_MODE_OK(REGNO, MODE) score_hard_regno_mode_ok (REGNO, MODE)
 286
 287 /* Value is 1 if it is a good idea to tie two pseudo registers
 288    when one has mode MODE1 and one has mode MODE2.
 289    If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
 290    for any hard reg, then this must be 0 for correct output.  */
 291 #define MODES_TIEABLE_P(MODE1, MODE2)                             \
 292   ((GET_MODE_CLASS (MODE1) == MODE_FLOAT                          \
 293     || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT)              \
 294    == (GET_MODE_CLASS (MODE2) == MODE_FLOAT                       \
 295        || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
 296
 297 /* Register Classes.  */
 298 /* Define the classes of registers for register constraints in the
 299    machine description.  Also define ranges of constants.  */
 300 enum reg_class
 301 {
 302   NO_REGS,
 303   G16_REGS,    /* r0 ~ r15 */
 304   G32_REGS,    /* r0 ~ r31 */
 305   T32_REGS,    /* r8 ~ r11 | r22 ~ r27 */
 306
 307   HI_REG,      /* hi                 */
 308   LO_REG,      /* lo                 */
 309   CE_REGS,     /* hi + lo            */
 310
 311   CN_REG,      /* cnt                */
 312   LC_REG,      /* lcb                */
 313   SC_REG,      /* scb                */
 314   SP_REGS,     /* cnt + lcb + scb    */
 315
 316   CR_REGS,     /* cr0 - cr15         */
 317
 318   CP1_REGS,    /* cp1                */
 319   CP2_REGS,    /* cp2                */
 320   CP3_REGS,    /* cp3                */
 321   CPA_REGS,    /* cp1 + cp2 + cp3    */
 322
 323   ALL_REGS,
 324   LIM_REG_CLASSES
 325 };
 326
 327 #define N_REG_CLASSES                  ((int) LIM_REG_CLASSES)
 328
 329 #define GENERAL_REGS                   G32_REGS
 330
 331 /* Give names of register classes as strings for dump file.  */
 332 #define REG_CLASS_NAMES           \
 333 {                                 \
 334   "NO_REGS",                      \
 335   "G16_REGS",                     \
 336   "G32_REGS",                     \
 337   "T32_REGS",                     \
 338                                   \
 339   "HI_REG",                       \
 340   "LO_REG",                       \
 341   "CE_REGS",                      \
 342                                   \
 343   "CN_REG",                       \
 344   "LC_REG",                       \
 345   "SC_REG",                       \
 346   "SP_REGS",                      \
 347                                   \
 348   "CR_REGS",                      \
 349                                   \
 350   "CP1_REGS",                     \
 351   "CP2_REGS",                     \
 352   "CP3_REGS",                     \
 353   "CPA_REGS",                     \
 354                                   \
 355   "ALL_REGS",                     \
 356 }
 357
 358 /* Define which registers fit in which classes.  */
 359 #define REG_CLASS_CONTENTS                                        \
 360 {                                                                 \
 361   /* NO_REGS/G16/G32/T32  */                                      \
 362   { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},  \
 363   { 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000},  \
 364   { 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000},  \
 365   { 0x0fc00f00, 0x00000000, 0x00000000, 0x00000000, 0x00000000},  \
 366   /* HI/LO/CE  */                                                 \
 367   { 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000},  \
 368   { 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000},  \
 369   { 0x00000000, 0x00030000, 0x00000000, 0x00000000, 0x00000000},  \
 370   /* CN/LC/SC/SP/CR  */                                           \
 371   { 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000},  \
 372   { 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000},  \
 373   { 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000},  \
 374   { 0x00000000, 0x001c0000, 0x00000000, 0x00000000, 0x00000000},  \
 375   { 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000},  \
 376   /* CP1/CP2/CP3/CPA  */                                          \
 377   { 0x00000000, 0x00000000, 0xffffffff, 0x00000000, 0x00000000},  \
 378   { 0x00000000, 0x00000000, 0x00000000, 0xffffffff, 0x00000000},  \
 379   { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffffff},  \
 380   { 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff},  \
 381   /* ALL_REGS  */                                                 \
 382   { 0xffffffff, 0x001fffff, 0xffffffff, 0xffffffff, 0xffffffff},  \
 383 }
 384
 385 /* A C expression whose value is a register class containing hard
 386    register REGNO.  In general there is more that one such class;
 387    choose a class which is "minimal", meaning that no smaller class
 388    also contains the register.  */
 389 #define REGNO_REG_CLASS(REGNO) (enum reg_class) score_reg_class (REGNO)
 390
 391 /* A macro whose definition is the name of the class to which a
 392    valid base register must belong.  A base register is one used in
 393    an address which is the register value plus a displacement.  */
 394 #define BASE_REG_CLASS                 G16_REGS
 395
 396 /* The class value for index registers.  */
 397 #define INDEX_REG_CLASS                NO_REGS
 398
 399 extern enum reg_class score_char_to_class[256];
 400 #define REG_CLASS_FROM_LETTER(C)       score_char_to_class[(unsigned char) (C)]
 401
 402 /* Addressing modes, and classification of registers for them.  */
 403 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \
 404   score_regno_mode_ok_for_base_p (REGNO, 1)
 405
 406 #define REGNO_OK_FOR_INDEX_P(NUM)       0
 407
 408 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
 409   score_preferred_reload_class (X, CLASS)
 410
 411 /* If we need to load shorts byte-at-a-time, then we need a scratch.  */
 412 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
 413   score_secondary_reload_class (CLASS, MODE, X)
 414
 415 /* Return the register class of a scratch register needed to copy IN into
 416    or out of a register in CLASS in MODE.  If it can be done directly,
 417    NO_REGS is returned.  */
 418 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
 419   score_secondary_reload_class (CLASS, MODE, X)
 420
 421 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)    \
 422   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)        \
 423    ? reg_classes_intersect_p (HI_REG, (CLASS)) : 0)
 424
 425
 426 /* Basic Stack Layout.  */
 427 /* Stack layout; function entry, exit and calling.  */
 428 #define STACK_GROWS_DOWNWARD
 429
 430 #define STACK_PUSH_CODE                 PRE_DEC
 431 #define STACK_POP_CODE                  POST_INC
 432
 433 /* The offset of the first local variable from the beginning of the frame.
 434    See compute_frame_size for details about the frame layout.  */
 435 #define STARTING_FRAME_OFFSET           crtl->outgoing_args_size
 436
 437 /* The argument pointer always points to the first argument.  */
 438 #define FIRST_PARM_OFFSET(FUNDECL)      0
 439
 440 /* A C expression whose value is RTL representing the value of the return
 441    address for the frame COUNT steps up from the current frame.  */
 442 #define RETURN_ADDR_RTX(count, frame)   score_return_addr (count, frame)
 443
 444 /* Pick up the return address upon entry to a procedure.  */
 445 #define INCOMING_RETURN_ADDR_RTX        gen_rtx_REG (VOIDmode, RA_REGNUM)
 446
 447 /* Exception handling Support.  */
 448 /* Use r0 to r3 to pass exception handling information.  */
 449 #define EH_RETURN_DATA_REGNO(N) \
 450   ((N) < 4 ? (N) + ARG_REG_FIRST : INVALID_REGNUM)
 451
 452 /* The register that holds the return address in exception handlers.  */
 453 #define EH_RETURN_STACKADJ_RTX          gen_rtx_REG (Pmode, EH_REGNUM)
 454 #define EH_RETURN_HANDLER_RTX           gen_rtx_REG (SImode, 30)
 455
 456 /* Registers That Address the Stack Frame.  */
 457 /* Register to use for pushing function arguments.  */
 458 #define STACK_POINTER_REGNUM            SP_REGNUM
 459
 460 /* These two registers don't really exist: they get eliminated to either
 461    the stack or hard frame pointer.  */
 462 #define FRAME_POINTER_REGNUM            53
 463
 464 /*  we use r2 as the frame pointer.  */
 465 #define HARD_FRAME_POINTER_REGNUM       FP_REGNUM
 466
 467 #define ARG_POINTER_REGNUM              54
 468
 469 /* Register in which static-chain is passed to a function.  */
 470 #define STATIC_CHAIN_REGNUM             23
 471
 472 /* Elimination Frame Pointer and Arg Pointer  */
 473
 474 #define ELIMINABLE_REGS                                \
 475   {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},        \
 476    { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},   \
 477    { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},      \
 478    { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 479
 480 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 481   (OFFSET) = score_initial_elimination_offset ((FROM), (TO))
 482
 483 /* Passing Function Arguments on the Stack.  */
 484 /* Allocate stack space for arguments at the beginning of each function.  */
 485 #define ACCUMULATE_OUTGOING_ARGS        1
 486
 487 /* reserve stack space for all argument registers.  */
 488 #define REG_PARM_STACK_SPACE(FNDECL)    UNITS_PER_WORD
 489
 490 /* Define this if it is the responsibility of the caller to
 491    allocate the area reserved for arguments passed in registers.
 492    If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
 493    of this macro is to determine whether the space is included in
 494    `crtl->outgoing_args_size'.  */
 495 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
 496
 497 /* Passing Arguments in Registers  */
 498 /* A C type for declaring a variable that is used as the first argument of
 499    `FUNCTION_ARG' and other related values.  For some target machines, the
 500    type `int' suffices and can hold the number of bytes of argument so far.  */
 501 typedef struct score_args
 502 {
 503   unsigned int arg_number;             /* how many arguments have been seen  */
 504   unsigned int num_gprs;               /* number of gprs in use  */
 505   unsigned int stack_words;            /* number of words in stack  */
 506 } score_args_t;
 507
 508 #define CUMULATIVE_ARGS                score_args_t
 509
 510 /* Initialize a variable CUM of type CUMULATIVE_ARGS
 511    for a call to a function whose data type is FNTYPE.
 512    For a library call, FNTYPE is 0.  */
 513 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, n_named_args) \
 514   score_init_cumulative_args (&CUM, FNTYPE, LIBNAME)
 515
 516 /* 1 if N is a possible register number for function argument passing.
 517    We have no FP argument registers when soft-float.  When FP registers
 518    are 32 bits, we can't directly reference the odd numbered ones.  */
 519 #define FUNCTION_ARG_REGNO_P(REGNO) \
 520   REG_CONTAIN (REGNO, ARG_REG_FIRST, ARG_REG_NUM)
 521
 522 /* How Scalar Function Values Are Returned.  */
 523 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 524   score_function_value ((VALTYPE), (FUNC), VOIDmode)
 525
 526 #define LIBCALL_VALUE(MODE)  score_function_value (NULL_TREE, NULL, (MODE))
 527
 528 /* 1 if N is a possible register number for a function value.  */
 529 #define FUNCTION_VALUE_REGNO_P(REGNO)   ((REGNO) == (ARG_REG_FIRST))
 530
 531 #define PIC_FUNCTION_ADDR_REGNUM        (GP_REG_FIRST + 25)
 532
 533 /* How Large Values Are Returned.  */
 534 #define STRUCT_VALUE                    0
 535
 536 /* Function Entry and Exit  */
 537 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
 538    the stack pointer does not matter.  The value is tested only in
 539    functions that have frame pointers.
 540    No definition is equivalent to always zero.  */
 541 #define EXIT_IGNORE_STACK               1
 542
 543 /* Generating Code for Profiling  */
 544 /* Output assembler code to FILE to increment profiler label # LABELNO
 545    for profiling a function entry.  */
 546 #define FUNCTION_PROFILER(FILE, LABELNO)                              \
 547   do {                                                                \
 548     if (TARGET_SCORE7)                                                \
 549       {                                                               \
 550         fprintf (FILE, " .set r1  \n");                               \
 551         fprintf (FILE, " mv   r%d,r%d \n", AT_REGNUM, RA_REGNUM);     \
 552         fprintf (FILE, " subi r%d, %d \n", STACK_POINTER_REGNUM, 8);  \
 553         fprintf (FILE, " jl   _mcount \n");                           \
 554         fprintf (FILE, " .set nor1 \n");                              \
 555       }                                                               \
 556   } while (0)
 557
 558 /* Trampolines for Nested Functions.  */
 559 #define TRAMPOLINE_INSNS                6
 560
 561 /* A C expression for the size in bytes of the trampoline, as an integer.  */
 562 #define TRAMPOLINE_SIZE                (24 + GET_MODE_SIZE (ptr_mode) * 2)
 563
 564 #define HAVE_PRE_INCREMENT              1
 565 #define HAVE_PRE_DECREMENT              1
 566 #define HAVE_POST_INCREMENT             1
 567 #define HAVE_POST_DECREMENT             1
 568 #define HAVE_PRE_MODIFY_DISP            1
 569 #define HAVE_POST_MODIFY_DISP           1
 570 #define HAVE_PRE_MODIFY_REG             0
 571 #define HAVE_POST_MODIFY_REG            0
 572
 573 /* Maximum number of registers that can appear in a valid memory address.  */
 574 #define MAX_REGS_PER_ADDRESS            1
 575
 576 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
 577    and check its validity for a certain class.
 578    We have two alternate definitions for each of them.
 579    The usual definition accepts all pseudo regs; the other rejects them all.
 580    The symbol REG_OK_STRICT causes the latter definition to be used.
 581
 582    Most source files want to accept pseudo regs in the hope that
 583    they will get allocated to the class that the insn wants them to be in.
 584    Some source files that are used after register allocation
 585    need to be strict.  */
 586 #ifndef REG_OK_STRICT
 587 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
 588   score_regno_mode_ok_for_base_p (REGNO (X), 0)
 589 #else
 590 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
 591   score_regno_mode_ok_for_base_p (REGNO (X), 1)
 592 #endif
 593
 594 #define REG_OK_FOR_INDEX_P(X) 0
 595
 596 /* Condition Code Status.  */
 597 #define SELECT_CC_MODE(OP, X, Y)        score_select_cc_mode (OP, X, Y)
 598
 599 /* Return nonzero if SELECT_CC_MODE will never return MODE for a
 600    floating point inequality comparison.  */
 601 #define REVERSIBLE_CC_MODE(MODE)        1
 602
 603 /* Describing Relative Costs of Operations  */
 604 /* Try to generate sequences that don't involve branches.  */
 605 #define BRANCH_COST(speed_p, predictable_p) 2
 606
 607 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 608 #define SLOW_BYTE_ACCESS                1
 609
 610 /* Define this macro if it is as good or better to call a constant
 611    function address than to call an address kept in a register.  */
 612 #define NO_FUNCTION_CSE                 1
 613
 614 /* Dividing the Output into Sections (Texts, Data, ...).  */
 615 /* Define the strings to put out for each section in the object file.  */
 616 #define TEXT_SECTION_ASM_OP             "\t.text"
 617 #define DATA_SECTION_ASM_OP             "\t.data"
 618 #define SDATA_SECTION_ASM_OP            "\t.sdata"
 619
 620 #undef  READONLY_DATA_SECTION_ASM_OP
 621 #define READONLY_DATA_SECTION_ASM_OP    "\t.rdata"
 622
 623 /* The Overall Framework of an Assembler File  */
 624 /* How to start an assembler comment.
 625    The leading space is important.  */
 626 #define ASM_COMMENT_START               "#"
 627
 628 /* Output to assembler file text saying following lines
 629    may contain character constants, extra white space, comments, etc.  */
 630 #define ASM_APP_ON                     "#APP\n\t.set volatile\n"
 631
 632 /* Output to assembler file text saying following lines
 633    no longer contain unusual constructs.  */
 634 #define ASM_APP_OFF                     "#NO_APP\n\t.set optimize\n"
 635
 636 /* Output of Uninitialized Variables.  */
 637 /* This says how to define a global common symbol.  */
 638 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN)     \
 639   do {                                                                      \
 640     fputs ("\n\t.comm\t", STREAM);                                          \
 641     assemble_name (STREAM, NAME);                                           \
 642     fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n",           \
 643              SIZE, ALIGN / BITS_PER_UNIT);                                  \
 644   } while (0)
 645
 646 /* This says how to define a local common symbol (i.e., not visible to
 647    linker).  */
 648 #undef ASM_OUTPUT_ALIGNED_LOCAL
 649 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN)                 \
 650   do {                                                                      \
 651     fputs ("\n\t.lcomm\t", STREAM);                                         \
 652     assemble_name (STREAM, NAME);                                           \
 653     fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n",           \
 654              SIZE, ALIGN / BITS_PER_UNIT);                                  \
 655   } while (0)
 656
 657 /* Globalizing directive for a label.  */
 658 #define GLOBAL_ASM_OP                   "\t.globl\t"
 659
 660 /* Output and Generation of Labels  */
 661 /* This is how to declare a function name.  The actual work of
 662    emitting the label is moved to function_prologue, so that we can
 663    get the line number correctly emitted before the .ent directive,
 664    and after any .file directives.  Define as empty so that the function
 665    is not declared before the .ent directive elsewhere.  */
 666 #undef ASM_DECLARE_FUNCTION_NAME
 667 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)
 668
 669 #undef ASM_DECLARE_OBJECT_NAME
 670 #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL)   \
 671   do {                                                \
 672     assemble_name (STREAM, NAME);                     \
 673     fprintf (STREAM, ":\n");                          \
 674   } while (0)
 675
 676 /* This says how to output an external.  It would be possible not to
 677    output anything and let undefined symbol become external. However
 678    the assembler uses length information on externals to allocate in
 679    data/sdata bss/sbss, thereby saving exec time.  */
 680 #undef ASM_OUTPUT_EXTERNAL
 681 #define ASM_OUTPUT_EXTERNAL(STREAM, DECL, NAME) \
 682   score_output_external (STREAM, DECL, NAME)
 683
 684 /* This handles the magic '..CURRENT_FUNCTION' symbol, which means
 685    'the start of the function that this code is output in'.  */
 686 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
 687   fprintf ((STREAM), "%s", (NAME))
 688
 689 /* Local compiler-generated symbols must have a prefix that the assembler
 690    understands.  */
 691 #define LOCAL_LABEL_PREFIX              (TARGET_SCORE7 ? "." : "$")
 692
 693 #undef ASM_GENERATE_INTERNAL_LABEL
 694 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
 695   sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long) (NUM))
 696
 697 /* Output of Assembler Instructions.  */
 698 #define REGISTER_NAMES                                                    \
 699 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",                         \
 700   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",                   \
 701   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",                 \
 702   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",                 \
 703                                                                           \
 704   "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",                 \
 705   "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15",           \
 706                                                                           \
 707   "ceh", "cel", "sr0", "sr1", "sr2", "_arg", "_frame", "",                \
 708   "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",         \
 709                                                                           \
 710   "c1r0", "c1r1", "c1r2", "c1r3", "c1r4", "c1r5", "c1r6", "c1r7",         \
 711   "c1r8", "c1r9", "c1r10", "c1r11", "c1r12", "c1r13", "c1r14", "c1r15",   \
 712   "c1r16", "c1r17", "c1r18", "c1r19", "c1r20", "c1r21", "c1r22", "c1r23", \
 713   "c1r24", "c1r25", "c1r26", "c1r27", "c1r28", "c1r29", "c1r30", "c1r31", \
 714                                                                           \
 715   "c2r0", "c2r1", "c2r2", "c2r3", "c2r4", "c2r5", "c2r6", "c2r7",         \
 716   "c2r8", "c2r9", "c2r10", "c2r11", "c2r12", "c2r13", "c2r14", "c2r15",   \
 717   "c2r16", "c2r17", "c2r18", "c2r19", "c2r20", "c2r21", "c2r22", "c2r23", \
 718   "c2r24", "c2r25", "c2r26", "c2r27", "c2r28", "c2r29", "c2r30", "c2r31", \
 719                                                                           \
 720   "c3r0", "c3r1", "c3r2", "c3r3", "c3r4", "c3r5", "c3r6", "c3r7",         \
 721   "c3r8", "c3r9", "c3r10", "c3r11", "c3r12", "c3r13", "c3r14", "c3r15",   \
 722   "c3r16", "c3r17", "c3r18", "c3r19", "c3r20", "c3r21", "c3r22", "c3r23", \
 723   "c3r24", "c3r25", "c3r26", "c3r27", "c3r28", "c3r29", "c3r30", "c3r31", \
 724 }
 725
 726 /* Print operand X (an rtx) in assembler syntax to file FILE.  */
 727 #define PRINT_OPERAND(STREAM, X, CODE)  score_print_operand (STREAM, X, CODE)
 728
 729 /* A C expression which evaluates to true if CODE is a valid
 730    punctuation character for use in the `PRINT_OPERAND' macro.  */
 731 #define PRINT_OPERAND_PUNCT_VALID_P(C)  ((C) == '[' || (C) == ']')
 732
 733 /* Print a memory address as an operand to reference that memory location.  */
 734 #define PRINT_OPERAND_ADDRESS(STREAM, X) \
 735   score_print_operand_address (STREAM, X)
 736
 737 /* By default on the S+core, external symbols do not have an underscore
 738    prepended.  */
 739 #define USER_LABEL_PREFIX        ""
 740
 741 /* This is how to output an insn to push a register on the stack.  */
 742 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)           \
 743   do {                                               \
 744     if (TARGET_SCORE7)                               \
 745         fprintf (STREAM, "\tpush! %s,[%s]\n",        \
 746                  reg_names[REGNO],                   \
 747                  reg_names[STACK_POINTER_REGNUM]);   \
 748   } while (0)
 749
 750 /* This is how to output an insn to pop a register from the stack.  */
 751 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)            \
 752   do {                                               \
 753     if (TARGET_SCORE7)                               \
 754       fprintf (STREAM, "\tpop! %s,[%s]\n",           \
 755                reg_names[REGNO],                     \
 756                reg_names[STACK_POINTER_REGNUM]);     \
 757   } while (0)
 758
 759 /* Output of Dispatch Tables.  */
 760 /* This is how to output an element of a case-vector.  We can make the
 761    entries PC-relative in GP-relative when .gp(d)word is supported.  */
 762 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)                \
 763   do {                                                                    \
 764     if (TARGET_SCORE7)                                                    \
 765       if (flag_pic)                                                       \
 766         fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
 767       else                                                                \
 768         fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE);   \
 769   } while (0)
 770
 771 /* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL.  */
 772 #define ADDR_VEC_ALIGN(JUMPTABLE) (GET_MODE (PATTERN (JUMPTABLE)) == SImode ? 2 \
 773                                    : GET_MODE (PATTERN (JUMPTABLE)) == HImode ? 1 : 0)
 774
 775 /* This is how to output a label which precedes a jumptable.  Since
 776    Score3 instructions are 2 bytes, we may need explicit alignment here.  */
 777 #undef  ASM_OUTPUT_CASE_LABEL
 778 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE)             \
 779   do {                                                                  \
 780       if ((TARGET_SCORE7) && GET_MODE (PATTERN (JUMPTABLE)) == SImode)  \
 781         ASM_OUTPUT_ALIGN (FILE, 2);                                     \
 782       (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM);            \
 783   } while (0)
 784
 785 /* Specify the machine mode that this machine uses
 786    for the index in the tablejump instruction.  */
 787 #define CASE_VECTOR_MODE                SImode
 788
 789 /* This is how to output an element of a case-vector that is absolute.  */
 790 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
 791   fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE)
 792
 793 /* Assembler Commands for Exception Regions  */
 794 /* Since the S+core is encoded in the least-significant bit
 795    of the address, mask it off return addresses for purposes of
 796    finding exception handling regions.  */
 797 #define MASK_RETURN_ADDR               constm1_rtx
 798
 799 /* Assembler Commands for Alignment  */
 800 /* This is how to output an assembler line to advance the location
 801    counter by SIZE bytes.  */
 802 #undef ASM_OUTPUT_SKIP
 803 #define ASM_OUTPUT_SKIP(STREAM, SIZE) \
 804   fprintf (STREAM, "\t.space\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
 805
 806 /* This is how to output an assembler line
 807    that says to advance the location counter
 808    to a multiple of 2**LOG bytes.  */
 809 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
 810   fprintf (STREAM, "\t.align\t%d\n", (LOG))
 811
 812 /* Macros Affecting All Debugging Formats.  */
 813 #ifndef PREFERRED_DEBUGGING_TYPE
 814 #define PREFERRED_DEBUGGING_TYPE         DWARF2_DEBUG
 815 #endif
 816
 817 /* Specific Options for DBX Output.  */
 818 #define DBX_DEBUGGING_INFO              1
 819
 820 /* By default, turn on GDB extensions.  */
 821 #define DEFAULT_GDB_EXTENSIONS          1
 822
 823 #define DBX_CONTIN_LENGTH               0
 824
 825 /* File Names in DBX Format.  */
 826 #define DWARF2_DEBUGGING_INFO           1
 827
 828 /* The DWARF 2 CFA column which tracks the return address.  */
 829 #define DWARF_FRAME_RETURN_COLUMN       3
 830
 831 /* Define if operations between registers always perform the operation
 832    on the full register even if a narrower mode is specified.  */
 833 #define WORD_REGISTER_OPERATIONS
 834
 835 /*  All references are zero extended.  */
 836 #define LOAD_EXTEND_OP(MODE)            ZERO_EXTEND
 837
 838 /* Define if loading short immediate values into registers sign extends.  */
 839 #define SHORT_IMMEDIATES_SIGN_EXTEND
 840
 841 /* Max number of bytes we can move from memory to memory
 842    in one reasonably fast instruction.  */
 843 #define MOVE_MAX                        4
 844
 845 /* Define this to be nonzero if shift instructions ignore all but the low-order
 846    few bits.  */
 847 #define SHIFT_COUNT_TRUNCATED           1
 848
 849 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
 850    is done just by pretending it is already truncated.  */
 851 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 852
 853 /* Specify the machine mode that pointers have.
 854    After generation of rtl, the compiler makes no further distinction
 855    between pointers and any other objects of this machine mode.  */
 856 #define Pmode                           SImode
 857
 858 /* Give call MEMs SImode since it is the "most permissive" mode
 859    for 32-bit targets.  */
 860 #define FUNCTION_MODE                   Pmode
 861
 862 struct GTY ((chain_next ("%h.next"))) extern_list
 863 {
 864   struct extern_list *next;             /* next external  */
 865   const char *name;                     /* name of the external  */
 866   int size;                             /* size in bytes  */
 867 };
 868
 869 extern GTY (()) struct extern_list      *extern_head;