gcc/config/spu/spu.h

   1 /* Copyright (C) 2006-2017 Free Software Foundation, Inc.
   2
   3    This file is free software; you can redistribute it and/or modify it under
   4    the terms of the GNU General Public License as published by the Free
   5    Software Foundation; either version 3 of the License, or (at your option)
   6    any later version.
   7
   8    This file is distributed in the hope that it will be useful, but WITHOUT
   9    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  11    for more details.
  12
  13    You should have received a copy of the GNU General Public License
  14    along with GCC; see the file COPYING3.  If not see
  15    <http://www.gnu.org/licenses/>.  */
  16
  17 \f
  18 /* Run-time Target */
  19 #define TARGET_CPU_CPP_BUILTINS()       spu_cpu_cpp_builtins(pfile)
  20
  21 #define C_COMMON_OVERRIDE_OPTIONS spu_c_common_override_options()
  22
  23 #define INIT_EXPANDERS spu_init_expanders()
  24
  25 /* Which processor to generate code or schedule for.  */
  26 enum processor_type
  27 {
  28   PROCESSOR_CELL,
  29   PROCESSOR_CELLEDP
  30 };
  31
  32 extern GTY(()) int spu_arch;
  33 extern GTY(()) int spu_tune;
  34
  35 /* Support for a compile-time default architecture and tuning.  The rules are:
  36    --with-arch is ignored if -march is specified.
  37    --with-tune is ignored if -mtune is specified.  */
  38 #define OPTION_DEFAULT_SPECS \
  39   {"arch", "%{!march=*:-march=%(VALUE)}" }, \
  40   {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
  41
  42 /* Default target_flags if no switches specified.  */
  43 #ifndef TARGET_DEFAULT
  44 #define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS \
  45                         | MASK_SAFE_HINTS | MASK_ADDRESS_SPACE_CONVERSION)
  46 #endif
  47
  48 \f
  49 /* Storage Layout */
  50
  51 #define BITS_BIG_ENDIAN 1
  52
  53 #define BYTES_BIG_ENDIAN 1
  54
  55 #define WORDS_BIG_ENDIAN 1
  56
  57 /* GCC uses word_mode in many places, assuming that it is the fastest
  58    integer mode.  That is not the case for SPU though.  We can't use
  59    32 here because (of some reason I can't remember.) */
  60 #define BITS_PER_WORD 128
  61
  62 #define UNITS_PER_WORD (BITS_PER_WORD/BITS_PER_UNIT)
  63
  64 /* When building libgcc, we need to assume 4 words per units even
  65    though UNITS_PER_WORD is 16, because the SPU has basically a 32-bit
  66    instruction set although register size is 128 bits.  In particular,
  67    this causes libgcc to contain __divdi3 instead of __divti3 etc.
  68    However, we allow this default to be re-defined on the command
  69    line, so that we can use the LIB2_SIDITI_CONV_FUNCS mechanism
  70    to get (in addition) TImode versions of some routines.  */
  71 #ifndef LIBGCC2_UNITS_PER_WORD
  72 #define LIBGCC2_UNITS_PER_WORD 4
  73 #endif
  74
  75 #define POINTER_SIZE 32
  76
  77 #define PARM_BOUNDARY 128
  78
  79 #define STACK_BOUNDARY 128
  80
  81 /* We want it 8-byte aligned so we can properly use dual-issue
  82    instructions, which can only happen on an 8-byte aligned address. */
  83 #define FUNCTION_BOUNDARY 64
  84
  85 /* We would like to allow a larger alignment for data objects (for DMA)
  86    but the aligned attribute is limited by BIGGEST_ALIGNMENT.  We don't
  87    define BIGGEST_ALIGNMENT as larger because it is used in other places
  88    and would end up wasting space.  (Is this still true?)  */
  89 #define BIGGEST_ALIGNMENT 128
  90
  91 #define MINIMUM_ATOMIC_ALIGNMENT 128
  92
  93 /* Make all static objects 16-byte aligned.  This allows us to assume
  94    they are also padded to 16-bytes, which means we can use a single
  95    load or store instruction to access them.  Do the same for objects
  96    on the stack.  (Except a bug (?) allows some stack objects to be
  97    unaligned.)  */
  98 #define DATA_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
  99 #define CONSTANT_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
 100 #define LOCAL_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
 101
 102 #define EMPTY_FIELD_BOUNDARY 32
 103
 104 #define STRICT_ALIGNMENT 1
 105
 106 /* symbol_ref's of functions are not aligned to 16 byte boundary. */
 107 #define ALIGNED_SYMBOL_REF_P(X) \
 108         (GET_CODE (X) == SYMBOL_REF \
 109           && (SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN1) == 0 \
 110           && (! SYMBOL_REF_FUNCTION_P (X) \
 111               || align_functions >= 16))
 112
 113 #define PCC_BITFIELD_TYPE_MATTERS 1
 114
 115 #define MAX_FIXED_MODE_SIZE 128
 116
 117 #define STACK_SAVEAREA_MODE(save_level) \
 118   (save_level == SAVE_FUNCTION ? VOIDmode \
 119     : save_level == SAVE_NONLOCAL ? SImode \
 120       : Pmode)
 121
 122 #define STACK_SIZE_MODE SImode
 123
 124 \f
 125 /* Type Layout */
 126
 127 #define INT_TYPE_SIZE 32
 128
 129 #define LONG_TYPE_SIZE 32
 130
 131 #define LONG_LONG_TYPE_SIZE 64
 132
 133 #define FLOAT_TYPE_SIZE 32
 134
 135 #define DOUBLE_TYPE_SIZE 64
 136
 137 #define LONG_DOUBLE_TYPE_SIZE 64
 138
 139 #define DEFAULT_SIGNED_CHAR 0
 140
 141 #define STDINT_LONG32 0
 142
 143 \f
 144 /* Register Basics */
 145
 146 /* 128-130 are special registers that never appear in assembly code. */
 147 #define FIRST_PSEUDO_REGISTER 131
 148
 149 #define FIXED_REGISTERS {                           \
 150     1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 151     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 152     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 153     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 154     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 155     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 156     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 157     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 158     1, 1, 1 \
 159 }
 160
 161 #define CALL_USED_REGISTERS {                       \
 162     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 163     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 164     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 165     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 166     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 167     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 168     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 169     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 170     1, 1, 1 \
 171 }
 172
 173 \f
 174 /* Values in Registers */
 175
 176 #define HARD_REGNO_NREGS(REGNO, MODE)   \
 177     ((GET_MODE_BITSIZE(MODE)+MAX_FIXED_MODE_SIZE-1)/MAX_FIXED_MODE_SIZE)
 178
 179 \f
 180 /* Register Classes */
 181
 182 enum reg_class {
 183    NO_REGS,
 184    GENERAL_REGS,
 185    ALL_REGS,
 186    LIM_REG_CLASSES
 187 };
 188
 189 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 190
 191 #define REG_CLASS_NAMES \
 192 {  "NO_REGS", \
 193    "GENERAL_REGS", \
 194    "ALL_REGS" \
 195 }
 196
 197 #define REG_CLASS_CONTENTS { \
 198     {0, 0, 0, 0, 0}, /* no regs */ \
 199     {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}, /* general regs */ \
 200     {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}} /* all regs */
 201
 202 #define REGNO_REG_CLASS(REGNO) ((void)(REGNO), GENERAL_REGS)
 203
 204
 205 #define BASE_REG_CLASS GENERAL_REGS
 206
 207 #define INDEX_REG_CLASS GENERAL_REGS
 208
 209 #define REGNO_OK_FOR_BASE_P(regno) \
 210    ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
 211
 212 #define REGNO_OK_FOR_INDEX_P(regno)  \
 213    ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
 214
 215 #define INT_REG_OK_FOR_INDEX_P(X,STRICT) \
 216         ((!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X))))
 217 #define INT_REG_OK_FOR_BASE_P(X,STRICT) \
 218         ((!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X))))
 219
 220 /* GCC assumes that modes are in the lowpart of a register, which is
 221    only true for SPU. */
 222 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
 223         ((GET_MODE_SIZE (FROM) > 4 || GET_MODE_SIZE (TO) > 4) \
 224          && (GET_MODE_SIZE (FROM) < 16 || GET_MODE_SIZE (TO) < 16) \
 225          && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
 226
 227 #define REGISTER_TARGET_PRAGMAS() do {                                  \
 228 c_register_addr_space ("__ea", ADDR_SPACE_EA);                          \
 229 targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin;    \
 230 }while (0);
 231
 232 \f
 233 /* Frame Layout */
 234
 235 #define STACK_GROWS_DOWNWARD 1
 236
 237 #define FRAME_GROWS_DOWNWARD 1
 238
 239 #define STARTING_FRAME_OFFSET (0)
 240
 241 #define STACK_POINTER_OFFSET 32
 242
 243 #define FIRST_PARM_OFFSET(FNDECL) (0)
 244
 245 #define DYNAMIC_CHAIN_ADDRESS(FP) plus_constant (Pmode, (FP), -16)
 246
 247 #define RETURN_ADDR_RTX(COUNT,FP) (spu_return_addr (COUNT, FP))
 248
 249 /* Should this be defined?  Would it simplify our implementation. */
 250 /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */
 251
 252 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG(Pmode, LINK_REGISTER_REGNUM)
 253
 254 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGISTER_REGNUM)
 255
 256 #define ARG_POINTER_CFA_OFFSET(FNDECL) \
 257   (crtl->args.pretend_args_size - STACK_POINTER_OFFSET)
 258
 259 \f
 260 /* Stack Checking */
 261
 262 /* We store the Available Stack Size in the second slot of the stack
 263    register.   We emit stack checking code during the prologue.  */
 264 #define STACK_CHECK_BUILTIN 1
 265
 266 \f
 267 /* Frame Registers, and other registers */
 268
 269 #define STACK_POINTER_REGNUM 1
 270
 271 /* Will be eliminated. */
 272 #define FRAME_POINTER_REGNUM 128
 273
 274 /* This is not specified in any ABI, so could be set to anything. */
 275 #define HARD_FRAME_POINTER_REGNUM 127
 276
 277 /* Will be eliminated. */
 278 #define ARG_POINTER_REGNUM 129
 279
 280 #define STATIC_CHAIN_REGNUM 2
 281
 282 #define LINK_REGISTER_REGNUM 0
 283
 284 /* Used to keep track of instructions that have clobbered the hint
 285  * buffer.  Users can also specify it in inline asm. */
 286 #define HBR_REGNUM 130
 287
 288 #define MAX_REGISTER_ARGS    72
 289 #define FIRST_ARG_REGNUM     3
 290 #define LAST_ARG_REGNUM      (FIRST_ARG_REGNUM + MAX_REGISTER_ARGS - 1)
 291
 292 #define MAX_REGISTER_RETURN  72
 293 #define FIRST_RETURN_REGNUM  3
 294 #define LAST_RETURN_REGNUM   (FIRST_RETURN_REGNUM + MAX_REGISTER_RETURN - 1)
 295
 296 \f
 297 /* Elimination */
 298
 299 #define ELIMINABLE_REGS  \
 300   {{ARG_POINTER_REGNUM,  STACK_POINTER_REGNUM},                         \
 301   {ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},                    \
 302   {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \
 303   {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 304
 305 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 306   ((OFFSET) = spu_initial_elimination_offset((FROM),(TO)))
 307
 308 \f
 309 /* Stack Arguments */
 310
 311 #define ACCUMULATE_OUTGOING_ARGS 1
 312
 313 #define REG_PARM_STACK_SPACE(FNDECL) 0
 314
 315 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
 316
 317 \f
 318 /* Register Arguments */
 319
 320 #define CUMULATIVE_ARGS int
 321
 322 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
 323                 ((CUM) = 0)
 324
 325 /* The SPU ABI wants 32/64-bit types at offset 0 in the quad-word on the
 326    stack.  8/16-bit types should be at offsets 3/2 respectively.  */
 327 #define FUNCTION_ARG_OFFSET(MODE, TYPE)                                 \
 328 (((TYPE) && INTEGRAL_TYPE_P (TYPE) && GET_MODE_SIZE (MODE) < 4)         \
 329  ? (4 - GET_MODE_SIZE (MODE))                                           \
 330  : 0)
 331
 332 #define PAD_VARARGS_DOWN 0
 333
 334 #define FUNCTION_ARG_REGNO_P(N) ((N) >= (FIRST_ARG_REGNUM) && (N) <= (LAST_ARG_REGNUM))
 335 \f
 336 /* Scalar Return */
 337
 338 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 339         (spu_function_value((VALTYPE),(FUNC)))
 340
 341 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RETURN_REGNUM)
 342
 343 #define FUNCTION_VALUE_REGNO_P(N) ((N) >= (FIRST_RETURN_REGNUM) && (N) <= (LAST_RETURN_REGNUM))
 344
 345 \f
 346 /* Machine-specific symbol_ref flags.  */
 347 #define SYMBOL_FLAG_ALIGN1      (SYMBOL_FLAG_MACH_DEP << 0)
 348 \f
 349 /* Aggregate Return */
 350
 351 #define DEFAULT_PCC_STRUCT_RETURN 0
 352
 353 \f
 354 /* Function Entry */
 355
 356 #define EXIT_IGNORE_STACK 0
 357
 358 #define EPILOGUE_USES(REGNO) ((REGNO)==1 ? 1 : 0)
 359
 360 \f
 361 /* Profiling */
 362
 363 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 364   spu_function_profiler ((FILE), (LABELNO));
 365
 366 #define NO_PROFILE_COUNTERS 1
 367
 368 #define PROFILE_BEFORE_PROLOGUE 1
 369
 370 \f
 371 /* Trampolines */
 372
 373 #define TRAMPOLINE_SIZE (TARGET_LARGE_MEM ? 20 : 16)
 374
 375 #define TRAMPOLINE_ALIGNMENT 128
 376 \f
 377 /* Addressing Modes */
 378
 379 #define CONSTANT_ADDRESS_P(X)   spu_constant_address_p(X)
 380
 381 #define MAX_REGS_PER_ADDRESS 2
 382
 383 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN)      \
 384 do {                                                                    \
 385   rtx new_rtx = spu_legitimize_reload_address (AD, MODE, OPNUM,         \
 386                                                (int)(TYPE));            \
 387   if (new_rtx)                                                          \
 388     {                                                                   \
 389       (AD) = new_rtx;                                                   \
 390       goto WIN;                                                         \
 391     }                                                                   \
 392 } while (0)
 393
 394 \f
 395 /* Costs */
 396
 397 #define BRANCH_COST(speed_p, predictable_p) spu_branch_cost
 398
 399 #define SLOW_BYTE_ACCESS 0
 400
 401 #define MOVE_RATIO(speed) ((speed)? 32 : 4)
 402
 403 #define NO_FUNCTION_CSE 1
 404
 405 \f
 406 /* Sections */
 407
 408 #define TEXT_SECTION_ASM_OP ".text"
 409
 410 #define DATA_SECTION_ASM_OP ".data"
 411
 412 #define JUMP_TABLES_IN_TEXT_SECTION 1
 413
 414 \f
 415 /* PIC */
 416 #define PIC_OFFSET_TABLE_REGNUM 126
 417
 418 \f
 419 /* File Framework */
 420
 421 #define ASM_APP_ON ""
 422
 423 #define ASM_APP_OFF ""
 424
 425 \f
 426 /* Uninitialized Data */
 427 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)  \
 428 ( fputs (".comm ", (FILE)),                     \
 429   assemble_name ((FILE), (NAME)),               \
 430   fprintf ((FILE), ",%d\n", (ROUNDED)))
 431
 432 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)  \
 433 ( fputs (".lcomm ", (FILE)),                    \
 434   assemble_name ((FILE), (NAME)),               \
 435   fprintf ((FILE), ",%d\n", (ROUNDED)))
 436
 437 \f
 438 /* Label Output */
 439 #define ASM_OUTPUT_LABEL(FILE,NAME)     \
 440   do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
 441
 442 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
 443   asm_fprintf (FILE, "%U%s", default_strip_name_encoding (NAME))
 444
 445 #define ASM_OUTPUT_SYMBOL_REF(FILE, X) \
 446   do                                                    \
 447     {                                                   \
 448       tree decl;                                        \
 449       assemble_name (FILE, XSTR ((X), 0));              \
 450       if ((decl = SYMBOL_REF_DECL ((X))) != 0           \
 451           && TREE_CODE (decl) == VAR_DECL               \
 452           && TYPE_ADDR_SPACE (TREE_TYPE (decl)))        \
 453         fputs ("@ppu", FILE);                           \
 454     } while (0)
 455
 456 \f
 457 /* Instruction Output */
 458 #define REGISTER_NAMES \
 459 {"$lr", "$sp", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
 460  "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", \
 461  "$32", "$33", "$34", "$35", "$36", "$37", "$38", "$39", "$40", "$41", "$42", "$43", "$44", "$45", "$46", "$47", \
 462  "$48", "$49", "$50", "$51", "$52", "$53", "$54", "$55", "$56", "$57", "$58", "$59", "$60", "$61", "$62", "$63", \
 463  "$64", "$65", "$66", "$67", "$68", "$69", "$70", "$71", "$72", "$73", "$74", "$75", "$76", "$77", "$78", "$79", \
 464  "$80", "$81", "$82", "$83", "$84", "$85", "$86", "$87", "$88", "$89", "$90", "$91", "$92", "$93", "$94", "$95", \
 465  "$96", "$97", "$98", "$99", "$100", "$101", "$102", "$103", "$104", "$105", "$106", "$107", "$108", "$109", "$110", "$111", \
 466  "$112", "$113", "$114", "$115", "$116", "$117", "$118", "$119", "$120", "$121", "$122", "$123", "$124", "$125", "$126", "$127", \
 467  "$vfp", "$vap", "hbr" \
 468 }
 469
 470 #define PRINT_OPERAND(FILE, X, CODE)  print_operand(FILE, X, CODE)
 471
 472 #define PRINT_OPERAND_ADDRESS(FILE, ADDR)  \
 473  print_operand_address (FILE, ADDR)
 474
 475 #define LOCAL_LABEL_PREFIX "."
 476
 477 #define USER_LABEL_PREFIX ""
 478
 479 #define ASM_COMMENT_START "#"
 480
 481 \f
 482 /* Dispatch Tables */
 483
 484 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)  \
 485   fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL)
 486
 487 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)  \
 488   fprintf (FILE, "\t.word .L%d\n", VALUE)
 489
 490 \f
 491 /* Alignment Output */
 492
 493 #define ASM_OUTPUT_ALIGN(FILE,LOG)  \
 494   do { if (LOG!=0) fprintf (FILE, "\t.align\t%d\n", (LOG)); } while (0)
 495
 496 \f
 497 /* Misc */
 498
 499 #define CASE_VECTOR_MODE SImode
 500
 501 #define MOVE_MAX 16
 502
 503 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) ((INPREC) <= 32 && (OUTPREC) <= (INPREC))
 504
 505 #define STORE_FLAG_VALUE -1
 506
 507 #define Pmode SImode
 508
 509 #define FUNCTION_MODE QImode
 510
 511 #define NO_IMPLICIT_EXTERN_C 1
 512
 513
 514 /* Address spaces.  */
 515 #define ADDR_SPACE_EA   1
 516
 517
 518 /* Builtins.  */
 519
 520 enum spu_builtin_type
 521 {
 522   B_INSN,
 523   B_JUMP,
 524   B_BISLED,
 525   B_CALL,
 526   B_HINT,
 527   B_OVERLOAD,
 528   B_INTERNAL
 529 };
 530
 531 struct spu_builtin_description
 532 {
 533   int fcode;
 534   int icode;
 535   const char *name;
 536   enum spu_builtin_type type;
 537
 538   /* The first element of parm is always the return type.  The rest
 539      are a zero terminated list of parameters.  */
 540   int parm[5];
 541 };
 542
 543 extern struct spu_builtin_description spu_builtins[];
 544