Turn SLOW_UNALIGNED_ACCESS into a target hook
[official-gcc.git] / gcc / config / riscv / riscv-opts.h
blob2b19233379c05c2a71b0e4d98c9e98ce3bf1d502
1 /* Definition of RISC-V target for GNU compiler.
2 Copyright (C) 2016-2017 Free Software Foundation, Inc.
3 Contributed by Andrew Waterman (andrew@sifive.com).
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
12 GCC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #ifndef GCC_RISCV_OPTS_H
22 #define GCC_RISCV_OPTS_H
24 enum riscv_abi_type {
25 ABI_ILP32,
26 ABI_ILP32F,
27 ABI_ILP32D,
28 ABI_LP64,
29 ABI_LP64F,
30 ABI_LP64D
32 extern enum riscv_abi_type riscv_abi;
34 enum riscv_code_model {
35 CM_MEDLOW,
36 CM_MEDANY,
37 CM_PIC
39 extern enum riscv_code_model riscv_cmodel;
41 #endif /* ! GCC_RISCV_OPTS_H */