1 ;; Falkor pipeline description
2 ;; Copyright (C) 2017 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify it
7 ;; under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful, but
12 ;; WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 ;; General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 (define_automaton "falkor")
22 ;; Complex int instructions (e.g. multiply and divide) execute in the X
23 ;; pipeline. Simple int instructions execute in the X, Y, and Z pipelines.
25 (define_cpu_unit "falkor_x" "falkor")
26 (define_cpu_unit "falkor_y" "falkor")
27 (define_cpu_unit "falkor_z" "falkor")
29 ;; Branches execute in the B pipeline or in one of the int pipelines depending
30 ;; on how complex it is. Simple int insns (like movz) can also execute here.
32 (define_cpu_unit "falkor_b" "falkor")
34 ;; Vector and FP insns execute in the VX and VY pipelines.
36 (define_automaton "falkor_vfp")
38 (define_cpu_unit "falkor_vx" "falkor_vfp")
39 (define_cpu_unit "falkor_vy" "falkor_vfp")
41 ;; Loads execute in the LD pipeline.
42 ;; Stores execute in the ST, SD, and VSD pipelines, for address, data, and
45 (define_automaton "falkor_mem")
47 (define_cpu_unit "falkor_ld" "falkor_mem")
48 (define_cpu_unit "falkor_st" "falkor_mem")
49 (define_cpu_unit "falkor_sd" "falkor_mem")
50 (define_cpu_unit "falkor_vsd" "falkor_mem")
52 ;; The GTOV and VTOG pipelines are for general to vector reg moves, and vice
55 (define_cpu_unit "falkor_gtov" "falkor")
56 (define_cpu_unit "falkor_vtog" "falkor")
58 ;; Common reservation combinations.
60 (define_reservation "falkor_vxvy" "falkor_vx|falkor_vy")
61 (define_reservation "falkor_zb" "falkor_z|falkor_b")
62 (define_reservation "falkor_xyz" "falkor_x|falkor_y|falkor_z")
63 (define_reservation "falkor_xyzb" "falkor_x|falkor_y|falkor_z|falkor_b")
65 ;; SIMD Floating-Point Instructions
67 (define_insn_reservation "falkor_afp_1_vxvy" 1
68 (and (eq_attr "tune" "falkor")
69 (eq_attr "type" "neon_fp_neg_s,neon_fp_neg_d,neon_fp_abs_s,neon_fp_abs_d"))
72 (define_insn_reservation "falkor_afp_1_vxvy_vxvy" 1
73 (and (eq_attr "tune" "falkor")
74 (eq_attr "type" "neon_fp_neg_s_q,neon_fp_neg_d_q,neon_fp_abs_s_q,neon_fp_abs_d_q"))
75 "falkor_vxvy+falkor_vxvy")
77 (define_insn_reservation "falkor_afp_2_vxvy" 2
78 (and (eq_attr "tune" "falkor")
79 (eq_attr "type" "neon_fp_minmax_s,neon_fp_minmax_d,neon_fp_reduc_minmax_s,neon_fp_reduc_minmax_d,neon_fp_compare_s,neon_fp_compare_d,neon_fp_round_s,neon_fp_round_d"))
82 (define_insn_reservation "falkor_afp_2_vxvy_vxvy" 2
83 (and (eq_attr "tune" "falkor")
84 (eq_attr "type" "neon_fp_minmax_s_q,neon_fp_minmax_d_q,neon_fp_compare_s_q,neon_fp_compare_d_q,neon_fp_round_s_q,neon_fp_round_d_q"))
85 "falkor_vxvy+falkor_vxvy")
87 (define_insn_reservation "falkor_afp_3_vxvy" 3
88 (and (eq_attr "tune" "falkor")
89 (eq_attr "type" "neon_fp_reduc_minmax_s_q,neon_fp_reduc_minmax_d_q,neon_fp_abd_s,neon_fp_abd_d,neon_fp_addsub_s,neon_fp_addsub_d,neon_fp_reduc_add_s,neon_fp_reduc_add_d"))
92 (define_insn_reservation "falkor_afp_3_vxvy_vxvy" 3
93 (and (eq_attr "tune" "falkor")
94 (eq_attr "type" "neon_fp_abd_s_q,neon_fp_abd_d_q,neon_fp_addsub_s_q,neon_fp_addsub_d_q,neon_fp_reduc_add_s_q,neon_fp_reduc_add_d_q"))
95 "falkor_vxvy+falkor_vxvy")
97 (define_insn_reservation "falkor_afp_4_vxvy" 4
98 (and (eq_attr "tune" "falkor")
99 (eq_attr "type" "neon_fp_to_int_s,neon_fp_to_int_d,neon_int_to_fp_s,neon_int_to_fp_d,neon_fp_cvt_widen_h,neon_fp_cvt_widen_s"))
102 (define_insn_reservation "falkor_afp_4_vxvy_vxvy" 4
103 (and (eq_attr "tune" "falkor")
104 (eq_attr "type" "neon_fp_to_int_s_q,neon_fp_to_int_d_q,neon_int_to_fp_s_q,neon_int_to_fp_d_q"))
105 "falkor_vxvy+falkor_vxvy")
107 (define_insn_reservation "falkor_afp_5_vxvy_mul" 5
108 (and (eq_attr "tune" "falkor")
109 (eq_attr "type" "neon_fp_mul_s,neon_fp_mul_s_scalar"))
112 (define_insn_reservation "falkor_afp_5_vxvy_mla" 5
113 (and (eq_attr "tune" "falkor")
114 (eq_attr "type" "neon_fp_mla_s,neon_fp_mla_s_scalar"))
117 (define_insn_reservation "falkor_afp_5_vxvy_vxvy_mul" 5
118 (and (eq_attr "tune" "falkor")
119 (eq_attr "type" "neon_fp_mul_s_q,neon_fp_mul_s_scalar_q"))
122 (define_insn_reservation "falkor_afp_5_vxvy_vxvy_mla" 5
123 (and (eq_attr "tune" "falkor")
124 (eq_attr "type" "neon_fp_mla_s_q,neon_fp_mla_s_scalar_q"))
127 (define_insn_reservation "falkor_afp_6_vxvy_mul" 6
128 (and (eq_attr "tune" "falkor")
129 (eq_attr "type" "neon_fp_mul_d"))
132 (define_insn_reservation "falkor_afp_6_vxvy_mla" 6
133 (and (eq_attr "tune" "falkor")
134 (eq_attr "type" "neon_fp_mla_d"))
137 (define_insn_reservation "falkor_afp_6_vxvy_vxvy_mul" 6
138 (and (eq_attr "tune" "falkor")
139 (eq_attr "type" "neon_fp_mul_d_q,neon_fp_mul_d_scalar_q"))
140 "falkor_vxvy+falkor_vxvy")
142 (define_insn_reservation "falkor_afp_6_vxvy_vxvy_mla" 6
143 (and (eq_attr "tune" "falkor")
144 (eq_attr "type" "neon_fp_mla_d_q,neon_fp_mla_d_scalar_q"))
145 "falkor_vxvy+falkor_vxvy")
147 (define_insn_reservation "falkor_afp_4_vxvy_vxvy_vxvy" 4
148 (and (eq_attr "tune" "falkor")
149 (eq_attr "type" "neon_fp_cvt_narrow_s_q,neon_fp_cvt_narrow_d_q"))
150 "falkor_vxvy+falkor_vxvy,falkor_vxvy")
152 (define_insn_reservation "falkor_afp_6_vx_vy" 6
153 (and (eq_attr "tune" "falkor")
154 (eq_attr "type" "neon_fp_div_s"))
155 "falkor_vx+falkor_vy")
157 (define_insn_reservation "falkor_afp_11_vx_vy" 11
158 (and (eq_attr "tune" "falkor")
159 (eq_attr "type" "neon_fp_div_d"))
160 "falkor_vx+falkor_vy")
162 (define_insn_reservation "falkor_afp_6_vx_vy_vx_vy" 6
163 (and (eq_attr "tune" "falkor")
164 (eq_attr "type" "neon_fp_div_s_q"))
165 "(falkor_vx+falkor_vy),(falkor_vx+falkor_vy)")
167 (define_insn_reservation "falkor_afp_11_vx_vy_vx_vy" 11
168 (and (eq_attr "tune" "falkor")
169 (eq_attr "type" "neon_fp_div_d_q"))
170 "(falkor_vx+falkor_vy),(falkor_vx+falkor_vy)")
172 (define_insn_reservation "falkor_afp_12_vx_vy" 12
173 (and (eq_attr "tune" "falkor")
174 (eq_attr "type" "neon_fp_sqrt_s"))
175 "falkor_vx+falkor_vy")
177 (define_insn_reservation "falkor_afp_22_vx_vy" 22
178 (and (eq_attr "tune" "falkor")
179 (eq_attr "type" "neon_fp_sqrt_d"))
180 "falkor_vx+falkor_vy")
182 (define_insn_reservation "falkor_afp_12_vx_vy_vx_vy" 12
183 (and (eq_attr "tune" "falkor")
184 (eq_attr "type" "neon_fp_sqrt_s_q"))
185 "(falkor_vx+falkor_vy),(falkor_vx+falkor_vy)")
187 (define_insn_reservation "falkor_afp_22_vx_vy_vx_vy" 22
188 (and (eq_attr "tune" "falkor")
189 (eq_attr "type" "neon_fp_sqrt_d_q"))
190 "(falkor_vx+falkor_vy),(falkor_vx+falkor_vy)")
192 ;; SIMD Integer Instructions
194 (define_insn_reservation "falkor_ai_1_vxvy" 1
195 (and (eq_attr "tune" "falkor")
196 (eq_attr "type" "neon_add,neon_reduc_add,neon_logic,neon_neg,neon_sub"))
199 (define_insn_reservation "falkor_ai_1_vxvy_vxvy" 1
200 (and (eq_attr "tune" "falkor")
201 (eq_attr "type" "neon_shift_imm_long,neon_add_q,neon_reduc_add_q,neon_logic_q,neon_neg_q,neon_sub_q"))
202 "falkor_vxvy+falkor_vxvy")
204 (define_insn_reservation "falkor_ai_2_vxvy" 2
205 (and (eq_attr "tune" "falkor")
206 (eq_attr "type" "neon_add_long,neon_sub_long,neon_add_halve,neon_sub_halve,neon_shift_imm,neon_shift_reg,neon_minmax,neon_abs,neon_compare,neon_compare_zero,neon_tst"))
209 (define_insn_reservation "falkor_ai_2_vxvy_vxvy" 2
210 (and (eq_attr "tune" "falkor")
211 (eq_attr "type" "neon_add_halve_q,neon_sub_halve_q,neon_shift_imm_q,neon_shift_reg_q,neon_minmax_q,neon_abs_q,neon_compare_q,neon_compare_zero_q,neon_tst_q,neon_reduc_add_long"))
212 "falkor_vxvy+falkor_vxvy")
214 (define_insn_reservation "falkor_ai_3_vxvy" 3
215 (and (eq_attr "tune" "falkor")
216 (eq_attr "type" "neon_shift_acc,neon_reduc_add_acc,neon_abd,neon_qadd,neon_qsub,neon_qabs,neon_qneg,neon_sat_shift_imm,neon_sat_shift_imm_narrow_q,neon_sat_shift_reg,neon_reduc_minmax"))
219 (define_insn_reservation "falkor_ai_4_vxvy" 4
220 (and (eq_attr "tune" "falkor")
221 (eq_attr "type" "neon_reduc_minmax_q"))
224 (define_insn_reservation "falkor_ai_3_vxvy_vxvy" 3
225 (and (eq_attr "tune" "falkor")
226 (eq_attr "type" "neon_shift_acc_q,neon_reduc_add_acc_q,neon_abd_q,neon_abd_long,neon_qadd_q,neon_qsub_q,neon_qabs_q,neon_qneg_q,neon_sat_shift_imm_q,neon_sat_shift_reg_q"))
227 "falkor_vxvy+falkor_vxvy")
229 (define_insn_reservation "falkor_ai_4_vxvy_mul" 4
230 (and (eq_attr "tune" "falkor")
231 (eq_attr "type" "neon_mul_b,neon_mul_h,neon_mul_s,neon_mul_h_scalar,neon_mul_s_scalar,neon_sat_mul_b,neon_sat_mul_h,neon_sat_mul_s,neon_sat_mul_h_scalar,neon_sat_mul_s_scalar"))
234 (define_insn_reservation "falkor_ai_4_vxvy_mla" 4
235 (and (eq_attr "tune" "falkor")
236 (eq_attr "type" "neon_mla_b,neon_mla_h,neon_mla_s,neon_mla_h_scalar,neon_mla_s_scalar"))
239 (define_insn_reservation "falkor_ai_4_vxvy_vxvy_mul" 4
240 (and (eq_attr "tune" "falkor")
241 (eq_attr "type" "neon_mul_b_q,neon_mul_h_q,neon_mul_s_q,neon_mul_h_scalar_q,neon_mul_s_scalar_q,neon_sat_mul_b_q,neon_sat_mul_h_q,neon_sat_mul_s_q,neon_mul_b_long,neon_mul_h_long,neon_mul_s_long,neon_mul_d_long,neon_mul_h_scalar_long,neon_mul_s_scalar_long,neon_sat_mul_b_long,neon_sat_mul_h_long,neon_sat_mul_s_long,neon_sat_mul_h_scalar_q,neon_sat_mul_s_scalar_q,neon_sat_mul_h_scalar_long,neon_sat_mul_s_scalar_long"))
242 "falkor_vxvy+falkor_vxvy")
244 (define_insn_reservation "falkor_ai_4_vxvy_vxvy_mla" 4
245 (and (eq_attr "tune" "falkor")
246 (eq_attr "type" "neon_mla_b_q,neon_mla_h_q,neon_mla_s_q,neon_mla_h_scalar_q,neon_mla_s_scalar_q,neon_mla_b_long,neon_mla_h_long,neon_mla_s_long,neon_mla_h_scalar_long,neon_mla_s_scalar_long,neon_sat_mla_b_long,neon_sat_mla_h_long,neon_sat_mla_s_long,neon_sat_mla_h_scalar_long,neon_sat_mla_s_scalar_long"))
247 "falkor_vxvy+falkor_vxvy")
249 (define_insn_reservation "falkor_ai_4_vxvy_vxvy" 4
250 (and (eq_attr "tune" "falkor")
251 (eq_attr "type" "neon_add_halve_narrow_q,neon_sub_halve_narrow_q,neon_arith_acc"))
252 "falkor_vxvy+falkor_vxvy")
254 (define_insn_reservation "falkor_2_ai_vxvy_vxvy_vxvy_vxvy" 2
255 (and (eq_attr "tune" "falkor")
256 (eq_attr "type" "neon_add_widen,neon_sub_widen"))
257 "(falkor_vxvy+falkor_vxvy),(falkor_vxvy+falkor_vxvy)")
259 (define_insn_reservation "falkor_4_ai_vxvy_vxvy_vxvy_vxvy" 4
260 (and (eq_attr "tune" "falkor")
261 (eq_attr "type" "neon_arith_acc_q"))
262 "(falkor_vxvy+falkor_vxvy),(falkor_vxvy+falkor_vxvy)")
264 ;; SIMD Load Instructions
266 (define_insn_reservation "falkor_ald_4_ld" 4
267 (and (eq_attr "tune" "falkor")
268 (eq_attr "type" "neon_load1_1reg,neon_load1_1reg_q,neon_load1_all_lanes,neon_load2_one_lane"))
271 (define_insn_reservation "falkor_ald_4_ld_none" 4
272 (and (eq_attr "tune" "falkor")
273 (eq_attr "type" "neon_load1_2reg,neon_load2_2reg,neon_load2_all_lanes"))
276 (define_insn_reservation "falkor_ald_4_ld_ld" 4
277 (and (eq_attr "tune" "falkor")
278 (eq_attr "type" "neon_load1_2reg_q,neon_load2_2reg_q,neon_load2_all_lanes_q,neon_load3_one_lane,neon_load4_one_lane,neon_ldp,neon_ldp_q"))
279 "falkor_ld,falkor_ld")
281 (define_insn_reservation "falkor_ald_4_ld_ld_none" 4
282 (and (eq_attr "tune" "falkor")
283 (eq_attr "type" "neon_load1_3reg,neon_load3_3reg,neon_load3_all_lanes"))
284 "falkor_ld,falkor_ld")
286 (define_insn_reservation "falkor_ald_4_ld_ld_ld" 4
287 (and (eq_attr "tune" "falkor")
288 (eq_attr "type" "neon_load1_3reg_q,neon_load3_3reg_q,neon_load3_all_lanes_q"))
289 "falkor_ld,falkor_ld,falkor_ld")
291 (define_insn_reservation "falkor_ald_4_ld_ld_none_none" 4
292 (and (eq_attr "tune" "falkor")
293 (eq_attr "type" "neon_load1_4reg,neon_load4_4reg"))
294 "falkor_ld,falkor_ld")
296 (define_insn_reservation "falkor_ald_4_ld_ld_ld_ld" 4
297 (and (eq_attr "tune" "falkor")
298 (eq_attr "type" "neon_load1_4reg_q,neon_load4_4reg_q,neon_load4_all_lanes,neon_load4_all_lanes_q"))
299 "falkor_ld,falkor_ld,falkor_ld,falkor_ld")
301 ;; Arithmetic and Logical Instructions
303 (define_insn_reservation "falkor_alu_1_xyz" 1
304 (and (eq_attr "tune" "falkor")
305 (eq_attr "type" "alus_sreg,alus_imm,alus_shift_imm,csel,adc_reg,alu_imm,alu_sreg,alu_shift_imm,alu_ext,alus_ext,logic_imm,logic_reg,logic_shift_imm,logics_imm,logics_reg,logics_shift_imm,mov_reg"))
308 ;; SIMD Miscellaneous Instructions
310 ;; No separate type for ins and dup. But this is correct for both.
312 (define_insn_reservation "falkor_am_3_gtov" 3
313 (and (eq_attr "tune" "falkor")
314 (eq_attr "type" "neon_from_gp"))
317 ;; No separate type for ins and dup. Assuming dup is more common. Ins is
318 ;; gtov+vxvy and latency of 4.
320 (define_insn_reservation "falkor_am_3_gtov_gtov" 3
321 (and (eq_attr "tune" "falkor")
322 (eq_attr "type" "neon_from_gp_q"))
323 "falkor_gtov,falkor_gtov")
325 ;; neon_to_gp_q is used for 32-bit ARM instructions that move 64-bits of data
326 ;; so no use needed here.
328 (define_insn_reservation "falkor_am_3_vtog" 3
329 (and (eq_attr "tune" "falkor")
330 (eq_attr "type" "neon_to_gp"))
333 (define_insn_reservation "falkor_am_1_vxvy" 1
334 (and (eq_attr "tune" "falkor")
335 (eq_attr "type" "neon_bsl,neon_dup,neon_ext,neon_ins,neon_ins_q,neon_move,neon_rev,neon_tbl1,neon_permute,neon_shift_imm_narrow_q"))
338 (define_insn_reservation "falkor_am_1_vxvy_vxvy" 1
339 (and (eq_attr "tune" "falkor")
340 (eq_attr "type" "neon_bsl_q,neon_dup_q,neon_ext_q,neon_move_q,neon_rev_q,neon_tbl1_q,neon_permute_q"))
341 "falkor_vxvy+falkor_vxvy")
343 (define_insn_reservation "falkor_am_2_vxvy" 2
344 (and (eq_attr "tune" "falkor")
345 (eq_attr "type" "neon_cls,neon_cnt,neon_rbit"))
348 (define_insn_reservation "falkor_am_4_vxvy_vxvy" 4
349 (and (eq_attr "tune" "falkor")
350 (eq_attr "type" "neon_cls_q,neon_cnt_q,neon_rbit_q,neon_tbl2"))
351 "falkor_vxvy+falkor_vxvy")
353 (define_insn_reservation "falkor_am_3_vxvy" 3
354 (and (eq_attr "tune" "falkor")
355 (eq_attr "type" "neon_fp_recpe_s,neon_fp_recpe_d,neon_fp_rsqrte_s,neon_fp_rsqrte_d,neon_fp_recpx_s,neon_fp_recpx_d"))
358 (define_insn_reservation "falkor_am_3_vxvy_vxvy" 3
359 (and (eq_attr "tune" "falkor")
360 (eq_attr "type" "neon_fp_recpe_s_q,neon_fp_recpe_d_q,neon_fp_rsqrte_s_q,neon_fp_rsqrte_d_q"))
361 "falkor_vxvy+falkor_vxvy")
363 (define_insn_reservation "falkor_am_5_vxvy" 5
364 (and (eq_attr "tune" "falkor")
365 (eq_attr "type" "neon_fp_recps_s"))
368 (define_insn_reservation "falkor_am_5_vxvy_vxvy" 5
369 (and (eq_attr "tune" "falkor")
370 (eq_attr "type" "neon_fp_recps_s_q"))
371 "falkor_vxvy+falkor_vxvy")
373 (define_insn_reservation "falkor_am_6_vxvy" 6
374 (and (eq_attr "tune" "falkor")
375 (eq_attr "type" "neon_fp_recps_d,neon_fp_rsqrts_d"))
378 (define_insn_reservation "falkor_am_6_vxvy_vxvy" 6
379 (and (eq_attr "tune" "falkor")
380 (eq_attr "type" "neon_fp_recps_d_q,neon_fp_rsqrts_d_q"))
381 "falkor_vxvy+falkor_vxvy")
383 (define_insn_reservation "falkor_am_5_vxvy_vxvy_vxvy" 5
384 (and (eq_attr "tune" "falkor")
385 (eq_attr "type" "neon_tbl2_q,neon_tbl3"))
386 "(falkor_vxvy+falkor_vxvy),falkor_vxvy")
388 (define_insn_reservation "falkor_am_6_vxvy_vxvy_vxvy_vxvy" 6
389 (and (eq_attr "tune" "falkor")
390 (eq_attr "type" "neon_tbl3_q,neon_tbl4"))
391 "(falkor_vxvy+falkor_vxvy),(falkor_vxvy+falkor_vxvy)")
393 (define_insn_reservation "falkor_am_7_vxvy_vxvy_vxvy_vxvy_vxvy" 7
394 (and (eq_attr "tune" "falkor")
395 (eq_attr "type" "neon_tbl4_q"))
396 "(falkor_vxvy+falkor_vxvy),(falkor_vxvy+falkor_vxvy),falkor_vxvy")
398 ;; SIMD Store Instructions
400 ;; ??? stp is neon_store1_2reg in aarch64.md, but neon_stp in aarch64-simd.md.
401 ;; Similarly with ldp.
403 (define_insn_reservation "falkor_ast_st_vsd" 0
404 (and (eq_attr "tune" "falkor")
405 (eq_attr "type" "neon_store1_1reg,neon_store1_1reg_q,neon_store1_one_lane,neon_store1_one_lane_q,neon_store1_2reg,neon_store2_2reg,neon_store2_one_lane,neon_store2_one_lane_q,neon_stp"))
406 "falkor_st+falkor_vsd")
408 (define_insn_reservation "falkor_as_0_st_vsd_st_vsd" 0
409 (and (eq_attr "tune" "falkor")
410 (eq_attr "type" "neon_store1_2reg_q,neon_store1_3reg,neon_store1_4reg,neon_store2_2reg_q,neon_store3_3reg,neon_store4_4reg,neon_store3_one_lane,neon_store3_one_lane_q,neon_store4_one_lane,neon_store4_one_lane_q,neon_stp_q"))
411 "(falkor_st+falkor_vsd),(falkor_st+falkor_vsd)")
413 (define_insn_reservation "falkor_as_0_st_vsd_st_vsd_st_vsd" 0
414 (and (eq_attr "tune" "falkor")
415 (eq_attr "type" "neon_store1_3reg_q,neon_store3_3reg_q"))
416 "(falkor_st+falkor_vsd),(falkor_st+falkor_vsd),(falkor_st+falkor_vsd)")
418 (define_insn_reservation "falkor_as_0_st_vsd_st_vsd_st_vsd_st_vsd" 0
419 (and (eq_attr "tune" "falkor")
420 (eq_attr "type" "neon_store1_4reg_q,neon_store4_4reg_q"))
421 "(falkor_st+falkor_vsd),(falkor_st+falkor_vsd),(falkor_st+falkor_vsd),(falkor_st+falkor_vsd)")
423 ;; Branch Instructions
425 (define_insn_reservation "falkor_branch_0_zb" 0
426 (and (eq_attr "tune" "falkor")
427 (eq_attr "type" "branch"))
430 (define_insn_reservation "falkor_call_0_xyzb" 0
431 (and (eq_attr "tune" "falkor")
432 (eq_attr "type" "call"))
435 ;; Cryptography Extensions
437 (define_insn_reservation "falkor_cry_1_vxvy" 1
438 (and (eq_attr "tune" "falkor")
439 (eq_attr "type" "crypto_sha1_fast"))
442 (define_insn_reservation "falkor_cry_2_vxvy" 2
443 (and (eq_attr "tune" "falkor")
444 (eq_attr "type" "crypto_aesmc"))
447 (define_insn_reservation "falkor_cry_2_vxvy_vxvy" 2
448 (and (eq_attr "tune" "falkor")
449 (eq_attr "type" "crypto_sha1_xor,crypto_sha256_fast,crypto_pmull"))
450 "falkor_vxvy+falkor_vxvy")
452 (define_insn_reservation "falkor_cry_4_vy_vx" 4
453 (and (eq_attr "tune" "falkor")
454 (eq_attr "type" "crypto_sha1_slow"))
455 "falkor_vy+falkor_vx")
457 (define_insn_reservation "falkor_cry_6_vy_vx" 6
458 (and (eq_attr "tune" "falkor")
459 (eq_attr "type" "crypto_sha256_slow"))
460 "falkor_vy+falkor_vx")
462 (define_insn_reservation "falkor_cry_3_vxvy_vxvy" 3
463 (and (eq_attr "tune" "falkor")
464 (eq_attr "type" "crypto_aese"))
465 "falkor_vxvy+falkor_vxvy")
467 ;; FP Load Instructions
469 (define_insn_reservation "falkor_fld_4_ld" 4
470 (and (eq_attr "tune" "falkor")
471 (eq_attr "type" "f_loads,f_loadd"))
474 ;; No separate FP store section, these are found in the SIMD store section.
476 (define_insn_reservation "falkor_fld_0_st_vsd" 0
477 (and (eq_attr "tune" "falkor")
478 (eq_attr "type" "f_stores,f_stored"))
479 "falkor_st+falkor_vsd")
481 ;; FP Data Processing Instructions
483 (define_insn_reservation "falkor_fpdt_0_vxvy" 0
484 (and (eq_attr "tune" "falkor")
485 (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd"))
488 (define_insn_reservation "falkor_fpdt_5_vtog" 5
489 (and (eq_attr "tune" "falkor")
490 (eq_attr "type" "f_cvtf2i"))
493 (define_insn_reservation "falkor_fpdt_1_vxvy" 1
494 (and (eq_attr "tune" "falkor")
495 (eq_attr "type" "ffariths,ffarithd,fcsel"))
498 (define_insn_reservation "falkor_fpdt_2_vxvy" 2
499 (and (eq_attr "tune" "falkor")
500 (eq_attr "type" "f_minmaxd,f_minmaxs,f_rintd,f_rints"))
503 ;; Scalar FP ABD is handled same as vector FP ABD.
505 (define_insn_reservation "falkor_fpdt_3_vxvy" 3
506 (and (eq_attr "tune" "falkor")
507 (eq_attr "type" "faddd,fadds"))
510 (define_insn_reservation "falkor_fpdt_4_vxvy" 4
511 (and (eq_attr "tune" "falkor")
512 (eq_attr "type" "f_cvt"))
515 (define_insn_reservation "falkor_fpdt_5_vxvy_mul" 5
516 (and (eq_attr "tune" "falkor")
517 (eq_attr "type" "fmuls"))
520 (define_insn_reservation "falkor_fpdt_5_vxvy_mla" 5
521 (and (eq_attr "tune" "falkor")
522 (eq_attr "type" "fmacs,ffmas"))
525 (define_insn_reservation "falkor_fpdt_6_vxvy_mul" 6
526 (and (eq_attr "tune" "falkor")
527 (eq_attr "type" "fmuld"))
530 (define_insn_reservation "falkor_fpdt_6_vxvy_mla" 6
531 (and (eq_attr "tune" "falkor")
532 (eq_attr "type" "fmacd,ffmad"))
535 (define_insn_reservation "falkor_fpdt_6_vx_vy" 6
536 (and (eq_attr "tune" "falkor")
537 (eq_attr "type" "fdivs"))
538 "falkor_vx+falkor_vy")
540 (define_insn_reservation "falkor_fpdt_11_vx_vy" 11
541 (and (eq_attr "tune" "falkor")
542 (eq_attr "type" "fdivd"))
543 "falkor_vx+falkor_vy")
545 (define_insn_reservation "falkor_fpdt_12_vx_vy" 12
546 (and (eq_attr "tune" "falkor")
547 (eq_attr "type" "fsqrts"))
550 (define_insn_reservation "falkor_fpdt_22_vx_vy" 22
551 (and (eq_attr "tune" "falkor")
552 (eq_attr "type" "fsqrtd"))
555 ;; FP Miscellaneous Instructions
557 (define_insn_reservation "falkor_fpmsc_3_vtog" 3
558 (and (eq_attr "tune" "falkor")
559 (eq_attr "type" "f_mrc"))
562 (define_insn_reservation "falkor_fpmsc_3_gtov" 3
563 (and (eq_attr "tune" "falkor")
564 (eq_attr "type" "f_mcr"))
567 (define_insn_reservation "falkor_fpmsc_1_vxvy" 1
568 (and (eq_attr "tune" "falkor")
569 (eq_attr "type" "fmov,fconsts,fconstd"))
572 ;; No separate type for float-to-fixed conversions. Same type as
573 ;; float-to-int conversions. They schedule the same though, so no problem.
575 (define_insn_reservation "falkor_fpmsc_6_gtov" 6
576 (and (eq_attr "tune" "falkor")
577 (eq_attr "type" "f_cvti2f"))
582 (define_insn_reservation "falkor_ld_3_ld" 3
583 (and (eq_attr "tune" "falkor")
584 (eq_attr "type" "load1,load2"))
587 ;; Miscellaneous Data-Processing Instructions
589 (define_insn_reservation "falkor_misc_1_xyz" 1
590 (and (eq_attr "tune" "falkor")
591 (eq_attr "type" "bfx,bfm,extend,rotate_imm,shift_imm"))
594 (define_insn_reservation "falkor_misc_2_x" 2
595 (and (eq_attr "tune" "falkor")
596 (eq_attr "type" "crc"))
599 (define_insn_reservation "falkor_misc_2_xyz" 2
600 (and (eq_attr "tune" "falkor")
601 (eq_attr "type" "clz,rbit,rev"))
604 ;; Divide and Multiply Instructions
606 (define_insn_reservation "falkor_muldiv_4_x_mul" 4
607 (and (eq_attr "tune" "falkor")
608 (eq_attr "type" "mul"))
611 (define_insn_reservation "falkor_muldiv_4_x_mla" 4
612 (and (eq_attr "tune" "falkor")
613 (eq_attr "type" "mla,smlal,umlal"))
616 (define_insn_reservation "falkor_muldiv_5_x_mul" 5
617 (and (eq_attr "tune" "falkor")
618 (eq_attr "type" "smull,umull"))
621 (define_insn_reservation "falkor_md_11_x_z" 11
622 (and (eq_attr "tune" "falkor")
623 (eq_attr "type" "sdiv,udiv"))
626 ;; Move and Shift Instructions
628 (define_insn_reservation "falkor_mvs_1_xyz" 1
629 (and (eq_attr "tune" "falkor")
630 (eq_attr "type" "mov_imm,shift_reg"))
633 (define_insn_reservation "falkor_mvs_1_xyzb" 1
634 (and (eq_attr "tune" "falkor")
635 (eq_attr "type" "adr"))
638 ;; Other Instructions
640 ;; Block is for instruction scheduling blockage insns in RTL. There are no
641 ;; hardware instructions emitted for them, so don't use any resources.
643 (define_insn_reservation "falkor_other_0_nothing" 0
644 (and (eq_attr "tune" "falkor")
645 (eq_attr "type" "no_insn,trap,block"))
648 (define_insn_reservation "falkor_other_2_z" 2
649 (and (eq_attr "tune" "falkor")
650 (eq_attr "type" "mrs"))
653 ;; Assume multiple instructions use all pipes.
655 (define_insn_reservation "falkor_extra" 1
656 (and (eq_attr "tune" "falkor")
657 (eq_attr "type" "multiple"))
658 "falkor_x+falkor_y+falkor_z+falkor_b+falkor_vx+falkor_vy+falkor_ld+falkor_st+falkor_sd+falkor_vsd+falkor_gtov+falkor_vtog")
660 ;; Store Instructions
662 ;; No use of store_rel, store3, or store4 in aarch64.
664 (define_insn_reservation "falkor_st_0_st_sd" 0
665 (and (eq_attr "tune" "falkor")
666 (eq_attr "type" "store1,store2"))
667 "falkor_st+falkor_sd")
671 ;; 1 cycle latency (0 bubble) for an integer mul or mac feeding into a mac.
674 "falkor_ai_4_vxvy_mul,falkor_ai_4_vxvy_mla,falkor_ai_4_vxvy_vxvy_mul,falkor_ai_4_vxvy_vxvy_mla,falkor_muldiv_4_x_mul,falkor_muldiv_4_x_mla,falkor_muldiv_5_x_mul"
675 "falkor_ai_4_vxvy_mla,falkor_ai_4_vxvy_vxvy_mla,falkor_muldiv_4_x_mla")
677 ;; 3 cycle latency (2 bubbles) for an FP mul or mac feeding into a mac.
680 "falkor_afp_5_vxvy_mul,falkor_afp_5_vxvy_mla,falkor_afp_5_vxvy_vxvy_mul,falkor_afp_5_vxvy_vxvy_mla,falkor_afp_6_vxvy_mul,falkor_afp_6_vxvy_mla,falkor_afp_6_vxvy_vxvy_mul,falkor_afp_6_vxvy_vxvy_mla,falkor_fpdt_5_vxvy_mul,falkor_fpdt_5_vxvy_mla,falkor_fpdt_6_vxvy_mul,falkor_fpdt_6_vxvy_mla"
681 "falkor_afp_5_vxvy_mla,falkor_afp_5_vxvy_vxvy_mla,falkor_afp_6_vxvy_mla,falkor_afp_6_vxvy_vxvy_mla,falkor_fpdt_5_vxvy_mla,falkor_fpdt_6_vxvy_mla")