1 # Copyright
(C
) 1999-2014 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 if { [llength $
args] > 0 } {
45 set options
[list
"additional_flags=[lindex $args 0]"]
49 switch -glob
-- $contents
{
50 "*! Fortran*" { set src ${basename}[pid].f90 }
51 "*// C++*" { set src ${basename}[pid].cc }
52 "*// ObjC++*" { set src ${basename}[pid].mm }
53 "*/* ObjC*" { set src ${basename}[pid].m }
54 "*// Go*" { set src ${basename}[pid].go }
57 "objc" { set src ${basename}[pid].m }
58 "obj-c++" { set src ${basename}[pid].mm }
59 default
{ set src $
{basename
}[pid
].c
}
64 set compile_type $type
66 assembly
{ set output $
{basename
}[pid
].s
}
67 object
{ set output $
{basename
}[pid
].o
}
68 executable
{ set output $
{basename
}[pid
].exe
}
70 set output $
{basename
}[pid
].s
71 lappend options
"additional_flags=-fdump-$type"
72 set compile_type assembly
78 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
81 set scan_output $output
82 # Don
't try folding this into the switch above; calling "glob" before the
83 # file is created won't work.
84 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
85 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
89 return [list $lines $scan_output
]
92 proc current_target_name
{ } {
94 if [info exists target_info
(target
,name)] {
95 set answer $target_info
(target
,name)
102 # Implement an effective
-target check
for property PROP by invoking
103 # the Tcl command
ARGS and seeing
if it returns true.
105 proc check_cached_effective_target
{ prop
args } {
108 set target
[current_target_name
]
109 if {![info exists et_cache
($prop
,target
)]
110 || $et_cache
($prop
,target
) != $target
} {
111 verbose
"check_cached_effective_target $prop: checking $target" 2
112 set et_cache
($prop
,target
) $target
113 set et_cache
($prop
,value
) [uplevel eval $
args]
115 set value $et_cache
($prop
,value
)
116 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
120 # Like check_compile
, but
delete the output file and
return true
if the
121 # compiler printed no messages.
122 proc check_no_compiler_messages_nocache
{args} {
123 set result
[eval check_compile $
args]
124 set lines
[lindex $result
0]
125 set output
[lindex $result
1]
126 remote_file build
delete $output
127 return [string match
"" $lines]
130 # Like check_no_compiler_messages_nocache
, but
cache the result.
131 # PROP is the
property we
're checking, and doubles as a prefix for
132 # temporary filenames.
133 proc check_no_compiler_messages {prop args} {
134 return [check_cached_effective_target $prop {
135 eval [list check_no_compiler_messages_nocache $prop] $args
139 # Like check_compile, but return true if the compiler printed no
140 # messages and if the contents of the output file satisfy PATTERN.
141 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
142 # don't match regular expression REGEXP
, otherwise they satisfy it
143 #
if they
do match regular expression PATTERN.
(PATTERN can start
144 # with something like
"[!]" if the regular expression needs to match
145 #
"!" as the first character.)
147 #
Delete the output file before returning. The other arguments are
148 # as
for check_compile.
149 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
152 set result
[eval
[list check_compile $basename
] $
args]
153 set lines
[lindex $result
0]
154 set output
[lindex $result
1]
157 if { [string match
"" $lines] } {
158 set chan
[open
"$output"]
159 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
160 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
164 remote_file build
delete $output
168 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
169 # PROP is the
property we
're checking, and doubles as a prefix for
170 # temporary filenames.
171 proc check_no_messages_and_pattern {prop pattern args} {
172 return [check_cached_effective_target $prop {
173 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
177 # Try to compile and run an executable from code CONTENTS. Return true
178 # if the compiler reports no messages and if execution "passes" in the
179 # usual DejaGNU sense. The arguments are as for check_compile, with
180 # TYPE implicitly being "executable".
181 proc check_runtime_nocache {basename contents args} {
184 set result [eval [list check_compile $basename executable $contents] $args]
185 set lines [lindex $result 0]
186 set output [lindex $result 1]
189 if { [string match "" $lines] } {
190 # No error messages, everything is OK.
191 set result [remote_load target "./$output" "" ""]
192 set status [lindex $result 0]
193 verbose "check_runtime_nocache $basename: status is <$status>" 2
194 if { $status == "pass" } {
198 remote_file build delete $output
202 # Like check_runtime_nocache, but cache the result. PROP is the
203 # property we're checking
, and doubles as a prefix
for temporary
205 proc check_runtime
{prop
args} {
208 return [check_cached_effective_target $prop
{
209 eval
[list check_runtime_nocache $prop
] $
args
213 ###############################
214 # proc check_weak_available
{ }
215 ###############################
217 # weak symbols are only supported in some configs
/object formats
218 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
220 proc check_weak_available
{ } {
223 # All mips targets should support it
225 if { [ string first
"mips" $target_cpu ] >= 0 } {
229 # All AIX targets should support it
231 if { [istarget
*-*-aix
*] } {
235 # All solaris2 targets should support it
237 if { [istarget
*-*-solaris2
*] } {
241 # Windows targets Cygwin and MingW32 support it
243 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
247 # HP
-UX
10.X doesn
't support it
249 if { [istarget hppa*-*-hpux10*] } {
253 # ELF and ECOFF support it. a.out does with gas/gld but may also with
254 # other linkers, so we should try it
256 set objformat [gcc_target_object_format]
264 unknown { return -1 }
269 ###############################
270 # proc check_weak_override_available { }
271 ###############################
273 # Like check_weak_available, but return 0 if weak symbol definitions
274 # cannot be overridden.
276 proc check_weak_override_available { } {
277 if { [istarget *-*-mingw*] } {
280 return [check_weak_available]
283 ###############################
284 # proc check_visibility_available { what_kind }
285 ###############################
287 # The visibility attribute is only support in some object formats
288 # This proc returns 1 if it is supported, 0 if not.
289 # The argument is the kind of visibility, default/protected/hidden/internal.
291 proc check_visibility_available { what_kind } {
292 if [string match "" $what_kind] { set what_kind "hidden" }
294 return [check_no_compiler_messages visibility_available_$what_kind object "
295 void f() __attribute__((visibility(\"$what_kind\")));
300 ###############################
301 # proc check_alias_available { }
302 ###############################
304 # Determine if the target toolchain supports the alias attribute.
306 # Returns 2 if the target supports aliases. Returns 1 if the target
307 # only supports weak aliased. Returns 0 if the target does not
308 # support aliases at all. Returns -1 if support for aliases could not
311 proc check_alias_available { } {
312 global alias_available_saved
315 if [info exists alias_available_saved] {
316 verbose "check_alias_available returning saved $alias_available_saved" 2
320 verbose "check_alias_available compiling testfile $src" 2
321 set f [open $src "w"]
322 # Compile a small test program. The definition of "g" is
323 # necessary to keep the Solaris assembler from complaining
325 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
326 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
328 set lines [${tool}_target_compile $src $obj object ""]
330 remote_file build delete $obj
332 if [string match "" $lines] then {
333 # No error messages, everything is OK.
334 set alias_available_saved 2
336 if [regexp "alias definitions not supported" $lines] {
337 verbose "check_alias_available target does not support aliases" 2
339 set objformat [gcc_target_object_format]
341 if { $objformat == "elf" } {
342 verbose "check_alias_available but target uses ELF format, so it ought to" 2
343 set alias_available_saved -1
345 set alias_available_saved 0
348 if [regexp "only weak aliases are supported" $lines] {
349 verbose "check_alias_available target supports only weak aliases" 2
350 set alias_available_saved 1
352 set alias_available_saved -1
357 verbose "check_alias_available returning $alias_available_saved" 2
360 return $alias_available_saved
363 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
365 proc check_effective_target_alias { } {
366 if { [check_alias_available] < 2 } {
373 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
375 proc check_ifunc_available { } {
376 return [check_no_compiler_messages ifunc_available object {
381 void f() __attribute__((ifunc("g")));
385 # Returns true if --gc-sections is supported on the target.
387 proc check_gc_sections_available { } {
388 global gc_sections_available_saved
391 if {![info exists gc_sections_available_saved]} {
392 # Some targets don't support gc
-sections despite whatever
's
393 # advertised by ld's options.
394 if { [istarget alpha
*-*-*]
395 ||
[istarget ia64
-*-*] } {
396 set gc_sections_available_saved
0
400 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
402 if { [board_info target
exists ldflags
]
403 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
404 set gc_sections_available_saved
0
408 # VxWorks kernel modules are relocatable objects linked with
-r
,
409 #
while RTP executables are linked with
-q
(--emit
-relocs
).
410 # Both of these options are incompatible with
--gc
-sections.
411 if { [istarget
*-*-vxworks
*] } {
412 set gc_sections_available_saved
0
416 # Check
if the
ld used by gcc supports
--gc
-sections.
417 set gcc_spec
[$
{tool
}_target_compile
"-dumpspecs" "" "none" ""]
418 regsub
".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
419 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=$linker" "" "none" ""] 0]
420 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
421 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
422 set gc_sections_available_saved
1
424 set gc_sections_available_saved
0
427 return $gc_sections_available_saved
430 #
Return 1 if according to target_info struct and explicit target list
431 # target is supposed to support trampolines.
433 proc check_effective_target_trampolines
{ } {
434 if [target_info
exists no_trampolines
] {
437 if { [istarget avr
-*-*]
438 ||
[istarget msp430
-*-*]
439 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
440 ||
[istarget hppa64
-hp
-hpux11.23
] } {
446 #
Return 1 if according to target_info struct and explicit target list
447 # target is supposed to keep null pointer checks. This could be due to
448 # use of option fno
-delete-null
-pointer
-checks or hardwired in target.
450 proc check_effective_target_keeps_null_pointer_checks
{ } {
451 if [target_info
exists keeps_null_pointer_checks
] {
454 if { [istarget avr
-*-*] } {
460 #
Return true
if profiling is supported
on the target.
462 proc check_profiling_available
{ test_what
} {
463 global profiling_available_saved
465 verbose
"Profiling argument is <$test_what>" 1
467 # These conditions depend
on the
argument so examine them before
468 # looking at the
cache variable.
470 # Tree profiling requires TLS runtime support.
471 if { $test_what
== "-fprofile-generate" } {
472 if { ![check_effective_target_tls_runtime
] } {
477 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
478 # vendor compiler. We cannot reliably predict the directory where the
479 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
480 # necessarily find mcrt1.o even if we have it.
481 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
485 # We don't yet support profiling
for MIPS16.
486 if { [istarget mips
*-*-*]
487 && ![check_effective_target_nomips16
]
488 && ($test_what
== "-p" || $test_what == "-pg") } {
492 # MinGW does not support
-p.
493 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
497 # cygwin does not support
-p.
498 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
502 # uClibc does not have gcrt1.o.
503 if { [check_effective_target_uclibc
]
504 && ($test_what
== "-p" || $test_what == "-pg") } {
508 # Now examine the
cache variable.
509 if {![info exists profiling_available_saved
]} {
510 # Some targets don
't have any implementation of __bb_init_func or are
511 # missing other needed machinery.
512 if { [istarget aarch64*-*-elf]
513 || [istarget am3*-*-linux*]
514 || [istarget arm*-*-eabi*]
515 || [istarget arm*-*-elf]
516 || [istarget arm*-*-symbianelf*]
517 || [istarget avr-*-*]
518 || [istarget bfin-*-*]
519 || [istarget cris-*-*]
520 || [istarget crisv32-*-*]
521 || [istarget fido-*-elf]
522 || [istarget h8300-*-*]
523 || [istarget lm32-*-*]
524 || [istarget m32c-*-elf]
525 || [istarget m68k-*-elf]
526 || [istarget m68k-*-uclinux*]
527 || [istarget mep-*-elf]
528 || [istarget mips*-*-elf*]
529 || [istarget mmix-*-*]
530 || [istarget mn10300-*-elf*]
531 || [istarget moxie-*-elf*]
532 || [istarget msp430-*-*]
533 || [istarget nds32*-*-elf]
534 || [istarget nios2-*-elf]
535 || [istarget picochip-*-*]
536 || [istarget powerpc-*-eabi*]
537 || [istarget powerpc-*-elf]
539 || [istarget tic6x-*-elf]
540 || [istarget xstormy16-*]
541 || [istarget xtensa*-*-elf]
542 || [istarget *-*-rtems*]
543 || [istarget *-*-vxworks*] } {
544 set profiling_available_saved 0
546 set profiling_available_saved 1
550 return $profiling_available_saved
553 # Check to see if a target is "freestanding". This is as per the definition
554 # in Section 4 of C99 standard. Effectively, it is a target which supports no
555 # extra headers or libraries other than what is considered essential.
556 proc check_effective_target_freestanding { } {
557 if { [istarget picochip-*-*] } then {
564 # Return 1 if target has packed layout of structure members by
565 # default, 0 otherwise. Note that this is slightly different than
566 # whether the target has "natural alignment": both attributes may be
569 proc check_effective_target_default_packed { } {
570 return [check_no_compiler_messages default_packed assembly {
571 struct x { char a; long b; } c;
572 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
576 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
577 # documentation, where the test also comes from.
579 proc check_effective_target_pcc_bitfield_type_matters { } {
580 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
581 # bitfields
, but let
's stick to the example code from the docs.
582 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
583 struct foo1 { char x; char :0; char y; };
584 struct foo2 { char x; int :0; char y; };
585 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
589 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
591 proc add_options_for_tls { flags } {
592 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
593 # libthread, so always pass -pthread for native TLS. Same for AIX.
594 # Need to duplicate native TLS check from
595 # check_effective_target_tls_native to avoid recursion.
596 if { ([istarget powerpc-ibm-aix*]) &&
597 [check_no_messages_and_pattern tls_native "!emutls" assembly {
599 int f (void) { return i; }
600 void g (int j) { i = j; }
602 return "$flags -pthread"
607 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
609 proc check_effective_target_tls {} {
610 return [check_no_compiler_messages tls assembly {
612 int f (void) { return i; }
613 void g (int j) { i = j; }
617 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
619 proc check_effective_target_tls_native {} {
620 # VxWorks uses emulated TLS machinery, but with non-standard helper
621 # functions, so we fail to automatically detect it.
622 if { [istarget *-*-vxworks*] } {
626 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
628 int f (void) { return i; }
629 void g (int j) { i = j; }
633 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
635 proc check_effective_target_tls_emulated {} {
636 # VxWorks uses emulated TLS machinery, but with non-standard helper
637 # functions, so we fail to automatically detect it.
638 if { [istarget *-*-vxworks*] } {
642 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
644 int f (void) { return i; }
645 void g (int j) { i = j; }
649 # Return 1 if TLS executables can run correctly, 0 otherwise.
651 proc check_effective_target_tls_runtime {} {
652 # MSP430 runtime does not have TLS support, but just
653 # running the test below is insufficient to show this.
654 if { [istarget msp430-*-*] } {
657 return [check_runtime tls_runtime {
658 __thread int thr = 0;
659 int main (void) { return thr; }
660 } [add_options_for_tls ""]]
663 # Return 1 if atomic compare-and-swap is supported on 'int'
665 proc check_effective_target_cas_char {} {
666 return [check_no_compiler_messages cas_char assembly {
667 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
673 proc check_effective_target_cas_int {} {
674 return [check_no_compiler_messages cas_int assembly {
675 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
677 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
685 # Return 1 if -ffunction-sections is supported, 0 otherwise.
687 proc check_effective_target_function_sections {} {
688 # Darwin has its own scheme and silently accepts -ffunction-sections.
689 if { [istarget *-*-darwin*] } {
693 return [check_no_compiler_messages functionsections assembly {
695 } "-ffunction-sections"]
698 # Return 1 if instruction scheduling is available, 0 otherwise.
700 proc check_effective_target_scheduling {} {
701 return [check_no_compiler_messages scheduling object {
703 } "-fschedule-insns"]
706 # Return 1 if trapping arithmetic is available, 0 otherwise.
708 proc check_effective_target_trapping {} {
709 return [check_no_compiler_messages trapping object {
710 add (int a, int b) { return a + b; }
714 # Return 1 if compilation with -fgraphite is error-free for trivial
717 proc check_effective_target_fgraphite {} {
718 return [check_no_compiler_messages fgraphite object {
723 # Return 1 if compilation with -fopenmp is error-free for trivial
726 proc check_effective_target_fopenmp {} {
727 return [check_no_compiler_messages fopenmp object {
732 # Return 1 if compilation with -fupc is error-free for trivial
735 proc check_effective_target_fupc {} {
736 return [check_no_compiler_messages fupc object {
738 } "-fupc -fno-upc-pre-include"]
741 # Return 1 if compilation with -fgnu-tm is error-free for trivial
744 proc check_effective_target_fgnu_tm {} {
745 return [check_no_compiler_messages fgnu_tm object {
750 # Return 1 if the target supports mmap, 0 otherwise.
752 proc check_effective_target_mmap {} {
753 return [check_function_available "mmap"]
756 # Return 1 if the target supports dlopen, 0 otherwise.
757 proc check_effective_target_dlopen {} {
758 return [check_no_compiler_messages dlopen executable {
760 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
761 } [add_options_for_dlopen ""]]
764 proc add_options_for_dlopen { flags } {
768 # Return 1 if the target supports clone, 0 otherwise.
769 proc check_effective_target_clone {} {
770 return [check_function_available "clone"]
773 # Return 1 if the target supports setrlimit, 0 otherwise.
774 proc check_effective_target_setrlimit {} {
775 # Darwin has non-posix compliant RLIMIT_AS
776 if { [istarget *-*-darwin*] } {
779 return [check_function_available "setrlimit"]
782 # Return 1 if the target supports swapcontext, 0 otherwise.
783 proc check_effective_target_swapcontext {} {
784 return [check_no_compiler_messages swapcontext executable {
785 #include <ucontext.h>
788 ucontext_t orig_context,child_context;
789 if (swapcontext(&child_context, &orig_context) < 0) { }
794 # Return 1 if compilation with -pthread is error-free for trivial
797 proc check_effective_target_pthread {} {
798 return [check_no_compiler_messages pthread object {
803 # Return 1 if compilation with -mpe-aligned-commons is error-free
804 # for trivial code, 0 otherwise.
806 proc check_effective_target_pe_aligned_commons {} {
807 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
808 return [check_no_compiler_messages pe_aligned_commons object {
810 } "-mpe-aligned-commons"]
815 # Return 1 if the target supports -static
816 proc check_effective_target_static {} {
817 return [check_no_compiler_messages static executable {
818 int main (void) { return 0; }
822 # Return 1 if the target supports -fstack-protector
823 proc check_effective_target_fstack_protector {} {
824 return [check_runtime fstack_protector {
825 int main (void) { return 0; }
826 } "-fstack-protector"]
829 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
830 # for trivial code, 0 otherwise.
832 proc check_effective_target_freorder {} {
833 return [check_no_compiler_messages freorder object {
835 } "-freorder-blocks-and-partition"]
838 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
839 # emitted, 0 otherwise. Whether a shared library can actually be built is
840 # out of scope for this test.
842 proc check_effective_target_fpic { } {
843 # Note that M68K has a multilib that supports -fpic but not
844 # -fPIC, so we need to check both. We test with a program that
845 # requires GOT references.
846 foreach arg {fpic fPIC} {
847 if [check_no_compiler_messages $arg object {
848 extern int foo (void); extern int bar;
849 int baz (void) { return foo () + bar; }
857 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
859 proc check_effective_target_pie { } {
860 if { [istarget *-*-darwin\[912\]*]
861 || [istarget *-*-linux*]
862 || [istarget *-*-gnu*] } {
868 # Return true if the target supports -mpaired-single (as used on MIPS).
870 proc check_effective_target_mpaired_single { } {
871 return [check_no_compiler_messages mpaired_single object {
876 # Return true if the target has access to FPU instructions.
878 proc check_effective_target_hard_float { } {
879 if { [istarget mips*-*-*] } {
880 return [check_no_compiler_messages hard_float assembly {
881 #if (defined __mips_soft_float || defined __mips16)
887 # This proc is actually checking the availabilty of FPU
888 # support for doubles, so on the RX we must fail if the
889 # 64-bit double multilib has been selected.
890 if { [istarget rx-*-*] } {
892 # return [check_no_compiler_messages hard_float assembly {
893 #if defined __RX_64_BIT_DOUBLES__
899 # The generic test equates hard_float with "no call for adding doubles".
900 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
901 double a (double b, double c) { return b + c; }
905 # Return true if the target is a 64-bit MIPS target.
907 proc check_effective_target_mips64 { } {
908 return [check_no_compiler_messages mips64 assembly {
915 # Return true if the target is a MIPS target that does not produce
918 proc check_effective_target_nomips16 { } {
919 return [check_no_compiler_messages nomips16 object {
923 /* A cheap way of testing for -mflip-mips16. */
924 void foo (void) { asm ("addiu $20,$20,1"); }
925 void bar (void) { asm ("addiu $20,$20,1"); }
930 # Add the options needed for MIPS16 function attributes. At the moment,
931 # we don't support MIPS16 PIC.
933 proc add_options_for_mips16_attribute
{ flags
} {
934 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
937 #
Return true
if we can force a
mode that allows MIPS16 code generation.
938 # We don
't support MIPS16 PIC, and only support MIPS16 -mhard-float
941 proc check_effective_target_mips16_attribute { } {
942 return [check_no_compiler_messages mips16_attribute assembly {
946 #if defined __mips_hard_float \
947 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
948 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
951 } [add_options_for_mips16_attribute ""]]
954 # Return 1 if the target supports long double larger than double when
955 # using the new ABI, 0 otherwise.
957 proc check_effective_target_mips_newabi_large_long_double { } {
958 return [check_no_compiler_messages mips_newabi_large_long_double object {
959 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
963 # Return true if the target is a MIPS target that has access
964 # to the LL and SC instructions.
966 proc check_effective_target_mips_llsc { } {
967 if { ![istarget mips*-*-*] } {
970 # Assume that these instructions are always implemented for
971 # non-elf* targets, via emulation if necessary.
972 if { ![istarget *-*-elf*] } {
975 # Otherwise assume LL/SC support for everything but MIPS I.
976 return [check_no_compiler_messages mips_llsc assembly {
983 # Return true if the target is a MIPS target that uses in-place relocations.
985 proc check_effective_target_mips_rel { } {
986 if { ![istarget mips*-*-*] } {
989 return [check_no_compiler_messages mips_rel object {
990 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
991 || (defined _ABI64 && _MIPS_SIM == _ABI64)
997 # Return true if the target is a MIPS target that uses the EABI.
999 proc check_effective_target_mips_eabi { } {
1000 if { ![istarget mips*-*-*] } {
1003 return [check_no_compiler_messages mips_eabi object {
1010 # Return 1 if the current multilib does not generate PIC by default.
1012 proc check_effective_target_nonpic { } {
1013 return [check_no_compiler_messages nonpic assembly {
1020 # Return 1 if the target does not use a status wrapper.
1022 proc check_effective_target_unwrapped { } {
1023 if { [target_info needs_status_wrapper] != "" \
1024 && [target_info needs_status_wrapper] != "0" } {
1030 # Return true if iconv is supported on the target. In particular IBM1047.
1032 proc check_iconv_available { test_what } {
1035 # If the tool configuration file has not set libiconv, try "-liconv"
1036 if { ![info exists libiconv] } {
1037 set libiconv "-liconv"
1039 set test_what [lindex $test_what 1]
1040 return [check_runtime_nocache $test_what [subst {
1046 cd = iconv_open ("$test_what", "UTF-8");
1047 if (cd == (iconv_t) -1)
1054 # Return true if Cilk Library is supported on the target.
1055 proc check_libcilkrts_available { } {
1056 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1060 int __cilkrts_set_param (const char *, const char *);
1062 int x = __cilkrts_set_param ("nworkers", "0");
1065 } "-fcilkplus -lcilkrts" ]
1068 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1070 proc check_ascii_locale_available { } {
1074 # Return true if named sections are supported on this target.
1076 proc check_named_sections_available { } {
1077 return [check_no_compiler_messages named_sections assembly {
1078 int __attribute__ ((section("whatever"))) foo;
1082 # Return true if the "naked" function attribute is supported on this target.
1084 proc check_effective_target_naked_functions { } {
1085 return [check_no_compiler_messages naked_functions assembly {
1086 void f() __attribute__((naked));
1090 # Return 1 if the target supports Fortran real kinds larger than real(8),
1093 # When the target name changes, replace the cached result.
1095 proc check_effective_target_fortran_large_real { } {
1096 return [check_no_compiler_messages fortran_large_real executable {
1098 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1105 # Return 1 if the target supports Fortran real kind real(16),
1106 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1107 # this checks for Real(16) only; the other returned real(10) if
1108 # both real(10) and real(16) are available.
1110 # When the target name changes, replace the cached result.
1112 proc check_effective_target_fortran_real_16 { } {
1113 return [check_no_compiler_messages fortran_real_16 executable {
1122 # Return 1 if the target supports Fortran's IEEE modules
,
1125 # When the target
name changes
, replace the cached result.
1127 proc check_effective_target_fortran_ieee
{ flags
} {
1128 return [check_no_compiler_messages fortran_ieee executable
{
1130 use
, intrinsic
:: ieee_features
1136 #
Return 1 if the target supports
SQRT for the
largest floating
-point
1137 # type.
(Some targets lack the libm support
for this FP type.
)
1138 #
On most targets
, this check effectively checks either whether sqrtl is
1139 # available or
on __float128 systems whether libquadmath is installed
,
1140 # which provides sqrtq.
1142 # When the target
name changes
, replace the cached result.
1144 proc check_effective_target_fortran_largest_fp_has_sqrt
{ } {
1145 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable
{
1147 use iso_fortran_env
, only
: real_kinds
1148 integer,parameter
:: maxFP
= real_kinds
(ubound
(real_kinds
,dim
=1))
1149 real
(kind
=maxFP
), volatile
:: x
1157 #
Return 1 if the target supports Fortran
integer kinds larger than
1158 #
integer(8), 0 otherwise.
1160 # When the target
name changes
, replace the cached result.
1162 proc check_effective_target_fortran_large_int
{ } {
1163 return [check_no_compiler_messages fortran_large_int executable
{
1165 integer,parameter
:: k
= selected_int_kind
(range
(0_8
) + 1)
1166 integer(kind
=k
) :: i
1171 #
Return 1 if the target supports Fortran
integer(16), 0 otherwise.
1173 # When the target
name changes
, replace the cached result.
1175 proc check_effective_target_fortran_integer_16
{ } {
1176 return [check_no_compiler_messages fortran_integer_16 executable
{
1183 #
Return 1 if we can statically link libgfortran
, 0 otherwise.
1185 # When the target
name changes
, replace the cached result.
1187 proc check_effective_target_static_libgfortran
{ } {
1188 return [check_no_compiler_messages static_libgfortran executable
{
1195 #
Return 1 if cilk
-plus is supported by the target
, 0 otherwise.
1197 proc check_effective_target_cilkplus
{ } {
1198 # Skip cilk
-plus tests
on int16 and size16 targets
for now.
1199 # The cilk
-plus tests are not generic enough to cover these
1200 # cases and would throw hundreds of FAILs.
1201 if { [check_effective_target_int16
]
1202 ||
![check_effective_target_size32plus
] } {
1206 # Skip AVR
, its RAM is too small and too many tests would fail.
1207 if { [istarget avr
-*-*] } {
1213 proc check_linker_plugin_available
{ } {
1214 return [check_no_compiler_messages_nocache linker_plugin executable
{
1215 int main
() { return 0; }
1216 } "-flto -fuse-linker-plugin"]
1219 #
Return 1 if the target supports executing
750CL paired
-single instructions
, 0
1220 # otherwise.
Cache the result.
1222 proc check_750cl_hw_available
{ } {
1223 return [check_cached_effective_target
750cl_hw_available
{
1224 #
If this is not the right target
then we can skip the test.
1225 if { ![istarget powerpc
-*paired
*] } {
1228 check_runtime_nocache
750cl_hw_available
{
1232 asm volatile
("ps_mul v0,v0,v0");
1234 asm volatile
("ps_mul 0,0,0");
1243 #
Return 1 if the target OS supports running SSE executables
, 0
1244 # otherwise.
Cache the result.
1246 proc check_sse_os_support_available
{ } {
1247 return [check_cached_effective_target sse_os_support_available
{
1248 #
If this is not the right target
then we can skip the test.
1249 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1251 } elseif
{ [istarget i?
86-*-solaris2
*] } {
1252 # The Solaris
2 kernel doesn
't save and restore SSE registers
1253 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1254 check_runtime_nocache sse_os_support_available {
1257 asm volatile ("movaps %xmm0,%xmm0");
1267 # Return 1 if the target OS supports running AVX executables, 0
1268 # otherwise. Cache the result.
1270 proc check_avx_os_support_available { } {
1271 return [check_cached_effective_target avx_os_support_available {
1272 # If this is not the right target then we can skip the test.
1273 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1276 # Check that OS has AVX and SSE saving enabled.
1277 check_runtime_nocache avx_os_support_available {
1280 unsigned int eax, edx;
1282 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1283 return (eax & 6) != 6;
1290 # Return 1 if the target supports executing SSE instructions, 0
1291 # otherwise. Cache the result.
1293 proc check_sse_hw_available { } {
1294 return [check_cached_effective_target sse_hw_available {
1295 # If this is not the right target then we can skip the test.
1296 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1299 check_runtime_nocache sse_hw_available {
1303 unsigned int eax, ebx, ecx, edx;
1304 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1305 return !(edx & bit_SSE);
1313 # Return 1 if the target supports executing SSE2 instructions, 0
1314 # otherwise. Cache the result.
1316 proc check_sse2_hw_available { } {
1317 return [check_cached_effective_target sse2_hw_available {
1318 # If this is not the right target then we can skip the test.
1319 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1322 check_runtime_nocache sse2_hw_available {
1326 unsigned int eax, ebx, ecx, edx;
1327 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1328 return !(edx & bit_SSE2);
1336 # Return 1 if the target supports executing AVX instructions, 0
1337 # otherwise. Cache the result.
1339 proc check_avx_hw_available { } {
1340 return [check_cached_effective_target avx_hw_available {
1341 # If this is not the right target then we can skip the test.
1342 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1345 check_runtime_nocache avx_hw_available {
1349 unsigned int eax, ebx, ecx, edx;
1350 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1351 return ((ecx & (bit_AVX | bit_OSXSAVE))
1352 != (bit_AVX | bit_OSXSAVE));
1360 # Return 1 if the target supports running SSE executables, 0 otherwise.
1362 proc check_effective_target_sse_runtime { } {
1363 if { [check_effective_target_sse]
1364 && [check_sse_hw_available]
1365 && [check_sse_os_support_available] } {
1371 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1373 proc check_effective_target_sse2_runtime { } {
1374 if { [check_effective_target_sse2]
1375 && [check_sse2_hw_available]
1376 && [check_sse_os_support_available] } {
1382 # Return 1 if the target supports running AVX executables, 0 otherwise.
1384 proc check_effective_target_avx_runtime { } {
1385 if { [check_effective_target_avx]
1386 && [check_avx_hw_available]
1387 && [check_avx_os_support_available] } {
1393 # Return 1 if the target supports executing power8 vector instructions, 0
1394 # otherwise. Cache the result.
1396 proc check_p8vector_hw_available { } {
1397 return [check_cached_effective_target p8vector_hw_available {
1398 # Some simulators are known to not support VSX/power8 instructions.
1399 # For now, disable on Darwin
1400 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1403 set options "-mpower8-vector"
1404 check_runtime_nocache p8vector_hw_available {
1408 asm volatile ("xxlorc vs0,vs0,vs0");
1410 asm volatile ("xxlorc 0,0,0");
1419 # Return 1 if the target supports executing VSX instructions, 0
1420 # otherwise. Cache the result.
1422 proc check_vsx_hw_available { } {
1423 return [check_cached_effective_target vsx_hw_available {
1424 # Some simulators are known to not support VSX instructions.
1425 # For now, disable on Darwin
1426 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1430 check_runtime_nocache vsx_hw_available {
1434 asm volatile ("xxlor vs0,vs0,vs0");
1436 asm volatile ("xxlor 0,0,0");
1445 # Return 1 if the target supports executing AltiVec instructions, 0
1446 # otherwise. Cache the result.
1448 proc check_vmx_hw_available { } {
1449 return [check_cached_effective_target vmx_hw_available {
1450 # Some simulators are known to not support VMX instructions.
1451 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1454 # Most targets don't require special flags
for this test case
, but
1455 # Darwin does. Just to be sure
, make sure VSX is not enabled
for
1456 # the altivec tests.
1457 if { [istarget
*-*-darwin
*]
1458 ||
[istarget
*-*-aix
*] } {
1459 set options
"-maltivec -mno-vsx"
1461 set options
"-mno-vsx"
1463 check_runtime_nocache vmx_hw_available
{
1467 asm volatile
("vor v0,v0,v0");
1469 asm volatile
("vor 0,0,0");
1478 proc check_ppc_recip_hw_available
{ } {
1479 return [check_cached_effective_target ppc_recip_hw_available
{
1480 # Some simulators may not support FRE
/FRES
/FRSQRTE
/FRSQRTES
1481 #
For now
, disable
on Darwin
1482 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
1485 set options
"-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1486 check_runtime_nocache ppc_recip_hw_available
{
1487 volatile double d_recip
, d_rsqrt
, d_four
= 4.0;
1488 volatile float f_recip
, f_rsqrt
, f_four
= 4.0f
;
1491 asm volatile
("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1492 asm volatile
("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1493 asm volatile
("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1494 asm volatile
("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1502 #
Return 1 if the target supports executing AltiVec and Cell PPU
1503 # instructions
, 0 otherwise.
Cache the result.
1505 proc check_effective_target_cell_hw
{ } {
1506 return [check_cached_effective_target cell_hw_available
{
1507 # Some simulators are known to not support VMX and PPU instructions.
1508 if { [istarget powerpc
-*-eabi
*] } {
1511 # Most targets don
't require special flags for this test
1512 # case, but Darwin and AIX do.
1513 if { [istarget *-*-darwin*]
1514 || [istarget *-*-aix*] } {
1515 set options "-maltivec -mcpu=cell"
1517 set options "-mcpu=cell"
1519 check_runtime_nocache cell_hw_available {
1523 asm volatile ("vor v0,v0,v0");
1524 asm volatile ("lvlx v0,r0,r0");
1526 asm volatile ("vor 0,0,0");
1527 asm volatile ("lvlx 0,0,0");
1536 # Return 1 if the target supports executing 64-bit instructions, 0
1537 # otherwise. Cache the result.
1539 proc check_effective_target_powerpc64 { } {
1540 global powerpc64_available_saved
1543 if [info exists powerpc64_available_saved] {
1544 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1546 set powerpc64_available_saved 0
1548 # Some simulators are known to not support powerpc64 instructions.
1549 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1550 verbose "check_effective_target_powerpc64 returning 0" 2
1551 return $powerpc64_available_saved
1554 # Set up, compile, and execute a test program containing a 64-bit
1555 # instruction. Include the current process ID in the file
1556 # names to prevent conflicts with invocations for multiple
1561 set f [open $src "w"]
1562 puts $f "int main() {"
1563 puts $f "#ifdef __MACH__"
1564 puts $f " asm volatile (\"extsw r0,r0\");"
1566 puts $f " asm volatile (\"extsw 0,0\");"
1568 puts $f " return 0; }"
1571 set opts "additional_flags=-mcpu=G5"
1573 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1574 set lines [${tool}_target_compile $src $exe executable "$opts"]
1577 if [string match "" $lines] then {
1578 # No error message, compilation succeeded.
1579 set result [${tool}_load "./$exe" "" ""]
1580 set status [lindex $result 0]
1581 remote_file build delete $exe
1582 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1584 if { $status == "pass" } then {
1585 set powerpc64_available_saved 1
1588 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1592 return $powerpc64_available_saved
1595 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1596 # complex float arguments. This affects gfortran tests that call cabsf
1597 # in libm built by an earlier compiler. Return 1 if libm uses the same
1598 # argument passing as the compiler under test, 0 otherwise.
1600 # When the target name changes, replace the cached result.
1602 proc check_effective_target_broken_cplxf_arg { } {
1603 return [check_cached_effective_target broken_cplxf_arg {
1604 # Skip the work for targets known not to be affected.
1605 if { ![istarget powerpc64-*-linux*] } {
1607 } elseif { ![is-effective-target lp64] } {
1610 check_runtime_nocache broken_cplxf_arg {
1611 #include <complex.h>
1612 extern void abort (void);
1613 float fabsf (float);
1614 float cabsf (_Complex float);
1621 if (fabsf (f - 5.0) > 0.0001)
1630 # Return 1 is this is a TI C6X target supporting C67X instructions
1631 proc check_effective_target_ti_c67x { } {
1632 return [check_no_compiler_messages ti_c67x assembly {
1633 #if !defined(_TMS320C6700)
1639 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1640 proc check_effective_target_ti_c64xp { } {
1641 return [check_no_compiler_messages ti_c64xp assembly {
1642 #if !defined(_TMS320C6400_PLUS)
1649 proc check_alpha_max_hw_available { } {
1650 return [check_runtime alpha_max_hw_available {
1651 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1655 # Returns true iff the FUNCTION is available on the target system.
1656 # (This is essentially a Tcl implementation of Autoconf's
1659 proc check_function_available
{ function
} {
1660 return [check_no_compiler_messages $
{function
}_available \
1666 int main
() { $function
(); }
1670 # Returns true iff
"fork" is available on the target system.
1672 proc check_fork_available
{} {
1673 return [check_function_available
"fork"]
1676 # Returns true iff
"mkfifo" is available on the target system.
1678 proc check_mkfifo_available
{} {
1679 if { [istarget
*-*-cygwin
*] } {
1680 # Cygwin has mkfifo
, but support is incomplete.
1684 return [check_function_available
"mkfifo"]
1687 # Returns true iff
"__cxa_atexit" is used on the target system.
1689 proc check_cxa_atexit_available
{ } {
1690 return [check_cached_effective_target cxa_atexit_available
{
1691 if { [istarget hppa
*-*-hpux10
*] } {
1692 # HP
-UX
10 doesn
't have __cxa_atexit but subsequent test passes.
1694 } elseif { [istarget *-*-vxworks] } {
1695 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1698 check_runtime_nocache cxa_atexit_available
{
1701 static unsigned
int count;
1718 Y
() { f
(); count = 2; }
1727 int main
() { return 0; }
1733 proc check_effective_target_objc2
{ } {
1734 return [check_no_compiler_messages objc2 object
{
1743 proc check_effective_target_next_runtime
{ } {
1744 return [check_no_compiler_messages objc2 object
{
1745 #ifdef __NEXT_RUNTIME__
1753 #
Return 1 if we
're generating 32-bit code using default options, 0
1756 proc check_effective_target_ilp32 { } {
1757 return [check_no_compiler_messages ilp32 object {
1758 int dummy[sizeof (int) == 4
1759 && sizeof (void *) == 4
1760 && sizeof (long) == 4 ? 1 : -1];
1764 # Return 1 if we're generating ia32 code using default options
, 0
1767 proc check_effective_target_ia32
{ } {
1768 return [check_no_compiler_messages ia32 object
{
1769 int dummy
[sizeof
(int) == 4
1770 && sizeof
(void
*) == 4
1771 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
1775 #
Return 1 if we
're generating x32 code using default options, 0
1778 proc check_effective_target_x32 { } {
1779 return [check_no_compiler_messages x32 object {
1780 int dummy[sizeof (int) == 4
1781 && sizeof (void *) == 4
1782 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1786 # Return 1 if we're generating
32-bit integers using default
1787 # options
, 0 otherwise.
1789 proc check_effective_target_int32
{ } {
1790 return [check_no_compiler_messages int32 object
{
1791 int dummy
[sizeof
(int) == 4 ?
1 : -1];
1795 #
Return 1 if we
're generating 32-bit or larger integers using default
1796 # options, 0 otherwise.
1798 proc check_effective_target_int32plus { } {
1799 return [check_no_compiler_messages int32plus object {
1800 int dummy[sizeof (int) >= 4 ? 1 : -1];
1804 # Return 1 if we're generating
32-bit or larger pointers using default
1805 # options
, 0 otherwise.
1807 proc check_effective_target_ptr32plus
{ } {
1808 # The msp430 has
16-bit or
20-bit pointers. The
20-bit pointer is stored
1809 # in a
32-bit slot when in memory
, so sizeof
(void
*) returns
4, but it
1810 # cannot really hold a
32-bit address
, so we always
return false here.
1811 if { [istarget msp430
-*-*] } {
1815 return [check_no_compiler_messages ptr32plus object
{
1816 int dummy
[sizeof
(void
*) >= 4 ?
1 : -1];
1820 #
Return 1 if we support
32-bit or larger array and structure sizes
1821 # using default options
, 0 otherwise. Avoid false positive
on
1822 # targets with
20 or
24 bit address spaces.
1824 proc check_effective_target_size32plus
{ } {
1825 return [check_no_compiler_messages size32plus object
{
1826 char dummy
[16777217L];
1830 # Returns
1 if we
're generating 16-bit or smaller integers with the
1831 # default options, 0 otherwise.
1833 proc check_effective_target_int16 { } {
1834 return [check_no_compiler_messages int16 object {
1835 int dummy[sizeof (int) < 4 ? 1 : -1];
1839 # Return 1 if we're generating
64-bit code using default options
, 0
1842 proc check_effective_target_lp64
{ } {
1843 return [check_no_compiler_messages lp64 object
{
1844 int dummy
[sizeof
(int) == 4
1845 && sizeof
(void
*) == 8
1846 && sizeof
(long
) == 8 ?
1 : -1];
1850 #
Return 1 if we
're generating 64-bit code using default llp64 options,
1853 proc check_effective_target_llp64 { } {
1854 return [check_no_compiler_messages llp64 object {
1855 int dummy[sizeof (int) == 4
1856 && sizeof (void *) == 8
1857 && sizeof (long long) == 8
1858 && sizeof (long) == 4 ? 1 : -1];
1862 # Return 1 if long and int have different sizes,
1865 proc check_effective_target_long_neq_int { } {
1866 return [check_no_compiler_messages long_ne_int object {
1867 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
1871 # Return 1 if the target supports long double larger than double,
1874 proc check_effective_target_large_long_double { } {
1875 return [check_no_compiler_messages large_long_double object {
1876 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1880 # Return 1 if the target supports double larger than float,
1883 proc check_effective_target_large_double { } {
1884 return [check_no_compiler_messages large_double object {
1885 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
1889 # Return 1 if the target supports long double of 128 bits,
1892 proc check_effective_target_longdouble128 { } {
1893 return [check_no_compiler_messages longdouble128 object {
1894 int dummy[sizeof(long double) == 16 ? 1 : -1];
1898 # Return 1 if the target supports double of 64 bits,
1901 proc check_effective_target_double64 { } {
1902 return [check_no_compiler_messages double64 object {
1903 int dummy[sizeof(double) == 8 ? 1 : -1];
1907 # Return 1 if the target supports double of at least 64 bits,
1910 proc check_effective_target_double64plus { } {
1911 return [check_no_compiler_messages double64plus object {
1912 int dummy[sizeof(double) >= 8 ? 1 : -1];
1916 # Return 1 if the target supports 'w
' suffix on floating constant
1919 proc check_effective_target_has_w_floating_suffix { } {
1921 if [check_effective_target_c++] {
1922 append opts "-std=gnu++03"
1924 return [check_no_compiler_messages w_fp_suffix object {
1929 # Return 1 if the target supports 'q
' suffix on floating constant
1932 proc check_effective_target_has_q_floating_suffix { } {
1934 if [check_effective_target_c++] {
1935 append opts "-std=gnu++03"
1937 return [check_no_compiler_messages q_fp_suffix object {
1941 # Return 1 if the target supports compiling fixed-point,
1944 proc check_effective_target_fixed_point { } {
1945 return [check_no_compiler_messages fixed_point object {
1946 _Sat _Fract x; _Sat _Accum y;
1950 # Return 1 if the target supports compiling decimal floating point,
1953 proc check_effective_target_dfp_nocache { } {
1954 verbose "check_effective_target_dfp_nocache: compiling source" 2
1955 set ret [check_no_compiler_messages_nocache dfp object {
1956 float x __attribute__((mode(DD)));
1958 verbose "check_effective_target_dfp_nocache: returning $ret" 2
1962 proc check_effective_target_dfprt_nocache { } {
1963 return [check_runtime_nocache dfprt {
1964 typedef float d64 __attribute__((mode(DD)));
1965 d64 x = 1.2df, y = 2.3dd, z;
1966 int main () { z = x + y; return 0; }
1970 # Return 1 if the target supports compiling Decimal Floating Point,
1973 # This won't change
for different subtargets so
cache the result.
1975 proc check_effective_target_dfp
{ } {
1976 return [check_cached_effective_target dfp
{
1977 check_effective_target_dfp_nocache
1981 #
Return 1 if the target supports linking and executing Decimal Floating
1982 # Point
, 0 otherwise.
1984 # This won
't change for different subtargets so cache the result.
1986 proc check_effective_target_dfprt { } {
1987 return [check_cached_effective_target dfprt {
1988 check_effective_target_dfprt_nocache
1992 # Return 1 if the target supports executing DFP hardware instructions,
1993 # 0 otherwise. Cache the result.
1995 proc check_dfp_hw_available { } {
1996 return [check_cached_effective_target dfp_hw_available {
1997 # For now, disable on Darwin
1998 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2001 check_runtime_nocache dfp_hw_available {
2002 volatile _Decimal64 r;
2003 volatile _Decimal64 a = 4.0DD;
2004 volatile _Decimal64 b = 2.0DD;
2007 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2008 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2009 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2010 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2013 } "-mcpu=power6 -mhard-float"
2018 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2020 proc check_effective_target_ucn_nocache { } {
2021 # -std=c99 is only valid for C
2022 if [check_effective_target_c] {
2023 set ucnopts "-std=c99"
2025 append ucnopts " -fextended-identifiers"
2026 verbose "check_effective_target_ucn_nocache: compiling source" 2
2027 set ret [check_no_compiler_messages_nocache ucn object {
2030 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2034 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2036 # This won't change
for different subtargets
, so
cache the result.
2038 proc check_effective_target_ucn
{ } {
2039 return [check_cached_effective_target ucn
{
2040 check_effective_target_ucn_nocache
2044 #
Return 1 if the target needs a command line
argument to enable a SIMD
2047 proc check_effective_target_vect_cmdline_needed
{ } {
2048 global et_vect_cmdline_needed_saved
2049 global et_vect_cmdline_needed_target_name
2051 if { ![info exists et_vect_cmdline_needed_target_name
] } {
2052 set et_vect_cmdline_needed_target_name
""
2055 #
If the target has changed since we
set the cached value
, clear it.
2056 set current_target
[current_target_name
]
2057 if { $current_target
!= $et_vect_cmdline_needed_target_name
} {
2058 verbose
"check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2059 set et_vect_cmdline_needed_target_name $current_target
2060 if { [info exists et_vect_cmdline_needed_saved
] } {
2061 verbose
"check_effective_target_vect_cmdline_needed: removing cached result" 2
2062 unset et_vect_cmdline_needed_saved
2066 if [info exists et_vect_cmdline_needed_saved
] {
2067 verbose
"check_effective_target_vect_cmdline_needed: using cached result" 2
2069 set et_vect_cmdline_needed_saved
1
2070 if { [istarget alpha
*-*-*]
2071 ||
[istarget ia64
-*-*]
2072 ||
(([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
2073 && ([check_effective_target_x32
]
2074 ||
[check_effective_target_lp64
]))
2075 ||
([istarget powerpc
*-*-*]
2076 && ([check_effective_target_powerpc_spe
]
2077 ||
[check_effective_target_powerpc_altivec
]))
2078 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_vis
])
2079 ||
[istarget spu
-*-*]
2080 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon
])
2081 ||
[istarget aarch64
*-*-*] } {
2082 set et_vect_cmdline_needed_saved
0
2086 verbose
"check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2087 return $et_vect_cmdline_needed_saved
2090 #
Return 1 if the target supports hardware vectors of
int, 0 otherwise.
2092 # This won
't change for different subtargets so cache the result.
2094 proc check_effective_target_vect_int { } {
2095 global et_vect_int_saved
2097 if [info exists et_vect_int_saved] {
2098 verbose "check_effective_target_vect_int: using cached result" 2
2100 set et_vect_int_saved 0
2101 if { [istarget i?86-*-*]
2102 || ([istarget powerpc*-*-*]
2103 && ![istarget powerpc-*-linux*paired*])
2104 || [istarget spu-*-*]
2105 || [istarget x86_64-*-*]
2106 || [istarget sparc*-*-*]
2107 || [istarget alpha*-*-*]
2108 || [istarget ia64-*-*]
2109 || [istarget aarch64*-*-*]
2110 || [check_effective_target_arm32]
2111 || ([istarget mips*-*-*]
2112 && [check_effective_target_mips_loongson]) } {
2113 set et_vect_int_saved 1
2117 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2118 return $et_vect_int_saved
2121 # Return 1 if the target supports signed int->float conversion
2124 proc check_effective_target_vect_intfloat_cvt { } {
2125 global et_vect_intfloat_cvt_saved
2127 if [info exists et_vect_intfloat_cvt_saved] {
2128 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2130 set et_vect_intfloat_cvt_saved 0
2131 if { [istarget i?86-*-*]
2132 || ([istarget powerpc*-*-*]
2133 && ![istarget powerpc-*-linux*paired*])
2134 || [istarget x86_64-*-*]
2135 || ([istarget arm*-*-*]
2136 && [check_effective_target_arm_neon_ok])} {
2137 set et_vect_intfloat_cvt_saved 1
2141 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2142 return $et_vect_intfloat_cvt_saved
2145 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
2147 proc check_effective_target_int128
{ } {
2148 return [check_no_compiler_messages int128 object
{
2150 #ifndef __SIZEOF_INT128__
2159 #
Return 1 if the target supports unsigned
int->float conversion
2162 proc check_effective_target_vect_uintfloat_cvt
{ } {
2163 global et_vect_uintfloat_cvt_saved
2165 if [info exists et_vect_uintfloat_cvt_saved
] {
2166 verbose
"check_effective_target_vect_uintfloat_cvt: using cached result" 2
2168 set et_vect_uintfloat_cvt_saved
0
2169 if { [istarget i?
86-*-*]
2170 ||
([istarget powerpc
*-*-*]
2171 && ![istarget powerpc
-*-linux
*paired
*])
2172 ||
[istarget x86_64
-*-*]
2173 ||
[istarget aarch64
*-*-*]
2174 ||
([istarget arm
*-*-*]
2175 && [check_effective_target_arm_neon_ok
])} {
2176 set et_vect_uintfloat_cvt_saved
1
2180 verbose
"check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2181 return $et_vect_uintfloat_cvt_saved
2185 #
Return 1 if the target supports signed float
->int conversion
2188 proc check_effective_target_vect_floatint_cvt
{ } {
2189 global et_vect_floatint_cvt_saved
2191 if [info exists et_vect_floatint_cvt_saved
] {
2192 verbose
"check_effective_target_vect_floatint_cvt: using cached result" 2
2194 set et_vect_floatint_cvt_saved
0
2195 if { [istarget i?
86-*-*]
2196 ||
([istarget powerpc
*-*-*]
2197 && ![istarget powerpc
-*-linux
*paired
*])
2198 ||
[istarget x86_64
-*-*]
2199 ||
([istarget arm
*-*-*]
2200 && [check_effective_target_arm_neon_ok
])} {
2201 set et_vect_floatint_cvt_saved
1
2205 verbose
"check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2206 return $et_vect_floatint_cvt_saved
2209 #
Return 1 if the target supports unsigned float
->int conversion
2212 proc check_effective_target_vect_floatuint_cvt
{ } {
2213 global et_vect_floatuint_cvt_saved
2215 if [info exists et_vect_floatuint_cvt_saved
] {
2216 verbose
"check_effective_target_vect_floatuint_cvt: using cached result" 2
2218 set et_vect_floatuint_cvt_saved
0
2219 if { ([istarget powerpc
*-*-*]
2220 && ![istarget powerpc
-*-linux
*paired
*])
2221 ||
([istarget arm
*-*-*]
2222 && [check_effective_target_arm_neon_ok
])} {
2223 set et_vect_floatuint_cvt_saved
1
2227 verbose
"check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2228 return $et_vect_floatuint_cvt_saved
2231 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
2233 # This won
't change for different subtargets so cache the result.
2235 proc check_effective_target_vect_simd_clones { } {
2236 global et_vect_simd_clones_saved
2238 if [info exists et_vect_simd_clones_saved] {
2239 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2241 set et_vect_simd_clones_saved 0
2242 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2243 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2244 # avx2 clone. Only the right clone for the specified arch will be
2245 # chosen, but still we need to at least be able to assemble
2247 if { [check_effective_target_avx2] } {
2248 set et_vect_simd_clones_saved 1
2253 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2254 return $et_vect_simd_clones_saved
2257 # Return 1 if this is a AArch64 target supporting big endian
2258 proc check_effective_target_aarch64_big_endian { } {
2259 return [check_no_compiler_messages aarch64_big_endian assembly {
2260 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2266 # Return 1 if this is a AArch64 target supporting little endian
2267 proc check_effective_target_aarch64_little_endian { } {
2268 return [check_no_compiler_messages aarch64_little_endian assembly {
2269 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2275 # Return 1 if this is an arm target using 32-bit instructions
2276 proc check_effective_target_arm32 { } {
2277 return [check_no_compiler_messages arm32 assembly {
2278 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2284 # Return 1 if this is an arm target not using Thumb
2285 proc check_effective_target_arm_nothumb { } {
2286 return [check_no_compiler_messages arm_nothumb assembly {
2287 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2293 # Return 1 if this is a little-endian ARM target
2294 proc check_effective_target_arm_little_endian { } {
2295 return [check_no_compiler_messages arm_little_endian assembly {
2296 #if !defined(__arm__) || !defined(__ARMEL__)
2302 # Return 1 if this is an ARM target that only supports aligned vector accesses
2303 proc check_effective_target_arm_vect_no_misalign { } {
2304 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2305 #if !defined(__arm__) \
2306 || (defined(__ARMEL__) \
2307 && (!defined(__thumb__) || defined(__thumb2__)))
2314 # Return 1 if this is an ARM target supporting -mfpu=vfp
2315 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2318 proc check_effective_target_arm_vfp_ok { } {
2319 if { [check_effective_target_arm32] } {
2320 return [check_no_compiler_messages arm_vfp_ok object {
2322 } "-mfpu=vfp -mfloat-abi=softfp"]
2328 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2329 # -mfloat-abi=softfp.
2331 proc check_effective_target_arm_vfp3_ok { } {
2332 if { [check_effective_target_arm32] } {
2333 return [check_no_compiler_messages arm_vfp3_ok object {
2335 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2341 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2342 # -mfloat-abi=softfp.
2343 proc check_effective_target_arm_v8_vfp_ok {} {
2344 if { [check_effective_target_arm32] } {
2345 return [check_no_compiler_messages arm_v8_vfp_ok object {
2348 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2351 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2357 # Return 1 if this is an ARM target supporting -mfpu=vfp
2358 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2361 proc check_effective_target_arm_hard_vfp_ok { } {
2362 if { [check_effective_target_arm32]
2363 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2364 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2365 int main() { return 0;}
2366 } "-mfpu=vfp -mfloat-abi=hard"]
2372 # Return 1 if this is an ARM target that supports DSP multiply with
2373 # current multilib flags.
2375 proc check_effective_target_arm_dsp { } {
2376 return [check_no_compiler_messages arm_dsp assembly {
2377 #ifndef __ARM_FEATURE_DSP
2384 # Return 1 if this is an ARM target that supports unaligned word/halfword
2385 # load/store instructions.
2387 proc check_effective_target_arm_unaligned { } {
2388 return [check_no_compiler_messages arm_unaligned assembly {
2389 #ifndef __ARM_FEATURE_UNALIGNED
2390 #error no unaligned support
2396 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2397 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2398 # incompatible with these options. Also set et_arm_crypto_flags to the
2399 # best options to add.
2401 proc check_effective_target_arm_crypto_ok_nocache { } {
2402 global et_arm_crypto_flags
2403 set et_arm_crypto_flags ""
2404 if { [check_effective_target_arm32] } {
2405 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2406 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2407 #include "arm_neon.h"
2409 foo (uint8x16_t a, uint8x16_t b)
2411 return vaeseq_u8 (a, b);
2414 set et_arm_crypto_flags $flags
2423 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2425 proc check_effective_target_arm_crypto_ok { } {
2426 return [check_cached_effective_target arm_crypto_ok \
2427 check_effective_target_arm_crypto_ok_nocache]
2430 # Add options for crypto extensions.
2431 proc add_options_for_arm_crypto { flags } {
2432 if { ! [check_effective_target_arm_crypto_ok] } {
2435 global et_arm_crypto_flags
2436 return "$flags $et_arm_crypto_flags"
2439 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2440 # or -mfloat-abi=hard, but if one is already specified by the
2441 # multilib, use it. Similarly, if a -mfpu option already enables
2442 # NEON, do not add -mfpu=neon.
2444 proc add_options_for_arm_neon { flags } {
2445 if { ! [check_effective_target_arm_neon_ok] } {
2448 global et_arm_neon_flags
2449 return "$flags $et_arm_neon_flags"
2452 proc add_options_for_arm_v8_vfp { flags } {
2453 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2456 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2459 proc add_options_for_arm_v8_neon { flags } {
2460 if { ! [check_effective_target_arm_v8_neon_ok] } {
2463 global et_arm_v8_neon_flags
2464 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2467 proc add_options_for_arm_crc { flags } {
2468 if { ! [check_effective_target_arm_crc_ok] } {
2471 global et_arm_crc_flags
2472 return "$flags $et_arm_crc_flags"
2475 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2476 # or -mfloat-abi=hard, but if one is already specified by the
2477 # multilib, use it. Similarly, if a -mfpu option already enables
2478 # NEON, do not add -mfpu=neon.
2480 proc add_options_for_arm_neonv2 { flags } {
2481 if { ! [check_effective_target_arm_neonv2_ok] } {
2484 global et_arm_neonv2_flags
2485 return "$flags $et_arm_neonv2_flags"
2488 # Add the options needed for vfp3.
2489 proc add_options_for_arm_vfp3 { flags } {
2490 if { ! [check_effective_target_arm_vfp3_ok] } {
2493 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2496 # Return 1 if this is an ARM target supporting -mfpu=neon
2497 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2498 # incompatible with these options. Also set et_arm_neon_flags to the
2499 # best options to add.
2501 proc check_effective_target_arm_neon_ok_nocache { } {
2502 global et_arm_neon_flags
2503 set et_arm_neon_flags ""
2504 if { [check_effective_target_arm32] } {
2505 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2506 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2507 #include "arm_neon.h"
2510 set et_arm_neon_flags $flags
2519 proc check_effective_target_arm_neon_ok { } {
2520 return [check_cached_effective_target arm_neon_ok \
2521 check_effective_target_arm_neon_ok_nocache]
2524 proc check_effective_target_arm_crc_ok_nocache { } {
2525 global et_arm_crc_flags
2526 set et_arm_crc_flags "-march=armv8-a+crc"
2527 return [check_no_compiler_messages_nocache arm_crc_ok object {
2528 #if !defined (__ARM_FEATURE_CRC32)
2531 } "$et_arm_crc_flags"]
2534 proc check_effective_target_arm_crc_ok { } {
2535 return [check_cached_effective_target arm_crc_ok \
2536 check_effective_target_arm_crc_ok_nocache]
2539 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2540 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2541 # incompatible with these options. Also set et_arm_neon_flags to the
2542 # best options to add.
2544 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2545 global et_arm_neon_fp16_flags
2546 set et_arm_neon_fp16_flags ""
2547 if { [check_effective_target_arm32] } {
2548 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2549 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
2550 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2551 #include "arm_neon.h"
2553 foo (float32x4_t arg)
2555 return vcvt_f16_f32 (arg);
2558 set et_arm_neon_fp16_flags $flags
2567 proc check_effective_target_arm_neon_fp16_ok { } {
2568 return [check_cached_effective_target arm_neon_fp16_ok \
2569 check_effective_target_arm_neon_fp16_ok_nocache]
2572 proc add_options_for_arm_neon_fp16 { flags } {
2573 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2576 global et_arm_neon_fp16_flags
2577 return "$flags $et_arm_neon_fp16_flags"
2580 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2581 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2582 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2583 # best options to add.
2585 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2586 global et_arm_v8_neon_flags
2587 set et_arm_v8_neon_flags ""
2588 if { [check_effective_target_arm32] } {
2589 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2590 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2592 #error not armv8 or later
2594 #include "arm_neon.h"
2598 __asm__ volatile ("vrintn.f32 q0, q0");
2600 } "$flags -march=armv8-a"] } {
2601 set et_arm_v8_neon_flags $flags
2610 proc check_effective_target_arm_v8_neon_ok { } {
2611 return [check_cached_effective_target arm_v8_neon_ok \
2612 check_effective_target_arm_v8_neon_ok_nocache]
2615 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
2616 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2617 # incompatible with these options. Also set et_arm_neonv2_flags to the
2618 # best options to add.
2620 proc check_effective_target_arm_neonv2_ok_nocache { } {
2621 global et_arm_neonv2_flags
2622 set et_arm_neonv2_flags ""
2623 if { [check_effective_target_arm32] } {
2624 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
2625 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
2626 #include "arm_neon.h"
2628 foo (float32x2_t a, float32x2_t b, float32x2_t c)
2630 return vfma_f32 (a, b, c);
2633 set et_arm_neonv2_flags $flags
2642 proc check_effective_target_arm_neonv2_ok { } {
2643 return [check_cached_effective_target arm_neonv2_ok \
2644 check_effective_target_arm_neonv2_ok_nocache]
2647 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2648 # or -mfloat-abi=hard, but if one is already specified by the
2651 proc add_options_for_arm_fp16 { flags } {
2652 if { ! [check_effective_target_arm_fp16_ok] } {
2655 global et_arm_fp16_flags
2656 return "$flags $et_arm_fp16_flags"
2659 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
2660 # Skip multilibs that are incompatible with these options and set
2661 # et_arm_fp16_flags to the best options to add.
2663 proc check_effective_target_arm_fp16_ok_nocache { } {
2664 global et_arm_fp16_flags
2665 set et_arm_fp16_flags ""
2666 if { ! [check_effective_target_arm32] } {
2669 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2670 # Multilib flags would override -mfpu.
2673 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2674 # Must generate floating-point instructions.
2677 if [check_effective_target_arm_hf_eabi] {
2678 # Use existing float-abi and force an fpu which supports fp16
2679 set et_arm_fp16_flags "-mfpu=vfpv4"
2682 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2683 # The existing -mfpu value is OK; use it, but add softfp.
2684 set et_arm_fp16_flags "-mfloat-abi=softfp"
2687 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2688 # macro to check for this support.
2689 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2690 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2693 set et_arm_fp16_flags "$flags"
2700 proc check_effective_target_arm_fp16_ok { } {
2701 return [check_cached_effective_target arm_fp16_ok \
2702 check_effective_target_arm_fp16_ok_nocache]
2705 # Creates a series of routines that return 1 if the given architecture
2706 # can be selected and a routine to give the flags to select that architecture
2707 # Note: Extra flags may be added to disable options from newer compilers
2708 # (Thumb in particular - but others may be added in the future)
2709 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
2710 # /* { dg-add-options arm_arch_v5 } */
2711 # /* { dg-require-effective-target arm_arch_v5_multilib } */
2712 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
2713 v4t "-march=armv4t" __ARM_ARCH_4T__
2714 v5 "-march=armv5 -marm" __ARM_ARCH_5__
2715 v5t "-march=armv5t" __ARM_ARCH_5T__
2716 v5te "-march=armv5te" __ARM_ARCH_5TE__
2717 v6 "-march=armv6" __ARM_ARCH_6__
2718 v6k "-march=armv6k" __ARM_ARCH_6K__
2719 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
2720 v6z "-march=armv6z" __ARM_ARCH_6Z__
2721 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
2722 v7a "-march=armv7-a" __ARM_ARCH_7A__
2723 v7ve "-march=armv7ve" __ARM_ARCH_7A__
2724 v7r "-march=armv7-r" __ARM_ARCH_7R__
2725 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
2726 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
2727 v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
2728 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
2729 proc check_effective_target_arm_arch_FUNC_ok { } {
2730 if { [ string match "*-marm*" "FLAG" ] &&
2731 ![check_effective_target_arm_arm_ok] } {
2734 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
2741 proc add_options_for_arm_arch_FUNC { flags } {
2742 return "$flags FLAG"
2745 proc check_effective_target_arm_arch_FUNC_multilib { } {
2746 return [check_runtime arm_arch_FUNC_multilib {
2752 } [add_options_for_arm_arch_FUNC ""]]
2757 # Return 1 if this is an ARM target where -marm causes ARM to be
2760 proc check_effective_target_arm_arm_ok { } {
2761 return [check_no_compiler_messages arm_arm_ok assembly {
2762 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
2769 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
2772 proc check_effective_target_arm_thumb1_ok { } {
2773 return [check_no_compiler_messages arm_thumb1_ok assembly {
2774 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2777 int foo (int i) { return i; }
2781 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
2784 proc check_effective_target_arm_thumb2_ok { } {
2785 return [check_no_compiler_messages arm_thumb2_ok assembly {
2786 #if !defined(__thumb2__)
2789 int foo (int i) { return i; }
2793 # Return 1 if this is an ARM target where Thumb-1 is used without options
2794 # added by the test.
2796 proc check_effective_target_arm_thumb1 { } {
2797 return [check_no_compiler_messages arm_thumb1 assembly {
2798 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2805 # Return 1 if this is an ARM target where Thumb-2 is used without options
2806 # added by the test.
2808 proc check_effective_target_arm_thumb2 { } {
2809 return [check_no_compiler_messages arm_thumb2 assembly {
2810 #if !defined(__thumb2__)
2817 # Return 1 if this is an ARM target where conditional execution is available.
2819 proc check_effective_target_arm_cond_exec { } {
2820 return [check_no_compiler_messages arm_cond_exec assembly {
2821 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
2828 # Return 1 if this is an ARM cortex-M profile cpu
2830 proc check_effective_target_arm_cortex_m { } {
2831 return [check_no_compiler_messages arm_cortex_m assembly {
2832 #if !defined(__ARM_ARCH_7M__) \
2833 && !defined (__ARM_ARCH_7EM__) \
2834 && !defined (__ARM_ARCH_6M__)
2841 # Return 1 if the target supports executing NEON instructions, 0
2842 # otherwise. Cache the result.
2844 proc check_effective_target_arm_neon_hw { } {
2845 return [check_runtime arm_neon_hw_available {
2849 long long a = 0, b = 1;
2850 asm ("vorr %P0, %P1, %P2"
2852 : "0" (a), "w" (b));
2855 } [add_options_for_arm_neon ""]]
2858 proc check_effective_target_arm_neonv2_hw { } {
2859 return [check_runtime arm_neon_hwv2_available {
2860 #include "arm_neon.h"
2864 float32x2_t a, b, c;
2865 asm ("vfma.f32 %P0, %P1, %P2"
2867 : "w" (b), "w" (c));
2870 } [add_options_for_arm_neonv2 ""]]
2873 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
2876 proc check_effective_target_arm_v8_neon_hw { } {
2877 return [check_runtime arm_v8_neon_hw_available {
2878 #include "arm_neon.h"
2883 asm ("vrinta.f32 %P0, %P1"
2888 } [add_options_for_arm_v8_neon ""]]
2891 # Return 1 if this is a ARM target with NEON enabled.
2893 proc check_effective_target_arm_neon { } {
2894 if { [check_effective_target_arm32] } {
2895 return [check_no_compiler_messages arm_neon object {
2896 #ifndef __ARM_NEON__
2907 proc check_effective_target_arm_neonv2 { } {
2908 if { [check_effective_target_arm32] } {
2909 return [check_no_compiler_messages arm_neon object {
2910 #ifndef __ARM_NEON__
2913 #ifndef __ARM_FEATURE_FMA
2925 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
2926 # the Loongson vector modes.
2928 proc check_effective_target_mips_loongson { } {
2929 return [check_no_compiler_messages loongson assembly {
2930 #if !defined(__mips_loongson_vector_rev)
2936 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
2939 proc check_effective_target_arm_eabi { } {
2940 return [check_no_compiler_messages arm_eabi object {
2941 #ifndef __ARM_EABI__
2949 # Return 1 if this is an ARM target that adheres to the hard-float variant of
2950 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
2952 proc check_effective_target_arm_hf_eabi { } {
2953 return [check_no_compiler_messages arm_hf_eabi object {
2954 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
2955 #error not hard-float EABI
2962 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
2963 # Some multilibs may be incompatible with this option.
2965 proc check_effective_target_arm_iwmmxt_ok { } {
2966 if { [check_effective_target_arm32] } {
2967 return [check_no_compiler_messages arm_iwmmxt_ok object {
2975 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
2976 # for an ARM target.
2977 proc check_effective_target_arm_prefer_ldrd_strd { } {
2978 if { ![check_effective_target_arm32] } {
2982 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
2983 void foo (int *p) { p[0] = 1; p[1] = 0;}
2987 # Return 1 if this is a PowerPC target supporting -meabi.
2989 proc check_effective_target_powerpc_eabi_ok { } {
2990 if { [istarget powerpc*-*-*] } {
2991 return [check_no_compiler_messages powerpc_eabi_ok object {
2999 # Return 1 if this is a PowerPC target with floating-point registers.
3001 proc check_effective_target_powerpc_fprs { } {
3002 if { [istarget powerpc*-*-*]
3003 || [istarget rs6000-*-*] } {
3004 return [check_no_compiler_messages powerpc_fprs object {
3016 # Return 1 if this is a PowerPC target with hardware double-precision
3019 proc check_effective_target_powerpc_hard_double { } {
3020 if { [istarget powerpc*-*-*]
3021 || [istarget rs6000-*-*] } {
3022 return [check_no_compiler_messages powerpc_hard_double object {
3034 # Return 1 if this is a PowerPC target supporting -maltivec.
3036 proc check_effective_target_powerpc_altivec_ok { } {
3037 if { ([istarget powerpc*-*-*]
3038 && ![istarget powerpc-*-linux*paired*])
3039 || [istarget rs6000-*-*] } {
3040 # AltiVec is not supported on AIX before 5.3.
3041 if { [istarget powerpc*-*-aix4*]
3042 || [istarget powerpc*-*-aix5.1*]
3043 || [istarget powerpc*-*-aix5.2*] } {
3046 return [check_no_compiler_messages powerpc_altivec_ok object {
3054 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3056 proc check_effective_target_powerpc_p8vector_ok { } {
3057 if { ([istarget powerpc*-*-*]
3058 && ![istarget powerpc-*-linux*paired*])
3059 || [istarget rs6000-*-*] } {
3060 # AltiVec is not supported on AIX before 5.3.
3061 if { [istarget powerpc*-*-aix4*]
3062 || [istarget powerpc*-*-aix5.1*]
3063 || [istarget powerpc*-*-aix5.2*] } {
3066 return [check_no_compiler_messages powerpc_p8vector_ok object {
3069 asm volatile ("xxlorc vs0,vs0,vs0");
3071 asm volatile ("xxlorc 0,0,0");
3075 } "-mpower8-vector"]
3081 # Return 1 if this is a PowerPC target supporting -mvsx
3083 proc check_effective_target_powerpc_vsx_ok { } {
3084 if { ([istarget powerpc*-*-*]
3085 && ![istarget powerpc-*-linux*paired*])
3086 || [istarget rs6000-*-*] } {
3087 # VSX is not supported on AIX before 7.1.
3088 if { [istarget powerpc*-*-aix4*]
3089 || [istarget powerpc*-*-aix5*]
3090 || [istarget powerpc*-*-aix6*] } {
3093 return [check_no_compiler_messages powerpc_vsx_ok object {
3096 asm volatile ("xxlor vs0,vs0,vs0");
3098 asm volatile ("xxlor 0,0,0");
3108 # Return 1 if this is a PowerPC target supporting -mhtm
3110 proc check_effective_target_powerpc_htm_ok { } {
3111 if { ([istarget powerpc*-*-*]
3112 && ![istarget powerpc-*-linux*paired*])
3113 || [istarget rs6000-*-*] } {
3114 # HTM is not supported on AIX yet.
3115 if { [istarget powerpc*-*-aix*] } {
3118 return [check_no_compiler_messages powerpc_htm_ok object {
3120 asm volatile ("tbegin. 0");
3129 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3131 proc check_effective_target_powerpc_ppu_ok { } {
3132 if [check_effective_target_powerpc_altivec_ok] {
3133 return [check_no_compiler_messages cell_asm_available object {
3136 asm volatile ("lvlx v0,v0,v0");
3138 asm volatile ("lvlx 0,0,0");
3148 # Return 1 if this is a PowerPC target that supports SPU.
3150 proc check_effective_target_powerpc_spu { } {
3151 if { [istarget powerpc*-*-linux*] } {
3152 return [check_effective_target_powerpc_altivec_ok]
3158 # Return 1 if this is a PowerPC SPE target. The check includes options
3159 # specified by dg-options for this test, so don't
cache the result.
3161 proc check_effective_target_powerpc_spe_nocache
{ } {
3162 if { [istarget powerpc
*-*-*] } {
3163 return [check_no_compiler_messages_nocache powerpc_spe object
{
3169 } [current_compiler_flags
]]
3175 #
Return 1 if this is a PowerPC target with SPE enabled.
3177 proc check_effective_target_powerpc_spe
{ } {
3178 if { [istarget powerpc
*-*-*] } {
3179 return [check_no_compiler_messages powerpc_spe object
{
3191 #
Return 1 if this is a PowerPC target with Altivec enabled.
3193 proc check_effective_target_powerpc_altivec
{ } {
3194 if { [istarget powerpc
*-*-*] } {
3195 return [check_no_compiler_messages powerpc_altivec object
{
3207 #
Return 1 if this is a PowerPC
405 target. The check includes options
3208 # specified by dg
-options
for this test
, so don
't cache the result.
3210 proc check_effective_target_powerpc_405_nocache { } {
3211 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3212 return [check_no_compiler_messages_nocache powerpc_405 object {
3218 } [current_compiler_flags]]
3224 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3226 proc check_effective_target_powerpc_elfv2 { } {
3227 if { [istarget powerpc*-*-*] } {
3228 return [check_no_compiler_messages powerpc_elfv2 object {
3230 #error not ELF v2 ABI
3240 # Return 1 if this is a SPU target with a toolchain that
3241 # supports automatic overlay generation.
3243 proc check_effective_target_spu_auto_overlay { } {
3244 if { [istarget spu*-*-elf*] } {
3245 return [check_no_compiler_messages spu_auto_overlay executable {
3247 } "-Wl,--auto-overlay" ]
3253 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3254 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3255 # test environment appears to run executables on such a simulator.
3257 proc check_effective_target_ultrasparc_hw { } {
3258 return [check_runtime ultrasparc_hw {
3259 int main() { return 0; }
3260 } "-mcpu=ultrasparc"]
3263 # Return 1 if the test environment supports executing UltraSPARC VIS2
3264 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3266 proc check_effective_target_ultrasparc_vis2_hw { } {
3267 return [check_runtime ultrasparc_vis2_hw {
3268 int main() { __asm__(".word 0x81b00320"); return 0; }
3269 } "-mcpu=ultrasparc3"]
3272 # Return 1 if the test environment supports executing UltraSPARC VIS3
3273 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3275 proc check_effective_target_ultrasparc_vis3_hw { } {
3276 return [check_runtime ultrasparc_vis3_hw {
3277 int main() { __asm__(".word 0x81b00220"); return 0; }
3281 # Return 1 if this is a SPARC-V9 target.
3283 proc check_effective_target_sparc_v9 { } {
3284 if { [istarget sparc*-*-*] } {
3285 return [check_no_compiler_messages sparc_v9 object {
3287 asm volatile ("return %i7+8");
3296 # Return 1 if this is a SPARC target with VIS enabled.
3298 proc check_effective_target_sparc_vis { } {
3299 if { [istarget sparc*-*-*] } {
3300 return [check_no_compiler_messages sparc_vis object {
3312 # Return 1 if the target supports hardware vector shift operation.
3314 proc check_effective_target_vect_shift { } {
3315 global et_vect_shift_saved
3317 if [info exists et_vect_shift_saved] {
3318 verbose "check_effective_target_vect_shift: using cached result" 2
3320 set et_vect_shift_saved 0
3321 if { ([istarget powerpc*-*-*]
3322 && ![istarget powerpc-*-linux*paired*])
3323 || [istarget ia64-*-*]
3324 || [istarget i?86-*-*]
3325 || [istarget x86_64-*-*]
3326 || [istarget aarch64*-*-*]
3327 || [check_effective_target_arm32]
3328 || ([istarget mips*-*-*]
3329 && [check_effective_target_mips_loongson]) } {
3330 set et_vect_shift_saved 1
3334 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3335 return $et_vect_shift_saved
3338 # Return 1 if the target supports vector bswap operations.
3340 proc check_effective_target_vect_bswap { } {
3341 global et_vect_bswap_saved
3343 if [info exists et_vect_bswap_saved] {
3344 verbose "check_effective_target_vect_bswap: using cached result" 2
3346 set et_vect_bswap_saved 0
3347 if { [istarget aarch64*-*-*]
3348 || ([istarget arm*-*-*]
3349 && [check_effective_target_arm_neon])
3351 set et_vect_bswap_saved 1
3355 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3356 return $et_vect_bswap_saved
3359 # Return 1 if the target supports hardware vector shift operation for char.
3361 proc check_effective_target_vect_shift_char { } {
3362 global et_vect_shift_char_saved
3364 if [info exists et_vect_shift_char_saved] {
3365 verbose "check_effective_target_vect_shift_char: using cached result" 2
3367 set et_vect_shift_char_saved 0
3368 if { ([istarget powerpc*-*-*]
3369 && ![istarget powerpc-*-linux*paired*])
3370 || [check_effective_target_arm32] } {
3371 set et_vect_shift_char_saved 1
3375 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3376 return $et_vect_shift_char_saved
3379 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3381 # This can change for different subtargets so do not cache the result.
3383 proc check_effective_target_vect_long { } {
3384 if { [istarget i?86-*-*]
3385 || (([istarget powerpc*-*-*]
3386 && ![istarget powerpc-*-linux*paired*])
3387 && [check_effective_target_ilp32])
3388 || [istarget x86_64-*-*]
3389 || [check_effective_target_arm32]
3390 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3396 verbose "check_effective_target_vect_long: returning $answer" 2
3400 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3402 # This won't change
for different subtargets so
cache the result.
3404 proc check_effective_target_vect_float
{ } {
3405 global et_vect_float_saved
3407 if [info exists et_vect_float_saved
] {
3408 verbose
"check_effective_target_vect_float: using cached result" 2
3410 set et_vect_float_saved
0
3411 if { [istarget i?
86-*-*]
3412 ||
[istarget powerpc
*-*-*]
3413 ||
[istarget spu
-*-*]
3414 ||
[istarget mips
-sde
-elf
]
3415 ||
[istarget mipsisa64
*-*-*]
3416 ||
[istarget x86_64
-*-*]
3417 ||
[istarget ia64
-*-*]
3418 ||
[istarget aarch64
*-*-*]
3419 ||
[check_effective_target_arm32
] } {
3420 set et_vect_float_saved
1
3424 verbose
"check_effective_target_vect_float: returning $et_vect_float_saved" 2
3425 return $et_vect_float_saved
3428 #
Return 1 if the target supports hardware vectors of double
, 0 otherwise.
3430 # This won
't change for different subtargets so cache the result.
3432 proc check_effective_target_vect_double { } {
3433 global et_vect_double_saved
3435 if [info exists et_vect_double_saved] {
3436 verbose "check_effective_target_vect_double: using cached result" 2
3438 set et_vect_double_saved 0
3439 if { [istarget i?86-*-*]
3440 || [istarget aarch64*-*-*]
3441 || [istarget x86_64-*-*] } {
3442 if { [check_no_compiler_messages vect_double assembly {
3443 #ifdef __tune_atom__
3444 # error No double vectorizer support.
3447 set et_vect_double_saved 1
3449 set et_vect_double_saved 0
3451 } elseif { [istarget spu-*-*] } {
3452 set et_vect_double_saved 1
3456 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
3457 return $et_vect_double_saved
3460 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
3462 # This won't change
for different subtargets so
cache the result.
3464 proc check_effective_target_vect_long_long
{ } {
3465 global et_vect_long_long_saved
3467 if [info exists et_vect_long_long_saved
] {
3468 verbose
"check_effective_target_vect_long_long: using cached result" 2
3470 set et_vect_long_long_saved
0
3471 if { [istarget i?
86-*-*]
3472 ||
[istarget x86_64
-*-*] } {
3473 set et_vect_long_long_saved
1
3477 verbose
"check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
3478 return $et_vect_long_long_saved
3482 #
Return 1 if the target plus current options does not support a vector
3483 #
max instruction
on "int", 0 otherwise.
3485 # This won
't change for different subtargets so cache the result.
3487 proc check_effective_target_vect_no_int_max { } {
3488 global et_vect_no_int_max_saved
3490 if [info exists et_vect_no_int_max_saved] {
3491 verbose "check_effective_target_vect_no_int_max: using cached result" 2
3493 set et_vect_no_int_max_saved 0
3494 if { [istarget sparc*-*-*]
3495 || [istarget spu-*-*]
3496 || [istarget alpha*-*-*]
3497 || ([istarget mips*-*-*]
3498 && [check_effective_target_mips_loongson]) } {
3499 set et_vect_no_int_max_saved 1
3502 verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
3503 return $et_vect_no_int_max_saved
3506 # Return 1 if the target plus current options does not support a vector
3507 # add instruction on "int", 0 otherwise.
3509 # This won't change
for different subtargets so
cache the result.
3511 proc check_effective_target_vect_no_int_add
{ } {
3512 global et_vect_no_int_add_saved
3514 if [info exists et_vect_no_int_add_saved
] {
3515 verbose
"check_effective_target_vect_no_int_add: using cached result" 2
3517 set et_vect_no_int_add_saved
0
3518 # Alpha only supports vector add
on V8QI and V4HI.
3519 if { [istarget alpha
*-*-*] } {
3520 set et_vect_no_int_add_saved
1
3523 verbose
"check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
3524 return $et_vect_no_int_add_saved
3527 #
Return 1 if the target plus current options does not support vector
3528 # bitwise instructions
, 0 otherwise.
3530 # This won
't change for different subtargets so cache the result.
3532 proc check_effective_target_vect_no_bitwise { } {
3533 global et_vect_no_bitwise_saved
3535 if [info exists et_vect_no_bitwise_saved] {
3536 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
3538 set et_vect_no_bitwise_saved 0
3540 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
3541 return $et_vect_no_bitwise_saved
3544 # Return 1 if the target plus current options supports vector permutation,
3547 # This won't change
for different subtargets so
cache the result.
3549 proc check_effective_target_vect_perm
{ } {
3552 if [info exists et_vect_perm_saved
] {
3553 verbose
"check_effective_target_vect_perm: using cached result" 2
3555 set et_vect_perm_saved
0
3556 if { [is
-effective
-target arm_neon_ok
]
3557 ||
[istarget aarch64
*-*-*]
3558 ||
[istarget powerpc
*-*-*]
3559 ||
[istarget spu
-*-*]
3560 ||
[istarget i?
86-*-*]
3561 ||
[istarget x86_64
-*-*]
3562 ||
([istarget mips
*-*-*]
3563 && [check_effective_target_mpaired_single
]) } {
3564 set et_vect_perm_saved
1
3567 verbose
"check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
3568 return $et_vect_perm_saved
3571 #
Return 1 if the target plus current options supports vector permutation
3572 #
on byte
-sized elements
, 0 otherwise.
3574 # This won
't change for different subtargets so cache the result.
3576 proc check_effective_target_vect_perm_byte { } {
3577 global et_vect_perm_byte
3579 if [info exists et_vect_perm_byte_saved] {
3580 verbose "check_effective_target_vect_perm_byte: using cached result" 2
3582 set et_vect_perm_byte_saved 0
3583 if { ([is-effective-target arm_neon_ok]
3584 && [is-effective-target arm_little_endian])
3585 || ([istarget aarch64*-*-*]
3586 && [is-effective-target aarch64_little_endian])
3587 || [istarget powerpc*-*-*]
3588 || [istarget spu-*-*] } {
3589 set et_vect_perm_byte_saved 1
3592 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
3593 return $et_vect_perm_byte_saved
3596 # Return 1 if the target plus current options supports vector permutation
3597 # on short-sized elements, 0 otherwise.
3599 # This won't change
for different subtargets so
cache the result.
3601 proc check_effective_target_vect_perm_short
{ } {
3602 global et_vect_perm_short
3604 if [info exists et_vect_perm_short_saved
] {
3605 verbose
"check_effective_target_vect_perm_short: using cached result" 2
3607 set et_vect_perm_short_saved
0
3608 if { ([is
-effective
-target arm_neon_ok
]
3609 && [is
-effective
-target arm_little_endian
])
3610 ||
([istarget aarch64
*-*-*]
3611 && [is
-effective
-target aarch64_little_endian
])
3612 ||
[istarget powerpc
*-*-*]
3613 ||
[istarget spu
-*-*] } {
3614 set et_vect_perm_short_saved
1
3617 verbose
"check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
3618 return $et_vect_perm_short_saved
3621 #
Return 1 if the target plus current options supports a vector
3622 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
3624 # This won
't change for different subtargets so cache the result.
3626 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
3627 global et_vect_widen_sum_hi_to_si_pattern
3629 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
3630 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
3632 set et_vect_widen_sum_hi_to_si_pattern_saved 0
3633 if { [istarget powerpc*-*-*]
3634 || [istarget ia64-*-*] } {
3635 set et_vect_widen_sum_hi_to_si_pattern_saved 1
3638 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
3639 return $et_vect_widen_sum_hi_to_si_pattern_saved
3642 # Return 1 if the target plus current options supports a vector
3643 # widening summation of *short* args into *int* result, 0 otherwise.
3644 # A target can also support this widening summation if it can support
3645 # promotion (unpacking) from shorts to ints.
3647 # This won't change
for different subtargets so
cache the result.
3649 proc check_effective_target_vect_widen_sum_hi_to_si
{ } {
3650 global et_vect_widen_sum_hi_to_si
3652 if [info exists et_vect_widen_sum_hi_to_si_saved
] {
3653 verbose
"check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
3655 set et_vect_widen_sum_hi_to_si_saved
[check_effective_target_vect_unpack
]
3656 if { [istarget powerpc
*-*-*]
3657 ||
[istarget ia64
-*-*] } {
3658 set et_vect_widen_sum_hi_to_si_saved
1
3661 verbose
"check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
3662 return $et_vect_widen_sum_hi_to_si_saved
3665 #
Return 1 if the target plus current options supports a vector
3666 # widening summation of
*char
* args into
*short
* result
, 0 otherwise.
3667 # A target can also support this widening summation
if it can support
3668 # promotion
(unpacking
) from chars to shorts.
3670 # This won
't change for different subtargets so cache the result.
3672 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
3673 global et_vect_widen_sum_qi_to_hi
3675 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
3676 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
3678 set et_vect_widen_sum_qi_to_hi_saved 0
3679 if { [check_effective_target_vect_unpack]
3680 || [check_effective_target_arm_neon_ok]
3681 || [istarget ia64-*-*] } {
3682 set et_vect_widen_sum_qi_to_hi_saved 1
3685 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
3686 return $et_vect_widen_sum_qi_to_hi_saved
3689 # Return 1 if the target plus current options supports a vector
3690 # widening summation of *char* args into *int* result, 0 otherwise.
3692 # This won't change
for different subtargets so
cache the result.
3694 proc check_effective_target_vect_widen_sum_qi_to_si
{ } {
3695 global et_vect_widen_sum_qi_to_si
3697 if [info exists et_vect_widen_sum_qi_to_si_saved
] {
3698 verbose
"check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
3700 set et_vect_widen_sum_qi_to_si_saved
0
3701 if { [istarget powerpc
*-*-*] } {
3702 set et_vect_widen_sum_qi_to_si_saved
1
3705 verbose
"check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
3706 return $et_vect_widen_sum_qi_to_si_saved
3709 #
Return 1 if the target plus current options supports a vector
3710 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
3711 # A target can also support this widening multplication
if it can support
3712 # promotion
(unpacking
) from chars to shorts
, and vect_short_mult
(non
-widening
3713 # multiplication of shorts
).
3715 # This won
't change for different subtargets so cache the result.
3718 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
3719 global et_vect_widen_mult_qi_to_hi
3721 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
3722 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
3724 if { [check_effective_target_vect_unpack]
3725 && [check_effective_target_vect_short_mult] } {
3726 set et_vect_widen_mult_qi_to_hi_saved 1
3728 set et_vect_widen_mult_qi_to_hi_saved 0
3730 if { [istarget powerpc*-*-*]
3731 || [istarget aarch64*-*-*]
3732 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3733 set et_vect_widen_mult_qi_to_hi_saved 1
3736 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
3737 return $et_vect_widen_mult_qi_to_hi_saved
3740 # Return 1 if the target plus current options supports a vector
3741 # widening multiplication of *short* args into *int* result, 0 otherwise.
3742 # A target can also support this widening multplication if it can support
3743 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
3744 # multiplication of ints).
3746 # This won't change
for different subtargets so
cache the result.
3749 proc check_effective_target_vect_widen_mult_hi_to_si
{ } {
3750 global et_vect_widen_mult_hi_to_si
3752 if [info exists et_vect_widen_mult_hi_to_si_saved
] {
3753 verbose
"check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
3755 if { [check_effective_target_vect_unpack
]
3756 && [check_effective_target_vect_int_mult
] } {
3757 set et_vect_widen_mult_hi_to_si_saved
1
3759 set et_vect_widen_mult_hi_to_si_saved
0
3761 if { [istarget powerpc
*-*-*]
3762 ||
[istarget spu
-*-*]
3763 ||
[istarget ia64
-*-*]
3764 ||
[istarget aarch64
*-*-*]
3765 ||
[istarget i?
86-*-*]
3766 ||
[istarget x86_64
-*-*]
3767 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
3768 set et_vect_widen_mult_hi_to_si_saved
1
3771 verbose
"check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
3772 return $et_vect_widen_mult_hi_to_si_saved
3775 #
Return 1 if the target plus current options supports a vector
3776 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
3778 # This won
't change for different subtargets so cache the result.
3780 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
3781 global et_vect_widen_mult_qi_to_hi_pattern
3783 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
3784 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
3786 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
3787 if { [istarget powerpc*-*-*]
3788 || ([istarget arm*-*-*]
3789 && [check_effective_target_arm_neon_ok]
3790 && [check_effective_target_arm_little_endian]) } {
3791 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
3794 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
3795 return $et_vect_widen_mult_qi_to_hi_pattern_saved
3798 # Return 1 if the target plus current options supports a vector
3799 # widening multiplication of *short* args into *int* result, 0 otherwise.
3801 # This won't change
for different subtargets so
cache the result.
3803 proc check_effective_target_vect_widen_mult_hi_to_si_pattern
{ } {
3804 global et_vect_widen_mult_hi_to_si_pattern
3806 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved
] {
3807 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
3809 set et_vect_widen_mult_hi_to_si_pattern_saved
0
3810 if { [istarget powerpc
*-*-*]
3811 ||
[istarget spu
-*-*]
3812 ||
[istarget ia64
-*-*]
3813 ||
[istarget i?
86-*-*]
3814 ||
[istarget x86_64
-*-*]
3815 ||
([istarget arm
*-*-*]
3816 && [check_effective_target_arm_neon_ok
]
3817 && [check_effective_target_arm_little_endian
]) } {
3818 set et_vect_widen_mult_hi_to_si_pattern_saved
1
3821 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
3822 return $et_vect_widen_mult_hi_to_si_pattern_saved
3825 #
Return 1 if the target plus current options supports a vector
3826 # widening multiplication of
*int* args into
*long
* result
, 0 otherwise.
3828 # This won
't change for different subtargets so cache the result.
3830 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
3831 global et_vect_widen_mult_si_to_di_pattern
3833 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
3834 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
3836 set et_vect_widen_mult_si_to_di_pattern_saved 0
3837 if {[istarget ia64-*-*]
3838 || [istarget i?86-*-*]
3839 || [istarget x86_64-*-*] } {
3840 set et_vect_widen_mult_si_to_di_pattern_saved 1
3843 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
3844 return $et_vect_widen_mult_si_to_di_pattern_saved
3847 # Return 1 if the target plus current options supports a vector
3848 # widening shift, 0 otherwise.
3850 # This won't change
for different subtargets so
cache the result.
3852 proc check_effective_target_vect_widen_shift
{ } {
3853 global et_vect_widen_shift_saved
3855 if [info exists et_vect_shift_saved
] {
3856 verbose
"check_effective_target_vect_widen_shift: using cached result" 2
3858 set et_vect_widen_shift_saved
0
3859 if { ([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
3860 set et_vect_widen_shift_saved
1
3863 verbose
"check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
3864 return $et_vect_widen_shift_saved
3867 #
Return 1 if the target plus current options supports a vector
3868 # dot
-product of signed chars
, 0 otherwise.
3870 # This won
't change for different subtargets so cache the result.
3872 proc check_effective_target_vect_sdot_qi { } {
3873 global et_vect_sdot_qi
3875 if [info exists et_vect_sdot_qi_saved] {
3876 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
3878 set et_vect_sdot_qi_saved 0
3879 if { [istarget ia64-*-*] } {
3880 set et_vect_udot_qi_saved 1
3883 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
3884 return $et_vect_sdot_qi_saved
3887 # Return 1 if the target plus current options supports a vector
3888 # dot-product of unsigned chars, 0 otherwise.
3890 # This won't change
for different subtargets so
cache the result.
3892 proc check_effective_target_vect_udot_qi
{ } {
3893 global et_vect_udot_qi
3895 if [info exists et_vect_udot_qi_saved
] {
3896 verbose
"check_effective_target_vect_udot_qi: using cached result" 2
3898 set et_vect_udot_qi_saved
0
3899 if { [istarget powerpc
*-*-*]
3900 ||
[istarget ia64
-*-*] } {
3901 set et_vect_udot_qi_saved
1
3904 verbose
"check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
3905 return $et_vect_udot_qi_saved
3908 #
Return 1 if the target plus current options supports a vector
3909 # dot
-product of signed shorts
, 0 otherwise.
3911 # This won
't change for different subtargets so cache the result.
3913 proc check_effective_target_vect_sdot_hi { } {
3914 global et_vect_sdot_hi
3916 if [info exists et_vect_sdot_hi_saved] {
3917 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
3919 set et_vect_sdot_hi_saved 0
3920 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
3921 || [istarget ia64-*-*]
3922 || [istarget i?86-*-*]
3923 || [istarget x86_64-*-*] } {
3924 set et_vect_sdot_hi_saved 1
3927 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
3928 return $et_vect_sdot_hi_saved
3931 # Return 1 if the target plus current options supports a vector
3932 # dot-product of unsigned shorts, 0 otherwise.
3934 # This won't change
for different subtargets so
cache the result.
3936 proc check_effective_target_vect_udot_hi
{ } {
3937 global et_vect_udot_hi
3939 if [info exists et_vect_udot_hi_saved
] {
3940 verbose
"check_effective_target_vect_udot_hi: using cached result" 2
3942 set et_vect_udot_hi_saved
0
3943 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*]) } {
3944 set et_vect_udot_hi_saved
1
3947 verbose
"check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
3948 return $et_vect_udot_hi_saved
3951 #
Return 1 if the target plus current options supports a vector
3952 # sad operation of unsigned chars
, 0 otherwise.
3954 # This won
't change for different subtargets so cache the result.
3956 proc check_effective_target_vect_usad_char { } {
3957 global et_vect_usad_char
3959 if [info exists et_vect_usad_char_saved] {
3960 verbose "check_effective_target_vect_usad_char: using cached result" 2
3962 set et_vect_usad_char_saved 0
3963 if { ([istarget i?86-*-*]
3964 || [istarget x86_64-*-*]) } {
3965 set et_vect_usad_char_saved 1
3968 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
3969 return $et_vect_usad_char_saved
3972 # Return 1 if the target plus current options supports a vector
3973 # demotion (packing) of shorts (to chars) and ints (to shorts)
3974 # using modulo arithmetic, 0 otherwise.
3976 # This won't change
for different subtargets so
cache the result.
3978 proc check_effective_target_vect_pack_trunc
{ } {
3979 global et_vect_pack_trunc
3981 if [info exists et_vect_pack_trunc_saved
] {
3982 verbose
"check_effective_target_vect_pack_trunc: using cached result" 2
3984 set et_vect_pack_trunc_saved
0
3985 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
3986 ||
[istarget i?
86-*-*]
3987 ||
[istarget x86_64
-*-*]
3988 ||
[istarget aarch64
*-*-*]
3989 ||
[istarget spu
-*-*]
3990 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
3991 && [check_effective_target_arm_little_endian
]) } {
3992 set et_vect_pack_trunc_saved
1
3995 verbose
"check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
3996 return $et_vect_pack_trunc_saved
3999 #
Return 1 if the target plus current options supports a vector
4000 # promotion
(unpacking
) of chars
(to shorts
) and shorts
(to ints
), 0 otherwise.
4002 # This won
't change for different subtargets so cache the result.
4004 proc check_effective_target_vect_unpack { } {
4005 global et_vect_unpack
4007 if [info exists et_vect_unpack_saved] {
4008 verbose "check_effective_target_vect_unpack: using cached result" 2
4010 set et_vect_unpack_saved 0
4011 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4012 || [istarget i?86-*-*]
4013 || [istarget x86_64-*-*]
4014 || [istarget spu-*-*]
4015 || [istarget ia64-*-*]
4016 || [istarget aarch64*-*-*]
4017 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4018 && [check_effective_target_arm_little_endian]) } {
4019 set et_vect_unpack_saved 1
4022 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4023 return $et_vect_unpack_saved
4026 # Return 1 if the target plus current options does not guarantee
4027 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4029 # This won't change
for different subtargets so
cache the result.
4031 proc check_effective_target_unaligned_stack
{ } {
4032 global et_unaligned_stack_saved
4034 if [info exists et_unaligned_stack_saved
] {
4035 verbose
"check_effective_target_unaligned_stack: using cached result" 2
4037 set et_unaligned_stack_saved
0
4039 verbose
"check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4040 return $et_unaligned_stack_saved
4043 #
Return 1 if the target plus current options does not support a vector
4044 # alignment mechanism
, 0 otherwise.
4046 # This won
't change for different subtargets so cache the result.
4048 proc check_effective_target_vect_no_align { } {
4049 global et_vect_no_align_saved
4051 if [info exists et_vect_no_align_saved] {
4052 verbose "check_effective_target_vect_no_align: using cached result" 2
4054 set et_vect_no_align_saved 0
4055 if { [istarget mipsisa64*-*-*]
4056 || [istarget mips-sde-elf]
4057 || [istarget sparc*-*-*]
4058 || [istarget ia64-*-*]
4059 || [check_effective_target_arm_vect_no_misalign]
4060 || ([istarget mips*-*-*]
4061 && [check_effective_target_mips_loongson]) } {
4062 set et_vect_no_align_saved 1
4065 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4066 return $et_vect_no_align_saved
4069 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4071 # This won't change
for different subtargets so
cache the result.
4073 proc check_effective_target_vect_hw_misalign
{ } {
4074 global et_vect_hw_misalign_saved
4076 if [info exists et_vect_hw_misalign_saved
] {
4077 verbose
"check_effective_target_vect_hw_misalign: using cached result" 2
4079 set et_vect_hw_misalign_saved
0
4080 if { ([istarget x86_64
-*-*]
4081 ||
[istarget aarch64
*-*-*]
4082 ||
[istarget i?
86-*-*]) } {
4083 set et_vect_hw_misalign_saved
1
4086 verbose
"check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4087 return $et_vect_hw_misalign_saved
4091 #
Return 1 if arrays are aligned to the vector alignment
4092 # boundary
, 0 otherwise.
4094 # This won
't change for different subtargets so cache the result.
4096 proc check_effective_target_vect_aligned_arrays { } {
4097 global et_vect_aligned_arrays
4099 if [info exists et_vect_aligned_arrays_saved] {
4100 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4102 set et_vect_aligned_arrays_saved 0
4103 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4104 if { ([is-effective-target lp64]
4105 && ( ![check_avx_available]
4106 || [check_prefer_avx128])) } {
4107 set et_vect_aligned_arrays_saved 1
4110 if [istarget spu-*-*] {
4111 set et_vect_aligned_arrays_saved 1
4114 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4115 return $et_vect_aligned_arrays_saved
4118 # Return 1 if types of size 32 bit or less are naturally aligned
4119 # (aligned to their type-size), 0 otherwise.
4121 # This won't change
for different subtargets so
cache the result.
4123 proc check_effective_target_natural_alignment_32
{ } {
4124 global et_natural_alignment_32
4126 if [info exists et_natural_alignment_32_saved
] {
4127 verbose
"check_effective_target_natural_alignment_32: using cached result" 2
4129 # FIXME
: 32bit powerpc
: guaranteed only
if MASK_ALIGN_NATURAL
/POWER.
4130 set et_natural_alignment_32_saved
1
4131 if { ([istarget
*-*-darwin
*] && [is
-effective
-target lp64
]) } {
4132 set et_natural_alignment_32_saved
0
4135 verbose
"check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4136 return $et_natural_alignment_32_saved
4139 #
Return 1 if types of size
64 bit or less are naturally aligned
(aligned to their
4140 # type
-size
), 0 otherwise.
4142 # This won
't change for different subtargets so cache the result.
4144 proc check_effective_target_natural_alignment_64 { } {
4145 global et_natural_alignment_64
4147 if [info exists et_natural_alignment_64_saved] {
4148 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4150 set et_natural_alignment_64_saved 0
4151 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4152 || [istarget spu-*-*] } {
4153 set et_natural_alignment_64_saved 1
4156 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4157 return $et_natural_alignment_64_saved
4160 # Return 1 if all vector types are naturally aligned (aligned to their
4161 # type-size), 0 otherwise.
4163 # This won't change
for different subtargets so
cache the result.
4165 proc check_effective_target_vect_natural_alignment
{ } {
4166 global et_vect_natural_alignment
4168 if [info exists et_vect_natural_alignment_saved
] {
4169 verbose
"check_effective_target_vect_natural_alignment: using cached result" 2
4171 set et_vect_natural_alignment_saved
1
4172 if { [check_effective_target_arm_eabi
] } {
4173 set et_vect_natural_alignment_saved
0
4176 verbose
"check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4177 return $et_vect_natural_alignment_saved
4180 #
Return 1 if vector alignment
(for types of size
32 bit or less
) is reachable
, 0 otherwise.
4182 # This won
't change for different subtargets so cache the result.
4184 proc check_effective_target_vector_alignment_reachable { } {
4185 global et_vector_alignment_reachable
4187 if [info exists et_vector_alignment_reachable_saved] {
4188 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4190 if { [check_effective_target_vect_aligned_arrays]
4191 || [check_effective_target_natural_alignment_32] } {
4192 set et_vector_alignment_reachable_saved 1
4194 set et_vector_alignment_reachable_saved 0
4197 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4198 return $et_vector_alignment_reachable_saved
4201 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4203 # This won't change
for different subtargets so
cache the result.
4205 proc check_effective_target_vector_alignment_reachable_for_64bit
{ } {
4206 global et_vector_alignment_reachable_for_64bit
4208 if [info exists et_vector_alignment_reachable_for_64bit_saved
] {
4209 verbose
"check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4211 if { [check_effective_target_vect_aligned_arrays
]
4212 ||
[check_effective_target_natural_alignment_64
] } {
4213 set et_vector_alignment_reachable_for_64bit_saved
1
4215 set et_vector_alignment_reachable_for_64bit_saved
0
4218 verbose
"check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4219 return $et_vector_alignment_reachable_for_64bit_saved
4222 #
Return 1 if the target only requires element alignment
for vector accesses
4224 proc check_effective_target_vect_element_align
{ } {
4225 global et_vect_element_align
4227 if [info exists et_vect_element_align
] {
4228 verbose
"check_effective_target_vect_element_align: using cached result" 2
4230 set et_vect_element_align
0
4231 if { ([istarget arm
*-*-*]
4232 && ![check_effective_target_arm_vect_no_misalign
])
4233 ||
[check_effective_target_vect_hw_misalign
] } {
4234 set et_vect_element_align
1
4238 verbose
"check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4239 return $et_vect_element_align
4242 #
Return 1 if the target supports vector conditional operations
, 0 otherwise.
4244 proc check_effective_target_vect_condition
{ } {
4245 global et_vect_cond_saved
4247 if [info exists et_vect_cond_saved
] {
4248 verbose
"check_effective_target_vect_cond: using cached result" 2
4250 set et_vect_cond_saved
0
4251 if { [istarget aarch64
*-*-*]
4252 ||
[istarget powerpc
*-*-*]
4253 ||
[istarget ia64
-*-*]
4254 ||
[istarget i?
86-*-*]
4255 ||
[istarget spu
-*-*]
4256 ||
[istarget x86_64
-*-*]
4257 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
4258 set et_vect_cond_saved
1
4262 verbose
"check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4263 return $et_vect_cond_saved
4266 #
Return 1 if the target supports vector conditional operations where
4267 # the comparison has different type from the lhs
, 0 otherwise.
4269 proc check_effective_target_vect_cond_mixed
{ } {
4270 global et_vect_cond_mixed_saved
4272 if [info exists et_vect_cond_mixed_saved
] {
4273 verbose
"check_effective_target_vect_cond_mixed: using cached result" 2
4275 set et_vect_cond_mixed_saved
0
4276 if { [istarget i?
86-*-*]
4277 ||
[istarget x86_64
-*-*]
4278 ||
[istarget powerpc
*-*-*] } {
4279 set et_vect_cond_mixed_saved
1
4283 verbose
"check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4284 return $et_vect_cond_mixed_saved
4287 #
Return 1 if the target supports vector char multiplication
, 0 otherwise.
4289 proc check_effective_target_vect_char_mult
{ } {
4290 global et_vect_char_mult_saved
4292 if [info exists et_vect_char_mult_saved
] {
4293 verbose
"check_effective_target_vect_char_mult: using cached result" 2
4295 set et_vect_char_mult_saved
0
4296 if { [istarget aarch64
*-*-*]
4297 ||
[istarget ia64
-*-*]
4298 ||
[istarget i?
86-*-*]
4299 ||
[istarget x86_64
-*-*]
4300 ||
[check_effective_target_arm32
] } {
4301 set et_vect_char_mult_saved
1
4305 verbose
"check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4306 return $et_vect_char_mult_saved
4309 #
Return 1 if the target supports vector short multiplication
, 0 otherwise.
4311 proc check_effective_target_vect_short_mult
{ } {
4312 global et_vect_short_mult_saved
4314 if [info exists et_vect_short_mult_saved
] {
4315 verbose
"check_effective_target_vect_short_mult: using cached result" 2
4317 set et_vect_short_mult_saved
0
4318 if { [istarget ia64
-*-*]
4319 ||
[istarget spu
-*-*]
4320 ||
[istarget i?
86-*-*]
4321 ||
[istarget x86_64
-*-*]
4322 ||
[istarget powerpc
*-*-*]
4323 ||
[istarget aarch64
*-*-*]
4324 ||
[check_effective_target_arm32
]
4325 ||
([istarget mips
*-*-*]
4326 && [check_effective_target_mips_loongson
]) } {
4327 set et_vect_short_mult_saved
1
4331 verbose
"check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4332 return $et_vect_short_mult_saved
4335 #
Return 1 if the target supports vector
int multiplication
, 0 otherwise.
4337 proc check_effective_target_vect_int_mult
{ } {
4338 global et_vect_int_mult_saved
4340 if [info exists et_vect_int_mult_saved
] {
4341 verbose
"check_effective_target_vect_int_mult: using cached result" 2
4343 set et_vect_int_mult_saved
0
4344 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
4345 ||
[istarget spu
-*-*]
4346 ||
[istarget i?
86-*-*]
4347 ||
[istarget x86_64
-*-*]
4348 ||
[istarget ia64
-*-*]
4349 ||
[istarget aarch64
*-*-*]
4350 ||
[check_effective_target_arm32
] } {
4351 set et_vect_int_mult_saved
1
4355 verbose
"check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4356 return $et_vect_int_mult_saved
4359 #
Return 1 if the target supports vector even
/odd elements extraction
, 0 otherwise.
4361 proc check_effective_target_vect_extract_even_odd
{ } {
4362 global et_vect_extract_even_odd_saved
4364 if [info exists et_vect_extract_even_odd_saved
] {
4365 verbose
"check_effective_target_vect_extract_even_odd: using cached result" 2
4367 set et_vect_extract_even_odd_saved
0
4368 if { [istarget aarch64
*-*-*]
4369 ||
[istarget powerpc
*-*-*]
4370 ||
[is
-effective
-target arm_neon_ok
]
4371 ||
[istarget i?
86-*-*]
4372 ||
[istarget x86_64
-*-*]
4373 ||
[istarget ia64
-*-*]
4374 ||
[istarget spu
-*-*]
4375 ||
([istarget mips
*-*-*]
4376 && [check_effective_target_mpaired_single
]) } {
4377 set et_vect_extract_even_odd_saved
1
4381 verbose
"check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4382 return $et_vect_extract_even_odd_saved
4385 #
Return 1 if the target supports vector interleaving
, 0 otherwise.
4387 proc check_effective_target_vect_interleave
{ } {
4388 global et_vect_interleave_saved
4390 if [info exists et_vect_interleave_saved
] {
4391 verbose
"check_effective_target_vect_interleave: using cached result" 2
4393 set et_vect_interleave_saved
0
4394 if { [istarget aarch64
*-*-*]
4395 ||
[istarget powerpc
*-*-*]
4396 ||
[is
-effective
-target arm_neon_ok
]
4397 ||
[istarget i?
86-*-*]
4398 ||
[istarget x86_64
-*-*]
4399 ||
[istarget ia64
-*-*]
4400 ||
[istarget spu
-*-*]
4401 ||
([istarget mips
*-*-*]
4402 && [check_effective_target_mpaired_single
]) } {
4403 set et_vect_interleave_saved
1
4407 verbose
"check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4408 return $et_vect_interleave_saved
4411 foreach N
{2 3 4 8} {
4412 eval
[string map
[list N $N
] {
4413 #
Return 1 if the target supports
2-vector interleaving
4414 proc check_effective_target_vect_stridedN
{ } {
4415 global et_vect_stridedN_saved
4417 if [info exists et_vect_stridedN_saved
] {
4418 verbose
"check_effective_target_vect_stridedN: using cached result" 2
4420 set et_vect_stridedN_saved
0
4422 && [check_effective_target_vect_interleave
]
4423 && [check_effective_target_vect_extract_even_odd
] } {
4424 set et_vect_stridedN_saved
1
4426 if { ([istarget arm
*-*-*]
4427 ||
[istarget aarch64
*-*-*]) && N
>= 2 && N
<= 4 } {
4428 set et_vect_stridedN_saved
1
4432 verbose
"check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4433 return $et_vect_stridedN_saved
4438 #
Return 1 if the target supports multiple vector sizes
4440 proc check_effective_target_vect_multiple_sizes
{ } {
4441 global et_vect_multiple_sizes_saved
4443 set et_vect_multiple_sizes_saved
0
4444 if { ([istarget aarch64
*-*-*]
4445 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
])) } {
4446 set et_vect_multiple_sizes_saved
1
4448 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
4449 if { ([check_avx_available
] && ![check_prefer_avx128
]) } {
4450 set et_vect_multiple_sizes_saved
1
4454 verbose
"check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4455 return $et_vect_multiple_sizes_saved
4458 #
Return 1 if the target supports vectors of
64 bits.
4460 proc check_effective_target_vect64
{ } {
4461 global et_vect64_saved
4463 if [info exists et_vect64_saved
] {
4464 verbose
"check_effective_target_vect64: using cached result" 2
4466 set et_vect64_saved
0
4467 if { ([istarget arm
*-*-*]
4468 && [check_effective_target_arm_neon_ok
]
4469 && [check_effective_target_arm_little_endian
]) } {
4470 set et_vect64_saved
1
4474 verbose
"check_effective_target_vect64: returning $et_vect64_saved" 2
4475 return $et_vect64_saved
4478 #
Return 1 if the target supports vector copysignf calls.
4480 proc check_effective_target_vect_call_copysignf
{ } {
4481 global et_vect_call_copysignf_saved
4483 if [info exists et_vect_call_copysignf_saved
] {
4484 verbose
"check_effective_target_vect_call_copysignf: using cached result" 2
4486 set et_vect_call_copysignf_saved
0
4487 if { [istarget i?
86-*-*]
4488 ||
[istarget x86_64
-*-*]
4489 ||
[istarget powerpc
*-*-*] } {
4490 set et_vect_call_copysignf_saved
1
4494 verbose
"check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
4495 return $et_vect_call_copysignf_saved
4498 #
Return 1 if the target supports vector sqrtf calls.
4500 proc check_effective_target_vect_call_sqrtf
{ } {
4501 global et_vect_call_sqrtf_saved
4503 if [info exists et_vect_call_sqrtf_saved
] {
4504 verbose
"check_effective_target_vect_call_sqrtf: using cached result" 2
4506 set et_vect_call_sqrtf_saved
0
4507 if { [istarget aarch64
*-*-*]
4508 ||
[istarget i?
86-*-*]
4509 ||
[istarget x86_64
-*-*]
4510 ||
([istarget powerpc
*-*-*] && [check_vsx_hw_available
]) } {
4511 set et_vect_call_sqrtf_saved
1
4515 verbose
"check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
4516 return $et_vect_call_sqrtf_saved
4519 #
Return 1 if the target supports vector lrint calls.
4521 proc check_effective_target_vect_call_lrint
{ } {
4522 set et_vect_call_lrint
0
4523 if { ([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) && [check_effective_target_ilp32
] } {
4524 set et_vect_call_lrint
1
4527 verbose
"check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
4528 return $et_vect_call_lrint
4531 #
Return 1 if the target supports vector btrunc calls.
4533 proc check_effective_target_vect_call_btrunc
{ } {
4534 global et_vect_call_btrunc_saved
4536 if [info exists et_vect_call_btrunc_saved
] {
4537 verbose
"check_effective_target_vect_call_btrunc: using cached result" 2
4539 set et_vect_call_btrunc_saved
0
4540 if { [istarget aarch64
*-*-*] } {
4541 set et_vect_call_btrunc_saved
1
4545 verbose
"check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
4546 return $et_vect_call_btrunc_saved
4549 #
Return 1 if the target supports vector btruncf calls.
4551 proc check_effective_target_vect_call_btruncf
{ } {
4552 global et_vect_call_btruncf_saved
4554 if [info exists et_vect_call_btruncf_saved
] {
4555 verbose
"check_effective_target_vect_call_btruncf: using cached result" 2
4557 set et_vect_call_btruncf_saved
0
4558 if { [istarget aarch64
*-*-*] } {
4559 set et_vect_call_btruncf_saved
1
4563 verbose
"check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
4564 return $et_vect_call_btruncf_saved
4567 #
Return 1 if the target supports vector ceil calls.
4569 proc check_effective_target_vect_call_ceil
{ } {
4570 global et_vect_call_ceil_saved
4572 if [info exists et_vect_call_ceil_saved
] {
4573 verbose
"check_effective_target_vect_call_ceil: using cached result" 2
4575 set et_vect_call_ceil_saved
0
4576 if { [istarget aarch64
*-*-*] } {
4577 set et_vect_call_ceil_saved
1
4581 verbose
"check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
4582 return $et_vect_call_ceil_saved
4585 #
Return 1 if the target supports vector ceilf calls.
4587 proc check_effective_target_vect_call_ceilf
{ } {
4588 global et_vect_call_ceilf_saved
4590 if [info exists et_vect_call_ceilf_saved
] {
4591 verbose
"check_effective_target_vect_call_ceilf: using cached result" 2
4593 set et_vect_call_ceilf_saved
0
4594 if { [istarget aarch64
*-*-*] } {
4595 set et_vect_call_ceilf_saved
1
4599 verbose
"check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
4600 return $et_vect_call_ceilf_saved
4603 #
Return 1 if the target supports vector floor calls.
4605 proc check_effective_target_vect_call_floor
{ } {
4606 global et_vect_call_floor_saved
4608 if [info exists et_vect_call_floor_saved
] {
4609 verbose
"check_effective_target_vect_call_floor: using cached result" 2
4611 set et_vect_call_floor_saved
0
4612 if { [istarget aarch64
*-*-*] } {
4613 set et_vect_call_floor_saved
1
4617 verbose
"check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
4618 return $et_vect_call_floor_saved
4621 #
Return 1 if the target supports vector floorf calls.
4623 proc check_effective_target_vect_call_floorf
{ } {
4624 global et_vect_call_floorf_saved
4626 if [info exists et_vect_call_floorf_saved
] {
4627 verbose
"check_effective_target_vect_call_floorf: using cached result" 2
4629 set et_vect_call_floorf_saved
0
4630 if { [istarget aarch64
*-*-*] } {
4631 set et_vect_call_floorf_saved
1
4635 verbose
"check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
4636 return $et_vect_call_floorf_saved
4639 #
Return 1 if the target supports vector lceil calls.
4641 proc check_effective_target_vect_call_lceil
{ } {
4642 global et_vect_call_lceil_saved
4644 if [info exists et_vect_call_lceil_saved
] {
4645 verbose
"check_effective_target_vect_call_lceil: using cached result" 2
4647 set et_vect_call_lceil_saved
0
4648 if { [istarget aarch64
*-*-*] } {
4649 set et_vect_call_lceil_saved
1
4653 verbose
"check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
4654 return $et_vect_call_lceil_saved
4657 #
Return 1 if the target supports vector lfloor calls.
4659 proc check_effective_target_vect_call_lfloor
{ } {
4660 global et_vect_call_lfloor_saved
4662 if [info exists et_vect_call_lfloor_saved
] {
4663 verbose
"check_effective_target_vect_call_lfloor: using cached result" 2
4665 set et_vect_call_lfloor_saved
0
4666 if { [istarget aarch64
*-*-*] } {
4667 set et_vect_call_lfloor_saved
1
4671 verbose
"check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
4672 return $et_vect_call_lfloor_saved
4675 #
Return 1 if the target supports vector nearbyint calls.
4677 proc check_effective_target_vect_call_nearbyint
{ } {
4678 global et_vect_call_nearbyint_saved
4680 if [info exists et_vect_call_nearbyint_saved
] {
4681 verbose
"check_effective_target_vect_call_nearbyint: using cached result" 2
4683 set et_vect_call_nearbyint_saved
0
4684 if { [istarget aarch64
*-*-*] } {
4685 set et_vect_call_nearbyint_saved
1
4689 verbose
"check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
4690 return $et_vect_call_nearbyint_saved
4693 #
Return 1 if the target supports vector nearbyintf calls.
4695 proc check_effective_target_vect_call_nearbyintf
{ } {
4696 global et_vect_call_nearbyintf_saved
4698 if [info exists et_vect_call_nearbyintf_saved
] {
4699 verbose
"check_effective_target_vect_call_nearbyintf: using cached result" 2
4701 set et_vect_call_nearbyintf_saved
0
4702 if { [istarget aarch64
*-*-*] } {
4703 set et_vect_call_nearbyintf_saved
1
4707 verbose
"check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
4708 return $et_vect_call_nearbyintf_saved
4711 #
Return 1 if the target supports vector
round calls.
4713 proc check_effective_target_vect_call_round
{ } {
4714 global et_vect_call_round_saved
4716 if [info exists et_vect_call_round_saved
] {
4717 verbose
"check_effective_target_vect_call_round: using cached result" 2
4719 set et_vect_call_round_saved
0
4720 if { [istarget aarch64
*-*-*] } {
4721 set et_vect_call_round_saved
1
4725 verbose
"check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
4726 return $et_vect_call_round_saved
4729 #
Return 1 if the target supports vector roundf calls.
4731 proc check_effective_target_vect_call_roundf
{ } {
4732 global et_vect_call_roundf_saved
4734 if [info exists et_vect_call_roundf_saved
] {
4735 verbose
"check_effective_target_vect_call_roundf: using cached result" 2
4737 set et_vect_call_roundf_saved
0
4738 if { [istarget aarch64
*-*-*] } {
4739 set et_vect_call_roundf_saved
1
4743 verbose
"check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
4744 return $et_vect_call_roundf_saved
4747 #
Return 1 if the target supports section
-anchors
4749 proc check_effective_target_section_anchors
{ } {
4750 global et_section_anchors_saved
4752 if [info exists et_section_anchors_saved
] {
4753 verbose
"check_effective_target_section_anchors: using cached result" 2
4755 set et_section_anchors_saved
0
4756 if { [istarget powerpc
*-*-*]
4757 ||
[istarget arm
*-*-*] } {
4758 set et_section_anchors_saved
1
4762 verbose
"check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
4763 return $et_section_anchors_saved
4766 #
Return 1 if the target supports atomic operations
on "int_128" values.
4768 proc check_effective_target_sync_int_128
{ } {
4769 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
4770 && ![is
-effective
-target ia32
] } {
4777 #
Return 1 if the target supports atomic operations
on "int_128" values
4778 # and can
execute them.
4780 proc check_effective_target_sync_int_128_runtime
{ } {
4781 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
4782 && ![is
-effective
-target ia32
] } {
4783 return [check_cached_effective_target sync_int_128_available
{
4784 check_runtime_nocache sync_int_128_available
{
4788 unsigned
int eax
, ebx
, ecx
, edx
;
4789 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
4790 return !(ecx
& bit_CMPXCHG16B
);
4800 #
Return 1 if the target supports atomic operations
on "long long".
4802 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
4804 proc check_effective_target_sync_long_long
{ } {
4805 if { [istarget x86_64
-*-*]
4806 ||
[istarget i?
86-*-*])
4807 ||
[istarget aarch64
*-*-*]
4808 ||
[istarget arm
*-*-*]
4809 ||
[istarget alpha
*-*-*]
4810 ||
([istarget sparc
*-*-*] && [check_effective_target_lp64
]) } {
4817 #
Return 1 if the target supports atomic operations
on "long long"
4818 # and can
execute them.
4820 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
4822 proc check_effective_target_sync_long_long_runtime
{ } {
4823 if { [istarget x86_64
-*-*]
4824 ||
[istarget i?
86-*-*] } {
4825 return [check_cached_effective_target sync_long_long_available
{
4826 check_runtime_nocache sync_long_long_available
{
4830 unsigned
int eax
, ebx
, ecx
, edx
;
4831 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
4832 return !(edx
& bit_CMPXCHG8B
);
4837 } elseif
{ [istarget aarch64
*-*-*] } {
4839 } elseif
{ [istarget arm
*-*-linux
-*] } {
4840 return [check_runtime sync_longlong_runtime
{
4846 if (sizeof
(long long
) != 8)
4849 /* Just check
for native
; checking
for kernel fallback is tricky.
*/
4850 asm volatile
("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
4855 } elseif
{ [istarget alpha
*-*-*] } {
4857 } elseif
{ ([istarget sparc
*-*-*]
4858 && [check_effective_target_lp64
]
4859 && [check_effective_target_ultrasparc_hw
]) } {
4861 } elseif
{ [istarget powerpc
*-*-*] && [check_effective_target_lp64
] } {
4868 #
Return 1 if the target supports byte swap instructions.
4870 proc check_effective_target_bswap
{ } {
4871 global et_bswap_saved
4873 if [info exists et_bswap_saved
] {
4874 verbose
"check_effective_target_bswap: using cached result" 2
4876 set et_bswap_saved
0
4877 if { [istarget aarch64
-*-*]
4878 ||
[istarget alpha
*-*-*]
4879 ||
[istarget arm
*-*-*]
4880 ||
[istarget i?
86-*-*]
4881 ||
[istarget m68k
-*-*]
4882 ||
[istarget powerpc
*-*-*]
4883 ||
[istarget rs6000
-*-*]
4884 ||
[istarget s390
*-*-*]
4885 ||
[istarget x86_64
-*-*] } {
4886 set et_bswap_saved
1
4890 verbose
"check_effective_target_bswap: returning $et_bswap_saved" 2
4891 return $et_bswap_saved
4894 #
Return 1 if the target supports
16-bit byte swap instructions.
4896 proc check_effective_target_bswap16
{ } {
4897 global et_bswap16_saved
4899 if [info exists et_bswap16_saved
] {
4900 verbose
"check_effective_target_bswap16: using cached result" 2
4902 set et_bswap16_saved
0
4903 if { [is
-effective
-target bswap
]
4904 && ![istarget alpha
*-*-*]
4905 && ![istarget i?
86-*-*]
4906 && ![istarget x86_64
-*-*] } {
4907 set et_bswap16_saved
1
4911 verbose
"check_effective_target_bswap16: returning $et_bswap16_saved" 2
4912 return $et_bswap16_saved
4915 #
Return 1 if the target supports
32-bit byte swap instructions.
4917 proc check_effective_target_bswap32
{ } {
4918 global et_bswap32_saved
4920 if [info exists et_bswap32_saved
] {
4921 verbose
"check_effective_target_bswap32: using cached result" 2
4923 set et_bswap32_saved
0
4924 if { [is
-effective
-target bswap
] } {
4925 set et_bswap32_saved
1
4929 verbose
"check_effective_target_bswap32: returning $et_bswap32_saved" 2
4930 return $et_bswap32_saved
4933 #
Return 1 if the target supports
64-bit byte swap instructions.
4935 proc check_effective_target_bswap64
{ } {
4936 global et_bswap64_saved
4938 if [info exists et_bswap64_saved
] {
4939 verbose
"check_effective_target_bswap64: using cached result" 2
4941 set et_bswap64_saved
0
4942 if { [is
-effective
-target bswap
]
4943 && [is
-effective
-target lp64
] } {
4944 set et_bswap64_saved
1
4948 verbose
"check_effective_target_bswap64: returning $et_bswap64_saved" 2
4949 return $et_bswap64_saved
4952 #
Return 1 if the target supports atomic operations
on "int" and "long".
4954 proc check_effective_target_sync_int_long
{ } {
4955 global et_sync_int_long_saved
4957 if [info exists et_sync_int_long_saved
] {
4958 verbose
"check_effective_target_sync_int_long: using cached result" 2
4960 set et_sync_int_long_saved
0
4961 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
4962 # load-reserved/store-conditional instructions.
4963 if { [istarget ia64-*-*]
4964 || [istarget i?86-*-*]
4965 || [istarget x86_64-*-*]
4966 || [istarget aarch64*-*-*]
4967 || [istarget alpha*-*-*]
4968 || [istarget arm*-*-linux-*]
4969 || [istarget bfin*-*linux*]
4970 || [istarget hppa*-*linux*]
4971 || [istarget s390*-*-*]
4972 || [istarget powerpc*-*-*]
4973 || [istarget crisv32-*-*] || [istarget cris-*-*]
4974 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
4975 || [check_effective_target_mips_llsc] } {
4976 set et_sync_int_long_saved 1
4980 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
4981 return $et_sync_int_long_saved
4984 # Return 1 if the target supports atomic operations on "char" and "short".
4986 proc check_effective_target_sync_char_short { } {
4987 global et_sync_char_short_saved
4989 if [info exists et_sync_char_short_saved] {
4990 verbose "check_effective_target_sync_char_short: using cached result" 2
4992 set et_sync_char_short_saved 0
4993 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
4994 #
load-reserved/store
-conditional instructions.
4995 if { [istarget aarch64
*-*-*]
4996 ||
[istarget ia64
-*-*]
4997 ||
[istarget i?
86-*-*]
4998 ||
[istarget x86_64
-*-*]
4999 ||
[istarget alpha
*-*-*]
5000 ||
[istarget arm
*-*-linux
-*]
5001 ||
[istarget hppa
*-*linux
*]
5002 ||
[istarget s390
*-*-*]
5003 ||
[istarget powerpc
*-*-*]
5004 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
5005 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
5006 ||
[check_effective_target_mips_llsc
] } {
5007 set et_sync_char_short_saved
1
5011 verbose
"check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5012 return $et_sync_char_short_saved
5015 #
Return 1 if the target uses a ColdFire FPU.
5017 proc check_effective_target_coldfire_fpu
{ } {
5018 return [check_no_compiler_messages coldfire_fpu assembly
{
5025 #
Return true
if this is a uClibc target.
5027 proc check_effective_target_uclibc
{} {
5028 return [check_no_compiler_messages uclibc object
{
5029 #
include <features.h
>
5030 #
if !defined
(__UCLIBC__
)
5036 #
Return true
if this is a uclibc target and
if the uclibc feature
5037 # described by __$feature__ is not present.
5039 proc check_missing_uclibc_feature
{feature
} {
5040 return [check_no_compiler_messages $feature object
"
5041 #
include <features.h
>
5042 #
if !defined
(__UCLIBC
) || defined
(__$
{feature
}__
)
5048 #
Return true
if this is a Newlib target.
5050 proc check_effective_target_newlib
{} {
5051 return [check_no_compiler_messages newlib object
{
5056 #
Return true
if this is NOT a Bionic target.
5058 proc check_effective_target_non_bionic
{} {
5059 return [check_no_compiler_messages non_bionic object
{
5061 #
if defined
(__BIONIC__
)
5068 #
(a
) an error of a few ULP is expected in string to floating
-point
5069 # conversion functions
; and
5070 #
(b
) overflow is not always detected correctly by those functions.
5072 proc check_effective_target_lax_strtofp
{} {
5073 # By default
, assume that all uClibc targets suffer from this.
5074 return [check_effective_target_uclibc
]
5077 #
Return 1 if this is a target
for which wcsftime is a dummy
5078 # function that always returns
0.
5080 proc check_effective_target_dummy_wcsftime
{} {
5081 # By default
, assume that all uClibc targets suffer from this.
5082 return [check_effective_target_uclibc
]
5085 #
Return 1 if constructors with initialization priority arguments are
5086 # supposed
on this target.
5088 proc check_effective_target_init_priority
{} {
5089 return [check_no_compiler_messages init_priority assembly
"
5090 void f
() __attribute__
((constructor
(1000)));
5095 #
Return 1 if the target matches the effective target
'arg', 0 otherwise.
5096 # This can be used with
any check_
* proc that takes no
argument and
5097 # returns only
1 or
0. It could be used with check_
* procs that take
5098 # arguments with keywords that pass particular arguments.
5100 proc is
-effective
-target
{ arg } {
5102 if { [info procs check_effective_target_$
{arg}] != [list
] } {
5103 set selected
[check_effective_target_$
{arg}]
5106 "vmx_hw" { set selected [check_vmx_hw_available] }
5107 "vsx_hw" { set selected [check_vsx_hw_available] }
5108 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5109 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5110 "dfp_hw" { set selected [check_dfp_hw_available] }
5111 "named_sections" { set selected [check_named_sections_available] }
5112 "gc_sections" { set selected [check_gc_sections_available] }
5113 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5114 default
{ error
"unknown effective target keyword `$arg'" }
5117 verbose
"is-effective-target: $arg $selected" 2
5121 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
5123 proc is
-effective
-target
-keyword
{ arg } {
5124 if { [info procs check_effective_target_$
{arg}] != [list
] } {
5127 # These have different names
for their check_
* procs.
5129 "vmx_hw" { return 1 }
5130 "vsx_hw" { return 1 }
5131 "p8vector_hw" { return 1 }
5132 "ppc_recip_hw" { return 1 }
5133 "dfp_hw" { return 1 }
5134 "named_sections" { return 1 }
5135 "gc_sections" { return 1 }
5136 "cxa_atexit" { return 1 }
5137 default
{ return 0 }
5142 #
Return 1 if target default to short enums
5144 proc check_effective_target_short_enums
{ } {
5145 return [check_no_compiler_messages short_enums assembly
{
5147 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
5151 #
Return 1 if target supports merging string constants at link time.
5153 proc check_effective_target_string_merging
{ } {
5154 return [check_no_messages_and_pattern string_merging \
5155 "rodata\\.str" assembly {
5156 const char
*var
= "String";
5160 #
Return 1 if target has the basic signed and unsigned types in
5161 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
5162 # working
<stdint.h
> for all targets.
5164 proc check_effective_target_stdint_types
{ } {
5165 return [check_no_compiler_messages stdint_types assembly
{
5167 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
5168 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
5172 #
Return 1 if target has the basic signed and unsigned types in
5173 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
5174 # these types agree with those in the header, as some systems have
5175 # only <inttypes.h>.
5177 proc check_effective_target_inttypes_types { } {
5178 return [check_no_compiler_messages inttypes_types assembly {
5179 #include <inttypes.h>
5180 int8_t a; int16_t b; int32_t c; int64_t d;
5181 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5185 # Return 1 if programs are intended to be run on a simulator
5186 # (i.e. slowly) rather than hardware (i.e. fast).
5188 proc check_effective_target_simulator { } {
5190 # All "src/sim" simulators set this one.
5191 if [board_info target exists is_simulator] {
5192 return [board_info target is_simulator]
5195 # The "sid" simulators don't
set that one
, but at least they
set
5197 if [board_info target
exists slow_simulator
] {
5198 return [board_info target slow_simulator
]
5204 #
Return 1 if programs are intended to be run
on hardware rather than
5207 proc check_effective_target_hw
{ } {
5209 # All
"src/sim" simulators set this one.
5210 if [board_info target
exists is_simulator
] {
5211 if [board_info target is_simulator
] {
5218 # The
"sid" simulators don't set that one, but at least they set
5220 if [board_info target
exists slow_simulator
] {
5221 if [board_info target slow_simulator
] {
5231 #
Return 1 if the target is a VxWorks kernel.
5233 proc check_effective_target_vxworks_kernel
{ } {
5234 return [check_no_compiler_messages vxworks_kernel assembly
{
5235 #
if !defined __vxworks || defined __RTP__
5241 #
Return 1 if the target is a VxWorks RTP.
5243 proc check_effective_target_vxworks_rtp
{ } {
5244 return [check_no_compiler_messages vxworks_rtp assembly
{
5245 #
if !defined __vxworks ||
!defined __RTP__
5251 #
Return 1 if the target is expected to provide wide character support.
5253 proc check_effective_target_wchar
{ } {
5254 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
5257 return [check_no_compiler_messages wchar assembly
{
5262 #
Return 1 if the target has
<pthread.h
>.
5264 proc check_effective_target_pthread_h
{ } {
5265 return [check_no_compiler_messages pthread_h assembly
{
5266 #
include <pthread.h
>
5270 #
Return 1 if the target can truncate a file from a file
-descriptor
,
5271 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
5272 # chsize. We test
for a trivially functional truncation
; no stubs.
5273 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
5274 # different function to be used.
5276 proc check_effective_target_fd_truncate { } {
5278 #define _FILE_OFFSET_BITS 64
5284 FILE *f = fopen ("tst.tmp", "wb");
5286 const char t[] = "test writing more than ten characters";
5290 write (fd, t, sizeof (t) - 1);
5292 if (ftruncate (fd, 10) != 0)
5301 f = fopen ("tst.tmp", "rb");
5302 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5310 if { [check_runtime ftruncate $prog] } {
5314 regsub "ftruncate" $prog "chsize" prog
5315 return [check_runtime chsize $prog]
5318 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5320 proc add_options_for_c99_runtime { flags } {
5321 if { [istarget *-*-solaris2*] } {
5322 return "$flags -std=c99"
5324 if { [istarget powerpc-*-darwin*] } {
5325 return "$flags -mmacosx-version-min=10.3"
5330 # Add to FLAGS all the target-specific flags needed to enable
5331 # full IEEE compliance mode.
5333 proc add_options_for_ieee { flags } {
5334 if { [istarget alpha*-*-*]
5335 || [istarget sh*-*-*] } {
5336 return "$flags -mieee"
5338 if { [istarget rx-*-*] } {
5339 return "$flags -mnofpu"
5344 if {![info exists flags_to_postpone]} {
5345 set flags_to_postpone ""
5348 # Add to FLAGS the flags needed to enable functions to bind locally
5349 # when using pic/PIC passes in the testsuite.
5350 proc add_options_for_bind_pic_locally { flags } {
5351 global flags_to_postpone
5353 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
5354 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
5355 # order to make sure that the multilib_flags doesn't override this.
5357 if {[check_no_compiler_messages using_pic2 assembly
{
5362 set flags_to_postpone
"-fPIE"
5365 if {[check_no_compiler_messages using_pic1 assembly
{
5370 set flags_to_postpone
"-fpie"
5376 # Add to FLAGS the flags needed to enable
64-bit vectors.
5378 proc add_options_for_double_vectors
{ flags
} {
5379 if [is
-effective
-target arm_neon_ok
] {
5380 return "$flags -mvectorize-with-neon-double"
5386 # Add to FLAGS the flags needed to disable inlining of
5387 # UPC run
-time access routines.
5389 proc add_options_for_upc_library_calls
{ flags
} {
5390 return "$flags -fno-upc-inline-lib"
5393 # Check
if UPC struct pts build
5395 proc check_effective_target_upc_struct_pts
{ } {
5396 return [check_no_compiler_messages upc_struct_pts object
{
5397 #ifndef __UPC_PTS_STRUCT_REP__
5398 # error struct PTS is not supported
5400 } "-fupc -fno-upc-pre-include" ]
5403 # Check
if UPC packed pts build
5405 proc check_effective_target_upc_packed_pts
{ } {
5406 return [check_no_compiler_messages upc_packed_pts object
{
5407 #ifndef __UPC_PTS_PACKED_REP__
5408 # error packed PTS is not supported
5410 } "-fupc -fno-upc-pre-include" ]
5413 #
Return 1 if the target provides a full C99 runtime.
5415 proc check_effective_target_c99_runtime
{ } {
5416 return [check_cached_effective_target c99_runtime
{
5419 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
5420 set contents
[read $file
]
5423 #ifndef HAVE_C99_RUNTIME
5427 check_no_compiler_messages_nocache c99_runtime assembly \
5428 $contents
[add_options_for_c99_runtime
""]
5432 #
Return 1 if target wchar_t is at least
4 bytes.
5434 proc check_effective_target_4byte_wchar_t
{ } {
5435 return [check_no_compiler_messages
4byte_wchar_t object
{
5436 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
5440 #
Return 1 if the target supports automatic stack alignment.
5442 proc check_effective_target_automatic_stack_alignment
{ } {
5443 # Ordinarily x86 supports automatic stack alignment ...
5444 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
5445 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
5446 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
5447 return [check_effective_target_ilp32];
5454 # Return true if we are compiling for AVX target.
5456 proc check_avx_available { } {
5457 if { [check_no_compiler_messages avx_available assembly {
5467 # Return true if 32- and 16-bytes vectors are available.
5469 proc check_effective_target_vect_sizes_32B_16B { } {
5470 if { [check_avx_available] && ![check_prefer_avx128] } {
5477 # Return true if 128-bits vectors are preferred even if 256-bits vectors
5480 proc check_prefer_avx128 { } {
5481 if ![check_avx_available] {
5484 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
5485 float a[1024],b[1024],c[1024];
5486 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
5487 } "-O2 -ftree-vectorize"]
5491 # Return 1 if avx512f instructions can be compiled.
5493 proc check_effective_target_avx512f { } {
5494 return [check_no_compiler_messages avx512f object {
5495 typedef double __m512d __attribute__ ((__vector_size__ (64)));
5497 __m512d _mm512_add (__m512d a)
5499 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
5504 # Return 1 if avx instructions can be compiled.
5506 proc check_effective_target_avx { } {
5507 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5510 return [check_no_compiler_messages avx object {
5511 void _mm256_zeroall (void)
5513 __builtin_ia32_vzeroall ();
5518 # Return 1 if avx2 instructions can be compiled.
5519 proc check_effective_target_avx2 { } {
5520 return [check_no_compiler_messages avx2 object {
5521 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
5523 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
5525 return __builtin_ia32_andnotsi256 (__X, __Y);
5530 # Return 1 if sse instructions can be compiled.
5531 proc check_effective_target_sse { } {
5532 return [check_no_compiler_messages sse object {
5535 __builtin_ia32_stmxcsr ();
5541 # Return 1 if sse2 instructions can be compiled.
5542 proc check_effective_target_sse2 { } {
5543 return [check_no_compiler_messages sse2 object {
5544 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
5546 __m128i _mm_srli_si128 (__m128i __A, int __N)
5548 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
5553 # Return 1 if F16C instructions can be compiled.
5555 proc check_effective_target_f16c { } {
5556 return [check_no_compiler_messages f16c object {
5557 #include "immintrin.h"
5559 foo (unsigned short val)
5561 return _cvtsh_ss (val);
5566 # Return 1 if C wchar_t type is compatible with char16_t.
5568 proc check_effective_target_wchar_t_char16_t_compatible { } {
5569 return [check_no_compiler_messages wchar_t_char16_t object {
5571 __CHAR16_TYPE__ *p16 = &wc;
5572 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5576 # Return 1 if C wchar_t type is compatible with char32_t.
5578 proc check_effective_target_wchar_t_char32_t_compatible { } {
5579 return [check_no_compiler_messages wchar_t_char32_t object {
5581 __CHAR32_TYPE__ *p32 = &wc;
5582 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5586 # Return 1 if pow10 function exists.
5588 proc check_effective_target_pow10 { } {
5589 return [check_runtime pow10 {
5599 # Return 1 if current options generate DFP instructions, 0 otherwise.
5601 proc check_effective_target_hard_dfp {} {
5602 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
5603 typedef float d64 __attribute__((mode(DD)));
5605 void foo (void) { z = x + y; }
5609 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
5610 # for strchr etc. functions.
5612 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
5613 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
5616 #if !defined(__cplusplus) \
5617 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
5618 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
5619 ISO C++ correct string.h and wchar.h protos not supported.
5626 # Return 1 if GNU as is used.
5628 proc check_effective_target_gas { } {
5629 global use_gas_saved
5632 if {![info exists use_gas_saved]} {
5633 # Check if the as used by gcc is GNU as.
5634 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
5635 # Provide /dev/null as input, otherwise gas times out reading from
5637 set status [remote_exec host "$gcc_as" "-v /dev/null"]
5638 set as_output [lindex $status 1]
5639 if { [ string first "GNU" $as_output ] >= 0 } {
5645 return $use_gas_saved
5648 # Return 1 if GNU ld is used.
5650 proc check_effective_target_gld { } {
5651 global use_gld_saved
5654 if {![info exists use_gld_saved]} {
5655 # Check if the ld used by gcc is GNU ld.
5656 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
5657 set status [remote_exec host "$gcc_ld" "--version"]
5658 set ld_output [lindex $status 1]
5659 if { [ string first "GNU" $ld_output ] >= 0 } {
5665 return $use_gld_saved
5668 # Return 1 if the compiler has been configure with link-time optimization
5671 proc check_effective_target_lto { } {
5673 return [info exists ENABLE_LTO]
5676 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
5678 proc check_effective_target_maybe_x32 { } {
5679 return [check_no_compiler_messages maybe_x32 object {
5681 } "-mx32 -maddress-mode=short"]
5684 # Return 1 if this target supports the -fsplit-stack option, 0
5687 proc check_effective_target_split_stack {} {
5688 return [check_no_compiler_messages split_stack object {
5693 # Return 1 if this target supports the -masm=intel option, 0
5696 proc check_effective_target_masm_intel {} {
5697 return [check_no_compiler_messages masm_intel object {
5698 extern void abort (void);
5702 # Return 1 if the language for the compiler under test is C.
5704 proc check_effective_target_c { } {
5706 if [string match $tool "gcc"] {
5712 # Return 1 if the language for the compiler under test is C++.
5714 proc check_effective_target_c++ { } {
5716 if [string match $tool "g++"] {
5722 # Check whether the current active language standard supports the features
5723 # of C++11/C++14 by checking for the presence of one of the -std
5724 # flags. This assumes that the default for the compiler is C++98, and that
5725 # there will never be multiple -std= arguments on the command line.
5726 proc check_effective_target_c++11_only { } {
5727 if ![check_effective_target_c++] {
5730 return [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
5732 proc check_effective_target_c++11 { } {
5733 if [check_effective_target_c++11_only] {
5736 return [check_effective_target_c++14]
5738 proc check_effective_target_c++11_down { } {
5739 if ![check_effective_target_c++] {
5742 return ![check_effective_target_c++14]
5745 proc check_effective_target_c++14_only { } {
5746 if ![check_effective_target_c++] {
5749 return [check-flags { { } { } { -std=c++1y -std=gnu++1y -std=c++14 -std=gnu++14 } }]
5752 proc check_effective_target_c++14 { } {
5753 if [check_effective_target_c++14_only] {
5756 return [check_effective_target_c++1z]
5758 proc check_effective_target_c++14_down { } {
5759 if ![check_effective_target_c++] {
5762 return ![check_effective_target_c++1z]
5765 proc check_effective_target_c++98_only { } {
5766 if ![check_effective_target_c++] {
5769 return ![check_effective_target_c++11]
5772 proc check_effective_target_c++1z_only { } {
5773 if ![check_effective_target_c++] {
5776 return [check-flags { { } { } { -std=c++1z -std=gnu++1z } }]
5778 proc check_effective_target_c++1z { } {
5779 return [check_effective_target_c++1z_only]
5782 # Return 1 if expensive testcases should be run.
5784 proc check_effective_target_run_expensive_tests { } {
5785 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
5791 # Returns 1 if "mempcpy" is available on the target system.
5793 proc check_effective_target_mempcpy {} {
5794 return [check_function_available "mempcpy"]
5797 # Check whether the vectorizer tests are supported by the target and
5798 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
5799 # Set dg-do-what-default to either compile or run, depending on target
5800 # capabilities. Return 1 if vectorizer tests are supported by
5801 # target, 0 otherwise.
5803 proc check_vect_support_and_set_flags { } {
5804 global DEFAULT_VECTCFLAGS
5805 global dg-do-what-default
5807 if [istarget powerpc-*paired*] {
5808 lappend DEFAULT_VECTCFLAGS "-mpaired"
5809 if [check_750cl_hw_available] {
5810 set dg-do-what-default run
5812 set dg-do-what-default compile
5814 } elseif [istarget powerpc*-*-*] {
5815 # Skip targets not supporting -maltivec.
5816 if ![is-effective-target powerpc_altivec_ok] {
5820 lappend DEFAULT_VECTCFLAGS "-maltivec"
5821 if [check_p8vector_hw_available] {
5822 lappend DEFAULT_VECTCFLAGS "-mpower8-vector" "-mno-allow-movmisalign"
5823 } elseif [check_vsx_hw_available] {
5824 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
5827 if [check_vmx_hw_available] {
5828 set dg-do-what-default run
5830 if [is-effective-target ilp32] {
5831 # Specify a cpu that supports VMX for compile-only tests.
5832 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
5834 set dg-do-what-default compile
5836 } elseif { [istarget spu-*-*] } {
5837 set dg-do-what-default run
5838 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5839 lappend DEFAULT_VECTCFLAGS "-msse2"
5840 if { [check_effective_target_sse2_runtime] } {
5841 set dg-do-what-default run
5843 set dg-do-what-default compile
5845 } elseif { [istarget mips*-*-*]
5846 && ([check_effective_target_mpaired_single]
5847 || [check_effective_target_mips_loongson])
5848 && [check_effective_target_nomips16] } {
5849 if { [check_effective_target_mpaired_single] } {
5850 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
5852 set dg-do-what-default run
5853 } elseif [istarget sparc*-*-*] {
5854 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
5855 if [check_effective_target_ultrasparc_hw] {
5856 set dg-do-what-default run
5858 set dg-do-what-default compile
5860 } elseif [istarget alpha*-*-*] {
5861 # Alpha's vectorization capabilities are extremely limited.
5862 # It
's more effort than its worth disabling all of the tests
5863 # that it cannot pass. But if you actually want to see what
5864 # does work, command out the return.
5867 lappend DEFAULT_VECTCFLAGS "-mmax"
5868 if [check_alpha_max_hw_available] {
5869 set dg-do-what-default run
5871 set dg-do-what-default compile
5873 } elseif [istarget ia64-*-*] {
5874 set dg-do-what-default run
5875 } elseif [is-effective-target arm_neon_ok] {
5876 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
5877 # NEON does not support denormals, so is not used for vectorization by
5878 # default to avoid loss of precision. We must pass -ffast-math to test
5879 # vectorization of float operations.
5880 lappend DEFAULT_VECTCFLAGS "-ffast-math"
5881 if [is-effective-target arm_neon_hw] {
5882 set dg-do-what-default run
5884 set dg-do-what-default compile
5886 } elseif [istarget "aarch64*-*-*"] {
5887 set dg-do-what-default run
5895 # Return 1 if the target does *not* require strict alignment.
5897 proc check_effective_target_non_strict_align {} {
5898 return [check_no_compiler_messages non_strict_align assembly {
5900 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
5902 void foo(void) { z = (c *) y; }
5906 # Return 1 if the target has <ucontext.h>.
5908 proc check_effective_target_ucontext_h { } {
5909 return [check_no_compiler_messages ucontext_h assembly {
5910 #include <ucontext.h>
5914 proc check_effective_target_aarch64_tiny { } {
5915 if { [istarget aarch64*-*-*] } {
5916 return [check_no_compiler_messages aarch64_tiny object {
5917 #ifdef __AARCH64_CMODEL_TINY__
5920 #error target not AArch64 tiny code model
5928 proc check_effective_target_aarch64_small { } {
5929 if { [istarget aarch64*-*-*] } {
5930 return [check_no_compiler_messages aarch64_small object {
5931 #ifdef __AARCH64_CMODEL_SMALL__
5934 #error target not AArch64 small code model
5942 proc check_effective_target_aarch64_large { } {
5943 if { [istarget aarch64*-*-*] } {
5944 return [check_no_compiler_messages aarch64_large object {
5945 #ifdef __AARCH64_CMODEL_LARGE__
5948 #error target not AArch64 large code model
5956 # Return 1 if <fenv.h> is available with all the standard IEEE
5957 # exceptions and floating-point exceptions are raised by arithmetic
5958 # operations. (If the target requires special options for "inexact"
5959 # exceptions, those need to be specified in the testcases.)
5961 proc check_effective_target_fenv_exceptions {} {
5962 return [check_runtime fenv_exceptions {
5965 #ifndef FE_DIVBYZERO
5966 # error Missing FE_DIVBYZERO
5969 # error Missing FE_INEXACT
5972 # error Missing FE_INVALID
5975 # error Missing FE_OVERFLOW
5977 #ifndef FE_UNDERFLOW
5978 # error Missing FE_UNDERFLOW
5980 volatile float a = 0.0f, r;
5985 if (fetestexcept (FE_INVALID))
5990 } [add_options_for_ieee "-std=gnu99"]]
5993 proc check_effective_target_tiny {} {
5994 if { [istarget aarch64*-*-*]
5995 && [check_effective_target_aarch64_tiny] } {
6001 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6003 proc check_effective_target_logical_op_short_circuit {} {
6004 if { [istarget mips*-*-*]
6005 || [istarget arc*-*-*]
6006 || [istarget avr*-*-*]
6007 || [istarget crisv32-*-*] || [istarget cris-*-*]
6008 || [istarget mmix-*-*]
6009 || [istarget s390*-*-*]
6010 || [istarget powerpc*-*-*]
6011 || [istarget nios2*-*-*]
6012 || [check_effective_target_arm_cortex_m] } {
6018 # Record that dg-final test TEST requires convential compilation.
6020 proc force_conventional_output_for { test } {
6021 if { [info proc $test] == "" } {
6022 perror "$test does not exist"
6025 proc ${test}_required_options {} {
6026 global gcc_force_conventional_output
6027 return $gcc_force_conventional_output