1 /* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
24 #include "c-family/c-common.h"
27 #include "c-family/c-pragma.h"
29 static bool ix86_pragma_target_parse (tree
, tree
);
30 static void ix86_target_macros_internal
31 (HOST_WIDE_INT
, HOST_WIDE_INT
, enum processor_type
, enum processor_type
, enum fpmath_unit
,
32 void (*def_or_undef
) (cpp_reader
*, const char *));
34 /* Internal function to either define or undef the appropriate system
37 ix86_target_macros_internal (HOST_WIDE_INT isa_flag
,
38 HOST_WIDE_INT isa_flag2
,
39 enum processor_type arch
,
40 enum processor_type tune
,
41 enum fpmath_unit fpmath
,
42 void (*def_or_undef
) (cpp_reader
*,
45 /* For some of the k6/pentium varients there weren't separate ISA bits to
46 identify which tune/arch flag was passed, so figure it out here. */
47 size_t arch_len
= strlen (ix86_arch_string
);
48 size_t tune_len
= strlen (ix86_tune_string
);
49 int last_arch_char
= ix86_arch_string
[arch_len
- 1];
50 int last_tune_char
= ix86_tune_string
[tune_len
- 1];
52 /* Built-ins based on -march=. */
58 def_or_undef (parse_in
, "__i486");
59 def_or_undef (parse_in
, "__i486__");
61 case PROCESSOR_LAKEMONT
:
62 /* Intel MCU is based on Intel Pentium CPU. */
63 case PROCESSOR_PENTIUM
:
64 def_or_undef (parse_in
, "__i586");
65 def_or_undef (parse_in
, "__i586__");
66 def_or_undef (parse_in
, "__pentium");
67 def_or_undef (parse_in
, "__pentium__");
68 if (isa_flag
& OPTION_MASK_ISA_MMX
)
69 def_or_undef (parse_in
, "__pentium_mmx__");
71 case PROCESSOR_PENTIUMPRO
:
72 def_or_undef (parse_in
, "__i686");
73 def_or_undef (parse_in
, "__i686__");
74 def_or_undef (parse_in
, "__pentiumpro");
75 def_or_undef (parse_in
, "__pentiumpro__");
78 def_or_undef (parse_in
, "__geode");
79 def_or_undef (parse_in
, "__geode__");
82 def_or_undef (parse_in
, "__k6");
83 def_or_undef (parse_in
, "__k6__");
84 if (last_arch_char
== '2')
85 def_or_undef (parse_in
, "__k6_2__");
86 else if (last_arch_char
== '3')
87 def_or_undef (parse_in
, "__k6_3__");
88 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
89 def_or_undef (parse_in
, "__k6_3__");
91 case PROCESSOR_ATHLON
:
92 def_or_undef (parse_in
, "__athlon");
93 def_or_undef (parse_in
, "__athlon__");
94 if (isa_flag
& OPTION_MASK_ISA_SSE
)
95 def_or_undef (parse_in
, "__athlon_sse__");
98 def_or_undef (parse_in
, "__k8");
99 def_or_undef (parse_in
, "__k8__");
101 case PROCESSOR_AMDFAM10
:
102 def_or_undef (parse_in
, "__amdfam10");
103 def_or_undef (parse_in
, "__amdfam10__");
105 case PROCESSOR_BDVER1
:
106 def_or_undef (parse_in
, "__bdver1");
107 def_or_undef (parse_in
, "__bdver1__");
109 case PROCESSOR_BDVER2
:
110 def_or_undef (parse_in
, "__bdver2");
111 def_or_undef (parse_in
, "__bdver2__");
113 case PROCESSOR_BDVER3
:
114 def_or_undef (parse_in
, "__bdver3");
115 def_or_undef (parse_in
, "__bdver3__");
117 case PROCESSOR_BDVER4
:
118 def_or_undef (parse_in
, "__bdver4");
119 def_or_undef (parse_in
, "__bdver4__");
121 case PROCESSOR_ZNVER1
:
122 def_or_undef (parse_in
, "__znver1");
123 def_or_undef (parse_in
, "__znver1__");
125 case PROCESSOR_BTVER1
:
126 def_or_undef (parse_in
, "__btver1");
127 def_or_undef (parse_in
, "__btver1__");
129 case PROCESSOR_BTVER2
:
130 def_or_undef (parse_in
, "__btver2");
131 def_or_undef (parse_in
, "__btver2__");
133 case PROCESSOR_PENTIUM4
:
134 def_or_undef (parse_in
, "__pentium4");
135 def_or_undef (parse_in
, "__pentium4__");
137 case PROCESSOR_NOCONA
:
138 def_or_undef (parse_in
, "__nocona");
139 def_or_undef (parse_in
, "__nocona__");
141 case PROCESSOR_CORE2
:
142 def_or_undef (parse_in
, "__core2");
143 def_or_undef (parse_in
, "__core2__");
145 case PROCESSOR_NEHALEM
:
146 def_or_undef (parse_in
, "__corei7");
147 def_or_undef (parse_in
, "__corei7__");
148 def_or_undef (parse_in
, "__nehalem");
149 def_or_undef (parse_in
, "__nehalem__");
151 case PROCESSOR_SANDYBRIDGE
:
152 def_or_undef (parse_in
, "__corei7_avx");
153 def_or_undef (parse_in
, "__corei7_avx__");
154 def_or_undef (parse_in
, "__sandybridge");
155 def_or_undef (parse_in
, "__sandybridge__");
157 case PROCESSOR_HASWELL
:
158 def_or_undef (parse_in
, "__core_avx2");
159 def_or_undef (parse_in
, "__core_avx2__");
160 def_or_undef (parse_in
, "__haswell");
161 def_or_undef (parse_in
, "__haswell__");
163 case PROCESSOR_BONNELL
:
164 def_or_undef (parse_in
, "__atom");
165 def_or_undef (parse_in
, "__atom__");
166 def_or_undef (parse_in
, "__bonnell");
167 def_or_undef (parse_in
, "__bonnell__");
169 case PROCESSOR_SILVERMONT
:
170 def_or_undef (parse_in
, "__slm");
171 def_or_undef (parse_in
, "__slm__");
172 def_or_undef (parse_in
, "__silvermont");
173 def_or_undef (parse_in
, "__silvermont__");
176 def_or_undef (parse_in
, "__knl");
177 def_or_undef (parse_in
, "__knl__");
180 def_or_undef (parse_in
, "__knm");
181 def_or_undef (parse_in
, "__knm__");
183 case PROCESSOR_SKYLAKE_AVX512
:
184 def_or_undef (parse_in
, "__skylake_avx512");
185 def_or_undef (parse_in
, "__skylake_avx512__");
187 case PROCESSOR_CANNONLAKE
:
188 def_or_undef (parse_in
, "__cannonlake");
189 def_or_undef (parse_in
, "__cannonlake__");
191 /* use PROCESSOR_max to not set/unset the arch macro. */
194 case PROCESSOR_INTEL
:
195 case PROCESSOR_GENERIC
:
199 /* Built-ins based on -mtune=. */
203 def_or_undef (parse_in
, "__tune_i386__");
206 def_or_undef (parse_in
, "__tune_i486__");
208 case PROCESSOR_PENTIUM
:
209 def_or_undef (parse_in
, "__tune_i586__");
210 def_or_undef (parse_in
, "__tune_pentium__");
211 if (last_tune_char
== 'x')
212 def_or_undef (parse_in
, "__tune_pentium_mmx__");
214 case PROCESSOR_PENTIUMPRO
:
215 def_or_undef (parse_in
, "__tune_i686__");
216 def_or_undef (parse_in
, "__tune_pentiumpro__");
217 switch (last_tune_char
)
220 def_or_undef (parse_in
, "__tune_pentium3__");
223 def_or_undef (parse_in
, "__tune_pentium2__");
227 case PROCESSOR_GEODE
:
228 def_or_undef (parse_in
, "__tune_geode__");
231 def_or_undef (parse_in
, "__tune_k6__");
232 if (last_tune_char
== '2')
233 def_or_undef (parse_in
, "__tune_k6_2__");
234 else if (last_tune_char
== '3')
235 def_or_undef (parse_in
, "__tune_k6_3__");
236 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
237 def_or_undef (parse_in
, "__tune_k6_3__");
239 case PROCESSOR_ATHLON
:
240 def_or_undef (parse_in
, "__tune_athlon__");
241 if (isa_flag
& OPTION_MASK_ISA_SSE
)
242 def_or_undef (parse_in
, "__tune_athlon_sse__");
245 def_or_undef (parse_in
, "__tune_k8__");
247 case PROCESSOR_AMDFAM10
:
248 def_or_undef (parse_in
, "__tune_amdfam10__");
250 case PROCESSOR_BDVER1
:
251 def_or_undef (parse_in
, "__tune_bdver1__");
253 case PROCESSOR_BDVER2
:
254 def_or_undef (parse_in
, "__tune_bdver2__");
256 case PROCESSOR_BDVER3
:
257 def_or_undef (parse_in
, "__tune_bdver3__");
259 case PROCESSOR_BDVER4
:
260 def_or_undef (parse_in
, "__tune_bdver4__");
262 case PROCESSOR_ZNVER1
:
263 def_or_undef (parse_in
, "__tune_znver1__");
265 case PROCESSOR_BTVER1
:
266 def_or_undef (parse_in
, "__tune_btver1__");
268 case PROCESSOR_BTVER2
:
269 def_or_undef (parse_in
, "__tune_btver2__");
271 case PROCESSOR_PENTIUM4
:
272 def_or_undef (parse_in
, "__tune_pentium4__");
274 case PROCESSOR_NOCONA
:
275 def_or_undef (parse_in
, "__tune_nocona__");
277 case PROCESSOR_CORE2
:
278 def_or_undef (parse_in
, "__tune_core2__");
280 case PROCESSOR_NEHALEM
:
281 def_or_undef (parse_in
, "__tune_corei7__");
282 def_or_undef (parse_in
, "__tune_nehalem__");
284 case PROCESSOR_SANDYBRIDGE
:
285 def_or_undef (parse_in
, "__tune_corei7_avx__");
286 def_or_undef (parse_in
, "__tune_sandybridge__");
288 case PROCESSOR_HASWELL
:
289 def_or_undef (parse_in
, "__tune_core_avx2__");
290 def_or_undef (parse_in
, "__tune_haswell__");
292 case PROCESSOR_BONNELL
:
293 def_or_undef (parse_in
, "__tune_atom__");
294 def_or_undef (parse_in
, "__tune_bonnell__");
296 case PROCESSOR_SILVERMONT
:
297 def_or_undef (parse_in
, "__tune_slm__");
298 def_or_undef (parse_in
, "__tune_silvermont__");
301 def_or_undef (parse_in
, "__tune_knl__");
304 def_or_undef (parse_in
, "__tune_knm__");
306 case PROCESSOR_SKYLAKE_AVX512
:
307 def_or_undef (parse_in
, "__tune_skylake_avx512__");
309 case PROCESSOR_CANNONLAKE
:
310 def_or_undef (parse_in
, "__tune_cannonlake__");
312 case PROCESSOR_LAKEMONT
:
313 def_or_undef (parse_in
, "__tune_lakemont__");
315 case PROCESSOR_INTEL
:
316 case PROCESSOR_GENERIC
:
318 /* use PROCESSOR_max to not set/unset the tune macro. */
327 def_or_undef (parse_in
, "__code_model_small__");
331 def_or_undef (parse_in
, "__code_model_medium__");
335 def_or_undef (parse_in
, "__code_model_large__");
338 def_or_undef (parse_in
, "__code_model_32__");
341 def_or_undef (parse_in
, "__code_model_kernel__");
347 if (isa_flag
& OPTION_MASK_ISA_MMX
)
348 def_or_undef (parse_in
, "__MMX__");
349 if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
350 def_or_undef (parse_in
, "__3dNOW__");
351 if (isa_flag
& OPTION_MASK_ISA_3DNOW_A
)
352 def_or_undef (parse_in
, "__3dNOW_A__");
353 if (isa_flag
& OPTION_MASK_ISA_SSE
)
354 def_or_undef (parse_in
, "__SSE__");
355 if (isa_flag
& OPTION_MASK_ISA_SSE2
)
356 def_or_undef (parse_in
, "__SSE2__");
357 if (isa_flag
& OPTION_MASK_ISA_SSE3
)
358 def_or_undef (parse_in
, "__SSE3__");
359 if (isa_flag
& OPTION_MASK_ISA_SSSE3
)
360 def_or_undef (parse_in
, "__SSSE3__");
361 if (isa_flag
& OPTION_MASK_ISA_SSE4_1
)
362 def_or_undef (parse_in
, "__SSE4_1__");
363 if (isa_flag
& OPTION_MASK_ISA_SSE4_2
)
364 def_or_undef (parse_in
, "__SSE4_2__");
365 if (isa_flag
& OPTION_MASK_ISA_AES
)
366 def_or_undef (parse_in
, "__AES__");
367 if (isa_flag
& OPTION_MASK_ISA_SHA
)
368 def_or_undef (parse_in
, "__SHA__");
369 if (isa_flag
& OPTION_MASK_ISA_PCLMUL
)
370 def_or_undef (parse_in
, "__PCLMUL__");
371 if (isa_flag
& OPTION_MASK_ISA_AVX
)
372 def_or_undef (parse_in
, "__AVX__");
373 if (isa_flag
& OPTION_MASK_ISA_AVX2
)
374 def_or_undef (parse_in
, "__AVX2__");
375 if (isa_flag
& OPTION_MASK_ISA_AVX512F
)
376 def_or_undef (parse_in
, "__AVX512F__");
377 if (isa_flag
& OPTION_MASK_ISA_AVX512ER
)
378 def_or_undef (parse_in
, "__AVX512ER__");
379 if (isa_flag
& OPTION_MASK_ISA_AVX512CD
)
380 def_or_undef (parse_in
, "__AVX512CD__");
381 if (isa_flag
& OPTION_MASK_ISA_AVX512PF
)
382 def_or_undef (parse_in
, "__AVX512PF__");
383 if (isa_flag
& OPTION_MASK_ISA_AVX512DQ
)
384 def_or_undef (parse_in
, "__AVX512DQ__");
385 if (isa_flag
& OPTION_MASK_ISA_AVX512BW
)
386 def_or_undef (parse_in
, "__AVX512BW__");
387 if (isa_flag
& OPTION_MASK_ISA_AVX512VL
)
388 def_or_undef (parse_in
, "__AVX512VL__");
389 if (isa_flag
& OPTION_MASK_ISA_AVX512VBMI
)
390 def_or_undef (parse_in
, "__AVX512VBMI__");
391 if (isa_flag
& OPTION_MASK_ISA_AVX512IFMA
)
392 def_or_undef (parse_in
, "__AVX512IFMA__");
393 if (isa_flag2
& OPTION_MASK_ISA_AVX5124VNNIW
)
394 def_or_undef (parse_in
, "__AVX5124VNNIW__");
395 if (isa_flag2
& OPTION_MASK_ISA_AVX512VBMI2
)
396 def_or_undef (parse_in
, "__AVX512VBMI2__");
397 if (isa_flag2
& OPTION_MASK_ISA_AVX512VNNI
)
398 def_or_undef (parse_in
, "__AVX512VNNI__");
399 if (isa_flag2
& OPTION_MASK_ISA_SGX
)
400 def_or_undef (parse_in
, "__SGX__");
401 if (isa_flag2
& OPTION_MASK_ISA_AVX5124FMAPS
)
402 def_or_undef (parse_in
, "__AVX5124FMAPS__");
403 if (isa_flag2
& OPTION_MASK_ISA_AVX512VPOPCNTDQ
)
404 def_or_undef (parse_in
, "__AVX512VPOPCNTDQ__");
405 if (isa_flag
& OPTION_MASK_ISA_FMA
)
406 def_or_undef (parse_in
, "__FMA__");
407 if (isa_flag
& OPTION_MASK_ISA_RTM
)
408 def_or_undef (parse_in
, "__RTM__");
409 if (isa_flag
& OPTION_MASK_ISA_SSE4A
)
410 def_or_undef (parse_in
, "__SSE4A__");
411 if (isa_flag
& OPTION_MASK_ISA_FMA4
)
412 def_or_undef (parse_in
, "__FMA4__");
413 if (isa_flag
& OPTION_MASK_ISA_XOP
)
414 def_or_undef (parse_in
, "__XOP__");
415 if (isa_flag
& OPTION_MASK_ISA_LWP
)
416 def_or_undef (parse_in
, "__LWP__");
417 if (isa_flag
& OPTION_MASK_ISA_ABM
)
418 def_or_undef (parse_in
, "__ABM__");
419 if (isa_flag
& OPTION_MASK_ISA_BMI
)
420 def_or_undef (parse_in
, "__BMI__");
421 if (isa_flag
& OPTION_MASK_ISA_BMI2
)
422 def_or_undef (parse_in
, "__BMI2__");
423 if (isa_flag
& OPTION_MASK_ISA_LZCNT
)
424 def_or_undef (parse_in
, "__LZCNT__");
425 if (isa_flag
& OPTION_MASK_ISA_TBM
)
426 def_or_undef (parse_in
, "__TBM__");
427 if (isa_flag
& OPTION_MASK_ISA_POPCNT
)
428 def_or_undef (parse_in
, "__POPCNT__");
429 if (isa_flag
& OPTION_MASK_ISA_FSGSBASE
)
430 def_or_undef (parse_in
, "__FSGSBASE__");
431 if (isa_flag
& OPTION_MASK_ISA_RDRND
)
432 def_or_undef (parse_in
, "__RDRND__");
433 if (isa_flag
& OPTION_MASK_ISA_F16C
)
434 def_or_undef (parse_in
, "__F16C__");
435 if (isa_flag
& OPTION_MASK_ISA_RDSEED
)
436 def_or_undef (parse_in
, "__RDSEED__");
437 if (isa_flag
& OPTION_MASK_ISA_PRFCHW
)
438 def_or_undef (parse_in
, "__PRFCHW__");
439 if (isa_flag
& OPTION_MASK_ISA_ADX
)
440 def_or_undef (parse_in
, "__ADX__");
441 if (isa_flag
& OPTION_MASK_ISA_FXSR
)
442 def_or_undef (parse_in
, "__FXSR__");
443 if (isa_flag
& OPTION_MASK_ISA_XSAVE
)
444 def_or_undef (parse_in
, "__XSAVE__");
445 if (isa_flag
& OPTION_MASK_ISA_XSAVEOPT
)
446 def_or_undef (parse_in
, "__XSAVEOPT__");
447 if (isa_flag
& OPTION_MASK_ISA_PREFETCHWT1
)
448 def_or_undef (parse_in
, "__PREFETCHWT1__");
449 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE
))
450 def_or_undef (parse_in
, "__SSE_MATH__");
451 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE2
))
452 def_or_undef (parse_in
, "__SSE2_MATH__");
453 if (isa_flag
& OPTION_MASK_ISA_CLFLUSHOPT
)
454 def_or_undef (parse_in
, "__CLFLUSHOPT__");
455 if (isa_flag
& OPTION_MASK_ISA_CLZERO
)
456 def_or_undef (parse_in
, "__CLZERO__");
457 if (isa_flag
& OPTION_MASK_ISA_XSAVEC
)
458 def_or_undef (parse_in
, "__XSAVEC__");
459 if (isa_flag
& OPTION_MASK_ISA_XSAVES
)
460 def_or_undef (parse_in
, "__XSAVES__");
461 if (isa_flag2
& OPTION_MASK_ISA_MPX
)
462 def_or_undef (parse_in
, "__MPX__");
463 if (isa_flag
& OPTION_MASK_ISA_CLWB
)
464 def_or_undef (parse_in
, "__CLWB__");
465 if (isa_flag
& OPTION_MASK_ISA_MWAITX
)
466 def_or_undef (parse_in
, "__MWAITX__");
467 if (isa_flag
& OPTION_MASK_ISA_PKU
)
468 def_or_undef (parse_in
, "__PKU__");
469 if (isa_flag2
& OPTION_MASK_ISA_RDPID
)
470 def_or_undef (parse_in
, "__RDPID__");
471 if (isa_flag
& OPTION_MASK_ISA_GFNI
)
472 def_or_undef (parse_in
, "__GFNI__");
473 if (isa_flag2
& OPTION_MASK_ISA_IBT
)
475 def_or_undef (parse_in
, "__IBT__");
476 if (flag_cf_protection
!= CF_NONE
)
477 def_or_undef (parse_in
, "__CET__");
479 if (isa_flag2
& OPTION_MASK_ISA_SHSTK
)
481 def_or_undef (parse_in
, "__SHSTK__");
482 if (flag_cf_protection
!= CF_NONE
)
483 def_or_undef (parse_in
, "__CET__");
487 def_or_undef (parse_in
, "__iamcu");
488 def_or_undef (parse_in
, "__iamcu__");
493 /* Hook to validate the current #pragma GCC target and set the state, and
494 update the macros based on what was changed. If ARGS is NULL, then
495 POP_TARGET is used to reset the options. */
498 ix86_pragma_target_parse (tree args
, tree pop_target
)
500 tree prev_tree
= build_target_option_node (&global_options
);
502 struct cl_target_option
*prev_opt
;
503 struct cl_target_option
*cur_opt
;
504 HOST_WIDE_INT prev_isa
;
505 HOST_WIDE_INT cur_isa
;
506 HOST_WIDE_INT diff_isa
;
507 HOST_WIDE_INT prev_isa2
;
508 HOST_WIDE_INT cur_isa2
;
509 HOST_WIDE_INT diff_isa2
;
510 enum processor_type prev_arch
;
511 enum processor_type prev_tune
;
512 enum processor_type cur_arch
;
513 enum processor_type cur_tune
;
517 cur_tree
= (pop_target
? pop_target
: target_option_default_node
);
518 cl_target_option_restore (&global_options
,
519 TREE_TARGET_OPTION (cur_tree
));
523 cur_tree
= ix86_valid_target_attribute_tree (args
, &global_options
,
524 &global_options_set
);
525 if (!cur_tree
|| cur_tree
== error_mark_node
)
527 cl_target_option_restore (&global_options
,
528 TREE_TARGET_OPTION (prev_tree
));
533 target_option_current_node
= cur_tree
;
534 ix86_reset_previous_fndecl ();
536 /* Figure out the previous/current isa, arch, tune and the differences. */
537 prev_opt
= TREE_TARGET_OPTION (prev_tree
);
538 cur_opt
= TREE_TARGET_OPTION (cur_tree
);
539 prev_isa
= prev_opt
->x_ix86_isa_flags
;
540 cur_isa
= cur_opt
->x_ix86_isa_flags
;
541 diff_isa
= (prev_isa
^ cur_isa
);
542 prev_isa2
= prev_opt
->x_ix86_isa_flags2
;
543 cur_isa2
= cur_opt
->x_ix86_isa_flags2
;
544 diff_isa2
= (prev_isa2
^ cur_isa2
);
545 prev_arch
= (enum processor_type
) prev_opt
->arch
;
546 prev_tune
= (enum processor_type
) prev_opt
->tune
;
547 cur_arch
= (enum processor_type
) cur_opt
->arch
;
548 cur_tune
= (enum processor_type
) cur_opt
->tune
;
550 /* If the same processor is used for both previous and current options, don't
551 change the macros. */
552 if (cur_arch
== prev_arch
)
553 cur_arch
= prev_arch
= PROCESSOR_max
;
555 if (cur_tune
== prev_tune
)
556 cur_tune
= prev_tune
= PROCESSOR_max
;
558 /* Undef all of the macros for that are no longer current. */
559 ix86_target_macros_internal (prev_isa
& diff_isa
,
560 prev_isa2
& diff_isa2
,
563 (enum fpmath_unit
) prev_opt
->x_ix86_fpmath
,
566 /* For the definitions, ensure all newly defined macros are considered
567 as used for -Wunused-macros. There is no point warning about the
568 compiler predefined macros. */
569 cpp_options
*cpp_opts
= cpp_get_options (parse_in
);
570 unsigned char saved_warn_unused_macros
= cpp_opts
->warn_unused_macros
;
571 cpp_opts
->warn_unused_macros
= 0;
573 /* Define all of the macros for new options that were just turned on. */
574 ix86_target_macros_internal (cur_isa
& diff_isa
,
575 cur_isa2
& diff_isa2
,
578 (enum fpmath_unit
) cur_opt
->x_ix86_fpmath
,
581 cpp_opts
->warn_unused_macros
= saved_warn_unused_macros
;
586 /* Function to tell the preprocessor about the defines for the current target. */
589 ix86_target_macros (void)
591 /* 32/64-bit won't change with target specific options, so do the assert and
592 builtin_define_std calls here. */
595 cpp_assert (parse_in
, "cpu=x86_64");
596 cpp_assert (parse_in
, "machine=x86_64");
597 cpp_define (parse_in
, "__amd64");
598 cpp_define (parse_in
, "__amd64__");
599 cpp_define (parse_in
, "__x86_64");
600 cpp_define (parse_in
, "__x86_64__");
603 cpp_define (parse_in
, "_ILP32");
604 cpp_define (parse_in
, "__ILP32__");
609 cpp_assert (parse_in
, "cpu=i386");
610 cpp_assert (parse_in
, "machine=i386");
611 builtin_define_std ("i386");
615 cpp_define (parse_in
, "_SOFT_FLOAT");
617 if (TARGET_LONG_DOUBLE_64
)
618 cpp_define (parse_in
, "__LONG_DOUBLE_64__");
620 if (TARGET_LONG_DOUBLE_128
)
621 cpp_define (parse_in
, "__LONG_DOUBLE_128__");
623 if (TARGET_128BIT_LONG_DOUBLE
)
624 cpp_define (parse_in
, "__SIZEOF_FLOAT80__=16");
626 cpp_define (parse_in
, "__SIZEOF_FLOAT80__=12");
628 cpp_define (parse_in
, "__SIZEOF_FLOAT128__=16");
630 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE
);
631 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE
);
633 cpp_define (parse_in
, "__GCC_ASM_FLAG_OUTPUTS__");
635 ix86_target_macros_internal (ix86_isa_flags
,
642 cpp_define (parse_in
, "__SEG_FS");
643 cpp_define (parse_in
, "__SEG_GS");
647 /* Register target pragmas. We need to add the hook for parsing #pragma GCC
648 option here rather than in i386.c since it will pull in various preprocessor
649 functions, and those are not present in languages like fortran without a
653 ix86_register_pragmas (void)
655 /* Update pragma hook to allow parsing #pragma GCC target. */
656 targetm
.target_option
.pragma_parse
= ix86_pragma_target_parse
;
658 c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS
);
659 c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS
);
661 #ifdef REGISTER_SUBTARGET_PRAGMAS
662 REGISTER_SUBTARGET_PRAGMAS ();