gcc/config/arm/arm-protos.h

   1 /* Prototypes for exported functions defined in arm.cc and pe.c
   2    Copyright (C) 1999-2023 Free Software Foundation, Inc.
   3    Contributed by Richard Earnshaw (rearnsha@arm.com)
   4    Minor hacks by Nick Clifton (nickc@cygnus.com)
   5
   6    This file is part of GCC.
   7
   8    GCC is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3, or (at your option)
  11    any later version.
  12
  13    GCC is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with GCC; see the file COPYING3.  If not see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 #ifndef GCC_ARM_PROTOS_H
  23 #define GCC_ARM_PROTOS_H
  24
  25 #include "sbitmap.h"
  26
  27 rtl_opt_pass *make_pass_insert_bti (gcc::context *ctxt);
  28
  29 extern enum unwind_info_type arm_except_unwind_info (struct gcc_options *);
  30 extern int use_return_insn (int, rtx);
  31 extern bool use_simple_return_p (void);
  32 extern enum reg_class arm_regno_class (int);
  33 extern bool arm_check_builtin_call (location_t , vec<location_t> , tree,
  34                                     tree, unsigned int, tree *);
  35 extern void arm_load_pic_register (unsigned long, rtx);
  36 extern int arm_volatile_func (void);
  37 extern void arm_expand_prologue (void);
  38 extern void arm_expand_epilogue (bool);
  39 extern void arm_declare_function_name (FILE *, const char *, tree);
  40 extern void arm_asm_declare_function_name (FILE *, const char *, tree);
  41 extern void thumb2_expand_return (bool);
  42 extern const char *arm_strip_name_encoding (const char *);
  43 extern void arm_asm_output_labelref (FILE *, const char *);
  44 extern void thumb2_asm_output_opcode (FILE *);
  45 extern unsigned long arm_current_func_type (void);
  46 extern HOST_WIDE_INT arm_compute_initial_elimination_offset (unsigned int,
  47                                                              unsigned int);
  48 extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int,
  49                                                                unsigned int);
  50 extern unsigned int arm_debugger_regno (unsigned int);
  51 extern void arm_output_fn_unwind (FILE *, bool);
  52
  53 extern rtx arm_expand_builtin (tree exp, rtx target, rtx subtarget
  54                                ATTRIBUTE_UNUSED, machine_mode mode
  55                                ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED);
  56 extern tree arm_builtin_decl (unsigned code, bool initialize_p
  57                               ATTRIBUTE_UNUSED);
  58 extern void arm_init_builtins (void);
  59 extern void arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update);
  60 extern rtx arm_simd_vect_par_cnst_half (machine_mode mode, bool high);
  61 extern bool arm_simd_check_vect_par_cnst_half_p (rtx op, machine_mode mode,
  62                                                  bool high);
  63 extern void arm_emit_speculation_barrier_function (void);
  64 extern void arm_decompose_di_binop (rtx, rtx, rtx *, rtx *, rtx *, rtx *);
  65 extern bool arm_q_bit_access (void);
  66 extern bool arm_ge_bits_access (void);
  67 extern bool arm_target_insn_ok_for_lob (rtx);
  68
  69 #ifdef RTX_CODE
  70 enum reg_class
  71 arm_mode_base_reg_class (machine_mode);
  72 extern void arm_gen_unlikely_cbranch (enum rtx_code, machine_mode cc_mode,
  73                                       rtx label_ref);
  74 extern bool arm_vector_mode_supported_p (machine_mode);
  75 extern bool arm_small_register_classes_for_mode_p (machine_mode);
  76 extern int const_ok_for_arm (HOST_WIDE_INT);
  77 extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
  78 extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code);
  79 extern void thumb1_gen_const_int_rtl (rtx, HOST_WIDE_INT);
  80 extern void thumb1_gen_const_int_print (rtx, HOST_WIDE_INT);
  81 extern int arm_split_constant (RTX_CODE, machine_mode, rtx,
  82                                HOST_WIDE_INT, rtx, rtx, int);
  83 extern int legitimate_pic_operand_p (rtx);
  84 extern rtx legitimize_pic_address (rtx, machine_mode, rtx, rtx, bool);
  85 extern rtx legitimize_tls_address (rtx, rtx);
  86 extern bool arm_legitimate_address_p (machine_mode, rtx, bool);
  87 extern int arm_legitimate_address_outer_p (machine_mode, rtx, RTX_CODE, int);
  88 extern int thumb_legitimate_offset_p (machine_mode, HOST_WIDE_INT);
  89 extern int thumb1_legitimate_address_p (machine_mode, rtx, int);
  90 extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode,
  91                                  bool, bool);
  92 extern bool clear_operation_p (rtx, bool);
  93 extern int arm_const_double_rtx (rtx);
  94 extern int vfp3_const_double_rtx (rtx);
  95 extern int simd_immediate_valid_for_move (rtx, machine_mode, rtx *, int *);
  96 extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *,
  97                                            int *);
  98 extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *,
  99                                            int *, bool);
 100 extern char *neon_output_logic_immediate (const char *, rtx *,
 101                                           machine_mode, int, int);
 102 extern char *neon_output_shift_immediate (const char *, char, rtx *,
 103                                           machine_mode, int, bool);
 104 extern void neon_pairwise_reduce (rtx, rtx, machine_mode,
 105                                   rtx (*) (rtx, rtx, rtx));
 106 extern rtx mve_bool_vec_to_const (rtx const_vec);
 107 extern rtx neon_make_constant (rtx, bool generate = true);
 108 extern void neon_expand_vector_init (rtx, rtx);
 109 extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree);
 110 extern void arm_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
 111 extern HOST_WIDE_INT neon_element_bits (machine_mode);
 112 extern void neon_emit_pair_result_insn (machine_mode,
 113                                         rtx (*) (rtx, rtx, rtx, rtx),
 114                                         rtx, rtx, rtx);
 115 extern void neon_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int);
 116 extern void neon_split_vcombine (rtx op[3]);
 117 extern enum reg_class coproc_secondary_reload_class (machine_mode, rtx,
 118                                                      bool);
 119 extern bool arm_tls_referenced_p (rtx);
 120
 121 extern int arm_coproc_mem_operand (rtx, bool);
 122 extern int arm_coproc_mem_operand_no_writeback (rtx);
 123 extern int arm_coproc_mem_operand_wb (rtx, int);
 124 extern int neon_vector_mem_operand (rtx, int, bool);
 125 extern int mve_vector_mem_operand (machine_mode, rtx, bool);
 126 extern int neon_struct_mem_operand (rtx);
 127 extern int mve_struct_mem_operand (rtx);
 128
 129 extern rtx *neon_vcmla_lane_prepare_operands (rtx *);
 130
 131 extern int tls_mentioned_p (rtx);
 132 extern int symbol_mentioned_p (rtx);
 133 extern int label_mentioned_p (rtx);
 134 extern RTX_CODE minmax_code (rtx);
 135 extern bool arm_sat_operator_match (rtx, rtx, int *, bool *);
 136 extern int adjacent_mem_locations (rtx, rtx);
 137 extern bool gen_ldm_seq (rtx *, int, bool);
 138 extern bool gen_stm_seq (rtx *, int);
 139 extern bool gen_const_stm_seq (rtx *, int);
 140 extern rtx arm_gen_load_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
 141 extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
 142 extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT);
 143 extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool);
 144 extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool);
 145 extern bool valid_operands_ldrd_strd (rtx *, bool);
 146 extern int arm_gen_cpymemqi (rtx *);
 147 extern bool gen_cpymem_ldrd_strd (rtx *);
 148 extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
 149 extern machine_mode arm_select_dominance_cc_mode (rtx, rtx,
 150                                                        HOST_WIDE_INT);
 151 extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx, rtx);
 152 extern rtx arm_gen_return_addr_mask (void);
 153 extern void arm_reload_in_hi (rtx *);
 154 extern void arm_reload_out_hi (rtx *);
 155 extern int arm_max_const_double_inline_cost (void);
 156 extern int arm_const_double_inline_cost (rtx);
 157 extern bool arm_const_double_by_parts (rtx);
 158 extern bool arm_const_double_by_immediates (rtx);
 159 extern rtx arm_load_function_descriptor (rtx funcdesc);
 160 extern void arm_emit_call_insn (rtx, rtx, bool);
 161 bool detect_cmse_nonsecure_call (tree);
 162 extern const char *output_call (rtx *);
 163 void arm_emit_movpair (rtx, rtx);
 164 extern const char *output_mov_long_double_arm_from_arm (rtx *);
 165 extern const char *output_move_double (rtx *, bool, int *count);
 166 extern const char *output_move_quad (rtx *);
 167 extern int arm_count_output_move_double_insns (rtx *);
 168 extern int arm_count_ldrdstrd_insns (rtx *, bool);
 169 extern const char *output_move_vfp (rtx *operands);
 170 extern const char *output_move_neon (rtx *operands);
 171 extern int arm_attr_length_move_neon (rtx_insn *);
 172 extern int arm_address_offset_is_imm (rtx_insn *);
 173 extern const char *output_add_immediate (rtx *);
 174 extern const char *arithmetic_instr (rtx, int);
 175 extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
 176 extern const char *output_return_instruction (rtx, bool, bool, bool);
 177 extern const char *output_probe_stack_range (rtx, rtx);
 178 extern void arm_poke_function_name (FILE *, const char *);
 179 extern void arm_final_prescan_insn (rtx_insn *);
 180 extern int arm_debugger_arg_offset (int, rtx);
 181 extern bool arm_is_long_call_p (tree);
 182 extern int    arm_emit_vector_const (FILE *, rtx);
 183 extern void arm_emit_fp16_const (rtx c);
 184 extern const char * arm_output_load_gr (rtx *);
 185 extern const char *vfp_output_vstmd (rtx *);
 186 extern void arm_output_multireg_pop (rtx *, bool, rtx, bool, bool);
 187 extern void arm_set_return_address (rtx, rtx);
 188 extern int arm_eliminable_register (rtx);
 189 extern const char *arm_output_shift(rtx *, int);
 190 extern const char *arm_output_iwmmxt_shift_immediate (const char *, rtx *, bool);
 191 extern const char *arm_output_iwmmxt_tinsr (rtx *);
 192 extern unsigned int arm_sync_loop_insns (rtx , rtx *);
 193 extern int arm_attr_length_push_multi(rtx, rtx);
 194 extern int arm_attr_length_pop_multi(rtx *, bool, bool);
 195 extern void arm_expand_compare_and_swap (rtx op[]);
 196 extern void arm_split_compare_and_swap (rtx op[]);
 197 extern void arm_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
 198 extern rtx arm_load_tp (rtx);
 199 extern bool arm_coproc_builtin_available (enum unspecv);
 200 extern bool arm_coproc_ldc_stc_legitimate_address (rtx);
 201 extern rtx arm_stack_protect_tls_canary_mem (bool);
 202
 203
 204 #if defined TREE_CODE
 205 extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
 206 extern bool arm_pad_reg_upward (machine_mode, tree, int);
 207 #endif
 208 extern int arm_apply_result_size (void);
 209 extern opt_machine_mode arm_get_mask_mode (machine_mode mode);
 210
 211 #endif /* RTX_CODE */
 212
 213 /* MVE functions.  */
 214 namespace arm_mve {
 215   void handle_arm_mve_types_h ();
 216 }
 217
 218 /* Thumb functions.  */
 219 extern void arm_init_expanders (void);
 220 extern const char *thumb1_unexpanded_epilogue (void);
 221 extern void thumb1_expand_prologue (void);
 222 extern void thumb1_expand_epilogue (void);
 223 extern const char *thumb1_output_interwork (void);
 224 extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
 225 #ifdef RTX_CODE
 226 extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
 227 extern void thumb1_final_prescan_insn (rtx_insn *);
 228 extern void thumb2_final_prescan_insn (rtx_insn *);
 229 extern const char *thumb_load_double_from_address (rtx *);
 230 extern const char *thumb_output_move_mem_multiple (int, rtx *);
 231 extern const char *thumb_call_via_reg (rtx);
 232 extern void thumb_expand_cpymemqi (rtx *);
 233 extern rtx arm_return_addr (int, rtx);
 234 extern void thumb_reload_out_hi (rtx *);
 235 extern void thumb_set_return_address (rtx, rtx);
 236 extern const char *thumb1_output_casesi (rtx *);
 237 extern const char *thumb2_output_casesi (rtx *);
 238 #endif
 239
 240 /* Defined in pe.c.  */
 241 extern int arm_dllexport_name_p (const char *);
 242 extern int arm_dllimport_name_p (const char *);
 243
 244 #ifdef TREE_CODE
 245 extern void arm_pe_unique_section (tree, int);
 246 extern void arm_pe_encode_section_info (tree, rtx, int);
 247 extern int arm_dllexport_p (tree);
 248 extern int arm_dllimport_p (tree);
 249 extern void arm_mark_dllexport (tree);
 250 extern void arm_mark_dllimport (tree);
 251 extern bool arm_change_mode_p (tree);
 252 #endif
 253
 254 extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *,
 255                                              struct gcc_options *);
 256 extern void arm_configure_build_target (struct arm_build_target *,
 257                                         struct cl_target_option *, bool);
 258 extern void arm_option_reconfigure_globals (void);
 259 extern void arm_options_perform_arch_sanity_checks (void);
 260 extern void arm_pr_long_calls (struct cpp_reader *);
 261 extern void arm_pr_no_long_calls (struct cpp_reader *);
 262 extern void arm_pr_long_calls_off (struct cpp_reader *);
 263
 264 extern const char *arm_mangle_type (const_tree);
 265 extern const char *arm_mangle_builtin_type (const_tree);
 266
 267 extern void arm_order_regs_for_local_alloc (void);
 268
 269 extern int arm_max_conditional_execute ();
 270
 271 /* Vectorizer cost model implementation.  */
 272 struct cpu_vec_costs {
 273   const int scalar_stmt_cost;   /* Cost of any scalar operation, excluding
 274                                    load and store.  */
 275   const int scalar_load_cost;   /* Cost of scalar load.  */
 276   const int scalar_store_cost;  /* Cost of scalar store.  */
 277   const int vec_stmt_cost;      /* Cost of any vector operation, excluding
 278                                    load, store, vector-to-scalar and
 279                                    scalar-to-vector operation.  */
 280   const int vec_to_scalar_cost;    /* Cost of vect-to-scalar operation.  */
 281   const int scalar_to_vec_cost;    /* Cost of scalar-to-vector operation.  */
 282   const int vec_align_load_cost;   /* Cost of aligned vector load.  */
 283   const int vec_unalign_load_cost; /* Cost of unaligned vector load.  */
 284   const int vec_unalign_store_cost; /* Cost of unaligned vector load.  */
 285   const int vec_store_cost;        /* Cost of vector store.  */
 286   const int cond_taken_branch_cost;    /* Cost of taken branch for vectorizer
 287                                           cost model.  */
 288   const int cond_not_taken_branch_cost;/* Cost of not taken branch for
 289                                           vectorizer cost model.  */
 290 };
 291
 292 #ifdef RTX_CODE
 293 /* This needs to be here because we need RTX_CODE and similar.  */
 294
 295 struct cpu_cost_table;
 296
 297 /* Addressing mode operations.  Used to index tables in struct
 298    addr_mode_cost_table.  */
 299 enum arm_addr_mode_op
 300 {
 301    AMO_DEFAULT,
 302    AMO_NO_WB,   /* Offset with no writeback.  */
 303    AMO_WB,      /* Offset with writeback.  */
 304    AMO_MAX      /* For array size.  */
 305 };
 306
 307 /* Table of additional costs in units of COSTS_N_INSNS() when using
 308    addressing modes for each access type.  */
 309 struct addr_mode_cost_table
 310 {
 311    const int integer[AMO_MAX];
 312    const int fp[AMO_MAX];
 313    const int vector[AMO_MAX];
 314 };
 315
 316 /* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this
 317    structure is modified.  */
 318
 319 struct tune_params
 320 {
 321   const struct cpu_cost_table *insn_extra_cost;
 322   const struct addr_mode_cost_table *addr_mode_costs;
 323   bool (*sched_adjust_cost) (rtx_insn *, int, rtx_insn *, int *);
 324   int (*branch_cost) (bool, bool);
 325   /* Vectorizer costs.  */
 326   const struct cpu_vec_costs* vec_costs;
 327   int constant_limit;
 328   /* Maximum number of instructions to conditionalise.  */
 329   int max_insns_skipped;
 330   /* Maximum number of instructions to inline calls to memset.  */
 331   int max_insns_inline_memset;
 332   /* Issue rate of the processor.  */
 333   unsigned int issue_rate;
 334   /* Explicit prefetch data.  */
 335   struct
 336     {
 337       int num_slots;
 338       int l1_cache_size;
 339       int l1_cache_line_size;
 340     } prefetch;
 341   enum {PREF_CONST_POOL_FALSE, PREF_CONST_POOL_TRUE}
 342     prefer_constant_pool: 1;
 343   /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM.  */
 344   enum {PREF_LDRD_FALSE, PREF_LDRD_TRUE} prefer_ldrd_strd: 1;
 345   /* The preference for non short cirtcuit operation when optimizing for
 346      performance. The first element covers Thumb state and the second one
 347      is for ARM state.  */
 348   enum log_op_non_short_circuit {LOG_OP_NON_SHORT_CIRCUIT_FALSE,
 349                                  LOG_OP_NON_SHORT_CIRCUIT_TRUE};
 350   log_op_non_short_circuit logical_op_non_short_circuit_thumb: 1;
 351   log_op_non_short_circuit logical_op_non_short_circuit_arm: 1;
 352   /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding.  */
 353   enum {DISPARAGE_FLAGS_NEITHER, DISPARAGE_FLAGS_PARTIAL, DISPARAGE_FLAGS_ALL}
 354     disparage_flag_setting_t16_encodings: 2;
 355   /* Prefer to inline string operations like memset by using Neon.  */
 356   enum {PREF_NEON_STRINGOPS_FALSE, PREF_NEON_STRINGOPS_TRUE}
 357     string_ops_prefer_neon: 1;
 358   /* Bitfield encoding the fusible pairs of instructions.  Use FUSE_OPS
 359      in an initializer if multiple fusion operations are supported on a
 360      target.  */
 361   enum fuse_ops
 362   {
 363     FUSE_NOTHING   = 0,
 364     FUSE_MOVW_MOVT = 1 << 0,
 365     FUSE_AES_AESMC = 1 << 1
 366   } fusible_ops: 2;
 367   /* Depth of scheduling queue to check for L2 autoprefetcher.  */
 368   enum {SCHED_AUTOPREF_OFF, SCHED_AUTOPREF_RANK, SCHED_AUTOPREF_FULL}
 369     sched_autopref: 2;
 370 };
 371
 372 /* Smash multiple fusion operations into a type that can be used for an
 373    initializer.  */
 374 #define FUSE_OPS(x) ((tune_params::fuse_ops) (x))
 375
 376 extern const struct tune_params *current_tune;
 377 extern int vfp3_const_double_for_fract_bits (rtx);
 378 /* return power of two from operand, otherwise 0.  */
 379 extern int vfp3_const_double_for_bits (rtx);
 380
 381 extern void arm_emit_coreregs_64bit_shift (enum rtx_code, rtx, rtx, rtx, rtx,
 382                                            rtx);
 383 extern bool arm_fusion_enabled_p (tune_params::fuse_ops);
 384 extern bool arm_current_function_pac_enabled_p (void);
 385 extern bool arm_valid_symbolic_address_p (rtx);
 386 extern bool arm_validize_comparison (rtx *, rtx *, rtx *);
 387 extern bool arm_expand_vector_compare (rtx, rtx_code, rtx, rtx, bool);
 388 #endif /* RTX_CODE */
 389
 390 extern bool arm_gen_setmem (rtx *);
 391 extern void arm_expand_vcond (rtx *, machine_mode);
 392 extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel);
 393
 394 extern bool arm_autoinc_modes_ok_p (machine_mode, enum arm_auto_incmodes);
 395
 396 extern void arm_emit_eabi_attribute (const char *, int, int);
 397
 398 extern void arm_reset_previous_fndecl (void);
 399 extern void save_restore_target_globals (tree);
 400
 401 /* Defined in gcc/common/config/arm-common.cc.  */
 402 extern const char *arm_rewrite_selected_cpu (const char *name);
 403
 404 /* Defined in gcc/common/config/arm-c.cc.  */
 405 extern void arm_lang_object_attributes_init (void);
 406 extern void arm_register_target_pragmas (void);
 407 extern void arm_cpu_cpp_builtins (struct cpp_reader *);
 408
 409 extern bool arm_is_constant_pool_ref (rtx);
 410
 411 /* The bits in this mask specify which instruction scheduling options should
 412    be used.  */
 413 extern unsigned int tune_flags;
 414
 415 /* Nonzero if this chip supports the ARM Architecture 4 extensions.  */
 416 extern int arm_arch4;
 417
 418 /* Nonzero if this chip supports the ARM Architecture 4t extensions.  */
 419 extern int arm_arch4t;
 420
 421 /* Nonzero if this chip supports the ARM Architecture 5t extensions.  */
 422 extern int arm_arch5t;
 423
 424 /* Nonzero if this chip supports the ARM Architecture 5te extensions.  */
 425 extern int arm_arch5te;
 426
 427 /* Nonzero if this chip supports the ARM Architecture 6 extensions.  */
 428 extern int arm_arch6;
 429
 430 /* Nonzero if this chip supports the ARM 6K extensions.  */
 431 extern int arm_arch6k;
 432
 433 /* Nonzero if this chip supports the ARM 6KZ extensions.  */
 434 extern int arm_arch6kz;
 435
 436 /* Nonzero if instructions present in ARMv6-M can be used.  */
 437 extern int arm_arch6m;
 438
 439 /* Nonzero if this chip supports the ARM 7 extensions.  */
 440 extern int arm_arch7;
 441
 442 /* Nonzero if this chip supports the Large Physical Address Extension.  */
 443 extern int arm_arch_lpae;
 444
 445 /* Nonzero if instructions not present in the 'M' profile can be used.  */
 446 extern int arm_arch_notm;
 447
 448 /* Nonzero if instructions present in ARMv7E-M can be used.  */
 449 extern int arm_arch7em;
 450
 451 /* Nonzero if instructions present in ARMv8 can be used.  */
 452 extern int arm_arch8;
 453
 454 /* Nonzero if this chip can benefit from load scheduling.  */
 455 extern int arm_ld_sched;
 456
 457 /* Nonzero if this chip is a StrongARM.  */
 458 extern int arm_tune_strongarm;
 459
 460 /* Nonzero if this chip supports Intel Wireless MMX technology.  */
 461 extern int arm_arch_iwmmxt;
 462
 463 /* Nonzero if this chip supports Intel Wireless MMX2 technology.  */
 464 extern int arm_arch_iwmmxt2;
 465
 466 /* Nonzero if this chip is an XScale.  */
 467 extern int arm_arch_xscale;
 468
 469 /* Nonzero if tuning for XScale  */
 470 extern int arm_tune_xscale;
 471
 472 /* Nonzero if we want to tune for stores that access the write-buffer.
 473    This typically means an ARM6 or ARM7 with MMU or MPU.  */
 474 extern int arm_tune_wbuf;
 475
 476 /* Nonzero if tuning for Cortex-A9.  */
 477 extern int arm_tune_cortex_a9;
 478
 479 /* Nonzero if we should define __THUMB_INTERWORK__ in the
 480    preprocessor.
 481    XXX This is a bit of a hack, it's intended to help work around
 482    problems in GLD which doesn't understand that armv5t code is
 483    interworking clean.  */
 484 extern int arm_cpp_interwork;
 485
 486 /* Nonzero if chip supports Thumb 1.  */
 487 extern int arm_arch_thumb1;
 488
 489 /* Nonzero if chip supports Thumb 2.  */
 490 extern int arm_arch_thumb2;
 491
 492 /* Nonzero if chip supports integer division instruction.  */
 493 extern int arm_arch_arm_hwdiv;
 494 extern int arm_arch_thumb_hwdiv;
 495
 496 /* Nonzero if chip disallows volatile memory access in IT block.  */
 497 extern int arm_arch_no_volatile_ce;
 498
 499 /* Structure defining the current overall architectural target and tuning.  */
 500 struct arm_build_target
 501 {
 502   /* Name of the target CPU, if known, or NULL if the target CPU was not
 503      specified by the user (and inferred from the -march option).  */
 504   const char *core_name;
 505   /* Name of the target ARCH.  NULL if there is a selected CPU.  */
 506   const char *arch_name;
 507   /* Preprocessor substring (never NULL).  */
 508   const char *arch_pp_name;
 509   /* The base architecture value.  */
 510   enum base_architecture base_arch;
 511   /* The profile letter for the architecture, upper case by convention.  */
 512   char profile;
 513   /* Bitmap encapsulating the isa_bits for the target environment.  */
 514   sbitmap isa;
 515   /* Flags used for tuning.  Long term, these move into tune_params.  */
 516   unsigned int tune_flags;
 517   /* Tables with more detailed tuning information.  */
 518   const struct tune_params *tune;
 519   /* CPU identifier for the tuning target.  */
 520   enum processor_type tune_core;
 521 };
 522
 523 extern struct arm_build_target arm_active_target;
 524
 525 /* Table entry for a CPU alias.  */
 526 struct cpu_alias
 527 {
 528   /* The alias name.  */
 529   const char *const name;
 530   /* True if the name should be displayed in help text listing cpu names.  */
 531   bool visible;
 532 };
 533
 534 /* Table entry for an architectural feature extension.  */
 535 struct cpu_arch_extension
 536 {
 537   /* Feature name.  */
 538   const char *const name;
 539   /* True if the option is negative (removes extensions).  */
 540   bool remove;
 541   /* True if the option is an alias for another option with identical effect;
 542      the option will be ignored for canonicalization.  */
 543   bool alias;
 544   /* The modifier bits.  */
 545   const enum isa_feature isa_bits[isa_num_bits];
 546 };
 547
 548 /* Common elements of both CPU and architectural options.  */
 549 struct cpu_arch_option
 550 {
 551   /* Name for this option.  */
 552   const char *name;
 553   /* List of feature extensions permitted.  */
 554   const struct cpu_arch_extension *extensions;
 555   /* Standard feature bits.  */
 556   enum isa_feature isa_bits[isa_num_bits];
 557 };
 558
 559 /* Table entry for an architecture entry.  */
 560 struct arch_option
 561 {
 562   /* Common option fields.  */
 563   cpu_arch_option common;
 564   /* Short string for this architecture.  */
 565   const char *arch;
 566   /* Base architecture, from which this specific architecture is derived.  */
 567   enum base_architecture base_arch;
 568   /* The profile letter for the architecture, upper case by convention.  */
 569   const char profile;
 570   /* Default tune target (in the absence of any more specific data).  */
 571   enum processor_type tune_id;
 572 };
 573
 574 /* Table entry for a CPU entry.  */
 575 struct cpu_option
 576 {
 577   /* Common option fields.  */
 578   cpu_arch_option common;
 579   /* List of aliases for this CPU.  */
 580   const struct cpu_alias *aliases;
 581   /* Architecture upon which this CPU is based.  */
 582   enum arch_type arch;
 583 };
 584
 585 extern const arch_option all_architectures[];
 586 extern const cpu_option all_cores[];
 587
 588
 589 const cpu_option *arm_parse_cpu_option_name (const cpu_option *, const char *,
 590                                              const char *, bool = true);
 591 const arch_option *arm_parse_arch_option_name (const arch_option *,
 592                                                const char *, const char *, bool = true);
 593 void arm_parse_option_features (sbitmap, const cpu_arch_option *,
 594                                 const char *);
 595
 596 void arm_initialize_isa (sbitmap, const enum isa_feature *);
 597
 598 const char * arm_gen_far_branch (rtx *, int, const char * , const char *);
 599
 600 bool arm_mve_immediate_check(rtx, machine_mode, bool);
 601 #endif /* ! GCC_ARM_PROTOS_H */