1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
42 #include "basic-block.h"
47 #include "stringpool.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "langhooks.h"
62 struct target_rtl default_target_rtl
;
64 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
67 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
69 /* Commonly used modes. */
71 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
72 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
73 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
74 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
76 /* Datastructures maintained for currently processed function in RTL form. */
78 struct rtl_data x_rtl
;
80 /* Indexed by pseudo register number, gives the rtx for that pseudo.
81 Allocated in parallel with regno_pointer_align.
82 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
83 with length attribute nested in top level structures. */
87 /* This is *not* reset after each function. It gives each CODE_LABEL
88 in the entire compilation a unique label number. */
90 static GTY(()) int label_num
= 1;
92 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
93 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
94 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
95 is set only for MODE_INT and MODE_VECTOR_INT modes. */
97 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
101 REAL_VALUE_TYPE dconst0
;
102 REAL_VALUE_TYPE dconst1
;
103 REAL_VALUE_TYPE dconst2
;
104 REAL_VALUE_TYPE dconstm1
;
105 REAL_VALUE_TYPE dconsthalf
;
107 /* Record fixed-point constant 0 and 1. */
108 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
109 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
111 /* We make one copy of (const_int C) where C is in
112 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
113 to save space during the compilation and simplify comparisons of
116 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
118 /* Standard pieces of rtx, to be substituted directly into things. */
121 rtx simple_return_rtx
;
124 /* A hash table storing CONST_INTs whose absolute value is greater
125 than MAX_SAVED_CONST_INT. */
127 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
128 htab_t const_int_htab
;
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
131 htab_t const_wide_int_htab
;
133 /* A hash table storing register attribute structures. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
135 htab_t reg_attrs_htab
;
137 /* A hash table storing all CONST_DOUBLEs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
139 htab_t const_double_htab
;
141 /* A hash table storing all CONST_FIXEDs. */
142 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
143 htab_t const_fixed_htab
;
145 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
146 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
147 #define first_label_num (crtl->emit.x_first_label_num)
149 static void set_used_decls (tree
);
150 static void mark_label_nuses (rtx
);
151 static hashval_t
const_int_htab_hash (const void *);
152 static int const_int_htab_eq (const void *, const void *);
153 #if TARGET_SUPPORTS_WIDE_INT
154 static hashval_t
const_wide_int_htab_hash (const void *);
155 static int const_wide_int_htab_eq (const void *, const void *);
156 static rtx
lookup_const_wide_int (rtx
);
158 static hashval_t
const_double_htab_hash (const void *);
159 static int const_double_htab_eq (const void *, const void *);
160 static rtx
lookup_const_double (rtx
);
161 static hashval_t
const_fixed_htab_hash (const void *);
162 static int const_fixed_htab_eq (const void *, const void *);
163 static rtx
lookup_const_fixed (rtx
);
164 static hashval_t
reg_attrs_htab_hash (const void *);
165 static int reg_attrs_htab_eq (const void *, const void *);
166 static reg_attrs
*get_reg_attrs (tree
, int);
167 static rtx
gen_const_vector (enum machine_mode
, int);
168 static void copy_rtx_if_shared_1 (rtx
*orig
);
170 /* Probability of the conditional branch currently proceeded by try_split.
171 Set to -1 otherwise. */
172 int split_branch_probability
= -1;
174 /* Returns a hash code for X (which is a really a CONST_INT). */
177 const_int_htab_hash (const void *x
)
179 return (hashval_t
) INTVAL ((const_rtx
) x
);
182 /* Returns nonzero if the value represented by X (which is really a
183 CONST_INT) is the same as that given by Y (which is really a
187 const_int_htab_eq (const void *x
, const void *y
)
189 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
192 #if TARGET_SUPPORTS_WIDE_INT
193 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
196 const_wide_int_htab_hash (const void *x
)
199 HOST_WIDE_INT hash
= 0;
200 const_rtx xr
= (const_rtx
) x
;
202 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
203 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
205 return (hashval_t
) hash
;
208 /* Returns nonzero if the value represented by X (which is really a
209 CONST_WIDE_INT) is the same as that given by Y (which is really a
213 const_wide_int_htab_eq (const void *x
, const void *y
)
216 const_rtx xr
= (const_rtx
) x
;
217 const_rtx yr
= (const_rtx
) y
;
218 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
221 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
222 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
229 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
231 const_double_htab_hash (const void *x
)
233 const_rtx
const value
= (const_rtx
) x
;
236 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
237 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
240 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
241 /* MODE is used in the comparison, so it should be in the hash. */
242 h
^= GET_MODE (value
);
247 /* Returns nonzero if the value represented by X (really a ...)
248 is the same as that represented by Y (really a ...) */
250 const_double_htab_eq (const void *x
, const void *y
)
252 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
254 if (GET_MODE (a
) != GET_MODE (b
))
256 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
257 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
258 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
260 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
261 CONST_DOUBLE_REAL_VALUE (b
));
264 /* Returns a hash code for X (which is really a CONST_FIXED). */
267 const_fixed_htab_hash (const void *x
)
269 const_rtx
const value
= (const_rtx
) x
;
272 h
= fixed_hash (CONST_FIXED_VALUE (value
));
273 /* MODE is used in the comparison, so it should be in the hash. */
274 h
^= GET_MODE (value
);
278 /* Returns nonzero if the value represented by X (really a ...)
279 is the same as that represented by Y (really a ...). */
282 const_fixed_htab_eq (const void *x
, const void *y
)
284 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
286 if (GET_MODE (a
) != GET_MODE (b
))
288 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
291 /* Return true if the given memory attributes are equal. */
294 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
296 return (p
->alias
== q
->alias
297 && p
->offset_known_p
== q
->offset_known_p
298 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
299 && p
->size_known_p
== q
->size_known_p
300 && (!p
->size_known_p
|| p
->size
== q
->size
)
301 && p
->align
== q
->align
302 && p
->addrspace
== q
->addrspace
303 && (p
->expr
== q
->expr
304 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
305 && operand_equal_p (p
->expr
, q
->expr
, 0))));
308 /* Set MEM's memory attributes so that they are the same as ATTRS. */
311 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
313 /* If everything is the default, we can just clear the attributes. */
314 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
321 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
323 MEM_ATTRS (mem
) = ggc_alloc
<mem_attrs
> ();
324 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
328 /* Returns a hash code for X (which is a really a reg_attrs *). */
331 reg_attrs_htab_hash (const void *x
)
333 const reg_attrs
*const p
= (const reg_attrs
*) x
;
335 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
338 /* Returns nonzero if the value represented by X (which is really a
339 reg_attrs *) is the same as that given by Y (which is also really a
343 reg_attrs_htab_eq (const void *x
, const void *y
)
345 const reg_attrs
*const p
= (const reg_attrs
*) x
;
346 const reg_attrs
*const q
= (const reg_attrs
*) y
;
348 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
350 /* Allocate a new reg_attrs structure and insert it into the hash table if
351 one identical to it is not already in the table. We are doing this for
355 get_reg_attrs (tree decl
, int offset
)
360 /* If everything is the default, we can just return zero. */
361 if (decl
== 0 && offset
== 0)
365 attrs
.offset
= offset
;
367 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
370 *slot
= ggc_alloc
<reg_attrs
> ();
371 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
374 return (reg_attrs
*) *slot
;
379 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
380 and to block register equivalences to be seen across this insn. */
385 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
386 MEM_VOLATILE_P (x
) = true;
392 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
393 don't attempt to share with the various global pieces of rtl (such as
394 frame_pointer_rtx). */
397 gen_raw_REG (enum machine_mode mode
, int regno
)
399 rtx x
= gen_rtx_raw_REG (mode
, regno
);
400 ORIGINAL_REGNO (x
) = regno
;
404 /* There are some RTL codes that require special attention; the generation
405 functions do the raw handling. If you add to this list, modify
406 special_rtx in gengenrtl.c as well. */
409 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
413 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
414 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
416 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
417 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
418 return const_true_rtx
;
421 /* Look up the CONST_INT in the hash table. */
422 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
423 (hashval_t
) arg
, INSERT
);
425 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
431 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
433 return GEN_INT (trunc_int_for_mode (c
, mode
));
436 /* CONST_DOUBLEs might be created from pairs of integers, or from
437 REAL_VALUE_TYPEs. Also, their length is known only at run time,
438 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
440 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
441 hash table. If so, return its counterpart; otherwise add it
442 to the hash table and return it. */
444 lookup_const_double (rtx real
)
446 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
453 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
454 VALUE in mode MODE. */
456 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
458 rtx real
= rtx_alloc (CONST_DOUBLE
);
459 PUT_MODE (real
, mode
);
463 return lookup_const_double (real
);
466 /* Determine whether FIXED, a CONST_FIXED, already exists in the
467 hash table. If so, return its counterpart; otherwise add it
468 to the hash table and return it. */
471 lookup_const_fixed (rtx fixed
)
473 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
480 /* Return a CONST_FIXED rtx for a fixed-point value specified by
481 VALUE in mode MODE. */
484 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
486 rtx fixed
= rtx_alloc (CONST_FIXED
);
487 PUT_MODE (fixed
, mode
);
491 return lookup_const_fixed (fixed
);
494 #if TARGET_SUPPORTS_WIDE_INT == 0
495 /* Constructs double_int from rtx CST. */
498 rtx_to_double_int (const_rtx cst
)
502 if (CONST_INT_P (cst
))
503 r
= double_int::from_shwi (INTVAL (cst
));
504 else if (CONST_DOUBLE_AS_INT_P (cst
))
506 r
.low
= CONST_DOUBLE_LOW (cst
);
507 r
.high
= CONST_DOUBLE_HIGH (cst
);
516 #if TARGET_SUPPORTS_WIDE_INT
517 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
518 If so, return its counterpart; otherwise add it to the hash table and
522 lookup_const_wide_int (rtx wint
)
524 void **slot
= htab_find_slot (const_wide_int_htab
, wint
, INSERT
);
532 /* Return an rtx constant for V, given that the constant has mode MODE.
533 The returned rtx will be a CONST_INT if V fits, otherwise it will be
534 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
535 (if TARGET_SUPPORTS_WIDE_INT). */
538 immed_wide_int_const (const wide_int_ref
&v
, enum machine_mode mode
)
540 unsigned int len
= v
.get_len ();
541 unsigned int prec
= GET_MODE_PRECISION (mode
);
543 /* Allow truncation but not extension since we do not know if the
544 number is signed or unsigned. */
545 gcc_assert (prec
<= v
.get_precision ());
547 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
548 return gen_int_mode (v
.elt (0), mode
);
550 #if TARGET_SUPPORTS_WIDE_INT
554 unsigned int blocks_needed
555 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
557 if (len
> blocks_needed
)
560 value
= const_wide_int_alloc (len
);
562 /* It is so tempting to just put the mode in here. Must control
564 PUT_MODE (value
, VOIDmode
);
565 CWI_PUT_NUM_ELEM (value
, len
);
567 for (i
= 0; i
< len
; i
++)
568 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
570 return lookup_const_wide_int (value
);
573 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
577 #if TARGET_SUPPORTS_WIDE_INT == 0
578 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
579 of ints: I0 is the low-order word and I1 is the high-order word.
580 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
581 implied upper bits are copies of the high bit of i1. The value
582 itself is neither signed nor unsigned. Do not use this routine for
583 non-integer modes; convert to REAL_VALUE_TYPE and use
584 CONST_DOUBLE_FROM_REAL_VALUE. */
587 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
592 /* There are the following cases (note that there are no modes with
593 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
595 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
597 2) If the value of the integer fits into HOST_WIDE_INT anyway
598 (i.e., i1 consists only from copies of the sign bit, and sign
599 of i0 and i1 are the same), then we return a CONST_INT for i0.
600 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
601 if (mode
!= VOIDmode
)
603 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
604 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
605 /* We can get a 0 for an error mark. */
606 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
607 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
609 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
610 return gen_int_mode (i0
, mode
);
613 /* If this integer fits in one word, return a CONST_INT. */
614 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
617 /* We use VOIDmode for integers. */
618 value
= rtx_alloc (CONST_DOUBLE
);
619 PUT_MODE (value
, VOIDmode
);
621 CONST_DOUBLE_LOW (value
) = i0
;
622 CONST_DOUBLE_HIGH (value
) = i1
;
624 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
625 XWINT (value
, i
) = 0;
627 return lookup_const_double (value
);
632 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
634 /* In case the MD file explicitly references the frame pointer, have
635 all such references point to the same frame pointer. This is
636 used during frame pointer elimination to distinguish the explicit
637 references to these registers from pseudos that happened to be
640 If we have eliminated the frame pointer or arg pointer, we will
641 be using it as a normal register, for example as a spill
642 register. In such cases, we might be accessing it in a mode that
643 is not Pmode and therefore cannot use the pre-allocated rtx.
645 Also don't do this when we are making new REGs in reload, since
646 we don't want to get confused with the real pointers. */
648 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
650 if (regno
== FRAME_POINTER_REGNUM
651 && (!reload_completed
|| frame_pointer_needed
))
652 return frame_pointer_rtx
;
653 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
654 if (regno
== HARD_FRAME_POINTER_REGNUM
655 && (!reload_completed
|| frame_pointer_needed
))
656 return hard_frame_pointer_rtx
;
658 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
659 if (regno
== ARG_POINTER_REGNUM
)
660 return arg_pointer_rtx
;
662 #ifdef RETURN_ADDRESS_POINTER_REGNUM
663 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
664 return return_address_pointer_rtx
;
666 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
667 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
668 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
669 return pic_offset_table_rtx
;
670 if (regno
== STACK_POINTER_REGNUM
)
671 return stack_pointer_rtx
;
675 /* If the per-function register table has been set up, try to re-use
676 an existing entry in that table to avoid useless generation of RTL.
678 This code is disabled for now until we can fix the various backends
679 which depend on having non-shared hard registers in some cases. Long
680 term we want to re-enable this code as it can significantly cut down
681 on the amount of useless RTL that gets generated.
683 We'll also need to fix some code that runs after reload that wants to
684 set ORIGINAL_REGNO. */
689 && regno
< FIRST_PSEUDO_REGISTER
690 && reg_raw_mode
[regno
] == mode
)
691 return regno_reg_rtx
[regno
];
694 return gen_raw_REG (mode
, regno
);
698 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
700 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
702 /* This field is not cleared by the mere allocation of the rtx, so
709 /* Generate a memory referring to non-trapping constant memory. */
712 gen_const_mem (enum machine_mode mode
, rtx addr
)
714 rtx mem
= gen_rtx_MEM (mode
, addr
);
715 MEM_READONLY_P (mem
) = 1;
716 MEM_NOTRAP_P (mem
) = 1;
720 /* Generate a MEM referring to fixed portions of the frame, e.g., register
724 gen_frame_mem (enum machine_mode mode
, rtx addr
)
726 rtx mem
= gen_rtx_MEM (mode
, addr
);
727 MEM_NOTRAP_P (mem
) = 1;
728 set_mem_alias_set (mem
, get_frame_alias_set ());
732 /* Generate a MEM referring to a temporary use of the stack, not part
733 of the fixed stack frame. For example, something which is pushed
734 by a target splitter. */
736 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
738 rtx mem
= gen_rtx_MEM (mode
, addr
);
739 MEM_NOTRAP_P (mem
) = 1;
740 if (!cfun
->calls_alloca
)
741 set_mem_alias_set (mem
, get_frame_alias_set ());
745 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
746 this construct would be valid, and false otherwise. */
749 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
750 const_rtx reg
, unsigned int offset
)
752 unsigned int isize
= GET_MODE_SIZE (imode
);
753 unsigned int osize
= GET_MODE_SIZE (omode
);
755 /* All subregs must be aligned. */
756 if (offset
% osize
!= 0)
759 /* The subreg offset cannot be outside the inner object. */
763 /* ??? This should not be here. Temporarily continue to allow word_mode
764 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
765 Generally, backends are doing something sketchy but it'll take time to
767 if (omode
== word_mode
)
769 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
770 is the culprit here, and not the backends. */
771 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
773 /* Allow component subregs of complex and vector. Though given the below
774 extraction rules, it's not always clear what that means. */
775 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
776 && GET_MODE_INNER (imode
) == omode
)
778 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
779 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
780 represent this. It's questionable if this ought to be represented at
781 all -- why can't this all be hidden in post-reload splitters that make
782 arbitrarily mode changes to the registers themselves. */
783 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
785 /* Subregs involving floating point modes are not allowed to
786 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
787 (subreg:SI (reg:DF) 0) isn't. */
788 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
790 if (! (isize
== osize
791 /* LRA can use subreg to store a floating point value in
792 an integer mode. Although the floating point and the
793 integer modes need the same number of hard registers,
794 the size of floating point mode can be less than the
795 integer mode. LRA also uses subregs for a register
796 should be used in different mode in on insn. */
801 /* Paradoxical subregs must have offset zero. */
805 /* This is a normal subreg. Verify that the offset is representable. */
807 /* For hard registers, we already have most of these rules collected in
808 subreg_offset_representable_p. */
809 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
811 unsigned int regno
= REGNO (reg
);
813 #ifdef CANNOT_CHANGE_MODE_CLASS
814 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
815 && GET_MODE_INNER (imode
) == omode
)
817 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
821 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
824 /* For pseudo registers, we want most of the same checks. Namely:
825 If the register no larger than a word, the subreg must be lowpart.
826 If the register is larger than a word, the subreg must be the lowpart
827 of a subword. A subreg does *not* perform arbitrary bit extraction.
828 Given that we've already checked mode/offset alignment, we only have
829 to check subword subregs here. */
830 if (osize
< UNITS_PER_WORD
831 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
833 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
834 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
835 if (offset
% UNITS_PER_WORD
!= low_off
)
842 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
844 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
845 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
848 /* Generate a SUBREG representing the least-significant part of REG if MODE
849 is smaller than mode of REG, otherwise paradoxical SUBREG. */
852 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
854 enum machine_mode inmode
;
856 inmode
= GET_MODE (reg
);
857 if (inmode
== VOIDmode
)
859 return gen_rtx_SUBREG (mode
, reg
,
860 subreg_lowpart_offset (mode
, inmode
));
864 gen_rtx_VAR_LOCATION (enum machine_mode mode
, tree decl
, rtx loc
,
865 enum var_init_status status
)
867 rtx x
= gen_rtx_fmt_te (VAR_LOCATION
, mode
, decl
, loc
);
868 PAT_VAR_LOCATION_STATUS (x
) = status
;
873 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
876 gen_rtvec (int n
, ...)
884 /* Don't allocate an empty rtvec... */
891 rt_val
= rtvec_alloc (n
);
893 for (i
= 0; i
< n
; i
++)
894 rt_val
->elem
[i
] = va_arg (p
, rtx
);
901 gen_rtvec_v (int n
, rtx
*argp
)
906 /* Don't allocate an empty rtvec... */
910 rt_val
= rtvec_alloc (n
);
912 for (i
= 0; i
< n
; i
++)
913 rt_val
->elem
[i
] = *argp
++;
918 /* Return the number of bytes between the start of an OUTER_MODE
919 in-memory value and the start of an INNER_MODE in-memory value,
920 given that the former is a lowpart of the latter. It may be a
921 paradoxical lowpart, in which case the offset will be negative
922 on big-endian targets. */
925 byte_lowpart_offset (enum machine_mode outer_mode
,
926 enum machine_mode inner_mode
)
928 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
929 return subreg_lowpart_offset (outer_mode
, inner_mode
);
931 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
934 /* Generate a REG rtx for a new pseudo register of mode MODE.
935 This pseudo is assigned the next sequential register number. */
938 gen_reg_rtx (enum machine_mode mode
)
941 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
943 gcc_assert (can_create_pseudo_p ());
945 /* If a virtual register with bigger mode alignment is generated,
946 increase stack alignment estimation because it might be spilled
948 if (SUPPORTS_STACK_ALIGNMENT
949 && crtl
->stack_alignment_estimated
< align
950 && !crtl
->stack_realign_processed
)
952 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
953 if (crtl
->stack_alignment_estimated
< min_align
)
954 crtl
->stack_alignment_estimated
= min_align
;
957 if (generating_concat_p
958 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
959 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
961 /* For complex modes, don't make a single pseudo.
962 Instead, make a CONCAT of two pseudos.
963 This allows noncontiguous allocation of the real and imaginary parts,
964 which makes much better code. Besides, allocating DCmode
965 pseudos overstrains reload on some machines like the 386. */
966 rtx realpart
, imagpart
;
967 enum machine_mode partmode
= GET_MODE_INNER (mode
);
969 realpart
= gen_reg_rtx (partmode
);
970 imagpart
= gen_reg_rtx (partmode
);
971 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
974 /* Do not call gen_reg_rtx with uninitialized crtl. */
975 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
977 /* Make sure regno_pointer_align, and regno_reg_rtx are large
978 enough to have an element for this pseudo reg number. */
980 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
982 int old_size
= crtl
->emit
.regno_pointer_align_length
;
986 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
987 memset (tmp
+ old_size
, 0, old_size
);
988 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
990 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
991 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
992 regno_reg_rtx
= new1
;
994 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
997 val
= gen_raw_REG (mode
, reg_rtx_no
);
998 regno_reg_rtx
[reg_rtx_no
++] = val
;
1002 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1005 reg_is_parm_p (rtx reg
)
1009 gcc_assert (REG_P (reg
));
1010 decl
= REG_EXPR (reg
);
1011 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1014 /* Update NEW with the same attributes as REG, but with OFFSET added
1015 to the REG_OFFSET. */
1018 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1020 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1021 REG_OFFSET (reg
) + offset
);
1024 /* Generate a register with same attributes as REG, but with OFFSET
1025 added to the REG_OFFSET. */
1028 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
1031 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1033 update_reg_offset (new_rtx
, reg
, offset
);
1037 /* Generate a new pseudo-register with the same attributes as REG, but
1038 with OFFSET added to the REG_OFFSET. */
1041 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
1043 rtx new_rtx
= gen_reg_rtx (mode
);
1045 update_reg_offset (new_rtx
, reg
, offset
);
1049 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1050 new register is a (possibly paradoxical) lowpart of the old one. */
1053 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
1055 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1056 PUT_MODE (reg
, mode
);
1059 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1060 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1063 set_reg_attrs_from_value (rtx reg
, rtx x
)
1066 bool can_be_reg_pointer
= true;
1068 /* Don't call mark_reg_pointer for incompatible pointer sign
1070 while (GET_CODE (x
) == SIGN_EXTEND
1071 || GET_CODE (x
) == ZERO_EXTEND
1072 || GET_CODE (x
) == TRUNCATE
1073 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1075 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1076 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1077 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1078 can_be_reg_pointer
= false;
1083 /* Hard registers can be reused for multiple purposes within the same
1084 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1085 on them is wrong. */
1086 if (HARD_REGISTER_P (reg
))
1089 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1092 if (MEM_OFFSET_KNOWN_P (x
))
1093 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1094 MEM_OFFSET (x
) + offset
);
1095 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1096 mark_reg_pointer (reg
, 0);
1101 update_reg_offset (reg
, x
, offset
);
1102 if (can_be_reg_pointer
&& REG_POINTER (x
))
1103 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1107 /* Generate a REG rtx for a new pseudo register, copying the mode
1108 and attributes from X. */
1111 gen_reg_rtx_and_attrs (rtx x
)
1113 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1114 set_reg_attrs_from_value (reg
, x
);
1118 /* Set the register attributes for registers contained in PARM_RTX.
1119 Use needed values from memory attributes of MEM. */
1122 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1124 if (REG_P (parm_rtx
))
1125 set_reg_attrs_from_value (parm_rtx
, mem
);
1126 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1128 /* Check for a NULL entry in the first slot, used to indicate that the
1129 parameter goes both on the stack and in registers. */
1130 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1131 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1133 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1134 if (REG_P (XEXP (x
, 0)))
1135 REG_ATTRS (XEXP (x
, 0))
1136 = get_reg_attrs (MEM_EXPR (mem
),
1137 INTVAL (XEXP (x
, 1)));
1142 /* Set the REG_ATTRS for registers in value X, given that X represents
1146 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1148 if (GET_CODE (x
) == SUBREG
)
1150 gcc_assert (subreg_lowpart_p (x
));
1155 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1157 if (GET_CODE (x
) == CONCAT
)
1159 if (REG_P (XEXP (x
, 0)))
1160 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1161 if (REG_P (XEXP (x
, 1)))
1162 REG_ATTRS (XEXP (x
, 1))
1163 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1165 if (GET_CODE (x
) == PARALLEL
)
1169 /* Check for a NULL entry, used to indicate that the parameter goes
1170 both on the stack and in registers. */
1171 if (XEXP (XVECEXP (x
, 0, 0), 0))
1176 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1178 rtx y
= XVECEXP (x
, 0, i
);
1179 if (REG_P (XEXP (y
, 0)))
1180 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1185 /* Assign the RTX X to declaration T. */
1188 set_decl_rtl (tree t
, rtx x
)
1190 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1192 set_reg_attrs_for_decl_rtl (t
, x
);
1195 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1196 if the ABI requires the parameter to be passed by reference. */
1199 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1201 DECL_INCOMING_RTL (t
) = x
;
1202 if (x
&& !by_reference_p
)
1203 set_reg_attrs_for_decl_rtl (t
, x
);
1206 /* Identify REG (which may be a CONCAT) as a user register. */
1209 mark_user_reg (rtx reg
)
1211 if (GET_CODE (reg
) == CONCAT
)
1213 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1214 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1218 gcc_assert (REG_P (reg
));
1219 REG_USERVAR_P (reg
) = 1;
1223 /* Identify REG as a probable pointer register and show its alignment
1224 as ALIGN, if nonzero. */
1227 mark_reg_pointer (rtx reg
, int align
)
1229 if (! REG_POINTER (reg
))
1231 REG_POINTER (reg
) = 1;
1234 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1236 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1237 /* We can no-longer be sure just how aligned this pointer is. */
1238 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1241 /* Return 1 plus largest pseudo reg number used in the current function. */
1249 /* Return 1 + the largest label number used so far in the current function. */
1252 max_label_num (void)
1257 /* Return first label number used in this function (if any were used). */
1260 get_first_label_num (void)
1262 return first_label_num
;
1265 /* If the rtx for label was created during the expansion of a nested
1266 function, then first_label_num won't include this label number.
1267 Fix this now so that array indices work later. */
1270 maybe_set_first_label_num (rtx x
)
1272 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1273 first_label_num
= CODE_LABEL_NUMBER (x
);
1276 /* Return a value representing some low-order bits of X, where the number
1277 of low-order bits is given by MODE. Note that no conversion is done
1278 between floating-point and fixed-point values, rather, the bit
1279 representation is returned.
1281 This function handles the cases in common between gen_lowpart, below,
1282 and two variants in cse.c and combine.c. These are the cases that can
1283 be safely handled at all points in the compilation.
1285 If this is not a case we can handle, return 0. */
1288 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1290 int msize
= GET_MODE_SIZE (mode
);
1293 enum machine_mode innermode
;
1295 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1296 so we have to make one up. Yuk. */
1297 innermode
= GET_MODE (x
);
1299 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1300 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1301 else if (innermode
== VOIDmode
)
1302 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1304 xsize
= GET_MODE_SIZE (innermode
);
1306 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1308 if (innermode
== mode
)
1311 /* MODE must occupy no more words than the mode of X. */
1312 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1313 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1316 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1317 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1320 offset
= subreg_lowpart_offset (mode
, innermode
);
1322 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1323 && (GET_MODE_CLASS (mode
) == MODE_INT
1324 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1326 /* If we are getting the low-order part of something that has been
1327 sign- or zero-extended, we can either just use the object being
1328 extended or make a narrower extension. If we want an even smaller
1329 piece than the size of the object being extended, call ourselves
1332 This case is used mostly by combine and cse. */
1334 if (GET_MODE (XEXP (x
, 0)) == mode
)
1336 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1337 return gen_lowpart_common (mode
, XEXP (x
, 0));
1338 else if (msize
< xsize
)
1339 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1341 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1342 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1343 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1344 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1346 /* Otherwise, we can't do this. */
1351 gen_highpart (enum machine_mode mode
, rtx x
)
1353 unsigned int msize
= GET_MODE_SIZE (mode
);
1356 /* This case loses if X is a subreg. To catch bugs early,
1357 complain if an invalid MODE is used even in other cases. */
1358 gcc_assert (msize
<= UNITS_PER_WORD
1359 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1361 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1362 subreg_highpart_offset (mode
, GET_MODE (x
)));
1363 gcc_assert (result
);
1365 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1366 the target if we have a MEM. gen_highpart must return a valid operand,
1367 emitting code if necessary to do so. */
1370 result
= validize_mem (result
);
1371 gcc_assert (result
);
1377 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1378 be VOIDmode constant. */
1380 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1382 if (GET_MODE (exp
) != VOIDmode
)
1384 gcc_assert (GET_MODE (exp
) == innermode
);
1385 return gen_highpart (outermode
, exp
);
1387 return simplify_gen_subreg (outermode
, exp
, innermode
,
1388 subreg_highpart_offset (outermode
, innermode
));
1391 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1394 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1396 unsigned int offset
= 0;
1397 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1401 if (WORDS_BIG_ENDIAN
)
1402 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1403 if (BYTES_BIG_ENDIAN
)
1404 offset
+= difference
% UNITS_PER_WORD
;
1410 /* Return offset in bytes to get OUTERMODE high part
1411 of the value in mode INNERMODE stored in memory in target format. */
1413 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1415 unsigned int offset
= 0;
1416 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1418 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1422 if (! WORDS_BIG_ENDIAN
)
1423 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1424 if (! BYTES_BIG_ENDIAN
)
1425 offset
+= difference
% UNITS_PER_WORD
;
1431 /* Return 1 iff X, assumed to be a SUBREG,
1432 refers to the least significant part of its containing reg.
1433 If X is not a SUBREG, always return 1 (it is its own low part!). */
1436 subreg_lowpart_p (const_rtx x
)
1438 if (GET_CODE (x
) != SUBREG
)
1440 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1443 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1444 == SUBREG_BYTE (x
));
1447 /* Return true if X is a paradoxical subreg, false otherwise. */
1449 paradoxical_subreg_p (const_rtx x
)
1451 if (GET_CODE (x
) != SUBREG
)
1453 return (GET_MODE_PRECISION (GET_MODE (x
))
1454 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1457 /* Return subword OFFSET of operand OP.
1458 The word number, OFFSET, is interpreted as the word number starting
1459 at the low-order address. OFFSET 0 is the low-order word if not
1460 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1462 If we cannot extract the required word, we return zero. Otherwise,
1463 an rtx corresponding to the requested word will be returned.
1465 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1466 reload has completed, a valid address will always be returned. After
1467 reload, if a valid address cannot be returned, we return zero.
1469 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1470 it is the responsibility of the caller.
1472 MODE is the mode of OP in case it is a CONST_INT.
1474 ??? This is still rather broken for some cases. The problem for the
1475 moment is that all callers of this thing provide no 'goal mode' to
1476 tell us to work with. This exists because all callers were written
1477 in a word based SUBREG world.
1478 Now use of this function can be deprecated by simplify_subreg in most
1483 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1485 if (mode
== VOIDmode
)
1486 mode
= GET_MODE (op
);
1488 gcc_assert (mode
!= VOIDmode
);
1490 /* If OP is narrower than a word, fail. */
1492 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1495 /* If we want a word outside OP, return zero. */
1497 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1500 /* Form a new MEM at the requested address. */
1503 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1505 if (! validate_address
)
1508 else if (reload_completed
)
1510 if (! strict_memory_address_addr_space_p (word_mode
,
1512 MEM_ADDR_SPACE (op
)))
1516 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1519 /* Rest can be handled by simplify_subreg. */
1520 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1523 /* Similar to `operand_subword', but never return 0. If we can't
1524 extract the required subword, put OP into a register and try again.
1525 The second attempt must succeed. We always validate the address in
1528 MODE is the mode of OP, in case it is CONST_INT. */
1531 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1533 rtx result
= operand_subword (op
, offset
, 1, mode
);
1538 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1540 /* If this is a register which can not be accessed by words, copy it
1541 to a pseudo register. */
1543 op
= copy_to_reg (op
);
1545 op
= force_reg (mode
, op
);
1548 result
= operand_subword (op
, offset
, 1, mode
);
1549 gcc_assert (result
);
1554 /* Returns 1 if both MEM_EXPR can be considered equal
1558 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1563 if (! expr1
|| ! expr2
)
1566 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1569 return operand_equal_p (expr1
, expr2
, 0);
1572 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1573 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1577 get_mem_align_offset (rtx mem
, unsigned int align
)
1580 unsigned HOST_WIDE_INT offset
;
1582 /* This function can't use
1583 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1584 || (MAX (MEM_ALIGN (mem),
1585 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1589 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1591 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1592 for <variable>. get_inner_reference doesn't handle it and
1593 even if it did, the alignment in that case needs to be determined
1594 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1595 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1596 isn't sufficiently aligned, the object it is in might be. */
1597 gcc_assert (MEM_P (mem
));
1598 expr
= MEM_EXPR (mem
);
1599 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1602 offset
= MEM_OFFSET (mem
);
1605 if (DECL_ALIGN (expr
) < align
)
1608 else if (INDIRECT_REF_P (expr
))
1610 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1613 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1617 tree inner
= TREE_OPERAND (expr
, 0);
1618 tree field
= TREE_OPERAND (expr
, 1);
1619 tree byte_offset
= component_ref_field_offset (expr
);
1620 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1623 || !tree_fits_uhwi_p (byte_offset
)
1624 || !tree_fits_uhwi_p (bit_offset
))
1627 offset
+= tree_to_uhwi (byte_offset
);
1628 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1630 if (inner
== NULL_TREE
)
1632 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1633 < (unsigned int) align
)
1637 else if (DECL_P (inner
))
1639 if (DECL_ALIGN (inner
) < align
)
1643 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1651 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1654 /* Given REF (a MEM) and T, either the type of X or the expression
1655 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1656 if we are making a new object of this type. BITPOS is nonzero if
1657 there is an offset outstanding on T that will be applied later. */
1660 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1661 HOST_WIDE_INT bitpos
)
1663 HOST_WIDE_INT apply_bitpos
= 0;
1665 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1668 /* It can happen that type_for_mode was given a mode for which there
1669 is no language-level type. In which case it returns NULL, which
1674 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1675 if (type
== error_mark_node
)
1678 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1679 wrong answer, as it assumes that DECL_RTL already has the right alias
1680 info. Callers should not set DECL_RTL until after the call to
1681 set_mem_attributes. */
1682 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1684 memset (&attrs
, 0, sizeof (attrs
));
1686 /* Get the alias set from the expression or type (perhaps using a
1687 front-end routine) and use it. */
1688 attrs
.alias
= get_alias_set (t
);
1690 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1691 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1693 /* Default values from pre-existing memory attributes if present. */
1694 refattrs
= MEM_ATTRS (ref
);
1697 /* ??? Can this ever happen? Calling this routine on a MEM that
1698 already carries memory attributes should probably be invalid. */
1699 attrs
.expr
= refattrs
->expr
;
1700 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1701 attrs
.offset
= refattrs
->offset
;
1702 attrs
.size_known_p
= refattrs
->size_known_p
;
1703 attrs
.size
= refattrs
->size
;
1704 attrs
.align
= refattrs
->align
;
1707 /* Otherwise, default values from the mode of the MEM reference. */
1710 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1711 gcc_assert (!defattrs
->expr
);
1712 gcc_assert (!defattrs
->offset_known_p
);
1714 /* Respect mode size. */
1715 attrs
.size_known_p
= defattrs
->size_known_p
;
1716 attrs
.size
= defattrs
->size
;
1717 /* ??? Is this really necessary? We probably should always get
1718 the size from the type below. */
1720 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1721 if T is an object, always compute the object alignment below. */
1723 attrs
.align
= defattrs
->align
;
1725 attrs
.align
= BITS_PER_UNIT
;
1726 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1727 e.g. if the type carries an alignment attribute. Should we be
1728 able to simply always use TYPE_ALIGN? */
1731 /* We can set the alignment from the type if we are making an object,
1732 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1733 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1734 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1736 /* If the size is known, we can set that. */
1737 tree new_size
= TYPE_SIZE_UNIT (type
);
1739 /* The address-space is that of the type. */
1740 as
= TYPE_ADDR_SPACE (type
);
1742 /* If T is not a type, we may be able to deduce some more information about
1748 if (TREE_THIS_VOLATILE (t
))
1749 MEM_VOLATILE_P (ref
) = 1;
1751 /* Now remove any conversions: they don't change what the underlying
1752 object is. Likewise for SAVE_EXPR. */
1753 while (CONVERT_EXPR_P (t
)
1754 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1755 || TREE_CODE (t
) == SAVE_EXPR
)
1756 t
= TREE_OPERAND (t
, 0);
1758 /* Note whether this expression can trap. */
1759 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1761 base
= get_base_address (t
);
1765 && TREE_READONLY (base
)
1766 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1767 && !TREE_THIS_VOLATILE (base
))
1768 MEM_READONLY_P (ref
) = 1;
1770 /* Mark static const strings readonly as well. */
1771 if (TREE_CODE (base
) == STRING_CST
1772 && TREE_READONLY (base
)
1773 && TREE_STATIC (base
))
1774 MEM_READONLY_P (ref
) = 1;
1776 /* Address-space information is on the base object. */
1777 if (TREE_CODE (base
) == MEM_REF
1778 || TREE_CODE (base
) == TARGET_MEM_REF
)
1779 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1782 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1785 /* If this expression uses it's parent's alias set, mark it such
1786 that we won't change it. */
1787 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1788 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1790 /* If this is a decl, set the attributes of the MEM from it. */
1794 attrs
.offset_known_p
= true;
1796 apply_bitpos
= bitpos
;
1797 new_size
= DECL_SIZE_UNIT (t
);
1800 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1801 else if (CONSTANT_CLASS_P (t
))
1804 /* If this is a field reference, record it. */
1805 else if (TREE_CODE (t
) == COMPONENT_REF
)
1808 attrs
.offset_known_p
= true;
1810 apply_bitpos
= bitpos
;
1811 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1812 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1815 /* If this is an array reference, look for an outer field reference. */
1816 else if (TREE_CODE (t
) == ARRAY_REF
)
1818 tree off_tree
= size_zero_node
;
1819 /* We can't modify t, because we use it at the end of the
1825 tree index
= TREE_OPERAND (t2
, 1);
1826 tree low_bound
= array_ref_low_bound (t2
);
1827 tree unit_size
= array_ref_element_size (t2
);
1829 /* We assume all arrays have sizes that are a multiple of a byte.
1830 First subtract the lower bound, if any, in the type of the
1831 index, then convert to sizetype and multiply by the size of
1832 the array element. */
1833 if (! integer_zerop (low_bound
))
1834 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1837 off_tree
= size_binop (PLUS_EXPR
,
1838 size_binop (MULT_EXPR
,
1839 fold_convert (sizetype
,
1843 t2
= TREE_OPERAND (t2
, 0);
1845 while (TREE_CODE (t2
) == ARRAY_REF
);
1848 || TREE_CODE (t2
) == COMPONENT_REF
)
1851 attrs
.offset_known_p
= false;
1852 if (tree_fits_uhwi_p (off_tree
))
1854 attrs
.offset_known_p
= true;
1855 attrs
.offset
= tree_to_uhwi (off_tree
);
1856 apply_bitpos
= bitpos
;
1859 /* Else do not record a MEM_EXPR. */
1862 /* If this is an indirect reference, record it. */
1863 else if (TREE_CODE (t
) == MEM_REF
1864 || TREE_CODE (t
) == TARGET_MEM_REF
)
1867 attrs
.offset_known_p
= true;
1869 apply_bitpos
= bitpos
;
1872 /* Compute the alignment. */
1873 unsigned int obj_align
;
1874 unsigned HOST_WIDE_INT obj_bitpos
;
1875 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1876 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1877 if (obj_bitpos
!= 0)
1878 obj_align
= (obj_bitpos
& -obj_bitpos
);
1879 attrs
.align
= MAX (attrs
.align
, obj_align
);
1882 if (tree_fits_uhwi_p (new_size
))
1884 attrs
.size_known_p
= true;
1885 attrs
.size
= tree_to_uhwi (new_size
);
1888 /* If we modified OFFSET based on T, then subtract the outstanding
1889 bit position offset. Similarly, increase the size of the accessed
1890 object to contain the negative offset. */
1893 gcc_assert (attrs
.offset_known_p
);
1894 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1895 if (attrs
.size_known_p
)
1896 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1899 /* Now set the attributes we computed above. */
1900 attrs
.addrspace
= as
;
1901 set_mem_attrs (ref
, &attrs
);
1905 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1907 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1910 /* Set the alias set of MEM to SET. */
1913 set_mem_alias_set (rtx mem
, alias_set_type set
)
1915 struct mem_attrs attrs
;
1917 /* If the new and old alias sets don't conflict, something is wrong. */
1918 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1919 attrs
= *get_mem_attrs (mem
);
1921 set_mem_attrs (mem
, &attrs
);
1924 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1927 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1929 struct mem_attrs attrs
;
1931 attrs
= *get_mem_attrs (mem
);
1932 attrs
.addrspace
= addrspace
;
1933 set_mem_attrs (mem
, &attrs
);
1936 /* Set the alignment of MEM to ALIGN bits. */
1939 set_mem_align (rtx mem
, unsigned int align
)
1941 struct mem_attrs attrs
;
1943 attrs
= *get_mem_attrs (mem
);
1944 attrs
.align
= align
;
1945 set_mem_attrs (mem
, &attrs
);
1948 /* Set the expr for MEM to EXPR. */
1951 set_mem_expr (rtx mem
, tree expr
)
1953 struct mem_attrs attrs
;
1955 attrs
= *get_mem_attrs (mem
);
1957 set_mem_attrs (mem
, &attrs
);
1960 /* Set the offset of MEM to OFFSET. */
1963 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1965 struct mem_attrs attrs
;
1967 attrs
= *get_mem_attrs (mem
);
1968 attrs
.offset_known_p
= true;
1969 attrs
.offset
= offset
;
1970 set_mem_attrs (mem
, &attrs
);
1973 /* Clear the offset of MEM. */
1976 clear_mem_offset (rtx mem
)
1978 struct mem_attrs attrs
;
1980 attrs
= *get_mem_attrs (mem
);
1981 attrs
.offset_known_p
= false;
1982 set_mem_attrs (mem
, &attrs
);
1985 /* Set the size of MEM to SIZE. */
1988 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
1990 struct mem_attrs attrs
;
1992 attrs
= *get_mem_attrs (mem
);
1993 attrs
.size_known_p
= true;
1995 set_mem_attrs (mem
, &attrs
);
1998 /* Clear the size of MEM. */
2001 clear_mem_size (rtx mem
)
2003 struct mem_attrs attrs
;
2005 attrs
= *get_mem_attrs (mem
);
2006 attrs
.size_known_p
= false;
2007 set_mem_attrs (mem
, &attrs
);
2010 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2011 and its address changed to ADDR. (VOIDmode means don't change the mode.
2012 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2013 returned memory location is required to be valid. INPLACE is true if any
2014 changes can be made directly to MEMREF or false if MEMREF must be treated
2017 The memory attributes are not changed. */
2020 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
,
2026 gcc_assert (MEM_P (memref
));
2027 as
= MEM_ADDR_SPACE (memref
);
2028 if (mode
== VOIDmode
)
2029 mode
= GET_MODE (memref
);
2031 addr
= XEXP (memref
, 0);
2032 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2033 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2036 /* Don't validate address for LRA. LRA can make the address valid
2037 by itself in most efficient way. */
2038 if (validate
&& !lra_in_progress
)
2040 if (reload_in_progress
|| reload_completed
)
2041 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2043 addr
= memory_address_addr_space (mode
, addr
, as
);
2046 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2051 XEXP (memref
, 0) = addr
;
2055 new_rtx
= gen_rtx_MEM (mode
, addr
);
2056 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2060 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2061 way we are changing MEMREF, so we only preserve the alias set. */
2064 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
2066 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1, false);
2067 enum machine_mode mmode
= GET_MODE (new_rtx
);
2068 struct mem_attrs attrs
, *defattrs
;
2070 attrs
= *get_mem_attrs (memref
);
2071 defattrs
= mode_mem_attrs
[(int) mmode
];
2072 attrs
.expr
= NULL_TREE
;
2073 attrs
.offset_known_p
= false;
2074 attrs
.size_known_p
= defattrs
->size_known_p
;
2075 attrs
.size
= defattrs
->size
;
2076 attrs
.align
= defattrs
->align
;
2078 /* If there are no changes, just return the original memory reference. */
2079 if (new_rtx
== memref
)
2081 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2084 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2085 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2088 set_mem_attrs (new_rtx
, &attrs
);
2092 /* Return a memory reference like MEMREF, but with its mode changed
2093 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2094 nonzero, the memory address is forced to be valid.
2095 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2096 and the caller is responsible for adjusting MEMREF base register.
2097 If ADJUST_OBJECT is zero, the underlying object associated with the
2098 memory reference is left unchanged and the caller is responsible for
2099 dealing with it. Otherwise, if the new memory reference is outside
2100 the underlying object, even partially, then the object is dropped.
2101 SIZE, if nonzero, is the size of an access in cases where MODE
2102 has no inherent size. */
2105 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2106 int validate
, int adjust_address
, int adjust_object
,
2109 rtx addr
= XEXP (memref
, 0);
2111 enum machine_mode address_mode
;
2113 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2114 unsigned HOST_WIDE_INT max_align
;
2115 #ifdef POINTERS_EXTEND_UNSIGNED
2116 enum machine_mode pointer_mode
2117 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2120 /* VOIDmode means no mode change for change_address_1. */
2121 if (mode
== VOIDmode
)
2122 mode
= GET_MODE (memref
);
2124 /* Take the size of non-BLKmode accesses from the mode. */
2125 defattrs
= mode_mem_attrs
[(int) mode
];
2126 if (defattrs
->size_known_p
)
2127 size
= defattrs
->size
;
2129 /* If there are no changes, just return the original memory reference. */
2130 if (mode
== GET_MODE (memref
) && !offset
2131 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2132 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2136 /* ??? Prefer to create garbage instead of creating shared rtl.
2137 This may happen even if offset is nonzero -- consider
2138 (plus (plus reg reg) const_int) -- so do this always. */
2139 addr
= copy_rtx (addr
);
2141 /* Convert a possibly large offset to a signed value within the
2142 range of the target address space. */
2143 address_mode
= get_address_mode (memref
);
2144 pbits
= GET_MODE_BITSIZE (address_mode
);
2145 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2147 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2148 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2154 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2155 object, we can merge it into the LO_SUM. */
2156 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2158 && (unsigned HOST_WIDE_INT
) offset
2159 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2160 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2161 plus_constant (address_mode
,
2162 XEXP (addr
, 1), offset
));
2163 #ifdef POINTERS_EXTEND_UNSIGNED
2164 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2165 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2166 the fact that pointers are not allowed to overflow. */
2167 else if (POINTERS_EXTEND_UNSIGNED
> 0
2168 && GET_CODE (addr
) == ZERO_EXTEND
2169 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2170 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2171 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2172 plus_constant (pointer_mode
,
2173 XEXP (addr
, 0), offset
));
2176 addr
= plus_constant (address_mode
, addr
, offset
);
2179 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
, false);
2181 /* If the address is a REG, change_address_1 rightfully returns memref,
2182 but this would destroy memref's MEM_ATTRS. */
2183 if (new_rtx
== memref
&& offset
!= 0)
2184 new_rtx
= copy_rtx (new_rtx
);
2186 /* Conservatively drop the object if we don't know where we start from. */
2187 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2189 attrs
.expr
= NULL_TREE
;
2193 /* Compute the new values of the memory attributes due to this adjustment.
2194 We add the offsets and update the alignment. */
2195 if (attrs
.offset_known_p
)
2197 attrs
.offset
+= offset
;
2199 /* Drop the object if the new left end is not within its bounds. */
2200 if (adjust_object
&& attrs
.offset
< 0)
2202 attrs
.expr
= NULL_TREE
;
2207 /* Compute the new alignment by taking the MIN of the alignment and the
2208 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2212 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2213 attrs
.align
= MIN (attrs
.align
, max_align
);
2218 /* Drop the object if the new right end is not within its bounds. */
2219 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2221 attrs
.expr
= NULL_TREE
;
2224 attrs
.size_known_p
= true;
2227 else if (attrs
.size_known_p
)
2229 gcc_assert (!adjust_object
);
2230 attrs
.size
-= offset
;
2231 /* ??? The store_by_pieces machinery generates negative sizes,
2232 so don't assert for that here. */
2235 set_mem_attrs (new_rtx
, &attrs
);
2240 /* Return a memory reference like MEMREF, but with its mode changed
2241 to MODE and its address changed to ADDR, which is assumed to be
2242 MEMREF offset by OFFSET bytes. If VALIDATE is
2243 nonzero, the memory address is forced to be valid. */
2246 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2247 HOST_WIDE_INT offset
, int validate
)
2249 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
, false);
2250 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2253 /* Return a memory reference like MEMREF, but whose address is changed by
2254 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2255 known to be in OFFSET (possibly 1). */
2258 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2260 rtx new_rtx
, addr
= XEXP (memref
, 0);
2261 enum machine_mode address_mode
;
2262 struct mem_attrs attrs
, *defattrs
;
2264 attrs
= *get_mem_attrs (memref
);
2265 address_mode
= get_address_mode (memref
);
2266 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2268 /* At this point we don't know _why_ the address is invalid. It
2269 could have secondary memory references, multiplies or anything.
2271 However, if we did go and rearrange things, we can wind up not
2272 being able to recognize the magic around pic_offset_table_rtx.
2273 This stuff is fragile, and is yet another example of why it is
2274 bad to expose PIC machinery too early. */
2275 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2277 && GET_CODE (addr
) == PLUS
2278 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2280 addr
= force_reg (GET_MODE (addr
), addr
);
2281 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2284 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2285 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1, false);
2287 /* If there are no changes, just return the original memory reference. */
2288 if (new_rtx
== memref
)
2291 /* Update the alignment to reflect the offset. Reset the offset, which
2293 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2294 attrs
.offset_known_p
= false;
2295 attrs
.size_known_p
= defattrs
->size_known_p
;
2296 attrs
.size
= defattrs
->size
;
2297 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2298 set_mem_attrs (new_rtx
, &attrs
);
2302 /* Return a memory reference like MEMREF, but with its address changed to
2303 ADDR. The caller is asserting that the actual piece of memory pointed
2304 to is the same, just the form of the address is being changed, such as
2305 by putting something into a register. INPLACE is true if any changes
2306 can be made directly to MEMREF or false if MEMREF must be treated as
2310 replace_equiv_address (rtx memref
, rtx addr
, bool inplace
)
2312 /* change_address_1 copies the memory attribute structure without change
2313 and that's exactly what we want here. */
2314 update_temp_slot_address (XEXP (memref
, 0), addr
);
2315 return change_address_1 (memref
, VOIDmode
, addr
, 1, inplace
);
2318 /* Likewise, but the reference is not required to be valid. */
2321 replace_equiv_address_nv (rtx memref
, rtx addr
, bool inplace
)
2323 return change_address_1 (memref
, VOIDmode
, addr
, 0, inplace
);
2326 /* Return a memory reference like MEMREF, but with its mode widened to
2327 MODE and offset by OFFSET. This would be used by targets that e.g.
2328 cannot issue QImode memory operations and have to use SImode memory
2329 operations plus masking logic. */
2332 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2334 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2335 struct mem_attrs attrs
;
2336 unsigned int size
= GET_MODE_SIZE (mode
);
2338 /* If there are no changes, just return the original memory reference. */
2339 if (new_rtx
== memref
)
2342 attrs
= *get_mem_attrs (new_rtx
);
2344 /* If we don't know what offset we were at within the expression, then
2345 we can't know if we've overstepped the bounds. */
2346 if (! attrs
.offset_known_p
)
2347 attrs
.expr
= NULL_TREE
;
2351 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2353 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2354 tree offset
= component_ref_field_offset (attrs
.expr
);
2356 if (! DECL_SIZE_UNIT (field
))
2358 attrs
.expr
= NULL_TREE
;
2362 /* Is the field at least as large as the access? If so, ok,
2363 otherwise strip back to the containing structure. */
2364 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2365 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2366 && attrs
.offset
>= 0)
2369 if (! tree_fits_uhwi_p (offset
))
2371 attrs
.expr
= NULL_TREE
;
2375 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2376 attrs
.offset
+= tree_to_uhwi (offset
);
2377 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2380 /* Similarly for the decl. */
2381 else if (DECL_P (attrs
.expr
)
2382 && DECL_SIZE_UNIT (attrs
.expr
)
2383 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2384 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2385 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2389 /* The widened memory access overflows the expression, which means
2390 that it could alias another expression. Zap it. */
2391 attrs
.expr
= NULL_TREE
;
2397 attrs
.offset_known_p
= false;
2399 /* The widened memory may alias other stuff, so zap the alias set. */
2400 /* ??? Maybe use get_alias_set on any remaining expression. */
2402 attrs
.size_known_p
= true;
2404 set_mem_attrs (new_rtx
, &attrs
);
2408 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2409 static GTY(()) tree spill_slot_decl
;
2412 get_spill_slot_decl (bool force_build_p
)
2414 tree d
= spill_slot_decl
;
2416 struct mem_attrs attrs
;
2418 if (d
|| !force_build_p
)
2421 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2422 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2423 DECL_ARTIFICIAL (d
) = 1;
2424 DECL_IGNORED_P (d
) = 1;
2426 spill_slot_decl
= d
;
2428 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2429 MEM_NOTRAP_P (rd
) = 1;
2430 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2431 attrs
.alias
= new_alias_set ();
2433 set_mem_attrs (rd
, &attrs
);
2434 SET_DECL_RTL (d
, rd
);
2439 /* Given MEM, a result from assign_stack_local, fill in the memory
2440 attributes as appropriate for a register allocator spill slot.
2441 These slots are not aliasable by other memory. We arrange for
2442 them all to use a single MEM_EXPR, so that the aliasing code can
2443 work properly in the case of shared spill slots. */
2446 set_mem_attrs_for_spill (rtx mem
)
2448 struct mem_attrs attrs
;
2451 attrs
= *get_mem_attrs (mem
);
2452 attrs
.expr
= get_spill_slot_decl (true);
2453 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2454 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2456 /* We expect the incoming memory to be of the form:
2457 (mem:MODE (plus (reg sfp) (const_int offset)))
2458 with perhaps the plus missing for offset = 0. */
2459 addr
= XEXP (mem
, 0);
2460 attrs
.offset_known_p
= true;
2462 if (GET_CODE (addr
) == PLUS
2463 && CONST_INT_P (XEXP (addr
, 1)))
2464 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2466 set_mem_attrs (mem
, &attrs
);
2467 MEM_NOTRAP_P (mem
) = 1;
2470 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2473 gen_label_rtx (void)
2475 return gen_rtx_CODE_LABEL (VOIDmode
, NULL_RTX
, NULL_RTX
,
2476 NULL
, label_num
++, NULL
);
2479 /* For procedure integration. */
2481 /* Install new pointers to the first and last insns in the chain.
2482 Also, set cur_insn_uid to one higher than the last in use.
2483 Used for an inline-procedure after copying the insn chain. */
2486 set_new_first_and_last_insn (rtx first
, rtx last
)
2490 set_first_insn (first
);
2491 set_last_insn (last
);
2494 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2496 int debug_count
= 0;
2498 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2499 cur_debug_insn_uid
= 0;
2501 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2502 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2503 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2506 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2507 if (DEBUG_INSN_P (insn
))
2512 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2514 cur_debug_insn_uid
++;
2517 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2518 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2523 /* Go through all the RTL insn bodies and copy any invalid shared
2524 structure. This routine should only be called once. */
2527 unshare_all_rtl_1 (rtx insn
)
2529 /* Unshare just about everything else. */
2530 unshare_all_rtl_in_chain (insn
);
2532 /* Make sure the addresses of stack slots found outside the insn chain
2533 (such as, in DECL_RTL of a variable) are not shared
2534 with the insn chain.
2536 This special care is necessary when the stack slot MEM does not
2537 actually appear in the insn chain. If it does appear, its address
2538 is unshared from all else at that point. */
2539 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2542 /* Go through all the RTL insn bodies and copy any invalid shared
2543 structure, again. This is a fairly expensive thing to do so it
2544 should be done sparingly. */
2547 unshare_all_rtl_again (rtx insn
)
2552 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2555 reset_used_flags (PATTERN (p
));
2556 reset_used_flags (REG_NOTES (p
));
2558 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2561 /* Make sure that virtual stack slots are not shared. */
2562 set_used_decls (DECL_INITIAL (cfun
->decl
));
2564 /* Make sure that virtual parameters are not shared. */
2565 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2566 set_used_flags (DECL_RTL (decl
));
2568 reset_used_flags (stack_slot_list
);
2570 unshare_all_rtl_1 (insn
);
2574 unshare_all_rtl (void)
2576 unshare_all_rtl_1 (get_insns ());
2581 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2582 Recursively does the same for subexpressions. */
2585 verify_rtx_sharing (rtx orig
, rtx insn
)
2590 const char *format_ptr
;
2595 code
= GET_CODE (x
);
2597 /* These types may be freely shared. */
2613 /* SCRATCH must be shared because they represent distinct values. */
2616 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2617 clobbers or clobbers of hard registers that originated as pseudos.
2618 This is needed to allow safe register renaming. */
2619 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2620 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2625 if (shared_const_p (orig
))
2630 /* A MEM is allowed to be shared if its address is constant. */
2631 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2632 || reload_completed
|| reload_in_progress
)
2641 /* This rtx may not be shared. If it has already been seen,
2642 replace it with a copy of itself. */
2643 #ifdef ENABLE_CHECKING
2644 if (RTX_FLAG (x
, used
))
2646 error ("invalid rtl sharing found in the insn");
2648 error ("shared rtx");
2650 internal_error ("internal consistency failure");
2653 gcc_assert (!RTX_FLAG (x
, used
));
2655 RTX_FLAG (x
, used
) = 1;
2657 /* Now scan the subexpressions recursively. */
2659 format_ptr
= GET_RTX_FORMAT (code
);
2661 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2663 switch (*format_ptr
++)
2666 verify_rtx_sharing (XEXP (x
, i
), insn
);
2670 if (XVEC (x
, i
) != NULL
)
2673 int len
= XVECLEN (x
, i
);
2675 for (j
= 0; j
< len
; j
++)
2677 /* We allow sharing of ASM_OPERANDS inside single
2679 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2680 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2682 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2684 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2693 /* Reset used-flags for INSN. */
2696 reset_insn_used_flags (rtx insn
)
2698 gcc_assert (INSN_P (insn
));
2699 reset_used_flags (PATTERN (insn
));
2700 reset_used_flags (REG_NOTES (insn
));
2702 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2705 /* Go through all the RTL insn bodies and clear all the USED bits. */
2708 reset_all_used_flags (void)
2712 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2715 rtx pat
= PATTERN (p
);
2716 if (GET_CODE (pat
) != SEQUENCE
)
2717 reset_insn_used_flags (p
);
2720 gcc_assert (REG_NOTES (p
) == NULL
);
2721 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2722 reset_insn_used_flags (XVECEXP (pat
, 0, i
));
2727 /* Verify sharing in INSN. */
2730 verify_insn_sharing (rtx insn
)
2732 gcc_assert (INSN_P (insn
));
2733 reset_used_flags (PATTERN (insn
));
2734 reset_used_flags (REG_NOTES (insn
));
2736 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2739 /* Go through all the RTL insn bodies and check that there is no unexpected
2740 sharing in between the subexpressions. */
2743 verify_rtl_sharing (void)
2747 timevar_push (TV_VERIFY_RTL_SHARING
);
2749 reset_all_used_flags ();
2751 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2754 rtx pat
= PATTERN (p
);
2755 if (GET_CODE (pat
) != SEQUENCE
)
2756 verify_insn_sharing (p
);
2758 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2759 verify_insn_sharing (XVECEXP (pat
, 0, i
));
2762 reset_all_used_flags ();
2764 timevar_pop (TV_VERIFY_RTL_SHARING
);
2767 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2768 Assumes the mark bits are cleared at entry. */
2771 unshare_all_rtl_in_chain (rtx insn
)
2773 for (; insn
; insn
= NEXT_INSN (insn
))
2776 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2777 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2779 CALL_INSN_FUNCTION_USAGE (insn
)
2780 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2784 /* Go through all virtual stack slots of a function and mark them as
2785 shared. We never replace the DECL_RTLs themselves with a copy,
2786 but expressions mentioned into a DECL_RTL cannot be shared with
2787 expressions in the instruction stream.
2789 Note that reload may convert pseudo registers into memories in-place.
2790 Pseudo registers are always shared, but MEMs never are. Thus if we
2791 reset the used flags on MEMs in the instruction stream, we must set
2792 them again on MEMs that appear in DECL_RTLs. */
2795 set_used_decls (tree blk
)
2800 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2801 if (DECL_RTL_SET_P (t
))
2802 set_used_flags (DECL_RTL (t
));
2804 /* Now process sub-blocks. */
2805 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2809 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2810 Recursively does the same for subexpressions. Uses
2811 copy_rtx_if_shared_1 to reduce stack space. */
2814 copy_rtx_if_shared (rtx orig
)
2816 copy_rtx_if_shared_1 (&orig
);
2820 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2821 use. Recursively does the same for subexpressions. */
2824 copy_rtx_if_shared_1 (rtx
*orig1
)
2830 const char *format_ptr
;
2834 /* Repeat is used to turn tail-recursion into iteration. */
2841 code
= GET_CODE (x
);
2843 /* These types may be freely shared. */
2859 /* SCRATCH must be shared because they represent distinct values. */
2862 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2863 clobbers or clobbers of hard registers that originated as pseudos.
2864 This is needed to allow safe register renaming. */
2865 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2866 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2871 if (shared_const_p (x
))
2881 /* The chain of insns is not being copied. */
2888 /* This rtx may not be shared. If it has already been seen,
2889 replace it with a copy of itself. */
2891 if (RTX_FLAG (x
, used
))
2893 x
= shallow_copy_rtx (x
);
2896 RTX_FLAG (x
, used
) = 1;
2898 /* Now scan the subexpressions recursively.
2899 We can store any replaced subexpressions directly into X
2900 since we know X is not shared! Any vectors in X
2901 must be copied if X was copied. */
2903 format_ptr
= GET_RTX_FORMAT (code
);
2904 length
= GET_RTX_LENGTH (code
);
2907 for (i
= 0; i
< length
; i
++)
2909 switch (*format_ptr
++)
2913 copy_rtx_if_shared_1 (last_ptr
);
2914 last_ptr
= &XEXP (x
, i
);
2918 if (XVEC (x
, i
) != NULL
)
2921 int len
= XVECLEN (x
, i
);
2923 /* Copy the vector iff I copied the rtx and the length
2925 if (copied
&& len
> 0)
2926 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2928 /* Call recursively on all inside the vector. */
2929 for (j
= 0; j
< len
; j
++)
2932 copy_rtx_if_shared_1 (last_ptr
);
2933 last_ptr
= &XVECEXP (x
, i
, j
);
2948 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2951 mark_used_flags (rtx x
, int flag
)
2955 const char *format_ptr
;
2958 /* Repeat is used to turn tail-recursion into iteration. */
2963 code
= GET_CODE (x
);
2965 /* These types may be freely shared so we needn't do any resetting
2989 /* The chain of insns is not being copied. */
2996 RTX_FLAG (x
, used
) = flag
;
2998 format_ptr
= GET_RTX_FORMAT (code
);
2999 length
= GET_RTX_LENGTH (code
);
3001 for (i
= 0; i
< length
; i
++)
3003 switch (*format_ptr
++)
3011 mark_used_flags (XEXP (x
, i
), flag
);
3015 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3016 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3022 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3023 to look for shared sub-parts. */
3026 reset_used_flags (rtx x
)
3028 mark_used_flags (x
, 0);
3031 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3032 to look for shared sub-parts. */
3035 set_used_flags (rtx x
)
3037 mark_used_flags (x
, 1);
3040 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3041 Return X or the rtx for the pseudo reg the value of X was copied into.
3042 OTHER must be valid as a SET_DEST. */
3045 make_safe_from (rtx x
, rtx other
)
3048 switch (GET_CODE (other
))
3051 other
= SUBREG_REG (other
);
3053 case STRICT_LOW_PART
:
3056 other
= XEXP (other
, 0);
3065 && GET_CODE (x
) != SUBREG
)
3067 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3068 || reg_mentioned_p (other
, x
))))
3070 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3071 emit_move_insn (temp
, x
);
3077 /* Emission of insns (adding them to the doubly-linked list). */
3079 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3082 get_last_insn_anywhere (void)
3084 struct sequence_stack
*stack
;
3085 if (get_last_insn ())
3086 return get_last_insn ();
3087 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3088 if (stack
->last
!= 0)
3093 /* Return the first nonnote insn emitted in current sequence or current
3094 function. This routine looks inside SEQUENCEs. */
3097 get_first_nonnote_insn (void)
3099 rtx insn
= get_insns ();
3104 for (insn
= next_insn (insn
);
3105 insn
&& NOTE_P (insn
);
3106 insn
= next_insn (insn
))
3110 if (NONJUMP_INSN_P (insn
)
3111 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3112 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3119 /* Return the last nonnote insn emitted in current sequence or current
3120 function. This routine looks inside SEQUENCEs. */
3123 get_last_nonnote_insn (void)
3125 rtx insn
= get_last_insn ();
3130 for (insn
= previous_insn (insn
);
3131 insn
&& NOTE_P (insn
);
3132 insn
= previous_insn (insn
))
3136 if (NONJUMP_INSN_P (insn
)
3137 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3138 insn
= XVECEXP (PATTERN (insn
), 0,
3139 XVECLEN (PATTERN (insn
), 0) - 1);
3146 /* Return the number of actual (non-debug) insns emitted in this
3150 get_max_insn_count (void)
3152 int n
= cur_insn_uid
;
3154 /* The table size must be stable across -g, to avoid codegen
3155 differences due to debug insns, and not be affected by
3156 -fmin-insn-uid, to avoid excessive table size and to simplify
3157 debugging of -fcompare-debug failures. */
3158 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3159 n
-= cur_debug_insn_uid
;
3161 n
-= MIN_NONDEBUG_INSN_UID
;
3167 /* Return the next insn. If it is a SEQUENCE, return the first insn
3171 next_insn (rtx insn
)
3175 insn
= NEXT_INSN (insn
);
3176 if (insn
&& NONJUMP_INSN_P (insn
)
3177 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3178 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3184 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3188 previous_insn (rtx insn
)
3192 insn
= PREV_INSN (insn
);
3193 if (insn
&& NONJUMP_INSN_P (insn
)
3194 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3195 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3201 /* Return the next insn after INSN that is not a NOTE. This routine does not
3202 look inside SEQUENCEs. */
3205 next_nonnote_insn (rtx insn
)
3209 insn
= NEXT_INSN (insn
);
3210 if (insn
== 0 || !NOTE_P (insn
))
3217 /* Return the next insn after INSN that is not a NOTE, but stop the
3218 search before we enter another basic block. This routine does not
3219 look inside SEQUENCEs. */
3222 next_nonnote_insn_bb (rtx insn
)
3226 insn
= NEXT_INSN (insn
);
3227 if (insn
== 0 || !NOTE_P (insn
))
3229 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3236 /* Return the previous insn before INSN that is not a NOTE. This routine does
3237 not look inside SEQUENCEs. */
3240 prev_nonnote_insn (rtx insn
)
3244 insn
= PREV_INSN (insn
);
3245 if (insn
== 0 || !NOTE_P (insn
))
3252 /* Return the previous insn before INSN that is not a NOTE, but stop
3253 the search before we enter another basic block. This routine does
3254 not look inside SEQUENCEs. */
3257 prev_nonnote_insn_bb (rtx insn
)
3261 insn
= PREV_INSN (insn
);
3262 if (insn
== 0 || !NOTE_P (insn
))
3264 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3271 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3272 routine does not look inside SEQUENCEs. */
3275 next_nondebug_insn (rtx insn
)
3279 insn
= NEXT_INSN (insn
);
3280 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3287 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3288 This routine does not look inside SEQUENCEs. */
3291 prev_nondebug_insn (rtx insn
)
3295 insn
= PREV_INSN (insn
);
3296 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3303 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3304 This routine does not look inside SEQUENCEs. */
3307 next_nonnote_nondebug_insn (rtx insn
)
3311 insn
= NEXT_INSN (insn
);
3312 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3319 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3320 This routine does not look inside SEQUENCEs. */
3323 prev_nonnote_nondebug_insn (rtx insn
)
3327 insn
= PREV_INSN (insn
);
3328 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3335 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3336 or 0, if there is none. This routine does not look inside
3340 next_real_insn (rtx insn
)
3344 insn
= NEXT_INSN (insn
);
3345 if (insn
== 0 || INSN_P (insn
))
3352 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3353 or 0, if there is none. This routine does not look inside
3357 prev_real_insn (rtx insn
)
3361 insn
= PREV_INSN (insn
);
3362 if (insn
== 0 || INSN_P (insn
))
3369 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3370 This routine does not look inside SEQUENCEs. */
3373 last_call_insn (void)
3377 for (insn
= get_last_insn ();
3378 insn
&& !CALL_P (insn
);
3379 insn
= PREV_INSN (insn
))
3385 /* Find the next insn after INSN that really does something. This routine
3386 does not look inside SEQUENCEs. After reload this also skips over
3387 standalone USE and CLOBBER insn. */
3390 active_insn_p (const_rtx insn
)
3392 return (CALL_P (insn
) || JUMP_P (insn
)
3393 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3394 || (NONJUMP_INSN_P (insn
)
3395 && (! reload_completed
3396 || (GET_CODE (PATTERN (insn
)) != USE
3397 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3401 next_active_insn (rtx insn
)
3405 insn
= NEXT_INSN (insn
);
3406 if (insn
== 0 || active_insn_p (insn
))
3413 /* Find the last insn before INSN that really does something. This routine
3414 does not look inside SEQUENCEs. After reload this also skips over
3415 standalone USE and CLOBBER insn. */
3418 prev_active_insn (rtx insn
)
3422 insn
= PREV_INSN (insn
);
3423 if (insn
== 0 || active_insn_p (insn
))
3431 /* Return the next insn that uses CC0 after INSN, which is assumed to
3432 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3433 applied to the result of this function should yield INSN).
3435 Normally, this is simply the next insn. However, if a REG_CC_USER note
3436 is present, it contains the insn that uses CC0.
3438 Return 0 if we can't find the insn. */
3441 next_cc0_user (rtx insn
)
3443 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3446 return XEXP (note
, 0);
3448 insn
= next_nonnote_insn (insn
);
3449 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3450 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3452 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3458 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3459 note, it is the previous insn. */
3462 prev_cc0_setter (rtx insn
)
3464 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3467 return XEXP (note
, 0);
3469 insn
= prev_nonnote_insn (insn
);
3470 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3477 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3480 find_auto_inc (rtx
*xp
, void *data
)
3483 rtx reg
= (rtx
) data
;
3485 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3488 switch (GET_CODE (x
))
3496 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3507 /* Increment the label uses for all labels present in rtx. */
3510 mark_label_nuses (rtx x
)
3516 code
= GET_CODE (x
);
3517 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3518 LABEL_NUSES (XEXP (x
, 0))++;
3520 fmt
= GET_RTX_FORMAT (code
);
3521 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3524 mark_label_nuses (XEXP (x
, i
));
3525 else if (fmt
[i
] == 'E')
3526 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3527 mark_label_nuses (XVECEXP (x
, i
, j
));
3532 /* Try splitting insns that can be split for better scheduling.
3533 PAT is the pattern which might split.
3534 TRIAL is the insn providing PAT.
3535 LAST is nonzero if we should return the last insn of the sequence produced.
3537 If this routine succeeds in splitting, it returns the first or last
3538 replacement insn depending on the value of LAST. Otherwise, it
3539 returns TRIAL. If the insn to be returned can be split, it will be. */
3542 try_split (rtx pat
, rtx trial
, int last
)
3544 rtx before
= PREV_INSN (trial
);
3545 rtx after
= NEXT_INSN (trial
);
3546 int has_barrier
= 0;
3549 rtx insn_last
, insn
;
3551 rtx call_insn
= NULL_RTX
;
3553 /* We're not good at redistributing frame information. */
3554 if (RTX_FRAME_RELATED_P (trial
))
3557 if (any_condjump_p (trial
)
3558 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3559 split_branch_probability
= XINT (note
, 0);
3560 probability
= split_branch_probability
;
3562 seq
= split_insns (pat
, trial
);
3564 split_branch_probability
= -1;
3566 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3567 We may need to handle this specially. */
3568 if (after
&& BARRIER_P (after
))
3571 after
= NEXT_INSN (after
);
3577 /* Avoid infinite loop if any insn of the result matches
3578 the original pattern. */
3582 if (INSN_P (insn_last
)
3583 && rtx_equal_p (PATTERN (insn_last
), pat
))
3585 if (!NEXT_INSN (insn_last
))
3587 insn_last
= NEXT_INSN (insn_last
);
3590 /* We will be adding the new sequence to the function. The splitters
3591 may have introduced invalid RTL sharing, so unshare the sequence now. */
3592 unshare_all_rtl_in_chain (seq
);
3594 /* Mark labels and copy flags. */
3595 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3600 CROSSING_JUMP_P (insn
) = CROSSING_JUMP_P (trial
);
3601 mark_jump_label (PATTERN (insn
), insn
, 0);
3603 if (probability
!= -1
3604 && any_condjump_p (insn
)
3605 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3607 /* We can preserve the REG_BR_PROB notes only if exactly
3608 one jump is created, otherwise the machine description
3609 is responsible for this step using
3610 split_branch_probability variable. */
3611 gcc_assert (njumps
== 1);
3612 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3617 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3618 in SEQ and copy any additional information across. */
3621 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3626 gcc_assert (call_insn
== NULL_RTX
);
3629 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3630 target may have explicitly specified. */
3631 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3634 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3636 /* If the old call was a sibling call, the new one must
3638 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3640 /* If the new call is the last instruction in the sequence,
3641 it will effectively replace the old call in-situ. Otherwise
3642 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3643 so that it comes immediately after the new call. */
3644 if (NEXT_INSN (insn
))
3645 for (next
= NEXT_INSN (trial
);
3646 next
&& NOTE_P (next
);
3647 next
= NEXT_INSN (next
))
3648 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3651 add_insn_after (next
, insn
, NULL
);
3657 /* Copy notes, particularly those related to the CFG. */
3658 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3660 switch (REG_NOTE_KIND (note
))
3663 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3669 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3672 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3676 case REG_NON_LOCAL_GOTO
:
3677 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3680 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3686 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3688 rtx reg
= XEXP (note
, 0);
3689 if (!FIND_REG_INC_NOTE (insn
, reg
)
3690 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3691 add_reg_note (insn
, REG_INC
, reg
);
3697 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3701 gcc_assert (call_insn
!= NULL_RTX
);
3702 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3710 /* If there are LABELS inside the split insns increment the
3711 usage count so we don't delete the label. */
3715 while (insn
!= NULL_RTX
)
3717 /* JUMP_P insns have already been "marked" above. */
3718 if (NONJUMP_INSN_P (insn
))
3719 mark_label_nuses (PATTERN (insn
));
3721 insn
= PREV_INSN (insn
);
3725 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3727 delete_insn (trial
);
3729 emit_barrier_after (tem
);
3731 /* Recursively call try_split for each new insn created; by the
3732 time control returns here that insn will be fully split, so
3733 set LAST and continue from the insn after the one returned.
3734 We can't use next_active_insn here since AFTER may be a note.
3735 Ignore deleted insns, which can be occur if not optimizing. */
3736 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3737 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3738 tem
= try_split (PATTERN (tem
), tem
, 1);
3740 /* Return either the first or the last insn, depending on which was
3743 ? (after
? PREV_INSN (after
) : get_last_insn ())
3744 : NEXT_INSN (before
);
3747 /* Make and return an INSN rtx, initializing all its slots.
3748 Store PATTERN in the pattern slots. */
3751 make_insn_raw (rtx pattern
)
3755 insn
= rtx_alloc (INSN
);
3757 INSN_UID (insn
) = cur_insn_uid
++;
3758 PATTERN (insn
) = pattern
;
3759 INSN_CODE (insn
) = -1;
3760 REG_NOTES (insn
) = NULL
;
3761 INSN_LOCATION (insn
) = curr_insn_location ();
3762 BLOCK_FOR_INSN (insn
) = NULL
;
3764 #ifdef ENABLE_RTL_CHECKING
3767 && (returnjump_p (insn
)
3768 || (GET_CODE (insn
) == SET
3769 && SET_DEST (insn
) == pc_rtx
)))
3771 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3779 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3782 make_debug_insn_raw (rtx pattern
)
3786 insn
= rtx_alloc (DEBUG_INSN
);
3787 INSN_UID (insn
) = cur_debug_insn_uid
++;
3788 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3789 INSN_UID (insn
) = cur_insn_uid
++;
3791 PATTERN (insn
) = pattern
;
3792 INSN_CODE (insn
) = -1;
3793 REG_NOTES (insn
) = NULL
;
3794 INSN_LOCATION (insn
) = curr_insn_location ();
3795 BLOCK_FOR_INSN (insn
) = NULL
;
3800 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3803 make_jump_insn_raw (rtx pattern
)
3807 insn
= rtx_alloc (JUMP_INSN
);
3808 INSN_UID (insn
) = cur_insn_uid
++;
3810 PATTERN (insn
) = pattern
;
3811 INSN_CODE (insn
) = -1;
3812 REG_NOTES (insn
) = NULL
;
3813 JUMP_LABEL (insn
) = NULL
;
3814 INSN_LOCATION (insn
) = curr_insn_location ();
3815 BLOCK_FOR_INSN (insn
) = NULL
;
3820 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3823 make_call_insn_raw (rtx pattern
)
3827 insn
= rtx_alloc (CALL_INSN
);
3828 INSN_UID (insn
) = cur_insn_uid
++;
3830 PATTERN (insn
) = pattern
;
3831 INSN_CODE (insn
) = -1;
3832 REG_NOTES (insn
) = NULL
;
3833 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3834 INSN_LOCATION (insn
) = curr_insn_location ();
3835 BLOCK_FOR_INSN (insn
) = NULL
;
3840 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3843 make_note_raw (enum insn_note subtype
)
3845 /* Some notes are never created this way at all. These notes are
3846 only created by patching out insns. */
3847 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3848 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3850 rtx note
= rtx_alloc (NOTE
);
3851 INSN_UID (note
) = cur_insn_uid
++;
3852 NOTE_KIND (note
) = subtype
;
3853 BLOCK_FOR_INSN (note
) = NULL
;
3854 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3858 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3859 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3860 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3863 link_insn_into_chain (rtx insn
, rtx prev
, rtx next
)
3865 PREV_INSN (insn
) = prev
;
3866 NEXT_INSN (insn
) = next
;
3869 NEXT_INSN (prev
) = insn
;
3870 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3872 rtx sequence
= PATTERN (prev
);
3873 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3878 PREV_INSN (next
) = insn
;
3879 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3880 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3883 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3885 rtx sequence
= PATTERN (insn
);
3886 PREV_INSN (XVECEXP (sequence
, 0, 0)) = prev
;
3887 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3891 /* Add INSN to the end of the doubly-linked list.
3892 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3897 rtx prev
= get_last_insn ();
3898 link_insn_into_chain (insn
, prev
, NULL
);
3899 if (NULL
== get_insns ())
3900 set_first_insn (insn
);
3901 set_last_insn (insn
);
3904 /* Add INSN into the doubly-linked list after insn AFTER. */
3907 add_insn_after_nobb (rtx insn
, rtx after
)
3909 rtx next
= NEXT_INSN (after
);
3911 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3913 link_insn_into_chain (insn
, after
, next
);
3917 if (get_last_insn () == after
)
3918 set_last_insn (insn
);
3921 struct sequence_stack
*stack
= seq_stack
;
3922 /* Scan all pending sequences too. */
3923 for (; stack
; stack
= stack
->next
)
3924 if (after
== stack
->last
)
3933 /* Add INSN into the doubly-linked list before insn BEFORE. */
3936 add_insn_before_nobb (rtx insn
, rtx before
)
3938 rtx prev
= PREV_INSN (before
);
3940 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3942 link_insn_into_chain (insn
, prev
, before
);
3946 if (get_insns () == before
)
3947 set_first_insn (insn
);
3950 struct sequence_stack
*stack
= seq_stack
;
3951 /* Scan all pending sequences too. */
3952 for (; stack
; stack
= stack
->next
)
3953 if (before
== stack
->first
)
3955 stack
->first
= insn
;
3964 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
3965 If BB is NULL, an attempt is made to infer the bb from before.
3967 This and the next function should be the only functions called
3968 to insert an insn once delay slots have been filled since only
3969 they know how to update a SEQUENCE. */
3972 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3974 add_insn_after_nobb (insn
, after
);
3975 if (!BARRIER_P (after
)
3976 && !BARRIER_P (insn
)
3977 && (bb
= BLOCK_FOR_INSN (after
)))
3979 set_block_for_insn (insn
, bb
);
3981 df_insn_rescan (insn
);
3982 /* Should not happen as first in the BB is always
3983 either NOTE or LABEL. */
3984 if (BB_END (bb
) == after
3985 /* Avoid clobbering of structure when creating new BB. */
3986 && !BARRIER_P (insn
)
3987 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3992 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
3993 If BB is NULL, an attempt is made to infer the bb from before.
3995 This and the previous function should be the only functions called
3996 to insert an insn once delay slots have been filled since only
3997 they know how to update a SEQUENCE. */
4000 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
4002 add_insn_before_nobb (insn
, before
);
4005 && !BARRIER_P (before
)
4006 && !BARRIER_P (insn
))
4007 bb
= BLOCK_FOR_INSN (before
);
4011 set_block_for_insn (insn
, bb
);
4013 df_insn_rescan (insn
);
4014 /* Should not happen as first in the BB is always either NOTE or
4016 gcc_assert (BB_HEAD (bb
) != insn
4017 /* Avoid clobbering of structure when creating new BB. */
4019 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4023 /* Replace insn with an deleted instruction note. */
4026 set_insn_deleted (rtx insn
)
4029 df_insn_delete (insn
);
4030 PUT_CODE (insn
, NOTE
);
4031 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4035 /* Unlink INSN from the insn chain.
4037 This function knows how to handle sequences.
4039 This function does not invalidate data flow information associated with
4040 INSN (i.e. does not call df_insn_delete). That makes this function
4041 usable for only disconnecting an insn from the chain, and re-emit it
4044 To later insert INSN elsewhere in the insn chain via add_insn and
4045 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4046 the caller. Nullifying them here breaks many insn chain walks.
4048 To really delete an insn and related DF information, use delete_insn. */
4051 remove_insn (rtx insn
)
4053 rtx next
= NEXT_INSN (insn
);
4054 rtx prev
= PREV_INSN (insn
);
4059 NEXT_INSN (prev
) = next
;
4060 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4062 rtx sequence
= PATTERN (prev
);
4063 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
4066 else if (get_insns () == insn
)
4069 PREV_INSN (next
) = NULL
;
4070 set_first_insn (next
);
4074 struct sequence_stack
*stack
= seq_stack
;
4075 /* Scan all pending sequences too. */
4076 for (; stack
; stack
= stack
->next
)
4077 if (insn
== stack
->first
)
4079 stack
->first
= next
;
4088 PREV_INSN (next
) = prev
;
4089 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4090 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
4092 else if (get_last_insn () == insn
)
4093 set_last_insn (prev
);
4096 struct sequence_stack
*stack
= seq_stack
;
4097 /* Scan all pending sequences too. */
4098 for (; stack
; stack
= stack
->next
)
4099 if (insn
== stack
->last
)
4108 /* Fix up basic block boundaries, if necessary. */
4109 if (!BARRIER_P (insn
)
4110 && (bb
= BLOCK_FOR_INSN (insn
)))
4112 if (BB_HEAD (bb
) == insn
)
4114 /* Never ever delete the basic block note without deleting whole
4116 gcc_assert (!NOTE_P (insn
));
4117 BB_HEAD (bb
) = next
;
4119 if (BB_END (bb
) == insn
)
4124 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4127 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4129 gcc_assert (call_insn
&& CALL_P (call_insn
));
4131 /* Put the register usage information on the CALL. If there is already
4132 some usage information, put ours at the end. */
4133 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4137 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4138 link
= XEXP (link
, 1))
4141 XEXP (link
, 1) = call_fusage
;
4144 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4147 /* Delete all insns made since FROM.
4148 FROM becomes the new last instruction. */
4151 delete_insns_since (rtx from
)
4156 NEXT_INSN (from
) = 0;
4157 set_last_insn (from
);
4160 /* This function is deprecated, please use sequences instead.
4162 Move a consecutive bunch of insns to a different place in the chain.
4163 The insns to be moved are those between FROM and TO.
4164 They are moved to a new position after the insn AFTER.
4165 AFTER must not be FROM or TO or any insn in between.
4167 This function does not know about SEQUENCEs and hence should not be
4168 called after delay-slot filling has been done. */
4171 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
4173 #ifdef ENABLE_CHECKING
4175 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4176 gcc_assert (after
!= x
);
4177 gcc_assert (after
!= to
);
4180 /* Splice this bunch out of where it is now. */
4181 if (PREV_INSN (from
))
4182 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4184 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4185 if (get_last_insn () == to
)
4186 set_last_insn (PREV_INSN (from
));
4187 if (get_insns () == from
)
4188 set_first_insn (NEXT_INSN (to
));
4190 /* Make the new neighbors point to it and it to them. */
4191 if (NEXT_INSN (after
))
4192 PREV_INSN (NEXT_INSN (after
)) = to
;
4194 NEXT_INSN (to
) = NEXT_INSN (after
);
4195 PREV_INSN (from
) = after
;
4196 NEXT_INSN (after
) = from
;
4197 if (after
== get_last_insn ())
4201 /* Same as function above, but take care to update BB boundaries. */
4203 reorder_insns (rtx from
, rtx to
, rtx after
)
4205 rtx prev
= PREV_INSN (from
);
4206 basic_block bb
, bb2
;
4208 reorder_insns_nobb (from
, to
, after
);
4210 if (!BARRIER_P (after
)
4211 && (bb
= BLOCK_FOR_INSN (after
)))
4214 df_set_bb_dirty (bb
);
4216 if (!BARRIER_P (from
)
4217 && (bb2
= BLOCK_FOR_INSN (from
)))
4219 if (BB_END (bb2
) == to
)
4220 BB_END (bb2
) = prev
;
4221 df_set_bb_dirty (bb2
);
4224 if (BB_END (bb
) == after
)
4227 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4229 df_insn_change_bb (x
, bb
);
4234 /* Emit insn(s) of given code and pattern
4235 at a specified place within the doubly-linked list.
4237 All of the emit_foo global entry points accept an object
4238 X which is either an insn list or a PATTERN of a single
4241 There are thus a few canonical ways to generate code and
4242 emit it at a specific place in the instruction stream. For
4243 example, consider the instruction named SPOT and the fact that
4244 we would like to emit some instructions before SPOT. We might
4248 ... emit the new instructions ...
4249 insns_head = get_insns ();
4252 emit_insn_before (insns_head, SPOT);
4254 It used to be common to generate SEQUENCE rtl instead, but that
4255 is a relic of the past which no longer occurs. The reason is that
4256 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4257 generated would almost certainly die right after it was created. */
4260 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4261 rtx (*make_raw
) (rtx
))
4265 gcc_assert (before
);
4270 switch (GET_CODE (x
))
4282 rtx next
= NEXT_INSN (insn
);
4283 add_insn_before (insn
, before
, bb
);
4289 #ifdef ENABLE_RTL_CHECKING
4296 last
= (*make_raw
) (x
);
4297 add_insn_before (last
, before
, bb
);
4304 /* Make X be output before the instruction BEFORE. */
4307 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4309 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4312 /* Make an instruction with body X and code JUMP_INSN
4313 and output it before the instruction BEFORE. */
4316 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4318 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4319 make_jump_insn_raw
);
4322 /* Make an instruction with body X and code CALL_INSN
4323 and output it before the instruction BEFORE. */
4326 emit_call_insn_before_noloc (rtx x
, rtx before
)
4328 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4329 make_call_insn_raw
);
4332 /* Make an instruction with body X and code DEBUG_INSN
4333 and output it before the instruction BEFORE. */
4336 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4338 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4339 make_debug_insn_raw
);
4342 /* Make an insn of code BARRIER
4343 and output it before the insn BEFORE. */
4346 emit_barrier_before (rtx before
)
4348 rtx insn
= rtx_alloc (BARRIER
);
4350 INSN_UID (insn
) = cur_insn_uid
++;
4352 add_insn_before (insn
, before
, NULL
);
4356 /* Emit the label LABEL before the insn BEFORE. */
4359 emit_label_before (rtx label
, rtx before
)
4361 gcc_checking_assert (INSN_UID (label
) == 0);
4362 INSN_UID (label
) = cur_insn_uid
++;
4363 add_insn_before (label
, before
, NULL
);
4367 /* Helper for emit_insn_after, handles lists of instructions
4371 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4375 if (!bb
&& !BARRIER_P (after
))
4376 bb
= BLOCK_FOR_INSN (after
);
4380 df_set_bb_dirty (bb
);
4381 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4382 if (!BARRIER_P (last
))
4384 set_block_for_insn (last
, bb
);
4385 df_insn_rescan (last
);
4387 if (!BARRIER_P (last
))
4389 set_block_for_insn (last
, bb
);
4390 df_insn_rescan (last
);
4392 if (BB_END (bb
) == after
)
4396 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4399 after_after
= NEXT_INSN (after
);
4401 NEXT_INSN (after
) = first
;
4402 PREV_INSN (first
) = after
;
4403 NEXT_INSN (last
) = after_after
;
4405 PREV_INSN (after_after
) = last
;
4407 if (after
== get_last_insn ())
4408 set_last_insn (last
);
4414 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4415 rtx (*make_raw
)(rtx
))
4424 switch (GET_CODE (x
))
4433 last
= emit_insn_after_1 (x
, after
, bb
);
4436 #ifdef ENABLE_RTL_CHECKING
4443 last
= (*make_raw
) (x
);
4444 add_insn_after (last
, after
, bb
);
4451 /* Make X be output after the insn AFTER and set the BB of insn. If
4452 BB is NULL, an attempt is made to infer the BB from AFTER. */
4455 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4457 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4461 /* Make an insn of code JUMP_INSN with body X
4462 and output it after the insn AFTER. */
4465 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4467 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4470 /* Make an instruction with body X and code CALL_INSN
4471 and output it after the instruction AFTER. */
4474 emit_call_insn_after_noloc (rtx x
, rtx after
)
4476 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4479 /* Make an instruction with body X and code CALL_INSN
4480 and output it after the instruction AFTER. */
4483 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4485 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4488 /* Make an insn of code BARRIER
4489 and output it after the insn AFTER. */
4492 emit_barrier_after (rtx after
)
4494 rtx insn
= rtx_alloc (BARRIER
);
4496 INSN_UID (insn
) = cur_insn_uid
++;
4498 add_insn_after (insn
, after
, NULL
);
4502 /* Emit the label LABEL after the insn AFTER. */
4505 emit_label_after (rtx label
, rtx after
)
4507 gcc_checking_assert (INSN_UID (label
) == 0);
4508 INSN_UID (label
) = cur_insn_uid
++;
4509 add_insn_after (label
, after
, NULL
);
4513 /* Notes require a bit of special handling: Some notes need to have their
4514 BLOCK_FOR_INSN set, others should never have it set, and some should
4515 have it set or clear depending on the context. */
4517 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4518 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4519 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4522 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4526 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4527 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4530 /* Notes for var tracking and EH region markers can appear between or
4531 inside basic blocks. If the caller is emitting on the basic block
4532 boundary, do not set BLOCK_FOR_INSN on the new note. */
4533 case NOTE_INSN_VAR_LOCATION
:
4534 case NOTE_INSN_CALL_ARG_LOCATION
:
4535 case NOTE_INSN_EH_REGION_BEG
:
4536 case NOTE_INSN_EH_REGION_END
:
4537 return on_bb_boundary_p
;
4539 /* Otherwise, BLOCK_FOR_INSN must be set. */
4545 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4548 emit_note_after (enum insn_note subtype
, rtx after
)
4550 rtx note
= make_note_raw (subtype
);
4551 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4552 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4554 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4555 add_insn_after_nobb (note
, after
);
4557 add_insn_after (note
, after
, bb
);
4561 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4564 emit_note_before (enum insn_note subtype
, rtx before
)
4566 rtx note
= make_note_raw (subtype
);
4567 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4568 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4570 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4571 add_insn_before_nobb (note
, before
);
4573 add_insn_before (note
, before
, bb
);
4577 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4578 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4581 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4582 rtx (*make_raw
) (rtx
))
4584 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4586 if (pattern
== NULL_RTX
|| !loc
)
4589 after
= NEXT_INSN (after
);
4592 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4593 INSN_LOCATION (after
) = loc
;
4596 after
= NEXT_INSN (after
);
4601 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4602 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4606 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4607 rtx (*make_raw
) (rtx
))
4611 if (skip_debug_insns
)
4612 while (DEBUG_INSN_P (prev
))
4613 prev
= PREV_INSN (prev
);
4616 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4619 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4622 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4624 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4626 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4629 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4631 emit_insn_after (rtx pattern
, rtx after
)
4633 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4636 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4638 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4640 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4643 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4645 emit_jump_insn_after (rtx pattern
, rtx after
)
4647 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4650 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4652 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4654 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4657 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4659 emit_call_insn_after (rtx pattern
, rtx after
)
4661 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4664 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4666 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4668 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4671 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4673 emit_debug_insn_after (rtx pattern
, rtx after
)
4675 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4678 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4679 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4680 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4684 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4685 rtx (*make_raw
) (rtx
))
4687 rtx first
= PREV_INSN (before
);
4688 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4689 insnp
? before
: NULL_RTX
,
4692 if (pattern
== NULL_RTX
|| !loc
)
4696 first
= get_insns ();
4698 first
= NEXT_INSN (first
);
4701 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4702 INSN_LOCATION (first
) = loc
;
4705 first
= NEXT_INSN (first
);
4710 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4711 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4712 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4713 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4716 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4717 bool insnp
, rtx (*make_raw
) (rtx
))
4721 if (skip_debug_insns
)
4722 while (DEBUG_INSN_P (next
))
4723 next
= PREV_INSN (next
);
4726 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4729 return emit_pattern_before_noloc (pattern
, before
,
4730 insnp
? before
: NULL_RTX
,
4734 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4736 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4738 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4742 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4744 emit_insn_before (rtx pattern
, rtx before
)
4746 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4749 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4751 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4753 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4754 make_jump_insn_raw
);
4757 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4759 emit_jump_insn_before (rtx pattern
, rtx before
)
4761 return emit_pattern_before (pattern
, before
, true, false,
4762 make_jump_insn_raw
);
4765 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4767 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4769 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4770 make_call_insn_raw
);
4773 /* Like emit_call_insn_before_noloc,
4774 but set insn_location according to BEFORE. */
4776 emit_call_insn_before (rtx pattern
, rtx before
)
4778 return emit_pattern_before (pattern
, before
, true, false,
4779 make_call_insn_raw
);
4782 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4784 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4786 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4787 make_debug_insn_raw
);
4790 /* Like emit_debug_insn_before_noloc,
4791 but set insn_location according to BEFORE. */
4793 emit_debug_insn_before (rtx pattern
, rtx before
)
4795 return emit_pattern_before (pattern
, before
, false, false,
4796 make_debug_insn_raw
);
4799 /* Take X and emit it at the end of the doubly-linked
4802 Returns the last insn emitted. */
4807 rtx last
= get_last_insn ();
4813 switch (GET_CODE (x
))
4825 rtx next
= NEXT_INSN (insn
);
4832 #ifdef ENABLE_RTL_CHECKING
4833 case JUMP_TABLE_DATA
:
4840 last
= make_insn_raw (x
);
4848 /* Make an insn of code DEBUG_INSN with pattern X
4849 and add it to the end of the doubly-linked list. */
4852 emit_debug_insn (rtx x
)
4854 rtx last
= get_last_insn ();
4860 switch (GET_CODE (x
))
4872 rtx next
= NEXT_INSN (insn
);
4879 #ifdef ENABLE_RTL_CHECKING
4880 case JUMP_TABLE_DATA
:
4887 last
= make_debug_insn_raw (x
);
4895 /* Make an insn of code JUMP_INSN with pattern X
4896 and add it to the end of the doubly-linked list. */
4899 emit_jump_insn (rtx x
)
4901 rtx last
= NULL_RTX
, insn
;
4903 switch (GET_CODE (x
))
4915 rtx next
= NEXT_INSN (insn
);
4922 #ifdef ENABLE_RTL_CHECKING
4923 case JUMP_TABLE_DATA
:
4930 last
= make_jump_insn_raw (x
);
4938 /* Make an insn of code CALL_INSN with pattern X
4939 and add it to the end of the doubly-linked list. */
4942 emit_call_insn (rtx x
)
4946 switch (GET_CODE (x
))
4955 insn
= emit_insn (x
);
4958 #ifdef ENABLE_RTL_CHECKING
4960 case JUMP_TABLE_DATA
:
4966 insn
= make_call_insn_raw (x
);
4974 /* Add the label LABEL to the end of the doubly-linked list. */
4977 emit_label (rtx label
)
4979 gcc_checking_assert (INSN_UID (label
) == 0);
4980 INSN_UID (label
) = cur_insn_uid
++;
4985 /* Make an insn of code JUMP_TABLE_DATA
4986 and add it to the end of the doubly-linked list. */
4989 emit_jump_table_data (rtx table
)
4991 rtx jump_table_data
= rtx_alloc (JUMP_TABLE_DATA
);
4992 INSN_UID (jump_table_data
) = cur_insn_uid
++;
4993 PATTERN (jump_table_data
) = table
;
4994 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
4995 add_insn (jump_table_data
);
4996 return jump_table_data
;
4999 /* Make an insn of code BARRIER
5000 and add it to the end of the doubly-linked list. */
5005 rtx barrier
= rtx_alloc (BARRIER
);
5006 INSN_UID (barrier
) = cur_insn_uid
++;
5011 /* Emit a copy of note ORIG. */
5014 emit_note_copy (rtx orig
)
5016 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5017 rtx note
= make_note_raw (kind
);
5018 NOTE_DATA (note
) = NOTE_DATA (orig
);
5023 /* Make an insn of code NOTE or type NOTE_NO
5024 and add it to the end of the doubly-linked list. */
5027 emit_note (enum insn_note kind
)
5029 rtx note
= make_note_raw (kind
);
5034 /* Emit a clobber of lvalue X. */
5037 emit_clobber (rtx x
)
5039 /* CONCATs should not appear in the insn stream. */
5040 if (GET_CODE (x
) == CONCAT
)
5042 emit_clobber (XEXP (x
, 0));
5043 return emit_clobber (XEXP (x
, 1));
5045 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5048 /* Return a sequence of insns to clobber lvalue X. */
5062 /* Emit a use of rvalue X. */
5067 /* CONCATs should not appear in the insn stream. */
5068 if (GET_CODE (x
) == CONCAT
)
5070 emit_use (XEXP (x
, 0));
5071 return emit_use (XEXP (x
, 1));
5073 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5076 /* Return a sequence of insns to use rvalue X. */
5090 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5091 Return the set in INSN that such notes describe, or NULL if the notes
5092 have no meaning for INSN. */
5095 set_for_reg_notes (rtx insn
)
5102 pat
= PATTERN (insn
);
5103 if (GET_CODE (pat
) == PARALLEL
)
5105 /* We do not use single_set because that ignores SETs of unused
5106 registers. REG_EQUAL and REG_EQUIV notes really do require the
5107 PARALLEL to have a single SET. */
5108 if (multiple_sets (insn
))
5110 pat
= XVECEXP (pat
, 0, 0);
5113 if (GET_CODE (pat
) != SET
)
5116 reg
= SET_DEST (pat
);
5118 /* Notes apply to the contents of a STRICT_LOW_PART. */
5119 if (GET_CODE (reg
) == STRICT_LOW_PART
)
5120 reg
= XEXP (reg
, 0);
5122 /* Check that we have a register. */
5123 if (!(REG_P (reg
) || GET_CODE (reg
) == SUBREG
))
5129 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5130 note of this type already exists, remove it first. */
5133 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5135 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5141 if (!set_for_reg_notes (insn
))
5144 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5145 It serves no useful purpose and breaks eliminate_regs. */
5146 if (GET_CODE (datum
) == ASM_OPERANDS
)
5155 XEXP (note
, 0) = datum
;
5158 add_reg_note (insn
, kind
, datum
);
5159 note
= REG_NOTES (insn
);
5166 df_notes_rescan (insn
);
5175 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5177 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5179 rtx set
= set_for_reg_notes (insn
);
5181 if (set
&& SET_DEST (set
) == dst
)
5182 return set_unique_reg_note (insn
, kind
, datum
);
5186 /* Return an indication of which type of insn should have X as a body.
5187 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5189 static enum rtx_code
5190 classify_insn (rtx x
)
5194 if (GET_CODE (x
) == CALL
)
5196 if (ANY_RETURN_P (x
))
5198 if (GET_CODE (x
) == SET
)
5200 if (SET_DEST (x
) == pc_rtx
)
5202 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5207 if (GET_CODE (x
) == PARALLEL
)
5210 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5211 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5213 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5214 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5216 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5217 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5223 /* Emit the rtl pattern X as an appropriate kind of insn.
5224 If X is a label, it is simply added into the insn chain. */
5229 enum rtx_code code
= classify_insn (x
);
5234 return emit_label (x
);
5236 return emit_insn (x
);
5239 rtx insn
= emit_jump_insn (x
);
5240 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5241 return emit_barrier ();
5245 return emit_call_insn (x
);
5247 return emit_debug_insn (x
);
5253 /* Space for free sequence stack entries. */
5254 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5256 /* Begin emitting insns to a sequence. If this sequence will contain
5257 something that might cause the compiler to pop arguments to function
5258 calls (because those pops have previously been deferred; see
5259 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5260 before calling this function. That will ensure that the deferred
5261 pops are not accidentally emitted in the middle of this sequence. */
5264 start_sequence (void)
5266 struct sequence_stack
*tem
;
5268 if (free_sequence_stack
!= NULL
)
5270 tem
= free_sequence_stack
;
5271 free_sequence_stack
= tem
->next
;
5274 tem
= ggc_alloc
<sequence_stack
> ();
5276 tem
->next
= seq_stack
;
5277 tem
->first
= get_insns ();
5278 tem
->last
= get_last_insn ();
5286 /* Set up the insn chain starting with FIRST as the current sequence,
5287 saving the previously current one. See the documentation for
5288 start_sequence for more information about how to use this function. */
5291 push_to_sequence (rtx first
)
5297 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5300 set_first_insn (first
);
5301 set_last_insn (last
);
5304 /* Like push_to_sequence, but take the last insn as an argument to avoid
5305 looping through the list. */
5308 push_to_sequence2 (rtx first
, rtx last
)
5312 set_first_insn (first
);
5313 set_last_insn (last
);
5316 /* Set up the outer-level insn chain
5317 as the current sequence, saving the previously current one. */
5320 push_topmost_sequence (void)
5322 struct sequence_stack
*stack
, *top
= NULL
;
5326 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5329 set_first_insn (top
->first
);
5330 set_last_insn (top
->last
);
5333 /* After emitting to the outer-level insn chain, update the outer-level
5334 insn chain, and restore the previous saved state. */
5337 pop_topmost_sequence (void)
5339 struct sequence_stack
*stack
, *top
= NULL
;
5341 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5344 top
->first
= get_insns ();
5345 top
->last
= get_last_insn ();
5350 /* After emitting to a sequence, restore previous saved state.
5352 To get the contents of the sequence just made, you must call
5353 `get_insns' *before* calling here.
5355 If the compiler might have deferred popping arguments while
5356 generating this sequence, and this sequence will not be immediately
5357 inserted into the instruction stream, use do_pending_stack_adjust
5358 before calling get_insns. That will ensure that the deferred
5359 pops are inserted into this sequence, and not into some random
5360 location in the instruction stream. See INHIBIT_DEFER_POP for more
5361 information about deferred popping of arguments. */
5366 struct sequence_stack
*tem
= seq_stack
;
5368 set_first_insn (tem
->first
);
5369 set_last_insn (tem
->last
);
5370 seq_stack
= tem
->next
;
5372 memset (tem
, 0, sizeof (*tem
));
5373 tem
->next
= free_sequence_stack
;
5374 free_sequence_stack
= tem
;
5377 /* Return 1 if currently emitting into a sequence. */
5380 in_sequence_p (void)
5382 return seq_stack
!= 0;
5385 /* Put the various virtual registers into REGNO_REG_RTX. */
5388 init_virtual_regs (void)
5390 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5391 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5392 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5393 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5394 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5395 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5396 = virtual_preferred_stack_boundary_rtx
;
5400 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5401 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5402 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5403 static int copy_insn_n_scratches
;
5405 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5406 copied an ASM_OPERANDS.
5407 In that case, it is the original input-operand vector. */
5408 static rtvec orig_asm_operands_vector
;
5410 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5411 copied an ASM_OPERANDS.
5412 In that case, it is the copied input-operand vector. */
5413 static rtvec copy_asm_operands_vector
;
5415 /* Likewise for the constraints vector. */
5416 static rtvec orig_asm_constraints_vector
;
5417 static rtvec copy_asm_constraints_vector
;
5419 /* Recursively create a new copy of an rtx for copy_insn.
5420 This function differs from copy_rtx in that it handles SCRATCHes and
5421 ASM_OPERANDs properly.
5422 Normally, this function is not used directly; use copy_insn as front end.
5423 However, you could first copy an insn pattern with copy_insn and then use
5424 this function afterwards to properly copy any REG_NOTEs containing
5428 copy_insn_1 (rtx orig
)
5433 const char *format_ptr
;
5438 code
= GET_CODE (orig
);
5453 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5454 clobbers or clobbers of hard registers that originated as pseudos.
5455 This is needed to allow safe register renaming. */
5456 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5457 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5462 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5463 if (copy_insn_scratch_in
[i
] == orig
)
5464 return copy_insn_scratch_out
[i
];
5468 if (shared_const_p (orig
))
5472 /* A MEM with a constant address is not sharable. The problem is that
5473 the constant address may need to be reloaded. If the mem is shared,
5474 then reloading one copy of this mem will cause all copies to appear
5475 to have been reloaded. */
5481 /* Copy the various flags, fields, and other information. We assume
5482 that all fields need copying, and then clear the fields that should
5483 not be copied. That is the sensible default behavior, and forces
5484 us to explicitly document why we are *not* copying a flag. */
5485 copy
= shallow_copy_rtx (orig
);
5487 /* We do not copy the USED flag, which is used as a mark bit during
5488 walks over the RTL. */
5489 RTX_FLAG (copy
, used
) = 0;
5491 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5494 RTX_FLAG (copy
, jump
) = 0;
5495 RTX_FLAG (copy
, call
) = 0;
5496 RTX_FLAG (copy
, frame_related
) = 0;
5499 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5501 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5502 switch (*format_ptr
++)
5505 if (XEXP (orig
, i
) != NULL
)
5506 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5511 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5512 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5513 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5514 XVEC (copy
, i
) = copy_asm_operands_vector
;
5515 else if (XVEC (orig
, i
) != NULL
)
5517 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5518 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5519 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5530 /* These are left unchanged. */
5537 if (code
== SCRATCH
)
5539 i
= copy_insn_n_scratches
++;
5540 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5541 copy_insn_scratch_in
[i
] = orig
;
5542 copy_insn_scratch_out
[i
] = copy
;
5544 else if (code
== ASM_OPERANDS
)
5546 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5547 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5548 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5549 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5555 /* Create a new copy of an rtx.
5556 This function differs from copy_rtx in that it handles SCRATCHes and
5557 ASM_OPERANDs properly.
5558 INSN doesn't really have to be a full INSN; it could be just the
5561 copy_insn (rtx insn
)
5563 copy_insn_n_scratches
= 0;
5564 orig_asm_operands_vector
= 0;
5565 orig_asm_constraints_vector
= 0;
5566 copy_asm_operands_vector
= 0;
5567 copy_asm_constraints_vector
= 0;
5568 return copy_insn_1 (insn
);
5571 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5572 on that assumption that INSN itself remains in its original place. */
5575 copy_delay_slot_insn (rtx insn
)
5577 /* Copy INSN with its rtx_code, all its notes, location etc. */
5578 insn
= copy_rtx (insn
);
5579 INSN_UID (insn
) = cur_insn_uid
++;
5583 /* Initialize data structures and variables in this file
5584 before generating rtl for each function. */
5589 set_first_insn (NULL
);
5590 set_last_insn (NULL
);
5591 if (MIN_NONDEBUG_INSN_UID
)
5592 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5595 cur_debug_insn_uid
= 1;
5596 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5597 first_label_num
= label_num
;
5600 /* Init the tables that describe all the pseudo regs. */
5602 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5604 crtl
->emit
.regno_pointer_align
5605 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5607 regno_reg_rtx
= ggc_vec_alloc
<rtx
> (crtl
->emit
.regno_pointer_align_length
);
5609 /* Put copies of all the hard registers into regno_reg_rtx. */
5610 memcpy (regno_reg_rtx
,
5611 initial_regno_reg_rtx
,
5612 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5614 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5615 init_virtual_regs ();
5617 /* Indicate that the virtual registers and stack locations are
5619 REG_POINTER (stack_pointer_rtx
) = 1;
5620 REG_POINTER (frame_pointer_rtx
) = 1;
5621 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5622 REG_POINTER (arg_pointer_rtx
) = 1;
5624 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5625 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5626 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5627 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5628 REG_POINTER (virtual_cfa_rtx
) = 1;
5630 #ifdef STACK_BOUNDARY
5631 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5632 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5633 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5634 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5636 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5637 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5638 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5639 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5640 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5643 #ifdef INIT_EXPANDERS
5648 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5651 gen_const_vector (enum machine_mode mode
, int constant
)
5656 enum machine_mode inner
;
5658 units
= GET_MODE_NUNITS (mode
);
5659 inner
= GET_MODE_INNER (mode
);
5661 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5663 v
= rtvec_alloc (units
);
5665 /* We need to call this function after we set the scalar const_tiny_rtx
5667 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5669 for (i
= 0; i
< units
; ++i
)
5670 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5672 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5676 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5677 all elements are zero, and the one vector when all elements are one. */
5679 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5681 enum machine_mode inner
= GET_MODE_INNER (mode
);
5682 int nunits
= GET_MODE_NUNITS (mode
);
5686 /* Check to see if all of the elements have the same value. */
5687 x
= RTVEC_ELT (v
, nunits
- 1);
5688 for (i
= nunits
- 2; i
>= 0; i
--)
5689 if (RTVEC_ELT (v
, i
) != x
)
5692 /* If the values are all the same, check to see if we can use one of the
5693 standard constant vectors. */
5696 if (x
== CONST0_RTX (inner
))
5697 return CONST0_RTX (mode
);
5698 else if (x
== CONST1_RTX (inner
))
5699 return CONST1_RTX (mode
);
5700 else if (x
== CONSTM1_RTX (inner
))
5701 return CONSTM1_RTX (mode
);
5704 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5707 /* Initialise global register information required by all functions. */
5710 init_emit_regs (void)
5713 enum machine_mode mode
;
5716 /* Reset register attributes */
5717 htab_empty (reg_attrs_htab
);
5719 /* We need reg_raw_mode, so initialize the modes now. */
5720 init_reg_modes_target ();
5722 /* Assign register numbers to the globally defined register rtx. */
5723 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5724 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5725 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5726 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5727 virtual_incoming_args_rtx
=
5728 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5729 virtual_stack_vars_rtx
=
5730 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5731 virtual_stack_dynamic_rtx
=
5732 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5733 virtual_outgoing_args_rtx
=
5734 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5735 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5736 virtual_preferred_stack_boundary_rtx
=
5737 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5739 /* Initialize RTL for commonly used hard registers. These are
5740 copied into regno_reg_rtx as we begin to compile each function. */
5741 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5742 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5744 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5745 return_address_pointer_rtx
5746 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5749 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5750 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5752 pic_offset_table_rtx
= NULL_RTX
;
5754 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5756 mode
= (enum machine_mode
) i
;
5757 attrs
= ggc_cleared_alloc
<mem_attrs
> ();
5758 attrs
->align
= BITS_PER_UNIT
;
5759 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5760 if (mode
!= BLKmode
)
5762 attrs
->size_known_p
= true;
5763 attrs
->size
= GET_MODE_SIZE (mode
);
5764 if (STRICT_ALIGNMENT
)
5765 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5767 mode_mem_attrs
[i
] = attrs
;
5771 /* Initialize global machine_mode variables. */
5774 init_derived_machine_modes (void)
5776 byte_mode
= VOIDmode
;
5777 word_mode
= VOIDmode
;
5779 for (enum machine_mode mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5781 mode
= GET_MODE_WIDER_MODE (mode
))
5783 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5784 && byte_mode
== VOIDmode
)
5787 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5788 && word_mode
== VOIDmode
)
5792 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5795 /* Create some permanent unique rtl objects shared between all functions. */
5798 init_emit_once (void)
5801 enum machine_mode mode
;
5802 enum machine_mode double_mode
;
5804 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5805 CONST_FIXED, and memory attribute hash tables. */
5806 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5807 const_int_htab_eq
, NULL
);
5809 #if TARGET_SUPPORTS_WIDE_INT
5810 const_wide_int_htab
= htab_create_ggc (37, const_wide_int_htab_hash
,
5811 const_wide_int_htab_eq
, NULL
);
5813 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5814 const_double_htab_eq
, NULL
);
5816 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5817 const_fixed_htab_eq
, NULL
);
5819 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5820 reg_attrs_htab_eq
, NULL
);
5822 #ifdef INIT_EXPANDERS
5823 /* This is to initialize {init|mark|free}_machine_status before the first
5824 call to push_function_context_to. This is needed by the Chill front
5825 end which calls push_function_context_to before the first call to
5826 init_function_start. */
5830 /* Create the unique rtx's for certain rtx codes and operand values. */
5832 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5833 tries to use these variables. */
5834 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5835 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5836 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5838 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5839 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5840 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5842 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5844 double_mode
= mode_for_size (DOUBLE_TYPE_SIZE
, MODE_FLOAT
, 0);
5846 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5847 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5848 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5853 dconsthalf
= dconst1
;
5854 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5856 for (i
= 0; i
< 3; i
++)
5858 const REAL_VALUE_TYPE
*const r
=
5859 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5861 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5863 mode
= GET_MODE_WIDER_MODE (mode
))
5864 const_tiny_rtx
[i
][(int) mode
] =
5865 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5867 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5869 mode
= GET_MODE_WIDER_MODE (mode
))
5870 const_tiny_rtx
[i
][(int) mode
] =
5871 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5873 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5875 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5877 mode
= GET_MODE_WIDER_MODE (mode
))
5878 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5880 for (mode
= MIN_MODE_PARTIAL_INT
;
5881 mode
<= MAX_MODE_PARTIAL_INT
;
5882 mode
= (enum machine_mode
)((int)(mode
) + 1))
5883 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5886 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5888 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5890 mode
= GET_MODE_WIDER_MODE (mode
))
5891 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5893 for (mode
= MIN_MODE_PARTIAL_INT
;
5894 mode
<= MAX_MODE_PARTIAL_INT
;
5895 mode
= (enum machine_mode
)((int)(mode
) + 1))
5896 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5898 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5900 mode
= GET_MODE_WIDER_MODE (mode
))
5902 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5903 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5906 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5908 mode
= GET_MODE_WIDER_MODE (mode
))
5910 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5911 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5914 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5916 mode
= GET_MODE_WIDER_MODE (mode
))
5918 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5919 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5920 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5923 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5925 mode
= GET_MODE_WIDER_MODE (mode
))
5927 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5928 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5931 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5933 mode
= GET_MODE_WIDER_MODE (mode
))
5935 FCONST0 (mode
).data
.high
= 0;
5936 FCONST0 (mode
).data
.low
= 0;
5937 FCONST0 (mode
).mode
= mode
;
5938 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5939 FCONST0 (mode
), mode
);
5942 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5944 mode
= GET_MODE_WIDER_MODE (mode
))
5946 FCONST0 (mode
).data
.high
= 0;
5947 FCONST0 (mode
).data
.low
= 0;
5948 FCONST0 (mode
).mode
= mode
;
5949 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5950 FCONST0 (mode
), mode
);
5953 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5955 mode
= GET_MODE_WIDER_MODE (mode
))
5957 FCONST0 (mode
).data
.high
= 0;
5958 FCONST0 (mode
).data
.low
= 0;
5959 FCONST0 (mode
).mode
= mode
;
5960 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5961 FCONST0 (mode
), mode
);
5963 /* We store the value 1. */
5964 FCONST1 (mode
).data
.high
= 0;
5965 FCONST1 (mode
).data
.low
= 0;
5966 FCONST1 (mode
).mode
= mode
;
5968 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5969 HOST_BITS_PER_DOUBLE_INT
,
5970 SIGNED_FIXED_POINT_MODE_P (mode
));
5971 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5972 FCONST1 (mode
), mode
);
5975 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5977 mode
= GET_MODE_WIDER_MODE (mode
))
5979 FCONST0 (mode
).data
.high
= 0;
5980 FCONST0 (mode
).data
.low
= 0;
5981 FCONST0 (mode
).mode
= mode
;
5982 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5983 FCONST0 (mode
), mode
);
5985 /* We store the value 1. */
5986 FCONST1 (mode
).data
.high
= 0;
5987 FCONST1 (mode
).data
.low
= 0;
5988 FCONST1 (mode
).mode
= mode
;
5990 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5991 HOST_BITS_PER_DOUBLE_INT
,
5992 SIGNED_FIXED_POINT_MODE_P (mode
));
5993 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5994 FCONST1 (mode
), mode
);
5997 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5999 mode
= GET_MODE_WIDER_MODE (mode
))
6001 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6004 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
6006 mode
= GET_MODE_WIDER_MODE (mode
))
6008 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6011 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
6013 mode
= GET_MODE_WIDER_MODE (mode
))
6015 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6016 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6019 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
6021 mode
= GET_MODE_WIDER_MODE (mode
))
6023 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6024 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6027 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6028 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
6029 const_tiny_rtx
[0][i
] = const0_rtx
;
6031 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6032 if (STORE_FLAG_VALUE
== 1)
6033 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6035 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6036 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6037 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6038 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6041 /* Produce exact duplicate of insn INSN after AFTER.
6042 Care updating of libcall regions if present. */
6045 emit_copy_of_insn_after (rtx insn
, rtx after
)
6049 switch (GET_CODE (insn
))
6052 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6056 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6057 CROSSING_JUMP_P (new_rtx
) = CROSSING_JUMP_P (insn
);
6061 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6065 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6066 if (CALL_INSN_FUNCTION_USAGE (insn
))
6067 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6068 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6069 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6070 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6071 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6072 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6073 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6080 /* Update LABEL_NUSES. */
6081 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6083 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6085 /* If the old insn is frame related, then so is the new one. This is
6086 primarily needed for IA-64 unwind info which marks epilogue insns,
6087 which may be duplicated by the basic block reordering code. */
6088 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6090 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6091 will make them. REG_LABEL_TARGETs are created there too, but are
6092 supposed to be sticky, so we copy them. */
6093 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6094 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6096 if (GET_CODE (link
) == EXPR_LIST
)
6097 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6098 copy_insn_1 (XEXP (link
, 0)));
6100 add_shallow_copy_of_reg_note (new_rtx
, link
);
6103 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6107 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6109 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
6111 if (hard_reg_clobbers
[mode
][regno
])
6112 return hard_reg_clobbers
[mode
][regno
];
6114 return (hard_reg_clobbers
[mode
][regno
] =
6115 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6118 location_t prologue_location
;
6119 location_t epilogue_location
;
6121 /* Hold current location information and last location information, so the
6122 datastructures are built lazily only when some instructions in given
6123 place are needed. */
6124 static location_t curr_location
;
6126 /* Allocate insn location datastructure. */
6128 insn_locations_init (void)
6130 prologue_location
= epilogue_location
= 0;
6131 curr_location
= UNKNOWN_LOCATION
;
6134 /* At the end of emit stage, clear current location. */
6136 insn_locations_finalize (void)
6138 epilogue_location
= curr_location
;
6139 curr_location
= UNKNOWN_LOCATION
;
6142 /* Set current location. */
6144 set_curr_insn_location (location_t location
)
6146 curr_location
= location
;
6149 /* Get current location. */
6151 curr_insn_location (void)
6153 return curr_location
;
6156 /* Return lexical scope block insn belongs to. */
6158 insn_scope (const_rtx insn
)
6160 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6163 /* Return line number of the statement that produced this insn. */
6165 insn_line (const_rtx insn
)
6167 return LOCATION_LINE (INSN_LOCATION (insn
));
6170 /* Return source file of the statement that produced this insn. */
6172 insn_file (const_rtx insn
)
6174 return LOCATION_FILE (INSN_LOCATION (insn
));
6177 /* Return true if memory model MODEL requires a pre-operation (release-style)
6178 barrier or a post-operation (acquire-style) barrier. While not universal,
6179 this function matches behavior of several targets. */
6182 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6184 switch (model
& MEMMODEL_MASK
)
6186 case MEMMODEL_RELAXED
:
6187 case MEMMODEL_CONSUME
:
6189 case MEMMODEL_RELEASE
:
6191 case MEMMODEL_ACQUIRE
:
6193 case MEMMODEL_ACQ_REL
:
6194 case MEMMODEL_SEQ_CST
:
6201 #include "gt-emit-rtl.h"