1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
42 #include "basic-block.h"
47 #include "stringpool.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "langhooks.h"
61 struct target_rtl default_target_rtl
;
63 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
66 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
68 /* Commonly used modes. */
70 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
71 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
72 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
73 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
75 /* Datastructures maintained for currently processed function in RTL form. */
77 struct rtl_data x_rtl
;
79 /* Indexed by pseudo register number, gives the rtx for that pseudo.
80 Allocated in parallel with regno_pointer_align.
81 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
82 with length attribute nested in top level structures. */
86 /* This is *not* reset after each function. It gives each CODE_LABEL
87 in the entire compilation a unique label number. */
89 static GTY(()) int label_num
= 1;
91 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
92 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
93 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
94 is set only for MODE_INT and MODE_VECTOR_INT modes. */
96 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
100 REAL_VALUE_TYPE dconst0
;
101 REAL_VALUE_TYPE dconst1
;
102 REAL_VALUE_TYPE dconst2
;
103 REAL_VALUE_TYPE dconstm1
;
104 REAL_VALUE_TYPE dconsthalf
;
106 /* Record fixed-point constant 0 and 1. */
107 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
108 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
110 /* We make one copy of (const_int C) where C is in
111 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
112 to save space during the compilation and simplify comparisons of
115 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
117 /* Standard pieces of rtx, to be substituted directly into things. */
120 rtx simple_return_rtx
;
123 /* A hash table storing CONST_INTs whose absolute value is greater
124 than MAX_SAVED_CONST_INT. */
126 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
127 htab_t const_int_htab
;
129 /* A hash table storing register attribute structures. */
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
131 htab_t reg_attrs_htab
;
133 /* A hash table storing all CONST_DOUBLEs. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
135 htab_t const_double_htab
;
137 /* A hash table storing all CONST_FIXEDs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
139 htab_t const_fixed_htab
;
141 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
142 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
143 #define first_label_num (crtl->emit.x_first_label_num)
145 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
146 static void set_used_decls (tree
);
147 static void mark_label_nuses (rtx
);
148 static hashval_t
const_int_htab_hash (const void *);
149 static int const_int_htab_eq (const void *, const void *);
150 static hashval_t
const_double_htab_hash (const void *);
151 static int const_double_htab_eq (const void *, const void *);
152 static rtx
lookup_const_double (rtx
);
153 static hashval_t
const_fixed_htab_hash (const void *);
154 static int const_fixed_htab_eq (const void *, const void *);
155 static rtx
lookup_const_fixed (rtx
);
156 static hashval_t
reg_attrs_htab_hash (const void *);
157 static int reg_attrs_htab_eq (const void *, const void *);
158 static reg_attrs
*get_reg_attrs (tree
, int);
159 static rtx
gen_const_vector (enum machine_mode
, int);
160 static void copy_rtx_if_shared_1 (rtx
*orig
);
162 /* Probability of the conditional branch currently proceeded by try_split.
163 Set to -1 otherwise. */
164 int split_branch_probability
= -1;
166 /* Returns a hash code for X (which is a really a CONST_INT). */
169 const_int_htab_hash (const void *x
)
171 return (hashval_t
) INTVAL ((const_rtx
) x
);
174 /* Returns nonzero if the value represented by X (which is really a
175 CONST_INT) is the same as that given by Y (which is really a
179 const_int_htab_eq (const void *x
, const void *y
)
181 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
184 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
186 const_double_htab_hash (const void *x
)
188 const_rtx
const value
= (const_rtx
) x
;
191 if (GET_MODE (value
) == VOIDmode
)
192 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
195 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
196 /* MODE is used in the comparison, so it should be in the hash. */
197 h
^= GET_MODE (value
);
202 /* Returns nonzero if the value represented by X (really a ...)
203 is the same as that represented by Y (really a ...) */
205 const_double_htab_eq (const void *x
, const void *y
)
207 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
209 if (GET_MODE (a
) != GET_MODE (b
))
211 if (GET_MODE (a
) == VOIDmode
)
212 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
213 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
215 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
216 CONST_DOUBLE_REAL_VALUE (b
));
219 /* Returns a hash code for X (which is really a CONST_FIXED). */
222 const_fixed_htab_hash (const void *x
)
224 const_rtx
const value
= (const_rtx
) x
;
227 h
= fixed_hash (CONST_FIXED_VALUE (value
));
228 /* MODE is used in the comparison, so it should be in the hash. */
229 h
^= GET_MODE (value
);
233 /* Returns nonzero if the value represented by X (really a ...)
234 is the same as that represented by Y (really a ...). */
237 const_fixed_htab_eq (const void *x
, const void *y
)
239 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
241 if (GET_MODE (a
) != GET_MODE (b
))
243 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
246 /* Return true if the given memory attributes are equal. */
249 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
251 return (p
->alias
== q
->alias
252 && p
->offset_known_p
== q
->offset_known_p
253 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
254 && p
->size_known_p
== q
->size_known_p
255 && (!p
->size_known_p
|| p
->size
== q
->size
)
256 && p
->align
== q
->align
257 && p
->addrspace
== q
->addrspace
258 && (p
->expr
== q
->expr
259 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
260 && operand_equal_p (p
->expr
, q
->expr
, 0))));
263 /* Set MEM's memory attributes so that they are the same as ATTRS. */
266 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
268 /* If everything is the default, we can just clear the attributes. */
269 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
276 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
278 MEM_ATTRS (mem
) = ggc_alloc_mem_attrs ();
279 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
283 /* Returns a hash code for X (which is a really a reg_attrs *). */
286 reg_attrs_htab_hash (const void *x
)
288 const reg_attrs
*const p
= (const reg_attrs
*) x
;
290 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
293 /* Returns nonzero if the value represented by X (which is really a
294 reg_attrs *) is the same as that given by Y (which is also really a
298 reg_attrs_htab_eq (const void *x
, const void *y
)
300 const reg_attrs
*const p
= (const reg_attrs
*) x
;
301 const reg_attrs
*const q
= (const reg_attrs
*) y
;
303 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
305 /* Allocate a new reg_attrs structure and insert it into the hash table if
306 one identical to it is not already in the table. We are doing this for
310 get_reg_attrs (tree decl
, int offset
)
315 /* If everything is the default, we can just return zero. */
316 if (decl
== 0 && offset
== 0)
320 attrs
.offset
= offset
;
322 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
325 *slot
= ggc_alloc_reg_attrs ();
326 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
329 return (reg_attrs
*) *slot
;
334 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
335 and to block register equivalences to be seen across this insn. */
340 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
341 MEM_VOLATILE_P (x
) = true;
347 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
348 don't attempt to share with the various global pieces of rtl (such as
349 frame_pointer_rtx). */
352 gen_raw_REG (enum machine_mode mode
, int regno
)
354 rtx x
= gen_rtx_raw_REG (mode
, regno
);
355 ORIGINAL_REGNO (x
) = regno
;
359 /* There are some RTL codes that require special attention; the generation
360 functions do the raw handling. If you add to this list, modify
361 special_rtx in gengenrtl.c as well. */
364 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
368 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
369 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
371 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
372 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
373 return const_true_rtx
;
376 /* Look up the CONST_INT in the hash table. */
377 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
378 (hashval_t
) arg
, INSERT
);
380 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
386 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
388 return GEN_INT (trunc_int_for_mode (c
, mode
));
391 /* CONST_DOUBLEs might be created from pairs of integers, or from
392 REAL_VALUE_TYPEs. Also, their length is known only at run time,
393 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
395 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
396 hash table. If so, return its counterpart; otherwise add it
397 to the hash table and return it. */
399 lookup_const_double (rtx real
)
401 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
408 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
409 VALUE in mode MODE. */
411 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
413 rtx real
= rtx_alloc (CONST_DOUBLE
);
414 PUT_MODE (real
, mode
);
418 return lookup_const_double (real
);
421 /* Determine whether FIXED, a CONST_FIXED, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
426 lookup_const_fixed (rtx fixed
)
428 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
435 /* Return a CONST_FIXED rtx for a fixed-point value specified by
436 VALUE in mode MODE. */
439 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
441 rtx fixed
= rtx_alloc (CONST_FIXED
);
442 PUT_MODE (fixed
, mode
);
446 return lookup_const_fixed (fixed
);
449 /* Constructs double_int from rtx CST. */
452 rtx_to_double_int (const_rtx cst
)
456 if (CONST_INT_P (cst
))
457 r
= double_int::from_shwi (INTVAL (cst
));
458 else if (CONST_DOUBLE_AS_INT_P (cst
))
460 r
.low
= CONST_DOUBLE_LOW (cst
);
461 r
.high
= CONST_DOUBLE_HIGH (cst
);
470 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
474 immed_double_int_const (double_int i
, enum machine_mode mode
)
476 return immed_double_const (i
.low
, i
.high
, mode
);
479 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
480 of ints: I0 is the low-order word and I1 is the high-order word.
481 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
482 implied upper bits are copies of the high bit of i1. The value
483 itself is neither signed nor unsigned. Do not use this routine for
484 non-integer modes; convert to REAL_VALUE_TYPE and use
485 CONST_DOUBLE_FROM_REAL_VALUE. */
488 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
493 /* There are the following cases (note that there are no modes with
494 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
496 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
498 2) If the value of the integer fits into HOST_WIDE_INT anyway
499 (i.e., i1 consists only from copies of the sign bit, and sign
500 of i0 and i1 are the same), then we return a CONST_INT for i0.
501 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
502 if (mode
!= VOIDmode
)
504 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
505 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
506 /* We can get a 0 for an error mark. */
507 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
508 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
510 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
511 return gen_int_mode (i0
, mode
);
514 /* If this integer fits in one word, return a CONST_INT. */
515 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
518 /* We use VOIDmode for integers. */
519 value
= rtx_alloc (CONST_DOUBLE
);
520 PUT_MODE (value
, VOIDmode
);
522 CONST_DOUBLE_LOW (value
) = i0
;
523 CONST_DOUBLE_HIGH (value
) = i1
;
525 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
526 XWINT (value
, i
) = 0;
528 return lookup_const_double (value
);
532 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
534 /* In case the MD file explicitly references the frame pointer, have
535 all such references point to the same frame pointer. This is
536 used during frame pointer elimination to distinguish the explicit
537 references to these registers from pseudos that happened to be
540 If we have eliminated the frame pointer or arg pointer, we will
541 be using it as a normal register, for example as a spill
542 register. In such cases, we might be accessing it in a mode that
543 is not Pmode and therefore cannot use the pre-allocated rtx.
545 Also don't do this when we are making new REGs in reload, since
546 we don't want to get confused with the real pointers. */
548 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
550 if (regno
== FRAME_POINTER_REGNUM
551 && (!reload_completed
|| frame_pointer_needed
))
552 return frame_pointer_rtx
;
553 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
554 if (regno
== HARD_FRAME_POINTER_REGNUM
555 && (!reload_completed
|| frame_pointer_needed
))
556 return hard_frame_pointer_rtx
;
558 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
559 if (regno
== ARG_POINTER_REGNUM
)
560 return arg_pointer_rtx
;
562 #ifdef RETURN_ADDRESS_POINTER_REGNUM
563 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
564 return return_address_pointer_rtx
;
566 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
567 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
568 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
569 return pic_offset_table_rtx
;
570 if (regno
== STACK_POINTER_REGNUM
)
571 return stack_pointer_rtx
;
575 /* If the per-function register table has been set up, try to re-use
576 an existing entry in that table to avoid useless generation of RTL.
578 This code is disabled for now until we can fix the various backends
579 which depend on having non-shared hard registers in some cases. Long
580 term we want to re-enable this code as it can significantly cut down
581 on the amount of useless RTL that gets generated.
583 We'll also need to fix some code that runs after reload that wants to
584 set ORIGINAL_REGNO. */
589 && regno
< FIRST_PSEUDO_REGISTER
590 && reg_raw_mode
[regno
] == mode
)
591 return regno_reg_rtx
[regno
];
594 return gen_raw_REG (mode
, regno
);
598 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
600 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
602 /* This field is not cleared by the mere allocation of the rtx, so
609 /* Generate a memory referring to non-trapping constant memory. */
612 gen_const_mem (enum machine_mode mode
, rtx addr
)
614 rtx mem
= gen_rtx_MEM (mode
, addr
);
615 MEM_READONLY_P (mem
) = 1;
616 MEM_NOTRAP_P (mem
) = 1;
620 /* Generate a MEM referring to fixed portions of the frame, e.g., register
624 gen_frame_mem (enum machine_mode mode
, rtx addr
)
626 rtx mem
= gen_rtx_MEM (mode
, addr
);
627 MEM_NOTRAP_P (mem
) = 1;
628 set_mem_alias_set (mem
, get_frame_alias_set ());
632 /* Generate a MEM referring to a temporary use of the stack, not part
633 of the fixed stack frame. For example, something which is pushed
634 by a target splitter. */
636 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
638 rtx mem
= gen_rtx_MEM (mode
, addr
);
639 MEM_NOTRAP_P (mem
) = 1;
640 if (!cfun
->calls_alloca
)
641 set_mem_alias_set (mem
, get_frame_alias_set ());
645 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
646 this construct would be valid, and false otherwise. */
649 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
650 const_rtx reg
, unsigned int offset
)
652 unsigned int isize
= GET_MODE_SIZE (imode
);
653 unsigned int osize
= GET_MODE_SIZE (omode
);
655 /* All subregs must be aligned. */
656 if (offset
% osize
!= 0)
659 /* The subreg offset cannot be outside the inner object. */
663 /* ??? This should not be here. Temporarily continue to allow word_mode
664 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
665 Generally, backends are doing something sketchy but it'll take time to
667 if (omode
== word_mode
)
669 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
670 is the culprit here, and not the backends. */
671 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
673 /* Allow component subregs of complex and vector. Though given the below
674 extraction rules, it's not always clear what that means. */
675 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
676 && GET_MODE_INNER (imode
) == omode
)
678 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
679 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
680 represent this. It's questionable if this ought to be represented at
681 all -- why can't this all be hidden in post-reload splitters that make
682 arbitrarily mode changes to the registers themselves. */
683 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
685 /* Subregs involving floating point modes are not allowed to
686 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
687 (subreg:SI (reg:DF) 0) isn't. */
688 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
690 if (! (isize
== osize
691 /* LRA can use subreg to store a floating point value in
692 an integer mode. Although the floating point and the
693 integer modes need the same number of hard registers,
694 the size of floating point mode can be less than the
695 integer mode. LRA also uses subregs for a register
696 should be used in different mode in on insn. */
701 /* Paradoxical subregs must have offset zero. */
705 /* This is a normal subreg. Verify that the offset is representable. */
707 /* For hard registers, we already have most of these rules collected in
708 subreg_offset_representable_p. */
709 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
711 unsigned int regno
= REGNO (reg
);
713 #ifdef CANNOT_CHANGE_MODE_CLASS
714 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
715 && GET_MODE_INNER (imode
) == omode
)
717 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
721 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
724 /* For pseudo registers, we want most of the same checks. Namely:
725 If the register no larger than a word, the subreg must be lowpart.
726 If the register is larger than a word, the subreg must be the lowpart
727 of a subword. A subreg does *not* perform arbitrary bit extraction.
728 Given that we've already checked mode/offset alignment, we only have
729 to check subword subregs here. */
730 if (osize
< UNITS_PER_WORD
731 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
733 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
734 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
735 if (offset
% UNITS_PER_WORD
!= low_off
)
742 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
744 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
745 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
748 /* Generate a SUBREG representing the least-significant part of REG if MODE
749 is smaller than mode of REG, otherwise paradoxical SUBREG. */
752 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
754 enum machine_mode inmode
;
756 inmode
= GET_MODE (reg
);
757 if (inmode
== VOIDmode
)
759 return gen_rtx_SUBREG (mode
, reg
,
760 subreg_lowpart_offset (mode
, inmode
));
764 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
767 gen_rtvec (int n
, ...)
775 /* Don't allocate an empty rtvec... */
782 rt_val
= rtvec_alloc (n
);
784 for (i
= 0; i
< n
; i
++)
785 rt_val
->elem
[i
] = va_arg (p
, rtx
);
792 gen_rtvec_v (int n
, rtx
*argp
)
797 /* Don't allocate an empty rtvec... */
801 rt_val
= rtvec_alloc (n
);
803 for (i
= 0; i
< n
; i
++)
804 rt_val
->elem
[i
] = *argp
++;
809 /* Return the number of bytes between the start of an OUTER_MODE
810 in-memory value and the start of an INNER_MODE in-memory value,
811 given that the former is a lowpart of the latter. It may be a
812 paradoxical lowpart, in which case the offset will be negative
813 on big-endian targets. */
816 byte_lowpart_offset (enum machine_mode outer_mode
,
817 enum machine_mode inner_mode
)
819 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
820 return subreg_lowpart_offset (outer_mode
, inner_mode
);
822 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
825 /* Generate a REG rtx for a new pseudo register of mode MODE.
826 This pseudo is assigned the next sequential register number. */
829 gen_reg_rtx (enum machine_mode mode
)
832 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
834 gcc_assert (can_create_pseudo_p ());
836 /* If a virtual register with bigger mode alignment is generated,
837 increase stack alignment estimation because it might be spilled
839 if (SUPPORTS_STACK_ALIGNMENT
840 && crtl
->stack_alignment_estimated
< align
841 && !crtl
->stack_realign_processed
)
843 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
844 if (crtl
->stack_alignment_estimated
< min_align
)
845 crtl
->stack_alignment_estimated
= min_align
;
848 if (generating_concat_p
849 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
850 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
852 /* For complex modes, don't make a single pseudo.
853 Instead, make a CONCAT of two pseudos.
854 This allows noncontiguous allocation of the real and imaginary parts,
855 which makes much better code. Besides, allocating DCmode
856 pseudos overstrains reload on some machines like the 386. */
857 rtx realpart
, imagpart
;
858 enum machine_mode partmode
= GET_MODE_INNER (mode
);
860 realpart
= gen_reg_rtx (partmode
);
861 imagpart
= gen_reg_rtx (partmode
);
862 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
865 /* Do not call gen_reg_rtx with uninitialized crtl. */
866 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
868 /* Make sure regno_pointer_align, and regno_reg_rtx are large
869 enough to have an element for this pseudo reg number. */
871 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
873 int old_size
= crtl
->emit
.regno_pointer_align_length
;
877 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
878 memset (tmp
+ old_size
, 0, old_size
);
879 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
881 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
882 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
883 regno_reg_rtx
= new1
;
885 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
888 val
= gen_raw_REG (mode
, reg_rtx_no
);
889 regno_reg_rtx
[reg_rtx_no
++] = val
;
893 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
896 reg_is_parm_p (rtx reg
)
900 gcc_assert (REG_P (reg
));
901 decl
= REG_EXPR (reg
);
902 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
905 /* Update NEW with the same attributes as REG, but with OFFSET added
906 to the REG_OFFSET. */
909 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
911 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
912 REG_OFFSET (reg
) + offset
);
915 /* Generate a register with same attributes as REG, but with OFFSET
916 added to the REG_OFFSET. */
919 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
922 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
924 update_reg_offset (new_rtx
, reg
, offset
);
928 /* Generate a new pseudo-register with the same attributes as REG, but
929 with OFFSET added to the REG_OFFSET. */
932 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
934 rtx new_rtx
= gen_reg_rtx (mode
);
936 update_reg_offset (new_rtx
, reg
, offset
);
940 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
941 new register is a (possibly paradoxical) lowpart of the old one. */
944 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
946 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
947 PUT_MODE (reg
, mode
);
950 /* Copy REG's attributes from X, if X has any attributes. If REG and X
951 have different modes, REG is a (possibly paradoxical) lowpart of X. */
954 set_reg_attrs_from_value (rtx reg
, rtx x
)
957 bool can_be_reg_pointer
= true;
959 /* Don't call mark_reg_pointer for incompatible pointer sign
961 while (GET_CODE (x
) == SIGN_EXTEND
962 || GET_CODE (x
) == ZERO_EXTEND
963 || GET_CODE (x
) == TRUNCATE
964 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
966 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
967 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
968 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
969 can_be_reg_pointer
= false;
974 /* Hard registers can be reused for multiple purposes within the same
975 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
977 if (HARD_REGISTER_P (reg
))
980 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
983 if (MEM_OFFSET_KNOWN_P (x
))
984 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
985 MEM_OFFSET (x
) + offset
);
986 if (can_be_reg_pointer
&& MEM_POINTER (x
))
987 mark_reg_pointer (reg
, 0);
992 update_reg_offset (reg
, x
, offset
);
993 if (can_be_reg_pointer
&& REG_POINTER (x
))
994 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
998 /* Generate a REG rtx for a new pseudo register, copying the mode
999 and attributes from X. */
1002 gen_reg_rtx_and_attrs (rtx x
)
1004 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1005 set_reg_attrs_from_value (reg
, x
);
1009 /* Set the register attributes for registers contained in PARM_RTX.
1010 Use needed values from memory attributes of MEM. */
1013 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1015 if (REG_P (parm_rtx
))
1016 set_reg_attrs_from_value (parm_rtx
, mem
);
1017 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1019 /* Check for a NULL entry in the first slot, used to indicate that the
1020 parameter goes both on the stack and in registers. */
1021 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1022 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1024 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1025 if (REG_P (XEXP (x
, 0)))
1026 REG_ATTRS (XEXP (x
, 0))
1027 = get_reg_attrs (MEM_EXPR (mem
),
1028 INTVAL (XEXP (x
, 1)));
1033 /* Set the REG_ATTRS for registers in value X, given that X represents
1037 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1039 if (GET_CODE (x
) == SUBREG
)
1041 gcc_assert (subreg_lowpart_p (x
));
1046 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1048 if (GET_CODE (x
) == CONCAT
)
1050 if (REG_P (XEXP (x
, 0)))
1051 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1052 if (REG_P (XEXP (x
, 1)))
1053 REG_ATTRS (XEXP (x
, 1))
1054 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1056 if (GET_CODE (x
) == PARALLEL
)
1060 /* Check for a NULL entry, used to indicate that the parameter goes
1061 both on the stack and in registers. */
1062 if (XEXP (XVECEXP (x
, 0, 0), 0))
1067 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1069 rtx y
= XVECEXP (x
, 0, i
);
1070 if (REG_P (XEXP (y
, 0)))
1071 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1076 /* Assign the RTX X to declaration T. */
1079 set_decl_rtl (tree t
, rtx x
)
1081 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1083 set_reg_attrs_for_decl_rtl (t
, x
);
1086 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1087 if the ABI requires the parameter to be passed by reference. */
1090 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1092 DECL_INCOMING_RTL (t
) = x
;
1093 if (x
&& !by_reference_p
)
1094 set_reg_attrs_for_decl_rtl (t
, x
);
1097 /* Identify REG (which may be a CONCAT) as a user register. */
1100 mark_user_reg (rtx reg
)
1102 if (GET_CODE (reg
) == CONCAT
)
1104 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1105 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1109 gcc_assert (REG_P (reg
));
1110 REG_USERVAR_P (reg
) = 1;
1114 /* Identify REG as a probable pointer register and show its alignment
1115 as ALIGN, if nonzero. */
1118 mark_reg_pointer (rtx reg
, int align
)
1120 if (! REG_POINTER (reg
))
1122 REG_POINTER (reg
) = 1;
1125 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1127 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1128 /* We can no-longer be sure just how aligned this pointer is. */
1129 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1132 /* Return 1 plus largest pseudo reg number used in the current function. */
1140 /* Return 1 + the largest label number used so far in the current function. */
1143 max_label_num (void)
1148 /* Return first label number used in this function (if any were used). */
1151 get_first_label_num (void)
1153 return first_label_num
;
1156 /* If the rtx for label was created during the expansion of a nested
1157 function, then first_label_num won't include this label number.
1158 Fix this now so that array indices work later. */
1161 maybe_set_first_label_num (rtx x
)
1163 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1164 first_label_num
= CODE_LABEL_NUMBER (x
);
1167 /* Return a value representing some low-order bits of X, where the number
1168 of low-order bits is given by MODE. Note that no conversion is done
1169 between floating-point and fixed-point values, rather, the bit
1170 representation is returned.
1172 This function handles the cases in common between gen_lowpart, below,
1173 and two variants in cse.c and combine.c. These are the cases that can
1174 be safely handled at all points in the compilation.
1176 If this is not a case we can handle, return 0. */
1179 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1181 int msize
= GET_MODE_SIZE (mode
);
1184 enum machine_mode innermode
;
1186 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1187 so we have to make one up. Yuk. */
1188 innermode
= GET_MODE (x
);
1190 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1191 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1192 else if (innermode
== VOIDmode
)
1193 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1195 xsize
= GET_MODE_SIZE (innermode
);
1197 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1199 if (innermode
== mode
)
1202 /* MODE must occupy no more words than the mode of X. */
1203 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1204 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1207 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1208 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1211 offset
= subreg_lowpart_offset (mode
, innermode
);
1213 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1214 && (GET_MODE_CLASS (mode
) == MODE_INT
1215 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1217 /* If we are getting the low-order part of something that has been
1218 sign- or zero-extended, we can either just use the object being
1219 extended or make a narrower extension. If we want an even smaller
1220 piece than the size of the object being extended, call ourselves
1223 This case is used mostly by combine and cse. */
1225 if (GET_MODE (XEXP (x
, 0)) == mode
)
1227 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1228 return gen_lowpart_common (mode
, XEXP (x
, 0));
1229 else if (msize
< xsize
)
1230 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1232 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1233 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1234 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1235 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1237 /* Otherwise, we can't do this. */
1242 gen_highpart (enum machine_mode mode
, rtx x
)
1244 unsigned int msize
= GET_MODE_SIZE (mode
);
1247 /* This case loses if X is a subreg. To catch bugs early,
1248 complain if an invalid MODE is used even in other cases. */
1249 gcc_assert (msize
<= UNITS_PER_WORD
1250 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1252 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1253 subreg_highpart_offset (mode
, GET_MODE (x
)));
1254 gcc_assert (result
);
1256 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1257 the target if we have a MEM. gen_highpart must return a valid operand,
1258 emitting code if necessary to do so. */
1261 result
= validize_mem (result
);
1262 gcc_assert (result
);
1268 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1269 be VOIDmode constant. */
1271 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1273 if (GET_MODE (exp
) != VOIDmode
)
1275 gcc_assert (GET_MODE (exp
) == innermode
);
1276 return gen_highpart (outermode
, exp
);
1278 return simplify_gen_subreg (outermode
, exp
, innermode
,
1279 subreg_highpart_offset (outermode
, innermode
));
1282 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1285 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1287 unsigned int offset
= 0;
1288 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1292 if (WORDS_BIG_ENDIAN
)
1293 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1294 if (BYTES_BIG_ENDIAN
)
1295 offset
+= difference
% UNITS_PER_WORD
;
1301 /* Return offset in bytes to get OUTERMODE high part
1302 of the value in mode INNERMODE stored in memory in target format. */
1304 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1306 unsigned int offset
= 0;
1307 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1309 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1313 if (! WORDS_BIG_ENDIAN
)
1314 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1315 if (! BYTES_BIG_ENDIAN
)
1316 offset
+= difference
% UNITS_PER_WORD
;
1322 /* Return 1 iff X, assumed to be a SUBREG,
1323 refers to the least significant part of its containing reg.
1324 If X is not a SUBREG, always return 1 (it is its own low part!). */
1327 subreg_lowpart_p (const_rtx x
)
1329 if (GET_CODE (x
) != SUBREG
)
1331 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1334 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1335 == SUBREG_BYTE (x
));
1338 /* Return true if X is a paradoxical subreg, false otherwise. */
1340 paradoxical_subreg_p (const_rtx x
)
1342 if (GET_CODE (x
) != SUBREG
)
1344 return (GET_MODE_PRECISION (GET_MODE (x
))
1345 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1348 /* Return subword OFFSET of operand OP.
1349 The word number, OFFSET, is interpreted as the word number starting
1350 at the low-order address. OFFSET 0 is the low-order word if not
1351 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1353 If we cannot extract the required word, we return zero. Otherwise,
1354 an rtx corresponding to the requested word will be returned.
1356 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1357 reload has completed, a valid address will always be returned. After
1358 reload, if a valid address cannot be returned, we return zero.
1360 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1361 it is the responsibility of the caller.
1363 MODE is the mode of OP in case it is a CONST_INT.
1365 ??? This is still rather broken for some cases. The problem for the
1366 moment is that all callers of this thing provide no 'goal mode' to
1367 tell us to work with. This exists because all callers were written
1368 in a word based SUBREG world.
1369 Now use of this function can be deprecated by simplify_subreg in most
1374 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1376 if (mode
== VOIDmode
)
1377 mode
= GET_MODE (op
);
1379 gcc_assert (mode
!= VOIDmode
);
1381 /* If OP is narrower than a word, fail. */
1383 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1386 /* If we want a word outside OP, return zero. */
1388 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1391 /* Form a new MEM at the requested address. */
1394 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1396 if (! validate_address
)
1399 else if (reload_completed
)
1401 if (! strict_memory_address_addr_space_p (word_mode
,
1403 MEM_ADDR_SPACE (op
)))
1407 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1410 /* Rest can be handled by simplify_subreg. */
1411 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1414 /* Similar to `operand_subword', but never return 0. If we can't
1415 extract the required subword, put OP into a register and try again.
1416 The second attempt must succeed. We always validate the address in
1419 MODE is the mode of OP, in case it is CONST_INT. */
1422 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1424 rtx result
= operand_subword (op
, offset
, 1, mode
);
1429 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1431 /* If this is a register which can not be accessed by words, copy it
1432 to a pseudo register. */
1434 op
= copy_to_reg (op
);
1436 op
= force_reg (mode
, op
);
1439 result
= operand_subword (op
, offset
, 1, mode
);
1440 gcc_assert (result
);
1445 /* Returns 1 if both MEM_EXPR can be considered equal
1449 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1454 if (! expr1
|| ! expr2
)
1457 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1460 return operand_equal_p (expr1
, expr2
, 0);
1463 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1464 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1468 get_mem_align_offset (rtx mem
, unsigned int align
)
1471 unsigned HOST_WIDE_INT offset
;
1473 /* This function can't use
1474 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1475 || (MAX (MEM_ALIGN (mem),
1476 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1480 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1482 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1483 for <variable>. get_inner_reference doesn't handle it and
1484 even if it did, the alignment in that case needs to be determined
1485 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1486 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1487 isn't sufficiently aligned, the object it is in might be. */
1488 gcc_assert (MEM_P (mem
));
1489 expr
= MEM_EXPR (mem
);
1490 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1493 offset
= MEM_OFFSET (mem
);
1496 if (DECL_ALIGN (expr
) < align
)
1499 else if (INDIRECT_REF_P (expr
))
1501 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1504 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1508 tree inner
= TREE_OPERAND (expr
, 0);
1509 tree field
= TREE_OPERAND (expr
, 1);
1510 tree byte_offset
= component_ref_field_offset (expr
);
1511 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1514 || !tree_fits_uhwi_p (byte_offset
)
1515 || !tree_fits_uhwi_p (bit_offset
))
1518 offset
+= tree_to_uhwi (byte_offset
);
1519 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1521 if (inner
== NULL_TREE
)
1523 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1524 < (unsigned int) align
)
1528 else if (DECL_P (inner
))
1530 if (DECL_ALIGN (inner
) < align
)
1534 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1542 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1545 /* Given REF (a MEM) and T, either the type of X or the expression
1546 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1547 if we are making a new object of this type. BITPOS is nonzero if
1548 there is an offset outstanding on T that will be applied later. */
1551 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1552 HOST_WIDE_INT bitpos
)
1554 HOST_WIDE_INT apply_bitpos
= 0;
1556 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1559 /* It can happen that type_for_mode was given a mode for which there
1560 is no language-level type. In which case it returns NULL, which
1565 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1566 if (type
== error_mark_node
)
1569 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1570 wrong answer, as it assumes that DECL_RTL already has the right alias
1571 info. Callers should not set DECL_RTL until after the call to
1572 set_mem_attributes. */
1573 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1575 memset (&attrs
, 0, sizeof (attrs
));
1577 /* Get the alias set from the expression or type (perhaps using a
1578 front-end routine) and use it. */
1579 attrs
.alias
= get_alias_set (t
);
1581 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1582 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1584 /* Default values from pre-existing memory attributes if present. */
1585 refattrs
= MEM_ATTRS (ref
);
1588 /* ??? Can this ever happen? Calling this routine on a MEM that
1589 already carries memory attributes should probably be invalid. */
1590 attrs
.expr
= refattrs
->expr
;
1591 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1592 attrs
.offset
= refattrs
->offset
;
1593 attrs
.size_known_p
= refattrs
->size_known_p
;
1594 attrs
.size
= refattrs
->size
;
1595 attrs
.align
= refattrs
->align
;
1598 /* Otherwise, default values from the mode of the MEM reference. */
1601 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1602 gcc_assert (!defattrs
->expr
);
1603 gcc_assert (!defattrs
->offset_known_p
);
1605 /* Respect mode size. */
1606 attrs
.size_known_p
= defattrs
->size_known_p
;
1607 attrs
.size
= defattrs
->size
;
1608 /* ??? Is this really necessary? We probably should always get
1609 the size from the type below. */
1611 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1612 if T is an object, always compute the object alignment below. */
1614 attrs
.align
= defattrs
->align
;
1616 attrs
.align
= BITS_PER_UNIT
;
1617 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1618 e.g. if the type carries an alignment attribute. Should we be
1619 able to simply always use TYPE_ALIGN? */
1622 /* We can set the alignment from the type if we are making an object,
1623 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1624 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1625 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1627 /* If the size is known, we can set that. */
1628 tree new_size
= TYPE_SIZE_UNIT (type
);
1630 /* The address-space is that of the type. */
1631 as
= TYPE_ADDR_SPACE (type
);
1633 /* If T is not a type, we may be able to deduce some more information about
1639 if (TREE_THIS_VOLATILE (t
))
1640 MEM_VOLATILE_P (ref
) = 1;
1642 /* Now remove any conversions: they don't change what the underlying
1643 object is. Likewise for SAVE_EXPR. */
1644 while (CONVERT_EXPR_P (t
)
1645 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1646 || TREE_CODE (t
) == SAVE_EXPR
)
1647 t
= TREE_OPERAND (t
, 0);
1649 /* Note whether this expression can trap. */
1650 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1652 base
= get_base_address (t
);
1656 && TREE_READONLY (base
)
1657 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1658 && !TREE_THIS_VOLATILE (base
))
1659 MEM_READONLY_P (ref
) = 1;
1661 /* Mark static const strings readonly as well. */
1662 if (TREE_CODE (base
) == STRING_CST
1663 && TREE_READONLY (base
)
1664 && TREE_STATIC (base
))
1665 MEM_READONLY_P (ref
) = 1;
1667 /* Address-space information is on the base object. */
1668 if (TREE_CODE (base
) == MEM_REF
1669 || TREE_CODE (base
) == TARGET_MEM_REF
)
1670 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1673 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1676 /* If this expression uses it's parent's alias set, mark it such
1677 that we won't change it. */
1678 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1679 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1681 /* If this is a decl, set the attributes of the MEM from it. */
1685 attrs
.offset_known_p
= true;
1687 apply_bitpos
= bitpos
;
1688 new_size
= DECL_SIZE_UNIT (t
);
1691 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1692 else if (CONSTANT_CLASS_P (t
))
1695 /* If this is a field reference, record it. */
1696 else if (TREE_CODE (t
) == COMPONENT_REF
)
1699 attrs
.offset_known_p
= true;
1701 apply_bitpos
= bitpos
;
1702 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1703 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1706 /* If this is an array reference, look for an outer field reference. */
1707 else if (TREE_CODE (t
) == ARRAY_REF
)
1709 tree off_tree
= size_zero_node
;
1710 /* We can't modify t, because we use it at the end of the
1716 tree index
= TREE_OPERAND (t2
, 1);
1717 tree low_bound
= array_ref_low_bound (t2
);
1718 tree unit_size
= array_ref_element_size (t2
);
1720 /* We assume all arrays have sizes that are a multiple of a byte.
1721 First subtract the lower bound, if any, in the type of the
1722 index, then convert to sizetype and multiply by the size of
1723 the array element. */
1724 if (! integer_zerop (low_bound
))
1725 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1728 off_tree
= size_binop (PLUS_EXPR
,
1729 size_binop (MULT_EXPR
,
1730 fold_convert (sizetype
,
1734 t2
= TREE_OPERAND (t2
, 0);
1736 while (TREE_CODE (t2
) == ARRAY_REF
);
1739 || TREE_CODE (t2
) == COMPONENT_REF
)
1742 attrs
.offset_known_p
= false;
1743 if (tree_fits_uhwi_p (off_tree
))
1745 attrs
.offset_known_p
= true;
1746 attrs
.offset
= tree_to_uhwi (off_tree
);
1747 apply_bitpos
= bitpos
;
1750 /* Else do not record a MEM_EXPR. */
1753 /* If this is an indirect reference, record it. */
1754 else if (TREE_CODE (t
) == MEM_REF
1755 || TREE_CODE (t
) == TARGET_MEM_REF
)
1758 attrs
.offset_known_p
= true;
1760 apply_bitpos
= bitpos
;
1763 /* Compute the alignment. */
1764 unsigned int obj_align
;
1765 unsigned HOST_WIDE_INT obj_bitpos
;
1766 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1767 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1768 if (obj_bitpos
!= 0)
1769 obj_align
= (obj_bitpos
& -obj_bitpos
);
1770 attrs
.align
= MAX (attrs
.align
, obj_align
);
1773 if (tree_fits_uhwi_p (new_size
))
1775 attrs
.size_known_p
= true;
1776 attrs
.size
= tree_to_uhwi (new_size
);
1779 /* If we modified OFFSET based on T, then subtract the outstanding
1780 bit position offset. Similarly, increase the size of the accessed
1781 object to contain the negative offset. */
1784 gcc_assert (attrs
.offset_known_p
);
1785 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1786 if (attrs
.size_known_p
)
1787 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1790 /* Now set the attributes we computed above. */
1791 attrs
.addrspace
= as
;
1792 set_mem_attrs (ref
, &attrs
);
1796 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1798 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1801 /* Set the alias set of MEM to SET. */
1804 set_mem_alias_set (rtx mem
, alias_set_type set
)
1806 struct mem_attrs attrs
;
1808 /* If the new and old alias sets don't conflict, something is wrong. */
1809 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1810 attrs
= *get_mem_attrs (mem
);
1812 set_mem_attrs (mem
, &attrs
);
1815 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1818 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1820 struct mem_attrs attrs
;
1822 attrs
= *get_mem_attrs (mem
);
1823 attrs
.addrspace
= addrspace
;
1824 set_mem_attrs (mem
, &attrs
);
1827 /* Set the alignment of MEM to ALIGN bits. */
1830 set_mem_align (rtx mem
, unsigned int align
)
1832 struct mem_attrs attrs
;
1834 attrs
= *get_mem_attrs (mem
);
1835 attrs
.align
= align
;
1836 set_mem_attrs (mem
, &attrs
);
1839 /* Set the expr for MEM to EXPR. */
1842 set_mem_expr (rtx mem
, tree expr
)
1844 struct mem_attrs attrs
;
1846 attrs
= *get_mem_attrs (mem
);
1848 set_mem_attrs (mem
, &attrs
);
1851 /* Set the offset of MEM to OFFSET. */
1854 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1856 struct mem_attrs attrs
;
1858 attrs
= *get_mem_attrs (mem
);
1859 attrs
.offset_known_p
= true;
1860 attrs
.offset
= offset
;
1861 set_mem_attrs (mem
, &attrs
);
1864 /* Clear the offset of MEM. */
1867 clear_mem_offset (rtx mem
)
1869 struct mem_attrs attrs
;
1871 attrs
= *get_mem_attrs (mem
);
1872 attrs
.offset_known_p
= false;
1873 set_mem_attrs (mem
, &attrs
);
1876 /* Set the size of MEM to SIZE. */
1879 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
1881 struct mem_attrs attrs
;
1883 attrs
= *get_mem_attrs (mem
);
1884 attrs
.size_known_p
= true;
1886 set_mem_attrs (mem
, &attrs
);
1889 /* Clear the size of MEM. */
1892 clear_mem_size (rtx mem
)
1894 struct mem_attrs attrs
;
1896 attrs
= *get_mem_attrs (mem
);
1897 attrs
.size_known_p
= false;
1898 set_mem_attrs (mem
, &attrs
);
1901 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1902 and its address changed to ADDR. (VOIDmode means don't change the mode.
1903 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1904 returned memory location is required to be valid. The memory
1905 attributes are not changed. */
1908 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1913 gcc_assert (MEM_P (memref
));
1914 as
= MEM_ADDR_SPACE (memref
);
1915 if (mode
== VOIDmode
)
1916 mode
= GET_MODE (memref
);
1918 addr
= XEXP (memref
, 0);
1919 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1920 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
1923 /* Don't validate address for LRA. LRA can make the address valid
1924 by itself in most efficient way. */
1925 if (validate
&& !lra_in_progress
)
1927 if (reload_in_progress
|| reload_completed
)
1928 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
1930 addr
= memory_address_addr_space (mode
, addr
, as
);
1933 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1936 new_rtx
= gen_rtx_MEM (mode
, addr
);
1937 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1941 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1942 way we are changing MEMREF, so we only preserve the alias set. */
1945 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1947 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1);
1948 enum machine_mode mmode
= GET_MODE (new_rtx
);
1949 struct mem_attrs attrs
, *defattrs
;
1951 attrs
= *get_mem_attrs (memref
);
1952 defattrs
= mode_mem_attrs
[(int) mmode
];
1953 attrs
.expr
= NULL_TREE
;
1954 attrs
.offset_known_p
= false;
1955 attrs
.size_known_p
= defattrs
->size_known_p
;
1956 attrs
.size
= defattrs
->size
;
1957 attrs
.align
= defattrs
->align
;
1959 /* If there are no changes, just return the original memory reference. */
1960 if (new_rtx
== memref
)
1962 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
1965 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1966 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
1969 set_mem_attrs (new_rtx
, &attrs
);
1973 /* Return a memory reference like MEMREF, but with its mode changed
1974 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1975 nonzero, the memory address is forced to be valid.
1976 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
1977 and the caller is responsible for adjusting MEMREF base register.
1978 If ADJUST_OBJECT is zero, the underlying object associated with the
1979 memory reference is left unchanged and the caller is responsible for
1980 dealing with it. Otherwise, if the new memory reference is outside
1981 the underlying object, even partially, then the object is dropped.
1982 SIZE, if nonzero, is the size of an access in cases where MODE
1983 has no inherent size. */
1986 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1987 int validate
, int adjust_address
, int adjust_object
,
1990 rtx addr
= XEXP (memref
, 0);
1992 enum machine_mode address_mode
;
1994 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
1995 unsigned HOST_WIDE_INT max_align
;
1996 #ifdef POINTERS_EXTEND_UNSIGNED
1997 enum machine_mode pointer_mode
1998 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2001 /* VOIDmode means no mode change for change_address_1. */
2002 if (mode
== VOIDmode
)
2003 mode
= GET_MODE (memref
);
2005 /* Take the size of non-BLKmode accesses from the mode. */
2006 defattrs
= mode_mem_attrs
[(int) mode
];
2007 if (defattrs
->size_known_p
)
2008 size
= defattrs
->size
;
2010 /* If there are no changes, just return the original memory reference. */
2011 if (mode
== GET_MODE (memref
) && !offset
2012 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2013 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2017 /* ??? Prefer to create garbage instead of creating shared rtl.
2018 This may happen even if offset is nonzero -- consider
2019 (plus (plus reg reg) const_int) -- so do this always. */
2020 addr
= copy_rtx (addr
);
2022 /* Convert a possibly large offset to a signed value within the
2023 range of the target address space. */
2024 address_mode
= get_address_mode (memref
);
2025 pbits
= GET_MODE_BITSIZE (address_mode
);
2026 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2028 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2029 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2035 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2036 object, we can merge it into the LO_SUM. */
2037 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2039 && (unsigned HOST_WIDE_INT
) offset
2040 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2041 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2042 plus_constant (address_mode
,
2043 XEXP (addr
, 1), offset
));
2044 #ifdef POINTERS_EXTEND_UNSIGNED
2045 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2046 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2047 the fact that pointers are not allowed to overflow. */
2048 else if (POINTERS_EXTEND_UNSIGNED
> 0
2049 && GET_CODE (addr
) == ZERO_EXTEND
2050 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2051 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2052 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2053 plus_constant (pointer_mode
,
2054 XEXP (addr
, 0), offset
));
2057 addr
= plus_constant (address_mode
, addr
, offset
);
2060 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2062 /* If the address is a REG, change_address_1 rightfully returns memref,
2063 but this would destroy memref's MEM_ATTRS. */
2064 if (new_rtx
== memref
&& offset
!= 0)
2065 new_rtx
= copy_rtx (new_rtx
);
2067 /* Conservatively drop the object if we don't know where we start from. */
2068 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2070 attrs
.expr
= NULL_TREE
;
2074 /* Compute the new values of the memory attributes due to this adjustment.
2075 We add the offsets and update the alignment. */
2076 if (attrs
.offset_known_p
)
2078 attrs
.offset
+= offset
;
2080 /* Drop the object if the new left end is not within its bounds. */
2081 if (adjust_object
&& attrs
.offset
< 0)
2083 attrs
.expr
= NULL_TREE
;
2088 /* Compute the new alignment by taking the MIN of the alignment and the
2089 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2093 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2094 attrs
.align
= MIN (attrs
.align
, max_align
);
2099 /* Drop the object if the new right end is not within its bounds. */
2100 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2102 attrs
.expr
= NULL_TREE
;
2105 attrs
.size_known_p
= true;
2108 else if (attrs
.size_known_p
)
2110 gcc_assert (!adjust_object
);
2111 attrs
.size
-= offset
;
2112 /* ??? The store_by_pieces machinery generates negative sizes,
2113 so don't assert for that here. */
2116 set_mem_attrs (new_rtx
, &attrs
);
2121 /* Return a memory reference like MEMREF, but with its mode changed
2122 to MODE and its address changed to ADDR, which is assumed to be
2123 MEMREF offset by OFFSET bytes. If VALIDATE is
2124 nonzero, the memory address is forced to be valid. */
2127 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2128 HOST_WIDE_INT offset
, int validate
)
2130 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2131 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2134 /* Return a memory reference like MEMREF, but whose address is changed by
2135 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2136 known to be in OFFSET (possibly 1). */
2139 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2141 rtx new_rtx
, addr
= XEXP (memref
, 0);
2142 enum machine_mode address_mode
;
2143 struct mem_attrs attrs
, *defattrs
;
2145 attrs
= *get_mem_attrs (memref
);
2146 address_mode
= get_address_mode (memref
);
2147 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2149 /* At this point we don't know _why_ the address is invalid. It
2150 could have secondary memory references, multiplies or anything.
2152 However, if we did go and rearrange things, we can wind up not
2153 being able to recognize the magic around pic_offset_table_rtx.
2154 This stuff is fragile, and is yet another example of why it is
2155 bad to expose PIC machinery too early. */
2156 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2158 && GET_CODE (addr
) == PLUS
2159 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2161 addr
= force_reg (GET_MODE (addr
), addr
);
2162 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2165 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2166 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2168 /* If there are no changes, just return the original memory reference. */
2169 if (new_rtx
== memref
)
2172 /* Update the alignment to reflect the offset. Reset the offset, which
2174 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2175 attrs
.offset_known_p
= false;
2176 attrs
.size_known_p
= defattrs
->size_known_p
;
2177 attrs
.size
= defattrs
->size
;
2178 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2179 set_mem_attrs (new_rtx
, &attrs
);
2183 /* Return a memory reference like MEMREF, but with its address changed to
2184 ADDR. The caller is asserting that the actual piece of memory pointed
2185 to is the same, just the form of the address is being changed, such as
2186 by putting something into a register. */
2189 replace_equiv_address (rtx memref
, rtx addr
)
2191 /* change_address_1 copies the memory attribute structure without change
2192 and that's exactly what we want here. */
2193 update_temp_slot_address (XEXP (memref
, 0), addr
);
2194 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2197 /* Likewise, but the reference is not required to be valid. */
2200 replace_equiv_address_nv (rtx memref
, rtx addr
)
2202 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2205 /* Return a memory reference like MEMREF, but with its mode widened to
2206 MODE and offset by OFFSET. This would be used by targets that e.g.
2207 cannot issue QImode memory operations and have to use SImode memory
2208 operations plus masking logic. */
2211 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2213 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2214 struct mem_attrs attrs
;
2215 unsigned int size
= GET_MODE_SIZE (mode
);
2217 /* If there are no changes, just return the original memory reference. */
2218 if (new_rtx
== memref
)
2221 attrs
= *get_mem_attrs (new_rtx
);
2223 /* If we don't know what offset we were at within the expression, then
2224 we can't know if we've overstepped the bounds. */
2225 if (! attrs
.offset_known_p
)
2226 attrs
.expr
= NULL_TREE
;
2230 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2232 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2233 tree offset
= component_ref_field_offset (attrs
.expr
);
2235 if (! DECL_SIZE_UNIT (field
))
2237 attrs
.expr
= NULL_TREE
;
2241 /* Is the field at least as large as the access? If so, ok,
2242 otherwise strip back to the containing structure. */
2243 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2244 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2245 && attrs
.offset
>= 0)
2248 if (! tree_fits_uhwi_p (offset
))
2250 attrs
.expr
= NULL_TREE
;
2254 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2255 attrs
.offset
+= tree_to_uhwi (offset
);
2256 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2259 /* Similarly for the decl. */
2260 else if (DECL_P (attrs
.expr
)
2261 && DECL_SIZE_UNIT (attrs
.expr
)
2262 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2263 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2264 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2268 /* The widened memory access overflows the expression, which means
2269 that it could alias another expression. Zap it. */
2270 attrs
.expr
= NULL_TREE
;
2276 attrs
.offset_known_p
= false;
2278 /* The widened memory may alias other stuff, so zap the alias set. */
2279 /* ??? Maybe use get_alias_set on any remaining expression. */
2281 attrs
.size_known_p
= true;
2283 set_mem_attrs (new_rtx
, &attrs
);
2287 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2288 static GTY(()) tree spill_slot_decl
;
2291 get_spill_slot_decl (bool force_build_p
)
2293 tree d
= spill_slot_decl
;
2295 struct mem_attrs attrs
;
2297 if (d
|| !force_build_p
)
2300 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2301 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2302 DECL_ARTIFICIAL (d
) = 1;
2303 DECL_IGNORED_P (d
) = 1;
2305 spill_slot_decl
= d
;
2307 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2308 MEM_NOTRAP_P (rd
) = 1;
2309 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2310 attrs
.alias
= new_alias_set ();
2312 set_mem_attrs (rd
, &attrs
);
2313 SET_DECL_RTL (d
, rd
);
2318 /* Given MEM, a result from assign_stack_local, fill in the memory
2319 attributes as appropriate for a register allocator spill slot.
2320 These slots are not aliasable by other memory. We arrange for
2321 them all to use a single MEM_EXPR, so that the aliasing code can
2322 work properly in the case of shared spill slots. */
2325 set_mem_attrs_for_spill (rtx mem
)
2327 struct mem_attrs attrs
;
2330 attrs
= *get_mem_attrs (mem
);
2331 attrs
.expr
= get_spill_slot_decl (true);
2332 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2333 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2335 /* We expect the incoming memory to be of the form:
2336 (mem:MODE (plus (reg sfp) (const_int offset)))
2337 with perhaps the plus missing for offset = 0. */
2338 addr
= XEXP (mem
, 0);
2339 attrs
.offset_known_p
= true;
2341 if (GET_CODE (addr
) == PLUS
2342 && CONST_INT_P (XEXP (addr
, 1)))
2343 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2345 set_mem_attrs (mem
, &attrs
);
2346 MEM_NOTRAP_P (mem
) = 1;
2349 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2352 gen_label_rtx (void)
2354 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2355 NULL
, label_num
++, NULL
);
2358 /* For procedure integration. */
2360 /* Install new pointers to the first and last insns in the chain.
2361 Also, set cur_insn_uid to one higher than the last in use.
2362 Used for an inline-procedure after copying the insn chain. */
2365 set_new_first_and_last_insn (rtx first
, rtx last
)
2369 set_first_insn (first
);
2370 set_last_insn (last
);
2373 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2375 int debug_count
= 0;
2377 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2378 cur_debug_insn_uid
= 0;
2380 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2381 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2382 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2385 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2386 if (DEBUG_INSN_P (insn
))
2391 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2393 cur_debug_insn_uid
++;
2396 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2397 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2402 /* Go through all the RTL insn bodies and copy any invalid shared
2403 structure. This routine should only be called once. */
2406 unshare_all_rtl_1 (rtx insn
)
2408 /* Unshare just about everything else. */
2409 unshare_all_rtl_in_chain (insn
);
2411 /* Make sure the addresses of stack slots found outside the insn chain
2412 (such as, in DECL_RTL of a variable) are not shared
2413 with the insn chain.
2415 This special care is necessary when the stack slot MEM does not
2416 actually appear in the insn chain. If it does appear, its address
2417 is unshared from all else at that point. */
2418 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2421 /* Go through all the RTL insn bodies and copy any invalid shared
2422 structure, again. This is a fairly expensive thing to do so it
2423 should be done sparingly. */
2426 unshare_all_rtl_again (rtx insn
)
2431 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2434 reset_used_flags (PATTERN (p
));
2435 reset_used_flags (REG_NOTES (p
));
2437 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2440 /* Make sure that virtual stack slots are not shared. */
2441 set_used_decls (DECL_INITIAL (cfun
->decl
));
2443 /* Make sure that virtual parameters are not shared. */
2444 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2445 set_used_flags (DECL_RTL (decl
));
2447 reset_used_flags (stack_slot_list
);
2449 unshare_all_rtl_1 (insn
);
2453 unshare_all_rtl (void)
2455 unshare_all_rtl_1 (get_insns ());
2460 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2461 Recursively does the same for subexpressions. */
2464 verify_rtx_sharing (rtx orig
, rtx insn
)
2469 const char *format_ptr
;
2474 code
= GET_CODE (x
);
2476 /* These types may be freely shared. */
2492 /* SCRATCH must be shared because they represent distinct values. */
2495 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2496 clobbers or clobbers of hard registers that originated as pseudos.
2497 This is needed to allow safe register renaming. */
2498 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2499 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2504 if (shared_const_p (orig
))
2509 /* A MEM is allowed to be shared if its address is constant. */
2510 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2511 || reload_completed
|| reload_in_progress
)
2520 /* This rtx may not be shared. If it has already been seen,
2521 replace it with a copy of itself. */
2522 #ifdef ENABLE_CHECKING
2523 if (RTX_FLAG (x
, used
))
2525 error ("invalid rtl sharing found in the insn");
2527 error ("shared rtx");
2529 internal_error ("internal consistency failure");
2532 gcc_assert (!RTX_FLAG (x
, used
));
2534 RTX_FLAG (x
, used
) = 1;
2536 /* Now scan the subexpressions recursively. */
2538 format_ptr
= GET_RTX_FORMAT (code
);
2540 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2542 switch (*format_ptr
++)
2545 verify_rtx_sharing (XEXP (x
, i
), insn
);
2549 if (XVEC (x
, i
) != NULL
)
2552 int len
= XVECLEN (x
, i
);
2554 for (j
= 0; j
< len
; j
++)
2556 /* We allow sharing of ASM_OPERANDS inside single
2558 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2559 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2561 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2563 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2572 /* Reset used-flags for INSN. */
2575 reset_insn_used_flags (rtx insn
)
2577 gcc_assert (INSN_P (insn
));
2578 reset_used_flags (PATTERN (insn
));
2579 reset_used_flags (REG_NOTES (insn
));
2581 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2584 /* Go through all the RTL insn bodies and clear all the USED bits. */
2587 reset_all_used_flags (void)
2591 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2594 rtx pat
= PATTERN (p
);
2595 if (GET_CODE (pat
) != SEQUENCE
)
2596 reset_insn_used_flags (p
);
2599 gcc_assert (REG_NOTES (p
) == NULL
);
2600 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2601 reset_insn_used_flags (XVECEXP (pat
, 0, i
));
2606 /* Verify sharing in INSN. */
2609 verify_insn_sharing (rtx insn
)
2611 gcc_assert (INSN_P (insn
));
2612 reset_used_flags (PATTERN (insn
));
2613 reset_used_flags (REG_NOTES (insn
));
2615 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2618 /* Go through all the RTL insn bodies and check that there is no unexpected
2619 sharing in between the subexpressions. */
2622 verify_rtl_sharing (void)
2626 timevar_push (TV_VERIFY_RTL_SHARING
);
2628 reset_all_used_flags ();
2630 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2633 rtx pat
= PATTERN (p
);
2634 if (GET_CODE (pat
) != SEQUENCE
)
2635 verify_insn_sharing (p
);
2637 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2638 verify_insn_sharing (XVECEXP (pat
, 0, i
));
2641 reset_all_used_flags ();
2643 timevar_pop (TV_VERIFY_RTL_SHARING
);
2646 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2647 Assumes the mark bits are cleared at entry. */
2650 unshare_all_rtl_in_chain (rtx insn
)
2652 for (; insn
; insn
= NEXT_INSN (insn
))
2655 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2656 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2658 CALL_INSN_FUNCTION_USAGE (insn
)
2659 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2663 /* Go through all virtual stack slots of a function and mark them as
2664 shared. We never replace the DECL_RTLs themselves with a copy,
2665 but expressions mentioned into a DECL_RTL cannot be shared with
2666 expressions in the instruction stream.
2668 Note that reload may convert pseudo registers into memories in-place.
2669 Pseudo registers are always shared, but MEMs never are. Thus if we
2670 reset the used flags on MEMs in the instruction stream, we must set
2671 them again on MEMs that appear in DECL_RTLs. */
2674 set_used_decls (tree blk
)
2679 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2680 if (DECL_RTL_SET_P (t
))
2681 set_used_flags (DECL_RTL (t
));
2683 /* Now process sub-blocks. */
2684 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2688 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2689 Recursively does the same for subexpressions. Uses
2690 copy_rtx_if_shared_1 to reduce stack space. */
2693 copy_rtx_if_shared (rtx orig
)
2695 copy_rtx_if_shared_1 (&orig
);
2699 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2700 use. Recursively does the same for subexpressions. */
2703 copy_rtx_if_shared_1 (rtx
*orig1
)
2709 const char *format_ptr
;
2713 /* Repeat is used to turn tail-recursion into iteration. */
2720 code
= GET_CODE (x
);
2722 /* These types may be freely shared. */
2738 /* SCRATCH must be shared because they represent distinct values. */
2741 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2742 clobbers or clobbers of hard registers that originated as pseudos.
2743 This is needed to allow safe register renaming. */
2744 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2745 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2750 if (shared_const_p (x
))
2760 /* The chain of insns is not being copied. */
2767 /* This rtx may not be shared. If it has already been seen,
2768 replace it with a copy of itself. */
2770 if (RTX_FLAG (x
, used
))
2772 x
= shallow_copy_rtx (x
);
2775 RTX_FLAG (x
, used
) = 1;
2777 /* Now scan the subexpressions recursively.
2778 We can store any replaced subexpressions directly into X
2779 since we know X is not shared! Any vectors in X
2780 must be copied if X was copied. */
2782 format_ptr
= GET_RTX_FORMAT (code
);
2783 length
= GET_RTX_LENGTH (code
);
2786 for (i
= 0; i
< length
; i
++)
2788 switch (*format_ptr
++)
2792 copy_rtx_if_shared_1 (last_ptr
);
2793 last_ptr
= &XEXP (x
, i
);
2797 if (XVEC (x
, i
) != NULL
)
2800 int len
= XVECLEN (x
, i
);
2802 /* Copy the vector iff I copied the rtx and the length
2804 if (copied
&& len
> 0)
2805 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2807 /* Call recursively on all inside the vector. */
2808 for (j
= 0; j
< len
; j
++)
2811 copy_rtx_if_shared_1 (last_ptr
);
2812 last_ptr
= &XVECEXP (x
, i
, j
);
2827 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2830 mark_used_flags (rtx x
, int flag
)
2834 const char *format_ptr
;
2837 /* Repeat is used to turn tail-recursion into iteration. */
2842 code
= GET_CODE (x
);
2844 /* These types may be freely shared so we needn't do any resetting
2868 /* The chain of insns is not being copied. */
2875 RTX_FLAG (x
, used
) = flag
;
2877 format_ptr
= GET_RTX_FORMAT (code
);
2878 length
= GET_RTX_LENGTH (code
);
2880 for (i
= 0; i
< length
; i
++)
2882 switch (*format_ptr
++)
2890 mark_used_flags (XEXP (x
, i
), flag
);
2894 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2895 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
2901 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2902 to look for shared sub-parts. */
2905 reset_used_flags (rtx x
)
2907 mark_used_flags (x
, 0);
2910 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2911 to look for shared sub-parts. */
2914 set_used_flags (rtx x
)
2916 mark_used_flags (x
, 1);
2919 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2920 Return X or the rtx for the pseudo reg the value of X was copied into.
2921 OTHER must be valid as a SET_DEST. */
2924 make_safe_from (rtx x
, rtx other
)
2927 switch (GET_CODE (other
))
2930 other
= SUBREG_REG (other
);
2932 case STRICT_LOW_PART
:
2935 other
= XEXP (other
, 0);
2944 && GET_CODE (x
) != SUBREG
)
2946 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2947 || reg_mentioned_p (other
, x
))))
2949 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2950 emit_move_insn (temp
, x
);
2956 /* Emission of insns (adding them to the doubly-linked list). */
2958 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2961 get_last_insn_anywhere (void)
2963 struct sequence_stack
*stack
;
2964 if (get_last_insn ())
2965 return get_last_insn ();
2966 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2967 if (stack
->last
!= 0)
2972 /* Return the first nonnote insn emitted in current sequence or current
2973 function. This routine looks inside SEQUENCEs. */
2976 get_first_nonnote_insn (void)
2978 rtx insn
= get_insns ();
2983 for (insn
= next_insn (insn
);
2984 insn
&& NOTE_P (insn
);
2985 insn
= next_insn (insn
))
2989 if (NONJUMP_INSN_P (insn
)
2990 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2991 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2998 /* Return the last nonnote insn emitted in current sequence or current
2999 function. This routine looks inside SEQUENCEs. */
3002 get_last_nonnote_insn (void)
3004 rtx insn
= get_last_insn ();
3009 for (insn
= previous_insn (insn
);
3010 insn
&& NOTE_P (insn
);
3011 insn
= previous_insn (insn
))
3015 if (NONJUMP_INSN_P (insn
)
3016 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3017 insn
= XVECEXP (PATTERN (insn
), 0,
3018 XVECLEN (PATTERN (insn
), 0) - 1);
3025 /* Return the number of actual (non-debug) insns emitted in this
3029 get_max_insn_count (void)
3031 int n
= cur_insn_uid
;
3033 /* The table size must be stable across -g, to avoid codegen
3034 differences due to debug insns, and not be affected by
3035 -fmin-insn-uid, to avoid excessive table size and to simplify
3036 debugging of -fcompare-debug failures. */
3037 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3038 n
-= cur_debug_insn_uid
;
3040 n
-= MIN_NONDEBUG_INSN_UID
;
3046 /* Return the next insn. If it is a SEQUENCE, return the first insn
3050 next_insn (rtx insn
)
3054 insn
= NEXT_INSN (insn
);
3055 if (insn
&& NONJUMP_INSN_P (insn
)
3056 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3057 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3063 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3067 previous_insn (rtx insn
)
3071 insn
= PREV_INSN (insn
);
3072 if (insn
&& NONJUMP_INSN_P (insn
)
3073 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3074 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3080 /* Return the next insn after INSN that is not a NOTE. This routine does not
3081 look inside SEQUENCEs. */
3084 next_nonnote_insn (rtx insn
)
3088 insn
= NEXT_INSN (insn
);
3089 if (insn
== 0 || !NOTE_P (insn
))
3096 /* Return the next insn after INSN that is not a NOTE, but stop the
3097 search before we enter another basic block. This routine does not
3098 look inside SEQUENCEs. */
3101 next_nonnote_insn_bb (rtx insn
)
3105 insn
= NEXT_INSN (insn
);
3106 if (insn
== 0 || !NOTE_P (insn
))
3108 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3115 /* Return the previous insn before INSN that is not a NOTE. This routine does
3116 not look inside SEQUENCEs. */
3119 prev_nonnote_insn (rtx insn
)
3123 insn
= PREV_INSN (insn
);
3124 if (insn
== 0 || !NOTE_P (insn
))
3131 /* Return the previous insn before INSN that is not a NOTE, but stop
3132 the search before we enter another basic block. This routine does
3133 not look inside SEQUENCEs. */
3136 prev_nonnote_insn_bb (rtx insn
)
3140 insn
= PREV_INSN (insn
);
3141 if (insn
== 0 || !NOTE_P (insn
))
3143 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3150 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3151 routine does not look inside SEQUENCEs. */
3154 next_nondebug_insn (rtx insn
)
3158 insn
= NEXT_INSN (insn
);
3159 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3166 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3167 This routine does not look inside SEQUENCEs. */
3170 prev_nondebug_insn (rtx insn
)
3174 insn
= PREV_INSN (insn
);
3175 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3182 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3183 This routine does not look inside SEQUENCEs. */
3186 next_nonnote_nondebug_insn (rtx insn
)
3190 insn
= NEXT_INSN (insn
);
3191 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3198 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3199 This routine does not look inside SEQUENCEs. */
3202 prev_nonnote_nondebug_insn (rtx insn
)
3206 insn
= PREV_INSN (insn
);
3207 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3214 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3215 or 0, if there is none. This routine does not look inside
3219 next_real_insn (rtx insn
)
3223 insn
= NEXT_INSN (insn
);
3224 if (insn
== 0 || INSN_P (insn
))
3231 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3232 or 0, if there is none. This routine does not look inside
3236 prev_real_insn (rtx insn
)
3240 insn
= PREV_INSN (insn
);
3241 if (insn
== 0 || INSN_P (insn
))
3248 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3249 This routine does not look inside SEQUENCEs. */
3252 last_call_insn (void)
3256 for (insn
= get_last_insn ();
3257 insn
&& !CALL_P (insn
);
3258 insn
= PREV_INSN (insn
))
3264 /* Find the next insn after INSN that really does something. This routine
3265 does not look inside SEQUENCEs. After reload this also skips over
3266 standalone USE and CLOBBER insn. */
3269 active_insn_p (const_rtx insn
)
3271 return (CALL_P (insn
) || JUMP_P (insn
)
3272 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3273 || (NONJUMP_INSN_P (insn
)
3274 && (! reload_completed
3275 || (GET_CODE (PATTERN (insn
)) != USE
3276 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3280 next_active_insn (rtx insn
)
3284 insn
= NEXT_INSN (insn
);
3285 if (insn
== 0 || active_insn_p (insn
))
3292 /* Find the last insn before INSN that really does something. This routine
3293 does not look inside SEQUENCEs. After reload this also skips over
3294 standalone USE and CLOBBER insn. */
3297 prev_active_insn (rtx insn
)
3301 insn
= PREV_INSN (insn
);
3302 if (insn
== 0 || active_insn_p (insn
))
3310 /* Return the next insn that uses CC0 after INSN, which is assumed to
3311 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3312 applied to the result of this function should yield INSN).
3314 Normally, this is simply the next insn. However, if a REG_CC_USER note
3315 is present, it contains the insn that uses CC0.
3317 Return 0 if we can't find the insn. */
3320 next_cc0_user (rtx insn
)
3322 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3325 return XEXP (note
, 0);
3327 insn
= next_nonnote_insn (insn
);
3328 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3329 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3331 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3337 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3338 note, it is the previous insn. */
3341 prev_cc0_setter (rtx insn
)
3343 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3346 return XEXP (note
, 0);
3348 insn
= prev_nonnote_insn (insn
);
3349 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3356 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3359 find_auto_inc (rtx
*xp
, void *data
)
3362 rtx reg
= (rtx
) data
;
3364 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3367 switch (GET_CODE (x
))
3375 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3386 /* Increment the label uses for all labels present in rtx. */
3389 mark_label_nuses (rtx x
)
3395 code
= GET_CODE (x
);
3396 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3397 LABEL_NUSES (XEXP (x
, 0))++;
3399 fmt
= GET_RTX_FORMAT (code
);
3400 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3403 mark_label_nuses (XEXP (x
, i
));
3404 else if (fmt
[i
] == 'E')
3405 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3406 mark_label_nuses (XVECEXP (x
, i
, j
));
3411 /* Try splitting insns that can be split for better scheduling.
3412 PAT is the pattern which might split.
3413 TRIAL is the insn providing PAT.
3414 LAST is nonzero if we should return the last insn of the sequence produced.
3416 If this routine succeeds in splitting, it returns the first or last
3417 replacement insn depending on the value of LAST. Otherwise, it
3418 returns TRIAL. If the insn to be returned can be split, it will be. */
3421 try_split (rtx pat
, rtx trial
, int last
)
3423 rtx before
= PREV_INSN (trial
);
3424 rtx after
= NEXT_INSN (trial
);
3425 int has_barrier
= 0;
3428 rtx insn_last
, insn
;
3430 rtx call_insn
= NULL_RTX
;
3432 /* We're not good at redistributing frame information. */
3433 if (RTX_FRAME_RELATED_P (trial
))
3436 if (any_condjump_p (trial
)
3437 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3438 split_branch_probability
= XINT (note
, 0);
3439 probability
= split_branch_probability
;
3441 seq
= split_insns (pat
, trial
);
3443 split_branch_probability
= -1;
3445 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3446 We may need to handle this specially. */
3447 if (after
&& BARRIER_P (after
))
3450 after
= NEXT_INSN (after
);
3456 /* Avoid infinite loop if any insn of the result matches
3457 the original pattern. */
3461 if (INSN_P (insn_last
)
3462 && rtx_equal_p (PATTERN (insn_last
), pat
))
3464 if (!NEXT_INSN (insn_last
))
3466 insn_last
= NEXT_INSN (insn_last
);
3469 /* We will be adding the new sequence to the function. The splitters
3470 may have introduced invalid RTL sharing, so unshare the sequence now. */
3471 unshare_all_rtl_in_chain (seq
);
3474 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3478 mark_jump_label (PATTERN (insn
), insn
, 0);
3480 if (probability
!= -1
3481 && any_condjump_p (insn
)
3482 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3484 /* We can preserve the REG_BR_PROB notes only if exactly
3485 one jump is created, otherwise the machine description
3486 is responsible for this step using
3487 split_branch_probability variable. */
3488 gcc_assert (njumps
== 1);
3489 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3494 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3495 in SEQ and copy any additional information across. */
3498 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3503 gcc_assert (call_insn
== NULL_RTX
);
3506 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3507 target may have explicitly specified. */
3508 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3511 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3513 /* If the old call was a sibling call, the new one must
3515 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3517 /* If the new call is the last instruction in the sequence,
3518 it will effectively replace the old call in-situ. Otherwise
3519 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3520 so that it comes immediately after the new call. */
3521 if (NEXT_INSN (insn
))
3522 for (next
= NEXT_INSN (trial
);
3523 next
&& NOTE_P (next
);
3524 next
= NEXT_INSN (next
))
3525 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3528 add_insn_after (next
, insn
, NULL
);
3534 /* Copy notes, particularly those related to the CFG. */
3535 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3537 switch (REG_NOTE_KIND (note
))
3540 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3546 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3549 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3553 case REG_NON_LOCAL_GOTO
:
3554 case REG_CROSSING_JUMP
:
3555 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3558 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3564 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3566 rtx reg
= XEXP (note
, 0);
3567 if (!FIND_REG_INC_NOTE (insn
, reg
)
3568 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3569 add_reg_note (insn
, REG_INC
, reg
);
3575 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3579 gcc_assert (call_insn
!= NULL_RTX
);
3580 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3588 /* If there are LABELS inside the split insns increment the
3589 usage count so we don't delete the label. */
3593 while (insn
!= NULL_RTX
)
3595 /* JUMP_P insns have already been "marked" above. */
3596 if (NONJUMP_INSN_P (insn
))
3597 mark_label_nuses (PATTERN (insn
));
3599 insn
= PREV_INSN (insn
);
3603 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3605 delete_insn (trial
);
3607 emit_barrier_after (tem
);
3609 /* Recursively call try_split for each new insn created; by the
3610 time control returns here that insn will be fully split, so
3611 set LAST and continue from the insn after the one returned.
3612 We can't use next_active_insn here since AFTER may be a note.
3613 Ignore deleted insns, which can be occur if not optimizing. */
3614 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3615 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3616 tem
= try_split (PATTERN (tem
), tem
, 1);
3618 /* Return either the first or the last insn, depending on which was
3621 ? (after
? PREV_INSN (after
) : get_last_insn ())
3622 : NEXT_INSN (before
);
3625 /* Make and return an INSN rtx, initializing all its slots.
3626 Store PATTERN in the pattern slots. */
3629 make_insn_raw (rtx pattern
)
3633 insn
= rtx_alloc (INSN
);
3635 INSN_UID (insn
) = cur_insn_uid
++;
3636 PATTERN (insn
) = pattern
;
3637 INSN_CODE (insn
) = -1;
3638 REG_NOTES (insn
) = NULL
;
3639 INSN_LOCATION (insn
) = curr_insn_location ();
3640 BLOCK_FOR_INSN (insn
) = NULL
;
3642 #ifdef ENABLE_RTL_CHECKING
3645 && (returnjump_p (insn
)
3646 || (GET_CODE (insn
) == SET
3647 && SET_DEST (insn
) == pc_rtx
)))
3649 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3657 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3660 make_debug_insn_raw (rtx pattern
)
3664 insn
= rtx_alloc (DEBUG_INSN
);
3665 INSN_UID (insn
) = cur_debug_insn_uid
++;
3666 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3667 INSN_UID (insn
) = cur_insn_uid
++;
3669 PATTERN (insn
) = pattern
;
3670 INSN_CODE (insn
) = -1;
3671 REG_NOTES (insn
) = NULL
;
3672 INSN_LOCATION (insn
) = curr_insn_location ();
3673 BLOCK_FOR_INSN (insn
) = NULL
;
3678 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3681 make_jump_insn_raw (rtx pattern
)
3685 insn
= rtx_alloc (JUMP_INSN
);
3686 INSN_UID (insn
) = cur_insn_uid
++;
3688 PATTERN (insn
) = pattern
;
3689 INSN_CODE (insn
) = -1;
3690 REG_NOTES (insn
) = NULL
;
3691 JUMP_LABEL (insn
) = NULL
;
3692 INSN_LOCATION (insn
) = curr_insn_location ();
3693 BLOCK_FOR_INSN (insn
) = NULL
;
3698 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3701 make_call_insn_raw (rtx pattern
)
3705 insn
= rtx_alloc (CALL_INSN
);
3706 INSN_UID (insn
) = cur_insn_uid
++;
3708 PATTERN (insn
) = pattern
;
3709 INSN_CODE (insn
) = -1;
3710 REG_NOTES (insn
) = NULL
;
3711 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3712 INSN_LOCATION (insn
) = curr_insn_location ();
3713 BLOCK_FOR_INSN (insn
) = NULL
;
3718 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3721 make_note_raw (enum insn_note subtype
)
3723 /* Some notes are never created this way at all. These notes are
3724 only created by patching out insns. */
3725 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3726 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3728 rtx note
= rtx_alloc (NOTE
);
3729 INSN_UID (note
) = cur_insn_uid
++;
3730 NOTE_KIND (note
) = subtype
;
3731 BLOCK_FOR_INSN (note
) = NULL
;
3732 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3736 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3737 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3738 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3741 link_insn_into_chain (rtx insn
, rtx prev
, rtx next
)
3743 PREV_INSN (insn
) = prev
;
3744 NEXT_INSN (insn
) = next
;
3747 NEXT_INSN (prev
) = insn
;
3748 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3750 rtx sequence
= PATTERN (prev
);
3751 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3756 PREV_INSN (next
) = insn
;
3757 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3758 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3761 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3763 rtx sequence
= PATTERN (insn
);
3764 PREV_INSN (XVECEXP (sequence
, 0, 0)) = prev
;
3765 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3769 /* Add INSN to the end of the doubly-linked list.
3770 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3775 rtx prev
= get_last_insn ();
3776 link_insn_into_chain (insn
, prev
, NULL
);
3777 if (NULL
== get_insns ())
3778 set_first_insn (insn
);
3779 set_last_insn (insn
);
3782 /* Add INSN into the doubly-linked list after insn AFTER. */
3785 add_insn_after_nobb (rtx insn
, rtx after
)
3787 rtx next
= NEXT_INSN (after
);
3789 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3791 link_insn_into_chain (insn
, after
, next
);
3795 if (get_last_insn () == after
)
3796 set_last_insn (insn
);
3799 struct sequence_stack
*stack
= seq_stack
;
3800 /* Scan all pending sequences too. */
3801 for (; stack
; stack
= stack
->next
)
3802 if (after
== stack
->last
)
3811 /* Add INSN into the doubly-linked list before insn BEFORE. */
3814 add_insn_before_nobb (rtx insn
, rtx before
)
3816 rtx prev
= PREV_INSN (before
);
3818 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3820 link_insn_into_chain (insn
, prev
, before
);
3824 if (get_insns () == before
)
3825 set_first_insn (insn
);
3828 struct sequence_stack
*stack
= seq_stack
;
3829 /* Scan all pending sequences too. */
3830 for (; stack
; stack
= stack
->next
)
3831 if (before
== stack
->first
)
3833 stack
->first
= insn
;
3842 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
3843 If BB is NULL, an attempt is made to infer the bb from before.
3845 This and the next function should be the only functions called
3846 to insert an insn once delay slots have been filled since only
3847 they know how to update a SEQUENCE. */
3850 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3852 add_insn_after_nobb (insn
, after
);
3853 if (!BARRIER_P (after
)
3854 && !BARRIER_P (insn
)
3855 && (bb
= BLOCK_FOR_INSN (after
)))
3857 set_block_for_insn (insn
, bb
);
3859 df_insn_rescan (insn
);
3860 /* Should not happen as first in the BB is always
3861 either NOTE or LABEL. */
3862 if (BB_END (bb
) == after
3863 /* Avoid clobbering of structure when creating new BB. */
3864 && !BARRIER_P (insn
)
3865 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3870 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
3871 If BB is NULL, an attempt is made to infer the bb from before.
3873 This and the previous function should be the only functions called
3874 to insert an insn once delay slots have been filled since only
3875 they know how to update a SEQUENCE. */
3878 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3880 add_insn_before_nobb (insn
, before
);
3883 && !BARRIER_P (before
)
3884 && !BARRIER_P (insn
))
3885 bb
= BLOCK_FOR_INSN (before
);
3889 set_block_for_insn (insn
, bb
);
3891 df_insn_rescan (insn
);
3892 /* Should not happen as first in the BB is always either NOTE or
3894 gcc_assert (BB_HEAD (bb
) != insn
3895 /* Avoid clobbering of structure when creating new BB. */
3897 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3901 /* Replace insn with an deleted instruction note. */
3904 set_insn_deleted (rtx insn
)
3907 df_insn_delete (insn
);
3908 PUT_CODE (insn
, NOTE
);
3909 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3913 /* Unlink INSN from the insn chain.
3915 This function knows how to handle sequences.
3917 This function does not invalidate data flow information associated with
3918 INSN (i.e. does not call df_insn_delete). That makes this function
3919 usable for only disconnecting an insn from the chain, and re-emit it
3922 To later insert INSN elsewhere in the insn chain via add_insn and
3923 similar functions, PREV_INSN and NEXT_INSN must be nullified by
3924 the caller. Nullifying them here breaks many insn chain walks.
3926 To really delete an insn and related DF information, use delete_insn. */
3929 remove_insn (rtx insn
)
3931 rtx next
= NEXT_INSN (insn
);
3932 rtx prev
= PREV_INSN (insn
);
3937 NEXT_INSN (prev
) = next
;
3938 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3940 rtx sequence
= PATTERN (prev
);
3941 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3944 else if (get_insns () == insn
)
3947 PREV_INSN (next
) = NULL
;
3948 set_first_insn (next
);
3952 struct sequence_stack
*stack
= seq_stack
;
3953 /* Scan all pending sequences too. */
3954 for (; stack
; stack
= stack
->next
)
3955 if (insn
== stack
->first
)
3957 stack
->first
= next
;
3966 PREV_INSN (next
) = prev
;
3967 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3968 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3970 else if (get_last_insn () == insn
)
3971 set_last_insn (prev
);
3974 struct sequence_stack
*stack
= seq_stack
;
3975 /* Scan all pending sequences too. */
3976 for (; stack
; stack
= stack
->next
)
3977 if (insn
== stack
->last
)
3986 /* Fix up basic block boundaries, if necessary. */
3987 if (!BARRIER_P (insn
)
3988 && (bb
= BLOCK_FOR_INSN (insn
)))
3990 if (BB_HEAD (bb
) == insn
)
3992 /* Never ever delete the basic block note without deleting whole
3994 gcc_assert (!NOTE_P (insn
));
3995 BB_HEAD (bb
) = next
;
3997 if (BB_END (bb
) == insn
)
4002 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4005 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4007 gcc_assert (call_insn
&& CALL_P (call_insn
));
4009 /* Put the register usage information on the CALL. If there is already
4010 some usage information, put ours at the end. */
4011 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4015 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4016 link
= XEXP (link
, 1))
4019 XEXP (link
, 1) = call_fusage
;
4022 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4025 /* Delete all insns made since FROM.
4026 FROM becomes the new last instruction. */
4029 delete_insns_since (rtx from
)
4034 NEXT_INSN (from
) = 0;
4035 set_last_insn (from
);
4038 /* This function is deprecated, please use sequences instead.
4040 Move a consecutive bunch of insns to a different place in the chain.
4041 The insns to be moved are those between FROM and TO.
4042 They are moved to a new position after the insn AFTER.
4043 AFTER must not be FROM or TO or any insn in between.
4045 This function does not know about SEQUENCEs and hence should not be
4046 called after delay-slot filling has been done. */
4049 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
4051 #ifdef ENABLE_CHECKING
4053 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4054 gcc_assert (after
!= x
);
4055 gcc_assert (after
!= to
);
4058 /* Splice this bunch out of where it is now. */
4059 if (PREV_INSN (from
))
4060 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4062 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4063 if (get_last_insn () == to
)
4064 set_last_insn (PREV_INSN (from
));
4065 if (get_insns () == from
)
4066 set_first_insn (NEXT_INSN (to
));
4068 /* Make the new neighbors point to it and it to them. */
4069 if (NEXT_INSN (after
))
4070 PREV_INSN (NEXT_INSN (after
)) = to
;
4072 NEXT_INSN (to
) = NEXT_INSN (after
);
4073 PREV_INSN (from
) = after
;
4074 NEXT_INSN (after
) = from
;
4075 if (after
== get_last_insn ())
4079 /* Same as function above, but take care to update BB boundaries. */
4081 reorder_insns (rtx from
, rtx to
, rtx after
)
4083 rtx prev
= PREV_INSN (from
);
4084 basic_block bb
, bb2
;
4086 reorder_insns_nobb (from
, to
, after
);
4088 if (!BARRIER_P (after
)
4089 && (bb
= BLOCK_FOR_INSN (after
)))
4092 df_set_bb_dirty (bb
);
4094 if (!BARRIER_P (from
)
4095 && (bb2
= BLOCK_FOR_INSN (from
)))
4097 if (BB_END (bb2
) == to
)
4098 BB_END (bb2
) = prev
;
4099 df_set_bb_dirty (bb2
);
4102 if (BB_END (bb
) == after
)
4105 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4107 df_insn_change_bb (x
, bb
);
4112 /* Emit insn(s) of given code and pattern
4113 at a specified place within the doubly-linked list.
4115 All of the emit_foo global entry points accept an object
4116 X which is either an insn list or a PATTERN of a single
4119 There are thus a few canonical ways to generate code and
4120 emit it at a specific place in the instruction stream. For
4121 example, consider the instruction named SPOT and the fact that
4122 we would like to emit some instructions before SPOT. We might
4126 ... emit the new instructions ...
4127 insns_head = get_insns ();
4130 emit_insn_before (insns_head, SPOT);
4132 It used to be common to generate SEQUENCE rtl instead, but that
4133 is a relic of the past which no longer occurs. The reason is that
4134 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4135 generated would almost certainly die right after it was created. */
4138 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4139 rtx (*make_raw
) (rtx
))
4143 gcc_assert (before
);
4148 switch (GET_CODE (x
))
4160 rtx next
= NEXT_INSN (insn
);
4161 add_insn_before (insn
, before
, bb
);
4167 #ifdef ENABLE_RTL_CHECKING
4174 last
= (*make_raw
) (x
);
4175 add_insn_before (last
, before
, bb
);
4182 /* Make X be output before the instruction BEFORE. */
4185 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4187 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4190 /* Make an instruction with body X and code JUMP_INSN
4191 and output it before the instruction BEFORE. */
4194 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4196 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4197 make_jump_insn_raw
);
4200 /* Make an instruction with body X and code CALL_INSN
4201 and output it before the instruction BEFORE. */
4204 emit_call_insn_before_noloc (rtx x
, rtx before
)
4206 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4207 make_call_insn_raw
);
4210 /* Make an instruction with body X and code DEBUG_INSN
4211 and output it before the instruction BEFORE. */
4214 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4216 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4217 make_debug_insn_raw
);
4220 /* Make an insn of code BARRIER
4221 and output it before the insn BEFORE. */
4224 emit_barrier_before (rtx before
)
4226 rtx insn
= rtx_alloc (BARRIER
);
4228 INSN_UID (insn
) = cur_insn_uid
++;
4230 add_insn_before (insn
, before
, NULL
);
4234 /* Emit the label LABEL before the insn BEFORE. */
4237 emit_label_before (rtx label
, rtx before
)
4239 gcc_checking_assert (INSN_UID (label
) == 0);
4240 INSN_UID (label
) = cur_insn_uid
++;
4241 add_insn_before (label
, before
, NULL
);
4245 /* Helper for emit_insn_after, handles lists of instructions
4249 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4253 if (!bb
&& !BARRIER_P (after
))
4254 bb
= BLOCK_FOR_INSN (after
);
4258 df_set_bb_dirty (bb
);
4259 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4260 if (!BARRIER_P (last
))
4262 set_block_for_insn (last
, bb
);
4263 df_insn_rescan (last
);
4265 if (!BARRIER_P (last
))
4267 set_block_for_insn (last
, bb
);
4268 df_insn_rescan (last
);
4270 if (BB_END (bb
) == after
)
4274 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4277 after_after
= NEXT_INSN (after
);
4279 NEXT_INSN (after
) = first
;
4280 PREV_INSN (first
) = after
;
4281 NEXT_INSN (last
) = after_after
;
4283 PREV_INSN (after_after
) = last
;
4285 if (after
== get_last_insn ())
4286 set_last_insn (last
);
4292 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4293 rtx (*make_raw
)(rtx
))
4302 switch (GET_CODE (x
))
4311 last
= emit_insn_after_1 (x
, after
, bb
);
4314 #ifdef ENABLE_RTL_CHECKING
4321 last
= (*make_raw
) (x
);
4322 add_insn_after (last
, after
, bb
);
4329 /* Make X be output after the insn AFTER and set the BB of insn. If
4330 BB is NULL, an attempt is made to infer the BB from AFTER. */
4333 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4335 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4339 /* Make an insn of code JUMP_INSN with body X
4340 and output it after the insn AFTER. */
4343 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4345 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4348 /* Make an instruction with body X and code CALL_INSN
4349 and output it after the instruction AFTER. */
4352 emit_call_insn_after_noloc (rtx x
, rtx after
)
4354 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4357 /* Make an instruction with body X and code CALL_INSN
4358 and output it after the instruction AFTER. */
4361 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4363 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4366 /* Make an insn of code BARRIER
4367 and output it after the insn AFTER. */
4370 emit_barrier_after (rtx after
)
4372 rtx insn
= rtx_alloc (BARRIER
);
4374 INSN_UID (insn
) = cur_insn_uid
++;
4376 add_insn_after (insn
, after
, NULL
);
4380 /* Emit the label LABEL after the insn AFTER. */
4383 emit_label_after (rtx label
, rtx after
)
4385 gcc_checking_assert (INSN_UID (label
) == 0);
4386 INSN_UID (label
) = cur_insn_uid
++;
4387 add_insn_after (label
, after
, NULL
);
4391 /* Notes require a bit of special handling: Some notes need to have their
4392 BLOCK_FOR_INSN set, others should never have it set, and some should
4393 have it set or clear depending on the context. */
4395 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4396 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4397 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4400 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4404 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4405 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4408 /* Notes for var tracking and EH region markers can appear between or
4409 inside basic blocks. If the caller is emitting on the basic block
4410 boundary, do not set BLOCK_FOR_INSN on the new note. */
4411 case NOTE_INSN_VAR_LOCATION
:
4412 case NOTE_INSN_CALL_ARG_LOCATION
:
4413 case NOTE_INSN_EH_REGION_BEG
:
4414 case NOTE_INSN_EH_REGION_END
:
4415 return on_bb_boundary_p
;
4417 /* Otherwise, BLOCK_FOR_INSN must be set. */
4423 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4426 emit_note_after (enum insn_note subtype
, rtx after
)
4428 rtx note
= make_note_raw (subtype
);
4429 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4430 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4432 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4433 add_insn_after_nobb (note
, after
);
4435 add_insn_after (note
, after
, bb
);
4439 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4442 emit_note_before (enum insn_note subtype
, rtx before
)
4444 rtx note
= make_note_raw (subtype
);
4445 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4446 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4448 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4449 add_insn_before_nobb (note
, before
);
4451 add_insn_before (note
, before
, bb
);
4455 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4456 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4459 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4460 rtx (*make_raw
) (rtx
))
4462 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4464 if (pattern
== NULL_RTX
|| !loc
)
4467 after
= NEXT_INSN (after
);
4470 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4471 INSN_LOCATION (after
) = loc
;
4474 after
= NEXT_INSN (after
);
4479 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4480 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4484 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4485 rtx (*make_raw
) (rtx
))
4489 if (skip_debug_insns
)
4490 while (DEBUG_INSN_P (prev
))
4491 prev
= PREV_INSN (prev
);
4494 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4497 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4500 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4502 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4504 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4507 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4509 emit_insn_after (rtx pattern
, rtx after
)
4511 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4514 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4516 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4518 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4521 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4523 emit_jump_insn_after (rtx pattern
, rtx after
)
4525 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4528 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4530 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4532 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4535 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4537 emit_call_insn_after (rtx pattern
, rtx after
)
4539 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4542 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4544 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4546 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4549 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4551 emit_debug_insn_after (rtx pattern
, rtx after
)
4553 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4556 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4557 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4558 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4562 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4563 rtx (*make_raw
) (rtx
))
4565 rtx first
= PREV_INSN (before
);
4566 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4567 insnp
? before
: NULL_RTX
,
4570 if (pattern
== NULL_RTX
|| !loc
)
4574 first
= get_insns ();
4576 first
= NEXT_INSN (first
);
4579 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4580 INSN_LOCATION (first
) = loc
;
4583 first
= NEXT_INSN (first
);
4588 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4589 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4590 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4591 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4594 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4595 bool insnp
, rtx (*make_raw
) (rtx
))
4599 if (skip_debug_insns
)
4600 while (DEBUG_INSN_P (next
))
4601 next
= PREV_INSN (next
);
4604 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4607 return emit_pattern_before_noloc (pattern
, before
,
4608 insnp
? before
: NULL_RTX
,
4612 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4614 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4616 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4620 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4622 emit_insn_before (rtx pattern
, rtx before
)
4624 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4627 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4629 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4631 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4632 make_jump_insn_raw
);
4635 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4637 emit_jump_insn_before (rtx pattern
, rtx before
)
4639 return emit_pattern_before (pattern
, before
, true, false,
4640 make_jump_insn_raw
);
4643 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4645 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4647 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4648 make_call_insn_raw
);
4651 /* Like emit_call_insn_before_noloc,
4652 but set insn_location according to BEFORE. */
4654 emit_call_insn_before (rtx pattern
, rtx before
)
4656 return emit_pattern_before (pattern
, before
, true, false,
4657 make_call_insn_raw
);
4660 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4662 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4664 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4665 make_debug_insn_raw
);
4668 /* Like emit_debug_insn_before_noloc,
4669 but set insn_location according to BEFORE. */
4671 emit_debug_insn_before (rtx pattern
, rtx before
)
4673 return emit_pattern_before (pattern
, before
, false, false,
4674 make_debug_insn_raw
);
4677 /* Take X and emit it at the end of the doubly-linked
4680 Returns the last insn emitted. */
4685 rtx last
= get_last_insn ();
4691 switch (GET_CODE (x
))
4703 rtx next
= NEXT_INSN (insn
);
4710 #ifdef ENABLE_RTL_CHECKING
4711 case JUMP_TABLE_DATA
:
4718 last
= make_insn_raw (x
);
4726 /* Make an insn of code DEBUG_INSN with pattern X
4727 and add it to the end of the doubly-linked list. */
4730 emit_debug_insn (rtx x
)
4732 rtx last
= get_last_insn ();
4738 switch (GET_CODE (x
))
4750 rtx next
= NEXT_INSN (insn
);
4757 #ifdef ENABLE_RTL_CHECKING
4758 case JUMP_TABLE_DATA
:
4765 last
= make_debug_insn_raw (x
);
4773 /* Make an insn of code JUMP_INSN with pattern X
4774 and add it to the end of the doubly-linked list. */
4777 emit_jump_insn (rtx x
)
4779 rtx last
= NULL_RTX
, insn
;
4781 switch (GET_CODE (x
))
4793 rtx next
= NEXT_INSN (insn
);
4800 #ifdef ENABLE_RTL_CHECKING
4801 case JUMP_TABLE_DATA
:
4808 last
= make_jump_insn_raw (x
);
4816 /* Make an insn of code CALL_INSN with pattern X
4817 and add it to the end of the doubly-linked list. */
4820 emit_call_insn (rtx x
)
4824 switch (GET_CODE (x
))
4833 insn
= emit_insn (x
);
4836 #ifdef ENABLE_RTL_CHECKING
4838 case JUMP_TABLE_DATA
:
4844 insn
= make_call_insn_raw (x
);
4852 /* Add the label LABEL to the end of the doubly-linked list. */
4855 emit_label (rtx label
)
4857 gcc_checking_assert (INSN_UID (label
) == 0);
4858 INSN_UID (label
) = cur_insn_uid
++;
4863 /* Make an insn of code JUMP_TABLE_DATA
4864 and add it to the end of the doubly-linked list. */
4867 emit_jump_table_data (rtx table
)
4869 rtx jump_table_data
= rtx_alloc (JUMP_TABLE_DATA
);
4870 INSN_UID (jump_table_data
) = cur_insn_uid
++;
4871 PATTERN (jump_table_data
) = table
;
4872 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
4873 add_insn (jump_table_data
);
4874 return jump_table_data
;
4877 /* Make an insn of code BARRIER
4878 and add it to the end of the doubly-linked list. */
4883 rtx barrier
= rtx_alloc (BARRIER
);
4884 INSN_UID (barrier
) = cur_insn_uid
++;
4889 /* Emit a copy of note ORIG. */
4892 emit_note_copy (rtx orig
)
4894 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
4895 rtx note
= make_note_raw (kind
);
4896 NOTE_DATA (note
) = NOTE_DATA (orig
);
4901 /* Make an insn of code NOTE or type NOTE_NO
4902 and add it to the end of the doubly-linked list. */
4905 emit_note (enum insn_note kind
)
4907 rtx note
= make_note_raw (kind
);
4912 /* Emit a clobber of lvalue X. */
4915 emit_clobber (rtx x
)
4917 /* CONCATs should not appear in the insn stream. */
4918 if (GET_CODE (x
) == CONCAT
)
4920 emit_clobber (XEXP (x
, 0));
4921 return emit_clobber (XEXP (x
, 1));
4923 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
4926 /* Return a sequence of insns to clobber lvalue X. */
4940 /* Emit a use of rvalue X. */
4945 /* CONCATs should not appear in the insn stream. */
4946 if (GET_CODE (x
) == CONCAT
)
4948 emit_use (XEXP (x
, 0));
4949 return emit_use (XEXP (x
, 1));
4951 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
4954 /* Return a sequence of insns to use rvalue X. */
4968 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4969 note of this type already exists, remove it first. */
4972 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4974 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4980 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4981 has multiple sets (some callers assume single_set
4982 means the insn only has one set, when in fact it
4983 means the insn only has one * useful * set). */
4984 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4990 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4991 It serves no useful purpose and breaks eliminate_regs. */
4992 if (GET_CODE (datum
) == ASM_OPERANDS
)
4997 XEXP (note
, 0) = datum
;
4998 df_notes_rescan (insn
);
5006 XEXP (note
, 0) = datum
;
5012 add_reg_note (insn
, kind
, datum
);
5018 df_notes_rescan (insn
);
5024 return REG_NOTES (insn
);
5027 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5029 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5031 rtx set
= single_set (insn
);
5033 if (set
&& SET_DEST (set
) == dst
)
5034 return set_unique_reg_note (insn
, kind
, datum
);
5038 /* Return an indication of which type of insn should have X as a body.
5039 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5041 static enum rtx_code
5042 classify_insn (rtx x
)
5046 if (GET_CODE (x
) == CALL
)
5048 if (ANY_RETURN_P (x
))
5050 if (GET_CODE (x
) == SET
)
5052 if (SET_DEST (x
) == pc_rtx
)
5054 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5059 if (GET_CODE (x
) == PARALLEL
)
5062 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5063 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5065 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5066 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5068 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5069 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5075 /* Emit the rtl pattern X as an appropriate kind of insn.
5076 If X is a label, it is simply added into the insn chain. */
5081 enum rtx_code code
= classify_insn (x
);
5086 return emit_label (x
);
5088 return emit_insn (x
);
5091 rtx insn
= emit_jump_insn (x
);
5092 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5093 return emit_barrier ();
5097 return emit_call_insn (x
);
5099 return emit_debug_insn (x
);
5105 /* Space for free sequence stack entries. */
5106 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5108 /* Begin emitting insns to a sequence. If this sequence will contain
5109 something that might cause the compiler to pop arguments to function
5110 calls (because those pops have previously been deferred; see
5111 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5112 before calling this function. That will ensure that the deferred
5113 pops are not accidentally emitted in the middle of this sequence. */
5116 start_sequence (void)
5118 struct sequence_stack
*tem
;
5120 if (free_sequence_stack
!= NULL
)
5122 tem
= free_sequence_stack
;
5123 free_sequence_stack
= tem
->next
;
5126 tem
= ggc_alloc_sequence_stack ();
5128 tem
->next
= seq_stack
;
5129 tem
->first
= get_insns ();
5130 tem
->last
= get_last_insn ();
5138 /* Set up the insn chain starting with FIRST as the current sequence,
5139 saving the previously current one. See the documentation for
5140 start_sequence for more information about how to use this function. */
5143 push_to_sequence (rtx first
)
5149 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5152 set_first_insn (first
);
5153 set_last_insn (last
);
5156 /* Like push_to_sequence, but take the last insn as an argument to avoid
5157 looping through the list. */
5160 push_to_sequence2 (rtx first
, rtx last
)
5164 set_first_insn (first
);
5165 set_last_insn (last
);
5168 /* Set up the outer-level insn chain
5169 as the current sequence, saving the previously current one. */
5172 push_topmost_sequence (void)
5174 struct sequence_stack
*stack
, *top
= NULL
;
5178 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5181 set_first_insn (top
->first
);
5182 set_last_insn (top
->last
);
5185 /* After emitting to the outer-level insn chain, update the outer-level
5186 insn chain, and restore the previous saved state. */
5189 pop_topmost_sequence (void)
5191 struct sequence_stack
*stack
, *top
= NULL
;
5193 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5196 top
->first
= get_insns ();
5197 top
->last
= get_last_insn ();
5202 /* After emitting to a sequence, restore previous saved state.
5204 To get the contents of the sequence just made, you must call
5205 `get_insns' *before* calling here.
5207 If the compiler might have deferred popping arguments while
5208 generating this sequence, and this sequence will not be immediately
5209 inserted into the instruction stream, use do_pending_stack_adjust
5210 before calling get_insns. That will ensure that the deferred
5211 pops are inserted into this sequence, and not into some random
5212 location in the instruction stream. See INHIBIT_DEFER_POP for more
5213 information about deferred popping of arguments. */
5218 struct sequence_stack
*tem
= seq_stack
;
5220 set_first_insn (tem
->first
);
5221 set_last_insn (tem
->last
);
5222 seq_stack
= tem
->next
;
5224 memset (tem
, 0, sizeof (*tem
));
5225 tem
->next
= free_sequence_stack
;
5226 free_sequence_stack
= tem
;
5229 /* Return 1 if currently emitting into a sequence. */
5232 in_sequence_p (void)
5234 return seq_stack
!= 0;
5237 /* Put the various virtual registers into REGNO_REG_RTX. */
5240 init_virtual_regs (void)
5242 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5243 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5244 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5245 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5246 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5247 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5248 = virtual_preferred_stack_boundary_rtx
;
5252 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5253 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5254 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5255 static int copy_insn_n_scratches
;
5257 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5258 copied an ASM_OPERANDS.
5259 In that case, it is the original input-operand vector. */
5260 static rtvec orig_asm_operands_vector
;
5262 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5263 copied an ASM_OPERANDS.
5264 In that case, it is the copied input-operand vector. */
5265 static rtvec copy_asm_operands_vector
;
5267 /* Likewise for the constraints vector. */
5268 static rtvec orig_asm_constraints_vector
;
5269 static rtvec copy_asm_constraints_vector
;
5271 /* Recursively create a new copy of an rtx for copy_insn.
5272 This function differs from copy_rtx in that it handles SCRATCHes and
5273 ASM_OPERANDs properly.
5274 Normally, this function is not used directly; use copy_insn as front end.
5275 However, you could first copy an insn pattern with copy_insn and then use
5276 this function afterwards to properly copy any REG_NOTEs containing
5280 copy_insn_1 (rtx orig
)
5285 const char *format_ptr
;
5290 code
= GET_CODE (orig
);
5305 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5306 clobbers or clobbers of hard registers that originated as pseudos.
5307 This is needed to allow safe register renaming. */
5308 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5309 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5314 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5315 if (copy_insn_scratch_in
[i
] == orig
)
5316 return copy_insn_scratch_out
[i
];
5320 if (shared_const_p (orig
))
5324 /* A MEM with a constant address is not sharable. The problem is that
5325 the constant address may need to be reloaded. If the mem is shared,
5326 then reloading one copy of this mem will cause all copies to appear
5327 to have been reloaded. */
5333 /* Copy the various flags, fields, and other information. We assume
5334 that all fields need copying, and then clear the fields that should
5335 not be copied. That is the sensible default behavior, and forces
5336 us to explicitly document why we are *not* copying a flag. */
5337 copy
= shallow_copy_rtx (orig
);
5339 /* We do not copy the USED flag, which is used as a mark bit during
5340 walks over the RTL. */
5341 RTX_FLAG (copy
, used
) = 0;
5343 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5346 RTX_FLAG (copy
, jump
) = 0;
5347 RTX_FLAG (copy
, call
) = 0;
5348 RTX_FLAG (copy
, frame_related
) = 0;
5351 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5353 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5354 switch (*format_ptr
++)
5357 if (XEXP (orig
, i
) != NULL
)
5358 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5363 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5364 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5365 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5366 XVEC (copy
, i
) = copy_asm_operands_vector
;
5367 else if (XVEC (orig
, i
) != NULL
)
5369 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5370 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5371 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5382 /* These are left unchanged. */
5389 if (code
== SCRATCH
)
5391 i
= copy_insn_n_scratches
++;
5392 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5393 copy_insn_scratch_in
[i
] = orig
;
5394 copy_insn_scratch_out
[i
] = copy
;
5396 else if (code
== ASM_OPERANDS
)
5398 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5399 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5400 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5401 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5407 /* Create a new copy of an rtx.
5408 This function differs from copy_rtx in that it handles SCRATCHes and
5409 ASM_OPERANDs properly.
5410 INSN doesn't really have to be a full INSN; it could be just the
5413 copy_insn (rtx insn
)
5415 copy_insn_n_scratches
= 0;
5416 orig_asm_operands_vector
= 0;
5417 orig_asm_constraints_vector
= 0;
5418 copy_asm_operands_vector
= 0;
5419 copy_asm_constraints_vector
= 0;
5420 return copy_insn_1 (insn
);
5423 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5424 on that assumption that INSN itself remains in its original place. */
5427 copy_delay_slot_insn (rtx insn
)
5429 /* Copy INSN with its rtx_code, all its notes, location etc. */
5430 insn
= copy_rtx (insn
);
5431 INSN_UID (insn
) = cur_insn_uid
++;
5435 /* Initialize data structures and variables in this file
5436 before generating rtl for each function. */
5441 set_first_insn (NULL
);
5442 set_last_insn (NULL
);
5443 if (MIN_NONDEBUG_INSN_UID
)
5444 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5447 cur_debug_insn_uid
= 1;
5448 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5449 first_label_num
= label_num
;
5452 /* Init the tables that describe all the pseudo regs. */
5454 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5456 crtl
->emit
.regno_pointer_align
5457 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5459 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5461 /* Put copies of all the hard registers into regno_reg_rtx. */
5462 memcpy (regno_reg_rtx
,
5463 initial_regno_reg_rtx
,
5464 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5466 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5467 init_virtual_regs ();
5469 /* Indicate that the virtual registers and stack locations are
5471 REG_POINTER (stack_pointer_rtx
) = 1;
5472 REG_POINTER (frame_pointer_rtx
) = 1;
5473 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5474 REG_POINTER (arg_pointer_rtx
) = 1;
5476 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5477 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5478 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5479 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5480 REG_POINTER (virtual_cfa_rtx
) = 1;
5482 #ifdef STACK_BOUNDARY
5483 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5484 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5485 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5486 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5488 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5489 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5490 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5491 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5492 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5495 #ifdef INIT_EXPANDERS
5500 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5503 gen_const_vector (enum machine_mode mode
, int constant
)
5508 enum machine_mode inner
;
5510 units
= GET_MODE_NUNITS (mode
);
5511 inner
= GET_MODE_INNER (mode
);
5513 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5515 v
= rtvec_alloc (units
);
5517 /* We need to call this function after we set the scalar const_tiny_rtx
5519 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5521 for (i
= 0; i
< units
; ++i
)
5522 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5524 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5528 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5529 all elements are zero, and the one vector when all elements are one. */
5531 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5533 enum machine_mode inner
= GET_MODE_INNER (mode
);
5534 int nunits
= GET_MODE_NUNITS (mode
);
5538 /* Check to see if all of the elements have the same value. */
5539 x
= RTVEC_ELT (v
, nunits
- 1);
5540 for (i
= nunits
- 2; i
>= 0; i
--)
5541 if (RTVEC_ELT (v
, i
) != x
)
5544 /* If the values are all the same, check to see if we can use one of the
5545 standard constant vectors. */
5548 if (x
== CONST0_RTX (inner
))
5549 return CONST0_RTX (mode
);
5550 else if (x
== CONST1_RTX (inner
))
5551 return CONST1_RTX (mode
);
5552 else if (x
== CONSTM1_RTX (inner
))
5553 return CONSTM1_RTX (mode
);
5556 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5559 /* Initialise global register information required by all functions. */
5562 init_emit_regs (void)
5565 enum machine_mode mode
;
5568 /* Reset register attributes */
5569 htab_empty (reg_attrs_htab
);
5571 /* We need reg_raw_mode, so initialize the modes now. */
5572 init_reg_modes_target ();
5574 /* Assign register numbers to the globally defined register rtx. */
5575 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5576 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5577 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5578 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5579 virtual_incoming_args_rtx
=
5580 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5581 virtual_stack_vars_rtx
=
5582 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5583 virtual_stack_dynamic_rtx
=
5584 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5585 virtual_outgoing_args_rtx
=
5586 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5587 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5588 virtual_preferred_stack_boundary_rtx
=
5589 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5591 /* Initialize RTL for commonly used hard registers. These are
5592 copied into regno_reg_rtx as we begin to compile each function. */
5593 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5594 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5596 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5597 return_address_pointer_rtx
5598 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5601 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5602 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5604 pic_offset_table_rtx
= NULL_RTX
;
5606 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5608 mode
= (enum machine_mode
) i
;
5609 attrs
= ggc_alloc_cleared_mem_attrs ();
5610 attrs
->align
= BITS_PER_UNIT
;
5611 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5612 if (mode
!= BLKmode
)
5614 attrs
->size_known_p
= true;
5615 attrs
->size
= GET_MODE_SIZE (mode
);
5616 if (STRICT_ALIGNMENT
)
5617 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5619 mode_mem_attrs
[i
] = attrs
;
5623 /* Create some permanent unique rtl objects shared between all functions. */
5626 init_emit_once (void)
5629 enum machine_mode mode
;
5630 enum machine_mode double_mode
;
5632 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5634 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5635 const_int_htab_eq
, NULL
);
5637 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5638 const_double_htab_eq
, NULL
);
5640 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5641 const_fixed_htab_eq
, NULL
);
5643 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5644 reg_attrs_htab_eq
, NULL
);
5646 /* Compute the word and byte modes. */
5648 byte_mode
= VOIDmode
;
5649 word_mode
= VOIDmode
;
5650 double_mode
= VOIDmode
;
5652 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5654 mode
= GET_MODE_WIDER_MODE (mode
))
5656 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5657 && byte_mode
== VOIDmode
)
5660 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5661 && word_mode
== VOIDmode
)
5665 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5667 mode
= GET_MODE_WIDER_MODE (mode
))
5669 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5670 && double_mode
== VOIDmode
)
5674 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5676 #ifdef INIT_EXPANDERS
5677 /* This is to initialize {init|mark|free}_machine_status before the first
5678 call to push_function_context_to. This is needed by the Chill front
5679 end which calls push_function_context_to before the first call to
5680 init_function_start. */
5684 /* Create the unique rtx's for certain rtx codes and operand values. */
5686 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5687 tries to use these variables. */
5688 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5689 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5690 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5692 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5693 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5694 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5696 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5698 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5699 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5700 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5705 dconsthalf
= dconst1
;
5706 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5708 for (i
= 0; i
< 3; i
++)
5710 const REAL_VALUE_TYPE
*const r
=
5711 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5713 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5715 mode
= GET_MODE_WIDER_MODE (mode
))
5716 const_tiny_rtx
[i
][(int) mode
] =
5717 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5719 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5721 mode
= GET_MODE_WIDER_MODE (mode
))
5722 const_tiny_rtx
[i
][(int) mode
] =
5723 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5725 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5727 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5729 mode
= GET_MODE_WIDER_MODE (mode
))
5730 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5732 for (mode
= MIN_MODE_PARTIAL_INT
;
5733 mode
<= MAX_MODE_PARTIAL_INT
;
5734 mode
= (enum machine_mode
)((int)(mode
) + 1))
5735 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5738 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5740 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5742 mode
= GET_MODE_WIDER_MODE (mode
))
5743 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5745 for (mode
= MIN_MODE_PARTIAL_INT
;
5746 mode
<= MAX_MODE_PARTIAL_INT
;
5747 mode
= (enum machine_mode
)((int)(mode
) + 1))
5748 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5750 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5752 mode
= GET_MODE_WIDER_MODE (mode
))
5754 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5755 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5758 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5760 mode
= GET_MODE_WIDER_MODE (mode
))
5762 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5763 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5766 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5768 mode
= GET_MODE_WIDER_MODE (mode
))
5770 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5771 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5772 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5775 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5777 mode
= GET_MODE_WIDER_MODE (mode
))
5779 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5780 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5783 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5785 mode
= GET_MODE_WIDER_MODE (mode
))
5787 FCONST0 (mode
).data
.high
= 0;
5788 FCONST0 (mode
).data
.low
= 0;
5789 FCONST0 (mode
).mode
= mode
;
5790 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5791 FCONST0 (mode
), mode
);
5794 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5796 mode
= GET_MODE_WIDER_MODE (mode
))
5798 FCONST0 (mode
).data
.high
= 0;
5799 FCONST0 (mode
).data
.low
= 0;
5800 FCONST0 (mode
).mode
= mode
;
5801 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5802 FCONST0 (mode
), mode
);
5805 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5807 mode
= GET_MODE_WIDER_MODE (mode
))
5809 FCONST0 (mode
).data
.high
= 0;
5810 FCONST0 (mode
).data
.low
= 0;
5811 FCONST0 (mode
).mode
= mode
;
5812 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5813 FCONST0 (mode
), mode
);
5815 /* We store the value 1. */
5816 FCONST1 (mode
).data
.high
= 0;
5817 FCONST1 (mode
).data
.low
= 0;
5818 FCONST1 (mode
).mode
= mode
;
5820 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5821 HOST_BITS_PER_DOUBLE_INT
,
5822 SIGNED_FIXED_POINT_MODE_P (mode
));
5823 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5824 FCONST1 (mode
), mode
);
5827 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5829 mode
= GET_MODE_WIDER_MODE (mode
))
5831 FCONST0 (mode
).data
.high
= 0;
5832 FCONST0 (mode
).data
.low
= 0;
5833 FCONST0 (mode
).mode
= mode
;
5834 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5835 FCONST0 (mode
), mode
);
5837 /* We store the value 1. */
5838 FCONST1 (mode
).data
.high
= 0;
5839 FCONST1 (mode
).data
.low
= 0;
5840 FCONST1 (mode
).mode
= mode
;
5842 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5843 HOST_BITS_PER_DOUBLE_INT
,
5844 SIGNED_FIXED_POINT_MODE_P (mode
));
5845 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5846 FCONST1 (mode
), mode
);
5849 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5851 mode
= GET_MODE_WIDER_MODE (mode
))
5853 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5856 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5858 mode
= GET_MODE_WIDER_MODE (mode
))
5860 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5863 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5865 mode
= GET_MODE_WIDER_MODE (mode
))
5867 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5868 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5871 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5873 mode
= GET_MODE_WIDER_MODE (mode
))
5875 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5876 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5879 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5880 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5881 const_tiny_rtx
[0][i
] = const0_rtx
;
5883 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5884 if (STORE_FLAG_VALUE
== 1)
5885 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5887 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
5888 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
5889 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
5890 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
5893 /* Produce exact duplicate of insn INSN after AFTER.
5894 Care updating of libcall regions if present. */
5897 emit_copy_of_insn_after (rtx insn
, rtx after
)
5901 switch (GET_CODE (insn
))
5904 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5908 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5912 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
5916 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5917 if (CALL_INSN_FUNCTION_USAGE (insn
))
5918 CALL_INSN_FUNCTION_USAGE (new_rtx
)
5919 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5920 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
5921 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
5922 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
5923 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
5924 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
5931 /* Update LABEL_NUSES. */
5932 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
5934 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
5936 /* If the old insn is frame related, then so is the new one. This is
5937 primarily needed for IA-64 unwind info which marks epilogue insns,
5938 which may be duplicated by the basic block reordering code. */
5939 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
5941 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5942 will make them. REG_LABEL_TARGETs are created there too, but are
5943 supposed to be sticky, so we copy them. */
5944 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5945 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
5947 if (GET_CODE (link
) == EXPR_LIST
)
5948 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
5949 copy_insn_1 (XEXP (link
, 0)));
5951 add_shallow_copy_of_reg_note (new_rtx
, link
);
5954 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
5958 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5960 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5962 if (hard_reg_clobbers
[mode
][regno
])
5963 return hard_reg_clobbers
[mode
][regno
];
5965 return (hard_reg_clobbers
[mode
][regno
] =
5966 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5969 location_t prologue_location
;
5970 location_t epilogue_location
;
5972 /* Hold current location information and last location information, so the
5973 datastructures are built lazily only when some instructions in given
5974 place are needed. */
5975 static location_t curr_location
;
5977 /* Allocate insn location datastructure. */
5979 insn_locations_init (void)
5981 prologue_location
= epilogue_location
= 0;
5982 curr_location
= UNKNOWN_LOCATION
;
5985 /* At the end of emit stage, clear current location. */
5987 insn_locations_finalize (void)
5989 epilogue_location
= curr_location
;
5990 curr_location
= UNKNOWN_LOCATION
;
5993 /* Set current location. */
5995 set_curr_insn_location (location_t location
)
5997 curr_location
= location
;
6000 /* Get current location. */
6002 curr_insn_location (void)
6004 return curr_location
;
6007 /* Return lexical scope block insn belongs to. */
6009 insn_scope (const_rtx insn
)
6011 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6014 /* Return line number of the statement that produced this insn. */
6016 insn_line (const_rtx insn
)
6018 return LOCATION_LINE (INSN_LOCATION (insn
));
6021 /* Return source file of the statement that produced this insn. */
6023 insn_file (const_rtx insn
)
6025 return LOCATION_FILE (INSN_LOCATION (insn
));
6028 /* Return true if memory model MODEL requires a pre-operation (release-style)
6029 barrier or a post-operation (acquire-style) barrier. While not universal,
6030 this function matches behavior of several targets. */
6033 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6035 switch (model
& MEMMODEL_MASK
)
6037 case MEMMODEL_RELAXED
:
6038 case MEMMODEL_CONSUME
:
6040 case MEMMODEL_RELEASE
:
6042 case MEMMODEL_ACQUIRE
:
6044 case MEMMODEL_ACQ_REL
:
6045 case MEMMODEL_SEQ_CST
:
6052 #include "gt-emit-rtl.h"