gcc/ChangeLog

   1 2023-09-05  Christoph Müllner  <christoph.muellner@vrull.eu>
   2
   3         * config/riscv/riscv.cc (riscv_build_integer_1): Don't
   4         require one zero bit in the upper 32 bits for LI+RORI synthesis.
   5
   6 2023-09-05  Jeff Law  <jlaw@ventanamicro.com>
   7
   8         * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
   9
  10 2023-09-05  Andrew Pinski  <apinski@marvell.com>
  11
  12         PR tree-optimization/98710
  13         * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
  14         (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
  15
  16 2023-09-05  Andrew Pinski  <apinski@marvell.com>
  17
  18         PR tree-optimization/103536
  19         * match.pd (`(x | y) & (x & z)`,
  20         `(x & y) | (x | z)`): New patterns.
  21
  22 2023-09-05  Andrew Pinski  <apinski@marvell.com>
  23
  24         PR tree-optimization/107137
  25         * match.pd (`(nop_convert)-(convert)a`): New pattern.
  26
  27 2023-09-05  Andrew Pinski  <apinski@marvell.com>
  28
  29         PR tree-optimization/96694
  30         * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
  31
  32 2023-09-05  Andrew Pinski  <apinski@marvell.com>
  33
  34         PR tree-optimization/105832
  35         * match.pd (`(1 >> X) != 0`): New pattern
  36
  37 2023-09-05  Edwin Lu  <ewlu@rivosinc.com>
  38
  39         * config/riscv/riscv.md: Update/Add types
  40
  41 2023-09-05  Edwin Lu  <ewlu@rivosinc.com>
  42
  43         * config/riscv/pic.md: Update types
  44
  45 2023-09-05  Christoph Müllner  <christoph.muellner@vrull.eu>
  46
  47         * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
  48         synthesis with rotate-right for XTheadBb.
  49
  50 2023-09-05  Vineet Gupta  <vineetg@rivosinc.com>
  51
  52         * config/riscv/zicond.md: Fix op2 pattern.
  53
  54 2023-09-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  55
  56         * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
  57
  58 2023-09-05  Xi Ruoyao  <xry111@xry111.site>
  59
  60         * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
  61         Define to 0 if not defined yet.
  62
  63 2023-09-05  Kito Cheng  <kito.cheng@sifive.com>
  64
  65         * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
  66         * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
  67
  68 2023-09-05  Pan Li  <pan2.li@intel.com>
  69
  70         * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
  71         * config/riscv/vector.md: Extend iterator for VLS.
  72
  73 2023-09-05  Lulu Cheng  <chenglulu@loongson.cn>
  74
  75         * config.gcc: Export the header file lasxintrin.h.
  76         * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
  77         Add Loongson ASX builtin functions support.
  78         (AVAIL_ALL): Ditto.
  79         (LASX_BUILTIN): Ditto.
  80         (LASX_NO_TARGET_BUILTIN): Ditto.
  81         (LASX_BUILTIN_TEST_BRANCH): Ditto.
  82         (CODE_FOR_lasx_xvsadd_b): Ditto.
  83         (CODE_FOR_lasx_xvsadd_h): Ditto.
  84         (CODE_FOR_lasx_xvsadd_w): Ditto.
  85         (CODE_FOR_lasx_xvsadd_d): Ditto.
  86         (CODE_FOR_lasx_xvsadd_bu): Ditto.
  87         (CODE_FOR_lasx_xvsadd_hu): Ditto.
  88         (CODE_FOR_lasx_xvsadd_wu): Ditto.
  89         (CODE_FOR_lasx_xvsadd_du): Ditto.
  90         (CODE_FOR_lasx_xvadd_b): Ditto.
  91         (CODE_FOR_lasx_xvadd_h): Ditto.
  92         (CODE_FOR_lasx_xvadd_w): Ditto.
  93         (CODE_FOR_lasx_xvadd_d): Ditto.
  94         (CODE_FOR_lasx_xvaddi_bu): Ditto.
  95         (CODE_FOR_lasx_xvaddi_hu): Ditto.
  96         (CODE_FOR_lasx_xvaddi_wu): Ditto.
  97         (CODE_FOR_lasx_xvaddi_du): Ditto.
  98         (CODE_FOR_lasx_xvand_v): Ditto.
  99         (CODE_FOR_lasx_xvandi_b): Ditto.
 100         (CODE_FOR_lasx_xvbitsel_v): Ditto.
 101         (CODE_FOR_lasx_xvseqi_b): Ditto.
 102         (CODE_FOR_lasx_xvseqi_h): Ditto.
 103         (CODE_FOR_lasx_xvseqi_w): Ditto.
 104         (CODE_FOR_lasx_xvseqi_d): Ditto.
 105         (CODE_FOR_lasx_xvslti_b): Ditto.
 106         (CODE_FOR_lasx_xvslti_h): Ditto.
 107         (CODE_FOR_lasx_xvslti_w): Ditto.
 108         (CODE_FOR_lasx_xvslti_d): Ditto.
 109         (CODE_FOR_lasx_xvslti_bu): Ditto.
 110         (CODE_FOR_lasx_xvslti_hu): Ditto.
 111         (CODE_FOR_lasx_xvslti_wu): Ditto.
 112         (CODE_FOR_lasx_xvslti_du): Ditto.
 113         (CODE_FOR_lasx_xvslei_b): Ditto.
 114         (CODE_FOR_lasx_xvslei_h): Ditto.
 115         (CODE_FOR_lasx_xvslei_w): Ditto.
 116         (CODE_FOR_lasx_xvslei_d): Ditto.
 117         (CODE_FOR_lasx_xvslei_bu): Ditto.
 118         (CODE_FOR_lasx_xvslei_hu): Ditto.
 119         (CODE_FOR_lasx_xvslei_wu): Ditto.
 120         (CODE_FOR_lasx_xvslei_du): Ditto.
 121         (CODE_FOR_lasx_xvdiv_b): Ditto.
 122         (CODE_FOR_lasx_xvdiv_h): Ditto.
 123         (CODE_FOR_lasx_xvdiv_w): Ditto.
 124         (CODE_FOR_lasx_xvdiv_d): Ditto.
 125         (CODE_FOR_lasx_xvdiv_bu): Ditto.
 126         (CODE_FOR_lasx_xvdiv_hu): Ditto.
 127         (CODE_FOR_lasx_xvdiv_wu): Ditto.
 128         (CODE_FOR_lasx_xvdiv_du): Ditto.
 129         (CODE_FOR_lasx_xvfadd_s): Ditto.
 130         (CODE_FOR_lasx_xvfadd_d): Ditto.
 131         (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
 132         (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
 133         (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
 134         (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
 135         (CODE_FOR_lasx_xvffint_s_w): Ditto.
 136         (CODE_FOR_lasx_xvffint_d_l): Ditto.
 137         (CODE_FOR_lasx_xvffint_s_wu): Ditto.
 138         (CODE_FOR_lasx_xvffint_d_lu): Ditto.
 139         (CODE_FOR_lasx_xvfsub_s): Ditto.
 140         (CODE_FOR_lasx_xvfsub_d): Ditto.
 141         (CODE_FOR_lasx_xvfmul_s): Ditto.
 142         (CODE_FOR_lasx_xvfmul_d): Ditto.
 143         (CODE_FOR_lasx_xvfdiv_s): Ditto.
 144         (CODE_FOR_lasx_xvfdiv_d): Ditto.
 145         (CODE_FOR_lasx_xvfmax_s): Ditto.
 146         (CODE_FOR_lasx_xvfmax_d): Ditto.
 147         (CODE_FOR_lasx_xvfmin_s): Ditto.
 148         (CODE_FOR_lasx_xvfmin_d): Ditto.
 149         (CODE_FOR_lasx_xvfsqrt_s): Ditto.
 150         (CODE_FOR_lasx_xvfsqrt_d): Ditto.
 151         (CODE_FOR_lasx_xvflogb_s): Ditto.
 152         (CODE_FOR_lasx_xvflogb_d): Ditto.
 153         (CODE_FOR_lasx_xvmax_b): Ditto.
 154         (CODE_FOR_lasx_xvmax_h): Ditto.
 155         (CODE_FOR_lasx_xvmax_w): Ditto.
 156         (CODE_FOR_lasx_xvmax_d): Ditto.
 157         (CODE_FOR_lasx_xvmaxi_b): Ditto.
 158         (CODE_FOR_lasx_xvmaxi_h): Ditto.
 159         (CODE_FOR_lasx_xvmaxi_w): Ditto.
 160         (CODE_FOR_lasx_xvmaxi_d): Ditto.
 161         (CODE_FOR_lasx_xvmax_bu): Ditto.
 162         (CODE_FOR_lasx_xvmax_hu): Ditto.
 163         (CODE_FOR_lasx_xvmax_wu): Ditto.
 164         (CODE_FOR_lasx_xvmax_du): Ditto.
 165         (CODE_FOR_lasx_xvmaxi_bu): Ditto.
 166         (CODE_FOR_lasx_xvmaxi_hu): Ditto.
 167         (CODE_FOR_lasx_xvmaxi_wu): Ditto.
 168         (CODE_FOR_lasx_xvmaxi_du): Ditto.
 169         (CODE_FOR_lasx_xvmin_b): Ditto.
 170         (CODE_FOR_lasx_xvmin_h): Ditto.
 171         (CODE_FOR_lasx_xvmin_w): Ditto.
 172         (CODE_FOR_lasx_xvmin_d): Ditto.
 173         (CODE_FOR_lasx_xvmini_b): Ditto.
 174         (CODE_FOR_lasx_xvmini_h): Ditto.
 175         (CODE_FOR_lasx_xvmini_w): Ditto.
 176         (CODE_FOR_lasx_xvmini_d): Ditto.
 177         (CODE_FOR_lasx_xvmin_bu): Ditto.
 178         (CODE_FOR_lasx_xvmin_hu): Ditto.
 179         (CODE_FOR_lasx_xvmin_wu): Ditto.
 180         (CODE_FOR_lasx_xvmin_du): Ditto.
 181         (CODE_FOR_lasx_xvmini_bu): Ditto.
 182         (CODE_FOR_lasx_xvmini_hu): Ditto.
 183         (CODE_FOR_lasx_xvmini_wu): Ditto.
 184         (CODE_FOR_lasx_xvmini_du): Ditto.
 185         (CODE_FOR_lasx_xvmod_b): Ditto.
 186         (CODE_FOR_lasx_xvmod_h): Ditto.
 187         (CODE_FOR_lasx_xvmod_w): Ditto.
 188         (CODE_FOR_lasx_xvmod_d): Ditto.
 189         (CODE_FOR_lasx_xvmod_bu): Ditto.
 190         (CODE_FOR_lasx_xvmod_hu): Ditto.
 191         (CODE_FOR_lasx_xvmod_wu): Ditto.
 192         (CODE_FOR_lasx_xvmod_du): Ditto.
 193         (CODE_FOR_lasx_xvmul_b): Ditto.
 194         (CODE_FOR_lasx_xvmul_h): Ditto.
 195         (CODE_FOR_lasx_xvmul_w): Ditto.
 196         (CODE_FOR_lasx_xvmul_d): Ditto.
 197         (CODE_FOR_lasx_xvclz_b): Ditto.
 198         (CODE_FOR_lasx_xvclz_h): Ditto.
 199         (CODE_FOR_lasx_xvclz_w): Ditto.
 200         (CODE_FOR_lasx_xvclz_d): Ditto.
 201         (CODE_FOR_lasx_xvnor_v): Ditto.
 202         (CODE_FOR_lasx_xvor_v): Ditto.
 203         (CODE_FOR_lasx_xvori_b): Ditto.
 204         (CODE_FOR_lasx_xvnori_b): Ditto.
 205         (CODE_FOR_lasx_xvpcnt_b): Ditto.
 206         (CODE_FOR_lasx_xvpcnt_h): Ditto.
 207         (CODE_FOR_lasx_xvpcnt_w): Ditto.
 208         (CODE_FOR_lasx_xvpcnt_d): Ditto.
 209         (CODE_FOR_lasx_xvxor_v): Ditto.
 210         (CODE_FOR_lasx_xvxori_b): Ditto.
 211         (CODE_FOR_lasx_xvsll_b): Ditto.
 212         (CODE_FOR_lasx_xvsll_h): Ditto.
 213         (CODE_FOR_lasx_xvsll_w): Ditto.
 214         (CODE_FOR_lasx_xvsll_d): Ditto.
 215         (CODE_FOR_lasx_xvslli_b): Ditto.
 216         (CODE_FOR_lasx_xvslli_h): Ditto.
 217         (CODE_FOR_lasx_xvslli_w): Ditto.
 218         (CODE_FOR_lasx_xvslli_d): Ditto.
 219         (CODE_FOR_lasx_xvsra_b): Ditto.
 220         (CODE_FOR_lasx_xvsra_h): Ditto.
 221         (CODE_FOR_lasx_xvsra_w): Ditto.
 222         (CODE_FOR_lasx_xvsra_d): Ditto.
 223         (CODE_FOR_lasx_xvsrai_b): Ditto.
 224         (CODE_FOR_lasx_xvsrai_h): Ditto.
 225         (CODE_FOR_lasx_xvsrai_w): Ditto.
 226         (CODE_FOR_lasx_xvsrai_d): Ditto.
 227         (CODE_FOR_lasx_xvsrl_b): Ditto.
 228         (CODE_FOR_lasx_xvsrl_h): Ditto.
 229         (CODE_FOR_lasx_xvsrl_w): Ditto.
 230         (CODE_FOR_lasx_xvsrl_d): Ditto.
 231         (CODE_FOR_lasx_xvsrli_b): Ditto.
 232         (CODE_FOR_lasx_xvsrli_h): Ditto.
 233         (CODE_FOR_lasx_xvsrli_w): Ditto.
 234         (CODE_FOR_lasx_xvsrli_d): Ditto.
 235         (CODE_FOR_lasx_xvsub_b): Ditto.
 236         (CODE_FOR_lasx_xvsub_h): Ditto.
 237         (CODE_FOR_lasx_xvsub_w): Ditto.
 238         (CODE_FOR_lasx_xvsub_d): Ditto.
 239         (CODE_FOR_lasx_xvsubi_bu): Ditto.
 240         (CODE_FOR_lasx_xvsubi_hu): Ditto.
 241         (CODE_FOR_lasx_xvsubi_wu): Ditto.
 242         (CODE_FOR_lasx_xvsubi_du): Ditto.
 243         (CODE_FOR_lasx_xvpackod_d): Ditto.
 244         (CODE_FOR_lasx_xvpackev_d): Ditto.
 245         (CODE_FOR_lasx_xvpickod_d): Ditto.
 246         (CODE_FOR_lasx_xvpickev_d): Ditto.
 247         (CODE_FOR_lasx_xvrepli_b): Ditto.
 248         (CODE_FOR_lasx_xvrepli_h): Ditto.
 249         (CODE_FOR_lasx_xvrepli_w): Ditto.
 250         (CODE_FOR_lasx_xvrepli_d): Ditto.
 251         (CODE_FOR_lasx_xvandn_v): Ditto.
 252         (CODE_FOR_lasx_xvorn_v): Ditto.
 253         (CODE_FOR_lasx_xvneg_b): Ditto.
 254         (CODE_FOR_lasx_xvneg_h): Ditto.
 255         (CODE_FOR_lasx_xvneg_w): Ditto.
 256         (CODE_FOR_lasx_xvneg_d): Ditto.
 257         (CODE_FOR_lasx_xvbsrl_v): Ditto.
 258         (CODE_FOR_lasx_xvbsll_v): Ditto.
 259         (CODE_FOR_lasx_xvfmadd_s): Ditto.
 260         (CODE_FOR_lasx_xvfmadd_d): Ditto.
 261         (CODE_FOR_lasx_xvfmsub_s): Ditto.
 262         (CODE_FOR_lasx_xvfmsub_d): Ditto.
 263         (CODE_FOR_lasx_xvfnmadd_s): Ditto.
 264         (CODE_FOR_lasx_xvfnmadd_d): Ditto.
 265         (CODE_FOR_lasx_xvfnmsub_s): Ditto.
 266         (CODE_FOR_lasx_xvfnmsub_d): Ditto.
 267         (CODE_FOR_lasx_xvpermi_q): Ditto.
 268         (CODE_FOR_lasx_xvpermi_d): Ditto.
 269         (CODE_FOR_lasx_xbnz_v): Ditto.
 270         (CODE_FOR_lasx_xbz_v): Ditto.
 271         (CODE_FOR_lasx_xvssub_b): Ditto.
 272         (CODE_FOR_lasx_xvssub_h): Ditto.
 273         (CODE_FOR_lasx_xvssub_w): Ditto.
 274         (CODE_FOR_lasx_xvssub_d): Ditto.
 275         (CODE_FOR_lasx_xvssub_bu): Ditto.
 276         (CODE_FOR_lasx_xvssub_hu): Ditto.
 277         (CODE_FOR_lasx_xvssub_wu): Ditto.
 278         (CODE_FOR_lasx_xvssub_du): Ditto.
 279         (CODE_FOR_lasx_xvabsd_b): Ditto.
 280         (CODE_FOR_lasx_xvabsd_h): Ditto.
 281         (CODE_FOR_lasx_xvabsd_w): Ditto.
 282         (CODE_FOR_lasx_xvabsd_d): Ditto.
 283         (CODE_FOR_lasx_xvabsd_bu): Ditto.
 284         (CODE_FOR_lasx_xvabsd_hu): Ditto.
 285         (CODE_FOR_lasx_xvabsd_wu): Ditto.
 286         (CODE_FOR_lasx_xvabsd_du): Ditto.
 287         (CODE_FOR_lasx_xvavg_b): Ditto.
 288         (CODE_FOR_lasx_xvavg_h): Ditto.
 289         (CODE_FOR_lasx_xvavg_w): Ditto.
 290         (CODE_FOR_lasx_xvavg_d): Ditto.
 291         (CODE_FOR_lasx_xvavg_bu): Ditto.
 292         (CODE_FOR_lasx_xvavg_hu): Ditto.
 293         (CODE_FOR_lasx_xvavg_wu): Ditto.
 294         (CODE_FOR_lasx_xvavg_du): Ditto.
 295         (CODE_FOR_lasx_xvavgr_b): Ditto.
 296         (CODE_FOR_lasx_xvavgr_h): Ditto.
 297         (CODE_FOR_lasx_xvavgr_w): Ditto.
 298         (CODE_FOR_lasx_xvavgr_d): Ditto.
 299         (CODE_FOR_lasx_xvavgr_bu): Ditto.
 300         (CODE_FOR_lasx_xvavgr_hu): Ditto.
 301         (CODE_FOR_lasx_xvavgr_wu): Ditto.
 302         (CODE_FOR_lasx_xvavgr_du): Ditto.
 303         (CODE_FOR_lasx_xvmuh_b): Ditto.
 304         (CODE_FOR_lasx_xvmuh_h): Ditto.
 305         (CODE_FOR_lasx_xvmuh_w): Ditto.
 306         (CODE_FOR_lasx_xvmuh_d): Ditto.
 307         (CODE_FOR_lasx_xvmuh_bu): Ditto.
 308         (CODE_FOR_lasx_xvmuh_hu): Ditto.
 309         (CODE_FOR_lasx_xvmuh_wu): Ditto.
 310         (CODE_FOR_lasx_xvmuh_du): Ditto.
 311         (CODE_FOR_lasx_xvssran_b_h): Ditto.
 312         (CODE_FOR_lasx_xvssran_h_w): Ditto.
 313         (CODE_FOR_lasx_xvssran_w_d): Ditto.
 314         (CODE_FOR_lasx_xvssran_bu_h): Ditto.
 315         (CODE_FOR_lasx_xvssran_hu_w): Ditto.
 316         (CODE_FOR_lasx_xvssran_wu_d): Ditto.
 317         (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
 318         (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
 319         (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
 320         (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
 321         (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
 322         (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
 323         (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
 324         (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
 325         (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
 326         (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
 327         (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
 328         (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
 329         (CODE_FOR_lasx_xvftint_w_s): Ditto.
 330         (CODE_FOR_lasx_xvftint_l_d): Ditto.
 331         (CODE_FOR_lasx_xvftint_wu_s): Ditto.
 332         (CODE_FOR_lasx_xvftint_lu_d): Ditto.
 333         (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
 334         (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
 335         (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
 336         (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
 337         (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
 338         (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
 339         (CODE_FOR_lasx_xvsat_b): Ditto.
 340         (CODE_FOR_lasx_xvsat_h): Ditto.
 341         (CODE_FOR_lasx_xvsat_w): Ditto.
 342         (CODE_FOR_lasx_xvsat_d): Ditto.
 343         (CODE_FOR_lasx_xvsat_bu): Ditto.
 344         (CODE_FOR_lasx_xvsat_hu): Ditto.
 345         (CODE_FOR_lasx_xvsat_wu): Ditto.
 346         (CODE_FOR_lasx_xvsat_du): Ditto.
 347         (loongarch_builtin_vectorized_function): Ditto.
 348         (loongarch_expand_builtin_insn): Ditto.
 349         (loongarch_expand_builtin): Ditto.
 350         * config/loongarch/loongarch-ftypes.def (1): Ditto.
 351         (2): Ditto.
 352         (3): Ditto.
 353         (4): Ditto.
 354         * config/loongarch/lasxintrin.h: New file.
 355
 356 2023-09-05  Lulu Cheng  <chenglulu@loongson.cn>
 357
 358         * config/loongarch/loongarch-modes.def
 359         (VECTOR_MODES): Add Loongson ASX instruction support.
 360         * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
 361         (loongarch_split_256bit_move_p): Ditto.
 362         (loongarch_expand_vector_group_init): Ditto.
 363         (loongarch_expand_vec_perm_1): Ditto.
 364         * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
 365         (loongarch_valid_offset_p): Ditto.
 366         (loongarch_address_insns): Ditto.
 367         (loongarch_const_insns): Ditto.
 368         (loongarch_legitimize_move): Ditto.
 369         (loongarch_builtin_vectorization_cost): Ditto.
 370         (loongarch_split_move_p): Ditto.
 371         (loongarch_split_move): Ditto.
 372         (loongarch_output_move_index_float): Ditto.
 373         (loongarch_split_256bit_move_p): Ditto.
 374         (loongarch_split_256bit_move): Ditto.
 375         (loongarch_output_move): Ditto.
 376         (loongarch_print_operand_reloc): Ditto.
 377         (loongarch_print_operand): Ditto.
 378         (loongarch_hard_regno_mode_ok_uncached): Ditto.
 379         (loongarch_hard_regno_nregs): Ditto.
 380         (loongarch_class_max_nregs): Ditto.
 381         (loongarch_can_change_mode_class): Ditto.
 382         (loongarch_mode_ok_for_mov_fmt_p): Ditto.
 383         (loongarch_vector_mode_supported_p): Ditto.
 384         (loongarch_preferred_simd_mode): Ditto.
 385         (loongarch_autovectorize_vector_modes): Ditto.
 386         (loongarch_lsx_output_division): Ditto.
 387         (loongarch_expand_lsx_shuffle): Ditto.
 388         (loongarch_expand_vec_perm): Ditto.
 389         (loongarch_expand_vec_perm_interleave): Ditto.
 390         (loongarch_try_expand_lsx_vshuf_const): Ditto.
 391         (loongarch_expand_vec_perm_even_odd_1): Ditto.
 392         (loongarch_expand_vec_perm_even_odd): Ditto.
 393         (loongarch_expand_vec_perm_1): Ditto.
 394         (loongarch_expand_vec_perm_const_2): Ditto.
 395         (loongarch_is_quad_duplicate): Ditto.
 396         (loongarch_is_double_duplicate): Ditto.
 397         (loongarch_is_odd_extraction): Ditto.
 398         (loongarch_is_even_extraction): Ditto.
 399         (loongarch_is_extraction_permutation): Ditto.
 400         (loongarch_is_center_extraction): Ditto.
 401         (loongarch_is_reversing_permutation): Ditto.
 402         (loongarch_is_di_misalign_extract): Ditto.
 403         (loongarch_is_si_misalign_extract): Ditto.
 404         (loongarch_is_lasx_lowpart_interleave): Ditto.
 405         (loongarch_is_lasx_lowpart_interleave_2): Ditto.
 406         (COMPARE_SELECTOR): Ditto.
 407         (loongarch_is_lasx_lowpart_extract): Ditto.
 408         (loongarch_is_lasx_highpart_interleave): Ditto.
 409         (loongarch_is_lasx_highpart_interleave_2): Ditto.
 410         (loongarch_is_elem_duplicate): Ditto.
 411         (loongarch_is_op_reverse_perm): Ditto.
 412         (loongarch_is_single_op_perm): Ditto.
 413         (loongarch_is_divisible_perm): Ditto.
 414         (loongarch_is_triple_stride_extract): Ditto.
 415         (loongarch_vectorize_vec_perm_const): Ditto.
 416         (loongarch_cpu_sched_reassociation_width): Ditto.
 417         (loongarch_expand_vector_extract): Ditto.
 418         (emit_reduc_half): Ditto.
 419         (loongarch_expand_vec_unpack): Ditto.
 420         (loongarch_expand_vector_group_init): Ditto.
 421         (loongarch_expand_vector_init): Ditto.
 422         (loongarch_expand_lsx_cmp): Ditto.
 423         (loongarch_builtin_support_vector_misalignment): Ditto.
 424         * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
 425         (BITS_PER_LASX_REG): Ditto.
 426         (STRUCTURE_SIZE_BOUNDARY): Ditto.
 427         (LASX_REG_FIRST): Ditto.
 428         (LASX_REG_LAST): Ditto.
 429         (LASX_REG_NUM): Ditto.
 430         (LASX_REG_P): Ditto.
 431         (LASX_REG_RTX_P): Ditto.
 432         (LASX_SUPPORTED_MODE_P): Ditto.
 433         * config/loongarch/loongarch.md: Ditto.
 434         * config/loongarch/lasx.md: New file.
 435
 436 2023-09-05  Lulu Cheng  <chenglulu@loongson.cn>
 437
 438         * config.gcc: Export the header file lsxintrin.h.
 439         * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
 440         (enum loongarch_builtin_type): Ditto.
 441         (AVAIL_ALL): Ditto.
 442         (LARCH_BUILTIN): Ditto.
 443         (LSX_BUILTIN): Ditto.
 444         (LSX_BUILTIN_TEST_BRANCH): Ditto.
 445         (LSX_NO_TARGET_BUILTIN): Ditto.
 446         (CODE_FOR_lsx_vsadd_b): Ditto.
 447         (CODE_FOR_lsx_vsadd_h): Ditto.
 448         (CODE_FOR_lsx_vsadd_w): Ditto.
 449         (CODE_FOR_lsx_vsadd_d): Ditto.
 450         (CODE_FOR_lsx_vsadd_bu): Ditto.
 451         (CODE_FOR_lsx_vsadd_hu): Ditto.
 452         (CODE_FOR_lsx_vsadd_wu): Ditto.
 453         (CODE_FOR_lsx_vsadd_du): Ditto.
 454         (CODE_FOR_lsx_vadd_b): Ditto.
 455         (CODE_FOR_lsx_vadd_h): Ditto.
 456         (CODE_FOR_lsx_vadd_w): Ditto.
 457         (CODE_FOR_lsx_vadd_d): Ditto.
 458         (CODE_FOR_lsx_vaddi_bu): Ditto.
 459         (CODE_FOR_lsx_vaddi_hu): Ditto.
 460         (CODE_FOR_lsx_vaddi_wu): Ditto.
 461         (CODE_FOR_lsx_vaddi_du): Ditto.
 462         (CODE_FOR_lsx_vand_v): Ditto.
 463         (CODE_FOR_lsx_vandi_b): Ditto.
 464         (CODE_FOR_lsx_bnz_v): Ditto.
 465         (CODE_FOR_lsx_bz_v): Ditto.
 466         (CODE_FOR_lsx_vbitsel_v): Ditto.
 467         (CODE_FOR_lsx_vseqi_b): Ditto.
 468         (CODE_FOR_lsx_vseqi_h): Ditto.
 469         (CODE_FOR_lsx_vseqi_w): Ditto.
 470         (CODE_FOR_lsx_vseqi_d): Ditto.
 471         (CODE_FOR_lsx_vslti_b): Ditto.
 472         (CODE_FOR_lsx_vslti_h): Ditto.
 473         (CODE_FOR_lsx_vslti_w): Ditto.
 474         (CODE_FOR_lsx_vslti_d): Ditto.
 475         (CODE_FOR_lsx_vslti_bu): Ditto.
 476         (CODE_FOR_lsx_vslti_hu): Ditto.
 477         (CODE_FOR_lsx_vslti_wu): Ditto.
 478         (CODE_FOR_lsx_vslti_du): Ditto.
 479         (CODE_FOR_lsx_vslei_b): Ditto.
 480         (CODE_FOR_lsx_vslei_h): Ditto.
 481         (CODE_FOR_lsx_vslei_w): Ditto.
 482         (CODE_FOR_lsx_vslei_d): Ditto.
 483         (CODE_FOR_lsx_vslei_bu): Ditto.
 484         (CODE_FOR_lsx_vslei_hu): Ditto.
 485         (CODE_FOR_lsx_vslei_wu): Ditto.
 486         (CODE_FOR_lsx_vslei_du): Ditto.
 487         (CODE_FOR_lsx_vdiv_b): Ditto.
 488         (CODE_FOR_lsx_vdiv_h): Ditto.
 489         (CODE_FOR_lsx_vdiv_w): Ditto.
 490         (CODE_FOR_lsx_vdiv_d): Ditto.
 491         (CODE_FOR_lsx_vdiv_bu): Ditto.
 492         (CODE_FOR_lsx_vdiv_hu): Ditto.
 493         (CODE_FOR_lsx_vdiv_wu): Ditto.
 494         (CODE_FOR_lsx_vdiv_du): Ditto.
 495         (CODE_FOR_lsx_vfadd_s): Ditto.
 496         (CODE_FOR_lsx_vfadd_d): Ditto.
 497         (CODE_FOR_lsx_vftintrz_w_s): Ditto.
 498         (CODE_FOR_lsx_vftintrz_l_d): Ditto.
 499         (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
 500         (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
 501         (CODE_FOR_lsx_vffint_s_w): Ditto.
 502         (CODE_FOR_lsx_vffint_d_l): Ditto.
 503         (CODE_FOR_lsx_vffint_s_wu): Ditto.
 504         (CODE_FOR_lsx_vffint_d_lu): Ditto.
 505         (CODE_FOR_lsx_vfsub_s): Ditto.
 506         (CODE_FOR_lsx_vfsub_d): Ditto.
 507         (CODE_FOR_lsx_vfmul_s): Ditto.
 508         (CODE_FOR_lsx_vfmul_d): Ditto.
 509         (CODE_FOR_lsx_vfdiv_s): Ditto.
 510         (CODE_FOR_lsx_vfdiv_d): Ditto.
 511         (CODE_FOR_lsx_vfmax_s): Ditto.
 512         (CODE_FOR_lsx_vfmax_d): Ditto.
 513         (CODE_FOR_lsx_vfmin_s): Ditto.
 514         (CODE_FOR_lsx_vfmin_d): Ditto.
 515         (CODE_FOR_lsx_vfsqrt_s): Ditto.
 516         (CODE_FOR_lsx_vfsqrt_d): Ditto.
 517         (CODE_FOR_lsx_vflogb_s): Ditto.
 518         (CODE_FOR_lsx_vflogb_d): Ditto.
 519         (CODE_FOR_lsx_vmax_b): Ditto.
 520         (CODE_FOR_lsx_vmax_h): Ditto.
 521         (CODE_FOR_lsx_vmax_w): Ditto.
 522         (CODE_FOR_lsx_vmax_d): Ditto.
 523         (CODE_FOR_lsx_vmaxi_b): Ditto.
 524         (CODE_FOR_lsx_vmaxi_h): Ditto.
 525         (CODE_FOR_lsx_vmaxi_w): Ditto.
 526         (CODE_FOR_lsx_vmaxi_d): Ditto.
 527         (CODE_FOR_lsx_vmax_bu): Ditto.
 528         (CODE_FOR_lsx_vmax_hu): Ditto.
 529         (CODE_FOR_lsx_vmax_wu): Ditto.
 530         (CODE_FOR_lsx_vmax_du): Ditto.
 531         (CODE_FOR_lsx_vmaxi_bu): Ditto.
 532         (CODE_FOR_lsx_vmaxi_hu): Ditto.
 533         (CODE_FOR_lsx_vmaxi_wu): Ditto.
 534         (CODE_FOR_lsx_vmaxi_du): Ditto.
 535         (CODE_FOR_lsx_vmin_b): Ditto.
 536         (CODE_FOR_lsx_vmin_h): Ditto.
 537         (CODE_FOR_lsx_vmin_w): Ditto.
 538         (CODE_FOR_lsx_vmin_d): Ditto.
 539         (CODE_FOR_lsx_vmini_b): Ditto.
 540         (CODE_FOR_lsx_vmini_h): Ditto.
 541         (CODE_FOR_lsx_vmini_w): Ditto.
 542         (CODE_FOR_lsx_vmini_d): Ditto.
 543         (CODE_FOR_lsx_vmin_bu): Ditto.
 544         (CODE_FOR_lsx_vmin_hu): Ditto.
 545         (CODE_FOR_lsx_vmin_wu): Ditto.
 546         (CODE_FOR_lsx_vmin_du): Ditto.
 547         (CODE_FOR_lsx_vmini_bu): Ditto.
 548         (CODE_FOR_lsx_vmini_hu): Ditto.
 549         (CODE_FOR_lsx_vmini_wu): Ditto.
 550         (CODE_FOR_lsx_vmini_du): Ditto.
 551         (CODE_FOR_lsx_vmod_b): Ditto.
 552         (CODE_FOR_lsx_vmod_h): Ditto.
 553         (CODE_FOR_lsx_vmod_w): Ditto.
 554         (CODE_FOR_lsx_vmod_d): Ditto.
 555         (CODE_FOR_lsx_vmod_bu): Ditto.
 556         (CODE_FOR_lsx_vmod_hu): Ditto.
 557         (CODE_FOR_lsx_vmod_wu): Ditto.
 558         (CODE_FOR_lsx_vmod_du): Ditto.
 559         (CODE_FOR_lsx_vmul_b): Ditto.
 560         (CODE_FOR_lsx_vmul_h): Ditto.
 561         (CODE_FOR_lsx_vmul_w): Ditto.
 562         (CODE_FOR_lsx_vmul_d): Ditto.
 563         (CODE_FOR_lsx_vclz_b): Ditto.
 564         (CODE_FOR_lsx_vclz_h): Ditto.
 565         (CODE_FOR_lsx_vclz_w): Ditto.
 566         (CODE_FOR_lsx_vclz_d): Ditto.
 567         (CODE_FOR_lsx_vnor_v): Ditto.
 568         (CODE_FOR_lsx_vor_v): Ditto.
 569         (CODE_FOR_lsx_vori_b): Ditto.
 570         (CODE_FOR_lsx_vnori_b): Ditto.
 571         (CODE_FOR_lsx_vpcnt_b): Ditto.
 572         (CODE_FOR_lsx_vpcnt_h): Ditto.
 573         (CODE_FOR_lsx_vpcnt_w): Ditto.
 574         (CODE_FOR_lsx_vpcnt_d): Ditto.
 575         (CODE_FOR_lsx_vxor_v): Ditto.
 576         (CODE_FOR_lsx_vxori_b): Ditto.
 577         (CODE_FOR_lsx_vsll_b): Ditto.
 578         (CODE_FOR_lsx_vsll_h): Ditto.
 579         (CODE_FOR_lsx_vsll_w): Ditto.
 580         (CODE_FOR_lsx_vsll_d): Ditto.
 581         (CODE_FOR_lsx_vslli_b): Ditto.
 582         (CODE_FOR_lsx_vslli_h): Ditto.
 583         (CODE_FOR_lsx_vslli_w): Ditto.
 584         (CODE_FOR_lsx_vslli_d): Ditto.
 585         (CODE_FOR_lsx_vsra_b): Ditto.
 586         (CODE_FOR_lsx_vsra_h): Ditto.
 587         (CODE_FOR_lsx_vsra_w): Ditto.
 588         (CODE_FOR_lsx_vsra_d): Ditto.
 589         (CODE_FOR_lsx_vsrai_b): Ditto.
 590         (CODE_FOR_lsx_vsrai_h): Ditto.
 591         (CODE_FOR_lsx_vsrai_w): Ditto.
 592         (CODE_FOR_lsx_vsrai_d): Ditto.
 593         (CODE_FOR_lsx_vsrl_b): Ditto.
 594         (CODE_FOR_lsx_vsrl_h): Ditto.
 595         (CODE_FOR_lsx_vsrl_w): Ditto.
 596         (CODE_FOR_lsx_vsrl_d): Ditto.
 597         (CODE_FOR_lsx_vsrli_b): Ditto.
 598         (CODE_FOR_lsx_vsrli_h): Ditto.
 599         (CODE_FOR_lsx_vsrli_w): Ditto.
 600         (CODE_FOR_lsx_vsrli_d): Ditto.
 601         (CODE_FOR_lsx_vsub_b): Ditto.
 602         (CODE_FOR_lsx_vsub_h): Ditto.
 603         (CODE_FOR_lsx_vsub_w): Ditto.
 604         (CODE_FOR_lsx_vsub_d): Ditto.
 605         (CODE_FOR_lsx_vsubi_bu): Ditto.
 606         (CODE_FOR_lsx_vsubi_hu): Ditto.
 607         (CODE_FOR_lsx_vsubi_wu): Ditto.
 608         (CODE_FOR_lsx_vsubi_du): Ditto.
 609         (CODE_FOR_lsx_vpackod_d): Ditto.
 610         (CODE_FOR_lsx_vpackev_d): Ditto.
 611         (CODE_FOR_lsx_vpickod_d): Ditto.
 612         (CODE_FOR_lsx_vpickev_d): Ditto.
 613         (CODE_FOR_lsx_vrepli_b): Ditto.
 614         (CODE_FOR_lsx_vrepli_h): Ditto.
 615         (CODE_FOR_lsx_vrepli_w): Ditto.
 616         (CODE_FOR_lsx_vrepli_d): Ditto.
 617         (CODE_FOR_lsx_vsat_b): Ditto.
 618         (CODE_FOR_lsx_vsat_h): Ditto.
 619         (CODE_FOR_lsx_vsat_w): Ditto.
 620         (CODE_FOR_lsx_vsat_d): Ditto.
 621         (CODE_FOR_lsx_vsat_bu): Ditto.
 622         (CODE_FOR_lsx_vsat_hu): Ditto.
 623         (CODE_FOR_lsx_vsat_wu): Ditto.
 624         (CODE_FOR_lsx_vsat_du): Ditto.
 625         (CODE_FOR_lsx_vavg_b): Ditto.
 626         (CODE_FOR_lsx_vavg_h): Ditto.
 627         (CODE_FOR_lsx_vavg_w): Ditto.
 628         (CODE_FOR_lsx_vavg_d): Ditto.
 629         (CODE_FOR_lsx_vavg_bu): Ditto.
 630         (CODE_FOR_lsx_vavg_hu): Ditto.
 631         (CODE_FOR_lsx_vavg_wu): Ditto.
 632         (CODE_FOR_lsx_vavg_du): Ditto.
 633         (CODE_FOR_lsx_vavgr_b): Ditto.
 634         (CODE_FOR_lsx_vavgr_h): Ditto.
 635         (CODE_FOR_lsx_vavgr_w): Ditto.
 636         (CODE_FOR_lsx_vavgr_d): Ditto.
 637         (CODE_FOR_lsx_vavgr_bu): Ditto.
 638         (CODE_FOR_lsx_vavgr_hu): Ditto.
 639         (CODE_FOR_lsx_vavgr_wu): Ditto.
 640         (CODE_FOR_lsx_vavgr_du): Ditto.
 641         (CODE_FOR_lsx_vssub_b): Ditto.
 642         (CODE_FOR_lsx_vssub_h): Ditto.
 643         (CODE_FOR_lsx_vssub_w): Ditto.
 644         (CODE_FOR_lsx_vssub_d): Ditto.
 645         (CODE_FOR_lsx_vssub_bu): Ditto.
 646         (CODE_FOR_lsx_vssub_hu): Ditto.
 647         (CODE_FOR_lsx_vssub_wu): Ditto.
 648         (CODE_FOR_lsx_vssub_du): Ditto.
 649         (CODE_FOR_lsx_vabsd_b): Ditto.
 650         (CODE_FOR_lsx_vabsd_h): Ditto.
 651         (CODE_FOR_lsx_vabsd_w): Ditto.
 652         (CODE_FOR_lsx_vabsd_d): Ditto.
 653         (CODE_FOR_lsx_vabsd_bu): Ditto.
 654         (CODE_FOR_lsx_vabsd_hu): Ditto.
 655         (CODE_FOR_lsx_vabsd_wu): Ditto.
 656         (CODE_FOR_lsx_vabsd_du): Ditto.
 657         (CODE_FOR_lsx_vftint_w_s): Ditto.
 658         (CODE_FOR_lsx_vftint_l_d): Ditto.
 659         (CODE_FOR_lsx_vftint_wu_s): Ditto.
 660         (CODE_FOR_lsx_vftint_lu_d): Ditto.
 661         (CODE_FOR_lsx_vandn_v): Ditto.
 662         (CODE_FOR_lsx_vorn_v): Ditto.
 663         (CODE_FOR_lsx_vneg_b): Ditto.
 664         (CODE_FOR_lsx_vneg_h): Ditto.
 665         (CODE_FOR_lsx_vneg_w): Ditto.
 666         (CODE_FOR_lsx_vneg_d): Ditto.
 667         (CODE_FOR_lsx_vshuf4i_d): Ditto.
 668         (CODE_FOR_lsx_vbsrl_v): Ditto.
 669         (CODE_FOR_lsx_vbsll_v): Ditto.
 670         (CODE_FOR_lsx_vfmadd_s): Ditto.
 671         (CODE_FOR_lsx_vfmadd_d): Ditto.
 672         (CODE_FOR_lsx_vfmsub_s): Ditto.
 673         (CODE_FOR_lsx_vfmsub_d): Ditto.
 674         (CODE_FOR_lsx_vfnmadd_s): Ditto.
 675         (CODE_FOR_lsx_vfnmadd_d): Ditto.
 676         (CODE_FOR_lsx_vfnmsub_s): Ditto.
 677         (CODE_FOR_lsx_vfnmsub_d): Ditto.
 678         (CODE_FOR_lsx_vmuh_b): Ditto.
 679         (CODE_FOR_lsx_vmuh_h): Ditto.
 680         (CODE_FOR_lsx_vmuh_w): Ditto.
 681         (CODE_FOR_lsx_vmuh_d): Ditto.
 682         (CODE_FOR_lsx_vmuh_bu): Ditto.
 683         (CODE_FOR_lsx_vmuh_hu): Ditto.
 684         (CODE_FOR_lsx_vmuh_wu): Ditto.
 685         (CODE_FOR_lsx_vmuh_du): Ditto.
 686         (CODE_FOR_lsx_vsllwil_h_b): Ditto.
 687         (CODE_FOR_lsx_vsllwil_w_h): Ditto.
 688         (CODE_FOR_lsx_vsllwil_d_w): Ditto.
 689         (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
 690         (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
 691         (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
 692         (CODE_FOR_lsx_vssran_b_h): Ditto.
 693         (CODE_FOR_lsx_vssran_h_w): Ditto.
 694         (CODE_FOR_lsx_vssran_w_d): Ditto.
 695         (CODE_FOR_lsx_vssran_bu_h): Ditto.
 696         (CODE_FOR_lsx_vssran_hu_w): Ditto.
 697         (CODE_FOR_lsx_vssran_wu_d): Ditto.
 698         (CODE_FOR_lsx_vssrarn_b_h): Ditto.
 699         (CODE_FOR_lsx_vssrarn_h_w): Ditto.
 700         (CODE_FOR_lsx_vssrarn_w_d): Ditto.
 701         (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
 702         (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
 703         (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
 704         (CODE_FOR_lsx_vssrln_bu_h): Ditto.
 705         (CODE_FOR_lsx_vssrln_hu_w): Ditto.
 706         (CODE_FOR_lsx_vssrln_wu_d): Ditto.
 707         (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
 708         (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
 709         (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
 710         (loongarch_builtin_vector_type): Ditto.
 711         (loongarch_build_cvpointer_type): Ditto.
 712         (LARCH_ATYPE_CVPOINTER): Ditto.
 713         (LARCH_ATYPE_BOOLEAN): Ditto.
 714         (LARCH_ATYPE_V2SF): Ditto.
 715         (LARCH_ATYPE_V2HI): Ditto.
 716         (LARCH_ATYPE_V2SI): Ditto.
 717         (LARCH_ATYPE_V4QI): Ditto.
 718         (LARCH_ATYPE_V4HI): Ditto.
 719         (LARCH_ATYPE_V8QI): Ditto.
 720         (LARCH_ATYPE_V2DI): Ditto.
 721         (LARCH_ATYPE_V4SI): Ditto.
 722         (LARCH_ATYPE_V8HI): Ditto.
 723         (LARCH_ATYPE_V16QI): Ditto.
 724         (LARCH_ATYPE_V2DF): Ditto.
 725         (LARCH_ATYPE_V4SF): Ditto.
 726         (LARCH_ATYPE_V4DI): Ditto.
 727         (LARCH_ATYPE_V8SI): Ditto.
 728         (LARCH_ATYPE_V16HI): Ditto.
 729         (LARCH_ATYPE_V32QI): Ditto.
 730         (LARCH_ATYPE_V4DF): Ditto.
 731         (LARCH_ATYPE_V8SF): Ditto.
 732         (LARCH_ATYPE_UV2DI): Ditto.
 733         (LARCH_ATYPE_UV4SI): Ditto.
 734         (LARCH_ATYPE_UV8HI): Ditto.
 735         (LARCH_ATYPE_UV16QI): Ditto.
 736         (LARCH_ATYPE_UV4DI): Ditto.
 737         (LARCH_ATYPE_UV8SI): Ditto.
 738         (LARCH_ATYPE_UV16HI): Ditto.
 739         (LARCH_ATYPE_UV32QI): Ditto.
 740         (LARCH_ATYPE_UV2SI): Ditto.
 741         (LARCH_ATYPE_UV4HI): Ditto.
 742         (LARCH_ATYPE_UV8QI): Ditto.
 743         (loongarch_builtin_vectorized_function): Ditto.
 744         (LARCH_GET_BUILTIN): Ditto.
 745         (loongarch_expand_builtin_insn): Ditto.
 746         (loongarch_expand_builtin_lsx_test_branch): Ditto.
 747         (loongarch_expand_builtin): Ditto.
 748         * config/loongarch/loongarch-ftypes.def (1): Ditto.
 749         (2): Ditto.
 750         (3): Ditto.
 751         (4): Ditto.
 752         * config/loongarch/lsxintrin.h: New file.
 753
 754 2023-09-05  Lulu Cheng  <chenglulu@loongson.cn>
 755
 756         * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
 757         (N): Ditto.
 758         (O): Ditto.
 759         (P): Ditto.
 760         (R): Ditto.
 761         (S): Ditto.
 762         (YG): Ditto.
 763         (YA): Ditto.
 764         (YB): Ditto.
 765         (Yb): Ditto.
 766         (Yh): Ditto.
 767         (Yw): Ditto.
 768         (YI): Ditto.
 769         (YC): Ditto.
 770         (YZ): Ditto.
 771         (Unv5): Ditto.
 772         (Uuv5): Ditto.
 773         (Usv5): Ditto.
 774         (Uuv6): Ditto.
 775         (Urv8): Ditto.
 776         * config/loongarch/genopts/loongarch.opt.in: Ditto.
 777         * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
 778         * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
 779         (VECTOR_MODE): Ditto.
 780         (INT_MODE): Ditto.
 781         * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
 782         (loongarch_split_move_insn): Ditto.
 783         (loongarch_split_128bit_move): Ditto.
 784         (loongarch_split_128bit_move_p): Ditto.
 785         (loongarch_split_lsx_copy_d): Ditto.
 786         (loongarch_split_lsx_insert_d): Ditto.
 787         (loongarch_split_lsx_fill_d): Ditto.
 788         (loongarch_expand_vec_cmp): Ditto.
 789         (loongarch_const_vector_same_val_p): Ditto.
 790         (loongarch_const_vector_same_bytes_p): Ditto.
 791         (loongarch_const_vector_same_int_p): Ditto.
 792         (loongarch_const_vector_shuffle_set_p): Ditto.
 793         (loongarch_const_vector_bitimm_set_p): Ditto.
 794         (loongarch_const_vector_bitimm_clr_p): Ditto.
 795         (loongarch_lsx_vec_parallel_const_half): Ditto.
 796         (loongarch_gen_const_int_vector): Ditto.
 797         (loongarch_lsx_output_division): Ditto.
 798         (loongarch_expand_vector_init): Ditto.
 799         (loongarch_expand_vec_unpack): Ditto.
 800         (loongarch_expand_vec_perm): Ditto.
 801         (loongarch_expand_vector_extract): Ditto.
 802         (loongarch_expand_vector_reduc): Ditto.
 803         (loongarch_ldst_scaled_shift): Ditto.
 804         (loongarch_expand_vec_cond_expr): Ditto.
 805         (loongarch_expand_vec_cond_mask_expr): Ditto.
 806         (loongarch_builtin_vectorized_function): Ditto.
 807         (loongarch_gen_const_int_vector_shuffle): Ditto.
 808         (loongarch_build_signbit_mask): Ditto.
 809         * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
 810         (loongarch_setup_incoming_varargs): Ditto.
 811         (loongarch_emit_move): Ditto.
 812         (loongarch_const_vector_bitimm_set_p): Ditto.
 813         (loongarch_const_vector_bitimm_clr_p): Ditto.
 814         (loongarch_const_vector_same_val_p): Ditto.
 815         (loongarch_const_vector_same_bytes_p): Ditto.
 816         (loongarch_const_vector_same_int_p): Ditto.
 817         (loongarch_const_vector_shuffle_set_p): Ditto.
 818         (loongarch_symbol_insns): Ditto.
 819         (loongarch_cannot_force_const_mem): Ditto.
 820         (loongarch_valid_offset_p): Ditto.
 821         (loongarch_valid_index_p): Ditto.
 822         (loongarch_classify_address): Ditto.
 823         (loongarch_address_insns): Ditto.
 824         (loongarch_ldst_scaled_shift): Ditto.
 825         (loongarch_const_insns): Ditto.
 826         (loongarch_split_move_insn_p): Ditto.
 827         (loongarch_subword_at_byte): Ditto.
 828         (loongarch_legitimize_move): Ditto.
 829         (loongarch_builtin_vectorization_cost): Ditto.
 830         (loongarch_split_move_p): Ditto.
 831         (loongarch_split_move): Ditto.
 832         (loongarch_split_move_insn): Ditto.
 833         (loongarch_output_move_index_float): Ditto.
 834         (loongarch_split_128bit_move_p): Ditto.
 835         (loongarch_split_128bit_move): Ditto.
 836         (loongarch_split_lsx_copy_d): Ditto.
 837         (loongarch_split_lsx_insert_d): Ditto.
 838         (loongarch_split_lsx_fill_d): Ditto.
 839         (loongarch_output_move): Ditto.
 840         (loongarch_extend_comparands): Ditto.
 841         (loongarch_print_operand_reloc): Ditto.
 842         (loongarch_print_operand): Ditto.
 843         (loongarch_hard_regno_mode_ok_uncached): Ditto.
 844         (loongarch_hard_regno_call_part_clobbered): Ditto.
 845         (loongarch_hard_regno_nregs): Ditto.
 846         (loongarch_class_max_nregs): Ditto.
 847         (loongarch_can_change_mode_class): Ditto.
 848         (loongarch_mode_ok_for_mov_fmt_p): Ditto.
 849         (loongarch_secondary_reload): Ditto.
 850         (loongarch_vector_mode_supported_p): Ditto.
 851         (loongarch_preferred_simd_mode): Ditto.
 852         (loongarch_autovectorize_vector_modes): Ditto.
 853         (loongarch_lsx_output_division): Ditto.
 854         (loongarch_option_override_internal): Ditto.
 855         (loongarch_hard_regno_caller_save_mode): Ditto.
 856         (MAX_VECT_LEN): Ditto.
 857         (loongarch_spill_class): Ditto.
 858         (struct expand_vec_perm_d): Ditto.
 859         (loongarch_promote_function_mode): Ditto.
 860         (loongarch_expand_vselect): Ditto.
 861         (loongarch_starting_frame_offset): Ditto.
 862         (loongarch_expand_vselect_vconcat): Ditto.
 863         (TARGET_ASM_ALIGNED_DI_OP): Ditto.
 864         (TARGET_OPTION_OVERRIDE): Ditto.
 865         (TARGET_LEGITIMIZE_ADDRESS): Ditto.
 866         (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
 867         (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
 868         (loongarch_expand_lsx_shuffle): Ditto.
 869         (TARGET_SCHED_INIT): Ditto.
 870         (TARGET_SCHED_REORDER): Ditto.
 871         (TARGET_SCHED_REORDER2): Ditto.
 872         (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
 873         (TARGET_SCHED_ADJUST_COST): Ditto.
 874         (TARGET_SCHED_ISSUE_RATE): Ditto.
 875         (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
 876         (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
 877         (TARGET_VALID_POINTER_MODE): Ditto.
 878         (TARGET_REGISTER_MOVE_COST): Ditto.
 879         (TARGET_MEMORY_MOVE_COST): Ditto.
 880         (TARGET_RTX_COSTS): Ditto.
 881         (TARGET_ADDRESS_COST): Ditto.
 882         (TARGET_IN_SMALL_DATA_P): Ditto.
 883         (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
 884         (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
 885         (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
 886         (loongarch_expand_vec_perm): Ditto.
 887         (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
 888         (TARGET_RETURN_IN_MEMORY): Ditto.
 889         (TARGET_FUNCTION_VALUE): Ditto.
 890         (TARGET_LIBCALL_VALUE): Ditto.
 891         (loongarch_try_expand_lsx_vshuf_const): Ditto.
 892         (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
 893         (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
 894         (TARGET_PRINT_OPERAND): Ditto.
 895         (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
 896         (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
 897         (TARGET_SETUP_INCOMING_VARARGS): Ditto.
 898         (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
 899         (TARGET_MUST_PASS_IN_STACK): Ditto.
 900         (TARGET_PASS_BY_REFERENCE): Ditto.
 901         (TARGET_ARG_PARTIAL_BYTES): Ditto.
 902         (TARGET_FUNCTION_ARG): Ditto.
 903         (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
 904         (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
 905         (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
 906         (TARGET_INIT_BUILTINS): Ditto.
 907         (loongarch_expand_vec_perm_const_1): Ditto.
 908         (loongarch_expand_vec_perm_const_2): Ditto.
 909         (loongarch_vectorize_vec_perm_const): Ditto.
 910         (loongarch_cpu_sched_reassociation_width): Ditto.
 911         (loongarch_sched_reassociation_width): Ditto.
 912         (loongarch_expand_vector_extract): Ditto.
 913         (emit_reduc_half): Ditto.
 914         (loongarch_expand_vector_reduc): Ditto.
 915         (loongarch_expand_vec_unpack): Ditto.
 916         (loongarch_lsx_vec_parallel_const_half): Ditto.
 917         (loongarch_constant_elt_p): Ditto.
 918         (loongarch_gen_const_int_vector_shuffle): Ditto.
 919         (loongarch_expand_vector_init): Ditto.
 920         (loongarch_expand_lsx_cmp): Ditto.
 921         (loongarch_expand_vec_cond_expr): Ditto.
 922         (loongarch_expand_vec_cond_mask_expr): Ditto.
 923         (loongarch_expand_vec_cmp): Ditto.
 924         (loongarch_case_values_threshold): Ditto.
 925         (loongarch_build_const_vector): Ditto.
 926         (loongarch_build_signbit_mask): Ditto.
 927         (loongarch_builtin_support_vector_misalignment): Ditto.
 928         (TARGET_ASM_ALIGNED_HI_OP): Ditto.
 929         (TARGET_ASM_ALIGNED_SI_OP): Ditto.
 930         (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
 931         (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
 932         (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
 933         (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
 934         (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
 935         (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
 936         (TARGET_CASE_VALUES_THRESHOLD): Ditto.
 937         (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
 938         (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
 939         * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
 940         (UNITS_PER_LSX_REG): Ditto.
 941         (BITS_PER_LSX_REG): Ditto.
 942         (BIGGEST_ALIGNMENT): Ditto.
 943         (LSX_REG_FIRST): Ditto.
 944         (LSX_REG_LAST): Ditto.
 945         (LSX_REG_NUM): Ditto.
 946         (LSX_REG_P): Ditto.
 947         (LSX_REG_RTX_P): Ditto.
 948         (IMM13_OPERAND): Ditto.
 949         (LSX_SUPPORTED_MODE_P): Ditto.
 950         * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
 951         (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
 952         (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
 953         (mode" ): Ditto.
 954         (DF): Ditto.
 955         (SF): Ditto.
 956         (sf): Ditto.
 957         (DI): Ditto.
 958         (SI): Ditto.
 959         * config/loongarch/loongarch.opt: Ditto.
 960         * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
 961         (const_uimm3_operand): Ditto.
 962         (const_8_to_11_operand): Ditto.
 963         (const_12_to_15_operand): Ditto.
 964         (const_uimm4_operand): Ditto.
 965         (const_uimm6_operand): Ditto.
 966         (const_uimm7_operand): Ditto.
 967         (const_uimm8_operand): Ditto.
 968         (const_imm5_operand): Ditto.
 969         (const_imm10_operand): Ditto.
 970         (const_imm13_operand): Ditto.
 971         (reg_imm10_operand): Ditto.
 972         (aq8b_operand): Ditto.
 973         (aq8h_operand): Ditto.
 974         (aq8w_operand): Ditto.
 975         (aq8d_operand): Ditto.
 976         (aq10b_operand): Ditto.
 977         (aq10h_operand): Ditto.
 978         (aq10w_operand): Ditto.
 979         (aq10d_operand): Ditto.
 980         (aq12b_operand): Ditto.
 981         (aq12h_operand): Ditto.
 982         (aq12w_operand): Ditto.
 983         (aq12d_operand): Ditto.
 984         (const_m1_operand): Ditto.
 985         (reg_or_m1_operand): Ditto.
 986         (const_exp_2_operand): Ditto.
 987         (const_exp_4_operand): Ditto.
 988         (const_exp_8_operand): Ditto.
 989         (const_exp_16_operand): Ditto.
 990         (const_exp_32_operand): Ditto.
 991         (const_0_or_1_operand): Ditto.
 992         (const_0_to_3_operand): Ditto.
 993         (const_0_to_7_operand): Ditto.
 994         (const_2_or_3_operand): Ditto.
 995         (const_4_to_7_operand): Ditto.
 996         (const_8_to_15_operand): Ditto.
 997         (const_16_to_31_operand): Ditto.
 998         (qi_mask_operand): Ditto.
 999         (hi_mask_operand): Ditto.
1000         (si_mask_operand): Ditto.
1001         (d_operand): Ditto.
1002         (db4_operand): Ditto.
1003         (db7_operand): Ditto.
1004         (db8_operand): Ditto.
1005         (ib3_operand): Ditto.
1006         (sb4_operand): Ditto.
1007         (sb5_operand): Ditto.
1008         (sb8_operand): Ditto.
1009         (sd8_operand): Ditto.
1010         (ub4_operand): Ditto.
1011         (ub8_operand): Ditto.
1012         (uh4_operand): Ditto.
1013         (uw4_operand): Ditto.
1014         (uw5_operand): Ditto.
1015         (uw6_operand): Ditto.
1016         (uw8_operand): Ditto.
1017         (addiur2_operand): Ditto.
1018         (addiusp_operand): Ditto.
1019         (andi16_operand): Ditto.
1020         (movep_src_register): Ditto.
1021         (movep_src_operand): Ditto.
1022         (fcc_reload_operand): Ditto.
1023         (muldiv_target_operand): Ditto.
1024         (const_vector_same_val_operand): Ditto.
1025         (const_vector_same_simm5_operand): Ditto.
1026         (const_vector_same_uimm5_operand): Ditto.
1027         (const_vector_same_ximm5_operand): Ditto.
1028         (const_vector_same_uimm6_operand): Ditto.
1029         (par_const_vector_shf_set_operand): Ditto.
1030         (reg_or_vector_same_val_operand): Ditto.
1031         (reg_or_vector_same_simm5_operand): Ditto.
1032         (reg_or_vector_same_uimm5_operand): Ditto.
1033         (reg_or_vector_same_ximm5_operand): Ditto.
1034         (reg_or_vector_same_uimm6_operand): Ditto.
1035         * doc/md.texi: Ditto.
1036         * config/loongarch/lsx.md: New file.
1037
1038 2023-09-05  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1039
1040         * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
1041         (get_all_predecessors): New function.
1042         (get_all_successors): Ditto.
1043         * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
1044         (get_all_successors): Ditto.
1045         * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
1046         * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
1047
1048 2023-09-05  Claudiu Zissulescu  <claziss@gmail.com>
1049
1050         * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
1051         (split_addsi): Likewise.
1052         * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
1053         'N', 'x', and 'J' code letters.
1054         (arc_output_addsi): Make it static.
1055         (split_addsi): Remove it.
1056         * config/arc/arc.h (UNSIGNED_INT*): New defines.
1057         (SINNED_INT*): Likewise.
1058         * config/arc/arc.md (type): Add add, sub, bxor types.
1059         (tst_movb): Change code letter from 's' to 'x'.
1060         (andsi3_i): Likewise.
1061         (addsi3_mixed): Refurbish the pattern.
1062         (call_i): Change code letter from 'S' to 'J'.
1063         * config/arc/arc700.md: Add newly introduced types.
1064         * config/arc/arcHS.md: Likewsie.
1065         * config/arc/arcHS4x.md: Likewise.
1066         * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
1067         (CM4): Update description.
1068         (CP4, C6u, C6n, CIs, C4p): New constraint.
1069
1070 2023-09-05  Claudiu Zissulescu  <claziss@gmail.com>
1071
1072         * common/config/arc/arc-common.cc (arc_option_optimization_table):
1073         Remove mbbit_peephole.
1074         * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
1075         (store_direct): Likewise.
1076         (BBIT peephole2): Likewise.
1077         * config/arc/arc.opt (mbbit-peephole): Ignore option.
1078         * doc/invoke.texi (mbbit-peephole): Update document.
1079
1080 2023-09-05  Jakub Jelinek  <jakub@redhat.com>
1081
1082         * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
1083         avreage -> average.
1084
1085 2023-09-05  Yang Yujie  <yangyujie@loongson.cn>
1086
1087         * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
1088         options passed from driver to gnat1 as explicit for multilib.
1089
1090 2023-09-05  Yang Yujie  <yangyujie@loongson.cn>
1091
1092         * config.gcc: add loongarch*-elf target.
1093         * config/loongarch/elf.h: New file.
1094         Link against newlib by default.
1095
1096 2023-09-05  Yang Yujie  <yangyujie@loongson.cn>
1097
1098         * config.gcc: use -mstrict-align for building libraries
1099         if --with-strict-align-lib is given.
1100         * doc/install.texi: likewise.
1101
1102 2023-09-05  Yang Yujie  <yangyujie@loongson.cn>
1103
1104         * config/loongarch/loongarch-c.cc: Export macros
1105         "__loongarch_{arch,tune}" in the preprocessor.
1106
1107 2023-09-05  Yang Yujie  <yangyujie@loongson.cn>
1108
1109         * config.gcc: Make --with-abi= obsolete, decide the default ABI
1110         with target triplet.  Allow specifying multilib library build
1111         options with --with-multilib-list and --with-multilib-default.
1112         * config/loongarch/t-linux: Likewise.
1113         * config/loongarch/genopts/loongarch-strings: Likewise.
1114         * config/loongarch/loongarch-str.h: Likewise.
1115         * doc/install.texi: Likewise.
1116         * config/loongarch/genopts/loongarch.opt.in: Introduce
1117         -m[no-]l[a]sx options.  Only process -m*-float and
1118         -m[no-]l[a]sx in the GCC driver.
1119         * config/loongarch/loongarch.opt: Likewise.
1120         * config/loongarch/la464.md: Likewise.
1121         * config/loongarch/loongarch-c.cc: Likewise.
1122         * config/loongarch/loongarch-cpu.cc: Likewise.
1123         * config/loongarch/loongarch-cpu.h: Likewise.
1124         * config/loongarch/loongarch-def.c: Likewise.
1125         * config/loongarch/loongarch-def.h: Likewise.
1126         * config/loongarch/loongarch-driver.cc: Likewise.
1127         * config/loongarch/loongarch-driver.h: Likewise.
1128         * config/loongarch/loongarch-opts.cc: Likewise.
1129         * config/loongarch/loongarch-opts.h: Likewise.
1130         * config/loongarch/loongarch.cc: Likewise.
1131         * doc/invoke.texi: Likewise.
1132
1133 2023-09-05  liuhongt  <hongtao.liu@intel.com>
1134
1135         * config/i386/sse.md: (V8BFH_128): Renamed to ..
1136         (VHFBF_128): .. this.
1137         (V16BFH_256): Renamed to ..
1138         (VHFBF_256): .. this.
1139         (avx512f_mov<mode>): Extend to V_128.
1140         (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
1141         (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
1142         (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
1143         (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
1144         * config/i386/i386-expand.cc (expand_vec_perm_blend):
1145         Canonicalize vec_merge.
1146
1147 2023-09-05  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1148
1149         * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
1150         * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
1151         (autovectorize_vector_modes): Ditto.
1152         (vectorize_related_mode): Ditto.
1153
1154 2023-09-04  Iain Sandoe  <iain@sandoe.co.uk>
1155
1156         * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
1157         all 32b Darwin PowerPC cases.
1158
1159 2023-09-04  Iain Sandoe  <iain@sandoe.co.uk>
1160
1161         * config/darwin-sections.def (static_init_section): Add the
1162         __TEXT,__StaticInit section.
1163         * config/darwin.cc (darwin_function_section): Use the static init
1164         section for global initializers, to match other platform toolchains.
1165
1166 2023-09-04  Iain Sandoe  <iain@sandoe.co.uk>
1167
1168         * config/darwin-sections.def (darwin_exception_section): Move to
1169         the __TEXT segment.
1170         * config/darwin.cc (darwin_emit_except_table_label): Align before
1171         the exception table label.
1172         * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
1173         relative 4byte relocs.
1174
1175 2023-09-04  Iain Sandoe  <iain@sandoe.co.uk>
1176
1177         * config/darwin.cc (dump_machopic_symref_flags): New.
1178         (debug_machopic_symref_flags): New.
1179
1180 2023-09-04  Pan Li  <pan2.li@intel.com>
1181
1182         * config/riscv/riscv-vector-builtins-types.def
1183         (vfloat16mf4_t): Add FP16 intrinsic def.
1184         (vfloat16mf2_t): Ditto.
1185         (vfloat16m1_t): Ditto.
1186         (vfloat16m2_t): Ditto.
1187         (vfloat16m4_t): Ditto.
1188         (vfloat16m8_t): Ditto.
1189
1190 2023-09-04  Jiufu Guo  <guojiufu@linux.ibm.com>
1191
1192         PR tree-optimization/108757
1193         * match.pd ((X - N * M) / N): New pattern.
1194         ((X + N * M) / N): New pattern.
1195         ((X + C) div_rshift N): New pattern.
1196
1197 2023-09-04  Guo Jie  <guojie@loongson.cn>
1198
1199         * config/loongarch/loongarch.md: Support 'G' -> 'k' in
1200         movsf_hardfloat and movdf_hardfloat.
1201
1202 2023-09-04  Lulu Cheng  <chenglulu@loongson.cn>
1203
1204         * config/loongarch/loongarch.cc (loongarch_extend_comparands):
1205         In unsigned QImode test, check for sign extended subreg and/or
1206         constant operands, and do a sign extension in that case.
1207         * config/loongarch/loongarch.md (TARGET_64BIT): Define
1208         template cbranchqi4.
1209
1210 2023-09-04  Lulu Cheng  <chenglulu@loongson.cn>
1211
1212         * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
1213         from memory into floating-point registers.
1214
1215 2023-09-03  Pan Li  <pan2.li@intel.com>
1216
1217         * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
1218         fmax/fmin
1219         * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
1220
1221 2023-09-02  Mikael Morin  <mikael@gcc.gnu.org>
1222
1223         * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
1224         pointer before overwriting it.
1225
1226 2023-09-02  chenxiaolong  <chenxiaolong@loongson.cn>
1227
1228         * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
1229         Associate the __float128 type to float128_type_node so that it can
1230         be recognized by the compiler.
1231         * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
1232         Add the flag "FLOAT128_TYPE" to gcc and associate a function
1233         with the suffix "q" to "f128".
1234         * doc/extend.texi:Added support for 128-bit floating-point functions on
1235         the LoongArch architecture.
1236
1237 2023-09-01  Jakub Jelinek  <jakub@redhat.com>
1238
1239         PR c++/111069
1240         * common.opt (fabi-version=): Document version 19.
1241         * doc/invoke.texi (-fabi-version=): Likewise.
1242
1243 2023-09-01  Lehua Ding  <lehua.ding@rivai.ai>
1244
1245         * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
1246         New combine pattern.
1247         (*cond_<float_cvt><vconvert><mode>): Ditto.
1248         (*cond_<optab><vnconvert><mode>): Ditto.
1249         (*cond_<float_cvt><vnconvert><mode>): Ditto.
1250         (*cond_<optab><mode><vnconvert>): Ditto.
1251         (*cond_<float_cvt><mode><vnconvert>2): Ditto.
1252         * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
1253         (<float_cvt><vconvert><mode>2): Adjust.
1254         (<optab><vnconvert><mode>2): Adjust.
1255         (<float_cvt><vnconvert><mode>2): Adjust.
1256         (<optab><mode><vnconvert>2): Adjust.
1257         (<float_cvt><mode><vnconvert>2): Adjust.
1258         * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
1259
1260 2023-09-01  Lehua Ding  <lehua.ding@rivai.ai>
1261
1262         * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
1263         New combine pattern.
1264         (*cond_trunc<mode><v_double_trunc>): Ditto.
1265         * config/riscv/autovec.md: Adjust.
1266         * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
1267
1268 2023-09-01  Lehua Ding  <lehua.ding@rivai.ai>
1269
1270         * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
1271         New combine pattern.
1272         (*cond_<optab><v_quad_trunc><mode>): Ditto.
1273         (*cond_<optab><v_oct_trunc><mode>): Ditto.
1274         (*cond_trunc<mode><v_double_trunc>): Ditto.
1275         * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
1276         (<optab><v_oct_trunc><mode>2): Ditto.
1277
1278 2023-09-01  Lehua Ding  <lehua.ding@rivai.ai>
1279
1280         * config/riscv/autovec.md: Adjust.
1281         * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
1282         (expand_cond_len_binop): Ditto.
1283         * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
1284         (expand_cond_len_op): Ditto.
1285         (expand_cond_len_unop): Ditto.
1286         (expand_cond_len_binop): Ditto.
1287         (expand_cond_len_ternop): Ditto.
1288
1289 2023-09-01  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1290
1291         * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
1292         VECT_COMPARE_COSTS by default.
1293
1294 2023-09-01  Robin Dapp  <rdapp@ventanamicro.com>
1295
1296         * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
1297
1298 2023-09-01  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1299
1300         * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
1301         dynamic enum.
1302         * config/riscv/riscv.opt: Add dynamic compile option.
1303
1304 2023-09-01  Pan Li  <pan2.li@intel.com>
1305
1306         * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
1307         vls floating-point autovec.
1308         * config/riscv/vector-iterators.md: New iterator for
1309         floating-point V and VLS.
1310         * config/riscv/vector.md: Add VLS to floating-point binop.
1311
1312 2023-09-01  Andrew Pinski  <apinski@marvell.com>
1313
1314         PR tree-optimization/19832
1315         * match.pd: Add pattern to optimize
1316         `(a != b) ? a OP b : c`.
1317
1318 2023-09-01  Lulu Cheng  <chenglulu@loongson.cn>
1319             Guo Jie  <guojie@loongson.cn>
1320
1321         PR target/110484
1322         * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
1323         frame_pointer_needed to determine whether to use the $fp register.
1324
1325 2023-08-31  Andrew Pinski  <apinski@marvell.com>
1326
1327         PR tree-optimization/110915
1328         * match.pd (min_value, max_value): Extend to vector constants.
1329
1330 2023-08-31  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
1331
1332         * config.in: Regenerate.
1333         * config/darwin-c.cc: Change spelling to macOS.
1334         * config/darwin-driver.cc: Likewise.
1335         * config/darwin.h: Likewise.
1336         * configure.ac: Likewise.
1337         * doc/contrib.texi: Likewise.
1338         * doc/extend.texi: Likewise.
1339         * doc/invoke.texi: Likewise.
1340         * doc/plugins.texi: Likewise.
1341         * doc/tm.texi: Regenerate.
1342         * doc/tm.texi.in: Change spelling to macOS.
1343         * plugin.cc: Likewise.
1344
1345 2023-08-31  Pan Li  <pan2.li@intel.com>
1346
1347         * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
1348         * config/riscv/autovec.md: Ditto.
1349
1350 2023-08-31  Pan Li  <pan2.li@intel.com>
1351
1352         * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
1353         * config/riscv/autovec.md: Ditto.
1354
1355 2023-08-31  Richard Sandiford  <richard.sandiford@arm.com>
1356
1357         * config/aarch64/aarch64.md (untyped_call): Emit a call_value
1358         rather than a call.  List each possible destination register
1359         in the call pattern.
1360
1361 2023-08-31  Pan Li  <pan2.li@intel.com>
1362
1363         * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
1364         * config/riscv/autovec.md: Ditto.
1365
1366 2023-08-31  Pan Li  <pan2.li@intel.com>
1367             Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
1368
1369         * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
1370         * config/riscv/autovec.md: Ditto.
1371         * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
1372
1373 2023-08-31  Palmer Dabbelt  <palmer@rivosinc.com>
1374
1375         * config/riscv/autovec.md (shifts): Use
1376         vector_scalar_shift_operand.
1377         * config/riscv/predicates.md (vector_scalar_shift_operand): New
1378         predicate.
1379
1380 2023-08-31  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1381
1382         * config.gcc: Add vector cost model framework for RVV.
1383         * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
1384         (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
1385         * config/riscv/t-riscv: Ditto.
1386         * config/riscv/riscv-vector-costs.cc: New file.
1387         * config/riscv/riscv-vector-costs.h: New file.
1388
1389 2023-08-31  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
1390
1391         PR target/110411
1392         * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
1393         AltiVec address operands.
1394         (define_insn_and_split movxo): Likewise.
1395         * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
1396         redundant mode size check.
1397
1398 2023-08-31  Lehua Ding  <lehua.ding@rivai.ai>
1399
1400         * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
1401         * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
1402         Change to default policy.
1403         * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
1404         * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
1405         * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
1406
1407 2023-08-31  Lehua Ding  <lehua.ding@rivai.ai>
1408
1409         * config/riscv/autovec-opt.md: Adjust.
1410         * config/riscv/autovec-vls.md: Ditto.
1411         * config/riscv/autovec.md: Ditto.
1412         * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
1413         (enum insn_flags): Add insn flags.
1414         (emit_vlmax_insn): Adjust.
1415         (emit_vlmax_fp_insn): Delete.
1416         (emit_vlmax_ternary_insn): Delete.
1417         (emit_vlmax_fp_ternary_insn): Delete.
1418         (emit_nonvlmax_insn): Adjust.
1419         (emit_vlmax_slide_insn): Delete.
1420         (emit_nonvlmax_slide_tu_insn): Delete.
1421         (emit_vlmax_merge_insn): Delete.
1422         (emit_vlmax_cmp_insn): Delete.
1423         (emit_vlmax_cmp_mu_insn): Delete.
1424         (emit_vlmax_masked_mu_insn): Delete.
1425         (emit_scalar_move_insn): Delete.
1426         (emit_nonvlmax_integer_move_insn): Delete.
1427         (emit_vlmax_insn_lra): Add.
1428         * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
1429         (emit_vlmax_insn): Adjust.
1430         (emit_nonvlmax_insn): Adjust.
1431         (emit_vlmax_insn_lra): Add.
1432         (emit_vlmax_fp_insn): Delete.
1433         (emit_vlmax_ternary_insn): Delete.
1434         (emit_vlmax_fp_ternary_insn): Delete.
1435         (emit_vlmax_slide_insn): Delete.
1436         (emit_nonvlmax_slide_tu_insn): Delete.
1437         (emit_nonvlmax_slide_insn): Delete.
1438         (emit_vlmax_merge_insn): Delete.
1439         (emit_vlmax_cmp_insn): Delete.
1440         (emit_vlmax_cmp_mu_insn): Delete.
1441         (emit_vlmax_masked_insn): Delete.
1442         (emit_nonvlmax_masked_insn): Delete.
1443         (emit_vlmax_masked_store_insn): Delete.
1444         (emit_nonvlmax_masked_store_insn): Delete.
1445         (emit_vlmax_masked_mu_insn): Delete.
1446         (emit_vlmax_masked_fp_mu_insn): Delete.
1447         (emit_nonvlmax_tu_insn): Delete.
1448         (emit_nonvlmax_fp_tu_insn): Delete.
1449         (emit_nonvlmax_tumu_insn): Delete.
1450         (emit_nonvlmax_fp_tumu_insn): Delete.
1451         (emit_scalar_move_insn): Delete.
1452         (emit_cpop_insn): Delete.
1453         (emit_vlmax_integer_move_insn): Delete.
1454         (emit_nonvlmax_integer_move_insn): Delete.
1455         (emit_vlmax_gather_insn): Delete.
1456         (emit_vlmax_masked_gather_mu_insn): Delete.
1457         (emit_vlmax_compress_insn): Delete.
1458         (emit_nonvlmax_compress_insn): Delete.
1459         (emit_vlmax_reduction_insn): Delete.
1460         (emit_vlmax_fp_reduction_insn): Delete.
1461         (emit_nonvlmax_fp_reduction_insn): Delete.
1462         (expand_vec_series): Adjust.
1463         (expand_const_vector): Adjust.
1464         (legitimize_move): Adjust.
1465         (sew64_scalar_helper): Adjust.
1466         (expand_tuple_move): Adjust.
1467         (expand_vector_init_insert_elems): Adjust.
1468         (expand_vector_init_merge_repeating_sequence): Adjust.
1469         (expand_vec_cmp): Adjust.
1470         (expand_vec_cmp_float): Adjust.
1471         (expand_vec_perm): Adjust.
1472         (shuffle_merge_patterns): Adjust.
1473         (shuffle_compress_patterns): Adjust.
1474         (shuffle_decompress_patterns): Adjust.
1475         (expand_load_store): Adjust.
1476         (expand_cond_len_op): Adjust.
1477         (expand_cond_len_unop): Adjust.
1478         (expand_cond_len_binop): Adjust.
1479         (expand_gather_scatter): Adjust.
1480         (expand_cond_len_ternop): Adjust.
1481         (expand_reduction): Adjust.
1482         (expand_lanes_load_store): Adjust.
1483         (expand_fold_extract_last): Adjust.
1484         * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
1485         * config/riscv/vector.md: Adjust.
1486
1487 2023-08-31  Haochen Gui  <guihaoc@gcc.gnu.org>
1488
1489         PR target/96762
1490         * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
1491         load/store with length only on 64-bit Power10.
1492
1493 2023-08-31  Claudiu Zissulescu  <claziss@gmail.com>
1494
1495         * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
1496         SWAP option is enabled.
1497         * config/arc/arc.md (ashlsi2_cnt16): Likewise.
1498
1499 2023-08-31  Stamatis Markianos-Wright  <stam.markianos-wright@arm.com>
1500
1501         * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
1502         Use common insn for signed and unsigned front-end definitions.
1503         * config/arm/arm_mve_builtins.def
1504         (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
1505         (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
1506         * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
1507         (isu): Likewise.
1508         (rot): Likewise.
1509         (mve_rot): Likewise.
1510         (supf): Likewise.
1511         (VxCADDQ_M): Likewise.
1512         * config/arm/unspecs.md (unspec): Likewise.
1513         * config/arm/mve.md: Fix minor typo.
1514
1515 2023-08-31  liuhongt  <hongtao.liu@intel.com>
1516
1517         * config/i386/sse.md (<avx512>_blendm<mode>): Merge
1518         VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
1519         (VF_AVX512HFBF16): Renamed to VHFBF.
1520         (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
1521         (VF_AVX512FP16): Removed.
1522         (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
1523         (avx512fp16_rcp<mode>2<mask_name>): Ditto.
1524         (rsqrt<mode>2): Ditto.
1525         (<sse>_rsqrt<mode>2<mask_name>): Ditto.
1526         (vcond<mode><code>): Ditto.
1527         (vcond<sseintvecmodelower><mode>): Ditto.
1528         (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
1529         (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
1530         (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
1531         (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
1532         (cmla<conj_op><mode>4): Ditto.
1533         (fma_<mode>_fadd_fmul): Ditto.
1534         (fma_<mode>_fadd_fcmul): Ditto.
1535         (fma_<complexopname>_<mode>_fma_zero): Ditto.
1536         (fma_<mode>_fmaddc_bcst): Ditto.
1537         (fma_<mode>_fcmaddc_bcst): Ditto.
1538         (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
1539         (cmul<conj_op><mode>3): Ditto.
1540         (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
1541         Ditto.
1542         (vec_unpacks_lo_<mode>): Ditto.
1543         (vec_unpacks_hi_<mode>): Ditto.
1544         (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
1545         (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
1546         (*vec_extract<mode>_0): Ditto.
1547         (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
1548
1549 2023-08-31  Lehua Ding  <lehua.ding@rivai.ai>
1550
1551         PR target/111234
1552         * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
1553
1554 2023-08-31  Jiufu Guo  <guojiufu@linux.ibm.com>
1555
1556         * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
1557         (operator_minus::overflow_free_p): New declare.
1558         (operator_mult::overflow_free_p): New declare.
1559         * range-op.cc (range_op_handler::overflow_free_p): New function.
1560         (range_operator::overflow_free_p): New default function.
1561         (operator_plus::overflow_free_p): New function.
1562         (operator_minus::overflow_free_p): New function.
1563         (operator_mult::overflow_free_p): New function.
1564         * range-op.h (range_op_handler::overflow_free_p): New declare.
1565         (range_operator::overflow_free_p): New declare.
1566         * value-range.cc (irange::nonnegative_p): New function.
1567         (irange::nonpositive_p): New function.
1568         * value-range.h (irange::nonnegative_p): New declare.
1569         (irange::nonpositive_p): New declare.
1570
1571 2023-08-30  Dimitar Dimitrov  <dimitar@dinux.eu>
1572
1573         PR target/106562
1574         * config/pru/predicates.md (const_0_operand): New predicate.
1575         (pru_cstore_comparison_operator): Ditto.
1576         * config/pru/pru.md (cstore<mode>4): New pattern.
1577         (cstoredi4): Ditto.
1578
1579 2023-08-30  Richard Biener  <rguenther@suse.de>
1580
1581         PR tree-optimization/111228
1582         * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
1583         New simplifications.
1584
1585 2023-08-30  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1586
1587         * config/riscv/autovec.md (movmisalign<mode>): Delete.
1588
1589 2023-08-30  Die Li  <lidie@eswincomputing.com>
1590             Fei Gao  <gaofei@eswincomputing.com>
1591
1592         * config/riscv/peephole.md: New pattern.
1593         * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
1594         (zcmp_mv_sreg_operand): New predicate.
1595         * config/riscv/riscv.md: New predicate.
1596         * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
1597         (*mvsa01<X:mode>): New pattern.
1598
1599 2023-08-30  Fei Gao  <gaofei@eswincomputing.com>
1600
1601         * config/riscv/riscv.cc
1602         (riscv_zcmp_can_use_popretz): true if popretz can be used
1603         (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
1604         (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
1605         * config/riscv/riscv.md: define A0_REGNUM
1606         * config/riscv/zc.md
1607         (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
1608         (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
1609         (@gpr_multi_popretz_up_to_s1_<mode>): likewise
1610         (@gpr_multi_popretz_up_to_s2_<mode>): likewise
1611         (@gpr_multi_popretz_up_to_s3_<mode>): likewise
1612         (@gpr_multi_popretz_up_to_s4_<mode>): likewise
1613         (@gpr_multi_popretz_up_to_s5_<mode>): likewise
1614         (@gpr_multi_popretz_up_to_s6_<mode>): likewise
1615         (@gpr_multi_popretz_up_to_s7_<mode>): likewise
1616         (@gpr_multi_popretz_up_to_s8_<mode>): likewise
1617         (@gpr_multi_popretz_up_to_s9_<mode>): likewise
1618         (@gpr_multi_popretz_up_to_s11_<mode>): likewise
1619
1620 2023-08-30  Fei Gao  <gaofei@eswincomputing.com>
1621
1622         * config/riscv/iterators.md
1623         (slot0_offset): slot 0 offset in stack GPRs area in bytes
1624         (slot1_offset): slot 1 offset in stack GPRs area in bytes
1625         (slot2_offset): likewise
1626         (slot3_offset): likewise
1627         (slot4_offset): likewise
1628         (slot5_offset): likewise
1629         (slot6_offset): likewise
1630         (slot7_offset): likewise
1631         (slot8_offset): likewise
1632         (slot9_offset): likewise
1633         (slot10_offset): likewise
1634         (slot11_offset): likewise
1635         (slot12_offset): likewise
1636         * config/riscv/predicates.md
1637         (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
1638         (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
1639         (stack_push_up_to_s1_operand): likewise
1640         (stack_push_up_to_s2_operand): likewise
1641         (stack_push_up_to_s3_operand): likewise
1642         (stack_push_up_to_s4_operand): likewise
1643         (stack_push_up_to_s5_operand): likewise
1644         (stack_push_up_to_s6_operand): likewise
1645         (stack_push_up_to_s7_operand): likewise
1646         (stack_push_up_to_s8_operand): likewise
1647         (stack_push_up_to_s9_operand): likewise
1648         (stack_push_up_to_s11_operand): likewise
1649         (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
1650         (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
1651         (stack_pop_up_to_s1_operand): likewise
1652         (stack_pop_up_to_s2_operand): likewise
1653         (stack_pop_up_to_s3_operand): likewise
1654         (stack_pop_up_to_s4_operand): likewise
1655         (stack_pop_up_to_s5_operand): likewise
1656         (stack_pop_up_to_s6_operand): likewise
1657         (stack_pop_up_to_s7_operand): likewise
1658         (stack_pop_up_to_s8_operand): likewise
1659         (stack_pop_up_to_s9_operand): likewise
1660         (stack_pop_up_to_s11_operand): likewise
1661         * config/riscv/riscv-protos.h
1662         (riscv_zcmp_valid_stack_adj_bytes_p):declaration
1663         * config/riscv/riscv.cc (struct riscv_frame_info): comment change
1664         (riscv_avoid_multi_push): helper function of riscv_use_multi_push
1665         (riscv_use_multi_push): true if multi push is used
1666         (riscv_multi_push_sregs_count): num of sregs in multi-push
1667         (riscv_multi_push_regs_count): num of regs in multi-push
1668         (riscv_16bytes_align): align to 16 bytes
1669         (riscv_stack_align): moved to a better place
1670         (riscv_save_libcall_count): no functional change
1671         (riscv_compute_frame_info): add zcmp frame info
1672         (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
1673         (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
1674         (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
1675         (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
1676         (riscv_expand_prologue): allocate stack by cm.push
1677         (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
1678         (riscv_expand_epilogue): allocate stack by cm.pop[ret]
1679         (zcmp_base_adj): calculate stack adjustment base size
1680         (zcmp_additional_adj): calculate stack adjustment additional size
1681         (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
1682         * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
1683         (S0_MASK): likewise
1684         (S1_MASK): likewise
1685         (S2_MASK): likewise
1686         (S3_MASK): likewise
1687         (S4_MASK): likewise
1688         (S5_MASK): likewise
1689         (S6_MASK): likewise
1690         (S7_MASK): likewise
1691         (S8_MASK): likewise
1692         (S9_MASK): likewise
1693         (S10_MASK): likewise
1694         (S11_MASK): likewise
1695         (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
1696         (ZCMP_MAX_SPIMM): max spimm value
1697         (ZCMP_SP_INC_STEP): zcmp sp increment step
1698         (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
1699         (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
1700         (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
1701         (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
1702         * config/riscv/riscv.md: include zc.md
1703         * config/riscv/zc.md: New file. machine description for zcmp
1704
1705 2023-08-30  Jakub Jelinek  <jakub@redhat.com>
1706
1707         PR tree-optimization/110914
1708         * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
1709         adjust_last_stmt unless len is known constant.
1710
1711 2023-08-30  Jakub Jelinek  <jakub@redhat.com>
1712
1713         PR tree-optimization/111015
1714         * gimple-ssa-store-merging.cc
1715         (imm_store_chain_info::output_merged_store): Use wi::mask and
1716         wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
1717         build_int_cst to build BIT_AND_EXPR mask.
1718
1719 2023-08-30  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1720
1721         * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
1722         (call_may_clobber_ref_p_1): Ditto.
1723         * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
1724         (get_alias_ptr_type_for_ptr_address): Ditto.
1725
1726 2023-08-30  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1727
1728         * config/riscv/riscv-vsetvl.cc
1729         (vector_insn_info::get_avl_or_vl_reg): Fix bug.
1730
1731 2023-08-30  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1732
1733         * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
1734         * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
1735         VLS misalign.
1736
1737 2023-08-29  Philipp Tomsich  <philipp.tomsich@vrull.eu>
1738
1739         * config/riscv/zicond.md: New splitters to rewrite single bit
1740         sign extension as the condition to a czero in the desired form.
1741
1742 2023-08-29  David Malcolm  <dmalcolm@redhat.com>
1743
1744         PR analyzer/99860
1745         * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
1746
1747 2023-08-29  David Malcolm  <dmalcolm@redhat.com>
1748
1749         PR analyzer/99860
1750         * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
1751
1752 2023-08-29  Jin Ma  <jinma@linux.alibaba.com>
1753
1754         * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
1755         zvfh can generate zfa extended instruction fli.h, just like zfh.
1756
1757 2023-08-29  Edwin Lu  <ewlu@rivosinc.com>
1758             Vineet Gupta  <vineetg@rivosinc.com>
1759
1760         * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
1761         __riscv_unaligned_avoid with value 1 or
1762         __riscv_unaligned_slow with value 1 or
1763         __riscv_unaligned_fast with value 1
1764         * config/riscv/riscv.cc (riscv_option_override): Define
1765         riscv_user_wants_strict_align. Set
1766         riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
1767         * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
1768
1769 2023-08-29  Edwin Lu  <ewlu@rivosinc.com>
1770
1771         * config/riscv/autovec-vls.md: Update types
1772         * config/riscv/riscv.md: Add vector placeholder type
1773         * config/riscv/vector.md: Update types
1774
1775 2023-08-29  Carl Love  <cel@us.ibm.com>
1776
1777         * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
1778         (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
1779         * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
1780         __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
1781         New buit-in definitions.
1782         * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
1783         overloaded definition.
1784         * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
1785
1786 2023-08-29  Pan Li  <pan2.li@intel.com>
1787             Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
1788
1789         * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
1790         (riscv_legitimize_const_move): Handle ref plus const poly.
1791
1792 2023-08-29  Tsukasa OI  <research_trasio@irq.a4lg.com>
1793
1794         * common/config/riscv/riscv-common.cc
1795         (riscv_implied_info): Add implications from unprivileged extensions.
1796         (riscv_ext_version_table): Add stub support for all unprivileged
1797         extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
1798
1799 2023-08-29  Tsukasa OI  <research_trasio@irq.a4lg.com>
1800
1801         * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
1802         Add stub support for all vendor extensions supported by Binutils.
1803
1804 2023-08-29  Tsukasa OI  <research_trasio@irq.a4lg.com>
1805
1806         * common/config/riscv/riscv-common.cc
1807         (riscv_implied_info): Add implications from privileged extensions.
1808         (riscv_ext_version_table): Add stub support for all privileged
1809         extensions supported by Binutils.
1810
1811 2023-08-29  Lehua Ding  <lehua.ding@rivai.ai>
1812
1813         * config/riscv/autovec.md: Adjust
1814         * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
1815         (get_vlmax_rtx): Exported.
1816         * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
1817         (emit_vlmax_masked_gather_mu_insn): Adjust.
1818         (get_vlmax_rtx): New func.
1819         (expand_load_store): Adjust.
1820         (expand_cond_len_unop): Call expand_cond_len_op.
1821         (expand_cond_len_op): New subroutine.
1822         (expand_cond_len_binop): Call expand_cond_len_op.
1823         (expand_cond_len_ternop): Call expand_cond_len_op.
1824         (expand_lanes_load_store): Adjust.
1825
1826 2023-08-29  Jakub Jelinek  <jakub@redhat.com>
1827
1828         PR middle-end/79173
1829         PR middle-end/111209
1830         * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
1831         just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
1832         carry-out on higher limb.  Don't match it though if it could be
1833         matched later on 4 argument addition/subtraction.
1834
1835 2023-08-29  Andrew Pinski  <apinski@marvell.com>
1836
1837         PR tree-optimization/111147
1838         * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
1839         instead of matching bit_not.
1840
1841 2023-08-29  Christophe Lyon  <christophe.lyon@linaro.org>
1842
1843         * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
1844         initializer.
1845
1846 2023-08-29  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1847
1848         * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
1849         (pass_vsetvl::compute_local_properties): Fix bug.
1850         (pass_vsetvl::commit_vsetvls): Ditto.
1851         * config/riscv/riscv-vsetvl.h: New function.
1852
1853 2023-08-29  Lehua Ding  <lehua.ding@rivai.ai>
1854
1855         PR target/110943
1856         * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
1857         New predicate.
1858         * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
1859         force_reg mem target operand.
1860         * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
1861         (*pred_mov<mode>): Remove imm -> reg pattern.
1862         (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
1863
1864 2023-08-29  Lulu Cheng  <chenglulu@loongson.cn>
1865
1866         * common/config/loongarch/loongarch-common.cc:
1867         Enable '-free' on O2 and above.
1868         * doc/invoke.texi: Modify the description information
1869         of the '-free' compilation option and add the LoongArch
1870         description.
1871
1872 2023-08-28  Tsukasa OI  <research_trasio@irq.a4lg.com>
1873
1874         * doc/extend.texi: Fix the description of __builtin_riscv_pause.
1875
1876 2023-08-28  Tsukasa OI  <research_trasio@irq.a4lg.com>
1877
1878         * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
1879         Implement the 'Zihintpause' extension, version 2.0.
1880         (riscv_ext_flag_table) Add 'Zihintpause' handling.
1881         * config/riscv/riscv-builtins.cc: Remove availability predicate
1882         "always" and add "hint_pause".
1883         (riscv_builtins) : Add "pause" extension.
1884         * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
1885         * config/riscv/riscv.md (riscv_pause): Adjust output based on
1886         TARGET_ZIHINTPAUSE.
1887
1888 2023-08-28  Andrew Pinski  <apinski@marvell.com>
1889
1890         * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
1891         instead of specifically checking for ~X.
1892
1893 2023-08-28  Andrew Pinski  <apinski@marvell.com>
1894
1895         PR tree-optimization/111146
1896         * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
1897         redundant pattern.
1898
1899 2023-08-28  Andrew Pinski  <apinski@marvell.com>
1900
1901         * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
1902         when resimplify returns true.
1903         (match_simplify_replacement): Print only if accepted the match-and-simplify
1904         result rather than the full sequence.
1905
1906 2023-08-28  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1907
1908         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
1909         never probability.
1910         (pass_vsetvl::compute_probabilities): Fix unitialized probability.
1911
1912 2023-08-28  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1913
1914         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
1915
1916 2023-08-28  Christophe Lyon  <christophe.lyon@linaro.org>
1917
1918         * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
1919         (vmulltq_poly): New.
1920         * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
1921         (vmulltq_poly): New.
1922         * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
1923         (vmulltq_poly): New.
1924         * config/arm/arm_mve.h (vmulltq_poly): Remove.
1925         (vmullbq_poly): Remove.
1926         (vmullbq_poly_m): Remove.
1927         (vmulltq_poly_m): Remove.
1928         (vmullbq_poly_x): Remove.
1929         (vmulltq_poly_x): Remove.
1930         (vmulltq_poly_p8): Remove.
1931         (vmullbq_poly_p8): Remove.
1932         (vmulltq_poly_p16): Remove.
1933         (vmullbq_poly_p16): Remove.
1934         (vmullbq_poly_m_p8): Remove.
1935         (vmullbq_poly_m_p16): Remove.
1936         (vmulltq_poly_m_p8): Remove.
1937         (vmulltq_poly_m_p16): Remove.
1938         (vmullbq_poly_x_p8): Remove.
1939         (vmullbq_poly_x_p16): Remove.
1940         (vmulltq_poly_x_p8): Remove.
1941         (vmulltq_poly_x_p16): Remove.
1942         (__arm_vmulltq_poly_p8): Remove.
1943         (__arm_vmullbq_poly_p8): Remove.
1944         (__arm_vmulltq_poly_p16): Remove.
1945         (__arm_vmullbq_poly_p16): Remove.
1946         (__arm_vmullbq_poly_m_p8): Remove.
1947         (__arm_vmullbq_poly_m_p16): Remove.
1948         (__arm_vmulltq_poly_m_p8): Remove.
1949         (__arm_vmulltq_poly_m_p16): Remove.
1950         (__arm_vmullbq_poly_x_p8): Remove.
1951         (__arm_vmullbq_poly_x_p16): Remove.
1952         (__arm_vmulltq_poly_x_p8): Remove.
1953         (__arm_vmulltq_poly_x_p16): Remove.
1954         (__arm_vmulltq_poly): Remove.
1955         (__arm_vmullbq_poly): Remove.
1956         (__arm_vmullbq_poly_m): Remove.
1957         (__arm_vmulltq_poly_m): Remove.
1958         (__arm_vmullbq_poly_x): Remove.
1959         (__arm_vmulltq_poly_x): Remove.
1960
1961 2023-08-28  Christophe Lyon  <christophe.lyon@linaro.org>
1962
1963         * config/arm/arm-mve-builtins-functions.h (class
1964         unspec_mve_function_exact_insn_vmull_poly): New.
1965
1966 2023-08-28  Christophe Lyon  <christophe.lyon@linaro.org>
1967
1968         * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
1969         * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
1970
1971 2023-08-28  Christophe Lyon  <christophe.lyon@linaro.org>
1972
1973         * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
1974         support for 'U' and 'p' format specifiers.
1975
1976 2023-08-28  Christophe Lyon  <christophe.lyon@linaro.org>
1977
1978         * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
1979         field..
1980         (TYPES_poly_8_16): New.
1981         (poly_8_16): New.
1982         * config/arm/arm-mve-builtins.def (p8): New type suffix.
1983         (p16): Likewise.
1984         * config/arm/arm-mve-builtins.h (enum type_class_index): Add
1985         TYPE_poly.
1986         (struct type_suffix_info): Add poly_p field.
1987
1988 2023-08-28  Christophe Lyon  <christophe.lyon@linaro.org>
1989
1990         * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
1991         New.
1992         * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
1993         New.
1994         * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
1995         New.
1996         * config/arm/arm_mve.h (vmulltq_int): Remove.
1997         (vmullbq_int): Remove.
1998         (vmullbq_int_m): Remove.
1999         (vmulltq_int_m): Remove.
2000         (vmullbq_int_x): Remove.
2001         (vmulltq_int_x): Remove.
2002         (vmulltq_int_u8): Remove.
2003         (vmullbq_int_u8): Remove.
2004         (vmulltq_int_s8): Remove.
2005         (vmullbq_int_s8): Remove.
2006         (vmulltq_int_u16): Remove.
2007         (vmullbq_int_u16): Remove.
2008         (vmulltq_int_s16): Remove.
2009         (vmullbq_int_s16): Remove.
2010         (vmulltq_int_u32): Remove.
2011         (vmullbq_int_u32): Remove.
2012         (vmulltq_int_s32): Remove.
2013         (vmullbq_int_s32): Remove.
2014         (vmullbq_int_m_s8): Remove.
2015         (vmullbq_int_m_s32): Remove.
2016         (vmullbq_int_m_s16): Remove.
2017         (vmullbq_int_m_u8): Remove.
2018         (vmullbq_int_m_u32): Remove.
2019         (vmullbq_int_m_u16): Remove.
2020         (vmulltq_int_m_s8): Remove.
2021         (vmulltq_int_m_s32): Remove.
2022         (vmulltq_int_m_s16): Remove.
2023         (vmulltq_int_m_u8): Remove.
2024         (vmulltq_int_m_u32): Remove.
2025         (vmulltq_int_m_u16): Remove.
2026         (vmullbq_int_x_s8): Remove.
2027         (vmullbq_int_x_s16): Remove.
2028         (vmullbq_int_x_s32): Remove.
2029         (vmullbq_int_x_u8): Remove.
2030         (vmullbq_int_x_u16): Remove.
2031         (vmullbq_int_x_u32): Remove.
2032         (vmulltq_int_x_s8): Remove.
2033         (vmulltq_int_x_s16): Remove.
2034         (vmulltq_int_x_s32): Remove.
2035         (vmulltq_int_x_u8): Remove.
2036         (vmulltq_int_x_u16): Remove.
2037         (vmulltq_int_x_u32): Remove.
2038         (__arm_vmulltq_int_u8): Remove.
2039         (__arm_vmullbq_int_u8): Remove.
2040         (__arm_vmulltq_int_s8): Remove.
2041         (__arm_vmullbq_int_s8): Remove.
2042         (__arm_vmulltq_int_u16): Remove.
2043         (__arm_vmullbq_int_u16): Remove.
2044         (__arm_vmulltq_int_s16): Remove.
2045         (__arm_vmullbq_int_s16): Remove.
2046         (__arm_vmulltq_int_u32): Remove.
2047         (__arm_vmullbq_int_u32): Remove.
2048         (__arm_vmulltq_int_s32): Remove.
2049         (__arm_vmullbq_int_s32): Remove.
2050         (__arm_vmullbq_int_m_s8): Remove.
2051         (__arm_vmullbq_int_m_s32): Remove.
2052         (__arm_vmullbq_int_m_s16): Remove.
2053         (__arm_vmullbq_int_m_u8): Remove.
2054         (__arm_vmullbq_int_m_u32): Remove.
2055         (__arm_vmullbq_int_m_u16): Remove.
2056         (__arm_vmulltq_int_m_s8): Remove.
2057         (__arm_vmulltq_int_m_s32): Remove.
2058         (__arm_vmulltq_int_m_s16): Remove.
2059         (__arm_vmulltq_int_m_u8): Remove.
2060         (__arm_vmulltq_int_m_u32): Remove.
2061         (__arm_vmulltq_int_m_u16): Remove.
2062         (__arm_vmullbq_int_x_s8): Remove.
2063         (__arm_vmullbq_int_x_s16): Remove.
2064         (__arm_vmullbq_int_x_s32): Remove.
2065         (__arm_vmullbq_int_x_u8): Remove.
2066         (__arm_vmullbq_int_x_u16): Remove.
2067         (__arm_vmullbq_int_x_u32): Remove.
2068         (__arm_vmulltq_int_x_s8): Remove.
2069         (__arm_vmulltq_int_x_s16): Remove.
2070         (__arm_vmulltq_int_x_s32): Remove.
2071         (__arm_vmulltq_int_x_u8): Remove.
2072         (__arm_vmulltq_int_x_u16): Remove.
2073         (__arm_vmulltq_int_x_u32): Remove.
2074         (__arm_vmulltq_int): Remove.
2075         (__arm_vmullbq_int): Remove.
2076         (__arm_vmullbq_int_m): Remove.
2077         (__arm_vmulltq_int_m): Remove.
2078         (__arm_vmullbq_int_x): Remove.
2079         (__arm_vmulltq_int_x): Remove.
2080
2081 2023-08-28  Christophe Lyon  <christophe.lyon@linaro.org>
2082
2083         * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
2084         * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
2085
2086 2023-08-28  Christophe Lyon  <christophe.lyon@linaro.org>
2087
2088         * config/arm/arm-mve-builtins-functions.h (class
2089         unspec_mve_function_exact_insn_vmull): New.
2090
2091 2023-08-28  Christophe Lyon  <christophe.lyon@linaro.org>
2092
2093         * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
2094         (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
2095         VMULLTQ_INT_U.
2096         (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
2097         VMULLTQ_POLY_M_P.
2098         (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
2099         (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
2100         * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
2101         (mve_vmulltq_int_<supf><mode>): Merge into ...
2102         (@mve_<mve_insn>q_int_<supf><mode>) ... this.
2103         (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
2104         (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
2105         (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
2106         (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
2107         (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
2108         (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
2109
2110 2023-08-28  Christophe Lyon  <christophe.lyon@linaro.org>
2111
2112         * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
2113         Remove dead check.
2114
2115 2023-08-28  Christophe Lyon  <christophe.lyon@linaro.org>
2116
2117         * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
2118         (binary_acca_int64): Likewise.
2119
2120 2023-08-28  Aldy Hernandez  <aldyh@redhat.com>
2121
2122         * range-op-float.cc (fold_range): Handle relations.
2123
2124 2023-08-28  Lulu Cheng  <chenglulu@loongson.cn>
2125
2126         * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
2127         Optimize the function implementation.
2128
2129 2023-08-28  liuhongt  <hongtao.liu@intel.com>
2130
2131         PR target/111119
2132         * config/i386/sse.md (V48_AVX2): Rename to ..
2133         (V48_128_256): .. this.
2134         (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
2135         (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
2136         V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
2137         integral modes when TARGET_AVX2 is not available.
2138         (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
2139         (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
2140         V48_128_256.
2141         (maskstore<mode><sseintvecmodelower>): Ditto.
2142
2143 2023-08-28  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2144
2145         * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
2146         New function.
2147         (after_or_same_p): Ditto.
2148         (find_reg_killed_by): Delete.
2149         (has_vsetvl_killed_avl_p): Ditto.
2150         (anticipatable_occurrence_p): Refactor.
2151         (any_set_in_bb_p): Delete.
2152         (count_regno_occurrences): Ditto.
2153         (backward_propagate_worthwhile_p): Ditto.
2154         (demands_can_be_fused_p): Ditto.
2155         (earliest_pred_can_be_fused_p): New function.
2156         (vsetvl_dominated_by_p): Ditto.
2157         (vector_insn_info::parse_insn): Refactor.
2158         (vector_insn_info::merge): Refactor.
2159         (vector_insn_info::dump): Refactor.
2160         (vector_infos_manager::vector_infos_manager): Refactor.
2161         (vector_infos_manager::all_empty_predecessor_p): Delete.
2162         (vector_infos_manager::all_same_avl_p): Ditto.
2163         (vector_infos_manager::create_bitmap_vectors): Refactor.
2164         (vector_infos_manager::free_bitmap_vectors): Refactor.
2165         (vector_infos_manager::dump): Refactor.
2166         (pass_vsetvl::update_block_info): New function.
2167         (enum fusion_type): Ditto.
2168         (pass_vsetvl::get_backward_fusion_type): Delete.
2169         (pass_vsetvl::hard_empty_block_p): Ditto.
2170         (pass_vsetvl::backward_demand_fusion): Ditto.
2171         (pass_vsetvl::forward_demand_fusion): Ditto.
2172         (pass_vsetvl::demand_fusion): Ditto.
2173         (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
2174         (pass_vsetvl::compute_local_properties): Ditto.
2175         (pass_vsetvl::earliest_fusion): New function.
2176         (pass_vsetvl::vsetvl_fusion): Ditto.
2177         (pass_vsetvl::commit_vsetvls): Refactor.
2178         (get_first_vsetvl_before_rvv_insns): Ditto.
2179         (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
2180         (pass_vsetvl::cleanup_earliest_vsetvls): New function.
2181         (pass_vsetvl::df_post_optimization): Refactor.
2182         (pass_vsetvl::lazy_vsetvl): Ditto.
2183         * config/riscv/riscv-vsetvl.h: Ditto.
2184
2185 2023-08-26  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2186
2187         * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
2188         * config/riscv/riscv-protos.h (enum insn_type): New enum.
2189         (expand_fold_extract_last): New function.
2190         * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
2191         (emit_cpop_insn): Ditto.
2192         (emit_nonvlmax_compress_insn): Ditto.
2193         (expand_fold_extract_last): Ditto.
2194         * config/riscv/vector.md: Fix vcpop.m ratio demand.
2195
2196 2023-08-25  Edwin Lu  <ewlu@rivosinc.com>
2197
2198         * config/riscv/sync-rvwmo.md: updated types to "multi" or
2199                 "atomic" based on number of assembly lines generated
2200         * config/riscv/sync-ztso.md: likewise
2201         * config/riscv/sync.md: likewise
2202
2203 2023-08-25  Jin Ma  <jinma@linux.alibaba.com>
2204
2205         * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
2206         the F extension.
2207         * config/riscv/constraints.md (zfli): Constrain the floating point number that the
2208         instructions FLI.H/S/D can load.
2209         * config/riscv/iterators.md (ceil): New.
2210         * config/riscv/riscv-opts.h (MASK_ZFA): New.
2211         (TARGET_ZFA): New.
2212         * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
2213         * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
2214         (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
2215         not applicable.
2216         (riscv_const_insns): Likewise.
2217         (riscv_legitimize_const_move): Likewise.
2218         (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
2219         required.
2220         (riscv_split_doubleword_move): Likewise.
2221         (riscv_output_move): Output the mov instructions in zfa extension.
2222         (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
2223         in assembly.
2224         (riscv_secondary_memory_needed): Likewise.
2225         * config/riscv/riscv.md (fminm<mode>3): New.
2226         (fmaxm<mode>3): New.
2227         (movsidf2_low_rv32): New.
2228         (movsidf2_high_rv32): New.
2229         (movdfsisi3_rv32): New.
2230         (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
2231         * config/riscv/riscv.opt: New.
2232
2233 2023-08-25  Sandra Loosemore  <sandra@codesourcery.com>
2234
2235         * omp-api.h: New.
2236         * omp-general.cc (omp_runtime_api_procname): New.
2237         (omp_runtime_api_call): Moved here from omp-low.cc, and make
2238         non-static.
2239         * omp-general.h: Include omp-api.h.
2240         * omp-low.cc (omp_runtime_api_call): Delete this copy.
2241
2242 2023-08-25  Sandra Loosemore  <sandra@codesourcery.com>
2243
2244         * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
2245         * doc/gimple.texi (GIMPLE instruction set): Add
2246         GIMPLE_OMP_STRUCTURED_BLOCK.
2247         (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
2248         * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
2249         * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
2250         GIMPLE_OMP_STRUCTURED_BLOCK.
2251         (pp_gimple_stmt_1): Likewise.
2252         * gimple-walk.cc (walk_gimple_stmt): Likewise.
2253         * gimple.cc (gimple_build_omp_structured_block): New.
2254         * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
2255         * gimple.h (gimple_build_omp_structured_block): Declare.
2256         (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
2257         (CASE_GIMPLE_OMP): Likewise.
2258         * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
2259         (gimplify_expr): Likewise.
2260         * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
2261         GIMPLE_OMP_STRUCTURED_BLOCK.
2262         * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
2263         (lower_omp_1): Likewise.
2264         (diagnose_sb_1): Likewise.
2265         (diagnose_sb_2): Likewise.
2266         * tree-inline.cc (remap_gimple_stmt): Handle
2267         GIMPLE_OMP_STRUCTURED_BLOCK.
2268         (estimate_num_insns): Likewise.
2269         * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
2270         (convert_local_reference_stmt): Likewise.
2271         (convert_gimple_call): Likewise.
2272         * tree-pretty-print.cc (dump_generic_node): Handle
2273         OMP_STRUCTURED_BLOCK.
2274         * tree.def (OMP_STRUCTURED_BLOCK): New.
2275         * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
2276
2277 2023-08-25  Vineet Gupta  <vineetg@rivosinc.com>
2278
2279         * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
2280         cost. Add some comments about different constants handling.
2281
2282 2023-08-25  Andrew Pinski  <apinski@marvell.com>
2283
2284         * match.pd (`a ? one_zero : one_zero`): Move
2285         below detection of minmax.
2286
2287 2023-08-25  Andrew Pinski  <apinski@marvell.com>
2288
2289         * match.pd (`a | C -> C`): New pattern.
2290
2291 2023-08-25  Uros Bizjak  <ubizjak@gmail.com>
2292
2293         * caller-save.cc (new_saved_hard_reg):
2294         Rename TRUE/FALSE to true/false.
2295         (setup_save_areas): Ditto.
2296         * gcc.cc (set_collect_gcc_options): Ditto.
2297         (driver::build_multilib_strings): Ditto.
2298         (print_multilib_info): Ditto.
2299         * genautomata.cc (gen_cpu_unit): Ditto.
2300         (gen_query_cpu_unit): Ditto.
2301         (gen_bypass): Ditto.
2302         (gen_excl_set): Ditto.
2303         (gen_presence_absence_set): Ditto.
2304         (gen_presence_set): Ditto.
2305         (gen_final_presence_set): Ditto.
2306         (gen_absence_set): Ditto.
2307         (gen_final_absence_set): Ditto.
2308         (gen_automaton): Ditto.
2309         (gen_regexp_repeat): Ditto.
2310         (gen_regexp_allof): Ditto.
2311         (gen_regexp_oneof): Ditto.
2312         (gen_regexp_sequence): Ditto.
2313         (process_decls): Ditto.
2314         (reserv_sets_are_intersected): Ditto.
2315         (initiate_excl_sets): Ditto.
2316         (form_reserv_sets_list): Ditto.
2317         (check_presence_pattern_sets): Ditto.
2318         (check_absence_pattern_sets): Ditto.
2319         (check_regexp_units_distribution): Ditto.
2320         (check_unit_distributions_to_automata): Ditto.
2321         (create_ainsns): Ditto.
2322         (output_insn_code_cases): Ditto.
2323         (output_internal_dead_lock_func): Ditto.
2324         (form_important_insn_automata_lists): Ditto.
2325         * gengtype-state.cc (read_state_files_list): Ditto.
2326         * gengtype.cc (main): Ditto.
2327         * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
2328         Ditto.
2329         * gimple.cc (gimple_build_call_from_tree): Ditto.
2330         (preprocess_case_label_vec_for_gimple): Ditto.
2331         * gimplify.cc (gimplify_call_expr): Ditto.
2332         * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
2333
2334 2023-08-25  Richard Biener  <rguenther@suse.de>
2335
2336         PR tree-optimization/111137
2337         * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
2338         Properly handle grouped stores from other SLP instances.
2339
2340 2023-08-25  Richard Biener  <rguenther@suse.de>
2341
2342         * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
2343         Split out from vect_slp_analyze_node_dependences, remove
2344         dead code.
2345         (vect_slp_analyze_load_dependences): Split out from
2346         vect_slp_analyze_node_dependences, adjust comments.  Process
2347         queued stores before any disambiguation.
2348         (vect_slp_analyze_node_dependences): Remove.
2349         (vect_slp_analyze_instance_dependence): Adjust.
2350
2351 2023-08-25  Aldy Hernandez  <aldyh@redhat.com>
2352
2353         * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
2354         handling.
2355         (operator_not_equal::fold_range): Adjust for relations.
2356         (operator_lt::fold_range): Same.
2357         (operator_gt::fold_range): Same.
2358         (foperator_unordered_equal::fold_range): Same.
2359         (foperator_unordered_lt::fold_range): Same.
2360         (foperator_unordered_le::fold_range): Same.
2361         (foperator_unordered_gt::fold_range): Same.
2362         (foperator_unordered_ge::fold_range): Same.
2363
2364 2023-08-25  Richard Biener  <rguenther@suse.de>
2365
2366         PR tree-optimization/111136
2367         * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
2368         stores force STMT_VINFO_STRIDED_P and also duplicate that
2369         to all elements.
2370
2371 2023-08-25  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2372
2373         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
2374         Add early continue.
2375
2376 2023-08-25  liuhongt  <hongtao.liu@intel.com>
2377
2378         * config/i386/sse.md (vec_set<mode>): Removed.
2379         (V_128H): Merge into ..
2380         (V_128): .. this.
2381         (V_256H): Merge into ..
2382         (V_256): .. this.
2383         (V_512): Add V32HF, V32BF.
2384         (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
2385         to V_128.
2386         (vcond<mode><sseintvecmodelower>): Removed
2387         (vcondu<mode><sseintvecmodelower>): Removed.
2388         (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
2389
2390 2023-08-25  Hongyu Wang  <hongyu.wang@intel.com>
2391
2392         PR target/111127
2393         * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
2394         Adjust paramter order.
2395
2396 2023-08-24  Uros Bizjak  <ubizjak@gmail.com>
2397
2398         PR target/94866
2399         * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
2400
2401 2023-08-24  David Malcolm  <dmalcolm@redhat.com>
2402
2403         PR analyzer/105899
2404         * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
2405         list of functions known to the analyzer.
2406
2407 2023-08-24  Richard Biener  <rguenther@suse.de>
2408
2409         PR tree-optimization/111123
2410         * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
2411         remove indirect clobbers here ...
2412         * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
2413         (remove_indirect_clobbers): New function.
2414
2415 2023-08-24  Jan Hubicka  <jh@suse.cz>
2416
2417         * cfg.h (struct control_flow_graph): New field full_profile.
2418         * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
2419         * cfg.cc (init_flow): Set full_profile to false.
2420         * graphite.cc (graphite_transform_loops): Set full_profile to false.
2421         * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
2422         * predict.cc (pass_profile::execute): Set full_profile to true.
2423         * symtab-thunks.cc (expand_thunk): Set full_profile to true.
2424         * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
2425         if full_profile is set.
2426         * tree-inline.cc (initialize_cfun): Initialize full_profile.
2427         (expand_call_inline): Combine full_profile.
2428
2429 2023-08-24  Richard Biener  <rguenther@suse.de>
2430
2431         * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
2432         load_p to ldst_p, fix mistakes and rely on
2433         STMT_VINFO_DATA_REF.
2434
2435 2023-08-24  Jan Hubicka  <jh@suse.cz>
2436
2437         * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
2438         of newly build trap bb.
2439
2440 2023-08-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2441
2442         * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
2443         it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
2444         (TARGET_PREFERRED_ELSE_VALUE): Ditto.
2445
2446 2023-08-24  Robin Dapp  <rdapp.gcc@gmail.com>
2447
2448         * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
2449         * config/riscv/riscv.cc (riscv_option_override): Set sched
2450         pressure algorithm.
2451
2452 2023-08-24  Robin Dapp  <rdapp@ventanamicro.com>
2453
2454         * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
2455
2456 2023-08-24  Richard Biener  <rguenther@suse.de>
2457
2458         PR tree-optimization/111125
2459         * tree-vect-slp.cc (vect_slp_function): Split at novector
2460         loop entry, do not push blocks in novector loops.
2461
2462 2023-08-24  Richard Sandiford  <richard.sandiford@arm.com>
2463
2464         * doc/extend.texi: Document the C [[__extension__ ...]] construct.
2465
2466 2023-08-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2467
2468         * genmatch.cc (decision_tree::gen): Support
2469         COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
2470         * gimple-match-exports.cc (gimple_simplify): Ditto.
2471         (gimple_resimplify6): New function.
2472         (gimple_resimplify7): New function.
2473         (gimple_match_op::resimplify): Support
2474         COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
2475         (convert_conditional_op): Ditto.
2476         (build_call_internal): Ditto.
2477         (try_conditional_simplification): Ditto.
2478         (gimple_extract): Ditto.
2479         * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
2480         * internal-fn.cc (CASE): Ditto.
2481
2482 2023-08-24  Richard Biener  <rguenther@suse.de>
2483
2484         PR tree-optimization/111115
2485         * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
2486         * tree-vect-data-refs.cc (can_group_stmts_p): Also group
2487         .MASK_STORE.
2488         * tree-vect-slp.cc (arg3_arg2_map): New.
2489         (vect_get_operand_map): Handle IFN_MASK_STORE.
2490         (vect_slp_child_index_for_operand): New function.
2491         (vect_build_slp_tree_1): Handle statements with no LHS,
2492         masked store ifns.
2493         (vect_remove_slp_scalar_calls): Likewise.
2494         * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
2495         SLP child corresponding to the ifn value index.
2496         (vectorizable_store): Likewise for the mask index.  Support
2497         masked stores.
2498         (vectorizable_load): Lookup the SLP child corresponding to the
2499         ifn mask index.
2500
2501 2023-08-24  Richard Biener  <rguenther@suse.de>
2502
2503         PR tree-optimization/111125
2504         * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
2505         for the remain_defs processing.
2506
2507 2023-08-24  Richard Sandiford  <richard.sandiford@arm.com>
2508
2509         * config/aarch64/aarch64.cc: Include ssa.h.
2510         (aarch64_multiply_add_p): Require the second operand of an
2511         Advanced SIMD subtraction to be a multiplication.  Assume that
2512         such an operation won't be fused if the second operand is used
2513         multiple times and if the first operand is also a multiplication.
2514
2515 2023-08-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2516
2517         * tree-vect-loop.cc (vectorizable_reduction): Apply
2518         LEN_FOLD_EXTRACT_LAST.
2519         * tree-vect-stmts.cc (vectorizable_condition): Ditto.
2520
2521 2023-08-24  Richard Biener  <rguenther@suse.de>
2522
2523         PR tree-optimization/111128
2524         * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
2525         Emit external shift operand inline if we promoted it with
2526         another pattern stmt.
2527
2528 2023-08-24  Pan Li  <pan2.li@intel.com>
2529
2530         * config/riscv/autovec.md: Fix typo.
2531
2532 2023-08-24  Pan Li  <pan2.li@intel.com>
2533
2534         * config/riscv/riscv-vector-builtins-bases.cc
2535         (class binop_frm): Removed.
2536         (class reverse_binop_frm): Ditto.
2537         (class widen_binop_frm): Ditto.
2538         (class vfmacc_frm): Ditto.
2539         (class vfnmacc_frm): Ditto.
2540         (class vfmsac_frm): Ditto.
2541         (class vfnmsac_frm): Ditto.
2542         (class vfmadd_frm): Ditto.
2543         (class vfnmadd_frm): Ditto.
2544         (class vfmsub_frm): Ditto.
2545         (class vfnmsub_frm): Ditto.
2546         (class vfwmacc_frm): Ditto.
2547         (class vfwnmacc_frm): Ditto.
2548         (class vfwmsac_frm): Ditto.
2549         (class vfwnmsac_frm): Ditto.
2550         (class unop_frm): Ditto.
2551         (class vfrec7_frm): Ditto.
2552         (class binop): Add frm_op_type template arg.
2553         (class unop): Ditto.
2554         (class widen_binop): Ditto.
2555         (class widen_binop_fp): Ditto.
2556         (class reverse_binop): Ditto.
2557         (class vfmacc): Ditto.
2558         (class vfnmsac): Ditto.
2559         (class vfmadd): Ditto.
2560         (class vfnmsub): Ditto.
2561         (class vfnmacc): Ditto.
2562         (class vfmsac): Ditto.
2563         (class vfnmadd): Ditto.
2564         (class vfmsub): Ditto.
2565         (class vfwmacc): Ditto.
2566         (class vfwnmacc): Ditto.
2567         (class vfwmsac): Ditto.
2568         (class vfwnmsac): Ditto.
2569         (class float_misc): Ditto.
2570
2571 2023-08-24  Andrew Pinski  <apinski@marvell.com>
2572
2573         PR tree-optimization/111109
2574         * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
2575         Add check to make sure cmp and icmp are inverse.
2576
2577 2023-08-24  Andrew Pinski  <apinski@marvell.com>
2578
2579         PR tree-optimization/95929
2580         * match.pd (convert?(-a)): New pattern
2581         for 1bit integer types.
2582
2583 2023-08-24  Haochen Jiang  <haochen.jiang@intel.com>
2584
2585         Revert:
2586         2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
2587
2588         * common/config/i386/cpuinfo.h (get_available_features):
2589         Add avx10_set and version and detect avx10.1.
2590         (cpu_indicator_init): Handle avx10.1-512.
2591         * common/config/i386/i386-common.cc
2592         (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
2593         (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
2594         (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
2595         (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
2596         (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
2597         (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
2598         -mavx10.1-512.
2599         * common/config/i386/i386-cpuinfo.h (enum processor_features):
2600         Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
2601         FEATURE_AVX10_512BIT.
2602         * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
2603         AVX10_512BIT, AVX10_1 and AVX10_1_512.
2604         * config/i386/constraints.md (Yk): Add AVX10_1.
2605         (Yv): Ditto.
2606         (k): Ditto.
2607         * config/i386/cpuid.h (bit_AVX10): New.
2608         (bit_AVX10_256): Ditto.
2609         (bit_AVX10_512): Ditto.
2610         * config/i386/i386-c.cc (ix86_target_macros_internal):
2611         Define AVX10_512BIT and AVX10_1.
2612         * config/i386/i386-isa.def
2613         (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
2614         (AVX10_1): Add DEF_PTA(AVX10_1).
2615         * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
2616         (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
2617         and avx10.1-512.
2618         (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
2619         FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
2620         (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
2621         * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
2622         (ix86_conditional_register_usage): Ditto.
2623         (ix86_hard_regno_mode_ok): Ditto.
2624         (ix86_rtx_costs): Ditto.
2625         * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
2626         * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
2627         -mavx10.1-512.
2628         * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
2629         * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
2630         * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
2631         and avx10.1-512.
2632
2633 2023-08-24  Haochen Jiang  <haochen.jiang@intel.com>
2634
2635         Revert:
2636         2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
2637
2638         * common/config/i386/i386-common.cc
2639         (ix86_check_avx10): New function to check isa_flags and
2640         isa_flags_explicit to emit warning when AVX10 is enabled
2641         by "-m" option.
2642         (ix86_check_avx512):  New function to check isa_flags and
2643         isa_flags_explicit to emit warning when AVX512 is enabled
2644         by "-m" option.
2645         (ix86_handle_option): Do not change the flags when warning
2646         is emitted.
2647         * config/i386/driver-i386.cc (host_detect_local_cpu):
2648         Do not append -mno-avx10.1 for -march=native.
2649
2650 2023-08-24  Haochen Jiang  <haochen.jiang@intel.com>
2651
2652         Revert:
2653         2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
2654
2655         * common/config/i386/i386-common.cc
2656         (ix86_check_avx10_vector_width): New function to check isa_flags
2657         to emit a warning when there is a conflict in AVX10 options for
2658         vector width.
2659         (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
2660         * config/i386/driver-i386.cc (host_detect_local_cpu):
2661         Do not append -mno-avx10-max-512bit for -march=native.
2662
2663 2023-08-24  Haochen Jiang  <haochen.jiang@intel.com>
2664
2665         Revert:
2666         2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
2667
2668         * config/i386/avx512vldqintrin.h: Remove target attribute.
2669         * config/i386/i386-builtin.def (BDESC):
2670         Add OPTION_MASK_ISA2_AVX10_1.
2671         * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
2672         * config/i386/i386-expand.cc
2673         (ix86_check_builtin_isa_match): Ditto.
2674         (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
2675         * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
2676         and avx10_1_or_avx512vl.
2677         * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
2678         (VF1_128_256VLDQ_AVX10_1): Ditto.
2679         (VI8_AVX512VLDQ_AVX10_1): Ditto.
2680         (<sse>_andnot<mode>3<mask_name>):
2681         Add TARGET_AVX10_1 and change isa attr from avx512dq to
2682         avx10_1_or_avx512dq.
2683         (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
2684         avx512vl to avx10_1_or_avx512vl.
2685         (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
2686         Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
2687         (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
2688         Ditto.
2689         (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
2690         Ditto.
2691         (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
2692         Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
2693         (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
2694         Add TARGET_AVX10_1.
2695         (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
2696         (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
2697         Remove target check.
2698         (avx512dq_mul<mode>3<mask_name>): Ditto.
2699         (*avx512dq_mul<mode>3<mask_name>): Ditto.
2700         (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
2701         (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
2702         Remove target check.
2703         (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
2704         (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
2705         Remove target check.
2706         * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
2707         (mask_avx512vl_condition): Ditto.
2708         (mask): Ditto.
2709
2710 2023-08-24  Haochen Jiang  <haochen.jiang@intel.com>
2711
2712         Revert:
2713         2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
2714
2715         * config/i386/avx512vldqintrin.h: Remove target attribute.
2716         * config/i386/i386-builtin.def (BDESC):
2717         Add OPTION_MASK_ISA2_AVX10_1.
2718         * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
2719         * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
2720         (VI48_AVX512VLDQ_AVX10_1): Ditto.
2721         (VF2_AVX512VL): Remove.
2722         (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
2723         Add TARGET_AVX10_1.
2724         (*<code><mode>3<mask_name>): Change isa attribute to
2725         avx10_1_or_avx512dq. Add TARGET_AVX10_1.
2726         (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
2727         to avx10_1_or_avx512vl.
2728         (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
2729         Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
2730         (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
2731         Add TARGET_AVX10_1.
2732         (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
2733         Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
2734         (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
2735         Add TARGET_AVX10_1.
2736         (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
2737         Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
2738         (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
2739         Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
2740         (float<floatunssuffix>v4div4sf2<mask_name>):
2741         Add TARGET_AVX10_1.
2742         (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
2743         (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
2744         (float<floatunssuffix>v2div2sf2): Ditto.
2745         (float<floatunssuffix>v2div2sf2_mask): Ditto.
2746         (*float<floatunssuffix>v2div2sf2_mask): Ditto.
2747         (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
2748         (<avx512>_cvt<ssemodesuffix>2mask<mode>):
2749         Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
2750         (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
2751         (*<avx512>_cvtmask2<ssemodesuffix><mode>):
2752         Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
2753         Change when constraint is enabled.
2754
2755 2023-08-24  Haochen Jiang  <haochen.jiang@intel.com>
2756
2757         Revert:
2758         2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
2759
2760         * config/i386/avx512vldqintrin.h: Remove target attribute.
2761         * config/i386/i386-builtin.def (BDESC):
2762         Add OPTION_MASK_ISA2_AVX10_1.
2763         * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
2764         (VFH_AVX512VLDQ_AVX10_1): Ditto.
2765         (VF1_AVX512VLDQ_AVX10_1): Ditto.
2766         (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
2767         Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
2768         (vec_pack<floatprefix>_float_<mode>): Change iterator to
2769         VI8_AVX512VLDQ_AVX10_1. Remove target check.
2770         (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
2771         VF1_AVX512VLDQ_AVX10_1. Remove target check.
2772         (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
2773         (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
2774         (avx512vl_vextractf128<mode>): Change iterator to
2775         VI48F_256_DQVL_AVX10_1. Remove target check.
2776         (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
2777         (vec_extract_hi_<mode>): Ditto.
2778         (avx512vl_vinsert<mode>): Ditto.
2779         (vec_set_lo_<mode><mask_name>): Ditto.
2780         (vec_set_hi_<mode><mask_name>): Ditto.
2781         (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
2782         iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
2783         (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
2784         iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
2785         * config/i386/subst.md (mask_avx512dq_condition): Add
2786         TARGET_AVX10_1.
2787         (mask_scalar_merge): Ditto.
2788
2789 2023-08-24  Haochen Jiang  <haochen.jiang@intel.com>
2790
2791         Revert:
2792         2023-08-18  Haochen Jiang  <haochen.jiang@intel.com>
2793
2794         PR target/111051
2795         * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
2796         disabled.
2797
2798 2023-08-24  Richard Biener  <rguenther@suse.de>
2799
2800         PR debug/111080
2801         * dwarf2out.cc (prune_unused_types_walk): Handle
2802         DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
2803         DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
2804         and DW_TAG_dynamic_type as to only output them when referenced.
2805
2806 2023-08-24  liuhongt  <hongtao.liu@intel.com>
2807
2808         * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
2809         V13 to GCC 13.1.
2810
2811 2023-08-24  liuhongt  <hongtao.liu@intel.com>
2812
2813         * common/config/i386/i386-common.cc (processor_names): Add new
2814         member graniterapids-s and arrowlake-s.
2815         * config/i386/i386-options.cc (processor_alias_table): Update
2816         table with PROCESSOR_ARROWLAKE_S and
2817         PROCESSOR_GRANITERAPIDS_D.
2818         (m_GRANITERAPID_D): New macro.
2819         (m_ARROWLAKE_S): Ditto.
2820         (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
2821         (processor_cost_table): Add icelake_cost for
2822         PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
2823         PROCESSOR_ARROWLAKE_S.
2824         * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
2825         m_ARROWLAKE.
2826         * config/i386/i386.h (enum processor_type): Add new member
2827         PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
2828         * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
2829         PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
2830
2831 2023-08-23  Jivan Hakobyan  <jivanhakobyan9@gmail.com>
2832
2833         * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
2834         to help simplify code further.
2835
2836 2023-08-23  Andrew MacLeod  <amacleod@redhat.com>
2837
2838         * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
2839         * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
2840         Initialize using a range instead of value and edge.
2841         (phi_group::calculate_using_modifier): Use initializer value and
2842         process for relations after trying for iteration convergence.
2843         (phi_group::refine_using_relation): Use initializer range.
2844         (phi_group::dump): Rework the dump output.
2845         (phi_analyzer::process_phi): Allow multiple constant initilizers.
2846         Dump groups immediately as created.
2847         (phi_analyzer::dump): Tweak output.
2848         * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
2849         (phi_group::initial_value): Delete.
2850         (phi_group::refine_using_relation): Adjust prototype.
2851         (phi_group::m_initial_value): Delete.
2852         (phi_group::m_initial_edge): Delete.
2853         (phi_group::m_vr): Use int_range_max.
2854         * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
2855
2856 2023-08-23  Andrew MacLeod  <amacleod@redhat.com>
2857
2858         * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
2859         no group was created.
2860         (phi_analyzer::process_phi): Do not create groups of one phi node.
2861
2862 2023-08-23  Richard Earnshaw  <rearnsha@arm.com>
2863
2864         * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
2865         CODE, CMP_CODE and BIT_CODE arguments.
2866         * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
2867         (aarch64_gen_ccmp_next): Likewise.
2868         * doc/tm.texi: Regenerated.
2869
2870 2023-08-23  Richard Earnshaw  <rearnsha@arm.com>
2871
2872         * coretypes.h (rtx_code): Add forward declaration.
2873         * rtl.h (rtx_code): Make compatible with forward declaration.
2874
2875 2023-08-23  Uros Bizjak  <ubizjak@gmail.com>
2876
2877         PR target/111010
2878         * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
2879         Merge pattern from *concatditi3_3 and *concatsidi3_3 using
2880         DWIH mode iterator.  Disable (=&r,m,m) alternative for
2881         32-bit targets.
2882         (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
2883         alternative for 32-bit targets.
2884
2885 2023-08-23  Zhangjin Liao  <liaozhangjin@eswincomputing.com>
2886
2887         * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
2888         appropriate type attribute.
2889
2890 2023-08-23  Lehua Ding  <lehua.ding@rivai.ai>
2891
2892         * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
2893         (*copysign<mode>_neg): Ditto.
2894         * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
2895         (<optab><mode>2): Ditto.
2896         (cond_<optab><mode>): New.
2897         (cond_len_<optab><mode>): Ditto.
2898         * config/riscv/riscv-protos.h (enum insn_type): New.
2899         (expand_cond_len_unop): New helper func.
2900         * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
2901         (expand_cond_len_unop): New helper func.
2902
2903 2023-08-23  Jan Hubicka  <jh@suse.cz>
2904
2905         * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
2906         (should_duplicate_loop_header_p): Fix return value for static exits.
2907         (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
2908
2909 2023-08-23  Kewen Lin  <linkw@linux.ibm.com>
2910
2911         * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
2912         VMAT_GATHER_SCATTER in the final loop nest to its own loop,
2913         and update the final nest accordingly.
2914
2915 2023-08-23  Kewen Lin  <linkw@linux.ibm.com>
2916
2917         * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
2918         VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
2919         and update the final nest accordingly.
2920
2921 2023-08-23  Kewen Lin  <linkw@linux.ibm.com>
2922
2923         * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
2924         adjust vec result_chain, vec_oprnd with auto_vec, and adjust
2925         gvec_oprnds with auto_delete_vec.
2926
2927 2023-08-23  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2928
2929         * config/riscv/riscv-vsetvl.cc
2930         (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
2931
2932 2023-08-23  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2933
2934         * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
2935         Fix fuse rule bug.
2936         * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
2937
2938 2023-08-23  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2939
2940         * config/riscv/vector.md: Add attribute.
2941
2942 2023-08-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2943
2944         * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
2945         (vector_infos_manager::all_same_ratio_p): Ditto.
2946         (vector_infos_manager::all_same_avl_p): Ditto.
2947         (pass_vsetvl::refine_vsetvls): Ditto.
2948         (pass_vsetvl::cleanup_vsetvls): Ditto.
2949         (pass_vsetvl::commit_vsetvls): Ditto.
2950         (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
2951         (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
2952         (pass_vsetvl::compute_probabilities): Ditto.
2953
2954 2023-08-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2955
2956         * config/riscv/t-riscv: Add riscv-vsetvl.def
2957
2958 2023-08-22  Vineet Gupta  <vineetg@rivosinc.com>
2959
2960         * config/riscv/riscv.opt: Add --param names
2961         riscv-autovec-preference and riscv-autovec-lmul
2962
2963 2023-08-22  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>
2964
2965         * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
2966
2967 2023-08-22  Tobias Burnus  <tobias@codesourcery.com>
2968
2969         * tree-core.h (enum omp_clause_defaultmap_kind): Add
2970         OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
2971         * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
2972         * tree-pretty-print.cc (dump_omp_clause): Likewise.
2973
2974 2023-08-22  Jakub Jelinek  <jakub@redhat.com>
2975
2976         PR c++/106652
2977         * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
2978         types aren't supported in C++.
2979
2980 2023-08-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
2981
2982         * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
2983         * internal-fn.cc (fold_len_extract_direct): Ditto.
2984         (expand_fold_len_extract_optab_fn): Ditto.
2985         (direct_fold_len_extract_optab_supported_p): Ditto.
2986         * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
2987         * optabs.def (OPTAB_D): Ditto.
2988
2989 2023-08-22  Richard Biener  <rguenther@suse.de>
2990
2991         * tree-vect-stmts.cc (vectorizable_store): Do not bump
2992         DR_GROUP_STORE_COUNT here.  Remove early out.
2993         (vect_transform_stmt): Only call vectorizable_store on
2994         the last element of an interleaving chain.
2995
2996 2023-08-22  Richard Biener  <rguenther@suse.de>
2997
2998         PR tree-optimization/94864
2999         PR tree-optimization/94865
3000         PR tree-optimization/93080
3001         * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
3002         for vector insertion from vector extraction.
3003
3004 2023-08-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
3005             Kewen.Lin  <linkw@linux.ibm.com>
3006
3007         * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
3008         (vectorizable_live_operation): Add live vectorization for length loop
3009         control.
3010
3011 2023-08-22  David Malcolm  <dmalcolm@redhat.com>
3012
3013         PR analyzer/105899
3014         * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
3015
3016 2023-08-22  Pan Li  <pan2.li@intel.com>
3017
3018         * config/riscv/riscv-vector-builtins-bases.cc
3019         (vfwredusum_frm_obj): New declaration.
3020         (BASE): Ditto.
3021         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3022         * config/riscv/riscv-vector-builtins-functions.def
3023         (vfwredusum_frm): New intrinsic function def.
3024
3025 2023-08-21  David Faust  <david.faust@oracle.com>
3026
3027         * config/bpf/bpf.md (neg): Second operand must be a register.
3028
3029 2023-08-21  Edwin Lu  <ewlu@rivosinc.com>
3030
3031         * config/riscv/bitmanip.md: Added bitmanip type to insns
3032         that are missing types.
3033
3034 2023-08-21  Jeff Law  <jlaw@ventanamicro.com>
3035
3036         * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
3037         newline.
3038
3039 2023-08-21  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
3040
3041         * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
3042         Fix format specifier.
3043
3044 2023-08-21  Aldy Hernandez  <aldyh@redhat.com>
3045
3046         * value-range.cc (frange::union_nans): Return false if nothing
3047         changed.
3048         (range_tests_floats): New test.
3049
3050 2023-08-21  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3051
3052         PR tree-optimization/111048
3053         * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
3054         correctly.
3055         (fold_vec_perm_cst): Remove workaround and again call
3056         valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
3057         (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
3058
3059 2023-08-21  Richard Biener  <rguenther@suse.de>
3060
3061         PR tree-optimization/111082
3062         * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
3063         pun operations that can overflow.
3064
3065 2023-08-21  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
3066
3067         * lcm.cc (compute_antinout_edge): Export as global use.
3068         (compute_earliest): Ditto.
3069         (compute_rev_insert_delete): Ditto.
3070         * lcm.h (compute_antinout_edge): Ditto.
3071         (compute_earliest): Ditto.
3072
3073 2023-08-21  Richard Biener  <rguenther@suse.de>
3074
3075         PR tree-optimization/111070
3076         * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
3077         an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
3078
3079 2023-08-21  Andrew Pinski  <apinski@marvell.com>
3080
3081         PR tree-optimization/111002
3082         * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
3083
3084 2023-08-21  liuhongt  <hongtao.liu@intel.com>
3085
3086         * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
3087         Alderlake-N.
3088         * common/config/i386/i386-common.cc (alias_table): Support
3089         -march=gracemont as an alias of -march=alderlake.
3090
3091 2023-08-20  Uros Bizjak  <ubizjak@gmail.com>
3092
3093         * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
3094         instead of src in the call to ix86_expand_sse_cmp.
3095         * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
3096         force operands[1] to a register.
3097         (<any_extend:insn>v4hiv4si2): Ditto.
3098         (<any_extend:insn>v2siv2di2): Ditto.
3099
3100 2023-08-20  Andrew Pinski  <apinski@marvell.com>
3101
3102         PR tree-optimization/111006
3103         PR tree-optimization/110986
3104         * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
3105
3106 2023-08-20  Eric Gallager  <egallager@gcc.gnu.org>
3107
3108         PR target/90835
3109         * Makefile.in: improve error message when /usr/include is
3110         missing
3111
3112 2023-08-19  Tobias Burnus  <tobias@codesourcery.com>
3113
3114         PR middle-end/111017
3115         * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
3116         to expand_omp_build_cond for 'factor != 0' condition, resulting
3117         in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
3118
3119 2023-08-19  Guo Jie  <guojie@loongson.cn>
3120             Lulu Cheng  <chenglulu@loongson.cn>
3121
3122         * config/loongarch/t-loongarch: Add loongarch-driver.h into
3123         TM_H. Add loongarch-def.h and loongarch-tune.h into
3124         OPTIONS_H_EXTRA.
3125
3126 2023-08-18  Uros Bizjak  <ubizjak@gmail.com>
3127
3128         PR target/111023
3129         * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
3130         Also handle V2QImode.
3131         (ix86_expand_sse_extend): New function.
3132         * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
3133         * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
3134         TARGET_SSE2.  Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
3135         (<any_extend:insn>v2hiv2si2): Ditto.
3136         (<any_extend:insn>v2qiv2hi2): Ditto.
3137         * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
3138         (<any_extend:insn>v4hiv4si2): Ditto.
3139         (<any_extend:insn>v2siv2di2): Ditto.
3140
3141 2023-08-18  Aldy Hernandez  <aldyh@redhat.com>
3142
3143         PR ipa/110753
3144         * value-range.cc (irange::union_bitmask): Return FALSE if updated
3145         bitmask is semantically equivalent to the original mask.
3146         (irange::intersect_bitmask): Same.
3147         (irange::get_bitmask): Add comment.
3148
3149 2023-08-18  Richard Biener  <rguenther@suse.de>
3150
3151         PR tree-optimization/111019
3152         * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
3153         also scrap base and offset in case the ref is indirect.
3154
3155 2023-08-18  Jose E. Marchesi  <jose.marchesi@oracle.com>
3156
3157         * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
3158
3159 2023-08-18  Kewen Lin  <linkw@linux.ibm.com>
3160
3161         PR bootstrap/111021
3162         * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
3163
3164 2023-08-18  Kewen Lin  <linkw@linux.ibm.com>
3165
3166         * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
3167         out from ...
3168         (vectorizable_store): ... here.
3169
3170 2023-08-18  Richard Biener  <rguenther@suse.de>
3171
3172         PR tree-optimization/111048
3173         * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
3174         vectors first.
3175
3176 2023-08-18  Haochen Jiang  <haochen.jiang@intel.com>
3177
3178         PR target/111051
3179         * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
3180         disabled.
3181
3182 2023-08-18  Kewen Lin  <linkw@linux.ibm.com>
3183
3184         * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
3185         VMAT_GATHER_SCATTER in the final loop nest to its own loop,
3186         and update the final nest accordingly.
3187
3188 2023-08-18  Andrew Pinski  <apinski@marvell.com>
3189
3190         * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
3191         cond_len_neg and cond_len_one_cmpl.
3192
3193 2023-08-18  Lehua Ding  <lehua.ding@rivai.ai>
3194
3195         * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
3196         * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
3197         (*local_pic_load<ANYLSF:mode>): To ANYLSF.
3198         (*local_pic_load_32d<ANYF:mode>): Ditto.
3199         (*local_pic_load_32d<ANYLSF:mode>): Ditto.
3200         (*local_pic_store<ANYF:mode>): Ditto.
3201         (*local_pic_store<ANYLSF:mode>): Ditto.
3202         (*local_pic_store_32d<ANYF:mode>): Ditto.
3203         (*local_pic_store_32d<ANYLSF:mode>): Ditto.
3204
3205 2023-08-18  Lehua Ding  <lehua.ding@rivai.ai>
3206             Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
3207
3208         * config/riscv/predicates.md (vector_const_0_operand): New.
3209         * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
3210
3211 2023-08-18  Lehua Ding  <lehua.ding@rivai.ai>
3212
3213         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
3214         Forbidden.
3215
3216 2023-08-17  Andrew MacLeod  <amacleod@redhat.com>
3217
3218         PR tree-optimization/111009
3219         * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
3220
3221 2023-08-17  Vladimir N. Makarov  <vmakarov@redhat.com>
3222
3223         * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
3224         slots_num initialization from here ...
3225         (lra_spill): ... to here before the 1st call of
3226         assign_stack_slot_num_and_sort_pseudos.  Add the 2nd call after
3227         fp->sp elimination.
3228
3229 2023-08-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
3230
3231         PR c/106537
3232         * doc/invoke.texi (Option Summary): Mention
3233         -Wcompare-distinct-pointer-types under `Warning Options'.
3234         (Warning Options): Document -Wcompare-distinct-pointer-types.
3235
3236 2023-08-17  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
3237
3238         * recog.cc (memory_address_addr_space_p): Mark possibly unused
3239         argument as unused.
3240
3241 2023-08-17  Richard Biener  <rguenther@suse.de>
3242
3243         PR tree-optimization/111039
3244         * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
3245         SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
3246
3247 2023-08-17  Alex Coplan  <alex.coplan@arm.com>
3248
3249         * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
3250
3251 2023-08-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
3252
3253         PR target/111046
3254         * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
3255         `naked' function attribute.
3256         (bpf_warn_func_return): New function.
3257         (TARGET_WARN_FUNC_RETURN): Define.
3258         (bpf_expand_prologue): Add preventive comment.
3259         (bpf_expand_epilogue): Likewise.
3260         * doc/extend.texi (BPF Function Attributes): Document the `naked'
3261         function attribute.
3262
3263 2023-08-17  Richard Biener  <rguenther@suse.de>
3264
3265         * tree-vect-slp.cc (vect_slp_check_for_roots): Use
3266         !needs_fold_left_reduction_p to decide whether we can
3267         handle the reduction with association.
3268         (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
3269         reductions perform all arithmetic in an unsigned type.
3270
3271 2023-08-17  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
3272
3273         * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
3274         output.
3275         * configure: Regenerate.
3276
3277 2023-08-17  Pan Li  <pan2.li@intel.com>
3278
3279         * config/riscv/riscv-vector-builtins-bases.cc
3280         (widen_freducop): Add frm_opt_type template arg.
3281         (vfwredosum_frm_obj): New declaration.
3282         (BASE): Ditto.
3283         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3284         * config/riscv/riscv-vector-builtins-functions.def
3285         (vfwredosum_frm): New intrinsic function def.
3286
3287 2023-08-17  Pan Li  <pan2.li@intel.com>
3288
3289         * config/riscv/riscv-vector-builtins-bases.cc
3290         (vfredosum_frm_obj): New declaration.
3291         (BASE): Ditto.
3292         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3293         * config/riscv/riscv-vector-builtins-functions.def
3294         (vfredosum_frm): New intrinsic function def.
3295
3296 2023-08-17  Pan Li  <pan2.li@intel.com>
3297
3298         * config/riscv/riscv-vector-builtins-bases.cc
3299         (class freducop): Add frm_op_type template arg.
3300         (vfredusum_frm_obj): New declaration.
3301         (BASE): Ditto.
3302         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3303         * config/riscv/riscv-vector-builtins-functions.def
3304         (vfredusum_frm): New intrinsic function def.
3305         * config/riscv/riscv-vector-builtins-shapes.cc
3306         (struct reduc_alu_frm_def): New class for frm shape.
3307         (SHAPE): New declaration.
3308         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
3309
3310 2023-08-17  Pan Li  <pan2.li@intel.com>
3311
3312         * config/riscv/riscv-vector-builtins-bases.cc
3313         (class vfncvt_f): Add frm_op_type template arg.
3314         (vfncvt_f_frm_obj): New declaration.
3315         (BASE): Ditto.
3316         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3317         * config/riscv/riscv-vector-builtins-functions.def
3318         (vfncvt_f_frm): New intrinsic function def.
3319
3320 2023-08-17  Pan Li  <pan2.li@intel.com>
3321
3322         * config/riscv/riscv-vector-builtins-bases.cc
3323         (vfncvt_xu_frm_obj): New declaration.
3324         (BASE): Ditto.
3325         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3326         * config/riscv/riscv-vector-builtins-functions.def
3327         (vfncvt_xu_frm): New intrinsic function def.
3328
3329 2023-08-17  Pan Li  <pan2.li@intel.com>
3330
3331         * config/riscv/riscv-vector-builtins-bases.cc
3332         (class vfncvt_x): Add frm_op_type template arg.
3333         (BASE): New declaration.
3334         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3335         * config/riscv/riscv-vector-builtins-functions.def
3336         (vfncvt_x_frm): New intrinsic function def.
3337         * config/riscv/riscv-vector-builtins-shapes.cc
3338         (struct narrow_alu_frm_def): New shape function for frm.
3339         (SHAPE): New declaration.
3340         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
3341
3342 2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
3343
3344         * config/i386/avx512vldqintrin.h: Remove target attribute.
3345         * config/i386/i386-builtin.def (BDESC):
3346         Add OPTION_MASK_ISA2_AVX10_1.
3347         * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
3348         (VFH_AVX512VLDQ_AVX10_1): Ditto.
3349         (VF1_AVX512VLDQ_AVX10_1): Ditto.
3350         (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
3351         Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
3352         (vec_pack<floatprefix>_float_<mode>): Change iterator to
3353         VI8_AVX512VLDQ_AVX10_1. Remove target check.
3354         (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
3355         VF1_AVX512VLDQ_AVX10_1. Remove target check.
3356         (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
3357         (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
3358         (avx512vl_vextractf128<mode>): Change iterator to
3359         VI48F_256_DQVL_AVX10_1. Remove target check.
3360         (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
3361         (vec_extract_hi_<mode>): Ditto.
3362         (avx512vl_vinsert<mode>): Ditto.
3363         (vec_set_lo_<mode><mask_name>): Ditto.
3364         (vec_set_hi_<mode><mask_name>): Ditto.
3365         (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
3366         iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
3367         (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
3368         iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
3369         * config/i386/subst.md (mask_avx512dq_condition): Add
3370         TARGET_AVX10_1.
3371         (mask_scalar_merge): Ditto.
3372
3373 2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
3374
3375         * config/i386/avx512vldqintrin.h: Remove target attribute.
3376         * config/i386/i386-builtin.def (BDESC):
3377         Add OPTION_MASK_ISA2_AVX10_1.
3378         * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
3379         * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
3380         (VI48_AVX512VLDQ_AVX10_1): Ditto.
3381         (VF2_AVX512VL): Remove.
3382         (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
3383         Add TARGET_AVX10_1.
3384         (*<code><mode>3<mask_name>): Change isa attribute to
3385         avx10_1_or_avx512dq. Add TARGET_AVX10_1.
3386         (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
3387         to avx10_1_or_avx512vl.
3388         (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
3389         Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
3390         (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
3391         Add TARGET_AVX10_1.
3392         (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
3393         Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
3394         (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
3395         Add TARGET_AVX10_1.
3396         (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
3397         Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
3398         (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
3399         Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
3400         (float<floatunssuffix>v4div4sf2<mask_name>):
3401         Add TARGET_AVX10_1.
3402         (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
3403         (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
3404         (float<floatunssuffix>v2div2sf2): Ditto.
3405         (float<floatunssuffix>v2div2sf2_mask): Ditto.
3406         (*float<floatunssuffix>v2div2sf2_mask): Ditto.
3407         (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
3408         (<avx512>_cvt<ssemodesuffix>2mask<mode>):
3409         Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
3410         (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
3411         (*<avx512>_cvtmask2<ssemodesuffix><mode>):
3412         Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
3413         Change when constraint is enabled.
3414
3415 2023-08-17  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
3416
3417         PR target/111037
3418         * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
3419         (second_sew_less_than_first_sew_p): Fix bug.
3420         (first_sew_less_than_second_sew_p): Ditto.
3421
3422 2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
3423
3424         * config/i386/avx512vldqintrin.h: Remove target attribute.
3425         * config/i386/i386-builtin.def (BDESC):
3426         Add OPTION_MASK_ISA2_AVX10_1.
3427         * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
3428         * config/i386/i386-expand.cc
3429         (ix86_check_builtin_isa_match): Ditto.
3430         (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
3431         * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
3432         and avx10_1_or_avx512vl.
3433         * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
3434         (VF1_128_256VLDQ_AVX10_1): Ditto.
3435         (VI8_AVX512VLDQ_AVX10_1): Ditto.
3436         (<sse>_andnot<mode>3<mask_name>):
3437         Add TARGET_AVX10_1 and change isa attr from avx512dq to
3438         avx10_1_or_avx512dq.
3439         (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
3440         avx512vl to avx10_1_or_avx512vl.
3441         (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
3442         Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
3443         (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
3444         Ditto.
3445         (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
3446         Ditto.
3447         (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
3448         Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
3449         (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
3450         Add TARGET_AVX10_1.
3451         (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
3452         (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
3453         Remove target check.
3454         (avx512dq_mul<mode>3<mask_name>): Ditto.
3455         (*avx512dq_mul<mode>3<mask_name>): Ditto.
3456         (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
3457         (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
3458         Remove target check.
3459         (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
3460         (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
3461         Remove target check.
3462         * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
3463         (mask_avx512vl_condition): Ditto.
3464         (mask): Ditto.
3465
3466 2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
3467
3468         * common/config/i386/i386-common.cc
3469         (ix86_check_avx10_vector_width): New function to check isa_flags
3470         to emit a warning when there is a conflict in AVX10 options for
3471         vector width.
3472         (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
3473         * config/i386/driver-i386.cc (host_detect_local_cpu):
3474         Do not append -mno-avx10-max-512bit for -march=native.
3475
3476 2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
3477
3478         * common/config/i386/i386-common.cc
3479         (ix86_check_avx10): New function to check isa_flags and
3480         isa_flags_explicit to emit warning when AVX10 is enabled
3481         by "-m" option.
3482         (ix86_check_avx512):  New function to check isa_flags and
3483         isa_flags_explicit to emit warning when AVX512 is enabled
3484         by "-m" option.
3485         (ix86_handle_option): Do not change the flags when warning
3486         is emitted.
3487         * config/i386/driver-i386.cc (host_detect_local_cpu):
3488         Do not append -mno-avx10.1 for -march=native.
3489
3490 2023-08-17  Haochen Jiang  <haochen.jiang@intel.com>
3491
3492         * common/config/i386/cpuinfo.h (get_available_features):
3493         Add avx10_set and version and detect avx10.1.
3494         (cpu_indicator_init): Handle avx10.1-512.
3495         * common/config/i386/i386-common.cc
3496         (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
3497         (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
3498         (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
3499         (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
3500         (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
3501         (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
3502         -mavx10.1-512.
3503         * common/config/i386/i386-cpuinfo.h (enum processor_features):
3504         Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
3505         FEATURE_AVX10_512BIT.
3506         * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
3507         AVX10_512BIT, AVX10_1 and AVX10_1_512.
3508         * config/i386/constraints.md (Yk): Add AVX10_1.
3509         (Yv): Ditto.
3510         (k): Ditto.
3511         * config/i386/cpuid.h (bit_AVX10): New.
3512         (bit_AVX10_256): Ditto.
3513         (bit_AVX10_512): Ditto.
3514         * config/i386/i386-c.cc (ix86_target_macros_internal):
3515         Define AVX10_512BIT and AVX10_1.
3516         * config/i386/i386-isa.def
3517         (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
3518         (AVX10_1): Add DEF_PTA(AVX10_1).
3519         * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
3520         (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
3521         and avx10.1-512.
3522         (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
3523         FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
3524         (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
3525         * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
3526         (ix86_conditional_register_usage): Ditto.
3527         (ix86_hard_regno_mode_ok): Ditto.
3528         (ix86_rtx_costs): Ditto.
3529         * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
3530         * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
3531         -mavx10.1-512.
3532         * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
3533         * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
3534         * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
3535         and avx10.1-512.
3536
3537 2023-08-17  Sergei Trofimovich  <siarheit@google.com>
3538
3539         * flag-types.h (vrp_mode): Remove unused.
3540
3541 2023-08-17  Yanzhang Wang  <yanzhang.wang@intel.com>
3542
3543         * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
3544         CONSTM1_RTX.
3545
3546 2023-08-17  Andrew Pinski  <apinski@marvell.com>
3547
3548         * internal-fn.def (COND_NOT): New internal function.
3549         * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
3550         to the lists.
3551         (`vec (a ? -1 : 0) ^ b`): New pattern to convert
3552         into conditional not.
3553         * optabs.def (cond_one_cmpl): New optab.
3554         (cond_len_one_cmpl): Likewise.
3555
3556 2023-08-16  Surya Kumari Jangala  <jskumari@linux.ibm.com>
3557
3558         PR rtl-optimization/110254
3559         * ira-color.cc (improve_allocation): Update array
3560         allocated_hard_reg_p.
3561
3562 2023-08-16  Vladimir N. Makarov  <vmakarov@redhat.com>
3563
3564         * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
3565         * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
3566         (lra_update_fp2sp_elimination): Ditto.
3567         (update_reg_eliminate): Adjust spill_pseudos call.
3568         * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
3569         in lra_update_fp2sp_elimination.
3570
3571 2023-08-16  Richard Ball  <richard.ball@arm.com>
3572
3573         * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
3574         * config/aarch64/aarch64-tune.md: Regenerate.
3575         * doc/invoke.texi: Document Cortex-A720 CPU.
3576
3577 2023-08-16  Robin Dapp  <rdapp@ventanamicro.com>
3578
3579         * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
3580         Implement expander.
3581         (<u>avg<v_double_trunc>3_ceil): Ditto.
3582         * config/riscv/vector-iterators.md (ashiftrt): New iterator.
3583         (ASHIFTRT): Ditto.
3584
3585 2023-08-16  Robin Dapp  <rdapp@ventanamicro.com>
3586
3587         * internal-fn.cc (vec_extract_direct): Change type argument
3588         numbers.
3589         (expand_vec_extract_optab_fn): Call convert_optab_fn.
3590         (direct_vec_extract_optab_supported_p): Use
3591         convert_optab_supported_p.
3592
3593 2023-08-16  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3594             Richard Sandiford  <richard.sandiford@arm.com>
3595
3596         * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
3597         (valid_mask_for_fold_vec_perm_cst_p): New function.
3598         (fold_vec_perm_cst): Likewise.
3599         (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
3600         (test_fold_vec_perm_cst): New namespace.
3601         (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
3602         (test_fold_vec_perm_cst::validate_res): Likewise.
3603         (test_fold_vec_perm_cst::validate_res_vls): Likewise.
3604         (test_fold_vec_perm_cst::builder_push_elems): Likewise.
3605         (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
3606         (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
3607         (test_fold_vec_perm_cst::test_all_nunits): Likewise.
3608         (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
3609         (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
3610         (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
3611         (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
3612         (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
3613         (test_fold_vec_perm_cst::test): Likewise.
3614         (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
3615
3616 2023-08-16  Pan Li  <pan2.li@intel.com>
3617
3618         * config/riscv/riscv-vector-builtins-bases.cc
3619         (BASE): New declaration.
3620         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3621         * config/riscv/riscv-vector-builtins-functions.def
3622         (vfwcvt_xu_frm): New intrinsic function def.
3623
3624 2023-08-16  Pan Li  <pan2.li@intel.com>
3625
3626         * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
3627
3628 2023-08-16  Pan Li  <pan2.li@intel.com>
3629
3630         * config/riscv/riscv-vector-builtins-bases.cc
3631         (BASE): New declaration.
3632         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3633         * config/riscv/riscv-vector-builtins-functions.def
3634         (vfwcvt_x_frm): New intrinsic function def.
3635
3636 2023-08-16  Pan Li  <pan2.li@intel.com>
3637
3638         * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
3639         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3640         * config/riscv/riscv-vector-builtins-functions.def
3641         (vfcvt_f_frm): New intrinsic function def.
3642
3643 2023-08-16  Pan Li  <pan2.li@intel.com>
3644
3645         * config/riscv/riscv-vector-builtins-bases.cc
3646         (BASE): New declaration.
3647         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3648         * config/riscv/riscv-vector-builtins-functions.def
3649         (vfcvt_xu_frm): New intrinsic function def..
3650
3651 2023-08-16  Haochen Gui  <guihaoc@gcc.gnu.org>
3652
3653         PR target/110429
3654         * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
3655         extract when the element is 7 on BE while 8 on LE for byte or 3 on
3656         BE while 4 on LE for halfword.
3657
3658 2023-08-16  Haochen Gui  <guihaoc@gcc.gnu.org>
3659
3660         PR target/106769
3661         * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
3662         for V8HI and V16QI.
3663         (vsx_extract_v4si): New expand for V4SI extraction.
3664         (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
3665         word 1 from BE order.
3666         (*mfvsrwz): New insn pattern for mfvsrwz.
3667         (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
3668         word 1 from BE order.
3669         (*vsx_extract_si): Remove.
3670         (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
3671         3 from BE order.
3672
3673 2023-08-16  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
3674
3675         * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
3676         New pattern.
3677         (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
3678         * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
3679         * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
3680         (expand_lanes_load_store): New function.
3681         * config/riscv/vector-iterators.md: New iterator.
3682
3683 2023-08-16  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
3684
3685         * internal-fn.cc (internal_load_fn_p): Apply
3686         MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
3687         (internal_store_fn_p): Ditto.
3688         (internal_fn_len_index): Ditto.
3689         (internal_fn_mask_index): Ditto.
3690         (internal_fn_stored_value_index): Ditto.
3691         * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
3692         (vect_load_lanes_supported): Ditto.
3693         * tree-vect-loop.cc: Ditto.
3694         * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
3695         * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
3696         (get_group_load_store_type): Ditto.
3697         (vectorizable_store): Ditto.
3698         (vectorizable_load): Ditto.
3699         * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
3700         (vect_load_lanes_supported): Ditto.
3701
3702 2023-08-16  Pan Li  <pan2.li@intel.com>
3703
3704         * config/riscv/riscv-vector-builtins-bases.cc
3705         (enum frm_op_type): New type for frm.
3706         (BASE): New declaration.
3707         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3708         * config/riscv/riscv-vector-builtins-functions.def
3709         (vfcvt_x_frm): New intrinsic function def.
3710
3711 2023-08-16  liuhongt  <hongtao.liu@intel.com>
3712
3713         * config/i386/i386-builtins.cc
3714         (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
3715         * config/i386/i386-options.cc (parse_mtune_ctrl_str):
3716         Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
3717         8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
3718         * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
3719         for use_scatter_8parts
3720         * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
3721         (TARGET_USE_GATHER_8PARTS): .. this.
3722         (TARGET_USE_SCATTER): Rename to ..
3723         (TARGET_USE_SCATTER_8PARTS): .. this.
3724         * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
3725         (X86_TUNE_USE_GATHER_8PARTS): .. this.
3726         (X86_TUNE_USE_SCATTER): Rename to
3727         (X86_TUNE_USE_SCATTER_8PARTS): .. this.
3728         * config/i386/i386.opt: Add new options mgather, mscatter.
3729
3730 2023-08-16  liuhongt  <hongtao.liu@intel.com>
3731
3732         * config/i386/i386-options.cc (m_GDS): New macro.
3733         * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
3734         enable for m_GDS.
3735         (X86_TUNE_USE_GATHER_4PARTS): Ditto.
3736         (X86_TUNE_USE_GATHER): Ditto.
3737
3738 2023-08-16  liuhongt  <hongtao.liu@intel.com>
3739
3740         * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
3741         vmovsd when moving DFmode between SSE_REGS.
3742         (movhi_internal): Generate vmovdqa instead of vmovsh when
3743         moving HImode between SSE_REGS.
3744         (mov<mode>_internal): Use vmovaps instead of vmovsh when
3745         moving HF/BFmode between SSE_REGS.
3746
3747 2023-08-15  David Faust  <david.faust@oracle.com>
3748
3749         * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
3750
3751 2023-08-15  David Faust  <david.faust@oracle.com>
3752
3753         PR target/111029
3754         * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
3755         for any mode 32-bits or smaller, not just SImode.
3756
3757 2023-08-15  Martin Jambor  <mjambor@suse.cz>
3758
3759         PR ipa/68930
3760         PR ipa/92497
3761         * ipa-prop.h (ipcp_get_aggregate_const): Declare.
3762         * ipa-prop.cc (ipcp_get_aggregate_const): New function.
3763         (ipcp_transform_function): Do not deallocate transformation info.
3764         * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
3765         ipa-prop.h.
3766         (vn_reference_lookup_2): When hitting default-def vuse, query
3767         IPA-CP transformation info for any known constants.
3768
3769 2023-08-15  Chung-Lin Tang  <cltang@codesourcery.com>
3770             Thomas Schwinge  <thomas@codesourcery.com>
3771
3772         * gimplify.cc (oacc_region_type_name): New function.
3773         (oacc_default_clause): If no 'default' clause appears on this
3774         compute construct, see if one appears on a lexically containing
3775         'data' construct.
3776         (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
3777         ctx->oacc_default_clause_ctx to current context.
3778
3779 2023-08-15  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
3780
3781         PR target/110989
3782         * config/riscv/predicates.md: Fix predicate.
3783
3784 2023-08-15  Richard Biener  <rguenther@suse.de>
3785
3786         * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
3787         slp_inst_kind_ctor handling.
3788         (vect_analyze_slp): Simplify.
3789         (vect_build_slp_instance): Dump when we analyze a CTOR.
3790         (vect_slp_check_for_constructors): Rename to ...
3791         (vect_slp_check_for_roots): ... this.  Register a
3792         slp_root for CONSTRUCTORs instead of shoving them to
3793         the set of grouped stores.
3794         (vect_slp_analyze_bb_1): Adjust.
3795
3796 2023-08-15  Richard Biener  <rguenther@suse.de>
3797
3798         * tree-vectorizer.h (_slp_instance::remain_stmts): Change
3799         to ...
3800         (_slp_instance::remain_defs): ... this.
3801         (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
3802         (SLP_INSTANCE_REMAIN_DEFS): ... this.
3803         (slp_root::remain): New.
3804         (slp_root::slp_root): Adjust.
3805         * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
3806         (vect_build_slp_instance): Get extra remain parameter,
3807         adjust former handling of a cut off stmt.
3808         (vect_analyze_slp_instance): Adjust.
3809         (vect_analyze_slp): Likewise.
3810         (_bb_vec_info::~_bb_vec_info): Likewise.
3811         (vectorizable_bb_reduc_epilogue): Dump something if we fail.
3812         (vect_slp_check_for_constructors): Handle non-internal
3813         defs as remain defs of a reduction.
3814         (vectorize_slp_instance_root_stmt): Adjust.
3815
3816 2023-08-15  Richard Biener  <rguenther@suse.de>
3817
3818         * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
3819         (canonicalize_loop_induction_variables): Use find_loop_location.
3820
3821 2023-08-15  Hans-Peter Nilsson  <hp@axis.com>
3822
3823         PR bootstrap/111021
3824         * config/cris/cris-protos.h: Revert recent change.
3825         * config/cris/cris.cc (cris_legitimate_address_p): Remove
3826         code_helper unused parameter.
3827         (cris_legitimate_address_p_hook): New wrapper function.
3828         (TARGET_LEGITIMATE_ADDRESS_P): Change to
3829         cris_legitimate_address_p_hook.
3830
3831 2023-08-15  Richard Biener  <rguenther@suse.de>
3832
3833         PR tree-optimization/110963
3834         * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
3835         a PHI node when the expression is available on all edges
3836         and we insert at most one copy from a constant.
3837
3838 2023-08-15  Richard Biener  <rguenther@suse.de>
3839
3840         PR tree-optimization/110991
3841         * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
3842         VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
3843         that will end up constant.
3844
3845 2023-08-15  Kewen Lin  <linkw@linux.ibm.com>
3846
3847         PR bootstrap/111021
3848         * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
3849
3850 2023-08-15  Kewen Lin  <linkw@linux.ibm.com>
3851
3852         * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
3853         VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
3854         and update the final nest accordingly.
3855
3856 2023-08-15  Kewen Lin  <linkw@linux.ibm.com>
3857
3858         * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
3859         on VMAT_INVARIANT.
3860
3861 2023-08-15  Pan Li  <pan2.li@intel.com>
3862
3863         * mode-switching.cc (create_pre_exit): Add SET insn check.
3864
3865 2023-08-15  Pan Li  <pan2.li@intel.com>
3866
3867         * config/riscv/riscv-vector-builtins-bases.cc
3868         (class vfrec7_frm): New class for frm.
3869         (vfrec7_frm_obj): New declaration.
3870         (BASE): Ditto.
3871         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3872         * config/riscv/riscv-vector-builtins-functions.def
3873         (vfrec7_frm): New intrinsic function definition.
3874         * config/riscv/vector-iterators.md
3875         (VFMISC): Remove VFREC7.
3876         (misc_op): Ditto.
3877         (float_insn_type): Ditto.
3878         (VFMISC_FRM): New int iterator.
3879         (misc_frm_op): New op for frm.
3880         (float_frm_insn_type): New type for frm.
3881         * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
3882         New pattern for misc frm.
3883
3884 2023-08-14  Vladimir N. Makarov  <vmakarov@redhat.com>
3885
3886         * lra-constraints.cc (curr_insn_transform): Process output stack
3887         pointer reloads before emitting reload insns.
3888
3889 2023-08-14  benjamin priour  <vultkayn@gcc.gnu.org>
3890
3891         PR analyzer/110543
3892         * doc/invoke.texi: Add documentation of
3893         fanalyzer-show-events-in-system-headers
3894
3895 2023-08-14  Jan Hubicka  <jh@suse.cz>
3896
3897         PR gcov-profile/110988
3898         * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
3899
3900 2023-08-14  Jiawei  <jiawei@iscas.ac.cn>
3901
3902         * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
3903         Enable compressed builtins when ZC* extensions enabled.
3904         * config/riscv/riscv-shorten-memrefs.cc:
3905         Enable shorten_memrefs pass when ZC* extensions enabled.
3906         * config/riscv/riscv.cc (riscv_compressed_reg_p):
3907         Enable compressible registers when ZC* extensions enabled.
3908         (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
3909         (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
3910         (riscv_first_stack_step): Allow compression of the register saves
3911         without adding extra instructions.
3912         * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
3913         to 16 bits when ZC* extensions enabled.
3914
3915 2023-08-14  Jiawei  <jiawei@iscas.ac.cn>
3916
3917         * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
3918         * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
3919         (MASK_ZCB): Ditto.
3920         (MASK_ZCE): Ditto.
3921         (MASK_ZCF): Ditto.
3922         (MASK_ZCD): Ditto.
3923         (MASK_ZCMP): Ditto.
3924         (MASK_ZCMT): Ditto.
3925         (TARGET_ZCA): New target.
3926         (TARGET_ZCB): Ditto.
3927         (TARGET_ZCE): Ditto.
3928         (TARGET_ZCF): Ditto.
3929         (TARGET_ZCD): Ditto.
3930         (TARGET_ZCMP): Ditto.
3931         (TARGET_ZCMT): Ditto.
3932         * config/riscv/riscv.opt: New target variable.
3933
3934 2023-08-14  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
3935
3936         Revert:
3937         2023-05-17  Jin Ma  <jinma@linux.alibaba.com>
3938
3939         * genrecog.cc (print_nonbool_test): Fix type error of
3940         switch (SUBREG_BYTE (op))'.
3941
3942 2023-08-14  Richard Biener  <rguenther@suse.de>
3943
3944         * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
3945
3946 2023-08-14  Pan Li  <pan2.li@intel.com>
3947
3948         * config/riscv/riscv-vector-builtins-bases.cc
3949         (class unop_frm): New class for frm.
3950         (vfsqrt_frm_obj): New declaration.
3951         (BASE): Ditto.
3952         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3953         * config/riscv/riscv-vector-builtins-functions.def
3954         (vfsqrt_frm): New intrinsic function definition.
3955
3956 2023-08-14  Pan Li  <pan2.li@intel.com>
3957
3958         * config/riscv/riscv-vector-builtins-bases.cc
3959         (class vfwnmsac_frm): New class for frm.
3960         (vfwnmsac_frm_obj): New declaration.
3961         (BASE): Ditto.
3962         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3963         * config/riscv/riscv-vector-builtins-functions.def
3964         (vfwnmsac_frm): New intrinsic function definition.
3965
3966 2023-08-14  Pan Li  <pan2.li@intel.com>
3967
3968         * config/riscv/riscv-vector-builtins-bases.cc
3969         (class vfwmsac_frm): New class for frm.
3970         (vfwmsac_frm_obj): New declaration.
3971         (BASE): Ditto.
3972         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3973         * config/riscv/riscv-vector-builtins-functions.def
3974         (vfwmsac_frm): New intrinsic function definition.
3975
3976 2023-08-14  Pan Li  <pan2.li@intel.com>
3977
3978         * config/riscv/riscv-vector-builtins-bases.cc
3979         (class vfwnmacc_frm): New class for frm.
3980         (vfwnmacc_frm_obj): New declaration.
3981         (BASE): Ditto.
3982         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
3983         * config/riscv/riscv-vector-builtins-functions.def
3984         (vfwnmacc_frm): New intrinsic function definition.
3985
3986 2023-08-14  Cui, Lili  <lili.cui@intel.com>
3987
3988         * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
3989         to Raptorlake.
3990
3991 2023-08-14  Hans-Peter Nilsson  <hp@axis.com>
3992
3993         * config/mmix/predicates.md (mmix_address_operand): Use
3994         lra_in_progress, not reload_in_progress.
3995
3996 2023-08-14  Hans-Peter Nilsson  <hp@axis.com>
3997
3998         * config/mmix/mmix.cc: Re-enable LRA.
3999
4000 2023-08-14  Hans-Peter Nilsson  <hp@axis.com>
4001
4002         * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
4003         when lra_in_progress.
4004
4005 2023-08-14  Hans-Peter Nilsson  <hp@axis.com>
4006
4007         * config/mmix/mmix.cc: Disable LRA for MMIX.
4008
4009 2023-08-14  Pan Li  <pan2.li@intel.com>
4010
4011         * config/riscv/riscv-vector-builtins-bases.cc
4012         (class vfwmacc_frm): New class for vfwmacc frm.
4013         (vfwmacc_frm_obj): New declaration.
4014         (BASE): Ditto.
4015         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4016         * config/riscv/riscv-vector-builtins-functions.def
4017         (vfwmacc_frm): Function definition for vfwmacc.
4018         * config/riscv/riscv-vector-builtins.cc
4019         (function_expander::use_widen_ternop_insn): Add frm support.
4020
4021 2023-08-14  Pan Li  <pan2.li@intel.com>
4022
4023         * config/riscv/riscv-vector-builtins-bases.cc
4024         (class vfnmsub_frm): New class for vfnmsub frm.
4025         (vfnmsub_frm): New declaration.
4026         (BASE): Ditto.
4027         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4028         * config/riscv/riscv-vector-builtins-functions.def
4029         (vfnmsub_frm): New function declaration.
4030
4031 2023-08-14  Vladimir N. Makarov  <vmakarov@redhat.com>
4032
4033         * lra-constraints.cc (curr_insn_transform): Set done_p up and
4034         check it on true after processing output stack pointer reload.
4035
4036 2023-08-12  Jakub Jelinek  <jakub@redhat.com>
4037
4038         * Makefile.in (USER_H): Add stdckdint.h.
4039         * ginclude/stdckdint.h: New file.
4040
4041 2023-08-12  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4042
4043         PR target/110994
4044         * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
4045
4046 2023-08-12  Patrick Palka  <ppalka@redhat.com>
4047
4048         * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
4049         Delimit output with braces.
4050
4051 2023-08-12  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4052
4053         PR target/110985
4054         * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
4055
4056 2023-08-12  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4057
4058         * config/riscv/autovec.md: Add VLS CONST_VECTOR.
4059         * config/riscv/riscv.cc (riscv_const_insns): Ditto.
4060         * config/riscv/vector.md: Ditto.
4061
4062 2023-08-11  David Malcolm  <dmalcolm@redhat.com>
4063
4064         PR analyzer/105899
4065         * doc/analyzer.texi (__analyzer_get_strlen): New.
4066         * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
4067
4068 2023-08-11  Jeff Law  <jlaw@ventanamicro.com>
4069
4070         * config/rx/rx.md (subdi3): Fix test for borrow.
4071
4072 2023-08-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4073
4074         PR middle-end/110989
4075         * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
4076         (vectorizable_load): Ditto.
4077
4078 2023-08-11  Jose E. Marchesi  <jose.marchesi@oracle.com>
4079
4080         * config/bpf/bpf.md (allocate_stack): Define.
4081         * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
4082         stack pointer register.
4083         (FIXED_REGISTERS): Adjust accordingly.
4084         (CALL_USED_REGISTERS): Likewise.
4085         (REG_CLASS_CONTENTS): Likewise.
4086         (REGISTER_NAMES): Likewise.
4087         * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
4088         space for callee-saved registers.
4089         (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
4090         (bpf_expand_epilogue): Do not restore callee-saved registers in
4091         xbpf.
4092
4093 2023-08-11  Jose E. Marchesi  <jose.marchesi@oracle.com>
4094
4095         * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
4096         about too many arguments if function is always inlined.
4097
4098 2023-08-11  Patrick Palka  <ppalka@redhat.com>
4099
4100         * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
4101         Don't call component_ref_field_offset if the RHS isn't a decl.
4102
4103 2023-08-11  John David Anglin  <danglin@gcc.gnu.org>
4104
4105         PR bootstrap/110646
4106         * gensupport.cc(class conlist): Use strtol instead of std::stoi.
4107
4108 2023-08-11  Vladimir N. Makarov  <vmakarov@redhat.com>
4109
4110         * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
4111         (process_alt_operands): Set the flag.
4112         (curr_insn_transform): Modify stack pointer offsets if output
4113         stack pointer reload is generated.
4114
4115 2023-08-11  Joseph Myers  <joseph@codesourcery.com>
4116
4117         * configure: Regenerate.
4118
4119 2023-08-11  Richard Biener  <rguenther@suse.de>
4120
4121         PR tree-optimization/110979
4122         * tree-vect-loop.cc (vectorizable_reduction): For
4123         FOLD_LEFT_REDUCTION without target support make sure
4124         we don't need to honor signed zeros and sign dependent rounding.
4125
4126 2023-08-11  Richard Biener  <rguenther@suse.de>
4127
4128         * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
4129         subgraph entries.  Dump the used vector size based on the
4130         SLP subgraph entry root vector type.
4131
4132 2023-08-11  Pan Li  <pan2.li@intel.com>
4133
4134         * config/riscv/riscv-vector-builtins-bases.cc
4135         (class vfmsub_frm): New class for vfmsub frm.
4136         (vfmsub_frm): New declaration.
4137         (BASE): Ditto.
4138         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4139         * config/riscv/riscv-vector-builtins-functions.def
4140         (vfmsub_frm): New function declaration.
4141
4142 2023-08-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4143
4144         * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
4145         * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
4146         (expand_partial_store_optab_fn): Ditto.
4147         * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
4148         (MASK_LEN_STORE_LANES): Ditto.
4149         * optabs.def (OPTAB_CD): Ditto.
4150
4151 2023-08-11  Pan Li  <pan2.li@intel.com>
4152
4153         * config/riscv/riscv-vector-builtins-bases.cc
4154         (class vfnmadd_frm): New class for vfnmadd frm.
4155         (vfnmadd_frm): New declaration.
4156         (BASE): Ditto.
4157         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4158         * config/riscv/riscv-vector-builtins-functions.def
4159         (vfnmadd_frm): New function declaration.
4160
4161 2023-08-11  Drew Ross  <drross@redhat.com>
4162             Jakub Jelinek  <jakub@redhat.com>
4163
4164         PR tree-optimization/109938
4165         * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
4166
4167 2023-08-11  Pan Li  <pan2.li@intel.com>
4168
4169         * config/riscv/riscv-vector-builtins-bases.cc
4170         (class vfmadd_frm): New class for vfmadd frm.
4171         (vfmadd_frm_obj): New declaration.
4172         (BASE): Ditto.
4173         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4174         * config/riscv/riscv-vector-builtins-functions.def
4175         (vfmadd_frm): New function definition.
4176
4177 2023-08-11  Pan Li  <pan2.li@intel.com>
4178
4179         * config/riscv/riscv-vector-builtins-bases.cc
4180         (class vfnmsac_frm): New class for vfnmsac frm.
4181         (vfnmsac_frm_obj): New declaration.
4182         (BASE): Ditto.
4183         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4184         * config/riscv/riscv-vector-builtins-functions.def
4185         (vfnmsac_frm): New function definition.
4186
4187 2023-08-11  Jakub Jelinek  <jakub@redhat.com>
4188
4189         * doc/extend.texi (Typeof): Document typeof_unqual
4190         and __typeof_unqual__.
4191
4192 2023-08-11  Andrew Pinski  <apinski@marvell.com>
4193
4194         PR tree-optimization/110954
4195         * generic-match-head.cc (bitwise_inverted_equal_p): Add
4196         wascmp argument and set it accordingly.
4197         * gimple-match-head.cc (bitwise_inverted_equal_p): Add
4198         wascmp argument to the macro.
4199         (gimple_bitwise_inverted_equal_p): Add
4200         wascmp argument and set it accordingly.
4201         * match.pd (`a & ~a`, `a ^| ~a`): Update call
4202         to bitwise_inverted_equal_p and handle wascmp case.
4203         (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
4204         call to bitwise_inverted_equal_p and check to see
4205         if was !wascmp or if precision was 1.
4206
4207 2023-08-11  Martin Uecker  <uecker@tugraz.at>
4208
4209         PR c/84510
4210         * doc/invoke.texi: Update.
4211
4212 2023-08-11  Pan Li  <pan2.li@intel.com>
4213
4214         * config/riscv/riscv-vector-builtins-bases.cc
4215         (class vfmsac_frm): New class for vfmsac frm.
4216         (vfmsac_frm_obj): New declaration.
4217         (BASE): Ditto.
4218         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4219         * config/riscv/riscv-vector-builtins-functions.def
4220         (vfmsac_frm): New function definition
4221
4222 2023-08-10  Jan Hubicka  <jh@suse.cz>
4223
4224         PR middle-end/110923
4225         * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
4226
4227 2023-08-10  Patrick O'Neill  <patrick@rivosinc.com>
4228
4229         * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
4230         dependent on 'a' extension.
4231         * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
4232         (TARGET_ZTSO): New target.
4233         * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
4234         Ztso case.
4235         (riscv_memmodel_needs_amo_release): Add Ztso case.
4236         (riscv_print_operand): Add Ztso case for LR/SC annotations.
4237         * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
4238         * config/riscv/riscv.opt: Add Ztso target variable.
4239         * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
4240         Ztso specific insn.
4241         (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
4242         (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
4243         * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
4244         specific load/store/fence mappings.
4245         * config/riscv/sync-ztso.md: New file. Seperate out Ztso
4246         specific load/store/fence mappings.
4247
4248 2023-08-10  Jan Hubicka  <jh@suse.cz>
4249
4250         * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
4251         0 iteration count.
4252
4253 2023-08-10  Jan Hubicka  <jh@suse.cz>
4254
4255         * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
4256
4257 2023-08-10  Jan Hubicka  <jh@suse.cz>
4258
4259         * profile-count.cc (profile_count::differs_from_p): Fix overflow and
4260         handling of undefined values.
4261
4262 2023-08-10  Jakub Jelinek  <jakub@redhat.com>
4263
4264         PR c/102989
4265         * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
4266         return virtual phis and return NULL if there is a virtual phi
4267         where the arguments from E0 and E1 edges aren't equal.
4268
4269 2023-08-10  Richard Biener  <rguenther@suse.de>
4270
4271         * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
4272         VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
4273
4274 2023-08-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4275
4276         PR target/110962
4277         * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
4278
4279 2023-08-10  Pan Li  <pan2.li@intel.com>
4280
4281         * config/riscv/riscv-vector-builtins-bases.cc
4282         (class vfnmacc_frm): New class for vfnmacc.
4283         (vfnmacc_frm_obj): New declaration.
4284         (BASE): Ditto.
4285         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4286         * config/riscv/riscv-vector-builtins-functions.def
4287         (vfnmacc_frm): New function definition.
4288
4289 2023-08-10  Pan Li  <pan2.li@intel.com>
4290
4291         * config/riscv/riscv-vector-builtins-bases.cc
4292         (class vfmacc_frm): New class for vfmacc frm.
4293         (vfmacc_frm_obj): New declaration.
4294         (BASE): Ditto.
4295         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4296         * config/riscv/riscv-vector-builtins-functions.def
4297         (vfmacc_frm): New function definition.
4298
4299 2023-08-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4300
4301         PR target/110964
4302         * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
4303
4304 2023-08-10  Richard Biener  <rguenther@suse.de>
4305
4306         * tree-vectorizer.h (vectorizable_live_operation): Remove
4307         gimple_stmt_iterator * argument.
4308         * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
4309         Adjust plumbing around vect_get_loop_mask.
4310         (vect_analyze_loop_operations): Adjust.
4311         * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
4312         (vect_bb_slp_mark_live_stmts): Likewise.
4313         (vect_schedule_slp_node): Likewise.
4314         * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
4315         Remove gimple_stmt_iterator * argument.
4316         (vect_transform_stmt): Adjust.
4317
4318 2023-08-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4319
4320         * config/riscv/vector-iterators.md: Add missing modes.
4321
4322 2023-08-10  Jakub Jelinek  <jakub@redhat.com>
4323
4324         PR c/102989
4325         * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
4326         is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
4327
4328 2023-08-10  Jakub Jelinek  <jakub@redhat.com>
4329
4330         PR c/102989
4331         * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
4332         EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
4333         times.
4334
4335 2023-08-10  liuhongt  <hongtao.liu@intel.com>
4336
4337         PR target/110832
4338         * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
4339         sanitize upper part of V4HFmode register with
4340         -fno-trapping-math.
4341         (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
4342         (<divv4hf3): Ditto.
4343         (<insn>v2hf3): Ditto.
4344         (divv2hf3): Ditto.
4345         (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
4346         register with -fno-trapping-math.
4347
4348 2023-08-10  Pan Li  <pan2.li@intel.com>
4349             Kito Cheng  <kito.cheng@sifive.com>
4350
4351         * config/riscv/riscv-protos.h
4352         (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
4353         (get_frm_mode): New declaration.
4354         * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
4355         * config/riscv/riscv-vector-builtins.cc
4356         (function_expander::use_ternop_insn): Take care of frm reg.
4357         * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
4358         (riscv_emit_frm_mode_set): Ditto.
4359         (riscv_emit_mode_set): Ditto.
4360         (riscv_frm_adjust_mode_after_call): Ditto.
4361         (riscv_frm_mode_needed): Ditto.
4362         (riscv_frm_mode_after): Ditto.
4363         (riscv_mode_entry): Ditto.
4364         (riscv_mode_exit): Ditto.
4365         * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
4366         * config/riscv/vector.md
4367         (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
4368         (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
4369
4370 2023-08-09  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4371
4372         * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
4373         incorrect anticipate info.
4374
4375 2023-08-09  Tsukasa OI  <research_trasio@irq.a4lg.com>
4376
4377         * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
4378         Remove 'Zve32d' from the version list.
4379
4380 2023-08-09  Jin Ma  <jinma@linux.alibaba.com>
4381
4382         * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
4383         (TARGET_SCHED_VARIABLE_ISSUE): New macro.
4384         Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
4385         Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
4386
4387 2023-08-09  Jivan Hakobyan  <jivanhakobyan9@gmail.com>
4388
4389         * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
4390         (mem_shadd_or_shadd_rtx_p): New function.
4391
4392 2023-08-09  Andrew Pinski  <apinski@marvell.com>
4393
4394         PR tree-optimization/110937
4395         PR tree-optimization/100798
4396         * match.pd (`a ? ~b : b`): Handle this
4397         case.
4398
4399 2023-08-09  Uros Bizjak  <ubizjak@gmail.com>
4400
4401         * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
4402
4403 2023-08-09  Richard Ball  <richard.ball@arm.com>
4404
4405         * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
4406         * config/aarch64/aarch64-tune.md: Regenerate.
4407         * doc/invoke.texi: Document Cortex-A520 CPU.
4408
4409 2023-08-09  Carl Love  <cel@us.ibm.com>
4410
4411         * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
4412         Move definitions to Altivec stanza.
4413         * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
4414         define_expand.
4415
4416 2023-08-09  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4417
4418         PR target/110950
4419         * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
4420         stepped vector support.
4421
4422 2023-08-09  liuhongt  <hongtao.liu@intel.com>
4423
4424         * common/config/i386/cpuinfo.h (get_available_features):
4425         Rename local variable subleaf_level to max_subleaf_level.
4426
4427 2023-08-09  Richard Biener  <rguenther@suse.de>
4428
4429         PR rtl-optimization/110587
4430         * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
4431
4432 2023-08-09  Kewen Lin  <linkw@linux.ibm.com>
4433
4434         PR tree-optimization/110248
4435         * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
4436         the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
4437         legitimate when outer code is PLUS.
4438
4439 2023-08-09  Kewen Lin  <linkw@linux.ibm.com>
4440
4441         PR tree-optimization/110248
4442         * recog.cc (memory_address_addr_space_p): Add one more argument ch of
4443         type code_helper and pass it to targetm.addr_space.legitimate_address_p
4444         instead of ERROR_MARK.
4445         (offsettable_address_addr_space_p): Update one function pointer with
4446         one more argument of type code_helper as its assignees
4447         memory_address_addr_space_p and strict_memory_address_addr_space_p
4448         have been adjusted, and adjust some call sites with ERROR_MARK.
4449         * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
4450         (memory_address_addr_space_p): Adjust with one more unnamed argument
4451         of type code_helper with default ERROR_MARK.
4452         (strict_memory_address_addr_space_p): Likewise.
4453         * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
4454         argument of type code_helper.
4455         * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
4456         type code_helper and pass it to memory_address_addr_space_p.
4457         * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
4458         one more unnamed argument of type code_helper with default value
4459         ERROR_MARK.
4460         * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
4461         by default, change it with ifn code for USE_PTR_ADDRESS type use, and
4462         pass it to all valid_mem_ref_p calls.
4463
4464 2023-08-09  Kewen Lin  <linkw@linux.ibm.com>
4465
4466         PR tree-optimization/110248
4467         * coretypes.h (class code_helper): Add forward declaration.
4468         * doc/tm.texi: Regenerate.
4469         * lra-constraints.cc (valid_address_p): Call target hook
4470         targetm.addr_space.legitimate_address_p with an extra parameter
4471         ERROR_MARK as its prototype changes.
4472         * recog.cc (memory_address_addr_space_p): Likewise.
4473         * reload.cc (strict_memory_address_addr_space_p): Likewise.
4474         * target.def (legitimate_address_p, addr_space.legitimate_address_p):
4475         Extend with one more argument of type code_helper, update the
4476         documentation accordingly.
4477         * targhooks.cc (default_legitimate_address_p): Adjust for the
4478         new code_helper argument.
4479         (default_addr_space_legitimate_address_p): Likewise.
4480         * targhooks.h (default_legitimate_address_p): Likewise.
4481         (default_addr_space_legitimate_address_p): Likewise.
4482         * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
4483         with extra unnamed code_helper argument with default ERROR_MARK.
4484         * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
4485         * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
4486         * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
4487         (tree.h): New include for tree_code ERROR_MARK.
4488         * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
4489         unnamed code_helper argument with default ERROR_MARK.
4490         * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
4491         * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
4492         * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
4493         * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
4494         * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
4495         (tree.h): New include for tree_code ERROR_MARK.
4496         * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
4497         unnamed code_helper argument with default ERROR_MARK.
4498         * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
4499         * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
4500         Likewise.
4501         * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
4502         * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
4503         * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
4504         * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
4505         * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
4506         * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
4507         * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
4508         * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
4509         * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
4510         Likewise.
4511         * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
4512         (m32c_addr_space_legitimate_address_p): Likewise.
4513         * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
4514         * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
4515         * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
4516         * config/microblaze/microblaze-protos.h (tree.h): New include for
4517         tree_code ERROR_MARK.
4518         (microblaze_legitimate_address_p): Adjust with extra unnamed
4519         code_helper argument with default ERROR_MARK.
4520         * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
4521         Likewise.
4522         * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
4523         * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
4524         * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
4525         * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
4526         * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
4527         (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
4528         argument with default ERROR_MARK and adjust the call to function
4529         msp430_legitimate_address_p.
4530         * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
4531         unnamed code_helper argument with default ERROR_MARK.
4532         * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
4533         * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
4534         * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
4535         * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
4536         * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
4537         * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
4538         * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
4539         * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
4540         (tree.h): New include for tree_code ERROR_MARK.
4541         * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
4542         extra unnamed code_helper argument with default ERROR_MARK.
4543         * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
4544         (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
4545         argument and adjust the call to function rs6000_legitimate_address_p.
4546         * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
4547         unnamed code_helper argument with default ERROR_MARK.
4548         * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
4549         * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
4550         * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
4551         * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
4552         * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
4553         * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
4554         * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
4555         * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
4556         Likewise.
4557         (tree.h): New include for tree_code ERROR_MARK.
4558         * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
4559         Adjust with extra unnamed code_helper argument with default
4560         ERROR_MARK.
4561
4562 2023-08-09  liuhongt  <hongtao.liu@intel.com>
4563
4564         * common/config/i386/cpuinfo.h (get_available_features): Check
4565         EAX for valid subleaf before use CPUID.
4566
4567 2023-08-08  Jeff Law  <jlaw@ventanamicro.com>
4568
4569         * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
4570         for the temporary when canonicalizing the condition.
4571
4572 2023-08-08  Cupertino Miranda  <cupertino.miranda@oracle.com>
4573
4574         * config/bpf/core-builtins.cc: Cleaned include headers.
4575         (struct cr_builtins): Added GTY.
4576         (cr_builtins_ref): Created.
4577         (builtins_data) Changed to GC root.
4578         (allocate_builtin_data): Changed.
4579         Included gt-core-builtins.h.
4580         * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
4581         (bpf_core_extra_ref): Created.
4582         (bpf_comment_info): Changed to GC root.
4583         (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
4584
4585 2023-08-08  Uros Bizjak  <ubizjak@gmail.com>
4586
4587         PR target/110832
4588         * config/i386/i386.opt (mpartial-vector-fp-math): New option.
4589         * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
4590         upper part of V2SFmode register with -fno-trapping-math.
4591         (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
4592         (divv2sf3): Ditto.
4593         (<smaxmin:code>v2sf3): Ditto.
4594         (sqrtv2sf2): Ditto.
4595         (*mmx_haddv2sf3_low): Ditto.
4596         (*mmx_hsubv2sf3_low): Ditto.
4597         (vec_addsubv2sf3): Ditto.
4598         (vec_cmpv2sfv2si): Ditto.
4599         (vcond<V2FI:mode>v2sf): Ditto.
4600         (fmav2sf4): Ditto.
4601         (fmsv2sf4): Ditto.
4602         (fnmav2sf4): Ditto.
4603         (fnmsv2sf4): Ditto.
4604         (fix_truncv2sfv2si2): Ditto.
4605         (fixuns_truncv2sfv2si2): Ditto.
4606         (floatv2siv2sf2): Ditto.
4607         (floatunsv2siv2sf2): Ditto.
4608         (nearbyintv2sf2): Ditto.
4609         (rintv2sf2): Ditto.
4610         (lrintv2sfv2si2): Ditto.
4611         (ceilv2sf2): Ditto.
4612         (lceilv2sfv2si2): Ditto.
4613         (floorv2sf2): Ditto.
4614         (lfloorv2sfv2si2): Ditto.
4615         (btruncv2sf2): Ditto.
4616         (roundv2sf2): Ditto.
4617         (lroundv2sfv2si2): Ditto.
4618         * doc/invoke.texi (x86 Options): Document
4619         -mpartial-vector-fp-math option.
4620
4621 2023-08-08  Andrew Pinski  <apinski@marvell.com>
4622
4623         PR tree-optimization/103281
4624         PR tree-optimization/28794
4625         * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
4626         majority to ...
4627         (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
4628         (simplify_using_ranges::simplify_casted_cond): Rename to ...
4629         (simplify_using_ranges::simplify_casted_compare): This
4630         and change arguments to take op0 and op1.
4631         (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
4632         (simplify_using_ranges::simplify): For tcc_comparison assignments call
4633         simplify_compare_assign_using_ranges_1.
4634         * vr-values.h (simplify_using_ranges): Add
4635         new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
4636         Rename simplify_casted_cond and simplify_casted_compare and
4637         update argument types.
4638
4639 2023-08-08  Andrzej Turko  <andrzej.turko@gmail.com>
4640
4641         * genmatch.cc: Log line numbers indirectly.
4642
4643 2023-08-08  Andrzej Turko  <andrzej.turko@gmail.com>
4644
4645         * genmatch.cc: Make sinfo map ordered.
4646         * Makefile.in: Require the ordered map header for genmatch.o.
4647
4648 2023-08-08  Andrzej Turko  <andrzej.turko@gmail.com>
4649
4650         * ordered-hash-map.h: Add get_or_insert.
4651         * ordered-hash-map-tests.cc: Use get_or_insert in tests.
4652
4653 2023-08-08  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4654
4655         * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
4656         (cond_len_<optab><mode>): Ditto.
4657         (cond_fma<mode>): Ditto.
4658         (cond_len_fma<mode>): Ditto.
4659         (cond_fnma<mode>): Ditto.
4660         (cond_len_fnma<mode>): Ditto.
4661         (cond_fms<mode>): Ditto.
4662         (cond_len_fms<mode>): Ditto.
4663         (cond_fnms<mode>): Ditto.
4664         (cond_len_fnms<mode>): Ditto.
4665         * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
4666         global.
4667         (enum insn_type): Add new enum type.
4668         (prepare_ternary_operands): New function.
4669         * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
4670         (emit_nonvlmax_tumu_insn): Ditto.
4671         (emit_nonvlmax_fp_tumu_insn): Ditto.
4672         (expand_cond_len_binop): Add condtional operations.
4673         (expand_cond_len_ternop): Ditto.
4674         (prepare_ternary_operands): New function.
4675         * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
4676         riscv_get_v_regno_alignment as global scope.
4677         * config/riscv/vector.md: Fix ternary bugs.
4678
4679 2023-08-08  Richard Biener  <rguenther@suse.de>
4680
4681         PR tree-optimization/49955
4682         * tree-vectorizer.h (_slp_instance::remain_stmts): New.
4683         (SLP_INSTANCE_REMAIN_STMTS): Likewise.
4684         * tree-vect-slp.cc (vect_free_slp_instance): Release
4685         SLP_INSTANCE_REMAIN_STMTS.
4686         (vect_build_slp_instance): Make the number of lanes of
4687         a BB reduction even.
4688         (vectorize_slp_instance_root_stmt): Handle unvectorized
4689         defs of a BB reduction.
4690
4691 2023-08-08  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
4692
4693         * internal-fn.cc (get_len_internal_fn): New function.
4694         (DEF_INTERNAL_COND_FN): Ditto.
4695         (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
4696         * internal-fn.h (get_len_internal_fn): Ditto.
4697         * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
4698
4699 2023-08-08  Richard Biener  <rguenther@suse.de>
4700
4701         PR tree-optimization/110924
4702         * tree-ssa-live.h (virtual_operand_live): Update comment.
4703         * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
4704         optimization, look at each predecessor.
4705         * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
4706
4707 2023-08-08  yulong  <shiyulong@iscas.ac.cn>
4708
4709         * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
4710
4711 2023-08-08  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4712
4713         * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
4714         * config/riscv/vector.md: Ditto.
4715
4716 2023-08-08  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4717
4718         * config/riscv/autovec.md: Add VLS shift.
4719
4720 2023-08-07  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4721
4722         * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
4723         * config/riscv/vector-iterators.md: Ditto.
4724         * config/riscv/vector.md: Ditto.
4725
4726 2023-08-07  Jonathan Wakely  <jwakely@redhat.com>
4727
4728         * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
4729
4730 2023-08-07  Nick Alcock  <nick.alcock@oracle.com>
4731
4732         * configure: Regenerate.
4733
4734 2023-08-07  John Ericson  <git@JohnEricson.me>
4735
4736         * configure: Regenerate.
4737
4738 2023-08-07  Alan Modra  <amodra@gmail.com>
4739
4740         * configure: Regenerate.
4741
4742 2023-08-07  Alexander von Gluck IV  <kallisti5@unixzen.com>
4743
4744         * configure: Regenerate.
4745
4746 2023-08-07  Nick Alcock  <nick.alcock@oracle.com>
4747
4748         * configure: Regenerate.
4749
4750 2023-08-07  Nick Alcock  <nick.alcock@oracle.com>
4751
4752         * configure: Regenerate.
4753
4754 2023-08-07  H.J. Lu  <hjl.tools@gmail.com>
4755
4756         * configure: Regenerate.
4757
4758 2023-08-07  H.J. Lu  <hjl.tools@gmail.com>
4759
4760         * configure: Regenerate.
4761
4762 2023-08-07  Jeff Law  <jlaw@ventanamicro.com>
4763
4764         * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
4765         VOIDmode operands to conditional before canonicalization.
4766
4767 2023-08-07  Manolis Tsamis  <manolis.tsamis@vrull.eu>
4768
4769         * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
4770         (find_oldest_value_reg): Inline stack_pointer_rtx check.
4771         (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
4772
4773 2023-08-07  Martin Jambor  <mjambor@suse.cz>
4774
4775         PR ipa/110378
4776         * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
4777         members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
4778         * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
4779         (ptr_parm_has_nonarg_uses): Likewise.
4780         * ipa-param-manipulation.cc
4781         (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
4782         (ipa_param_body_adjustments::mark_dead_statements): Move initial
4783         checks to get_ddef_if_exists_and_is_used.
4784         (ipa_param_body_adjustments::mark_clobbers_dead): New.
4785         (ipa_param_body_adjustments::common_initialization): Call
4786         mark_clobbers_dead when splitting.
4787
4788 2023-08-07  Raphael Zinsly  <rzinsly@ventanamicro.com>
4789
4790         * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
4791         as an argument and pass it to riscv_emit_int_order_test.
4792         (riscv_expand_conditional_move): Handle cases where the condition
4793         is not EQ/NE or the second argument to the conditional is not
4794         (const_int 0).
4795         * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
4796         Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
4797
4798 2023-08-07  Andrew Pinski  <apinski@marvell.com>
4799
4800         PR tree-optimization/109959
4801         * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
4802         New patterns.
4803
4804 2023-08-07  Richard Biener  <rguenther@suse.de>
4805
4806         * tree-ssa-sink.cc (pass_sink_code::execute): Do not
4807         calculate post-dominators.  Calculate RPO on the inverted
4808         graph and process blocks in that order.
4809
4810 2023-08-07  liuhongt  <hongtao.liu@intel.com>
4811
4812         PR target/110926
4813         * config/i386/i386-protos.h
4814         (vpternlog_redundant_operand_mask): Adjust parameter type.
4815         * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
4816         INTVAL instead of XINT, also adjust parameter type from rtx*
4817         to rtx since the function only needs operands[4] in vpternlog
4818         pattern.
4819         (substitute_vpternlog_operands): Pass operands[4] instead of
4820         operands to vpternlog_redundant_operand_mask.
4821         * config/i386/sse.md: Ditto.
4822
4823 2023-08-07  Richard Biener  <rguenther@suse.de>
4824
4825         * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
4826         around dumping code.
4827
4828 2023-08-07  liuhongt  <hongtao.liu@intel.com>
4829
4830         PR target/110762
4831         * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
4832         to define_expand and break into ..
4833         (<insn>v4hf3): .. this.
4834         (divv4hf3): .. this.
4835         (<insn>v2hf3): .. this.
4836         (divv2hf3): .. this.
4837         (movd_v2hf_to_sse): New define_expand.
4838         (movq_<mode>_to_sse): Extend to V4HFmode.
4839         (mmxdoublevecmode): Ditto.
4840         (V2FI_V4HF): New mode iterator.
4841         * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
4842         by using mode iterator V4SF_V8HF, renamed to ..
4843         (*vec_concat<mode>): .. this.
4844         (*vec_concatv4sf_0): Extend to handle V8HF by using mode
4845         iterator V4SF_V8HF, renamed to ..
4846         (*vec_concat<mode>_0): .. this.
4847         (*vec_concatv8hf_movss): New define_insn.
4848         (V4SF_V8HF): New mode iterator.
4849
4850 2023-08-07  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
4851
4852         * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
4853
4854 2023-08-07  Jan Beulich  <jbeulich@suse.com>
4855
4856         * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
4857         (*mmx_pinsrb): Likewise.
4858         (*mmx_pextrb): Likewise.
4859         (*mmx_pextrb_zext): Likewise.
4860         (mmx_pshufbv8qi3): Likewise.
4861         (mmx_pshufbv4qi3): Likewise.
4862         (mmx_pswapdv2si2): Likewise.
4863         (*pinsrb): Likewise.
4864         (*pextrb): Likewise.
4865         (*pextrb_zext): Likewise.
4866         * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
4867         (*sse2_eq<mode>3): Likewise.
4868         (*sse2_gt<mode>3): Likewise.
4869         (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
4870         (*vec_extract<mode>): Likewise.
4871         (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
4872         (*vec_extractv16qi_zext): Likewise.
4873         (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
4874         (ssse3_pmaddubsw128): Likewise.
4875         (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
4876         (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
4877         (<ssse3_avx2>_psign<mode>3): Likewise.
4878         (<ssse3_avx2>_palignr<mode>): Likewise.
4879         (*abs<mode>2): Likewise.
4880         (sse4_2_pcmpestr): Likewise.
4881         (sse4_2_pcmpestri): Likewise.
4882         (sse4_2_pcmpestrm): Likewise.
4883         (sse4_2_pcmpestr_cconly): Likewise.
4884         (sse4_2_pcmpistr): Likewise.
4885         (sse4_2_pcmpistri): Likewise.
4886         (sse4_2_pcmpistrm): Likewise.
4887         (sse4_2_pcmpistr_cconly): Likewise.
4888         (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
4889         (vgf2p8affineqb_<mode><mask_name>): Likewise.
4890         (vgf2p8mulb_<mode><mask_name>): Likewise.
4891         (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
4892         "prefix_extra".
4893         (*<code>v16qi3 [umaxmin]): Likewise.
4894
4895 2023-08-07  Jan Beulich  <jbeulich@suse.com>
4896
4897         * config/i386/i386.md (sse4_1_round<mode>2): Make
4898         "length_immediate" uniformly 1.
4899         * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
4900         (mmx_pblendvb_<mode>): Likewise.
4901
4902 2023-08-07  Jan Beulich  <jbeulich@suse.com>
4903
4904         * config/i386/sse.md
4905         (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
4906         "prefix" attribute.
4907         (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
4908         Likewise.
4909
4910 2023-08-07  Jan Beulich  <jbeulich@suse.com>
4911
4912         * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
4913         "prefix_extra", and "mode" attributes.
4914         (xop_phadd<u>bd): Likewise.
4915         (xop_phadd<u>bq): Likewise.
4916         (xop_phadd<u>wd): Likewise.
4917         (xop_phadd<u>wq): Likewise.
4918         (xop_phadd<u>dq): Likewise.
4919         (xop_phsubbw): Likewise.
4920         (xop_phsubwd): Likewise.
4921         (xop_phsubdq): Likewise.
4922         (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
4923         (xop_rotr<mode>3): Likewise.
4924         (xop_frcz<mode>2): Likewise.
4925         (*xop_vmfrcz<mode>2): Likewise.
4926         (xop_vrotl<mode>3): Add "prefix" attribute. Change
4927         "prefix_extra" to 1.
4928         (xop_sha<mode>3): Likewise.
4929         (xop_shl<mode>3): Likewise.
4930
4931 2023-08-07  Jan Beulich  <jbeulich@suse.com>
4932
4933         * config/i386/sse.md
4934         (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
4935         "prefix_extra".
4936         (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
4937         (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
4938         (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
4939         (*avx512f_vextract<shuffletype>32x4_1): Likewise.
4940         (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
4941         (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
4942         (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
4943         (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
4944         (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
4945         (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
4946         (vec_extract_lo_v64qi): Likewise.
4947         (vec_extract_hi_v64qi): Likewise.
4948         (*vec_widen_umult_even_v16si<mask_name>): Likewise.
4949         (*vec_widen_smult_even_v16si<mask_name>): Likewise.
4950         (*avx512f_<code><mode>3<mask_name>): Likewise.
4951         (*vec_extractv4ti): Likewise.
4952         (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
4953         (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
4954         Add "length_immediate".
4955
4956 2023-08-07  Jan Beulich  <jbeulich@suse.com>
4957
4958         * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
4959         "prefix_extra".
4960         (@rdseed<mode>): Likewise.
4961         * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
4962         Adjust "prefix_extra".
4963         * config/i386/sse.md (@vec_set<mode>_0): Likewise.
4964         (*sse4_1_<code><mode>3<mask_name>): Likewise.
4965         (*avx2_eq<mode>3): Likewise.
4966         (avx2_gt<mode>3): Likewise.
4967         (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
4968         (*vec_extract<mode>): Likewise.
4969         (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
4970
4971 2023-08-07  Jan Beulich  <jbeulich@suse.com>
4972
4973         * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
4974         "prefix_rep". Drop "prefix_extra".
4975         (wr<fsgs>base<mode>): Likewise.
4976         (ptwrite<mode>): Likewise.
4977
4978 2023-08-07  Jan Beulich  <jbeulich@suse.com>
4979
4980         * config/i386/i386.md (isa): Move up.
4981         (length_immediate): Handle "fma4".
4982         (prefix): Handle "ssemuladd".
4983         * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
4984         (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
4985         Likewise.
4986         (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
4987         (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
4988         (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
4989         Likewise.
4990         (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
4991         (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
4992         (*fma_fnmadd_<mode>): Likewise.
4993         (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
4994         Likewise.
4995         (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
4996         (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
4997         (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
4998         Likewise.
4999         (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
5000         (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
5001         (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
5002         Likewise.
5003         (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
5004         (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
5005         (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
5006         Likewise.
5007         (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
5008         (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
5009         (*fmai_fmadd_<mode>): Likewise.
5010         (*fmai_fmsub_<mode>): Likewise.
5011         (*fmai_fnmadd_<mode><round_name>): Likewise.
5012         (*fmai_fnmsub_<mode><round_name>): Likewise.
5013         (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
5014         (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
5015         (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
5016         (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
5017         (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
5018         (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
5019         (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
5020         (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
5021         (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
5022         (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
5023         (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
5024         (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
5025         (*fma4i_vmfmadd_<mode>): Likewise.
5026         (*fma4i_vmfmsub_<mode>): Likewise.
5027         (*fma4i_vmfnmadd_<mode>): Likewise.
5028         (*fma4i_vmfnmsub_<mode>): Likewise.
5029         (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
5030         (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
5031         (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
5032         Likewise.
5033         (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
5034         (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
5035         (xop_p<macs>dql): Likewise.
5036         (xop_p<macs>dqh): Likewise.
5037         (xop_p<macs>wd): Likewise.
5038         (xop_p<madcs>wd): Likewise.
5039         (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
5040
5041 2023-08-07  Jan Beulich  <jbeulich@suse.com>
5042
5043         * config/i386/i386.md (length_immediate): Handle "sse4arg".
5044         (prefix): Likewise.
5045         (*xop_pcmov_<mode>): Add "mode" attribute.
5046         * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
5047         "prefix_rep", "prefix_extra", and "length_immediate" attributes.
5048         (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
5049         (*xop_pcmov_<mode>): Add "mode" attribute.
5050         * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
5051         attribute.
5052         (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
5053         "prefix_extra", and "length_immediate" attributes.
5054         (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
5055         (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
5056         and "length_immediate" attributes. Switch "type" to "sse4arg".
5057         (xop_pcom_tf<mode>3): Likewise.
5058         (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
5059
5060 2023-08-07  Jan Beulich  <jbeulich@suse.com>
5061
5062         * config/i386/i386.md (prefix_extra): Correct comment. Fold
5063         cases yielding 2 into ones yielding 1.
5064
5065 2023-08-07  Jan Hubicka  <jh@suse.cz>
5066
5067         PR tree-optimization/106293
5068         * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
5069         * tree-vect-loop.cc (vect_transform_loop): Likewise.
5070
5071 2023-08-07  Andrew Pinski  <apinski@marvell.com>
5072
5073         PR tree-optimization/96695
5074         * match.pd (min_value, max_value): Extend to
5075         pointer types too.
5076
5077 2023-08-06  Jan Hubicka  <jh@suse.cz>
5078
5079         * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
5080         __builtin_expect that CPU likely supports cpuid.
5081
5082 2023-08-06  Jan Hubicka  <jh@suse.cz>
5083
5084         * tree-loop-distribution.cc (loop_distribution::execute): Disable
5085         distribution for loops with estimated iterations 0.
5086
5087 2023-08-06  Jan Hubicka  <jh@suse.cz>
5088
5089         * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
5090
5091 2023-08-04  Xiao Zeng  <zengxiao@eswincomputing.com>
5092
5093         * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
5094         more Zicond patterns.  Fix whitespace typo.
5095         (riscv_rtx_costs): Remove accidental code duplication.
5096         Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
5097
5098 2023-08-04  Yan Simonaytes  <simonaytes.yan@ispras.ru>
5099
5100         PR target/110202
5101         * config/i386/i386-protos.h
5102         (vpternlog_redundant_operand_mask): Declare.
5103         (substitute_vpternlog_operands): Declare.
5104         * config/i386/i386.cc
5105         (vpternlog_redundant_operand_mask): New helper.
5106         (substitute_vpternlog_operands): New function.  Use them...
5107         * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
5108
5109 2023-08-04  Roger Sayle  <roger@nextmovesoftware.com>
5110
5111         * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
5112         value of -1 is equivalent to don't care.
5113         (extract_integral_bit_field): Indicate that we don't require
5114         the most significant word to be zero extended, if we're about
5115         to sign extend it.
5116         (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
5117         of -1 is equivalent to don't care.  Don't clear the most
5118         significant bits with AND mask when UNSIGNEDP is -1.
5119
5120 2023-08-04  Roger Sayle  <roger@nextmovesoftware.com>
5121
5122         * config/i386/sse.md (define_split): Convert highpart:DF extract
5123         from V2DFmode register into a sse2_storehpd instruction.
5124         (define_split): Likewise, convert lowpart:DF extract from V2DF
5125         register into a sse2_storelpd instruction.
5126
5127 2023-08-04  Qing Zhao  <qing.zhao@oracle.com>
5128
5129         * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
5130         new option.
5131
5132 2023-08-04  Vladimir N. Makarov  <vmakarov@redhat.com>
5133
5134         * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
5135         against early clobber hard regs.
5136
5137 2023-08-04  Tamar Christina  <tamar.christina@arm.com>
5138
5139         * doc/extend.texi: Document it.
5140
5141 2023-08-04  Tamar Christina  <tamar.christina@arm.com>
5142
5143         PR target/106346
5144         * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
5145         vec_widen_<sur>shiftl_hi_<mode>): Remove.
5146         (aarch64_<sur>shll<mode>_internal): Renamed to...
5147         (aarch64_<su>shll<mode>): .. This.
5148         (aarch64_<sur>shll2<mode>_internal): Renamed to...
5149         (aarch64_<su>shll2<mode>): .. This.
5150         (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
5151         optabs.
5152         * config/aarch64/constraints.md (D2, DL): New.
5153         * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
5154
5155 2023-08-04  Tamar Christina  <tamar.christina@arm.com>
5156
5157         * gensupport.cc (conlist): Support length 0 attribute.
5158
5159 2023-08-04  Tamar Christina  <tamar.christina@arm.com>
5160
5161         * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
5162         (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
5163
5164 2023-08-04  Tamar Christina  <tamar.christina@arm.com>
5165
5166         * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
5167         of constants.
5168         (aarch64_adjust_stmt_cost): Use it.
5169         (aarch64_vector_costs::count_ops): Likewise.
5170         (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
5171         aarch64_adjust_stmt_cost.
5172
5173 2023-08-04  Richard Biener  <rguenther@suse.de>
5174
5175         PR tree-optimization/110838
5176         * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
5177         Fix right-shift value sanitizing.  Properly emit external
5178         def mangling in the preheader rather than in the pattern
5179         def sequence where it will fail vectorizing.
5180
5181 2023-08-04  Matthew Malcomson  <matthew.malcomson@arm.com>
5182
5183         PR middle-end/110316
5184         PR middle-end/9903
5185         * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
5186         CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
5187         (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
5188         (timer::validate_phases): Use integral arithmetic to check
5189         validity.
5190         (timer::print_row, timer::print): Convert from integral
5191         nanoseconds to floating point seconds before printing.
5192         (timer::all_zero): Change limit to nanosec count instead of
5193         fractional count of seconds.
5194         (make_json_for_timevar_time_def): Convert from integral
5195         nanoseconds to floating point seconds before recording.
5196         * timevar.h (struct timevar_time_def): Update all measurements
5197         to use uint64_t nanoseconds rather than seconds stored in a
5198         double.
5199
5200 2023-08-04  Richard Biener  <rguenther@suse.de>
5201
5202         PR tree-optimization/110838
5203         * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
5204         the arithmetic right-shift case to non-negative operands.
5205
5206 2023-08-04  Pan Li  <pan2.li@intel.com>
5207
5208         Revert:
5209         2023-08-04  Pan Li  <pan2.li@intel.com>
5210
5211         * config/riscv/riscv-vector-builtins-bases.cc
5212         (class vfmacc_frm): New class for vfmacc frm.
5213         (vfmacc_frm_obj): New declaration.
5214         (BASE): Ditto.
5215         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5216         * config/riscv/riscv-vector-builtins-functions.def
5217         (vfmacc_frm): New function definition.
5218         * config/riscv/riscv-vector-builtins.cc
5219         (function_expander::use_ternop_insn): Add frm operand support.
5220         * config/riscv/vector.md: Add vfmuladd to frm_mode.
5221
5222 2023-08-04  Pan Li  <pan2.li@intel.com>
5223
5224         Revert:
5225         2023-08-04  Pan Li  <pan2.li@intel.com>
5226
5227         * config/riscv/riscv-vector-builtins-bases.cc
5228         (class vfnmacc_frm): New class for vfnmacc.
5229         (vfnmacc_frm_obj): New declaration.
5230         (BASE): Ditto.
5231         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5232         * config/riscv/riscv-vector-builtins-functions.def
5233         (vfnmacc_frm): New function definition.
5234
5235 2023-08-04  Pan Li  <pan2.li@intel.com>
5236
5237         Revert:
5238         2023-08-04  Pan Li  <pan2.li@intel.com>
5239
5240         * config/riscv/riscv-vector-builtins-bases.cc
5241         (class vfmsac_frm): New class for vfmsac frm.
5242         (vfmsac_frm_obj): New declaration.
5243         (BASE): Ditto.
5244         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5245         * config/riscv/riscv-vector-builtins-functions.def
5246         (vfmsac_frm): New function definition.
5247
5248 2023-08-04  Pan Li  <pan2.li@intel.com>
5249
5250         Revert:
5251         2023-08-04  Pan Li  <pan2.li@intel.com>
5252
5253         * config/riscv/riscv-vector-builtins-bases.cc
5254         (class vfnmsac_frm): New class for vfnmsac frm.
5255         (vfnmsac_frm_obj): New declaration.
5256         (BASE): Ditto.
5257         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5258         * config/riscv/riscv-vector-builtins-functions.def
5259         (vfnmsac_frm): New function definition.
5260
5261 2023-08-04  Georg-Johann Lay  <avr@gjlay.de>
5262
5263         * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
5264         (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
5265         (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
5266         (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
5267         (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
5268         (attiny102, attiny104): New devices.
5269         * doc/avr-mmcu.texi: Regenerate.
5270
5271 2023-08-04  Georg-Johann Lay  <avr@gjlay.de>
5272
5273         * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
5274         and PM_OFFSET entries.
5275
5276 2023-08-04  Andrew Pinski  <apinski@marvell.com>
5277
5278         PR tree-optimization/110874
5279         * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
5280         (gimple_maybe_cmp): Likewise.
5281         (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
5282         and gimple_maybe_cmp instead of being recursive.
5283         * match.pd (bit_not_with_nop): New match pattern.
5284         (maybe_cmp): Likewise.
5285
5286 2023-08-04  Drew Ross  <drross@redhat.com>
5287
5288         PR middle-end/101955
5289         * match.pd ((signed x << c) >> c): New canonicalization.
5290
5291 2023-08-04  Pan Li  <pan2.li@intel.com>
5292
5293         * config/riscv/riscv-vector-builtins-bases.cc
5294         (class vfnmsac_frm): New class for vfnmsac frm.
5295         (vfnmsac_frm_obj): New declaration.
5296         (BASE): Ditto.
5297         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5298         * config/riscv/riscv-vector-builtins-functions.def
5299         (vfnmsac_frm): New function definition.
5300
5301 2023-08-04  Pan Li  <pan2.li@intel.com>
5302
5303         * config/riscv/riscv-vector-builtins-bases.cc
5304         (class vfmsac_frm): New class for vfmsac frm.
5305         (vfmsac_frm_obj): New declaration.
5306         (BASE): Ditto.
5307         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5308         * config/riscv/riscv-vector-builtins-functions.def
5309         (vfmsac_frm): New function definition.
5310
5311 2023-08-04  Pan Li  <pan2.li@intel.com>
5312
5313         * config/riscv/riscv-vector-builtins-bases.cc
5314         (class vfnmacc_frm): New class for vfnmacc.
5315         (vfnmacc_frm_obj): New declaration.
5316         (BASE): Ditto.
5317         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5318         * config/riscv/riscv-vector-builtins-functions.def
5319         (vfnmacc_frm): New function definition.
5320
5321 2023-08-04  Hao Liu  <hliu@os.amperecomputing.com>
5322
5323         PR target/110625
5324         * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
5325         STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
5326
5327 2023-08-04  Pan Li  <pan2.li@intel.com>
5328
5329         * config/riscv/riscv-vector-builtins-bases.cc
5330         (class vfmacc_frm): New class for vfmacc frm.
5331         (vfmacc_frm_obj): New declaration.
5332         (BASE): Ditto.
5333         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5334         * config/riscv/riscv-vector-builtins-functions.def
5335         (vfmacc_frm): New function definition.
5336         * config/riscv/riscv-vector-builtins.cc
5337         (function_expander::use_ternop_insn): Add frm operand support.
5338         * config/riscv/vector.md: Add vfmuladd to frm_mode.
5339
5340 2023-08-04  Pan Li  <pan2.li@intel.com>
5341
5342         * config/riscv/riscv-vector-builtins-bases.cc
5343         (vfwmul_frm_obj): New declaration.
5344         (vfwmul_frm): Ditto.
5345         * config/riscv/riscv-vector-builtins-bases.h:
5346         (vfwmul_frm): Ditto.
5347         * config/riscv/riscv-vector-builtins-functions.def
5348         (vfwmul_frm): New function definition.
5349         * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
5350
5351 2023-08-04  Pan Li  <pan2.li@intel.com>
5352
5353         * config/riscv/riscv-vector-builtins-bases.cc
5354         (binop_frm): New declaration.
5355         (reverse_binop_frm): Likewise.
5356         (BASE): Likewise.
5357         * config/riscv/riscv-vector-builtins-bases.h:
5358         (vfdiv_frm): New extern declaration.
5359         (vfrdiv_frm): Likewise.
5360         * config/riscv/riscv-vector-builtins-functions.def
5361         (vfdiv_frm): New function definition.
5362         (vfrdiv_frm): Likewise.
5363         * config/riscv/vector.md: Add vfdiv to frm_mode.
5364
5365 2023-08-03  Jan Hubicka  <jh@suse.cz>
5366
5367         * tree-cfg.cc (print_loop_info): Print entry count.
5368
5369 2023-08-03  Jan Hubicka  <jh@suse.cz>
5370
5371         * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
5372
5373 2023-08-03  Jan Hubicka  <jh@suse.cz>
5374
5375         PR bootstrap/110857
5376         * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
5377         unadjusted_exit_count.
5378
5379 2023-08-03  Aldy Hernandez  <aldyh@redhat.com>
5380
5381         * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
5382         value/mask.
5383
5384 2023-08-03  Xiao Zeng  <zengxiao@eswincomputing.com>
5385
5386         * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
5387         various Zicond patterns.
5388         * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND.  Use
5389         sfb_alu_operand for both arms of the conditional move.
5390         Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
5391
5392 2023-08-03  Cupertino Miranda  <cupertino.miranda@oracle.com>
5393
5394         PR target/107844
5395         PR target/107479
5396         PR target/107480
5397         PR target/107481
5398         * config.gcc: Added core-builtins.cc and .o files.
5399         * config/bpf/bpf-passes.def: Removed file.
5400         * config/bpf/bpf-protos.h (bpf_add_core_reloc,
5401         bpf_replace_core_move_operands): New prototypes.
5402         * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
5403         maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
5404         bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
5405         bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
5406         handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
5407         Removed.
5408         (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
5409         * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
5410         (mov_reloc_core<mode>): Added.
5411         * config/bpf/core-builtins.cc (struct cr_builtin, enum
5412         cr_decision struct cr_local, struct cr_final, struct
5413         core_builtin_helpers, enum bpf_plugin_states): Added types.
5414         (builtins_data, core_builtin_helpers, core_builtin_type_defs):
5415         Added variables.
5416         (allocate_builtin_data, get_builtin-data, search_builtin_data,
5417         remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
5418         compare_same_ptr_type, is_attr_preserve_access, core_field_info,
5419         bpf_core_get_index, compute_field_expr,
5420         pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
5421         process_field_expr, pack_enum_value, process_enum_value, pack_type,
5422         process_type, bpf_require_core_support, make_core_relo, read_kind,
5423         kind_access_index, kind_preserve_field_info, kind_enum_value,
5424         kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
5425         bpf_handle_plugin_finish_type, bpf_init_core_builtins,
5426         construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
5427         bpf_expand_core_builtin, bpf_add_core_reloc,
5428         bpf_replace_core_move_operands): Added functions.
5429         * config/bpf/core-builtins.h (enum bpf_builtins): Added.
5430         (bpf_init_core_builtins, bpf_expand_core_builtin,
5431         bpf_resolve_overloaded_core_builtin): Added functions.
5432         * config/bpf/coreout.cc (struct bpf_core_extra): Added.
5433         (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
5434         * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
5435         * config/bpf/t-bpf: Added core-builtins.o.
5436         * doc/extend.texi: Added documentation for new BPF builtins.
5437
5438 2023-08-03  Andrew MacLeod  <amacleod@redhat.com>
5439
5440         * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
5441         ranges to the call to relation_fold_and_or.
5442         (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
5443         (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
5444         * gimple-range-fold.h (relation_fold_and_or): Adjust params.
5445         * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
5446         a varying op1 and op2 to call.
5447         * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
5448         (operator_equal::op1_op2_relation): New float version.
5449         (operator_not_equal::op1_op2_relation): Ditto.
5450         (operator_lt::op1_op2_relation): Ditto.
5451         (operator_le::op1_op2_relation): Ditto.
5452         (operator_gt::op1_op2_relation): Ditto.
5453         (operator_ge::op1_op2_relation) Ditto.
5454         * range-op-mixed.h (operator_equal::op1_op2_relation): New float
5455         prototype.
5456         (operator_not_equal::op1_op2_relation): Ditto.
5457         (operator_lt::op1_op2_relation): Ditto.
5458         (operator_le::op1_op2_relation): Ditto.
5459         (operator_gt::op1_op2_relation): Ditto.
5460         (operator_ge::op1_op2_relation): Ditto.
5461         * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
5462         variations.
5463         (range_operator::op1_op2_relation): Add extra params.
5464         (operator_equal::op1_op2_relation): Ditto.
5465         (operator_not_equal::op1_op2_relation): Ditto.
5466         (operator_lt::op1_op2_relation): Ditto.
5467         (operator_le::op1_op2_relation): Ditto.
5468         (operator_gt::op1_op2_relation): Ditto.
5469         (operator_ge::op1_op2_relation): Ditto.
5470         * range-op.h (range_operator): New prototypes.
5471         (range_op_handler): Ditto.
5472
5473 2023-08-03  Andrew MacLeod  <amacleod@redhat.com>
5474
5475         * gimple-range-gori.cc (gori_compute::compute_operand1_range):
5476         Use identity relation.
5477         (gori_compute::compute_operand2_range): Ditto.
5478         * value-relation.cc (get_identity_relation): New.
5479         * value-relation.h (get_identity_relation): New prototype.
5480
5481 2023-08-03  Andrew MacLeod  <amacleod@redhat.com>
5482
5483         * value-range.h (Value_Range::set_varying): Set the type.
5484         (Value_Range::set_zero): Ditto.
5485         (Value_Range::set_nonzero): Ditto.
5486
5487 2023-08-03  Jeff Law  <jeffreyalaw@gmail.com>
5488
5489         * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
5490         recent commit.
5491
5492 2023-08-03  Pan Li  <pan2.li@intel.com>
5493
5494         * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
5495
5496 2023-08-03  Richard Sandiford  <richard.sandiford@arm.com>
5497
5498         * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
5499
5500 2023-08-03  Richard Biener  <rguenther@suse.de>
5501
5502         PR tree-optimization/110838
5503         * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
5504         Adjust the shift operand of RSHIFT_EXPRs.
5505
5506 2023-08-03  Richard Biener  <rguenther@suse.de>
5507
5508         PR tree-optimization/110702
5509         * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
5510         we created a NULL pointer based access rewrite that to
5511         a LEA.
5512
5513 2023-08-03  Richard Biener  <rguenther@suse.de>
5514
5515         * tree-ssa-sink.cc: Include tree-ssa-live.h.
5516         (pass_sink_code::execute): Instantiate virtual_operand_live
5517         and pass it down.
5518         (sink_code_in_bb): Pass down virtual_operand_live.
5519         (statement_sink_location): Get virtual_operand_live and
5520         verify we are not sinking loads across stores by looking up
5521         the live virtual operand at the sink location.
5522
5523 2023-08-03  Richard Biener  <rguenther@suse.de>
5524
5525         * tree-ssa-live.h (class virtual_operand_live): New.
5526         * tree-ssa-live.cc (virtual_operand_live::init): New.
5527         (virtual_operand_live::get_live_in): Likewise.
5528         (virtual_operand_live::get_live_out): Likewise.
5529
5530 2023-08-03  Richard Biener  <rguenther@suse.de>
5531
5532         * passes.def: Exchange loop splitting and final value
5533         replacement passes.
5534
5535 2023-08-03  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
5536
5537         * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
5538         New function which handles bswap patterns for vec_perm_const.
5539         (vectorize_vec_perm_const_1): Call new function.
5540         * config/s390/vector.md (*bswap<mode>): Fix operands in output
5541         template.
5542         (*vstbr<mode>): New insn.
5543
5544 2023-08-03  Alexandre Oliva  <oliva@adacore.com>
5545
5546         * config/vxworks-smp.opt: New.  Introduce -msmp.
5547         * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
5548         * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
5549         lib_smp when -msmp is present in the command line.
5550         * doc/invoke.texi: Document it.
5551
5552 2023-08-03  Yanzhang Wang  <yanzhang.wang@intel.com>
5553
5554         * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
5555         when enabling -mno-omit-leaf-frame-pointer
5556         (riscv_option_override): Override omit-frame-pointer.
5557         (riscv_frame_pointer_required): Save s0 for non-leaf function
5558         (TARGET_FRAME_POINTER_REQUIRED): Override defination
5559         * config/riscv/riscv.opt: Add option support.
5560
5561 2023-08-03  Roger Sayle  <roger@nextmovesoftware.com>
5562
5563         PR target/110792
5564         * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
5565         place operand in a register before gen_<insn>64ti2_doubleword.
5566         (<any_rotate>di3): Likewise, for rotations by 32 bits, place
5567         operand in a register before gen_<insn>32di2_doubleword.
5568         (<any_rotate>32di2_doubleword): Constrain operand to be in register.
5569         (<any_rotate>64ti2_doubleword): Likewise.
5570
5571 2023-08-03  Pan Li  <pan2.li@intel.com>
5572
5573         * config/riscv/riscv-vector-builtins-bases.cc
5574         (vfmul_frm_obj): New declaration.
5575         (Base): Likewise.
5576         * config/riscv/riscv-vector-builtins-bases.h: Likewise.
5577         * config/riscv/riscv-vector-builtins-functions.def
5578         (vfmul_frm): New function definition.
5579         * config/riscv/vector.md: Add vfmul to frm_mode.
5580
5581 2023-08-03  Andrew Pinski  <apinski@marvell.com>
5582
5583         * match.pd (`~X & X`): Check that the types match.
5584         (`~x | x`, `~x ^ x`): Likewise.
5585
5586 2023-08-03  Pan Li  <pan2.li@intel.com>
5587
5588         * config/riscv/riscv-vector-builtins-bases.h: Remove
5589         redudant declaration.
5590
5591 2023-08-03  Pan Li  <pan2.li@intel.com>
5592
5593         * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
5594         vfwsub frm.
5595         * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
5596         * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
5597         Add vfwsub function definitions.
5598
5599 2023-08-02  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
5600
5601         PR rtl-optimization/110867
5602         * combine.cc (simplify_compare_const): Try the optimization only
5603         in case the constant fits into the comparison mode.
5604
5605 2023-08-02  Jeff Law  <jlaw@ventanamicro.com>
5606
5607         * config/riscv/zicond.md: Remove incorrect zicond patterns and
5608         renumber/rename them.
5609         (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
5610
5611 2023-08-02  Richard Biener  <rguenther@suse.de>
5612
5613         * tree-phinodes.h (add_phi_node_to_bb): Remove.
5614         * tree-phinodes.cc  (add_phi_node_to_bb): Make static.
5615
5616 2023-08-02  Jan Beulich  <jbeulich@suse.com>
5617
5618         * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
5619         two of the alternatives.
5620
5621 2023-08-02  Richard Biener  <rguenther@suse.de>
5622
5623         PR tree-optimization/92335
5624         * tree-ssa-sink.cc (select_best_block): Before loop
5625         optimizations avoid sinking unconditional loads/stores
5626         in innermost loops to conditional executed places.
5627
5628 2023-08-02  Andrew Pinski  <apinski@marvell.com>
5629
5630         * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
5631         the comparison operands before comparing them.
5632
5633 2023-08-02  Andrew Pinski  <apinski@marvell.com>
5634
5635         * match.pd (`~X & X`, `~X | X`): Move over to
5636         use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
5637         handles that already.
5638         Remove range test simplifications to true/false as they
5639         are now handled by these patterns.
5640
5641 2023-08-02  Andrew Pinski  <apinski@marvell.com>
5642
5643         * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
5644         statement's lhs and rhs to check if trivial dead.
5645         Rename inserted_exprs to exprs_maybe_dce; also move it so
5646         bitmap is not allocated if not needed.
5647
5648 2023-08-02  Pan Li  <pan2.li@intel.com>
5649
5650         * config/riscv/riscv-vector-builtins-bases.cc
5651         (class widen_binop_frm): New class for binop frm.
5652         (BASE): Add vfwadd_frm.
5653         * config/riscv/riscv-vector-builtins-bases.h: New declaration.
5654         * config/riscv/riscv-vector-builtins-functions.def
5655         (vfwadd_frm): New function definition.
5656         * config/riscv/riscv-vector-builtins-shapes.cc
5657         (BASE_NAME_MAX_LEN): New macro.
5658         (struct alu_frm_def): Leverage new base class.
5659         (struct build_frm_base): New build base for frm.
5660         (struct widen_alu_frm_def): New struct for widen alu frm.
5661         (SHAPE): Add widen_alu_frm shape.
5662         * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
5663         * config/riscv/vector.md (frm_mode): Add vfwalu type.
5664
5665 2023-08-02  Jan Hubicka  <jh@suse.cz>
5666
5667         * cfgloop.h (loop_count_in): Declare.
5668         * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
5669         (loop_count_in): Move here from ...
5670         * cfgloopmanip.cc (loop_count_in): ... here.
5671         (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
5672
5673 2023-08-02  Jan Hubicka  <jh@suse.cz>
5674
5675         * cfg.cc (scale_strictly_dominated_blocks): New function.
5676         * cfg.h (scale_strictly_dominated_blocks): Declare.
5677         * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
5678
5679 2023-08-02  Richard Biener  <rguenther@suse.de>
5680
5681         PR rtl-optimization/110587
5682         * lra-spills.cc (return_regno_p): Remove.
5683         (regno_in_use_p): Likewise.
5684         (lra_final_code_change): Do not remove noop moves
5685         between hard registers.
5686
5687 2023-08-02  liuhongt  <hongtao.liu@intel.com>
5688
5689         PR target/81904
5690         * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
5691         HFmode, use mode iterator VFH instead.
5692         (vec_fmsubadd<mode>4): Ditto.
5693         (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
5694         Remove scalar mode from iterator, use VFH_AVX512VL instead.
5695         (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
5696         Ditto.
5697
5698 2023-08-02  liuhongt  <hongtao.liu@intel.com>
5699
5700         * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
5701         pre_reload define_insn_and_split.
5702
5703 2023-08-02  Xiao Zeng  <zengxiao@eswincomputing.com>
5704
5705         * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
5706         using Zicond to implement some conditional moves.
5707
5708 2023-08-02  Jeff Law  <jlaw@ventanamicro.com>
5709
5710         * config/riscv/zicond.md: Use the X iterator instead of ANYI
5711         on the comparison input operands.
5712
5713 2023-08-02  Xiao Zeng  <zengxiao@eswincomputing.com>
5714
5715         * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
5716         Zicond costing.
5717         (case SET): For INSNs that just set a REG, take the cost from the
5718         SET_SRC.
5719         Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
5720
5721 2023-08-02  Hu, Lin1  <lin1.hu@intel.com>
5722
5723         * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
5724         Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
5725         (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
5726         (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
5727         (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
5728         (OPTION_MASK_ISA_ABM_SET):
5729         Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
5730
5731 2023-08-01  Andreas Krebbel  <krebbel@linux.ibm.com>
5732
5733         * config/s390/s390.cc (s390_encode_section_info): Assume external
5734         symbols without explicit alignment to be unaligned if
5735         -munaligned-symbols has been specified.
5736         * config/s390/s390.opt (-munaligned-symbols): New option.
5737
5738 2023-08-01  Richard Ball  <richard.ball@arm.com>
5739
5740         * gimple-fold.cc (fold_ctor_reference):
5741         Add support for poly_int.
5742
5743 2023-08-01  Georg-Johann Lay  <avr@gjlay.de>
5744
5745         PR target/110220
5746         * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
5747         LABEL_NUSES of new conditional branch instruction.
5748
5749 2023-08-01  Jan Hubicka  <jh@suse.cz>
5750
5751         * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
5752         constant prologue peeling.
5753
5754 2023-08-01  Christophe Lyon  <christophe.lyon@linaro.org>
5755
5756         * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
5757
5758 2023-08-01  Pan Li  <pan2.li@intel.com>
5759             Juzhe-Zhong  <juzhe.zhong@rivai.ai>
5760
5761         * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
5762         (STATIC_FRM_P): Ditto.
5763         (struct mode_switching_info): New struct for mode switching.
5764         (struct machine_function): Add new field mode switching.
5765         (riscv_emit_frm_mode_set): Add DYN_CALL emit.
5766         (riscv_frm_adjust_mode_after_call): New function for call mode.
5767         (riscv_frm_emit_after_call_in_bb_end): New function for emit
5768         insn when call as the end of bb.
5769         (riscv_frm_mode_needed): New function for frm mode needed.
5770         (frm_unknown_dynamic_p): Remove call check.
5771         (riscv_mode_needed): Extrac function for frm.
5772         (riscv_frm_mode_after): Add DYN_CALL after.
5773         (riscv_mode_entry): Remove backup rtl initialization.
5774         * config/riscv/vector.md (frm_mode): Add dyn_call.
5775         (fsrmsi_restore_exit): Rename to _volatile.
5776         (fsrmsi_restore_volatile): Likewise.
5777
5778 2023-08-01  Pan Li  <pan2.li@intel.com>
5779
5780         * config/riscv/riscv-vector-builtins-bases.cc
5781         (class reverse_binop_frm): Add new template for reversed frm.
5782         (vfsub_frm_obj): New obj.
5783         (vfrsub_frm_obj): Likewise.
5784         * config/riscv/riscv-vector-builtins-bases.h:
5785         (vfsub_frm): New declaration.
5786         (vfrsub_frm): Likewise.
5787         * config/riscv/riscv-vector-builtins-functions.def
5788         (vfsub_frm): New function define.
5789         (vfrsub_frm): Likewise.
5790
5791 2023-08-01  Andrew Pinski  <apinski@marvell.com>
5792
5793         PR tree-optimization/93044
5794         * match.pd (nested int casts): A truncation (to the same size or smaller)
5795         can always remove the inner cast.
5796
5797 2023-07-31  Hamza Mahfooz  <someguy@effective-light.com>
5798
5799         PR c/65213
5800         * doc/invoke.texi (-Wmissing-variable-declarations): Document
5801         new option.
5802
5803 2023-07-31  Andrew Pinski  <apinski@marvell.com>
5804
5805         PR tree-optimization/106164
5806         * match.pd (`a != b & a <= b`, `a != b & a >= b`,
5807         `a == b | a < b`, `a == b | a > b`): Handle these cases
5808         too.
5809
5810 2023-07-31  Andrew Pinski  <apinski@marvell.com>
5811
5812         PR tree-optimization/106164
5813         * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
5814         patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
5815
5816 2023-07-31  Andrew Pinski  <apinski@marvell.com>
5817
5818         PR tree-optimization/100864
5819         * generic-match-head.cc (bitwise_inverted_equal_p): New function.
5820         * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
5821         (gimple_bitwise_inverted_equal_p): New function.
5822         * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
5823         instead of direct matching bit_not.
5824
5825 2023-07-31  Costas Argyris  <costas.argyris@gmail.com>
5826
5827         PR driver/77576
5828         * gcc-ar.cc (main): Expand argv and use
5829         temporary response file to call ar if any
5830         expansions were made.
5831
5832 2023-07-31  Andrew MacLeod  <amacleod@redhat.com>
5833
5834         PR tree-optimization/110582
5835         * gimple-range-fold.cc (fur_list::get_operand): Do not use the
5836         range vector for non-ssa names.
5837
5838 2023-07-31  David Malcolm  <dmalcolm@redhat.com>
5839
5840         PR analyzer/109361
5841         * diagnostic-client-data-hooks.h (class sarif_object): New forward
5842         decl.
5843         (diagnostic_client_data_hooks::add_sarif_invocation_properties):
5844         New vfunc.
5845         * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
5846         (class sarif_invocation): Inherit from sarif_object rather than
5847         json::object.
5848         (class sarif_result): Likewise.
5849         (class sarif_ice_notification): Likewise.
5850         (sarif_object::get_or_create_properties): New.
5851         (sarif_invocation::prepare_to_flush): Add "context" param.  Use it
5852         to call the context's add_sarif_invocation_properties hook.
5853         (sarif_builder::flush_to_file): Pass m_context to
5854         sarif_invocation::prepare_to_flush.
5855         * diagnostic-format-sarif.h: New header.
5856         * doc/invoke.texi (Developer Options): Clarify that -ftime-report
5857         writes to stderr.  Document that if SARIF diagnostic output is
5858         requested then any timing information is written in JSON form as
5859         part of the SARIF output, rather than to stderr.
5860         * timevar.cc: Include "json.h".
5861         (timer::named_items::m_hash_map): Split out type into...
5862         (timer::named_items::hash_map_t): ...this new typedef.
5863         (timer::named_items::make_json): New function.
5864         (timevar_diff): New function.
5865         (make_json_for_timevar_time_def): New function.
5866         (timer::timevar_def::make_json): New function.
5867         (timer::make_json): New function.
5868         * timevar.h (class json::value): New forward decl.
5869         (timer::make_json): New decl.
5870         (timer::timevar_def::make_json): New decl.
5871         * tree-diagnostic-client-data-hooks.cc: Include
5872         "diagnostic-format-sarif.h" and "timevar.h".
5873         (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
5874         implementation.
5875
5876 2023-07-31  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
5877
5878         * combine.cc (simplify_compare_const): Narrow comparison of
5879         memory and constant.
5880         (try_combine): Adapt new function signature.
5881         (simplify_comparison): Adapt new function signature.
5882
5883 2023-07-31  Kito Cheng  <kito.cheng@sifive.com>
5884
5885         * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
5886         variable.
5887         (expand_vector_init_insert_elems): Ditto.
5888
5889 2023-07-31  Hao Liu  <hliu@os.amperecomputing.com>
5890
5891         PR target/110625
5892         * config/aarch64/aarch64.cc (count_ops): Only '* count' for
5893         single_defuse_cycle while counting reduction_latency.
5894
5895 2023-07-31  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
5896
5897         * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
5898         (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
5899         (COND_ADD): Remove.
5900         (COND_SUB): Ditto.
5901         (COND_MUL): Ditto.
5902         (COND_DIV): Ditto.
5903         (COND_MOD): Ditto.
5904         (COND_RDIV): Ditto.
5905         (COND_MIN): Ditto.
5906         (COND_MAX): Ditto.
5907         (COND_FMIN): Ditto.
5908         (COND_FMAX): Ditto.
5909         (COND_AND): Ditto.
5910         (COND_IOR): Ditto.
5911         (COND_XOR): Ditto.
5912         (COND_SHL): Ditto.
5913         (COND_SHR): Ditto.
5914         (COND_FMA): Ditto.
5915         (COND_FMS): Ditto.
5916         (COND_FNMA): Ditto.
5917         (COND_FNMS): Ditto.
5918         (COND_NEG): Ditto.
5919         (COND_LEN_ADD): Ditto.
5920         (COND_LEN_SUB): Ditto.
5921         (COND_LEN_MUL): Ditto.
5922         (COND_LEN_DIV): Ditto.
5923         (COND_LEN_MOD): Ditto.
5924         (COND_LEN_RDIV): Ditto.
5925         (COND_LEN_MIN): Ditto.
5926         (COND_LEN_MAX): Ditto.
5927         (COND_LEN_FMIN): Ditto.
5928         (COND_LEN_FMAX): Ditto.
5929         (COND_LEN_AND): Ditto.
5930         (COND_LEN_IOR): Ditto.
5931         (COND_LEN_XOR): Ditto.
5932         (COND_LEN_SHL): Ditto.
5933         (COND_LEN_SHR): Ditto.
5934         (COND_LEN_FMA): Ditto.
5935         (COND_LEN_FMS): Ditto.
5936         (COND_LEN_FNMA): Ditto.
5937         (COND_LEN_FNMS): Ditto.
5938         (COND_LEN_NEG): Ditto.
5939         (ADD): New macro define.
5940         (SUB): Ditto.
5941         (MUL): Ditto.
5942         (DIV): Ditto.
5943         (MOD): Ditto.
5944         (RDIV): Ditto.
5945         (MIN): Ditto.
5946         (MAX): Ditto.
5947         (FMIN): Ditto.
5948         (FMAX): Ditto.
5949         (AND): Ditto.
5950         (IOR): Ditto.
5951         (XOR): Ditto.
5952         (SHL): Ditto.
5953         (SHR): Ditto.
5954         (FMA): Ditto.
5955         (FMS): Ditto.
5956         (FNMA): Ditto.
5957         (FNMS): Ditto.
5958         (NEG): Ditto.
5959
5960 2023-07-31  Roger Sayle  <roger@nextmovesoftware.com>
5961
5962         PR target/110843
5963         * config/i386/i386-features.cc (compute_convert_gain): Check
5964         TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
5965         and V4SImode rotates in STV.
5966         (general_scalar_chain::convert_rotate): Likewise.
5967
5968 2023-07-31  Kito Cheng  <kito.cheng@sifive.com>
5969
5970         * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
5971         * config/riscv/riscv-protos.h (get_mask_mode): Update return
5972         type.
5973         * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
5974         `.require ()`.
5975         (emit_vlmax_insn): Ditto.
5976         (emit_vlmax_fp_insn): Ditto.
5977         (emit_vlmax_ternary_insn): Ditto.
5978         (emit_vlmax_fp_ternary_insn): Ditto.
5979         (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
5980         (emit_nonvlmax_insn): Ditto.
5981         (emit_vlmax_slide_insn): Ditto.
5982         (emit_nonvlmax_slide_tu_insn): Ditto.
5983         (emit_vlmax_merge_insn): Ditto.
5984         (emit_vlmax_masked_insn): Ditto.
5985         (emit_nonvlmax_masked_insn): Ditto.
5986         (emit_vlmax_masked_store_insn): Ditto.
5987         (emit_nonvlmax_masked_store_insn): Ditto.
5988         (emit_vlmax_masked_mu_insn): Ditto.
5989         (emit_nonvlmax_tu_insn): Ditto.
5990         (emit_nonvlmax_fp_tu_insn): Ditto.
5991         (emit_scalar_move_insn): Ditto.
5992         (emit_vlmax_compress_insn): Ditto.
5993         (emit_vlmax_reduction_insn): Ditto.
5994         (emit_vlmax_fp_reduction_insn): Ditto.
5995         (emit_nonvlmax_fp_reduction_insn): Ditto.
5996         (expand_vec_series): Ditto.
5997         (expand_vector_init_merge_repeating_sequence): Ditto.
5998         (expand_vec_perm): Ditto.
5999         (shuffle_merge_patterns): Ditto.
6000         (shuffle_compress_patterns): Ditto.
6001         (shuffle_decompress_patterns): Ditto.
6002         (expand_reduction): Ditto.
6003         (get_mask_mode): Update return type.
6004         * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
6005         is valid, and use new get_mask_mode interface.
6006
6007 2023-07-31  Pan Li  <pan2.li@intel.com>
6008
6009         * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
6010         Move rm suffix before mask.
6011
6012 2023-07-31  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
6013
6014         * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
6015         * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
6016         support.
6017
6018 2023-07-29  Roger Sayle  <roger@nextmovesoftware.com>
6019
6020         PR target/110790
6021         * config/i386/i386.md (extv<mode>): Use QImode for offsets.
6022         (extzv<mode>): Likewise.
6023         (insv<mode>): Likewise.
6024         (*testqi_ext_3): Likewise.
6025         (*btr<mode>_2): Likewise.
6026         (define_split): Likewise.
6027         (*btsq_imm): Likewise.
6028         (*btrq_imm): Likewise.
6029         (*btcq_imm): Likewise.
6030         (define_peephole2 x3): Likewise.
6031         (*bt<mode>): Likewise
6032         (*bt<mode>_mask): New define_insn_and_split.
6033         (*jcc_bt<mode>): Use QImode for offsets.
6034         (*jcc_bt<mode>_1): Delete obsolete pattern.
6035         (*jcc_bt<mode>_mask): Use QImode offsets.
6036         (*jcc_bt<mode>_mask_1): Likewise.
6037         (define_split): Likewise.
6038         (*bt<mode>_setcqi): Likewise.
6039         (*bt<mode>_setncqi): Likewise.
6040         (*bt<mode>_setnc<mode>): Likewise.
6041         (*bt<mode>_setncqi_2): Likewise.
6042         (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
6043         (bmi2_bzhi_<mode>3): Use QImode offsets.
6044         (*bmi2_bzhi_<mode>3): Likewise.
6045         (*bmi2_bzhi_<mode>3_1): Likewise.
6046         (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
6047         (@tbm_bextri_<mode>): Likewise.
6048
6049 2023-07-29  Jan Hubicka  <jh@suse.cz>
6050
6051         * profile-count.cc (profile_probability::sqrt): New member function.
6052         (profile_probability::pow): Likewise.
6053         * profile-count.h: (profile_probability::sqrt): Declare
6054         (profile_probability::pow): Likewise.
6055         * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
6056
6057 2023-07-28  Andrew MacLeod  <amacleod@redhat.com>
6058
6059         * gimple-range-cache.cc (ssa_cache::merge_range): New.
6060         (ssa_lazy_cache::merge_range): New.
6061         * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
6062         (class ssa_lazy_cache): Ditto.
6063         * gimple-range.cc (assume_query::calculate_op): Use merge_range.
6064
6065 2023-07-28  Andrew MacLeod  <amacleod@redhat.com>
6066
6067         * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
6068         Move from value-query.cc.
6069         (substitute_and_fold_engine::value_of_stmt): Ditto.
6070         (substitute_and_fold_engine::range_of_expr): New.
6071         * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
6072         range_query.  New prototypes.
6073         * value-query.cc (value_query::value_on_edge): Relocate.
6074         (value_query::value_of_stmt): Ditto.
6075         * value-query.h (class value_query): Remove.
6076         (class range_query): Remove base class.  Adjust prototypes.
6077
6078 2023-07-28  Andrew MacLeod  <amacleod@redhat.com>
6079
6080         PR tree-optimization/110205
6081         * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
6082         * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
6083         Add final override.
6084         * range-op.cc (operator_lshift): Add missing final overrides.
6085         (operator_rshift): Ditto.
6086
6087 2023-07-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
6088
6089         * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
6090         optimizations in BPF target.
6091
6092 2023-07-28  Honza  <jh@ryzen4.suse.cz>
6093
6094         * cfgloopmanip.cc (loop_count_in): Break out from ...
6095         (loop_exit_for_scaling): Break out from ...
6096         (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
6097         add more sanity check and debug info.
6098         (scale_loop_profile): ... here.
6099         (create_empty_loop_on_edge): Fix whitespac.
6100         * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
6101         * loop-unroll.cc (unroll_loop_constant_iterations): Use
6102         update_loop_exit_probability_scale_dom_bbs.
6103         * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
6104         (tree_transform_and_unroll_loop): Use
6105         update_loop_exit_probability_scale_dom_bbs.
6106         * tree-ssa-loop-split.cc (split_loop): Use
6107         update_loop_exit_probability_scale_dom_bbs.
6108
6109 2023-07-28  Jan Hubicka  <jh@suse.cz>
6110
6111         PR middle-end/77689
6112         * tree-ssa-loop-split.cc: Include value-query.h.
6113         (split_at_bb_p): Analyze cases where EQ/NE can be turned
6114         into LT/LE/GT/GE; return updated guard code.
6115         (split_loop): Use guard code.
6116
6117 2023-07-28  Roger Sayle  <roger@nextmovesoftware.com>
6118             Richard Biener  <rguenther@suse.de>
6119
6120         PR middle-end/28071
6121         PR rtl-optimization/110587
6122         * expr.cc (emit_group_load_1): Simplify logic for calling
6123         force_reg on ORIG_SRC, to avoid making a copy if the source
6124         is already in a pseudo register.
6125
6126 2023-07-28  Jan Hubicka  <jh@suse.cz>
6127
6128         PR middle-end/106923
6129         * tree-ssa-loop-split.cc (connect_loops): Change probability
6130         of the test preconditioning second loop to very_likely.
6131         (fix_loop_bb_probability): Handle correctly case where
6132         on of the arms of the conditional is empty.
6133         (split_loop): Fold the test guarding first condition to
6134         see if it is constant true; Set correct entry block
6135         probabilities of the split loops; determine correct loop
6136         eixt probabilities.
6137
6138 2023-07-28  xuli  <xuli1@eswincomputing.com>
6139
6140         * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
6141         vsadd[u] and vssub[u].
6142         * config/riscv/vector.md: Ditto.
6143
6144 2023-07-28  Jan Hubicka  <jh@suse.cz>
6145
6146         * tree-ssa-loop-split.cc (split_loop): Also support NE driven
6147         loops when IV test is not overflowing.
6148
6149 2023-07-28  liuhongt  <hongtao.liu@intel.com>
6150
6151         PR target/110788
6152         * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
6153         UNSPEC_MASKOP.
6154         (avx512cd_maskw_vec_dup<mode>): Ditto.
6155
6156 2023-07-27  David Faust  <david.faust@oracle.com>
6157
6158         PR target/110782
6159         PR target/110784
6160         * config/bpf/bpf.opt (msmov): New option.
6161         * config/bpf/bpf.cc (bpf_option_override): Handle it here.
6162         * config/bpf/bpf.md (*extendsidi2): New.
6163         (extendhidi2): New.
6164         (extendqidi2): New.
6165         (extendsisi2): New.
6166         (extendhisi2): New.
6167         (extendqisi2): New.
6168         * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
6169         (eBPF Options): Add -m[no-]smov.  Document that -mcpu=v4
6170         also enables -msmov.
6171
6172 2023-07-27  David Faust  <david.faust@oracle.com>
6173
6174         * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
6175         Add -mbswap and -msdiv eBPF options.
6176         (eBPF Options): Remove -mkernel.  Add -mno-{jmpext, jmp32,
6177         alu32, v3-atomics, bswap, sdiv}.  Document that -mcpu=v4 also
6178         enables -msdiv.
6179
6180 2023-07-27  David Faust  <david.faust@oracle.com>
6181
6182         * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
6183         in pseudo-C dialect output template.
6184         (sub<AM:mode>3): Likewise.
6185
6186 2023-07-27  Jan Hubicka  <jh@suse.cz>
6187
6188         * tree-vect-loop.cc (optimize_mask_stores): Make store
6189         likely.
6190
6191 2023-07-27  Jan Hubicka  <jh@suse.cz>
6192
6193         * cfgloop.h (single_dom_exit): Declare.
6194         * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
6195         * cfgrtl.cc (struct cfg_hooks): Fix comment.
6196         * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
6197         * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
6198         * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
6199         Break out from ...
6200         (tree_transform_and_unroll_loop): ... here;
6201
6202 2023-07-27  Jan Hubicka  <jh@suse.cz>
6203
6204         * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
6205         tree-ssa-loop-manip.cc and avoid recursion.
6206         (scale_loop_profile): Use scale_dominated_blocks_in_loop.
6207         (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
6208         flag.
6209         * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
6210         (scale_dominated_blocks_in_loop): Declare.
6211         * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
6212         (change_edge_frequency): Remove.
6213         * predict.h (change_edge_frequency): Remove.
6214         * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
6215         cfgloopmanip.cc.
6216         (niter_for_unrolled_loop): Remove.
6217         (tree_transform_and_unroll_loop): Fix profile update.
6218
6219 2023-07-27  Jan Hubicka  <jh@suse.cz>
6220
6221         * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
6222         to guessed; fix count of new_bb.
6223
6224 2023-07-27  Jan Hubicka  <jh@suse.cz>
6225
6226         * profile-count.h (profile_count::apply_probability): Fix
6227         handling of uninitialized probabilities, optimize scaling
6228         by probability 1.
6229
6230 2023-07-27  Richard Biener  <rguenther@suse.de>
6231
6232         PR tree-optimization/91838
6233         * gimple-match-head.cc: Include attribs.h and asan.h.
6234         * generic-match-head.cc: Likewise.
6235         * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
6236
6237 2023-07-27  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
6238
6239         * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
6240         (ADJUST_ALIGNMENT): Ditto.
6241         (ADJUST_PRECISION): Ditto.
6242         (VLS_MODES): Ditto.
6243         (VECTOR_MODE_WITH_PREFIX): Ditto.
6244         * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
6245         * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
6246         * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
6247         (legitimize_move): Enable basic VLS modes support.
6248         (get_vlmul): Ditto.
6249         (get_ratio): Ditto.
6250         (get_vector_mode): Ditto.
6251         * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
6252         * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
6253         (VLS_ENTRY): New macro.
6254         (riscv_v_ext_mode_p): Add vls modes.
6255         (riscv_get_v_regno_alignment): New function.
6256         (riscv_print_operand): Add vls modes.
6257         (riscv_hard_regno_nregs): Ditto.
6258         (riscv_hard_regno_mode_ok): Ditto.
6259         (riscv_regmode_natural_size): Ditto.
6260         (riscv_vectorize_preferred_vector_alignment): Ditto.
6261         * config/riscv/riscv.md: Ditto.
6262         * config/riscv/vector-iterators.md: Ditto.
6263         * config/riscv/vector.md: Ditto.
6264         * config/riscv/autovec-vls.md: New file.
6265
6266 2023-07-27  Pan Li  <pan2.li@intel.com>
6267
6268         * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
6269         (vread_csr): Ditto.
6270         (vwrite_csr): Ditto.
6271
6272 2023-07-27  demin.han  <demin.han@starfivetech.com>
6273
6274         * config/riscv/autovec.md: Delete which_alternative use in split
6275
6276 2023-07-27  Richard Biener  <rguenther@suse.de>
6277
6278         * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
6279         use a worklist ...
6280         (pass_sink_code::execute): ... in the caller.
6281
6282 2023-07-27  Kewen Lin  <linkw@linux.ibm.com>
6283             Richard Biener  <rguenther@suse.de>
6284
6285         PR tree-optimization/110776
6286         * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
6287         as scalar load.
6288
6289 2023-07-26  Xiao Zeng  <zengxiao@eswincomputing.com>
6290
6291         * config/riscv/riscv.md: Include zicond.md
6292         * config/riscv/zicond.md: New file.
6293
6294 2023-07-26  Xiao Zeng  <zengxiao@eswincomputing.com>
6295
6296         * common/config/riscv/riscv-common.cc: New extension.
6297         * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
6298         (TARGET_ZICOND): New target.
6299
6300 2023-07-26  Carl Love  <cel@us.ibm.com>
6301
6302         * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
6303         specifies the number of built-in arguments to check.
6304         (altivec_resolve_overloaded_builtin): Update calls to find_instance
6305         to pass the number of built-in arguments to be checked.
6306
6307 2023-07-26  David Faust  <david.faust@oracle.com>
6308
6309         * config/bpf/bpf.opt (mv3-atomics): New option.
6310         * config/bpf/bpf.cc (bpf_option_override): Handle it here.
6311         * config/bpf/bpf.h (enum_reg_class): Add R0 class.
6312         (REG_CLASS_NAMES): Likewise.
6313         (REG_CLASS_CONTENTS): Likewise.
6314         (REGNO_REG_CLASS): Handle R0.
6315         * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
6316         (UNSPEC_AAND): New unspec.
6317         (UNSPEC_AOR): Likewise.
6318         (UNSPEC_AXOR): Likewise.
6319         (UNSPEC_AFADD): Likewise.
6320         (UNSPEC_AFAND): Likewise.
6321         (UNSPEC_AFOR): Likewise.
6322         (UNSPEC_AFXOR): Likewise.
6323         (UNSPEC_AXCHG): Likewise.
6324         (UNSPEC_ACMPX): Likewise.
6325         (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
6326         Move to...
6327         * config/bpf/atomic.md: ...Here. New file.
6328         * config/bpf/constraints.md (t): New constraint for R0.
6329         * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
6330
6331 2023-07-26  Matthew Malcomson  <matthew.malcomson@arm.com>
6332
6333         * tree-vect-stmts.cc (get_group_load_store_type): Reformat
6334         comment.
6335
6336 2023-07-26  Carl Love  <cel@us.ibm.com>
6337
6338         * config/rs6000/rs6000-builtins.def: Rename
6339         __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
6340         __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
6341         __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
6342         __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
6343         __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
6344         __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
6345         Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
6346         VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
6347         VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
6348         VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
6349         Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
6350         vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
6351         vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
6352         vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
6353         * config/rs6000/rs6000-c.cc (find_instance): Add case
6354         RS6000_OVLD_VEC_REPLACE_UN.
6355         * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
6356         Fix first argument type.  Rename VREPLACE_UN_UV4SI as
6357         VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
6358         VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
6359         VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
6360         VREPLACE_UN_V2DF as VREPLACE_UN_DF.
6361         * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
6362         REPLACE_ELT_V for vector modes.
6363         (REPLACE_ELT): New scalar mode iterator.
6364         (REPLACE_ELT_char): Add scalar attributes.
6365         (vreplace_un_<mode>): Change iterator and mode attribute.
6366
6367 2023-07-26  David Malcolm  <dmalcolm@redhat.com>
6368
6369         PR analyzer/104940
6370         * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
6371
6372 2023-07-26  Richard Biener  <rguenther@suse.de>
6373
6374         PR tree-optimization/106081
6375         * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
6376         Assign layout -1 to splats.
6377
6378 2023-07-26  Aldy Hernandez  <aldyh@redhat.com>
6379
6380         * range-op-mixed.h (class operator_cast): Add update_bitmask.
6381         * range-op.cc (operator_cast::update_bitmask): New.
6382         (operator_cast::fold_range): Call update_bitmask.
6383
6384 2023-07-26  Li Xu  <xuli1@eswincomputing.com>
6385
6386         * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
6387         scalar type to float16, eliminate warning.
6388         (vfloat16mf4x3_t): Ditto.
6389         (vfloat16mf4x4_t): Ditto.
6390         (vfloat16mf4x5_t): Ditto.
6391         (vfloat16mf4x6_t): Ditto.
6392         (vfloat16mf4x7_t): Ditto.
6393         (vfloat16mf4x8_t): Ditto.
6394         (vfloat16mf2x2_t): Ditto.
6395         (vfloat16mf2x3_t): Ditto.
6396         (vfloat16mf2x4_t): Ditto.
6397         (vfloat16mf2x5_t): Ditto.
6398         (vfloat16mf2x6_t): Ditto.
6399         (vfloat16mf2x7_t): Ditto.
6400         (vfloat16mf2x8_t): Ditto.
6401         (vfloat16m1x2_t): Ditto.
6402         (vfloat16m1x3_t): Ditto.
6403         (vfloat16m1x4_t): Ditto.
6404         (vfloat16m1x5_t): Ditto.
6405         (vfloat16m1x6_t): Ditto.
6406         (vfloat16m1x7_t): Ditto.
6407         (vfloat16m1x8_t): Ditto.
6408         (vfloat16m2x2_t): Ditto.
6409         (vfloat16m2x3_t): Ditto.
6410         (vfloat16m2x4_t): Ditto.
6411         (vfloat16m4x2_t): Ditto.
6412         * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
6413         * config/riscv/vector.md: add tuple mode in attr sew.
6414
6415 2023-07-26  Uros Bizjak  <ubizjak@gmail.com>
6416
6417         PR target/110762
6418         * config/i386/i386.md (plusminusmult): New code iterator.
6419         * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
6420         (movq_<mode>_to_sse): New expander.
6421         (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
6422         subv2sf3 and mulv2sf3 using plusminusmult code iterator.  Rewrite
6423         as a wrapper around V4SFmode operation.
6424         (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
6425         nonimmediate_operand.
6426         (*mmx_addv2sf3): Remove SSE alternatives.  Change operand 1 and
6427         operand 2 predicates to nonimmediate_operand.
6428         (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
6429         (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
6430         (*mmx_subv2sf3): Remove SSE alternatives.  Change operand 1 and
6431         operand 2 predicates to nonimmediate_operand.
6432         (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
6433         nonimmediate_operand.
6434         (*mmx_mulv2sf3): Remove SSE alternatives.  Change operand 1 and
6435         operand 2 predicates to nonimmediate_operand.
6436         (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
6437         (<smaxmin:code>v2sf3): Ditto.
6438         (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
6439         predicates to nonimmediate_operand.
6440         (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives.  Change
6441         operand 1 and operand 2 predicates to nonimmediate_operand.
6442         (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
6443         (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
6444         (*mmx_haddv2sf3_low): Ditto.
6445         (*mmx_hsubv2sf3_low): Ditto.
6446         (vec_addsubv2sf3): Ditto.
6447         (*mmx_maskcmpv2sf3_comm): Remove.
6448         (*mmx_maskcmpv2sf3): Remove.
6449         (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
6450         (vcond<V2FI:mode>v2sf): Ditto.
6451         (fmav2sf4): Ditto.
6452         (fmsv2sf4): Ditto.
6453         (fnmav2sf4): Ditto.
6454         (fnmsv2sf4): Ditto.
6455         (fix_truncv2sfv2si2): Ditto.
6456         (fixuns_truncv2sfv2si2): Ditto.
6457         (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
6458         Change operand 1 predicate to nonimmediate_operand.
6459         (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
6460         (floatunsv2siv2sf2): Ditto.
6461         (mmx_floatv2siv2sf2): Remove SSE alternatives.
6462         Change operand 1 predicate to nonimmediate_operand.
6463         (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
6464         (rintv2sf2): Ditto.
6465         (lrintv2sfv2si2): Ditto.
6466         (ceilv2sf2): Ditto.
6467         (lceilv2sfv2si2): Ditto.
6468         (floorv2sf2): Ditto.
6469         (lfloorv2sfv2si2): Ditto.
6470         (btruncv2sf2): Ditto.
6471         (roundv2sf2): Ditto.
6472         (lroundv2sfv2si2): Ditto.
6473         (*mmx_roundv2sf2): Remove.
6474
6475 2023-07-26  Jose E. Marchesi  <jose.marchesi@oracle.com>
6476
6477         * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
6478
6479 2023-07-26  Richard Biener  <rguenther@suse.de>
6480
6481         PR tree-optimization/110799
6482         * tree-ssa-pre.cc (compute_avail): More thoroughly match
6483         up TBAA behavior of redundant loads.
6484
6485 2023-07-26  Jakub Jelinek  <jakub@redhat.com>
6486
6487         PR tree-optimization/110755
6488         * range-op-float.cc (frange_arithmetic): Change +0 result to -0
6489         for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
6490         it is exact op1 + (-op1) or op1 - op1.
6491
6492 2023-07-26  Kewen Lin  <linkw@linux.ibm.com>
6493
6494         PR target/110741
6495         * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
6496         operands output with "x".
6497
6498 2023-07-26  Aldy Hernandez  <aldyh@redhat.com>
6499
6500         * range-op.cc (class operator_absu): Add update_bitmask.
6501         (operator_absu::update_bitmask): New.
6502
6503 2023-07-26  Aldy Hernandez  <aldyh@redhat.com>
6504
6505         * range-op-mixed.h (class operator_abs): Add update_bitmask.
6506         * range-op.cc (operator_abs::update_bitmask): New.
6507
6508 2023-07-26  Aldy Hernandez  <aldyh@redhat.com>
6509
6510         * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
6511         * range-op.cc (operator_bitwise_not::update_bitmask): New.
6512
6513 2023-07-26  Aldy Hernandez  <aldyh@redhat.com>
6514
6515         * range-op.cc (update_known_bitmask): Handle unary operators.
6516
6517 2023-07-26  Aldy Hernandez  <aldyh@redhat.com>
6518
6519         * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
6520
6521 2023-07-26  Jin Ma  <jinma@linux.alibaba.com>
6522
6523         * config/riscv/riscv.md: Likewise.
6524
6525 2023-07-26  Jan Hubicka  <jh@suse.cz>
6526
6527         * profile-count.cc (profile_count::to_sreal_scale): Value is not know
6528         if we divide by zero.
6529
6530 2023-07-25  David Faust  <david.faust@oracle.com>
6531
6532         * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
6533         enclosing parentheses for pseudo-C dialect.
6534         * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
6535         operands of pseudo-C dialect output templates where needed.
6536         (zero_extendqidi2): Likewise.
6537         (zero_extendsidi2): Likewise.
6538         (*mov<MM:mode>): Likewise.
6539
6540 2023-07-25  Aldy Hernandez  <aldyh@redhat.com>
6541
6542         * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
6543         (bit_value_mult_const): Same.
6544         (get_individual_bits): Same.
6545
6546 2023-07-25  Haochen Gui  <guihaoc@gcc.gnu.org>
6547
6548         PR target/103605
6549         * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
6550         fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
6551         * config/rs6000/rs6000.md (FMINMAX): New int iterator.
6552         (minmax_op): New int attribute.
6553         (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
6554         (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
6555         * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
6556         pattern to fmaxdf3.
6557         (__builtin_vsx_xsmindp): Set pattern to fmindf3.
6558
6559 2023-07-24  David Faust  <david.faust@oracle.com>
6560
6561         * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
6562
6563 2023-07-24  Drew Ross  <drross@redhat.com>
6564             Jakub Jelinek  <jakub@redhat.com>
6565
6566         PR middle-end/109986
6567         * generic-match-head.cc (bitwise_equal_p): New macro.
6568         * gimple-match-head.cc (bitwise_equal_p): New macro.
6569         (gimple_nop_convert): Declare.
6570         (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
6571         * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
6572
6573 2023-07-24  Jeff Law  <jlaw@ventanamicro.com>
6574
6575         * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
6576         single quote rather than backquote in diagnostic.
6577
6578 2023-07-24  Jose E. Marchesi  <jose.marchesi@oracle.com>
6579
6580         PR target/110783
6581         * config/bpf/bpf.opt: New command-line option -msdiv.
6582         * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
6583         * config/bpf/bpf.cc (bpf_option_override): Initialize
6584         bpf_has_sdiv.
6585         * doc/invoke.texi (eBPF Options): Document -msdiv.
6586
6587 2023-07-24  Jeff Law  <jlaw@ventanamicro.com>
6588
6589         * config/riscv/riscv.cc (riscv_option_override): Spell out
6590         greater than and use cannot in diagnostic string.
6591
6592 2023-07-24  Richard Biener  <rguenther@suse.de>
6593
6594         * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
6595         (_slp_tree::vec_stmts): Remove.
6596         (SLP_TREE_VEC_STMTS): Remove.
6597         * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
6598         (_slp_tree::_slp_tree): Adjust.
6599         (_slp_tree::~_slp_tree): Likewise.
6600         (vect_get_slp_vect_def): Simplify.
6601         (vect_get_slp_defs): Likewise.
6602         (vect_transform_slp_perm_load_1): Adjust.
6603         (vect_add_slp_permutation): Likewise.
6604         (vect_schedule_slp_node): Likewise.
6605         (vectorize_slp_instance_root_stmt): Likewise.
6606         (vect_schedule_scc): Likewise.
6607         * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
6608         (vectorizable_call): Likewise.
6609         (vectorizable_call): Likewise.
6610         (vect_create_vectorized_demotion_stmts): Likewise.
6611         (vectorizable_conversion): Likewise.
6612         (vectorizable_assignment): Likewise.
6613         (vectorizable_shift): Likewise.
6614         (vectorizable_operation): Likewise.
6615         (vectorizable_load): Likewise.
6616         (vectorizable_condition): Likewise.
6617         (vectorizable_comparison): Likewise.
6618         * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
6619         (vectorize_fold_left_reduction): Use push_vec_def.
6620         (vect_transform_reduction): Likewise.
6621         (vect_transform_cycle_phi): Likewise.
6622         (vectorizable_lc_phi): Likewise.
6623         (vectorizable_phi): Likewise.
6624         (vectorizable_recurr): Likewise.
6625         (vectorizable_induction): Likewise.
6626         (vectorizable_live_operation): Likewise.
6627
6628 2023-07-24  Richard Biener  <rguenther@suse.de>
6629
6630         * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
6631
6632 2023-07-24  Richard Biener  <rguenther@suse.de>
6633
6634         * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
6635         * config/i386/i386-expand.cc: Likewise.
6636         * config/i386/i386-features.cc: Likewise.
6637         * config/i386/i386-options.cc: Likewise.
6638
6639 2023-07-24  Robin Dapp  <rdapp@ventanamicro.com>
6640
6641         * tree-vect-stmts.cc (vectorizable_conversion): Handle
6642         more demotion/promotion for modifier == NONE.
6643
6644 2023-07-24  Roger Sayle  <roger@nextmovesoftware.com>
6645
6646         PR target/110787
6647         PR target/110790
6648         Revert patch.
6649         * config/i386/i386.md (extv<mode>): Use QImode for offsets.
6650         (extzv<mode>): Likewise.
6651         (insv<mode>): Likewise.
6652         (*testqi_ext_3): Likewise.
6653         (*btr<mode>_2): Likewise.
6654         (define_split): Likewise.
6655         (*btsq_imm): Likewise.
6656         (*btrq_imm): Likewise.
6657         (*btcq_imm): Likewise.
6658         (define_peephole2 x3): Likewise.
6659         (*bt<mode>): Likewise
6660         (*bt<mode>_mask): New define_insn_and_split.
6661         (*jcc_bt<mode>): Use QImode for offsets.
6662         (*jcc_bt<mode>_1): Delete obsolete pattern.
6663         (*jcc_bt<mode>_mask): Use QImode offsets.
6664         (*jcc_bt<mode>_mask_1): Likewise.
6665         (define_split): Likewise.
6666         (*bt<mode>_setcqi): Likewise.
6667         (*bt<mode>_setncqi): Likewise.
6668         (*bt<mode>_setnc<mode>): Likewise.
6669         (*bt<mode>_setncqi_2): Likewise.
6670         (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
6671         (bmi2_bzhi_<mode>3): Use QImode offsets.
6672         (*bmi2_bzhi_<mode>3): Likewise.
6673         (*bmi2_bzhi_<mode>3_1): Likewise.
6674         (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
6675         (@tbm_bextri_<mode>): Likewise.
6676
6677 2023-07-24  Jose E. Marchesi  <jose.marchesi@oracle.com>
6678
6679         * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
6680         * config/bpf/bpf.opt (mkernel): Remove option.
6681         * config/bpf/bpf.cc (bpf_target_macros): Do not define
6682         BPF_KERNEL_VERSION_CODE.
6683
6684 2023-07-24  Jose E. Marchesi  <jose.marchesi@oracle.com>
6685
6686         PR target/110786
6687         * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
6688         (mbswap): New option.
6689         * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
6690         * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
6691         * config/bpf/bpf.md: Use bswap instructions if available for
6692         bswap* insn, and fix constraint.
6693         * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
6694
6695 2023-07-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
6696
6697         * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
6698         (mask_len_fold_left_plus_<mode>): Ditto.
6699         * config/riscv/riscv-protos.h (enum insn_type): New enum.
6700         (enum reduction_type): Ditto.
6701         (expand_reduction): Add in-order reduction.
6702         * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
6703         (expand_reduction): Add in-order reduction.
6704
6705 2023-07-24  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
6706
6707         * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
6708         (vectorize_fold_left_reduction): Ditto.
6709         (vectorizable_reduction): Ditto.
6710         (vect_transform_reduction): Ditto.
6711
6712 2023-07-24  Richard Biener  <rguenther@suse.de>
6713
6714         PR tree-optimization/110777
6715         * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
6716         Avoid propagating abnormals.
6717
6718 2023-07-24  Richard Biener  <rguenther@suse.de>
6719
6720         PR tree-optimization/110766
6721         * tree-scalar-evolution.cc
6722         (analyze_and_compute_bitwise_induction_effect): Check the PHI
6723         is defined in the loop header.
6724
6725 2023-07-24  Kewen Lin  <linkw@linux.ibm.com>
6726
6727         PR tree-optimization/110740
6728         * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
6729         loop with a single scalar iteration.
6730
6731 2023-07-24  Pan Li  <pan2.li@intel.com>
6732
6733         * config/riscv/riscv-vector-builtins-shapes.cc
6734         (struct alu_frm_def): Take range check.
6735
6736 2023-07-22  Vineet Gupta  <vineetg@rivosinc.com>
6737
6738         PR target/110748
6739         * config/riscv/predicates.md (const_0_operand): Add back
6740         const_double.
6741
6742 2023-07-22  Roger Sayle  <roger@nextmovesoftware.com>
6743
6744         * config/i386/i386-expand.cc (ix86_expand_move): Disable the
6745         64-bit insertions into TImode optimizations with -O0, unless
6746         the function has the "naked" attribute (for PR target/110533).
6747
6748 2023-07-22  Andrew Pinski  <apinski@marvell.com>
6749
6750         PR target/110778
6751         * rtl.h (extended_count): Change last argument type
6752         to bool.
6753
6754 2023-07-22  Roger Sayle  <roger@nextmovesoftware.com>
6755
6756         * config/i386/i386.md (extv<mode>): Use QImode for offsets.
6757         (extzv<mode>): Likewise.
6758         (insv<mode>): Likewise.
6759         (*testqi_ext_3): Likewise.
6760         (*btr<mode>_2): Likewise.
6761         (define_split): Likewise.
6762         (*btsq_imm): Likewise.
6763         (*btrq_imm): Likewise.
6764         (*btcq_imm): Likewise.
6765         (define_peephole2 x3): Likewise.
6766         (*bt<mode>): Likewise
6767         (*bt<mode>_mask): New define_insn_and_split.
6768         (*jcc_bt<mode>): Use QImode for offsets.
6769         (*jcc_bt<mode>_1): Delete obsolete pattern.
6770         (*jcc_bt<mode>_mask): Use QImode offsets.
6771         (*jcc_bt<mode>_mask_1): Likewise.
6772         (define_split): Likewise.
6773         (*bt<mode>_setcqi): Likewise.
6774         (*bt<mode>_setncqi): Likewise.
6775         (*bt<mode>_setnc<mode>): Likewise.
6776         (*bt<mode>_setncqi_2): Likewise.
6777         (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
6778         (bmi2_bzhi_<mode>3): Use QImode offsets.
6779         (*bmi2_bzhi_<mode>3): Likewise.
6780         (*bmi2_bzhi_<mode>3_1): Likewise.
6781         (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
6782         (@tbm_bextri_<mode>): Likewise.
6783
6784 2023-07-22  Jeff Law  <jlaw@ventanamicro.com>
6785
6786         * config/bfin/bfin.md (ones): Fix length computation.
6787
6788 2023-07-22  Vladimir N. Makarov  <vmakarov@redhat.com>
6789
6790         * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
6791         (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
6792         instead of FRAME_POINTER_REGNUM to spill pseudos.
6793
6794 2023-07-21  Roger Sayle  <roger@nextmovesoftware.com>
6795             Richard Biener  <rguenther@suse.de>
6796
6797         PR c/110699
6798         * gimplify.cc (gimplify_compound_lval):  If the array's type
6799         is error_mark_node then return GS_ERROR.
6800
6801 2023-07-21  Cupertino Miranda  <cupertino.miranda@oracle.com>
6802
6803         PR target/110770
6804         * config/bpf/bpf.opt: Added option -masm=<dialect>.
6805         * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
6806         * config/bpf/bpf.cc (bpf_print_register): New function.
6807         (bpf_print_register): Support pseudo-c syntax for registers.
6808         (bpf_print_operand_address): Likewise.
6809         * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
6810         (ASSEMBLER_DIALECT): Define.
6811         * config/bpf/bpf.md: Added pseudo-c templates.
6812         * doc/invoke.texi (-masm=): New eBPF option item.
6813
6814 2023-07-21  Cupertino Miranda  <cupertino.miranda@oracle.com>
6815
6816         * config/bpf/bpf.md: fixed template for neg instruction.
6817
6818 2023-07-21  Jan Hubicka  <jh@suse.cz>
6819
6820         PR target/110727
6821         * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
6822         profiles by vectorization factor.
6823         (vect_transform_loop): Check for flat profiles.
6824
6825 2023-07-21  Jan Hubicka  <jh@suse.cz>
6826
6827         * cfgloop.h (maybe_flat_loop_profile): Declare
6828         * cfgloopanal.cc (maybe_flat_loop_profile): New function.
6829         * tree-cfg.cc (print_loop_info): Print info about flat profiles.
6830
6831 2023-07-21  Jan Hubicka  <jh@suse.cz>
6832
6833         * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
6834         * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
6835         * predict.cc (estimate_bb_frequencies): Likewise.
6836         * profile.cc (branch_prob): Likewise.
6837         * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
6838
6839 2023-07-21  Iain Sandoe  <iain@sandoe.co.uk>
6840
6841         * config.in: Regenerate.
6842         * config/darwin.h (DARWIN_LD_DEMANGLE): New.
6843         (LINK_COMMAND_SPEC_A): Add demangle handling.
6844         * configure: Regenerate.
6845         * configure.ac: Detect linker support for '-demangle'.
6846
6847 2023-07-21  Jan Hubicka  <jh@suse.cz>
6848
6849         * sreal.cc (sreal::to_nearest_int): New.
6850         (sreal_verify_basics): Verify also to_nearest_int.
6851         (verify_aritmetics): Likewise.
6852         (sreal_verify_conversions): New.
6853         (sreal_cc_tests): Call sreal_verify_conversions.
6854         * sreal.h: (sreal::to_nearest_int): Declare
6855
6856 2023-07-21  Jan Hubicka  <jh@suse.cz>
6857
6858         * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
6859         (should_duplicate_loop_header_p): Return info on profitability.
6860         (do_while_loop_p): Watch for constant conditionals.
6861         (update_profile_after_ch): Do not sanity check that all
6862         static exits are taken.
6863         (ch_base::copy_headers): Run on all loops.
6864         (pass_ch::process_loop_p): Improve heuristics by handling also
6865         do_while loop and duplicating shortest sequence containing all
6866         winning blocks.
6867
6868 2023-07-21  Jan Hubicka  <jh@suse.cz>
6869
6870         * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
6871         tests first; update finite_p flag.
6872
6873 2023-07-21  Jan Hubicka  <jh@suse.cz>
6874
6875         * cfgloop.cc (flow_loop_dump): Use print_loop_info.
6876         * cfgloop.h (print_loop_info): Declare.
6877         * tree-cfg.cc (print_loop_info): Break out from ...; add
6878         printing of missing fields and profile
6879         (print_loop): ... here.
6880
6881 2023-07-21  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
6882
6883         * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
6884
6885 2023-07-21  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
6886
6887         * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
6888         (vectorizable_operation): Ditto.
6889
6890 2023-07-21  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
6891
6892         * config/riscv/autovec.md: Align order of mask and len.
6893         * config/riscv/riscv-v.cc (expand_load_store): Ditto.
6894         (expand_gather_scatter): Ditto.
6895         * doc/md.texi: Ditto.
6896         * internal-fn.cc (add_len_and_mask_args): Ditto.
6897         (add_mask_and_len_args): Ditto.
6898         (expand_partial_load_optab_fn): Ditto.
6899         (expand_partial_store_optab_fn): Ditto.
6900         (expand_scatter_store_optab_fn): Ditto.
6901         (expand_gather_load_optab_fn): Ditto.
6902         (internal_fn_len_index): Ditto.
6903         (internal_fn_mask_index): Ditto.
6904         (internal_len_load_store_bias): Ditto.
6905         * tree-vect-stmts.cc (vectorizable_store): Ditto.
6906         (vectorizable_load): Ditto.
6907
6908 2023-07-21  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
6909
6910         * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
6911         (mask_len_load<mode><vm>): Ditto.
6912         (len_maskstore<mode><vm>): Ditto.
6913         (mask_len_store<mode><vm>): Ditto.
6914         (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
6915         (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
6916         (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
6917         (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
6918         (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
6919         (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
6920         (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
6921         (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
6922         (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
6923         (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
6924         (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
6925         (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
6926         (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
6927         (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
6928         (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
6929         (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
6930         (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
6931         (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
6932         (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
6933         (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
6934         (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
6935         (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
6936         (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
6937         (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
6938         (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
6939         (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
6940         (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
6941         (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
6942         * doc/md.texi: Ditto.
6943         * genopinit.cc (main): Ditto.
6944         (CMP_NAME): Ditto. Ditto.
6945         * gimple-fold.cc (arith_overflowed_p): Ditto.
6946         (gimple_fold_partial_load_store_mem_ref): Ditto.
6947         (gimple_fold_call): Ditto.
6948         * internal-fn.cc (len_maskload_direct): Ditto.
6949         (mask_len_load_direct): Ditto.
6950         (len_maskstore_direct): Ditto.
6951         (mask_len_store_direct): Ditto.
6952         (expand_call_mem_ref): Ditto.
6953         (expand_len_maskload_optab_fn): Ditto.
6954         (expand_mask_len_load_optab_fn): Ditto.
6955         (expand_len_maskstore_optab_fn): Ditto.
6956         (expand_mask_len_store_optab_fn): Ditto.
6957         (direct_len_maskload_optab_supported_p): Ditto.
6958         (direct_mask_len_load_optab_supported_p): Ditto.
6959         (direct_len_maskstore_optab_supported_p): Ditto.
6960         (direct_mask_len_store_optab_supported_p): Ditto.
6961         (internal_load_fn_p): Ditto.
6962         (internal_store_fn_p): Ditto.
6963         (internal_gather_scatter_fn_p): Ditto.
6964         (internal_fn_len_index): Ditto.
6965         (internal_fn_mask_index): Ditto.
6966         (internal_fn_stored_value_index): Ditto.
6967         (internal_len_load_store_bias): Ditto.
6968         * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
6969         (MASK_LEN_GATHER_LOAD): Ditto.
6970         (LEN_MASK_LOAD): Ditto.
6971         (MASK_LEN_LOAD): Ditto.
6972         (LEN_MASK_SCATTER_STORE): Ditto.
6973         (MASK_LEN_SCATTER_STORE): Ditto.
6974         (LEN_MASK_STORE): Ditto.
6975         (MASK_LEN_STORE): Ditto.
6976         * optabs-query.cc (supports_vec_gather_load_p): Ditto.
6977         (supports_vec_scatter_store_p): Ditto.
6978         * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
6979         (target_supports_len_load_store_p): Ditto.
6980         * optabs.def (OPTAB_CD): Ditto.
6981         * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
6982         (call_may_clobber_ref_p_1): Ditto.
6983         * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
6984         (dse_optimize_stmt): Ditto.
6985         * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
6986         (get_alias_ptr_type_for_ptr_address): Ditto.
6987         * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
6988         * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
6989         * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
6990         (vect_get_strided_load_store_ops): Ditto.
6991         (vectorizable_store): Ditto.
6992         (vectorizable_load): Ditto.
6993
6994 2023-07-21  Haochen Jiang  <haochen.jiang@intel.com>
6995
6996         * config/i386/i386.opt: Fix a typo.
6997
6998 2023-07-21  Richard Biener  <rguenther@suse.de>
6999
7000         PR tree-optimization/88540
7001         * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
7002         with NaNs but handle the simple case by if-converting to a
7003         COND_EXPR.
7004
7005 2023-07-21  Andrew Pinski  <apinski@marvell.com>
7006
7007         * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
7008         transformation.
7009
7010 2023-07-21  Richard Biener  <rguenther@suse.de>
7011
7012         PR tree-optimization/110742
7013         * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
7014         Do not materialize an edge permutation in an external node with
7015         vector defs.
7016         (vect_slp_analyze_node_operations_1): Guard purely internal
7017         nodes better.
7018
7019 2023-07-21  Jan Hubicka  <jh@suse.cz>
7020
7021         * cfgloop.cc: Include sreal.h.
7022         (flow_loop_dump): Dump sreal iteration exsitmate.
7023         (get_estimated_loop_iterations): Update.
7024         * cfgloop.h (expected_loop_iterations_by_profile): Declare.
7025         * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
7026         (expected_loop_iterations_unbounded): Use new API.
7027         * cfgloopmanip.cc (scale_loop_profile): Use
7028         expected_loop_iterations_by_profile
7029         * predict.cc (pass_profile::execute): Likewise.
7030         * profile.cc (branch_prob): Likewise.
7031         * tree-ssa-loop-niter.cc: Include sreal.h.
7032         (estimate_numbers_of_iterations): Likewise
7033
7034 2023-07-21  Kewen Lin  <linkw@linux.ibm.com>
7035
7036         PR tree-optimization/110744
7037         * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
7038         operand for ifn IFN_LEN_STORE.
7039
7040 2023-07-21  liuhongt  <hongtao.liu@intel.com>
7041
7042         PR target/89701
7043         * common.opt: (fcf-protection=): Add EnumSet attribute to
7044         support combination of params.
7045
7046 2023-07-21  David Malcolm  <dmalcolm@redhat.com>
7047
7048         PR middle-end/110612
7049         * text-art/table.cc (table_geometry::table_geometry): Drop m_table
7050         field.
7051         (table_geometry::table_x_to_canvas_x): Add cast to comparison.
7052         (table_geometry::table_y_to_canvas_y): Likewise.
7053         * text-art/table.h (table_geometry::m_table): Drop unused field.
7054         * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
7055         Add "override".
7056
7057 2023-07-20  Uros Bizjak  <ubizjak@gmail.com>
7058
7059         PR target/110717
7060         * config/i386/i386-features.cc
7061         (general_scalar_chain::compute_convert_gain): Calculate gain
7062         for extend higpart case.
7063         (general_scalar_chain::convert_op): Handle
7064         ASHIFTRT/ASHIFT combined RTX.
7065         (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
7066         SImode for SSE2 targets.  Handle ASHIFTRT/ASHIFT combined RTX.
7067         * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
7068         New define_insn_and_split pattern.
7069         (*extendv2di2_highpart_stv): Ditto.
7070
7071 2023-07-20  Vladimir N. Makarov  <vmakarov@redhat.com>
7072
7073         * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
7074         simplification.
7075
7076 2023-07-20  Andrew Pinski  <apinski@marvell.com>
7077
7078         * combine.cc (dump_combine_stats): Remove.
7079         (dump_combine_total_stats): Remove.
7080         (total_attempts, total_merges, total_extras,
7081         total_successes): Remove.
7082         (combine_instructions): Don't increment total stats
7083         instead use statistics_counter_event.
7084         * dumpfile.cc (print_combine_total_stats): Remove.
7085         * dumpfile.h (print_combine_total_stats): Remove.
7086         (dump_combine_total_stats): Remove.
7087         * passes.cc (finish_optimization_passes):
7088         Don't call print_combine_total_stats.
7089         * rtl.h (dump_combine_total_stats): Remove.
7090         (dump_combine_stats): Remove.
7091
7092 2023-07-20  Jan Hubicka  <jh@suse.cz>
7093
7094         * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
7095         logical ops.
7096
7097 2023-07-20  Martin Jambor  <mjambor@suse.cz>
7098
7099         * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
7100         (analyzer-text-art-ideal-canvas-width): Likewise.
7101         (analyzer-text-art-string-ellipsis-head-len): Likewise.
7102         (analyzer-text-art-string-ellipsis-tail-len): Likewise.
7103
7104 2023-07-20  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
7105
7106         * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
7107         Refine code structure.
7108
7109 2023-07-20  Jan Hubicka  <jh@suse.cz>
7110
7111         * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
7112         (get_range_query): ... this one; do
7113         (static_loop_exit): Add query parametr, turn ranger to reference.
7114         (loop_static_stmt_p): New function.
7115         (loop_static_op_p): New function.
7116         (loop_iv_derived_p): Remove.
7117         (loop_combined_static_and_iv_p): New function.
7118         (should_duplicate_loop_header_p): Discover combined onditionals;
7119         do not track iv derived; improve dumps.
7120         (pass_ch::execute): Fix whitespace.
7121
7122 2023-07-20  Richard Biener  <rguenther@suse.de>
7123
7124         PR tree-optimization/110204
7125         * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
7126         Look through copies generated by PRE.
7127
7128 2023-07-20  Matthew Malcomson  <matthew.malcomson@arm.com>
7129
7130         * tree-vect-stmts.cc (get_group_load_store_type): Account for
7131         `gap` when checking if need to peel twice.
7132
7133 2023-07-20  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
7134
7135         PR middle-end/77928
7136         * doc/extend.texi: Document iseqsig builtin.
7137         * builtins.cc (fold_builtin_iseqsig): New function.
7138         (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
7139         (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
7140         * builtins.def (BUILT_IN_ISEQSIG): New built-in.
7141
7142 2023-07-20  Pan Li  <pan2.li@intel.com>
7143
7144         * config/riscv/vector.md: Fix incorrect match_operand.
7145
7146 2023-07-20  Roger Sayle  <roger@nextmovesoftware.com>
7147
7148         * config/i386/i386-expand.cc (ix86_expand_move): Don't call
7149         force_reg, to use SUBREG rather than create a new pseudo when
7150         inserting DFmode fields into TImode with insvti_{high,low}part.
7151         * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
7152         define_insn_and_split...
7153         (*concatditi3_3): 64-bit implementation.  Provide alternative
7154         that allows register allocation to use SSE registers that is
7155         split into vec_concatv2di after reload.
7156         (*concatsidi3_3): 32-bit implementation.
7157
7158 2023-07-20  Richard Biener  <rguenther@suse.de>
7159
7160         PR middle-end/61747
7161         * internal-fn.cc (expand_vec_cond_optab_fn): When the
7162         value operands are equal to the original comparison operands
7163         preserve that equality by re-using the comparison expansion.
7164         * optabs.cc (emit_conditional_move): When the value operands
7165         are equal to the comparison operands and would be forced to
7166         a register by prepare_cmp_insn do so earlier, preserving the
7167         equality.
7168
7169 2023-07-20  Pan Li  <pan2.li@intel.com>
7170
7171         * config/riscv/vector.md: Align pattern format.
7172
7173 2023-07-20  Haochen Jiang  <haochen.jiang@intel.com>
7174
7175         * doc/invoke.texi: Remove AVX512VP2INTERSECT in
7176         Granite Rapids{, D} from documentation.
7177
7178 2023-07-20  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
7179
7180         * config/riscv/autovec.md
7181         (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
7182         Refactor RVV machine modes.
7183         (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
7184         (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
7185         (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
7186         (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
7187         (len_mask_gather_load<mode><mode>): Ditto.
7188         (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
7189         (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
7190         (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
7191         (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
7192         (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
7193         (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
7194         (len_mask_scatter_store<mode><mode>): Ditto.
7195         (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
7196         * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
7197         (ADJUST_NUNITS): Ditto.
7198         (ADJUST_ALIGNMENT): Ditto.
7199         (ADJUST_BYTESIZE): Ditto.
7200         (ADJUST_PRECISION): Ditto.
7201         (RVV_MODES): Ditto.
7202         (RVV_WHOLE_MODES): Ditto.
7203         (RVV_FRACT_MODE): Ditto.
7204         (RVV_NF8_MODES): Ditto.
7205         (RVV_NF4_MODES): Ditto.
7206         (VECTOR_MODES_WITH_PREFIX): Ditto.
7207         (VECTOR_MODE_WITH_PREFIX): Ditto.
7208         (RVV_TUPLE_MODES): Ditto.
7209         (RVV_NF2_MODES): Ditto.
7210         (RVV_TUPLE_PARTIAL_MODES): Ditto.
7211         * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
7212         (ENTRY): Ditto.
7213         (TUPLE_ENTRY): Ditto.
7214         (get_vlmul): Ditto.
7215         (get_nf): Ditto.
7216         (get_ratio): Ditto.
7217         (preferred_simd_mode): Ditto.
7218         (autovectorize_vector_modes): Ditto.
7219         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
7220         * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
7221         (vbool64_t): Ditto.
7222         (vbool32_t): Ditto.
7223         (vbool16_t): Ditto.
7224         (vbool8_t): Ditto.
7225         (vbool4_t): Ditto.
7226         (vbool2_t): Ditto.
7227         (vbool1_t): Ditto.
7228         (vint8mf8_t): Ditto.
7229         (vuint8mf8_t): Ditto.
7230         (vint8mf4_t): Ditto.
7231         (vuint8mf4_t): Ditto.
7232         (vint8mf2_t): Ditto.
7233         (vuint8mf2_t): Ditto.
7234         (vint8m1_t): Ditto.
7235         (vuint8m1_t): Ditto.
7236         (vint8m2_t): Ditto.
7237         (vuint8m2_t): Ditto.
7238         (vint8m4_t): Ditto.
7239         (vuint8m4_t): Ditto.
7240         (vint8m8_t): Ditto.
7241         (vuint8m8_t): Ditto.
7242         (vint16mf4_t): Ditto.
7243         (vuint16mf4_t): Ditto.
7244         (vint16mf2_t): Ditto.
7245         (vuint16mf2_t): Ditto.
7246         (vint16m1_t): Ditto.
7247         (vuint16m1_t): Ditto.
7248         (vint16m2_t): Ditto.
7249         (vuint16m2_t): Ditto.
7250         (vint16m4_t): Ditto.
7251         (vuint16m4_t): Ditto.
7252         (vint16m8_t): Ditto.
7253         (vuint16m8_t): Ditto.
7254         (vint32mf2_t): Ditto.
7255         (vuint32mf2_t): Ditto.
7256         (vint32m1_t): Ditto.
7257         (vuint32m1_t): Ditto.
7258         (vint32m2_t): Ditto.
7259         (vuint32m2_t): Ditto.
7260         (vint32m4_t): Ditto.
7261         (vuint32m4_t): Ditto.
7262         (vint32m8_t): Ditto.
7263         (vuint32m8_t): Ditto.
7264         (vint64m1_t): Ditto.
7265         (vuint64m1_t): Ditto.
7266         (vint64m2_t): Ditto.
7267         (vuint64m2_t): Ditto.
7268         (vint64m4_t): Ditto.
7269         (vuint64m4_t): Ditto.
7270         (vint64m8_t): Ditto.
7271         (vuint64m8_t): Ditto.
7272         (vfloat16mf4_t): Ditto.
7273         (vfloat16mf2_t): Ditto.
7274         (vfloat16m1_t): Ditto.
7275         (vfloat16m2_t): Ditto.
7276         (vfloat16m4_t): Ditto.
7277         (vfloat16m8_t): Ditto.
7278         (vfloat32mf2_t): Ditto.
7279         (vfloat32m1_t): Ditto.
7280         (vfloat32m2_t): Ditto.
7281         (vfloat32m4_t): Ditto.
7282         (vfloat32m8_t): Ditto.
7283         (vfloat64m1_t): Ditto.
7284         (vfloat64m2_t): Ditto.
7285         (vfloat64m4_t): Ditto.
7286         (vfloat64m8_t): Ditto.
7287         * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
7288         (TUPLE_ENTRY): Ditto.
7289         * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
7290         * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
7291         (riscv_v_adjust_nunits): Ditto.
7292         (riscv_v_adjust_bytesize): Ditto.
7293         (riscv_v_adjust_precision): Ditto.
7294         (riscv_convert_vector_bits): Ditto.
7295         * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
7296         * config/riscv/riscv.md: Ditto.
7297         * config/riscv/vector-iterators.md: Ditto.
7298         * config/riscv/vector.md
7299         (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
7300         (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
7301         (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
7302         (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
7303         (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
7304         (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
7305         (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
7306         (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
7307         (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
7308         (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
7309         (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
7310         (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
7311         (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
7312         (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
7313         (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
7314         (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
7315         (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
7316         (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
7317         (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
7318         (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
7319         (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
7320         (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
7321         (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
7322         (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
7323         (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
7324         (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
7325         (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
7326         (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
7327         (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
7328         (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
7329         (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
7330         (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
7331         (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
7332
7333 2023-07-19  Vladimir N. Makarov  <vmakarov@redhat.com>
7334
7335         * lra-int.h (lra_update_fp2sp_elimination): New prototype.
7336         (lra_asm_insn_error): New prototype.
7337         * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
7338         existence.
7339         (lra_spill): Call lra_update_fp2sp_elimination.
7340         * lra-eliminations.cc: Remove trailing spaces.
7341         (elimination_fp2sp_occured_p): New static flag.
7342         (lra_eliminate_regs_1): Set the flag up.
7343         (update_reg_eliminate): Modify the assert for stack to frame
7344         pointer elimination.
7345         (lra_update_fp2sp_elimination): New function.
7346         (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
7347
7348 2023-07-19  Andrew Carlotti  <andrew.carlotti@arm.com>
7349
7350         * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
7351         dependency.
7352         * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
7353         dependencies from target pragmas.
7354         * config/aarch64/arm_fp16.h (target): Likewise.
7355         * config/aarch64/arm_neon.h (target): Likewise.
7356
7357 2023-07-19  Andrew Pinski  <apinski@marvell.com>
7358
7359         PR tree-optimization/110252
7360         * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
7361         (auto_flow_sensitive::auto_flow_sensitive): New constructor.
7362         (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
7363         (match_simplify_replacement): Temporarily
7364         remove the flow sensitive info on the two statements that might
7365         be moved.
7366
7367 2023-07-19  Andrew Pinski  <apinski@marvell.com>
7368
7369         * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
7370         with flow_sensitive_info_storage.
7371         (follow_outer_ssa_edges): Update how to save off the flow
7372         sensitive info.
7373         (maybe_fold_comparisons_from_match_pd): Update restoring
7374         of flow sensitive info.
7375         * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
7376         (flow_sensitive_info_storage::restore): New method.
7377         (flow_sensitive_info_storage::save_and_clear): New method.
7378         (flow_sensitive_info_storage::clear_storage): New method.
7379         * tree-ssanames.h (class flow_sensitive_info_storage): New class.
7380
7381 2023-07-19  Andrew Pinski  <apinski@marvell.com>
7382
7383         PR tree-optimization/110726
7384         * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
7385         Add checks to make sure the type was one bit precision
7386         intergal type.
7387
7388 2023-07-19  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
7389
7390         * doc/md.texi: Add mask_len_fold_left_plus.
7391         * internal-fn.cc (mask_len_fold_left_direct): Ditto.
7392         (expand_mask_len_fold_left_optab_fn): Ditto.
7393         (direct_mask_len_fold_left_optab_supported_p): Ditto.
7394         * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
7395         * optabs.def (OPTAB_D): Ditto.
7396
7397 2023-07-19  Jakub Jelinek  <jakub@redhat.com>
7398
7399         * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
7400
7401 2023-07-19  Jakub Jelinek  <jakub@redhat.com>
7402
7403         PR tree-optimization/110731
7404         * wide-int.cc (wi::divmod_internal): Always unpack dividend and
7405         divisor as UNSIGNED regardless of sgn.
7406
7407 2023-07-19  Lehua Ding  <lehua.ding@rivai.ai>
7408
7409         * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
7410         (standard_extensions_p): Add check.
7411         (riscv_subset_list::add): Just return NULL if it failed before.
7412         (riscv_subset_list::parse_std_ext): Continue parse when find a error
7413         (riscv_subset_list::parse): Just return NULL if it failed before.
7414         * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
7415
7416 2023-07-19  Jan Beulich  <jbeulich@suse.com>
7417
7418         * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
7419         Use gen_vec_set_0.
7420         (ix86_expand_vector_extract): Use gen_vec_extract_lo /
7421         gen_vec_extract_hi.
7422         (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
7423         gen_vec_interleave_low. Rename local variable.
7424
7425 2023-07-19  Jan Beulich  <jbeulich@suse.com>
7426
7427         * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
7428         alternative. Move AVX512VL part of condition to new "enabled"
7429         attribute.
7430
7431 2023-07-19  liuhongt  <hongtao.liu@intel.com>
7432
7433         PR target/109504
7434         * config/i386/i386-builtins.cc
7435         (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
7436         (ix86_register_bf16_builtin_type): Ditto.
7437         * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
7438         isn't available, undef the macros which are used to check the
7439         backend support of the _Float16/__bf16 types when building
7440         libstdc++ and libgcc.
7441         * config/i386/i386.cc (construct_container): Issue errors for
7442         HFmode/BFmode when TARGET_SSE2 is not available.
7443         (function_value_32): Ditto.
7444         (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
7445         (ix86_libgcc_floating_mode_supported_p): Ditto.
7446         (ix86_emit_support_tinfos): Adjust codes.
7447         (ix86_invalid_conversion): Return diagnostic message string
7448         when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
7449         (ix86_invalid_unary_op): New function.
7450         (ix86_invalid_binary_op): Ditto.
7451         (TARGET_INVALID_UNARY_OP): Define.
7452         (TARGET_INVALID_BINARY_OP): Define.
7453         * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
7454         related instrinsics header files.
7455         * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
7456
7457 2023-07-18  Uros Bizjak  <ubizjak@gmail.com>
7458
7459         * dwarf2asm.cc: Change FALSE to false.
7460         * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
7461         * dwarf2out.cc (matches_main_base): Change return type from
7462         int to bool.  Change "last_match" variable to bool.
7463         (dump_struct_debug): Change return type from int to bool.
7464         Change "matches" and "result" function arguments to bool.
7465         (is_pseudo_reg): Change return type from int to bool.
7466         (is_tagged_type): Ditto.
7467         (same_loc_p): Ditto.
7468         (same_dw_val_p): Change return type from int to bool and adjust
7469         function body accordingly.
7470         (same_attr_p): Ditto.
7471         (same_die_p): Ditto.
7472         (is_type_die): Ditto.
7473         (is_declaration_die): Ditto.
7474         (should_move_die_to_comdat): Ditto.
7475         (is_base_type): Ditto.
7476         (is_based_loc): Ditto.
7477         (local_scope_p): Ditto.
7478         (class_scope_p): Ditto.
7479         (class_or_namespace_scope_p): Ditto.
7480         (is_tagged_type): Ditto.
7481         (is_rust): Use void argument.
7482         (is_nested_in_subprogram): Change return type from int to bool.
7483         (contains_subprogram_definition): Ditto.
7484         (gen_struct_or_union_type_die): Change "nested", "complete"
7485         and "ns_decl" variables to bool.
7486         (is_naming_typedef_decl): Change FALSE to false.
7487
7488 2023-07-18  Jan Hubicka  <jh@suse.cz>
7489
7490         * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
7491         for queries not in headers.
7492         (static_loop_exit): Add basic blck parameter; update use of
7493         edge_range_query
7494         (should_duplicate_loop_header_p): Add ranger and static_exits
7495         parameter.  Do not account statements that will be optimized
7496         out after duplicaiton in overall size. Add ranger query to
7497         find static exits.
7498         (update_profile_after_ch):  Take static_exits has set instead of
7499         single eliminated_edge.
7500         (ch_base::copy_headers): Do all analysis in the first pass;
7501         remember invariant_exits and static_exits.
7502
7503 2023-07-18  Jason Merrill  <jason@redhat.com>
7504
7505         * fold-const.cc (native_interpret_aggregate): Skip empty fields.
7506
7507 2023-07-18  Gaius Mulley  <gaiusmod2@gmail.com>
7508
7509         * doc/gm2.texi (Semantic checking): Change example testwithptr
7510         to testnew6.
7511
7512 2023-07-18  Richard Biener  <rguenther@suse.de>
7513
7514         PR middle-end/105715
7515         * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
7516         (pass_gimple_isel::execute): ... this.  Duplicate
7517         comparison defs of COND_EXPRs.
7518
7519 2023-07-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
7520
7521         * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
7522         * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
7523         (riscv_convert_vector_bits): Ditto.
7524
7525 2023-07-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
7526
7527         * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
7528         * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
7529
7530 2023-07-18  Juergen Christ  <jchrist@linux.ibm.com>
7531
7532         * config/s390/vx-builtins.md: New vsel pattern.
7533
7534 2023-07-18  liuhongt  <hongtao.liu@intel.com>
7535
7536         PR target/110438
7537         * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
7538         Remove # from assemble output.
7539
7540 2023-07-18  liuhongt  <hongtao.liu@intel.com>
7541
7542         PR target/110591
7543         * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
7544         to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
7545         3 define_peephole2 after the pattern.
7546
7547 2023-07-18  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
7548
7549         * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
7550
7551 2023-07-18  Pan Li  <pan2.li@intel.com>
7552             Juzhe-Zhong  <juzhe.zhong@rivai.ai>
7553
7554         * config/riscv/riscv.cc (struct machine_function): Add new field.
7555         (riscv_static_frm_mode_p): New function.
7556         (riscv_emit_frm_mode_set): New function for emit FRM.
7557         (riscv_emit_mode_set): Extract function for FRM.
7558         (riscv_mode_needed): Fix the TODO.
7559         (riscv_mode_entry): Initial dynamic frm RTL.
7560         (riscv_mode_exit): Return DYN_EXIT.
7561         * config/riscv/riscv.md: Add rdfrm.
7562         * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
7563         * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
7564         (fsrm): Removed.
7565         (fsrmsi_backup): New pattern for swap.
7566         (fsrmsi_restore): New pattern for restore.
7567         (fsrmsi_restore_exit): New pattern for restore exit.
7568         (frrmsi): New pattern for backup.
7569
7570 2023-07-17  Arsen Arsenović  <arsen@aarsen.me>
7571
7572         * doc/extend.texi: Add @cindex on __auto_type.
7573
7574 2023-07-17  Uros Bizjak  <ubizjak@gmail.com>
7575
7576         * combine-stack-adj.cc (stack_memref_p): Change return type from
7577         int to bool and adjust function body accordingly.
7578         (rest_of_handle_stack_adjustments): Change return type to void.
7579
7580 2023-07-17  Uros Bizjak  <ubizjak@gmail.com>
7581
7582         * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
7583         (cant_combine_insn_p): Change return type from int to bool and adjust
7584         function body accordingly.
7585         (can_combine_p): Ditto.
7586         (combinable_i3pat): Ditto.  Change "i1_not_in_src" and "i0_not_in_src"
7587         function arguments from int to bool.
7588         (contains_muldiv): Change return type from int to bool and adjust
7589         function body accordingly.
7590         (try_combine): Ditto. Change "new_direct_jump" pointer function
7591         argument from int to bool.  Change "substed_i2", "substed_i1",
7592         "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
7593         "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
7594         "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
7595         "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
7596         "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
7597         "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
7598         from int to bool.
7599         (subst): Change "in_dest", "in_cond" and "unique_copy" function
7600         arguments from int to bool.
7601         (combine_simplify_rtx): Change "in_dest" and "in_cond" function
7602         arguments from int to bool.
7603         (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
7604         function argument from int to bool.
7605         (force_int_to_mode): Change "just_select" function argument
7606         from int to bool.  Change "next_select" variable to bool.
7607         (rtx_equal_for_field_assignment_p): Change return type from
7608         int to bool and adjust function body accordingly.
7609         (merge_outer_ops): Ditto.  Change "pcomp_p" pointer function
7610         argument from int to bool.
7611         (get_last_value_validate): Change return type from int to bool
7612         and adjust function body accordingly.
7613         (reg_dead_at_p): Ditto.
7614         (reg_bitfield_target_p): Ditto.
7615         (combine_instructions): Ditto.  Change "new_direct_jump"
7616         variable to bool.
7617         (can_combine_p): Change return type from int to bool
7618         and adjust function body accordingly.
7619         (likely_spilled_retval_p): Ditto.
7620         (can_change_dest_mode): Change "added_sets" function argument
7621         from int to bool.
7622         (find_split_point): Change "unsignedp" variable to bool.
7623         (simplify_if_then_else): Change "comparison_p" and "swapped"
7624         variables to bool.
7625         (simplify_set): Change "other_changed" variable to bool.
7626         (expand_compound_operation): Change "unsignedp" variable to bool.
7627         (force_to_mode): Change "just_select" function argument
7628         from int to bool.  Change "next_select" variable to bool.
7629         (extended_count): Change "unsignedp" function argument to bool.
7630         (simplify_shift_const_1): Change "complement_p" variable to bool.
7631         (simplify_comparison): Change "changed" variable to bool.
7632         (rest_of_handle_combine): Change return type to void.
7633
7634 2023-07-17  Andre Vieira  <andre.simoesdiasvieira@arm.com>
7635
7636         PR plugins/110610
7637         * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
7638
7639 2023-07-17  Senthil Kumar Selvaraj  <saaadhu@gcc.gnu.org>
7640
7641         * ira.cc (setup_reg_class_relations): Continue
7642         if regclass cl3 is hard_reg_set_empty_p.
7643
7644 2023-07-17  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
7645
7646         * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
7647
7648 2023-07-17  Martin Jambor  <mjambor@suse.cz>
7649
7650         * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
7651         entry_count.
7652
7653 2023-07-17  Aldy Hernandez  <aldyh@redhat.com>
7654
7655         * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
7656
7657 2023-07-17  Lehua Ding  <lehua.ding@rivai.ai>
7658
7659         PR target/110696
7660         * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
7661         recur add all implied extensions.
7662         (riscv_subset_list::check_implied_ext): Add new method.
7663         (riscv_subset_list::parse): Call checker check_implied_ext.
7664         * config/riscv/riscv-subset.h: Add new method.
7665
7666 2023-07-17  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
7667
7668         * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
7669         (reduc_smax_scal_<mode>): Ditto.
7670         (reduc_umax_scal_<mode>): Ditto.
7671         (reduc_smin_scal_<mode>): Ditto.
7672         (reduc_umin_scal_<mode>): Ditto.
7673         (reduc_and_scal_<mode>): Ditto.
7674         (reduc_ior_scal_<mode>): Ditto.
7675         (reduc_xor_scal_<mode>): Ditto.
7676         * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
7677         (expand_reduction): New function.
7678         * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
7679         (emit_vlmax_fp_reduction_insn): Ditto.
7680         (get_m1_mode): Ditto.
7681         (expand_cond_len_binop): Fix name.
7682         (expand_reduction): New function
7683         * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
7684         (validate_change_or_fail): New function.
7685         (change_insn): Fix VSETVL BUG.
7686         (change_vsetvl_insn): Ditto.
7687         (pass_vsetvl::backward_demand_fusion): Ditto.
7688         (pass_vsetvl::df_post_optimization): Ditto.
7689
7690 2023-07-17  Aldy Hernandez  <aldyh@redhat.com>
7691
7692         * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
7693
7694 2023-07-17  Christoph Müllner  <christoph.muellner@vrull.eu>
7695
7696         * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
7697         Remove parameter name from declaration of unused parameter.
7698
7699 2023-07-17  Kewen Lin  <linkw@linux.ibm.com>
7700
7701         PR tree-optimization/110652
7702         * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
7703         NULL_TREE.
7704
7705 2023-07-17  Richard Biener  <rguenther@suse.de>
7706
7707         PR tree-optimization/110669
7708         * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
7709         Check we matched a header PHI.
7710
7711 2023-07-17  Aldy Hernandez  <aldyh@redhat.com>
7712
7713         * tree-ssanames.cc (set_bitmask): New.
7714         * tree-ssanames.h (set_bitmask): New.
7715
7716 2023-07-17  Aldy Hernandez  <aldyh@redhat.com>
7717
7718         * value-range.cc (irange_bitmask::verify_mask): Mask need not be
7719         normalized.
7720         * value-range.h (irange_bitmask::union_): Normalize beforehand.
7721         (irange_bitmask::intersect): Same.
7722
7723 2023-07-17  Andrew Pinski  <apinski@marvell.com>
7724
7725         PR tree-optimization/95923
7726         * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
7727
7728 2023-07-17  Roger Sayle  <roger@nextmovesoftware.com>
7729
7730         * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
7731         to the std::sort comparison lambda function const.
7732
7733 2023-07-17  Andrew Pinski  <apinski@marvell.com>
7734
7735         PR tree-optimization/110666
7736         * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
7737
7738 2023-07-17  Mo, Zewei  <zewei.mo@intel.com>
7739
7740         * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
7741         Arrow Lake and Arrow Lake S.
7742         * common/config/i386/i386-common.cc:
7743         (processor_name): Add arrowlake.
7744         (processor_alias_table): Add arrow lake, arrow lake s and lunar
7745         lake.
7746         * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
7747         Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
7748         * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
7749         * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
7750         arrowlake-s.
7751         * config/i386/i386-c.cc (ix86_target_macros_internal): Add
7752         arrowlake.
7753         * config/i386/i386-options.cc (m_ARROWLAKE): New.
7754         (processor_cost_table): Add arrowlake.
7755         * config/i386/i386.h (enum processor_type):
7756         Add PROCESSOR_ARROWLAKE.
7757         * config/i386/x86-tune.def: Add m_ARROWLAKE.
7758         * doc/extend.texi: Add arrowlake and arrowlake-s.
7759         * doc/invoke.texi: Ditto.
7760
7761 2023-07-17  Haochen Jiang  <haochen.jiang@intel.com>
7762
7763         * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
7764         have the same iterator. Also renaming all the occurence to
7765         VI2_AVX2_AVX512BW.
7766         (usdot_prod<mode>): New define_expand.
7767         (udot_prod<mode>): Ditto.
7768
7769 2023-07-17  Haochen Jiang  <haochen.jiang@intel.com>
7770
7771         * common/config/i386/cpuinfo.h (get_available_features):
7772         Detech SM4.
7773         * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
7774         OPTION_MASK_ISA2_SM4_UNSET): New.
7775         (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
7776         (ix86_handle_option): Handle -msm4.
7777         * common/config/i386/i386-cpuinfo.h (enum processor_features):
7778         Add FEATURE_SM4.
7779         * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
7780         sm4.
7781         * config.gcc: Add sm4intrin.h.
7782         * config/i386/cpuid.h (bit_SM4): New.
7783         * config/i386/i386-builtin.def (BDESC): Add new builtins.
7784         * config/i386/i386-c.cc (ix86_target_macros_internal): Define
7785         __SM4__.
7786         * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
7787         * config/i386/i386-options.cc (isa2_opts): Add -msm4.
7788         (ix86_valid_target_attribute_inner_p): Handle sm4.
7789         * config/i386/i386.opt: Add option -msm4.
7790         * config/i386/immintrin.h: Include sm4intrin.h
7791         * config/i386/sse.md (vsm4key4_<mode>): New define insn.
7792         (vsm4rnds4_<mode>): Ditto.
7793         * doc/extend.texi: Document sm4.
7794         * doc/invoke.texi: Document -msm4.
7795         * doc/sourcebuild.texi: Document target sm4.
7796         * config/i386/sm4intrin.h: New file.
7797
7798 2023-07-17  Haochen Jiang  <haochen.jiang@intel.com>
7799
7800         * common/config/i386/cpuinfo.h (get_available_features):
7801         Detect SHA512.
7802         * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
7803         OPTION_MASK_ISA2_SHA512_UNSET): New.
7804         (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
7805         (ix86_handle_option): Handle -msha512.
7806         * common/config/i386/i386-cpuinfo.h (enum processor_features):
7807         Add FEATURE_SHA512.
7808         * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
7809         sha512.
7810         * config.gcc: Add sha512intrin.h.
7811         * config/i386/cpuid.h (bit_SHA512): New.
7812         * config/i386/i386-builtin-types.def:
7813         Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
7814         * config/i386/i386-builtin.def (BDESC): Add new builtins.
7815         * config/i386/i386-c.cc (ix86_target_macros_internal): Define
7816         __SHA512__.
7817         * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
7818         V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
7819         * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
7820         * config/i386/i386-options.cc (isa2_opts): Add -msha512.
7821         (ix86_valid_target_attribute_inner_p): Handle sha512.
7822         * config/i386/i386.opt: Add option -msha512.
7823         * config/i386/immintrin.h: Include sha512intrin.h.
7824         * config/i386/sse.md (vsha512msg1): New define insn.
7825         (vsha512msg2): Ditto.
7826         (vsha512rnds2): Ditto.
7827         * doc/extend.texi: Document sha512.
7828         * doc/invoke.texi: Document -msha512.
7829         * doc/sourcebuild.texi: Document target sha512.
7830         * config/i386/sha512intrin.h: New file.
7831
7832 2023-07-17  Haochen Jiang  <haochen.jiang@intel.com>
7833
7834         * common/config/i386/cpuinfo.h (get_available_features):
7835         Detect SM3.
7836         * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
7837         OPTION_MASK_ISA2_SM3_UNSET): New.
7838         (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
7839         (ix86_handle_option): Handle -msm3.
7840         * common/config/i386/i386-cpuinfo.h (enum processor_features):
7841         Add FEATURE_SM3.
7842         * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
7843         SM3.
7844         * config.gcc: Add sm3intrin.h
7845         * config/i386/cpuid.h (bit_SM3): New.
7846         * config/i386/i386-builtin-types.def:
7847         Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
7848         * config/i386/i386-builtin.def (BDESC): Add new builtins.
7849         * config/i386/i386-c.cc (ix86_target_macros_internal): Define
7850         __SM3__.
7851         * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
7852         V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
7853         * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
7854         * config/i386/i386-options.cc (isa2_opts): Add -msm3.
7855         (ix86_valid_target_attribute_inner_p): Handle sm3.
7856         * config/i386/i386.opt: Add option -msm3.
7857         * config/i386/immintrin.h: Include sm3intrin.h.
7858         * config/i386/sse.md (vsm3msg1): New define insn.
7859         (vsm3msg2): Ditto.
7860         (vsm3rnds2): Ditto.
7861         * doc/extend.texi: Document sm3.
7862         * doc/invoke.texi: Document -msm3.
7863         * doc/sourcebuild.texi: Document target sm3.
7864         * config/i386/sm3intrin.h: New file.
7865
7866 2023-07-17  Kong Lingling  <lingling.kong@intel.com>
7867             Haochen Jiang  <haochen.jiang@intel.com>
7868
7869         * common/config/i386/cpuinfo.h (get_available_features): Detect
7870         avxvnniint16.
7871         * common/config/i386/i386-common.cc
7872         (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
7873         (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
7874         (ix86_handle_option): Handle -mavxvnniint16.
7875         * common/config/i386/i386-cpuinfo.h (enum processor_features):
7876         Add FEATURE_AVXVNNIINT16.
7877         * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
7878         avxvnniint16.
7879         * config.gcc: Add avxvnniint16.h.
7880         * config/i386/avxvnniint16intrin.h: New file.
7881         * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
7882         * config/i386/i386-builtin.def: Add new builtins.
7883         * config/i386/i386-c.cc (ix86_target_macros_internal): Define
7884         __AVXVNNIINT16__.
7885         * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
7886         (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
7887         * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
7888         * config/i386/i386.opt: Add option -mavxvnniint16.
7889         * config/i386/immintrin.h: Include avxvnniint16.h.
7890         * config/i386/sse.md
7891         (vpdp<vpdpwprodtype>_<mode>): New define_insn.
7892         * doc/extend.texi: Document avxvnniint16.
7893         * doc/invoke.texi: Document -mavxvnniint16.
7894         * doc/sourcebuild.texi: Document target avxvnniint16.
7895
7896 2023-07-16  Jan Hubicka  <jh@suse.cz>
7897
7898         PR middle-end/110649
7899         * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
7900         (vect_transform_loop): Move scale_profile_for_vect_loop after
7901         upper bound updates.
7902
7903 2023-07-16  Jan Hubicka  <jh@suse.cz>
7904
7905         PR tree-optimization/110649
7906         * tree-vect-loop.cc (optimize_mask_stores): Set correctly
7907         probability of the if-then-else construct.
7908
7909 2023-07-16  Jan Hubicka  <jh@suse.cz>
7910
7911         PR middle-end/110649
7912         * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
7913
7914 2023-07-15  Andrew Pinski  <apinski@marvell.com>
7915
7916         * doc/contrib.texi: Update my entry.
7917
7918 2023-07-15  John David Anglin  <danglin@gcc.gnu.org>
7919
7920         * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
7921         R27_REGNUM.
7922         (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
7923         (tld_load): Likewise.
7924         (tgd_load_pic): Change to expander.
7925         (tld_load_pic, tld_offset_load, tp_load): Likewise.
7926         (tie_load_pic, tle_load): Likewise.
7927         (tgd_load_picsi, tgd_load_picdi): New.
7928         (tld_load_picsi, tld_load_picdi): New.
7929         (tld_offset_load<P:mode>): New.
7930         (tp_load<P:mode>): New.
7931         (tie_load_picsi, tie_load_picdi): New.
7932         (tle_load<P:mode>): New.
7933
7934 2023-07-14  Christophe Lyon  <christophe.lyon@linaro.org>
7935
7936         * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
7937         (vcmlaq_rot180, vcmlaq_rot270): New.
7938         * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
7939         (vcmlaq_rot180, vcmlaq_rot270): New.
7940         * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
7941         (vcmlaq_rot180, vcmlaq_rot270): New.
7942         * config/arm/arm-mve-builtins.cc
7943         (function_instance::has_inactive_argument): Handle vcmlaq,
7944         vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
7945         * config/arm/arm_mve.h (vcmlaq): Delete.
7946         (vcmlaq_rot180): Delete.
7947         (vcmlaq_rot270): Delete.
7948         (vcmlaq_rot90): Delete.
7949         (vcmlaq_m): Delete.
7950         (vcmlaq_rot180_m): Delete.
7951         (vcmlaq_rot270_m): Delete.
7952         (vcmlaq_rot90_m): Delete.
7953         (vcmlaq_f16): Delete.
7954         (vcmlaq_rot180_f16): Delete.
7955         (vcmlaq_rot270_f16): Delete.
7956         (vcmlaq_rot90_f16): Delete.
7957         (vcmlaq_f32): Delete.
7958         (vcmlaq_rot180_f32): Delete.
7959         (vcmlaq_rot270_f32): Delete.
7960         (vcmlaq_rot90_f32): Delete.
7961         (vcmlaq_m_f32): Delete.
7962         (vcmlaq_m_f16): Delete.
7963         (vcmlaq_rot180_m_f32): Delete.
7964         (vcmlaq_rot180_m_f16): Delete.
7965         (vcmlaq_rot270_m_f32): Delete.
7966         (vcmlaq_rot270_m_f16): Delete.
7967         (vcmlaq_rot90_m_f32): Delete.
7968         (vcmlaq_rot90_m_f16): Delete.
7969         (__arm_vcmlaq_f16): Delete.
7970         (__arm_vcmlaq_rot180_f16): Delete.
7971         (__arm_vcmlaq_rot270_f16): Delete.
7972         (__arm_vcmlaq_rot90_f16): Delete.
7973         (__arm_vcmlaq_f32): Delete.
7974         (__arm_vcmlaq_rot180_f32): Delete.
7975         (__arm_vcmlaq_rot270_f32): Delete.
7976         (__arm_vcmlaq_rot90_f32): Delete.
7977         (__arm_vcmlaq_m_f32): Delete.
7978         (__arm_vcmlaq_m_f16): Delete.
7979         (__arm_vcmlaq_rot180_m_f32): Delete.
7980         (__arm_vcmlaq_rot180_m_f16): Delete.
7981         (__arm_vcmlaq_rot270_m_f32): Delete.
7982         (__arm_vcmlaq_rot270_m_f16): Delete.
7983         (__arm_vcmlaq_rot90_m_f32): Delete.
7984         (__arm_vcmlaq_rot90_m_f16): Delete.
7985         (__arm_vcmlaq): Delete.
7986         (__arm_vcmlaq_rot180): Delete.
7987         (__arm_vcmlaq_rot270): Delete.
7988         (__arm_vcmlaq_rot90): Delete.
7989         (__arm_vcmlaq_m): Delete.
7990         (__arm_vcmlaq_rot180_m): Delete.
7991         (__arm_vcmlaq_rot270_m): Delete.
7992         (__arm_vcmlaq_rot90_m): Delete.
7993
7994 2023-07-14  Christophe Lyon  <christophe.lyon@linaro.org>
7995
7996         * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
7997         (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
7998         * config/arm/iterators.md (MVE_VCMLAQ_M): New.
7999         (mve_insn): Add vcmla.
8000         (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
8001         VCMLAQ_ROT270_M_F.
8002         (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
8003         VCMLAQ_ROT270_M_F.
8004         * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
8005         (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
8006         (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
8007         (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
8008         into ...
8009         (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
8010
8011 2023-07-14  Christophe Lyon  <christophe.lyon@linaro.org>
8012
8013         * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
8014         (vcmulq_rot180, vcmulq_rot270): New.
8015         * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
8016         (vcmulq_rot180, vcmulq_rot270): New.
8017         * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
8018         (vcmulq_rot180, vcmulq_rot270): New.
8019         * config/arm/arm_mve.h (vcmulq_rot90): Delete.
8020         (vcmulq_rot270): Delete.
8021         (vcmulq_rot180): Delete.
8022         (vcmulq): Delete.
8023         (vcmulq_m): Delete.
8024         (vcmulq_rot180_m): Delete.
8025         (vcmulq_rot270_m): Delete.
8026         (vcmulq_rot90_m): Delete.
8027         (vcmulq_x): Delete.
8028         (vcmulq_rot90_x): Delete.
8029         (vcmulq_rot180_x): Delete.
8030         (vcmulq_rot270_x): Delete.
8031         (vcmulq_rot90_f16): Delete.
8032         (vcmulq_rot270_f16): Delete.
8033         (vcmulq_rot180_f16): Delete.
8034         (vcmulq_f16): Delete.
8035         (vcmulq_rot90_f32): Delete.
8036         (vcmulq_rot270_f32): Delete.
8037         (vcmulq_rot180_f32): Delete.
8038         (vcmulq_f32): Delete.
8039         (vcmulq_m_f32): Delete.
8040         (vcmulq_m_f16): Delete.
8041         (vcmulq_rot180_m_f32): Delete.
8042         (vcmulq_rot180_m_f16): Delete.
8043         (vcmulq_rot270_m_f32): Delete.
8044         (vcmulq_rot270_m_f16): Delete.
8045         (vcmulq_rot90_m_f32): Delete.
8046         (vcmulq_rot90_m_f16): Delete.
8047         (vcmulq_x_f16): Delete.
8048         (vcmulq_x_f32): Delete.
8049         (vcmulq_rot90_x_f16): Delete.
8050         (vcmulq_rot90_x_f32): Delete.
8051         (vcmulq_rot180_x_f16): Delete.
8052         (vcmulq_rot180_x_f32): Delete.
8053         (vcmulq_rot270_x_f16): Delete.
8054         (vcmulq_rot270_x_f32): Delete.
8055         (__arm_vcmulq_rot90_f16): Delete.
8056         (__arm_vcmulq_rot270_f16): Delete.
8057         (__arm_vcmulq_rot180_f16): Delete.
8058         (__arm_vcmulq_f16): Delete.
8059         (__arm_vcmulq_rot90_f32): Delete.
8060         (__arm_vcmulq_rot270_f32): Delete.
8061         (__arm_vcmulq_rot180_f32): Delete.
8062         (__arm_vcmulq_f32): Delete.
8063         (__arm_vcmulq_m_f32): Delete.
8064         (__arm_vcmulq_m_f16): Delete.
8065         (__arm_vcmulq_rot180_m_f32): Delete.
8066         (__arm_vcmulq_rot180_m_f16): Delete.
8067         (__arm_vcmulq_rot270_m_f32): Delete.
8068         (__arm_vcmulq_rot270_m_f16): Delete.
8069         (__arm_vcmulq_rot90_m_f32): Delete.
8070         (__arm_vcmulq_rot90_m_f16): Delete.
8071         (__arm_vcmulq_x_f16): Delete.
8072         (__arm_vcmulq_x_f32): Delete.
8073         (__arm_vcmulq_rot90_x_f16): Delete.
8074         (__arm_vcmulq_rot90_x_f32): Delete.
8075         (__arm_vcmulq_rot180_x_f16): Delete.
8076         (__arm_vcmulq_rot180_x_f32): Delete.
8077         (__arm_vcmulq_rot270_x_f16): Delete.
8078         (__arm_vcmulq_rot270_x_f32): Delete.
8079         (__arm_vcmulq_rot90): Delete.
8080         (__arm_vcmulq_rot270): Delete.
8081         (__arm_vcmulq_rot180): Delete.
8082         (__arm_vcmulq): Delete.
8083         (__arm_vcmulq_m): Delete.
8084         (__arm_vcmulq_rot180_m): Delete.
8085         (__arm_vcmulq_rot270_m): Delete.
8086         (__arm_vcmulq_rot90_m): Delete.
8087         (__arm_vcmulq_x): Delete.
8088         (__arm_vcmulq_rot90_x): Delete.
8089         (__arm_vcmulq_rot180_x): Delete.
8090         (__arm_vcmulq_rot270_x): Delete.
8091
8092 2023-07-14  Christophe Lyon  <christophe.lyon@linaro.org>
8093
8094         * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
8095         (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
8096         * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
8097         (MVE_VCADDQ_VCMULQ_M): New.
8098         (mve_insn): Add vcmul.
8099         (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
8100         VCMULQ_ROT270_M_F.
8101         (VCMUL): Delete.
8102         (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
8103         VCMULQ_ROT270_M_F.
8104         * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
8105         @mve_<mve_insn>q<mve_rot>_f<mode>.
8106         (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
8107         (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
8108         into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
8109
8110 2023-07-14  Christophe Lyon  <christophe.lyon@linaro.org>
8111
8112         * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
8113         (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
8114         * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
8115         (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
8116         * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
8117         (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
8118         * config/arm/arm-mve-builtins-functions.h (class
8119         unspec_mve_function_exact_insn_rot): New.
8120         * config/arm/arm_mve.h (vcaddq_rot90): Delete.
8121         (vcaddq_rot270): Delete.
8122         (vhcaddq_rot90): Delete.
8123         (vhcaddq_rot270): Delete.
8124         (vcaddq_rot270_m): Delete.
8125         (vcaddq_rot90_m): Delete.
8126         (vhcaddq_rot270_m): Delete.
8127         (vhcaddq_rot90_m): Delete.
8128         (vcaddq_rot90_x): Delete.
8129         (vcaddq_rot270_x): Delete.
8130         (vhcaddq_rot90_x): Delete.
8131         (vhcaddq_rot270_x): Delete.
8132         (vcaddq_rot90_u8): Delete.
8133         (vcaddq_rot270_u8): Delete.
8134         (vhcaddq_rot90_s8): Delete.
8135         (vhcaddq_rot270_s8): Delete.
8136         (vcaddq_rot90_s8): Delete.
8137         (vcaddq_rot270_s8): Delete.
8138         (vcaddq_rot90_u16): Delete.
8139         (vcaddq_rot270_u16): Delete.
8140         (vhcaddq_rot90_s16): Delete.
8141         (vhcaddq_rot270_s16): Delete.
8142         (vcaddq_rot90_s16): Delete.
8143         (vcaddq_rot270_s16): Delete.
8144         (vcaddq_rot90_u32): Delete.
8145         (vcaddq_rot270_u32): Delete.
8146         (vhcaddq_rot90_s32): Delete.
8147         (vhcaddq_rot270_s32): Delete.
8148         (vcaddq_rot90_s32): Delete.
8149         (vcaddq_rot270_s32): Delete.
8150         (vcaddq_rot90_f16): Delete.
8151         (vcaddq_rot270_f16): Delete.
8152         (vcaddq_rot90_f32): Delete.
8153         (vcaddq_rot270_f32): Delete.
8154         (vcaddq_rot270_m_s8): Delete.
8155         (vcaddq_rot270_m_s32): Delete.
8156         (vcaddq_rot270_m_s16): Delete.
8157         (vcaddq_rot270_m_u8): Delete.
8158         (vcaddq_rot270_m_u32): Delete.
8159         (vcaddq_rot270_m_u16): Delete.
8160         (vcaddq_rot90_m_s8): Delete.
8161         (vcaddq_rot90_m_s32): Delete.
8162         (vcaddq_rot90_m_s16): Delete.
8163         (vcaddq_rot90_m_u8): Delete.
8164         (vcaddq_rot90_m_u32): Delete.
8165         (vcaddq_rot90_m_u16): Delete.
8166         (vhcaddq_rot270_m_s8): Delete.
8167         (vhcaddq_rot270_m_s32): Delete.
8168         (vhcaddq_rot270_m_s16): Delete.
8169         (vhcaddq_rot90_m_s8): Delete.
8170         (vhcaddq_rot90_m_s32): Delete.
8171         (vhcaddq_rot90_m_s16): Delete.
8172         (vcaddq_rot270_m_f32): Delete.
8173         (vcaddq_rot270_m_f16): Delete.
8174         (vcaddq_rot90_m_f32): Delete.
8175         (vcaddq_rot90_m_f16): Delete.
8176         (vcaddq_rot90_x_s8): Delete.
8177         (vcaddq_rot90_x_s16): Delete.
8178         (vcaddq_rot90_x_s32): Delete.
8179         (vcaddq_rot90_x_u8): Delete.
8180         (vcaddq_rot90_x_u16): Delete.
8181         (vcaddq_rot90_x_u32): Delete.
8182         (vcaddq_rot270_x_s8): Delete.
8183         (vcaddq_rot270_x_s16): Delete.
8184         (vcaddq_rot270_x_s32): Delete.
8185         (vcaddq_rot270_x_u8): Delete.
8186         (vcaddq_rot270_x_u16): Delete.
8187         (vcaddq_rot270_x_u32): Delete.
8188         (vhcaddq_rot90_x_s8): Delete.
8189         (vhcaddq_rot90_x_s16): Delete.
8190         (vhcaddq_rot90_x_s32): Delete.
8191         (vhcaddq_rot270_x_s8): Delete.
8192         (vhcaddq_rot270_x_s16): Delete.
8193         (vhcaddq_rot270_x_s32): Delete.
8194         (vcaddq_rot90_x_f16): Delete.
8195         (vcaddq_rot90_x_f32): Delete.
8196         (vcaddq_rot270_x_f16): Delete.
8197         (vcaddq_rot270_x_f32): Delete.
8198         (__arm_vcaddq_rot90_u8): Delete.
8199         (__arm_vcaddq_rot270_u8): Delete.
8200         (__arm_vhcaddq_rot90_s8): Delete.
8201         (__arm_vhcaddq_rot270_s8): Delete.
8202         (__arm_vcaddq_rot90_s8): Delete.
8203         (__arm_vcaddq_rot270_s8): Delete.
8204         (__arm_vcaddq_rot90_u16): Delete.
8205         (__arm_vcaddq_rot270_u16): Delete.
8206         (__arm_vhcaddq_rot90_s16): Delete.
8207         (__arm_vhcaddq_rot270_s16): Delete.
8208         (__arm_vcaddq_rot90_s16): Delete.
8209         (__arm_vcaddq_rot270_s16): Delete.
8210         (__arm_vcaddq_rot90_u32): Delete.
8211         (__arm_vcaddq_rot270_u32): Delete.
8212         (__arm_vhcaddq_rot90_s32): Delete.
8213         (__arm_vhcaddq_rot270_s32): Delete.
8214         (__arm_vcaddq_rot90_s32): Delete.
8215         (__arm_vcaddq_rot270_s32): Delete.
8216         (__arm_vcaddq_rot270_m_s8): Delete.
8217         (__arm_vcaddq_rot270_m_s32): Delete.
8218         (__arm_vcaddq_rot270_m_s16): Delete.
8219         (__arm_vcaddq_rot270_m_u8): Delete.
8220         (__arm_vcaddq_rot270_m_u32): Delete.
8221         (__arm_vcaddq_rot270_m_u16): Delete.
8222         (__arm_vcaddq_rot90_m_s8): Delete.
8223         (__arm_vcaddq_rot90_m_s32): Delete.
8224         (__arm_vcaddq_rot90_m_s16): Delete.
8225         (__arm_vcaddq_rot90_m_u8): Delete.
8226         (__arm_vcaddq_rot90_m_u32): Delete.
8227         (__arm_vcaddq_rot90_m_u16): Delete.
8228         (__arm_vhcaddq_rot270_m_s8): Delete.
8229         (__arm_vhcaddq_rot270_m_s32): Delete.
8230         (__arm_vhcaddq_rot270_m_s16): Delete.
8231         (__arm_vhcaddq_rot90_m_s8): Delete.
8232         (__arm_vhcaddq_rot90_m_s32): Delete.
8233         (__arm_vhcaddq_rot90_m_s16): Delete.
8234         (__arm_vcaddq_rot90_x_s8): Delete.
8235         (__arm_vcaddq_rot90_x_s16): Delete.
8236         (__arm_vcaddq_rot90_x_s32): Delete.
8237         (__arm_vcaddq_rot90_x_u8): Delete.
8238         (__arm_vcaddq_rot90_x_u16): Delete.
8239         (__arm_vcaddq_rot90_x_u32): Delete.
8240         (__arm_vcaddq_rot270_x_s8): Delete.
8241         (__arm_vcaddq_rot270_x_s16): Delete.
8242         (__arm_vcaddq_rot270_x_s32): Delete.
8243         (__arm_vcaddq_rot270_x_u8): Delete.
8244         (__arm_vcaddq_rot270_x_u16): Delete.
8245         (__arm_vcaddq_rot270_x_u32): Delete.
8246         (__arm_vhcaddq_rot90_x_s8): Delete.
8247         (__arm_vhcaddq_rot90_x_s16): Delete.
8248         (__arm_vhcaddq_rot90_x_s32): Delete.
8249         (__arm_vhcaddq_rot270_x_s8): Delete.
8250         (__arm_vhcaddq_rot270_x_s16): Delete.
8251         (__arm_vhcaddq_rot270_x_s32): Delete.
8252         (__arm_vcaddq_rot90_f16): Delete.
8253         (__arm_vcaddq_rot270_f16): Delete.
8254         (__arm_vcaddq_rot90_f32): Delete.
8255         (__arm_vcaddq_rot270_f32): Delete.
8256         (__arm_vcaddq_rot270_m_f32): Delete.
8257         (__arm_vcaddq_rot270_m_f16): Delete.
8258         (__arm_vcaddq_rot90_m_f32): Delete.
8259         (__arm_vcaddq_rot90_m_f16): Delete.
8260         (__arm_vcaddq_rot90_x_f16): Delete.
8261         (__arm_vcaddq_rot90_x_f32): Delete.
8262         (__arm_vcaddq_rot270_x_f16): Delete.
8263         (__arm_vcaddq_rot270_x_f32): Delete.
8264         (__arm_vcaddq_rot90): Delete.
8265         (__arm_vcaddq_rot270): Delete.
8266         (__arm_vhcaddq_rot90): Delete.
8267         (__arm_vhcaddq_rot270): Delete.
8268         (__arm_vcaddq_rot270_m): Delete.
8269         (__arm_vcaddq_rot90_m): Delete.
8270         (__arm_vhcaddq_rot270_m): Delete.
8271         (__arm_vhcaddq_rot90_m): Delete.
8272         (__arm_vcaddq_rot90_x): Delete.
8273         (__arm_vcaddq_rot270_x): Delete.
8274         (__arm_vhcaddq_rot90_x): Delete.
8275         (__arm_vhcaddq_rot270_x): Delete.
8276
8277 2023-07-14  Christophe Lyon  <christophe.lyon@linaro.org>
8278
8279         * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
8280         (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
8281         * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
8282         (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
8283         VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
8284         VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
8285         VHCADDQ_ROT270_S.
8286         (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
8287         VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
8288         VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
8289         VHCADDQ_ROT270_M_S.
8290         (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
8291         VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
8292         VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
8293         VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
8294         (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
8295         VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
8296         UNSPEC_VCADD270.
8297         (VCADDQ_ROT270_M): Delete.
8298         (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
8299         (VCADDQ_ROT90_M): Delete.
8300         * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
8301         (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
8302         into ...
8303         (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
8304         (mve_vcaddq<mve_rot><mode>): Rename into ...
8305         (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
8306         (mve_vcaddq_rot270_m_<supf><mode>)
8307         (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
8308         (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
8309         (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
8310         (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
8311         into ...
8312         (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
8313
8314 2023-07-14  Roger Sayle  <roger@nextmovesoftware.com>
8315
8316         PR target/110588
8317         * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
8318         preparation statement over braces for a single statement.
8319         (*bt<mode>_setncqi): Likewise.
8320         (*bt<mode>_setncqi_2): New define_insn_and_split.
8321
8322 2023-07-14  Roger Sayle  <roger@nextmovesoftware.com>
8323
8324         * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
8325         case inserting of 64-bit values into a TImode register, to handle
8326         both DImode and DFmode using either *insvti_lowpart_1
8327         or *isnvti_highpart_1.
8328
8329 2023-07-14  Uros Bizjak  <ubizjak@gmail.com>
8330
8331         PR target/110206
8332         * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
8333         * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
8334         * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
8335         * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
8336         when the original source contains a paradoxical subreg.
8337
8338 2023-07-14  Jan Hubicka  <jh@suse.cz>
8339
8340         * passes.cc (execute_function_todo): Remove
8341         TODO_rebuild_frequencies
8342         * passes.def: Add rebuild_frequencies pass.
8343         * predict.cc (estimate_bb_frequencies): Drop
8344         force parameter.
8345         (tree_estimate_probability): Update call of
8346         estimate_bb_frequencies.
8347         (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
8348         first and do not rebuild if not necessary.
8349         (class pass_rebuild_frequencies): New.
8350         (make_pass_rebuild_frequencies): New.
8351         * profile-count.h: Add profile_count::very_large_p.
8352         * tree-inline.cc (optimize_inline_calls): Do not return
8353         TODO_rebuild_frequencies
8354         * tree-pass.h (TODO_rebuild_frequencies): Remove.
8355         (make_pass_rebuild_frequencies): Declare.
8356
8357 2023-07-14  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
8358
8359         * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
8360         * config/riscv/riscv-protos.h (enum insn_type): New enum.
8361         (expand_cond_len_ternop): New function.
8362         * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
8363         (expand_cond_len_ternop): Ditto.
8364
8365 2023-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
8366
8367         PR target/110657
8368         * config/bpf/bpf.md: Enable instruction scheduling.
8369
8370 2023-07-14  Tamar Christina  <tamar.christina@arm.com>
8371
8372         PR tree-optimization/109154
8373         * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
8374         (struct bb_predicate): Add no_predicate_stmts.
8375         (set_bb_predicate): Increase predicate count.
8376         (set_bb_predicate_gimplified_stmts): Conditionally initialize
8377         no_predicate_stmts.
8378         (get_bb_num_predicate_stmts): New.
8379         (init_bb_predicate): Initialzie no_predicate_stmts.
8380         (release_bb_predicate): Cleanup no_predicate_stmts.
8381         (insert_gimplified_predicates): Preserve no_predicate_stmts.
8382
8383 2023-07-14  Tamar Christina  <tamar.christina@arm.com>
8384
8385         PR tree-optimization/109154
8386         * tree-if-conv.cc (gen_simplified_condition,
8387         gen_phi_nest_statement): New.
8388         (gen_phi_arg_condition, predicate_scalar_phi): Use it.
8389
8390 2023-07-14  Richard Biener  <rguenther@suse.de>
8391
8392         * gimple.h (gimple_phi_arg): New const overload.
8393         (gimple_phi_arg_def): Make gimple arg const.
8394         (gimple_phi_arg_def_from_edge): New inline function.
8395         * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
8396         Likewise.
8397         * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
8398         new inline function.
8399         (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
8400
8401 2023-07-14  Monk Chiang  <monk.chiang@sifive.com>
8402
8403         * common/config/riscv/riscv-common.cc:
8404         (riscv_implied_info): Add zihintntl item.
8405         (riscv_ext_version_table): Ditto.
8406         (riscv_ext_flag_table): Ditto.
8407         * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
8408         (TARGET_ZIHINTNTL): Ditto.
8409
8410 2023-07-14  Die Li  <lidie@eswincomputing.com>
8411
8412         * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
8413
8414 2023-07-14  Oleg Endo  <olegendo@gcc.gnu.org>
8415
8416         PR target/101469
8417         * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
8418         used by the address of the following memory operand.
8419
8420 2023-07-13  Mikael Pettersson  <mikpelinux@gmail.com>
8421
8422         PR target/107841
8423         * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
8424         deallocate alloca-only frame.
8425
8426 2023-07-13  Iain Sandoe  <iain@sandoe.co.uk>
8427
8428         PR target/110624
8429         * config/darwin.h (DARWIN_PLATFORM_ID): New.
8430         (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
8431         and SDK data to the static linker.
8432
8433 2023-07-13  Carl Love  <cel@us.ibm.com>
8434
8435         * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
8436         built-in definition return type.
8437         * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
8438         define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
8439         * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
8440         argument to return FPSCR fields.
8441         * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
8442         the return value.  Add description for
8443         __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
8444
8445 2023-07-13  Uros Bizjak  <ubizjak@gmail.com>
8446
8447         PR target/106966
8448         * config/alpha/alpha.cc (alpha_emit_set_long_const):
8449         Always use DImode when constructing long const.
8450
8451 2023-07-13  Uros Bizjak  <ubizjak@gmail.com>
8452
8453         * haifa-sched.cc: Change TRUE/FALSE to true/false.
8454         * ira.cc: Ditto.
8455         * lra-assigns.cc: Ditto.
8456         * lra-constraints.cc: Ditto.
8457         * sel-sched.cc: Ditto.
8458
8459 2023-07-13  Andrew Pinski  <apinski@marvell.com>
8460
8461         PR tree-optimization/110293
8462         PR tree-optimization/110539
8463         * match.pd: Expand the `x != (typeof x)(x == 0)`
8464         pattern to handle where the inner and outer comparsions
8465         are either `!=` or `==` and handle other constants
8466         than 0.
8467
8468 2023-07-13  Vladimir N. Makarov  <vmakarov@redhat.com>
8469
8470         PR middle-end/109520
8471         * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
8472         (lra_asm_insn_error): New prototype.
8473         * lra.cc: Include rtl_error.h.
8474         (lra_set_insn_recog_data): Initialize asm_reloads_num.
8475         (lra_asm_insn_error): New func whose code is taken from ...
8476         * lra-assigns.cc (lra_split_hard_reg_for): ... here.  Use lra_asm_insn_error.
8477         * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
8478
8479 2023-07-13  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
8480
8481         * genmatch.cc (commutative_op): Add COND_LEN_*
8482         * internal-fn.cc (first_commutative_argument): Ditto.
8483         (CASE): Ditto.
8484         (get_unconditional_internal_fn): Ditto.
8485         (can_interpret_as_conditional_op_p): Ditto.
8486         (internal_fn_len_index): Ditto.
8487         * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
8488         * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
8489         (convert_mult_to_fma): Ditto.
8490         (math_opts_dom_walker::after_dom_children): Ditto.
8491
8492 2023-07-13  Pan Li  <pan2.li@intel.com>
8493
8494         * config/riscv/riscv.cc (vxrm_rtx): New static var.
8495         (frm_rtx): Ditto.
8496         (global_state_unknown_p): Removed.
8497         (riscv_entity_mode_after): Removed.
8498         (asm_insn_p): New function.
8499         (vxrm_unknown_p): New function for fixed-point.
8500         (riscv_vxrm_mode_after): Ditto.
8501         (frm_unknown_dynamic_p): New function for floating-point.
8502         (riscv_frm_mode_after): Ditto.
8503         (riscv_mode_after): Leverage new functions.
8504
8505 2023-07-13  Kewen Lin  <linkw@linux.ibm.com>
8506
8507         * tree-vect-stmts.cc (vect_model_load_cost): Remove.
8508         (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
8509         calling vect_model_load_cost.
8510
8511 2023-07-13  Kewen Lin  <linkw@linux.ibm.com>
8512
8513         * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
8514         handle memory_access_type VMAT_CONTIGUOUS, remove some
8515         VMAT_CONTIGUOUS_PERMUTE related handlings.
8516         (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
8517         without calling vect_model_load_cost.
8518
8519 2023-07-13  Kewen Lin  <linkw@linux.ibm.com>
8520
8521         * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
8522         VMAT_CONTIGUOUS_REVERSE any more.
8523         (vectorizable_load): Adjust the costing handling on
8524         VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
8525
8526 2023-07-13  Kewen Lin  <linkw@linux.ibm.com>
8527
8528         * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
8529         VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
8530         (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
8531         assert it will never get VMAT_LOAD_STORE_LANES.
8532
8533 2023-07-13  Kewen Lin  <linkw@linux.ibm.com>
8534
8535         * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
8536         VMAT_GATHER_SCATTER without calling vect_model_load_cost.
8537         (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
8538         remove VMAT_GATHER_SCATTER related handlings and the related parameter
8539         gs_info.
8540
8541 2023-07-13  Kewen Lin  <linkw@linux.ibm.com>
8542
8543         * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
8544         on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
8545         vect_model_load_cost.
8546         (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
8547         VMAT_STRIDED_SLP any more, and remove their related handlings.
8548
8549 2023-07-13  Kewen Lin  <linkw@linux.ibm.com>
8550
8551         * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
8552         (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
8553         hoisting decision and without calling vect_model_load_cost.
8554         (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
8555         and remove VMAT_INVARIANT related handlings.
8556
8557 2023-07-13  Kewen Lin  <linkw@linux.ibm.com>
8558
8559         * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
8560         on costing with one extra argument cost_vec.
8561         (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
8562         (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
8563         gs_info.decl set any more.
8564
8565 2023-07-13  Kewen Lin  <linkw@linux.ibm.com>
8566
8567         * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
8568         to vect_model_load_cost down to some different transform paths
8569         according to the handlings of different vect_memory_access_types.
8570
8571 2023-07-13  Kewen Lin  <linkw@linux.ibm.com>
8572
8573         * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
8574
8575 2023-07-13  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
8576
8577         * config/riscv/autovec.md
8578         (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
8579         (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
8580         (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
8581         (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
8582         (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
8583         (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
8584         (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
8585         (len_mask_gather_load<mode><mode>): Ditto.
8586         (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
8587         (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
8588         (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
8589         (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
8590         (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
8591         (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
8592         (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
8593         (len_mask_scatter_store<mode><mode>): Ditto.
8594         * config/riscv/predicates.md (const_1_operand): New predicate.
8595         (vector_gs_scale_operand_16): Ditto.
8596         (vector_gs_scale_operand_32): Ditto.
8597         (vector_gs_scale_operand_64): Ditto.
8598         (vector_gs_extension_operand): Ditto.
8599         (vector_gs_scale_operand_16_rv32): Ditto.
8600         (vector_gs_scale_operand_32_rv32): Ditto.
8601         * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
8602         (expand_gather_scatter): New function.
8603         * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
8604         (emit_vlmax_masked_store_insn): New function.
8605         (emit_nonvlmax_masked_store_insn): Ditto.
8606         (modulo_sel_indices): Ditto.
8607         (expand_vec_perm): Fix SLP for gather/scatter.
8608         (prepare_gather_scatter): New function.
8609         (expand_gather_scatter): Ditto.
8610         * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
8611         (subreg:SI (DI CONST_POLY_INT)).
8612         * config/riscv/vector-iterators.md: Add gather/scatter.
8613         * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
8614         (@vec_duplicate<mode>): Ditto.
8615         (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
8616         Fix name.
8617         (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
8618
8619 2023-07-12  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
8620
8621         * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
8622         * config/riscv/riscv-protos.h (enum insn_type): New enum.
8623         (expand_cond_len_binop): New function.
8624         * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
8625         (emit_nonvlmax_fp_tu_insn): Ditto.
8626         (need_fp_rounding_p): Ditto.
8627         (expand_cond_len_binop): Ditto.
8628         * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
8629         (TARGET_PREFERRED_ELSE_VALUE): New target hook.
8630
8631 2023-07-12  Jan Hubicka  <jh@suse.cz>
8632
8633         * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
8634         (gimple_duplicate_seme_region): ... this; break out profile updating
8635         code to ...
8636         * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
8637         (ch_base::copy_headers): Update.
8638         * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
8639         (gimple_duplicate_seme_region): ... this.
8640
8641 2023-07-12  Aldy Hernandez  <aldyh@redhat.com>
8642
8643         PR tree-optimization/107043
8644         * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
8645
8646 2023-07-12  Aldy Hernandez  <aldyh@redhat.com>
8647
8648         PR tree-optimization/107053
8649         * gimple-range-op.cc (cfn_popcount): Use known set bits.
8650
8651 2023-07-12  Uros Bizjak  <ubizjak@gmail.com>
8652
8653         * ira.cc (equiv_init_varies_p): Change return type from int to bool
8654         and adjust function body accordingly.
8655         (equiv_init_movable_p): Ditto.
8656         (memref_used_between_p): Ditto.
8657         * lra-constraints.cc (valid_address_p): Ditto.
8658
8659 2023-07-12  Aldy Hernandez  <aldyh@redhat.com>
8660
8661         * range-op.cc (irange_to_masked_value): Remove.
8662         (update_known_bitmask): Update irange value/mask pair instead of
8663         only updating nonzero bits.
8664
8665 2023-07-12  Jan Hubicka  <jh@suse.cz>
8666
8667         * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
8668         parameter and rewrite profile updating code to handle edges elimination.
8669         * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
8670         * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
8671         (loop_iv_derived_p): New function.
8672         (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
8673         of PHIs and propagation of IV derived variables.
8674         (ch_base::copy_headers): Pass around the invariant edges hash set.
8675
8676 2023-07-12  Uros Bizjak  <ubizjak@gmail.com>
8677
8678         * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
8679         (last_active_insn): Change "skip_use_p" function argument to bool.
8680         (noce_operand_ok): Change return type from int to bool.
8681         (find_cond_trap): Ditto.
8682         (block_jumps_and_fallthru_p): Change "fallthru_p" and
8683         "jump_p" variables to bool.
8684         (noce_find_if_block): Change return type from int to bool.
8685         (cond_exec_find_if_block): Ditto.
8686         (find_if_case_1): Ditto.
8687         (find_if_case_2): Ditto.
8688         (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
8689         (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
8690         (cond_exec_process_insns): Change return type from int to bool.
8691         Change "mod_ok" function arg to bool.
8692         (cond_exec_process_if_block): Change return type from int to bool.
8693         Change "do_multiple_p" function arg to bool.  Change "then_mod_ok"
8694         variable to bool.
8695         (noce_emit_store_flag): Change return type from int to bool.
8696         Change "reversep" function arg to bool.  Change "cond_complex"
8697         variable to bool.
8698         (noce_try_move): Change return type from int to bool.
8699         (noce_try_ifelse_collapse): Ditto.
8700         (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
8701         (noce_try_addcc): Change return type from int to bool.  Change
8702         "subtract" variable to bool.
8703         (noce_try_store_flag_constants): Change return type from int to bool.
8704         (noce_try_store_flag_mask): Ditto.  Change "reversep" variable to bool.
8705         (noce_try_cmove): Change return type from int to bool.
8706         (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
8707         (noce_try_minmax): Change return type from int to bool.  Change
8708         "unsignedp" variable to bool.
8709         (noce_try_abs): Change return type from int to bool.  Change
8710         "negate" variable to bool.
8711         (noce_try_sign_mask): Change return type from int to bool.
8712         (noce_try_move): Ditto.
8713         (noce_try_store_flag_constants): Ditto.
8714         (noce_try_cmove): Ditto.
8715         (noce_try_cmove_arith): Ditto.
8716         (noce_try_minmax): Ditto.  Change "unsignedp" variable to bool.
8717         (noce_try_bitop): Change return type from int to bool.
8718         (noce_operand_ok): Ditto.
8719         (noce_convert_multiple_sets): Ditto.
8720         (noce_convert_multiple_sets_1): Ditto.
8721         (noce_process_if_block): Ditto.
8722         (check_cond_move_block): Ditto.
8723         (cond_move_process_if_block): Ditto. Change "success_p"
8724         variable to bool.
8725         (rest_of_handle_if_conversion): Change return type to void.
8726
8727 2023-07-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
8728
8729         * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
8730         (CASE): Ditto.
8731         (get_conditional_len_internal_fn): New function.
8732         * internal-fn.h (get_conditional_len_internal_fn): Ditto.
8733         * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
8734         support.
8735
8736 2023-07-12  Roger Sayle  <roger@nextmovesoftware.com>
8737
8738         PR target/91681
8739         * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
8740
8741 2023-07-12  Roger Sayle  <roger@nextmovesoftware.com>
8742
8743         PR target/91681
8744         * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
8745         define_insn_and_split derived from *add<dwi>3_doubleword_concat
8746         and *add<dwi>3_doubleword_zext.
8747
8748 2023-07-12  Roger Sayle  <roger@nextmovesoftware.com>
8749
8750         PR target/110598
8751         * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
8752         optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
8753         (peephole2): Simplify rega = 0; rega op= rega cases.
8754
8755 2023-07-12  Roger Sayle  <roger@nextmovesoftware.com>
8756
8757         * config/i386/i386-expand.cc (ix86_expand_int_compare): If
8758         testing a TImode SUBREG of a 128-bit vector register against
8759         zero, use a PTEST instruction instead of first moving it to
8760         a pair of scalar registers.
8761
8762 2023-07-12  Robin Dapp  <rdapp@ventanamicro.com>
8763
8764         * genopinit.cc (main): Adjust maximal number of optabs and
8765         machine modes.
8766         * gensupport.cc (find_optab): Shift optab by 20 and mode by
8767         10 bits.
8768         * optabs-query.h (optab_handler): Ditto.
8769         (convert_optab_handler): Ditto.
8770
8771 2023-07-12  Richard Biener  <rguenther@suse.de>
8772
8773         PR tree-optimization/110630
8774         * tree-vect-slp.cc (vect_add_slp_permutation): New
8775         offset parameter, honor that for the extract code generation.
8776         (vectorizable_slp_permutation_1): Handle offsetted identities.
8777
8778 2023-07-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
8779
8780         * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
8781         (umul<mode>3_highpart): Ditto.
8782
8783 2023-07-12  Jan Beulich  <jbeulich@suse.com>
8784
8785         * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
8786         alternative. Adjust original last alternative's "prefix"
8787         attribute to maybe_evex.
8788
8789 2023-07-12  Jan Beulich  <jbeulich@suse.com>
8790
8791         * config/i386/sse.md (vec_dupv4sf): Make first alternative use
8792         vbroadcastss for AVX2. New AVX512F alternative.
8793         (*vec_dupv4si): New AVX2 and AVX512F alternatives using
8794         vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
8795
8796 2023-07-12  Christoph Müllner  <christoph.muellner@vrull.eu>
8797
8798         * config/riscv/peephole.md: Remove XThead* peephole passes.
8799         * config/riscv/thead.md: Include thead-peephole.md.
8800         * config/riscv/thead-peephole.md: New file.
8801
8802 2023-07-12  Christoph Müllner  <christoph.muellner@vrull.eu>
8803
8804         * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
8805         New prototype.
8806         (riscv_index_reg_class): Likewise.
8807         * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
8808         (riscv_index_reg_class): New function.
8809         * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
8810         riscv_index_reg_class().
8811         (REGNO_OK_FOR_INDEX_P): Call new function
8812         riscv_regno_ok_for_index_p().
8813
8814 2023-07-12  Christoph Müllner  <christoph.muellner@vrull.eu>
8815
8816         * config/riscv/riscv-protos.h (enum riscv_address_type):
8817         New location of type definition.
8818         (struct riscv_address_info): Likewise.
8819         * config/riscv/riscv.cc (enum riscv_address_type):
8820         Old location of type definition.
8821         (struct riscv_address_info): Likewise.
8822
8823 2023-07-12  Christoph Müllner  <christoph.muellner@vrull.eu>
8824
8825         * config/riscv/riscv.h (Xmode): New macro.
8826
8827 2023-07-12  Christoph Müllner  <christoph.muellner@vrull.eu>
8828
8829         * config/riscv/riscv.cc (riscv_print_operand_address): Use
8830         output_addr_const rather than riscv_print_operand.
8831
8832 2023-07-12  Christoph Müllner  <christoph.muellner@vrull.eu>
8833
8834         * config/riscv/thead.md: Adjust constraints of th_addsl.
8835
8836 2023-07-12  Christoph Müllner  <christoph.muellner@vrull.eu>
8837
8838         * config/riscv/thead.cc (th_mempair_operands_p):
8839         Fix documentation of th_mempair_order_operands().
8840
8841 2023-07-12  Christoph Müllner  <christoph.muellner@vrull.eu>
8842
8843         * config/riscv/thead.cc (th_mempair_save_regs):
8844         Emit REG_FRAME_RELATED_EXPR notes in prologue.
8845
8846 2023-07-12  Christoph Müllner  <christoph.muellner@vrull.eu>
8847
8848         * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
8849         * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
8850         New XThead extension INSN.
8851         (*zero_extendsidi2_th_extu): New XThead extension INSN.
8852         (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
8853
8854 2023-07-12  liuhongt  <hongtao.liu@intel.com>
8855
8856         PR target/110438
8857         PR target/110202
8858         * config/i386/predicates.md
8859         (int_float_vector_all_ones_operand): New predicate.
8860         * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
8861         define_insn.
8862         (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
8863         Ditto.
8864         (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
8865         Ditto.
8866         (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
8867         define_insn_and_split to avoid false dependence.
8868         (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
8869         (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
8870         of operands 1 to '0' to avoid false dependence.
8871         (*andnot<mode>3): Ditto.
8872         (iornot<mode>3): Ditto.
8873         (*<nlogic><mode>3): Ditto.
8874
8875 2023-07-12  Mo, Zewei  <zewei.mo@intel.com>
8876
8877         * common/config/i386/cpuinfo.h
8878         (get_intel_cpu): Handle Granite Rapids D.
8879         * common/config/i386/i386-common.cc:
8880         (processor_alias_table): Add graniterapids-d.
8881         * common/config/i386/i386-cpuinfo.h
8882         (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
8883         * config.gcc: Add -march=graniterapids-d.
8884         * config/i386/driver-i386.cc (host_detect_local_cpu):
8885         Handle graniterapids-d.
8886         * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
8887         * doc/extend.texi: Add graniterapids-d.
8888         * doc/invoke.texi: Ditto.
8889
8890 2023-07-12  Haochen Jiang  <haochen.jiang@intel.com>
8891
8892         * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
8893         Add OPTION_MASK_ISA_AVX512VL.
8894         * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
8895         Ditto.
8896
8897 2023-07-11  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
8898
8899         * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
8900         * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
8901         (shuffle_compress_patterns): Ditto.
8902         (expand_vec_perm_const_1): Ditto.
8903
8904 2023-07-11  Uros Bizjak  <ubizjak@gmail.com>
8905
8906         * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
8907         * cfghooks.h (struct cfg_hooks): Change return type of
8908         verify_flow_info from integer to bool.
8909         * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
8910         (can_delete_label_p): Ditto.
8911         (rtl_verify_flow_info): Change return type from int to bool
8912         and adjust function body accordingly.  Change "err" variable to bool.
8913         (rtl_verify_flow_info_1): Ditto.
8914         (free_bb_for_insn): Change return type to void.
8915         (rtl_merge_blocks): Change "b_empty" variable to bool.
8916         (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
8917         (verify_hot_cold_block_grouping): Change return type from int to bool.
8918         Change "err" variable to bool.
8919         (rtl_verify_edges): Ditto.
8920         (rtl_verify_bb_insns): Ditto.
8921         (rtl_verify_bb_pointers): Ditto.
8922         (rtl_verify_bb_insn_chain): Ditto.
8923         (rtl_verify_fallthru): Ditto.
8924         (rtl_verify_bb_layout): Ditto.
8925         (purge_all_dead_edges): Change "purged" variable to bool.
8926         * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
8927         * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
8928         (load_killed_in_block_p): Change return type from int to bool
8929         and adjust function body accordingly.
8930         (oprs_unchanged_p): Return true/false.
8931         (rest_of_handle_gcse2): Change return type to void.
8932         * tree-cfg.cc (gimple_verify_flow_info): Change return type from
8933         int to bool.  Change "err" variable to bool.
8934
8935 2023-07-11  Gaius Mulley  <gaiusmod2@gmail.com>
8936
8937         * doc/gm2.texi (-Wuninit-variable-checking=) New item.
8938
8939 2023-07-11  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
8940
8941         * doc/md.texi: Add COND_LEN_* operations for loop control with length.
8942         * internal-fn.cc (cond_len_unary_direct): Ditto.
8943         (cond_len_binary_direct): Ditto.
8944         (cond_len_ternary_direct): Ditto.
8945         (expand_cond_len_unary_optab_fn): Ditto.
8946         (expand_cond_len_binary_optab_fn): Ditto.
8947         (expand_cond_len_ternary_optab_fn): Ditto.
8948         (direct_cond_len_unary_optab_supported_p): Ditto.
8949         (direct_cond_len_binary_optab_supported_p): Ditto.
8950         (direct_cond_len_ternary_optab_supported_p): Ditto.
8951         * internal-fn.def (COND_LEN_ADD): Ditto.
8952         (COND_LEN_SUB): Ditto.
8953         (COND_LEN_MUL): Ditto.
8954         (COND_LEN_DIV): Ditto.
8955         (COND_LEN_MOD): Ditto.
8956         (COND_LEN_RDIV): Ditto.
8957         (COND_LEN_MIN): Ditto.
8958         (COND_LEN_MAX): Ditto.
8959         (COND_LEN_FMIN): Ditto.
8960         (COND_LEN_FMAX): Ditto.
8961         (COND_LEN_AND): Ditto.
8962         (COND_LEN_IOR): Ditto.
8963         (COND_LEN_XOR): Ditto.
8964         (COND_LEN_SHL): Ditto.
8965         (COND_LEN_SHR): Ditto.
8966         (COND_LEN_FMA): Ditto.
8967         (COND_LEN_FMS): Ditto.
8968         (COND_LEN_FNMA): Ditto.
8969         (COND_LEN_FNMS): Ditto.
8970         (COND_LEN_NEG): Ditto.
8971         * optabs.def (OPTAB_D): Ditto.
8972
8973 2023-07-11  Richard Biener  <rguenther@suse.de>
8974
8975         PR tree-optimization/110614
8976         * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
8977         SLP splats are not suitable for re-align ops.
8978
8979 2023-07-10  Peter Bergner  <bergner@linux.ibm.com>
8980
8981         * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
8982         MEM_P usage.
8983         (vsx_quad_dform_memory_operand): Likewise.
8984
8985 2023-07-10  Uros Bizjak  <ubizjak@gmail.com>
8986
8987         * reorg.cc (stop_search_p): Change return type from int to bool
8988         and adjust function body accordingly.
8989         (resource_conflicts_p): Ditto.
8990         (insn_references_resource_p): Change return type from int to bool.
8991         (insn_sets_resource_p): Ditto.
8992         (redirect_with_delay_slots_safe_p): Ditto.
8993         (condition_dominates_p): Change return type from int to bool
8994         and adjust function body accordingly.
8995         (redirect_with_delay_list_safe_p): Ditto.
8996         (check_annul_list_true_false): Ditto.  Change "annul_true_p"
8997         function argument to bool.
8998         (steal_delay_list_from_target): Change "pannul_p" function
8999         argument to bool pointer.  Change "must_annul" and "used_annul"
9000         variables from int to bool.
9001         (steal_delay_list_from_fallthrough): Ditto.
9002         (own_thread_p): Change return type from int to bool and adjust
9003         function body accordingly.  Change "allow_fallthrough" function
9004         argument to bool.
9005         (reorg_redirect_jump): Change return type from int to bool.
9006         (fill_simple_delay_slots): Change "non_jumps_p" function
9007         argument from int to bool.  Change "maybe_never" varible to bool.
9008         (fill_slots_from_thread): Change "likely", "thread_if_true" and
9009         "own_thread" function arguments to bool.  Change "lose" and
9010         "must_annul" variables to bool.
9011         (delete_from_delay_slot): Change "had_barrier" variable to bool.
9012         (try_merge_delay_insns): Change "annul_p" variable to bool.
9013         (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
9014         variables to bool.
9015         (rest_of_handle_delay_slots): Change return type from int to void
9016         and adjust function body accordingly.
9017
9018 2023-07-10  Kito Cheng  <kito.cheng@sifive.com>
9019
9020         * doc/extend.texi (RISC-V Operand Modifiers): New.
9021
9022 2023-07-10  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
9023
9024         * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
9025         (insert_insn_end_basic_block): Ditto.
9026         (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
9027         * gcse.cc (insert_insn_end_basic_block):  Export as global function.
9028         * gcse.h (insert_insn_end_basic_block): Ditto.
9029
9030 2023-07-10  Christophe Lyon   <christophe.lyon@linaro.org>
9031
9032         PR target/110268
9033         * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
9034         (arm_builtin_decl): Hahndle MVE builtins.
9035         * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
9036         (add_unique_function): Fix handling of
9037         __ARM_MVE_PRESERVE_USER_NAMESPACE.
9038         (add_overloaded_function): Likewise.
9039         * config/arm/arm-protos.h (builtin_decl): New declaration.
9040
9041 2023-07-10  Christophe Lyon  <christophe.lyon@linaro.org>
9042
9043         * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
9044
9045 2023-07-10  Xi Ruoyao  <xry111@xry111.site>
9046
9047         PR tree-optimization/110557
9048         * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
9049         Ensure the output sign-extended if necessary.
9050
9051 2023-07-10  Roger Sayle  <roger@nextmovesoftware.com>
9052
9053         * config/i386/i386.md (peephole2): Transform xchg insn with a
9054         REG_UNUSED note to a (simple) move.
9055         (*insvti_lowpart_1): New define_insn_and_split.
9056         (*insvdi_lowpart_1): Likewise.
9057
9058 2023-07-10  Roger Sayle  <roger@nextmovesoftware.com>
9059
9060         * config/i386/i386-features.cc (compute_convert_gain): Tweak
9061         gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
9062         (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
9063         avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
9064
9065 2023-07-10  liuhongt  <hongtao.liu@intel.com>
9066
9067         PR target/110170
9068         * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
9069         splitter to detect fp max pattern.
9070         (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
9071
9072 2023-07-09  Jan Hubicka  <jh@suse.cz>
9073
9074         * cfg.cc (check_bb_profile): Dump counts with relative frequency.
9075         (dump_edge_info): Likewise.
9076         (dump_bb_info): Likewise.
9077         * profile-count.cc (profile_count::dump): Add comma between quality and
9078         freq.
9079
9080 2023-07-08  Jan Hubicka  <jh@suse.cz>
9081
9082         PR tree-optimization/110600
9083         * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
9084
9085 2023-07-08  Jan Hubicka  <jh@suse.cz>
9086
9087         PR middle-end/110590
9088         * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
9089         inner loops and be more careful about inconsistent profiles.
9090         (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
9091         exit is followed by other exit.
9092
9093 2023-07-08  Uros Bizjak  <ubizjak@gmail.com>
9094
9095         * cprop.cc (reg_available_p): Change return type from int to bool.
9096         (reg_not_set_p): Ditto.
9097         (try_replace_reg): Ditto.  Change "success" variable to bool.
9098         (cprop_jump): Change return type from int to void
9099         and adjust function body accordingly.
9100         (constprop_register): Ditto.
9101         (cprop_insn): Ditto.  Change "changed" variable to bool.
9102         (local_cprop_pass): Change return type from int to void
9103         and adjust function body accordingly.
9104         (bypass_block): Ditto.  Change "change", "may_be_loop_header"
9105         and "removed_p" variables to bool.
9106         (bypass_conditional_jumps): Change return type from int to void
9107         and adjust function body accordingly.  Change "changed"
9108         variable to bool.
9109         (one_cprop_pass): Ditto.
9110
9111 2023-07-08  Uros Bizjak  <ubizjak@gmail.com>
9112
9113         * gcse.cc (expr_equiv_p): Change return type from int to bool.
9114         (oprs_unchanged_p): Change return type from int to void
9115         and adjust function body accordingly.
9116         (oprs_anticipatable_p): Ditto.
9117         (oprs_available_p): Ditto.
9118         (insert_expr_in_table): Ditto.  Change "antic_p" and "avail_p"
9119         arguments to bool. Change "found" variable to bool.
9120         (load_killed_in_block_p): Change return type from int to void and
9121         adjust function body accordingly.  Change "avail_p" argument to bool.
9122         (pre_expr_reaches_here_p): Change return type from int to void
9123         and adjust function body accordingly.
9124         (pre_delete): Ditto.  Change "changed" variable to bool.
9125         (pre_gcse): Change return type from int to void
9126         and adjust function body accordingly. Change "did_insert" and
9127         "changed" variables to bool.
9128         (one_pre_gcse_pass): Change return type from int to void
9129         and adjust function body accordingly.  Change "changed" variable
9130         to bool.
9131         (should_hoist_expr_to_dom): Change return type from int to void
9132         and adjust function body accordingly.  Change
9133         "visited_allocated_locally" variable to bool.
9134         (hoist_code): Change return type from int to void and adjust
9135         function body accordingly.  Change "changed" variable to bool.
9136         (one_code_hoisting_pass): Ditto.
9137         (pre_edge_insert): Change return type from int to void and adjust
9138         function body accordingly.  Change "did_insert" variable to bool.
9139         (pre_expr_reaches_here_p_work): Change return type from int to void
9140         and adjust function body accordingly.
9141         (simple_mem): Ditto.
9142         (want_to_gcse_p): Change return type from int to void
9143         and adjust function body accordingly.
9144         (can_assign_to_reg_without_clobbers_p): Update function body
9145         for bool return type.
9146         (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
9147         (pre_insert_copies): Change "added_copy" variable to bool.
9148
9149 2023-07-08  Jonathan Wakely  <jwakely@redhat.com>
9150
9151         PR c++/110595
9152         PR c++/110596
9153         * doc/invoke.texi (Warning Options): Fix typos.
9154
9155 2023-07-07  Jan Hubicka  <jh@suse.cz>
9156
9157         * profile-count.cc (profile_count::dump): Add FUN
9158         parameter; print relative frequency.
9159         (profile_count::debug): Update.
9160         * profile-count.h (profile_count::dump): Update
9161         prototype.
9162
9163 2023-07-07  Roger Sayle  <roger@nextmovesoftware.com>
9164
9165         PR target/43644
9166         PR target/110533
9167         * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
9168         TImode destinations from paradoxical SUBREGs (setting the lowpart)
9169         into explicit zero extensions.  Use *insvti_highpart_1 instruction
9170         to set the highpart of a TImode destination.
9171
9172 2023-07-07  Jan Hubicka  <jh@suse.cz>
9173
9174         * predict.cc (force_edge_cold): Use
9175         set_edge_probability_and_rescale_others; improve dumps.
9176
9177 2023-07-07  Jan Hubicka  <jh@suse.cz>
9178
9179         * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
9180         after exit.
9181         * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
9182         is known.
9183
9184 2023-07-07  Juergen Christ  <jchrist@linux.ibm.com>
9185
9186         * config/s390/s390.cc (vec_init): Fix default case
9187
9188 2023-07-07  Vladimir N. Makarov  <vmakarov@redhat.com>
9189
9190         * lra-assigns.cc (assign_by_spills): Add reload insns involving
9191         reload pseudos with non-refined class to be processed on the next
9192         sub-pass.
9193         * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
9194         (in_class_p): Use it.
9195         (print_curr_insn_alt): New func.
9196         (process_alt_operands): Use it.  Improve debug info.
9197         (curr_insn_transform): Use print_curr_insn_alt.  Refine reload
9198         pseudo class if it is not refined yet.
9199
9200 2023-07-07  Aldy Hernandez  <aldyh@redhat.com>
9201
9202         * value-range.cc (irange::get_bitmask_from_range): Return all the
9203         known bits for a singleton.
9204         (irange::set_range_from_bitmask): Set a range of a singleton when
9205         all bits are known.
9206
9207 2023-07-07  Aldy Hernandez  <aldyh@redhat.com>
9208
9209         * value-range.cc (irange::intersect): Leave normalization to
9210         caller.
9211
9212 2023-07-07  Aldy Hernandez  <aldyh@redhat.com>
9213
9214         * data-streamer-in.cc (streamer_read_value_range): Adjust for
9215         value/mask.
9216         * data-streamer-out.cc (streamer_write_vrange): Same.
9217         * range-op.cc (operator_cast::fold_range): Same.
9218         * value-range-pretty-print.cc
9219         (vrange_printer::print_irange_bitmasks): Same.
9220         * value-range-storage.cc (irange_storage::write_lengths_address):
9221         Same.
9222         (irange_storage::set_irange): Same.
9223         (irange_storage::get_irange): Same.
9224         (irange_storage::size): Same.
9225         (irange_storage::dump): Same.
9226         * value-range-storage.h: Same.
9227         * value-range.cc (debug): New.
9228         (irange_bitmask::dump): New.
9229         (add_vrange): Adjust for value/mask.
9230         (irange::operator=): Same.
9231         (irange::set): Same.
9232         (irange::verify_range): Same.
9233         (irange::operator==): Same.
9234         (irange::contains_p): Same.
9235         (irange::irange_single_pair_union): Same.
9236         (irange::union_): Same.
9237         (irange::intersect): Same.
9238         (irange::invert): Same.
9239         (irange::get_nonzero_bits_from_range): Rename to...
9240         (irange::get_bitmask_from_range): ...this.
9241         (irange::set_range_from_nonzero_bits): Rename to...
9242         (irange::set_range_from_bitmask): ...this.
9243         (irange::set_nonzero_bits): Rename to...
9244         (irange::update_bitmask): ...this.
9245         (irange::get_nonzero_bits): Rename to...
9246         (irange::get_bitmask): ...this.
9247         (irange::intersect_nonzero_bits): Rename to...
9248         (irange::intersect_bitmask): ...this.
9249         (irange::union_nonzero_bits): Rename to...
9250         (irange::union_bitmask): ...this.
9251         (irange_bitmask::verify_mask): New.
9252         * value-range.h (class irange_bitmask): New.
9253         (irange_bitmask::set_unknown): New.
9254         (irange_bitmask::unknown_p): New.
9255         (irange_bitmask::irange_bitmask): New.
9256         (irange_bitmask::get_precision): New.
9257         (irange_bitmask::get_nonzero_bits): New.
9258         (irange_bitmask::set_nonzero_bits): New.
9259         (irange_bitmask::operator==): New.
9260         (irange_bitmask::union_): New.
9261         (irange_bitmask::intersect): New.
9262         (class irange): Friend vrange_printer.
9263         (irange::varying_compatible_p): Adjust for bitmask.
9264         (irange::set_varying): Same.
9265         (irange::set_nonzero): Same.
9266
9267 2023-07-07  Jan Beulich  <jbeulich@suse.com>
9268
9269         * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
9270
9271 2023-07-07  Jan Beulich  <jbeulich@suse.com>
9272
9273         * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
9274         alternative. Switch new last alternative's "isa" attribute to
9275         "avx512vl".
9276         (vec_extract_hi_v32qi): Likewise.
9277
9278 2023-07-07  Pan Li  <pan2.li@intel.com>
9279             Robin Dapp  <rdapp@ventanamicro.com>
9280
9281         * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
9282         when FRM_MODE_DYN.
9283         (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
9284         (riscv_mode_exit): Likewise for exit mode.
9285         (riscv_mode_needed): Likewise for needed mode.
9286         (riscv_mode_after): Likewise for after mode.
9287
9288 2023-07-07  Pan Li  <pan2.li@intel.com>
9289
9290         * config/riscv/vector.md: Fix typo.
9291
9292 2023-07-06  Jan Hubicka  <jh@suse.cz>
9293
9294         PR middle-end/25623
9295         * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
9296         of iterations determined.
9297         * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
9298
9299 2023-07-06  Jan Hubicka  <jh@suse.cz>
9300
9301         * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
9302         probability update to be safe on loops with subloops.
9303         Make bound parameter to be iteration bound.
9304         * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
9305         of scale_loop_profile.
9306         * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
9307
9308 2023-07-06  Hao Liu OS  <hliu@os.amperecomputing.com>
9309
9310         PR tree-optimization/110449
9311         * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
9312         vec_loop for the unrolled loop.
9313
9314 2023-07-06  Jan Hubicka  <jh@suse.cz>
9315
9316         * cfg.cc (set_edge_probability_and_rescale_others): New function.
9317         (update_bb_profile_for_threading): Use it; simplify the rest.
9318         * cfg.h (set_edge_probability_and_rescale_others): Declare.
9319         * profile-count.h (profile_probability::apply_scale): New.
9320
9321 2023-07-06  Claudiu Zissulescu  <claziss@gmail.com>
9322
9323         * doc/extend.texi (ARC Built-in Functions): Update documentation
9324         with missing builtins.
9325
9326 2023-07-06  Richard Biener  <rguenther@suse.de>
9327
9328         PR tree-optimization/110556
9329         * tree-ssa-tail-merge.cc (gimple_equal_p): Check
9330         assign code and all operands of non-stores.
9331
9332 2023-07-06  Richard Biener  <rguenther@suse.de>
9333
9334         PR tree-optimization/110563
9335         * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
9336         Remove second argument.
9337         * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
9338         Remove for_epilogue_p argument.  Merge assert ...
9339         (vect_analyze_loop_2): ... with check done before determining
9340         partial vectors by moving it after.
9341         * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
9342
9343 2023-07-06  Thomas Schwinge  <thomas@codesourcery.com>
9344
9345         * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
9346         few things re 'reorder' option and strings.
9347         * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
9348
9349 2023-07-06  Thomas Schwinge  <thomas@codesourcery.com>
9350
9351         * gengtype-parse.cc: Clean up obsolete parametrized structs
9352         remnants.
9353         * gengtype.cc: Likewise.
9354         * gengtype.h: Likewise.
9355
9356 2023-07-06  Thomas Schwinge  <thomas@codesourcery.com>
9357
9358         * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
9359         Adjust all users.
9360
9361 2023-07-06  Thomas Schwinge  <thomas@codesourcery.com>
9362
9363         * gengtype-parse.cc (token_names): Add '"user"'.
9364         * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
9365         'FIRST_TOKEN_WITH_VALUE'.
9366
9367 2023-07-06  Thomas Schwinge  <thomas@codesourcery.com>
9368
9369         * doc/gty.texi (GTY Options) <string_length>: Enhance.
9370
9371 2023-07-06  Thomas Schwinge  <thomas@codesourcery.com>
9372
9373         * gengtype.cc (write_root, write_roots): Explicitly reject
9374         'string_length' option.
9375         * doc/gty.texi (GTY Options) <string_length>: Document.
9376
9377 2023-07-06  Thomas Schwinge  <thomas@codesourcery.com>
9378
9379         * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
9380         (ggc_pch_write_object): Remove 'bool is_string' argument.
9381         * ggc-common.cc: Adjust.
9382         * ggc-page.cc: Likewise.
9383
9384 2023-07-06  Roger Sayle  <roger@nextmovesoftware.com>
9385
9386         * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
9387
9388 2023-07-06  Hongyu Wang  <hongyu.wang@intel.com>
9389
9390         * doc/extend.texi: Move x86 inlining rule to a new subsubsection
9391         and add description for inling of function with arch and tune
9392         attributes.
9393
9394 2023-07-06  Richard Biener  <rguenther@suse.de>
9395
9396         PR tree-optimization/110515
9397         * tree-ssa-pre.cc (compute_avail): Make code dealing
9398         with hoisting loads with different alias-sets more
9399         robust.
9400
9401 2023-07-06  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
9402
9403         * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
9404
9405 2023-07-06  Hongyu Wang  <hongyu.wang@intel.com>
9406
9407         * config/i386/i386.cc (ix86_can_inline_p): If callee has
9408         default arch=x86-64 and tune=generic, do not block the
9409         inlining to its caller. Also allow callee with different
9410         arch= to be inlined if it has always_inline attribute and
9411         it's ISA is subset of caller's.
9412
9413 2023-07-06  liuhongt  <hongtao.liu@intel.com>
9414
9415         * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
9416         DF/SFmode AND/IOR/XOR/ANDN operations.
9417
9418 2023-07-06  Andrew Pinski  <apinski@marvell.com>
9419
9420         PR middle-end/110554
9421         * tree-vect-generic.cc (expand_vector_condition): For comparisons,
9422         just build using boolean_type_node instead of the cond_type.
9423         For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
9424         that will feed into the COND_EXPR.
9425
9426 2023-07-06  liuhongt  <hongtao.liu@intel.com>
9427
9428         PR target/110170
9429         * config/i386/i386.md (movdf_internal): Disparage slightly for
9430         2 alternatives (r,v) and (v,r) by adding constraint modifier
9431         '?'.
9432
9433 2023-07-06  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
9434
9435         PR target/106907
9436         * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
9437         initialization of new_addr.
9438
9439 2023-07-06  Hao Liu  <hliu@os.amperecomputing.com>
9440
9441         PR tree-optimization/110474
9442         * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
9443         unroll factor while selecting the epilog vect loop VF.
9444
9445 2023-07-05  Andrew MacLeod  <amacleod@redhat.com>
9446
9447         * gimple-range-gori.cc (compute_operand_range): Convert to a tail
9448         call.
9449
9450 2023-07-05  Andrew MacLeod  <amacleod@redhat.com>
9451
9452         * gimple-range-gori.cc (compute_operand_range): After calling
9453         compute_operand2_range, recursively call self if needed.
9454         (compute_operand2_range): Turn into a leaf function.
9455         (gori_compute::compute_operand1_and_operand2_range): Finish
9456         operand2 calculation.
9457         * gimple-range-gori.h (compute_operand2_range): Remove name param.
9458
9459 2023-07-05  Andrew MacLeod  <amacleod@redhat.com>
9460
9461         * gimple-range-gori.cc (compute_operand_range): After calling
9462         compute_operand1_range, recursively call self if needed.
9463         (compute_operand1_range): Turn into a leaf function.
9464         (gori_compute::compute_operand1_and_operand2_range): Finish
9465         operand1 calculation.
9466         * gimple-range-gori.h (compute_operand1_range): Remove name param.
9467
9468 2023-07-05  Andrew MacLeod  <amacleod@redhat.com>
9469
9470         * gimple-range-gori.cc (compute_operand_range): Check for
9471         operand interdependence when both op1 and op2 are computed.
9472         (compute_operand1_and_operand2_range): No checks required now.
9473
9474 2023-07-05  Andrew MacLeod  <amacleod@redhat.com>
9475
9476         * gimple-range-gori.cc (compute_operand_range): Check for
9477         a relation between op1 and op2 and use that instead.
9478         (compute_operand1_range): Don't look for a relation override.
9479         (compute_operand2_range): Ditto.
9480
9481 2023-07-05  Jonathan Wakely  <jwakely@redhat.com>
9482
9483         * doc/contrib.texi (Contributors): Update my entry.
9484
9485 2023-07-05  Filip Kastl  <filip.kastl@gmail.com>
9486
9487         * value-prof.cc (gimple_mod_subtract_transform): Correct edge
9488         prob calculation.
9489
9490 2023-07-05  Uros Bizjak  <ubizjak@gmail.com>
9491
9492         * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
9493         scehdule_more_p and contributes_to_priority indirect frunction
9494         type from int to bool.
9495         (no_real_insns_p): Change return type from int to bool.
9496         (contributes_to_priority): Ditto.
9497         * haifa-sched.cc (no_real_insns_p): Change return type from
9498         int to bool and adjust function body accordingly.
9499         * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
9500         variable type from int to bool.
9501         (ps_insn_advance_column): Change return type from int to bool.
9502         (ps_has_conflicts): Ditto. Change "has_conflicts"
9503         variable type from int to bool.
9504         * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
9505         (conditions_mutex_p): Ditto.
9506         * sched-ebb.cc (schedule_more_p): Ditto.
9507         (ebb_contributes_to_priority): Change return type from
9508         int to bool and adjust function body accordingly.
9509         * sched-rgn.cc (is_cfg_nonregular): Ditto.
9510         (check_live_1): Ditto.
9511         (is_pfree): Ditto.
9512         (find_conditional_protection): Ditto.
9513         (is_conditionally_protected): Ditto.
9514         (is_prisky): Ditto.
9515         (is_exception_free): Ditto.
9516         (haifa_find_rgns): Change "unreachable" and "too_large_failure"
9517         variables from int to bool.
9518         (extend_rgns): Change "rescan" variable from int to bool.
9519         (check_live): Change return type from
9520         int to bool and adjust function body accordingly.
9521         (can_schedule_ready_p): Ditto.
9522         (schedule_more_p): Ditto.
9523         (contributes_to_priority): Ditto.
9524
9525 2023-07-05  Robin Dapp  <rdapp@ventanamicro.com>
9526
9527         * doc/md.texi: Document that vec_set and vec_extract must not
9528         fail.
9529         * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
9530         (gimple_expand_vec_set_extract_expr): ...to this.
9531         (gimple_expand_vec_exprs): Call renamed function.
9532         * internal-fn.cc (vec_extract_direct): Add.
9533         (expand_vec_extract_optab_fn): New function to expand
9534         vec_extract optab.
9535         (direct_vec_extract_optab_supported_p): Add.
9536         * internal-fn.def (VEC_EXTRACT): Add.
9537         * optabs.cc (can_vec_extract_var_idx_p): New function.
9538         * optabs.h (can_vec_extract_var_idx_p): Declare.
9539
9540 2023-07-05  Robin Dapp  <rdapp@ventanamicro.com>
9541
9542         * config/riscv/autovec.md: Add gen_lowpart.
9543
9544 2023-07-05  Robin Dapp  <rdapp@ventanamicro.com>
9545
9546         * config/riscv/autovec.md: Allow register index operand.
9547
9548 2023-07-05  Pan Li  <pan2.li@intel.com>
9549
9550         * config/riscv/riscv-vector-builtins.cc
9551         (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
9552
9553 2023-07-05  Robin Dapp  <rdapp@ventanamicro.com>
9554
9555         * config/riscv/autovec.md: Use float_truncate.
9556
9557 2023-07-05  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
9558
9559         * internal-fn.cc (internal_fn_len_index): Apply
9560         LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
9561         (internal_fn_mask_index): Ditto.
9562         * optabs-query.cc (supports_vec_gather_load_p): Ditto.
9563         (supports_vec_scatter_store_p): Ditto.
9564         * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
9565         * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
9566         * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
9567         (vect_get_strided_load_store_ops): Ditto.
9568         (vectorizable_store): Ditto.
9569         (vectorizable_load): Ditto.
9570
9571 2023-07-05  Robin Dapp  <rdapp@ventanamicro.com>
9572             Juzhe-Zhong  <juzhe.zhong@rivai.ai>
9573
9574         * simplify-rtx.cc (native_encode_rtx): Ditto.
9575         (native_decode_vector_rtx): Ditto.
9576         (simplify_const_vector_byte_offset): Ditto.
9577         (simplify_const_vector_subreg): Ditto.
9578         * tree.cc (build_truth_vector_type_for_mode): Ditto.
9579         * varasm.cc (output_constant_pool_2): Ditto.
9580
9581 2023-07-05  YunQiang Su  <yunqiang.su@cipunited.com>
9582
9583         * config/mips/mips.cc (mips_expand_block_move): don't expand for
9584         r6 with -mno-unaligned-access option if one or both of src and
9585         dest are unaligned. restruct: return directly if length is not const.
9586         (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
9587
9588 2023-07-05  Jan Beulich  <jbeulich@suse.com>
9589
9590         PR target/100711
9591         * config/i386/sse.md: New splitters to simplify
9592         not;vec_duplicate as a singular vpternlog.
9593         (one_cmpl<mode>2): Allow broadcast for operand 1.
9594         (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
9595
9596 2023-07-05  Jan Beulich  <jbeulich@suse.com>
9597
9598         PR target/100711
9599         * config/i386/sse.md: New splitters to simplify
9600         not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
9601
9602 2023-07-05  Jan Beulich  <jbeulich@suse.com>
9603
9604         PR target/100711
9605         * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
9606         form of splitter for PR target/100711.
9607
9608 2023-07-05  Richard Biener  <rguenther@suse.de>
9609
9610         PR middle-end/110541
9611         * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
9612         reality.
9613
9614 2023-07-05  Jan Beulich  <jbeulich@suse.com>
9615
9616         PR target/93768
9617         * config/i386/sse.md (*andnot<mode>3): Add new alternatives
9618         for memory form operand 1.
9619
9620 2023-07-05  Jan Beulich  <jbeulich@suse.com>
9621
9622         PR target/93768
9623         * config/i386/i386.cc (ix86_rtx_costs): Further special-case
9624         bitwise vector operations.
9625         * config/i386/sse.md (*iornot<mode>3): New insn.
9626         (*xnor<mode>3): Likewise.
9627         (*<nlogic><mode>3): Likewise.
9628         (andor): New code iterator.
9629         (nlogic): New code attribute.
9630         (ternlog_nlogic): Likewise.
9631
9632 2023-07-05  Richard Biener  <rguenther@suse.de>
9633
9634         * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
9635
9636 2023-07-05  yulong  <shiyulong@iscas.ac.cn>
9637
9638         * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
9639
9640 2023-07-05  yulong  <shiyulong@iscas.ac.cn>
9641
9642         * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
9643         * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
9644         (ADJUST_ALIGNMENT): Ditto.
9645         (RVV_TUPLE_PARTIAL_MODES): Ditto.
9646         (ADJUST_NUNITS): Ditto.
9647         * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
9648         New types.
9649         (vfloat16mf4x3_t): Ditto.
9650         (vfloat16mf4x4_t): Ditto.
9651         (vfloat16mf4x5_t): Ditto.
9652         (vfloat16mf4x6_t): Ditto.
9653         (vfloat16mf4x7_t): Ditto.
9654         (vfloat16mf4x8_t): Ditto.
9655         (vfloat16mf2x2_t): Ditto.
9656         (vfloat16mf2x3_t): Ditto.
9657         (vfloat16mf2x4_t): Ditto.
9658         (vfloat16mf2x5_t): Ditto.
9659         (vfloat16mf2x6_t): Ditto.
9660         (vfloat16mf2x7_t): Ditto.
9661         (vfloat16mf2x8_t): Ditto.
9662         (vfloat16m1x2_t): Ditto.
9663         (vfloat16m1x3_t): Ditto.
9664         (vfloat16m1x4_t): Ditto.
9665         (vfloat16m1x5_t): Ditto.
9666         (vfloat16m1x6_t): Ditto.
9667         (vfloat16m1x7_t): Ditto.
9668         (vfloat16m1x8_t): Ditto.
9669         (vfloat16m2x2_t): Ditto.
9670         (vfloat16m2x3_t): Ditto.
9671         (vfloat16m2x4_t): Ditto.
9672         (vfloat16m4x2_t): Ditto.
9673         * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
9674         (vfloat16mf4x3_t): Ditto.
9675         (vfloat16mf4x4_t): Ditto.
9676         (vfloat16mf4x5_t): Ditto.
9677         (vfloat16mf4x6_t): Ditto.
9678         (vfloat16mf4x7_t): Ditto.
9679         (vfloat16mf4x8_t): Ditto.
9680         (vfloat16mf2x2_t): Ditto.
9681         (vfloat16mf2x3_t): Ditto.
9682         (vfloat16mf2x4_t): Ditto.
9683         (vfloat16mf2x5_t): Ditto.
9684         (vfloat16mf2x6_t): Ditto.
9685         (vfloat16mf2x7_t): Ditto.
9686         (vfloat16mf2x8_t): Ditto.
9687         (vfloat16m1x2_t): Ditto.
9688         (vfloat16m1x3_t): Ditto.
9689         (vfloat16m1x4_t): Ditto.
9690         (vfloat16m1x5_t): Ditto.
9691         (vfloat16m1x6_t): Ditto.
9692         (vfloat16m1x7_t): Ditto.
9693         (vfloat16m1x8_t): Ditto.
9694         (vfloat16m2x2_t): Ditto.
9695         (vfloat16m2x3_t): Ditto.
9696         (vfloat16m2x4_t): Ditto.
9697         (vfloat16m4x2_t): Ditto.
9698         * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
9699         * config/riscv/riscv.md: New.
9700         * config/riscv/vector-iterators.md: New.
9701
9702 2023-07-04  Andrew Pinski  <apinski@marvell.com>
9703
9704         PR tree-optimization/110487
9705         * match.pd (a !=/== CST1 ? CST2 : CST3): Always
9706         build a nonstandard integer and use that.
9707
9708 2023-07-04  Andrew Pinski  <apinski@marvell.com>
9709
9710         * match.pd (a?-1:0): Cast type an integer type
9711         rather the type before the negative.
9712         (a?0:-1): Likewise.
9713
9714 2023-07-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
9715
9716         * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
9717         Change to use HARD_REG_BIT and its macros.
9718         * config/xtensa/xtensa.md
9719         (peephole2: regmove elimination during DFmode input reload):
9720         Likewise.
9721
9722 2023-07-04  Richard Biener  <rguenther@suse.de>
9723
9724         PR tree-optimization/110491
9725         * tree-ssa-phiopt.cc (match_simplify_replacement): Check
9726         whether the PHI args are possibly undefined before folding
9727         the COND_EXPR.
9728
9729 2023-07-04  Pan Li  <pan2.li@intel.com>
9730             Thomas Schwinge  <thomas@codesourcery.com>
9731
9732         * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
9733         bits for machine mode table.
9734         * lto-streamer-out.cc (lto_write_mode_table): Stream out the
9735         HOST machine mode bits.
9736         * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
9737         * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
9738         as the table size.
9739         * tree-streamer.h (streamer_mode_table): Ditto.
9740         (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
9741         as the packing limit.
9742         (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
9743
9744 2023-07-04  Thomas Schwinge  <thomas@codesourcery.com>
9745
9746         * lto-streamer.h (class lto_input_block): Capture
9747         'lto_file_decl_data *file_data' instead of just
9748         'unsigned char *mode_table'.
9749         * ipa-devirt.cc (ipa_odr_read_section): Adjust.
9750         * ipa-fnsummary.cc (inline_read_section): Likewise.
9751         * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
9752         * ipa-modref.cc (read_section): Likewise.
9753         * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
9754         Likewise.
9755         * ipa-sra.cc (isra_read_summary_section): Likewise.
9756         * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
9757         * lto-section-in.cc (lto_create_simple_input_block): Likewise.
9758         * lto-streamer-in.cc (lto_read_body_or_constructor)
9759         (lto_input_toplevel_asms): Likewise.
9760         * tree-streamer.h (bp_unpack_machine_mode): Likewise.
9761
9762 2023-07-04  Richard Biener  <rguenther@suse.de>
9763
9764         * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
9765         (empty_bb_or_one_feeding_into_p): Check for them.
9766         * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
9767         * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
9768
9769 2023-07-04  Richard Biener  <rguenther@suse.de>
9770
9771         * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
9772         check guarding scalar_niter underflow.
9773
9774 2023-07-04  Hao Liu  <hliu@os.amperecomputing.com>
9775
9776         PR tree-optimization/110531
9777         * tree-vect-loop.cc (vect_analyze_loop_1): initialize
9778         slp_done_for_suggested_uf to false.
9779
9780 2023-07-04  Richard Biener  <rguenther@suse.de>
9781
9782         PR tree-optimization/110228
9783         * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
9784         Mark SSA may-undefs.
9785         (bb_no_side_effects_p): Check stmt uses for undefs.
9786
9787 2023-07-04  Richard Biener  <rguenther@suse.de>
9788
9789         PR tree-optimization/110436
9790         * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
9791         force live but not relevant pattern stmts relevant.
9792
9793 2023-07-04  Lili Cui  <lili.cui@intel.com>
9794
9795         * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
9796         * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
9797
9798 2023-07-04  Richard Biener  <rguenther@suse.de>
9799
9800         PR middle-end/110495
9801         * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
9802         since we do not set TREE_OVERFLOW on those since the
9803         introduction of VL vectors.
9804         * match.pd (x +- CST +- CST): For VECTOR_CST do not look
9805         at TREE_OVERFLOW to determine validity of association.
9806
9807 2023-07-04  Richard Biener  <rguenther@suse.de>
9808
9809         PR tree-optimization/110310
9810         * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
9811         Move costing part ...
9812         (vect_analyze_loop_costing): ... here.  Integrate better
9813         estimate for epilogues from ...
9814         (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
9815         with actual epilogue status.
9816         * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
9817         avoid cancelling epilogue vectorization.
9818         (vect_update_epilogue_niters): Remove.  No longer update
9819         epilogue LOOP_VINFO_NITERS.
9820
9821 2023-07-04  Pan Li  <pan2.li@intel.com>
9822
9823         Revert:
9824         2023-07-03  Pan Li  <pan2.li@intel.com>
9825
9826         * config/riscv/vector.md: Fix typo.
9827
9828 2023-07-04  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
9829
9830         * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
9831         * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
9832         (expand_gather_load_optab_fn): Ditto.
9833         (internal_load_fn_p): Ditto.
9834         (internal_store_fn_p): Ditto.
9835         (internal_gather_scatter_fn_p): Ditto.
9836         (internal_fn_len_index): Ditto.
9837         (internal_fn_mask_index): Ditto.
9838         (internal_fn_stored_value_index): Ditto.
9839         * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
9840         (LEN_MASK_SCATTER_STORE): Ditto.
9841         * optabs.def (OPTAB_CD): Ditto.
9842
9843 2023-07-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
9844
9845         * config/riscv/riscv-vsetvl.cc
9846         (vector_insn_info::parse_insn): Add early break.
9847
9848 2023-07-04  Hans-Peter Nilsson  <hp@axis.com>
9849
9850         * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
9851         ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
9852
9853 2023-07-04  Hans-Peter Nilsson  <hp@axis.com>
9854
9855         * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
9856
9857 2023-07-03  Christoph Müllner  <christoph.muellner@vrull.eu>
9858
9859         * common/config/riscv/riscv-common.cc: Add support for zvbb,
9860         zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
9861         zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
9862         * config/riscv/arch-canonicalize: Add canonicalization info for
9863         zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
9864         * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
9865         (MASK_ZVBC): Likewise.
9866         (TARGET_ZVBB): Likewise.
9867         (TARGET_ZVBC): Likewise.
9868         (MASK_ZVKG): Likewise.
9869         (MASK_ZVKNED): Likewise.
9870         (MASK_ZVKNHA): Likewise.
9871         (MASK_ZVKNHB): Likewise.
9872         (MASK_ZVKSED): Likewise.
9873         (MASK_ZVKSH): Likewise.
9874         (MASK_ZVKN): Likewise.
9875         (MASK_ZVKNC): Likewise.
9876         (MASK_ZVKNG): Likewise.
9877         (MASK_ZVKS): Likewise.
9878         (MASK_ZVKSC): Likewise.
9879         (MASK_ZVKSG): Likewise.
9880         (MASK_ZVKT): Likewise.
9881         (TARGET_ZVKG): Likewise.
9882         (TARGET_ZVKNED): Likewise.
9883         (TARGET_ZVKNHA): Likewise.
9884         (TARGET_ZVKNHB): Likewise.
9885         (TARGET_ZVKSED): Likewise.
9886         (TARGET_ZVKSH): Likewise.
9887         (TARGET_ZVKN): Likewise.
9888         (TARGET_ZVKNC): Likewise.
9889         (TARGET_ZVKNG): Likewise.
9890         (TARGET_ZVKS): Likewise.
9891         (TARGET_ZVKSC): Likewise.
9892         (TARGET_ZVKSG): Likewise.
9893         (TARGET_ZVKT): Likewise.
9894         * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
9895
9896 2023-07-03  Andrew Pinski  <apinski@marvell.com>
9897
9898         PR middle-end/110510
9899         * except.h (struct eh_landing_pad_d): Add chain_next GTY.
9900
9901 2023-07-03  Iain Sandoe  <iain@sandoe.co.uk>
9902
9903         * config/darwin.h: Avoid duplicate multiply_defined specs on
9904         earlier Darwin versions with shared libgcc.
9905
9906 2023-07-03  Uros Bizjak  <ubizjak@gmail.com>
9907
9908         * tree.h (tree_int_cst_equal): Change return type from int to bool.
9909         (operand_equal_for_phi_arg_p): Ditto.
9910         (tree_map_base_marked_p): Ditto.
9911         * tree.cc (contains_placeholder_p): Update function body
9912         for bool return type.
9913         (type_cache_hasher::equal): Ditto.
9914         (tree_map_base_hash): Change return type
9915         from int to void and adjust function body accordingly.
9916         (tree_int_cst_equal): Ditto.
9917         (operand_equal_for_phi_arg_p): Ditto.
9918         (get_narrower): Change "first" variable to bool.
9919         (cl_option_hasher::equal): Update function body for bool return type.
9920         * ggc.h (ggc_set_mark): Change return type from int to bool.
9921         (ggc_marked_p): Ditto.
9922         * ggc-page.cc (gt_ggc_mx): Change return type
9923         from int to void and adjust function body accordingly.
9924         (ggc_set_mark): Ditto.
9925
9926 2023-07-03  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
9927
9928         * config/riscv/autovec.md: Change order of
9929         LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
9930         * config/riscv/riscv-v.cc (expand_load_store): Ditto.
9931         * doc/md.texi: Ditto.
9932         * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
9933         * internal-fn.cc (len_maskload_direct): Ditto.
9934         (len_maskstore_direct): Ditto.
9935         (add_len_and_mask_args): New function.
9936         (expand_partial_load_optab_fn): Change order of
9937         LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
9938         (expand_partial_store_optab_fn): Ditto.
9939         (internal_fn_len_index): New function.
9940         (internal_fn_mask_index): Change order of
9941         LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
9942         (internal_fn_stored_value_index): Ditto.
9943         (internal_len_load_store_bias): Ditto.
9944         * internal-fn.h (internal_fn_len_index): New function.
9945         * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
9946         LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
9947         * tree-vect-stmts.cc (vectorizable_store): Ditto.
9948         (vectorizable_load): Ditto.
9949
9950 2023-07-03  Gaius Mulley  <gaiusmod2@gmail.com>
9951
9952         PR modula2/110125
9953         * doc/gm2.texi (Semantic checking): Include examples using
9954         -Wuninit-variable-checking.
9955
9956 2023-07-03  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
9957
9958         * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
9959         (*single_widen_fnma<mode>): Ditto.
9960         (*double_widen_fms<mode>): Ditto.
9961         (*single_widen_fms<mode>): Ditto.
9962         (*double_widen_fnms<mode>): Ditto.
9963         (*single_widen_fnms<mode>): Ditto.
9964
9965 2023-07-03  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
9966
9967         * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
9968         into "*" in pattern name which simplifies build files.
9969         (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
9970         (*pred_single_widen_mul<mode>): New pattern.
9971
9972 2023-07-03  Richard Sandiford  <richard.sandiford@arm.com>
9973
9974         * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
9975         the index to be 0 or 1.
9976
9977 2023-07-03  Lehua Ding  <lehua.ding@rivai.ai>
9978
9979         Revert:
9980         2023-07-03  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
9981
9982         * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
9983         (*single_widen_fnma<mode>): Ditto.
9984         (*double_widen_fms<mode>): Ditto.
9985         (*single_widen_fms<mode>): Ditto.
9986         (*double_widen_fnms<mode>): Ditto.
9987         (*single_widen_fnms<mode>): Ditto.
9988
9989 2023-07-03  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
9990
9991         * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
9992         (*single_widen_fnma<mode>): Ditto.
9993         (*double_widen_fms<mode>): Ditto.
9994         (*single_widen_fms<mode>): Ditto.
9995         (*double_widen_fnms<mode>): Ditto.
9996         (*single_widen_fnms<mode>): Ditto.
9997
9998 2023-07-03  Pan Li  <pan2.li@intel.com>
9999
10000         * config/riscv/vector.md: Fix typo.
10001
10002 2023-07-03  Richard Biener  <rguenther@suse.de>
10003
10004         PR tree-optimization/110506
10005         * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
10006         TYPE_PRECISION access with INTEGRAL_TYPE_P check.
10007
10008 2023-07-03  Richard Biener  <rguenther@suse.de>
10009
10010         PR tree-optimization/110506
10011         * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
10012         type before relying on TYPE_PRECISION to produce a nonzero mask.
10013
10014 2023-07-03  Jie Mei  <jie.mei@oss.cipunited.com>
10015
10016         * config/mips/mips.md(*and<mode>3_mips16): Generates
10017         ZEB/ZEH instructions.
10018
10019 2023-07-03  Jie Mei  <jie.mei@oss.cipunited.com>
10020
10021         * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
10022         address register to M16_REGS for MIPS16.
10023         (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
10024         (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
10025         (AVAIL_NON_MIPS16 (cache..)): Update to
10026         AVAIL_MIPS16E2_OR_NON_MIPS16.
10027         * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
10028         * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
10029
10030 2023-07-03  Jie Mei  <jie.mei@oss.cipunited.com>
10031
10032         * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
10033         for ISA_HAS_MIPS16E2.
10034         (ISA_HAS_SYNC): Same as above.
10035         (ISA_HAS_LL_SC): Same as above.
10036
10037 2023-07-03  Jie Mei  <jie.mei@oss.cipunited.com>
10038
10039         * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
10040         Add logics for generating instruction.
10041         * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
10042         * config/mips/mips.md(mov_<load>l): Generates instructions.
10043         (mov_<load>r): Same as above.
10044         (mov_<store>l): Adjusted for the conditions above.
10045         (mov_<store>r): Same as above.
10046         (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
10047         (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
10048
10049 2023-07-03  Jie Mei  <jie.mei@oss.cipunited.com>
10050
10051         * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
10052         (mips_const_insns): Same as above.
10053         (mips_output_move): Same as above.
10054         (mips_output_function_prologue): Same as above.
10055         * config/mips/mips.md: Same as above
10056
10057 2023-07-03  Jie Mei  <jie.mei@oss.cipunited.com>
10058
10059         * config/mips/constraints.md(Yz): New constraints for mips16e2.
10060         * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
10061         (mips_bit_clear_info): Same as above.
10062         * config/mips/mips.cc(mips_bit_clear_info): New function for
10063         generating instructions.
10064         (mips_bit_clear_p): Same as above.
10065         * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
10066         * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
10067         (*and<mode>3): Generates INS instruction.
10068         (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
10069         (ior<mode>3): Add logics for ORI instruction.
10070         (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
10071         (*ior<mode>3_mips16): Add logics for XORI instruction.
10072         (*xor<mode>3_mips16): Generates XORI instrucion.
10073         (*extzv<mode>): Add logics for EXT instruction.
10074         (*insv<mode>): Add logics for INS instruction.
10075         * config/mips/predicates.md(bit_clear_operand): New predicate for
10076         generating bitwise instructions.
10077         (and_reg_operand): Add logics for generating bitwise instructions.
10078
10079 2023-07-03  Jie Mei  <jie.mei@oss.cipunited.com>
10080
10081         * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
10082         that uses global pointer register.
10083         (mips16_unextended_reference_p): Same as above.
10084         (mips_pic_base_register): Same as above.
10085         (mips_init_relocs): Same as above.
10086         * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
10087         (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
10088         * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
10089         (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
10090
10091 2023-07-03  Jie Mei  <jie.mei@oss.cipunited.com>
10092
10093         * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
10094         * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
10095         (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
10096         (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
10097         (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
10098         * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
10099
10100 2023-07-03  Jie Mei  <jie.mei@oss.cipunited.com>
10101
10102         * config/mips/mips.cc(mips_file_start): Add mips16e2 info
10103         for output file.
10104         * config/mips/mips.h(__mips_mips16e2): Defined a new
10105         predefine macro.
10106         (ISA_HAS_MIPS16E2): Defined a new macro.
10107         (ASM_SPEC): Pass mmips16e2 to the assembler.
10108         * config/mips/mips.opt: Add -m(no-)mips16e2 option.
10109         * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
10110         * doc/invoke.texi: Add -m(no-)mips16e2 option..
10111
10112 2023-07-02  Jakub Jelinek  <jakub@redhat.com>
10113
10114         PR tree-optimization/110508
10115         * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
10116         REALPART_EXPR opf nlhs if re2 is non-NULL.
10117
10118 2023-07-02  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
10119
10120         * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
10121         Simplify.
10122         * config/xtensa/xtensa.md (*xtensa_clamps):
10123         Add TARGET_MINMAX to the condition.
10124
10125 2023-07-02  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
10126
10127         * config/xtensa/xtensa.md (*eqne_INT_MIN):
10128         Add missing ":SI" to the match_operator.
10129
10130 2023-07-02  Iain Sandoe  <iain@sandoe.co.uk>
10131
10132         PR target/108743
10133         * config/darwin.opt: Add fconstant-cfstrings alias to
10134         mconstant-cfstrings.
10135         * doc/invoke.texi: Amend invocation descriptions to reflect
10136         that the fconstant-cfstrings is a target-option alias and to
10137         add the missing mconstant-cfstrings option description to the
10138         Darwin section.
10139
10140 2023-07-01  Jan Hubicka  <jh@suse.cz>
10141
10142         * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
10143         parmaeter; update profile.
10144         * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
10145         * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
10146         (static_loop_exit): ... this; return the edge to be elliminated.
10147         (ch_base::copy_headers): Handle profile updating for eliminated exits.
10148
10149 2023-07-01  Roger Sayle  <roger@nextmovesoftware.com>
10150
10151         * config/i386/i386-features.cc (compute_convert_gain): Provide
10152         gains/costs for ROTATE and ROTATERT (by an integer constant).
10153         (general_scalar_chain::convert_rotate): New helper function to
10154         convert a DImode or SImode rotation by an integer constant into
10155         SSE vector form.
10156         (general_scalar_chain::convert_insn): Call the new convert_rotate
10157         for ROTATE and ROTATERT.
10158         (general_scalar_to_vector_candidate_p): Consider ROTATE and
10159         ROTATERT to be candidates if the second operand is an integer
10160         constant, valid for a rotation (or shift) in the given mode.
10161         * config/i386/i386-features.h (general_scalar_chain): Add new
10162         helper method convert_rotate.
10163
10164 2023-07-01  Jan Hubicka  <jh@suse.cz>
10165
10166         PR tree-optimization/103680
10167         * cfg.cc (update_bb_profile_for_threading): Fix profile update;
10168         make message clearer.
10169
10170 2023-06-30  Qing Zhao  <qing.zhao@oracle.com>
10171
10172         PR tree-optimization/101832
10173         * tree-object-size.cc (addr_object_size): Handle structure/union type
10174         when it has flexible size.
10175
10176 2023-06-30  Eric Botcazou  <ebotcazou@adacore.com>
10177
10178         * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
10179         (fold_nonarray_ctor_reference): Likewise.  Specifically deal
10180         with integral bit-fields.
10181         (fold_ctor_reference): Make sure that the constructor uses the
10182         native storage order.
10183
10184 2023-06-30  Jan Hubicka  <jh@suse.cz>
10185
10186         PR middle-end/109849
10187         * predict.cc (estimate_bb_frequencies): Turn to static function.
10188         (expr_expected_value_1): Fix handling of binary expressions with
10189         predicted values.
10190         * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
10191         (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
10192         queue.
10193         * predict.h (estimate_bb_frequencies): No longer declare it.
10194
10195 2023-06-30  Uros Bizjak  <ubizjak@gmail.com>
10196
10197         * fold-const.h (multiple_of_p): Change return type from int to bool.
10198         * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
10199         neg_conp_p and neg_var_p variables to bool.
10200         (const_binop): Change sat_p variable to bool.
10201         (merge_ranges): Change no_overlap variable to bool.
10202         (extract_muldiv_1): Change same_p variable to bool.
10203         (tree_swap_operands_p): Update function body for bool return type.
10204         (fold_truth_andor): Change commutative variable to bool.
10205         (multiple_of_p): Change return type
10206         from int to void and adjust function body accordingly.
10207         * optabs.h (expand_twoval_unop): Change return type from int to bool.
10208         (expand_twoval_binop): Ditto.
10209         (can_compare_p): Ditto.
10210         (have_add2_insn): Ditto.
10211         (have_addptr3_insn): Ditto.
10212         (have_sub2_insn): Ditto.
10213         (have_insn_for): Ditto.
10214         * optabs.cc (add_equal_note): Ditto.
10215         (widen_operand): Change no_extend argument from int to bool.
10216         (expand_binop): Ditto.
10217         (expand_twoval_unop): Change return type
10218         from int to void and adjust function body accordingly.
10219         (expand_twoval_binop): Ditto.
10220         (can_compare_p): Ditto.
10221         (have_add2_insn): Ditto.
10222         (have_addptr3_insn): Ditto.
10223         (have_sub2_insn): Ditto.
10224         (have_insn_for): Ditto.
10225
10226 2023-06-30  Oluwatamilore Adebayo  <oluwatamilore.adebayo@arm.com>
10227
10228         * config/aarch64/aarch64-simd.md
10229         (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
10230         Expansions for abd vec widen optabs.
10231         (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
10232         * config/aarch64/iterators.md (USMAX_EXT): Code attributes
10233         that give the appropriate extend RTL for the max RTL.
10234
10235 2023-06-30  Oluwatamilore Adebayo  <oluwatamilore.adebayo@arm.com>
10236
10237         * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
10238         * optabs.def (vec_widen_sabd_optab,
10239         vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
10240         vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
10241         vec_widen_uabd_optab,
10242         vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
10243         vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
10244         New optabs.
10245         * doc/md.texi: Document them.
10246         * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
10247         to build a VEC_WIDEN_ABD call if the input precision is smaller
10248         than the precision of the output.
10249         (vect_recog_widen_abd_pattern): Should an ABD expression be
10250         found preceeding an extension, replace the two with a
10251         VEC_WIDEN_ABD.
10252
10253 2023-06-30  Pan Li  <pan2.li@intel.com>
10254
10255         * config/riscv/vector.md: Refactor the common condition.
10256
10257 2023-06-30  Richard Biener  <rguenther@suse.de>
10258
10259         PR tree-optimization/110496
10260         * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
10261         verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
10262
10263 2023-06-30  Richard Biener  <rguenther@suse.de>
10264
10265         PR middle-end/110489
10266         * statistics.cc (curr_statistics_hash): Add argument
10267         indicating whether we should allocate the hash.
10268         (statistics_fini_pass): If the hash isn't allocated
10269         only print the summary header.
10270
10271 2023-06-30  Segher Boessenkool  <segher@kernel.crashing.org>
10272             Thomas Schwinge  <thomas@codesourcery.com>
10273
10274         * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
10275
10276 2023-06-30  Jovan Dmitrović  <jovan.dmitrovic@syrmia.com>
10277
10278         PR target/109435
10279         * config/mips/mips.cc (mips_function_arg_alignment): Returns
10280         the alignment of function argument. In case of typedef type,
10281         it returns the aligment of the aliased type.
10282         (mips_function_arg_boundary): Relocated calculation of the
10283         aligment of function arguments.
10284
10285 2023-06-29  Jan Hubicka  <jh@suse.cz>
10286
10287         PR tree-optimization/109849
10288         * ipa-fnsummary.cc (decompose_param_expr): Skip
10289         functions returning its parameter.
10290         (set_cond_stmt_execution_predicate): Return early
10291         if predicate was constructed.
10292
10293 2023-06-29  Qing Zhao  <qing.zhao@oracle.com>
10294
10295         PR c/77650
10296         * doc/extend.texi: Document GCC extension on a structure containing
10297         a flexible array member to be a member of another structure.
10298
10299 2023-06-29  Qing Zhao  <qing.zhao@oracle.com>
10300
10301         * print-tree.cc (print_node): Print new bit type_include_flexarray.
10302         * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
10303         as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
10304         * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
10305         in bit no_named_args_stdarg_p properly for its corresponding type.
10306         * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
10307         out bit no_named_args_stdarg_p properly for its corresponding type.
10308         * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
10309
10310 2023-06-29  Aldy Hernandez  <aldyh@redhat.com>
10311
10312         * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
10313         * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
10314         * tree-vrp.h (maybe_set_nonzero_bits): Remove.
10315
10316 2023-06-29  Aldy Hernandez  <aldyh@redhat.com>
10317
10318         * value-range.cc (frange::set): Do not call verify_range.
10319         (frange::normalize_kind): Verify range.
10320         (frange::union_nans): Do not call verify_range.
10321         (frange::union_): Same.
10322         (frange::intersect): Same.
10323         (irange::irange_single_pair_union): Call normalize_kind if
10324         necessary.
10325         (irange::union_): Same.
10326         (irange::intersect): Same.
10327         (irange::set_range_from_nonzero_bits): Verify range.
10328         (irange::set_nonzero_bits): Call normalize_kind if necessary.
10329         (irange::get_nonzero_bits): Tweak comment.
10330         (irange::intersect_nonzero_bits): Call normalize_kind if
10331         necessary.
10332         (irange::union_nonzero_bits): Same.
10333         * value-range.h (irange::normalize_kind): Verify range.
10334
10335 2023-06-29  Uros Bizjak  <ubizjak@gmail.com>
10336
10337         * cselib.h (rtx_equal_for_cselib_1):
10338         Change return type from int to bool.
10339         (references_value_p): Ditto.
10340         (rtx_equal_for_cselib_p): Ditto.
10341         * expr.h (can_store_by_pieces): Ditto.
10342         (try_casesi): Ditto.
10343         (try_tablejump): Ditto.
10344         (safe_from_p): Ditto.
10345         * sbitmap.h (bitmap_equal_p): Ditto.
10346         * cselib.cc (references_value_p): Change return type
10347         from int to void and adjust function body accordingly.
10348         (rtx_equal_for_cselib_1): Ditto.
10349         * expr.cc (is_aligning_offset): Ditto.
10350         (can_store_by_pieces): Ditto.
10351         (mostly_zeros_p): Ditto.
10352         (all_zeros_p): Ditto.
10353         (safe_from_p): Ditto.
10354         (is_aligning_offset): Ditto.
10355         (try_casesi): Ditto.
10356         (try_tablejump): Ditto.
10357         (store_constructor): Change "need_to_clear" and
10358         "const_bounds_p" variables to bool.
10359         * sbitmap.cc (bitmap_equal_p):  Change return type from int to bool.
10360
10361 2023-06-29  Robin Dapp  <rdapp@ventanamicro.com>
10362
10363         * tree-ssa-math-opts.cc (divmod_candidate_p): Use
10364         element_precision.
10365
10366 2023-06-29  Richard Biener  <rguenther@suse.de>
10367
10368         PR tree-optimization/110460
10369         * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
10370         Only allow integral, pointer and scalar float type scalar_type.
10371
10372 2023-06-29  Lili Cui  <lili.cui@intel.com>
10373
10374         PR tree-optimization/110148
10375         * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
10376         ops in this function.
10377
10378 2023-06-29  Richard Biener  <rguenther@suse.de>
10379
10380         PR middle-end/110452
10381         * expr.cc (store_constructor): Handle uniform boolean
10382         vectors with integer mode specially.
10383
10384 2023-06-29  Richard Biener  <rguenther@suse.de>
10385
10386         PR middle-end/110461
10387         * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
10388         for VECTOR_TYPE_P.
10389
10390 2023-06-29  Richard Sandiford  <richard.sandiford@arm.com>
10391
10392         * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
10393         (array_slice): Relax va_gc constructor to handle all vectors
10394         with a vl_embed layout.
10395
10396 2023-06-29  Pan Li  <pan2.li@intel.com>
10397
10398         * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
10399         (riscv_mode_needed): Likewise.
10400         (riscv_entity_mode_after): Likewise.
10401         (riscv_mode_after): Likewise.
10402         (riscv_mode_entry): Likewise.
10403         (riscv_mode_exit): Likewise.
10404         * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
10405         for FRM.
10406         * config/riscv/riscv.md: Add FRM register.
10407         * config/riscv/vector-iterators.md: Add FRM type.
10408         * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
10409         (fsrm): Define new insn for fsrm instruction.
10410
10411 2023-06-29  Pan Li  <pan2.li@intel.com>
10412
10413         * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
10414         Add macro for static frm min and max.
10415         * config/riscv/riscv-vector-builtins-bases.cc
10416         (class binop_frm): New class for floating-point with frm.
10417         (BASE): Add vfadd for frm.
10418         * config/riscv/riscv-vector-builtins-bases.h: Likewise.
10419         * config/riscv/riscv-vector-builtins-functions.def
10420         (vfadd_frm): Likewise.
10421         * config/riscv/riscv-vector-builtins-shapes.cc
10422         (struct alu_frm_def): New struct for alu with frm.
10423         (SHAPE): Add alu with frm.
10424         * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
10425         * config/riscv/riscv-vector-builtins.cc
10426         (function_checker::report_out_of_range_and_not): New function
10427         for report out of range and not val.
10428         (function_checker::require_immediate_range_or): New function
10429         for checking in range or one val.
10430         * config/riscv/riscv-vector-builtins.h: Add function decl.
10431
10432 2023-06-29  Cui, Lili  <lili.cui@intel.com>
10433
10434         * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
10435         from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
10436
10437 2023-06-28  Hans-Peter Nilsson  <hp@axis.com>
10438
10439         PR target/110144
10440         * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
10441         to insn before validating it.
10442
10443 2023-06-28  Jan Hubicka  <jh@suse.cz>
10444
10445         PR middle-end/110334
10446         * ipa-fnsummary.h (ipa_fn_summary): Add
10447         safe_to_inline_to_always_inline.
10448         * ipa-inline.cc (can_early_inline_edge_p): ICE
10449         if SSA is not built; do cycle checking for
10450         always_inline functions.
10451         (inline_always_inline_functions): Be recrusive;
10452         watch for cycles; do not updat overall summary.
10453         (early_inliner): Do not give up on always_inlines.
10454         * ipa-utils.cc (ipa_reverse_postorder): Do not skip
10455         always inlines.
10456
10457 2023-06-28  Uros Bizjak  <ubizjak@gmail.com>
10458
10459         * output.h (leaf_function_p): Change return type from int to bool.
10460         (final_forward_branch_p): Ditto.
10461         (only_leaf_regs_used): Ditto.
10462         (maybe_assemble_visibility): Ditto.
10463         * varasm.h (supports_one_only): Ditto.
10464         * rtl.h (compute_alignments): Change return type from int to void.
10465         * final.cc (app_on): Change return type from int to bool.
10466         (compute_alignments): Change return type from int to void
10467         and adjust function body accordingly.
10468         (shorten_branches):  Change "something_changed" variable
10469         type from int to bool.
10470         (leaf_function_p):  Change return type from int to bool
10471         and adjust function body accordingly.
10472         (final_forward_branch_p): Ditto.
10473         (only_leaf_regs_used): Ditto.
10474         * varasm.cc (contains_pointers_p): Change return type from
10475         int to bool and adjust function body accordingly.
10476         (compare_constant): Ditto.
10477         (maybe_assemble_visibility): Ditto.
10478         (supports_one_only): Ditto.
10479
10480 2023-06-28  Manolis Tsamis  <manolis.tsamis@vrull.eu>
10481
10482         PR debug/110308
10483         * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
10484         (maybe_copy_reg_attrs): New function.
10485         (find_oldest_value_reg): Use maybe_copy_reg_attrs.
10486         (copyprop_hardreg_forward_1): Ditto.
10487
10488 2023-06-28  Richard Biener  <rguenther@suse.de>
10489
10490         PR tree-optimization/110434
10491         * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
10492         VAR we replace with <retval>.
10493
10494 2023-06-28  Richard Biener  <rguenther@suse.de>
10495
10496         PR tree-optimization/110451
10497         * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
10498         tcc_comparison are expensive.
10499
10500 2023-06-28  Roger Sayle  <roger@nextmovesoftware.com>
10501
10502         * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
10503         for TImode comparisons on 32-bit architectures.
10504         * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
10505         SWIM1248x to exclude/avoid TImode being conditional on -m64.
10506         (cbranchti4): New define_expand for TImode on both TARGET_64BIT
10507         and/or with TARGET_SSE4_1.
10508         * config/i386/predicates.md (ix86_timode_comparison_operator):
10509         New predicate that depends upon TARGET_64BIT.
10510         (ix86_timode_comparison_operand): Likewise.
10511
10512 2023-06-28  Roger Sayle  <roger@nextmovesoftware.com>
10513
10514         PR target/78794
10515         * config/i386/i386-features.cc (compute_convert_gain): Provide
10516         more accurate gains for conversion of scalar comparisons to
10517         PTEST.
10518
10519 2023-06-28  Richard Biener  <rguenther@suse.de>
10520
10521         PR tree-optimization/110443
10522         * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
10523         gather loads.
10524
10525 2023-06-28  Haochen Gui  <guihaoc@gcc.gnu.org>
10526
10527         * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
10528         (peephole2 for move_and_compare): New.
10529         (mode_iterator WORD): New.  Set the mode to SI/DImode by
10530         TARGET_POWERPC64.
10531         (*mov<mode>_internal2): Change the mode iterator from P to WORD.
10532         (split pattern for compare_and_move): Likewise.
10533
10534 2023-06-28  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
10535
10536         * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
10537         (*single_widen_fma<mode>): Ditto.
10538
10539 2023-06-28  Haochen Gui  <guihaoc@gcc.gnu.org>
10540
10541         PR target/104124
10542         * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
10543         to...
10544         (altivec_vupkhs<VU_char>_direct): ...this.
10545         * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
10546         predicate to test if a constant can be loaded with vspltisw and
10547         vupkhsw.
10548         (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
10549         a vector constant can be synthesized with a vspltisw and a vupkhsw.
10550         * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
10551         Declare.
10552         * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
10553         function to return true if OP mode is V2DI and can be synthesized
10554         with vupkhsw and vspltisw.
10555         * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
10556         constants with vspltisw and vupkhsw.
10557
10558 2023-06-28  Jan Hubicka  <jh@suse.cz>
10559
10560         PR tree-optimization/110377
10561         * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
10562         the ranger query.
10563         (ipa_analyze_node): Enable ranger.
10564
10565 2023-06-28  Richard Biener  <rguenther@suse.de>
10566
10567         * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
10568         (TYPE_PRECISION_RAW): Provide raw access to the precision
10569         field.
10570         * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
10571         (gimple_canonical_types_compatible_p): Likewise.
10572         * tree-streamer-out.cc (pack_ts_type_common_value_fields):
10573         Stream TYPE_PRECISION_RAW.
10574         * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
10575         Likewise.
10576         * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
10577
10578 2023-06-28  Alexandre Oliva  <oliva@adacore.com>
10579
10580         * doc/extend.texi (zero-call-used-regs): Document leafy and
10581         variants thereof.
10582         * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
10583         LEAFY and variants.
10584         * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
10585         functions in leafy mode.
10586         * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
10587
10588 2023-06-28  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
10589
10590         * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
10591         * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
10592         Remove.
10593         (@pred_single_widen_add<mode>): New pattern.
10594         (@pred_single_widen_sub<mode>): New pattern.
10595
10596 2023-06-28  liuhongt  <hongtao.liu@intel.com>
10597
10598         * config/i386/i386.cc (ix86_invalid_conversion): New function.
10599         (TARGET_INVALID_CONVERSION): Define as
10600         ix86_invalid_conversion.
10601
10602 2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
10603
10604         * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
10605         expander.
10606         (<float_cvt><vnconvert><mode>2): Ditto.
10607         (<optab><mode><vnconvert>2): Ditto.
10608         (<float_cvt><mode><vnconvert>2): Ditto.
10609         * config/riscv/vector-iterators.md: Add vnconvert.
10610
10611 2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
10612
10613         * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
10614         expander.
10615         (extend<v_quad_trunc><mode>2): Ditto.
10616         (trunc<mode><v_double_trunc>2): Ditto.
10617         (trunc<mode><v_quad_trunc>2): Ditto.
10618         * config/riscv/vector-iterators.md: Add VQEXTF and HF to
10619         V_QUAD_TRUNC and v_quad_trunc.
10620
10621 2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
10622
10623         * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
10624         expander.
10625
10626 2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
10627
10628         * config/riscv/autovec.md (copysign<mode>3): Add expander.
10629         (xorsign<mode>3): Ditto.
10630         * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
10631         New class.
10632         * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
10633         (xorsign): Ditto.
10634         (n): Ditto.
10635         (x): Ditto.
10636         * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
10637         (@pred_ncopysign<mode>_scalar): Ditto.
10638
10639 2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
10640
10641         * config/riscv/autovec.md: VF_AUTO -> VF.
10642         * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
10643         VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
10644         VHF_LMUL1.
10645         * config/riscv/vector.md: Use new iterators.
10646
10647 2023-06-27  Robin Dapp  <rdapp@ventanamicro.com>
10648
10649         * match.pd: Use element_mode and check if target supports
10650         operation with new type.
10651
10652 2023-06-27  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
10653
10654         * config/aarch64/aarch64-sve-builtins-base.cc
10655         (svdupq_impl::fold_nonconst_dupq): New method.
10656         (svdupq_impl::fold): Call fold_nonconst_dupq.
10657
10658 2023-06-27  Andrew Pinski  <apinski@marvell.com>
10659
10660         PR middle-end/110420
10661         PR middle-end/103979
10662         PR middle-end/98619
10663         * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
10664
10665 2023-06-27  Aldy Hernandez  <aldyh@redhat.com>
10666
10667         * ipa-cp.cc (decide_whether_version_node): Adjust comment.
10668         * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
10669         for Value_Range.
10670         (set_switch_stmt_execution_predicate): Same.
10671         * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
10672
10673 2023-06-27  Aldy Hernandez  <aldyh@redhat.com>
10674
10675         * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
10676         ipa_vr instead of value_range.
10677         (gt_pch_nx): Same.
10678         (gt_ggc_mx): Same.
10679         (ipa_get_value_range): Same.
10680         * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
10681         ipa_vr.
10682         (gt_ggc_mx): Same.
10683
10684 2023-06-27  Aldy Hernandez  <aldyh@redhat.com>
10685
10686         * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
10687         * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
10688         (ipa_set_jfunc_vr): Take a range.
10689         (ipa_compute_jump_functions_for_edge): Pass range to
10690         ipa_set_jfunc_vr.
10691         (ipa_write_jump_function): Call streamer write helper.
10692         (ipa_read_jump_function): Call streamer read helper.
10693         * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
10694
10695 2023-06-27  Richard Sandiford  <richard.sandiford@arm.com>
10696
10697         * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
10698         as a probable initializer rather than a probable complete statement.
10699
10700 2023-06-27  Richard Biener  <rguenther@suse.de>
10701
10702         PR tree-optimization/96208
10703         * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
10704         a non-grouped load if it is the same for all lanes.
10705         (vect_build_slp_tree_2): Handle not grouped loads.
10706         (vect_optimize_slp_pass::remove_redundant_permutations):
10707         Likewise.
10708         (vect_transform_slp_perm_load_1): Likewise.
10709         * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
10710         (get_group_load_store_type): Likewise.  Handle
10711         invariant accesses.
10712         (vectorizable_load): Likewise.
10713
10714 2023-06-27  liuhongt  <hongtao.liu@intel.com>
10715
10716         PR rtl-optimization/110237
10717         * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
10718         UNSPEC_MASKMOV.
10719         (maskstore<mode><avx512fmaskmodelower): Ditto.
10720         (*<avx512>_store<mode>_mask): New define_insn, it's renamed
10721         from original <avx512>_store<mode>_mask.
10722
10723 2023-06-27  liuhongt  <hongtao.liu@intel.com>
10724
10725         * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
10726         Move flag_expensive_optimizations && !optimize_size to ..
10727         * config/i386/i386-options.cc (ix86_option_override_internal):
10728         .. this, it makes -mvzeroupper independent of optimization
10729         level, but still keeps the behavior of architecture
10730         tuning(emit_vzeroupper) unchanged.
10731
10732 2023-06-27  liuhongt  <hongtao.liu@intel.com>
10733
10734         PR target/82735
10735         * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
10736         vzeroupper for vzeroupper call_insn.
10737
10738 2023-06-27  Andrew Pinski  <apinski@marvell.com>
10739
10740         * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
10741         defbuiltin usage.
10742
10743 2023-06-27  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
10744
10745         * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
10746         with base != 0.
10747
10748 2023-06-26  Andrew Pinski  <apinski@marvell.com>
10749
10750         * doc/extend.texi (access attribute): Add
10751         cindex for it.
10752         (interrupt/interrupt_handler attribute):
10753         Likewise.
10754
10755 2023-06-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
10756
10757         * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
10758         Use <DWI> instead of <V2XWIDE>.
10759         (aarch64_sqrshrun_n<mode>): Likewise.
10760
10761 2023-06-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
10762
10763         * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
10764         Rename to...
10765         (aarch64_rnd_imm_p): ... This.
10766         * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
10767         Rename to...
10768         (aarch64_int_rnd_operand): ... This.
10769         (aarch64_simd_rshrn_imm_vec): Delete.
10770         * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
10771         Adjust for the above.
10772         (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
10773         (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
10774         (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
10775         (aarch64_sqrshrun_n<mode>_insn): Likewise.
10776         (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
10777         (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
10778         (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
10779         (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
10780         * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
10781         Rename to...
10782         (aarch64_rnd_imm_p): ... This.
10783
10784 2023-06-26  Andreas Krebbel  <krebbel@linux.ibm.com>
10785
10786         * config/s390/s390.cc (s390_encode_section_info): Set
10787         SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
10788         misaligned.
10789
10790 2023-06-26  Jan Hubicka  <jh@suse.cz>
10791
10792         PR tree-optimization/109849
10793         * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
10794         count of newly constructed forwarder block.
10795
10796 2023-06-26  Andrew Carlotti  <andrew.carlotti@arm.com>
10797
10798         * doc/optinfo.texi: Fix "steam" -> "stream".
10799
10800 2023-06-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
10801
10802         * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
10803         fix LEN_STORE.
10804         (dse_optimize_stmt): Add LEN_MASK_STORE.
10805
10806 2023-06-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
10807
10808         * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
10809         fold of LOAD/STORE with length.
10810
10811 2023-06-26  Andrew MacLeod  <amacleod@redhat.com>
10812
10813         * gimple-range-gori.cc (compute_operand1_and_operand2_range):
10814         Check for interdependence between operands 1 and 2.
10815
10816 2023-06-26  Richard Sandiford  <richard.sandiford@arm.com>
10817
10818         * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
10819         into account when costing non-widening/truncating conversions.
10820
10821 2023-06-26  Richard Biener  <rguenther@suse.de>
10822
10823         PR tree-optimization/110381
10824         * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
10825         Materialize permutes before fold-left reductions.
10826
10827 2023-06-26  Pan Li  <pan2.li@intel.com>
10828
10829         * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
10830
10831 2023-06-26  Richard Biener  <rguenther@suse.de>
10832
10833         * varasm.cc (initializer_constant_valid_p_1): Also
10834         constrain the type of value to be scalar integral
10835         before dispatching to narrowing_initializer_constant_valid_p.
10836
10837 2023-06-26  Richard Biener  <rguenther@suse.de>
10838
10839         * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
10840         Use element_precision.
10841
10842 2023-06-26  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
10843
10844         * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
10845         vcond patterns.
10846         (vcondu<V:mode><VI:mode>): Ditto.
10847         * config/riscv/riscv-protos.h (expand_vcond): Ditto.
10848         * config/riscv/riscv-v.cc (expand_vcond): Ditto.
10849
10850 2023-06-26  Richard Biener  <rguenther@suse.de>
10851
10852         PR tree-optimization/110392
10853         * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
10854         Do early exits on true/false predicate only after normalization.
10855
10856 2023-06-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
10857
10858         * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
10859         "length".
10860
10861 2023-06-26  Roger Sayle  <roger@nextmovesoftware.com>
10862
10863         * config/i386/i386.md (peephole2): Simplify zeroing a register
10864         followed by an IOR, XOR or PLUS operation on it, into a move.
10865         (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
10866         eliminate (and hide from reload) unnecessary word to doubleword
10867         extensions that are followed by left shifts by sufficiently large,
10868         but valid, bit counts.
10869
10870 2023-06-26  liuhongt  <hongtao.liu@intel.com>
10871
10872         PR tree-optimization/110371
10873         PR tree-optimization/110018
10874         * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
10875         save intermediate type operand instead of "subtle" vec_dest
10876         for case NONE.
10877
10878 2023-06-26  liuhongt  <hongtao.liu@intel.com>
10879
10880         PR tree-optimization/110371
10881         PR tree-optimization/110018
10882         * tree-vect-stmts.cc (vectorizable_conversion): Don't use
10883         intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
10884
10885 2023-06-26  Hongyu Wang  <hongyu.wang@intel.com>
10886
10887         * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
10888         Override tune_string with arch_string if tune_string is not
10889         explicitly specified.
10890
10891 2023-06-25  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
10892
10893         * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
10894         AVL propagation.
10895         * config/riscv/riscv-vsetvl.h: New function.
10896
10897 2023-06-25  Li Xu  <xuli1@eswincomputing.com>
10898
10899         * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
10900         emit_move_insn
10901
10902 2023-06-25  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
10903
10904         * config/riscv/autovec.md (len_load_<mode>): Remove.
10905         (len_maskload<mode><vm>): Remove.
10906         (len_store_<mode>): New pattern.
10907         (len_maskstore<mode><vm>): New pattern.
10908         * config/riscv/predicates.md (autovec_length_operand): New predicate.
10909         * config/riscv/riscv-protos.h (enum insn_type): New enum.
10910         (expand_load_store): New function.
10911         * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
10912         (emit_nonvlmax_masked_insn): Ditto.
10913         (expand_load_store): Ditto.
10914         * config/riscv/riscv-vector-builtins.cc
10915         (function_expander::use_contiguous_store_insn): Add avl_type operand
10916         into pred_store.
10917         * config/riscv/vector.md: Ditto.
10918
10919 2023-06-25  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
10920
10921         * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
10922         argument index.
10923
10924 2023-06-25  Pan Li  <pan2.li@intel.com>
10925
10926         * config/riscv/vector.md: Revert.
10927
10928 2023-06-25  Pan Li  <pan2.li@intel.com>
10929
10930         * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
10931         * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
10932         (ADJUST_ALIGNMENT): Ditto.
10933         (RVV_TUPLE_PARTIAL_MODES): Ditto.
10934         (ADJUST_NUNITS): Ditto.
10935         * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
10936         (vfloat16mf4x3_t): Ditto.
10937         (vfloat16mf4x4_t): Ditto.
10938         (vfloat16mf4x5_t): Ditto.
10939         (vfloat16mf4x6_t): Ditto.
10940         (vfloat16mf4x7_t): Ditto.
10941         (vfloat16mf4x8_t): Ditto.
10942         (vfloat16mf2x2_t): Ditto.
10943         (vfloat16mf2x3_t): Ditto.
10944         (vfloat16mf2x4_t): Ditto.
10945         (vfloat16mf2x5_t): Ditto.
10946         (vfloat16mf2x6_t): Ditto.
10947         (vfloat16mf2x7_t): Ditto.
10948         (vfloat16mf2x8_t): Ditto.
10949         (vfloat16m1x2_t): Ditto.
10950         (vfloat16m1x3_t): Ditto.
10951         (vfloat16m1x4_t): Ditto.
10952         (vfloat16m1x5_t): Ditto.
10953         (vfloat16m1x6_t): Ditto.
10954         (vfloat16m1x7_t): Ditto.
10955         (vfloat16m1x8_t): Ditto.
10956         (vfloat16m2x2_t): Ditto.
10957         (vfloat16m2x3_t): Diito.
10958         (vfloat16m2x4_t): Diito.
10959         (vfloat16m4x2_t): Diito.
10960         * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
10961         (vfloat16mf4x3_t): Ditto.
10962         (vfloat16mf4x4_t): Ditto.
10963         (vfloat16mf4x5_t): Ditto.
10964         (vfloat16mf4x6_t): Ditto.
10965         (vfloat16mf4x7_t): Ditto.
10966         (vfloat16mf4x8_t): Ditto.
10967         (vfloat16mf2x2_t): Ditto.
10968         (vfloat16mf2x3_t): Ditto.
10969         (vfloat16mf2x4_t): Ditto.
10970         (vfloat16mf2x5_t): Ditto.
10971         (vfloat16mf2x6_t): Ditto.
10972         (vfloat16mf2x7_t): Ditto.
10973         (vfloat16mf2x8_t): Ditto.
10974         (vfloat16m1x2_t): Ditto.
10975         (vfloat16m1x3_t): Ditto.
10976         (vfloat16m1x4_t): Ditto.
10977         (vfloat16m1x5_t): Ditto.
10978         (vfloat16m1x6_t): Ditto.
10979         (vfloat16m1x7_t): Ditto.
10980         (vfloat16m1x8_t): Ditto.
10981         (vfloat16m2x2_t): Ditto.
10982         (vfloat16m2x3_t): Ditto.
10983         (vfloat16m2x4_t): Ditto.
10984         (vfloat16m4x2_t): Ditto.
10985         * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
10986         * config/riscv/riscv.md: Ditto.
10987         * config/riscv/vector-iterators.md: Ditto.
10988
10989 2023-06-25  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
10990
10991         * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
10992         (gimple_fold_partial_load_store_mem_ref): Ditto.
10993         (gimple_fold_partial_store): Ditto.
10994         (gimple_fold_call): Ditto.
10995
10996 2023-06-25  liuhongt  <hongtao.liu@intel.com>
10997
10998         PR target/110309
10999         * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
11000         Refine pattern with UNSPEC_MASKLOAD.
11001         (maskload<mode><avx512fmaskmodelower>): Ditto.
11002         (*<avx512>_load<mode>_mask): Extend mode iterator to
11003         VI12HFBF_AVX512VL.
11004         (*<avx512>_load<mode>): Ditto.
11005
11006 2023-06-25  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
11007
11008         * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
11009
11010 2023-06-25  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
11011
11012         * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
11013         LEN_MASK_{LOAD,STORE}
11014
11015 2023-06-25  yulong  <shiyulong@iscas.ac.cn>
11016
11017         * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
11018
11019 2023-06-24  Roger Sayle  <roger@nextmovesoftware.com>
11020
11021         * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
11022
11023 2023-06-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
11024
11025         * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
11026         (*fma<VI:mode><P:mode>): Ditto.
11027         (*fnma<mode>): Ditto.
11028         (*fnma<VI:mode><P:mode>): Ditto.
11029
11030 2023-06-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
11031
11032         * config/riscv/autovec.md (fma<mode>4): New pattern.
11033         (*fma<mode>): Ditto.
11034         (fnma<mode>4): Ditto.
11035         (*fnma<mode>): Ditto.
11036         (fms<mode>4): Ditto.
11037         (*fms<mode>): Ditto.
11038         (fnms<mode>4): Ditto.
11039         (*fnms<mode>): Ditto.
11040         * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
11041         New function.
11042         * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
11043         * config/riscv/vector.md: Fix attribute bug.
11044
11045 2023-06-24  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
11046
11047         * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
11048         Apply LEN_MASK_{LOAD,STORE}.
11049
11050 2023-06-24  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
11051
11052         * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
11053         Add LEN_MASK_{LOAD,STORE}.
11054
11055 2023-06-24  David Malcolm  <dmalcolm@redhat.com>
11056
11057         * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
11058         * diagnostic.cc: Likewise.
11059         * text-art/box-drawing.cc: Likewise.
11060         * text-art/canvas.cc: Likewise.
11061         * text-art/ruler.cc: Likewise.
11062         * text-art/selftests.cc: Likewise.
11063         * text-art/selftests.h (text_art::canvas): New forward decl.
11064         * text-art/style.cc: Add #define INCLUDE_VECTOR.
11065         * text-art/styled-string.cc: Likewise.
11066         * text-art/table.cc: Likewise.
11067         * text-art/table.h: Remove #include <vector>.
11068         * text-art/theme.cc: Add #define INCLUDE_VECTOR.
11069         * text-art/types.h: Check that INCLUDE_VECTOR is defined.
11070         Remove #include of <vector> and <string>.
11071         * text-art/widget.cc: Add #define INCLUDE_VECTOR.
11072         * text-art/widget.h: Remove #include <vector>.
11073
11074 2023-06-24  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
11075
11076         * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
11077         (internal_load_fn_p): Add LEN_MASK_LOAD.
11078         (internal_store_fn_p): Add LEN_MASK_STORE.
11079         (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
11080         (internal_fn_stored_value_index): Add LEN_MASK_STORE.
11081         (internal_len_load_store_bias):  Add LEN_MASK_{LOAD,STORE}.
11082         * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
11083         (get_len_load_store_mode): Ditto.
11084         * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
11085         (get_len_load_store_mode): Ditto.
11086         * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
11087         (get_all_ones_mask): New function.
11088         (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
11089         (vectorizable_load): Ditto.
11090
11091 2023-06-23  Marek Polacek  <polacek@redhat.com>
11092
11093         * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
11094         -std=gnu++26.  Document that for C++23, its value is 202302L.
11095         * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
11096         * dwarf2out.cc (highest_c_language): Handle GNU C++26.
11097         (gen_compile_unit_die): Likewise.
11098
11099 2023-06-23  Jan Hubicka  <jh@suse.cz>
11100
11101         * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
11102         demand.
11103         (pass_phiprop::execute): Do not compute it here; return
11104         update_ssa_only_virtuals if something changed.
11105         (pass_data_phiprop): Remove TODO_update_ssa from todos.
11106
11107 2023-06-23   Michael Meissner  <meissner@linux.ibm.com>
11108             Aaron Sawdey   <acsawdey@linux.ibm.com>
11109
11110         PR target/105325
11111         * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
11112         allowed prefixed lwa to be generated.
11113         * config/rs6000/fusion.md: Regenerate.
11114         * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
11115         * config/rs6000/rs6000.md (prefixed attribute): Add support for load
11116         plus compare immediate fused insns.
11117         (maybe_prefixed): Likewise.
11118
11119 2023-06-23  Roger Sayle  <roger@nextmovesoftware.com>
11120
11121         * simplify-rtx.cc (simplify_subreg):  Optimize lowpart SUBREGs
11122         of ASHIFT to const0_rtx with sufficiently large shift count.
11123         Optimize highpart SUBREGs of ASHIFT as the shift operand when
11124         the shift count is the correct offset.  Optimize SUBREGs of
11125         multi-word logic operations if the SUBREGs of both operands
11126         can be simplified.
11127
11128 2023-06-23  Richard Biener  <rguenther@suse.de>
11129
11130         * varasm.cc (initializer_constant_valid_p_1): Only
11131         allow conversions between scalar floating point types.
11132
11133 2023-06-23  Richard Biener  <rguenther@suse.de>
11134
11135         * tree-vect-stmts.cc (vectorizable_assignment):
11136         Properly handle non-integral operands when analyzing
11137         conversions.
11138
11139 2023-06-23  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
11140
11141         PR tree-optimization/110280
11142         * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
11143         using build_vector_from_val with the element of input operand, and
11144         mask's type if operand and mask's types don't match.
11145
11146 2023-06-23  Richard Biener  <rguenther@suse.de>
11147
11148         * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
11149         the truth_value_p case with !VECTOR_TYPE_P.
11150
11151 2023-06-23  Richard Biener  <rguenther@suse.de>
11152
11153         * tree-vect-patterns.cc (vect_look_through_possible_promotion):
11154         Exit early when the type isn't scalar integral.
11155
11156 2023-06-23  Richard Biener  <rguenther@suse.de>
11157
11158         * match.pd ((outertype)((innertype0)a+(innertype1)b)
11159         -> ((newtype)a+(newtype)b)): Use element_precision
11160         where appropriate.
11161
11162 2023-06-23  Richard Biener  <rguenther@suse.de>
11163
11164         * fold-const.cc (fold_binary_loc): Use element_precision
11165         when trying (double)float1 CMP (double)float2 to
11166         float1 CMP float2 simplification.
11167         * match.pd: Likewise.
11168
11169 2023-06-23  Richard Biener  <rguenther@suse.de>
11170
11171         * tree-vect-stmts.cc (vectorizable_load): Avoid useless
11172         copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
11173
11174 2023-06-23  Richard Biener  <rguenther@suse.de>
11175
11176         * tree-vect-stmts.cc (vector_vector_composition_type):
11177         Handle composition of a vector from a number of elements that
11178         happens to match its number of lanes.
11179
11180 2023-06-22  Marek Polacek  <polacek@redhat.com>
11181
11182         * configure.ac (--enable-host-bind-now): New check.  Add
11183         -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
11184         * configure: Regenerate.
11185         * doc/install.texi: Document --enable-host-bind-now.
11186
11187 2023-06-22  Di Zhao OS  <dizhao@os.amperecomputing.com>
11188
11189         * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
11190
11191 2023-06-22  Richard Biener  <rguenther@suse.de>
11192
11193         PR tree-optimization/110332
11194         * tree-ssa-phiprop.cc (propagate_with_phi): Always
11195         check aliasing with edge inserted loads.
11196
11197 2023-06-22  Roger Sayle  <roger@nextmovesoftware.com>
11198             Uros Bizjak  <ubizjak@gmail.com>
11199
11200         * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
11201         expansion of ptestc with equal operands as producing const1_rtx.
11202         * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
11203         estimates of UNSPEC_PTEST, where the ptest performs the PAND
11204         or PAND of its operands.
11205         * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
11206         of reg_equal_p operands into an x86_stc instruction.
11207         (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
11208         (define_split): Similar to above for strict_low_part destinations.
11209         (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
11210
11211 2023-06-22  David Malcolm  <dmalcolm@redhat.com>
11212
11213         PR analyzer/106626
11214         * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
11215         * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
11216         text art.
11217         (fanalyzer-debug-text-art): New.
11218
11219 2023-06-22  David Malcolm  <dmalcolm@redhat.com>
11220
11221         * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
11222         text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
11223         text-art/style.o, text-art/styled-string.o, text-art/table.o,
11224         text-art/theme.o, and text-art/widget.o.
11225         * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
11226         (COLOR_FG_BRIGHT_RED): New.
11227         (COLOR_FG_BRIGHT_GREEN): New.
11228         (COLOR_FG_BRIGHT_YELLOW): New.
11229         (COLOR_FG_BRIGHT_BLUE): New.
11230         (COLOR_FG_BRIGHT_MAGENTA): New.
11231         (COLOR_FG_BRIGHT_CYAN): New.
11232         (COLOR_FG_BRIGHT_WHITE): New.
11233         (COLOR_BG_BRIGHT_BLACK): New.
11234         (COLOR_BG_BRIGHT_RED): New.
11235         (COLOR_BG_BRIGHT_GREEN): New.
11236         (COLOR_BG_BRIGHT_YELLOW): New.
11237         (COLOR_BG_BRIGHT_BLUE): New.
11238         (COLOR_BG_BRIGHT_MAGENTA): New.
11239         (COLOR_BG_BRIGHT_CYAN): New.
11240         (COLOR_BG_BRIGHT_WHITE): New.
11241         * common.opt (fdiagnostics-text-art-charset=): New option.
11242         (diagnostic-text-art.h): New SourceInclude.
11243         (diagnostic_text_art_charset) New Enum and EnumValues.
11244         * configure: Regenerate.
11245         * configure.ac (gccdepdir): Add text-art to loop.
11246         * diagnostic-diagram.h: New file.
11247         * diagnostic-format-json.cc (json_emit_diagram): New.
11248         (diagnostic_output_format_init_json): Wire it up to
11249         context->m_diagrams.m_emission_cb.
11250         * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
11251         "text-art/canvas.h".
11252         (sarif_result::on_nested_diagnostic): Move code to...
11253         (sarif_result::add_related_location): ...this new function.
11254         (sarif_result::on_diagram): New.
11255         (sarif_builder::emit_diagram): New.
11256         (sarif_builder::make_message_object_for_diagram): New.
11257         (sarif_emit_diagram): New.
11258         (diagnostic_output_format_init_sarif): Set
11259         context->m_diagrams.m_emission_cb to sarif_emit_diagram.
11260         * diagnostic-text-art.h: New file.
11261         * diagnostic.cc: Include "diagnostic-text-art.h",
11262         "diagnostic-diagram.h", and "text-art/theme.h".
11263         (diagnostic_initialize): Initialize context->m_diagrams and
11264         call diagnostics_text_art_charset_init.
11265         (diagnostic_finish): Clean up context->m_diagrams.m_theme.
11266         (diagnostic_emit_diagram): New.
11267         (diagnostics_text_art_charset_init): New.
11268         * diagnostic.h (text_art::theme): New forward decl.
11269         (class diagnostic_diagram): Likewise.
11270         (diagnostic_context::m_diagrams): New field.
11271         (diagnostic_emit_diagram): New decl.
11272         * doc/invoke.texi (Diagnostic Message Formatting Options): Add
11273         -fdiagnostics-text-art-charset=.
11274         (-fdiagnostics-plain-output): Add
11275         -fdiagnostics-text-art-charset=none.
11276         * gcc.cc: Include "diagnostic-text-art.h".
11277         (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
11278         * opts-common.cc (decode_cmdline_options_to_array): Add
11279         "-fdiagnostics-text-art-charset=none" to expanded_args for
11280         -fdiagnostics-plain-output.
11281         * opts.cc: Include "diagnostic-text-art.h".
11282         (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
11283         * pretty-print.cc (pp_unicode_character): New.
11284         * pretty-print.h (pp_unicode_character): New decl.
11285         * selftest-run-tests.cc: Include "text-art/selftests.h".
11286         (selftest::run_tests): Call text_art_tests.
11287         * text-art/box-drawing-chars.inc: New file, generated by
11288         contrib/unicode/gen-box-drawing-chars.py.
11289         * text-art/box-drawing.cc: New file.
11290         * text-art/box-drawing.h: New file.
11291         * text-art/canvas.cc: New file.
11292         * text-art/canvas.h: New file.
11293         * text-art/ruler.cc: New file.
11294         * text-art/ruler.h: New file.
11295         * text-art/selftests.cc: New file.
11296         * text-art/selftests.h: New file.
11297         * text-art/style.cc: New file.
11298         * text-art/styled-string.cc: New file.
11299         * text-art/table.cc: New file.
11300         * text-art/table.h: New file.
11301         * text-art/theme.cc: New file.
11302         * text-art/theme.h: New file.
11303         * text-art/types.h: New file.
11304         * text-art/widget.cc: New file.
11305         * text-art/widget.h: New file.
11306
11307 2023-06-21  Uros Bizjak  <ubizjak@gmail.com>
11308
11309         * function.h (emit_initial_value_sets):
11310         Change return type from int to void.
11311         (aggregate_value_p): Change return type from int to bool.
11312         (prologue_contains): Ditto.
11313         (epilogue_contains): Ditto.
11314         (prologue_epilogue_contains): Ditto.
11315         * function.cc (temp_slot): Make "in_use" variable bool.
11316         (make_slot_available): Update for changed "in_use" variable.
11317         (assign_stack_temp_for_type): Ditto.
11318         (emit_initial_value_sets): Change return type from int to void
11319         and update function body accordingly.
11320         (instantiate_virtual_regs): Ditto.
11321         (rest_of_handle_thread_prologue_and_epilogue): Ditto.
11322         (safe_insn_predicate): Change return type from int to bool.
11323         (aggregate_value_p): Change return type from int to bool
11324         and update function body accordingly.
11325         (prologue_contains): Change return type from int to bool.
11326         (prologue_epilogue_contains): Ditto.
11327
11328 2023-06-21  Alexander Monakov  <amonakov@ispras.ru>
11329
11330         * common.opt (fp_contract_mode) [on]: Remove fallback.
11331         * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
11332         * doc/invoke.texi (-ffp-contract): Update.
11333         * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
11334
11335 2023-06-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
11336
11337         * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
11338         Add alternatives to prefer to avoid same input and output Z register.
11339         (mask_gather_load<mode><v_int_container>): Likewise.
11340         (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
11341         (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
11342         (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
11343         (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
11344         Likewise.
11345         (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
11346         Likewise.
11347         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11348         <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
11349         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11350         <SVE_2BHSI:mode>_sxtw): Likewise.
11351         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11352         <SVE_2BHSI:mode>_uxtw): Likewise.
11353         (@aarch64_ldff1_gather<mode>): Likewise.
11354         (@aarch64_ldff1_gather<mode>): Likewise.
11355         (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
11356         (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
11357         (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
11358         <VNx4_NARROW:mode>): Likewise.
11359         (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11360         <VNx2_NARROW:mode>): Likewise.
11361         (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11362         <VNx2_NARROW:mode>_sxtw): Likewise.
11363         (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11364         <VNx2_NARROW:mode>_uxtw): Likewise.
11365         * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
11366         (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
11367         <SVE_PARTIAL_I:mode>): Likewise.
11368
11369 2023-06-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
11370
11371         * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
11372         Convert to compact alternatives syntax.
11373         (mask_gather_load<mode><v_int_container>): Likewise.
11374         (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
11375         (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
11376         (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
11377         (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
11378         Likewise.
11379         (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
11380         Likewise.
11381         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11382         <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
11383         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11384         <SVE_2BHSI:mode>_sxtw): Likewise.
11385         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11386         <SVE_2BHSI:mode>_uxtw): Likewise.
11387         (@aarch64_ldff1_gather<mode>): Likewise.
11388         (@aarch64_ldff1_gather<mode>): Likewise.
11389         (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
11390         (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
11391         (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
11392         <VNx4_NARROW:mode>): Likewise.
11393         (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11394         <VNx2_NARROW:mode>): Likewise.
11395         (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11396         <VNx2_NARROW:mode>_sxtw): Likewise.
11397         (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11398         <VNx2_NARROW:mode>_uxtw): Likewise.
11399         * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
11400         (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
11401         <SVE_PARTIAL_I:mode>): Likewise.
11402
11403 2023-06-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
11404
11405         Revert:
11406         2023-06-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
11407
11408         * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
11409         Convert to compact alternatives syntax.
11410         (mask_gather_load<mode><v_int_container>): Likewise.
11411         (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
11412         (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
11413         (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
11414         (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
11415         Likewise.
11416         (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
11417         Likewise.
11418         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11419         <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
11420         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11421         <SVE_2BHSI:mode>_sxtw): Likewise.
11422         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11423         <SVE_2BHSI:mode>_uxtw): Likewise.
11424         (@aarch64_ldff1_gather<mode>): Likewise.
11425         (@aarch64_ldff1_gather<mode>): Likewise.
11426         (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
11427         (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
11428         (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
11429         <VNx4_NARROW:mode>): Likewise.
11430         (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11431         <VNx2_NARROW:mode>): Likewise.
11432         (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11433         <VNx2_NARROW:mode>_sxtw): Likewise.
11434         (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11435         <VNx2_NARROW:mode>_uxtw): Likewise.
11436         * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
11437         (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
11438         <SVE_PARTIAL_I:mode>): Likewise.
11439
11440 2023-06-21  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
11441
11442         * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
11443         (get_len_load_store_mode): Ditto.
11444         * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
11445         (get_len_load_store_mode): Ditto.
11446         * optabs-tree.cc (can_vec_mask_load_store_p): New function.
11447         (get_len_load_store_mode): Ditto.
11448         * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
11449         (get_len_load_store_mode): Ditto.
11450         * tree-if-conv.cc: include optabs-tree instead of optabs-query
11451
11452 2023-06-21  Richard Biener  <rguenther@suse.de>
11453
11454         * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
11455         split_constant_offset for the POINTER_PLUS_EXPR case.
11456
11457 2023-06-21  Richard Biener  <rguenther@suse.de>
11458
11459         * tree-ssa-loop-ivopts.cc (record_group_use): Use
11460         split_constant_offset.
11461
11462 2023-06-21  Richard Biener  <rguenther@suse.de>
11463
11464         * tree-loop-distribution.cc (classify_builtin_st): Use
11465         split_constant_offset.
11466         * tree-ssa-loop-ivopts.h (strip_offset): Remove.
11467         * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
11468
11469 2023-06-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
11470
11471         * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
11472         Convert to compact alternatives syntax.
11473         (mask_gather_load<mode><v_int_container>): Likewise.
11474         (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
11475         (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
11476         (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
11477         (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
11478         Likewise.
11479         (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
11480         Likewise.
11481         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11482         <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
11483         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11484         <SVE_2BHSI:mode>_sxtw): Likewise.
11485         (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
11486         <SVE_2BHSI:mode>_uxtw): Likewise.
11487         (@aarch64_ldff1_gather<mode>): Likewise.
11488         (@aarch64_ldff1_gather<mode>): Likewise.
11489         (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
11490         (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
11491         (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
11492         <VNx4_NARROW:mode>): Likewise.
11493         (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11494         <VNx2_NARROW:mode>): Likewise.
11495         (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11496         <VNx2_NARROW:mode>_sxtw): Likewise.
11497         (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
11498         <VNx2_NARROW:mode>_uxtw): Likewise.
11499         * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
11500         (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
11501         <SVE_PARTIAL_I:mode>): Likewise.
11502
11503 2023-06-21  Tamar Christina  <tamar.christina@arm.com>
11504
11505         PR other/110329
11506         * doc/md.texi: Replace backslashchar.
11507
11508 2023-06-21  Richard Biener  <rguenther@suse.de>
11509
11510         * config/i386/i386.cc (ix86_vector_costs::finish_cost):
11511         Overload.  For masked main loops make sure the vectorization
11512         factor isn't more than double the number of iterations.
11513
11514 2023-06-21  Jan Beulich  <jbeulich@suse.com>
11515
11516         * config/i386/i386-expand.cc (ix86_expand_copysign): Request
11517         value duplication by ix86_build_signbit_mask() when AVX512F and
11518         not HFmode.
11519         * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
11520         2-alternative form. Adjust "mode" attribute. Add "enabled"
11521         attribute.
11522         (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
11523         && !TARGET_PREFER_AVX256.
11524         (*<avx512>_vpternlog<mode>_2): Likewise.
11525         (*<avx512>_vpternlog<mode>_3): Likewise.
11526
11527 2023-06-21  liuhongt  <hongtao.liu@intel.com>
11528
11529         PR target/110018
11530         * tree-vect-stmts.cc (vectorizable_conversion): Use
11531         intermiediate integer type for float_expr/fix_trunc_expr when
11532         direct optab is not existed.
11533
11534 2023-06-20  Tamar Christina  <tamar.christina@arm.com>
11535
11536         PR bootstrap/110324
11537         * gensupport.cc (convert_syntax): Explicitly check for RTX code.
11538
11539 2023-06-20  Richard Sandiford  <richard.sandiford@arm.com>
11540
11541         * config/aarch64/aarch64.md (stack_tie): Hard-code the first
11542         register operand to the stack pointer.  Require the second register
11543         operand to have the number specified in a separate const_int operand.
11544         * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
11545         (aarch64_allocate_and_probe_stack_space): Use it.
11546         (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
11547         (aarch64_expand_epilogue): Likewise.
11548
11549 2023-06-20  Jakub Jelinek  <jakub@redhat.com>
11550
11551         PR middle-end/79173
11552         * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
11553         IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
11554         type.
11555
11556 2023-06-20  Uros Bizjak  <ubizjak@gmail.com>
11557
11558         * calls.h (setjmp_call_p): Change return type from int to bool.
11559         * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
11560         (store_one_arg): Change return type from int to bool
11561         and adjust function body accordingly.  Change "sibcall_failure"
11562         variable to bool.
11563         (finalize_must_preallocate): Ditto.  Change *must_preallocate pointer
11564         argument  to bool.  Change "partial_seen" variable to bool.
11565         (load_register_parameters):  Change *sibcall_failure
11566         pointer argument to bool.
11567         (check_sibcall_argument_overlap_1): Change return type from int to bool
11568         and adjust function body accordingly.
11569         (check_sibcall_argument_overlap):  Ditto.  Change
11570         "mark_stored_args_map" argument to bool.
11571         (emit_call_1): Change "already_popped" variable to bool.
11572         (setjmp_call_p): Change return type from int to bool
11573         and adjust function body accordingly.
11574         (initialize_argument_information): Change *must_preallocate
11575         pointer argument to bool.
11576         (expand_call): Change "pcc_struct_value", "must_preallocate"
11577         and "sibcall_failure" variables to bool.
11578         (emit_library_call_value_1): Change "pcc_struct_value"
11579         variable to bool.
11580
11581 2023-06-20  Martin Jambor  <mjambor@suse.cz>
11582
11583         PR ipa/110276
11584         * ipa-sra.cc (struct caller_issues): New field there_is_one.
11585         (check_for_caller_issues): Set it.
11586         (check_all_callers_for_issues): Check it.
11587
11588 2023-06-20  Martin Jambor  <mjambor@suse.cz>
11589
11590         * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
11591         (struct ipcp_transformation): Rearrange members according to
11592         C++ class coding convention, add m_uid_to_idx,
11593         get_param_index and maybe_create_parm_idx_map.
11594         * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
11595         (compare_uids): Likewise.
11596         (ipcp_transformation::maype_create_parm_idx_map): Likewise.
11597         * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
11598         (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
11599         (ipcp_update_vr): Likewise.
11600         (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
11601         out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
11602
11603 2023-06-20  Carl Love  <cel@us.ibm.com>
11604
11605         * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
11606         Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
11607         Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
11608         Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
11609         Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
11610         (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
11611         CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
11612         * config/rs6000/rs6000-builtins.def
11613         (__builtin_vsx_scalar_extract_exp_to_vec,
11614         __builtin_vsx_scalar_extract_sig_to_vec,
11615         __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
11616         Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
11617         xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
11618         * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
11619         Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
11620         overloaded instance. Update comments.
11621         * config/rs6000/rs6000-overload.def
11622         (__builtin_vec_scalar_insert_exp): Add new overload definition with
11623         vector arguments.
11624         (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
11625         overloaded definitions.
11626         * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
11627         (DI_to_TI): New mode attribute.
11628         Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
11629         Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
11630         Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
11631         * doc/extend.texi (scalar_extract_exp_to_vec,
11632         scalar_extract_sig_to_vec): Add documentation for new builtins.
11633         (scalar_insert_exp): Add new overloaded builtin definition.
11634
11635 2023-06-20  Li Xu  <xuli1@eswincomputing.com>
11636
11637         * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
11638         size of vector mask mode to one rvv register.
11639
11640 2023-06-20  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
11641
11642         * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
11643
11644 2023-06-20  Lehua Ding  <lehua.ding@rivai.ai>
11645
11646         * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
11647         switch handler.
11648
11649 2023-06-20  Richard Biener  <rguenther@suse.de>
11650
11651         * tree-ssa-dse.cc (dse_classify_store): When we found
11652         no defs and the basic-block with the original definition
11653         ends in __builtin_unreachable[_trap] the store is dead.
11654
11655 2023-06-20  Richard Biener  <rguenther@suse.de>
11656
11657         * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
11658         keep the virtual SSA form up-to-date.
11659
11660 2023-06-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
11661
11662         * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
11663         New define_insn_and_split.
11664
11665 2023-06-20  Tamar Christina  <tamar.christina@arm.com>
11666
11667         * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
11668
11669 2023-06-20  Jan Beulich  <jbeulich@suse.com>
11670
11671         * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
11672         constraint. Add new AVX512F alternative.
11673
11674 2023-06-20  Richard Biener  <rguenther@suse.de>
11675
11676         PR debug/110295
11677         * dwarf2out.cc (process_scope_var): Continue processing
11678         the decl after setting a parent in case the existing DIE
11679         was in limbo.
11680
11681 2023-06-20  Lehua Ding  <lehua.ding@rivai.ai>
11682
11683         * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
11684         (riscv_arg_has_vector): Simplify.
11685         (riscv_pass_in_vector_p): Adjust warning message.
11686
11687 2023-06-19  Jin Ma  <jinma@linux.alibaba.com>
11688
11689         * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
11690         (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
11691         * config/riscv/riscv.md (riscv_frcsr): New patterns.
11692         (riscv_fscsr): Likewise.
11693
11694 2023-06-19  Toru Kisuki  <tkisuki@tachyum.com>
11695
11696         PR rtl-optimization/110305
11697         * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
11698         Handle HONOR_SNANS for x + 0.0.
11699
11700 2023-06-19  Jan Hubicka  <jh@suse.cz>
11701
11702         PR tree-optimization/109811
11703         PR tree-optimization/109849
11704         * passes.def: Add phiprop to early optimization passes.
11705         * tree-ssa-phiprop.cc: Allow clonning.
11706
11707 2023-06-19  Tamar Christina  <tamar.christina@arm.com>
11708
11709         * config/aarch64/aarch64.md (arches): Add nosimd.
11710         (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
11711         compact syntax.
11712
11713 2023-06-19  Tamar Christina  <tamar.christina@arm.com>
11714             Omar Tahir  <Omar.Tahir2@arm.com>
11715
11716         * gensupport.cc (class conlist, add_constraints, add_attributes,
11717         skip_spaces, expect_char, preprocess_compact_syntax,
11718         parse_section_layout, parse_section, convert_syntax): New.
11719         (process_rtx): Check for conversion.
11720         * genoutput.cc (process_template): Check for unresolved iterators.
11721         (class data): Add compact_syntax_p.
11722         (gen_insn): Use it.
11723         * gensupport.h (compact_syntax): New.
11724         (hash-set.h): Include.
11725         * doc/md.texi: Document it.
11726
11727 2023-06-19  Uros Bizjak  <ubizjak@gmail.com>
11728
11729         * recog.h (check_asm_operands): Change return type from int to bool.
11730         (insn_invalid_p): Ditto.
11731         (verify_changes): Ditto.
11732         (apply_change_group): Ditto.
11733         (constrain_operands): Ditto.
11734         (constrain_operands_cached): Ditto.
11735         (validate_replace_rtx_subexp): Ditto.
11736         (validate_replace_rtx): Ditto.
11737         (validate_replace_rtx_part): Ditto.
11738         (validate_replace_rtx_part_nosimplify): Ditto.
11739         (added_clobbers_hard_reg_p): Ditto.
11740         (peep2_regno_dead_p): Ditto.
11741         (peep2_reg_dead_p): Ditto.
11742         (store_data_bypass_p): Ditto.
11743         (if_test_bypass_p): Ditto.
11744         * rtl.h (split_all_insns_noflow): Change
11745         return type from unsigned int to void.
11746         * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
11747         of generated added_clobbers_hard_reg_p from int to bool and adjust
11748         function body accordingly.  Change "used" variable type from
11749         int to bool.
11750         * recog.cc (check_asm_operands): Change return type
11751         from int to bool and adjust function body accordingly.
11752         (insn_invalid_p): Ditto.  Change "is_asm" variable to bool.
11753         (verify_changes): Change return type from int to bool.
11754         (apply_change_group): Change return type from int to bool
11755         and adjust function body accordingly.
11756         (validate_replace_rtx_subexp): Change return type from int to bool.
11757         (validate_replace_rtx): Ditto.
11758         (validate_replace_rtx_part): Ditto.
11759         (validate_replace_rtx_part_nosimplify): Ditto.
11760         (constrain_operands_cached): Ditto.
11761         (constrain_operands): Ditto.  Change "lose" and "win"
11762         variables type from int to bool.
11763         (split_all_insns_noflow): Change return type from unsigned int
11764         to void and adjust function body accordingly.
11765         (peep2_regno_dead_p): Change return type from int to bool.
11766         (peep2_reg_dead_p): Ditto.
11767         (peep2_find_free_register): Change "success"
11768         variable type from int to bool
11769         (store_data_bypass_p_1): Change return type from int to bool.
11770         (store_data_bypass_p): Ditto.
11771
11772 2023-06-19  Li Xu  <xuli1@eswincomputing.com>
11773
11774         * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
11775         Zve32f extension.
11776
11777 2023-06-19  Pan Li  <pan2.li@intel.com>
11778
11779         PR target/110299
11780         * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
11781         modes.
11782         * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
11783         VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
11784         VF_ZVE63 and VF_ZVE32.
11785         * config/riscv/vector.md
11786         (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
11787         (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
11788         (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
11789         (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
11790         (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
11791         (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
11792         (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
11793         (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
11794         (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
11795         (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
11796
11797 2023-06-19  Pan Li  <pan2.li@intel.com>
11798
11799         PR target/110277
11800         * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
11801         ret_mode.
11802         * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
11803         VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
11804         * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
11805         (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
11806         (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
11807         (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
11808         (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
11809         (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
11810         (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
11811         (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
11812         (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
11813         (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
11814         (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
11815         (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
11816
11817 2023-06-19  Andrew Stubbs  <ams@codesourcery.com>
11818
11819         * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
11820         (gcn_init_libfuncs): Add div and mod functions for all modes.
11821         Add placeholders for divmod functions.
11822         (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
11823
11824 2023-06-19  Andrew Stubbs  <ams@codesourcery.com>
11825
11826         * tree-vect-generic.cc: Include optabs-libfuncs.h.
11827         (get_compute_type): Check optab_libfunc.
11828         * tree-vect-stmts.cc: Include optabs-libfuncs.h.
11829         (vectorizable_operation): Check optab_libfunc.
11830
11831 2023-06-19  Andrew Stubbs  <ams@codesourcery.com>
11832
11833         * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
11834         * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
11835         (V_MOV, V_MOV_ALT): Likewise.
11836         (scalar_mode, SCALAR_MODE): Add TImode.
11837         (vnsi, VnSI, vndi, VnDI): Likewise.
11838         (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
11839         (mov<mode>, mov<mode>_unspec): Use V_MOV.
11840         (*mov<mode>_4reg): New insn.
11841         (mov<mode>_exec): New 4reg variant.
11842         (mov<mode>_sgprbase): Likewise.
11843         (reload_in<mode>, reload_out<mode>): Use V_MOV.
11844         (vec_set<mode>): Likewise.
11845         (vec_duplicate<mode><exec>): New 4reg variant.
11846         (vec_extract<mode><scalar_mode>): Likewise.
11847         (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
11848         (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
11849         (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
11850         (fold_extract_last_<mode>): Use V_MOV.
11851         (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
11852         (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
11853         (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
11854         gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
11855         gather<mode>_insn_2offsets<exec>): Use V_MOV.
11856         (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
11857         scatter<mode>_insn_1offset<exec_scatter>,
11858         scatter<mode>_insn_1offset_ds<exec_scatter>,
11859         scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
11860         (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
11861         mask_scatter_store<mode><vnsi>): Likewise.
11862         * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
11863         (gcn_hard_regno_mode_ok): Likewise.
11864         (GEN_VNM): Add TImode support.
11865         (USE_TI): New macro. Separate TImode operations from non-TImode ones.
11866         (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
11867         V8TImode, and V2TImode.
11868         (print_operand):  Add 'J' and 'K' print codes.
11869
11870 2023-06-19  Richard Biener  <rguenther@suse.de>
11871
11872         PR tree-optimization/110298
11873         * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
11874         Clear number of iterations info before cleaning up the CFG.
11875
11876 2023-06-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
11877
11878         * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
11879         Simplify vec_concat of lowpart subreg and high part vec_select.
11880
11881 2023-06-19  Tobias Burnus  <tobias@codesourcery.com>
11882
11883         * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
11884
11885 2023-06-19  Richard Sandiford  <richard.sandiford@arm.com>
11886
11887         * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
11888         Handle null niters_skip.
11889
11890 2023-06-19  Richard Biener  <rguenther@suse.de>
11891
11892         * config/aarch64/aarch64.cc
11893         (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
11894         to LOOP_VINFO_MASKS.
11895
11896 2023-06-19  Senthil Kumar Selvaraj  <saaadhu@gcc.gnu.org>
11897
11898         PR target/105523
11899         * common/config/avr/avr-common.cc: Remove setting
11900         of OPT_fdelete_null_pointer_checks.
11901         * config/avr/avr.cc (avr_option_override): Clear
11902         flag_delete_null_pointer_checks if zero_address_valid.
11903         (avr_addr_space_zero_address_valid): New function.
11904         (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
11905         hook.
11906
11907 2023-06-19  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
11908             Robin Dapp  <rdapp.gcc@gmail.com>
11909
11910         * doc/md.texi: Add len_mask{load,store}.
11911         * genopinit.cc (main): Ditto.
11912         (CMP_NAME): Ditto.
11913         * internal-fn.cc (len_maskload_direct): Ditto.
11914         (len_maskstore_direct): Ditto.
11915         (expand_call_mem_ref): Ditto.
11916         (expand_partial_load_optab_fn): Ditto.
11917         (expand_len_maskload_optab_fn): Ditto.
11918         (expand_partial_store_optab_fn): Ditto.
11919         (expand_len_maskstore_optab_fn): Ditto.
11920         (direct_len_maskload_optab_supported_p): Ditto.
11921         (direct_len_maskstore_optab_supported_p): Ditto.
11922         * internal-fn.def (LEN_MASK_LOAD): Ditto.
11923         (LEN_MASK_STORE): Ditto.
11924         * optabs.def (OPTAB_CD): Ditto.
11925
11926 2023-06-19  Robin Dapp  <rdapp@ventanamicro.com>
11927
11928         * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
11929
11930 2023-06-19  Robin Dapp  <rdapp@ventanamicro.com>
11931
11932         * config/riscv/autovec.md (<optab><mode>3): Implement binop
11933         expander.
11934         * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
11935         (enum vxrm_field_enum): Rename this...
11936         (enum fixed_point_rounding_mode): ...to this.
11937         (enum frm_field_enum): Rename this...
11938         (enum floating_point_rounding_mode): ...to this.
11939         * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
11940         * config/riscv/riscv.cc (riscv_const_insns): Clarify const
11941         vector handling.
11942         (riscv_libgcc_floating_mode_supported_p): Adjust comment.
11943         (riscv_excess_precision): Do not convert to float for ZVFH.
11944         * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
11945
11946 2023-06-19  Robin Dapp  <rdapp@ventanamicro.com>
11947
11948         * config/riscv/vector-iterators.md: Add VI_QH iterator.
11949         * config/riscv/autovec-opt.md
11950         (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
11951         that includes sign extension.
11952         (@pred_extract_first_sextsi<mode>): Dito for SImode.
11953
11954 2023-06-19  Robin Dapp  <rdapp@ventanamicro.com>
11955
11956         * config/riscv/autovec.md (vec_set<mode>): Implement.
11957         (vec_extract<mode><vel>): Implement.
11958         * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
11959         (emit_vlmax_slide_insn): Declare.
11960         (emit_nonvlmax_slide_tu_insn): Declare.
11961         (emit_scalar_move_insn): Export.
11962         (emit_nonvlmax_integer_move_insn): Export.
11963         * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
11964         (emit_nonvlmax_slide_tu_insn): New function.
11965         (emit_vlmax_masked_mu_insn): No change.
11966         (emit_vlmax_integer_move_insn): Export.
11967
11968 2023-06-19  Richard Biener  <rguenther@suse.de>
11969
11970         * tree-vectorizer.h (enum vect_partial_vector_style): New.
11971         (_loop_vec_info::partial_vector_style): Likewise.
11972         (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
11973         (rgroup_controls::compare_type): Add.
11974         (vec_loop_masks): Change from a typedef to auto_vec<>
11975         to a structure.
11976         * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
11977         Adjust.  Convert niters_skip to compare_type.
11978         (vect_set_loop_condition_partial_vectors_avx512): New function
11979         implementing the AVX512 partial vector codegen.
11980         (vect_set_loop_condition): Dispatch to the correct
11981         vect_set_loop_condition_partial_vectors_* function based on
11982         LOOP_VINFO_PARTIAL_VECTORS_STYLE.
11983         (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
11984         in the original niter type.
11985         * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
11986         partial_vector_style.
11987         (can_produce_all_loop_masks_p): Adjust.
11988         (vect_verify_full_masking): Produce the rgroup_controls vector
11989         here.  Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
11990         (vect_verify_full_masking_avx512): New function implementing
11991         verification of AVX512 style masking.
11992         (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
11993         (vect_analyze_loop_2): Also try AVX512 style masking.
11994         Adjust condition.
11995         (vect_estimate_min_profitable_iters): Implement AVX512 style
11996         mask producing cost.
11997         (vect_record_loop_mask): Do not build the rgroup_controls
11998         vector here but record masks in a hash-set.
11999         (vect_get_loop_mask): Implement AVX512 style mask query,
12000         complementing the existing while_ult style.
12001
12002 2023-06-19  Richard Biener  <rguenther@suse.de>
12003
12004         * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
12005         argument.
12006         * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
12007         (vectorize_fold_left_reduction): Adjust.
12008         (vect_transform_reduction): Likewise.
12009         (vectorizable_live_operation): Likewise.
12010         * tree-vect-stmts.cc (vectorizable_call): Likewise.
12011         (vectorizable_operation): Likewise.
12012         (vectorizable_store): Likewise.
12013         (vectorizable_load): Likewise.
12014         (vectorizable_condition): Likewise.
12015
12016 2023-06-19  Senthil Kumar Selvaraj  <saaadhu@gcc.gnu.org>
12017
12018         PR target/110086
12019         * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
12020         Add Optimization option property.
12021
12022 2023-06-19  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
12023
12024         * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
12025         Add new pattern for the abovementioned case.
12026
12027 2023-06-19  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
12028
12029         * config/xtensa/xtensa.cc
12030         (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
12031
12032 2023-06-19  Jiufu Guo  <guojiufu@linux.ibm.com>
12033
12034         * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
12035
12036 2023-06-19  Jiufu Guo  <guojiufu@linux.ibm.com>
12037
12038         * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
12039
12040 2023-06-19  liuhongt  <hongtao.liu@intel.com>
12041
12042         PR target/110235
12043         * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
12044         Substitute with ..
12045         (sse2_packsswb<mask_name>): .. this, ..
12046         (avx2_packsswb<mask_name>): .. this and ..
12047         (avx512bw_packsswb<mask_name>): .. this.
12048         (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
12049         (sse2_packssdw<mask_name>): .. this, ..
12050         (avx2_packssdw<mask_name>): .. this and ..
12051         (avx512bw_packssdw<mask_name>): .. this.
12052
12053 2023-06-19  liuhongt  <hongtao.liu@intel.com>
12054
12055         PR target/110235
12056         * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
12057         UNSPEC_US_TRUNCATE instead of original us_truncate for
12058         packusdw/packuswb.
12059         * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
12060         with ..
12061         (mmx_packsswb): .. this and ..
12062         (mmx_packuswb): .. this.
12063         (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
12064         us_truncate.
12065         (s_trunsuffix): Removed code iterator.
12066         (any_s_truncate): Ditto.
12067         * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
12068         UNSPEC_US_TRUNCATE instead of original us_truncate.
12069         (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
12070         * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
12071
12072 2023-06-18  Pan Li  <pan2.li@intel.com>
12073
12074         * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
12075
12076 2023-06-18  Uros Bizjak  <ubizjak@gmail.com>
12077
12078         * rtl.h (*rtx_equal_p_callback_function):
12079         Change return type from int to bool.
12080         (rtx_equal_p): Ditto.
12081         (*hash_rtx_callback_function): Ditto.
12082         * rtl.cc (rtx_equal_p): Change return type from int to bool
12083         and adjust function body accordingly.
12084         * early-remat.cc (scratch_equal): Ditto.
12085         * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
12086         (hash_with_unspec_callback): Ditto.
12087
12088 2023-06-18  Jeff Law  <jlaw@ventanamicro.com>
12089
12090         * config/arc/arc.md (movqi_insn): Allow certain constants to
12091         be stored into memory in the pattern's condition.
12092         (movsf_insn): Similarly.
12093
12094 2023-06-18  Honza  <jh@ryzen3.suse.cz>
12095
12096         PR tree-optimization/109849
12097         * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
12098         ES; handle ipa_predicate::not_sra_candidate.
12099         (evaluate_properties_for_edge): Pass es to
12100         evaluate_conditions_for_known_args.
12101         (ipa_fn_summary_t::duplicate): Handle sra candidates.
12102         (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
12103         (load_or_store_of_ptr_parameter): New function.
12104         (points_to_possible_sra_candidate_p): New function.
12105         (analyze_function_body): Initialize points_to_possible_sra_candidate;
12106         determine sra predicates.
12107         (estimate_ipcp_clone_size_and_time): Update call of
12108         evaluate_conditions_for_known_args.
12109         (remap_edge_params): Update points_to_possible_sra_candidate.
12110         (read_ipa_call_summary): Stream points_to_possible_sra_candidate
12111         (write_ipa_call_summary): Likewise.
12112         * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
12113         (dump_condition): Dump it.
12114         * ipa-predicate.h (struct inline_param_summary): Add
12115         points_to_possible_sra_candidate.
12116
12117 2023-06-18  Roger Sayle  <roger@nextmovesoftware.com>
12118
12119         * config/i386/i386-expand.cc (ix86_expand_carry): New helper
12120         function for setting the carry flag.
12121         (ix86_expand_builtin) <handlecarry>: Use it here.
12122         * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
12123         * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
12124         (usubc<mode>5): Likewise.
12125
12126 2023-06-18  Roger Sayle  <roger@nextmovesoftware.com>
12127
12128         * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
12129         for the immediate constant shift count.
12130         (*concat<mode><dwi>3_2): Likewise.
12131         (*concat<mode><dwi>3_3): Likewise.
12132         (*concat<mode><dwi>3_4): Likewise.
12133         (*concat<mode><dwi>3_5): Likewise.
12134         (*concat<mode><dwi>3_6): Likewise.
12135
12136 2023-06-18  Uros Bizjak  <ubizjak@gmail.com>
12137
12138         * cse.cc (hash_rtx_cb): Rename to hash_rtx.
12139         (hash_rtx): Remove.
12140         * early-remat.cc (remat_candidate_hasher::equal): Update
12141         to call rtx_equal_p with rtx_equal_p_callback_function argument.
12142         * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
12143         (rtx_equal_p): Remove.
12144         * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
12145         argument with NULL default value.
12146         (rtx_equal_p_cb): Remove function declaration.
12147         (hash_rtx_cb): Ditto.
12148         (hash_rtx): Add hash_rtx_callback_function argument
12149         with NULL default value.
12150         * sel-sched-ir.cc (free_nop_pool): Update function comment.
12151         (skip_unspecs_callback): Ditto.
12152         (vinsn_init): Update to call hash_rtx with
12153         hash_rtx_callback_function argument.
12154         (vinsn_equal_p): Ditto.
12155
12156 2023-06-18  yulong  <shiyulong@iscas.ac.cn>
12157
12158         * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
12159         * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
12160         (ADJUST_ALIGNMENT): Ditto.
12161         (RVV_TUPLE_PARTIAL_MODES): Ditto.
12162         (ADJUST_NUNITS): Ditto.
12163         * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
12164         New types.
12165         (vfloat16mf4x3_t): Ditto.
12166         (vfloat16mf4x4_t): Ditto.
12167         (vfloat16mf4x5_t): Ditto.
12168         (vfloat16mf4x6_t): Ditto.
12169         (vfloat16mf4x7_t): Ditto.
12170         (vfloat16mf4x8_t): Ditto.
12171         (vfloat16mf2x2_t): Ditto.
12172         (vfloat16mf2x3_t): Ditto.
12173         (vfloat16mf2x4_t): Ditto.
12174         (vfloat16mf2x5_t): Ditto.
12175         (vfloat16mf2x6_t): Ditto.
12176         (vfloat16mf2x7_t): Ditto.
12177         (vfloat16mf2x8_t): Ditto.
12178         (vfloat16m1x2_t): Ditto.
12179         (vfloat16m1x3_t): Ditto.
12180         (vfloat16m1x4_t): Ditto.
12181         (vfloat16m1x5_t): Ditto.
12182         (vfloat16m1x6_t): Ditto.
12183         (vfloat16m1x7_t): Ditto.
12184         (vfloat16m1x8_t): Ditto.
12185         (vfloat16m2x2_t): Ditto.
12186         (vfloat16m2x3_t): Ditto.
12187         (vfloat16m2x4_t): Ditto.
12188         (vfloat16m4x2_t): Ditto.
12189         * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
12190         (vfloat16mf4x3_t): Ditto.
12191         (vfloat16mf4x4_t): Ditto.
12192         (vfloat16mf4x5_t): Ditto.
12193         (vfloat16mf4x6_t): Ditto.
12194         (vfloat16mf4x7_t): Ditto.
12195         (vfloat16mf4x8_t): Ditto.
12196         (vfloat16mf2x2_t): Ditto.
12197         (vfloat16mf2x3_t): Ditto.
12198         (vfloat16mf2x4_t): Ditto.
12199         (vfloat16mf2x5_t): Ditto.
12200         (vfloat16mf2x6_t): Ditto.
12201         (vfloat16mf2x7_t): Ditto.
12202         (vfloat16mf2x8_t): Ditto.
12203         (vfloat16m1x2_t): Ditto.
12204         (vfloat16m1x3_t): Ditto.
12205         (vfloat16m1x4_t): Ditto.
12206         (vfloat16m1x5_t): Ditto.
12207         (vfloat16m1x6_t): Ditto.
12208         (vfloat16m1x7_t): Ditto.
12209         (vfloat16m1x8_t): Ditto.
12210         (vfloat16m2x2_t): Ditto.
12211         (vfloat16m2x3_t): Ditto.
12212         (vfloat16m2x4_t): Ditto.
12213         (vfloat16m4x2_t): Ditto.
12214         * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
12215         * config/riscv/riscv.md: New.
12216         * config/riscv/vector-iterators.md: New.
12217
12218 2023-06-17  Roger Sayle  <roger@nextmovesoftware.com>
12219
12220         * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
12221         CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
12222         Generalize special case for converting TImode to V1TImode to handle
12223         all 128-bit vector conversions.
12224
12225 2023-06-17  Costas Argyris  <costas.argyris@gmail.com>
12226
12227         * gcc-ar.cc (main): Refactor to slightly reduce code
12228         duplication.  Avoid unnecessary elements in nargv.
12229
12230 2023-06-16  Pan Li  <pan2.li@intel.com>
12231
12232         PR target/110265
12233         * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
12234         integer reduction expand.
12235         * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
12236         and the LMUL1 attr respectively.
12237         * config/riscv/vector.md
12238         (@pred_reduc_<reduc><mode><vlmul1>): Removed.
12239         (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
12240         (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
12241         (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
12242         (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
12243         (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
12244         (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
12245
12246 2023-06-16  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
12247
12248         PR target/110264
12249         * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
12250
12251 2023-06-16  Jakub Jelinek  <jakub@redhat.com>
12252
12253         PR middle-end/79173
12254         * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
12255         BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
12256         BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
12257         types.
12258         * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
12259         BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
12260         * builtins.cc (fold_builtin_addc_subc): New function.
12261         (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
12262         * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
12263
12264 2023-06-16  Jakub Jelinek  <jakub@redhat.com>
12265
12266         PR tree-optimization/110271
12267         * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
12268         <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
12269         instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
12270
12271 2023-06-16  Martin Jambor  <mjambor@suse.cz>
12272
12273         * configure: Regenerate.
12274
12275 2023-06-16  Roger Sayle  <roger@nextmovesoftware.com>
12276             Uros Bizjak  <ubizjak@gmail.com>
12277
12278         PR target/31985
12279         * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
12280         define_insn_and_split combine *add<dwi>3_doubleword with
12281         a *concat<mode><dwi>3 for more efficient lowering after reload.
12282
12283 2023-06-16  Vladimir N. Makarov  <vmakarov@redhat.com>
12284
12285         * ira-lives.cc: Include except.h.
12286         (process_bb_node_lives): Ignore conflicts from cleanup exceptions
12287         when the pseudo does not live at the exception landing pad.
12288
12289 2023-06-16  Alex Coplan  <alex.coplan@arm.com>
12290
12291         * doc/invoke.texi: Document -Welaborated-enum-base.
12292
12293 2023-06-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
12294
12295         * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
12296         (ushrn2_n): ... This.
12297         (sqshrn2_n): Rename builtins to...
12298         (ssqshrn2_n): ... This.
12299         (uqshrn2_n): Rename builtins to...
12300         (uqushrn2_n): ... This.
12301         * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
12302         (vqshrn_high_n_s32): Likewise.
12303         (vqshrn_high_n_s64): Likewise.
12304         (vqshrn_high_n_u16): Likewise.
12305         (vqshrn_high_n_u32): Likewise.
12306         (vqshrn_high_n_u64): Likewise.
12307         (vshrn_high_n_s16): Likewise.
12308         (vshrn_high_n_s32): Likewise.
12309         (vshrn_high_n_s64): Likewise.
12310         (vshrn_high_n_u16): Likewise.
12311         (vshrn_high_n_u32): Likewise.
12312         (vshrn_high_n_u64): Likewise.
12313         * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
12314         Rename to...
12315         (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
12316         Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
12317         (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
12318         (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
12319         Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
12320         (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
12321         (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
12322         Update expander for the above.
12323
12324 2023-06-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
12325
12326         * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
12327         (shrn2_n): ... This.
12328         (rshrn2): Rename builtins to...
12329         (rshrn2_n): ... This.
12330         * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
12331         (vrshrn_high_n_s32): Likewise.
12332         (vrshrn_high_n_s64): Likewise.
12333         (vrshrn_high_n_u16): Likewise.
12334         (vrshrn_high_n_u32): Likewise.
12335         (vrshrn_high_n_u64): Likewise.
12336         (vshrn_high_n_s16): Likewise.
12337         (vshrn_high_n_s32): Likewise.
12338         (vshrn_high_n_s64): Likewise.
12339         (vshrn_high_n_u16): Likewise.
12340         (vshrn_high_n_u32): Likewise.
12341         (vshrn_high_n_u64): Likewise.
12342         * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
12343         Delete.
12344         (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
12345         (aarch64_shrn2<mode>_insn_le): Likewise.
12346         (aarch64_shrn2<mode>_insn_be): Likewise.
12347         (aarch64_shrn2<mode>): Likewise.
12348         (aarch64_rshrn2<mode>_insn_le): Likewise.
12349         (aarch64_rshrn2<mode>_insn_be): Likewise.
12350         (aarch64_rshrn2<mode>): Likewise.
12351         (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
12352         (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
12353         (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
12354         (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
12355         (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
12356         (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
12357         (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
12358         (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
12359         (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
12360         (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
12361         (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
12362         (aarch64_sqshrun2_n<mode>): New define_expand.
12363         (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
12364         (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
12365         (aarch64_sqrshrun2_n<mode>): New define_expand.
12366         * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
12367         UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
12368         Delete unspec values.
12369         (VQSHRN_N): Delete int iterator.
12370
12371 2023-06-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
12372
12373         * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
12374         * config/aarch64/aarch64-simd.md
12375         (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
12376         (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
12377         Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
12378         * config/aarch64/iterators.md (shrn_s): New code attribute.
12379
12380 2023-06-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
12381
12382         * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
12383         Rename to...
12384         (aarch64_<shrn_op>shrn_n<mode>): ... This.  Reimplement with RTL codes.
12385         (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
12386         (aarch64_sqrshrun_n<mode>_insn): Likewise.
12387         (aarch64_sqshrun_n<mode>_insn): Likewise.
12388         (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
12389         (aarch64_sqshrun_n<mode>): Likewise.
12390         (aarch64_sqrshrun_n<mode>): Likewise.
12391         * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
12392
12393 2023-06-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
12394
12395         * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
12396         (shrn_n): ... This.
12397         (rshrn): Rename builtins to...
12398         (rshrn_n): ... This.
12399         * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
12400         (vshrn_n_s32): Likewise.
12401         (vshrn_n_s64): Likewise.
12402         (vshrn_n_u16): Likewise.
12403         (vshrn_n_u32): Likewise.
12404         (vshrn_n_u64): Likewise.
12405         (vrshrn_n_s16): Likewise.
12406         (vrshrn_n_s32): Likewise.
12407         (vrshrn_n_s64): Likewise.
12408         (vrshrn_n_u16): Likewise.
12409         (vrshrn_n_u32): Likewise.
12410         (vrshrn_n_u64): Likewise.
12411         * config/aarch64/aarch64-simd.md
12412         (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
12413         (aarch64_shrn<mode>): Likewise.
12414         (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
12415         (aarch64_rshrn<mode>): Likewise.
12416         (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
12417         (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
12418         (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
12419         (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
12420         (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
12421         (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
12422         (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
12423         (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
12424         (aarch64_sqshrun_n<mode>): Likewise.
12425         (aarch64_sqrshrun_n<mode>): Likewise.
12426         * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
12427         (TRUNCEXTEND): New code attribute.
12428         (TRUNC_SHIFT): Likewise.
12429         (shrn_op): Likewise.
12430         * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
12431         New predicate.
12432
12433 2023-06-16  Pan Li  <pan2.li@intel.com>
12434
12435         * config/riscv/riscv-vsetvl.cc
12436         (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
12437
12438 2023-06-16  Richard Biener  <rguenther@suse.de>
12439
12440         PR tree-optimization/110278
12441         * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
12442         (x != (typeof x)(x == 0) -> true): Likewise.
12443
12444 2023-06-16  Pali Rohár  <pali@kernel.org>
12445
12446         * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
12447         (REAL_LIBGCC_SPEC): New define.
12448         * config/i386/mingw.opt: Add mcrtdll=
12449         * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
12450         (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
12451         (STARTFILE_SPEC): Adjust for -mcrtdll=.
12452         * doc/invoke.texi: Add mcrtdll= documentation.
12453
12454 2023-06-16  Simon Dardis  <simon.dardis@imgtec.com>
12455
12456         * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
12457         (mips_handle_code_readable_attr):New static function.
12458         (mips_get_code_readable_attr):New static enum function.
12459         (mips_set_current_function):Set the code_readable mode.
12460         (mips_option_override):Same as above.
12461         * doc/extend.texi:Document code_readable.
12462
12463 2023-06-16  Richard Biener  <rguenther@suse.de>
12464
12465         PR tree-optimization/110269
12466         * fold-const.cc (fold_binary_loc): Merge x != 0 folding
12467         with tree_expr_nonzero_p ...
12468         * match.pd (cmp (convert? addr@0) integer_zerop): With this
12469         pattern.
12470
12471 2023-06-15  Marek Polacek  <polacek@redhat.com>
12472
12473         * Makefile.in: Set LD_PICFLAG.  Use it.  Set enable_host_pie.
12474         Remove NO_PIE_CFLAGS and NO_PIE_FLAG.  Pass LD_PICFLAG to
12475         ALL_LINKERFLAGS.  Use the "pic" build of libiberty if --enable-host-pie.
12476         * configure.ac (--enable-host-shared): Don't set PICFLAG here.
12477         (--enable-host-pie): New check.  Set PICFLAG and LD_PICFLAG after this
12478         check.
12479         * configure: Regenerate.
12480         * doc/install.texi: Document --enable-host-pie.
12481
12482 2023-06-15  Manolis Tsamis  <manolis.tsamis@vrull.eu>
12483
12484         * regcprop.cc (maybe_mode_change): Enable stack pointer
12485         propagation.
12486
12487 2023-06-15  Andrew MacLeod  <amacleod@redhat.com>
12488
12489         PR tree-optimization/110266
12490         * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
12491         complex type.
12492         (adjust_realpart_expr): Ditto.
12493
12494 2023-06-15  Jan Beulich  <jbeulich@suse.com>
12495
12496         * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
12497         vmovddup.
12498
12499 2023-06-15  Jan Beulich  <jbeulich@suse.com>
12500
12501         * config/i386/constraints.md: Mention k and r for B.
12502
12503 2023-06-15  Lulu Cheng  <chenglulu@loongson.cn>
12504             Andrew Pinski  <apinski@marvell.com>
12505
12506         PR target/110136
12507         * config/loongarch/loongarch.md: Modify the register constraints for template
12508         "jumptable" and "indirect_jump" from "r" to "e".
12509
12510 2023-06-15  Xi Ruoyao  <xry111@xry111.site>
12511
12512         * config/loongarch/loongarch-tune.h (loongarch_align): New
12513         struct.
12514         * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
12515         array.
12516         * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
12517         the array.
12518         * config/loongarch/loongarch.cc
12519         (loongarch_option_override_internal): Set the value of
12520         -falign-functions= if -falign-functions is enabled but no value
12521         is given.  Likewise for -falign-labels=.
12522
12523 2023-06-15  Jakub Jelinek  <jakub@redhat.com>
12524
12525         PR middle-end/79173
12526         * internal-fn.def (UADDC, USUBC): New internal functions.
12527         * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
12528         (commutative_ternary_fn_p): Return true also for IFN_UADDC.
12529         * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
12530         * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
12531         match_uaddc_usubc): New functions.
12532         (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
12533         for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
12534         other optimizations have been successful for those.
12535         * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
12536         * fold-const-call.cc (fold_const_call): Likewise.
12537         * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
12538         * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
12539         * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
12540         patterns.
12541         * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
12542         define_expand patterns.
12543         (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
12544         into NOTE_INSN_DELETED note rather than nop instruction.
12545         (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
12546         Likewise.
12547
12548 2023-06-15  Jakub Jelinek  <jakub@redhat.com>
12549
12550         PR middle-end/79173
12551         * config/i386/i386.md (subborrow<mode>): Add alternative with
12552         memory destination and add for it define_peephole2
12553         TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
12554         destination in these patterns.
12555
12556 2023-06-15  Jakub Jelinek  <jakub@redhat.com>
12557
12558         PR middle-end/79173
12559         * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
12560         addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
12561         define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
12562         using memory destination in these patterns.
12563
12564 2023-06-15  Jakub Jelinek  <jakub@redhat.com>
12565
12566         * gimple-fold.cc (gimple_fold_call): Move handling of arg0
12567         as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
12568         and .{ADD,SUB,MUL}_OVERFLOW calls from here...
12569         * fold-const-call.cc (fold_const_call): ... here.
12570
12571 2023-06-15  Oluwatamilore Adebayo  <oluwatamilore.adebayo@arm.com>
12572
12573         * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
12574         Rename to <su>abd<mode>3.
12575         * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
12576         to <su>abd<mode>3.
12577
12578 2023-06-15  Oluwatamilore Adebayo  <oluwatamilore.adebayo@arm.com>
12579
12580         * doc/md.texi (sabd, uabd): Document them.
12581         * internal-fn.def (ABD): Use new optab.
12582         * optabs.def (sabd_optab, uabd_optab): New optabs,
12583         * tree-vect-patterns.cc (vect_recog_absolute_difference):
12584         Recognize the following idiom abs (a - b).
12585         (vect_recog_sad_pattern): Refactor to use
12586         vect_recog_absolute_difference.
12587         (vect_recog_abd_pattern): Use patterns found by
12588         vect_recog_absolute_difference to build a new ABD
12589         internal call.
12590
12591 2023-06-15  chenxiaolong  <chenxl04200420@163.com>
12592
12593         * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
12594         of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
12595
12596 2023-06-15  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
12597
12598         * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
12599         (expand_vec_perm_const_1): Add merge optmization.
12600
12601 2023-06-15  Lehua Ding  <lehua.ding@rivai.ai>
12602
12603         PR target/110119
12604         * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
12605         (riscv_pass_by_reference): Return true for vector mode
12606
12607 2023-06-15  Pan Li  <pan2.li@intel.com>
12608
12609         * config/riscv/autovec-opt.md: Align the predictor sytle.
12610         * config/riscv/autovec.md: Ditto.
12611
12612 2023-06-15  Pan Li  <pan2.li@intel.com>
12613
12614         * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
12615         Take elen instead of scalar BITS_PER_WORD.
12616         (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
12617         instead of scaler BITS_PER_WORD.
12618
12619 2023-06-14  Jivan Hakobyan  <jivanhakobyan9@gmail.com>
12620
12621         * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
12622
12623 2023-06-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
12624
12625         * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
12626         Fix signed comparison warning in loop from npats to enelts.
12627
12628 2023-06-14  Thomas Schwinge  <thomas@codesourcery.com>
12629
12630         * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
12631         to offloading compilation.
12632         * config/gcn/mkoffload.cc (main): Adjust.
12633         * config/nvptx/mkoffload.cc (main): Likewise.
12634         * doc/invoke.texi (foffload-options): Update example.
12635
12636 2023-06-14  liuhongt  <hongtao.liu@intel.com>
12637
12638         PR target/110227
12639         * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
12640         for alternative 2 since there's no evex version for vpcmpeqd
12641         ymm, ymm, ymm.
12642
12643 2023-06-13  Jeff Law  <jlaw@ventanamicro.com>
12644
12645         * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
12646
12647 2023-06-13  Jeff Law  <jlaw@ventanamicro.com>
12648
12649         * config/sh/divtab.cc: Remove.
12650
12651 2023-06-13  Jakub Jelinek  <jakub@redhat.com>
12652
12653         * config/i386/i386.cc (standard_sse_constant_opcode): Remove
12654         superfluous spaces around \t for vpcmpeqd.
12655
12656 2023-06-13  Roger Sayle  <roger@nextmovesoftware.com>
12657
12658         * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
12659         clearing vectors with only a single element.  Set CLEARED if the
12660         vector was initialized to zero.
12661
12662 2023-06-13  Lehua Ding  <lehua.ding@rivai.ai>
12663
12664         * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
12665         #include.
12666         (ENTRY): Undef.
12667         (TUPLE_ENTRY): Undef.
12668
12669 2023-06-13  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
12670
12671         * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
12672         (shuffle_generic_patterns): Ditto.
12673         (expand_vec_perm_const_1): Ditto.
12674
12675 2023-06-13  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
12676
12677         * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
12678         (shuffle_decompress_patterns): Ditto.
12679
12680 2023-06-13  Richard Biener  <rguenther@suse.de>
12681
12682         * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
12683
12684 2023-06-13  Yanzhang Wang  <yanzhang.wang@intel.com>
12685             Kito Cheng  <kito.cheng@sifive.com>
12686
12687         * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
12688         warning flag if func is not builtin
12689         * config/riscv/riscv.cc
12690         (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
12691         (riscv_arg_has_vector): Determine whether the arg is vector type.
12692         (riscv_pass_in_vector_p): Check the vector type param is passed by value.
12693         (riscv_init_cumulative_args): The same as header.
12694         (riscv_get_arg_info): Add the checking.
12695         (riscv_function_value): Check the func return and set warning flag
12696         * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
12697         determine whether warning psabi or not.
12698
12699 2023-06-13  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
12700
12701         * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
12702         Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
12703         * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
12704         * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
12705         with TP_TPIDRURO.
12706         (arm_output_load_tpidr): Define.
12707         * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
12708         * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
12709         assembly.
12710         (reload_tp_hard): Likewise.
12711         * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
12712         arm_tp_type.
12713         * doc/invoke.texi (Arm Options, mtp): Document new values.
12714
12715 2023-06-13  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
12716
12717         PR target/108779
12718         * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
12719         AARCH64_TPIDRRO_EL0 value.
12720         * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
12721         * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
12722         tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
12723         * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
12724
12725 2023-06-13  Alexandre Oliva  <oliva@adacore.com>
12726
12727         * range-op-float.cc (frange_nextafter): Drop inline.
12728         (frelop_early_resolve): Add static.
12729         (frange_float): Likewise.
12730
12731 2023-06-13  Richard Biener  <rguenther@suse.de>
12732
12733         PR middle-end/110232
12734         * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
12735         to check whether the buffer covers the whole vector.
12736
12737 2023-06-13  Richard Biener  <rguenther@suse.de>
12738
12739         * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
12740         .MASK_LOAD and friends set the size of the access to unknown.
12741
12742 2023-06-13  Tejas Belagod  <tbelagod@arm.com>
12743
12744         PR target/96339
12745         * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
12746         calls that have a constant input predicate vector.
12747         (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
12748         (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
12749         (svlast_impl::vect_all_same): Check if all vector elements are equal.
12750
12751 2023-06-13  Andi Kleen  <ak@linux.intel.com>
12752
12753         * config/i386/gcc-auto-profile: Regenerate.
12754
12755 2023-06-13  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
12756
12757         * config/riscv/vector-iterators.md: Fix requirement.
12758
12759 2023-06-13  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
12760
12761         * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
12762         (shuffle_decompress_patterns): New function.
12763         (expand_vec_perm_const_1): Add decompress optimization.
12764
12765 2023-06-12  Jeff Law  <jlaw@ventanamicro.com>
12766
12767         PR rtl-optimization/101188
12768         * postreload.cc (reload_cse_move2add_invalidate): New function,
12769         extracted from...
12770         (reload_cse_move2add): Call reload_cse_move2add_invalidate.
12771
12772 2023-06-12  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
12773
12774         * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
12775         if (n_var == n_elts && n_elts <= 16) to allow a single constant,
12776         and if maxv == 1, use constant element for duplicating into register.
12777
12778 2023-06-12  Tobias Burnus  <tobias@codesourcery.com>
12779
12780         * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
12781         GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
12782         (gimplify_adjust_omp_clauses): Change
12783         GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
12784         GOMP_MAP_FORCE_PRESENT.
12785         * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
12786         GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
12787         to/from clauses with present modifier.
12788
12789 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12790
12791         PR tree-optimization/110205
12792         * range-op-float.cc (range_operator::fold_range): Add default FII
12793         fold routine.
12794         * range-op-mixed.h (class operator_gt): Add missing final overrides.
12795         * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
12796         (operator_lshift ::update_bitmask): Add final override.
12797         (operator_rshift ::update_bitmask): Add final override.
12798         * range-op.h (range_operator::fold_range): Add FII prototype.
12799
12800 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12801
12802         * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
12803         Use range_op_handler directly.
12804         * range-op.cc (range_op_handler::range_op_handler): Unsigned
12805         param instead of tree-code.
12806         (ptr_op_widen_plus_signed): Delete.
12807         (ptr_op_widen_plus_unsigned): Delete.
12808         (ptr_op_widen_mult_signed): Delete.
12809         (ptr_op_widen_mult_unsigned): Delete.
12810         (range_op_table::initialize_integral_ops): Add new opcodes.
12811         * range-op.h (range_op_handler): Use unsigned.
12812         (OP_WIDEN_MULT_SIGNED): New.
12813         (OP_WIDEN_MULT_UNSIGNED): New.
12814         (OP_WIDEN_PLUS_SIGNED): New.
12815         (OP_WIDEN_PLUS_UNSIGNED): New.
12816         (RANGE_OP_TABLE_SIZE): New.
12817         (range_op_table::operator []): Use unsigned.
12818         (range_op_table::set): Use unsigned.
12819         (m_range_tree): Make unsigned.
12820         (ptr_op_widen_mult_signed): Remove.
12821         (ptr_op_widen_mult_unsigned): Remove.
12822         (ptr_op_widen_plus_signed): Remove.
12823         (ptr_op_widen_plus_unsigned): Remove.
12824
12825 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12826
12827         * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
12828         manually as there is no access to the default operator.
12829         (cfn_copysign::fold_range): Don't check for validity.
12830         (cfn_ubsan::fold_range): Ditto.
12831         (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
12832         * range-op.cc (default_operator): New.
12833         (range_op_handler::range_op_handler): Use default_operator
12834         instead of NULL.
12835         (range_op_handler::operator bool): Move from header, compare
12836         against default operator.
12837         (range_op_handler::range_op): New.
12838         * range-op.h (range_op_handler::operator bool): Move.
12839
12840 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12841
12842         * range-op.cc (unified_table): Delete.
12843         (range_op_table operator_table): Instantiate.
12844         (range_op_table::range_op_table): Rename from unified_table.
12845         (range_op_handler::range_op_handler): Use range_op_table.
12846         * range-op.h (range_op_table::operator []): Inline.
12847         (range_op_table::set): Inline.
12848
12849 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12850
12851         * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
12852         pass type.
12853         * gimple-range-op.cc (get_code): Rename from get_code_and_type
12854         and simplify.
12855         (gimple_range_op_handler::supported_p): No need for type.
12856         (gimple_range_op_handler::gimple_range_op_handler): Ditto.
12857         (cfn_copysign::fold_range): Ditto.
12858         (cfn_ubsan::fold_range): Ditto.
12859         * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
12860         * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
12861         * range-op-float.cc (operator_plus::op1_range): Ditto.
12862         (operator_mult::op1_range): Ditto.
12863         (range_op_float_tests): Ditto.
12864         * range-op.cc (get_op_handler): Remove.
12865         (range_op_handler::set_op_handler): Remove.
12866         (operator_plus::op1_range): No need for type.
12867         (operator_minus::op1_range): Ditto.
12868         (operator_mult::op1_range): Ditto.
12869         (operator_exact_divide::op1_range): Ditto.
12870         (operator_cast::op1_range): Ditto.
12871         (perator_bitwise_not::fold_range): Ditto.
12872         (operator_negate::fold_range): Ditto.
12873         * range-op.h (range_op_handler::range_op_handler): Remove type param.
12874         (range_cast): No need for type.
12875         (range_op_table::operator[]): Check for enum_code >= 0.
12876         * tree-data-ref.cc (compute_distributive_range): No need for type.
12877         * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
12878         * value-query.cc (range_query::get_tree_range): Ditto.
12879         * value-relation.cc (relation_oracle::validate_relation): Ditto.
12880         * vr-values.cc (range_of_var_in_loop): Ditto.
12881         (simplify_using_ranges::fold_cond_with_ops): Ditto.
12882
12883 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12884
12885         * range-op-mixed.h (operator_max): Remove final.
12886         * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
12887         (pointer_table::pointer_table): Remove.
12888         (class hybrid_max_operator): New.
12889         (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
12890         * range-op.cc (pointer_tree_table): Remove.
12891         (unified_table::unified_table): Comment out MAX_EXPR.
12892         (get_op_handler): Remove check of pointer table.
12893         * range-op.h (class pointer_table): Remove.
12894
12895 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12896
12897         * range-op-mixed.h (operator_min): Remove final.
12898         * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
12899         (class hybrid_min_operator): New.
12900         (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
12901         * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
12902
12903 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12904
12905         * range-op-mixed.h (operator_bitwise_or): Remove final.
12906         * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
12907         (class hybrid_or_operator): New.
12908         (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
12909         * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
12910
12911 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12912
12913         * range-op-mixed.h (operator_bitwise_and): Remove final.
12914         * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
12915         (class hybrid_and_operator): New.
12916         (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
12917         * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
12918
12919 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12920
12921         * Makefile.in (OBJS): Add range-op-ptr.o.
12922         * range-op-mixed.h (update_known_bitmask): Move prototype here.
12923         (minus_op1_op2_relation_effect): Move prototype here.
12924         (wi_includes_zero_p): Move function to here.
12925         (wi_zero_p): Ditto.
12926         * range-op.cc (update_known_bitmask): Remove static.
12927         (wi_includes_zero_p): Move to header.
12928         (wi_zero_p): Move to header.
12929         (minus_op1_op2_relation_effect): Remove static.
12930         (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
12931         (pointer_plus_operator): Ditto.
12932         (pointer_min_max_operator): Ditto.
12933         (pointer_and_operator): Ditto.
12934         (pointer_or_operator): Ditto.
12935         (pointer_table): Ditto.
12936         (range_op_table::initialize_pointer_ops): Ditto.
12937         * range-op-ptr.cc: New.
12938
12939 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12940
12941         * range-op-mixed.h (class operator_max): Move from...
12942         * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
12943         (get_op_handler): Remove the integral table.
12944         (class operator_max): Move from here.
12945         (integral_table::integral_table): Delete.
12946         * range-op.h (class integral_table): Delete.
12947
12948 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12949
12950         * range-op-mixed.h (class operator_min): Move from...
12951         * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
12952         (class operator_min): Move from here.
12953         (integral_table::integral_table): Remove MIN_EXPR.
12954
12955 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12956
12957         * range-op-mixed.h (class operator_bitwise_or): Move from...
12958         * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
12959         (class operator_bitwise_or): Move from here.
12960         (integral_table::integral_table): Remove BIT_IOR_EXPR.
12961
12962 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12963
12964         * range-op-mixed.h (class operator_bitwise_and): Move from...
12965         * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
12966         (get_op_handler): Check for a pointer table entry first.
12967         (class operator_bitwise_and): Move from here.
12968         (integral_table::integral_table): Remove BIT_AND_EXPR.
12969
12970 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12971
12972         * range-op-mixed.h (class operator_bitwise_xor): Move from...
12973         * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
12974         (class operator_bitwise_xor): Move from here.
12975         (integral_table::integral_table): Remove BIT_XOR_EXPR.
12976         (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
12977
12978 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12979
12980         * range-op-mixed.h (class operator_bitwise_not): Move from...
12981         * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
12982         (class operator_bitwise_not): Move from here.
12983         (integral_table::integral_table): Remove BIT_NOT_EXPR.
12984         (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
12985
12986 2023-06-12  Andrew MacLeod  <amacleod@redhat.com>
12987
12988         * range-op-mixed.h (class operator_addr_expr): Move from...
12989         * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
12990         (class operator_addr_expr): Move from here.
12991         (integral_table::integral_table): Remove ADDR_EXPR.
12992         (pointer_table::pointer_table): Remove ADDR_EXPR.
12993
12994 2023-06-12  Pan Li  <pan2.li@intel.com>
12995
12996         * config/riscv/riscv-vector-builtins-types.def
12997         (vfloat16m1_t): Add type to lmul1 ops.
12998         (vfloat16m2_t): Likewise.
12999         (vfloat16m4_t): Likewise.
13000
13001 2023-06-12  Richard Biener  <rguenther@suse.de>
13002
13003         * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
13004         .MASK_STORE and friend set the size of the access to
13005         unknown.
13006
13007 2023-06-12  Tamar Christina  <tamar.christina@arm.com>
13008
13009         * config.in: Regenerate.
13010         * configure: Regenerate.
13011         * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
13012
13013 2023-06-12  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
13014
13015         * config/riscv/autovec-opt.md
13016         (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
13017         (*<any_shiftrt:optab>trunc<mode>): Ditto.
13018         * config/riscv/autovec.md (<optab><mode>3): Change to
13019         define_insn_and_split.
13020         (v<optab><mode>3): Ditto.
13021         (trunc<mode><v_double_trunc>2): Ditto.
13022
13023 2023-06-12  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
13024
13025         * simplify-rtx.cc (simplify_const_unary_operation):
13026         Handle US_TRUNCATE, SS_TRUNCATE.
13027
13028 2023-06-12  Eric Botcazou  <ebotcazou@adacore.com>
13029
13030         PR modula2/109952
13031         * doc/gm2.texi (Standard procedures): Fix Next link.
13032
13033 2023-06-12  Tamar Christina  <tamar.christina@arm.com>
13034
13035         * config.in: Regenerate.
13036
13037 2023-06-12  Andre Vieira  <andre.simoesdiasvieira@arm.com>
13038
13039         PR middle-end/110142
13040         * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
13041         subtype to vect_widened_op_tree and remove subtype parameter, also
13042         remove superfluous overloaded function definition.
13043         (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
13044         to call to vect_recog_widen_op_pattern.
13045         (vect_recog_widen_minus_pattern): Likewise.
13046
13047 2023-06-12  liuhongt  <hongtao.liu@intel.com>
13048
13049         * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
13050         (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
13051         (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
13052         (vec_unpacks_lo_<mode>): Ditto.
13053         (vec_unpacks_hi_<mode>): Ditto.
13054         (sse_movlhps_<mode>): New define_insn.
13055         (ssse3_palignr<mode>_perm): Extend to V_128H.
13056         (V_128H): New mode iterator.
13057         (ssepackPHmode): New mode attribute.
13058         (vunpck_extract_mode): Ditto.
13059         (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
13060         (vpckfloat_temp_mode): Ditto.
13061         (vpckfloat_op_mode): Ditto.
13062         (vunpckfixt_mode): Extend to VxHF.
13063         (vunpckfixt_model): Ditto.
13064         (vunpckfixt_extract_mode): Ditto.
13065
13066 2023-06-12  Richard Biener  <rguenther@suse.de>
13067
13068         PR middle-end/110200
13069         * genmatch.cc (expr::gen_transform): Put braces around
13070         the if arm for the (convert ...) short-cut.
13071
13072 2023-06-12  Kewen Lin  <linkw@linux.ibm.com>
13073
13074         PR target/109932
13075         * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
13076         __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
13077
13078 2023-06-12  Kewen Lin  <linkw@linux.ibm.com>
13079
13080         PR target/110011
13081         * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
13082         floating constant itself for real_to_target call.
13083
13084 2023-06-12  Pan Li  <pan2.li@intel.com>
13085
13086         * config/riscv/riscv-vector-builtins-types.def
13087         (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
13088         (vfloat16mf2_t): Ditto.
13089         (vfloat16m1_t): Ditto.
13090         (vfloat16m2_t): Ditto.
13091         (vfloat16m4_t): Ditto.
13092
13093 2023-06-12  David Edelsohn  <dje.gcc@gmail.com>
13094
13095         * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
13096         Do not require a stack frame when debugging is enabled for AIX.
13097
13098 2023-06-11  Georg-Johann Lay  <avr@gjlay.de>
13099
13100         * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
13101         Remove attribute values.
13102         (insv_notbit): New post-reload insn.
13103         (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
13104         (*insv.not-bit.0_split, *insv.not-bit.7_split)
13105         (*insv.xor-extract_split): Split to insv_notbit.
13106         (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
13107         (*insv.xor-extract): Remove post-reload insns.
13108         * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
13109         (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
13110         [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
13111         * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
13112
13113 2023-06-11  Georg-Johann Lay  <avr@gjlay.de>
13114
13115         PR target/109907
13116         * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
13117         (MSB, SIZE): New mode attributes.
13118         (any_shift): New code iterator.
13119         (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
13120         (*lshr<mode>3_const_split): Add constraint alternative for
13121         the case of shift-offset = MSB.  Ditch "length" attribute.
13122         (extzv<mode): New. replaces extzv.  Adjust following patterns.
13123         Use avr_out_extr, avr_out_extr_not to print asm.
13124         (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
13125         (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
13126         * config/avr/constraints.md (C15, C23, C31, Yil): New
13127         * config/avr/predicates.md (reg_or_low_io_operand)
13128         (const7_operand, reg_or_low_io_operand)
13129         (const15_operand, const_0_to_15_operand)
13130         (const23_operand, const_0_to_23_operand)
13131         (const31_operand, const_0_to_31_operand): New.
13132         * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
13133         * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
13134         (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
13135         MSB case to new insn constraint "r" for operands[1].
13136         (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
13137         Handle these cases.
13138         (avr_rtx_costs_1): Adjust cost for a new pattern.
13139
13140 2023-06-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
13141
13142         * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
13143         (vector_insn_info::parse_insn): Add rtx_insn parse.
13144         (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
13145         (get_first_vsetvl): New function.
13146         (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
13147         (pass_vsetvl::cleanup_insns): Remove it.
13148         (pass_vsetvl::ssa_post_optimization): New function.
13149         (has_no_uses): Ditto.
13150         (pass_vsetvl::propagate_avl): Remove it.
13151         (pass_vsetvl::df_post_optimization): New function.
13152         (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
13153         * config/riscv/riscv-vsetvl.h: Adapt declaration.
13154
13155 2023-06-10  Aldy Hernandez  <aldyh@redhat.com>
13156
13157         * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
13158         (ipcp_vr_lattice::print): Call dump method.
13159         (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
13160         Value_Range.
13161         (ipcp_vr_lattice::meet_with_1): Make argument a reference.
13162         (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
13163         range.
13164         (initialize_node_lattices): Pass type when appropriate.
13165         (ipa_vr_operation_and_type_effects): Make type agnostic.
13166         (ipa_value_range_from_jfunc): Same.
13167         (propagate_vr_across_jump_function): Same.
13168         * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
13169         (evaluate_properties_for_edge): Same.
13170         * ipa-prop.cc (ipa_vr::get_vrange): Same.
13171         (ipcp_update_vr): Same.
13172         * ipa-prop.h (ipa_value_range_from_jfunc): Same.
13173         (ipa_range_set_and_normalize): Same.
13174
13175 2023-06-10  Georg-Johann Lay  <avr@gjlay.de>
13176
13177         PR target/109650
13178         PR target/92729
13179         * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
13180         * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
13181         (avr_pass_data_ifelse): New pass_data for it.
13182         (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
13183         (avr_canonicalize_comparison, avr_out_plus_set_ZN)
13184         (avr_out_cmp_ext): New functions.
13185         (compare_condtition): Make sure REG_CC dies in the branch insn.
13186         (avr_rtx_costs_1): Add computation of cbranch costs.
13187         (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
13188         [ADJUST_LEN_CMP_SEXT]Handle them.
13189         (TARGET_CANONICALIZE_COMPARISON): New define.
13190         (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
13191         (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
13192         (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
13193         * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
13194         (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
13195         (avr_out_cmp_zext): New Protos
13196         * config/avr/avr.md (branch, difficult_branch): Don't split insns.
13197         (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
13198         (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
13199         (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
13200         (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
13201         (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
13202         Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
13203         Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
13204         (adjust_len) [add_set_ZN, cmp_zext]: New.
13205         (QIPSI): New mode iterator.
13206         (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
13207         (gelt): New code iterator.
13208         (gelt_eqne): New code attribute.
13209         (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
13210         (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
13211         (*cmpqi_sign_extend): Remove insns.
13212         (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
13213         * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
13214         * config/avr/predicates.md (scratch_or_d_register_operand): New.
13215         * config/avr/constraints.md (Yxx): New constraint.
13216
13217 2023-06-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
13218
13219         * config/riscv/autovec.md (select_vl<mode>): New pattern.
13220         * config/riscv/riscv-protos.h (expand_select_vl): New function.
13221         * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
13222
13223 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13224
13225         * range-op-float.cc (foperator_mult_div_base): Delete.
13226         (foperator_mult_div_base::find_range): Make static local function.
13227         (foperator_mult): Remove.  Move prototypes to range-op-mixed.h
13228         (operator_mult::op1_range): Rename from foperator_mult.
13229         (operator_mult::op2_range): Ditto.
13230         (operator_mult::rv_fold): Ditto.
13231         (float_table::float_table): Remove MULT_EXPR.
13232         (class foperator_div): Inherit from range_operator.
13233         (float_table::float_table): Delete.
13234         * range-op-mixed.h (class operator_mult): Combined from integer
13235         and float files.
13236         * range-op.cc (float_tree_table): Delete.
13237         (op_mult): New object.
13238         (unified_table::unified_table): Add MULT_EXPR.
13239         (get_op_handler): Do not check float table any longer.
13240         (class cross_product_operator): Move to range-op-mixed.h.
13241         (class operator_mult): Move to range-op-mixed.h.
13242         (integral_table::integral_table): Remove MULT_EXPR.
13243         (pointer_table::pointer_table): Remove MULT_EXPR.
13244         * range-op.h (float_table): Remove.
13245
13246 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13247
13248         * range-op-float.cc (foperator_negate): Remove.  Move prototypes
13249         to range-op-mixed.h
13250         (operator_negate::fold_range): Rename from foperator_negate.
13251         (operator_negate::op1_range): Ditto.
13252         (float_table::float_table): Remove NEGATE_EXPR.
13253         * range-op-mixed.h (class operator_negate): Combined from integer
13254         and float files.
13255         * range-op.cc (op_negate): New object.
13256         (unified_table::unified_table): Add NEGATE_EXPR.
13257         (class operator_negate): Move to range-op-mixed.h.
13258         (integral_table::integral_table): Remove NEGATE_EXPR.
13259         (pointer_table::pointer_table): Remove NEGATE_EXPR.
13260
13261 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13262
13263         * range-op-float.cc (foperator_minus): Remove.  Move prototypes
13264         to range-op-mixed.h
13265         (operator_minus::fold_range): Rename from foperator_minus.
13266         (operator_minus::op1_range): Ditto.
13267         (operator_minus::op2_range): Ditto.
13268         (operator_minus::rv_fold): Ditto.
13269         (float_table::float_table): Remove MINUS_EXPR.
13270         * range-op-mixed.h (class operator_minus): Combined from integer
13271         and float files.
13272         * range-op.cc (op_minus): New object.
13273         (unified_table::unified_table): Add MINUS_EXPR.
13274         (class operator_minus): Move to range-op-mixed.h.
13275         (integral_table::integral_table): Remove MINUS_EXPR.
13276         (pointer_table::pointer_table): Remove MINUS_EXPR.
13277
13278 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13279
13280         * range-op-float.cc (foperator_abs): Remove.  Move prototypes
13281         to range-op-mixed.h
13282         (operator_abs::fold_range): Rename from foperator_abs.
13283         (operator_abs::op1_range): Ditto.
13284         (float_table::float_table): Remove ABS_EXPR.
13285         * range-op-mixed.h (class operator_abs): Combined from integer
13286         and float files.
13287         * range-op.cc (op_abs): New object.
13288         (unified_table::unified_table): Add ABS_EXPR.
13289         (class operator_abs): Move to range-op-mixed.h.
13290         (integral_table::integral_table): Remove ABS_EXPR.
13291         (pointer_table::pointer_table): Remove ABS_EXPR.
13292
13293 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13294
13295         * range-op-float.cc (foperator_plus): Remove.  Move prototypes
13296         to range-op-mixed.h
13297         (operator_plus::fold_range): Rename from foperator_plus.
13298         (operator_plus::op1_range): Ditto.
13299         (operator_plus::op2_range): Ditto.
13300         (operator_plus::rv_fold): Ditto.
13301         (float_table::float_table): Remove PLUS_EXPR.
13302         * range-op-mixed.h (class operator_plus): Combined from integer
13303         and float files.
13304         * range-op.cc (op_plus): New object.
13305         (unified_table::unified_table): Add PLUS_EXPR.
13306         (class operator_plus): Move to range-op-mixed.h.
13307         (integral_table::integral_table): Remove PLUS_EXPR.
13308         (pointer_table::pointer_table): Remove PLUS_EXPR.
13309
13310 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13311
13312         * range-op-mixed.h (class operator_cast): Combined from integer
13313         and float files.
13314         * range-op.cc (op_cast): New object.
13315         (unified_table::unified_table): Add op_cast
13316         (class operator_cast): Move to range-op-mixed.h.
13317         (integral_table::integral_table): Remove op_cast
13318         (pointer_table::pointer_table): Remove op_cast.
13319
13320 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13321
13322         * range-op-float.cc (operator_cst::fold_range): New.
13323         * range-op-mixed.h (class operator_cst): Move from integer file.
13324         * range-op.cc (op_cst): New object.
13325         (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
13326         (class operator_cst): Move to range-op-mixed.h.
13327         (integral_table::integral_table): Remove op_cst.
13328         (pointer_table::pointer_table): Remove op_cst.
13329
13330 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13331
13332         * range-op-float.cc (foperator_identity): Remove.  Move prototypes
13333         to range-op-mixed.h
13334         (operator_identity::fold_range): Rename from foperator_identity.
13335         (operator_identity::op1_range): Ditto.
13336         (float_table::float_table): Remove fop_identity.
13337         * range-op-mixed.h (class operator_identity): Combined from integer
13338         and float files.
13339         * range-op.cc (op_identity): New object.
13340         (unified_table::unified_table): Add op_identity.
13341         (class operator_identity): Move to range-op-mixed.h.
13342         (integral_table::integral_table): Remove identity.
13343         (pointer_table::pointer_table): Remove identity.
13344
13345 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13346
13347         * range-op-float.cc (foperator_ge): Remove.  Move prototypes
13348         to range-op-mixed.h
13349         (operator_ge::fold_range): Rename from foperator_ge.
13350         (operator_ge::op1_range): Ditto.
13351         (float_table::float_table): Remove GE_EXPR.
13352         * range-op-mixed.h (class operator_ge): Combined from integer
13353         and float files.
13354         * range-op.cc (op_ge): New object.
13355         (unified_table::unified_table): Add GE_EXPR.
13356         (class operator_ge): Move to range-op-mixed.h.
13357         (ge_op1_op2_relation): Fold into
13358         operator_ge::op1_op2_relation.
13359         (integral_table::integral_table): Remove GE_EXPR.
13360         (pointer_table::pointer_table): Remove GE_EXPR.
13361         * range-op.h (ge_op1_op2_relation): Delete.
13362
13363 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13364
13365         * range-op-float.cc (foperator_gt): Remove.  Move prototypes
13366         to range-op-mixed.h
13367         (operator_gt::fold_range): Rename from foperator_gt.
13368         (operator_gt::op1_range): Ditto.
13369         (float_table::float_table): Remove GT_EXPR.
13370         * range-op-mixed.h (class operator_gt): Combined from integer
13371         and float files.
13372         * range-op.cc (op_gt): New object.
13373         (unified_table::unified_table): Add GT_EXPR.
13374         (class operator_gt): Move to range-op-mixed.h.
13375         (gt_op1_op2_relation): Fold into
13376         operator_gt::op1_op2_relation.
13377         (integral_table::integral_table): Remove GT_EXPR.
13378         (pointer_table::pointer_table): Remove GT_EXPR.
13379         * range-op.h (gt_op1_op2_relation): Delete.
13380
13381 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13382
13383         * range-op-float.cc (foperator_le): Remove.  Move prototypes
13384         to range-op-mixed.h
13385         (operator_le::fold_range): Rename from foperator_le.
13386         (operator_le::op1_range): Ditto.
13387         (float_table::float_table): Remove LE_EXPR.
13388         * range-op-mixed.h (class operator_le): Combined from integer
13389         and float files.
13390         * range-op.cc (op_le): New object.
13391         (unified_table::unified_table): Add LE_EXPR.
13392         (class operator_le): Move to range-op-mixed.h.
13393         (le_op1_op2_relation): Fold into
13394         operator_le::op1_op2_relation.
13395         (integral_table::integral_table): Remove LE_EXPR.
13396         (pointer_table::pointer_table): Remove LE_EXPR.
13397         * range-op.h (le_op1_op2_relation): Delete.
13398
13399 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13400
13401         * range-op-float.cc (foperator_lt): Remove.  Move prototypes
13402         to range-op-mixed.h
13403         (operator_lt::fold_range): Rename from foperator_lt.
13404         (operator_lt::op1_range): Ditto.
13405         (float_table::float_table): Remove LT_EXPR.
13406         * range-op-mixed.h (class operator_lt): Combined from integer
13407         and float files.
13408         * range-op.cc (op_lt): New object.
13409         (unified_table::unified_table): Add LT_EXPR.
13410         (class operator_lt): Move to range-op-mixed.h.
13411         (lt_op1_op2_relation): Fold into
13412         operator_lt::op1_op2_relation.
13413         (integral_table::integral_table): Remove LT_EXPR.
13414         (pointer_table::pointer_table): Remove LT_EXPR.
13415         * range-op.h (lt_op1_op2_relation): Delete.
13416
13417 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13418
13419         * range-op-float.cc (foperator_not_equal): Remove.  Move prototypes
13420         to range-op-mixed.h
13421         (operator_equal::fold_range): Rename from foperator_not_equal.
13422         (operator_equal::op1_range): Ditto.
13423         (float_table::float_table): Remove NE_EXPR.
13424         * range-op-mixed.h (class operator_not_equal): Combined from integer
13425         and float files.
13426         * range-op.cc (op_equal): New object.
13427         (unified_table::unified_table): Add NE_EXPR.
13428         (class operator_not_equal): Move to range-op-mixed.h.
13429         (not_equal_op1_op2_relation): Fold into
13430         operator_not_equal::op1_op2_relation.
13431         (integral_table::integral_table): Remove NE_EXPR.
13432         (pointer_table::pointer_table): Remove NE_EXPR.
13433         * range-op.h (not_equal_op1_op2_relation): Delete.
13434
13435 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13436
13437         * range-op-float.cc (foperator_equal): Remove.  Move prototypes
13438         to range-op-mixed.h
13439         (operator_equal::fold_range): Rename from foperator_equal.
13440         (operator_equal::op1_range): Ditto.
13441         (float_table::float_table): Remove EQ_EXPR.
13442         * range-op-mixed.h (class operator_equal): Combined from integer
13443         and float files.
13444         * range-op.cc (op_equal): New object.
13445         (unified_table::unified_table): Add EQ_EXPR.
13446         (class operator_equal): Move to range-op-mixed.h.
13447         (equal_op1_op2_relation): Fold into
13448         operator_equal::op1_op2_relation.
13449         (integral_table::integral_table): Remove EQ_EXPR.
13450         (pointer_table::pointer_table): Remove EQ_EXPR.
13451         * range-op.h (equal_op1_op2_relation): Delete.
13452
13453 2023-06-10  Andrew MacLeod  <amacleod@redhat.com>
13454
13455         * range-op-float.cc (class float_table): Move to header.
13456         (float_table::float_table): Move float only operators to...
13457         (range_op_table::initialize_float_ops): Here.
13458         * range-op-mixed.h: New.
13459         * range-op.cc (integral_tree_table, pointer_tree_table): Moved
13460         to top of file.
13461         (float_tree_table): Moved from range-op-float.cc.
13462         (unified_tree_table): New.
13463         (unified_table::unified_table): New.  Call initialize routines.
13464         (get_op_handler): Check unified table first.
13465         (range_op_handler::range_op_handler): Handle no type constructor.
13466         (integral_table::integral_table): Move integral only operators to...
13467         (range_op_table::initialize_integral_ops): Here.
13468         (pointer_table::pointer_table): Move pointer only operators to...
13469         (range_op_table::initialize_pointer_ops): Here.
13470         * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
13471         (get_bool_state): Ditto.
13472         (empty_range_varying): Ditto.
13473         (relop_early_resolve): Ditto.
13474         (class range_op_table): Add new init methods for range types.
13475         (class integral_table): Move declaration to here.
13476         (class pointer_table): Move declaration to here.
13477         (class float_table): Move declaration to here.
13478
13479 2023-06-09  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
13480             Richard Sandiford <richard.sandiford@arm.com>
13481             Richard Biener  <rguenther@suse.de>
13482
13483         * doc/md.texi: Add SELECT_VL support.
13484         * internal-fn.def (SELECT_VL): Ditto.
13485         * optabs.def (OPTAB_D): Ditto.
13486         * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
13487         * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
13488         * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
13489         (vectorizable_store): Ditto.
13490         (vectorizable_load): Ditto.
13491         * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
13492
13493 2023-06-09  Andrew MacLeod  <amacleod@redhat.com>
13494
13495         PR ipa/109886
13496         * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
13497         type as well.
13498
13499 2023-06-09  Andrew MacLeod  <amacleod@redhat.com>
13500
13501         * range-op.cc (range_cast): Move to...
13502         * range-op.h (range_cast): Here and add generic a version.
13503
13504 2023-06-09  Marek Polacek  <polacek@redhat.com>
13505
13506         PR c/39589
13507         PR c++/96868
13508         * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
13509         warn about designated initializers in C only.
13510
13511 2023-06-09  Andrew Pinski  <apinski@marvell.com>
13512
13513         PR tree-optimization/97711
13514         PR tree-optimization/110155
13515         * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
13516         ((zero_one != 0) ? z <op> y : y): Likewise.
13517
13518 2023-06-09  Andrew Pinski  <apinski@marvell.com>
13519
13520         * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
13521         multiply rather than negation/bit_and.
13522
13523 2023-06-09  Andrew Pinski  <apinski@marvell.com>
13524
13525         * match.pd (`X & -Y -> X * Y`): Allow for truncation
13526         and the same type for unsigned types.
13527
13528 2023-06-09  Andrew Pinski  <apinski@marvell.com>
13529
13530         PR tree-optimization/110165
13531         PR tree-optimization/110166
13532         * match.pd (zero_one_valued_p): Don't accept
13533         signed 1-bit integers.
13534
13535 2023-06-09  Richard Biener  <rguenther@suse.de>
13536
13537         * match.pd (two conversions in a row): Use element_precision
13538         to DTRT for VECTOR_TYPE.
13539
13540 2023-06-09  Pan Li  <pan2.li@intel.com>
13541
13542         * config/riscv/riscv.md (enabled): Move to another place, and
13543         add fp_vector_disabled to the cond.
13544         (fp_vector_disabled): New attr defined for disabling fp.
13545         * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
13546
13547 2023-06-09  Pan Li  <pan2.li@intel.com>
13548
13549         * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
13550         literal to int.
13551
13552 2023-06-09  liuhongt  <hongtao.liu@intel.com>
13553
13554         PR target/110108
13555         * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
13556         view_convert_expr mask to signed type when folding pblendvb
13557         builtins.
13558
13559 2023-06-09  liuhongt  <hongtao.liu@intel.com>
13560
13561         PR target/110108
13562         * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
13563         _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
13564         ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
13565         TARGET_64BIT.
13566         * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
13567         real codename for __builtin_ia32_pabs{b,w,d}.
13568
13569 2023-06-08  Andrew MacLeod  <amacleod@redhat.com>
13570
13571         * gimple-range-op.cc
13572         (gimple_range_op_handler::gimple_range_op_handler): Adjust.
13573         (gimple_range_op_handler::maybe_builtin_call): Adjust.
13574         * gimple-range-op.h (operand1, operand2): Use m_operator.
13575         * range-op.cc (integral_table, pointer_table): Relocate.
13576         (get_op_handler): Rename from get_handler and handle all types.
13577         (range_op_handler::range_op_handler): Relocate.
13578         (range_op_handler::set_op_handler): Relocate and adjust.
13579         (range_op_handler::range_op_handler): Relocate.
13580         (dispatch_trio): New.
13581         (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
13582         (range_op_handler::dispatch_kind): New.
13583         (range_op_handler::fold_range): Relocate and Use new dispatch value.
13584         (range_op_handler::op1_range): Ditto.
13585         (range_op_handler::op2_range): Ditto.
13586         (range_op_handler::lhs_op1_relation): Ditto.
13587         (range_op_handler::lhs_op2_relation): Ditto.
13588         (range_op_handler::op1_op2_relation): Ditto.
13589         (range_op_handler::set_op_handler): Use m_operator member.
13590         * range-op.h (range_op_handler::operator bool): Use m_operator.
13591         (range_op_handler::dispatch_kind): New.
13592         (range_op_handler::m_valid): Delete.
13593         (range_op_handler::m_int): Delete
13594         (range_op_handler::m_float): Delete
13595         (range_op_handler::m_operator): New.
13596         (range_op_table::operator[]): Relocate from .cc file.
13597         (range_op_table::set): Ditto.
13598         * value-range.h (class vrange): Make range_op_handler a friend.
13599
13600 2023-06-08  Andrew MacLeod  <amacleod@redhat.com>
13601
13602         * gimple-range-op.cc (cfn_constant_float_p): Change base class.
13603         (cfn_pass_through_arg1): Adjust using statemenmt.
13604         (cfn_signbit): Change base class, adjust using statement.
13605         (cfn_copysign): Ditto.
13606         (cfn_sqrt): Ditto.
13607         (cfn_sincos): Ditto.
13608         * range-op-float.cc (fold_range): Change class to range_operator.
13609         (rv_fold): Ditto.
13610         (op1_range): Ditto
13611         (op2_range): Ditto
13612         (lhs_op1_relation): Ditto.
13613         (lhs_op2_relation): Ditto.
13614         (op1_op2_relation): Ditto.
13615         (foperator_*): Ditto.
13616         (class float_table): New.  Inherit from range_op_table.
13617         (floating_tree_table) Change to range_op_table pointer.
13618         (class floating_op_table): Delete.
13619         * range-op.cc (operator_equal): Adjust using statement.
13620         (operator_not_equal): Ditto.
13621         (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
13622         (operator_minus, operator_cast): Ditto.
13623         (operator_bitwise_and, pointer_plus_operator): Ditto.
13624         (get_float_handle): Change return type.
13625         * range-op.h (range_operator_float): Delete.  Relocate all methods
13626         into class range_operator.
13627         (range_op_handler::m_float): Change type to range_operator.
13628         (floating_op_table): Delete.
13629         (floating_tree_table): Change type.
13630
13631 2023-06-08  Andrew MacLeod  <amacleod@redhat.com>
13632
13633         * range-op.cc (range_operator::fold_range): Call virtual routine.
13634         (range_operator::update_bitmask): New.
13635         (operator_equal::update_bitmask): New.
13636         (operator_not_equal::update_bitmask): New.
13637         (operator_lt::update_bitmask): New.
13638         (operator_le::update_bitmask): New.
13639         (operator_gt::update_bitmask): New.
13640         (operator_ge::update_bitmask): New.
13641         (operator_ge::update_bitmask): New.
13642         (operator_plus::update_bitmask): New.
13643         (operator_minus::update_bitmask): New.
13644         (operator_pointer_diff::update_bitmask): New.
13645         (operator_min::update_bitmask): New.
13646         (operator_max::update_bitmask): New.
13647         (operator_mult::update_bitmask): New.
13648         (operator_div:operator_div):New.
13649         (operator_div::update_bitmask): New.
13650         (operator_div::m_code): New member.
13651         (operator_exact_divide::operator_exact_divide): New constructor.
13652         (operator_lshift::update_bitmask): New.
13653         (operator_rshift::update_bitmask): New.
13654         (operator_bitwise_and::update_bitmask): New.
13655         (operator_bitwise_or::update_bitmask): New.
13656         (operator_bitwise_xor::update_bitmask): New.
13657         (operator_trunc_mod::update_bitmask): New.
13658         (op_ident, op_unknown, op_ptr_min_max): New.
13659         (op_nop, op_convert): Delete.
13660         (op_ssa, op_paren, op_obj_type): Delete.
13661         (op_realpart, op_imagpart): Delete.
13662         (op_ptr_min, op_ptr_max): Delete.
13663         (pointer_plus_operator:update_bitmask): New.
13664         (range_op_table::set): Do not use m_code.
13665         (integral_table::integral_table): Adjust to single instances.
13666         * range-op.h (range_operator::range_operator): Delete.
13667         (range_operator::m_code): Delete.
13668         (range_operator::update_bitmask): New.
13669
13670 2023-06-08  Andrew MacLeod  <amacleod@redhat.com>
13671
13672         * range-op-float.cc (range_operator_float::fold_range): Return
13673         NAN of the result type.
13674
13675 2023-06-08  Jakub Jelinek  <jakub@redhat.com>
13676
13677         * optabs.cc (expand_ffs): Add forward declaration.
13678         (expand_doubleword_clz): Rename to ...
13679         (expand_doubleword_clz_ctz_ffs): ... this.  Add UNOPTAB argument,
13680         handle also doubleword CTZ and FFS in addition to CLZ.
13681         (expand_unop): Adjust caller.  Also call it for doubleword
13682         ctz_optab and ffs_optab.
13683
13684 2023-06-08  Jakub Jelinek  <jakub@redhat.com>
13685
13686         PR target/110152
13687         * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
13688         n_words == 2 recurse with mmx_ok as first argument rather than false.
13689
13690 2023-06-07  Roger Sayle  <roger@nextmovesoftware.com>
13691
13692         * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
13693         avoid sign extension/undefined behaviour when setting each bit.
13694
13695 2023-06-07  Roger Sayle  <roger@nextmovesoftware.com>
13696             Uros Bizjak  <ubizjak@gmail.com>
13697
13698         * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
13699         Use new x86_stc instruction when the carry flag must be set.
13700         * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
13701         (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
13702         * config/i386/i386.h (TARGET_SLOW_STC): New define.
13703         * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
13704         (x86_stc): New define_insn.
13705         (define_peephole2): Convert x86_stc into alternate implementation
13706         on pentium4 without -Os when a QImode register is available.
13707         (*x86_cmc): New define_insn.
13708         (define_peephole2): Convert *x86_cmc into alternate implementation
13709         on pentium4 without -Os when a QImode register is available.
13710         (*setccc): New define_insn_and_split for a no-op CCCmode move.
13711         (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
13712         recognize (and eliminate) the carry flag being copied to itself.
13713         (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
13714         * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
13715
13716 2023-06-07  Andrew Pinski  <apinski@marvell.com>
13717
13718         * match.pd: Fix comment for the
13719         `(zero_one ==/!= 0) ? y : z <op> y` patterns.
13720
13721 2023-06-07  Jeff Law  <jlaw@ventanamicro.com>
13722             Jeff Law   <jlaw@ventanamicro.com>
13723
13724         * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
13725         (rotrsi3_sext): Expose generator.
13726         (rotlsi3 pattern): Hide generator.
13727         * config/riscv/riscv-protos.h (riscv_emit_binary): New function
13728         declaration.
13729         * config/riscv/riscv.cc (riscv_emit_binary): Removed static
13730         * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
13731         (mulsi3, <optab>si3): Likewise.
13732         (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
13733         (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
13734         (<u>mulsidi3): Likewise.
13735         (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
13736         (mulsi3_extended, <optab>si3_extended): Likewise.
13737         (splitter for shadd feeding divison): Update RTL pattern to account
13738         for changes in how 32 bit ops are expanded for TARGET_64BIT.
13739         * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
13740
13741 2023-06-07  Dimitar Dimitrov  <dimitar@dinux.eu>
13742
13743         PR target/109725
13744         * config/riscv/riscv.cc (riscv_print_operand): Calculate
13745         memmodel only when it is valid.
13746
13747 2023-06-07  Dimitar Dimitrov  <dimitar@dinux.eu>
13748
13749         * config/riscv/riscv.cc (riscv_const_insns): Recursively call
13750         for constant element of a vector.
13751
13752 2023-06-07  Jakub Jelinek  <jakub@redhat.com>
13753
13754         * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
13755         instead compare tree_nonzero_bits <= 1U rather than just == 1.
13756
13757 2023-06-07  Alex Coplan  <alex.coplan@arm.com>
13758
13759         PR target/110132
13760         * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
13761         New. Use it ...
13762         (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
13763         names for builtins.
13764         (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
13765         setup if in_lto_p, just like we do for SVE.
13766         * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
13767         (__arm_st64b): Delete.
13768         (__arm_st64bv): Delete.
13769         (__arm_st64bv0): Delete.
13770
13771 2023-06-07  Alex Coplan  <alex.coplan@arm.com>
13772
13773         PR target/110100
13774         * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
13775         Use input operand for the destination address.
13776         * config/aarch64/aarch64.md (st64b): Fix constraint on address
13777         operand.
13778
13779 2023-06-07  Alex Coplan  <alex.coplan@arm.com>
13780
13781         PR target/110100
13782         * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
13783         Replace eight consecutive spaces with tabs.
13784         (aarch64_init_ls64_builtins): Likewise.
13785         (aarch64_expand_builtin_ls64): Likewise.
13786         * config/aarch64/aarch64.md (ld64b): Likewise.
13787         (st64b): Likewise.
13788         (st64bv): Likewise
13789         (st64bv0): Likewise.
13790
13791 2023-06-07  Vladimir N. Makarov  <vmakarov@redhat.com>
13792
13793         * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
13794         offset table pseudo to a general reg subset.
13795
13796 2023-06-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
13797
13798         * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
13799         Rename to...
13800         (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This.  Reimplement
13801         with RTL codes.
13802         (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
13803         (aarch64_sqxtun2<mode>_le): Likewise.
13804         (aarch64_sqxtun2<mode>_be): Likewise.
13805         (aarch64_sqxtun2<mode>): Adjust for the above.
13806         (aarch64_sqmovun<mode>): New define_expand.
13807         * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
13808         (half_mask): New mode attribute.
13809         * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
13810         New predicate.
13811
13812 2023-06-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
13813
13814         * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
13815         Reimplement as...
13816         (aarch64_addp<mode>_insn): ... This...
13817         (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
13818         (aarch64_addp<mode>): New define_expand.
13819
13820 2023-06-07  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
13821
13822         * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
13823         * config/riscv/riscv-v.cc
13824         (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
13825         handling.
13826         (rvv_builder::single_step_npatterns_p): New function.
13827         (rvv_builder::npatterns_all_equal_p): Ditto.
13828         (const_vec_all_in_range_p): Support POLY handling.
13829         (gen_const_vector_dup): Ditto.
13830         (emit_vlmax_gather_insn): Add vrgatherei16.
13831         (emit_vlmax_masked_gather_mu_insn): Ditto.
13832         (expand_const_vector): Add VLA SLP const vector support.
13833         (expand_vec_perm): Support POLY.
13834         (struct expand_vec_perm_d): New struct.
13835         (shuffle_generic_patterns): New function.
13836         (expand_vec_perm_const_1): Ditto.
13837         (expand_vec_perm_const): Ditto.
13838         * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
13839         (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
13840
13841 2023-06-07  Andrew Pinski  <apinski@marvell.com>
13842
13843         PR middle-end/110117
13844         * expr.cc (expand_single_bit_test): Handle
13845         const_int from expand_expr.
13846
13847 2023-06-07  Andrew Pinski  <apinski@marvell.com>
13848
13849         * expr.cc (do_store_flag): Rearrange the
13850         TER code so that it overrides the nonzero bits
13851         info if we had `a & POW2`.
13852
13853 2023-06-07  Andrew Pinski  <apinski@marvell.com>
13854
13855         PR tree-optimization/110134
13856         * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
13857         types.
13858         (-A CMP CST -> B CMP (-CST)): Likewise.
13859
13860 2023-06-07  Andrew Pinski  <apinski@marvell.com>
13861
13862         PR tree-optimization/89263
13863         PR tree-optimization/99069
13864         PR tree-optimization/20083
13865         PR tree-optimization/94898
13866         * match.pd: Add patterns to optimize `a ? onezero : onezero` with
13867         one of the operands are constant.
13868
13869 2023-06-07  Andrew Pinski  <apinski@marvell.com>
13870
13871         * match.pd (zero_one_valued_p): Match 0 integer constant
13872         too.
13873
13874 2023-06-07  Pan Li  <pan2.li@intel.com>
13875
13876         * config/riscv/riscv-vector-builtins-types.def
13877         (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
13878         (vfloat32m1_t): Ditto.
13879         (vfloat32m2_t): Ditto.
13880         (vfloat32m4_t): Ditto.
13881         (vfloat32m8_t): Ditto.
13882         (vint16mf4_t): Ditto.
13883         (vint16mf2_t): Ditto.
13884         (vint16m1_t): Ditto.
13885         (vint16m2_t): Ditto.
13886         (vint16m4_t): Ditto.
13887         (vint16m8_t): Ditto.
13888         (vuint16mf4_t): Ditto.
13889         (vuint16mf2_t): Ditto.
13890         (vuint16m1_t): Ditto.
13891         (vuint16m2_t): Ditto.
13892         (vuint16m4_t): Ditto.
13893         (vuint16m8_t): Ditto.
13894         (vint32mf2_t): Ditto.
13895         (vint32m1_t): Ditto.
13896         (vint32m2_t): Ditto.
13897         (vint32m4_t): Ditto.
13898         (vint32m8_t): Ditto.
13899         (vuint32mf2_t): Ditto.
13900         (vuint32m1_t): Ditto.
13901         (vuint32m2_t): Ditto.
13902         (vuint32m4_t): Ditto.
13903         (vuint32m8_t): Ditto.
13904
13905 2023-06-07  Jason Merrill  <jason@redhat.com>
13906
13907         PR c++/58487
13908         * doc/invoke.texi: Document it.
13909
13910 2023-06-06  Roger Sayle  <roger@nextmovesoftware.com>
13911
13912         * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
13913         * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
13914         * simplify-rtx.cc (simplify_unary_operation_1): Optimize
13915         NOT (BITREVERSE x) as BITREVERSE (NOT x).
13916         Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
13917         Optimize PARITY (BITREVERSE x) as PARITY x.
13918         Optimize BITREVERSE (BITREVERSE x) as x.
13919         (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
13920         BITREVERSE of a constant integer at compile-time.
13921         (simplify_binary_operation_1) <case COPYSIGN>:  Optimize
13922         COPY_SIGN (x, x) as x.  Optimize COPYSIGN (x, C) as ABS x
13923         or NEG (ABS x) for constant C.  Optimize COPYSIGN (ABS x, y)
13924         and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
13925         Optimize COPYSIGN (x, ABS y) as ABS x.
13926         Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
13927         Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
13928         (simplify_const_binary_operation): Evaluate COPYSIGN of constant
13929         arguments at compile-time.
13930
13931 2023-06-06  Uros Bizjak  <ubizjak@gmail.com>
13932
13933         * rtl.h (function_invariant_p): Change return type from int to bool.
13934         * reload1.cc (function_invariant_p): Change return type from
13935         int to bool and adjust function body accordingly.
13936
13937 2023-06-06  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
13938
13939         * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
13940         (*single_<optab>mult_plus<mode>): Ditto.
13941         (*double_<optab>mult_plus<mode>): Ditto.
13942         (*sign_zero_extend_fma): Ditto.
13943         (*zero_sign_extend_fma): Ditto.
13944         * config/riscv/riscv-protos.h (enum insn_type): New enum.
13945
13946 2023-06-06  Kwok Cheung Yeung  <kcy@codesourcery.com>
13947             Tobias Burnus  <tobias@codesourcery.com>
13948
13949         * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
13950         and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
13951         set.
13952         (omp_get_attachment): Handle map clauses with 'present' modifier.
13953         (omp_group_base): Likewise.
13954         (gimplify_scan_omp_clauses): Reorder present maps to come first.
13955         Set GOVD flags for present defaultmaps.
13956         (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
13957         * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
13958         clauses.
13959         (lower_omp_target): Handle map clauses with 'present' modifier.
13960         Handle 'to' and 'from' clauses with 'present'.
13961         * tree-core.h (enum omp_clause_defaultmap_kind): Add
13962         OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
13963         * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
13964         'from' clauses with 'present' modifier.  Handle present defaultmap.
13965         * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
13966
13967 2023-06-06  Segher Boessenkool  <segher@kernel.crashing.org>
13968
13969         * config/rs6000/genfusion.pl: Delete some dead code.
13970
13971 2023-06-06  Segher Boessenkool  <segher@kernel.crashing.org>
13972
13973         * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
13974         split out from...
13975         (gen_ld_cmpi_p10): ... this.
13976
13977 2023-06-06  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
13978
13979         PR target/106907
13980         * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
13981         duplicate expression.
13982
13983 2023-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
13984
13985         * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
13986         Handle unsigned reduc_plus_scal_ builtins.
13987         * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
13988         * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
13989         * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
13990         __builtin_aarch64_reduc_plus_scal_v2di.
13991         (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
13992
13993 2023-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
13994
13995         * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
13996         (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
13997         (aarch64_<sra_op>rshr_n<mode>): New define_expand.
13998
13999 2023-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
14000
14001         * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
14002         (aarch64_shrn<mode>_insn_be): Delete.
14003         (*aarch64_<srn_op>shrn<mode>_vect):  Rename to...
14004         (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
14005         (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
14006         (aarch64_rshrn<mode>_insn_le): Delete.
14007         (aarch64_rshrn<mode>_insn_be): Delete.
14008         (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
14009         (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
14010
14011 2023-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
14012
14013         * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
14014         Define prototype.
14015         (aarch64_pars_overlap_p): Likewise.
14016         * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
14017         Express in terms of UNSPEC_ADDV.
14018         (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
14019         (*aarch64_<su>addlv<mode>_reduction): Define.
14020         (*aarch64_uaddlv<mode>_reduction_2): Likewise.
14021         * config/aarch64/aarch64.cc     (aarch64_parallel_select_half_p): Define.
14022         (aarch64_pars_overlap_p): Likewise.
14023         * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
14024         (VQUADW): New mode attribute.
14025         (VWIDE2X_S): Likewise.
14026         (USADDLV): Delete.
14027         (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
14028         * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
14029
14030 2023-06-06  Richard Biener  <rguenther@suse.de>
14031
14032         PR middle-end/110055
14033         * gimplify.cc (gimplify_target_expr): Do not emit
14034         CLOBBERs for variables which have static storage duration
14035         after gimplifying their initializers.
14036
14037 2023-06-06  Richard Biener  <rguenther@suse.de>
14038
14039         PR tree-optimization/109143
14040         * tree-ssa-structalias.cc (solution_set_expand): Avoid
14041         one bitmap iteration and optimize bit range setting.
14042
14043 2023-06-06  Hans-Peter Nilsson  <hp@axis.com>
14044
14045         PR bootstrap/110120
14046         * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
14047         XVECEXP, not XEXP, to access first item of a PARALLEL.
14048
14049 2023-06-06  Pan Li  <pan2.li@intel.com>
14050
14051         * config/riscv/riscv-vector-builtins-types.def
14052         (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
14053         (vfloat16mf2_t): Likewise.
14054         (vfloat16m1_t): Likewise.
14055         (vfloat16m2_t): Likewise.
14056         (vfloat16m4_t): Likewise.
14057         (vfloat16m8_t): Likewise.
14058         * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
14059         VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
14060
14061 2023-06-06  Fei Gao  <gaofei@eswincomputing.com>
14062
14063         * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
14064         for cfi reg/mem machmode
14065         (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
14066
14067 2023-06-06  Li Xu  <xuli1@eswincomputing.com>
14068
14069         * config/riscv/vector-iterators.md:
14070         Fix 'REQUIREMENT' for machine_mode 'MODE'.
14071         * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
14072         <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
14073         (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
14074
14075 2023-06-06  Pan Li  <pan2.li@intel.com>
14076
14077         * config/riscv/vector-iterators.md: Fix typo in mode attr.
14078
14079 2023-06-05  Andre Vieira  <andre.simoesdiasvieira@arm.com>
14080             Joel Hutton  <joel.hutton@arm.com>
14081
14082         * doc/generic.texi: Remove old tree codes.
14083         * expr.cc (expand_expr_real_2): Remove old tree code cases.
14084         * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
14085         * optabs-tree.cc (optab_for_tree_code): Likewise.
14086         (supportable_half_widening_operation): Likewise.
14087         * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
14088         * tree-inline.cc (estimate_operator_cost): Likewise.
14089         (op_symbol_code): Likewise.
14090         * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
14091         (vect_analyze_data_ref_accesses): Likewise.
14092         * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
14093         * cfgexpand.cc (expand_debug_expr): Likewise.
14094         * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
14095         (supportable_widening_operation): Likewise.
14096         * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
14097         Likewise.
14098         * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
14099         vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
14100         vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
14101         vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
14102         * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
14103         * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
14104         VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
14105         VEC_WIDEN_MINUS_LO_EXPR): Likewise.
14106
14107 2023-06-05  Andre Vieira  <andre.simoesdiasvieira@arm.com>
14108             Joel Hutton  <joel.hutton@arm.com>
14109             Tamar Christina  <tamar.christina@arm.com>
14110
14111         * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
14112         this ...
14113         (vec_widen_<su>add_lo_<mode>): ... to this.
14114         (vec_widen_<su>addl_hi_<mode>): Rename this ...
14115         (vec_widen_<su>add_hi_<mode>): ... to this.
14116         (vec_widen_<su>subl_lo_<mode>): Rename this ...
14117         (vec_widen_<su>sub_lo_<mode>): ... to this.
14118         (vec_widen_<su>subl_hi_<mode>): Rename this ...
14119         (vec_widen_<su>sub_hi_<mode>): ...to this.
14120         * doc/generic.texi: Document new IFN codes.
14121         * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
14122         (commutative_binary_fn_p): Add widen_plus fn's.
14123         (widening_fn_p): New function.
14124         (narrowing_fn_p): New function.
14125         (direct_internal_fn_optab): Change visibility.
14126         * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
14127         internal_fn that expands into multiple internal_fns for widening.
14128         (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
14129         IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
14130         IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
14131         IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
14132         IFN_VEC_WIDEN_MINUS_EVEN): Define widening  plus,minus functions.
14133         * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
14134         (lookup_hilo_internal_fn): Likewise.
14135         (widening_fn_p): Likewise.
14136         (Narrowing_fn_p): Likewise.
14137         * optabs.cc (commutative_optab_p): Add widening plus optabs.
14138         * optabs.def (OPTAB_D): Define widen add, sub optabs.
14139         * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
14140         patterns with a hi/lo or even/odd split.
14141         (vect_recog_sad_pattern): Refactor to use new IFN codes.
14142         (vect_recog_widen_plus_pattern): Likewise.
14143         (vect_recog_widen_minus_pattern): Likewise.
14144         (vect_recog_average_pattern): Likewise.
14145         * tree-vect-stmts.cc (vectorizable_conversion): Add support for
14146         _HILO IFNs.
14147         (supportable_widening_operation): Likewise.
14148         * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
14149
14150 2023-06-05  Andre Vieira  <andre.simoesdiasvieira@arm.com>
14151             Joel Hutton  <joel.hutton@arm.com>
14152
14153         * tree-vect-patterns.cc: Add include for gimple-iterator.
14154         (vect_recog_widen_op_pattern): Refactor to use code_helper.
14155         (vect_gimple_build): New function.
14156         * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
14157         code_helper.
14158         (vectorizable_call): Likewise.
14159         (vect_gen_widened_results_half): Likewise.
14160         (vect_create_vectorized_demotion_stmts): Likewise.
14161         (vect_create_vectorized_promotion_stmts): Likewise.
14162         (vect_create_half_widening_stmts): Likewise.
14163         (vectorizable_conversion): Likewise.
14164         (supportable_widening_operation): Likewise.
14165         (supportable_narrowing_operation): Likewise.
14166         * tree-vectorizer.h (supportable_widening_operation): Change
14167         prototype to use code_helper.
14168         (supportable_narrowing_operation): Likewise.
14169         (vect_gimple_build): New function prototype.
14170         * tree.h (code_helper::safe_as_tree_code): New function.
14171         (code_helper::safe_as_fn_code): New function.
14172
14173 2023-06-05  Roger Sayle  <roger@nextmovesoftware.com>
14174
14175         * wide-int.cc (wi::bitreverse_large): New function implementing
14176         bit reversal of an integer.
14177         * wide-int.h (wi::bitreverse): New (template) function prototype.
14178         (bitreverse_large): Prototype helper function/implementation.
14179         (wi::bitreverse): New template wrapper around bitreverse_large.
14180
14181 2023-06-05  Uros Bizjak  <ubizjak@gmail.com>
14182
14183         * rtl.h (print_rtl_single): Change return type from int to void.
14184         (print_rtl_single_with_indent): Ditto.
14185         * print-rtl.h (class rtx_writer): Ditto.  Change m_sawclose to bool.
14186         * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
14187         (rtx_writer::print_rtx_operand_code_0): Ditto.
14188         (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
14189         (rtx_writer::print_rtx_operand_code_i): Ditto.
14190         (rtx_writer::print_rtx_operand_code_u): Ditto.
14191         (rtx_writer::print_rtx_operand): Ditto.
14192         (rtx_writer::print_rtx): Ditto.
14193         (rtx_writer::finish_directive): Ditto.
14194         (print_rtl_single): Change return type from int to void
14195         and adjust function body accordingly.
14196         (rtx_writer::print_rtl_single_with_indent): Ditto.
14197
14198 2023-06-05  Uros Bizjak  <ubizjak@gmail.com>
14199
14200         * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
14201         (reg_class_subset_p): Ditto.
14202         * reginfo.cc (reg_classes_intersect_p): Ditto.
14203         (reg_class_subset_p): Ditto.
14204
14205 2023-06-05  Pan Li  <pan2.li@intel.com>
14206
14207         * config/riscv/riscv-vector-builtins-types.def
14208         (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
14209         (vfloat32m1_t): Ditto.
14210         (vfloat32m2_t): Ditto.
14211         (vfloat32m4_t): Ditto.
14212         (vfloat32m8_t): Ditto.
14213         (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
14214         (vint16mf2_t): Ditto.
14215         (vint16m1_t): Ditto.
14216         (vint16m2_t): Ditto.
14217         (vint16m4_t): Ditto.
14218         (vint16m8_t): Ditto.
14219         (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
14220         (vuint16mf2_t): Ditto.
14221         (vuint16m1_t): Ditto.
14222         (vuint16m2_t): Ditto.
14223         (vuint16m4_t): Ditto.
14224         (vuint16m8_t): Ditto.
14225         (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
14226         (vint32m1_t): Ditto.
14227         (vint32m2_t): Ditto.
14228         (vint32m4_t): Ditto.
14229         (vint32m8_t): Ditto.
14230         (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
14231         (vuint32m1_t): Ditto.
14232         (vuint32m2_t): Ditto.
14233         (vuint32m4_t): Ditto.
14234         (vuint32m8_t): Ditto.
14235         * config/riscv/vector-iterators.md: Add FP=16 support for V,
14236         VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
14237
14238 2023-06-05  Andrew Pinski  <apinski@marvell.com>
14239
14240         PR bootstrap/110085
14241         * Makefile.in (clean): Remove the removing of
14242         MULTILIB_DIR/MULTILIB_OPTIONS directories.
14243
14244 2023-06-05  YunQiang Su  <yunqiang.su@cipunited.com>
14245
14246         * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
14247         prototype.
14248         * config/mips/mips.cc (speculation_barrier_libfunc): New static
14249         variable.
14250         (mips_init_libfuncs): Initialize it.
14251         (mips_emit_speculation_barrier): New function.
14252         * config/mips/mips.md (speculation_barrier): Call
14253         mips_emit_speculation_barrier.
14254
14255 2023-06-05  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14256
14257         * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
14258         (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
14259         (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
14260         (rvv_builder::get_merged_repeating_sequence): Ditto.
14261         (rvv_builder::get_merge_scalar_mask): Ditto.
14262         (emit_scalar_move_insn): Ditto.
14263         (emit_vlmax_integer_move_insn): Ditto.
14264         (emit_nonvlmax_integer_move_insn): Ditto.
14265         (emit_vlmax_gather_insn): Ditto.
14266         (emit_vlmax_masked_gather_mu_insn): Ditto.
14267         (get_repeating_sequence_dup_machine_mode): Ditto.
14268
14269 2023-06-05  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14270
14271         * config/riscv/autovec.md: Split arguments.
14272         * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
14273         * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
14274
14275 2023-06-04  Andrew Pinski  <apinski@marvell.com>
14276
14277         * expr.cc (do_store_flag): Improve for single bit testing
14278         not against zero but against that single bit.
14279
14280 2023-06-04  Andrew Pinski  <apinski@marvell.com>
14281
14282         * expr.cc (do_store_flag): Extend the one bit checking case
14283         to handle the case where we don't have an and but rather still
14284         one bit is known to be non-zero.
14285
14286 2023-06-04  Jeff Law  <jlaw@ventanamicro.com>
14287
14288         * config/h8300/constraints.md (Zz): Make this a normal
14289         constraint.
14290         * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
14291         * config/h8300/logical.md (H8/SX bit patterns): Remove.
14292
14293 2023-06-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
14294
14295         * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
14296         New insn_and_split patterns.
14297
14298 2023-06-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14299
14300         PR target/110109
14301         * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
14302         * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
14303         (@vlmul_extx4<mode>): Ditto.
14304         (@vlmul_extx8<mode>): Ditto.
14305         (@vlmul_extx16<mode>): Ditto.
14306         (@vlmul_extx32<mode>): Ditto.
14307         (@vlmul_extx64<mode>): Ditto.
14308         (*vlmul_extx2<mode>): Ditto.
14309         (*vlmul_extx4<mode>): Ditto.
14310         (*vlmul_extx8<mode>): Ditto.
14311         (*vlmul_extx16<mode>): Ditto.
14312         (*vlmul_extx32<mode>): Ditto.
14313         (*vlmul_extx64<mode>): Ditto.
14314
14315 2023-06-04  Pan Li  <pan2.li@intel.com>
14316
14317         * config/riscv/riscv-vector-builtins-types.def
14318         (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
14319         (vfloat32m1_t): Likewise.
14320         (vfloat32m2_t): Likewise.
14321         (vfloat32m4_t): Likewise.
14322         (vfloat32m8_t): Likewise.
14323         * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
14324         * config/riscv/vector-iterators.md: Add single to half machine
14325         mode conversion.
14326
14327 2023-06-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14328
14329         * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
14330         (*n<optab><mode>): Ditto.
14331         * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
14332         (*n<optab><mode>): Ditto.
14333         * config/riscv/vector.md: Ditto.
14334
14335 2023-06-04  Roger Sayle  <roger@nextmovesoftware.com>
14336
14337         PR target/110083
14338         * config/i386/i386-features.cc (scalar_chain::convert_compare):
14339         Update or delete REG_EQUAL notes, converting CONST_INT and
14340         CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
14341
14342 2023-06-04  Jason Merrill  <jason@redhat.com>
14343
14344         PR c++/97720
14345         * tree-eh.cc (lower_resx): Pass the exception pointer to the
14346         failure_decl.
14347         * except.h: Tweak comment.
14348
14349 2023-06-04  Hans-Peter Nilsson  <hp@axis.com>
14350
14351         * postreload.cc (move2add_use_add2_insn): Handle
14352         trivial single_sets.  Rename variable PAT to SET.
14353         (move2add_use_add3_insn, reload_cse_move2add): Similar.
14354
14355 2023-06-04  Pan Li  <pan2.li@intel.com>
14356
14357         * config/riscv/riscv-vector-builtins-types.def
14358         (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
14359         (vfloat16mf2_t): Likewise.
14360         (vfloat16m1_t): Likewise.
14361         (vfloat16m2_t): Likewise.
14362         (vfloat16m4_t): Likewise.
14363         (vfloat16m8_t): Likewise.
14364         * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
14365         * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
14366         to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
14367         * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
14368         vlmul and ratio.
14369
14370 2023-06-03  Fei Gao  <gaofei@eswincomputing.com>
14371
14372         * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
14373         correct offset.
14374
14375 2023-06-03  Die Li  <lidie@eswincomputing.com>
14376
14377         * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
14378
14379 2023-06-03  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14380
14381         * config/riscv/predicates.md: Change INTVAL into UINTVAL.
14382
14383 2023-06-03  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14384
14385         * config/riscv/vector.md: Add vector-opt.md.
14386         * config/riscv/autovec-opt.md: New file.
14387
14388 2023-06-03  liuhongt  <hongtao.liu@intel.com>
14389
14390         PR tree-optimization/110067
14391         * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
14392         bswap + rotate when TYPE_PRECISION(n->type) > n->range.
14393
14394 2023-06-03  liuhongt  <hongtao.liu@intel.com>
14395
14396         PR target/92658
14397         * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
14398         (truncv2si<mode>2): Ditto.
14399
14400 2023-06-02  Andrew Pinski  <apinski@marvell.com>
14401
14402         PR rtl-optimization/102733
14403         * dse.cc (store_info): Add addrspace field.
14404         (record_store): Record the address space
14405         and check to make sure they are the same.
14406
14407 2023-06-02  Andrew Pinski  <apinski@marvell.com>
14408
14409         PR rtl-optimization/110042
14410         * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
14411         (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
14412
14413 2023-06-02  Iain Sandoe  <iain@sandoe.co.uk>
14414
14415         PR target/110044
14416         * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
14417         Make sure that we do not have a cap on field alignment before altering
14418         the struct layout based on the type alignment of the first entry.
14419
14420 2023-06-02  David Faust  <david.faust@oracle.com>
14421
14422         PR debug/110073
14423         * btfout.cc (btf_absolute_func_id): New function.
14424         (btf_asm_func_type): Call it here.  Change index parameter from
14425         size_t to ctf_id_t.  Use PRIu64 formatter.
14426
14427 2023-06-02  Alex Coplan  <alex.coplan@arm.com>
14428
14429         * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
14430         (btf_asm_datasec_type): Likewise.
14431
14432 2023-06-02  Carl Love  <cel@us.ibm.com>
14433
14434         * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
14435         __builtin_altivec_tr_stxvrwx): Fix type of third argument.
14436
14437 2023-06-02  Jason Merrill  <jason@redhat.com>
14438
14439         PR c++/110070
14440         PR c++/105838
14441         * tree.h (DECL_MERGEABLE): New.
14442         * tree-core.h (struct tree_decl_common): Mention it.
14443         * gimplify.cc (gimplify_init_constructor): Check it.
14444         * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
14445         * varasm.cc (categorize_decl_for_section): Likewise.
14446
14447 2023-06-02  Uros Bizjak  <ubizjak@gmail.com>
14448
14449         * rtl.h (stack_regs_mentioned): Change return type from int to bool.
14450         * reg-stack.cc (struct_block_info_def): Change "done" to bool.
14451         (stack_regs_mentioned_p): Change return type from int to bool
14452         and adjust function body accordingly.
14453         (stack_regs_mentioned): Ditto.
14454         (check_asm_stack_operands): Ditto.  Change "malformed_asm"
14455         variable to bool.
14456         (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
14457         (swap_rtx_condition_1): Change return type from int to bool
14458         and adjust function body accordingly.  Change "r" variable to bool.
14459         (swap_rtx_condition): Change return type from int to bool
14460         and adjust function body accordingly.
14461         (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
14462         (subst_stack_regs): Ditto.
14463         (convert_regs_entry): Change return type from int to bool and adjust
14464         function body accordingly.  Change "inserted" variable to bool.
14465         (convert_regs_1): Recode handling of control_flow_insn_deleted.
14466         (convert_regs_2): Recode handling of cfg_altered.
14467         (convert_regs): Ditto.  Change "inserted" variable to bool.
14468
14469 2023-06-02  Jason Merrill  <jason@redhat.com>
14470
14471         PR c++/95226
14472         * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
14473         (initializer_constant_valid_p_1): Compare float precision.
14474
14475 2023-06-02  Alexander Monakov  <amonakov@ispras.ru>
14476
14477         * doc/extend.texi (Vector Extensions): Clarify bitwise shift
14478         semantics.
14479
14480 2023-06-02  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
14481
14482         * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
14483         (vect_set_loop_condition_partial_vectors): Ditto.
14484
14485 2023-06-02  Georg-Johann Lay  <avr@gjlay.de>
14486
14487         PR target/110088
14488         * config/avr/avr.md: Add an RTL peephole to optimize operations on
14489         non-LD_REGS after a move from LD_REGS.
14490         (piaop): New code iterator.
14491
14492 2023-06-02  Thomas Schwinge  <thomas@codesourcery.com>
14493
14494         PR testsuite/66005
14495         * doc/install.texi: Document (optional) Perl usage for parallel
14496         testing of libgomp.
14497
14498 2023-06-02  Thomas Schwinge  <thomas@codesourcery.com>
14499
14500         PR bootstrap/82856
14501         * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
14502         later)".
14503
14504 2023-06-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14505             KuanLin Chen  <best124612@gmail.com>
14506
14507         * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
14508         * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
14509
14510 2023-06-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14511
14512         * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
14513
14514 2023-06-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14515
14516         * config/riscv/predicates.md: Change INTVAL into UINTVAL.
14517
14518 2023-06-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14519
14520         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
14521         __RISCV_ prefix.
14522         (DEF_RVV_FRM_ENUM): Ditto.
14523
14524 2023-06-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14525
14526         * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
14527         intrinsic API expander
14528         * config/riscv/vector.md
14529         (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
14530         (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
14531         (@pred_single_widen_add<any_extend:su><mode>): New pattern.
14532
14533 2023-06-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14534
14535         * config/riscv/autovec.md (vec_perm<mode>): New pattern.
14536         * config/riscv/predicates.md (vector_perm_operand): New predicate.
14537         * config/riscv/riscv-protos.h (enum insn_type): New enum.
14538         (expand_vec_perm): New function.
14539         * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
14540         (gen_const_vector_dup): Ditto.
14541         (emit_vlmax_gather_insn): Ditto.
14542         (emit_vlmax_masked_gather_mu_insn): Ditto.
14543         (expand_vec_perm): Ditto.
14544
14545 2023-06-01  Jason Merrill  <jason@redhat.com>
14546
14547         * doc/invoke.texi (-Wpedantic): Improve clarity.
14548
14549 2023-06-01  Uros Bizjak  <ubizjak@gmail.com>
14550
14551         * rtl.h (exp_equiv_p): Change return type from int to bool.
14552         * cse.cc (mention_regs): Change return type from int to bool
14553         and adjust function body accordingly.
14554         (exp_equiv_p): Ditto.
14555         (insert_regs): Ditto. Change "modified" function argument to bool
14556         and update usage accordingly.
14557         (record_jump_cond): Remove always zero "reversed_nonequality"
14558         function argument and update usage accordingly.
14559         (fold_rtx): Change "changed" variable to bool.
14560         (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
14561         (is_dead_reg): Change return type from int to bool.
14562
14563 2023-06-01  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
14564
14565         * config/xtensa/xtensa.md (adddi3, subdi3):
14566         New RTL generation patterns implemented according to the instruc-
14567         tion idioms described in the Xtensa ISA reference manual (p. 600).
14568
14569 2023-06-01  Roger Sayle  <roger@nextmovesoftware.com>
14570             Uros Bizjak  <ubizjak@gmail.com>
14571
14572         PR target/109973
14573         * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
14574         CODE_for_sse4_1_ptestzv2di.
14575         (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
14576         (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
14577         (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
14578         * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
14579         when expanding UNSPEC_PTEST to compare against zero.
14580         * config/i386/i386-features.cc (scalar_chain::convert_compare):
14581         Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
14582         (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
14583         (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
14584         * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
14585         * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
14586         check for suitable matching modes for the UNSPEC_PTEST pattern.
14587         * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
14588         to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
14589         (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn.  Remove
14590         ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
14591         (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
14592         (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
14593         (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
14594         current behavior.
14595         (*ptest<mode>_and): Specify CCZ to only perform this optimization
14596         when only the Z flag is required.
14597
14598 2023-06-01  Jonathan Wakely  <jwakely@redhat.com>
14599
14600         PR target/109954
14601         * doc/invoke.texi (x86 Options): Fix description of -m32 option.
14602
14603 2023-06-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
14604
14605         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
14606         Add =r,m and =r,m alternatives.
14607         (load_pair<DREG:mode><DREG2:mode>): Likewise.
14608         (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
14609
14610 2023-06-01  Pan Li  <pan2.li@intel.com>
14611
14612         * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
14613         and zvfh.
14614         * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
14615         (main): Disable FP16 tuple.
14616         * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
14617         (TARGET_VECTOR_ELEN_FP_16): Ditto.
14618         * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
14619         Add FP16.
14620         * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
14621         (vfloat16mf2_t): Ditto.
14622         (vfloat16m1_t): Ditto.
14623         (vfloat16m2_t): Ditto.
14624         (vfloat16m4_t): Ditto.
14625         (vfloat16m8_t): Ditto.
14626         * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
14627         New macro.
14628         * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
14629         machine mode based on TARGET_VECTOR_ELEN_FP_16.
14630
14631 2023-06-01  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14632
14633         * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
14634         (DEF_RVV_FRM_ENUM): New macro.
14635         (handle_pragma_vector): Add FRM enum
14636         * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
14637         (RNE): Ditto.
14638         (RTZ): Ditto.
14639         (RDN): Ditto.
14640         (RUP): Ditto.
14641         (RMM): Ditto.
14642
14643 2023-05-31  Roger Sayle  <roger@nextmovesoftware.com>
14644             Richard Sandiford  <richard.sandiford@arm.com>
14645
14646         * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
14647         Update call to wi::bswap.
14648         * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
14649         Update call to wi::bswap.
14650         * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
14651         Update calls to wi::bswap.
14652         * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
14653         (wi::bswap_large): New function, with revised API.
14654         * wide-int.h (wi::bswap): New (template) function prototype.
14655         (wide_int_storage::bswap): Remove method.
14656         (sext_large, zext_large): Consistent indentation/line wrapping.
14657         (bswap_large): Prototype helper function containing implementation.
14658         (wi::bswap): New template wrapper around bswap_large.
14659
14660 2023-05-31  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
14661
14662         PR target/99195
14663         * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
14664         (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
14665         (usdot_prod<vsi2qi>): Rename to...
14666         (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
14667         (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
14668         (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
14669         (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
14670         (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
14671         (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
14672         (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
14673         ... This.
14674
14675 2023-05-31  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
14676
14677         PR target/99195
14678         * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
14679         (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
14680         (aarch64_sq<r>dmulh_n<mode>): Rename to...
14681         (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
14682         (aarch64_sq<r>dmulh_lane<mode>): Rename to...
14683         (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
14684         (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
14685         (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
14686         (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
14687         (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
14688         (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
14689         (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
14690         (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
14691         (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
14692
14693 2023-05-31  David Faust  <david.faust@oracle.com>
14694
14695         * btfout.cc (btf_kind_names): New.
14696         (btf_kind_name): New.
14697         (btf_absolute_var_id): New utility function.
14698         (btf_relative_var_id): Likewise.
14699         (btf_relative_func_id): Likewise.
14700         (btf_absolute_datasec_id): Likewise.
14701         (btf_asm_type_ref): New.
14702         (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
14703         (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
14704         (btf_asm_varent): Likewise.
14705         (btf_asm_func_arg): Likewise.
14706         (btf_asm_datasec_entry): Likewise.
14707         (btf_asm_datasec_type): Likewise.
14708         (btf_asm_func_type): Likewise. Add index parameter.
14709         (btf_asm_enum_const): Likewise.
14710         (btf_asm_sou_member): Likewise.
14711         (output_btf_vars): Update btf_asm_* call accordingly.
14712         (output_asm_btf_sou_fields): Likewise.
14713         (output_asm_btf_enum_list): Likewise.
14714         (output_asm_btf_func_args_list): Likewise.
14715         (output_asm_btf_vlen_bytes): Likewise.
14716         (output_btf_func_types): Add ctf_container_ref parameter.
14717         Pass it to btf_asm_func_type.
14718         (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
14719         (btf_output): Update output_btf_func_types call similarly.
14720
14721 2023-05-31  David Faust  <david.faust@oracle.com>
14722
14723         * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
14724         and BTF_KIND_FWD which do not use the size/type field at all.
14725
14726 2023-05-31  Uros Bizjak  <ubizjak@gmail.com>
14727
14728         * rtl.h (subreg_lowpart_p): Change return type from int to bool.
14729         (active_insn_p): Ditto.
14730         (in_sequence_p): Ditto.
14731         (unshare_all_rtl): Change return type from int to void.
14732         * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
14733         * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
14734         and adjust function body accordingly.
14735         (mem_expr_equal_p): Ditto.
14736         (unshare_all_rtl): Change return type from int to void
14737         and adjust function body accordingly.
14738         (verify_rtx_sharing): Remove unneeded return.
14739         (active_insn_p): Change return type from int to bool
14740         and adjust function body accordingly.
14741         (in_sequence_p): Ditto.
14742
14743 2023-05-31  Uros Bizjak  <ubizjak@gmail.com>
14744
14745         * rtl.h (true_dependence): Change return type from int to bool.
14746         (canon_true_dependence): Ditto.
14747         (read_dependence): Ditto.
14748         (anti_dependence): Ditto.
14749         (canon_anti_dependence): Ditto.
14750         (output_dependence): Ditto.
14751         (canon_output_dependence): Ditto.
14752         (may_alias_p): Ditto.
14753         * alias.h (alias_sets_conflict_p): Ditto.
14754         (alias_sets_must_conflict_p): Ditto.
14755         (objects_must_conflict_p): Ditto.
14756         (nonoverlapping_memrefs_p): Ditto.
14757         * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
14758         (record_set): Ditto.
14759         (base_alias_check): Ditto.
14760         (find_base_value): Ditto.
14761         (mems_in_disjoint_alias_sets_p): Ditto.
14762         (get_alias_set_entry): Ditto.
14763         (decl_for_component_ref): Ditto.
14764         (write_dependence_p): Ditto.
14765         (memory_modified_1): Ditto.
14766         (mems_in_disjoint_alias_set_p): Change return type from int to bool
14767         and adjust function body accordingly.
14768         (alias_sets_conflict_p): Ditto.
14769         (alias_sets_must_conflict_p): Ditto.
14770         (objects_must_conflict_p): Ditto.
14771         (rtx_equal_for_memref_p): Ditto.
14772         (base_alias_check): Ditto.
14773         (read_dependence): Ditto.
14774         (nonoverlapping_memrefs_p): Ditto.
14775         (true_dependence_1): Ditto.
14776         (true_dependence): Ditto.
14777         (canon_true_dependence): Ditto.
14778         (write_dependence_p): Ditto.
14779         (anti_dependence): Ditto.
14780         (canon_anti_dependence): Ditto.
14781         (output_dependence): Ditto.
14782         (canon_output_dependence): Ditto.
14783         (may_alias_p): Ditto.
14784         (init_alias_analysis): Change "changed" variable to bool.
14785
14786 2023-05-31  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14787
14788         * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
14789         expand into define_insn_and_split.
14790
14791 2023-05-31  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14792
14793         * config/riscv/vector.md: Remove FRM.
14794
14795 2023-05-31  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14796
14797         * config/riscv/vector.md: Remove FRM.
14798
14799 2023-05-31  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
14800
14801         * config/riscv/vector.md: Remove FRM.
14802
14803 2023-05-31  Christophe Lyon  <christophe.lyon@linaro.org>
14804
14805         PR target/110039
14806         * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
14807         pattern.
14808
14809 2023-05-31  Richard Biener  <rguenther@suse.de>
14810
14811         PR ipa/109983
14812         PR tree-optimization/109143
14813         * tree-ssa-structalias.cc (struct topo_info): Remove.
14814         (init_topo_info): Likewise.
14815         (free_topo_info): Likewise.
14816         (compute_topo_order): Simplify API, put the component
14817         with ESCAPED last so it's processed first.
14818         (topo_visit): Adjust.
14819         (solve_graph): Likewise.
14820
14821 2023-05-31  Richard Biener  <rguenther@suse.de>
14822
14823         * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
14824         New.
14825         (add_graph_edge): Count redundant edges we avoid to create.
14826         (dump_sa_stats): Dump them.
14827         (ipa_pta_execute): Do not dump generating constraints when
14828         we are not dumping them.
14829
14830 2023-05-31  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
14831
14832         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
14833         output template to avoid explicit switch on which_alternative.
14834         (*aarch64_simd_mov<VQMOV:mode>): Likewise.
14835         (and<mode>3): Likewise.
14836         (ior<mode>3): Likewise.
14837         * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
14838
14839 2023-05-31  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
14840
14841         * config/xtensa/predicates.md (xtensa_bit_join_operator):
14842         New predicate.
14843         * config/xtensa/xtensa.md (ior_op): Remove.
14844         (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
14845         insn_and_split pattern of the same name to express and capture
14846         the bit-combining operation with both sides swapped.
14847         In addition, replace use of code iterator with new operator
14848         predicate.
14849         (*shlrd_const, *shlrd_per_byte):
14850         Likewise regarding the code iterator.
14851
14852 2023-05-31  Cui, Lili  <lili.cui@intel.com>
14853
14854         PR tree-optimization/110038
14855         * params.opt: Add a limit on tree-reassoc-width.
14856         * tree-ssa-reassoc.cc
14857         (rewrite_expr_tree_parallel): Add width limit.
14858
14859 2023-05-31  Pan Li  <pan2.li@intel.com>
14860
14861         * common/config/riscv/riscv-common.cc:
14862         (riscv_implied_info): Add zvfh item.
14863         (riscv_ext_version_table): Ditto.
14864         (riscv_ext_flag_table): Ditto.
14865         * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
14866         (TARGET_ZVFH): Ditto.
14867
14868 2023-05-30  liuhongt  <hongtao.liu@intel.com>
14869
14870         PR tree-optimization/108804
14871         * tree-vect-patterns.cc (vect_get_range_info): Remove static.
14872         * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
14873         Add new parameter narrow_src_p.
14874         (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
14875         vectorization by truncating to lower precision.
14876         * tree-vectorizer.h (vect_get_range_info): New declare.
14877
14878 2023-05-30  Vladimir N. Makarov  <vmakarov@redhat.com>
14879
14880         * lra-int.h (lra_update_sp_offset): Add the prototype.
14881         * lra.cc (setup_sp_offset): Change the return type.  Use
14882         lra_update_sp_offset.
14883         * lra-eliminations.cc (lra_update_sp_offset): New function.
14884         (lra_process_new_insns): Push the current insn to reprocess if the
14885         input reload changes sp offset.
14886
14887 2023-05-30  Uros Bizjak  <ubizjak@gmail.com>
14888
14889         PR target/110041
14890         * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
14891         Fix misleading identation.
14892
14893 2023-05-30  Uros Bizjak  <ubizjak@gmail.com>
14894
14895         * rtl.h (comparison_dominates_p): Change return type from int to bool.
14896         (condjump_p): Ditto.
14897         (any_condjump_p): Ditto.
14898         (any_uncondjump_p): Ditto.
14899         (simplejump_p): Ditto.
14900         (returnjump_p): Ditto.
14901         (eh_returnjump_p): Ditto.
14902         (onlyjump_p): Ditto.
14903         (invert_jump_1): Ditto.
14904         (invert_jump): Ditto.
14905         (rtx_renumbered_equal_p): Ditto.
14906         (redirect_jump_1): Ditto.
14907         (redirect_jump): Ditto.
14908         (condjump_in_parallel_p): Ditto.
14909         * jump.cc (invert_exp_1): Adjust forward declaration.
14910         (comparison_dominates_p): Change return type from int to bool
14911         and adjust function body accordingly.
14912         (simplejump_p): Ditto.
14913         (condjump_p): Ditto.
14914         (condjump_in_parallel_p): Ditto.
14915         (any_uncondjump_p): Ditto.
14916         (any_condjump_p): Ditto.
14917         (returnjump_p): Ditto.
14918         (eh_returnjump_p): Ditto.
14919         (onlyjump_p): Ditto.
14920         (redirect_jump_1): Ditto.
14921         (redirect_jump): Ditto.
14922         (invert_exp_1): Ditto.
14923         (invert_jump_1): Ditto.
14924         (invert_jump): Ditto.
14925         (rtx_renumbered_equal_p): Ditto.
14926
14927 2023-05-30  Andrew Pinski  <apinski@marvell.com>
14928
14929         * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
14930         * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
14931         Add ne as a possible cmp.
14932         ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
14933
14934 2023-05-30  Andrew Pinski  <apinski@marvell.com>
14935
14936         * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
14937         pattern.
14938
14939 2023-05-30  Roger Sayle  <roger@nextmovesoftware.com>
14940
14941         * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
14942         instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
14943         (and (extend X) C) as (zero_extend (and X C)), to also optimize
14944         modes wider than HOST_WIDE_INT.
14945
14946 2023-05-30  Roger Sayle  <roger@nextmovesoftware.com>
14947
14948         PR target/107172
14949         * simplify-rtx.cc (simplify_const_relational_operation): Return
14950         early if we have a MODE_CC comparison that isn't a COMPARE against
14951         const0_rtx.
14952
14953 2023-05-30  Robin Dapp  <rdapp@ventanamicro.com>
14954
14955         * config/riscv/riscv.cc (riscv_const_insns): Allow
14956         const_vec_duplicates.
14957
14958 2023-05-30  liuhongt  <hongtao.liu@intel.com>
14959
14960         PR middle-end/108938
14961         * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
14962         function, cut from original find_bswap_or_nop function.
14963         (find_bswap_or_nop): Add a new parameter, detect bswap +
14964         rotate and save rotate result in the new parameter.
14965         (bswap_replace): Add a new parameter to indicate rotate and
14966         generate rotate stmt if needed.
14967         (maybe_optimize_vector_constructor): Adjust for new rotate
14968         parameter in the upper 2 functions.
14969         (pass_optimize_bswap::execute): Ditto.
14970         (imm_store_chain_info::output_merged_store): Ditto.
14971
14972 2023-05-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
14973
14974         * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
14975         (aarch64_<su>adalp<mode>): New define_expand.
14976         (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
14977         (aarch64_<su>addlp<mode>): Convert to define_expand.
14978         (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
14979         * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
14980         (ADALP): Likewise.
14981         (USADDLP): Likewise.
14982         * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
14983
14984 2023-05-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
14985
14986         * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
14987         aarch64-builtin-iterators.h.  Add definition to remap shadd, uhadd,
14988         srhadd, urhadd builtin codes for standard optab ones.
14989         * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
14990         (<su_optab>avg<mode>3_floor): ... This.  Expand to RTL codes rather than
14991         unspec.
14992         (<u>avg<mode>3_ceil): Rename to...
14993         (<su_optab>avg<mode>3_ceil): ... This.  Expand to RTL codes rather than
14994         unspec.
14995         (aarch64_<su>hsub<mode>): New define_expand.
14996         (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
14997         (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
14998         (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
14999
15000 2023-05-30  Andreas Schwab  <schwab@suse.de>
15001
15002         PR target/110036
15003         * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
15004         match libsanitizer.
15005
15006 2023-05-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
15007
15008         * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
15009         * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
15010         Declare prototype.
15011         (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
15012         * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
15013         (aarch64_<sra_op>sra_n<mode>_insn): ... This.
15014         (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
15015         (aarch64_<sra_op>sra_n<mode>): New define_expand.
15016         (aarch64_<sra_op>rsra_n<mode>): Likewise.
15017         (aarch64_<sur>sra_n<mode>): Rename to...
15018         (aarch64_<sur>sra_ndi): ... This.
15019         * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
15020         any_target_p argument.
15021         (aarch64_extract_vec_duplicate_wide_int): Define.
15022         (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
15023         (aarch64_const_vec_rnd_cst_p): Likewise.
15024         (aarch64_vector_mode_supported_any_target_p): Likewise.
15025         (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
15026         * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
15027         (VSRA): Adjust for the above.
15028         (sur): Likewise.
15029         (V2XWIDE): New mode_attr.
15030         (vec_or_offset): Likewise.
15031         (SHIFTEXTEND): Likewise.
15032         * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
15033         predicate.
15034         * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
15035         clarify that it applies to current target options.
15036         (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
15037         * doc/tm.texi.in: Regenerate.
15038         * stor-layout.cc (mode_for_vector): Check
15039         vector_mode_supported_any_target_p when iterating through vector modes.
15040         * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
15041         clarify that it applies to current target options.
15042         (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
15043
15044 2023-05-30  Lili Cui  <lili.cui@intel.com>
15045
15046         PR tree-optimization/98350
15047         * tree-ssa-reassoc.cc
15048         (rewrite_expr_tree_parallel): Rewrite this function.
15049         (rank_ops_for_fma): New.
15050         (reassociate_bb): Handle new function.
15051
15052 2023-05-30  Uros Bizjak  <ubizjak@gmail.com>
15053
15054         * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
15055         (rtx_unstable_p): Ditto.
15056         (reg_mentioned_p): Ditto.
15057         (reg_referenced_p): Ditto.
15058         (reg_used_between_p): Ditto.
15059         (reg_set_between_p): Ditto.
15060         (modified_between_p): Ditto.
15061         (no_labels_between_p): Ditto.
15062         (modified_in_p): Ditto.
15063         (reg_set_p): Ditto.
15064         (multiple_sets): Ditto.
15065         (set_noop_p): Ditto.
15066         (noop_move_p): Ditto.
15067         (reg_overlap_mentioned_p): Ditto.
15068         (dead_or_set_p): Ditto.
15069         (dead_or_set_regno_p): Ditto.
15070         (find_reg_fusage): Ditto.
15071         (find_regno_fusage): Ditto.
15072         (side_effects_p): Ditto.
15073         (volatile_refs_p): Ditto.
15074         (volatile_insn_p): Ditto.
15075         (may_trap_p_1): Ditto.
15076         (may_trap_p): Ditto.
15077         (may_trap_or_fault_p): Ditto.
15078         (computed_jump_p): Ditto.
15079         (auto_inc_p): Ditto.
15080         (loc_mentioned_in_p): Ditto.
15081         * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
15082         (rtx_unstable_p): Change return type from int to bool
15083         and adjust function body accordingly.
15084         (rtx_addr_can_trap_p): Ditto.
15085         (reg_mentioned_p): Ditto.
15086         (no_labels_between_p): Ditto.
15087         (reg_used_between_p): Ditto.
15088         (reg_referenced_p): Ditto.
15089         (reg_set_between_p): Ditto.
15090         (reg_set_p): Ditto.
15091         (modified_between_p): Ditto.
15092         (modified_in_p): Ditto.
15093         (multiple_sets): Ditto.
15094         (set_noop_p): Ditto.
15095         (noop_move_p): Ditto.
15096         (reg_overlap_mentioned_p): Ditto.
15097         (dead_or_set_p): Ditto.
15098         (dead_or_set_regno_p): Ditto.
15099         (find_reg_fusage): Ditto.
15100         (find_regno_fusage): Ditto.
15101         (remove_node_from_insn_list): Ditto.
15102         (volatile_insn_p): Ditto.
15103         (volatile_refs_p): Ditto.
15104         (side_effects_p): Ditto.
15105         (may_trap_p_1): Ditto.
15106         (may_trap_p): Ditto.
15107         (may_trap_or_fault_p): Ditto.
15108         (computed_jump_p): Ditto.
15109         (auto_inc_p): Ditto.
15110         (loc_mentioned_in_p): Ditto.
15111         * combine.cc (can_combine_p): Update indirect function.
15112
15113 2023-05-30  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15114
15115         * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
15116         * config/riscv/iterators.md: New attribute.
15117         * config/riscv/vector-iterators.md: New attribute.
15118
15119 2023-05-30  From: Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15120
15121         * config/riscv/riscv.md: Fix signed and unsigned comparison
15122         warning.
15123
15124 2023-05-30  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15125
15126         * config/riscv/autovec.md (fnma<mode>4): New pattern.
15127         (*fnma<mode>): Ditto.
15128
15129 2023-05-29  Die Li  <lidie@eswincomputing.com>
15130
15131         * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
15132         Delete.
15133         (riscv_expand_conditional_move):  Reuse the TARGET_SFB_ALU expand
15134         process for TARGET_XTHEADCONDMOV
15135
15136 2023-05-29  Uros Bizjak  <ubizjak@gmail.com>
15137
15138         PR target/110021
15139         * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
15140         TARGET_AVX512BW to generate truncv16hiv16qi2.
15141
15142 2023-05-29  Jivan Hakobyan  <jivanhakobyan9@gmail.com>
15143
15144         * config/riscv/riscv.md (and<mode>3): New expander.
15145         (*and<mode>3) New pattern.
15146         * config/riscv/predicates.md (arith_operand_or_mode_mask): New
15147         predicate.
15148
15149 2023-05-29  Pan Li  <pan2.li@intel.com>
15150
15151         * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
15152         comments and rename local variables.
15153         (emit_nonvlmax_insn): Diito.
15154         (emit_vlmax_merge_insn): Ditto.
15155         (emit_vlmax_cmp_insn): Ditto.
15156         (emit_vlmax_cmp_mu_insn): Ditto.
15157         (emit_scalar_move_insn): Ditto.
15158
15159 2023-05-29  Pan Li  <pan2.li@intel.com>
15160
15161         * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
15162         magic number.
15163         (emit_nonvlmax_insn): Ditto.
15164         (emit_vlmax_merge_insn): Ditto.
15165         (emit_vlmax_cmp_insn): Ditto.
15166         (emit_vlmax_cmp_mu_insn): Ditto.
15167         (expand_vec_series): Ditto.
15168
15169 2023-05-29  Pan Li  <pan2.li@intel.com>
15170
15171         * config/riscv/riscv-protos.h (enum insn_type): New type.
15172         * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
15173         (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
15174         class member.
15175         (rvv_builder::get_merged_repeating_sequence): Ditto.
15176         (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
15177         to evaluate the optimization cost.
15178         (rvv_builder::get_merge_scalar_mask): New function to get the merge
15179         mask.
15180         (emit_scalar_move_insn): New function to emit vmv.s.x.
15181         (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
15182         (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
15183         vmv.v.x.
15184         (get_repeating_sequence_dup_machine_mode): New function to get the dup
15185         machine mode.
15186         (expand_vector_init_merge_repeating_sequence): New function to perform
15187         the optimization.
15188         (expand_vec_init): Add this vector init optimization.
15189         * config/riscv/riscv.h (BITS_PER_WORD): New macro.
15190
15191 2023-05-29  Eric Botcazou  <ebotcazou@adacore.com>
15192
15193         * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
15194         put onto the increment when it is inserted after the position.
15195
15196 2023-05-29  Eric Botcazou  <ebotcazou@adacore.com>
15197
15198         * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
15199         on constants.
15200
15201 2023-05-29  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15202
15203         * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
15204
15205 2023-05-29  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15206
15207         * config/riscv/autovec.md (fma<mode>4): New pattern.
15208         (*fma<mode>): Ditto.
15209         * config/riscv/riscv-protos.h (enum insn_type): New enum.
15210         (emit_vlmax_ternary_insn): New function.
15211         * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
15212
15213 2023-05-29  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15214
15215         * config/riscv/vector.md: Fix vimuladd instruction bug.
15216
15217 2023-05-29  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15218
15219         * config/riscv/riscv.cc (global_state_unknown_p): New function.
15220         (riscv_mode_after): Fix incorrect VXM.
15221
15222 2023-05-29  Pan Li  <pan2.li@intel.com>
15223
15224         * common/config/riscv/riscv-common.cc:
15225         (riscv_implied_info): Add zvfhmin item.
15226         (riscv_ext_version_table): Ditto.
15227         (riscv_ext_flag_table): Ditto.
15228         * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
15229         (TARGET_ZFHMIN): Align indent.
15230         (TARGET_ZFH): Ditto.
15231         (TARGET_ZVFHMIN): New macro.
15232
15233 2023-05-27  liuhongt  <hongtao.liu@intel.com>
15234
15235         PR target/100711
15236         * config/i386/sse.md (*andnot<mode>3): Extend below splitter
15237         to VI_AVX2 to cover more modes.
15238
15239 2023-05-27  liuhongt  <hongtao.liu@intel.com>
15240
15241         * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
15242         Remove ATOM and ICELAKE(and later) core processors.
15243
15244 2023-05-26  Robin Dapp  <rdapp@ventanamicro.com>
15245
15246         * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
15247         (abs<mode>2): Add.
15248         * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
15249         Declare.
15250         * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
15251         function.
15252
15253 2023-05-26  Robin Dapp  <rdapp@ventanamicro.com>
15254             Juzhe Zhong  <juzhe.zhong@rivai.ai>
15255
15256         * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
15257         expander.
15258         (<optab><v_quad_trunc><mode>2): Dito.
15259         (<optab><v_oct_trunc><mode>2): Dito.
15260         (trunc<mode><v_double_trunc>2): Dito.
15261         (trunc<mode><v_quad_trunc>2): Dito.
15262         (trunc<mode><v_oct_trunc>2): Dito.
15263         * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
15264         (autovectorize_vector_modes): Define.
15265         * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
15266         hook.
15267         (autovectorize_vector_modes): Implement hook.
15268         * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
15269         Implement target hook.
15270         (riscv_vectorize_related_mode): Implement target hook.
15271         (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
15272         (TARGET_VECTORIZE_RELATED_MODE): Define.
15273         * config/riscv/vector-iterators.md: Add lowercase versions of
15274         mode_attr iterators.
15275
15276 2023-05-26  Andrew Stubbs  <ams@codesourcery.com>
15277             Tobias Burnus  <tobias@codesourcery.com>
15278
15279         * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
15280         (ASM_SPEC): Use XNACKOPT.
15281         * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
15282         (enum hsaco_attr_type): ... this, and generalize the names.
15283         (TARGET_XNACK): New macro.
15284         * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
15285         but -mxnack=off.
15286         (output_file_start): Update xnack handling.
15287         (gcn_hsa_declare_function_name): Use TARGET_XNACK.
15288         * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
15289         (sram_ecc_type): Rename to ...
15290         (hsaco_attr_type: ... this.)
15291         * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
15292         (TEST_XNACK): Delete.
15293         (TEST_XNACK_ANY): New macro.
15294         (TEST_XNACK_ON): New macro.
15295         (main): Support the new -mxnack=on/off/any syntax.
15296         * doc/invoke.texi (-mxnack): Update for new syntax.
15297
15298 2023-05-26  Andrew Pinski  <apinski@marvell.com>
15299
15300         * genmatch.cc (emit_debug_printf): New function.
15301         (dt_simplify::gen_1): Emit printf into the code
15302         before the `return true` or returning the folded result
15303         instead of emitting it always.
15304
15305 2023-05-26  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
15306
15307         * config/xtensa/xtensa-protos.h
15308         (xtensa_expand_block_set_unrolled_loop,
15309         xtensa_expand_block_set_small_loop): Remove.
15310         (xtensa_expand_block_set): New prototype.
15311         * config/xtensa/xtensa.cc
15312         (xtensa_expand_block_set_libcall): New subfunction.
15313         (xtensa_expand_block_set_unrolled_loop,
15314         xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
15315         (xtensa_expand_block_set): New function that calls the above
15316         subfunctions.
15317         * config/xtensa/xtensa.md (memsetsi): Change to invoke only
15318         xtensa_expand_block_set().
15319
15320 2023-05-26  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
15321
15322         * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
15323         New prototype.
15324         * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
15325         New function.
15326         * config/xtensa/constraints.md (O):
15327         Change to use the above function.
15328         * config/xtensa/xtensa.md (*subsi3_from_const):
15329         New insn_and_split pattern.
15330
15331 2023-05-26  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
15332
15333         * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
15334         Retract excessive line folding, and correct the value of
15335         the "length" insn attribute related to TARGET_DENSITY.
15336         (*extzvsi-1bit_addsubx): Ditto.
15337
15338 2023-05-26  Uros Bizjak  <ubizjak@gmail.com>
15339
15340         * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
15341         Do not disable call to ix86_expand_vecop_qihi2.
15342
15343 2023-05-26  liuhongt  <hongtao.liu@intel.com>
15344
15345         PR target/109610
15346         PR target/109858
15347         * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
15348         calculation when !hard_regno_mode_ok for GENERAL_REGS and
15349         mode, otherwise still use GENERAL_REGS.
15350
15351 2023-05-26  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15352
15353         * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
15354         explict VL and drop VL in ops.
15355
15356 2023-05-25  Jin Ma  <jinma@linux.alibaba.com>
15357
15358         * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
15359         in different BB blocks.
15360
15361 2023-05-25  Uros Bizjak  <ubizjak@gmail.com>
15362
15363         * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
15364         Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
15365         instructions when available.  Emulate truncation via
15366         ix86_expand_vec_perm_const_1 when native truncate insn
15367         is not available.
15368         (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
15369         when available.  Trivially rename some variables.
15370         (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
15371         * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
15372         calculation of V*QImode emulations to account for generation of
15373         2x-wider mode instructions.
15374         (ix86_shift_rotate_cost): Update cost calculation of V*QImode
15375         emulations to account for generation of 2x-wider mode instructions.
15376
15377 2023-05-25  Georg-Johann Lay  <avr@gjlay.de>
15378
15379         PR target/104327
15380         * config/avr/avr.cc (avr_can_inline_p): New static function.
15381         (TARGET_CAN_INLINE_P): Define to that function.
15382
15383 2023-05-25  Georg-Johann Lay  <avr@gjlay.de>
15384
15385         PR target/82931
15386         * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
15387         Handle any bit position and use mode QISI.
15388         * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
15389         of 2 insns for bit-transfer of respective style.
15390
15391 2023-05-25  Christophe Lyon  <christophe.lyon@linaro.org>
15392
15393         * config/arm/iterators.md (MVE_6): Remove.
15394         * config/arm/mve.md: Replace MVE_6 with MVE_5.
15395
15396 2023-05-25  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
15397             Richard Sandiford  <richard.sandiford@arm.com>
15398
15399         * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
15400         function.
15401         (vect_set_loop_controls_directly): Add decrement IV support.
15402         (vect_set_loop_condition_partial_vectors): Ditto.
15403         * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
15404         variable.
15405         * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
15406         macro.
15407
15408 2023-05-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
15409
15410         PR target/99195
15411         * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
15412         (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
15413         Fix canonicalization of PLUS operands.
15414         (aarch64_fcmla<rot><mode>): Rename to...
15415         (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
15416         Fix canonicalization of PLUS operands.
15417         (aarch64_fcmla_lane<rot><mode>): Rename to...
15418         (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
15419         Fix canonicalization of PLUS operands.
15420         (aarch64_fcmla_laneq<rot>v4hf): Rename to...
15421         (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
15422         Fix canonicalization of PLUS operands.
15423         (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
15424
15425 2023-05-25  Chris Sidebottom  <chris.sidebottom@arm.com>
15426
15427         * config/arm/arm.md (rbitsi2): Rename to...
15428         (arm_rbit): ... This.
15429         (ctzsi2): Adjust for the above.
15430         (arm_rev16si2): Convert to define_expand.
15431         (arm_rev16si2_alt1): New pattern.
15432         (arm_rev16si2_alt): Rename to...
15433         (*arm_rev16si2_alt2): ... This.
15434         * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
15435         __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
15436         __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
15437         * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
15438
15439 2023-05-25  Alex Coplan  <alex.coplan@arm.com>
15440
15441         PR target/109800
15442         * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
15443         instead of DFmode.
15444         * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
15445         lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
15446         DFmode as an rvalue.
15447
15448 2023-05-25  Richard Biener  <rguenther@suse.de>
15449
15450         PR target/109955
15451         * tree-vect-stmts.cc (vectorizable_condition): For
15452         embedded comparisons also handle the case when the target
15453         only provides vec_cmp and vcond_mask.
15454
15455 2023-05-25  Claudiu Zissulescu  <claziss@gmail.com>
15456
15457         * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
15458         TLS Local Dynamic.
15459
15460 2023-05-25  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
15461
15462         * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
15463         (seq_cost_ignoring_scalar_moves): Likewise.
15464         (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
15465
15466 2023-05-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
15467
15468         * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
15469         (vcage_f32): Likewise.
15470         (vcages_f32): Likewise.
15471         (vcageq_f32): Likewise.
15472         (vcaged_f64): Likewise.
15473         (vcageq_f64): Likewise.
15474         (vcagts_f32): Likewise.
15475         (vcagt_f32): Likewise.
15476         (vcagt_f64): Likewise.
15477         (vcagtq_f32): Likewise.
15478         (vcagtd_f64): Likewise.
15479         (vcagtq_f64): Likewise.
15480         (vcale_f32): Likewise.
15481         (vcale_f64): Likewise.
15482         (vcaled_f64): Likewise.
15483         (vcales_f32): Likewise.
15484         (vcaleq_f32): Likewise.
15485         (vcaleq_f64): Likewise.
15486         (vcalt_f32): Likewise.
15487         (vcalt_f64): Likewise.
15488         (vcaltd_f64): Likewise.
15489         (vcaltq_f32): Likewise.
15490         (vcaltq_f64): Likewise.
15491         (vcalts_f32): Likewise.
15492
15493 2023-05-25  Hu, Lin1  <lin1.hu@intel.com>
15494
15495         PR target/109173
15496         PR target/109174
15497         * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
15498         int to const int or const int to const unsigned int.
15499         (_mm512_mask_srli_epi16): Ditto.
15500         (_mm512_slli_epi16): Ditto.
15501         (_mm512_mask_slli_epi16): Ditto.
15502         (_mm512_maskz_slli_epi16): Ditto.
15503         (_mm512_srai_epi16): Ditto.
15504         (_mm512_mask_srai_epi16): Ditto.
15505         (_mm512_maskz_srai_epi16): Ditto.
15506         * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
15507         (_mm512_mask_slli_epi64): Ditto.
15508         (_mm512_maskz_slli_epi64): Ditto.
15509         (_mm512_srli_epi64): Ditto.
15510         (_mm512_mask_srli_epi64): Ditto.
15511         (_mm512_maskz_srli_epi64): Ditto.
15512         (_mm512_srai_epi64): Ditto.
15513         (_mm512_mask_srai_epi64): Ditto.
15514         (_mm512_maskz_srai_epi64): Ditto.
15515         (_mm512_slli_epi32): Ditto.
15516         (_mm512_mask_slli_epi32): Ditto.
15517         (_mm512_maskz_slli_epi32): Ditto.
15518         (_mm512_srli_epi32): Ditto.
15519         (_mm512_mask_srli_epi32): Ditto.
15520         (_mm512_maskz_srli_epi32): Ditto.
15521         (_mm512_srai_epi32): Ditto.
15522         (_mm512_mask_srai_epi32): Ditto.
15523         (_mm512_maskz_srai_epi32): Ditto.
15524         * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
15525         (_mm256_maskz_srai_epi16): Ditto.
15526         (_mm_mask_srai_epi16): Ditto.
15527         (_mm_maskz_srai_epi16): Ditto.
15528         (_mm256_mask_slli_epi16): Ditto.
15529         (_mm256_maskz_slli_epi16): Ditto.
15530         (_mm_mask_slli_epi16): Ditto.
15531         (_mm_maskz_slli_epi16): Ditto.
15532         (_mm_maskz_srli_epi16): Ditto.
15533         * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
15534         (_mm256_maskz_srli_epi32): Ditto.
15535         (_mm_mask_srli_epi32): Ditto.
15536         (_mm_maskz_srli_epi32): Ditto.
15537         (_mm256_mask_srli_epi64): Ditto.
15538         (_mm256_maskz_srli_epi64): Ditto.
15539         (_mm_mask_srli_epi64): Ditto.
15540         (_mm_maskz_srli_epi64): Ditto.
15541         (_mm256_mask_srai_epi32): Ditto.
15542         (_mm256_maskz_srai_epi32): Ditto.
15543         (_mm_mask_srai_epi32): Ditto.
15544         (_mm_maskz_srai_epi32): Ditto.
15545         (_mm256_srai_epi64): Ditto.
15546         (_mm256_mask_srai_epi64): Ditto.
15547         (_mm256_maskz_srai_epi64): Ditto.
15548         (_mm_srai_epi64): Ditto.
15549         (_mm_mask_srai_epi64): Ditto.
15550         (_mm_maskz_srai_epi64): Ditto.
15551         (_mm_mask_slli_epi32): Ditto.
15552         (_mm_maskz_slli_epi32): Ditto.
15553         (_mm_mask_slli_epi64): Ditto.
15554         (_mm_maskz_slli_epi64): Ditto.
15555         (_mm256_mask_slli_epi32): Ditto.
15556         (_mm256_maskz_slli_epi32): Ditto.
15557         (_mm256_mask_slli_epi64): Ditto.
15558         (_mm256_maskz_slli_epi64): Ditto.
15559
15560 2023-05-25  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15561
15562         * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
15563         instructions.
15564
15565 2023-05-25  Aldy Hernandez  <aldyh@redhat.com>
15566
15567         * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
15568         * data-streamer-out.cc (streamer_write_vrange): Same.
15569         * value-range.h (class vrange): Make streamer_write_vrange a friend.
15570
15571 2023-05-25  Aldy Hernandez  <aldyh@redhat.com>
15572
15573         * value-query.cc (range_query::get_tree_range): Set NAN directly
15574         if necessary.
15575         * value-range.cc (frange::set): Assert that bounds are not NAN.
15576
15577 2023-05-25  Aldy Hernandez  <aldyh@redhat.com>
15578
15579         * value-range.cc (add_vrange): Handle known NANs.
15580
15581 2023-05-25  Aldy Hernandez  <aldyh@redhat.com>
15582
15583         * value-range.h (frange::set_nan): New.
15584
15585 2023-05-25  Alexandre Oliva  <oliva@adacore.com>
15586
15587         PR target/100106
15588         * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
15589         requires stricter alignment than MEM's.
15590
15591 2023-05-24  Andrew MacLeod  <amacleod@redhat.com>
15592
15593         PR tree-optimization/107822
15594         PR tree-optimization/107986
15595         * Makefile.in (OBJS): Add gimple-range-phi.o.
15596         * gimple-range-cache.h (ranger_cache::m_estimate): New
15597         phi_analyzer pointer member.
15598         * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
15599         phi_analyzer if no loop info is available.
15600         * gimple-range-phi.cc: New file.
15601         * gimple-range-phi.h: New file.
15602         * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
15603
15604 2023-05-24  Andrew MacLeod  <amacleod@redhat.com>
15605
15606         * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
15607         to contructors.
15608         (fold_range): Add range_query parameter.
15609         (fur_relation::fur_relation): New.
15610         (fur_relation::trio): New.
15611         (fur_relation::register_relation): New.
15612         (fold_relations): New.
15613         * gimple-range-fold.h (fold_range): Adjust prototypes.
15614         (fold_relations): New.
15615
15616 2023-05-24  Andrew MacLeod  <amacleod@redhat.com>
15617
15618         * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
15619         * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
15620         (ranger_cache::const_query): New.
15621         * gimple-range.cc (gimple_ranger::const_query): New.
15622         * gimple-range.h (gimple_ranger::const_query): New prototype.
15623
15624 2023-05-24  Andrew MacLeod  <amacleod@redhat.com>
15625
15626         * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
15627         (ssa_cache::dump_range_query): Delete.
15628         (ssa_lazy_cache::dump_range_query): Delete.
15629         (ssa_lazy_cache::get_range): Move from header file.
15630         (ssa_lazy_cache::clear_range): ditto.
15631         (ssa_lazy_cache::clear): Ditto.
15632         * gimple-range-cache.h (class ssa_cache): Virtualize.
15633         (class ssa_lazy_cache): Inherit and virtualize.
15634
15635 2023-05-24  Aldy Hernandez  <aldyh@redhat.com>
15636
15637         * value-range.h (vrange::kind): Remove.
15638
15639 2023-05-24  Roger Sayle  <roger@nextmovesoftware.com>
15640
15641         PR middle-end/109840
15642         * match.pd <popcount optimizations>: Preserve zero-extension when
15643         optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
15644         popcount((T)x), so the popcount's argument keeps the same type.
15645         <parity optimizations>:  Likewise preserve extensions when
15646         simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
15647         parity((T)x), so that the parity's argument type is the same.
15648
15649 2023-05-24  Aldy Hernandez  <aldyh@redhat.com>
15650
15651         * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
15652         (ipcp_store_vr_results): Same.
15653         * ipa-prop.cc (ipa_vr::ipa_vr): New.
15654         (ipa_vr::get_vrange): New.
15655         (ipa_vr::set_unknown): New.
15656         (ipa_vr::streamer_read): New.
15657         (ipa_vr::streamer_write): New.
15658         (write_ipcp_transformation_info): Use new ipa_vr API.
15659         (read_ipcp_transformation_info): Same.
15660         (ipa_vr::nonzero_p): Delete.
15661         (ipcp_update_vr): Use new ipa_vr API.
15662         * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
15663         * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
15664
15665 2023-05-24  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
15666
15667         * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
15668         silence overflow warnings later on.
15669
15670 2023-05-24  Uros Bizjak  <ubizjak@gmail.com>
15671
15672         * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
15673         Remove handling of V8QImode.
15674         * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
15675         Call ix86_expand_vecop_qihi_partial.  Enable for TARGET_MMX_WITH_SSE.
15676         (v<insn>v4qi3): Ditto.
15677         * config/i386/sse.md (v<insn>v8qi3): Remove.
15678
15679 2023-05-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
15680
15681         PR target/99195
15682         * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
15683         (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
15684         (aarch64_simd_ashr<mode>): Rename to...
15685         (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
15686         (aarch64_simd_imm_shl<mode>): Rename to...
15687         (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
15688         (aarch64_simd_reg_sshl<mode>): Rename to...
15689         (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
15690         (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
15691         (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
15692         (aarch64_simd_reg_shl<mode>_signed): Rename to...
15693         (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
15694         (vec_shr_<mode>): Rename to...
15695         (vec_shr_<mode><vczle><vczbe>): ... This.
15696         (aarch64_<sur>shl<mode>): Rename to...
15697         (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
15698         (aarch64_<sur>q<r>shl<mode>): Rename to...
15699         (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
15700
15701 2023-05-24  Richard Biener  <rguenther@suse.de>
15702
15703         PR target/109944
15704         * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
15705         Perform final vector composition using
15706         ix86_expand_vector_init_general instead of setting
15707         the highpart and lowpart which causes spilling.
15708
15709 2023-05-24  Andrew MacLeod  <amacleod@redhat.com>
15710
15711         PR tree-optimization/109695
15712         * gimple-range-cache.cc (ranger_cache::get_global_range): Add
15713         changed param.
15714         * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
15715         * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
15716         flag to set_global_range.
15717         (gimple_ranger::prefill_stmt_dependencies): Ditto.
15718
15719 2023-05-24  Andrew MacLeod  <amacleod@redhat.com>
15720
15721         PR tree-optimization/109695
15722         * gimple-range-cache.cc (temporal_cache::temporal_value): Return
15723         a positive int.
15724         (temporal_cache::current_p): Check always_current method.
15725         (temporal_cache::set_always_current): Add param and set value
15726         appropriately.
15727         (temporal_cache::always_current_p): New.
15728         (ranger_cache::get_global_range): Adjust.
15729         (ranger_cache::set_global_range): set always current first.
15730
15731 2023-05-24  Andrew MacLeod  <amacleod@redhat.com>
15732
15733         PR tree-optimization/109695
15734         * gimple-range-cache.cc (ranger_cache::get_global_range): Call
15735         fold_range with global query to choose an initial value.
15736
15737 2023-05-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15738
15739         * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
15740         prefix.
15741
15742 2023-05-24  Richard Biener  <rguenther@suse.de>
15743
15744         PR tree-optimization/109849
15745         * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
15746         expressions but take the first sets.
15747
15748 2023-05-24  Gaius Mulley  <gaiusmod2@gmail.com>
15749
15750         PR modula2/109952
15751         * doc/gm2.texi (High procedure function): New node.
15752         (Using): New menu entry for High procedure function.
15753
15754 2023-05-24  Richard Sandiford  <richard.sandiford@arm.com>
15755
15756         PR rtl-optimization/109940
15757         * early-remat.cc (postorder_index): Rename to...
15758         (rpo_index): ...this.
15759         (compare_candidates): Sort by decreasing rpo_index rather than
15760         increasing postorder_index.
15761         (early_remat::sort_candidates): Calculate the forward RPO from
15762         DF_FORWARD.
15763         (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
15764         rather than DF_BACKWARD in reverse.
15765
15766 2023-05-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
15767
15768         PR target/109939
15769         * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
15770         qualifier_none for the return operand.
15771
15772 2023-05-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15773
15774         * config/riscv/autovec.md (<optab><mode>3): New pattern.
15775         (one_cmpl<mode>2): Ditto.
15776         (*<optab>not<mode>): Ditto.
15777         (*n<optab><mode>): Ditto.
15778         * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
15779         one_cmpl.
15780
15781 2023-05-24  Kewen Lin  <linkw@linux.ibm.com>
15782
15783         * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
15784         calculation on n_perms by considering nvectors_per_build.
15785
15786 2023-05-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15787             Richard Sandiford  <richard.sandiford@arm.com>
15788
15789         * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
15790         (vec_cmp<mode><vm>): New pattern.
15791         (vec_cmpu<mode><vm>): New pattern.
15792         (vcond<V:mode><VI:mode>): New pattern.
15793         (vcondu<V:mode><VI:mode>): New pattern.
15794         * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
15795         (emit_vlmax_merge_insn): New function.
15796         (emit_vlmax_cmp_insn): Ditto.
15797         (emit_vlmax_cmp_mu_insn): Ditto.
15798         (expand_vec_cmp): Ditto.
15799         (expand_vec_cmp_float): Ditto.
15800         (expand_vcond): Ditto.
15801         * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
15802         (emit_vlmax_cmp_insn): Ditto.
15803         (emit_vlmax_cmp_mu_insn): Ditto.
15804         (get_cmp_insn_code): Ditto.
15805         (expand_vec_cmp): Ditto.
15806         (expand_vec_cmp_float): Ditto.
15807         (expand_vcond): Ditto.
15808
15809 2023-05-24  Pan Li  <pan2.li@intel.com>
15810
15811         * config/riscv/genrvv-type-indexer.cc (main): Add
15812         unsigned_eew*_lmul1_interpret for indexer.
15813         * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
15814         Register vuint*m1_t interpret function.
15815         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
15816         New macro for vuint8m1_t.
15817         (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
15818         (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
15819         (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
15820         (vbool1_t): Add to unsigned_eew*_interpret_ops.
15821         (vbool2_t): Likewise.
15822         (vbool4_t): Likewise.
15823         (vbool8_t): Likewise.
15824         (vbool16_t): Likewise.
15825         (vbool32_t): Likewise.
15826         (vbool64_t): Likewise.
15827         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
15828         New macro for vuint*m1_t.
15829         (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
15830         (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
15831         (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
15832         (required_extensions_p): Add vuint*m1_t interpret case.
15833         * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
15834         Add vuint*m1_t interpret to base type.
15835         (unsigned_eew16_lmul1_interpret): Likewise.
15836         (unsigned_eew32_lmul1_interpret): Likewise.
15837         (unsigned_eew64_lmul1_interpret): Likewise.
15838
15839 2023-05-24  Pan Li  <pan2.li@intel.com>
15840
15841         * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
15842         for the eew size list.
15843         (LMUL1_LOG2): New macro for the log2 value of lmul=1.
15844         (main): Add signed_eew*_lmul1_interpret for indexer.
15845         * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
15846         Register vint*m1_t interpret function.
15847         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
15848         New macro for vint8m1_t.
15849         (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
15850         (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
15851         (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
15852         (vbool1_t): Add to signed_eew*_interpret_ops.
15853         (vbool2_t): Likewise.
15854         (vbool4_t): Likewise.
15855         (vbool8_t): Likewise.
15856         (vbool16_t): Likewise.
15857         (vbool32_t): Likewise.
15858         (vbool64_t): Likewise.
15859         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
15860         New macro for vint*m1_t.
15861         (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
15862         (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
15863         (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
15864         (required_extensions_p): Add vint8m1_t interpret case.
15865         * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
15866         Add vint*m1_t interpret to base type.
15867         (signed_eew16_lmul1_interpret): Likewise.
15868         (signed_eew32_lmul1_interpret): Likewise.
15869         (signed_eew64_lmul1_interpret): Likewise.
15870
15871 2023-05-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15872
15873         * config/riscv/autovec.md: Adjust for new interface.
15874         * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
15875         (emit_nonvlmax_insn): Add AVL operand.
15876         * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
15877         (emit_nonvlmax_insn): Add AVL operand.
15878         (sew64_scalar_helper): Adjust for new interface.
15879         (expand_tuple_move): Ditto.
15880         * config/riscv/vector.md: Ditto.
15881
15882 2023-05-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15883
15884         * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
15885         (expand_const_vector): Ditto.
15886         (legitimize_move): Ditto.
15887         (sew64_scalar_helper): Ditto.
15888         (expand_tuple_move): Ditto.
15889         (expand_vector_init_insert_elems): Ditto.
15890         * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
15891
15892 2023-05-24  liuhongt  <hongtao.liu@intel.com>
15893
15894         PR target/109900
15895         * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
15896         _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
15897         _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
15898         (ix86_masked_all_ones): Handle 64-bit mask.
15899         * config/i386/i386-builtin.def: Replace icode of related
15900         non-mask simd abs builtins with CODE_FOR_nothing.
15901
15902 2023-05-23  Martin Uecker  <uecker@tugraz.at>
15903
15904         PR c/109450
15905         * function.cc (gimplify_parm_type): Remove function.
15906         (gimplify_parameters): Call gimplify_type_sizes.
15907
15908 2023-05-23  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
15909
15910         * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
15911         and change to also accept '*subx' pattern.
15912         (*subx): Remove.
15913
15914 2023-05-23  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
15915
15916         * config/xtensa/predicates.md (addsub_operator): New.
15917         * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
15918         *extzvsi-1bit_addsubx): New insn_and_split patterns.
15919         * config/xtensa/xtensa.cc (xtensa_rtx_costs):
15920         Add a special case about ifcvt 'noce_try_cmove()' to handle
15921         constant loads that do not fit into signed 12 bits in the
15922         patterns added above.
15923
15924 2023-05-23  Richard Biener  <rguenther@suse.de>
15925
15926         PR tree-optimization/109747
15927         * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
15928         the SLP node only once to the cost hook.
15929
15930 2023-05-23  Georg-Johann Lay  <avr@gjlay.de>
15931
15932         * config/avr/avr.cc (avr_insn_cost): New static function.
15933         (TARGET_INSN_COST): Define to that function.
15934
15935 2023-05-23  Richard Biener  <rguenther@suse.de>
15936
15937         PR target/109944
15938         * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
15939         For vector construction or splats apply GPR->XMM move
15940         costing.  QImode memory can be handled directly only
15941         with SSE4.1 pinsrb.
15942
15943 2023-05-23  Richard Biener  <rguenther@suse.de>
15944
15945         PR tree-optimization/108752
15946         * tree-vect-stmts.cc (vectorizable_operation): For bit
15947         operations with generic word_mode vectors do not cost
15948         an extra stmt.  For plus, minus and negate also cost the
15949         constant materialization.
15950
15951 2023-05-23  Uros Bizjak  <ubizjak@gmail.com>
15952
15953         * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
15954         Call ix86_expand_vec_shift_qihi_constant for shifts
15955         with constant count operand.
15956         * config/i386/i386.cc (ix86_shift_rotate_cost):
15957         Handle V4QImode and V8QImode.
15958         * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
15959         (<insn>v4qi3): Ditto.
15960
15961 2023-05-23  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15962
15963         * config/riscv/vector.md: Add mode.
15964
15965 2023-05-23  Aldy Hernandez  <aldyh@redhat.com>
15966
15967         PR tree-optimization/109934
15968         * value-range.cc (irange::invert): Remove buggy special case.
15969
15970 2023-05-23  Richard Biener  <rguenther@suse.de>
15971
15972         * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
15973         ANTIC_OUT.
15974
15975 2023-05-23  Richard Sandiford  <richard.sandiford@arm.com>
15976
15977         PR target/109632
15978         * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
15979         subregs between any scalars that are 64 bits or smaller.
15980         * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
15981         (bits_etype): New int attribute.
15982         * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
15983         (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
15984         (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
15985
15986 2023-05-23  Richard Sandiford  <richard.sandiford@arm.com>
15987
15988         * doc/md.texi: Document that <FOO> can be used to refer to the
15989         numerical value of an int iterator FOO.  Tweak other parts of
15990         the int iterator documentation.
15991         * read-rtl.cc (iterator_group::has_self_attr): New field.
15992         (map_attr_string): When has_self_attr is true, make <FOO>
15993         expand to the current value of iterator FOO.
15994         (initialize_iterators): Set has_self_attr for int iterators.
15995
15996 2023-05-23  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
15997
15998         * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
15999         * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
16000         (RVV_UNOP_NUM): New macro.
16001         (RVV_BINOP_NUM): Ditto.
16002         (legitimize_move): Refactor the framework of RVV auto-vectorization.
16003         (emit_vlmax_op): Ditto.
16004         (emit_vlmax_reg_op): Ditto.
16005         (emit_len_op): Ditto.
16006         (emit_len_binop): Ditto.
16007         (emit_vlmax_tany_many): Ditto.
16008         (emit_nonvlmax_tany_many): Ditto.
16009         (sew64_scalar_helper): Ditto.
16010         (expand_tuple_move): Ditto.
16011         * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
16012         (emit_pred_binop): Ditto.
16013         (emit_vlmax_op): Ditto.
16014         (emit_vlmax_tany_many): New function.
16015         (emit_len_op): Remove.
16016         (emit_nonvlmax_tany_many): New function.
16017         (emit_vlmax_reg_op): Remove.
16018         (emit_len_binop): Ditto.
16019         (emit_index_op): Ditto.
16020         (expand_vec_series): Refactor the framework of RVV auto-vectorization.
16021         (expand_const_vector): Ditto.
16022         (legitimize_move): Ditto.
16023         (sew64_scalar_helper): Ditto.
16024         (expand_tuple_move): Ditto.
16025         (expand_vector_init_insert_elems): Ditto.
16026         * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
16027         * config/riscv/vector.md: Ditto.
16028
16029 2023-05-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
16030
16031         PR target/109855
16032         * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
16033         and constraint for operand 0.
16034         (add_vec_concat_subst_be): Likewise.
16035
16036 2023-05-23  Richard Biener  <rguenther@suse.de>
16037
16038         PR tree-optimization/109849
16039         * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
16040         and use that to determine what to hoist.
16041
16042 2023-05-23  Eric Botcazou  <ebotcazou@adacore.com>
16043
16044         * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
16045         specific treatment for bit-fields only if they have an integral type
16046         and filter out non-integral bit-fields that do not start and end on
16047         a byte boundary.
16048
16049 2023-05-23  Aldy Hernandez  <aldyh@redhat.com>
16050
16051         PR tree-optimization/109920
16052         * value-range.h (RESIZABLE>::~int_range): Use delete[].
16053
16054 2023-05-22  Uros Bizjak  <ubizjak@gmail.com>
16055
16056         * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
16057         calcuation of integer vector mode costs to reflect generated
16058         instruction sequences of different integer vector modes and
16059         different target ABIs.  Remove "speed" function argument.
16060         (ix86_rtx_costs): Update call for removed function argument.
16061         (ix86_vector_costs::add_stmt_cost): Ditto.
16062
16063 2023-05-22  Aldy Hernandez  <aldyh@redhat.com>
16064
16065         * value-range.h (class Value_Range): Implement set_zero,
16066         set_nonzero, and nonzero_p.
16067
16068 2023-05-22  Uros Bizjak  <ubizjak@gmail.com>
16069
16070         * config/i386/i386.cc (ix86_multiplication_cost): Add
16071         the cost of a memory read to the cost of V?QImode sequences.
16072
16073 2023-05-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
16074
16075         * config/riscv/riscv-v.cc: Add "m_" prefix.
16076
16077 2023-05-22  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
16078
16079         * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
16080         multiple-rgroup of length.
16081         * tree-vect-stmts.cc (vectorizable_store): Ditto.
16082         (vectorizable_load): Ditto.
16083         * tree-vectorizer.h (vect_get_loop_len): Ditto.
16084
16085 2023-05-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
16086
16087         * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
16088         codes.
16089
16090 2023-05-22  Kewen Lin  <linkw@linux.ibm.com>
16091
16092         * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
16093         handling for the case index == count.
16094
16095 2023-05-21  Georg-Johann Lay  <avr@gjlay.de>
16096
16097         PR target/90622
16098         * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
16099         Don't fold to XOR / AND / XOR if just one bit is copied to the
16100         same position.
16101
16102 2023-05-21  Roger Sayle  <roger@nextmovesoftware.com>
16103
16104         * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
16105         builtin for bit reversal using brev instruction.
16106         (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
16107         NVPTX_BUILTIN_BREVLL.
16108         (nvptx_init_builtins): Define "brev" and "brevll".
16109         (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
16110         NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
16111         * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
16112         section, document __builtin_nvptx_brev{,ll}.
16113
16114 2023-05-21  Jakub Jelinek  <jakub@redhat.com>
16115
16116         PR tree-optimization/109505
16117         * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
16118         Combine successive equal operations with constants,
16119         (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
16120         CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
16121         operands.
16122
16123 2023-05-21  Andrew Pinski  <apinski@marvell.com>
16124
16125         * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
16126
16127 2023-05-21  Pan Li  <pan2.li@intel.com>
16128
16129         * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
16130         rest bool size, aka 2, 4, 8, 16, 32, 64.
16131         * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
16132         Register vbool[2|4|8|16|32|64] interpret function.
16133         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
16134         New macro for vbool2_t.
16135         (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
16136         (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
16137         (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
16138         (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
16139         (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
16140         (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
16141         (vint16m1_t): Likewise.
16142         (vint32m1_t): Likewise.
16143         (vint64m1_t): Likewise.
16144         (vuint8m1_t): Likewise.
16145         (vuint16m1_t): Likewise.
16146         (vuint32m1_t): Likewise.
16147         (vuint64m1_t): Likewise.
16148         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
16149         New macro for vbool2_t.
16150         (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
16151         (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
16152         (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
16153         (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
16154         (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
16155         (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
16156         * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
16157         vbool2_t interprect to base type.
16158         (bool4_interpret): Likewise.
16159         (bool8_interpret): Likewise.
16160         (bool16_interpret): Likewise.
16161         (bool32_interpret): Likewise.
16162         (bool64_interpret): Likewise.
16163
16164 2023-05-21  Andrew Pinski  <apinski@marvell.com>
16165
16166         PR middle-end/109919
16167         * expr.cc (expand_single_bit_test): Don't use the
16168         target for expand_expr.
16169
16170 2023-05-20  Gerald Pfeifer  <gerald@pfeifer.com>
16171
16172         * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
16173         section.
16174
16175 2023-05-20  Pan Li  <pan2.li@intel.com>
16176
16177         * mode-switching.cc (entity_map): Initialize the array to zero.
16178         (bb_info): Ditto.
16179
16180 2023-05-20  Triffid Hunter  <triffid.hunter@gmail.com>
16181
16182         PR target/105753
16183         * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
16184         Remove superfluous "parallel" in insn pattern.
16185         ([u]divmod<mode>4): Tidy code.  Use gcc_unreachable() instead of
16186         printing error text to assembly.
16187
16188 2023-05-20  Andrew Pinski  <apinski@marvell.com>
16189
16190         * expr.cc (fold_single_bit_test): Rename to ...
16191         (expand_single_bit_test): This and expand directly.
16192         (do_store_flag): Update for the rename function.
16193
16194 2023-05-20  Andrew Pinski  <apinski@marvell.com>
16195
16196         * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
16197         instead of shift/and.
16198
16199 2023-05-20  Andrew Pinski  <apinski@marvell.com>
16200
16201         * expr.cc (fold_single_bit_test): Add an assert
16202         and simplify based on code being NE_EXPR or EQ_EXPR.
16203
16204 2023-05-20  Andrew Pinski  <apinski@marvell.com>
16205
16206         * expr.cc (fold_single_bit_test): Take inner and bitnum
16207         instead of arg0 and arg1. Update the code.
16208         (do_store_flag): Don't create a tree when calling
16209         fold_single_bit_test instead just call it with the bitnum
16210         and the inner tree.
16211
16212 2023-05-20  Andrew Pinski  <apinski@marvell.com>
16213
16214         * expr.cc (fold_single_bit_test): Use get_def_for_expr
16215         instead of checking the inner's code.
16216
16217 2023-05-20  Andrew Pinski  <apinski@marvell.com>
16218
16219         * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
16220         (fold_single_bit_test): This and simplify.
16221
16222 2023-05-20  Andrew Pinski  <apinski@marvell.com>
16223
16224         * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
16225         expr.cc.
16226         (fold_single_bit_test): Likewise.
16227         * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
16228         (fold_single_bit_test): Likewise and make static.
16229         * fold-const.h (fold_single_bit_test): Remove declaration.
16230
16231 2023-05-20  Die Li  <lidie@eswincomputing.com>
16232
16233         * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
16234         checking.
16235
16236 2023-05-20  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>
16237
16238         * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
16239
16240 2023-05-20  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>
16241
16242         PR target/106888
16243         * config/riscv/bitmanip.md
16244         (<bitmanip_optab>disi2): Match with any_extend.
16245         (<bitmanip_optab>disi2_sext): New pattern to match
16246         with sign extend using an ANDI instruction.
16247
16248 2023-05-19  Nathan Sidwell  <nathan@acm.org>
16249
16250         PR other/99451
16251         * opts.h (handle_deferred_dump_options): Declare.
16252         * opts-global.cc (handle_common_deferred_options): Do not handle
16253         dump options here.
16254         (handle_deferred_dump_options): New.
16255         * toplev.cc (toplev::main): Call it after plugin init.
16256
16257 2023-05-19  Joern Rennecke  <joern.rennecke@embecosm.com>
16258
16259         * config/riscv/constraints.md (DsS, DsD): Restore agreement
16260         with shiftm1 mode attribute.
16261
16262 2023-05-19  Andrew Pinski  <apinski@marvell.com>
16263
16264         PR driver/33980
16265         * gcc.cc (default_compilers["@c-header"]): Add %w
16266         after the --output-pch.
16267
16268 2023-05-19  Vineet Gupta  <vineetg@rivosinc.com>
16269
16270         * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
16271         to hival, ASHIFT the corresponding regs.
16272
16273 2023-05-19  Robin Dapp  <rdapp@ventanamicro.com>
16274
16275         * config/riscv/riscv.cc (riscv_const_insns): Remove else.
16276
16277 2023-05-19  Jakub Jelinek  <jakub@redhat.com>
16278
16279         PR tree-optimization/105776
16280         * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
16281         non-NULL, allow division statement to have a cast as single imm use
16282         rather than comparison/condition.
16283         (match_arith_overflow): In that case remove the cast stmt in addition
16284         to the division statement.
16285
16286 2023-05-19  Jakub Jelinek  <jakub@redhat.com>
16287
16288         PR tree-optimization/101856
16289         * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
16290         unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
16291         support it but umul_highpart_optab does.
16292
16293 2023-05-19  Eric Botcazou  <ebotcazou@adacore.com>
16294
16295         * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
16296         of tree_to_shwi on array indices.  Minor tweaks.
16297
16298 2023-05-18  Bernhard Reutner-Fischer  <aldot@gcc.gnu.org>
16299
16300         * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
16301         * attribs.cc (diag_attr_exclusions): Ditto.
16302         (decl_attributes): Ditto.
16303         (build_type_attribute_qual_variant): Ditto.
16304         * builtins.cc (fold_builtin_carg): Ditto.
16305         (fold_builtin_next_arg): Ditto.
16306         (do_mpc_arg2): Ditto.
16307         * cfgexpand.cc (expand_return): Ditto.
16308         * cgraph.h (decl_in_symtab_p): Ditto.
16309         (symtab_node::get_create): Ditto.
16310         * dwarf2out.cc (base_type_die): Ditto.
16311         (implicit_ptr_descriptor): Ditto.
16312         (gen_array_type_die): Ditto.
16313         (gen_type_die_with_usage): Ditto.
16314         (optimize_location_into_implicit_ptr): Ditto.
16315         * expr.cc (do_store_flag): Ditto.
16316         * fold-const.cc (negate_expr_p): Ditto.
16317         (fold_negate_expr_1): Ditto.
16318         (fold_convert_const): Ditto.
16319         (fold_convert_loc): Ditto.
16320         (constant_boolean_node): Ditto.
16321         (fold_binary_op_with_conditional_arg): Ditto.
16322         (build_fold_addr_expr_with_type_loc): Ditto.
16323         (fold_comparison): Ditto.
16324         (fold_checksum_tree): Ditto.
16325         (tree_unary_nonnegative_warnv_p): Ditto.
16326         (integer_valued_real_unary_p): Ditto.
16327         (fold_read_from_constant_string): Ditto.
16328         * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
16329         * gimple-expr.cc (useless_type_conversion_p): Ditto.
16330         (is_gimple_reg): Ditto.
16331         (is_gimple_asm_val): Ditto.
16332         (mark_addressable): Ditto.
16333         * gimple-expr.h (is_gimple_variable): Ditto.
16334         (virtual_operand_p): Ditto.
16335         * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
16336         * gimplify.cc (gimplify_bind_expr): Ditto.
16337         (gimplify_return_expr): Ditto.
16338         (gimple_add_padding_init_for_auto_var): Ditto.
16339         (gimplify_addr_expr): Ditto.
16340         (omp_add_variable): Ditto.
16341         (omp_notice_variable): Ditto.
16342         (omp_get_base_pointer): Ditto.
16343         (omp_strip_components_and_deref): Ditto.
16344         (omp_strip_indirections): Ditto.
16345         (omp_accumulate_sibling_list): Ditto.
16346         (omp_build_struct_sibling_lists): Ditto.
16347         (gimplify_adjust_omp_clauses_1): Ditto.
16348         (gimplify_adjust_omp_clauses): Ditto.
16349         (gimplify_omp_for): Ditto.
16350         (goa_lhs_expr_p): Ditto.
16351         (gimplify_one_sizepos): Ditto.
16352         * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
16353         * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
16354         * ipa-prop.cc (ipa_set_jf_constant): Ditto.
16355         (propagate_controlled_uses): Ditto.
16356         * ipa-sra.cc (type_prevails_p): Ditto.
16357         (scan_expr_access): Ditto.
16358         * optabs-tree.cc (optab_for_tree_code): Ditto.
16359         * toplev.cc (wrapup_global_declaration_1): Ditto.
16360         * trans-mem.cc (transaction_invariant_address_p): Ditto.
16361         * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
16362         (verify_gimple_comparison): Ditto.
16363         (verify_gimple_assign_binary): Ditto.
16364         (verify_gimple_assign_single): Ditto.
16365         * tree-complex.cc (get_component_ssa_name): Ditto.
16366         * tree-emutls.cc (lower_emutls_2): Ditto.
16367         * tree-inline.cc (copy_tree_body_r): Ditto.
16368         (estimate_move_cost): Ditto.
16369         (copy_decl_for_dup_finish): Ditto.
16370         * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
16371         (note_nonlocal_vla_type): Ditto.
16372         (convert_local_omp_clauses): Ditto.
16373         (remap_vla_decls): Ditto.
16374         (fixup_vla_decls): Ditto.
16375         * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
16376         * tree-pretty-print.cc (print_declaration): Ditto.
16377         (print_call_name): Ditto.
16378         * tree-sra.cc (compare_access_positions): Ditto.
16379         * tree-ssa-alias.cc (compare_type_sizes): Ditto.
16380         * tree-ssa-ccp.cc (get_default_value): Ditto.
16381         * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
16382         * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
16383         * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
16384         * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
16385         * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
16386         * tree-ssa-sink.cc (statement_sink_location): Ditto.
16387         * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
16388         * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
16389         * tree-ssa-uninit.cc (warn_uninit): Ditto.
16390         * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
16391         (non_rewritable_mem_ref_base): Ditto.
16392         * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
16393         * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
16394         * tree-vect-generic.cc (do_binop): Ditto.
16395         (do_cond): Ditto.
16396         * tree-vect-stmts.cc (vect_init_vector): Ditto.
16397         * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
16398         * tree.cc (sign_mask_for): Ditto.
16399         (verify_type_variant): Ditto.
16400         (gimple_canonical_types_compatible_p): Ditto.
16401         (verify_type): Ditto.
16402         * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
16403         * var-tracking.cc (prepare_call_arguments): Ditto.
16404         (vt_add_function_parameters): Ditto.
16405         * varasm.cc (decode_addr_const): Ditto.
16406
16407 2023-05-18  Bernhard Reutner-Fischer  <aldot@gcc.gnu.org>
16408
16409         * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
16410         (lower_reduction_clauses): Ditto.
16411         (lower_send_clauses): Ditto.
16412         (lower_omp_task_reductions): Ditto.
16413         * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
16414         (worker_single_copy): Ditto.
16415         * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
16416         * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
16417
16418 2023-05-18  Bernhard Reutner-Fischer  <aldot@gcc.gnu.org>
16419
16420         * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
16421         tree.h.
16422         (lto_read_body_or_constructor): Ditto.
16423         * lto-streamer-out.cc (tree_is_indexable): Ditto.
16424         (lto_output_var_decl_ref): Ditto.
16425         (DFS::DFS_write_tree_body): Ditto.
16426         (wrap_refs): Ditto.
16427         (write_symbol_extension_info): Ditto.
16428
16429 2023-05-18  Bernhard Reutner-Fischer  <aldot@gcc.gnu.org>
16430
16431         * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
16432         defines from tree.h.
16433         (aarch64_mangle_type): Ditto.
16434         * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
16435         (alpha_gimplify_va_arg_1): Ditto.
16436         * config/arc/arc.cc (arc_encode_section_info): Ditto.
16437         (arc_is_aux_reg_p): Ditto.
16438         (arc_is_uncached_mem_p): Ditto.
16439         (arc_handle_aux_attribute): Ditto.
16440         * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
16441         (arm_handle_cmse_nonsecure_call): Ditto.
16442         (arm_set_default_type_attributes): Ditto.
16443         (arm_is_segment_info_known): Ditto.
16444         (arm_mangle_type): Ditto.
16445         * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
16446         * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
16447         (avr_decl_absdata_p): Ditto.
16448         (avr_insert_attributes): Ditto.
16449         (avr_section_type_flags): Ditto.
16450         (avr_encode_section_info): Ditto.
16451         * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
16452         * config/bpf/bpf.cc (bpf_core_compute): Ditto.
16453         * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
16454         * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
16455         (csky_mangle_type): Ditto.
16456         * config/darwin-c.cc (darwin_pragma_unused): Ditto.
16457         * config/darwin.cc (is_objc_metadata): Ditto.
16458         * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
16459         * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
16460         * config/frv/frv.cc (frv_emit_movsi): Ditto.
16461         * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
16462         * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
16463         * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
16464         * config/i386/i386-expand.cc: Ditto.
16465         * config/i386/i386.cc (type_natural_mode): Ditto.
16466         (ix86_function_arg): Ditto.
16467         (ix86_data_alignment): Ditto.
16468         (ix86_local_alignment): Ditto.
16469         (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
16470         * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
16471         (i386_pe_type_dllexport_p): Ditto.
16472         (i386_pe_adjust_class_at_definition): Ditto.
16473         * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
16474         (i386_pe_binds_local_p): Ditto.
16475         (i386_pe_section_type_flags): Ditto.
16476         * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
16477         (ia64_gimplify_va_arg): Ditto.
16478         (ia64_in_small_data_p): Ditto.
16479         * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
16480         * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
16481         * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
16482         * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
16483         * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
16484         (mcore_encode_section_info): Ditto.
16485         * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
16486         * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
16487         * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
16488         * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
16489         (pass_in_memory): Ditto.
16490         (nvptx_generate_vector_shuffle): Ditto.
16491         (nvptx_lockless_update): Ditto.
16492         * config/pa/pa.cc (pa_function_arg_padding): Ditto.
16493         (pa_function_value): Ditto.
16494         (pa_function_arg): Ditto.
16495         * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
16496         (TEXT_SPACE_P): Ditto.
16497         * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
16498         * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
16499         * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
16500         (riscv_mangle_type): Ditto.
16501         * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
16502         (rl78_addsi3_internal): Ditto.
16503         * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
16504         * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
16505         * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
16506         * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
16507         * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
16508         (rs6000_function_arg_advance_1): Ditto.
16509         (rs6000_function_arg): Ditto.
16510         (rs6000_pass_by_reference): Ditto.
16511         * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
16512         * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
16513         (rs6000_set_default_type_attributes): Ditto.
16514         (rs6000_elf_in_small_data_p): Ditto.
16515         (IN_NAMED_SECTION): Ditto.
16516         (rs6000_xcoff_encode_section_info): Ditto.
16517         (rs6000_function_value): Ditto.
16518         (invalid_arg_for_unprototyped_fn): Ditto.
16519         * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
16520         (s390_vec_n_elem): Ditto.
16521         * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
16522         (s390_function_arg_integer): Ditto.
16523         (s390_return_in_memory): Ditto.
16524         (s390_encode_section_info): Ditto.
16525         * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
16526         (sh_function_value): Ditto.
16527         * config/sol2.cc (solaris_insert_attributes): Ditto.
16528         * config/sparc/sparc.cc (function_arg_slotno): Ditto.
16529         * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
16530         * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
16531         (xstormy16_handle_below100_attribute): Ditto.
16532         * config/v850/v850.cc (v850_encode_section_info): Ditto.
16533         (v850_insert_attributes): Ditto.
16534         * config/visium/visium.cc (visium_pass_by_reference): Ditto.
16535         (visium_return_in_memory): Ditto.
16536         * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
16537
16538 2023-05-18  Uros Bizjak  <ubizjak@gmail.com>
16539
16540         * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
16541         (ix86_expand_vecop_qihi): Add op2vec bool variable.
16542         Do not set REG_EQUAL note.
16543         * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
16544         Add prototype.
16545         * config/i386/i386.cc (ix86_multiplication_cost): Handle
16546         V4QImode and V8QImode.
16547         * config/i386/mmx.md (mulv8qi3): New expander.
16548         (mulv4qi3): Ditto.
16549         * config/i386/sse.md (mulv8qi3): Remove.
16550
16551 2023-05-18  Georg-Johann Lay  <avr@gjlay.de>
16552
16553         * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
16554
16555 2023-05-18  Jonathan Wakely  <jwakely@redhat.com>
16556
16557         PR bootstrap/105831
16558         * config.gcc: Use = operator instead of ==.
16559
16560 2023-05-18  Michael Bäuerle  <micha@NetBSD.org>
16561
16562         PR bootstrap/105831
16563         * config/nvptx/gen-opt.sh: Use = operator instead of ==.
16564         * configure.ac: Likewise.
16565         * configure: Regenerate.
16566
16567 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
16568
16569         * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
16570         (__ARM_mve_coerce1): Remove.
16571         (__ARM_mve_coerce2): Remove.
16572         (__ARM_mve_coerce3): Remove.
16573         (__ARM_mve_coerce_i_scalar): New.
16574         (__ARM_mve_coerce_s8_ptr): New.
16575         (__ARM_mve_coerce_u8_ptr): New.
16576         (__ARM_mve_coerce_s16_ptr): New.
16577         (__ARM_mve_coerce_u16_ptr): New.
16578         (__ARM_mve_coerce_s32_ptr): New.
16579         (__ARM_mve_coerce_u32_ptr): New.
16580         (__ARM_mve_coerce_s64_ptr): New.
16581         (__ARM_mve_coerce_u64_ptr): New.
16582         (__ARM_mve_coerce_f_scalar): New.
16583         (__ARM_mve_coerce_f16_ptr): New.
16584         (__ARM_mve_coerce_f32_ptr): New.
16585         (__arm_vst4q): Change _coerce_ overloads.
16586         (__arm_vbicq): Change _coerce_ overloads.
16587         (__arm_vld1q): Change _coerce_ overloads.
16588         (__arm_vld1q_z): Change _coerce_ overloads.
16589         (__arm_vld2q): Change _coerce_ overloads.
16590         (__arm_vld4q): Change _coerce_ overloads.
16591         (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
16592         (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
16593         (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
16594         (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
16595         (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
16596         (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
16597         (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
16598         (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
16599         (__arm_vst1q_p): Change _coerce_ overloads.
16600         (__arm_vst2q): Change _coerce_ overloads.
16601         (__arm_vst1q): Change _coerce_ overloads.
16602         (__arm_vstrhq): Change _coerce_ overloads.
16603         (__arm_vstrhq_p): Change _coerce_ overloads.
16604         (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
16605         (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
16606         (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
16607         (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
16608         (__arm_vstrwq_p): Change _coerce_ overloads.
16609         (__arm_vstrwq): Change _coerce_ overloads.
16610         (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
16611         (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
16612         (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
16613         (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
16614         (__arm_vsetq_lane): Change _coerce_ overloads.
16615         (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
16616         (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
16617         (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
16618         (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
16619         (__arm_viwdupq_x_u8): Change _coerce_ overloads.
16620         (__arm_viwdupq_x_u16): Change _coerce_ overloads.
16621         (__arm_viwdupq_x_u32): Change _coerce_ overloads.
16622         (__arm_vidupq_x_u8): Change _coerce_ overloads.
16623         (__arm_vddupq_x_u8): Change _coerce_ overloads.
16624         (__arm_vidupq_x_u16): Change _coerce_ overloads.
16625         (__arm_vddupq_x_u16): Change _coerce_ overloads.
16626         (__arm_vidupq_x_u32): Change _coerce_ overloads.
16627         (__arm_vddupq_x_u32): Change _coerce_ overloads.
16628         (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
16629         (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
16630         (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
16631         (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
16632         (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
16633         (__arm_vidupq_u16): Change _coerce_ overloads.
16634         (__arm_vidupq_u32): Change _coerce_ overloads.
16635         (__arm_vidupq_u8): Change _coerce_ overloads.
16636         (__arm_vddupq_u16): Change _coerce_ overloads.
16637         (__arm_vddupq_u32): Change _coerce_ overloads.
16638         (__arm_vddupq_u8): Change _coerce_ overloads.
16639         (__arm_viwdupq_m): Change _coerce_ overloads.
16640         (__arm_viwdupq_u16): Change _coerce_ overloads.
16641         (__arm_viwdupq_u32): Change _coerce_ overloads.
16642         (__arm_viwdupq_u8): Change _coerce_ overloads.
16643         (__arm_vdwdupq_m): Change _coerce_ overloads.
16644         (__arm_vdwdupq_u16): Change _coerce_ overloads.
16645         (__arm_vdwdupq_u32): Change _coerce_ overloads.
16646         (__arm_vdwdupq_u8): Change _coerce_ overloads.
16647         (__arm_vstrbq): Change _coerce_ overloads.
16648         (__arm_vstrbq_p): Change _coerce_ overloads.
16649         (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
16650         (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
16651         (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
16652         (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
16653         (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
16654
16655 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
16656
16657         * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
16658         scalar constant.
16659
16660 2023-05-18  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
16661
16662         * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
16663         (__arm_vadcq_u32): Likewise.
16664         (__arm_vadcq_m_s32): Likewise.
16665         (__arm_vadcq_m_u32): Likewise.
16666         (__arm_vsbcq_s32): Likewise.
16667         (__arm_vsbcq_u32): Likewise.
16668         (__arm_vsbcq_m_s32): Likewise.
16669         (__arm_vsbcq_m_u32): Likewise.
16670         * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
16671
16672 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
16673
16674         * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
16675         (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
16676         (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
16677         (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
16678         (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
16679         (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
16680         (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
16681         (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
16682         (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
16683         (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
16684         (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
16685         (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
16686         (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
16687         (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
16688         (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
16689         (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
16690         (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
16691         (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
16692         (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
16693         (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
16694         (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
16695         (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
16696         (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
16697         (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
16698         (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
16699         (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
16700         (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
16701         (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
16702         (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
16703         (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
16704         (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
16705         (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
16706         (mve_vorrq_m_f<mode>)
16707         (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
16708         (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
16709         (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
16710         capitalization in the emitted asm.
16711
16712 2023-05-18  Andrea Corallo  <andrea.corallo@arm.com>
16713
16714         * config/arm/constraints.md (mve_vldrd_immediate): Move it to
16715         predicates.md.
16716         (Ri): Move constraint definition from predicates.md.
16717         (Rl): Define new constraint.
16718         * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
16719         missing constraint.
16720         (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
16721         for op 1, use mve_vstrw_immediate predicate and Rl constraint for
16722         op 2. Fix asm output spacing.
16723         (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
16724         * config/arm/predicates.md (Ri) Move constraint to constraints.md
16725         (mve_vldrd_immediate): Move it from
16726         constraints.md.
16727         (mve_vstrw_immediate): New predicate.
16728
16729 2023-05-18  Pan Li  <pan2.li@intel.com>
16730             Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
16731             Kito Cheng  <kito.cheng@sifive.com>
16732             Richard Biener  <rguenther@suse.de>
16733             Richard Sandiford  <richard.sandiford@arm.com>
16734
16735         * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
16736         * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
16737         (struct table_elt): Extend machine_mode to 16 bits.
16738         (struct set): Ditto.
16739         * genmodes.cc (emit_mode_wider): Extend type from char to short.
16740         (emit_mode_complex): Ditto.
16741         (emit_mode_inner): Ditto.
16742         (emit_class_narrowest_mode): Ditto.
16743         * genopinit.cc (main): Extend the machine_mode limit.
16744         * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
16745         re-ordered the struct fields for padding.
16746         * machmode.h (MACHINE_MODE_BITSIZE): New macro.
16747         (GET_MODE_2XWIDER_MODE): Extend type from char to short.
16748         (get_mode_alignment): Extend type from char to short.
16749         * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
16750         removed the ATTRIBUTE_PACKED.
16751         * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
16752         * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
16753         m_kind to 2 bits and remove m_spare.
16754         * rtl.h (RTX_CODE_BITSIZE): New macro.
16755         (struct rtx_def): Swap both the bit size and location between the
16756         rtx_code and the machine_mode.
16757         (subreg_shape::unique_id): Extend the machine_mode limit.
16758         * rtlanal.h: Extend machine_mode to 16 bits.
16759         * tree-core.h (struct tree_type_common): Extend machine_mode to 16
16760         bits and re-ordered the struct fields for padding.
16761         (struct tree_decl_common): Extend machine_mode to 16 bits.
16762
16763 2023-05-17  Jin Ma  <jinma@linux.alibaba.com>
16764
16765         * genrecog.cc (print_nonbool_test): Fix type error of
16766         switch (SUBREG_BYTE (op))'.
16767
16768 2023-05-17  Jin Ma  <jinma@linux.alibaba.com>
16769
16770         * common/config/riscv/riscv-common.cc: Remove
16771         trailing spaces on lines.
16772         * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
16773         * config/riscv/riscv.h (enum reg_class): Likewise.
16774         * config/riscv/riscv.md: Likewise.
16775
16776 2023-05-17  John David Anglin  <danglin@gcc.gnu.org>
16777
16778         * config/pa/pa.md (clear_cache): New.
16779
16780 2023-05-17  Arsen Arsenović  <arsen@aarsen.me>
16781
16782         * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
16783         parenthesis.  Fix misnamed index entry.
16784         <concept>: Fix misnamed index entry.
16785
16786 2023-05-17  Jivan Hakobyan  <jivanhakobyan9@gmail.com>
16787
16788         * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
16789         combined from ...
16790         (*<optab>si3_mask, *<optab>di3_mask): Here.
16791         (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
16792         * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
16793         pattern.
16794         (*<bitmanip_optab>si3_sext_mask): Likewise.
16795         * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
16796         and const_di_mask_operand.
16797         (bitmanip_rotate): New iterator.
16798         (bitmanip_optab): Add rotates.
16799         * config/riscv/predicates.md (const_si_mask_operand): Renamed
16800         from const31_operand.  Generalize to handle more mask constants.
16801         (const_di_mask_operand): Similarly.
16802
16803 2023-05-17  Jakub Jelinek  <jakub@redhat.com>
16804
16805         PR c++/109884
16806         * config/i386/i386-builtin-types.def (FLOAT128): Use
16807         float128t_type_node rather than float128_type_node.
16808
16809 2023-05-17  Alexander Monakov  <amonakov@ispras.ru>
16810
16811         * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
16812         FP_CONTRACT_FAST (no functional change).
16813
16814 2023-05-17  Uros Bizjak  <ubizjak@gmail.com>
16815
16816         * config/i386/i386.cc (ix86_multiplication_cost): Correct
16817         calcuation of integer vector mode costs to reflect generated
16818         instruction sequences of different integer vector modes and
16819         different target ABIs.
16820
16821 2023-05-17  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
16822
16823         * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
16824         * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
16825         (riscv_mode_needed): Ditto.
16826         (riscv_mode_after): Ditto.
16827         (riscv_mode_entry): Ditto.
16828         (riscv_mode_exit): Ditto.
16829         (riscv_mode_priority): Ditto.
16830         (TARGET_MODE_EMIT): New target hook.
16831         (TARGET_MODE_NEEDED): Ditto.
16832         (TARGET_MODE_AFTER): Ditto.
16833         (TARGET_MODE_ENTRY): Ditto.
16834         (TARGET_MODE_EXIT): Ditto.
16835         (TARGET_MODE_PRIORITY): Ditto.
16836         * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
16837         (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
16838         * config/riscv/riscv.md: Add csrwvxrm.
16839         * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
16840         (vxrmsi): New pattern.
16841
16842 2023-05-17  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
16843
16844         * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
16845         * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
16846         (struct narrow_alu_def): Ditto.
16847         * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
16848         (function_expander::use_exact_insn): Ditto.
16849         * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
16850         (function_base::has_rounding_mode_operand_p): New function.
16851
16852 2023-05-17  Andrew Pinski  <apinski@marvell.com>
16853
16854         * tree-ssa-forwprop.cc (simplify_builtin_call): Check
16855         against 0 instead of calling integer_zerop.
16856
16857 2023-05-17  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
16858
16859         * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
16860         (DEF_RVV_VXRM_ENUM): New macro.
16861         (handle_pragma_vector): Add vxrm enum register.
16862         * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
16863         (RNU): Ditto.
16864         (RNE): Ditto.
16865         (RDN): Ditto.
16866         (ROD): Ditto.
16867
16868 2023-05-17  Aldy Hernandez  <aldyh@redhat.com>
16869
16870         * value-range.h (Value_Range::operator=): New.
16871
16872 2023-05-17  Aldy Hernandez  <aldyh@redhat.com>
16873
16874         * value-range.cc (vrange::operator=): Add a stub to copy
16875         unsupported ranges.
16876         * value-range.h (is_a <unsupported_range>): New.
16877         (Value_Range::operator=): Support copying unsupported ranges.
16878
16879 2023-05-17  Aldy Hernandez  <aldyh@redhat.com>
16880
16881         * data-streamer-in.cc (streamer_read_real_value): New.
16882         (streamer_read_value_range): New.
16883         * data-streamer-out.cc (streamer_write_real_value): New.
16884         (streamer_write_vrange): New.
16885         * data-streamer.h (streamer_write_vrange): New.
16886         (streamer_read_value_range): New.
16887
16888 2023-05-17  Jonathan Wakely  <jwakely@redhat.com>
16889
16890         PR c++/109532
16891         * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
16892         is ignored for a fixed underlying type.
16893         (C++ Dialect Options): Likewise for -fstrict-enums.
16894
16895 2023-05-17  Tobias Burnus  <tobias@codesourcery.com>
16896
16897         * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
16898         special case.
16899
16900 2023-05-17  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
16901
16902         * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
16903         New.
16904         (s390_atomic_align_for_mode): New.
16905
16906 2023-05-17  Jakub Jelinek  <jakub@redhat.com>
16907
16908         * wide-int.cc (wi::from_array): Add missing closing paren in function
16909         comment.
16910
16911 2023-05-17  Kewen Lin  <linkw@linux.ibm.com>
16912
16913         * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
16914         suggested unroll factor once the previous analysis fails.
16915
16916 2023-05-17  Pan Li  <pan2.li@intel.com>
16917
16918         * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
16919         macro.
16920         (main): Add bool1 to the type indexer.
16921         * config/riscv/riscv-vector-builtins-functions.def
16922         (vreinterpret): Register vbool1 interpret function.
16923         * config/riscv/riscv-vector-builtins-types.def
16924         (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
16925         (vint8m1_t): Add the type to bool1_interpret_ops.
16926         (vint16m1_t): Ditto.
16927         (vint32m1_t): Ditto.
16928         (vint64m1_t): Ditto.
16929         (vuint8m1_t): Ditto.
16930         (vuint16m1_t): Ditto.
16931         (vuint32m1_t): Ditto.
16932         (vuint64m1_t): Ditto.
16933         * config/riscv/riscv-vector-builtins.cc
16934         (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
16935         (required_extensions_p): Add bool1 interpret case.
16936         * config/riscv/riscv-vector-builtins.def
16937         (bool1_interpret): Add bool1 interpret to base type.
16938         * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
16939         with VB dest for vreinterpret.
16940
16941 2023-05-17  Jiufu Guo  <guojiufu@linux.ibm.com>
16942
16943         PR target/106708
16944         * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
16945         constants through "lis; xoris".
16946
16947 2023-05-16  Ajit Kumar Agarwal  <aagarwa1@linux.ibm.com>
16948
16949         * common/config/rs6000/rs6000-common.cc: Add REE pass as a
16950         default rs6000 target pass for O2 and above.
16951         * doc/invoke.texi: Document -free
16952
16953 2023-05-16  Kito Cheng  <kito.cheng@sifive.com>
16954
16955         * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
16956         Fix wrong select_kind...
16957
16958 2023-05-16  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
16959
16960         * config/s390/s390-protos.h (s390_expand_setmem): Change
16961         function signature.
16962         * config/s390/s390.cc (s390_expand_setmem): For memset's less
16963         than or equal to 256 byte do not perform a libc call.
16964         * config/s390/s390.md: Change expander into a version which
16965         takes 8 operands.
16966
16967 2023-05-16  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
16968
16969         * config/s390/s390-protos.h (s390_expand_movmem): New.
16970         * config/s390/s390.cc (s390_expand_movmem): New.
16971         * config/s390/s390.md (movmem<mode>): New.
16972         (*mvcrl): New.
16973         (mvcrl): New.
16974
16975 2023-05-16  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
16976
16977         * config/s390/s390-protos.h (s390_expand_cpymem): Change
16978         function signature.
16979         * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
16980         than or equal to 256 byte do not perform a libc call.
16981         (s390_expand_insv): Adapt new function signature of
16982         s390_expand_cpymem.
16983         * config/s390/s390.md: Change expander into a version which
16984         takes 8 operands.
16985
16986 2023-05-16  Andrew Pinski  <apinski@marvell.com>
16987
16988         PR tree-optimization/109424
16989         * match.pd: Add patterns for min/max of zero_one_valued
16990         values to `&`/`|`.
16991
16992 2023-05-16  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
16993
16994         * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
16995         * config/riscv/riscv-vector-builtins.cc
16996         (function_expander::use_ternop_insn): Add default rounding mode.
16997         (function_expander::use_widen_ternop_insn): Ditto.
16998         * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
16999         (riscv_hard_regno_mode_ok): Ditto.
17000         (riscv_conditional_register_usage): Ditto.
17001         * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
17002         (FRM_REG_P): Ditto.
17003         (RISCV_DWARF_FRM): Ditto.
17004         * config/riscv/riscv.md: Ditto.
17005         * config/riscv/vector-iterators.md: split no frm and has frm operations.
17006         * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
17007         (@pred_<optab><mode>): Ditto.
17008
17009 2023-05-15  Aldy Hernandez  <aldyh@redhat.com>
17010
17011         PR tree-optimization/109695
17012         * value-range.cc (irange::operator=): Resize range.
17013         (irange::union_): Same.
17014         (irange::intersect): Same.
17015         (irange::invert): Same.
17016         (int_range_max): Default to 3 sub-ranges and resize as needed.
17017         * value-range.h (irange::maybe_resize): New.
17018         (~int_range): New.
17019         (int_range::int_range): Adjust for resizing.
17020         (int_range::operator=): Same.
17021
17022 2023-05-15  Aldy Hernandez  <aldyh@redhat.com>
17023
17024         * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
17025         range copying
17026         * value-range.cc (irange::union_nonzero_bits): Return TRUE only
17027         when range changed.
17028
17029 2023-05-15  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
17030
17031         * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
17032         * config/riscv/riscv-vector-builtins.cc
17033         (function_expander::use_exact_insn): Add default rounding mode operand.
17034         * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
17035         (riscv_hard_regno_mode_ok): Ditto.
17036         (riscv_conditional_register_usage): Ditto.
17037         * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
17038         (VXRM_REG_P): Ditto.
17039         (RISCV_DWARF_VXRM): Ditto.
17040         * config/riscv/riscv.md: Ditto.
17041         * config/riscv/vector.md: Ditto
17042
17043 2023-05-15  Pan Li  <pan2.li@intel.com>
17044
17045         * optabs.cc (maybe_gen_insn): Add case to generate instruction
17046         that has 11 operands.
17047
17048 2023-05-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
17049
17050         * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
17051         logic for vector modes.
17052
17053 2023-05-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
17054
17055         PR target/99195
17056         * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
17057         (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
17058         (aarch64_cmtst<mode>): Rename to...
17059         (aarch64_cmtst<mode><vczle><vczbe>): ... This.
17060         (*aarch64_cmtst_same_<mode>): Rename to...
17061         (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
17062         (*aarch64_cmtstdi): Rename to...
17063         (*aarch64_cmtstdi<vczle><vczbe>): ... This.
17064         (aarch64_fac<optab><mode>): Rename to...
17065         (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
17066
17067 2023-05-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
17068
17069         PR target/99195
17070         * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
17071         (aarch64_s<optab><mode><vczle><vczbe>): ... This.
17072
17073 2023-05-15  Pan Li  <pan2.li@intel.com>
17074             Juzhe-Zhong  <juzhe.zhong@rivai.ai>
17075             kito-cheng  <kito.cheng@sifive.com>
17076
17077         * config/riscv/riscv-v.cc (const_vlmax_p): New function for
17078         deciding the mode is constant or not.
17079         (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
17080
17081 2023-05-15  Richard Biener  <rguenther@suse.de>
17082
17083         PR tree-optimization/109848
17084         * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
17085         TARGET_MEM_REF address preparation before the store, not
17086         before the CTOR.
17087
17088 2023-05-15  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
17089
17090         * config/riscv/riscv.cc
17091         (riscv_vectorize_preferred_vector_alignment): New function.
17092         (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
17093
17094 2023-05-14  Andrew Pinski  <apinski@marvell.com>
17095
17096         PR tree-optimization/109829
17097         * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
17098
17099 2023-05-14  Uros Bizjak  <ubizjak@gmail.com>
17100
17101         PR target/109807
17102         * config/i386/i386.cc: Revert the 2023-05-11 change.
17103         (ix86_widen_mult_cost): Return high value instead of
17104         ICEing for unsupported modes.
17105
17106 2023-05-14  Ard Biesheuvel  <ardb@kernel.org>
17107
17108         * config/i386/i386.cc (x86_function_profiler): Take
17109         ix86_direct_extern_access into account when generating calls
17110         to __fentry__()
17111
17112 2023-05-14  Pan Li  <pan2.li@intel.com>
17113
17114         * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
17115         Refactor the or pattern to switch cases.
17116
17117 2023-05-13  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
17118
17119         * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
17120         aarch64_expand_vector_init to this, and remove  interleaving case.
17121         Recursively call aarch64_expand_vector_init_fallback, instead of
17122         aarch64_expand_vector_init.
17123         (aarch64_unzip_vector_init): New function.
17124         (aarch64_expand_vector_init): Likewise.
17125
17126 2023-05-13  Kito Cheng  <kito.cheng@sifive.com>
17127
17128         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
17129         Pull out function call from the gcc_assert.
17130
17131 2023-05-13  Kito Cheng  <kito.cheng@sifive.com>
17132
17133         * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
17134         (policy_to_str): New.
17135         (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
17136
17137 2023-05-13  Andrew Pinski  <apinski@marvell.com>
17138
17139         PR tree-optimization/109834
17140         * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
17141         (popcount(rotate(x,y))->popcount(x)): Likewise.
17142
17143 2023-05-12  Uros Bizjak  <ubizjak@gmail.com>
17144
17145         * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
17146         reject ymm instructions for TARGET_PREFER_AVX128.  Use generic
17147         gen_extend_insn to generate zero/sign extension instructions.
17148         Fix comments.
17149         (ix86_expand_vecop_qihi): Initialize interleave functions
17150         for MULT code only.  Fix comments.
17151
17152 2023-05-12  Uros Bizjak  <ubizjak@gmail.com>
17153
17154         PR target/109797
17155         * config/i386/mmx.md (mulv2si3): Remove expander.
17156         (mulv2si3): Rename insn pattern from *mulv2si.
17157
17158 2023-05-12  Tobias Burnus  <tobias@codesourcery.com>
17159
17160         PR libstdc++/109816
17161         * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
17162         '!lto_stream_offload_p'.
17163
17164 2023-05-12  Kito Cheng  <kito.cheng@sifive.com>
17165             Juzhe-Zhong  <juzhe.zhong@rivai.ai>
17166
17167         PR target/109743
17168         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
17169         (local_avl_compatible_p): New.
17170         (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
17171         for LCM, rewrite as a backward algorithm.
17172         (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
17173         interface, handle a BB at once.
17174
17175 2023-05-12  Richard Biener  <rguenther@suse.de>
17176
17177         PR tree-optimization/64731
17178         * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
17179         handle TARGET_MEM_REF destinations of stores from vector
17180         CTORs.
17181
17182 2023-05-12  Richard Biener  <rguenther@suse.de>
17183
17184         PR tree-optimization/109791
17185         * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
17186         New pattern.
17187         (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
17188         Likewise.
17189
17190 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17191
17192         * config/arm/arm-mve-builtins-base.cc (vsriq): New.
17193         * config/arm/arm-mve-builtins-base.def (vsriq): New.
17194         * config/arm/arm-mve-builtins-base.h (vsriq): New.
17195         * config/arm/arm-mve-builtins.cc
17196         (function_instance::has_inactive_argument): Handle vsriq.
17197         * config/arm/arm_mve.h (vsriq): Remove.
17198         (vsriq_m): Remove.
17199         (vsriq_n_u8): Remove.
17200         (vsriq_n_s8): Remove.
17201         (vsriq_n_u16): Remove.
17202         (vsriq_n_s16): Remove.
17203         (vsriq_n_u32): Remove.
17204         (vsriq_n_s32): Remove.
17205         (vsriq_m_n_s8): Remove.
17206         (vsriq_m_n_u8): Remove.
17207         (vsriq_m_n_s16): Remove.
17208         (vsriq_m_n_u16): Remove.
17209         (vsriq_m_n_s32): Remove.
17210         (vsriq_m_n_u32): Remove.
17211         (__arm_vsriq_n_u8): Remove.
17212         (__arm_vsriq_n_s8): Remove.
17213         (__arm_vsriq_n_u16): Remove.
17214         (__arm_vsriq_n_s16): Remove.
17215         (__arm_vsriq_n_u32): Remove.
17216         (__arm_vsriq_n_s32): Remove.
17217         (__arm_vsriq_m_n_s8): Remove.
17218         (__arm_vsriq_m_n_u8): Remove.
17219         (__arm_vsriq_m_n_s16): Remove.
17220         (__arm_vsriq_m_n_u16): Remove.
17221         (__arm_vsriq_m_n_s32): Remove.
17222         (__arm_vsriq_m_n_u32): Remove.
17223         (__arm_vsriq): Remove.
17224         (__arm_vsriq_m): Remove.
17225
17226 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17227
17228         * config/arm/iterators.md (mve_insn): Add vsri.
17229         * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
17230         (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
17231         (mve_vsriq_m_n_<supf><mode>): Rename into ...
17232         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17233
17234 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17235
17236         * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
17237         * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
17238
17239 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17240
17241         * config/arm/arm-mve-builtins-base.cc (vsliq): New.
17242         * config/arm/arm-mve-builtins-base.def (vsliq): New.
17243         * config/arm/arm-mve-builtins-base.h (vsliq): New.
17244         * config/arm/arm-mve-builtins.cc
17245         (function_instance::has_inactive_argument): Handle vsliq.
17246         * config/arm/arm_mve.h (vsliq): Remove.
17247         (vsliq_m): Remove.
17248         (vsliq_n_u8): Remove.
17249         (vsliq_n_s8): Remove.
17250         (vsliq_n_u16): Remove.
17251         (vsliq_n_s16): Remove.
17252         (vsliq_n_u32): Remove.
17253         (vsliq_n_s32): Remove.
17254         (vsliq_m_n_s8): Remove.
17255         (vsliq_m_n_s32): Remove.
17256         (vsliq_m_n_s16): Remove.
17257         (vsliq_m_n_u8): Remove.
17258         (vsliq_m_n_u32): Remove.
17259         (vsliq_m_n_u16): Remove.
17260         (__arm_vsliq_n_u8): Remove.
17261         (__arm_vsliq_n_s8): Remove.
17262         (__arm_vsliq_n_u16): Remove.
17263         (__arm_vsliq_n_s16): Remove.
17264         (__arm_vsliq_n_u32): Remove.
17265         (__arm_vsliq_n_s32): Remove.
17266         (__arm_vsliq_m_n_s8): Remove.
17267         (__arm_vsliq_m_n_s32): Remove.
17268         (__arm_vsliq_m_n_s16): Remove.
17269         (__arm_vsliq_m_n_u8): Remove.
17270         (__arm_vsliq_m_n_u32): Remove.
17271         (__arm_vsliq_m_n_u16): Remove.
17272         (__arm_vsliq): Remove.
17273         (__arm_vsliq_m): Remove.
17274
17275 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17276
17277         * config/arm/iterators.md (mve_insn>): Add vsli.
17278         * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
17279         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17280         (mve_vsliq_m_n_<supf><mode>): Rename into ...
17281         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17282
17283 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17284
17285         * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
17286         * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
17287
17288 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17289
17290         * config/arm/arm-mve-builtins-base.cc (vpselq): New.
17291         * config/arm/arm-mve-builtins-base.def (vpselq): New.
17292         * config/arm/arm-mve-builtins-base.h (vpselq): New.
17293         * config/arm/arm_mve.h (vpselq): Remove.
17294         (vpselq_u8): Remove.
17295         (vpselq_s8): Remove.
17296         (vpselq_u16): Remove.
17297         (vpselq_s16): Remove.
17298         (vpselq_u32): Remove.
17299         (vpselq_s32): Remove.
17300         (vpselq_u64): Remove.
17301         (vpselq_s64): Remove.
17302         (vpselq_f16): Remove.
17303         (vpselq_f32): Remove.
17304         (__arm_vpselq_u8): Remove.
17305         (__arm_vpselq_s8): Remove.
17306         (__arm_vpselq_u16): Remove.
17307         (__arm_vpselq_s16): Remove.
17308         (__arm_vpselq_u32): Remove.
17309         (__arm_vpselq_s32): Remove.
17310         (__arm_vpselq_u64): Remove.
17311         (__arm_vpselq_s64): Remove.
17312         (__arm_vpselq_f16): Remove.
17313         (__arm_vpselq_f32): Remove.
17314         (__arm_vpselq): Remove.
17315
17316 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17317
17318         * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
17319         * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
17320
17321 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17322
17323         * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
17324         gen_mve_vpselq.
17325         * config/arm/iterators.md (MVE_VPSELQ_F): New.
17326         (mve_insn): Add vpsel.
17327         * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
17328         (@mve_<mve_insn>q_<supf><mode>): ... this.
17329         (@mve_vpselq_f<mode>): Rename into ...
17330         (@mve_<mve_insn>q_f<mode>): ... this.
17331
17332 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17333
17334         * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
17335         * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
17336         * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
17337         * config/arm/arm-mve-builtins.cc
17338         (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
17339         vfmsq.
17340         * config/arm/arm_mve.h (vfmaq): Remove.
17341         (vfmasq): Remove.
17342         (vfmsq): Remove.
17343         (vfmaq_m): Remove.
17344         (vfmasq_m): Remove.
17345         (vfmsq_m): Remove.
17346         (vfmaq_f16): Remove.
17347         (vfmaq_n_f16): Remove.
17348         (vfmasq_n_f16): Remove.
17349         (vfmsq_f16): Remove.
17350         (vfmaq_f32): Remove.
17351         (vfmaq_n_f32): Remove.
17352         (vfmasq_n_f32): Remove.
17353         (vfmsq_f32): Remove.
17354         (vfmaq_m_f32): Remove.
17355         (vfmaq_m_f16): Remove.
17356         (vfmaq_m_n_f32): Remove.
17357         (vfmaq_m_n_f16): Remove.
17358         (vfmasq_m_n_f32): Remove.
17359         (vfmasq_m_n_f16): Remove.
17360         (vfmsq_m_f32): Remove.
17361         (vfmsq_m_f16): Remove.
17362         (__arm_vfmaq_f16): Remove.
17363         (__arm_vfmaq_n_f16): Remove.
17364         (__arm_vfmasq_n_f16): Remove.
17365         (__arm_vfmsq_f16): Remove.
17366         (__arm_vfmaq_f32): Remove.
17367         (__arm_vfmaq_n_f32): Remove.
17368         (__arm_vfmasq_n_f32): Remove.
17369         (__arm_vfmsq_f32): Remove.
17370         (__arm_vfmaq_m_f32): Remove.
17371         (__arm_vfmaq_m_f16): Remove.
17372         (__arm_vfmaq_m_n_f32): Remove.
17373         (__arm_vfmaq_m_n_f16): Remove.
17374         (__arm_vfmasq_m_n_f32): Remove.
17375         (__arm_vfmasq_m_n_f16): Remove.
17376         (__arm_vfmsq_m_f32): Remove.
17377         (__arm_vfmsq_m_f16): Remove.
17378         (__arm_vfmaq): Remove.
17379         (__arm_vfmasq): Remove.
17380         (__arm_vfmsq): Remove.
17381         (__arm_vfmaq_m): Remove.
17382         (__arm_vfmasq_m): Remove.
17383         (__arm_vfmsq_m): Remove.
17384
17385 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17386
17387         * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
17388         VFMSQ_M_F.
17389         (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
17390         (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
17391         (mve_insn): Add vfma, vfmas, vfms.
17392         * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
17393         into ...
17394         (@mve_<mve_insn>q_f<mode>): ... this.
17395         (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
17396         (@mve_<mve_insn>q_n_f<mode>): ... this.
17397         (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
17398         @mve_<mve_insn>q_m_f<mode>.
17399         (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
17400         @mve_<mve_insn>q_m_n_f<mode>.
17401
17402 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17403
17404         * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
17405         * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
17406
17407 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17408
17409         * config/arm/arm-mve-builtins-base.cc
17410         (FUNCTION_WITH_RTX_M_N_NO_F): New.
17411         (vmvnq): New.
17412         * config/arm/arm-mve-builtins-base.def (vmvnq): New.
17413         * config/arm/arm-mve-builtins-base.h (vmvnq): New.
17414         * config/arm/arm_mve.h (vmvnq): Remove.
17415         (vmvnq_m): Remove.
17416         (vmvnq_x): Remove.
17417         (vmvnq_s8): Remove.
17418         (vmvnq_s16): Remove.
17419         (vmvnq_s32): Remove.
17420         (vmvnq_n_s16): Remove.
17421         (vmvnq_n_s32): Remove.
17422         (vmvnq_u8): Remove.
17423         (vmvnq_u16): Remove.
17424         (vmvnq_u32): Remove.
17425         (vmvnq_n_u16): Remove.
17426         (vmvnq_n_u32): Remove.
17427         (vmvnq_m_u8): Remove.
17428         (vmvnq_m_s8): Remove.
17429         (vmvnq_m_u16): Remove.
17430         (vmvnq_m_s16): Remove.
17431         (vmvnq_m_u32): Remove.
17432         (vmvnq_m_s32): Remove.
17433         (vmvnq_m_n_s16): Remove.
17434         (vmvnq_m_n_u16): Remove.
17435         (vmvnq_m_n_s32): Remove.
17436         (vmvnq_m_n_u32): Remove.
17437         (vmvnq_x_s8): Remove.
17438         (vmvnq_x_s16): Remove.
17439         (vmvnq_x_s32): Remove.
17440         (vmvnq_x_u8): Remove.
17441         (vmvnq_x_u16): Remove.
17442         (vmvnq_x_u32): Remove.
17443         (vmvnq_x_n_s16): Remove.
17444         (vmvnq_x_n_s32): Remove.
17445         (vmvnq_x_n_u16): Remove.
17446         (vmvnq_x_n_u32): Remove.
17447         (__arm_vmvnq_s8): Remove.
17448         (__arm_vmvnq_s16): Remove.
17449         (__arm_vmvnq_s32): Remove.
17450         (__arm_vmvnq_n_s16): Remove.
17451         (__arm_vmvnq_n_s32): Remove.
17452         (__arm_vmvnq_u8): Remove.
17453         (__arm_vmvnq_u16): Remove.
17454         (__arm_vmvnq_u32): Remove.
17455         (__arm_vmvnq_n_u16): Remove.
17456         (__arm_vmvnq_n_u32): Remove.
17457         (__arm_vmvnq_m_u8): Remove.
17458         (__arm_vmvnq_m_s8): Remove.
17459         (__arm_vmvnq_m_u16): Remove.
17460         (__arm_vmvnq_m_s16): Remove.
17461         (__arm_vmvnq_m_u32): Remove.
17462         (__arm_vmvnq_m_s32): Remove.
17463         (__arm_vmvnq_m_n_s16): Remove.
17464         (__arm_vmvnq_m_n_u16): Remove.
17465         (__arm_vmvnq_m_n_s32): Remove.
17466         (__arm_vmvnq_m_n_u32): Remove.
17467         (__arm_vmvnq_x_s8): Remove.
17468         (__arm_vmvnq_x_s16): Remove.
17469         (__arm_vmvnq_x_s32): Remove.
17470         (__arm_vmvnq_x_u8): Remove.
17471         (__arm_vmvnq_x_u16): Remove.
17472         (__arm_vmvnq_x_u32): Remove.
17473         (__arm_vmvnq_x_n_s16): Remove.
17474         (__arm_vmvnq_x_n_s32): Remove.
17475         (__arm_vmvnq_x_n_u16): Remove.
17476         (__arm_vmvnq_x_n_u32): Remove.
17477         (__arm_vmvnq): Remove.
17478         (__arm_vmvnq_m): Remove.
17479         (__arm_vmvnq_x): Remove.
17480
17481 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17482
17483         * config/arm/iterators.md (mve_insn): Add vmvn.
17484         * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
17485         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17486         (mve_vmvnq_m_<supf><mode>): Rename into ...
17487         (@mve_<mve_insn>q_m_<supf><mode>): ... this.
17488         (mve_vmvnq_m_n_<supf><mode>): Rename into ...
17489         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17490
17491 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17492
17493         * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
17494         * config/arm/arm-mve-builtins-shapes.h (mvn): New.
17495
17496 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17497
17498         * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
17499         * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
17500         * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
17501         * config/arm/arm_mve.h (vbrsrq): Remove.
17502         (vbrsrq_m): Remove.
17503         (vbrsrq_x): Remove.
17504         (vbrsrq_n_f16): Remove.
17505         (vbrsrq_n_f32): Remove.
17506         (vbrsrq_n_u8): Remove.
17507         (vbrsrq_n_s8): Remove.
17508         (vbrsrq_n_u16): Remove.
17509         (vbrsrq_n_s16): Remove.
17510         (vbrsrq_n_u32): Remove.
17511         (vbrsrq_n_s32): Remove.
17512         (vbrsrq_m_n_s8): Remove.
17513         (vbrsrq_m_n_s32): Remove.
17514         (vbrsrq_m_n_s16): Remove.
17515         (vbrsrq_m_n_u8): Remove.
17516         (vbrsrq_m_n_u32): Remove.
17517         (vbrsrq_m_n_u16): Remove.
17518         (vbrsrq_m_n_f32): Remove.
17519         (vbrsrq_m_n_f16): Remove.
17520         (vbrsrq_x_n_s8): Remove.
17521         (vbrsrq_x_n_s16): Remove.
17522         (vbrsrq_x_n_s32): Remove.
17523         (vbrsrq_x_n_u8): Remove.
17524         (vbrsrq_x_n_u16): Remove.
17525         (vbrsrq_x_n_u32): Remove.
17526         (vbrsrq_x_n_f16): Remove.
17527         (vbrsrq_x_n_f32): Remove.
17528         (__arm_vbrsrq_n_u8): Remove.
17529         (__arm_vbrsrq_n_s8): Remove.
17530         (__arm_vbrsrq_n_u16): Remove.
17531         (__arm_vbrsrq_n_s16): Remove.
17532         (__arm_vbrsrq_n_u32): Remove.
17533         (__arm_vbrsrq_n_s32): Remove.
17534         (__arm_vbrsrq_m_n_s8): Remove.
17535         (__arm_vbrsrq_m_n_s32): Remove.
17536         (__arm_vbrsrq_m_n_s16): Remove.
17537         (__arm_vbrsrq_m_n_u8): Remove.
17538         (__arm_vbrsrq_m_n_u32): Remove.
17539         (__arm_vbrsrq_m_n_u16): Remove.
17540         (__arm_vbrsrq_x_n_s8): Remove.
17541         (__arm_vbrsrq_x_n_s16): Remove.
17542         (__arm_vbrsrq_x_n_s32): Remove.
17543         (__arm_vbrsrq_x_n_u8): Remove.
17544         (__arm_vbrsrq_x_n_u16): Remove.
17545         (__arm_vbrsrq_x_n_u32): Remove.
17546         (__arm_vbrsrq_n_f16): Remove.
17547         (__arm_vbrsrq_n_f32): Remove.
17548         (__arm_vbrsrq_m_n_f32): Remove.
17549         (__arm_vbrsrq_m_n_f16): Remove.
17550         (__arm_vbrsrq_x_n_f16): Remove.
17551         (__arm_vbrsrq_x_n_f32): Remove.
17552         (__arm_vbrsrq): Remove.
17553         (__arm_vbrsrq_m): Remove.
17554         (__arm_vbrsrq_x): Remove.
17555
17556 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17557
17558         * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
17559         (mve_insn): Add vbrsr.
17560         * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
17561         (@mve_<mve_insn>q_n_f<mode>): ... this.
17562         (mve_vbrsrq_n_<supf><mode>): Rename into ...
17563         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17564         (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
17565         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17566         (mve_vbrsrq_m_n_f<mode>): Rename into ...
17567         (@mve_<mve_insn>q_m_n_f<mode>): ... this.
17568
17569 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17570
17571         * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
17572         * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
17573
17574 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17575
17576         * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
17577         * config/arm/arm-mve-builtins-base.def (vqshluq): New.
17578         * config/arm/arm-mve-builtins-base.h (vqshluq): New.
17579         * config/arm/arm_mve.h (vqshluq): Remove.
17580         (vqshluq_m): Remove.
17581         (vqshluq_n_s8): Remove.
17582         (vqshluq_n_s16): Remove.
17583         (vqshluq_n_s32): Remove.
17584         (vqshluq_m_n_s8): Remove.
17585         (vqshluq_m_n_s16): Remove.
17586         (vqshluq_m_n_s32): Remove.
17587         (__arm_vqshluq_n_s8): Remove.
17588         (__arm_vqshluq_n_s16): Remove.
17589         (__arm_vqshluq_n_s32): Remove.
17590         (__arm_vqshluq_m_n_s8): Remove.
17591         (__arm_vqshluq_m_n_s16): Remove.
17592         (__arm_vqshluq_m_n_s32): Remove.
17593         (__arm_vqshluq): Remove.
17594         (__arm_vqshluq_m): Remove.
17595
17596 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17597
17598         * config/arm/iterators.md (mve_insn): Add vqshlu.
17599         (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
17600         (VQSHLUQ_M_N, VQSHLUQ_N): New.
17601         * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
17602         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17603         (mve_vqshluq_m_n_s<mode>): Change name into ...
17604         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17605
17606 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17607
17608         * config/arm/arm-mve-builtins-shapes.cc
17609         (binary_lshift_unsigned): New.
17610         * config/arm/arm-mve-builtins-shapes.h
17611         (binary_lshift_unsigned): New.
17612
17613 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17614
17615         * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
17616         (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
17617         * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
17618         (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
17619         * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
17620         (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
17621         * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
17622         vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
17623         * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
17624         (vrmlaldavhaxq): Remove.
17625         (vrmlsldavhaq): Remove.
17626         (vrmlsldavhaxq): Remove.
17627         (vrmlaldavhaq_p): Remove.
17628         (vrmlaldavhaxq_p): Remove.
17629         (vrmlsldavhaq_p): Remove.
17630         (vrmlsldavhaxq_p): Remove.
17631         (vrmlaldavhaq_s32): Remove.
17632         (vrmlaldavhaq_u32): Remove.
17633         (vrmlaldavhaxq_s32): Remove.
17634         (vrmlsldavhaq_s32): Remove.
17635         (vrmlsldavhaxq_s32): Remove.
17636         (vrmlaldavhaq_p_s32): Remove.
17637         (vrmlaldavhaq_p_u32): Remove.
17638         (vrmlaldavhaxq_p_s32): Remove.
17639         (vrmlsldavhaq_p_s32): Remove.
17640         (vrmlsldavhaxq_p_s32): Remove.
17641         (__arm_vrmlaldavhaq_s32): Remove.
17642         (__arm_vrmlaldavhaq_u32): Remove.
17643         (__arm_vrmlaldavhaxq_s32): Remove.
17644         (__arm_vrmlsldavhaq_s32): Remove.
17645         (__arm_vrmlsldavhaxq_s32): Remove.
17646         (__arm_vrmlaldavhaq_p_s32): Remove.
17647         (__arm_vrmlaldavhaq_p_u32): Remove.
17648         (__arm_vrmlaldavhaxq_p_s32): Remove.
17649         (__arm_vrmlsldavhaq_p_s32): Remove.
17650         (__arm_vrmlsldavhaxq_p_s32): Remove.
17651         (__arm_vrmlaldavhaq): Remove.
17652         (__arm_vrmlaldavhaxq): Remove.
17653         (__arm_vrmlsldavhaq): Remove.
17654         (__arm_vrmlsldavhaxq): Remove.
17655         (__arm_vrmlaldavhaq_p): Remove.
17656         (__arm_vrmlaldavhaxq_p): Remove.
17657         (__arm_vrmlsldavhaq_p): Remove.
17658         (__arm_vrmlsldavhaxq_p): Remove.
17659
17660 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17661
17662         * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
17663         (MVE_VRMLxLDAVHAxQ_P): New.
17664         (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
17665         vrmlsldavhax.
17666         (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
17667         VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
17668         VRMLALDAVHAQ_P_S.
17669         * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
17670         (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
17671         (mve_vrmlsldavhaq_sv4si): Merge into ...
17672         (@mve_<mve_insn>q_<supf>v4si): ... this.
17673         (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
17674         (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
17675         (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
17676         (@mve_<mve_insn>q_p_<supf>v4si): ... this.
17677
17678 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17679
17680         * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
17681         * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
17682         New.
17683         * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
17684         * config/arm/arm_mve.h (vqdmulltq): Remove.
17685         (vqdmullbq): Remove.
17686         (vqdmullbq_m): Remove.
17687         (vqdmulltq_m): Remove.
17688         (vqdmulltq_s16): Remove.
17689         (vqdmulltq_n_s16): Remove.
17690         (vqdmullbq_s16): Remove.
17691         (vqdmullbq_n_s16): Remove.
17692         (vqdmulltq_s32): Remove.
17693         (vqdmulltq_n_s32): Remove.
17694         (vqdmullbq_s32): Remove.
17695         (vqdmullbq_n_s32): Remove.
17696         (vqdmullbq_m_n_s32): Remove.
17697         (vqdmullbq_m_n_s16): Remove.
17698         (vqdmullbq_m_s32): Remove.
17699         (vqdmullbq_m_s16): Remove.
17700         (vqdmulltq_m_n_s32): Remove.
17701         (vqdmulltq_m_n_s16): Remove.
17702         (vqdmulltq_m_s32): Remove.
17703         (vqdmulltq_m_s16): Remove.
17704         (__arm_vqdmulltq_s16): Remove.
17705         (__arm_vqdmulltq_n_s16): Remove.
17706         (__arm_vqdmullbq_s16): Remove.
17707         (__arm_vqdmullbq_n_s16): Remove.
17708         (__arm_vqdmulltq_s32): Remove.
17709         (__arm_vqdmulltq_n_s32): Remove.
17710         (__arm_vqdmullbq_s32): Remove.
17711         (__arm_vqdmullbq_n_s32): Remove.
17712         (__arm_vqdmullbq_m_n_s32): Remove.
17713         (__arm_vqdmullbq_m_n_s16): Remove.
17714         (__arm_vqdmullbq_m_s32): Remove.
17715         (__arm_vqdmullbq_m_s16): Remove.
17716         (__arm_vqdmulltq_m_n_s32): Remove.
17717         (__arm_vqdmulltq_m_n_s16): Remove.
17718         (__arm_vqdmulltq_m_s32): Remove.
17719         (__arm_vqdmulltq_m_s16): Remove.
17720         (__arm_vqdmulltq): Remove.
17721         (__arm_vqdmullbq): Remove.
17722         (__arm_vqdmullbq_m): Remove.
17723         (__arm_vqdmulltq_m): Remove.
17724
17725 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17726
17727         * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
17728         (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
17729         (mve_insn): Add vqdmullb, vqdmullt.
17730         (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
17731         VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
17732         VQDMULLTQ_N_S.
17733         * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
17734         (mve_vqdmulltq_n_s<mode>): Merge into ...
17735         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17736         (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
17737         (@mve_<mve_insn>q_<supf><mode>): ... this.
17738         (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
17739         ...
17740         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
17741         (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
17742         (@mve_<mve_insn>q_m_<supf><mode>): ... this.
17743
17744 2023-05-12  Christophe Lyon  <christophe.lyon@arm.com>
17745
17746         * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
17747         * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
17748
17749 2023-05-12  Kito Cheng  <kito.cheng@sifive.com>
17750
17751         * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
17752         Drop unused parameter.
17753         (riscv_select_multilib): Ditto.
17754         (riscv_compute_multilib): Update call site of
17755         riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
17756
17757 2023-05-12  Juzhe Zhong  <juzhe.zhong@rivai.ai>
17758
17759         * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
17760         * config/riscv/riscv-protos.h (expand_vec_init): New function.
17761         * config/riscv/riscv-v.cc (class rvv_builder): New class.
17762         (rvv_builder::can_duplicate_repeating_sequence_p): New function.
17763         (rvv_builder::get_merged_repeating_sequence): Ditto.
17764         (expand_vector_init_insert_elems): Ditto.
17765         (expand_vec_init): Ditto.
17766         * config/riscv/vector-iterators.md: New attribute.
17767
17768 2023-05-12  Haochen Gui  <guihaoc@gcc.gnu.org>
17769
17770         * config/rs6000/rs6000-builtins.def
17771         (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
17772         to xsiexpdp_di.
17773         (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
17774         xsiexpdpf to xsiexpdpf_di.
17775         * config/rs6000/vsx.md (xsiexpdp): Rename to...
17776         (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
17777         replace TARGET_64BIT with TARGET_POWERPC64.
17778         (xsiexpdpf): Rename to...
17779         (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
17780         replace TARGET_64BIT with TARGET_POWERPC64.
17781
17782 2023-05-12  Haochen Gui  <guihaoc@gcc.gnu.org>
17783
17784         * config/rs6000/rs6000-builtins.def
17785         (__builtin_vsx_scalar_extract_sig): Set return type to const signed
17786         long long.
17787         * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
17788         TARGET_POWERPC64.
17789
17790 2023-05-12  Haochen Gui  <guihaoc@gcc.gnu.org>
17791
17792         * config/rs6000/rs6000-builtins.def
17793         (__builtin_vsx_scalar_extract_exp): Set return type to const signed
17794         int and set its bif-pattern to xsxexpdp_si, move it from power9-64
17795         to power9 catalog.
17796         * config/rs6000/vsx.md (xsxexpdp): Rename to ...
17797         (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
17798         TARGET_64BIT check.
17799         * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
17800         requirement when it has a 64-bit argument.
17801
17802 2023-05-12  Pan Li  <pan2.li@intel.com>
17803             Richard Sandiford  <richard.sandiford@arm.com>
17804             Richard Biener  <rguenther@suse.de>
17805             Jakub Jelinek  <jakub@redhat.com>
17806
17807         * mux-utils.h: Add overload operator == and != for pointer_mux.
17808         * var-tracking.cc: Included mux-utils.h for pointer_tmux.
17809         (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
17810         (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
17811         (dv_as_decl): Ditto.
17812         (dv_as_opaque): Removed due to unnecessary.
17813         (struct variable_hasher): Take decl_or_value as compare_type.
17814         (variable_hasher::equal): Diito.
17815         (dv_from_decl): Reconciled to the new type, aka pointer_mux.
17816         (dv_from_value): Ditto.
17817         (attrs_list_member):  Ditto.
17818         (vars_copy): Ditto.
17819         (var_reg_decl_set): Ditto.
17820         (var_reg_delete_and_set): Ditto.
17821         (find_loc_in_1pdv): Ditto.
17822         (canonicalize_values_star): Ditto.
17823         (variable_post_merge_new_vals): Ditto.
17824         (dump_onepart_variable_differences): Ditto.
17825         (variable_different_p): Ditto.
17826         (set_slot_part): Ditto.
17827         (clobber_slot_part): Ditto.
17828         (clobber_variable_part): Ditto.
17829
17830 2023-05-11  mtsamis  <manolis.tsamis@vrull.eu>
17831
17832         * match.pd: simplify vector shift + bit_and + multiply.
17833
17834 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
17835
17836         * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
17837         (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
17838         * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
17839         (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
17840         * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
17841         (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
17842         * config/arm/arm-mve-builtins.cc
17843         (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
17844         vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
17845         * config/arm/arm_mve.h (vqrdmlashq): Remove.
17846         (vqrdmlahq): Remove.
17847         (vqdmlashq): Remove.
17848         (vqdmlahq): Remove.
17849         (vmlasq): Remove.
17850         (vmlaq): Remove.
17851         (vmlaq_m): Remove.
17852         (vmlasq_m): Remove.
17853         (vqdmlashq_m): Remove.
17854         (vqdmlahq_m): Remove.
17855         (vqrdmlahq_m): Remove.
17856         (vqrdmlashq_m): Remove.
17857         (vmlasq_n_u8): Remove.
17858         (vmlaq_n_u8): Remove.
17859         (vqrdmlashq_n_s8): Remove.
17860         (vqrdmlahq_n_s8): Remove.
17861         (vqdmlahq_n_s8): Remove.
17862         (vqdmlashq_n_s8): Remove.
17863         (vmlasq_n_s8): Remove.
17864         (vmlaq_n_s8): Remove.
17865         (vmlasq_n_u16): Remove.
17866         (vmlaq_n_u16): Remove.
17867         (vqrdmlashq_n_s16): Remove.
17868         (vqrdmlahq_n_s16): Remove.
17869         (vqdmlashq_n_s16): Remove.
17870         (vqdmlahq_n_s16): Remove.
17871         (vmlasq_n_s16): Remove.
17872         (vmlaq_n_s16): Remove.
17873         (vmlasq_n_u32): Remove.
17874         (vmlaq_n_u32): Remove.
17875         (vqrdmlashq_n_s32): Remove.
17876         (vqrdmlahq_n_s32): Remove.
17877         (vqdmlashq_n_s32): Remove.
17878         (vqdmlahq_n_s32): Remove.
17879         (vmlasq_n_s32): Remove.
17880         (vmlaq_n_s32): Remove.
17881         (vmlaq_m_n_s8): Remove.
17882         (vmlaq_m_n_s32): Remove.
17883         (vmlaq_m_n_s16): Remove.
17884         (vmlaq_m_n_u8): Remove.
17885         (vmlaq_m_n_u32): Remove.
17886         (vmlaq_m_n_u16): Remove.
17887         (vmlasq_m_n_s8): Remove.
17888         (vmlasq_m_n_s32): Remove.
17889         (vmlasq_m_n_s16): Remove.
17890         (vmlasq_m_n_u8): Remove.
17891         (vmlasq_m_n_u32): Remove.
17892         (vmlasq_m_n_u16): Remove.
17893         (vqdmlashq_m_n_s8): Remove.
17894         (vqdmlashq_m_n_s32): Remove.
17895         (vqdmlashq_m_n_s16): Remove.
17896         (vqdmlahq_m_n_s8): Remove.
17897         (vqdmlahq_m_n_s32): Remove.
17898         (vqdmlahq_m_n_s16): Remove.
17899         (vqrdmlahq_m_n_s8): Remove.
17900         (vqrdmlahq_m_n_s32): Remove.
17901         (vqrdmlahq_m_n_s16): Remove.
17902         (vqrdmlashq_m_n_s8): Remove.
17903         (vqrdmlashq_m_n_s32): Remove.
17904         (vqrdmlashq_m_n_s16): Remove.
17905         (__arm_vmlasq_n_u8): Remove.
17906         (__arm_vmlaq_n_u8): Remove.
17907         (__arm_vqrdmlashq_n_s8): Remove.
17908         (__arm_vqdmlashq_n_s8): Remove.
17909         (__arm_vqrdmlahq_n_s8): Remove.
17910         (__arm_vqdmlahq_n_s8): Remove.
17911         (__arm_vmlasq_n_s8): Remove.
17912         (__arm_vmlaq_n_s8): Remove.
17913         (__arm_vmlasq_n_u16): Remove.
17914         (__arm_vmlaq_n_u16): Remove.
17915         (__arm_vqrdmlashq_n_s16): Remove.
17916         (__arm_vqdmlashq_n_s16): Remove.
17917         (__arm_vqrdmlahq_n_s16): Remove.
17918         (__arm_vqdmlahq_n_s16): Remove.
17919         (__arm_vmlasq_n_s16): Remove.
17920         (__arm_vmlaq_n_s16): Remove.
17921         (__arm_vmlasq_n_u32): Remove.
17922         (__arm_vmlaq_n_u32): Remove.
17923         (__arm_vqrdmlashq_n_s32): Remove.
17924         (__arm_vqdmlashq_n_s32): Remove.
17925         (__arm_vqrdmlahq_n_s32): Remove.
17926         (__arm_vqdmlahq_n_s32): Remove.
17927         (__arm_vmlasq_n_s32): Remove.
17928         (__arm_vmlaq_n_s32): Remove.
17929         (__arm_vmlaq_m_n_s8): Remove.
17930         (__arm_vmlaq_m_n_s32): Remove.
17931         (__arm_vmlaq_m_n_s16): Remove.
17932         (__arm_vmlaq_m_n_u8): Remove.
17933         (__arm_vmlaq_m_n_u32): Remove.
17934         (__arm_vmlaq_m_n_u16): Remove.
17935         (__arm_vmlasq_m_n_s8): Remove.
17936         (__arm_vmlasq_m_n_s32): Remove.
17937         (__arm_vmlasq_m_n_s16): Remove.
17938         (__arm_vmlasq_m_n_u8): Remove.
17939         (__arm_vmlasq_m_n_u32): Remove.
17940         (__arm_vmlasq_m_n_u16): Remove.
17941         (__arm_vqdmlahq_m_n_s8): Remove.
17942         (__arm_vqdmlahq_m_n_s32): Remove.
17943         (__arm_vqdmlahq_m_n_s16): Remove.
17944         (__arm_vqrdmlahq_m_n_s8): Remove.
17945         (__arm_vqrdmlahq_m_n_s32): Remove.
17946         (__arm_vqrdmlahq_m_n_s16): Remove.
17947         (__arm_vqrdmlashq_m_n_s8): Remove.
17948         (__arm_vqrdmlashq_m_n_s32): Remove.
17949         (__arm_vqrdmlashq_m_n_s16): Remove.
17950         (__arm_vqdmlashq_m_n_s8): Remove.
17951         (__arm_vqdmlashq_m_n_s16): Remove.
17952         (__arm_vqdmlashq_m_n_s32): Remove.
17953         (__arm_vmlasq): Remove.
17954         (__arm_vmlaq): Remove.
17955         (__arm_vqrdmlashq): Remove.
17956         (__arm_vqdmlashq): Remove.
17957         (__arm_vqrdmlahq): Remove.
17958         (__arm_vqdmlahq): Remove.
17959         (__arm_vmlaq_m): Remove.
17960         (__arm_vmlasq_m): Remove.
17961         (__arm_vqdmlahq_m): Remove.
17962         (__arm_vqrdmlahq_m): Remove.
17963         (__arm_vqrdmlashq_m): Remove.
17964         (__arm_vqdmlashq_m): Remove.
17965
17966 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
17967
17968         * config/arm/iterators.md (MVE_VMLxQ_N): New.
17969         (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
17970         vqrdmlash.
17971         (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
17972         VQRDMLASHQ_N_S.
17973         * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
17974         (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
17975         (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
17976         (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
17977         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
17978
17979 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
17980
17981         * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
17982         * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
17983
17984 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
17985
17986         * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
17987         (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
17988         (vqrdmlsdhxq): New.
17989         * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
17990         (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
17991         (vqrdmlsdhxq): New.
17992         * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
17993         (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
17994         (vqrdmlsdhxq): New.
17995         * config/arm/arm-mve-builtins.cc
17996         (function_instance::has_inactive_argument): Handle vqrdmladhq,
17997         vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
17998         vqdmlsdhq, vqdmlsdhxq.
17999         * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
18000         (vqrdmlsdhq): Remove.
18001         (vqrdmladhxq): Remove.
18002         (vqrdmladhq): Remove.
18003         (vqdmlsdhxq): Remove.
18004         (vqdmlsdhq): Remove.
18005         (vqdmladhxq): Remove.
18006         (vqdmladhq): Remove.
18007         (vqdmladhq_m): Remove.
18008         (vqdmladhxq_m): Remove.
18009         (vqdmlsdhq_m): Remove.
18010         (vqdmlsdhxq_m): Remove.
18011         (vqrdmladhq_m): Remove.
18012         (vqrdmladhxq_m): Remove.
18013         (vqrdmlsdhq_m): Remove.
18014         (vqrdmlsdhxq_m): Remove.
18015         (vqrdmlsdhxq_s8): Remove.
18016         (vqrdmlsdhq_s8): Remove.
18017         (vqrdmladhxq_s8): Remove.
18018         (vqrdmladhq_s8): Remove.
18019         (vqdmlsdhxq_s8): Remove.
18020         (vqdmlsdhq_s8): Remove.
18021         (vqdmladhxq_s8): Remove.
18022         (vqdmladhq_s8): Remove.
18023         (vqrdmlsdhxq_s16): Remove.
18024         (vqrdmlsdhq_s16): Remove.
18025         (vqrdmladhxq_s16): Remove.
18026         (vqrdmladhq_s16): Remove.
18027         (vqdmlsdhxq_s16): Remove.
18028         (vqdmlsdhq_s16): Remove.
18029         (vqdmladhxq_s16): Remove.
18030         (vqdmladhq_s16): Remove.
18031         (vqrdmlsdhxq_s32): Remove.
18032         (vqrdmlsdhq_s32): Remove.
18033         (vqrdmladhxq_s32): Remove.
18034         (vqrdmladhq_s32): Remove.
18035         (vqdmlsdhxq_s32): Remove.
18036         (vqdmlsdhq_s32): Remove.
18037         (vqdmladhxq_s32): Remove.
18038         (vqdmladhq_s32): Remove.
18039         (vqdmladhq_m_s8): Remove.
18040         (vqdmladhq_m_s32): Remove.
18041         (vqdmladhq_m_s16): Remove.
18042         (vqdmladhxq_m_s8): Remove.
18043         (vqdmladhxq_m_s32): Remove.
18044         (vqdmladhxq_m_s16): Remove.
18045         (vqdmlsdhq_m_s8): Remove.
18046         (vqdmlsdhq_m_s32): Remove.
18047         (vqdmlsdhq_m_s16): Remove.
18048         (vqdmlsdhxq_m_s8): Remove.
18049         (vqdmlsdhxq_m_s32): Remove.
18050         (vqdmlsdhxq_m_s16): Remove.
18051         (vqrdmladhq_m_s8): Remove.
18052         (vqrdmladhq_m_s32): Remove.
18053         (vqrdmladhq_m_s16): Remove.
18054         (vqrdmladhxq_m_s8): Remove.
18055         (vqrdmladhxq_m_s32): Remove.
18056         (vqrdmladhxq_m_s16): Remove.
18057         (vqrdmlsdhq_m_s8): Remove.
18058         (vqrdmlsdhq_m_s32): Remove.
18059         (vqrdmlsdhq_m_s16): Remove.
18060         (vqrdmlsdhxq_m_s8): Remove.
18061         (vqrdmlsdhxq_m_s32): Remove.
18062         (vqrdmlsdhxq_m_s16): Remove.
18063         (__arm_vqrdmlsdhxq_s8): Remove.
18064         (__arm_vqrdmlsdhq_s8): Remove.
18065         (__arm_vqrdmladhxq_s8): Remove.
18066         (__arm_vqrdmladhq_s8): Remove.
18067         (__arm_vqdmlsdhxq_s8): Remove.
18068         (__arm_vqdmlsdhq_s8): Remove.
18069         (__arm_vqdmladhxq_s8): Remove.
18070         (__arm_vqdmladhq_s8): Remove.
18071         (__arm_vqrdmlsdhxq_s16): Remove.
18072         (__arm_vqrdmlsdhq_s16): Remove.
18073         (__arm_vqrdmladhxq_s16): Remove.
18074         (__arm_vqrdmladhq_s16): Remove.
18075         (__arm_vqdmlsdhxq_s16): Remove.
18076         (__arm_vqdmlsdhq_s16): Remove.
18077         (__arm_vqdmladhxq_s16): Remove.
18078         (__arm_vqdmladhq_s16): Remove.
18079         (__arm_vqrdmlsdhxq_s32): Remove.
18080         (__arm_vqrdmlsdhq_s32): Remove.
18081         (__arm_vqrdmladhxq_s32): Remove.
18082         (__arm_vqrdmladhq_s32): Remove.
18083         (__arm_vqdmlsdhxq_s32): Remove.
18084         (__arm_vqdmlsdhq_s32): Remove.
18085         (__arm_vqdmladhxq_s32): Remove.
18086         (__arm_vqdmladhq_s32): Remove.
18087         (__arm_vqdmladhq_m_s8): Remove.
18088         (__arm_vqdmladhq_m_s32): Remove.
18089         (__arm_vqdmladhq_m_s16): Remove.
18090         (__arm_vqdmladhxq_m_s8): Remove.
18091         (__arm_vqdmladhxq_m_s32): Remove.
18092         (__arm_vqdmladhxq_m_s16): Remove.
18093         (__arm_vqdmlsdhq_m_s8): Remove.
18094         (__arm_vqdmlsdhq_m_s32): Remove.
18095         (__arm_vqdmlsdhq_m_s16): Remove.
18096         (__arm_vqdmlsdhxq_m_s8): Remove.
18097         (__arm_vqdmlsdhxq_m_s32): Remove.
18098         (__arm_vqdmlsdhxq_m_s16): Remove.
18099         (__arm_vqrdmladhq_m_s8): Remove.
18100         (__arm_vqrdmladhq_m_s32): Remove.
18101         (__arm_vqrdmladhq_m_s16): Remove.
18102         (__arm_vqrdmladhxq_m_s8): Remove.
18103         (__arm_vqrdmladhxq_m_s32): Remove.
18104         (__arm_vqrdmladhxq_m_s16): Remove.
18105         (__arm_vqrdmlsdhq_m_s8): Remove.
18106         (__arm_vqrdmlsdhq_m_s32): Remove.
18107         (__arm_vqrdmlsdhq_m_s16): Remove.
18108         (__arm_vqrdmlsdhxq_m_s8): Remove.
18109         (__arm_vqrdmlsdhxq_m_s32): Remove.
18110         (__arm_vqrdmlsdhxq_m_s16): Remove.
18111         (__arm_vqrdmlsdhxq): Remove.
18112         (__arm_vqrdmlsdhq): Remove.
18113         (__arm_vqrdmladhxq): Remove.
18114         (__arm_vqrdmladhq): Remove.
18115         (__arm_vqdmlsdhxq): Remove.
18116         (__arm_vqdmlsdhq): Remove.
18117         (__arm_vqdmladhxq): Remove.
18118         (__arm_vqdmladhq): Remove.
18119         (__arm_vqdmladhq_m): Remove.
18120         (__arm_vqdmladhxq_m): Remove.
18121         (__arm_vqdmlsdhq_m): Remove.
18122         (__arm_vqdmlsdhxq_m): Remove.
18123         (__arm_vqrdmladhq_m): Remove.
18124         (__arm_vqrdmladhxq_m): Remove.
18125         (__arm_vqrdmlsdhq_m): Remove.
18126         (__arm_vqrdmlsdhxq_m): Remove.
18127
18128 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18129
18130         * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
18131         (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
18132         vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
18133         (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
18134         VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
18135         * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
18136         (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
18137         (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
18138         (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
18139         (mve_vqdmladhq_s<mode>): Merge into ...
18140         (@mve_<mve_insn>q_<supf><mode>): ... this.
18141
18142 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18143
18144         * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
18145         * config/arm/arm-mve-builtins-shapes.h (ternary): New.
18146
18147 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18148
18149         * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
18150         (vmlsldavaq, vmlsldavaxq): New.
18151         * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
18152         (vmlsldavaq, vmlsldavaxq): New.
18153         * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
18154         (vmlsldavaq, vmlsldavaxq): New.
18155         * config/arm/arm_mve.h (vmlaldavaq): Remove.
18156         (vmlaldavaxq): Remove.
18157         (vmlsldavaq): Remove.
18158         (vmlsldavaxq): Remove.
18159         (vmlaldavaq_p): Remove.
18160         (vmlaldavaxq_p): Remove.
18161         (vmlsldavaq_p): Remove.
18162         (vmlsldavaxq_p): Remove.
18163         (vmlaldavaq_s16): Remove.
18164         (vmlaldavaxq_s16): Remove.
18165         (vmlsldavaq_s16): Remove.
18166         (vmlsldavaxq_s16): Remove.
18167         (vmlaldavaq_u16): Remove.
18168         (vmlaldavaq_s32): Remove.
18169         (vmlaldavaxq_s32): Remove.
18170         (vmlsldavaq_s32): Remove.
18171         (vmlsldavaxq_s32): Remove.
18172         (vmlaldavaq_u32): Remove.
18173         (vmlaldavaq_p_s32): Remove.
18174         (vmlaldavaq_p_s16): Remove.
18175         (vmlaldavaq_p_u32): Remove.
18176         (vmlaldavaq_p_u16): Remove.
18177         (vmlaldavaxq_p_s32): Remove.
18178         (vmlaldavaxq_p_s16): Remove.
18179         (vmlsldavaq_p_s32): Remove.
18180         (vmlsldavaq_p_s16): Remove.
18181         (vmlsldavaxq_p_s32): Remove.
18182         (vmlsldavaxq_p_s16): Remove.
18183         (__arm_vmlaldavaq_s16): Remove.
18184         (__arm_vmlaldavaxq_s16): Remove.
18185         (__arm_vmlsldavaq_s16): Remove.
18186         (__arm_vmlsldavaxq_s16): Remove.
18187         (__arm_vmlaldavaq_u16): Remove.
18188         (__arm_vmlaldavaq_s32): Remove.
18189         (__arm_vmlaldavaxq_s32): Remove.
18190         (__arm_vmlsldavaq_s32): Remove.
18191         (__arm_vmlsldavaxq_s32): Remove.
18192         (__arm_vmlaldavaq_u32): Remove.
18193         (__arm_vmlaldavaq_p_s32): Remove.
18194         (__arm_vmlaldavaq_p_s16): Remove.
18195         (__arm_vmlaldavaq_p_u32): Remove.
18196         (__arm_vmlaldavaq_p_u16): Remove.
18197         (__arm_vmlaldavaxq_p_s32): Remove.
18198         (__arm_vmlaldavaxq_p_s16): Remove.
18199         (__arm_vmlsldavaq_p_s32): Remove.
18200         (__arm_vmlsldavaq_p_s16): Remove.
18201         (__arm_vmlsldavaxq_p_s32): Remove.
18202         (__arm_vmlsldavaxq_p_s16): Remove.
18203         (__arm_vmlaldavaq): Remove.
18204         (__arm_vmlaldavaxq): Remove.
18205         (__arm_vmlsldavaq): Remove.
18206         (__arm_vmlsldavaxq): Remove.
18207         (__arm_vmlaldavaq_p): Remove.
18208         (__arm_vmlaldavaxq_p): Remove.
18209         (__arm_vmlsldavaq_p): Remove.
18210         (__arm_vmlsldavaxq_p): Remove.
18211
18212 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18213
18214         * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
18215         New.
18216         (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
18217         (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
18218         VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
18219         * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
18220         (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
18221         (mve_vmlaldavaxq_s<mode>): Merge into ...
18222         (@mve_<mve_insn>q_<supf><mode>): ... this.
18223         (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
18224         (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
18225         ...
18226         (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18227
18228 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18229
18230         * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
18231         * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
18232
18233 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18234
18235         * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
18236         (vrmlsldavhq, vrmlsldavhxq): New.
18237         * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
18238         (vrmlsldavhq, vrmlsldavhxq): New.
18239         * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
18240         (vrmlsldavhq, vrmlsldavhxq): New.
18241         * config/arm/arm-mve-builtins-functions.h
18242         (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
18243         vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
18244         * config/arm/arm_mve.h (vrmlaldavhq): Remove.
18245         (vrmlsldavhxq): Remove.
18246         (vrmlsldavhq): Remove.
18247         (vrmlaldavhxq): Remove.
18248         (vrmlaldavhq_p): Remove.
18249         (vrmlaldavhxq_p): Remove.
18250         (vrmlsldavhq_p): Remove.
18251         (vrmlsldavhxq_p): Remove.
18252         (vrmlaldavhq_u32): Remove.
18253         (vrmlsldavhxq_s32): Remove.
18254         (vrmlsldavhq_s32): Remove.
18255         (vrmlaldavhxq_s32): Remove.
18256         (vrmlaldavhq_s32): Remove.
18257         (vrmlaldavhq_p_s32): Remove.
18258         (vrmlaldavhxq_p_s32): Remove.
18259         (vrmlsldavhq_p_s32): Remove.
18260         (vrmlsldavhxq_p_s32): Remove.
18261         (vrmlaldavhq_p_u32): Remove.
18262         (__arm_vrmlaldavhq_u32): Remove.
18263         (__arm_vrmlsldavhxq_s32): Remove.
18264         (__arm_vrmlsldavhq_s32): Remove.
18265         (__arm_vrmlaldavhxq_s32): Remove.
18266         (__arm_vrmlaldavhq_s32): Remove.
18267         (__arm_vrmlaldavhq_p_s32): Remove.
18268         (__arm_vrmlaldavhxq_p_s32): Remove.
18269         (__arm_vrmlsldavhq_p_s32): Remove.
18270         (__arm_vrmlsldavhxq_p_s32): Remove.
18271         (__arm_vrmlaldavhq_p_u32): Remove.
18272         (__arm_vrmlaldavhq): Remove.
18273         (__arm_vrmlsldavhxq): Remove.
18274         (__arm_vrmlsldavhq): Remove.
18275         (__arm_vrmlaldavhxq): Remove.
18276         (__arm_vrmlaldavhq_p): Remove.
18277         (__arm_vrmlaldavhxq_p): Remove.
18278         (__arm_vrmlsldavhq_p): Remove.
18279         (__arm_vrmlsldavhxq_p): Remove.
18280
18281 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18282
18283         * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
18284         New.
18285         (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
18286         (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
18287         VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
18288         * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
18289         (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
18290         (mve_vrmlaldavhq_<supf>v4si): Merge into ...
18291         (@mve_<mve_insn>q_<supf>v4si): ... this.
18292         (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
18293         (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
18294         into ...
18295         (@mve_<mve_insn>q_p_<supf>v4si): ... this.
18296
18297 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18298
18299         * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
18300         (vmlsldavq, vmlsldavxq): New.
18301         * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
18302         (vmlsldavq, vmlsldavxq): New.
18303         * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
18304         (vmlsldavq, vmlsldavxq): New.
18305         * config/arm/arm_mve.h (vmlaldavq): Remove.
18306         (vmlsldavxq): Remove.
18307         (vmlsldavq): Remove.
18308         (vmlaldavxq): Remove.
18309         (vmlaldavq_p): Remove.
18310         (vmlaldavxq_p): Remove.
18311         (vmlsldavq_p): Remove.
18312         (vmlsldavxq_p): Remove.
18313         (vmlaldavq_u16): Remove.
18314         (vmlsldavxq_s16): Remove.
18315         (vmlsldavq_s16): Remove.
18316         (vmlaldavxq_s16): Remove.
18317         (vmlaldavq_s16): Remove.
18318         (vmlaldavq_u32): Remove.
18319         (vmlsldavxq_s32): Remove.
18320         (vmlsldavq_s32): Remove.
18321         (vmlaldavxq_s32): Remove.
18322         (vmlaldavq_s32): Remove.
18323         (vmlaldavq_p_s16): Remove.
18324         (vmlaldavxq_p_s16): Remove.
18325         (vmlsldavq_p_s16): Remove.
18326         (vmlsldavxq_p_s16): Remove.
18327         (vmlaldavq_p_u16): Remove.
18328         (vmlaldavq_p_s32): Remove.
18329         (vmlaldavxq_p_s32): Remove.
18330         (vmlsldavq_p_s32): Remove.
18331         (vmlsldavxq_p_s32): Remove.
18332         (vmlaldavq_p_u32): Remove.
18333         (__arm_vmlaldavq_u16): Remove.
18334         (__arm_vmlsldavxq_s16): Remove.
18335         (__arm_vmlsldavq_s16): Remove.
18336         (__arm_vmlaldavxq_s16): Remove.
18337         (__arm_vmlaldavq_s16): Remove.
18338         (__arm_vmlaldavq_u32): Remove.
18339         (__arm_vmlsldavxq_s32): Remove.
18340         (__arm_vmlsldavq_s32): Remove.
18341         (__arm_vmlaldavxq_s32): Remove.
18342         (__arm_vmlaldavq_s32): Remove.
18343         (__arm_vmlaldavq_p_s16): Remove.
18344         (__arm_vmlaldavxq_p_s16): Remove.
18345         (__arm_vmlsldavq_p_s16): Remove.
18346         (__arm_vmlsldavxq_p_s16): Remove.
18347         (__arm_vmlaldavq_p_u16): Remove.
18348         (__arm_vmlaldavq_p_s32): Remove.
18349         (__arm_vmlaldavxq_p_s32): Remove.
18350         (__arm_vmlsldavq_p_s32): Remove.
18351         (__arm_vmlsldavxq_p_s32): Remove.
18352         (__arm_vmlaldavq_p_u32): Remove.
18353         (__arm_vmlaldavq): Remove.
18354         (__arm_vmlsldavxq): Remove.
18355         (__arm_vmlsldavq): Remove.
18356         (__arm_vmlaldavxq): Remove.
18357         (__arm_vmlaldavq_p): Remove.
18358         (__arm_vmlaldavxq_p): Remove.
18359         (__arm_vmlsldavq_p): Remove.
18360         (__arm_vmlsldavxq_p): Remove.
18361
18362 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18363
18364         * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
18365         (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
18366         (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
18367         VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
18368         * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
18369         (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
18370         (mve_vmlsldavxq_s<mode>): Merge into ...
18371         (@mve_<mve_insn>q_<supf><mode>): ... this.
18372         (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
18373         (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
18374         ...
18375         (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18376
18377 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18378
18379         * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
18380         * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
18381
18382 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18383
18384         * config/arm/arm-mve-builtins-base.cc (vabavq): New.
18385         * config/arm/arm-mve-builtins-base.def (vabavq): New.
18386         * config/arm/arm-mve-builtins-base.h (vabavq): New.
18387         * config/arm/arm_mve.h (vabavq): Remove.
18388         (vabavq_p): Remove.
18389         (vabavq_s8): Remove.
18390         (vabavq_s16): Remove.
18391         (vabavq_s32): Remove.
18392         (vabavq_u8): Remove.
18393         (vabavq_u16): Remove.
18394         (vabavq_u32): Remove.
18395         (vabavq_p_s8): Remove.
18396         (vabavq_p_u8): Remove.
18397         (vabavq_p_s16): Remove.
18398         (vabavq_p_u16): Remove.
18399         (vabavq_p_s32): Remove.
18400         (vabavq_p_u32): Remove.
18401         (__arm_vabavq_s8): Remove.
18402         (__arm_vabavq_s16): Remove.
18403         (__arm_vabavq_s32): Remove.
18404         (__arm_vabavq_u8): Remove.
18405         (__arm_vabavq_u16): Remove.
18406         (__arm_vabavq_u32): Remove.
18407         (__arm_vabavq_p_s8): Remove.
18408         (__arm_vabavq_p_u8): Remove.
18409         (__arm_vabavq_p_s16): Remove.
18410         (__arm_vabavq_p_u16): Remove.
18411         (__arm_vabavq_p_s32): Remove.
18412         (__arm_vabavq_p_u32): Remove.
18413         (__arm_vabavq): Remove.
18414         (__arm_vabavq_p): Remove.
18415
18416 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18417
18418         * config/arm/iterators.md (mve_insn): Add vabav.
18419         * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
18420         (@mve_<mve_insn>q_<supf><mode>): ... this,.
18421         (mve_vabavq_p_<supf><mode>): Rename into ...
18422         (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
18423
18424 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18425
18426         * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
18427         (vmlsdavaq, vmlsdavaxq): New.
18428         * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
18429         (vmlsdavaq, vmlsdavaxq): New.
18430         * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
18431         (vmlsdavaq, vmlsdavaxq): New.
18432         * config/arm/arm_mve.h (vmladavaq): Remove.
18433         (vmlsdavaxq): Remove.
18434         (vmlsdavaq): Remove.
18435         (vmladavaxq): Remove.
18436         (vmladavaq_p): Remove.
18437         (vmladavaxq_p): Remove.
18438         (vmlsdavaq_p): Remove.
18439         (vmlsdavaxq_p): Remove.
18440         (vmladavaq_u8): Remove.
18441         (vmlsdavaxq_s8): Remove.
18442         (vmlsdavaq_s8): Remove.
18443         (vmladavaxq_s8): Remove.
18444         (vmladavaq_s8): Remove.
18445         (vmladavaq_u16): Remove.
18446         (vmlsdavaxq_s16): Remove.
18447         (vmlsdavaq_s16): Remove.
18448         (vmladavaxq_s16): Remove.
18449         (vmladavaq_s16): Remove.
18450         (vmladavaq_u32): Remove.
18451         (vmlsdavaxq_s32): Remove.
18452         (vmlsdavaq_s32): Remove.
18453         (vmladavaxq_s32): Remove.
18454         (vmladavaq_s32): Remove.
18455         (vmladavaq_p_s8): Remove.
18456         (vmladavaq_p_s32): Remove.
18457         (vmladavaq_p_s16): Remove.
18458         (vmladavaq_p_u8): Remove.
18459         (vmladavaq_p_u32): Remove.
18460         (vmladavaq_p_u16): Remove.
18461         (vmladavaxq_p_s8): Remove.
18462         (vmladavaxq_p_s32): Remove.
18463         (vmladavaxq_p_s16): Remove.
18464         (vmlsdavaq_p_s8): Remove.
18465         (vmlsdavaq_p_s32): Remove.
18466         (vmlsdavaq_p_s16): Remove.
18467         (vmlsdavaxq_p_s8): Remove.
18468         (vmlsdavaxq_p_s32): Remove.
18469         (vmlsdavaxq_p_s16): Remove.
18470         (__arm_vmladavaq_u8): Remove.
18471         (__arm_vmlsdavaxq_s8): Remove.
18472         (__arm_vmlsdavaq_s8): Remove.
18473         (__arm_vmladavaxq_s8): Remove.
18474         (__arm_vmladavaq_s8): Remove.
18475         (__arm_vmladavaq_u16): Remove.
18476         (__arm_vmlsdavaxq_s16): Remove.
18477         (__arm_vmlsdavaq_s16): Remove.
18478         (__arm_vmladavaxq_s16): Remove.
18479         (__arm_vmladavaq_s16): Remove.
18480         (__arm_vmladavaq_u32): Remove.
18481         (__arm_vmlsdavaxq_s32): Remove.
18482         (__arm_vmlsdavaq_s32): Remove.
18483         (__arm_vmladavaxq_s32): Remove.
18484         (__arm_vmladavaq_s32): Remove.
18485         (__arm_vmladavaq_p_s8): Remove.
18486         (__arm_vmladavaq_p_s32): Remove.
18487         (__arm_vmladavaq_p_s16): Remove.
18488         (__arm_vmladavaq_p_u8): Remove.
18489         (__arm_vmladavaq_p_u32): Remove.
18490         (__arm_vmladavaq_p_u16): Remove.
18491         (__arm_vmladavaxq_p_s8): Remove.
18492         (__arm_vmladavaxq_p_s32): Remove.
18493         (__arm_vmladavaxq_p_s16): Remove.
18494         (__arm_vmlsdavaq_p_s8): Remove.
18495         (__arm_vmlsdavaq_p_s32): Remove.
18496         (__arm_vmlsdavaq_p_s16): Remove.
18497         (__arm_vmlsdavaxq_p_s8): Remove.
18498         (__arm_vmlsdavaxq_p_s32): Remove.
18499         (__arm_vmlsdavaxq_p_s16): Remove.
18500         (__arm_vmladavaq): Remove.
18501         (__arm_vmlsdavaxq): Remove.
18502         (__arm_vmlsdavaq): Remove.
18503         (__arm_vmladavaxq): Remove.
18504         (__arm_vmladavaq_p): Remove.
18505         (__arm_vmladavaxq_p): Remove.
18506         (__arm_vmlsdavaq_p): Remove.
18507         (__arm_vmlsdavaxq_p): Remove.
18508
18509 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18510
18511         * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
18512         * config/arm/arm-mve-builtins-shapes.h  (binary_acca_int32): New.
18513
18514 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18515
18516         * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
18517         (vmlsdavq, vmlsdavxq): New.
18518         * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
18519         (vmlsdavq, vmlsdavxq): New.
18520         * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
18521         (vmlsdavq, vmlsdavxq): New.
18522         * config/arm/arm_mve.h (vmladavq): Remove.
18523         (vmlsdavxq): Remove.
18524         (vmlsdavq): Remove.
18525         (vmladavxq): Remove.
18526         (vmladavq_p): Remove.
18527         (vmlsdavxq_p): Remove.
18528         (vmlsdavq_p): Remove.
18529         (vmladavxq_p): Remove.
18530         (vmladavq_u8): Remove.
18531         (vmlsdavxq_s8): Remove.
18532         (vmlsdavq_s8): Remove.
18533         (vmladavxq_s8): Remove.
18534         (vmladavq_s8): Remove.
18535         (vmladavq_u16): Remove.
18536         (vmlsdavxq_s16): Remove.
18537         (vmlsdavq_s16): Remove.
18538         (vmladavxq_s16): Remove.
18539         (vmladavq_s16): Remove.
18540         (vmladavq_u32): Remove.
18541         (vmlsdavxq_s32): Remove.
18542         (vmlsdavq_s32): Remove.
18543         (vmladavxq_s32): Remove.
18544         (vmladavq_s32): Remove.
18545         (vmladavq_p_u8): Remove.
18546         (vmlsdavxq_p_s8): Remove.
18547         (vmlsdavq_p_s8): Remove.
18548         (vmladavxq_p_s8): Remove.
18549         (vmladavq_p_s8): Remove.
18550         (vmladavq_p_u16): Remove.
18551         (vmlsdavxq_p_s16): Remove.
18552         (vmlsdavq_p_s16): Remove.
18553         (vmladavxq_p_s16): Remove.
18554         (vmladavq_p_s16): Remove.
18555         (vmladavq_p_u32): Remove.
18556         (vmlsdavxq_p_s32): Remove.
18557         (vmlsdavq_p_s32): Remove.
18558         (vmladavxq_p_s32): Remove.
18559         (vmladavq_p_s32): Remove.
18560         (__arm_vmladavq_u8): Remove.
18561         (__arm_vmlsdavxq_s8): Remove.
18562         (__arm_vmlsdavq_s8): Remove.
18563         (__arm_vmladavxq_s8): Remove.
18564         (__arm_vmladavq_s8): Remove.
18565         (__arm_vmladavq_u16): Remove.
18566         (__arm_vmlsdavxq_s16): Remove.
18567         (__arm_vmlsdavq_s16): Remove.
18568         (__arm_vmladavxq_s16): Remove.
18569         (__arm_vmladavq_s16): Remove.
18570         (__arm_vmladavq_u32): Remove.
18571         (__arm_vmlsdavxq_s32): Remove.
18572         (__arm_vmlsdavq_s32): Remove.
18573         (__arm_vmladavxq_s32): Remove.
18574         (__arm_vmladavq_s32): Remove.
18575         (__arm_vmladavq_p_u8): Remove.
18576         (__arm_vmlsdavxq_p_s8): Remove.
18577         (__arm_vmlsdavq_p_s8): Remove.
18578         (__arm_vmladavxq_p_s8): Remove.
18579         (__arm_vmladavq_p_s8): Remove.
18580         (__arm_vmladavq_p_u16): Remove.
18581         (__arm_vmlsdavxq_p_s16): Remove.
18582         (__arm_vmlsdavq_p_s16): Remove.
18583         (__arm_vmladavxq_p_s16): Remove.
18584         (__arm_vmladavq_p_s16): Remove.
18585         (__arm_vmladavq_p_u32): Remove.
18586         (__arm_vmlsdavxq_p_s32): Remove.
18587         (__arm_vmlsdavq_p_s32): Remove.
18588         (__arm_vmladavxq_p_s32): Remove.
18589         (__arm_vmladavq_p_s32): Remove.
18590         (__arm_vmladavq): Remove.
18591         (__arm_vmlsdavxq): Remove.
18592         (__arm_vmlsdavq): Remove.
18593         (__arm_vmladavxq): Remove.
18594         (__arm_vmladavq_p): Remove.
18595         (__arm_vmlsdavxq_p): Remove.
18596         (__arm_vmlsdavq_p): Remove.
18597         (__arm_vmladavxq_p): Remove.
18598
18599 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18600
18601         * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
18602         (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
18603         (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
18604         vmlsdavax, vmlsdav, vmlsdavx.
18605         (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
18606         VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
18607         VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
18608         VMLSDAVXQ_S.
18609         * config/arm/mve.md (mve_vmladavq_<supf><mode>)
18610         (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
18611         (mve_vmlsdavxq_s<mode>): Merge into ...
18612         (@mve_<mve_insn>q_<supf><mode>): ... this.
18613         (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
18614         (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
18615         ...
18616         (@mve_<mve_insn>q_<supf><mode>): ... this.
18617         (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
18618         (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
18619         (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18620         (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
18621         (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
18622         ...
18623         (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18624
18625 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18626
18627         * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
18628         * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
18629
18630 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18631
18632         * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
18633         * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
18634         * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
18635         * config/arm/arm_mve.h (vaddlvaq): Remove.
18636         (vaddlvaq_p): Remove.
18637         (vaddlvaq_u32): Remove.
18638         (vaddlvaq_s32): Remove.
18639         (vaddlvaq_p_s32): Remove.
18640         (vaddlvaq_p_u32): Remove.
18641         (__arm_vaddlvaq_u32): Remove.
18642         (__arm_vaddlvaq_s32): Remove.
18643         (__arm_vaddlvaq_p_s32): Remove.
18644         (__arm_vaddlvaq_p_u32): Remove.
18645         (__arm_vaddlvaq): Remove.
18646         (__arm_vaddlvaq_p): Remove.
18647
18648 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18649
18650         * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
18651         * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
18652
18653 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18654
18655         * config/arm/iterators.md (mve_insn): Add vaddlva.
18656         * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
18657         (@mve_<mve_insn>q_<supf>v4si): ... this.
18658         (mve_vaddlvaq_p_<supf>v4si): Rename into ...
18659         (@mve_<mve_insn>q_p_<supf>v4si): ... this.
18660
18661 2023-05-11  Uros Bizjak  <ubizjak@gmail.com>
18662
18663         PR target/109807
18664         * config/i386/i386.cc (ix86_widen_mult_cost):
18665         Handle V4HImode and V2SImode.
18666
18667 2023-05-11  Andrew Pinski  <apinski@marvell.com>
18668
18669         * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
18670         defined by a phi node with more than one uses, allow for the
18671         only uses are in that same defining statement.
18672
18673 2023-05-11  Robin Dapp  <rdapp@ventanamicro.com>
18674
18675         * config/riscv/riscv.cc (riscv_const_insns): Add permissible
18676         vector constants.
18677
18678 2023-05-11  Pan Li  <pan2.li@intel.com>
18679
18680         * config/riscv/vector.md: Add comments for simplifying to vmset.
18681
18682 2023-05-11  Robin Dapp  <rdapp@ventanamicro.com>
18683
18684         * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
18685         pattern.
18686         (v<optab><mode>3): Add vector shift pattern.
18687         * config/riscv/vector-iterators.md: New iterator.
18688
18689 2023-05-11  Robin Dapp  <rdapp@ventanamicro.com>
18690
18691         * config/riscv/autovec.md: Use renamed functions.
18692         * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
18693         (emit_vlmax_reg_op): To this.
18694         (emit_nonvlmax_op): Rename.
18695         (emit_len_op): To this.
18696         (emit_nonvlmax_binop): Rename.
18697         (emit_len_binop): To this.
18698         * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
18699         (emit_pred_binop): Remove vlmax_p.
18700         (emit_vlmax_op): Rename.
18701         (emit_vlmax_reg_op): To this.
18702         (emit_nonvlmax_op): Rename.
18703         (emit_len_op): To this.
18704         (emit_nonvlmax_binop): Rename.
18705         (emit_len_binop): To this.
18706         (sew64_scalar_helper): Use renamed functions.
18707         (expand_tuple_move): Use renamed functions.
18708         * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
18709         renamed functions.
18710         * config/riscv/vector.md: Use renamed functions.
18711
18712 2023-05-11  Robin Dapp  <rdapp@ventanamicro.com>
18713             Michael Collison  <collison@rivosinc.com>
18714
18715         * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
18716         * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
18717         * config/riscv/riscv-v.cc (emit_pred_op): New function.
18718         (set_expander_dest_and_mask): New function.
18719         (emit_pred_binop): New function.
18720         (emit_nonvlmax_binop): New function.
18721
18722 2023-05-11  Pan Li  <pan2.li@intel.com>
18723
18724         * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
18725         * gimple-loop-interchange.cc
18726         (tree_loop_interchange::map_inductions_to_loop): Ditto.
18727         * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
18728         * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
18729         * tree-ssa-loop-manip.cc (create_iv): Ditto.
18730         (tree_transform_and_unroll_loop): Ditto.
18731         (canonicalize_loop_ivs): Ditto.
18732         * tree-ssa-loop-manip.h (create_iv): Ditto.
18733         * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
18734         * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
18735         Ditto.
18736         (vect_set_loop_condition_normal): Ditto.
18737         * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
18738         * tree-vect-stmts.cc (vectorizable_store): Ditto.
18739         (vectorizable_load): Ditto.
18740
18741 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18742
18743         * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
18744         * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
18745         * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
18746         * config/arm/arm_mve.h (vmovlbq): Remove.
18747         (vmovltq): Remove.
18748         (vmovlbq_m): Remove.
18749         (vmovltq_m): Remove.
18750         (vmovlbq_x): Remove.
18751         (vmovltq_x): Remove.
18752         (vmovlbq_s8): Remove.
18753         (vmovlbq_s16): Remove.
18754         (vmovltq_s8): Remove.
18755         (vmovltq_s16): Remove.
18756         (vmovltq_u8): Remove.
18757         (vmovltq_u16): Remove.
18758         (vmovlbq_u8): Remove.
18759         (vmovlbq_u16): Remove.
18760         (vmovlbq_m_s8): Remove.
18761         (vmovltq_m_s8): Remove.
18762         (vmovlbq_m_u8): Remove.
18763         (vmovltq_m_u8): Remove.
18764         (vmovlbq_m_s16): Remove.
18765         (vmovltq_m_s16): Remove.
18766         (vmovlbq_m_u16): Remove.
18767         (vmovltq_m_u16): Remove.
18768         (vmovlbq_x_s8): Remove.
18769         (vmovlbq_x_s16): Remove.
18770         (vmovlbq_x_u8): Remove.
18771         (vmovlbq_x_u16): Remove.
18772         (vmovltq_x_s8): Remove.
18773         (vmovltq_x_s16): Remove.
18774         (vmovltq_x_u8): Remove.
18775         (vmovltq_x_u16): Remove.
18776         (__arm_vmovlbq_s8): Remove.
18777         (__arm_vmovlbq_s16): Remove.
18778         (__arm_vmovltq_s8): Remove.
18779         (__arm_vmovltq_s16): Remove.
18780         (__arm_vmovltq_u8): Remove.
18781         (__arm_vmovltq_u16): Remove.
18782         (__arm_vmovlbq_u8): Remove.
18783         (__arm_vmovlbq_u16): Remove.
18784         (__arm_vmovlbq_m_s8): Remove.
18785         (__arm_vmovltq_m_s8): Remove.
18786         (__arm_vmovlbq_m_u8): Remove.
18787         (__arm_vmovltq_m_u8): Remove.
18788         (__arm_vmovlbq_m_s16): Remove.
18789         (__arm_vmovltq_m_s16): Remove.
18790         (__arm_vmovlbq_m_u16): Remove.
18791         (__arm_vmovltq_m_u16): Remove.
18792         (__arm_vmovlbq_x_s8): Remove.
18793         (__arm_vmovlbq_x_s16): Remove.
18794         (__arm_vmovlbq_x_u8): Remove.
18795         (__arm_vmovlbq_x_u16): Remove.
18796         (__arm_vmovltq_x_s8): Remove.
18797         (__arm_vmovltq_x_s16): Remove.
18798         (__arm_vmovltq_x_u8): Remove.
18799         (__arm_vmovltq_x_u16): Remove.
18800         (__arm_vmovlbq): Remove.
18801         (__arm_vmovltq): Remove.
18802         (__arm_vmovlbq_m): Remove.
18803         (__arm_vmovltq_m): Remove.
18804         (__arm_vmovlbq_x): Remove.
18805         (__arm_vmovltq_x): Remove.
18806
18807 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18808
18809         * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
18810         * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
18811
18812 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18813
18814         * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
18815         (VMOVLBQ, VMOVLTQ): Merge into ...
18816         (VMOVLxQ): ... this.
18817         (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
18818         (VMOVLxQ_M): ... this.
18819         * config/arm/mve.md (mve_vmovltq_<supf><mode>)
18820         (mve_vmovlbq_<supf><mode>): Merge into ...
18821         (@mve_<mve_insn>q_<supf><mode>): ... this.
18822         (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
18823         into ...
18824         (@mve_<mve_insn>q_m_<supf><mode>): ... this.
18825
18826 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18827
18828         * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
18829         * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
18830         * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
18831         * config/arm/arm-mve-builtins-functions.h
18832         (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
18833         * config/arm/arm_mve.h (vaddlvq): Remove.
18834         (vaddlvq_p): Remove.
18835         (vaddlvq_s32): Remove.
18836         (vaddlvq_u32): Remove.
18837         (vaddlvq_p_s32): Remove.
18838         (vaddlvq_p_u32): Remove.
18839         (__arm_vaddlvq_s32): Remove.
18840         (__arm_vaddlvq_u32): Remove.
18841         (__arm_vaddlvq_p_s32): Remove.
18842         (__arm_vaddlvq_p_u32): Remove.
18843         (__arm_vaddlvq): Remove.
18844         (__arm_vaddlvq_p): Remove.
18845
18846 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18847
18848         * config/arm/iterators.md (mve_insn): Add vaddlv.
18849         * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
18850         (@mve_<mve_insn>q_<supf>v4si): ... this.
18851         (mve_vaddlvq_p_<supf>v4si): Rename into ...
18852         (@mve_<mve_insn>q_p_<supf>v4si): ... this.
18853
18854 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18855
18856         * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
18857         * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
18858
18859 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18860
18861         * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
18862         * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
18863         * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
18864         * config/arm/arm_mve.h (vaddvaq): Remove.
18865         (vaddvaq_p): Remove.
18866         (vaddvaq_u8): Remove.
18867         (vaddvaq_s8): Remove.
18868         (vaddvaq_u16): Remove.
18869         (vaddvaq_s16): Remove.
18870         (vaddvaq_u32): Remove.
18871         (vaddvaq_s32): Remove.
18872         (vaddvaq_p_u8): Remove.
18873         (vaddvaq_p_s8): Remove.
18874         (vaddvaq_p_u16): Remove.
18875         (vaddvaq_p_s16): Remove.
18876         (vaddvaq_p_u32): Remove.
18877         (vaddvaq_p_s32): Remove.
18878         (__arm_vaddvaq_u8): Remove.
18879         (__arm_vaddvaq_s8): Remove.
18880         (__arm_vaddvaq_u16): Remove.
18881         (__arm_vaddvaq_s16): Remove.
18882         (__arm_vaddvaq_u32): Remove.
18883         (__arm_vaddvaq_s32): Remove.
18884         (__arm_vaddvaq_p_u8): Remove.
18885         (__arm_vaddvaq_p_s8): Remove.
18886         (__arm_vaddvaq_p_u16): Remove.
18887         (__arm_vaddvaq_p_s16): Remove.
18888         (__arm_vaddvaq_p_u32): Remove.
18889         (__arm_vaddvaq_p_s32): Remove.
18890         (__arm_vaddvaq): Remove.
18891         (__arm_vaddvaq_p): Remove.
18892
18893 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18894
18895         * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
18896         * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
18897
18898 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18899
18900         * config/arm/iterators.md (mve_insn): Add vaddva.
18901         * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
18902         (@mve_<mve_insn>q_<supf><mode>): ... this.
18903         (mve_vaddvaq_p_<supf><mode>): Rename into ...
18904         (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18905
18906 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18907
18908         * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
18909         * config/arm/arm-mve-builtins-base.def (vaddvq): New.
18910         * config/arm/arm-mve-builtins-base.h (vaddvq): New.
18911         * config/arm/arm_mve.h (vaddvq): Remove.
18912         (vaddvq_p): Remove.
18913         (vaddvq_s8): Remove.
18914         (vaddvq_s16): Remove.
18915         (vaddvq_s32): Remove.
18916         (vaddvq_u8): Remove.
18917         (vaddvq_u16): Remove.
18918         (vaddvq_u32): Remove.
18919         (vaddvq_p_u8): Remove.
18920         (vaddvq_p_s8): Remove.
18921         (vaddvq_p_u16): Remove.
18922         (vaddvq_p_s16): Remove.
18923         (vaddvq_p_u32): Remove.
18924         (vaddvq_p_s32): Remove.
18925         (__arm_vaddvq_s8): Remove.
18926         (__arm_vaddvq_s16): Remove.
18927         (__arm_vaddvq_s32): Remove.
18928         (__arm_vaddvq_u8): Remove.
18929         (__arm_vaddvq_u16): Remove.
18930         (__arm_vaddvq_u32): Remove.
18931         (__arm_vaddvq_p_u8): Remove.
18932         (__arm_vaddvq_p_s8): Remove.
18933         (__arm_vaddvq_p_u16): Remove.
18934         (__arm_vaddvq_p_s16): Remove.
18935         (__arm_vaddvq_p_u32): Remove.
18936         (__arm_vaddvq_p_s32): Remove.
18937         (__arm_vaddvq): Remove.
18938         (__arm_vaddvq_p): Remove.
18939
18940 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18941
18942         * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
18943         * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
18944
18945 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18946
18947         * config/arm/iterators.md (mve_insn): Add vaddv.
18948         * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
18949         (@mve_<mve_insn>q_<supf><mode>): ... this.
18950         (mve_vaddvq_p_<supf><mode>): Rename into ...
18951         (@mve_<mve_insn>q_p_<supf><mode>): ... this.
18952         * config/arm/vec-common.md: Use gen_mve_q instead of
18953         gen_mve_vaddvq.
18954
18955 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
18956
18957         * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
18958         (vdupq): New.
18959         * config/arm/arm-mve-builtins-base.def (vdupq): New.
18960         * config/arm/arm-mve-builtins-base.h: (vdupq): New.
18961         * config/arm/arm_mve.h (vdupq_n): Remove.
18962         (vdupq_m): Remove.
18963         (vdupq_n_f16): Remove.
18964         (vdupq_n_f32): Remove.
18965         (vdupq_n_s8): Remove.
18966         (vdupq_n_s16): Remove.
18967         (vdupq_n_s32): Remove.
18968         (vdupq_n_u8): Remove.
18969         (vdupq_n_u16): Remove.
18970         (vdupq_n_u32): Remove.
18971         (vdupq_m_n_u8): Remove.
18972         (vdupq_m_n_s8): Remove.
18973         (vdupq_m_n_u16): Remove.
18974         (vdupq_m_n_s16): Remove.
18975         (vdupq_m_n_u32): Remove.
18976         (vdupq_m_n_s32): Remove.
18977         (vdupq_m_n_f16): Remove.
18978         (vdupq_m_n_f32): Remove.
18979         (vdupq_x_n_s8): Remove.
18980         (vdupq_x_n_s16): Remove.
18981         (vdupq_x_n_s32): Remove.
18982         (vdupq_x_n_u8): Remove.
18983         (vdupq_x_n_u16): Remove.
18984         (vdupq_x_n_u32): Remove.
18985         (vdupq_x_n_f16): Remove.
18986         (vdupq_x_n_f32): Remove.
18987         (__arm_vdupq_n_s8): Remove.
18988         (__arm_vdupq_n_s16): Remove.
18989         (__arm_vdupq_n_s32): Remove.
18990         (__arm_vdupq_n_u8): Remove.
18991         (__arm_vdupq_n_u16): Remove.
18992         (__arm_vdupq_n_u32): Remove.
18993         (__arm_vdupq_m_n_u8): Remove.
18994         (__arm_vdupq_m_n_s8): Remove.
18995         (__arm_vdupq_m_n_u16): Remove.
18996         (__arm_vdupq_m_n_s16): Remove.
18997         (__arm_vdupq_m_n_u32): Remove.
18998         (__arm_vdupq_m_n_s32): Remove.
18999         (__arm_vdupq_x_n_s8): Remove.
19000         (__arm_vdupq_x_n_s16): Remove.
19001         (__arm_vdupq_x_n_s32): Remove.
19002         (__arm_vdupq_x_n_u8): Remove.
19003         (__arm_vdupq_x_n_u16): Remove.
19004         (__arm_vdupq_x_n_u32): Remove.
19005         (__arm_vdupq_n_f16): Remove.
19006         (__arm_vdupq_n_f32): Remove.
19007         (__arm_vdupq_m_n_f16): Remove.
19008         (__arm_vdupq_m_n_f32): Remove.
19009         (__arm_vdupq_x_n_f16): Remove.
19010         (__arm_vdupq_x_n_f32): Remove.
19011         (__arm_vdupq_n): Remove.
19012         (__arm_vdupq_m): Remove.
19013
19014 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
19015
19016         * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
19017         * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
19018
19019 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
19020
19021         * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
19022         (MVE_FP_N_VDUPQ_ONLY): New.
19023         (mve_insn): Add vdupq.
19024         * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
19025         (@mve_<mve_insn>q_n_f<mode>): ... this.
19026         (mve_vdupq_n_<supf><mode>): Rename into ...
19027         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19028         (mve_vdupq_m_n_<supf><mode>): Rename into ...
19029         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19030         (mve_vdupq_m_n_f<mode>): Rename into ...
19031         (@mve_<mve_insn>q_m_n_f<mode>): ... this.
19032
19033 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
19034
19035         * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
19036         New.
19037         * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
19038         (vrev64q): New.
19039         * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
19040         (vrev64q): New.
19041         * config/arm/arm_mve.h (vrev16q): Remove.
19042         (vrev32q): Remove.
19043         (vrev64q): Remove.
19044         (vrev64q_m): Remove.
19045         (vrev16q_m): Remove.
19046         (vrev32q_m): Remove.
19047         (vrev16q_x): Remove.
19048         (vrev32q_x): Remove.
19049         (vrev64q_x): Remove.
19050         (vrev64q_f16): Remove.
19051         (vrev64q_f32): Remove.
19052         (vrev32q_f16): Remove.
19053         (vrev16q_s8): Remove.
19054         (vrev32q_s8): Remove.
19055         (vrev32q_s16): Remove.
19056         (vrev64q_s8): Remove.
19057         (vrev64q_s16): Remove.
19058         (vrev64q_s32): Remove.
19059         (vrev64q_u8): Remove.
19060         (vrev64q_u16): Remove.
19061         (vrev64q_u32): Remove.
19062         (vrev32q_u8): Remove.
19063         (vrev32q_u16): Remove.
19064         (vrev16q_u8): Remove.
19065         (vrev64q_m_u8): Remove.
19066         (vrev64q_m_s8): Remove.
19067         (vrev64q_m_u16): Remove.
19068         (vrev64q_m_s16): Remove.
19069         (vrev64q_m_u32): Remove.
19070         (vrev64q_m_s32): Remove.
19071         (vrev16q_m_s8): Remove.
19072         (vrev32q_m_f16): Remove.
19073         (vrev16q_m_u8): Remove.
19074         (vrev32q_m_s8): Remove.
19075         (vrev64q_m_f16): Remove.
19076         (vrev32q_m_u8): Remove.
19077         (vrev32q_m_s16): Remove.
19078         (vrev64q_m_f32): Remove.
19079         (vrev32q_m_u16): Remove.
19080         (vrev16q_x_s8): Remove.
19081         (vrev16q_x_u8): Remove.
19082         (vrev32q_x_s8): Remove.
19083         (vrev32q_x_s16): Remove.
19084         (vrev32q_x_u8): Remove.
19085         (vrev32q_x_u16): Remove.
19086         (vrev64q_x_s8): Remove.
19087         (vrev64q_x_s16): Remove.
19088         (vrev64q_x_s32): Remove.
19089         (vrev64q_x_u8): Remove.
19090         (vrev64q_x_u16): Remove.
19091         (vrev64q_x_u32): Remove.
19092         (vrev32q_x_f16): Remove.
19093         (vrev64q_x_f16): Remove.
19094         (vrev64q_x_f32): Remove.
19095         (__arm_vrev16q_s8): Remove.
19096         (__arm_vrev32q_s8): Remove.
19097         (__arm_vrev32q_s16): Remove.
19098         (__arm_vrev64q_s8): Remove.
19099         (__arm_vrev64q_s16): Remove.
19100         (__arm_vrev64q_s32): Remove.
19101         (__arm_vrev64q_u8): Remove.
19102         (__arm_vrev64q_u16): Remove.
19103         (__arm_vrev64q_u32): Remove.
19104         (__arm_vrev32q_u8): Remove.
19105         (__arm_vrev32q_u16): Remove.
19106         (__arm_vrev16q_u8): Remove.
19107         (__arm_vrev64q_m_u8): Remove.
19108         (__arm_vrev64q_m_s8): Remove.
19109         (__arm_vrev64q_m_u16): Remove.
19110         (__arm_vrev64q_m_s16): Remove.
19111         (__arm_vrev64q_m_u32): Remove.
19112         (__arm_vrev64q_m_s32): Remove.
19113         (__arm_vrev16q_m_s8): Remove.
19114         (__arm_vrev16q_m_u8): Remove.
19115         (__arm_vrev32q_m_s8): Remove.
19116         (__arm_vrev32q_m_u8): Remove.
19117         (__arm_vrev32q_m_s16): Remove.
19118         (__arm_vrev32q_m_u16): Remove.
19119         (__arm_vrev16q_x_s8): Remove.
19120         (__arm_vrev16q_x_u8): Remove.
19121         (__arm_vrev32q_x_s8): Remove.
19122         (__arm_vrev32q_x_s16): Remove.
19123         (__arm_vrev32q_x_u8): Remove.
19124         (__arm_vrev32q_x_u16): Remove.
19125         (__arm_vrev64q_x_s8): Remove.
19126         (__arm_vrev64q_x_s16): Remove.
19127         (__arm_vrev64q_x_s32): Remove.
19128         (__arm_vrev64q_x_u8): Remove.
19129         (__arm_vrev64q_x_u16): Remove.
19130         (__arm_vrev64q_x_u32): Remove.
19131         (__arm_vrev64q_f16): Remove.
19132         (__arm_vrev64q_f32): Remove.
19133         (__arm_vrev32q_f16): Remove.
19134         (__arm_vrev32q_m_f16): Remove.
19135         (__arm_vrev64q_m_f16): Remove.
19136         (__arm_vrev64q_m_f32): Remove.
19137         (__arm_vrev32q_x_f16): Remove.
19138         (__arm_vrev64q_x_f16): Remove.
19139         (__arm_vrev64q_x_f32): Remove.
19140         (__arm_vrev16q): Remove.
19141         (__arm_vrev32q): Remove.
19142         (__arm_vrev64q): Remove.
19143         (__arm_vrev64q_m): Remove.
19144         (__arm_vrev16q_m): Remove.
19145         (__arm_vrev32q_m): Remove.
19146         (__arm_vrev16q_x): Remove.
19147         (__arm_vrev32q_x): Remove.
19148         (__arm_vrev64q_x): Remove.
19149
19150 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
19151
19152         * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
19153         (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
19154         (MVE_FP_M_VREV32Q_ONLY): New iterators.
19155         (mve_insn): Add vrev16q, vrev32q, vrev64q.
19156         * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
19157         (@mve_<mve_insn>q_f<mode>): ... this
19158         (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
19159         (mve_vrev64q_<supf><mode>): Rename into ...
19160         (@mve_<mve_insn>q_<supf><mode>): ... this.
19161         (mve_vrev32q_<supf><mode>): Rename into
19162         @mve_<mve_insn>q_<supf><mode>.
19163         (mve_vrev16q_<supf>v16qi): Rename into
19164         @mve_<mve_insn>q_<supf><mode>.
19165         (mve_vrev64q_m_<supf><mode>): Rename into
19166         @mve_<mve_insn>q_m_<supf><mode>.
19167         (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
19168         (mve_vrev32q_m_<supf><mode>): Rename into
19169         @mve_<mve_insn>q_m_<supf><mode>.
19170         (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
19171         (mve_vrev16q_m_<supf>v16qi): Rename into
19172         @mve_<mve_insn>q_m_<supf><mode>.
19173
19174 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
19175
19176         * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
19177         (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
19178         * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
19179         (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
19180         * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
19181         (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
19182         * config/arm/arm-mve-builtins-functions.h (class
19183         unspec_based_mve_function_exact_insn_vcmp): New.
19184         * config/arm/arm-mve-builtins.cc
19185         (function_instance::has_inactive_argument): Handle vcmp.
19186         * config/arm/arm_mve.h (vcmpneq): Remove.
19187         (vcmphiq): Remove.
19188         (vcmpeqq): Remove.
19189         (vcmpcsq): Remove.
19190         (vcmpltq): Remove.
19191         (vcmpleq): Remove.
19192         (vcmpgtq): Remove.
19193         (vcmpgeq): Remove.
19194         (vcmpneq_m): Remove.
19195         (vcmphiq_m): Remove.
19196         (vcmpeqq_m): Remove.
19197         (vcmpcsq_m): Remove.
19198         (vcmpcsq_m_n): Remove.
19199         (vcmpltq_m): Remove.
19200         (vcmpleq_m): Remove.
19201         (vcmpgtq_m): Remove.
19202         (vcmpgeq_m): Remove.
19203         (vcmpneq_s8): Remove.
19204         (vcmpneq_s16): Remove.
19205         (vcmpneq_s32): Remove.
19206         (vcmpneq_u8): Remove.
19207         (vcmpneq_u16): Remove.
19208         (vcmpneq_u32): Remove.
19209         (vcmpneq_n_u8): Remove.
19210         (vcmphiq_u8): Remove.
19211         (vcmphiq_n_u8): Remove.
19212         (vcmpeqq_u8): Remove.
19213         (vcmpeqq_n_u8): Remove.
19214         (vcmpcsq_u8): Remove.
19215         (vcmpcsq_n_u8): Remove.
19216         (vcmpneq_n_s8): Remove.
19217         (vcmpltq_s8): Remove.
19218         (vcmpltq_n_s8): Remove.
19219         (vcmpleq_s8): Remove.
19220         (vcmpleq_n_s8): Remove.
19221         (vcmpgtq_s8): Remove.
19222         (vcmpgtq_n_s8): Remove.
19223         (vcmpgeq_s8): Remove.
19224         (vcmpgeq_n_s8): Remove.
19225         (vcmpeqq_s8): Remove.
19226         (vcmpeqq_n_s8): Remove.
19227         (vcmpneq_n_u16): Remove.
19228         (vcmphiq_u16): Remove.
19229         (vcmphiq_n_u16): Remove.
19230         (vcmpeqq_u16): Remove.
19231         (vcmpeqq_n_u16): Remove.
19232         (vcmpcsq_u16): Remove.
19233         (vcmpcsq_n_u16): Remove.
19234         (vcmpneq_n_s16): Remove.
19235         (vcmpltq_s16): Remove.
19236         (vcmpltq_n_s16): Remove.
19237         (vcmpleq_s16): Remove.
19238         (vcmpleq_n_s16): Remove.
19239         (vcmpgtq_s16): Remove.
19240         (vcmpgtq_n_s16): Remove.
19241         (vcmpgeq_s16): Remove.
19242         (vcmpgeq_n_s16): Remove.
19243         (vcmpeqq_s16): Remove.
19244         (vcmpeqq_n_s16): Remove.
19245         (vcmpneq_n_u32): Remove.
19246         (vcmphiq_u32): Remove.
19247         (vcmphiq_n_u32): Remove.
19248         (vcmpeqq_u32): Remove.
19249         (vcmpeqq_n_u32): Remove.
19250         (vcmpcsq_u32): Remove.
19251         (vcmpcsq_n_u32): Remove.
19252         (vcmpneq_n_s32): Remove.
19253         (vcmpltq_s32): Remove.
19254         (vcmpltq_n_s32): Remove.
19255         (vcmpleq_s32): Remove.
19256         (vcmpleq_n_s32): Remove.
19257         (vcmpgtq_s32): Remove.
19258         (vcmpgtq_n_s32): Remove.
19259         (vcmpgeq_s32): Remove.
19260         (vcmpgeq_n_s32): Remove.
19261         (vcmpeqq_s32): Remove.
19262         (vcmpeqq_n_s32): Remove.
19263         (vcmpneq_n_f16): Remove.
19264         (vcmpneq_f16): Remove.
19265         (vcmpltq_n_f16): Remove.
19266         (vcmpltq_f16): Remove.
19267         (vcmpleq_n_f16): Remove.
19268         (vcmpleq_f16): Remove.
19269         (vcmpgtq_n_f16): Remove.
19270         (vcmpgtq_f16): Remove.
19271         (vcmpgeq_n_f16): Remove.
19272         (vcmpgeq_f16): Remove.
19273         (vcmpeqq_n_f16): Remove.
19274         (vcmpeqq_f16): Remove.
19275         (vcmpneq_n_f32): Remove.
19276         (vcmpneq_f32): Remove.
19277         (vcmpltq_n_f32): Remove.
19278         (vcmpltq_f32): Remove.
19279         (vcmpleq_n_f32): Remove.
19280         (vcmpleq_f32): Remove.
19281         (vcmpgtq_n_f32): Remove.
19282         (vcmpgtq_f32): Remove.
19283         (vcmpgeq_n_f32): Remove.
19284         (vcmpgeq_f32): Remove.
19285         (vcmpeqq_n_f32): Remove.
19286         (vcmpeqq_f32): Remove.
19287         (vcmpeqq_m_f16): Remove.
19288         (vcmpeqq_m_f32): Remove.
19289         (vcmpneq_m_u8): Remove.
19290         (vcmpneq_m_n_u8): Remove.
19291         (vcmphiq_m_u8): Remove.
19292         (vcmphiq_m_n_u8): Remove.
19293         (vcmpeqq_m_u8): Remove.
19294         (vcmpeqq_m_n_u8): Remove.
19295         (vcmpcsq_m_u8): Remove.
19296         (vcmpcsq_m_n_u8): Remove.
19297         (vcmpneq_m_s8): Remove.
19298         (vcmpneq_m_n_s8): Remove.
19299         (vcmpltq_m_s8): Remove.
19300         (vcmpltq_m_n_s8): Remove.
19301         (vcmpleq_m_s8): Remove.
19302         (vcmpleq_m_n_s8): Remove.
19303         (vcmpgtq_m_s8): Remove.
19304         (vcmpgtq_m_n_s8): Remove.
19305         (vcmpgeq_m_s8): Remove.
19306         (vcmpgeq_m_n_s8): Remove.
19307         (vcmpeqq_m_s8): Remove.
19308         (vcmpeqq_m_n_s8): Remove.
19309         (vcmpneq_m_u16): Remove.
19310         (vcmpneq_m_n_u16): Remove.
19311         (vcmphiq_m_u16): Remove.
19312         (vcmphiq_m_n_u16): Remove.
19313         (vcmpeqq_m_u16): Remove.
19314         (vcmpeqq_m_n_u16): Remove.
19315         (vcmpcsq_m_u16): Remove.
19316         (vcmpcsq_m_n_u16): Remove.
19317         (vcmpneq_m_s16): Remove.
19318         (vcmpneq_m_n_s16): Remove.
19319         (vcmpltq_m_s16): Remove.
19320         (vcmpltq_m_n_s16): Remove.
19321         (vcmpleq_m_s16): Remove.
19322         (vcmpleq_m_n_s16): Remove.
19323         (vcmpgtq_m_s16): Remove.
19324         (vcmpgtq_m_n_s16): Remove.
19325         (vcmpgeq_m_s16): Remove.
19326         (vcmpgeq_m_n_s16): Remove.
19327         (vcmpeqq_m_s16): Remove.
19328         (vcmpeqq_m_n_s16): Remove.
19329         (vcmpneq_m_u32): Remove.
19330         (vcmpneq_m_n_u32): Remove.
19331         (vcmphiq_m_u32): Remove.
19332         (vcmphiq_m_n_u32): Remove.
19333         (vcmpeqq_m_u32): Remove.
19334         (vcmpeqq_m_n_u32): Remove.
19335         (vcmpcsq_m_u32): Remove.
19336         (vcmpcsq_m_n_u32): Remove.
19337         (vcmpneq_m_s32): Remove.
19338         (vcmpneq_m_n_s32): Remove.
19339         (vcmpltq_m_s32): Remove.
19340         (vcmpltq_m_n_s32): Remove.
19341         (vcmpleq_m_s32): Remove.
19342         (vcmpleq_m_n_s32): Remove.
19343         (vcmpgtq_m_s32): Remove.
19344         (vcmpgtq_m_n_s32): Remove.
19345         (vcmpgeq_m_s32): Remove.
19346         (vcmpgeq_m_n_s32): Remove.
19347         (vcmpeqq_m_s32): Remove.
19348         (vcmpeqq_m_n_s32): Remove.
19349         (vcmpeqq_m_n_f16): Remove.
19350         (vcmpgeq_m_f16): Remove.
19351         (vcmpgeq_m_n_f16): Remove.
19352         (vcmpgtq_m_f16): Remove.
19353         (vcmpgtq_m_n_f16): Remove.
19354         (vcmpleq_m_f16): Remove.
19355         (vcmpleq_m_n_f16): Remove.
19356         (vcmpltq_m_f16): Remove.
19357         (vcmpltq_m_n_f16): Remove.
19358         (vcmpneq_m_f16): Remove.
19359         (vcmpneq_m_n_f16): Remove.
19360         (vcmpeqq_m_n_f32): Remove.
19361         (vcmpgeq_m_f32): Remove.
19362         (vcmpgeq_m_n_f32): Remove.
19363         (vcmpgtq_m_f32): Remove.
19364         (vcmpgtq_m_n_f32): Remove.
19365         (vcmpleq_m_f32): Remove.
19366         (vcmpleq_m_n_f32): Remove.
19367         (vcmpltq_m_f32): Remove.
19368         (vcmpltq_m_n_f32): Remove.
19369         (vcmpneq_m_f32): Remove.
19370         (vcmpneq_m_n_f32): Remove.
19371         (__arm_vcmpneq_s8): Remove.
19372         (__arm_vcmpneq_s16): Remove.
19373         (__arm_vcmpneq_s32): Remove.
19374         (__arm_vcmpneq_u8): Remove.
19375         (__arm_vcmpneq_u16): Remove.
19376         (__arm_vcmpneq_u32): Remove.
19377         (__arm_vcmpneq_n_u8): Remove.
19378         (__arm_vcmphiq_u8): Remove.
19379         (__arm_vcmphiq_n_u8): Remove.
19380         (__arm_vcmpeqq_u8): Remove.
19381         (__arm_vcmpeqq_n_u8): Remove.
19382         (__arm_vcmpcsq_u8): Remove.
19383         (__arm_vcmpcsq_n_u8): Remove.
19384         (__arm_vcmpneq_n_s8): Remove.
19385         (__arm_vcmpltq_s8): Remove.
19386         (__arm_vcmpltq_n_s8): Remove.
19387         (__arm_vcmpleq_s8): Remove.
19388         (__arm_vcmpleq_n_s8): Remove.
19389         (__arm_vcmpgtq_s8): Remove.
19390         (__arm_vcmpgtq_n_s8): Remove.
19391         (__arm_vcmpgeq_s8): Remove.
19392         (__arm_vcmpgeq_n_s8): Remove.
19393         (__arm_vcmpeqq_s8): Remove.
19394         (__arm_vcmpeqq_n_s8): Remove.
19395         (__arm_vcmpneq_n_u16): Remove.
19396         (__arm_vcmphiq_u16): Remove.
19397         (__arm_vcmphiq_n_u16): Remove.
19398         (__arm_vcmpeqq_u16): Remove.
19399         (__arm_vcmpeqq_n_u16): Remove.
19400         (__arm_vcmpcsq_u16): Remove.
19401         (__arm_vcmpcsq_n_u16): Remove.
19402         (__arm_vcmpneq_n_s16): Remove.
19403         (__arm_vcmpltq_s16): Remove.
19404         (__arm_vcmpltq_n_s16): Remove.
19405         (__arm_vcmpleq_s16): Remove.
19406         (__arm_vcmpleq_n_s16): Remove.
19407         (__arm_vcmpgtq_s16): Remove.
19408         (__arm_vcmpgtq_n_s16): Remove.
19409         (__arm_vcmpgeq_s16): Remove.
19410         (__arm_vcmpgeq_n_s16): Remove.
19411         (__arm_vcmpeqq_s16): Remove.
19412         (__arm_vcmpeqq_n_s16): Remove.
19413         (__arm_vcmpneq_n_u32): Remove.
19414         (__arm_vcmphiq_u32): Remove.
19415         (__arm_vcmphiq_n_u32): Remove.
19416         (__arm_vcmpeqq_u32): Remove.
19417         (__arm_vcmpeqq_n_u32): Remove.
19418         (__arm_vcmpcsq_u32): Remove.
19419         (__arm_vcmpcsq_n_u32): Remove.
19420         (__arm_vcmpneq_n_s32): Remove.
19421         (__arm_vcmpltq_s32): Remove.
19422         (__arm_vcmpltq_n_s32): Remove.
19423         (__arm_vcmpleq_s32): Remove.
19424         (__arm_vcmpleq_n_s32): Remove.
19425         (__arm_vcmpgtq_s32): Remove.
19426         (__arm_vcmpgtq_n_s32): Remove.
19427         (__arm_vcmpgeq_s32): Remove.
19428         (__arm_vcmpgeq_n_s32): Remove.
19429         (__arm_vcmpeqq_s32): Remove.
19430         (__arm_vcmpeqq_n_s32): Remove.
19431         (__arm_vcmpneq_m_u8): Remove.
19432         (__arm_vcmpneq_m_n_u8): Remove.
19433         (__arm_vcmphiq_m_u8): Remove.
19434         (__arm_vcmphiq_m_n_u8): Remove.
19435         (__arm_vcmpeqq_m_u8): Remove.
19436         (__arm_vcmpeqq_m_n_u8): Remove.
19437         (__arm_vcmpcsq_m_u8): Remove.
19438         (__arm_vcmpcsq_m_n_u8): Remove.
19439         (__arm_vcmpneq_m_s8): Remove.
19440         (__arm_vcmpneq_m_n_s8): Remove.
19441         (__arm_vcmpltq_m_s8): Remove.
19442         (__arm_vcmpltq_m_n_s8): Remove.
19443         (__arm_vcmpleq_m_s8): Remove.
19444         (__arm_vcmpleq_m_n_s8): Remove.
19445         (__arm_vcmpgtq_m_s8): Remove.
19446         (__arm_vcmpgtq_m_n_s8): Remove.
19447         (__arm_vcmpgeq_m_s8): Remove.
19448         (__arm_vcmpgeq_m_n_s8): Remove.
19449         (__arm_vcmpeqq_m_s8): Remove.
19450         (__arm_vcmpeqq_m_n_s8): Remove.
19451         (__arm_vcmpneq_m_u16): Remove.
19452         (__arm_vcmpneq_m_n_u16): Remove.
19453         (__arm_vcmphiq_m_u16): Remove.
19454         (__arm_vcmphiq_m_n_u16): Remove.
19455         (__arm_vcmpeqq_m_u16): Remove.
19456         (__arm_vcmpeqq_m_n_u16): Remove.
19457         (__arm_vcmpcsq_m_u16): Remove.
19458         (__arm_vcmpcsq_m_n_u16): Remove.
19459         (__arm_vcmpneq_m_s16): Remove.
19460         (__arm_vcmpneq_m_n_s16): Remove.
19461         (__arm_vcmpltq_m_s16): Remove.
19462         (__arm_vcmpltq_m_n_s16): Remove.
19463         (__arm_vcmpleq_m_s16): Remove.
19464         (__arm_vcmpleq_m_n_s16): Remove.
19465         (__arm_vcmpgtq_m_s16): Remove.
19466         (__arm_vcmpgtq_m_n_s16): Remove.
19467         (__arm_vcmpgeq_m_s16): Remove.
19468         (__arm_vcmpgeq_m_n_s16): Remove.
19469         (__arm_vcmpeqq_m_s16): Remove.
19470         (__arm_vcmpeqq_m_n_s16): Remove.
19471         (__arm_vcmpneq_m_u32): Remove.
19472         (__arm_vcmpneq_m_n_u32): Remove.
19473         (__arm_vcmphiq_m_u32): Remove.
19474         (__arm_vcmphiq_m_n_u32): Remove.
19475         (__arm_vcmpeqq_m_u32): Remove.
19476         (__arm_vcmpeqq_m_n_u32): Remove.
19477         (__arm_vcmpcsq_m_u32): Remove.
19478         (__arm_vcmpcsq_m_n_u32): Remove.
19479         (__arm_vcmpneq_m_s32): Remove.
19480         (__arm_vcmpneq_m_n_s32): Remove.
19481         (__arm_vcmpltq_m_s32): Remove.
19482         (__arm_vcmpltq_m_n_s32): Remove.
19483         (__arm_vcmpleq_m_s32): Remove.
19484         (__arm_vcmpleq_m_n_s32): Remove.
19485         (__arm_vcmpgtq_m_s32): Remove.
19486         (__arm_vcmpgtq_m_n_s32): Remove.
19487         (__arm_vcmpgeq_m_s32): Remove.
19488         (__arm_vcmpgeq_m_n_s32): Remove.
19489         (__arm_vcmpeqq_m_s32): Remove.
19490         (__arm_vcmpeqq_m_n_s32): Remove.
19491         (__arm_vcmpneq_n_f16): Remove.
19492         (__arm_vcmpneq_f16): Remove.
19493         (__arm_vcmpltq_n_f16): Remove.
19494         (__arm_vcmpltq_f16): Remove.
19495         (__arm_vcmpleq_n_f16): Remove.
19496         (__arm_vcmpleq_f16): Remove.
19497         (__arm_vcmpgtq_n_f16): Remove.
19498         (__arm_vcmpgtq_f16): Remove.
19499         (__arm_vcmpgeq_n_f16): Remove.
19500         (__arm_vcmpgeq_f16): Remove.
19501         (__arm_vcmpeqq_n_f16): Remove.
19502         (__arm_vcmpeqq_f16): Remove.
19503         (__arm_vcmpneq_n_f32): Remove.
19504         (__arm_vcmpneq_f32): Remove.
19505         (__arm_vcmpltq_n_f32): Remove.
19506         (__arm_vcmpltq_f32): Remove.
19507         (__arm_vcmpleq_n_f32): Remove.
19508         (__arm_vcmpleq_f32): Remove.
19509         (__arm_vcmpgtq_n_f32): Remove.
19510         (__arm_vcmpgtq_f32): Remove.
19511         (__arm_vcmpgeq_n_f32): Remove.
19512         (__arm_vcmpgeq_f32): Remove.
19513         (__arm_vcmpeqq_n_f32): Remove.
19514         (__arm_vcmpeqq_f32): Remove.
19515         (__arm_vcmpeqq_m_f16): Remove.
19516         (__arm_vcmpeqq_m_f32): Remove.
19517         (__arm_vcmpeqq_m_n_f16): Remove.
19518         (__arm_vcmpgeq_m_f16): Remove.
19519         (__arm_vcmpgeq_m_n_f16): Remove.
19520         (__arm_vcmpgtq_m_f16): Remove.
19521         (__arm_vcmpgtq_m_n_f16): Remove.
19522         (__arm_vcmpleq_m_f16): Remove.
19523         (__arm_vcmpleq_m_n_f16): Remove.
19524         (__arm_vcmpltq_m_f16): Remove.
19525         (__arm_vcmpltq_m_n_f16): Remove.
19526         (__arm_vcmpneq_m_f16): Remove.
19527         (__arm_vcmpneq_m_n_f16): Remove.
19528         (__arm_vcmpeqq_m_n_f32): Remove.
19529         (__arm_vcmpgeq_m_f32): Remove.
19530         (__arm_vcmpgeq_m_n_f32): Remove.
19531         (__arm_vcmpgtq_m_f32): Remove.
19532         (__arm_vcmpgtq_m_n_f32): Remove.
19533         (__arm_vcmpleq_m_f32): Remove.
19534         (__arm_vcmpleq_m_n_f32): Remove.
19535         (__arm_vcmpltq_m_f32): Remove.
19536         (__arm_vcmpltq_m_n_f32): Remove.
19537         (__arm_vcmpneq_m_f32): Remove.
19538         (__arm_vcmpneq_m_n_f32): Remove.
19539         (__arm_vcmpneq): Remove.
19540         (__arm_vcmphiq): Remove.
19541         (__arm_vcmpeqq): Remove.
19542         (__arm_vcmpcsq): Remove.
19543         (__arm_vcmpltq): Remove.
19544         (__arm_vcmpleq): Remove.
19545         (__arm_vcmpgtq): Remove.
19546         (__arm_vcmpgeq): Remove.
19547         (__arm_vcmpneq_m): Remove.
19548         (__arm_vcmphiq_m): Remove.
19549         (__arm_vcmpeqq_m): Remove.
19550         (__arm_vcmpcsq_m): Remove.
19551         (__arm_vcmpltq_m): Remove.
19552         (__arm_vcmpleq_m): Remove.
19553         (__arm_vcmpgtq_m): Remove.
19554         (__arm_vcmpgeq_m): Remove.
19555
19556 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
19557
19558         * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
19559         * config/arm/arm-mve-builtins-shapes.h (cmp): New.
19560
19561 2023-05-11  Christophe Lyon  <christophe.lyon@arm.com>
19562
19563         * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
19564         (MVE_CMP_M_N_F, mve_cmp_op1): New.
19565         (isu): Add VCMP*
19566         (supf): Likewise.
19567         * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
19568         (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
19569         (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
19570         (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
19571         (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
19572         (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
19573         (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
19574         (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
19575         (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
19576         (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
19577         ...
19578         (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
19579         (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
19580         (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
19581         (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
19582         (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
19583         into ...
19584         (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
19585         (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
19586         (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
19587         (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
19588         (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
19589
19590 2023-05-11  Roger Sayle  <roger@nextmovesoftware.com>
19591
19592         * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
19593         popcount(X&Y) as popcount(X)+popcount(Y).  Likewise, simplify
19594         popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
19595         vice versa.
19596
19597 2023-05-11  Roger Sayle  <roger@nextmovesoftware.com>
19598
19599         * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
19600         as popcount(x).  Simplify popcount(rotate(x,y)) as popcount(x).
19601         <parity optimizations>:  Simplify parity(bswap(x)) as parity(x).
19602         Simplify parity(rotate(x,y)) as parity(x).
19603
19604 2023-05-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
19605
19606         * config/riscv/autovec.md (@vec_series<mode>): New pattern
19607         * config/riscv/riscv-protos.h (expand_vec_series): New function.
19608         * config/riscv/riscv-v.cc (emit_binop): Ditto.
19609         (emit_index_op): Ditto.
19610         (expand_vec_series): Ditto.
19611         (expand_const_vector): Add series vector handling.
19612         * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
19613
19614 2023-05-10  Roger Sayle  <roger@nextmovesoftware.com>
19615
19616         * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
19617         [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
19618         (*concat<mode><dwi>3_2): Likewise.
19619         (*concat<mode><dwi>3_3): Likewise.
19620         (*concat<mode><dwi>3_4): Likewise.
19621         (*concat<mode><dwi>3_5): Likewise.
19622         (*concat<mode><dwi>3_6): Likewise.
19623         (*concat<mode><dwi>3_7): Likewise.
19624
19625 2023-05-10  Uros Bizjak  <ubizjak@gmail.com>
19626
19627         PR target/92658
19628         * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
19629         (<insn>v4qiv4hi2): New expander.
19630         (<insn>v2hiv2si2): Ditto.
19631         (<insn>v2qiv2si2): Ditto.
19632         (<insn>v2qiv2hi2): Ditto.
19633
19634 2023-05-10  Jeff Law  <jlaw@ventanamicro>
19635
19636         * config/h8300/constraints.md (Q): Make this a special memory
19637         constraint.
19638         (Zz): Similarly.
19639
19640 2023-05-10  Jakub Jelinek  <jakub@redhat.com>
19641
19642         PR fortran/109788
19643         * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
19644         if t is void_list_node.
19645
19646 2023-05-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
19647
19648         * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
19649         (aarch64_sqmovun<mode>_insn_be): Delete.
19650         (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
19651         (aarch64_sqmovun<mode>): Delete expander.
19652
19653 2023-05-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
19654
19655         PR target/99195
19656         * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
19657         Rename to...
19658         (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
19659         (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
19660         (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
19661
19662 2023-05-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
19663
19664         PR target/99195
19665         * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
19666         Rename to...
19667         (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
19668         (aarch64_<sur>qadd<mode>): Rename to...
19669         (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
19670
19671 2023-05-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
19672
19673         * config/aarch64/aarch64-simd.md
19674         (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
19675         (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
19676         (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
19677         (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
19678
19679 2023-05-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
19680
19681         PR target/99195
19682         * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
19683         (aarch64_xtn<mode>_insn_be): Likewise.
19684         (trunc<mode><Vnarrowq>2): Rename to...
19685         (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
19686         (aarch64_xtn<mode>): Move under the above.  Just emit the truncate RTL.
19687         (aarch64_<su>qmovn<mode>): Likewise.
19688         (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
19689         (aarch64_<su>qmovn<mode>_insn_le): Delete.
19690         (aarch64_<su>qmovn<mode>_insn_be): Likewise.
19691
19692 2023-05-10  Li Xu  <xuli1@eswincomputing.com>
19693
19694         * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
19695         intruction replace null avl with (const_int 0).
19696
19697 2023-05-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
19698
19699         * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
19700         incorrect codes.
19701
19702 2023-05-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
19703
19704         PR target/109773
19705         * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
19706         (source_equal_p): Fix dead loop in vsetvl avl checking.
19707
19708 2023-05-10  Hans-Peter Nilsson  <hp@axis.com>
19709
19710         * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
19711         of modeadjusted_dccr.
19712
19713 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19714
19715         * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
19716         * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
19717         * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
19718         * config/arm/arm-mve-builtins.cc
19719         (function_instance::has_inactive_argument): Handle vmaxaq and
19720         vminaq.
19721         * config/arm/arm_mve.h (vminaq): Remove.
19722         (vmaxaq): Remove.
19723         (vminaq_m): Remove.
19724         (vmaxaq_m): Remove.
19725         (vminaq_s8): Remove.
19726         (vmaxaq_s8): Remove.
19727         (vminaq_s16): Remove.
19728         (vmaxaq_s16): Remove.
19729         (vminaq_s32): Remove.
19730         (vmaxaq_s32): Remove.
19731         (vminaq_m_s8): Remove.
19732         (vmaxaq_m_s8): Remove.
19733         (vminaq_m_s16): Remove.
19734         (vmaxaq_m_s16): Remove.
19735         (vminaq_m_s32): Remove.
19736         (vmaxaq_m_s32): Remove.
19737         (__arm_vminaq_s8): Remove.
19738         (__arm_vmaxaq_s8): Remove.
19739         (__arm_vminaq_s16): Remove.
19740         (__arm_vmaxaq_s16): Remove.
19741         (__arm_vminaq_s32): Remove.
19742         (__arm_vmaxaq_s32): Remove.
19743         (__arm_vminaq_m_s8): Remove.
19744         (__arm_vmaxaq_m_s8): Remove.
19745         (__arm_vminaq_m_s16): Remove.
19746         (__arm_vmaxaq_m_s16): Remove.
19747         (__arm_vminaq_m_s32): Remove.
19748         (__arm_vmaxaq_m_s32): Remove.
19749         (__arm_vminaq): Remove.
19750         (__arm_vmaxaq): Remove.
19751         (__arm_vminaq_m): Remove.
19752         (__arm_vmaxaq_m): Remove.
19753
19754 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19755
19756         * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
19757         New.
19758         (mve_insn): Add vmaxa, vmina.
19759         (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
19760         * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
19761         Merge into ...
19762         (@mve_<mve_insn>q_<supf><mode>): ... this.
19763         (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
19764         (@mve_<mve_insn>q_m_<supf><mode>): ... this.
19765
19766 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19767
19768         * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
19769         * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
19770
19771 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19772
19773         * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
19774         * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
19775         * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
19776         * config/arm/arm-mve-builtins.cc
19777         (function_instance::has_inactive_argument): Handle vmaxnmaq and
19778         vminnmaq.
19779         * config/arm/arm_mve.h (vminnmaq): Remove.
19780         (vmaxnmaq): Remove.
19781         (vmaxnmaq_m): Remove.
19782         (vminnmaq_m): Remove.
19783         (vminnmaq_f16): Remove.
19784         (vmaxnmaq_f16): Remove.
19785         (vminnmaq_f32): Remove.
19786         (vmaxnmaq_f32): Remove.
19787         (vmaxnmaq_m_f16): Remove.
19788         (vminnmaq_m_f16): Remove.
19789         (vmaxnmaq_m_f32): Remove.
19790         (vminnmaq_m_f32): Remove.
19791         (__arm_vminnmaq_f16): Remove.
19792         (__arm_vmaxnmaq_f16): Remove.
19793         (__arm_vminnmaq_f32): Remove.
19794         (__arm_vmaxnmaq_f32): Remove.
19795         (__arm_vmaxnmaq_m_f16): Remove.
19796         (__arm_vminnmaq_m_f16): Remove.
19797         (__arm_vmaxnmaq_m_f32): Remove.
19798         (__arm_vminnmaq_m_f32): Remove.
19799         (__arm_vminnmaq): Remove.
19800         (__arm_vmaxnmaq): Remove.
19801         (__arm_vmaxnmaq_m): Remove.
19802         (__arm_vminnmaq_m): Remove.
19803
19804 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19805
19806         * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
19807         (MVE_VMAXNMA_VMINNMAQ_M): New.
19808         (mve_insn): Add vmaxnma, vminnma.
19809         * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
19810         Merge into ...
19811         (@mve_<mve_insn>q_f<mode>): ... this.
19812         (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
19813         (@mve_<mve_insn>q_m_f<mode>): ... this.
19814
19815 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19816
19817         * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
19818         (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
19819         * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
19820         (vminnmavq, vminnmvq): New.
19821         * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
19822         (vminnmavq, vminnmvq): New.
19823         * config/arm/arm_mve.h (vminnmvq): Remove.
19824         (vminnmavq): Remove.
19825         (vmaxnmvq): Remove.
19826         (vmaxnmavq): Remove.
19827         (vmaxnmavq_p): Remove.
19828         (vmaxnmvq_p): Remove.
19829         (vminnmavq_p): Remove.
19830         (vminnmvq_p): Remove.
19831         (vminnmvq_f16): Remove.
19832         (vminnmavq_f16): Remove.
19833         (vmaxnmvq_f16): Remove.
19834         (vmaxnmavq_f16): Remove.
19835         (vminnmvq_f32): Remove.
19836         (vminnmavq_f32): Remove.
19837         (vmaxnmvq_f32): Remove.
19838         (vmaxnmavq_f32): Remove.
19839         (vmaxnmavq_p_f16): Remove.
19840         (vmaxnmvq_p_f16): Remove.
19841         (vminnmavq_p_f16): Remove.
19842         (vminnmvq_p_f16): Remove.
19843         (vmaxnmavq_p_f32): Remove.
19844         (vmaxnmvq_p_f32): Remove.
19845         (vminnmavq_p_f32): Remove.
19846         (vminnmvq_p_f32): Remove.
19847         (__arm_vminnmvq_f16): Remove.
19848         (__arm_vminnmavq_f16): Remove.
19849         (__arm_vmaxnmvq_f16): Remove.
19850         (__arm_vmaxnmavq_f16): Remove.
19851         (__arm_vminnmvq_f32): Remove.
19852         (__arm_vminnmavq_f32): Remove.
19853         (__arm_vmaxnmvq_f32): Remove.
19854         (__arm_vmaxnmavq_f32): Remove.
19855         (__arm_vmaxnmavq_p_f16): Remove.
19856         (__arm_vmaxnmvq_p_f16): Remove.
19857         (__arm_vminnmavq_p_f16): Remove.
19858         (__arm_vminnmvq_p_f16): Remove.
19859         (__arm_vmaxnmavq_p_f32): Remove.
19860         (__arm_vmaxnmvq_p_f32): Remove.
19861         (__arm_vminnmavq_p_f32): Remove.
19862         (__arm_vminnmvq_p_f32): Remove.
19863         (__arm_vminnmvq): Remove.
19864         (__arm_vminnmavq): Remove.
19865         (__arm_vmaxnmvq): Remove.
19866         (__arm_vmaxnmavq): Remove.
19867         (__arm_vmaxnmavq_p): Remove.
19868         (__arm_vmaxnmvq_p): Remove.
19869         (__arm_vminnmavq_p): Remove.
19870         (__arm_vminnmvq_p): Remove.
19871         (__arm_vmaxnmavq_m): Remove.
19872         (__arm_vmaxnmvq_m): Remove.
19873
19874 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19875
19876         * config/arm/arm-mve-builtins-functions.h
19877         (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
19878
19879 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19880
19881         * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
19882         (MVE_VMAXNMxV_MINNMxVQ_P): New.
19883         (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
19884         * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
19885         (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
19886         (@mve_<mve_insn>q_f<mode>): ... this.
19887         (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
19888         (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
19889         (@mve_<mve_insn>q_p_f<mode>): ... this.
19890
19891 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19892
19893         * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
19894         * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
19895         * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
19896         * config/arm/arm_mve.h (vminnmq): Remove.
19897         (vmaxnmq): Remove.
19898         (vmaxnmq_m): Remove.
19899         (vminnmq_m): Remove.
19900         (vminnmq_x): Remove.
19901         (vmaxnmq_x): Remove.
19902         (vminnmq_f16): Remove.
19903         (vmaxnmq_f16): Remove.
19904         (vminnmq_f32): Remove.
19905         (vmaxnmq_f32): Remove.
19906         (vmaxnmq_m_f32): Remove.
19907         (vmaxnmq_m_f16): Remove.
19908         (vminnmq_m_f32): Remove.
19909         (vminnmq_m_f16): Remove.
19910         (vminnmq_x_f16): Remove.
19911         (vminnmq_x_f32): Remove.
19912         (vmaxnmq_x_f16): Remove.
19913         (vmaxnmq_x_f32): Remove.
19914         (__arm_vminnmq_f16): Remove.
19915         (__arm_vmaxnmq_f16): Remove.
19916         (__arm_vminnmq_f32): Remove.
19917         (__arm_vmaxnmq_f32): Remove.
19918         (__arm_vmaxnmq_m_f32): Remove.
19919         (__arm_vmaxnmq_m_f16): Remove.
19920         (__arm_vminnmq_m_f32): Remove.
19921         (__arm_vminnmq_m_f16): Remove.
19922         (__arm_vminnmq_x_f16): Remove.
19923         (__arm_vminnmq_x_f32): Remove.
19924         (__arm_vmaxnmq_x_f16): Remove.
19925         (__arm_vmaxnmq_x_f32): Remove.
19926         (__arm_vminnmq): Remove.
19927         (__arm_vmaxnmq): Remove.
19928         (__arm_vmaxnmq_m): Remove.
19929         (__arm_vminnmq_m): Remove.
19930         (__arm_vminnmq_x): Remove.
19931         (__arm_vmaxnmq_x): Remove.
19932
19933 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19934
19935         * config/arm/iterators.md (MAX_MIN_F): New.
19936         (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
19937         (mve_insn): Add vmaxnm, vminnm.
19938         (max_min_f_str): New.
19939         * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
19940         Merge into ...
19941         (@mve_<max_min_f_str>q_f<mode>): ... this.
19942         (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
19943         (@mve_<mve_insn>q_m_f<mode>): ... this.
19944
19945 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19946
19947         * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
19948         (smax<mode>3): Likewise.
19949
19950 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
19951
19952         * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
19953         (FUNCTION_PRED_P_S): New.
19954         (vmaxavq, vminavq, vmaxvq, vminvq): New.
19955         * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
19956         (vminvq): New.
19957         * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
19958         (vminvq): New.
19959         * config/arm/arm_mve.h (vminvq): Remove.
19960         (vmaxvq): Remove.
19961         (vminvq_p): Remove.
19962         (vmaxvq_p): Remove.
19963         (vminvq_u8): Remove.
19964         (vmaxvq_u8): Remove.
19965         (vminvq_s8): Remove.
19966         (vmaxvq_s8): Remove.
19967         (vminvq_u16): Remove.
19968         (vmaxvq_u16): Remove.
19969         (vminvq_s16): Remove.
19970         (vmaxvq_s16): Remove.
19971         (vminvq_u32): Remove.
19972         (vmaxvq_u32): Remove.
19973         (vminvq_s32): Remove.
19974         (vmaxvq_s32): Remove.
19975         (vminvq_p_u8): Remove.
19976         (vmaxvq_p_u8): Remove.
19977         (vminvq_p_s8): Remove.
19978         (vmaxvq_p_s8): Remove.
19979         (vminvq_p_u16): Remove.
19980         (vmaxvq_p_u16): Remove.
19981         (vminvq_p_s16): Remove.
19982         (vmaxvq_p_s16): Remove.
19983         (vminvq_p_u32): Remove.
19984         (vmaxvq_p_u32): Remove.
19985         (vminvq_p_s32): Remove.
19986         (vmaxvq_p_s32): Remove.
19987         (__arm_vminvq_u8): Remove.
19988         (__arm_vmaxvq_u8): Remove.
19989         (__arm_vminvq_s8): Remove.
19990         (__arm_vmaxvq_s8): Remove.
19991         (__arm_vminvq_u16): Remove.
19992         (__arm_vmaxvq_u16): Remove.
19993         (__arm_vminvq_s16): Remove.
19994         (__arm_vmaxvq_s16): Remove.
19995         (__arm_vminvq_u32): Remove.
19996         (__arm_vmaxvq_u32): Remove.
19997         (__arm_vminvq_s32): Remove.
19998         (__arm_vmaxvq_s32): Remove.
19999         (__arm_vminvq_p_u8): Remove.
20000         (__arm_vmaxvq_p_u8): Remove.
20001         (__arm_vminvq_p_s8): Remove.
20002         (__arm_vmaxvq_p_s8): Remove.
20003         (__arm_vminvq_p_u16): Remove.
20004         (__arm_vmaxvq_p_u16): Remove.
20005         (__arm_vminvq_p_s16): Remove.
20006         (__arm_vmaxvq_p_s16): Remove.
20007         (__arm_vminvq_p_u32): Remove.
20008         (__arm_vmaxvq_p_u32): Remove.
20009         (__arm_vminvq_p_s32): Remove.
20010         (__arm_vmaxvq_p_s32): Remove.
20011         (__arm_vminvq): Remove.
20012         (__arm_vmaxvq): Remove.
20013         (__arm_vminvq_p): Remove.
20014         (__arm_vmaxvq_p): Remove.
20015         (vminavq): Remove.
20016         (vmaxavq): Remove.
20017         (vminavq_p): Remove.
20018         (vmaxavq_p): Remove.
20019         (vminavq_s8): Remove.
20020         (vmaxavq_s8): Remove.
20021         (vminavq_s16): Remove.
20022         (vmaxavq_s16): Remove.
20023         (vminavq_s32): Remove.
20024         (vmaxavq_s32): Remove.
20025         (vminavq_p_s8): Remove.
20026         (vmaxavq_p_s8): Remove.
20027         (vminavq_p_s16): Remove.
20028         (vmaxavq_p_s16): Remove.
20029         (vminavq_p_s32): Remove.
20030         (vmaxavq_p_s32): Remove.
20031         (__arm_vminavq_s8): Remove.
20032         (__arm_vmaxavq_s8): Remove.
20033         (__arm_vminavq_s16): Remove.
20034         (__arm_vmaxavq_s16): Remove.
20035         (__arm_vminavq_s32): Remove.
20036         (__arm_vmaxavq_s32): Remove.
20037         (__arm_vminavq_p_s8): Remove.
20038         (__arm_vmaxavq_p_s8): Remove.
20039         (__arm_vminavq_p_s16): Remove.
20040         (__arm_vmaxavq_p_s16): Remove.
20041         (__arm_vminavq_p_s32): Remove.
20042         (__arm_vmaxavq_p_s32): Remove.
20043         (__arm_vminavq): Remove.
20044         (__arm_vmaxavq): Remove.
20045         (__arm_vminavq_p): Remove.
20046         (__arm_vmaxavq_p): Remove.
20047
20048 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20049
20050         * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
20051         (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
20052         (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
20053         * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
20054         (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
20055         (@mve_<mve_insn>q_<supf><mode>): ... this.
20056         (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
20057         (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
20058         (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20059
20060 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20061
20062         * config/arm/arm-mve-builtins-functions.h (class
20063         unspec_mve_function_exact_insn_pred_p): New.
20064
20065 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20066
20067         * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
20068         * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
20069
20070 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20071
20072         * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
20073         * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
20074
20075 2023-05-09  Richard Sandiford  <richard.sandiford@arm.com>
20076
20077         * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
20078         Declare.
20079         * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
20080         (ADJUST_REG_ALLOC_ORDER): Likewise.
20081         * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
20082         function.
20083         * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
20084         Upa rather than Upl for unpredicated movprfx alternatives.
20085
20086 2023-05-09  Jeff Law  <jlaw@ventanamicro>
20087
20088         * config/h8300/testcompare.md: Add peephole2 which uses a memory
20089         load to set flags, thus eliminating a compare against zero.
20090
20091 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20092
20093         * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
20094         * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
20095         * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
20096         * config/arm/arm_mve.h (vshlltq): Remove.
20097         (vshllbq): Remove.
20098         (vshllbq_m): Remove.
20099         (vshlltq_m): Remove.
20100         (vshllbq_x): Remove.
20101         (vshlltq_x): Remove.
20102         (vshlltq_n_u8): Remove.
20103         (vshllbq_n_u8): Remove.
20104         (vshlltq_n_s8): Remove.
20105         (vshllbq_n_s8): Remove.
20106         (vshlltq_n_u16): Remove.
20107         (vshllbq_n_u16): Remove.
20108         (vshlltq_n_s16): Remove.
20109         (vshllbq_n_s16): Remove.
20110         (vshllbq_m_n_s8): Remove.
20111         (vshllbq_m_n_s16): Remove.
20112         (vshllbq_m_n_u8): Remove.
20113         (vshllbq_m_n_u16): Remove.
20114         (vshlltq_m_n_s8): Remove.
20115         (vshlltq_m_n_s16): Remove.
20116         (vshlltq_m_n_u8): Remove.
20117         (vshlltq_m_n_u16): Remove.
20118         (vshllbq_x_n_s8): Remove.
20119         (vshllbq_x_n_s16): Remove.
20120         (vshllbq_x_n_u8): Remove.
20121         (vshllbq_x_n_u16): Remove.
20122         (vshlltq_x_n_s8): Remove.
20123         (vshlltq_x_n_s16): Remove.
20124         (vshlltq_x_n_u8): Remove.
20125         (vshlltq_x_n_u16): Remove.
20126         (__arm_vshlltq_n_u8): Remove.
20127         (__arm_vshllbq_n_u8): Remove.
20128         (__arm_vshlltq_n_s8): Remove.
20129         (__arm_vshllbq_n_s8): Remove.
20130         (__arm_vshlltq_n_u16): Remove.
20131         (__arm_vshllbq_n_u16): Remove.
20132         (__arm_vshlltq_n_s16): Remove.
20133         (__arm_vshllbq_n_s16): Remove.
20134         (__arm_vshllbq_m_n_s8): Remove.
20135         (__arm_vshllbq_m_n_s16): Remove.
20136         (__arm_vshllbq_m_n_u8): Remove.
20137         (__arm_vshllbq_m_n_u16): Remove.
20138         (__arm_vshlltq_m_n_s8): Remove.
20139         (__arm_vshlltq_m_n_s16): Remove.
20140         (__arm_vshlltq_m_n_u8): Remove.
20141         (__arm_vshlltq_m_n_u16): Remove.
20142         (__arm_vshllbq_x_n_s8): Remove.
20143         (__arm_vshllbq_x_n_s16): Remove.
20144         (__arm_vshllbq_x_n_u8): Remove.
20145         (__arm_vshllbq_x_n_u16): Remove.
20146         (__arm_vshlltq_x_n_s8): Remove.
20147         (__arm_vshlltq_x_n_s16): Remove.
20148         (__arm_vshlltq_x_n_u8): Remove.
20149         (__arm_vshlltq_x_n_u16): Remove.
20150         (__arm_vshlltq): Remove.
20151         (__arm_vshllbq): Remove.
20152         (__arm_vshllbq_m): Remove.
20153         (__arm_vshlltq_m): Remove.
20154         (__arm_vshllbq_x): Remove.
20155         (__arm_vshlltq_x): Remove.
20156
20157 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20158
20159         * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
20160         (VSHLLBQ_N, VSHLLTQ_N): Remove.
20161         (VSHLLxQ_N): New.
20162         (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
20163         (VSHLLxQ_M_N): New.
20164         * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
20165         (mve_vshlltq_n_<supf><mode>): Merge into ...
20166         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20167         (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
20168         Merge into ...
20169         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
20170
20171 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20172
20173         * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
20174         * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
20175
20176 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20177
20178         * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
20179         (vqmovntq, vqmovunbq, vqmovuntq): New.
20180         * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
20181         (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
20182         * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
20183         (vqmovntq, vqmovunbq, vqmovuntq): New.
20184         * config/arm/arm-mve-builtins.cc
20185         (function_instance::has_inactive_argument): Handle vmovnbq,
20186         vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
20187         * config/arm/arm_mve.h (vqmovntq): Remove.
20188         (vqmovnbq): Remove.
20189         (vqmovnbq_m): Remove.
20190         (vqmovntq_m): Remove.
20191         (vqmovntq_u16): Remove.
20192         (vqmovnbq_u16): Remove.
20193         (vqmovntq_s16): Remove.
20194         (vqmovnbq_s16): Remove.
20195         (vqmovntq_u32): Remove.
20196         (vqmovnbq_u32): Remove.
20197         (vqmovntq_s32): Remove.
20198         (vqmovnbq_s32): Remove.
20199         (vqmovnbq_m_s16): Remove.
20200         (vqmovntq_m_s16): Remove.
20201         (vqmovnbq_m_u16): Remove.
20202         (vqmovntq_m_u16): Remove.
20203         (vqmovnbq_m_s32): Remove.
20204         (vqmovntq_m_s32): Remove.
20205         (vqmovnbq_m_u32): Remove.
20206         (vqmovntq_m_u32): Remove.
20207         (__arm_vqmovntq_u16): Remove.
20208         (__arm_vqmovnbq_u16): Remove.
20209         (__arm_vqmovntq_s16): Remove.
20210         (__arm_vqmovnbq_s16): Remove.
20211         (__arm_vqmovntq_u32): Remove.
20212         (__arm_vqmovnbq_u32): Remove.
20213         (__arm_vqmovntq_s32): Remove.
20214         (__arm_vqmovnbq_s32): Remove.
20215         (__arm_vqmovnbq_m_s16): Remove.
20216         (__arm_vqmovntq_m_s16): Remove.
20217         (__arm_vqmovnbq_m_u16): Remove.
20218         (__arm_vqmovntq_m_u16): Remove.
20219         (__arm_vqmovnbq_m_s32): Remove.
20220         (__arm_vqmovntq_m_s32): Remove.
20221         (__arm_vqmovnbq_m_u32): Remove.
20222         (__arm_vqmovntq_m_u32): Remove.
20223         (__arm_vqmovntq): Remove.
20224         (__arm_vqmovnbq): Remove.
20225         (__arm_vqmovnbq_m): Remove.
20226         (__arm_vqmovntq_m): Remove.
20227         (vmovntq): Remove.
20228         (vmovnbq): Remove.
20229         (vmovnbq_m): Remove.
20230         (vmovntq_m): Remove.
20231         (vmovntq_u16): Remove.
20232         (vmovnbq_u16): Remove.
20233         (vmovntq_s16): Remove.
20234         (vmovnbq_s16): Remove.
20235         (vmovntq_u32): Remove.
20236         (vmovnbq_u32): Remove.
20237         (vmovntq_s32): Remove.
20238         (vmovnbq_s32): Remove.
20239         (vmovnbq_m_s16): Remove.
20240         (vmovntq_m_s16): Remove.
20241         (vmovnbq_m_u16): Remove.
20242         (vmovntq_m_u16): Remove.
20243         (vmovnbq_m_s32): Remove.
20244         (vmovntq_m_s32): Remove.
20245         (vmovnbq_m_u32): Remove.
20246         (vmovntq_m_u32): Remove.
20247         (__arm_vmovntq_u16): Remove.
20248         (__arm_vmovnbq_u16): Remove.
20249         (__arm_vmovntq_s16): Remove.
20250         (__arm_vmovnbq_s16): Remove.
20251         (__arm_vmovntq_u32): Remove.
20252         (__arm_vmovnbq_u32): Remove.
20253         (__arm_vmovntq_s32): Remove.
20254         (__arm_vmovnbq_s32): Remove.
20255         (__arm_vmovnbq_m_s16): Remove.
20256         (__arm_vmovntq_m_s16): Remove.
20257         (__arm_vmovnbq_m_u16): Remove.
20258         (__arm_vmovntq_m_u16): Remove.
20259         (__arm_vmovnbq_m_s32): Remove.
20260         (__arm_vmovntq_m_s32): Remove.
20261         (__arm_vmovnbq_m_u32): Remove.
20262         (__arm_vmovntq_m_u32): Remove.
20263         (__arm_vmovntq): Remove.
20264         (__arm_vmovnbq): Remove.
20265         (__arm_vmovnbq_m): Remove.
20266         (__arm_vmovntq_m): Remove.
20267         (vqmovuntq): Remove.
20268         (vqmovunbq): Remove.
20269         (vqmovunbq_m): Remove.
20270         (vqmovuntq_m): Remove.
20271         (vqmovuntq_s16): Remove.
20272         (vqmovunbq_s16): Remove.
20273         (vqmovuntq_s32): Remove.
20274         (vqmovunbq_s32): Remove.
20275         (vqmovunbq_m_s16): Remove.
20276         (vqmovuntq_m_s16): Remove.
20277         (vqmovunbq_m_s32): Remove.
20278         (vqmovuntq_m_s32): Remove.
20279         (__arm_vqmovuntq_s16): Remove.
20280         (__arm_vqmovunbq_s16): Remove.
20281         (__arm_vqmovuntq_s32): Remove.
20282         (__arm_vqmovunbq_s32): Remove.
20283         (__arm_vqmovunbq_m_s16): Remove.
20284         (__arm_vqmovuntq_m_s16): Remove.
20285         (__arm_vqmovunbq_m_s32): Remove.
20286         (__arm_vqmovuntq_m_s32): Remove.
20287         (__arm_vqmovuntq): Remove.
20288         (__arm_vqmovunbq): Remove.
20289         (__arm_vqmovunbq_m): Remove.
20290         (__arm_vqmovuntq_m): Remove.
20291
20292 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20293
20294         * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
20295         (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
20296         vqmovunt.
20297         (isu): Likewise.
20298         (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
20299         VQMOVUNTQ_S.
20300         * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
20301         (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
20302         (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
20303         (mve_vqmovuntq_s<mode>): Merge into ...
20304         (@mve_<mve_insn>q_<supf><mode>): ... this.
20305         (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
20306         (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
20307         (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
20308         (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20309
20310 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20311
20312         * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
20313         (binary_move_narrow_unsigned): New.
20314         * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
20315         (binary_move_narrow_unsigned): New.
20316
20317 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20318
20319         * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
20320         (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
20321         * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
20322         (vrndpq, vrndq, vrndxq): New.
20323         * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
20324         (vrndpq, vrndq, vrndxq): New.
20325         * config/arm/arm_mve.h (vrndxq): Remove.
20326         (vrndq): Remove.
20327         (vrndpq): Remove.
20328         (vrndnq): Remove.
20329         (vrndmq): Remove.
20330         (vrndaq): Remove.
20331         (vrndaq_m): Remove.
20332         (vrndmq_m): Remove.
20333         (vrndnq_m): Remove.
20334         (vrndpq_m): Remove.
20335         (vrndq_m): Remove.
20336         (vrndxq_m): Remove.
20337         (vrndq_x): Remove.
20338         (vrndnq_x): Remove.
20339         (vrndmq_x): Remove.
20340         (vrndpq_x): Remove.
20341         (vrndaq_x): Remove.
20342         (vrndxq_x): Remove.
20343         (vrndxq_f16): Remove.
20344         (vrndxq_f32): Remove.
20345         (vrndq_f16): Remove.
20346         (vrndq_f32): Remove.
20347         (vrndpq_f16): Remove.
20348         (vrndpq_f32): Remove.
20349         (vrndnq_f16): Remove.
20350         (vrndnq_f32): Remove.
20351         (vrndmq_f16): Remove.
20352         (vrndmq_f32): Remove.
20353         (vrndaq_f16): Remove.
20354         (vrndaq_f32): Remove.
20355         (vrndaq_m_f16): Remove.
20356         (vrndmq_m_f16): Remove.
20357         (vrndnq_m_f16): Remove.
20358         (vrndpq_m_f16): Remove.
20359         (vrndq_m_f16): Remove.
20360         (vrndxq_m_f16): Remove.
20361         (vrndaq_m_f32): Remove.
20362         (vrndmq_m_f32): Remove.
20363         (vrndnq_m_f32): Remove.
20364         (vrndpq_m_f32): Remove.
20365         (vrndq_m_f32): Remove.
20366         (vrndxq_m_f32): Remove.
20367         (vrndq_x_f16): Remove.
20368         (vrndq_x_f32): Remove.
20369         (vrndnq_x_f16): Remove.
20370         (vrndnq_x_f32): Remove.
20371         (vrndmq_x_f16): Remove.
20372         (vrndmq_x_f32): Remove.
20373         (vrndpq_x_f16): Remove.
20374         (vrndpq_x_f32): Remove.
20375         (vrndaq_x_f16): Remove.
20376         (vrndaq_x_f32): Remove.
20377         (vrndxq_x_f16): Remove.
20378         (vrndxq_x_f32): Remove.
20379         (__arm_vrndxq_f16): Remove.
20380         (__arm_vrndxq_f32): Remove.
20381         (__arm_vrndq_f16): Remove.
20382         (__arm_vrndq_f32): Remove.
20383         (__arm_vrndpq_f16): Remove.
20384         (__arm_vrndpq_f32): Remove.
20385         (__arm_vrndnq_f16): Remove.
20386         (__arm_vrndnq_f32): Remove.
20387         (__arm_vrndmq_f16): Remove.
20388         (__arm_vrndmq_f32): Remove.
20389         (__arm_vrndaq_f16): Remove.
20390         (__arm_vrndaq_f32): Remove.
20391         (__arm_vrndaq_m_f16): Remove.
20392         (__arm_vrndmq_m_f16): Remove.
20393         (__arm_vrndnq_m_f16): Remove.
20394         (__arm_vrndpq_m_f16): Remove.
20395         (__arm_vrndq_m_f16): Remove.
20396         (__arm_vrndxq_m_f16): Remove.
20397         (__arm_vrndaq_m_f32): Remove.
20398         (__arm_vrndmq_m_f32): Remove.
20399         (__arm_vrndnq_m_f32): Remove.
20400         (__arm_vrndpq_m_f32): Remove.
20401         (__arm_vrndq_m_f32): Remove.
20402         (__arm_vrndxq_m_f32): Remove.
20403         (__arm_vrndq_x_f16): Remove.
20404         (__arm_vrndq_x_f32): Remove.
20405         (__arm_vrndnq_x_f16): Remove.
20406         (__arm_vrndnq_x_f32): Remove.
20407         (__arm_vrndmq_x_f16): Remove.
20408         (__arm_vrndmq_x_f32): Remove.
20409         (__arm_vrndpq_x_f16): Remove.
20410         (__arm_vrndpq_x_f32): Remove.
20411         (__arm_vrndaq_x_f16): Remove.
20412         (__arm_vrndaq_x_f32): Remove.
20413         (__arm_vrndxq_x_f16): Remove.
20414         (__arm_vrndxq_x_f32): Remove.
20415         (__arm_vrndxq): Remove.
20416         (__arm_vrndq): Remove.
20417         (__arm_vrndpq): Remove.
20418         (__arm_vrndnq): Remove.
20419         (__arm_vrndmq): Remove.
20420         (__arm_vrndaq): Remove.
20421         (__arm_vrndaq_m): Remove.
20422         (__arm_vrndmq_m): Remove.
20423         (__arm_vrndnq_m): Remove.
20424         (__arm_vrndpq_m): Remove.
20425         (__arm_vrndq_m): Remove.
20426         (__arm_vrndxq_m): Remove.
20427         (__arm_vrndq_x): Remove.
20428         (__arm_vrndnq_x): Remove.
20429         (__arm_vrndmq_x): Remove.
20430         (__arm_vrndpq_x): Remove.
20431         (__arm_vrndaq_x): Remove.
20432         (__arm_vrndxq_x): Remove.
20433
20434 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20435
20436         * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
20437         (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
20438         * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
20439         (vclzq, vqabsq, vqnegq): New.
20440         * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
20441         (vqabsq, vqnegq): New.
20442         * config/arm/arm_mve.h (vabsq): Remove.
20443         (vabsq_m): Remove.
20444         (vabsq_x): Remove.
20445         (vabsq_f16): Remove.
20446         (vabsq_f32): Remove.
20447         (vabsq_s8): Remove.
20448         (vabsq_s16): Remove.
20449         (vabsq_s32): Remove.
20450         (vabsq_m_s8): Remove.
20451         (vabsq_m_s16): Remove.
20452         (vabsq_m_s32): Remove.
20453         (vabsq_m_f16): Remove.
20454         (vabsq_m_f32): Remove.
20455         (vabsq_x_s8): Remove.
20456         (vabsq_x_s16): Remove.
20457         (vabsq_x_s32): Remove.
20458         (vabsq_x_f16): Remove.
20459         (vabsq_x_f32): Remove.
20460         (__arm_vabsq_s8): Remove.
20461         (__arm_vabsq_s16): Remove.
20462         (__arm_vabsq_s32): Remove.
20463         (__arm_vabsq_m_s8): Remove.
20464         (__arm_vabsq_m_s16): Remove.
20465         (__arm_vabsq_m_s32): Remove.
20466         (__arm_vabsq_x_s8): Remove.
20467         (__arm_vabsq_x_s16): Remove.
20468         (__arm_vabsq_x_s32): Remove.
20469         (__arm_vabsq_f16): Remove.
20470         (__arm_vabsq_f32): Remove.
20471         (__arm_vabsq_m_f16): Remove.
20472         (__arm_vabsq_m_f32): Remove.
20473         (__arm_vabsq_x_f16): Remove.
20474         (__arm_vabsq_x_f32): Remove.
20475         (__arm_vabsq): Remove.
20476         (__arm_vabsq_m): Remove.
20477         (__arm_vabsq_x): Remove.
20478         (vnegq): Remove.
20479         (vnegq_m): Remove.
20480         (vnegq_x): Remove.
20481         (vnegq_f16): Remove.
20482         (vnegq_f32): Remove.
20483         (vnegq_s8): Remove.
20484         (vnegq_s16): Remove.
20485         (vnegq_s32): Remove.
20486         (vnegq_m_s8): Remove.
20487         (vnegq_m_s16): Remove.
20488         (vnegq_m_s32): Remove.
20489         (vnegq_m_f16): Remove.
20490         (vnegq_m_f32): Remove.
20491         (vnegq_x_s8): Remove.
20492         (vnegq_x_s16): Remove.
20493         (vnegq_x_s32): Remove.
20494         (vnegq_x_f16): Remove.
20495         (vnegq_x_f32): Remove.
20496         (__arm_vnegq_s8): Remove.
20497         (__arm_vnegq_s16): Remove.
20498         (__arm_vnegq_s32): Remove.
20499         (__arm_vnegq_m_s8): Remove.
20500         (__arm_vnegq_m_s16): Remove.
20501         (__arm_vnegq_m_s32): Remove.
20502         (__arm_vnegq_x_s8): Remove.
20503         (__arm_vnegq_x_s16): Remove.
20504         (__arm_vnegq_x_s32): Remove.
20505         (__arm_vnegq_f16): Remove.
20506         (__arm_vnegq_f32): Remove.
20507         (__arm_vnegq_m_f16): Remove.
20508         (__arm_vnegq_m_f32): Remove.
20509         (__arm_vnegq_x_f16): Remove.
20510         (__arm_vnegq_x_f32): Remove.
20511         (__arm_vnegq): Remove.
20512         (__arm_vnegq_m): Remove.
20513         (__arm_vnegq_x): Remove.
20514         (vclsq): Remove.
20515         (vclsq_m): Remove.
20516         (vclsq_x): Remove.
20517         (vclsq_s8): Remove.
20518         (vclsq_s16): Remove.
20519         (vclsq_s32): Remove.
20520         (vclsq_m_s8): Remove.
20521         (vclsq_m_s16): Remove.
20522         (vclsq_m_s32): Remove.
20523         (vclsq_x_s8): Remove.
20524         (vclsq_x_s16): Remove.
20525         (vclsq_x_s32): Remove.
20526         (__arm_vclsq_s8): Remove.
20527         (__arm_vclsq_s16): Remove.
20528         (__arm_vclsq_s32): Remove.
20529         (__arm_vclsq_m_s8): Remove.
20530         (__arm_vclsq_m_s16): Remove.
20531         (__arm_vclsq_m_s32): Remove.
20532         (__arm_vclsq_x_s8): Remove.
20533         (__arm_vclsq_x_s16): Remove.
20534         (__arm_vclsq_x_s32): Remove.
20535         (__arm_vclsq): Remove.
20536         (__arm_vclsq_m): Remove.
20537         (__arm_vclsq_x): Remove.
20538         (vclzq): Remove.
20539         (vclzq_m): Remove.
20540         (vclzq_x): Remove.
20541         (vclzq_s8): Remove.
20542         (vclzq_s16): Remove.
20543         (vclzq_s32): Remove.
20544         (vclzq_u8): Remove.
20545         (vclzq_u16): Remove.
20546         (vclzq_u32): Remove.
20547         (vclzq_m_u8): Remove.
20548         (vclzq_m_s8): Remove.
20549         (vclzq_m_u16): Remove.
20550         (vclzq_m_s16): Remove.
20551         (vclzq_m_u32): Remove.
20552         (vclzq_m_s32): Remove.
20553         (vclzq_x_s8): Remove.
20554         (vclzq_x_s16): Remove.
20555         (vclzq_x_s32): Remove.
20556         (vclzq_x_u8): Remove.
20557         (vclzq_x_u16): Remove.
20558         (vclzq_x_u32): Remove.
20559         (__arm_vclzq_s8): Remove.
20560         (__arm_vclzq_s16): Remove.
20561         (__arm_vclzq_s32): Remove.
20562         (__arm_vclzq_u8): Remove.
20563         (__arm_vclzq_u16): Remove.
20564         (__arm_vclzq_u32): Remove.
20565         (__arm_vclzq_m_u8): Remove.
20566         (__arm_vclzq_m_s8): Remove.
20567         (__arm_vclzq_m_u16): Remove.
20568         (__arm_vclzq_m_s16): Remove.
20569         (__arm_vclzq_m_u32): Remove.
20570         (__arm_vclzq_m_s32): Remove.
20571         (__arm_vclzq_x_s8): Remove.
20572         (__arm_vclzq_x_s16): Remove.
20573         (__arm_vclzq_x_s32): Remove.
20574         (__arm_vclzq_x_u8): Remove.
20575         (__arm_vclzq_x_u16): Remove.
20576         (__arm_vclzq_x_u32): Remove.
20577         (__arm_vclzq): Remove.
20578         (__arm_vclzq_m): Remove.
20579         (__arm_vclzq_x): Remove.
20580         (vqabsq): Remove.
20581         (vqnegq): Remove.
20582         (vqnegq_m): Remove.
20583         (vqabsq_m): Remove.
20584         (vqabsq_s8): Remove.
20585         (vqabsq_s16): Remove.
20586         (vqabsq_s32): Remove.
20587         (vqnegq_s8): Remove.
20588         (vqnegq_s16): Remove.
20589         (vqnegq_s32): Remove.
20590         (vqnegq_m_s8): Remove.
20591         (vqabsq_m_s8): Remove.
20592         (vqnegq_m_s16): Remove.
20593         (vqabsq_m_s16): Remove.
20594         (vqnegq_m_s32): Remove.
20595         (vqabsq_m_s32): Remove.
20596         (__arm_vqabsq_s8): Remove.
20597         (__arm_vqabsq_s16): Remove.
20598         (__arm_vqabsq_s32): Remove.
20599         (__arm_vqnegq_s8): Remove.
20600         (__arm_vqnegq_s16): Remove.
20601         (__arm_vqnegq_s32): Remove.
20602         (__arm_vqnegq_m_s8): Remove.
20603         (__arm_vqabsq_m_s8): Remove.
20604         (__arm_vqnegq_m_s16): Remove.
20605         (__arm_vqabsq_m_s16): Remove.
20606         (__arm_vqnegq_m_s32): Remove.
20607         (__arm_vqabsq_m_s32): Remove.
20608         (__arm_vqabsq): Remove.
20609         (__arm_vqnegq): Remove.
20610         (__arm_vqnegq_m): Remove.
20611         (__arm_vqabsq_m): Remove.
20612
20613 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20614
20615         * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
20616         (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
20617         (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
20618         vrndm, vrndn, vrndp, vrnd, vrndx.
20619         (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
20620         VQABSQ_M_S, VQNEGQ_M_S.
20621         (mve_mnemo): New.
20622         * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
20623         (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
20624         (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
20625         (@mve_<mve_insn>q_f<mode>): ... this.
20626         (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
20627         (mve_v<absneg_str>q_f<mode>): ... this.
20628         (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
20629         (mve_v<absneg_str>q_s<mode>): ... this.
20630         (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
20631         (@mve_<mve_insn>q_<supf><mode>): ... this.
20632         (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
20633         (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
20634         (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
20635         (@mve_<mve_insn>q_m_<supf><mode>): ... this.
20636         (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
20637         (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
20638         (mve_vrndxq_m_f<mode>): Merge into ...
20639         (@mve_<mve_insn>q_m_f<mode>): ... this.
20640
20641 2023-05-09  Christophe Lyon  <christophe.lyon@arm.com>
20642
20643         * config/arm/arm-mve-builtins-shapes.cc (unary): New.
20644         * config/arm/arm-mve-builtins-shapes.h (unary): New.
20645
20646 2023-05-09  Jakub Jelinek  <jakub@redhat.com>
20647
20648         * mux-utils.h: Fix comment typo, avoides -> avoids.
20649
20650 2023-05-09  Jakub Jelinek  <jakub@redhat.com>
20651
20652         PR tree-optimization/109778
20653         * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
20654         wi::zext (x, width) rather than x if width != precision, rather
20655         than using wi::zext (right, width) after the shift.
20656         * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
20657         of wi::lrotate or wi::rrotate.
20658
20659 2023-05-09  Alexander Monakov  <amonakov@ispras.ru>
20660
20661         * genmatch.cc (get_out_file): Make static and rename to ...
20662         (choose_output): ... this. Reimplement. Update all uses ...
20663         (decision_tree::gen): ... here and ...
20664         (main): ... here.
20665
20666 2023-05-09  Alexander Monakov  <amonakov@ispras.ru>
20667
20668         * genmatch.cc (showUsage): Reimplement as ...
20669         (usage): ...this.  Adjust all uses.
20670         (main): Print usage when no arguments.  Add missing 'return 1'.
20671
20672 2023-05-09  Alexander Monakov  <amonakov@ispras.ru>
20673
20674         * genmatch.cc (header_file): Make static.
20675         (emit_func): Rename to...
20676         (fp_decl): ... this.  Adjust all uses.
20677         (fp_decl_done): New function.  Use it...
20678         (decision_tree::gen): ... here and...
20679         (write_predicate): ... here.
20680         (main): Adjust.
20681
20682 2023-05-09  Richard Sandiford  <richard.sandiford@arm.com>
20683
20684         * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
20685         earlyclobbers.
20686
20687 2023-05-08  Roger Sayle  <roger@nextmovesoftware.com>
20688             Uros Bizjak  <ubizjak@gmail.com>
20689
20690         * config/i386/i386.md (any_or_plus): Move definition earlier.
20691         (*insvti_highpart_1): New define_insn_and_split to overwrite
20692         (insv) the highpart of a TImode register/memory.
20693
20694 2023-05-08  Eugene Rozenfeld  <erozen@microsoft.com>
20695
20696         * auto-profile.cc (auto_profile): Check todo from early_inline
20697         to see if cleanup_tree_vfg needs to be called.
20698         (early_inline): Return todo from early_inliner.
20699
20700 2023-05-08  Kito Cheng  <kito.cheng@sifive.com>
20701
20702         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
20703         New.
20704         (pass_vsetvl::get_block_info): New.
20705         (pass_vsetvl::update_vector_info): New.
20706         (pass_vsetvl::simple_vsetvl): Use get_vector_info.
20707         (pass_vsetvl::compute_local_backward_infos): Ditto.
20708         (pass_vsetvl::transfer_before): Ditto.
20709         (pass_vsetvl::transfer_after): Ditto.
20710         (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
20711         (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
20712         (pass_vsetvl::cleanup_insns): Ditto.
20713         (pass_vsetvl::compute_local_backward_infos): Use
20714         update_vector_info.
20715
20716 2023-05-08  Jeff Law  <jlaw@ventanamicro>
20717
20718         * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
20719
20720 2023-05-08  Richard Biener  <rguenther@suse.de>
20721             Michael Meissner  <meissner@linux.ibm.com>
20722
20723         PR middle-end/108623
20724         * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
20725         Align bit fields > 1 bit to at least an 8-bit boundary.
20726
20727 2023-05-08  Andrew Pinski  <apinski@marvell.com>
20728
20729         PR tree-optimization/109424
20730         PR tree-optimization/59424
20731         * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
20732         (factor_out_conditional_operation): This and add support for all unary
20733         operations.
20734         (pass_phiopt::execute): Update call to factor_out_conditional_conversion
20735         to call factor_out_conditional_operation instead.
20736
20737 2023-05-08  Andrew Pinski  <apinski@marvell.com>
20738
20739         * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
20740         over factor_out_conditional_conversion.
20741
20742 2023-05-08  Andrew Pinski  <apinski@marvell.com>
20743
20744         PR tree-optimization/49959
20745         PR tree-optimization/103771
20746         * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
20747         Diamond shapped bb form for factor_out_conditional_conversion.
20748
20749 2023-05-08  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
20750
20751         * config/riscv/autovec.md (movmisalign<mode>): New pattern.
20752         * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
20753         (riscv_vector_get_mask_mode): Ditto.
20754         (get_mask_policy_no_pred): Ditto.
20755         (get_tail_policy_no_pred): Ditto.
20756         (get_mask_mode): New function.
20757         * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
20758         (get_tail_policy_no_pred): Ditto.
20759         (riscv_vector_mask_mode_p): Ditto.
20760         (riscv_vector_get_mask_mode): Ditto.
20761         (get_mask_mode): New function.
20762         * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
20763         global extern.
20764         (get_tail_policy_for_pred): Ditto.
20765         * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
20766         (get_mask_policy_for_pred): Ditto
20767         * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
20768
20769 2023-05-08  Kito Cheng  <kito.cheng@sifive.com>
20770
20771         * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
20772         (riscv_select_multilib): New.
20773         (riscv_compute_multilib): Extract logic to riscv_select_multilib and
20774         also handle select_by_abi.
20775         * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
20776         to select_by_abi_arch_cmodel from 1.
20777         * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
20778         * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
20779
20780 2023-05-08  Alexander Monakov  <amonakov@ispras.ru>
20781
20782         * Makefile.in: (gimple-match-head.o-warn): Remove.
20783         (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
20784         gimple-match-exports.cc.
20785         (gimple-match-auto.h): Only depend on s-gimple-match.
20786         (generic-match-auto.h): Likewise.
20787
20788 2023-05-08  Andrew Pinski  <apinski@marvell.com>
20789
20790         PR tree-optimization/109691
20791         * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
20792         argument.
20793         If the removed statement can throw, have need_eh_cleanup
20794         include the bb of that statement.
20795         * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
20796         * tree-ssa-propagate.cc (struct prop_stats_d): Remove
20797         num_dce.
20798         (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
20799         Initialize dceworklist instead of stmts_to_remove.
20800         (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
20801         Destore dceworklist instead of stmts_to_remove.
20802         (substitute_and_fold_dom_walker::before_dom_children):
20803         Set dceworklist instead of adding to stmts_to_remove.
20804         (substitute_and_fold_engine::substitute_and_fold):
20805         Call simple_dce_from_worklist instead of poping
20806         from the list.
20807         Don't update the stat on removal statements.
20808
20809 2023-05-07  Andrew Pinski  <apinski@marvell.com>
20810
20811         PR target/109762
20812         * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
20813         Change argument type to aarch64_feature_flags.
20814         * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
20815         constructor argument type to aarch64_feature_flags.
20816         Change m_old_asm_isa_flags to be aarch64_feature_flags.
20817
20818 2023-05-07  Jiufu Guo  <guojiufu@linux.ibm.com>
20819
20820         * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
20821         more parallel code if can_create_pseudo_p.
20822
20823 2023-05-07  Roger Sayle  <roger@nextmovesoftware.com>
20824
20825         PR target/43644
20826         * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
20827         immediately before moving a multi-word register by parts.
20828
20829 2023-05-06  Jeff Law  <jlaw@ventanamicro>
20830
20831         * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
20832
20833 2023-05-06  Michael Collison  <collison@rivosinc.com>
20834
20835         * tree-vect-slp.cc (can_duplicate_and_interleave_p):
20836         Check that GET_MODE_NUNITS is a multiple of 2.
20837
20838 2023-05-06  Michael Collison  <collison@rivosinc.com>
20839
20840         * config/riscv/riscv.cc
20841         (riscv_estimated_poly_value): Implement
20842         TARGET_ESTIMATED_POLY_VALUE.
20843         (riscv_preferred_simd_mode): Implement
20844         TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
20845         (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
20846         (riscv_empty_mask_is_expensive): Implement
20847         TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
20848         (riscv_vectorize_create_costs): Implement
20849         TARGET_VECTORIZE_CREATE_COSTS.
20850         (riscv_support_vector_misalignment): Implement
20851         TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
20852         (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
20853         (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
20854         (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
20855         (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
20856
20857 2023-05-06  Jeff Law  <jlaw@ventanamicro>
20858
20859         * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
20860         duplicate definition.
20861
20862 2023-05-06  Michael Collison  <collison@rivosinc.com>
20863
20864         * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
20865         (riscv_vector_preferred_simd_mode): Ditto.
20866         (get_mask_policy_no_pred): Ditto.
20867         (get_tail_policy_no_pred): Ditto.
20868         (riscv_vector_mask_mode_p): Ditto.
20869         (riscv_vector_get_mask_mode): Ditto.
20870
20871 2023-05-06  Michael Collison  <collison@rivosinc.com>
20872
20873         * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
20874         Remove static declaration to to make externally visible.
20875         (get_mask_policy_for_pred): Ditto.
20876         * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
20877         New external declaration.
20878         (get_mask_policy_for_pred): Ditto.
20879
20880 2023-05-06  Michael Collison  <collison@rivosinc.com>
20881
20882         * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
20883         (riscv_vector_get_mask_mode): Ditto.
20884         (get_mask_policy_no_pred): Ditto.
20885         (get_tail_policy_no_pred): Ditto.
20886
20887 2023-05-06  Xi Ruoyao  <xry111@xry111.site>
20888
20889         * config/loongarch/loongarch.h (struct machine_function): Add
20890         reg_is_wrapped_separately array for register wrapping
20891         information.
20892         * config/loongarch/loongarch.cc
20893         (loongarch_get_separate_components): New function.
20894         (loongarch_components_for_bb): Likewise.
20895         (loongarch_disqualify_components): Likewise.
20896         (loongarch_process_components): Likewise.
20897         (loongarch_emit_prologue_components): Likewise.
20898         (loongarch_emit_epilogue_components): Likewise.
20899         (loongarch_set_handled_components): Likewise.
20900         (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
20901         (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
20902         (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
20903         (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
20904         (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
20905         (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
20906         (loongarch_for_each_saved_reg): Skip registers that are wrapped
20907         separately.
20908
20909 2023-05-06  Xi Ruoyao  <xry111@xry111.site>
20910
20911         PR other/109522
20912         * Makefile.in (s-macro_list): Pass -nostdinc to
20913         $(GCC_FOR_TARGET).
20914
20915 2023-05-06  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
20916
20917         * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
20918         * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
20919         (preferred_simd_mode): Ditto.
20920         * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
20921         (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
20922         (riscv_preferred_simd_mode): New function.
20923         (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
20924         * config/riscv/vector.md: Add autovec.md.
20925         * config/riscv/autovec.md: New file.
20926
20927 2023-05-06  Jakub Jelinek  <jakub@redhat.com>
20928
20929         * real.h (dconst_pi): Define.
20930         (dconst_e_ptr): Formatting fix.
20931         (dconst_pi_ptr): Declare.
20932         * real.cc (dconst_pi_ptr): New function.
20933         * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
20934         boundaries range with range computed from sin/cos of the particular
20935         bounds if the argument range is shorter than 2*pi.
20936         (cfn_sincos::op1_range): Take bulps into account when determining
20937         which result ranges are always invalid or behave like known NAN.
20938
20939 2023-05-06  Aldy Hernandez  <aldyh@redhat.com>
20940
20941         * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
20942         pass type to vrange_storage::equal_p.
20943         * value-range-storage.cc (vrange_storage::equal_p): Remove type.
20944         (irange_storage::equal_p): Same.
20945         (frange_storage::equal_p): Same.
20946         * value-range-storage.h (class frange_storage): Same.
20947
20948 2023-05-06  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
20949
20950         PR target/109748
20951         * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
20952         (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
20953
20954 2023-05-06  liuhongt  <hongtao.liu@intel.com>
20955
20956         * combine.cc (maybe_swap_commutative_operands): Canonicalize
20957         vec_merge when mask is constant.
20958         * doc/md.texi: Document vec_merge canonicalization.
20959
20960 2023-05-06  Jakub Jelinek  <jakub@redhat.com>
20961
20962         * value-range.h (frange_arithmetic): Declare.
20963         * range-op-float.cc (frange_arithmetic): No longer static.
20964         * gimple-range-op.cc (frange_mpfr_arg1): New function.
20965         (cfn_sqrt::fold_range): Intersect the generic boundaries range
20966         with range computed from sqrt of the particular bounds.
20967         (cfn_sqrt::op1_range): Intersect the generic boundaries range
20968         with range computed from squared particular bounds.
20969
20970 2023-05-06  Jakub Jelinek  <jakub@redhat.com>
20971
20972         * Makefile.in (check_p_numbers): Rename to one_to_9999, move
20973         earlier with helper variables also renamed.
20974         (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
20975         instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
20976         (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
20977
20978 2023-05-06  Hans-Peter Nilsson  <hp@axis.com>
20979
20980         * config/cris/cris.md (splitop): Add PLUS.
20981         * config/cris/cris.cc (cris_split_constant): Also handle
20982         PLUS when a split into two insns may be useful.
20983
20984 2023-05-05  Hans-Peter Nilsson  <hp@axis.com>
20985
20986         * config/cris/cris.md (movandsplit1): New define_peephole2.
20987
20988 2023-05-05  Hans-Peter Nilsson  <hp@axis.com>
20989
20990         * config/cris/cris.md (lsrandsplit1): New define_peephole2.
20991
20992 2023-05-05  Hans-Peter Nilsson  <hp@axis.com>
20993
20994         * doc/md.texi (define_peephole2): Document order of scanning.
20995
20996 2023-05-05  Pan Li  <pan2.li@intel.com>
20997             Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
20998
20999         * config/riscv/vector.md: Allow const as the operand of RVV
21000         indexed load/store.
21001
21002 2023-05-05  Pan Li  <pan2.li@intel.com>
21003
21004         * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
21005         consumed by simplify_rtx.
21006
21007 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21008
21009         * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
21010         * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
21011         * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
21012         * config/arm/arm_mve.h (vshrq): Remove.
21013         (vrshrq): Remove.
21014         (vrshrq_m): Remove.
21015         (vshrq_m): Remove.
21016         (vrshrq_x): Remove.
21017         (vshrq_x): Remove.
21018         (vshrq_n_s8): Remove.
21019         (vshrq_n_s16): Remove.
21020         (vshrq_n_s32): Remove.
21021         (vshrq_n_u8): Remove.
21022         (vshrq_n_u16): Remove.
21023         (vshrq_n_u32): Remove.
21024         (vrshrq_n_u8): Remove.
21025         (vrshrq_n_s8): Remove.
21026         (vrshrq_n_u16): Remove.
21027         (vrshrq_n_s16): Remove.
21028         (vrshrq_n_u32): Remove.
21029         (vrshrq_n_s32): Remove.
21030         (vrshrq_m_n_s8): Remove.
21031         (vrshrq_m_n_s32): Remove.
21032         (vrshrq_m_n_s16): Remove.
21033         (vrshrq_m_n_u8): Remove.
21034         (vrshrq_m_n_u32): Remove.
21035         (vrshrq_m_n_u16): Remove.
21036         (vshrq_m_n_s8): Remove.
21037         (vshrq_m_n_s32): Remove.
21038         (vshrq_m_n_s16): Remove.
21039         (vshrq_m_n_u8): Remove.
21040         (vshrq_m_n_u32): Remove.
21041         (vshrq_m_n_u16): Remove.
21042         (vrshrq_x_n_s8): Remove.
21043         (vrshrq_x_n_s16): Remove.
21044         (vrshrq_x_n_s32): Remove.
21045         (vrshrq_x_n_u8): Remove.
21046         (vrshrq_x_n_u16): Remove.
21047         (vrshrq_x_n_u32): Remove.
21048         (vshrq_x_n_s8): Remove.
21049         (vshrq_x_n_s16): Remove.
21050         (vshrq_x_n_s32): Remove.
21051         (vshrq_x_n_u8): Remove.
21052         (vshrq_x_n_u16): Remove.
21053         (vshrq_x_n_u32): Remove.
21054         (__arm_vshrq_n_s8): Remove.
21055         (__arm_vshrq_n_s16): Remove.
21056         (__arm_vshrq_n_s32): Remove.
21057         (__arm_vshrq_n_u8): Remove.
21058         (__arm_vshrq_n_u16): Remove.
21059         (__arm_vshrq_n_u32): Remove.
21060         (__arm_vrshrq_n_u8): Remove.
21061         (__arm_vrshrq_n_s8): Remove.
21062         (__arm_vrshrq_n_u16): Remove.
21063         (__arm_vrshrq_n_s16): Remove.
21064         (__arm_vrshrq_n_u32): Remove.
21065         (__arm_vrshrq_n_s32): Remove.
21066         (__arm_vrshrq_m_n_s8): Remove.
21067         (__arm_vrshrq_m_n_s32): Remove.
21068         (__arm_vrshrq_m_n_s16): Remove.
21069         (__arm_vrshrq_m_n_u8): Remove.
21070         (__arm_vrshrq_m_n_u32): Remove.
21071         (__arm_vrshrq_m_n_u16): Remove.
21072         (__arm_vshrq_m_n_s8): Remove.
21073         (__arm_vshrq_m_n_s32): Remove.
21074         (__arm_vshrq_m_n_s16): Remove.
21075         (__arm_vshrq_m_n_u8): Remove.
21076         (__arm_vshrq_m_n_u32): Remove.
21077         (__arm_vshrq_m_n_u16): Remove.
21078         (__arm_vrshrq_x_n_s8): Remove.
21079         (__arm_vrshrq_x_n_s16): Remove.
21080         (__arm_vrshrq_x_n_s32): Remove.
21081         (__arm_vrshrq_x_n_u8): Remove.
21082         (__arm_vrshrq_x_n_u16): Remove.
21083         (__arm_vrshrq_x_n_u32): Remove.
21084         (__arm_vshrq_x_n_s8): Remove.
21085         (__arm_vshrq_x_n_s16): Remove.
21086         (__arm_vshrq_x_n_s32): Remove.
21087         (__arm_vshrq_x_n_u8): Remove.
21088         (__arm_vshrq_x_n_u16): Remove.
21089         (__arm_vshrq_x_n_u32): Remove.
21090         (__arm_vshrq): Remove.
21091         (__arm_vrshrq): Remove.
21092         (__arm_vrshrq_m): Remove.
21093         (__arm_vshrq_m): Remove.
21094         (__arm_vrshrq_x): Remove.
21095         (__arm_vshrq_x): Remove.
21096
21097 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21098
21099         * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
21100         (mve_insn): Add vrshr, vshr.
21101         * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
21102         (mve_vrshrq_n_<supf><mode>): Merge into ...
21103         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21104         (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
21105         into ...
21106         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21107
21108 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21109
21110         * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
21111         * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
21112
21113 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21114
21115         * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
21116         (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
21117         * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
21118         (vqrshrunbq, vqrshruntq): New.
21119         * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
21120         (vqrshrunbq, vqrshruntq): New.
21121         * config/arm/arm-mve-builtins.cc
21122         (function_instance::has_inactive_argument): Handle vqshrunbq,
21123         vqshruntq, vqrshrunbq, vqrshruntq.
21124         * config/arm/arm_mve.h (vqrshrunbq): Remove.
21125         (vqrshruntq): Remove.
21126         (vqrshrunbq_m): Remove.
21127         (vqrshruntq_m): Remove.
21128         (vqrshrunbq_n_s16): Remove.
21129         (vqrshrunbq_n_s32): Remove.
21130         (vqrshruntq_n_s16): Remove.
21131         (vqrshruntq_n_s32): Remove.
21132         (vqrshrunbq_m_n_s32): Remove.
21133         (vqrshrunbq_m_n_s16): Remove.
21134         (vqrshruntq_m_n_s32): Remove.
21135         (vqrshruntq_m_n_s16): Remove.
21136         (__arm_vqrshrunbq_n_s16): Remove.
21137         (__arm_vqrshrunbq_n_s32): Remove.
21138         (__arm_vqrshruntq_n_s16): Remove.
21139         (__arm_vqrshruntq_n_s32): Remove.
21140         (__arm_vqrshrunbq_m_n_s32): Remove.
21141         (__arm_vqrshrunbq_m_n_s16): Remove.
21142         (__arm_vqrshruntq_m_n_s32): Remove.
21143         (__arm_vqrshruntq_m_n_s16): Remove.
21144         (__arm_vqrshrunbq): Remove.
21145         (__arm_vqrshruntq): Remove.
21146         (__arm_vqrshrunbq_m): Remove.
21147         (__arm_vqrshruntq_m): Remove.
21148         (vqshrunbq): Remove.
21149         (vqshruntq): Remove.
21150         (vqshrunbq_m): Remove.
21151         (vqshruntq_m): Remove.
21152         (vqshrunbq_n_s16): Remove.
21153         (vqshruntq_n_s16): Remove.
21154         (vqshrunbq_n_s32): Remove.
21155         (vqshruntq_n_s32): Remove.
21156         (vqshrunbq_m_n_s32): Remove.
21157         (vqshrunbq_m_n_s16): Remove.
21158         (vqshruntq_m_n_s32): Remove.
21159         (vqshruntq_m_n_s16): Remove.
21160         (__arm_vqshrunbq_n_s16): Remove.
21161         (__arm_vqshruntq_n_s16): Remove.
21162         (__arm_vqshrunbq_n_s32): Remove.
21163         (__arm_vqshruntq_n_s32): Remove.
21164         (__arm_vqshrunbq_m_n_s32): Remove.
21165         (__arm_vqshrunbq_m_n_s16): Remove.
21166         (__arm_vqshruntq_m_n_s32): Remove.
21167         (__arm_vqshruntq_m_n_s16): Remove.
21168         (__arm_vqshrunbq): Remove.
21169         (__arm_vqshruntq): Remove.
21170         (__arm_vqshrunbq_m): Remove.
21171         (__arm_vqshruntq_m): Remove.
21172
21173 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21174
21175         * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
21176         VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
21177         (MVE_SHRN_M_N): Likewise.
21178         (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
21179         (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
21180         (supf): Likewise.
21181         * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
21182         (mve_vqrshruntq_n_s<mode>): Remove.
21183         (mve_vqshrunbq_n_s<mode>): Remove.
21184         (mve_vqshruntq_n_s<mode>): Remove.
21185         (mve_vqrshrunbq_m_n_s<mode>): Remove.
21186         (mve_vqrshruntq_m_n_s<mode>): Remove.
21187         (mve_vqshrunbq_m_n_s<mode>): Remove.
21188         (mve_vqshruntq_m_n_s<mode>): Remove.
21189
21190 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21191
21192         * config/arm/arm-mve-builtins-shapes.cc
21193         (binary_rshift_narrow_unsigned): New.
21194         * config/arm/arm-mve-builtins-shapes.h
21195         (binary_rshift_narrow_unsigned): New.
21196
21197 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21198
21199         * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
21200         (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
21201         (vqrshrnbq, vqrshrntq): New.
21202         * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
21203         (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
21204         New.
21205         * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
21206         (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
21207         * config/arm/arm-mve-builtins.cc
21208         (function_instance::has_inactive_argument): Handle vshrnbq,
21209         vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
21210         vqrshrntq.
21211         * config/arm/arm_mve.h (vshrnbq): Remove.
21212         (vshrntq): Remove.
21213         (vshrnbq_m): Remove.
21214         (vshrntq_m): Remove.
21215         (vshrnbq_n_s16): Remove.
21216         (vshrntq_n_s16): Remove.
21217         (vshrnbq_n_u16): Remove.
21218         (vshrntq_n_u16): Remove.
21219         (vshrnbq_n_s32): Remove.
21220         (vshrntq_n_s32): Remove.
21221         (vshrnbq_n_u32): Remove.
21222         (vshrntq_n_u32): Remove.
21223         (vshrnbq_m_n_s32): Remove.
21224         (vshrnbq_m_n_s16): Remove.
21225         (vshrnbq_m_n_u32): Remove.
21226         (vshrnbq_m_n_u16): Remove.
21227         (vshrntq_m_n_s32): Remove.
21228         (vshrntq_m_n_s16): Remove.
21229         (vshrntq_m_n_u32): Remove.
21230         (vshrntq_m_n_u16): Remove.
21231         (__arm_vshrnbq_n_s16): Remove.
21232         (__arm_vshrntq_n_s16): Remove.
21233         (__arm_vshrnbq_n_u16): Remove.
21234         (__arm_vshrntq_n_u16): Remove.
21235         (__arm_vshrnbq_n_s32): Remove.
21236         (__arm_vshrntq_n_s32): Remove.
21237         (__arm_vshrnbq_n_u32): Remove.
21238         (__arm_vshrntq_n_u32): Remove.
21239         (__arm_vshrnbq_m_n_s32): Remove.
21240         (__arm_vshrnbq_m_n_s16): Remove.
21241         (__arm_vshrnbq_m_n_u32): Remove.
21242         (__arm_vshrnbq_m_n_u16): Remove.
21243         (__arm_vshrntq_m_n_s32): Remove.
21244         (__arm_vshrntq_m_n_s16): Remove.
21245         (__arm_vshrntq_m_n_u32): Remove.
21246         (__arm_vshrntq_m_n_u16): Remove.
21247         (__arm_vshrnbq): Remove.
21248         (__arm_vshrntq): Remove.
21249         (__arm_vshrnbq_m): Remove.
21250         (__arm_vshrntq_m): Remove.
21251         (vrshrnbq): Remove.
21252         (vrshrntq): Remove.
21253         (vrshrnbq_m): Remove.
21254         (vrshrntq_m): Remove.
21255         (vrshrnbq_n_s16): Remove.
21256         (vrshrntq_n_s16): Remove.
21257         (vrshrnbq_n_u16): Remove.
21258         (vrshrntq_n_u16): Remove.
21259         (vrshrnbq_n_s32): Remove.
21260         (vrshrntq_n_s32): Remove.
21261         (vrshrnbq_n_u32): Remove.
21262         (vrshrntq_n_u32): Remove.
21263         (vrshrnbq_m_n_s32): Remove.
21264         (vrshrnbq_m_n_s16): Remove.
21265         (vrshrnbq_m_n_u32): Remove.
21266         (vrshrnbq_m_n_u16): Remove.
21267         (vrshrntq_m_n_s32): Remove.
21268         (vrshrntq_m_n_s16): Remove.
21269         (vrshrntq_m_n_u32): Remove.
21270         (vrshrntq_m_n_u16): Remove.
21271         (__arm_vrshrnbq_n_s16): Remove.
21272         (__arm_vrshrntq_n_s16): Remove.
21273         (__arm_vrshrnbq_n_u16): Remove.
21274         (__arm_vrshrntq_n_u16): Remove.
21275         (__arm_vrshrnbq_n_s32): Remove.
21276         (__arm_vrshrntq_n_s32): Remove.
21277         (__arm_vrshrnbq_n_u32): Remove.
21278         (__arm_vrshrntq_n_u32): Remove.
21279         (__arm_vrshrnbq_m_n_s32): Remove.
21280         (__arm_vrshrnbq_m_n_s16): Remove.
21281         (__arm_vrshrnbq_m_n_u32): Remove.
21282         (__arm_vrshrnbq_m_n_u16): Remove.
21283         (__arm_vrshrntq_m_n_s32): Remove.
21284         (__arm_vrshrntq_m_n_s16): Remove.
21285         (__arm_vrshrntq_m_n_u32): Remove.
21286         (__arm_vrshrntq_m_n_u16): Remove.
21287         (__arm_vrshrnbq): Remove.
21288         (__arm_vrshrntq): Remove.
21289         (__arm_vrshrnbq_m): Remove.
21290         (__arm_vrshrntq_m): Remove.
21291         (vqshrnbq): Remove.
21292         (vqshrntq): Remove.
21293         (vqshrnbq_m): Remove.
21294         (vqshrntq_m): Remove.
21295         (vqshrnbq_n_s16): Remove.
21296         (vqshrntq_n_s16): Remove.
21297         (vqshrnbq_n_u16): Remove.
21298         (vqshrntq_n_u16): Remove.
21299         (vqshrnbq_n_s32): Remove.
21300         (vqshrntq_n_s32): Remove.
21301         (vqshrnbq_n_u32): Remove.
21302         (vqshrntq_n_u32): Remove.
21303         (vqshrnbq_m_n_s32): Remove.
21304         (vqshrnbq_m_n_s16): Remove.
21305         (vqshrnbq_m_n_u32): Remove.
21306         (vqshrnbq_m_n_u16): Remove.
21307         (vqshrntq_m_n_s32): Remove.
21308         (vqshrntq_m_n_s16): Remove.
21309         (vqshrntq_m_n_u32): Remove.
21310         (vqshrntq_m_n_u16): Remove.
21311         (__arm_vqshrnbq_n_s16): Remove.
21312         (__arm_vqshrntq_n_s16): Remove.
21313         (__arm_vqshrnbq_n_u16): Remove.
21314         (__arm_vqshrntq_n_u16): Remove.
21315         (__arm_vqshrnbq_n_s32): Remove.
21316         (__arm_vqshrntq_n_s32): Remove.
21317         (__arm_vqshrnbq_n_u32): Remove.
21318         (__arm_vqshrntq_n_u32): Remove.
21319         (__arm_vqshrnbq_m_n_s32): Remove.
21320         (__arm_vqshrnbq_m_n_s16): Remove.
21321         (__arm_vqshrnbq_m_n_u32): Remove.
21322         (__arm_vqshrnbq_m_n_u16): Remove.
21323         (__arm_vqshrntq_m_n_s32): Remove.
21324         (__arm_vqshrntq_m_n_s16): Remove.
21325         (__arm_vqshrntq_m_n_u32): Remove.
21326         (__arm_vqshrntq_m_n_u16): Remove.
21327         (__arm_vqshrnbq): Remove.
21328         (__arm_vqshrntq): Remove.
21329         (__arm_vqshrnbq_m): Remove.
21330         (__arm_vqshrntq_m): Remove.
21331         (vqrshrnbq): Remove.
21332         (vqrshrntq): Remove.
21333         (vqrshrnbq_m): Remove.
21334         (vqrshrntq_m): Remove.
21335         (vqrshrnbq_n_s16): Remove.
21336         (vqrshrnbq_n_u16): Remove.
21337         (vqrshrnbq_n_s32): Remove.
21338         (vqrshrnbq_n_u32): Remove.
21339         (vqrshrntq_n_s16): Remove.
21340         (vqrshrntq_n_u16): Remove.
21341         (vqrshrntq_n_s32): Remove.
21342         (vqrshrntq_n_u32): Remove.
21343         (vqrshrnbq_m_n_s32): Remove.
21344         (vqrshrnbq_m_n_s16): Remove.
21345         (vqrshrnbq_m_n_u32): Remove.
21346         (vqrshrnbq_m_n_u16): Remove.
21347         (vqrshrntq_m_n_s32): Remove.
21348         (vqrshrntq_m_n_s16): Remove.
21349         (vqrshrntq_m_n_u32): Remove.
21350         (vqrshrntq_m_n_u16): Remove.
21351         (__arm_vqrshrnbq_n_s16): Remove.
21352         (__arm_vqrshrnbq_n_u16): Remove.
21353         (__arm_vqrshrnbq_n_s32): Remove.
21354         (__arm_vqrshrnbq_n_u32): Remove.
21355         (__arm_vqrshrntq_n_s16): Remove.
21356         (__arm_vqrshrntq_n_u16): Remove.
21357         (__arm_vqrshrntq_n_s32): Remove.
21358         (__arm_vqrshrntq_n_u32): Remove.
21359         (__arm_vqrshrnbq_m_n_s32): Remove.
21360         (__arm_vqrshrnbq_m_n_s16): Remove.
21361         (__arm_vqrshrnbq_m_n_u32): Remove.
21362         (__arm_vqrshrnbq_m_n_u16): Remove.
21363         (__arm_vqrshrntq_m_n_s32): Remove.
21364         (__arm_vqrshrntq_m_n_s16): Remove.
21365         (__arm_vqrshrntq_m_n_u32): Remove.
21366         (__arm_vqrshrntq_m_n_u16): Remove.
21367         (__arm_vqrshrnbq): Remove.
21368         (__arm_vqrshrntq): Remove.
21369         (__arm_vqrshrnbq_m): Remove.
21370         (__arm_vqrshrntq_m): Remove.
21371
21372 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21373
21374         * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
21375         (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
21376         vrshrnt, vshrnb, vshrnt.
21377         (isu): New.
21378         * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
21379         (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
21380         (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
21381         (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
21382         (mve_vshrntq_n_<supf><mode>): Merge into ...
21383         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21384         (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
21385         (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
21386         (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
21387         (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
21388         Merge into ...
21389         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21390
21391 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21392
21393         * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
21394         New.
21395         * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
21396
21397 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21398
21399         * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
21400         (vmaxq, vminq): New.
21401         * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
21402         * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
21403         * config/arm/arm_mve.h (vminq): Remove.
21404         (vmaxq): Remove.
21405         (vmaxq_m): Remove.
21406         (vminq_m): Remove.
21407         (vminq_x): Remove.
21408         (vmaxq_x): Remove.
21409         (vminq_u8): Remove.
21410         (vmaxq_u8): Remove.
21411         (vminq_s8): Remove.
21412         (vmaxq_s8): Remove.
21413         (vminq_u16): Remove.
21414         (vmaxq_u16): Remove.
21415         (vminq_s16): Remove.
21416         (vmaxq_s16): Remove.
21417         (vminq_u32): Remove.
21418         (vmaxq_u32): Remove.
21419         (vminq_s32): Remove.
21420         (vmaxq_s32): Remove.
21421         (vmaxq_m_s8): Remove.
21422         (vmaxq_m_s32): Remove.
21423         (vmaxq_m_s16): Remove.
21424         (vmaxq_m_u8): Remove.
21425         (vmaxq_m_u32): Remove.
21426         (vmaxq_m_u16): Remove.
21427         (vminq_m_s8): Remove.
21428         (vminq_m_s32): Remove.
21429         (vminq_m_s16): Remove.
21430         (vminq_m_u8): Remove.
21431         (vminq_m_u32): Remove.
21432         (vminq_m_u16): Remove.
21433         (vminq_x_s8): Remove.
21434         (vminq_x_s16): Remove.
21435         (vminq_x_s32): Remove.
21436         (vminq_x_u8): Remove.
21437         (vminq_x_u16): Remove.
21438         (vminq_x_u32): Remove.
21439         (vmaxq_x_s8): Remove.
21440         (vmaxq_x_s16): Remove.
21441         (vmaxq_x_s32): Remove.
21442         (vmaxq_x_u8): Remove.
21443         (vmaxq_x_u16): Remove.
21444         (vmaxq_x_u32): Remove.
21445         (__arm_vminq_u8): Remove.
21446         (__arm_vmaxq_u8): Remove.
21447         (__arm_vminq_s8): Remove.
21448         (__arm_vmaxq_s8): Remove.
21449         (__arm_vminq_u16): Remove.
21450         (__arm_vmaxq_u16): Remove.
21451         (__arm_vminq_s16): Remove.
21452         (__arm_vmaxq_s16): Remove.
21453         (__arm_vminq_u32): Remove.
21454         (__arm_vmaxq_u32): Remove.
21455         (__arm_vminq_s32): Remove.
21456         (__arm_vmaxq_s32): Remove.
21457         (__arm_vmaxq_m_s8): Remove.
21458         (__arm_vmaxq_m_s32): Remove.
21459         (__arm_vmaxq_m_s16): Remove.
21460         (__arm_vmaxq_m_u8): Remove.
21461         (__arm_vmaxq_m_u32): Remove.
21462         (__arm_vmaxq_m_u16): Remove.
21463         (__arm_vminq_m_s8): Remove.
21464         (__arm_vminq_m_s32): Remove.
21465         (__arm_vminq_m_s16): Remove.
21466         (__arm_vminq_m_u8): Remove.
21467         (__arm_vminq_m_u32): Remove.
21468         (__arm_vminq_m_u16): Remove.
21469         (__arm_vminq_x_s8): Remove.
21470         (__arm_vminq_x_s16): Remove.
21471         (__arm_vminq_x_s32): Remove.
21472         (__arm_vminq_x_u8): Remove.
21473         (__arm_vminq_x_u16): Remove.
21474         (__arm_vminq_x_u32): Remove.
21475         (__arm_vmaxq_x_s8): Remove.
21476         (__arm_vmaxq_x_s16): Remove.
21477         (__arm_vmaxq_x_s32): Remove.
21478         (__arm_vmaxq_x_u8): Remove.
21479         (__arm_vmaxq_x_u16): Remove.
21480         (__arm_vmaxq_x_u32): Remove.
21481         (__arm_vminq): Remove.
21482         (__arm_vmaxq): Remove.
21483         (__arm_vmaxq_m): Remove.
21484         (__arm_vminq_m): Remove.
21485         (__arm_vminq_x): Remove.
21486         (__arm_vmaxq_x): Remove.
21487
21488 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21489
21490         * config/arm/iterators.md (MAX_MIN_SU): New.
21491         (max_min_su_str): New.
21492         (max_min_supf): New.
21493         * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
21494         (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
21495         (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
21496
21497 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21498
21499         * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
21500         (vqshlq, vshlq): New.
21501         * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
21502         * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
21503         * config/arm/arm_mve.h (vshlq): Remove.
21504         (vshlq_r): Remove.
21505         (vshlq_n): Remove.
21506         (vshlq_m_r): Remove.
21507         (vshlq_m): Remove.
21508         (vshlq_m_n): Remove.
21509         (vshlq_x): Remove.
21510         (vshlq_x_n): Remove.
21511         (vshlq_s8): Remove.
21512         (vshlq_s16): Remove.
21513         (vshlq_s32): Remove.
21514         (vshlq_u8): Remove.
21515         (vshlq_u16): Remove.
21516         (vshlq_u32): Remove.
21517         (vshlq_r_u8): Remove.
21518         (vshlq_n_u8): Remove.
21519         (vshlq_r_s8): Remove.
21520         (vshlq_n_s8): Remove.
21521         (vshlq_r_u16): Remove.
21522         (vshlq_n_u16): Remove.
21523         (vshlq_r_s16): Remove.
21524         (vshlq_n_s16): Remove.
21525         (vshlq_r_u32): Remove.
21526         (vshlq_n_u32): Remove.
21527         (vshlq_r_s32): Remove.
21528         (vshlq_n_s32): Remove.
21529         (vshlq_m_r_u8): Remove.
21530         (vshlq_m_r_s8): Remove.
21531         (vshlq_m_r_u16): Remove.
21532         (vshlq_m_r_s16): Remove.
21533         (vshlq_m_r_u32): Remove.
21534         (vshlq_m_r_s32): Remove.
21535         (vshlq_m_u8): Remove.
21536         (vshlq_m_s8): Remove.
21537         (vshlq_m_u16): Remove.
21538         (vshlq_m_s16): Remove.
21539         (vshlq_m_u32): Remove.
21540         (vshlq_m_s32): Remove.
21541         (vshlq_m_n_s8): Remove.
21542         (vshlq_m_n_s32): Remove.
21543         (vshlq_m_n_s16): Remove.
21544         (vshlq_m_n_u8): Remove.
21545         (vshlq_m_n_u32): Remove.
21546         (vshlq_m_n_u16): Remove.
21547         (vshlq_x_s8): Remove.
21548         (vshlq_x_s16): Remove.
21549         (vshlq_x_s32): Remove.
21550         (vshlq_x_u8): Remove.
21551         (vshlq_x_u16): Remove.
21552         (vshlq_x_u32): Remove.
21553         (vshlq_x_n_s8): Remove.
21554         (vshlq_x_n_s16): Remove.
21555         (vshlq_x_n_s32): Remove.
21556         (vshlq_x_n_u8): Remove.
21557         (vshlq_x_n_u16): Remove.
21558         (vshlq_x_n_u32): Remove.
21559         (__arm_vshlq_s8): Remove.
21560         (__arm_vshlq_s16): Remove.
21561         (__arm_vshlq_s32): Remove.
21562         (__arm_vshlq_u8): Remove.
21563         (__arm_vshlq_u16): Remove.
21564         (__arm_vshlq_u32): Remove.
21565         (__arm_vshlq_r_u8): Remove.
21566         (__arm_vshlq_n_u8): Remove.
21567         (__arm_vshlq_r_s8): Remove.
21568         (__arm_vshlq_n_s8): Remove.
21569         (__arm_vshlq_r_u16): Remove.
21570         (__arm_vshlq_n_u16): Remove.
21571         (__arm_vshlq_r_s16): Remove.
21572         (__arm_vshlq_n_s16): Remove.
21573         (__arm_vshlq_r_u32): Remove.
21574         (__arm_vshlq_n_u32): Remove.
21575         (__arm_vshlq_r_s32): Remove.
21576         (__arm_vshlq_n_s32): Remove.
21577         (__arm_vshlq_m_r_u8): Remove.
21578         (__arm_vshlq_m_r_s8): Remove.
21579         (__arm_vshlq_m_r_u16): Remove.
21580         (__arm_vshlq_m_r_s16): Remove.
21581         (__arm_vshlq_m_r_u32): Remove.
21582         (__arm_vshlq_m_r_s32): Remove.
21583         (__arm_vshlq_m_u8): Remove.
21584         (__arm_vshlq_m_s8): Remove.
21585         (__arm_vshlq_m_u16): Remove.
21586         (__arm_vshlq_m_s16): Remove.
21587         (__arm_vshlq_m_u32): Remove.
21588         (__arm_vshlq_m_s32): Remove.
21589         (__arm_vshlq_m_n_s8): Remove.
21590         (__arm_vshlq_m_n_s32): Remove.
21591         (__arm_vshlq_m_n_s16): Remove.
21592         (__arm_vshlq_m_n_u8): Remove.
21593         (__arm_vshlq_m_n_u32): Remove.
21594         (__arm_vshlq_m_n_u16): Remove.
21595         (__arm_vshlq_x_s8): Remove.
21596         (__arm_vshlq_x_s16): Remove.
21597         (__arm_vshlq_x_s32): Remove.
21598         (__arm_vshlq_x_u8): Remove.
21599         (__arm_vshlq_x_u16): Remove.
21600         (__arm_vshlq_x_u32): Remove.
21601         (__arm_vshlq_x_n_s8): Remove.
21602         (__arm_vshlq_x_n_s16): Remove.
21603         (__arm_vshlq_x_n_s32): Remove.
21604         (__arm_vshlq_x_n_u8): Remove.
21605         (__arm_vshlq_x_n_u16): Remove.
21606         (__arm_vshlq_x_n_u32): Remove.
21607         (__arm_vshlq): Remove.
21608         (__arm_vshlq_r): Remove.
21609         (__arm_vshlq_n): Remove.
21610         (__arm_vshlq_m_r): Remove.
21611         (__arm_vshlq_m): Remove.
21612         (__arm_vshlq_m_n): Remove.
21613         (__arm_vshlq_x): Remove.
21614         (__arm_vshlq_x_n): Remove.
21615         (vqshlq): Remove.
21616         (vqshlq_r): Remove.
21617         (vqshlq_n): Remove.
21618         (vqshlq_m_r): Remove.
21619         (vqshlq_m_n): Remove.
21620         (vqshlq_m): Remove.
21621         (vqshlq_u8): Remove.
21622         (vqshlq_r_u8): Remove.
21623         (vqshlq_n_u8): Remove.
21624         (vqshlq_s8): Remove.
21625         (vqshlq_r_s8): Remove.
21626         (vqshlq_n_s8): Remove.
21627         (vqshlq_u16): Remove.
21628         (vqshlq_r_u16): Remove.
21629         (vqshlq_n_u16): Remove.
21630         (vqshlq_s16): Remove.
21631         (vqshlq_r_s16): Remove.
21632         (vqshlq_n_s16): Remove.
21633         (vqshlq_u32): Remove.
21634         (vqshlq_r_u32): Remove.
21635         (vqshlq_n_u32): Remove.
21636         (vqshlq_s32): Remove.
21637         (vqshlq_r_s32): Remove.
21638         (vqshlq_n_s32): Remove.
21639         (vqshlq_m_r_u8): Remove.
21640         (vqshlq_m_r_s8): Remove.
21641         (vqshlq_m_r_u16): Remove.
21642         (vqshlq_m_r_s16): Remove.
21643         (vqshlq_m_r_u32): Remove.
21644         (vqshlq_m_r_s32): Remove.
21645         (vqshlq_m_n_s8): Remove.
21646         (vqshlq_m_n_s32): Remove.
21647         (vqshlq_m_n_s16): Remove.
21648         (vqshlq_m_n_u8): Remove.
21649         (vqshlq_m_n_u32): Remove.
21650         (vqshlq_m_n_u16): Remove.
21651         (vqshlq_m_s8): Remove.
21652         (vqshlq_m_s32): Remove.
21653         (vqshlq_m_s16): Remove.
21654         (vqshlq_m_u8): Remove.
21655         (vqshlq_m_u32): Remove.
21656         (vqshlq_m_u16): Remove.
21657         (__arm_vqshlq_u8): Remove.
21658         (__arm_vqshlq_r_u8): Remove.
21659         (__arm_vqshlq_n_u8): Remove.
21660         (__arm_vqshlq_s8): Remove.
21661         (__arm_vqshlq_r_s8): Remove.
21662         (__arm_vqshlq_n_s8): Remove.
21663         (__arm_vqshlq_u16): Remove.
21664         (__arm_vqshlq_r_u16): Remove.
21665         (__arm_vqshlq_n_u16): Remove.
21666         (__arm_vqshlq_s16): Remove.
21667         (__arm_vqshlq_r_s16): Remove.
21668         (__arm_vqshlq_n_s16): Remove.
21669         (__arm_vqshlq_u32): Remove.
21670         (__arm_vqshlq_r_u32): Remove.
21671         (__arm_vqshlq_n_u32): Remove.
21672         (__arm_vqshlq_s32): Remove.
21673         (__arm_vqshlq_r_s32): Remove.
21674         (__arm_vqshlq_n_s32): Remove.
21675         (__arm_vqshlq_m_r_u8): Remove.
21676         (__arm_vqshlq_m_r_s8): Remove.
21677         (__arm_vqshlq_m_r_u16): Remove.
21678         (__arm_vqshlq_m_r_s16): Remove.
21679         (__arm_vqshlq_m_r_u32): Remove.
21680         (__arm_vqshlq_m_r_s32): Remove.
21681         (__arm_vqshlq_m_n_s8): Remove.
21682         (__arm_vqshlq_m_n_s32): Remove.
21683         (__arm_vqshlq_m_n_s16): Remove.
21684         (__arm_vqshlq_m_n_u8): Remove.
21685         (__arm_vqshlq_m_n_u32): Remove.
21686         (__arm_vqshlq_m_n_u16): Remove.
21687         (__arm_vqshlq_m_s8): Remove.
21688         (__arm_vqshlq_m_s32): Remove.
21689         (__arm_vqshlq_m_s16): Remove.
21690         (__arm_vqshlq_m_u8): Remove.
21691         (__arm_vqshlq_m_u32): Remove.
21692         (__arm_vqshlq_m_u16): Remove.
21693         (__arm_vqshlq): Remove.
21694         (__arm_vqshlq_r): Remove.
21695         (__arm_vqshlq_n): Remove.
21696         (__arm_vqshlq_m_r): Remove.
21697         (__arm_vqshlq_m_n): Remove.
21698         (__arm_vqshlq_m): Remove.
21699
21700 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21701
21702         * config/arm/arm-mve-builtins-functions.h (class
21703         unspec_mve_function_exact_insn_vshl): New.
21704
21705 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21706
21707         * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
21708         * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
21709
21710 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21711
21712         * config/arm/arm-mve-builtins.cc (has_inactive_argument)
21713         (finish_opt_n_resolution): Handle MODE_r.
21714         * config/arm/arm-mve-builtins.def (r): New mode.
21715
21716 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21717
21718         * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
21719         * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
21720
21721 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21722
21723         * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
21724         (vabdq): New.
21725         * config/arm/arm-mve-builtins-base.def (vabdq): New.
21726         * config/arm/arm-mve-builtins-base.h (vabdq): New.
21727         * config/arm/arm_mve.h (vabdq): Remove.
21728         (vabdq_m): Remove.
21729         (vabdq_x): Remove.
21730         (vabdq_u8): Remove.
21731         (vabdq_s8): Remove.
21732         (vabdq_u16): Remove.
21733         (vabdq_s16): Remove.
21734         (vabdq_u32): Remove.
21735         (vabdq_s32): Remove.
21736         (vabdq_f16): Remove.
21737         (vabdq_f32): Remove.
21738         (vabdq_m_s8): Remove.
21739         (vabdq_m_s32): Remove.
21740         (vabdq_m_s16): Remove.
21741         (vabdq_m_u8): Remove.
21742         (vabdq_m_u32): Remove.
21743         (vabdq_m_u16): Remove.
21744         (vabdq_m_f32): Remove.
21745         (vabdq_m_f16): Remove.
21746         (vabdq_x_s8): Remove.
21747         (vabdq_x_s16): Remove.
21748         (vabdq_x_s32): Remove.
21749         (vabdq_x_u8): Remove.
21750         (vabdq_x_u16): Remove.
21751         (vabdq_x_u32): Remove.
21752         (vabdq_x_f16): Remove.
21753         (vabdq_x_f32): Remove.
21754         (__arm_vabdq_u8): Remove.
21755         (__arm_vabdq_s8): Remove.
21756         (__arm_vabdq_u16): Remove.
21757         (__arm_vabdq_s16): Remove.
21758         (__arm_vabdq_u32): Remove.
21759         (__arm_vabdq_s32): Remove.
21760         (__arm_vabdq_m_s8): Remove.
21761         (__arm_vabdq_m_s32): Remove.
21762         (__arm_vabdq_m_s16): Remove.
21763         (__arm_vabdq_m_u8): Remove.
21764         (__arm_vabdq_m_u32): Remove.
21765         (__arm_vabdq_m_u16): Remove.
21766         (__arm_vabdq_x_s8): Remove.
21767         (__arm_vabdq_x_s16): Remove.
21768         (__arm_vabdq_x_s32): Remove.
21769         (__arm_vabdq_x_u8): Remove.
21770         (__arm_vabdq_x_u16): Remove.
21771         (__arm_vabdq_x_u32): Remove.
21772         (__arm_vabdq_f16): Remove.
21773         (__arm_vabdq_f32): Remove.
21774         (__arm_vabdq_m_f32): Remove.
21775         (__arm_vabdq_m_f16): Remove.
21776         (__arm_vabdq_x_f16): Remove.
21777         (__arm_vabdq_x_f32): Remove.
21778         (__arm_vabdq): Remove.
21779         (__arm_vabdq_m): Remove.
21780         (__arm_vabdq_x): Remove.
21781
21782 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21783
21784         * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
21785         (MVE_FP_VABDQ_ONLY): New.
21786         (mve_insn): Add vabd.
21787         * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
21788         (@mve_<mve_insn>q_f<mode>): ... this.
21789         (mve_vabdq_m_f<mode>): Remove.
21790
21791 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21792
21793         * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
21794         * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
21795         * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
21796         * config/arm/arm_mve.h (vqrdmulhq): Remove.
21797         (vqrdmulhq_m): Remove.
21798         (vqrdmulhq_s8): Remove.
21799         (vqrdmulhq_n_s8): Remove.
21800         (vqrdmulhq_s16): Remove.
21801         (vqrdmulhq_n_s16): Remove.
21802         (vqrdmulhq_s32): Remove.
21803         (vqrdmulhq_n_s32): Remove.
21804         (vqrdmulhq_m_n_s8): Remove.
21805         (vqrdmulhq_m_n_s32): Remove.
21806         (vqrdmulhq_m_n_s16): Remove.
21807         (vqrdmulhq_m_s8): Remove.
21808         (vqrdmulhq_m_s32): Remove.
21809         (vqrdmulhq_m_s16): Remove.
21810         (__arm_vqrdmulhq_s8): Remove.
21811         (__arm_vqrdmulhq_n_s8): Remove.
21812         (__arm_vqrdmulhq_s16): Remove.
21813         (__arm_vqrdmulhq_n_s16): Remove.
21814         (__arm_vqrdmulhq_s32): Remove.
21815         (__arm_vqrdmulhq_n_s32): Remove.
21816         (__arm_vqrdmulhq_m_n_s8): Remove.
21817         (__arm_vqrdmulhq_m_n_s32): Remove.
21818         (__arm_vqrdmulhq_m_n_s16): Remove.
21819         (__arm_vqrdmulhq_m_s8): Remove.
21820         (__arm_vqrdmulhq_m_s32): Remove.
21821         (__arm_vqrdmulhq_m_s16): Remove.
21822         (__arm_vqrdmulhq): Remove.
21823         (__arm_vqrdmulhq_m): Remove.
21824
21825 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21826
21827         * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
21828         (MVE_SHIFT_N, MVE_SHIFT_R): New.
21829         (mve_insn): Add vqshl, vshl.
21830         * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
21831         (mve_vshlq_n_<supf><mode>): Merge into ...
21832         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21833         (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
21834         ...
21835         (@mve_<mve_insn>q_r_<supf><mode>): ... this.
21836         (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
21837         into ...
21838         (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
21839         (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
21840         into ...
21841         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21842         * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
21843         into ...
21844         (@mve_<mve_insn>q_<supf><mode>): ... this.
21845
21846 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21847
21848         * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
21849         * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
21850         * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
21851         * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
21852         vqrshlq, vrshlq.
21853         * config/arm/arm_mve.h (vrshlq): Remove.
21854         (vrshlq_m_n): Remove.
21855         (vrshlq_m): Remove.
21856         (vrshlq_x): Remove.
21857         (vrshlq_u8): Remove.
21858         (vrshlq_n_u8): Remove.
21859         (vrshlq_s8): Remove.
21860         (vrshlq_n_s8): Remove.
21861         (vrshlq_u16): Remove.
21862         (vrshlq_n_u16): Remove.
21863         (vrshlq_s16): Remove.
21864         (vrshlq_n_s16): Remove.
21865         (vrshlq_u32): Remove.
21866         (vrshlq_n_u32): Remove.
21867         (vrshlq_s32): Remove.
21868         (vrshlq_n_s32): Remove.
21869         (vrshlq_m_n_u8): Remove.
21870         (vrshlq_m_n_s8): Remove.
21871         (vrshlq_m_n_u16): Remove.
21872         (vrshlq_m_n_s16): Remove.
21873         (vrshlq_m_n_u32): Remove.
21874         (vrshlq_m_n_s32): Remove.
21875         (vrshlq_m_s8): Remove.
21876         (vrshlq_m_s32): Remove.
21877         (vrshlq_m_s16): Remove.
21878         (vrshlq_m_u8): Remove.
21879         (vrshlq_m_u32): Remove.
21880         (vrshlq_m_u16): Remove.
21881         (vrshlq_x_s8): Remove.
21882         (vrshlq_x_s16): Remove.
21883         (vrshlq_x_s32): Remove.
21884         (vrshlq_x_u8): Remove.
21885         (vrshlq_x_u16): Remove.
21886         (vrshlq_x_u32): Remove.
21887         (__arm_vrshlq_u8): Remove.
21888         (__arm_vrshlq_n_u8): Remove.
21889         (__arm_vrshlq_s8): Remove.
21890         (__arm_vrshlq_n_s8): Remove.
21891         (__arm_vrshlq_u16): Remove.
21892         (__arm_vrshlq_n_u16): Remove.
21893         (__arm_vrshlq_s16): Remove.
21894         (__arm_vrshlq_n_s16): Remove.
21895         (__arm_vrshlq_u32): Remove.
21896         (__arm_vrshlq_n_u32): Remove.
21897         (__arm_vrshlq_s32): Remove.
21898         (__arm_vrshlq_n_s32): Remove.
21899         (__arm_vrshlq_m_n_u8): Remove.
21900         (__arm_vrshlq_m_n_s8): Remove.
21901         (__arm_vrshlq_m_n_u16): Remove.
21902         (__arm_vrshlq_m_n_s16): Remove.
21903         (__arm_vrshlq_m_n_u32): Remove.
21904         (__arm_vrshlq_m_n_s32): Remove.
21905         (__arm_vrshlq_m_s8): Remove.
21906         (__arm_vrshlq_m_s32): Remove.
21907         (__arm_vrshlq_m_s16): Remove.
21908         (__arm_vrshlq_m_u8): Remove.
21909         (__arm_vrshlq_m_u32): Remove.
21910         (__arm_vrshlq_m_u16): Remove.
21911         (__arm_vrshlq_x_s8): Remove.
21912         (__arm_vrshlq_x_s16): Remove.
21913         (__arm_vrshlq_x_s32): Remove.
21914         (__arm_vrshlq_x_u8): Remove.
21915         (__arm_vrshlq_x_u16): Remove.
21916         (__arm_vrshlq_x_u32): Remove.
21917         (__arm_vrshlq): Remove.
21918         (__arm_vrshlq_m_n): Remove.
21919         (__arm_vrshlq_m): Remove.
21920         (__arm_vrshlq_x): Remove.
21921         (vqrshlq): Remove.
21922         (vqrshlq_m_n): Remove.
21923         (vqrshlq_m): Remove.
21924         (vqrshlq_u8): Remove.
21925         (vqrshlq_n_u8): Remove.
21926         (vqrshlq_s8): Remove.
21927         (vqrshlq_n_s8): Remove.
21928         (vqrshlq_u16): Remove.
21929         (vqrshlq_n_u16): Remove.
21930         (vqrshlq_s16): Remove.
21931         (vqrshlq_n_s16): Remove.
21932         (vqrshlq_u32): Remove.
21933         (vqrshlq_n_u32): Remove.
21934         (vqrshlq_s32): Remove.
21935         (vqrshlq_n_s32): Remove.
21936         (vqrshlq_m_n_u8): Remove.
21937         (vqrshlq_m_n_s8): Remove.
21938         (vqrshlq_m_n_u16): Remove.
21939         (vqrshlq_m_n_s16): Remove.
21940         (vqrshlq_m_n_u32): Remove.
21941         (vqrshlq_m_n_s32): Remove.
21942         (vqrshlq_m_s8): Remove.
21943         (vqrshlq_m_s32): Remove.
21944         (vqrshlq_m_s16): Remove.
21945         (vqrshlq_m_u8): Remove.
21946         (vqrshlq_m_u32): Remove.
21947         (vqrshlq_m_u16): Remove.
21948         (__arm_vqrshlq_u8): Remove.
21949         (__arm_vqrshlq_n_u8): Remove.
21950         (__arm_vqrshlq_s8): Remove.
21951         (__arm_vqrshlq_n_s8): Remove.
21952         (__arm_vqrshlq_u16): Remove.
21953         (__arm_vqrshlq_n_u16): Remove.
21954         (__arm_vqrshlq_s16): Remove.
21955         (__arm_vqrshlq_n_s16): Remove.
21956         (__arm_vqrshlq_u32): Remove.
21957         (__arm_vqrshlq_n_u32): Remove.
21958         (__arm_vqrshlq_s32): Remove.
21959         (__arm_vqrshlq_n_s32): Remove.
21960         (__arm_vqrshlq_m_n_u8): Remove.
21961         (__arm_vqrshlq_m_n_s8): Remove.
21962         (__arm_vqrshlq_m_n_u16): Remove.
21963         (__arm_vqrshlq_m_n_s16): Remove.
21964         (__arm_vqrshlq_m_n_u32): Remove.
21965         (__arm_vqrshlq_m_n_s32): Remove.
21966         (__arm_vqrshlq_m_s8): Remove.
21967         (__arm_vqrshlq_m_s32): Remove.
21968         (__arm_vqrshlq_m_s16): Remove.
21969         (__arm_vqrshlq_m_u8): Remove.
21970         (__arm_vqrshlq_m_u32): Remove.
21971         (__arm_vqrshlq_m_u16): Remove.
21972         (__arm_vqrshlq): Remove.
21973         (__arm_vqrshlq_m_n): Remove.
21974         (__arm_vqrshlq_m): Remove.
21975
21976 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21977
21978         * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
21979         (mve_insn): Add vqrshl, vrshl.
21980         * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
21981         (mve_vrshlq_n_<supf><mode>): Merge into ...
21982         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21983         (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
21984         into ...
21985         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21986
21987 2023-05-05  Christophe Lyon  <christophe.lyon@arm.com>
21988
21989         * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
21990         * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
21991
21992 2023-05-05  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
21993
21994         PR target/109615
21995         * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
21996         denegrate PHI optmization.
21997
21998 2023-05-05  Uros Bizjak  <ubizjak@gmail.com>
21999
22000         * config/i386/predicates.md (register_no_SP_operand):
22001         Rename from index_register_operand.
22002         (call_register_operand): Update for rename.
22003         * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
22004
22005 2023-05-05  Tamar Christina  <tamar.christina@arm.com>
22006
22007         PR bootstrap/84402
22008         * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
22009         GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
22010         GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
22011         (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
22012         (s-match): Split into s-generic-match and s-gimple-match.
22013         * configure.ac (with-matchpd-partitions,
22014         DEFAULT_MATCHPD_PARTITIONS): New.
22015         * configure: Regenerate.
22016
22017 2023-05-05  Tamar Christina  <tamar.christina@arm.com>
22018
22019         PR bootstrap/84402
22020         * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
22021         (decision_tree::gen): Accept list of files instead of single and update
22022         to write function definition to header and main file.
22023         (write_predicate): Likewise.
22024         (write_header): Emit pragmas and new includes.
22025         (main): Create file buffers and cleanup.
22026         (showUsage, write_header_includes): New.
22027
22028 2023-05-05  Tamar Christina  <tamar.christina@arm.com>
22029
22030         PR bootstrap/84402
22031         * Makefile.in (OBJS): Add gimple-match-exports.o.
22032         * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
22033         * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
22034         gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
22035         gimple_resimplify5, constant_for_folding, convert_conditional_op,
22036         maybe_resimplify_conditional_op, gimple_match_op::resimplify,
22037         maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
22038         do_valueize, try_conditional_simplification, gimple_extract,
22039         gimple_extract_op, canonicalize_code, commutative_binary_op_p,
22040         commutative_ternary_op_p, first_commutative_argument,
22041         associative_binary_op_p, directly_supported_p,
22042         get_conditional_internal_fn): Moved to gimple-match-exports.cc
22043         * gimple-match-exports.cc: New file.
22044
22045 2023-05-05  Tamar Christina  <tamar.christina@arm.com>
22046
22047         PR bootstrap/84402
22048         * genmatch.cc (decision_tree::gen, write_predicate): Generate new
22049         debug_dump var.
22050         (dt_simplify::gen_1): Use it.
22051
22052 2023-05-05  Tamar Christina  <tamar.christina@arm.com>
22053
22054         PR bootstrap/84402
22055         * genmatch.cc (output_line_directive): Only emit commented directive
22056         when -vv.
22057
22058 2023-05-05  Tamar Christina  <tamar.christina@arm.com>
22059
22060         PR bootstrap/84402
22061         * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
22062
22063 2023-05-05  Tobias Burnus  <tobias@codesourcery.com>
22064
22065         * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
22066         unused in_mode/in_n variables.
22067
22068 2023-05-05  Richard Biener  <rguenther@suse.de>
22069
22070         PR tree-optimization/109735
22071         * tree-vect-stmts.cc (vectorizable_operation): Perform
22072         conversion for POINTER_DIFF_EXPR unconditionally.
22073
22074 2023-05-05  Uros Bizjak  <ubizjak@gmail.com>
22075
22076         * config/i386/mmx.md (mulv2si3): New expander.
22077         (*mulv2si3): New insn pattern.
22078
22079 2023-05-05  Tobias Burnus  <tobias@codesourcery.com>
22080             Thomas Schwinge  <thomas@codesourcery.com>
22081
22082         PR libgomp/108098
22083         * config/nvptx/mkoffload.cc (process): Emit dummy procedure
22084         alongside reverse-offload function table to prevent NULL values
22085         of the function addresses.
22086
22087 2023-05-05  Jakub Jelinek  <jakub@redhat.com>
22088
22089         * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
22090         mpft_t -> mpfr_t.
22091         * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
22092
22093 2023-05-05  Andrew Pinski  <apinski@marvell.com>
22094
22095         PR tree-optimization/109732
22096         * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
22097         of the argtrue/argfalse.
22098
22099 2023-05-05  Andrew Pinski  <apinski@marvell.com>
22100
22101         PR tree-optimization/109722
22102         * match.pd: Extend the `ABS<a> == 0` pattern
22103         to cover `ABSU<a> == 0` too.
22104
22105 2023-05-04  Uros Bizjak  <ubizjak@gmail.com>
22106
22107         PR target/109733
22108         * config/i386/predicates.md (index_reg_operand): New predicate.
22109         * config/i386/i386.md (ashift to lea spliter): Use
22110         general_reg_operand and index_reg_operand predicates.
22111
22112 2023-05-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
22113
22114         * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
22115         Rename and reimplement with RTL codes to...
22116         (aarch64_<optab>hn2<mode>_insn_le): .. This.
22117         (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
22118         (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
22119         codes to...
22120         (aarch64_<optab>hn2<mode>_insn_be): ... This.
22121         (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
22122         (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
22123         (aarch64_<optab>hn2<mode>): ... This.
22124         (aarch64_r<optab>hn2<mode>): New expander.
22125         * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
22126         UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
22127         (ADDSUBHN): Delete.
22128         (sur): Remove handling of the above.
22129         (addsub): Likewise.
22130
22131 2023-05-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
22132
22133         * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
22134         Delete.
22135         (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
22136         (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
22137         (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
22138         (aarch64_<sur><addsub>hn<mode>): Delete.
22139         (aarch64_<optab>hn<mode>): New define_expand.
22140         (aarch64_r<optab>hn<mode>): Likewise.
22141         * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
22142         New predicate.
22143
22144 2023-05-04  Andrew Pinski  <apinski@marvell.com>
22145
22146         * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
22147         diamond form bb with forwarder only empty blocks better.
22148
22149 2023-05-04  Andrew Pinski  <apinski@marvell.com>
22150
22151         * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
22152         * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
22153         (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
22154         of an inline version of it.
22155         * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
22156         * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
22157
22158 2023-05-04  Andrew Pinski  <apinski@marvell.com>
22159
22160         * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
22161         the default argument value for dce_ssa_names to nullptr.
22162         Check to make sure dce_ssa_names is a non-nullptr before
22163         calling simple_dce_from_worklist.
22164
22165 2023-05-04  Uros Bizjak  <ubizjak@gmail.com>
22166
22167         * config/i386/predicates.md (index_register_operand): Reject
22168         arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
22169         VIRTUAL_REGISTER_P operands.  Allow subregs of memory before reload.
22170         (call_register_no_elim_operand): Rewrite as ...
22171         (call_register_operand): ... this.
22172         (call_insn_operand): Use call_register_operand predicate.
22173
22174 2023-05-04  Richard Biener  <rguenther@suse.de>
22175
22176         PR tree-optimization/109721
22177         * tree-vect-stmts.cc (vectorizable_operation): Make sure
22178         to test word_mode for all !target_support_p operations.
22179
22180 2023-05-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
22181
22182         PR target/99195
22183         * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
22184         (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
22185         (aarch64_mla<mode>): Rename to...
22186         (aarch64_mla<mode><vczle><vczbe>): ... This.
22187         (*aarch64_mla_elt<mode>): Rename to...
22188         (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
22189         (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
22190         (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22191         (aarch64_mla_n<mode>): Rename to...
22192         (aarch64_mla_n<mode><vczle><vczbe>): ... This.
22193         (aarch64_mls<mode>): Rename to...
22194         (aarch64_mls<mode><vczle><vczbe>): ... This.
22195         (*aarch64_mls_elt<mode>): Rename to...
22196         (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
22197         (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
22198         (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22199         (aarch64_mls_n<mode>): Rename to...
22200         (aarch64_mls_n<mode><vczle><vczbe>): ... This.
22201         (fma<mode>4): Rename to...
22202         (fma<mode>4<vczle><vczbe>): ... This.
22203         (*aarch64_fma4_elt<mode>): Rename to...
22204         (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
22205         (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
22206         (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22207         (*aarch64_fma4_elt_from_dup<mode>): Rename to...
22208         (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
22209         (fnma<mode>4): Rename to...
22210         (fnma<mode>4<vczle><vczbe>): ... This.
22211         (*aarch64_fnma4_elt<mode>): Rename to...
22212         (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
22213         (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
22214         (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
22215         (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
22216         (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
22217         (aarch64_simd_bsl<mode>_internal): Rename to...
22218         (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
22219         (*aarch64_simd_bsl<mode>_alt): Rename to...
22220         (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
22221
22222 2023-05-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
22223
22224         PR target/99195
22225         * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
22226         (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
22227         (fabd<mode>3): Rename to...
22228         (fabd<mode>3<vczle><vczbe>): ... This.
22229         (aarch64_<optab>p<mode>): Rename to...
22230         (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
22231         (aarch64_faddp<mode>): Rename to...
22232         (aarch64_faddp<mode><vczle><vczbe>): ... This.
22233
22234 2023-05-04  Martin Liska  <mliska@suse.cz>
22235
22236         * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
22237         (print_version): Use it.
22238         (generate_results): Likewise.
22239
22240 2023-05-04  Richard Biener  <rguenther@suse.de>
22241
22242         * tree-cfg.h (last_stmt): Rename to ...
22243         (last_nondebug_stmt): ... this.
22244         * tree-cfg.cc (last_stmt): Rename to ...
22245         (last_nondebug_stmt): ... this.
22246         (assign_discriminators): Adjust.
22247         (group_case_labels_stmt): Likewise.
22248         (gimple_can_duplicate_bb_p): Likewise.
22249         (execute_fixup_cfg): Likewise.
22250         * auto-profile.cc (afdo_propagate_circuit): Likewise.
22251         * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
22252         * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
22253         (determine_parallel_type): Likewise.
22254         (adjust_context_and_scope): Likewise.
22255         (expand_task_call): Likewise.
22256         (remove_exit_barrier): Likewise.
22257         (expand_omp_taskreg): Likewise.
22258         (expand_omp_for_init_counts): Likewise.
22259         (expand_omp_for_init_vars): Likewise.
22260         (expand_omp_for_static_chunk): Likewise.
22261         (expand_omp_simd): Likewise.
22262         (expand_oacc_for): Likewise.
22263         (expand_omp_for): Likewise.
22264         (expand_omp_sections): Likewise.
22265         (expand_omp_atomic_fetch_op): Likewise.
22266         (expand_omp_atomic_cas): Likewise.
22267         (expand_omp_atomic): Likewise.
22268         (expand_omp_target): Likewise.
22269         (expand_omp): Likewise.
22270         (omp_make_gimple_edges): Likewise.
22271         * trans-mem.cc (tm_region_init): Likewise.
22272         * tree-inline.cc (redirect_all_calls): Likewise.
22273         * tree-parloops.cc (gen_parallel_loop): Likewise.
22274         * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
22275         * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
22276         Likewise.
22277         * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
22278         (may_eliminate_iv): Likewise.
22279         * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
22280         * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
22281         Likewise.
22282         (estimate_numbers_of_iterations): Likewise.
22283         * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
22284         * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
22285         (set_predicates_for_bb): Likewise.
22286         (init_loop_unswitch_info): Likewise.
22287         (hoist_guard): Likewise.
22288         * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
22289         (minmax_replacement): Likewise.
22290         * tree-ssa-reassoc.cc (update_range_test): Likewise.
22291         (optimize_range_tests_to_bit_test): Likewise.
22292         (optimize_range_tests_var_bound): Likewise.
22293         (optimize_range_tests): Likewise.
22294         (no_side_effect_bb): Likewise.
22295         (suitable_cond_bb): Likewise.
22296         (maybe_optimize_range_tests): Likewise.
22297         (reassociate_bb): Likewise.
22298         * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
22299
22300 2023-05-04  Jakub Jelinek  <jakub@redhat.com>
22301
22302         PR debug/109676
22303         * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
22304         If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
22305         for it only if it still has TImode.  Don't decide whether to call
22306         fix_debug_reg_uses based on whether SRC is ever set or not.
22307
22308 2023-05-04  Hans-Peter Nilsson  <hp@axis.com>
22309
22310         * config/cris/cris.cc (cris_split_constant): New function.
22311         * config/cris/cris.md (splitop): New iterator.
22312         (opsplit1): New define_peephole2.
22313         * config/cris/cris-protos.h (cris_split_constant): Declare.
22314         (cris_splittable_constant_p): New macro.
22315
22316 2023-05-04  Hans-Peter Nilsson  <hp@axis.com>
22317
22318         * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
22319         to ALL_REGS.
22320
22321 2023-05-04  Hans-Peter Nilsson  <hp@axis.com>
22322
22323         * config/cris/cris.cc (cris_side_effect_mode_ok): Use
22324         lra_in_progress, not reload_in_progress.
22325         * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
22326         * config/cris/constraints.md ("Q"): Ditto.
22327
22328 2023-05-03  Andrew Pinski  <apinski@marvell.com>
22329
22330         * tree-ssa-dce.cc (simple_dce_from_worklist): Record
22331         stats on removed number of statements and phis.
22332
22333 2023-05-03  Aldy Hernandez  <aldyh@redhat.com>
22334
22335         PR tree-optimization/109711
22336         * value-range.cc (irange::verify_range): Allow types of
22337         error_mark_node.
22338
22339 2023-05-03  Alexander Monakov  <amonakov@ispras.ru>
22340
22341         PR sanitizer/90746
22342         * calls.cc (can_implement_as_sibling_call_p): Reject calls
22343         to __sanitizer_cov_trace_pc.
22344
22345 2023-05-03  Richard Sandiford  <richard.sandiford@arm.com>
22346
22347         PR target/109661
22348         * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
22349         a new ABI break parameter for GCC 14.  Set it to the alignment
22350         of enums that have an underlying type.  Take the true alignment
22351         of such enums from the TYPE_ALIGN of the underlying type's
22352         TYPE_MAIN_VARIANT.
22353         (aarch64_function_arg_boundary): Update accordingly.
22354         (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
22355         Warn about ABI differences.
22356
22357 2023-05-03  Richard Sandiford  <richard.sandiford@arm.com>
22358
22359         PR target/109661
22360         * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
22361         ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
22362         (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
22363         (aarch64_gimplify_va_arg_expr): Likewise.
22364
22365 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
22366
22367         * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
22368         (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
22369         (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
22370         (vrmulhq): New.
22371         * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
22372         (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
22373         * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
22374         (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
22375         * config/arm/arm_mve.h (vhsubq): Remove.
22376         (vhaddq): Remove.
22377         (vhaddq_m): Remove.
22378         (vhsubq_m): Remove.
22379         (vhaddq_x): Remove.
22380         (vhsubq_x): Remove.
22381         (vhsubq_u8): Remove.
22382         (vhsubq_n_u8): Remove.
22383         (vhaddq_u8): Remove.
22384         (vhaddq_n_u8): Remove.
22385         (vhsubq_s8): Remove.
22386         (vhsubq_n_s8): Remove.
22387         (vhaddq_s8): Remove.
22388         (vhaddq_n_s8): Remove.
22389         (vhsubq_u16): Remove.
22390         (vhsubq_n_u16): Remove.
22391         (vhaddq_u16): Remove.
22392         (vhaddq_n_u16): Remove.
22393         (vhsubq_s16): Remove.
22394         (vhsubq_n_s16): Remove.
22395         (vhaddq_s16): Remove.
22396         (vhaddq_n_s16): Remove.
22397         (vhsubq_u32): Remove.
22398         (vhsubq_n_u32): Remove.
22399         (vhaddq_u32): Remove.
22400         (vhaddq_n_u32): Remove.
22401         (vhsubq_s32): Remove.
22402         (vhsubq_n_s32): Remove.
22403         (vhaddq_s32): Remove.
22404         (vhaddq_n_s32): Remove.
22405         (vhaddq_m_n_s8): Remove.
22406         (vhaddq_m_n_s32): Remove.
22407         (vhaddq_m_n_s16): Remove.
22408         (vhaddq_m_n_u8): Remove.
22409         (vhaddq_m_n_u32): Remove.
22410         (vhaddq_m_n_u16): Remove.
22411         (vhaddq_m_s8): Remove.
22412         (vhaddq_m_s32): Remove.
22413         (vhaddq_m_s16): Remove.
22414         (vhaddq_m_u8): Remove.
22415         (vhaddq_m_u32): Remove.
22416         (vhaddq_m_u16): Remove.
22417         (vhsubq_m_n_s8): Remove.
22418         (vhsubq_m_n_s32): Remove.
22419         (vhsubq_m_n_s16): Remove.
22420         (vhsubq_m_n_u8): Remove.
22421         (vhsubq_m_n_u32): Remove.
22422         (vhsubq_m_n_u16): Remove.
22423         (vhsubq_m_s8): Remove.
22424         (vhsubq_m_s32): Remove.
22425         (vhsubq_m_s16): Remove.
22426         (vhsubq_m_u8): Remove.
22427         (vhsubq_m_u32): Remove.
22428         (vhsubq_m_u16): Remove.
22429         (vhaddq_x_n_s8): Remove.
22430         (vhaddq_x_n_s16): Remove.
22431         (vhaddq_x_n_s32): Remove.
22432         (vhaddq_x_n_u8): Remove.
22433         (vhaddq_x_n_u16): Remove.
22434         (vhaddq_x_n_u32): Remove.
22435         (vhaddq_x_s8): Remove.
22436         (vhaddq_x_s16): Remove.
22437         (vhaddq_x_s32): Remove.
22438         (vhaddq_x_u8): Remove.
22439         (vhaddq_x_u16): Remove.
22440         (vhaddq_x_u32): Remove.
22441         (vhsubq_x_n_s8): Remove.
22442         (vhsubq_x_n_s16): Remove.
22443         (vhsubq_x_n_s32): Remove.
22444         (vhsubq_x_n_u8): Remove.
22445         (vhsubq_x_n_u16): Remove.
22446         (vhsubq_x_n_u32): Remove.
22447         (vhsubq_x_s8): Remove.
22448         (vhsubq_x_s16): Remove.
22449         (vhsubq_x_s32): Remove.
22450         (vhsubq_x_u8): Remove.
22451         (vhsubq_x_u16): Remove.
22452         (vhsubq_x_u32): Remove.
22453         (__arm_vhsubq_u8): Remove.
22454         (__arm_vhsubq_n_u8): Remove.
22455         (__arm_vhaddq_u8): Remove.
22456         (__arm_vhaddq_n_u8): Remove.
22457         (__arm_vhsubq_s8): Remove.
22458         (__arm_vhsubq_n_s8): Remove.
22459         (__arm_vhaddq_s8): Remove.
22460         (__arm_vhaddq_n_s8): Remove.
22461         (__arm_vhsubq_u16): Remove.
22462         (__arm_vhsubq_n_u16): Remove.
22463         (__arm_vhaddq_u16): Remove.
22464         (__arm_vhaddq_n_u16): Remove.
22465         (__arm_vhsubq_s16): Remove.
22466         (__arm_vhsubq_n_s16): Remove.
22467         (__arm_vhaddq_s16): Remove.
22468         (__arm_vhaddq_n_s16): Remove.
22469         (__arm_vhsubq_u32): Remove.
22470         (__arm_vhsubq_n_u32): Remove.
22471         (__arm_vhaddq_u32): Remove.
22472         (__arm_vhaddq_n_u32): Remove.
22473         (__arm_vhsubq_s32): Remove.
22474         (__arm_vhsubq_n_s32): Remove.
22475         (__arm_vhaddq_s32): Remove.
22476         (__arm_vhaddq_n_s32): Remove.
22477         (__arm_vhaddq_m_n_s8): Remove.
22478         (__arm_vhaddq_m_n_s32): Remove.
22479         (__arm_vhaddq_m_n_s16): Remove.
22480         (__arm_vhaddq_m_n_u8): Remove.
22481         (__arm_vhaddq_m_n_u32): Remove.
22482         (__arm_vhaddq_m_n_u16): Remove.
22483         (__arm_vhaddq_m_s8): Remove.
22484         (__arm_vhaddq_m_s32): Remove.
22485         (__arm_vhaddq_m_s16): Remove.
22486         (__arm_vhaddq_m_u8): Remove.
22487         (__arm_vhaddq_m_u32): Remove.
22488         (__arm_vhaddq_m_u16): Remove.
22489         (__arm_vhsubq_m_n_s8): Remove.
22490         (__arm_vhsubq_m_n_s32): Remove.
22491         (__arm_vhsubq_m_n_s16): Remove.
22492         (__arm_vhsubq_m_n_u8): Remove.
22493         (__arm_vhsubq_m_n_u32): Remove.
22494         (__arm_vhsubq_m_n_u16): Remove.
22495         (__arm_vhsubq_m_s8): Remove.
22496         (__arm_vhsubq_m_s32): Remove.
22497         (__arm_vhsubq_m_s16): Remove.
22498         (__arm_vhsubq_m_u8): Remove.
22499         (__arm_vhsubq_m_u32): Remove.
22500         (__arm_vhsubq_m_u16): Remove.
22501         (__arm_vhaddq_x_n_s8): Remove.
22502         (__arm_vhaddq_x_n_s16): Remove.
22503         (__arm_vhaddq_x_n_s32): Remove.
22504         (__arm_vhaddq_x_n_u8): Remove.
22505         (__arm_vhaddq_x_n_u16): Remove.
22506         (__arm_vhaddq_x_n_u32): Remove.
22507         (__arm_vhaddq_x_s8): Remove.
22508         (__arm_vhaddq_x_s16): Remove.
22509         (__arm_vhaddq_x_s32): Remove.
22510         (__arm_vhaddq_x_u8): Remove.
22511         (__arm_vhaddq_x_u16): Remove.
22512         (__arm_vhaddq_x_u32): Remove.
22513         (__arm_vhsubq_x_n_s8): Remove.
22514         (__arm_vhsubq_x_n_s16): Remove.
22515         (__arm_vhsubq_x_n_s32): Remove.
22516         (__arm_vhsubq_x_n_u8): Remove.
22517         (__arm_vhsubq_x_n_u16): Remove.
22518         (__arm_vhsubq_x_n_u32): Remove.
22519         (__arm_vhsubq_x_s8): Remove.
22520         (__arm_vhsubq_x_s16): Remove.
22521         (__arm_vhsubq_x_s32): Remove.
22522         (__arm_vhsubq_x_u8): Remove.
22523         (__arm_vhsubq_x_u16): Remove.
22524         (__arm_vhsubq_x_u32): Remove.
22525         (__arm_vhsubq): Remove.
22526         (__arm_vhaddq): Remove.
22527         (__arm_vhaddq_m): Remove.
22528         (__arm_vhsubq_m): Remove.
22529         (__arm_vhaddq_x): Remove.
22530         (__arm_vhsubq_x): Remove.
22531         (vmulhq): Remove.
22532         (vmulhq_m): Remove.
22533         (vmulhq_x): Remove.
22534         (vmulhq_u8): Remove.
22535         (vmulhq_s8): Remove.
22536         (vmulhq_u16): Remove.
22537         (vmulhq_s16): Remove.
22538         (vmulhq_u32): Remove.
22539         (vmulhq_s32): Remove.
22540         (vmulhq_m_s8): Remove.
22541         (vmulhq_m_s32): Remove.
22542         (vmulhq_m_s16): Remove.
22543         (vmulhq_m_u8): Remove.
22544         (vmulhq_m_u32): Remove.
22545         (vmulhq_m_u16): Remove.
22546         (vmulhq_x_s8): Remove.
22547         (vmulhq_x_s16): Remove.
22548         (vmulhq_x_s32): Remove.
22549         (vmulhq_x_u8): Remove.
22550         (vmulhq_x_u16): Remove.
22551         (vmulhq_x_u32): Remove.
22552         (__arm_vmulhq_u8): Remove.
22553         (__arm_vmulhq_s8): Remove.
22554         (__arm_vmulhq_u16): Remove.
22555         (__arm_vmulhq_s16): Remove.
22556         (__arm_vmulhq_u32): Remove.
22557         (__arm_vmulhq_s32): Remove.
22558         (__arm_vmulhq_m_s8): Remove.
22559         (__arm_vmulhq_m_s32): Remove.
22560         (__arm_vmulhq_m_s16): Remove.
22561         (__arm_vmulhq_m_u8): Remove.
22562         (__arm_vmulhq_m_u32): Remove.
22563         (__arm_vmulhq_m_u16): Remove.
22564         (__arm_vmulhq_x_s8): Remove.
22565         (__arm_vmulhq_x_s16): Remove.
22566         (__arm_vmulhq_x_s32): Remove.
22567         (__arm_vmulhq_x_u8): Remove.
22568         (__arm_vmulhq_x_u16): Remove.
22569         (__arm_vmulhq_x_u32): Remove.
22570         (__arm_vmulhq): Remove.
22571         (__arm_vmulhq_m): Remove.
22572         (__arm_vmulhq_x): Remove.
22573         (vqsubq): Remove.
22574         (vqaddq): Remove.
22575         (vqaddq_m): Remove.
22576         (vqsubq_m): Remove.
22577         (vqsubq_u8): Remove.
22578         (vqsubq_n_u8): Remove.
22579         (vqaddq_u8): Remove.
22580         (vqaddq_n_u8): Remove.
22581         (vqsubq_s8): Remove.
22582         (vqsubq_n_s8): Remove.
22583         (vqaddq_s8): Remove.
22584         (vqaddq_n_s8): Remove.
22585         (vqsubq_u16): Remove.
22586         (vqsubq_n_u16): Remove.
22587         (vqaddq_u16): Remove.
22588         (vqaddq_n_u16): Remove.
22589         (vqsubq_s16): Remove.
22590         (vqsubq_n_s16): Remove.
22591         (vqaddq_s16): Remove.
22592         (vqaddq_n_s16): Remove.
22593         (vqsubq_u32): Remove.
22594         (vqsubq_n_u32): Remove.
22595         (vqaddq_u32): Remove.
22596         (vqaddq_n_u32): Remove.
22597         (vqsubq_s32): Remove.
22598         (vqsubq_n_s32): Remove.
22599         (vqaddq_s32): Remove.
22600         (vqaddq_n_s32): Remove.
22601         (vqaddq_m_n_s8): Remove.
22602         (vqaddq_m_n_s32): Remove.
22603         (vqaddq_m_n_s16): Remove.
22604         (vqaddq_m_n_u8): Remove.
22605         (vqaddq_m_n_u32): Remove.
22606         (vqaddq_m_n_u16): Remove.
22607         (vqaddq_m_s8): Remove.
22608         (vqaddq_m_s32): Remove.
22609         (vqaddq_m_s16): Remove.
22610         (vqaddq_m_u8): Remove.
22611         (vqaddq_m_u32): Remove.
22612         (vqaddq_m_u16): Remove.
22613         (vqsubq_m_n_s8): Remove.
22614         (vqsubq_m_n_s32): Remove.
22615         (vqsubq_m_n_s16): Remove.
22616         (vqsubq_m_n_u8): Remove.
22617         (vqsubq_m_n_u32): Remove.
22618         (vqsubq_m_n_u16): Remove.
22619         (vqsubq_m_s8): Remove.
22620         (vqsubq_m_s32): Remove.
22621         (vqsubq_m_s16): Remove.
22622         (vqsubq_m_u8): Remove.
22623         (vqsubq_m_u32): Remove.
22624         (vqsubq_m_u16): Remove.
22625         (__arm_vqsubq_u8): Remove.
22626         (__arm_vqsubq_n_u8): Remove.
22627         (__arm_vqaddq_u8): Remove.
22628         (__arm_vqaddq_n_u8): Remove.
22629         (__arm_vqsubq_s8): Remove.
22630         (__arm_vqsubq_n_s8): Remove.
22631         (__arm_vqaddq_s8): Remove.
22632         (__arm_vqaddq_n_s8): Remove.
22633         (__arm_vqsubq_u16): Remove.
22634         (__arm_vqsubq_n_u16): Remove.
22635         (__arm_vqaddq_u16): Remove.
22636         (__arm_vqaddq_n_u16): Remove.
22637         (__arm_vqsubq_s16): Remove.
22638         (__arm_vqsubq_n_s16): Remove.
22639         (__arm_vqaddq_s16): Remove.
22640         (__arm_vqaddq_n_s16): Remove.
22641         (__arm_vqsubq_u32): Remove.
22642         (__arm_vqsubq_n_u32): Remove.
22643         (__arm_vqaddq_u32): Remove.
22644         (__arm_vqaddq_n_u32): Remove.
22645         (__arm_vqsubq_s32): Remove.
22646         (__arm_vqsubq_n_s32): Remove.
22647         (__arm_vqaddq_s32): Remove.
22648         (__arm_vqaddq_n_s32): Remove.
22649         (__arm_vqaddq_m_n_s8): Remove.
22650         (__arm_vqaddq_m_n_s32): Remove.
22651         (__arm_vqaddq_m_n_s16): Remove.
22652         (__arm_vqaddq_m_n_u8): Remove.
22653         (__arm_vqaddq_m_n_u32): Remove.
22654         (__arm_vqaddq_m_n_u16): Remove.
22655         (__arm_vqaddq_m_s8): Remove.
22656         (__arm_vqaddq_m_s32): Remove.
22657         (__arm_vqaddq_m_s16): Remove.
22658         (__arm_vqaddq_m_u8): Remove.
22659         (__arm_vqaddq_m_u32): Remove.
22660         (__arm_vqaddq_m_u16): Remove.
22661         (__arm_vqsubq_m_n_s8): Remove.
22662         (__arm_vqsubq_m_n_s32): Remove.
22663         (__arm_vqsubq_m_n_s16): Remove.
22664         (__arm_vqsubq_m_n_u8): Remove.
22665         (__arm_vqsubq_m_n_u32): Remove.
22666         (__arm_vqsubq_m_n_u16): Remove.
22667         (__arm_vqsubq_m_s8): Remove.
22668         (__arm_vqsubq_m_s32): Remove.
22669         (__arm_vqsubq_m_s16): Remove.
22670         (__arm_vqsubq_m_u8): Remove.
22671         (__arm_vqsubq_m_u32): Remove.
22672         (__arm_vqsubq_m_u16): Remove.
22673         (__arm_vqsubq): Remove.
22674         (__arm_vqaddq): Remove.
22675         (__arm_vqaddq_m): Remove.
22676         (__arm_vqsubq_m): Remove.
22677         (vqdmulhq): Remove.
22678         (vqdmulhq_m): Remove.
22679         (vqdmulhq_s8): Remove.
22680         (vqdmulhq_n_s8): Remove.
22681         (vqdmulhq_s16): Remove.
22682         (vqdmulhq_n_s16): Remove.
22683         (vqdmulhq_s32): Remove.
22684         (vqdmulhq_n_s32): Remove.
22685         (vqdmulhq_m_n_s8): Remove.
22686         (vqdmulhq_m_n_s32): Remove.
22687         (vqdmulhq_m_n_s16): Remove.
22688         (vqdmulhq_m_s8): Remove.
22689         (vqdmulhq_m_s32): Remove.
22690         (vqdmulhq_m_s16): Remove.
22691         (__arm_vqdmulhq_s8): Remove.
22692         (__arm_vqdmulhq_n_s8): Remove.
22693         (__arm_vqdmulhq_s16): Remove.
22694         (__arm_vqdmulhq_n_s16): Remove.
22695         (__arm_vqdmulhq_s32): Remove.
22696         (__arm_vqdmulhq_n_s32): Remove.
22697         (__arm_vqdmulhq_m_n_s8): Remove.
22698         (__arm_vqdmulhq_m_n_s32): Remove.
22699         (__arm_vqdmulhq_m_n_s16): Remove.
22700         (__arm_vqdmulhq_m_s8): Remove.
22701         (__arm_vqdmulhq_m_s32): Remove.
22702         (__arm_vqdmulhq_m_s16): Remove.
22703         (__arm_vqdmulhq): Remove.
22704         (__arm_vqdmulhq_m): Remove.
22705         (vrhaddq): Remove.
22706         (vrhaddq_m): Remove.
22707         (vrhaddq_x): Remove.
22708         (vrhaddq_u8): Remove.
22709         (vrhaddq_s8): Remove.
22710         (vrhaddq_u16): Remove.
22711         (vrhaddq_s16): Remove.
22712         (vrhaddq_u32): Remove.
22713         (vrhaddq_s32): Remove.
22714         (vrhaddq_m_s8): Remove.
22715         (vrhaddq_m_s32): Remove.
22716         (vrhaddq_m_s16): Remove.
22717         (vrhaddq_m_u8): Remove.
22718         (vrhaddq_m_u32): Remove.
22719         (vrhaddq_m_u16): Remove.
22720         (vrhaddq_x_s8): Remove.
22721         (vrhaddq_x_s16): Remove.
22722         (vrhaddq_x_s32): Remove.
22723         (vrhaddq_x_u8): Remove.
22724         (vrhaddq_x_u16): Remove.
22725         (vrhaddq_x_u32): Remove.
22726         (__arm_vrhaddq_u8): Remove.
22727         (__arm_vrhaddq_s8): Remove.
22728         (__arm_vrhaddq_u16): Remove.
22729         (__arm_vrhaddq_s16): Remove.
22730         (__arm_vrhaddq_u32): Remove.
22731         (__arm_vrhaddq_s32): Remove.
22732         (__arm_vrhaddq_m_s8): Remove.
22733         (__arm_vrhaddq_m_s32): Remove.
22734         (__arm_vrhaddq_m_s16): Remove.
22735         (__arm_vrhaddq_m_u8): Remove.
22736         (__arm_vrhaddq_m_u32): Remove.
22737         (__arm_vrhaddq_m_u16): Remove.
22738         (__arm_vrhaddq_x_s8): Remove.
22739         (__arm_vrhaddq_x_s16): Remove.
22740         (__arm_vrhaddq_x_s32): Remove.
22741         (__arm_vrhaddq_x_u8): Remove.
22742         (__arm_vrhaddq_x_u16): Remove.
22743         (__arm_vrhaddq_x_u32): Remove.
22744         (__arm_vrhaddq): Remove.
22745         (__arm_vrhaddq_m): Remove.
22746         (__arm_vrhaddq_x): Remove.
22747         (vrmulhq): Remove.
22748         (vrmulhq_m): Remove.
22749         (vrmulhq_x): Remove.
22750         (vrmulhq_u8): Remove.
22751         (vrmulhq_s8): Remove.
22752         (vrmulhq_u16): Remove.
22753         (vrmulhq_s16): Remove.
22754         (vrmulhq_u32): Remove.
22755         (vrmulhq_s32): Remove.
22756         (vrmulhq_m_s8): Remove.
22757         (vrmulhq_m_s32): Remove.
22758         (vrmulhq_m_s16): Remove.
22759         (vrmulhq_m_u8): Remove.
22760         (vrmulhq_m_u32): Remove.
22761         (vrmulhq_m_u16): Remove.
22762         (vrmulhq_x_s8): Remove.
22763         (vrmulhq_x_s16): Remove.
22764         (vrmulhq_x_s32): Remove.
22765         (vrmulhq_x_u8): Remove.
22766         (vrmulhq_x_u16): Remove.
22767         (vrmulhq_x_u32): Remove.
22768         (__arm_vrmulhq_u8): Remove.
22769         (__arm_vrmulhq_s8): Remove.
22770         (__arm_vrmulhq_u16): Remove.
22771         (__arm_vrmulhq_s16): Remove.
22772         (__arm_vrmulhq_u32): Remove.
22773         (__arm_vrmulhq_s32): Remove.
22774         (__arm_vrmulhq_m_s8): Remove.
22775         (__arm_vrmulhq_m_s32): Remove.
22776         (__arm_vrmulhq_m_s16): Remove.
22777         (__arm_vrmulhq_m_u8): Remove.
22778         (__arm_vrmulhq_m_u32): Remove.
22779         (__arm_vrmulhq_m_u16): Remove.
22780         (__arm_vrmulhq_x_s8): Remove.
22781         (__arm_vrmulhq_x_s16): Remove.
22782         (__arm_vrmulhq_x_s32): Remove.
22783         (__arm_vrmulhq_x_u8): Remove.
22784         (__arm_vrmulhq_x_u16): Remove.
22785         (__arm_vrmulhq_x_u32): Remove.
22786         (__arm_vrmulhq): Remove.
22787         (__arm_vrmulhq_m): Remove.
22788         (__arm_vrmulhq_x): Remove.
22789
22790 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
22791
22792         * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
22793         (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
22794         vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
22795         (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
22796         * config/arm/mve.md (mve_vabdq_<supf><mode>)
22797         (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
22798         (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
22799         (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
22800         (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
22801         (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
22802         (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
22803         ...
22804         (@mve_<mve_insn>q_<supf><mode>): ... this.
22805         * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
22806         (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
22807         gen_mve_vhaddq / gen_mve_vrhaddq.
22808
22809 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
22810
22811         * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
22812         (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
22813         vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
22814         (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
22815         VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
22816         * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
22817         (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
22818         (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
22819         (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
22820         (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
22821         (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
22822         (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
22823         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22824
22825 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
22826
22827         * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
22828         (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
22829         vqsubq.
22830         (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
22831         * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
22832         (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
22833         (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
22834         (mve_vqsubq_n_<supf><mode>): Merge into ...
22835         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22836
22837 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
22838
22839         * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
22840         (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
22841         vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
22842         vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
22843         vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
22844         (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
22845         VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
22846         VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
22847         * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
22848         (mve_vshlq_m_<supf><mode>): Merged into
22849         @mve_<mve_insn>q_m_<supf><mode>.
22850         (mve_vabdq_m_<supf><mode>): Likewise.
22851         (mve_vhaddq_m_<supf><mode>): Likewise.
22852         (mve_vhsubq_m_<supf><mode>): Likewise.
22853         (mve_vmaxq_m_<supf><mode>): Likewise.
22854         (mve_vminq_m_<supf><mode>): Likewise.
22855         (mve_vmulhq_m_<supf><mode>): Likewise.
22856         (mve_vqaddq_m_<supf><mode>): Likewise.
22857         (mve_vqrshlq_m_<supf><mode>): Likewise.
22858         (mve_vqshlq_m_<supf><mode>): Likewise.
22859         (mve_vqsubq_m_<supf><mode>): Likewise.
22860         (mve_vrhaddq_m_<supf><mode>): Likewise.
22861         (mve_vrmulhq_m_<supf><mode>): Likewise.
22862         (mve_vrshlq_m_<supf><mode>): Likewise.
22863         (mve_vqdmladhq_m_s<mode>): Likewise.
22864         (mve_vqdmladhxq_m_s<mode>): Likewise.
22865         (mve_vqdmlsdhq_m_s<mode>): Likewise.
22866         (mve_vqdmlsdhxq_m_s<mode>): Likewise.
22867         (mve_vqdmulhq_m_s<mode>): Likewise.
22868         (mve_vqrdmladhq_m_s<mode>): Likewise.
22869         (mve_vqrdmladhxq_m_s<mode>): Likewise.
22870         (mve_vqrdmlsdhq_m_s<mode>): Likewise.
22871         (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
22872         (mve_vqrdmulhq_m_s<mode>): Likewise.
22873
22874 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
22875
22876         * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
22877         * config/arm/arm-mve-builtins-base.def (vcreateq): New.
22878         * config/arm/arm-mve-builtins-base.h (vcreateq): New.
22879         * config/arm/arm_mve.h (vcreateq_f16): Remove.
22880         (vcreateq_f32): Remove.
22881         (vcreateq_u8): Remove.
22882         (vcreateq_u16): Remove.
22883         (vcreateq_u32): Remove.
22884         (vcreateq_u64): Remove.
22885         (vcreateq_s8): Remove.
22886         (vcreateq_s16): Remove.
22887         (vcreateq_s32): Remove.
22888         (vcreateq_s64): Remove.
22889         (__arm_vcreateq_u8): Remove.
22890         (__arm_vcreateq_u16): Remove.
22891         (__arm_vcreateq_u32): Remove.
22892         (__arm_vcreateq_u64): Remove.
22893         (__arm_vcreateq_s8): Remove.
22894         (__arm_vcreateq_s16): Remove.
22895         (__arm_vcreateq_s32): Remove.
22896         (__arm_vcreateq_s64): Remove.
22897         (__arm_vcreateq_f16): Remove.
22898         (__arm_vcreateq_f32): Remove.
22899
22900 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
22901
22902         * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
22903         (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
22904         * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
22905         (@mve_<mve_insn>q_f<mode>): ... this.
22906         (mve_vcreateq_<supf><mode>): Rename into ...
22907         (@mve_<mve_insn>q_<supf><mode>): ... this.
22908
22909 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
22910
22911         * config/arm/arm-mve-builtins-shapes.cc (create): New.
22912         * config/arm/arm-mve-builtins-shapes.h: (create): New.
22913
22914 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
22915
22916         * config/arm/arm-mve-builtins-functions.h (class
22917         unspec_mve_function_exact_insn): New.
22918
22919 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
22920
22921         * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
22922         (vorrq): New.
22923         * config/arm/arm-mve-builtins-base.def (vorrq): New.
22924         * config/arm/arm-mve-builtins-base.h (vorrq): New.
22925         * config/arm/arm-mve-builtins.cc
22926         (function_instance::has_inactive_argument): Handle vorrq.
22927         * config/arm/arm_mve.h (vorrq): Remove.
22928         (vorrq_m_n): Remove.
22929         (vorrq_m): Remove.
22930         (vorrq_x): Remove.
22931         (vorrq_u8): Remove.
22932         (vorrq_s8): Remove.
22933         (vorrq_u16): Remove.
22934         (vorrq_s16): Remove.
22935         (vorrq_u32): Remove.
22936         (vorrq_s32): Remove.
22937         (vorrq_n_u16): Remove.
22938         (vorrq_f16): Remove.
22939         (vorrq_n_s16): Remove.
22940         (vorrq_n_u32): Remove.
22941         (vorrq_f32): Remove.
22942         (vorrq_n_s32): Remove.
22943         (vorrq_m_n_s16): Remove.
22944         (vorrq_m_n_u16): Remove.
22945         (vorrq_m_n_s32): Remove.
22946         (vorrq_m_n_u32): Remove.
22947         (vorrq_m_s8): Remove.
22948         (vorrq_m_s32): Remove.
22949         (vorrq_m_s16): Remove.
22950         (vorrq_m_u8): Remove.
22951         (vorrq_m_u32): Remove.
22952         (vorrq_m_u16): Remove.
22953         (vorrq_m_f32): Remove.
22954         (vorrq_m_f16): Remove.
22955         (vorrq_x_s8): Remove.
22956         (vorrq_x_s16): Remove.
22957         (vorrq_x_s32): Remove.
22958         (vorrq_x_u8): Remove.
22959         (vorrq_x_u16): Remove.
22960         (vorrq_x_u32): Remove.
22961         (vorrq_x_f16): Remove.
22962         (vorrq_x_f32): Remove.
22963         (__arm_vorrq_u8): Remove.
22964         (__arm_vorrq_s8): Remove.
22965         (__arm_vorrq_u16): Remove.
22966         (__arm_vorrq_s16): Remove.
22967         (__arm_vorrq_u32): Remove.
22968         (__arm_vorrq_s32): Remove.
22969         (__arm_vorrq_n_u16): Remove.
22970         (__arm_vorrq_n_s16): Remove.
22971         (__arm_vorrq_n_u32): Remove.
22972         (__arm_vorrq_n_s32): Remove.
22973         (__arm_vorrq_m_n_s16): Remove.
22974         (__arm_vorrq_m_n_u16): Remove.
22975         (__arm_vorrq_m_n_s32): Remove.
22976         (__arm_vorrq_m_n_u32): Remove.
22977         (__arm_vorrq_m_s8): Remove.
22978         (__arm_vorrq_m_s32): Remove.
22979         (__arm_vorrq_m_s16): Remove.
22980         (__arm_vorrq_m_u8): Remove.
22981         (__arm_vorrq_m_u32): Remove.
22982         (__arm_vorrq_m_u16): Remove.
22983         (__arm_vorrq_x_s8): Remove.
22984         (__arm_vorrq_x_s16): Remove.
22985         (__arm_vorrq_x_s32): Remove.
22986         (__arm_vorrq_x_u8): Remove.
22987         (__arm_vorrq_x_u16): Remove.
22988         (__arm_vorrq_x_u32): Remove.
22989         (__arm_vorrq_f16): Remove.
22990         (__arm_vorrq_f32): Remove.
22991         (__arm_vorrq_m_f32): Remove.
22992         (__arm_vorrq_m_f16): Remove.
22993         (__arm_vorrq_x_f16): Remove.
22994         (__arm_vorrq_x_f32): Remove.
22995         (__arm_vorrq): Remove.
22996         (__arm_vorrq_m_n): Remove.
22997         (__arm_vorrq_m): Remove.
22998         (__arm_vorrq_x): Remove.
22999
23000 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
23001
23002         * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
23003         * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
23004         * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
23005         * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
23006
23007 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
23008
23009         * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
23010         (vandq,veorq): New.
23011         * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
23012         * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
23013         * config/arm/arm_mve.h (vandq): Remove.
23014         (vandq_m): Remove.
23015         (vandq_x): Remove.
23016         (vandq_u8): Remove.
23017         (vandq_s8): Remove.
23018         (vandq_u16): Remove.
23019         (vandq_s16): Remove.
23020         (vandq_u32): Remove.
23021         (vandq_s32): Remove.
23022         (vandq_f16): Remove.
23023         (vandq_f32): Remove.
23024         (vandq_m_s8): Remove.
23025         (vandq_m_s32): Remove.
23026         (vandq_m_s16): Remove.
23027         (vandq_m_u8): Remove.
23028         (vandq_m_u32): Remove.
23029         (vandq_m_u16): Remove.
23030         (vandq_m_f32): Remove.
23031         (vandq_m_f16): Remove.
23032         (vandq_x_s8): Remove.
23033         (vandq_x_s16): Remove.
23034         (vandq_x_s32): Remove.
23035         (vandq_x_u8): Remove.
23036         (vandq_x_u16): Remove.
23037         (vandq_x_u32): Remove.
23038         (vandq_x_f16): Remove.
23039         (vandq_x_f32): Remove.
23040         (__arm_vandq_u8): Remove.
23041         (__arm_vandq_s8): Remove.
23042         (__arm_vandq_u16): Remove.
23043         (__arm_vandq_s16): Remove.
23044         (__arm_vandq_u32): Remove.
23045         (__arm_vandq_s32): Remove.
23046         (__arm_vandq_m_s8): Remove.
23047         (__arm_vandq_m_s32): Remove.
23048         (__arm_vandq_m_s16): Remove.
23049         (__arm_vandq_m_u8): Remove.
23050         (__arm_vandq_m_u32): Remove.
23051         (__arm_vandq_m_u16): Remove.
23052         (__arm_vandq_x_s8): Remove.
23053         (__arm_vandq_x_s16): Remove.
23054         (__arm_vandq_x_s32): Remove.
23055         (__arm_vandq_x_u8): Remove.
23056         (__arm_vandq_x_u16): Remove.
23057         (__arm_vandq_x_u32): Remove.
23058         (__arm_vandq_f16): Remove.
23059         (__arm_vandq_f32): Remove.
23060         (__arm_vandq_m_f32): Remove.
23061         (__arm_vandq_m_f16): Remove.
23062         (__arm_vandq_x_f16): Remove.
23063         (__arm_vandq_x_f32): Remove.
23064         (__arm_vandq): Remove.
23065         (__arm_vandq_m): Remove.
23066         (__arm_vandq_x): Remove.
23067         (veorq_m): Remove.
23068         (veorq_x): Remove.
23069         (veorq_u8): Remove.
23070         (veorq_s8): Remove.
23071         (veorq_u16): Remove.
23072         (veorq_s16): Remove.
23073         (veorq_u32): Remove.
23074         (veorq_s32): Remove.
23075         (veorq_f16): Remove.
23076         (veorq_f32): Remove.
23077         (veorq_m_s8): Remove.
23078         (veorq_m_s32): Remove.
23079         (veorq_m_s16): Remove.
23080         (veorq_m_u8): Remove.
23081         (veorq_m_u32): Remove.
23082         (veorq_m_u16): Remove.
23083         (veorq_m_f32): Remove.
23084         (veorq_m_f16): Remove.
23085         (veorq_x_s8): Remove.
23086         (veorq_x_s16): Remove.
23087         (veorq_x_s32): Remove.
23088         (veorq_x_u8): Remove.
23089         (veorq_x_u16): Remove.
23090         (veorq_x_u32): Remove.
23091         (veorq_x_f16): Remove.
23092         (veorq_x_f32): Remove.
23093         (__arm_veorq_u8): Remove.
23094         (__arm_veorq_s8): Remove.
23095         (__arm_veorq_u16): Remove.
23096         (__arm_veorq_s16): Remove.
23097         (__arm_veorq_u32): Remove.
23098         (__arm_veorq_s32): Remove.
23099         (__arm_veorq_m_s8): Remove.
23100         (__arm_veorq_m_s32): Remove.
23101         (__arm_veorq_m_s16): Remove.
23102         (__arm_veorq_m_u8): Remove.
23103         (__arm_veorq_m_u32): Remove.
23104         (__arm_veorq_m_u16): Remove.
23105         (__arm_veorq_x_s8): Remove.
23106         (__arm_veorq_x_s16): Remove.
23107         (__arm_veorq_x_s32): Remove.
23108         (__arm_veorq_x_u8): Remove.
23109         (__arm_veorq_x_u16): Remove.
23110         (__arm_veorq_x_u32): Remove.
23111         (__arm_veorq_f16): Remove.
23112         (__arm_veorq_f32): Remove.
23113         (__arm_veorq_m_f32): Remove.
23114         (__arm_veorq_m_f16): Remove.
23115         (__arm_veorq_x_f16): Remove.
23116         (__arm_veorq_x_f32): Remove.
23117         (__arm_veorq): Remove.
23118         (__arm_veorq_m): Remove.
23119         (__arm_veorq_x): Remove.
23120
23121 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
23122
23123         * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
23124         (MVE_FP_M_BINARY_LOGIC): New.
23125         (MVE_INT_M_N_BINARY_LOGIC): New.
23126         (MVE_INT_N_BINARY_LOGIC): New.
23127         (mve_insn): Add vand, veor, vorr, vbic.
23128         * config/arm/mve.md (mve_vandq_m_<supf><mode>)
23129         (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
23130         (mve_vbicq_m_<supf><mode>): Merge into ...
23131         (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23132         (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
23133         (mve_vbicq_m_f<mode>): Merge into ...
23134         (@mve_<mve_insn>q_m_f<mode>): ... this.
23135         (mve_vorrq_n_<supf><mode>)
23136         (mve_vbicq_n_<supf><mode>): Merge into ...
23137         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23138         (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
23139         into ...
23140         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23141
23142 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
23143
23144         * config/arm/arm-mve-builtins-shapes.cc (binary): New.
23145         * config/arm/arm-mve-builtins-shapes.h (binary): New.
23146
23147 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
23148
23149         * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
23150         New.
23151         (vaddq, vmulq, vsubq): New.
23152         * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
23153         * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
23154         * config/arm/arm_mve.h (vaddq): Remove.
23155         (vaddq_m): Remove.
23156         (vaddq_x): Remove.
23157         (vaddq_n_u8): Remove.
23158         (vaddq_n_s8): Remove.
23159         (vaddq_n_u16): Remove.
23160         (vaddq_n_s16): Remove.
23161         (vaddq_n_u32): Remove.
23162         (vaddq_n_s32): Remove.
23163         (vaddq_n_f16): Remove.
23164         (vaddq_n_f32): Remove.
23165         (vaddq_m_n_s8): Remove.
23166         (vaddq_m_n_s32): Remove.
23167         (vaddq_m_n_s16): Remove.
23168         (vaddq_m_n_u8): Remove.
23169         (vaddq_m_n_u32): Remove.
23170         (vaddq_m_n_u16): Remove.
23171         (vaddq_m_s8): Remove.
23172         (vaddq_m_s32): Remove.
23173         (vaddq_m_s16): Remove.
23174         (vaddq_m_u8): Remove.
23175         (vaddq_m_u32): Remove.
23176         (vaddq_m_u16): Remove.
23177         (vaddq_m_f32): Remove.
23178         (vaddq_m_f16): Remove.
23179         (vaddq_m_n_f32): Remove.
23180         (vaddq_m_n_f16): Remove.
23181         (vaddq_s8): Remove.
23182         (vaddq_s16): Remove.
23183         (vaddq_s32): Remove.
23184         (vaddq_u8): Remove.
23185         (vaddq_u16): Remove.
23186         (vaddq_u32): Remove.
23187         (vaddq_f16): Remove.
23188         (vaddq_f32): Remove.
23189         (vaddq_x_s8): Remove.
23190         (vaddq_x_s16): Remove.
23191         (vaddq_x_s32): Remove.
23192         (vaddq_x_n_s8): Remove.
23193         (vaddq_x_n_s16): Remove.
23194         (vaddq_x_n_s32): Remove.
23195         (vaddq_x_u8): Remove.
23196         (vaddq_x_u16): Remove.
23197         (vaddq_x_u32): Remove.
23198         (vaddq_x_n_u8): Remove.
23199         (vaddq_x_n_u16): Remove.
23200         (vaddq_x_n_u32): Remove.
23201         (vaddq_x_f16): Remove.
23202         (vaddq_x_f32): Remove.
23203         (vaddq_x_n_f16): Remove.
23204         (vaddq_x_n_f32): Remove.
23205         (__arm_vaddq_n_u8): Remove.
23206         (__arm_vaddq_n_s8): Remove.
23207         (__arm_vaddq_n_u16): Remove.
23208         (__arm_vaddq_n_s16): Remove.
23209         (__arm_vaddq_n_u32): Remove.
23210         (__arm_vaddq_n_s32): Remove.
23211         (__arm_vaddq_m_n_s8): Remove.
23212         (__arm_vaddq_m_n_s32): Remove.
23213         (__arm_vaddq_m_n_s16): Remove.
23214         (__arm_vaddq_m_n_u8): Remove.
23215         (__arm_vaddq_m_n_u32): Remove.
23216         (__arm_vaddq_m_n_u16): Remove.
23217         (__arm_vaddq_m_s8): Remove.
23218         (__arm_vaddq_m_s32): Remove.
23219         (__arm_vaddq_m_s16): Remove.
23220         (__arm_vaddq_m_u8): Remove.
23221         (__arm_vaddq_m_u32): Remove.
23222         (__arm_vaddq_m_u16): Remove.
23223         (__arm_vaddq_s8): Remove.
23224         (__arm_vaddq_s16): Remove.
23225         (__arm_vaddq_s32): Remove.
23226         (__arm_vaddq_u8): Remove.
23227         (__arm_vaddq_u16): Remove.
23228         (__arm_vaddq_u32): Remove.
23229         (__arm_vaddq_x_s8): Remove.
23230         (__arm_vaddq_x_s16): Remove.
23231         (__arm_vaddq_x_s32): Remove.
23232         (__arm_vaddq_x_n_s8): Remove.
23233         (__arm_vaddq_x_n_s16): Remove.
23234         (__arm_vaddq_x_n_s32): Remove.
23235         (__arm_vaddq_x_u8): Remove.
23236         (__arm_vaddq_x_u16): Remove.
23237         (__arm_vaddq_x_u32): Remove.
23238         (__arm_vaddq_x_n_u8): Remove.
23239         (__arm_vaddq_x_n_u16): Remove.
23240         (__arm_vaddq_x_n_u32): Remove.
23241         (__arm_vaddq_n_f16): Remove.
23242         (__arm_vaddq_n_f32): Remove.
23243         (__arm_vaddq_m_f32): Remove.
23244         (__arm_vaddq_m_f16): Remove.
23245         (__arm_vaddq_m_n_f32): Remove.
23246         (__arm_vaddq_m_n_f16): Remove.
23247         (__arm_vaddq_f16): Remove.
23248         (__arm_vaddq_f32): Remove.
23249         (__arm_vaddq_x_f16): Remove.
23250         (__arm_vaddq_x_f32): Remove.
23251         (__arm_vaddq_x_n_f16): Remove.
23252         (__arm_vaddq_x_n_f32): Remove.
23253         (__arm_vaddq): Remove.
23254         (__arm_vaddq_m): Remove.
23255         (__arm_vaddq_x): Remove.
23256         (vmulq): Remove.
23257         (vmulq_m): Remove.
23258         (vmulq_x): Remove.
23259         (vmulq_u8): Remove.
23260         (vmulq_n_u8): Remove.
23261         (vmulq_s8): Remove.
23262         (vmulq_n_s8): Remove.
23263         (vmulq_u16): Remove.
23264         (vmulq_n_u16): Remove.
23265         (vmulq_s16): Remove.
23266         (vmulq_n_s16): Remove.
23267         (vmulq_u32): Remove.
23268         (vmulq_n_u32): Remove.
23269         (vmulq_s32): Remove.
23270         (vmulq_n_s32): Remove.
23271         (vmulq_n_f16): Remove.
23272         (vmulq_f16): Remove.
23273         (vmulq_n_f32): Remove.
23274         (vmulq_f32): Remove.
23275         (vmulq_m_n_s8): Remove.
23276         (vmulq_m_n_s32): Remove.
23277         (vmulq_m_n_s16): Remove.
23278         (vmulq_m_n_u8): Remove.
23279         (vmulq_m_n_u32): Remove.
23280         (vmulq_m_n_u16): Remove.
23281         (vmulq_m_s8): Remove.
23282         (vmulq_m_s32): Remove.
23283         (vmulq_m_s16): Remove.
23284         (vmulq_m_u8): Remove.
23285         (vmulq_m_u32): Remove.
23286         (vmulq_m_u16): Remove.
23287         (vmulq_m_f32): Remove.
23288         (vmulq_m_f16): Remove.
23289         (vmulq_m_n_f32): Remove.
23290         (vmulq_m_n_f16): Remove.
23291         (vmulq_x_s8): Remove.
23292         (vmulq_x_s16): Remove.
23293         (vmulq_x_s32): Remove.
23294         (vmulq_x_n_s8): Remove.
23295         (vmulq_x_n_s16): Remove.
23296         (vmulq_x_n_s32): Remove.
23297         (vmulq_x_u8): Remove.
23298         (vmulq_x_u16): Remove.
23299         (vmulq_x_u32): Remove.
23300         (vmulq_x_n_u8): Remove.
23301         (vmulq_x_n_u16): Remove.
23302         (vmulq_x_n_u32): Remove.
23303         (vmulq_x_f16): Remove.
23304         (vmulq_x_f32): Remove.
23305         (vmulq_x_n_f16): Remove.
23306         (vmulq_x_n_f32): Remove.
23307         (__arm_vmulq_u8): Remove.
23308         (__arm_vmulq_n_u8): Remove.
23309         (__arm_vmulq_s8): Remove.
23310         (__arm_vmulq_n_s8): Remove.
23311         (__arm_vmulq_u16): Remove.
23312         (__arm_vmulq_n_u16): Remove.
23313         (__arm_vmulq_s16): Remove.
23314         (__arm_vmulq_n_s16): Remove.
23315         (__arm_vmulq_u32): Remove.
23316         (__arm_vmulq_n_u32): Remove.
23317         (__arm_vmulq_s32): Remove.
23318         (__arm_vmulq_n_s32): Remove.
23319         (__arm_vmulq_m_n_s8): Remove.
23320         (__arm_vmulq_m_n_s32): Remove.
23321         (__arm_vmulq_m_n_s16): Remove.
23322         (__arm_vmulq_m_n_u8): Remove.
23323         (__arm_vmulq_m_n_u32): Remove.
23324         (__arm_vmulq_m_n_u16): Remove.
23325         (__arm_vmulq_m_s8): Remove.
23326         (__arm_vmulq_m_s32): Remove.
23327         (__arm_vmulq_m_s16): Remove.
23328         (__arm_vmulq_m_u8): Remove.
23329         (__arm_vmulq_m_u32): Remove.
23330         (__arm_vmulq_m_u16): Remove.
23331         (__arm_vmulq_x_s8): Remove.
23332         (__arm_vmulq_x_s16): Remove.
23333         (__arm_vmulq_x_s32): Remove.
23334         (__arm_vmulq_x_n_s8): Remove.
23335         (__arm_vmulq_x_n_s16): Remove.
23336         (__arm_vmulq_x_n_s32): Remove.
23337         (__arm_vmulq_x_u8): Remove.
23338         (__arm_vmulq_x_u16): Remove.
23339         (__arm_vmulq_x_u32): Remove.
23340         (__arm_vmulq_x_n_u8): Remove.
23341         (__arm_vmulq_x_n_u16): Remove.
23342         (__arm_vmulq_x_n_u32): Remove.
23343         (__arm_vmulq_n_f16): Remove.
23344         (__arm_vmulq_f16): Remove.
23345         (__arm_vmulq_n_f32): Remove.
23346         (__arm_vmulq_f32): Remove.
23347         (__arm_vmulq_m_f32): Remove.
23348         (__arm_vmulq_m_f16): Remove.
23349         (__arm_vmulq_m_n_f32): Remove.
23350         (__arm_vmulq_m_n_f16): Remove.
23351         (__arm_vmulq_x_f16): Remove.
23352         (__arm_vmulq_x_f32): Remove.
23353         (__arm_vmulq_x_n_f16): Remove.
23354         (__arm_vmulq_x_n_f32): Remove.
23355         (__arm_vmulq): Remove.
23356         (__arm_vmulq_m): Remove.
23357         (__arm_vmulq_x): Remove.
23358         (vsubq): Remove.
23359         (vsubq_m): Remove.
23360         (vsubq_x): Remove.
23361         (vsubq_n_f16): Remove.
23362         (vsubq_n_f32): Remove.
23363         (vsubq_u8): Remove.
23364         (vsubq_n_u8): Remove.
23365         (vsubq_s8): Remove.
23366         (vsubq_n_s8): Remove.
23367         (vsubq_u16): Remove.
23368         (vsubq_n_u16): Remove.
23369         (vsubq_s16): Remove.
23370         (vsubq_n_s16): Remove.
23371         (vsubq_u32): Remove.
23372         (vsubq_n_u32): Remove.
23373         (vsubq_s32): Remove.
23374         (vsubq_n_s32): Remove.
23375         (vsubq_f16): Remove.
23376         (vsubq_f32): Remove.
23377         (vsubq_m_s8): Remove.
23378         (vsubq_m_u8): Remove.
23379         (vsubq_m_s16): Remove.
23380         (vsubq_m_u16): Remove.
23381         (vsubq_m_s32): Remove.
23382         (vsubq_m_u32): Remove.
23383         (vsubq_m_n_s8): Remove.
23384         (vsubq_m_n_s32): Remove.
23385         (vsubq_m_n_s16): Remove.
23386         (vsubq_m_n_u8): Remove.
23387         (vsubq_m_n_u32): Remove.
23388         (vsubq_m_n_u16): Remove.
23389         (vsubq_m_f32): Remove.
23390         (vsubq_m_f16): Remove.
23391         (vsubq_m_n_f32): Remove.
23392         (vsubq_m_n_f16): Remove.
23393         (vsubq_x_s8): Remove.
23394         (vsubq_x_s16): Remove.
23395         (vsubq_x_s32): Remove.
23396         (vsubq_x_n_s8): Remove.
23397         (vsubq_x_n_s16): Remove.
23398         (vsubq_x_n_s32): Remove.
23399         (vsubq_x_u8): Remove.
23400         (vsubq_x_u16): Remove.
23401         (vsubq_x_u32): Remove.
23402         (vsubq_x_n_u8): Remove.
23403         (vsubq_x_n_u16): Remove.
23404         (vsubq_x_n_u32): Remove.
23405         (vsubq_x_f16): Remove.
23406         (vsubq_x_f32): Remove.
23407         (vsubq_x_n_f16): Remove.
23408         (vsubq_x_n_f32): Remove.
23409         (__arm_vsubq_u8): Remove.
23410         (__arm_vsubq_n_u8): Remove.
23411         (__arm_vsubq_s8): Remove.
23412         (__arm_vsubq_n_s8): Remove.
23413         (__arm_vsubq_u16): Remove.
23414         (__arm_vsubq_n_u16): Remove.
23415         (__arm_vsubq_s16): Remove.
23416         (__arm_vsubq_n_s16): Remove.
23417         (__arm_vsubq_u32): Remove.
23418         (__arm_vsubq_n_u32): Remove.
23419         (__arm_vsubq_s32): Remove.
23420         (__arm_vsubq_n_s32): Remove.
23421         (__arm_vsubq_m_s8): Remove.
23422         (__arm_vsubq_m_u8): Remove.
23423         (__arm_vsubq_m_s16): Remove.
23424         (__arm_vsubq_m_u16): Remove.
23425         (__arm_vsubq_m_s32): Remove.
23426         (__arm_vsubq_m_u32): Remove.
23427         (__arm_vsubq_m_n_s8): Remove.
23428         (__arm_vsubq_m_n_s32): Remove.
23429         (__arm_vsubq_m_n_s16): Remove.
23430         (__arm_vsubq_m_n_u8): Remove.
23431         (__arm_vsubq_m_n_u32): Remove.
23432         (__arm_vsubq_m_n_u16): Remove.
23433         (__arm_vsubq_x_s8): Remove.
23434         (__arm_vsubq_x_s16): Remove.
23435         (__arm_vsubq_x_s32): Remove.
23436         (__arm_vsubq_x_n_s8): Remove.
23437         (__arm_vsubq_x_n_s16): Remove.
23438         (__arm_vsubq_x_n_s32): Remove.
23439         (__arm_vsubq_x_u8): Remove.
23440         (__arm_vsubq_x_u16): Remove.
23441         (__arm_vsubq_x_u32): Remove.
23442         (__arm_vsubq_x_n_u8): Remove.
23443         (__arm_vsubq_x_n_u16): Remove.
23444         (__arm_vsubq_x_n_u32): Remove.
23445         (__arm_vsubq_n_f16): Remove.
23446         (__arm_vsubq_n_f32): Remove.
23447         (__arm_vsubq_f16): Remove.
23448         (__arm_vsubq_f32): Remove.
23449         (__arm_vsubq_m_f32): Remove.
23450         (__arm_vsubq_m_f16): Remove.
23451         (__arm_vsubq_m_n_f32): Remove.
23452         (__arm_vsubq_m_n_f16): Remove.
23453         (__arm_vsubq_x_f16): Remove.
23454         (__arm_vsubq_x_f32): Remove.
23455         (__arm_vsubq_x_n_f16): Remove.
23456         (__arm_vsubq_x_n_f32): Remove.
23457         (__arm_vsubq): Remove.
23458         (__arm_vsubq_m): Remove.
23459         (__arm_vsubq_x): Remove.
23460         * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
23461         Remove.
23462         (vmulq_u, vmulq_s, vmulq_f): Remove.
23463         * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
23464         (mve_vmulq_<supf><mode>): Remove.
23465
23466 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
23467
23468         * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
23469         (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
23470         (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
23471         iterators.
23472         * config/arm/mve.md
23473         (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
23474         Factorize into ...
23475         (@mve_<mve_insn>q_n_f<mode>): ... this.
23476         (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
23477         (mve_vsubq_n_<supf><mode>): Factorize into ...
23478         (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23479         (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
23480         into ...
23481         (mve_<mve_addsubmul>q<mode>): ... this.
23482         (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
23483         Factorize into ...
23484         (mve_<mve_addsubmul>q_f<mode>): ... this.
23485         (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
23486         (mve_vsubq_m_<supf><mode>): Factorize into ...
23487         (@mve_<mve_insn>q_m_<supf><mode>): ... this,
23488         (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
23489         (mve_vsubq_m_n_<supf><mode>): Factorize into ...
23490         (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23491         (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
23492         Factorize into ...
23493         (@mve_<mve_insn>q_m_f<mode>): ... this.
23494         (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
23495         (mve_vsubq_m_n_f<mode>): Factorize into ...
23496         (@mve_<mve_insn>q_m_n_f<mode>): ... this.
23497
23498 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
23499
23500         * config/arm/arm-mve-builtins-functions.h (class
23501         unspec_based_mve_function_base): New.
23502         (class unspec_based_mve_function_exact_insn): New.
23503
23504 2023-05-03  Christophe Lyon  <christophe.lyon@arm.com>
23505
23506         * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
23507         * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
23508
23509 2023-05-03  Murray Steele  <murray.steele@arm.com>
23510             Christophe Lyon  <christophe.lyon@arm.com>
23511
23512         * config/arm/arm-mve-builtins-base.cc (class
23513         vuninitializedq_impl): New.
23514         * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
23515         * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
23516         declaration.
23517         * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
23518         * config/arm/arm-mve-builtins-shapes.h (inherent): New
23519         declaration.
23520         * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
23521         * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
23522         (__arm_vuninitializedq_u8): Remove.
23523         (__arm_vuninitializedq_u16): Remove.
23524         (__arm_vuninitializedq_u32): Remove.
23525         (__arm_vuninitializedq_u64): Remove.
23526         (__arm_vuninitializedq_s8): Remove.
23527         (__arm_vuninitializedq_s16): Remove.
23528         (__arm_vuninitializedq_s32): Remove.
23529         (__arm_vuninitializedq_s64): Remove.
23530         (__arm_vuninitializedq_f16): Remove.
23531         (__arm_vuninitializedq_f32): Remove.
23532
23533 2023-05-03  Murray Steele  <murray.steele@arm.com>
23534             Christophe Lyon  <christophe.lyon@arm.com>
23535
23536         * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
23537         * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
23538         * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
23539         * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
23540         (parse_type): Likewise.
23541         (parse_signature): Likewise.
23542         (build_one): Likewise.
23543         (build_all): Likewise.
23544         (overloaded_base): New struct.
23545         (unary_convert_def): Likewise.
23546         * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
23547         * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
23548         macro.
23549         (TYPES_reinterpret_unsigned1): Likewise.
23550         (TYPES_reinterpret_integer): Likewise.
23551         (TYPES_reinterpret_integer1): Likewise.
23552         (TYPES_reinterpret_float1): Likewise.
23553         (TYPES_reinterpret_float): Likewise.
23554         (reinterpret_integer): New.
23555         (reinterpret_float): New.
23556         (handle_arm_mve_h): Register builtins.
23557         * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
23558         (vreinterpretq_s32): Likewise.
23559         (vreinterpretq_s64): Likewise.
23560         (vreinterpretq_s8): Likewise.
23561         (vreinterpretq_u16): Likewise.
23562         (vreinterpretq_u32): Likewise.
23563         (vreinterpretq_u64): Likewise.
23564         (vreinterpretq_u8): Likewise.
23565         (vreinterpretq_f16): Likewise.
23566         (vreinterpretq_f32): Likewise.
23567         (vreinterpretq_s16_s32): Likewise.
23568         (vreinterpretq_s16_s64): Likewise.
23569         (vreinterpretq_s16_s8): Likewise.
23570         (vreinterpretq_s16_u16): Likewise.
23571         (vreinterpretq_s16_u32): Likewise.
23572         (vreinterpretq_s16_u64): Likewise.
23573         (vreinterpretq_s16_u8): Likewise.
23574         (vreinterpretq_s32_s16): Likewise.
23575         (vreinterpretq_s32_s64): Likewise.
23576         (vreinterpretq_s32_s8): Likewise.
23577         (vreinterpretq_s32_u16): Likewise.
23578         (vreinterpretq_s32_u32): Likewise.
23579         (vreinterpretq_s32_u64): Likewise.
23580         (vreinterpretq_s32_u8): Likewise.
23581         (vreinterpretq_s64_s16): Likewise.
23582         (vreinterpretq_s64_s32): Likewise.
23583         (vreinterpretq_s64_s8): Likewise.
23584         (vreinterpretq_s64_u16): Likewise.
23585         (vreinterpretq_s64_u32): Likewise.
23586         (vreinterpretq_s64_u64): Likewise.
23587         (vreinterpretq_s64_u8): Likewise.
23588         (vreinterpretq_s8_s16): Likewise.
23589         (vreinterpretq_s8_s32): Likewise.
23590         (vreinterpretq_s8_s64): Likewise.
23591         (vreinterpretq_s8_u16): Likewise.
23592         (vreinterpretq_s8_u32): Likewise.
23593         (vreinterpretq_s8_u64): Likewise.
23594         (vreinterpretq_s8_u8): Likewise.
23595         (vreinterpretq_u16_s16): Likewise.
23596         (vreinterpretq_u16_s32): Likewise.
23597         (vreinterpretq_u16_s64): Likewise.
23598         (vreinterpretq_u16_s8): Likewise.
23599         (vreinterpretq_u16_u32): Likewise.
23600         (vreinterpretq_u16_u64): Likewise.
23601         (vreinterpretq_u16_u8): Likewise.
23602         (vreinterpretq_u32_s16): Likewise.
23603         (vreinterpretq_u32_s32): Likewise.
23604         (vreinterpretq_u32_s64): Likewise.
23605         (vreinterpretq_u32_s8): Likewise.
23606         (vreinterpretq_u32_u16): Likewise.
23607         (vreinterpretq_u32_u64): Likewise.
23608         (vreinterpretq_u32_u8): Likewise.
23609         (vreinterpretq_u64_s16): Likewise.
23610         (vreinterpretq_u64_s32): Likewise.
23611         (vreinterpretq_u64_s64): Likewise.
23612         (vreinterpretq_u64_s8): Likewise.
23613         (vreinterpretq_u64_u16): Likewise.
23614         (vreinterpretq_u64_u32): Likewise.
23615         (vreinterpretq_u64_u8): Likewise.
23616         (vreinterpretq_u8_s16): Likewise.
23617         (vreinterpretq_u8_s32): Likewise.
23618         (vreinterpretq_u8_s64): Likewise.
23619         (vreinterpretq_u8_s8): Likewise.
23620         (vreinterpretq_u8_u16): Likewise.
23621         (vreinterpretq_u8_u32): Likewise.
23622         (vreinterpretq_u8_u64): Likewise.
23623         (vreinterpretq_s32_f16): Likewise.
23624         (vreinterpretq_s32_f32): Likewise.
23625         (vreinterpretq_u16_f16): Likewise.
23626         (vreinterpretq_u16_f32): Likewise.
23627         (vreinterpretq_u32_f16): Likewise.
23628         (vreinterpretq_u32_f32): Likewise.
23629         (vreinterpretq_u64_f16): Likewise.
23630         (vreinterpretq_u64_f32): Likewise.
23631         (vreinterpretq_u8_f16): Likewise.
23632         (vreinterpretq_u8_f32): Likewise.
23633         (vreinterpretq_f16_f32): Likewise.
23634         (vreinterpretq_f16_s16): Likewise.
23635         (vreinterpretq_f16_s32): Likewise.
23636         (vreinterpretq_f16_s64): Likewise.
23637         (vreinterpretq_f16_s8): Likewise.
23638         (vreinterpretq_f16_u16): Likewise.
23639         (vreinterpretq_f16_u32): Likewise.
23640         (vreinterpretq_f16_u64): Likewise.
23641         (vreinterpretq_f16_u8): Likewise.
23642         (vreinterpretq_f32_f16): Likewise.
23643         (vreinterpretq_f32_s16): Likewise.
23644         (vreinterpretq_f32_s32): Likewise.
23645         (vreinterpretq_f32_s64): Likewise.
23646         (vreinterpretq_f32_s8): Likewise.
23647         (vreinterpretq_f32_u16): Likewise.
23648         (vreinterpretq_f32_u32): Likewise.
23649         (vreinterpretq_f32_u64): Likewise.
23650         (vreinterpretq_f32_u8): Likewise.
23651         (vreinterpretq_s16_f16): Likewise.
23652         (vreinterpretq_s16_f32): Likewise.
23653         (vreinterpretq_s64_f16): Likewise.
23654         (vreinterpretq_s64_f32): Likewise.
23655         (vreinterpretq_s8_f16): Likewise.
23656         (vreinterpretq_s8_f32): Likewise.
23657         (__arm_vreinterpretq_f16): Likewise.
23658         (__arm_vreinterpretq_f32): Likewise.
23659         (__arm_vreinterpretq_s16): Likewise.
23660         (__arm_vreinterpretq_s32): Likewise.
23661         (__arm_vreinterpretq_s64): Likewise.
23662         (__arm_vreinterpretq_s8): Likewise.
23663         (__arm_vreinterpretq_u16): Likewise.
23664         (__arm_vreinterpretq_u32): Likewise.
23665         (__arm_vreinterpretq_u64): Likewise.
23666         (__arm_vreinterpretq_u8): Likewise.
23667         * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
23668         (__arm_vreinterpretq_s16_s64): Likewise.
23669         (__arm_vreinterpretq_s16_s8): Likewise.
23670         (__arm_vreinterpretq_s16_u16): Likewise.
23671         (__arm_vreinterpretq_s16_u32): Likewise.
23672         (__arm_vreinterpretq_s16_u64): Likewise.
23673         (__arm_vreinterpretq_s16_u8): Likewise.
23674         (__arm_vreinterpretq_s32_s16): Likewise.
23675         (__arm_vreinterpretq_s32_s64): Likewise.
23676         (__arm_vreinterpretq_s32_s8): Likewise.
23677         (__arm_vreinterpretq_s32_u16): Likewise.
23678         (__arm_vreinterpretq_s32_u32): Likewise.
23679         (__arm_vreinterpretq_s32_u64): Likewise.
23680         (__arm_vreinterpretq_s32_u8): Likewise.
23681         (__arm_vreinterpretq_s64_s16): Likewise.
23682         (__arm_vreinterpretq_s64_s32): Likewise.
23683         (__arm_vreinterpretq_s64_s8): Likewise.
23684         (__arm_vreinterpretq_s64_u16): Likewise.
23685         (__arm_vreinterpretq_s64_u32): Likewise.
23686         (__arm_vreinterpretq_s64_u64): Likewise.
23687         (__arm_vreinterpretq_s64_u8): Likewise.
23688         (__arm_vreinterpretq_s8_s16): Likewise.
23689         (__arm_vreinterpretq_s8_s32): Likewise.
23690         (__arm_vreinterpretq_s8_s64): Likewise.
23691         (__arm_vreinterpretq_s8_u16): Likewise.
23692         (__arm_vreinterpretq_s8_u32): Likewise.
23693         (__arm_vreinterpretq_s8_u64): Likewise.
23694         (__arm_vreinterpretq_s8_u8): Likewise.
23695         (__arm_vreinterpretq_u16_s16): Likewise.
23696         (__arm_vreinterpretq_u16_s32): Likewise.
23697         (__arm_vreinterpretq_u16_s64): Likewise.
23698         (__arm_vreinterpretq_u16_s8): Likewise.
23699         (__arm_vreinterpretq_u16_u32): Likewise.
23700         (__arm_vreinterpretq_u16_u64): Likewise.
23701         (__arm_vreinterpretq_u16_u8): Likewise.
23702         (__arm_vreinterpretq_u32_s16): Likewise.
23703         (__arm_vreinterpretq_u32_s32): Likewise.
23704         (__arm_vreinterpretq_u32_s64): Likewise.
23705         (__arm_vreinterpretq_u32_s8): Likewise.
23706         (__arm_vreinterpretq_u32_u16): Likewise.
23707         (__arm_vreinterpretq_u32_u64): Likewise.
23708         (__arm_vreinterpretq_u32_u8): Likewise.
23709         (__arm_vreinterpretq_u64_s16): Likewise.
23710         (__arm_vreinterpretq_u64_s32): Likewise.
23711         (__arm_vreinterpretq_u64_s64): Likewise.
23712         (__arm_vreinterpretq_u64_s8): Likewise.
23713         (__arm_vreinterpretq_u64_u16): Likewise.
23714         (__arm_vreinterpretq_u64_u32): Likewise.
23715         (__arm_vreinterpretq_u64_u8): Likewise.
23716         (__arm_vreinterpretq_u8_s16): Likewise.
23717         (__arm_vreinterpretq_u8_s32): Likewise.
23718         (__arm_vreinterpretq_u8_s64): Likewise.
23719         (__arm_vreinterpretq_u8_s8): Likewise.
23720         (__arm_vreinterpretq_u8_u16): Likewise.
23721         (__arm_vreinterpretq_u8_u32): Likewise.
23722         (__arm_vreinterpretq_u8_u64): Likewise.
23723         (__arm_vreinterpretq_s32_f16): Likewise.
23724         (__arm_vreinterpretq_s32_f32): Likewise.
23725         (__arm_vreinterpretq_s16_f16): Likewise.
23726         (__arm_vreinterpretq_s16_f32): Likewise.
23727         (__arm_vreinterpretq_s64_f16): Likewise.
23728         (__arm_vreinterpretq_s64_f32): Likewise.
23729         (__arm_vreinterpretq_s8_f16): Likewise.
23730         (__arm_vreinterpretq_s8_f32): Likewise.
23731         (__arm_vreinterpretq_u16_f16): Likewise.
23732         (__arm_vreinterpretq_u16_f32): Likewise.
23733         (__arm_vreinterpretq_u32_f16): Likewise.
23734         (__arm_vreinterpretq_u32_f32): Likewise.
23735         (__arm_vreinterpretq_u64_f16): Likewise.
23736         (__arm_vreinterpretq_u64_f32): Likewise.
23737         (__arm_vreinterpretq_u8_f16): Likewise.
23738         (__arm_vreinterpretq_u8_f32): Likewise.
23739         (__arm_vreinterpretq_f16_f32): Likewise.
23740         (__arm_vreinterpretq_f16_s16): Likewise.
23741         (__arm_vreinterpretq_f16_s32): Likewise.
23742         (__arm_vreinterpretq_f16_s64): Likewise.
23743         (__arm_vreinterpretq_f16_s8): Likewise.
23744         (__arm_vreinterpretq_f16_u16): Likewise.
23745         (__arm_vreinterpretq_f16_u32): Likewise.
23746         (__arm_vreinterpretq_f16_u64): Likewise.
23747         (__arm_vreinterpretq_f16_u8): Likewise.
23748         (__arm_vreinterpretq_f32_f16): Likewise.
23749         (__arm_vreinterpretq_f32_s16): Likewise.
23750         (__arm_vreinterpretq_f32_s32): Likewise.
23751         (__arm_vreinterpretq_f32_s64): Likewise.
23752         (__arm_vreinterpretq_f32_s8): Likewise.
23753         (__arm_vreinterpretq_f32_u16): Likewise.
23754         (__arm_vreinterpretq_f32_u32): Likewise.
23755         (__arm_vreinterpretq_f32_u64): Likewise.
23756         (__arm_vreinterpretq_f32_u8): Likewise.
23757         (__arm_vreinterpretq_s16): Likewise.
23758         (__arm_vreinterpretq_s32): Likewise.
23759         (__arm_vreinterpretq_s64): Likewise.
23760         (__arm_vreinterpretq_s8): Likewise.
23761         (__arm_vreinterpretq_u16): Likewise.
23762         (__arm_vreinterpretq_u32): Likewise.
23763         (__arm_vreinterpretq_u64): Likewise.
23764         (__arm_vreinterpretq_u8): Likewise.
23765         (__arm_vreinterpretq_f16): Likewise.
23766         (__arm_vreinterpretq_f32): Likewise.
23767         * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
23768         * config/arm/unspecs.md: (REINTERPRET): New unspec.
23769
23770 2023-05-03  Murray Steele  <murray.steele@arm.com>
23771             Christophe Lyon  <christophe.lyon@arm.com>
23772             Christophe Lyon   <christophe.lyon@arm.com
23773
23774         * config.gcc: Add arm-mve-builtins-base.o and
23775         arm-mve-builtins-shapes.o to extra_objs.
23776         * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
23777         numberspace.
23778         (arm_expand_builtin): Likewise
23779         (arm_check_builtin_call): Likewise
23780         (arm_describe_resolver): Likewise.
23781         * config/arm/arm-builtins.h (enum resolver_ident): Add
23782         arm_mve_resolver.
23783         * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
23784         (arm_resolve_overloaded_builtin): Handle MVE builtins.
23785         (arm_register_target_pragmas): Register arm_check_builtin_call.
23786         * config/arm/arm-mve-builtins.cc (class registered_function): New
23787         class.
23788         (struct registered_function_hasher): New struct.
23789         (pred_suffixes): New table.
23790         (mode_suffixes): New table.
23791         (type_suffix_info): New table.
23792         (TYPES_float16): New.
23793         (TYPES_all_float): New.
23794         (TYPES_integer_8): New.
23795         (TYPES_integer_8_16): New.
23796         (TYPES_integer_16_32): New.
23797         (TYPES_integer_32): New.
23798         (TYPES_signed_16_32): New.
23799         (TYPES_signed_32): New.
23800         (TYPES_all_signed): New.
23801         (TYPES_all_unsigned): New.
23802         (TYPES_all_integer): New.
23803         (TYPES_all_integer_with_64): New.
23804         (DEF_VECTOR_TYPE): New.
23805         (DEF_DOUBLE_TYPE): New.
23806         (DEF_MVE_TYPES_ARRAY): New.
23807         (all_integer): New.
23808         (all_integer_with_64): New.
23809         (float16): New.
23810         (all_float): New.
23811         (all_signed): New.
23812         (all_unsigned): New.
23813         (integer_8): New.
23814         (integer_8_16): New.
23815         (integer_16_32): New.
23816         (integer_32): New.
23817         (signed_16_32): New.
23818         (signed_32): New.
23819         (register_vector_type): Use void_type_node for mve.fp-only types when
23820         mve.fp is not enabled.
23821         (register_builtin_tuple_types): Likewise.
23822         (handle_arm_mve_h): New function..
23823         (matches_type_p): Likewise..
23824         (report_out_of_range): Likewise.
23825         (report_not_enum): Likewise.
23826         (report_missing_float): Likewise.
23827         (report_non_ice): Likewise.
23828         (check_requires_float): Likewise.
23829         (function_instance::hash): Likewise
23830         (function_instance::call_properties): Likewise.
23831         (function_instance::reads_global_state_p): Likewise.
23832         (function_instance::modifies_global_state_p): Likewise.
23833         (function_instance::could_trap_p): Likewise.
23834         (function_instance::has_inactive_argument): Likewise.
23835         (registered_function_hasher::hash): Likewise.
23836         (registered_function_hasher::equal): Likewise.
23837         (function_builder::function_builder): Likewise.
23838         (function_builder::~function_builder): Likewise.
23839         (function_builder::append_name): Likewise.
23840         (function_builder::finish_name): Likewise.
23841         (function_builder::get_name): Likewise.
23842         (add_attribute): Likewise.
23843         (function_builder::get_attributes): Likewise.
23844         (function_builder::add_function): Likewise.
23845         (function_builder::add_unique_function): Likewise.
23846         (function_builder::add_overloaded_function): Likewise.
23847         (function_builder::add_overloaded_functions): Likewise.
23848         (function_builder::register_function_group): Likewise.
23849         (function_call_info::function_call_info): Likewise.
23850         (function_resolver::function_resolver): Likewise.
23851         (function_resolver::get_vector_type): Likewise.
23852         (function_resolver::get_scalar_type_name): Likewise.
23853         (function_resolver::get_argument_type): Likewise.
23854         (function_resolver::scalar_argument_p): Likewise.
23855         (function_resolver::report_no_such_form): Likewise.
23856         (function_resolver::lookup_form): Likewise.
23857         (function_resolver::resolve_to): Likewise.
23858         (function_resolver::infer_vector_or_tuple_type): Likewise.
23859         (function_resolver::infer_vector_type): Likewise.
23860         (function_resolver::require_vector_or_scalar_type): Likewise.
23861         (function_resolver::require_vector_type): Likewise.
23862         (function_resolver::require_matching_vector_type): Likewise.
23863         (function_resolver::require_derived_vector_type): Likewise.
23864         (function_resolver::require_derived_scalar_type): Likewise.
23865         (function_resolver::require_integer_immediate): Likewise.
23866         (function_resolver::require_scalar_type): Likewise.
23867         (function_resolver::check_num_arguments): Likewise.
23868         (function_resolver::check_gp_argument): Likewise.
23869         (function_resolver::finish_opt_n_resolution): Likewise.
23870         (function_resolver::resolve_unary): Likewise.
23871         (function_resolver::resolve_unary_n): Likewise.
23872         (function_resolver::resolve_uniform): Likewise.
23873         (function_resolver::resolve_uniform_opt_n): Likewise.
23874         (function_resolver::resolve): Likewise.
23875         (function_checker::function_checker): Likewise.
23876         (function_checker::argument_exists_p): Likewise.
23877         (function_checker::require_immediate): Likewise.
23878         (function_checker::require_immediate_enum): Likewise.
23879         (function_checker::require_immediate_range): Likewise.
23880         (function_checker::check): Likewise.
23881         (gimple_folder::gimple_folder): Likewise.
23882         (gimple_folder::fold): Likewise.
23883         (function_expander::function_expander): Likewise.
23884         (function_expander::direct_optab_handler): Likewise.
23885         (function_expander::get_fallback_value): Likewise.
23886         (function_expander::get_reg_target): Likewise.
23887         (function_expander::add_output_operand): Likewise.
23888         (function_expander::add_input_operand): Likewise.
23889         (function_expander::add_integer_operand): Likewise.
23890         (function_expander::generate_insn): Likewise.
23891         (function_expander::use_exact_insn): Likewise.
23892         (function_expander::use_unpred_insn): Likewise.
23893         (function_expander::use_pred_x_insn): Likewise.
23894         (function_expander::use_cond_insn): Likewise.
23895         (function_expander::map_to_rtx_codes): Likewise.
23896         (function_expander::expand): Likewise.
23897         (resolve_overloaded_builtin): Likewise.
23898         (check_builtin_call): Likewise.
23899         (gimple_fold_builtin): Likewise.
23900         (expand_builtin): Likewise.
23901         (gt_ggc_mx): Likewise.
23902         (gt_pch_nx): Likewise.
23903         (gt_pch_nx): Likewise.
23904         * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
23905         (s16): Likewise.
23906         (s32): Likewise.
23907         (s64): Likewise.
23908         (u8): Likewise.
23909         (u16): Likewise.
23910         (u32): Likewise.
23911         (u64): Likewise.
23912         (f16): Likewise.
23913         (f32): Likewise.
23914         (n): New mode.
23915         (offset): New mode.
23916         * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
23917         (CP_READ_FPCR): Likewise.
23918         (CP_RAISE_FP_EXCEPTIONS): Likewise.
23919         (CP_READ_MEMORY): Likewise.
23920         (CP_WRITE_MEMORY): Likewise.
23921         (enum units_index): New enum.
23922         (enum predication_index): New.
23923         (enum type_class_index): New.
23924         (enum mode_suffix_index): New enum.
23925         (enum type_suffix_index): New.
23926         (struct mode_suffix_info): New struct.
23927         (struct type_suffix_info): New.
23928         (struct function_group_info): Likewise.
23929         (class function_instance): Likewise.
23930         (class registered_function): Likewise.
23931         (class function_builder): Likewise.
23932         (class function_call_info): Likewise.
23933         (class function_resolver): Likewise.
23934         (class function_checker): Likewise.
23935         (class gimple_folder): Likewise.
23936         (class function_expander): Likewise.
23937         (get_mve_pred16_t): Likewise.
23938         (find_mode_suffix): New function.
23939         (class function_base): Likewise.
23940         (class function_shape): Likewise.
23941         (function_instance::operator==): New function.
23942         (function_instance::operator!=): Likewise.
23943         (function_instance::vectors_per_tuple): Likewise.
23944         (function_instance::mode_suffix): Likewise.
23945         (function_instance::type_suffix): Likewise.
23946         (function_instance::scalar_type): Likewise.
23947         (function_instance::vector_type): Likewise.
23948         (function_instance::tuple_type): Likewise.
23949         (function_instance::vector_mode): Likewise.
23950         (function_call_info::function_returns_void_p): Likewise.
23951         (function_base::call_properties): Likewise.
23952         * config/arm/arm-protos.h (enum arm_builtin_class): Add
23953         ARM_BUILTIN_MVE.
23954         (handle_arm_mve_h): New.
23955         (resolve_overloaded_builtin): New.
23956         (check_builtin_call): New.
23957         (gimple_fold_builtin): New.
23958         (expand_builtin): New.
23959         * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
23960         arm_gimple_fold_builtin.
23961         (arm_gimple_fold_builtin): New function.
23962         * config/arm/arm_mve.h: Use new arm_mve.h pragma.
23963         * config/arm/predicates.md (arm_any_register_operand): New predicate.
23964         * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
23965         (arm-mve-builtins-shapes.o): New target.
23966         (arm-mve-builtins-base.o): New target.
23967         * config/arm/arm-mve-builtins-base.cc: New file.
23968         * config/arm/arm-mve-builtins-base.def: New file.
23969         * config/arm/arm-mve-builtins-base.h: New file.
23970         * config/arm/arm-mve-builtins-functions.h: New file.
23971         * config/arm/arm-mve-builtins-shapes.cc: New file.
23972         * config/arm/arm-mve-builtins-shapes.h: New file.
23973
23974 2023-05-03  Murray Steele  <murray.steele@arm.com>
23975             Christophe Lyon  <christophe.lyon@arm.com>
23976             Christophe Lyon   <christophe.lyon@arm.com>
23977
23978         * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
23979         New function.
23980         (arm_init_builtin): Use arm_general_add_builtin_function instead
23981         of arm_add_builtin_function.
23982         (arm_init_acle_builtins): Likewise.
23983         (arm_init_mve_builtins): Likewise.
23984         (arm_init_crypto_builtins): Likewise.
23985         (arm_init_builtins): Likewise.
23986         (arm_general_builtin_decl): New function.
23987         (arm_builtin_decl): Defer to numberspace-specialized functions.
23988         (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
23989         (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
23990         (arm_general_expand_builtin_1): ... specialize for general builtins.
23991         (arm_expand_acle_builtin): Use arm_general_expand_builtin
23992         instead of arm_expand_builtin.
23993         (arm_expand_mve_builtin): Likewise.
23994         (arm_expand_neon_builtin): Likewise.
23995         (arm_expand_vfp_builtin): Likewise.
23996         (arm_general_expand_builtin): New function.
23997         (arm_expand_builtin): Specialize for general builtins.
23998         (arm_general_check_builtin_call): New function.
23999         (arm_check_builtin_call): Specialize for general builtins.
24000         (arm_describe_resolver): Validate numberspace.
24001         (arm_cde_end_args): Likewise.
24002         * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
24003         (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
24004
24005 2023-05-03  Martin Liska  <mliska@suse.cz>
24006
24007         PR target/109713
24008         * config/riscv/sync.md: Add gcc_unreachable to a switch.
24009
24010 2023-05-03  Richard Biener  <rguenther@suse.de>
24011
24012         * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
24013         (patch_loop_exit): Likewise.
24014         (connect_loops): Likewise.
24015         (split_loop): Likewise.
24016         (control_dep_semi_invariant_p): Likewise.
24017         (do_split_loop_on_cond): Likewise.
24018         (split_loop_on_cond): Likewise.
24019         * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
24020         Likewise.
24021         (simplify_loop_version): Likewise.
24022         (evaluate_bbs): Likewise.
24023         (find_loop_guard): Likewise.
24024         (clean_up_after_unswitching): Likewise.
24025         * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
24026         Likewise.
24027         (optimize_spaceship): Take a gcond * argument, avoid
24028         last_stmt.
24029         (math_opts_dom_walker::after_dom_children): Adjust call to
24030         optimize_spaceship.
24031         * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
24032         * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
24033         Likewise.
24034
24035 2023-05-03  Andreas Schwab  <schwab@suse.de>
24036
24037         * config/riscv/linux.h (LIB_SPEC): Don't redefine.
24038
24039 2023-05-03  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
24040
24041         * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
24042         New function.
24043         (class vlseg): New class.
24044         (class vsseg): Ditto.
24045         (class vlsseg): Ditto.
24046         (class vssseg): Ditto.
24047         (class seg_indexed_load): Ditto.
24048         (class seg_indexed_store): Ditto.
24049         (class vlsegff): Ditto.
24050         (BASE): Ditto.
24051         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
24052         * config/riscv/riscv-vector-builtins-functions.def (vlseg):
24053         Ditto.
24054         (vsseg): Ditto.
24055         (vlsseg): Ditto.
24056         (vssseg): Ditto.
24057         (vluxseg): Ditto.
24058         (vloxseg): Ditto.
24059         (vsuxseg): Ditto.
24060         (vsoxseg): Ditto.
24061         (vlsegff): Ditto.
24062         * config/riscv/riscv-vector-builtins-shapes.cc (struct
24063         seg_loadstore_def): Ditto.
24064         (struct seg_indexed_loadstore_def): Ditto.
24065         (struct seg_fault_load_def): Ditto.
24066         (SHAPE): Ditto.
24067         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
24068         * config/riscv/riscv-vector-builtins.cc
24069         (function_builder::append_nf): New function.
24070         * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
24071         Change ptr from double into float.
24072         (vfloat32m1x3_t): Ditto.
24073         (vfloat32m1x4_t): Ditto.
24074         (vfloat32m1x5_t): Ditto.
24075         (vfloat32m1x6_t): Ditto.
24076         (vfloat32m1x7_t): Ditto.
24077         (vfloat32m1x8_t): Ditto.
24078         (vfloat32m2x2_t): Ditto.
24079         (vfloat32m2x3_t): Ditto.
24080         (vfloat32m2x4_t): Ditto.
24081         (vfloat32m4x2_t): Ditto.
24082         * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
24083         * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
24084         segment ff load.
24085         * config/riscv/riscv.md: Add segment instructions.
24086         * config/riscv/vector-iterators.md: Support segment intrinsics.
24087         * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
24088         pattern.
24089         (@pred_unit_strided_store<mode>): Ditto.
24090         (@pred_strided_load<mode>): Ditto.
24091         (@pred_strided_store<mode>): Ditto.
24092         (@pred_fault_load<mode>): Ditto.
24093         (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
24094         (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
24095         (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
24096         (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
24097         (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
24098         (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
24099         (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
24100         (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
24101         (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
24102         (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
24103         (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
24104         (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
24105         (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
24106         (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
24107
24108 2023-05-03  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
24109
24110         * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
24111         tuple type support.
24112         (inttype): Ditto.
24113         (floattype): Ditto.
24114         (main): Ditto.
24115         * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
24116         * config/riscv/riscv-vector-builtins-functions.def (vset): Add
24117         tuple type vset.
24118         (vget): Add tuple type vget.
24119         * config/riscv/riscv-vector-builtins-types.def
24120         (DEF_RVV_TUPLE_OPS): New macro.
24121         (vint8mf8x2_t): Ditto.
24122         (vuint8mf8x2_t): Ditto.
24123         (vint8mf8x3_t): Ditto.
24124         (vuint8mf8x3_t): Ditto.
24125         (vint8mf8x4_t): Ditto.
24126         (vuint8mf8x4_t): Ditto.
24127         (vint8mf8x5_t): Ditto.
24128         (vuint8mf8x5_t): Ditto.
24129         (vint8mf8x6_t): Ditto.
24130         (vuint8mf8x6_t): Ditto.
24131         (vint8mf8x7_t): Ditto.
24132         (vuint8mf8x7_t): Ditto.
24133         (vint8mf8x8_t): Ditto.
24134         (vuint8mf8x8_t): Ditto.
24135         (vint8mf4x2_t): Ditto.
24136         (vuint8mf4x2_t): Ditto.
24137         (vint8mf4x3_t): Ditto.
24138         (vuint8mf4x3_t): Ditto.
24139         (vint8mf4x4_t): Ditto.
24140         (vuint8mf4x4_t): Ditto.
24141         (vint8mf4x5_t): Ditto.
24142         (vuint8mf4x5_t): Ditto.
24143         (vint8mf4x6_t): Ditto.
24144         (vuint8mf4x6_t): Ditto.
24145         (vint8mf4x7_t): Ditto.
24146         (vuint8mf4x7_t): Ditto.
24147         (vint8mf4x8_t): Ditto.
24148         (vuint8mf4x8_t): Ditto.
24149         (vint8mf2x2_t): Ditto.
24150         (vuint8mf2x2_t): Ditto.
24151         (vint8mf2x3_t): Ditto.
24152         (vuint8mf2x3_t): Ditto.
24153         (vint8mf2x4_t): Ditto.
24154         (vuint8mf2x4_t): Ditto.
24155         (vint8mf2x5_t): Ditto.
24156         (vuint8mf2x5_t): Ditto.
24157         (vint8mf2x6_t): Ditto.
24158         (vuint8mf2x6_t): Ditto.
24159         (vint8mf2x7_t): Ditto.
24160         (vuint8mf2x7_t): Ditto.
24161         (vint8mf2x8_t): Ditto.
24162         (vuint8mf2x8_t): Ditto.
24163         (vint8m1x2_t): Ditto.
24164         (vuint8m1x2_t): Ditto.
24165         (vint8m1x3_t): Ditto.
24166         (vuint8m1x3_t): Ditto.
24167         (vint8m1x4_t): Ditto.
24168         (vuint8m1x4_t): Ditto.
24169         (vint8m1x5_t): Ditto.
24170         (vuint8m1x5_t): Ditto.
24171         (vint8m1x6_t): Ditto.
24172         (vuint8m1x6_t): Ditto.
24173         (vint8m1x7_t): Ditto.
24174         (vuint8m1x7_t): Ditto.
24175         (vint8m1x8_t): Ditto.
24176         (vuint8m1x8_t): Ditto.
24177         (vint8m2x2_t): Ditto.
24178         (vuint8m2x2_t): Ditto.
24179         (vint8m2x3_t): Ditto.
24180         (vuint8m2x3_t): Ditto.
24181         (vint8m2x4_t): Ditto.
24182         (vuint8m2x4_t): Ditto.
24183         (vint8m4x2_t): Ditto.
24184         (vuint8m4x2_t): Ditto.
24185         (vint16mf4x2_t): Ditto.
24186         (vuint16mf4x2_t): Ditto.
24187         (vint16mf4x3_t): Ditto.
24188         (vuint16mf4x3_t): Ditto.
24189         (vint16mf4x4_t): Ditto.
24190         (vuint16mf4x4_t): Ditto.
24191         (vint16mf4x5_t): Ditto.
24192         (vuint16mf4x5_t): Ditto.
24193         (vint16mf4x6_t): Ditto.
24194         (vuint16mf4x6_t): Ditto.
24195         (vint16mf4x7_t): Ditto.
24196         (vuint16mf4x7_t): Ditto.
24197         (vint16mf4x8_t): Ditto.
24198         (vuint16mf4x8_t): Ditto.
24199         (vint16mf2x2_t): Ditto.
24200         (vuint16mf2x2_t): Ditto.
24201         (vint16mf2x3_t): Ditto.
24202         (vuint16mf2x3_t): Ditto.
24203         (vint16mf2x4_t): Ditto.
24204         (vuint16mf2x4_t): Ditto.
24205         (vint16mf2x5_t): Ditto.
24206         (vuint16mf2x5_t): Ditto.
24207         (vint16mf2x6_t): Ditto.
24208         (vuint16mf2x6_t): Ditto.
24209         (vint16mf2x7_t): Ditto.
24210         (vuint16mf2x7_t): Ditto.
24211         (vint16mf2x8_t): Ditto.
24212         (vuint16mf2x8_t): Ditto.
24213         (vint16m1x2_t): Ditto.
24214         (vuint16m1x2_t): Ditto.
24215         (vint16m1x3_t): Ditto.
24216         (vuint16m1x3_t): Ditto.
24217         (vint16m1x4_t): Ditto.
24218         (vuint16m1x4_t): Ditto.
24219         (vint16m1x5_t): Ditto.
24220         (vuint16m1x5_t): Ditto.
24221         (vint16m1x6_t): Ditto.
24222         (vuint16m1x6_t): Ditto.
24223         (vint16m1x7_t): Ditto.
24224         (vuint16m1x7_t): Ditto.
24225         (vint16m1x8_t): Ditto.
24226         (vuint16m1x8_t): Ditto.
24227         (vint16m2x2_t): Ditto.
24228         (vuint16m2x2_t): Ditto.
24229         (vint16m2x3_t): Ditto.
24230         (vuint16m2x3_t): Ditto.
24231         (vint16m2x4_t): Ditto.
24232         (vuint16m2x4_t): Ditto.
24233         (vint16m4x2_t): Ditto.
24234         (vuint16m4x2_t): Ditto.
24235         (vint32mf2x2_t): Ditto.
24236         (vuint32mf2x2_t): Ditto.
24237         (vint32mf2x3_t): Ditto.
24238         (vuint32mf2x3_t): Ditto.
24239         (vint32mf2x4_t): Ditto.
24240         (vuint32mf2x4_t): Ditto.
24241         (vint32mf2x5_t): Ditto.
24242         (vuint32mf2x5_t): Ditto.
24243         (vint32mf2x6_t): Ditto.
24244         (vuint32mf2x6_t): Ditto.
24245         (vint32mf2x7_t): Ditto.
24246         (vuint32mf2x7_t): Ditto.
24247         (vint32mf2x8_t): Ditto.
24248         (vuint32mf2x8_t): Ditto.
24249         (vint32m1x2_t): Ditto.
24250         (vuint32m1x2_t): Ditto.
24251         (vint32m1x3_t): Ditto.
24252         (vuint32m1x3_t): Ditto.
24253         (vint32m1x4_t): Ditto.
24254         (vuint32m1x4_t): Ditto.
24255         (vint32m1x5_t): Ditto.
24256         (vuint32m1x5_t): Ditto.
24257         (vint32m1x6_t): Ditto.
24258         (vuint32m1x6_t): Ditto.
24259         (vint32m1x7_t): Ditto.
24260         (vuint32m1x7_t): Ditto.
24261         (vint32m1x8_t): Ditto.
24262         (vuint32m1x8_t): Ditto.
24263         (vint32m2x2_t): Ditto.
24264         (vuint32m2x2_t): Ditto.
24265         (vint32m2x3_t): Ditto.
24266         (vuint32m2x3_t): Ditto.
24267         (vint32m2x4_t): Ditto.
24268         (vuint32m2x4_t): Ditto.
24269         (vint32m4x2_t): Ditto.
24270         (vuint32m4x2_t): Ditto.
24271         (vint64m1x2_t): Ditto.
24272         (vuint64m1x2_t): Ditto.
24273         (vint64m1x3_t): Ditto.
24274         (vuint64m1x3_t): Ditto.
24275         (vint64m1x4_t): Ditto.
24276         (vuint64m1x4_t): Ditto.
24277         (vint64m1x5_t): Ditto.
24278         (vuint64m1x5_t): Ditto.
24279         (vint64m1x6_t): Ditto.
24280         (vuint64m1x6_t): Ditto.
24281         (vint64m1x7_t): Ditto.
24282         (vuint64m1x7_t): Ditto.
24283         (vint64m1x8_t): Ditto.
24284         (vuint64m1x8_t): Ditto.
24285         (vint64m2x2_t): Ditto.
24286         (vuint64m2x2_t): Ditto.
24287         (vint64m2x3_t): Ditto.
24288         (vuint64m2x3_t): Ditto.
24289         (vint64m2x4_t): Ditto.
24290         (vuint64m2x4_t): Ditto.
24291         (vint64m4x2_t): Ditto.
24292         (vuint64m4x2_t): Ditto.
24293         (vfloat32mf2x2_t): Ditto.
24294         (vfloat32mf2x3_t): Ditto.
24295         (vfloat32mf2x4_t): Ditto.
24296         (vfloat32mf2x5_t): Ditto.
24297         (vfloat32mf2x6_t): Ditto.
24298         (vfloat32mf2x7_t): Ditto.
24299         (vfloat32mf2x8_t): Ditto.
24300         (vfloat32m1x2_t): Ditto.
24301         (vfloat32m1x3_t): Ditto.
24302         (vfloat32m1x4_t): Ditto.
24303         (vfloat32m1x5_t): Ditto.
24304         (vfloat32m1x6_t): Ditto.
24305         (vfloat32m1x7_t): Ditto.
24306         (vfloat32m1x8_t): Ditto.
24307         (vfloat32m2x2_t): Ditto.
24308         (vfloat32m2x3_t): Ditto.
24309         (vfloat32m2x4_t): Ditto.
24310         (vfloat32m4x2_t): Ditto.
24311         (vfloat64m1x2_t): Ditto.
24312         (vfloat64m1x3_t): Ditto.
24313         (vfloat64m1x4_t): Ditto.
24314         (vfloat64m1x5_t): Ditto.
24315         (vfloat64m1x6_t): Ditto.
24316         (vfloat64m1x7_t): Ditto.
24317         (vfloat64m1x8_t): Ditto.
24318         (vfloat64m2x2_t): Ditto.
24319         (vfloat64m2x3_t): Ditto.
24320         (vfloat64m2x4_t): Ditto.
24321         (vfloat64m4x2_t): Ditto.
24322         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
24323         Ditto.
24324         (DEF_RVV_TYPE_INDEX): Ditto.
24325         (rvv_arg_type_info::get_tuple_subpart_type): New function.
24326         (DEF_RVV_TUPLE_TYPE): New macro.
24327         * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
24328         Adapt for tuple vget/vset support.
24329         (vint8mf4_t): Ditto.
24330         (vuint8mf4_t): Ditto.
24331         (vint8mf2_t): Ditto.
24332         (vuint8mf2_t): Ditto.
24333         (vint8m1_t): Ditto.
24334         (vuint8m1_t): Ditto.
24335         (vint8m2_t): Ditto.
24336         (vuint8m2_t): Ditto.
24337         (vint8m4_t): Ditto.
24338         (vuint8m4_t): Ditto.
24339         (vint8m8_t): Ditto.
24340         (vuint8m8_t): Ditto.
24341         (vint16mf4_t): Ditto.
24342         (vuint16mf4_t): Ditto.
24343         (vint16mf2_t): Ditto.
24344         (vuint16mf2_t): Ditto.
24345         (vint16m1_t): Ditto.
24346         (vuint16m1_t): Ditto.
24347         (vint16m2_t): Ditto.
24348         (vuint16m2_t): Ditto.
24349         (vint16m4_t): Ditto.
24350         (vuint16m4_t): Ditto.
24351         (vint16m8_t): Ditto.
24352         (vuint16m8_t): Ditto.
24353         (vint32mf2_t): Ditto.
24354         (vuint32mf2_t): Ditto.
24355         (vint32m1_t): Ditto.
24356         (vuint32m1_t): Ditto.
24357         (vint32m2_t): Ditto.
24358         (vuint32m2_t): Ditto.
24359         (vint32m4_t): Ditto.
24360         (vuint32m4_t): Ditto.
24361         (vint32m8_t): Ditto.
24362         (vuint32m8_t): Ditto.
24363         (vint64m1_t): Ditto.
24364         (vuint64m1_t): Ditto.
24365         (vint64m2_t): Ditto.
24366         (vuint64m2_t): Ditto.
24367         (vint64m4_t): Ditto.
24368         (vuint64m4_t): Ditto.
24369         (vint64m8_t): Ditto.
24370         (vuint64m8_t): Ditto.
24371         (vfloat32mf2_t): Ditto.
24372         (vfloat32m1_t): Ditto.
24373         (vfloat32m2_t): Ditto.
24374         (vfloat32m4_t): Ditto.
24375         (vfloat32m8_t): Ditto.
24376         (vfloat64m1_t): Ditto.
24377         (vfloat64m2_t): Ditto.
24378         (vfloat64m4_t): Ditto.
24379         (vfloat64m8_t): Ditto.
24380         (tuple_subpart): Add tuple subpart base type.
24381         * config/riscv/riscv-vector-builtins.h (struct
24382         rvv_arg_type_info): Ditto.
24383         (tuple_type_field): New function.
24384
24385 2023-05-03  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
24386
24387         * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
24388         (RVV_TUPLE_PARTIAL_MODES): Ditto.
24389         * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
24390         function.
24391         (get_nf): Ditto.
24392         (get_subpart_mode): Ditto.
24393         (get_tuple_mode): Ditto.
24394         (expand_tuple_move): Ditto.
24395         * config/riscv/riscv-v.cc (ENTRY): New macro.
24396         (TUPLE_ENTRY): Ditto.
24397         (get_nf): New function.
24398         (get_subpart_mode): Ditto.
24399         (get_tuple_mode): Ditto.
24400         (expand_tuple_move): Ditto.
24401         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
24402         New macro.
24403         (register_tuple_type): New function
24404         * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
24405         New macro.
24406         (vint8mf8x2_t): New macro.
24407         (vuint8mf8x2_t): Ditto.
24408         (vint8mf8x3_t): Ditto.
24409         (vuint8mf8x3_t): Ditto.
24410         (vint8mf8x4_t): Ditto.
24411         (vuint8mf8x4_t): Ditto.
24412         (vint8mf8x5_t): Ditto.
24413         (vuint8mf8x5_t): Ditto.
24414         (vint8mf8x6_t): Ditto.
24415         (vuint8mf8x6_t): Ditto.
24416         (vint8mf8x7_t): Ditto.
24417         (vuint8mf8x7_t): Ditto.
24418         (vint8mf8x8_t): Ditto.
24419         (vuint8mf8x8_t): Ditto.
24420         (vint8mf4x2_t): Ditto.
24421         (vuint8mf4x2_t): Ditto.
24422         (vint8mf4x3_t): Ditto.
24423         (vuint8mf4x3_t): Ditto.
24424         (vint8mf4x4_t): Ditto.
24425         (vuint8mf4x4_t): Ditto.
24426         (vint8mf4x5_t): Ditto.
24427         (vuint8mf4x5_t): Ditto.
24428         (vint8mf4x6_t): Ditto.
24429         (vuint8mf4x6_t): Ditto.
24430         (vint8mf4x7_t): Ditto.
24431         (vuint8mf4x7_t): Ditto.
24432         (vint8mf4x8_t): Ditto.
24433         (vuint8mf4x8_t): Ditto.
24434         (vint8mf2x2_t): Ditto.
24435         (vuint8mf2x2_t): Ditto.
24436         (vint8mf2x3_t): Ditto.
24437         (vuint8mf2x3_t): Ditto.
24438         (vint8mf2x4_t): Ditto.
24439         (vuint8mf2x4_t): Ditto.
24440         (vint8mf2x5_t): Ditto.
24441         (vuint8mf2x5_t): Ditto.
24442         (vint8mf2x6_t): Ditto.
24443         (vuint8mf2x6_t): Ditto.
24444         (vint8mf2x7_t): Ditto.
24445         (vuint8mf2x7_t): Ditto.
24446         (vint8mf2x8_t): Ditto.
24447         (vuint8mf2x8_t): Ditto.
24448         (vint8m1x2_t): Ditto.
24449         (vuint8m1x2_t): Ditto.
24450         (vint8m1x3_t): Ditto.
24451         (vuint8m1x3_t): Ditto.
24452         (vint8m1x4_t): Ditto.
24453         (vuint8m1x4_t): Ditto.
24454         (vint8m1x5_t): Ditto.
24455         (vuint8m1x5_t): Ditto.
24456         (vint8m1x6_t): Ditto.
24457         (vuint8m1x6_t): Ditto.
24458         (vint8m1x7_t): Ditto.
24459         (vuint8m1x7_t): Ditto.
24460         (vint8m1x8_t): Ditto.
24461         (vuint8m1x8_t): Ditto.
24462         (vint8m2x2_t): Ditto.
24463         (vuint8m2x2_t): Ditto.
24464         (vint8m2x3_t): Ditto.
24465         (vuint8m2x3_t): Ditto.
24466         (vint8m2x4_t): Ditto.
24467         (vuint8m2x4_t): Ditto.
24468         (vint8m4x2_t): Ditto.
24469         (vuint8m4x2_t): Ditto.
24470         (vint16mf4x2_t): Ditto.
24471         (vuint16mf4x2_t): Ditto.
24472         (vint16mf4x3_t): Ditto.
24473         (vuint16mf4x3_t): Ditto.
24474         (vint16mf4x4_t): Ditto.
24475         (vuint16mf4x4_t): Ditto.
24476         (vint16mf4x5_t): Ditto.
24477         (vuint16mf4x5_t): Ditto.
24478         (vint16mf4x6_t): Ditto.
24479         (vuint16mf4x6_t): Ditto.
24480         (vint16mf4x7_t): Ditto.
24481         (vuint16mf4x7_t): Ditto.
24482         (vint16mf4x8_t): Ditto.
24483         (vuint16mf4x8_t): Ditto.
24484         (vint16mf2x2_t): Ditto.
24485         (vuint16mf2x2_t): Ditto.
24486         (vint16mf2x3_t): Ditto.
24487         (vuint16mf2x3_t): Ditto.
24488         (vint16mf2x4_t): Ditto.
24489         (vuint16mf2x4_t): Ditto.
24490         (vint16mf2x5_t): Ditto.
24491         (vuint16mf2x5_t): Ditto.
24492         (vint16mf2x6_t): Ditto.
24493         (vuint16mf2x6_t): Ditto.
24494         (vint16mf2x7_t): Ditto.
24495         (vuint16mf2x7_t): Ditto.
24496         (vint16mf2x8_t): Ditto.
24497         (vuint16mf2x8_t): Ditto.
24498         (vint16m1x2_t): Ditto.
24499         (vuint16m1x2_t): Ditto.
24500         (vint16m1x3_t): Ditto.
24501         (vuint16m1x3_t): Ditto.
24502         (vint16m1x4_t): Ditto.
24503         (vuint16m1x4_t): Ditto.
24504         (vint16m1x5_t): Ditto.
24505         (vuint16m1x5_t): Ditto.
24506         (vint16m1x6_t): Ditto.
24507         (vuint16m1x6_t): Ditto.
24508         (vint16m1x7_t): Ditto.
24509         (vuint16m1x7_t): Ditto.
24510         (vint16m1x8_t): Ditto.
24511         (vuint16m1x8_t): Ditto.
24512         (vint16m2x2_t): Ditto.
24513         (vuint16m2x2_t): Ditto.
24514         (vint16m2x3_t): Ditto.
24515         (vuint16m2x3_t): Ditto.
24516         (vint16m2x4_t): Ditto.
24517         (vuint16m2x4_t): Ditto.
24518         (vint16m4x2_t): Ditto.
24519         (vuint16m4x2_t): Ditto.
24520         (vint32mf2x2_t): Ditto.
24521         (vuint32mf2x2_t): Ditto.
24522         (vint32mf2x3_t): Ditto.
24523         (vuint32mf2x3_t): Ditto.
24524         (vint32mf2x4_t): Ditto.
24525         (vuint32mf2x4_t): Ditto.
24526         (vint32mf2x5_t): Ditto.
24527         (vuint32mf2x5_t): Ditto.
24528         (vint32mf2x6_t): Ditto.
24529         (vuint32mf2x6_t): Ditto.
24530         (vint32mf2x7_t): Ditto.
24531         (vuint32mf2x7_t): Ditto.
24532         (vint32mf2x8_t): Ditto.
24533         (vuint32mf2x8_t): Ditto.
24534         (vint32m1x2_t): Ditto.
24535         (vuint32m1x2_t): Ditto.
24536         (vint32m1x3_t): Ditto.
24537         (vuint32m1x3_t): Ditto.
24538         (vint32m1x4_t): Ditto.
24539         (vuint32m1x4_t): Ditto.
24540         (vint32m1x5_t): Ditto.
24541         (vuint32m1x5_t): Ditto.
24542         (vint32m1x6_t): Ditto.
24543         (vuint32m1x6_t): Ditto.
24544         (vint32m1x7_t): Ditto.
24545         (vuint32m1x7_t): Ditto.
24546         (vint32m1x8_t): Ditto.
24547         (vuint32m1x8_t): Ditto.
24548         (vint32m2x2_t): Ditto.
24549         (vuint32m2x2_t): Ditto.
24550         (vint32m2x3_t): Ditto.
24551         (vuint32m2x3_t): Ditto.
24552         (vint32m2x4_t): Ditto.
24553         (vuint32m2x4_t): Ditto.
24554         (vint32m4x2_t): Ditto.
24555         (vuint32m4x2_t): Ditto.
24556         (vint64m1x2_t): Ditto.
24557         (vuint64m1x2_t): Ditto.
24558         (vint64m1x3_t): Ditto.
24559         (vuint64m1x3_t): Ditto.
24560         (vint64m1x4_t): Ditto.
24561         (vuint64m1x4_t): Ditto.
24562         (vint64m1x5_t): Ditto.
24563         (vuint64m1x5_t): Ditto.
24564         (vint64m1x6_t): Ditto.
24565         (vuint64m1x6_t): Ditto.
24566         (vint64m1x7_t): Ditto.
24567         (vuint64m1x7_t): Ditto.
24568         (vint64m1x8_t): Ditto.
24569         (vuint64m1x8_t): Ditto.
24570         (vint64m2x2_t): Ditto.
24571         (vuint64m2x2_t): Ditto.
24572         (vint64m2x3_t): Ditto.
24573         (vuint64m2x3_t): Ditto.
24574         (vint64m2x4_t): Ditto.
24575         (vuint64m2x4_t): Ditto.
24576         (vint64m4x2_t): Ditto.
24577         (vuint64m4x2_t): Ditto.
24578         (vfloat32mf2x2_t): Ditto.
24579         (vfloat32mf2x3_t): Ditto.
24580         (vfloat32mf2x4_t): Ditto.
24581         (vfloat32mf2x5_t): Ditto.
24582         (vfloat32mf2x6_t): Ditto.
24583         (vfloat32mf2x7_t): Ditto.
24584         (vfloat32mf2x8_t): Ditto.
24585         (vfloat32m1x2_t): Ditto.
24586         (vfloat32m1x3_t): Ditto.
24587         (vfloat32m1x4_t): Ditto.
24588         (vfloat32m1x5_t): Ditto.
24589         (vfloat32m1x6_t): Ditto.
24590         (vfloat32m1x7_t): Ditto.
24591         (vfloat32m1x8_t): Ditto.
24592         (vfloat32m2x2_t): Ditto.
24593         (vfloat32m2x3_t): Ditto.
24594         (vfloat32m2x4_t): Ditto.
24595         (vfloat32m4x2_t): Ditto.
24596         (vfloat64m1x2_t): Ditto.
24597         (vfloat64m1x3_t): Ditto.
24598         (vfloat64m1x4_t): Ditto.
24599         (vfloat64m1x5_t): Ditto.
24600         (vfloat64m1x6_t): Ditto.
24601         (vfloat64m1x7_t): Ditto.
24602         (vfloat64m1x8_t): Ditto.
24603         (vfloat64m2x2_t): Ditto.
24604         (vfloat64m2x3_t): Ditto.
24605         (vfloat64m2x4_t): Ditto.
24606         (vfloat64m4x2_t): Ditto.
24607         * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
24608         Ditto.
24609         * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
24610         * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
24611         function.
24612         (TUPLE_ENTRY): Ditto.
24613         (riscv_v_ext_mode_p): New function.
24614         (riscv_v_adjust_nunits): Add tuple mode adjustment.
24615         (riscv_classify_address): Ditto.
24616         (riscv_binary_cost): Ditto.
24617         (riscv_rtx_costs): Ditto.
24618         (riscv_secondary_memory_needed): Ditto.
24619         (riscv_hard_regno_nregs): Ditto.
24620         (riscv_hard_regno_mode_ok): Ditto.
24621         (riscv_vector_mode_supported_p): Ditto.
24622         (riscv_regmode_natural_size): Ditto.
24623         (riscv_array_mode): New function.
24624         (TARGET_ARRAY_MODE): New target hook.
24625         * config/riscv/riscv.md: Add tuple modes.
24626         * config/riscv/vector-iterators.md: Ditto.
24627         * config/riscv/vector.md (mov<mode>): Add tuple modes data
24628         movement.
24629         (*mov<VT:mode>_<P:mode>): Ditto.
24630
24631 2023-05-03  Richard Biener  <rguenther@suse.de>
24632
24633         * cse.cc (cse_insn): Track an equivalence to the destination
24634         separately and delay using src_related for it.
24635
24636 2023-05-03  Richard Biener  <rguenther@suse.de>
24637
24638         * cse.cc (HASH): Turn into inline function and mix
24639         in another HASH_SHIFT bits.
24640         (SAFE_HASH): Likewise.
24641
24642 2023-05-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
24643
24644         PR target/99195
24645         * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
24646         (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
24647
24648 2023-05-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
24649
24650         PR target/99195
24651         * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
24652         (add<mode>3<vczle><vczbe>): ... This.
24653         (sub<mode>3): Rename to...
24654         (sub<mode>3<vczle><vczbe>): ... This.
24655         (mul<mode>3): Rename to...
24656         (mul<mode>3<vczle><vczbe>): ... This.
24657         (*div<mode>3): Rename to...
24658         (*div<mode>3<vczle><vczbe>): ... This.
24659         (neg<mode>2): Rename to...
24660         (neg<mode>2<vczle><vczbe>): ... This.
24661         (abs<mode>2): Rename to...
24662         (abs<mode>2<vczle><vczbe>): ... This.
24663         (<frint_pattern><mode>2): Rename to...
24664         (<frint_pattern><mode>2<vczle><vczbe>): ... This.
24665         (<fmaxmin><mode>3): Rename to...
24666         (<fmaxmin><mode>3<vczle><vczbe>): ... This.
24667         (*sqrt<mode>2): Rename to...
24668         (*sqrt<mode>2<vczle><vczbe>): ... This.
24669
24670 2023-05-03  Kito Cheng  <kito.cheng@sifive.com>
24671
24672         * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
24673
24674 2023-05-03  Martin Liska  <mliska@suse.cz>
24675
24676         PR tree-optimization/109693
24677         * value-range-storage.cc (vrange_allocator::vrange_allocator):
24678         Remove unused field.
24679         * value-range-storage.h: Likewise.
24680
24681 2023-05-02  Andrew Pinski  <apinski@marvell.com>
24682
24683         * tree-ssa-phiopt.cc (move_stmt): New function.
24684         (match_simplify_replacement): Use move_stmt instead
24685         of the inlined version.
24686
24687 2023-05-02  Andrew Pinski  <apinski@marvell.com>
24688
24689         * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
24690         pattern.
24691
24692 2023-05-02  Andrew Pinski  <apinski@marvell.com>
24693
24694         PR tree-optimization/109702
24695         * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
24696         for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
24697
24698 2023-05-02  Andrew Pinski  <apinski@marvell.com>
24699
24700         PR target/109657
24701         * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
24702         insn_and_split pattern.
24703
24704 2023-05-02  Patrick O'Neill  <patrick@rivosinc.com>
24705
24706         * config/riscv/sync.md (atomic_load<mode>): Implement atomic
24707         load mapping.
24708
24709 2023-05-02  Patrick O'Neill  <patrick@rivosinc.com>
24710
24711         * config/riscv/sync.md (mem_thread_fence_1): Change fence
24712         depending on the given memory model.
24713
24714 2023-05-02  Patrick O'Neill  <patrick@rivosinc.com>
24715
24716         * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
24717         riscv_union_memmodels function to sync.md.
24718         * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
24719         get the union of two memmodels in sync.md.
24720         (riscv_print_operand): Add %I and %J flags that output the
24721         optimal LR/SC flag bits for a given memory model.
24722         * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
24723         bits on SC op and replace with optimized %I, %J flags.
24724
24725 2023-05-02  Patrick O'Neill  <patrick@rivosinc.com>
24726
24727         * config/riscv/riscv.cc
24728         (riscv_memmodel_needs_amo_release): Change function name.
24729         (riscv_print_operand): Remove unneeded %F case.
24730         * config/riscv/sync.md: Remove unneeded fences.
24731
24732 2023-05-02  Patrick O'Neill  <patrick@rivosinc.com>
24733
24734         PR target/89835
24735         * config/riscv/sync.md (atomic_store<mode>): Use simple store
24736         instruction in combination with fence(s).
24737
24738 2023-05-02  Patrick O'Neill  <patrick@rivosinc.com>
24739
24740         * config/riscv/riscv.cc (riscv_print_operand): Change behavior
24741         of %A to include release bits.
24742
24743 2023-05-02  Patrick O'Neill  <patrick@rivosinc.com>
24744
24745         * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
24746         FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
24747         pair.
24748
24749 2023-05-02  Patrick O'Neill  <patrick@rivosinc.com>
24750
24751         * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
24752         sequentially consistent LR.aqrl/SC.rl pairs.
24753
24754 2023-05-02  Patrick O'Neill  <patrick@rivosinc.com>
24755
24756         * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
24757         sanitize memmodel input with memmodel_base.
24758
24759 2023-05-02  Yanzhang Wang  <yanzhang.wang@intel.com>
24760             Pan Li  <pan2.li@intel.com>
24761
24762         PR target/109617
24763         * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
24764
24765 2023-05-02  Romain Naour  <romain.naour@gmail.com>
24766
24767         * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
24768         the namespace.
24769
24770 2023-05-02  Martin Liska  <mliska@suse.cz>
24771
24772         * doc/invoke.texi: Update documentation based on param.opt file.
24773
24774 2023-05-02  Richard Biener  <rguenther@suse.de>
24775
24776         PR tree-optimization/109672
24777         * tree-vect-stmts.cc (vectorizable_operation): For plus,
24778         minus and negate always check the vector mode is word mode.
24779
24780 2023-05-01  Andrew Pinski  <apinski@marvell.com>
24781
24782         * tree-ssa-phiopt.cc: Update comment about
24783         how the transformation are implemented.
24784
24785 2023-05-01  Jeff Law  <jlaw@ventanamicro>
24786
24787         * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
24788
24789 2023-05-01  Jeff Law  <jlaw@ventanamicro>
24790
24791         * config/cris/cris.cc (TARGET_LRA_P): Remove.
24792         * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
24793         * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
24794         * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
24795         * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
24796         * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
24797
24798 2023-05-01  Rasmus Villemoes  <rasmus.villemoes@prevas.dk>
24799
24800         * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
24801         * print-tree.cc (print_decl_identifier): Implement it.
24802         * toplev.cc (output_stack_usage_1): Use it.
24803
24804 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
24805
24806         * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
24807         friends.
24808
24809 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
24810
24811         * value-range.h (irange::set_nonzero): Inline.
24812
24813 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
24814
24815         * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
24816         precision.
24817         * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
24818         invalid_range, as it is an inverse range.
24819         * tree-vrp.cc (find_case_label_range): Avoid trees.
24820         * value-range.cc (irange::irange_set): Delete.
24821         (irange::irange_set_1bit_anti_range): Delete.
24822         (irange::irange_set_anti_range): Delete.
24823         (irange::set): Cleanup.
24824         * value-range.h (class irange): Remove irange_set,
24825         irange_set_anti_range, irange_set_1bit_anti_range.
24826         (irange::set_undefined): Remove set to m_type.
24827
24828 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
24829
24830         * range-op.cc (update_known_bitmask): Adjust for irange containing
24831         wide_ints internally.
24832         * tree-ssanames.cc (set_nonzero_bits): Same.
24833         * tree-ssanames.h (set_nonzero_bits): Same.
24834         * value-range-storage.cc (irange_storage::set_irange): Same.
24835         (irange_storage::get_irange): Same.
24836         * value-range.cc (irange::operator=): Same.
24837         (irange::irange_set): Same.
24838         (irange::irange_set_1bit_anti_range): Same.
24839         (irange::irange_set_anti_range): Same.
24840         (irange::set): Same.
24841         (irange::verify_range): Same.
24842         (irange::contains_p): Same.
24843         (irange::irange_single_pair_union): Same.
24844         (irange::union_): Same.
24845         (irange::irange_contains_p): Same.
24846         (irange::intersect): Same.
24847         (irange::invert): Same.
24848         (irange::set_range_from_nonzero_bits): Same.
24849         (irange::set_nonzero_bits): Same.
24850         (mask_to_wi): Same.
24851         (irange::intersect_nonzero_bits): Same.
24852         (irange::union_nonzero_bits): Same.
24853         (gt_ggc_mx): Same.
24854         (gt_pch_nx): Same.
24855         (tree_range): Same.
24856         (range_tests_strict_enum): Same.
24857         (range_tests_misc): Same.
24858         (range_tests_nonzero_bits): Same.
24859         * value-range.h (irange::type): Same.
24860         (irange::varying_compatible_p): Same.
24861         (irange::irange): Same.
24862         (int_range::int_range): Same.
24863         (irange::set_undefined): Same.
24864         (irange::set_varying): Same.
24865         (irange::lower_bound): Same.
24866         (irange::upper_bound): Same.
24867
24868 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
24869
24870         * gimple-range-fold.cc (tree_lower_bound): Delete.
24871         (tree_upper_bound): Delete.
24872         (vrp_val_max): Delete.
24873         (vrp_val_min): Delete.
24874         (fold_using_range::range_of_ssa_name_with_loop_info): Call
24875         range_of_var_in_loop.
24876         * vr-values.cc (valid_value_p): Delete.
24877         (fix_overflow): Delete.
24878         (get_scev_info): New.
24879         (bounds_of_var_in_loop): Refactor into...
24880         (induction_variable_may_overflow_p): ...this,
24881         (range_from_loop_direction): ...and this,
24882         (range_of_var_in_loop): ...and this.
24883         * vr-values.h (bounds_of_var_in_loop): Delete.
24884         (range_of_var_in_loop): New.
24885
24886 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
24887
24888         * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
24889         irange_val*.
24890         (vrp_val_max): New.
24891         (vrp_val_min): New.
24892         * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
24893         * range-op.cc (max_limit): Same.
24894         (min_limit): Same.
24895         (plus_minus_ranges): Same.
24896         (operator_rshift::op1_range): Same.
24897         (operator_cast::inside_domain_p): Same.
24898         * value-range.cc (vrp_val_is_max): Delete.
24899         (vrp_val_is_min): Delete.
24900         (range_tests_misc): Use irange_val_*.
24901         * value-range.h (vrp_val_is_min): Delete.
24902         (vrp_val_is_max): Delete.
24903         (vrp_val_max): Delete.
24904         (irange_val_min): New.
24905         (vrp_val_min): Delete.
24906         (irange_val_max): New.
24907         * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
24908
24909 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
24910
24911         * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
24912         * gimple-fold.cc (size_must_be_zero_p): Same.
24913         * gimple-loop-versioning.cc
24914         (loop_versioning::prune_loop_conditions): Same.
24915         * gimple-range-edge.cc (gcond_edge_range): Same.
24916         (gimple_outgoing_range::calc_switch_ranges): Same.
24917         * gimple-range-fold.cc (adjust_imagpart_expr): Same.
24918         (adjust_realpart_expr): Same.
24919         (fold_using_range::range_of_address): Same.
24920         (fold_using_range::relation_fold_and_or): Same.
24921         * gimple-range-gori.cc (gori_compute::gori_compute): Same.
24922         (range_is_either_true_or_false): Same.
24923         * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
24924         (cfn_clz::fold_range): Same.
24925         (cfn_ctz::fold_range): Same.
24926         * gimple-range-tests.cc (class test_expr_eval): Same.
24927         * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
24928         * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
24929         (propagate_vr_across_jump_function): Same.
24930         (decide_whether_version_node): Same.
24931         * ipa-prop.cc (ipa_get_value_range): Same.
24932         * ipa-prop.h (ipa_range_set_and_normalize): Same.
24933         * range-op.cc (get_shift_range): Same.
24934         (value_range_from_overflowed_bounds): Same.
24935         (value_range_with_overflow): Same.
24936         (create_possibly_reversed_range): Same.
24937         (equal_op1_op2_relation): Same.
24938         (not_equal_op1_op2_relation): Same.
24939         (lt_op1_op2_relation): Same.
24940         (le_op1_op2_relation): Same.
24941         (gt_op1_op2_relation): Same.
24942         (ge_op1_op2_relation): Same.
24943         (operator_mult::op1_range): Same.
24944         (operator_exact_divide::op1_range): Same.
24945         (operator_lshift::op1_range): Same.
24946         (operator_rshift::op1_range): Same.
24947         (operator_cast::op1_range): Same.
24948         (operator_logical_and::fold_range): Same.
24949         (set_nonzero_range_from_mask): Same.
24950         (operator_bitwise_or::op1_range): Same.
24951         (operator_bitwise_xor::op1_range): Same.
24952         (operator_addr_expr::fold_range): Same.
24953         (pointer_plus_operator::wi_fold): Same.
24954         (pointer_or_operator::op1_range): Same.
24955         (INT): Same.
24956         (UINT): Same.
24957         (INT16): Same.
24958         (UINT16): Same.
24959         (SCHAR): Same.
24960         (UCHAR): Same.
24961         (range_op_cast_tests): Same.
24962         (range_op_lshift_tests): Same.
24963         (range_op_rshift_tests): Same.
24964         (range_op_bitwise_and_tests): Same.
24965         (range_relational_tests): Same.
24966         * range.cc (range_zero): Same.
24967         (range_nonzero): Same.
24968         * range.h (range_true): Same.
24969         (range_false): Same.
24970         (range_true_and_false): Same.
24971         * tree-data-ref.cc (split_constant_offset_1): Same.
24972         * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
24973         * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
24974         (find_unswitching_predicates_for_bb): Same.
24975         * tree-ssa-phiopt.cc (value_replacement): Same.
24976         * tree-ssa-threadbackward.cc
24977         (back_threader::find_taken_edge_cond): Same.
24978         * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
24979         * tree-vrp.cc (find_case_label_range): Same.
24980         * value-query.cc (range_query::get_tree_range): Same.
24981         * value-range.cc (irange::set_nonnegative): Same.
24982         (frange::contains_p): Same.
24983         (frange::singleton_p): Same.
24984         (frange::internal_singleton_p): Same.
24985         (irange::irange_set): Same.
24986         (irange::irange_set_1bit_anti_range): Same.
24987         (irange::irange_set_anti_range): Same.
24988         (irange::set): Same.
24989         (irange::operator==): Same.
24990         (irange::singleton_p): Same.
24991         (irange::contains_p): Same.
24992         (irange::set_range_from_nonzero_bits): Same.
24993         (DEFINE_INT_RANGE_INSTANCE): Same.
24994         (INT): Same.
24995         (UINT): Same.
24996         (SCHAR): Same.
24997         (UINT128): Same.
24998         (UCHAR): Same.
24999         (range): New.
25000         (tree_range): New.
25001         (range_int): New.
25002         (range_uint): New.
25003         (range_uint128): New.
25004         (range_uchar): New.
25005         (range_char): New.
25006         (build_range3): Convert to irange wide_int API.
25007         (range_tests_irange3): Same.
25008         (range_tests_int_range_max): Same.
25009         (range_tests_strict_enum): Same.
25010         (range_tests_misc): Same.
25011         (range_tests_nonzero_bits): Same.
25012         (range_tests_nan): Same.
25013         (range_tests_signed_zeros): Same.
25014         * value-range.h (Value_Range::Value_Range): Same.
25015         (irange::set): Same.
25016         (irange::nonzero_p): Same.
25017         (irange::contains_p): Same.
25018         (range_includes_zero_p): Same.
25019         (irange::set_nonzero): Same.
25020         (irange::set_zero): Same.
25021         (contains_zero_p): Same.
25022         (frange::contains_p): Same.
25023         * vr-values.cc
25024         (simplify_using_ranges::op_with_boolean_value_range_p): Same.
25025         (bounds_of_var_in_loop): Same.
25026         (simplify_using_ranges::legacy_fold_cond_overflow): Same.
25027
25028 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
25029
25030         * value-range.cc (irange::irange_union): Rename to...
25031         (irange::union_): ...this.
25032         (irange::irange_intersect): Rename to...
25033         (irange::intersect): ...this.
25034         * value-range.h (irange::union_): Delete.
25035         (irange::intersect): Delete.
25036
25037 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
25038
25039         * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
25040
25041 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
25042
25043         * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
25044         ranger API.
25045         (compare_ranges): Delete.
25046         (compare_range_with_value): Delete.
25047         (bounds_of_var_in_loop): Tidy up by using ranger API.
25048         (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
25049         from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
25050         (simplify_using_ranges::legacy_fold_cond_overflow): Remove
25051         strict_overflow_p and only_ranges.
25052         (simplify_using_ranges::legacy_fold_cond): Adjust call to
25053         legacy_fold_cond_overflow.
25054         (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
25055         rename.
25056         (range_fits_type_p): Rename value_range to irange.
25057         * vr-values.h (range_fits_type_p): Adjust prototype.
25058
25059 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
25060
25061         * value-range.cc (irange::irange_set_anti_range): Remove uses of
25062         tree_lower_bound and tree_upper_bound.
25063         (irange::verify_range): Same.
25064         (irange::operator==): Same.
25065         (irange::singleton_p): Same.
25066         * value-range.h (irange::tree_lower_bound): Delete.
25067         (irange::tree_upper_bound): Delete.
25068         (irange::lower_bound): Delete.
25069         (irange::upper_bound): Delete.
25070         (irange::zero_p): Remove uses of tree_lower_bound and
25071         tree_upper_bound.
25072
25073 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
25074
25075         * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
25076         kind() call.
25077         (determine_value_range): Same.
25078         (record_nonwrapping_iv): Same.
25079         (infer_loop_bounds_from_signedness): Same.
25080         (scev_var_range_cant_overflow): Same.
25081         * tree-vrp.cc (operand_less_p): Delete.
25082         * tree-vrp.h (operand_less_p): Delete.
25083         * value-range.cc (get_legacy_range): Remove uses of deprecated API.
25084         (irange::value_inside_range): Delete.
25085         * value-range.h (vrange::kind): Delete.
25086         (irange::num_pairs): Remove check of m_kind.
25087         (irange::min): Delete.
25088         (irange::max): Delete.
25089
25090 2023-05-01  Aldy Hernandez  <aldyh@redhat.com>
25091
25092         * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
25093         for vrange_storage.
25094         * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
25095         (sbr_vector::grow): Same.
25096         (sbr_vector::set_bb_range): Same.
25097         (sbr_vector::get_bb_range): Same.
25098         (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
25099         (sbr_sparse_bitmap::set_bb_range): Same.
25100         (sbr_sparse_bitmap::get_bb_range): Same.
25101         (block_range_cache::block_range_cache): Same.
25102         (ssa_global_cache::ssa_global_cache): Same.
25103         (ssa_global_cache::get_global_range): Same.
25104         (ssa_global_cache::set_global_range): Same.
25105         * gimple-range-cache.h: Same.
25106         * gimple-range-edge.cc
25107         (gimple_outgoing_range::gimple_outgoing_range): Same.
25108         (gimple_outgoing_range::switch_edge_range): Same.
25109         (gimple_outgoing_range::calc_switch_ranges): Same.
25110         * gimple-range-edge.h: Same.
25111         * gimple-range-infer.cc
25112         (infer_range_manager::infer_range_manager): Same.
25113         (infer_range_manager::get_nonzero): Same.
25114         (infer_range_manager::maybe_adjust_range): Same.
25115         (infer_range_manager::add_range): Same.
25116         * gimple-range-infer.h: Rename obstack_vrange_allocator to
25117         vrange_allocator.
25118         * tree-core.h (struct irange_storage_slot): Remove.
25119         (struct tree_ssa_name): Remove irange_info and frange_info.  Make
25120         range_info a pointer to vrange_storage.
25121         * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
25122         (range_info_alloc): Same.
25123         (range_info_free): Same.
25124         (range_info_get_range): Same.
25125         (range_info_set_range): Same.
25126         (get_nonzero_bits): Same.
25127         * value-query.cc (get_ssa_name_range_info): Same.
25128         * value-range-storage.cc (class vrange_internal_alloc): New.
25129         (class vrange_obstack_alloc): New.
25130         (class vrange_ggc_alloc): New.
25131         (vrange_allocator::vrange_allocator): New.
25132         (vrange_allocator::~vrange_allocator): New.
25133         (vrange_storage::alloc_slot): New.
25134         (vrange_allocator::alloc): New.
25135         (vrange_allocator::free): New.
25136         (vrange_allocator::clone): New.
25137         (vrange_allocator::clone_varying): New.
25138         (vrange_allocator::clone_undefined): New.
25139         (vrange_storage::alloc): New.
25140         (vrange_storage::set_vrange): Remove slot argument.
25141         (vrange_storage::get_vrange): Same.
25142         (vrange_storage::fits_p): Same.
25143         (vrange_storage::equal_p): New.
25144         (irange_storage::write_lengths_address): New.
25145         (irange_storage::lengths_address): New.
25146         (irange_storage_slot::alloc_slot): Remove.
25147         (irange_storage::alloc): New.
25148         (irange_storage_slot::irange_storage_slot): Remove.
25149         (irange_storage::irange_storage): New.
25150         (write_wide_int): New.
25151         (irange_storage_slot::set_irange): Remove.
25152         (irange_storage::set_irange): New.
25153         (read_wide_int): New.
25154         (irange_storage_slot::get_irange): Remove.
25155         (irange_storage::get_irange): New.
25156         (irange_storage_slot::size): Remove.
25157         (irange_storage::equal_p): New.
25158         (irange_storage_slot::num_wide_ints_needed): Remove.
25159         (irange_storage::size): New.
25160         (irange_storage_slot::fits_p): Remove.
25161         (irange_storage::fits_p): New.
25162         (irange_storage_slot::dump): Remove.
25163         (irange_storage::dump): New.
25164         (frange_storage_slot::alloc_slot): Remove.
25165         (frange_storage::alloc): New.
25166         (frange_storage_slot::set_frange): Remove.
25167         (frange_storage::set_frange): New.
25168         (frange_storage_slot::get_frange): Remove.
25169         (frange_storage::get_frange): New.
25170         (frange_storage_slot::fits_p): Remove.
25171         (frange_storage::equal_p): New.
25172         (frange_storage::fits_p): New.
25173         (ggc_vrange_allocator): New.
25174         (ggc_alloc_vrange_storage): New.
25175         * value-range-storage.h (class vrange_storage): Rewrite.
25176         (class irange_storage): Rewrite.
25177         (class frange_storage): Rewrite.
25178         (class obstack_vrange_allocator): Remove.
25179         (class ggc_vrange_allocator): Remove.
25180         (vrange_allocator::alloc_vrange): Remove.
25181         (vrange_allocator::alloc_irange): Remove.
25182         (vrange_allocator::alloc_frange): Remove.
25183         (ggc_alloc_vrange_storage): New.
25184         * value-range.h (class irange): Rename vrange_allocator to
25185         irange_storage.
25186         (class frange): Same.
25187
25188 2023-04-30  Roger Sayle  <roger@nextmovesoftware.com>
25189
25190         * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
25191         inc to avoid clobbering the carry flag.
25192
25193 2023-04-30  Andrew Pinski  <apinski@marvell.com>
25194
25195         * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
25196         for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
25197
25198 2023-04-30  Andrew Pinski  <apinski@marvell.com>
25199
25200         * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
25201         Allow some builtin/internal function calls which
25202         are known not to trap/throw.
25203         (phiopt_worker::match_simplify_replacement):
25204         Use name instead of getting the lhs again.
25205
25206 2023-04-30  Joakim Nohlgård  <joakim@nohlgard.se>
25207
25208         * configure: Regenerate.
25209         * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
25210
25211 2023-04-29  Hans-Peter Nilsson  <hp@axis.com>
25212
25213         * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
25214         emit_insn_if_valid_for_reload.
25215         (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
25216         to be recognized, also try emitting a parallel that clobbers
25217         TARGET_FLAGS_REGNUM, as applicable.
25218
25219 2023-04-29  Roger Sayle  <roger@nextmovesoftware.com>
25220
25221         * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
25222         to a define_insn.
25223         (*rotatehi_1): New define_insn for efficient 2 insn sequence.
25224         (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
25225
25226 2023-04-29  Roger Sayle  <roger@nextmovesoftware.com>
25227
25228         * config/stormy16/stormy16.md (any_lshift): New code iterator.
25229         (any_or_plus): Likewise.
25230         (any_rotate): Likewise.
25231         (*<any_lshift>_and_internal): New define_insn_and_split to
25232         recognize a logical shift followed by an AND, and split it
25233         again after reload.
25234         (*swpn): New define_insn matching xstormy16's swpn.
25235         (*swpn_zext): New define_insn recognizing swpn followed by
25236         zero_extendqihi2, i.e. with the high byte set to zero.
25237         (*swpn_sext): Likewise, for swpn followed by cbw.
25238         (*swpn_sext_2): Likewise, for an alternate RTL form.
25239         (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
25240         sequence is split in the correct place to recognize the *swpn_zext
25241         followed by any_or_plus (ior, xor or plus) instruction.
25242
25243 2023-04-29  Mikael Pettersson  <mikpelinux@gmail.com>
25244
25245         PR target/105525
25246         * config.gcc (vax-*-linux*): Add glibc-stdint.h.
25247         (lm32-*-uclinux*): Likewise.
25248
25249 2023-04-29  Fei Gao  <gaofei@eswincomputing.com>
25250
25251         * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
25252         for riscv_use_save_libcall.
25253         (riscv_use_save_libcall): call riscv_avoid_save_libcall.
25254         (riscv_compute_frame_info): restructure to decouple stack allocation
25255         for rv32e w/o save-restore.
25256
25257 2023-04-28  Eugene Rozenfeld  <erozen@microsoft.com>
25258
25259         * doc/install.texi: Fix documentation typo
25260
25261 2023-04-28  Matevos Mehrabyan  <matevosmehrabyan@gmail.com>
25262
25263         * config/riscv/iterators.md (only_div, paired_mod): New iterators.
25264         (u): Add div/udiv cases.
25265         * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
25266         * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
25267         divmod expansion.
25268         (rocket_tune_info, sifive_7_tune_info): Initialize new field.
25269         (thead_c906_tune_info): Likewise.
25270         (optimize_size_tune_info): Likewise.
25271         (riscv_use_divmod_expander): New function.
25272         * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
25273
25274 2023-04-28  Karen Sargsyan  <karen1999411@gmail.com>
25275
25276         * config/riscv/bitmanip.md: Added clmulr instruction.
25277         * config/riscv/riscv-builtins.cc (AVAIL): Add new.
25278         * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
25279         (type): Add clmul
25280         * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
25281         * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
25282         * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
25283         functions to riscv-cmo.def.
25284         * config/riscv/generic.md: Add clmul to list of instructions
25285         using the generic_imul reservation.
25286
25287 2023-04-28  Jivan Hakobyan  <jivanhakobyan9@gmail.com>
25288
25289         * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
25290
25291 2023-04-28  Andrew Pinski  <apinski@marvell.com>
25292
25293         PR tree-optimization/100958
25294         * tree-ssa-phiopt.cc (two_value_replacement): Remove.
25295         (pass_phiopt::execute): Don't call two_value_replacement.
25296         * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
25297         handle what two_value_replacement did.
25298
25299 2023-04-28  Andrew Pinski  <apinski@marvell.com>
25300
25301         * match.pd: Add patterns for
25302         "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
25303
25304 2023-04-28  Andrew Pinski  <apinski@marvell.com>
25305
25306         * match.pd: Factor out the deciding the min/max from
25307         the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
25308         pattern to ...
25309         * fold-const.cc (minmax_from_comparison): this new function.
25310         * fold-const.h (minmax_from_comparison): New prototype.
25311
25312 2023-04-28  Roger Sayle  <roger@nextmovesoftware.com>
25313
25314         PR rtl-optimization/109476
25315         * lower-subreg.cc: Include explow.h for force_reg.
25316         (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
25317         If decomposing a suitable LSHIFTRT and we're not splitting
25318         ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
25319         instead of setting a high part SUBREG to zero, which helps combine.
25320         (decompose_multiword_subregs): Update call to resolve_shift_zext.
25321
25322 2023-04-28  Richard Biener  <rguenther@suse.de>
25323
25324         * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
25325         consider scatters.
25326         * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
25327         gather-scatter info and cost emulated scatters accordingly.
25328         (get_load_store_type): Support emulated scatters.
25329         (vectorizable_store): Likewise.  Emulate them by extracting
25330         scalar offsets and data, doing scalar stores.
25331
25332 2023-04-28  Richard Biener  <rguenther@suse.de>
25333
25334         * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
25335         Tame down element extracts and scalar loads for gather/scatter
25336         similar to elementwise strided accesses.
25337
25338 2023-04-28  Pan Li  <pan2.li@intel.com>
25339             kito-cheng  <kito.cheng@sifive.com>
25340
25341         * config/riscv/vector.md: Add new define split to perform
25342         the simplification.
25343
25344 2023-04-28  Richard Biener  <rguenther@suse.de>
25345
25346         PR ipa/109652
25347         * ipa-param-manipulation.cc
25348         (ipa_param_body_adjustments::modify_expression): Allow
25349         conversion of a register to a non-register type.  Elide
25350         conversions inside BIT_FIELD_REFs.
25351
25352 2023-04-28  Richard Biener  <rguenther@suse.de>
25353
25354         PR tree-optimization/109644
25355         * tree-cfg.cc (verify_types_in_gimple_reference): Check
25356         register constraints on the outermost VIEW_CONVERT_EXPR
25357         only.  Do not allow register or invariant bases on
25358         multi-level or possibly variable index handled components.
25359
25360 2023-04-28  Richard Biener  <rguenther@suse.de>
25361
25362         * gimplify.cc (gimplify_compound_lval): When there's a
25363         non-register type produced by one of the handled component
25364         operations make sure we get a non-register base.
25365
25366 2023-04-28  Richard Biener  <rguenther@suse.de>
25367
25368         PR tree-optimization/108752
25369         * tree-vect-generic.cc (build_replicated_const): Rename
25370         to build_replicated_int_cst and move to tree.{h,cc}.
25371         (do_plus_minus): Adjust.
25372         (do_negate): Likewise.
25373         * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
25374         arithmetic vector operations in lowered form.
25375         * tree.h (build_replicated_int_cst): Declare.
25376         * tree.cc (build_replicated_int_cst): Moved from
25377         tree-vect-generic.cc build_replicated_const.
25378
25379 2023-04-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
25380
25381         PR target/99195
25382         * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
25383         (aarch64_rbit<mode><vczle><vczbe>): ... This.
25384         (neg<mode>2): Rename to...
25385         (neg<mode>2<vczle><vczbe>): ... This.
25386         (abs<mode>2): Rename to...
25387         (abs<mode>2<vczle><vczbe>): ... This.
25388         (aarch64_abs<mode>): Rename to...
25389         (aarch64_abs<mode><vczle><vczbe>): ... This.
25390         (one_cmpl<mode>2): Rename to...
25391         (one_cmpl<mode>2<vczle><vczbe>): ... This.
25392         (clrsb<mode>2): Rename to...
25393         (clrsb<mode>2<vczle><vczbe>): ... This.
25394         (clz<mode>2): Rename to...
25395         (clz<mode>2<vczle><vczbe>): ... This.
25396         (popcount<mode>2): Rename to...
25397         (popcount<mode>2<vczle><vczbe>): ... This.
25398
25399 2023-04-28  Jakub Jelinek  <jakub@redhat.com>
25400
25401         * gimple-range-op.cc (class cfn_sqrt): New type.
25402         (op_cfn_sqrt): New variable.
25403         (gimple_range_op_handler::maybe_builtin_call): Handle
25404         CASE_CFN_SQRT{,_FN}.
25405
25406 2023-04-28  Aldy Hernandez  <aldyh@redhat.com>
25407             Jakub Jelinek  <jakub@redhat.com>
25408
25409         * value-range.h (frange_nextafter): Declare.
25410         * gimple-range-op.cc (class cfn_sincos): New.
25411         (op_cfn_sin, op_cfn_cos): New variables.
25412         (gimple_range_op_handler::maybe_builtin_call): Handle
25413         CASE_CFN_{SIN,COS}{,_FN}.
25414
25415 2023-04-28  Jakub Jelinek  <jakub@redhat.com>
25416
25417         * target.def (libm_function_max_error): New target hook.
25418         * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
25419         * doc/tm.texi: Regenerated.
25420         * targhooks.h (default_libm_function_max_error,
25421         glibc_linux_libm_function_max_error): Declare.
25422         * targhooks.cc: Include case-cfn-macros.h.
25423         (default_libm_function_max_error,
25424         glibc_linux_libm_function_max_error): New functions.
25425         * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25426         * config/linux-protos.h (linux_libm_function_max_error): Declare.
25427         * config/linux.cc: Include target.h and targhooks.h.
25428         (linux_libm_function_max_error): New function.
25429         * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
25430         (arc_libm_function_max_error): New function.
25431         (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25432         * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
25433         (ix86_libm_function_max_error): New function.
25434         (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25435         * config/rs6000/rs6000-protos.h
25436         (rs6000_linux_libm_function_max_error): Declare.
25437         * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
25438         and case-cfn-macros.h.
25439         (rs6000_linux_libm_function_max_error): New function.
25440         * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25441         * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25442         * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
25443         (or1k_libm_function_max_error): New function.
25444         (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
25445
25446 2023-04-28  Alexandre Oliva  <oliva@adacore.com>
25447
25448         * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
25449         Move detach value calls...
25450         (pass_harden_conditional_branches::execute): ... here.
25451         (pass_harden_compares::execute): Detach values before
25452         compares.
25453
25454 2023-04-27  Andrew Stubbs  <ams@codesourcery.com>
25455
25456         * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
25457         (cml<addsub_as><mode>4): Likewise.
25458         (vec_addsub<mode>3): Likewise.
25459         (cadd<rot><mode>3): Likewise.
25460         (vec_fmaddsub<mode>4): Likewise.
25461         (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
25462
25463 2023-04-27  Andrew Pinski  <apinski@marvell.com>
25464
25465         * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
25466         up to 2 min/max expressions in the sequence/match code.
25467
25468 2023-04-27  Andrew Pinski  <apinski@marvell.com>
25469
25470         * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
25471         COMPARISON.
25472         * tree-eh.cc (operation_could_trap_helper_p): Treate
25473         MIN_EXPR/MAX_EXPR similar as other comparisons.
25474
25475 2023-04-27  Andrew Pinski  <apinski@marvell.com>
25476
25477         * tree-ssa-phiopt.cc (cond_store_replacement): Remove
25478         prototype.
25479         (cond_if_else_store_replacement): Likewise.
25480         (get_non_trapping): Likewise.
25481         (store_elim_worker): Move into ...
25482         (pass_cselim::execute): This.
25483
25484 2023-04-27  Andrew Pinski  <apinski@marvell.com>
25485
25486         * tree-ssa-phiopt.cc (two_value_replacement): Remove
25487         prototype.
25488         (match_simplify_replacement): Likewise.
25489         (factor_out_conditional_conversion): Likewise.
25490         (value_replacement): Likewise.
25491         (minmax_replacement): Likewise.
25492         (spaceship_replacement): Likewise.
25493         (cond_removal_in_builtin_zero_pattern): Likewise.
25494         (hoist_adjacent_loads): Likewise.
25495         (tree_ssa_phiopt_worker): Move into ...
25496         (pass_phiopt::execute): this.
25497
25498 2023-04-27  Andrew Pinski  <apinski@marvell.com>
25499
25500         * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
25501         do_store_elim argument and split that part out to ...
25502         (store_elim_worker): This new function.
25503         (pass_cselim::execute): Call store_elim_worker.
25504         (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
25505
25506 2023-04-27  Jan Hubicka  <jh@suse.cz>
25507
25508         * cfgloopmanip.h (unloop_loops): Export.
25509         * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
25510         that no longer loop.
25511         * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
25512         vectors of loops to unloop.
25513         (canonicalize_induction_variables): Free vectors here.
25514         (tree_unroll_loops_completely): Free vectors here.
25515
25516 2023-04-27  Richard Biener  <rguenther@suse.de>
25517
25518         PR tree-optimization/109170
25519         * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
25520         Handle __builtin_expect and similar via cfn_pass_through_arg1
25521         and inspecting the calls fnspec.
25522         * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
25523         and BUILT_IN_EXPECT_WITH_PROBABILITY.
25524
25525 2023-04-27  Alexandre Oliva  <oliva@adacore.com>
25526
25527         * genmultilib: Use CONFIG_SHELL to run sub-scripts.
25528
25529 2023-04-27  Aldy Hernandez  <aldyh@redhat.com>
25530
25531         PR tree-optimization/109639
25532         * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
25533         (propagate_vr_across_jump_function): Same.
25534         * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
25535         * ipa-prop.h (ipa_range_set_and_normalize): New.
25536         * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
25537
25538 2023-04-27  Richard Biener  <rguenther@suse.de>
25539
25540         * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
25541         create a CTOR operand in the result when simplifying GIMPLE.
25542
25543 2023-04-27  Richard Biener  <rguenther@suse.de>
25544
25545         * gimplify.cc (gimplify_compound_lval): When the base
25546         gimplified to a register make sure to split up chains
25547         of operations.
25548
25549 2023-04-27  Richard Biener  <rguenther@suse.de>
25550
25551         PR ipa/109607
25552         * ipa-param-manipulation.h
25553         (ipa_param_body_adjustments::modify_expression): Add extra_stmts
25554         argument.
25555         * ipa-param-manipulation.cc
25556         (ipa_param_body_adjustments::modify_expression): Likewise.
25557         When we need a conversion and the replacement is a register
25558         split the conversion out.
25559         (ipa_param_body_adjustments::modify_assignment): Pass
25560         extra_stmts to RHS modify_expression.
25561
25562 2023-04-27  Jonathan Wakely  <jwakely@redhat.com>
25563
25564         * doc/extend.texi (Zero Length): Describe example.
25565
25566 2023-04-27  Richard Biener  <rguenther@suse.de>
25567
25568         PR tree-optimization/109594
25569         * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
25570         what we rewrite to a register based on the above.
25571
25572 2023-04-26  Patrick O'Neill  <patrick@rivosinc.com>
25573
25574         * config/riscv/riscv.cc: Fix whitespace.
25575         * config/riscv/sync.md: Fix whitespace.
25576
25577 2023-04-26  Andrew MacLeod  <amacleod@redhat.com>
25578
25579         PR tree-optimization/108697
25580         * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
25581         not clear the vector on an out of range query.
25582         (ssa_cache::dump): Use dump_range_query instead of get_range.
25583         (ssa_cache::dump_range_query): New.
25584         (ssa_lazy_cache::dump_range_query): New.
25585         (ssa_lazy_cache::set_range): New.
25586         * gimple-range-cache.h (ssa_cache::dump_range_query): New.
25587         (class ssa_lazy_cache): New.
25588         (ssa_lazy_cache::ssa_lazy_cache): New.
25589         (ssa_lazy_cache::~ssa_lazy_cache): New.
25590         (ssa_lazy_cache::get_range): New.
25591         (ssa_lazy_cache::clear_range): New.
25592         (ssa_lazy_cache::clear): New.
25593         (ssa_lazy_cache::dump): New.
25594         * gimple-range-path.cc (path_range_query::path_range_query): Do
25595         not allocate a ssa_cache object nor has_cache bitmap.
25596         (path_range_query::~path_range_query): Do not free objects.
25597         (path_range_query::clear_cache): Remove.
25598         (path_range_query::get_cache): Adjust.
25599         (path_range_query::set_cache): Remove.
25600         (path_range_query::dump): Don't call through a pointer.
25601         (path_range_query::internal_range_of_expr): Set cache directly.
25602         (path_range_query::reset_path): Clear cache directly.
25603         (path_range_query::ssa_range_in_phi): Fold with globals only.
25604         (path_range_query::compute_ranges_in_phis): Simply set range.
25605         (path_range_query::compute_ranges_in_block): Call cache directly.
25606         * gimple-range-path.h (class path_range_query): Replace bitmap
25607         and cache pointer with lazy cache object.
25608         * gimple-range.h (class assume_query): Use ssa_lazy_cache.
25609
25610 2023-04-26  Andrew MacLeod  <amacleod@redhat.com>
25611
25612         * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
25613         (ssa_cache::~ssa_cache): Rename.
25614         (ssa_cache::has_range): New.
25615         (ssa_cache::get_range): Rename.
25616         (ssa_cache::set_range): Rename.
25617         (ssa_cache::clear_range): Rename.
25618         (ssa_cache::clear): Rename.
25619         (ssa_cache::dump): Rename and use get_range.
25620         (ranger_cache::get_global_range): Use get_range and set_range.
25621         (ranger_cache::range_of_def): Use get_range.
25622         * gimple-range-cache.h (class ssa_cache): Rename class and methods.
25623         (class ranger_cache): Use ssa_cache.
25624         * gimple-range-path.cc (path_range_query::path_range_query): Use
25625         ssa_cache.
25626         (path_range_query::get_cache): Use get_range.
25627         (path_range_query::set_cache): Use set_range.
25628         * gimple-range-path.h (class path_range_query): Use ssa_cache.
25629         * gimple-range.cc (assume_query::assume_range_p): Use get_range.
25630         (assume_query::range_of_expr): Use get_range.
25631         (assume_query::assume_query): Use set_range.
25632         (assume_query::calculate_op): Use get_range and set_range.
25633         * gimple-range.h (class assume_query): Use ssa_cache.
25634
25635 2023-04-26  Andrew MacLeod  <amacleod@redhat.com>
25636
25637         * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
25638         and local to optionally zero memory.
25639         (br_vector::grow): Only zero memory if flag is set.
25640         (class sbr_lazy_vector): New.
25641         (sbr_lazy_vector::sbr_lazy_vector): New.
25642         (sbr_lazy_vector::set_bb_range): New.
25643         (sbr_lazy_vector::get_bb_range): New.
25644         (sbr_lazy_vector::bb_range_p): New.
25645         (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
25646         * gimple-range-gori.cc (gori_map::calculate_gori): Use
25647         param_vrp_switch_limit.
25648         (gori_compute::gori_compute): Use param_vrp_switch_limit.
25649         * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
25650         (vrp_switch_limit): Rename from evrp_switch_limit.
25651         (vrp_vector_threshold): New.
25652
25653 2023-04-26  Andrew MacLeod  <amacleod@redhat.com>
25654
25655         * value-relation.cc (dom_oracle::query_relation): Check early for lack
25656         of any relation.
25657         * value-relation.h (equiv_oracle::has_equiv_p): New.
25658
25659 2023-04-26  Andrew MacLeod  <amacleod@redhat.com>
25660
25661         PR tree-optimization/109417
25662         * gimple-range-gori.cc (range_def_chain::register_dependency):
25663         Save the ssa version number, not the pointer.
25664         (gori_compute::may_recompute_p): No need to check if a dependency
25665         is in the free list.
25666         * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
25667         fields to be unsigned int instead of trees.
25668         (ange_def_chain::depend1): Adjust.
25669         (ange_def_chain::depend2): Adjust.
25670         * gimple-range.h: Include "ssa.h" to inline ssa_name().
25671
25672 2023-04-26  David Edelsohn  <dje.gcc@gmail.com>
25673
25674         * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
25675         * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
25676         (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
25677
25678 2023-04-26  Patrick O'Neill  <patrick@rivosinc.com>
25679
25680         PR target/104338
25681         * config/riscv/riscv-protos.h: Add helper function stubs.
25682         * config/riscv/riscv.cc: Add helper functions for subword masking.
25683         * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
25684         -mno-inline-atomics.
25685         * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
25686         fetch_and_nand, CAS, and exchange ops.
25687         * doc/invoke.texi: Add blurb regarding new command-line flags
25688         -minline-atomics and -mno-inline-atomics.
25689
25690 2023-04-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
25691
25692         * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
25693         Reimplement using standard RTL codes instead of unspec.
25694         (aarch64_rshrn2<mode>_insn_be): Likewise.
25695         (aarch64_rshrn2<mode>): Adjust for the above.
25696         * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
25697
25698 2023-04-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
25699
25700         * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
25701         with standard RTL codes instead of an UNSPEC.
25702         (aarch64_rshrn<mode>_insn_be): Likewise.
25703         (aarch64_rshrn<mode>): Adjust for the above.
25704         * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
25705
25706 2023-04-26  Pan Li  <pan2.li@intel.com>
25707             Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
25708
25709         * config/riscv/riscv.cc (riscv_classify_address): Allow
25710         const0_rtx for the RVV load/store.
25711
25712 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25713
25714         * range-op.cc (range_op_cast_tests): Remove legacy support.
25715         * value-range-storage.h (vrange_allocator::alloc_irange): Same.
25716         * value-range.cc (irange::operator=): Same.
25717         (get_legacy_range): Same.
25718         (irange::copy_legacy_to_multi_range): Delete.
25719         (irange::copy_to_legacy): Delete.
25720         (irange::irange_set_anti_range): Delete.
25721         (irange::set): Remove legacy support.
25722         (irange::verify_range): Same.
25723         (irange::legacy_lower_bound): Delete.
25724         (irange::legacy_upper_bound): Delete.
25725         (irange::legacy_equal_p): Delete.
25726         (irange::operator==): Remove legacy support.
25727         (irange::singleton_p): Same.
25728         (irange::value_inside_range): Same.
25729         (irange::contains_p): Same.
25730         (intersect_ranges): Delete.
25731         (irange::legacy_intersect): Delete.
25732         (union_ranges): Delete.
25733         (irange::legacy_union): Delete.
25734         (irange::legacy_verbose_union_): Delete.
25735         (irange::legacy_verbose_intersect): Delete.
25736         (irange::irange_union): Remove legacy support.
25737         (irange::irange_intersect): Same.
25738         (irange::intersect): Same.
25739         (irange::invert): Same.
25740         (ranges_from_anti_range): Delete.
25741         (gt_pch_nx): Adjust for legacy removal.
25742         (gt_ggc_mx): Same.
25743         (range_tests_legacy): Delete.
25744         (range_tests_misc): Adjust for legacy removal.
25745         (range_tests): Same.
25746         * value-range.h (class irange): Same.
25747         (irange::legacy_mode_p): Delete.
25748         (ranges_from_anti_range): Delete.
25749         (irange::nonzero_p): Adjust for legacy removal.
25750         (irange::lower_bound): Same.
25751         (irange::upper_bound): Same.
25752         (irange::union_): Same.
25753         (irange::intersect): Same.
25754         (irange::set_nonzero): Same.
25755         (irange::set_zero): Same.
25756         * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
25757
25758 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25759
25760         * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
25761         of range_has_numeric_bounds_p with irange API.
25762         (range_has_numeric_bounds_p): Delete.
25763         * value-range.h (range_has_numeric_bounds_p): Delete.
25764
25765 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25766
25767         * tree-data-ref.cc (compute_distributive_range): Replace uses of
25768         range_int_cst_p with irange API.
25769         * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
25770         * tree-vrp.h (range_int_cst_p): Delete.
25771         * vr-values.cc (check_for_binary_op_overflow): Replace usees of
25772         range_int_cst_p with irange API.
25773         (vr_set_zero_nonzero_bits): Same.
25774         (range_fits_type_p): Same.
25775         (simplify_using_ranges::simplify_casted_cond): Same.
25776         * tree-vrp.cc (range_int_cst_p): Remove.
25777
25778 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25779
25780         * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
25781
25782 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25783
25784         * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
25785         API uses to new API.
25786         * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
25787         * internal-fn.cc (get_min_precision): Same.
25788         * match.pd: Same.
25789         * tree-affine.cc (expr_to_aff_combination): Same.
25790         * tree-data-ref.cc (dr_step_indicator): Same.
25791         * tree-dfa.cc (get_ref_base_and_extent): Same.
25792         * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
25793         * tree-ssa-phiopt.cc (two_value_replacement): Same.
25794         * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
25795         * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
25796         * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
25797         * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
25798         * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
25799         * tree.cc (get_range_pos_neg): Same.
25800
25801 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25802
25803         * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
25804         vrange::dump instead of ad-hoc dumper.
25805         * tree-ssa-strlen.cc (dump_strlen_info): Same.
25806         * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
25807         dump_generic_node.
25808
25809 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25810
25811         * range-op.cc (operator_cast::op1_range): Use
25812         create_possibly_reversed_range.
25813         (operator_bitwise_and::simple_op1_range_solver): Same.
25814         * value-range.cc (swap_out_of_order_endpoints): Delete.
25815         (irange::set): Remove call to swap_out_of_order_endpoints.
25816
25817 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25818
25819         * builtins.cc (determine_block_size): Convert use of legacy API to
25820         get_legacy_range.
25821         * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
25822         (array_bounds_checker::check_array_ref): Same.
25823         * gimple-ssa-warn-restrict.cc
25824         (builtin_memref::extend_offset_range): Same.
25825         * ipa-cp.cc (ipcp_store_vr_results): Same.
25826         * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
25827         * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
25828         (ipa_write_jump_function): Same.
25829         * pointer-query.cc (get_size_range): Same.
25830         * tree-data-ref.cc (split_constant_offset): Same.
25831         * tree-ssa-strlen.cc (get_range): Same.
25832         (maybe_diag_stxncpy_trunc): Same.
25833         (strlen_pass::get_len_or_size): Same.
25834         (strlen_pass::count_nonzero_bytes_addr): Same.
25835         * tree-vect-patterns.cc (vect_get_range_info): Same.
25836         * value-range.cc (irange::maybe_anti_range): Remove.
25837         (get_legacy_range): New.
25838         (irange::copy_to_legacy): Use get_legacy_range.
25839         (ranges_from_anti_range): Same.
25840         * value-range.h (class irange): Remove maybe_anti_range.
25841         (get_legacy_range): New.
25842         * vr-values.cc (check_for_binary_op_overflow): Convert use of
25843         legacy API to get_legacy_range.
25844         (compare_ranges): Same.
25845         (compare_range_with_value): Same.
25846         (bounds_of_var_in_loop): Same.
25847         (find_case_label_ranges): Same.
25848         (simplify_using_ranges::simplify_switch_using_ranges): Same.
25849
25850 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25851
25852         * value-range-pretty-print.cc (vrange_printer::visit): Remove
25853         constant_p use.
25854         * value-range.cc (irange::constant_p): Remove.
25855         (irange::get_nonzero_bits_from_range): Remove constant_p use.
25856         * value-range.h (class irange): Remove constant_p.
25857         (irange::num_pairs): Remove constant_p use.
25858
25859 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25860
25861         * value-range.cc (irange::copy_legacy_to_multi_range): Remove
25862         symbolics support.
25863         (irange::set): Same.
25864         (irange::legacy_lower_bound): Same.
25865         (irange::legacy_upper_bound): Same.
25866         (irange::contains_p): Same.
25867         (range_tests_legacy): Same.
25868         (irange::normalize_addresses): Remove.
25869         (irange::normalize_symbolics): Remove.
25870         (irange::symbolic_p): Remove.
25871         * value-range.h (class irange): Remove symbolic_p,
25872         normalize_symbolics, and normalize_addresses.
25873         * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
25874         Remove symbolics support.
25875
25876 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25877
25878         * value-range.cc (irange::may_contain_p): Remove.
25879         * value-range.h (range_includes_zero_p):  Rewrite may_contain_p
25880         usage with contains_p.
25881         * vr-values.cc (compare_range_with_value): Same.
25882
25883 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25884
25885         * tree-vrp.cc (supported_types_p): Remove.
25886         (defined_ranges_p): Remove.
25887         (range_fold_binary_expr): Remove.
25888         (range_fold_unary_expr): Remove.
25889         * tree-vrp.h (range_fold_unary_expr): Remove.
25890         (range_fold_binary_expr): Remove.
25891
25892 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25893
25894         * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
25895         (ipa_value_range_from_jfunc): Same.
25896         (propagate_vr_across_jump_function): Same.
25897         * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
25898         * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
25899         * vr-values.cc (bounds_of_var_in_loop): Same.
25900
25901 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25902
25903         * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
25904         Add irange argument.
25905         (check_out_of_bounds_and_warn): Remove check for vr.
25906         (array_bounds_checker::check_array_ref): Remove pointer qualifier
25907         for vr and adjust accordingly.
25908         * gimple-array-bounds.h (get_value_range): Add irange argument.
25909         * value-query.cc (class equiv_allocator): Delete.
25910         (range_query::get_value_range): Delete.
25911         (range_query::range_query): Remove allocator access.
25912         (range_query::~range_query): Same.
25913         * value-query.h (get_value_range): Delete.
25914         * vr-values.cc
25915         (simplify_using_ranges::op_with_boolean_value_range_p): Remove
25916         call to get_value_range.
25917         (check_for_binary_op_overflow): Same.
25918         (simplify_using_ranges::legacy_fold_cond_overflow): Same.
25919         (simplify_using_ranges::simplify_abs_using_ranges): Same.
25920         (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
25921         (simplify_using_ranges::simplify_casted_cond): Same.
25922         (simplify_using_ranges::simplify_switch_using_ranges): Same.
25923         (simplify_using_ranges::two_valued_val_range_p): Same.
25924
25925 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25926
25927         * vr-values.cc
25928         (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
25929         Rename to...
25930         (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
25931         (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
25932         (simplify_using_ranges::legacy_fold_cond): ...this.
25933         (simplify_using_ranges::fold_cond): Rename
25934         vrp_evaluate_conditional_warnv_with_ops to
25935         legacy_fold_cond_overflow.
25936         * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
25937         vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
25938         legacy_fold_cond_overflow respectively.
25939
25940 2023-04-26  Aldy Hernandez  <aldyh@redhat.com>
25941
25942         * vr-values.cc (get_vr_for_comparison): Remove.
25943         (compare_name_with_value): Same.
25944         (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
25945         compare_name_with_value.
25946         * vr-values.h: Remove compare_name_with_value.
25947         Remove get_vr_for_comparison.
25948
25949 2023-04-26  Roger Sayle  <roger@nextmovesoftware.com>
25950
25951         * config/stormy16/stormy16.md (bswaphi2): New define_insn.
25952         (bswapsi2): New define_insn.
25953         (swaphi): New define_insn to exchange two registers (swpw).
25954         (define_peephole2): Recognize exchange of registers as swaphi.
25955
25956 2023-04-26  Richard Biener  <rguenther@suse.de>
25957
25958         * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
25959         Avoid last_stmt.
25960         * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
25961         * predict.cc (apply_return_prediction): Likewise.
25962         * sese.cc (set_ifsese_condition): Likewise.  Simplify.
25963         * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
25964         (make_edges_bb): Likewise.
25965         (make_cond_expr_edges): Likewise.
25966         (end_recording_case_labels): Likewise.
25967         (make_gimple_asm_edges): Likewise.
25968         (cleanup_dead_labels): Likewise.
25969         (group_case_labels): Likewise.
25970         (gimple_can_merge_blocks_p): Likewise.
25971         (gimple_merge_blocks): Likewise.
25972         (find_taken_edge): Likewise.  Also handle empty fallthru blocks.
25973         (gimple_duplicate_sese_tail): Avoid last_stmt.
25974         (find_loop_dist_alias): Likewise.
25975         (gimple_block_ends_with_condjump_p): Likewise.
25976         (gimple_purge_dead_eh_edges): Likewise.
25977         (gimple_purge_dead_abnormal_call_edges): Likewise.
25978         (pass_warn_function_return::execute): Likewise.
25979         (execute_fixup_cfg): Likewise.
25980         * tree-eh.cc (redirect_eh_edge_1): Likewise.
25981         (pass_lower_resx::execute): Likewise.
25982         (pass_lower_eh_dispatch::execute): Likewise.
25983         (cleanup_empty_eh): Likewise.
25984         * tree-if-conv.cc (if_convertible_bb_p): Likewise.
25985         (predicate_bbs): Likewise.
25986         (ifcvt_split_critical_edges): Likewise.
25987         * tree-loop-distribution.cc (create_edge_for_control_dependence):
25988         Likewise.
25989         (loop_distribution::transform_reduction_loop): Likewise.
25990         * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
25991         (try_transform_to_exit_first_loop_alt): Likewise.
25992         (transform_to_exit_first_loop): Likewise.
25993         (create_parallel_loop): Likewise.
25994         * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
25995         * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
25996         (eliminate_unnecessary_stmts): Likewise.
25997         * tree-ssa-dom.cc
25998         (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
25999         Likewise.
26000         * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
26001         (pass_tree_ifcombine::execute): Likewise.
26002         * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
26003         (should_duplicate_loop_header_p): Likewise.
26004         * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
26005         (tree_estimate_loop_size): Likewise.
26006         (try_unroll_loop_completely): Likewise.
26007         * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
26008         * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
26009         (canonicalize_loop_ivs): Likewise.
26010         * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
26011         (bound_difference): Likewise.
26012         (number_of_iterations_popcount): Likewise.
26013         (number_of_iterations_cltz): Likewise.
26014         (number_of_iterations_cltz_complement): Likewise.
26015         (simplify_using_initial_conditions): Likewise.
26016         (number_of_iterations_exit_assumptions): Likewise.
26017         (loop_niter_by_eval): Likewise.
26018         (estimate_numbers_of_iterations): Likewise.
26019
26020 2023-04-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
26021
26022         * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
26023
26024 2023-04-26  Kewen Lin  <linkw@linux.ibm.com>
26025
26026         PR target/108758
26027         * config/rs6000/rs6000-builtins.def
26028         (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
26029         __builtin_vsx_scalar_cmp_exp_qp_lt,
26030         __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
26031         to power9-vector.
26032
26033 2023-04-26  Kewen Lin  <linkw@linux.ibm.com>
26034
26035         PR target/109069
26036         * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
26037         easy_vector_constant with const_vector_each_byte_same, add
26038         handlings in preparation for !easy_vector_constant, and update
26039         VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
26040         * config/rs6000/predicates.md (const_vector_each_byte_same): New
26041         predicate.
26042
26043 2023-04-26  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
26044
26045         * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
26046         (*pred_ltge<mode>_merge_tie_mask): Ditto.
26047         (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
26048         (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
26049         (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
26050         (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
26051         (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
26052
26053 2023-04-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
26054
26055         * config/riscv/vector.md: Fix redundant vmv1r.v.
26056
26057 2023-04-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
26058
26059         * config/riscv/vector.md: Fix RA constraint.
26060
26061 2023-04-26  Pan Li  <pan2.li@intel.com>
26062
26063         PR target/109272
26064         * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
26065         check for vn_reference equal.
26066
26067 2023-04-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
26068
26069         * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
26070         auto-vectorization preference.
26071         (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
26072         auto-vectorization.
26073         * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
26074
26075 2023-04-26  Jivan Hakobyan  <jivanhakobyan9@gmail.com>
26076
26077         * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
26078         and bclridisi_nottwobits patterns.
26079         * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
26080         predicate to avoid splitting arith constants.
26081         (const_nottwobits_not_arith_operand): New predicate.
26082
26083 2023-04-25  Hans-Peter Nilsson  <hp@axis.com>
26084
26085         * recog.cc (peep2_attempt, peep2_update_life): Correct
26086         head-comment description of parameter match_len.
26087
26088 2023-04-25  Vineet Gupta  <vineetg@rivosinc.com>
26089
26090         * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
26091         riscv_split_symbol() drop in_splitter arg.
26092         * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
26093         riscv_split_symbol() drop in_splitter arg.
26094         riscv_force_temporary() drop in_splitter arg.
26095         * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
26096         riscv_split_symbol() drop in_splitter arg.
26097
26098 2023-04-25  Eric Botcazou  <ebotcazou@adacore.com>
26099
26100         * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
26101         superfluous debug temporaries for single GIMPLE assignments.
26102
26103 2023-04-25  Richard Biener  <rguenther@suse.de>
26104
26105         PR tree-optimization/109609
26106         * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
26107         Clarify semantics.
26108         * tree-ssa-alias.cc (check_fnspec): Correctly interpret
26109         the size given by arg_max_access_size_given_by_arg_p as
26110         maximum, not exact, size.
26111
26112 2023-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26113
26114         PR target/99195
26115         * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
26116         (orn<mode>3<vczle><vczbe>): ... This.
26117         (bic<mode>3): Rename to...
26118         (bic<mode>3<vczle><vczbe>): ... This.
26119         (<su><maxmin><mode>3): Rename to...
26120         (<su><maxmin><mode>3<vczle><vczbe>): ... This.
26121
26122 2023-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26123
26124         * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
26125         * config/aarch64/iterators.md (VQDIV): New mode iterator.
26126         (vnx2di): New mode attribute.
26127
26128 2023-04-25  Richard Biener  <rguenther@suse.de>
26129
26130         PR rtl-optimization/109585
26131         * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
26132
26133 2023-04-25  Jakub Jelinek  <jakub@redhat.com>
26134
26135         PR target/109566
26136         * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
26137         !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
26138         is larger than signed int maximum.
26139
26140 2023-04-25  Martin Liska  <mliska@suse.cz>
26141
26142         * doc/gcov.texi: Document the new "calls" field and document
26143         the API bump. Mention also "block_ids" for lines.
26144         * gcov.cc (output_intermediate_json_line): Output info about
26145         calls and extend branches as well.
26146         (generate_results): Bump version to 2.
26147         (output_line_details): Use block ID instead of a non-sensual
26148         index.
26149
26150 2023-04-25  Roger Sayle  <roger@nextmovesoftware.com>
26151
26152         * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
26153         length attribute for the first (memory operand) alternative.
26154
26155 2023-04-25  Victor Do Nascimento  <victor.donascimento@arm.com>
26156
26157         * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
26158         * config/aarch64/constraints.md: Make "Umn" relaxed memory
26159         constraint.
26160         * config/aarch64/iterators.md(ldpstp_vel_sz): New.
26161
26162 2023-04-25  Aldy Hernandez  <aldyh@redhat.com>
26163
26164         * value-range.cc (frange::set): Adjust constructor.
26165         * value-range.h (nan_state::nan_state): Replace default
26166         constructor with one taking an argument.
26167
26168 2023-04-25  Aldy Hernandez  <aldyh@redhat.com>
26169
26170         * ipa-cp.cc (ipa_range_contains_p): New.
26171         (decide_whether_version_node): Use it.
26172
26173 2023-04-24  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
26174
26175         * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
26176         simplify two successive VEC_PERM_EXPRs with same VLA mask,
26177         where mask chooses elements in reverse order.
26178
26179 2023-04-24  Andrew Pinski  <apinski@marvell.com>
26180
26181         * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
26182         and support diamond shaped basic block form.
26183         (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
26184
26185 2023-04-24  Andrew Pinski  <apinski@marvell.com>
26186
26187         * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
26188         Instead of calling last_and_only_stmt, look for the last statement
26189         manually.
26190
26191 2023-04-24  Andrew Pinski  <apinski@marvell.com>
26192
26193         * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
26194         New function.
26195         (match_simplify_replacement): Call
26196         empty_bb_or_one_feeding_into_p instead of doing it inline.
26197
26198 2023-04-24  Andrew Pinski  <apinski@marvell.com>
26199
26200         PR tree-optimization/68894
26201         * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
26202         continue for the do_hoist_loads diamond case.
26203
26204 2023-04-24  Andrew Pinski  <apinski@marvell.com>
26205
26206         * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
26207         code for better code readability.
26208
26209 2023-04-24  Andrew Pinski  <apinski@marvell.com>
26210
26211         PR tree-optimization/109604
26212         * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
26213         diamond form check from ...
26214         (minmax_replacement): Here.
26215
26216 2023-04-24  Patrick Palka  <ppalka@redhat.com>
26217
26218         * tree.cc (strip_array_types): Don't define here.
26219         (is_typedef_decl): Don't define here.
26220         (typedef_variant_p): Don't define here.
26221         * tree.h (strip_array_types): Define here.
26222         (is_typedef_decl): Define here.
26223         (typedef_variant_p): Define here.
26224
26225 2023-04-24  Frederik Harwath  <frederik@codesourcery.com>
26226
26227         * doc/generic.texi (OpenMP): Add != to allowed
26228         conditions and state that vars can be unsigned.
26229         * tree.def (OMP_FOR): Likewise.
26230
26231 2023-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26232
26233         * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
26234
26235 2023-04-24  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
26236
26237         * doc/install.texi: Consistently use Solaris rather than Solaris 2.
26238         Remove explicit Solaris 11 references.
26239         Markup fixes.
26240         (Options specification, --with-gnu-as): as and gas always differ
26241         on Solaris.
26242         Remove /usr/ccs/bin reference.
26243         (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
26244         (i?86-*-solaris2*): Merge assembler, linker recommendations ...
26245         (*-*-solaris2*): ... here.
26246         Update bundled GCC versions.
26247         Don't refer to pre-built binaries.
26248         Remove /bin/sh warning.
26249         Update assembler, linker recommendations.
26250         Document GNAT bootstrap compiler.
26251         (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
26252         (sparc64-*-solaris2*): Move content...
26253         (sparcv9-*-solaris2*): ...here.
26254         Add GDC for 64-bit bootstrap compilers.
26255
26256 2023-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26257
26258         PR target/109406
26259         * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
26260         case.
26261         * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
26262         pattern.
26263
26264 2023-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26265
26266         * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
26267         (aarch64_<su>abal2<mode>_insn): ... This.  Use RTL codes instead of unspec.
26268         (aarch64_<su>abal2<mode>): New define_expand.
26269         * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
26270         (aarch64_rtx_costs): Handle ABD rtxes.
26271         * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
26272         * config/aarch64/iterators.md (ABAL2): Delete.
26273         (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
26274
26275 2023-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26276
26277         * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
26278         (aarch64_<su>abal<mode>): ... This.  Use RTL codes instead of unspec.
26279         (<sur>sadv16qi): Rename to...
26280         (<su>sadv16qi): ... This.  Adjust for the above.
26281         * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
26282         (<su>sad<vsi2qi>): ... This.  Adjust for the above.
26283         * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
26284         * config/aarch64/iterators.md (ABAL): Delete.
26285         (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
26286
26287 2023-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26288
26289         * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
26290         (aarch64_<su>abdl2<mode>_insn): ... This.  Use RTL codes instead of unspec.
26291         (aarch64_<su>abdl2<mode>): New define_expand.
26292         * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
26293         * config/aarch64/iterators.md (ABDL2): Delete.
26294         (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
26295
26296 2023-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26297
26298         * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
26299         (aarch64_<su>abdl<mode>): ... This.  Use standard RTL ops instead of
26300         unspec.
26301         * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
26302         * config/aarch64/iterators.md (ABDL): Delete.
26303         (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
26304
26305 2023-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26306
26307         * config/aarch64/aarch64-simd.md
26308         (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
26309
26310 2023-04-24  Richard Biener  <rguenther@suse.de>
26311
26312         * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
26313         last_stmt.
26314         * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
26315         Likewise.
26316         * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
26317         (set_switch_stmt_execution_predicate): Likewise.
26318         (phi_result_unknown_predicate): Likewise.
26319         * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
26320         (ipa_analyze_indirect_call_uses): Likewise.
26321         * predict.cc (predict_iv_comparison): Likewise.
26322         (predict_extra_loop_exits): Likewise.
26323         (predict_loops): Likewise.
26324         (tree_predict_by_opcode): Likewise.
26325         * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
26326         Likewise.
26327         * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
26328         * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
26329         (replace_phi_edge_with_variable): Likewise.
26330         (two_value_replacement): Likewise.
26331         (value_replacement): Likewise.
26332         (minmax_replacement): Likewise.
26333         (spaceship_replacement): Likewise.
26334         (cond_removal_in_builtin_zero_pattern): Likewise.
26335         * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
26336         * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
26337         (vn_phi_lookup): Likewise.
26338         (vn_phi_insert): Likewise.
26339         * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
26340         * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
26341         Likewise.
26342         (back_threader_profitability::possibly_profitable_path_p):
26343         Likewise.
26344         * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
26345         Likewise.
26346         * tree-switch-conversion.cc (pass_convert_switch::execute):
26347         Likewise.
26348         (pass_lower_switch<O0>::execute): Likewise.
26349         * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
26350         * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
26351         * tree-vect-slp.cc (vect_slp_function): Likewise.
26352         * tree-vect-stmts.cc (cfun_returns): Likewise.
26353         * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
26354         (vect_loop_dist_alias_call): Likewise.
26355
26356 2023-04-24  Richard Biener  <rguenther@suse.de>
26357
26358         * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
26359
26360 2023-04-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
26361
26362         * config/riscv/riscv-vsetvl.cc
26363         (vector_infos_manager::all_avail_in_compatible_p): New function.
26364         (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
26365         * config/riscv/riscv-vsetvl.h: New function.
26366
26367 2023-04-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
26368
26369         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
26370         comment for cleanup_insns.
26371
26372 2023-04-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
26373
26374         * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
26375         * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
26376         with the fault first load property.
26377
26378 2023-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26379
26380         * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
26381         (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
26382
26383 2023-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26384
26385         PR target/99195
26386         * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
26387         (aarch64_addp<mode><vczle><vczbe>): ... This.
26388
26389 2023-04-23  Roger Sayle  <roger@nextmovesoftware.com>
26390
26391         * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
26392         provide reasonable values for common arithmetic operations and
26393         immediate operands (in several machine modes).
26394
26395 2023-04-23  Roger Sayle  <roger@nextmovesoftware.com>
26396
26397         * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
26398         format specifier to output high_part register name of SImode reg.
26399         * config/stormy16/stormy16.md (extendhisi2): New define_insn.
26400         (zero_extendqihi2): Fix lengths, consistent formatting and add
26401         "and Rx,#255" alternative, for documentation purposes.
26402         (zero_extendhisi2): New define_insn.
26403
26404 2023-04-23  Roger Sayle  <roger@nextmovesoftware.com>
26405
26406         * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
26407         SImode shifts by two by performing a single bit SImode shift twice.
26408
26409 2023-04-23  Aldy Hernandez  <aldyh@redhat.com>
26410
26411         PR tree-optimization/109593
26412         * value-range.cc (frange::operator==): Handle NANs.
26413
26414 2023-04-23  liuhongt  <hongtao.liu@intel.com>
26415
26416         PR rtl-optimization/108707
26417         * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
26418         GENERAL_REGS when preferred reg_class is not known.
26419
26420 2023-04-22  Andrew Pinski  <apinski@marvell.com>
26421
26422         * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
26423         Change the code around slightly to move diamond
26424         handling for do_store_elim/do_hoist_loads out of
26425         the big if/else.
26426
26427 2023-04-22  Andrew Pinski  <apinski@marvell.com>
26428
26429         * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
26430         Remove check on empty_block_p.
26431
26432 2023-04-22  Jakub Jelinek  <jakub@redhat.com>
26433
26434         PR bootstrap/109589
26435         * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
26436         * realmpfr.h (class auto_mpfr): Likewise.
26437
26438 2023-04-22  Jakub Jelinek  <jakub@redhat.com>
26439
26440         PR tree-optimization/109583
26441         * match.pd (fneg/fadd simplify): Don't call related_vector_mode
26442         if vec_mode is not VECTOR_MODE_P.
26443
26444 2023-04-22  Jan Hubicka  <hubicka@ucw.cz>
26445             Ondrej Kubanek  <kubanek0ondrej@gmail.com>
26446
26447         * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
26448         * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
26449         loop profile and bounds after header duplication.
26450         * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
26451         Break out from try_peel_loop; fix handling of 0 iterations.
26452         (try_peel_loop): Use adjust_loop_info_after_peeling.
26453
26454 2023-04-21  Andrew MacLeod  <amacleod@redhat.com>
26455
26456         PR tree-optimization/109546
26457         * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
26458         not fold conditions with ADDR_EXPR early.
26459
26460 2023-04-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26461
26462         * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
26463         (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
26464         for umax.
26465         (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
26466         (*aarch64_<optab><mode>3_zero): Define.
26467         (*aarch64_<optab><mode>3_cssc): Likewise.
26468         * config/aarch64/iterators.md (maxminand): New code attribute.
26469
26470 2023-04-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26471
26472         PR target/108779
26473         * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
26474         * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
26475         Define prototype.
26476         * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
26477         (aarch64_override_options_internal): Handle the above.
26478         (aarch64_output_load_tp): New function.
26479         * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
26480         aarch64_output_load_tp.
26481         * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
26482         (mtp=): New option.
26483         * doc/invoke.texi (AArch64 Options): Document -mtp=.
26484
26485 2023-04-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
26486
26487         PR target/99195
26488         * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
26489         (add_vec_concat_subst_be): Likewise.
26490         (vczle): Likewise.
26491         (vczbe): Likewise.
26492         (add<mode>3): Rename to...
26493         (add<mode>3<vczle><vczbe>): ... This.
26494         (sub<mode>3): Rename to...
26495         (sub<mode>3<vczle><vczbe>): ... This.
26496         (mul<mode>3): Rename to...
26497         (mul<mode>3<vczle><vczbe>): ... This.
26498         (and<mode>3): Rename to...
26499         (and<mode>3<vczle><vczbe>): ... This.
26500         (ior<mode>3): Rename to...
26501         (ior<mode>3<vczle><vczbe>): ... This.
26502         (xor<mode>3): Rename to...
26503         (xor<mode>3<vczle><vczbe>): ... This.
26504         * config/aarch64/iterators.md (VDZ): Define.
26505
26506 2023-04-21  Patrick Palka  <ppalka@redhat.com>
26507
26508         * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
26509         and type_p.
26510
26511 2023-04-21  Jan Hubicka  <jh@suse.cz>
26512
26513         * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
26514         commit.
26515
26516 2023-04-21  Vineet Gupta  <vineetg@rivosinc.com>
26517
26518         * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
26519         (shift*_cost_ptr ()): Access x_shift*_cost array directly.
26520
26521 2023-04-21  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
26522
26523         * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
26524         force_reg instead of copy_to_mode_reg.
26525         (aarch64_expand_vector_init): Likewise.
26526
26527 2023-04-21  Uroš Bizjak  <ubizjak@gmail.com>
26528
26529         * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
26530         (REG_OK_FOR_INDEX_NONSTRICT_P,  REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
26531         (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
26532         (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
26533         (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
26534         (INDEX_REG_P, INDEX_REGNO_P): Ditto.
26535         (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
26536         (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
26537         (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
26538         * config/i386/predicates.md (index_register_operand):
26539         Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
26540         * config/i386/i386.cc (ix86_legitimate_address_p): Use
26541         REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
26542         REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
26543
26544 2023-04-21  Jan Hubicka  <hubicka@ucw.cz>
26545             Ondrej Kubanek  <kubanek0ondrej@gmail.com>
26546
26547         * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
26548         latch.
26549
26550 2023-04-21  Richard Biener  <rguenther@suse.de>
26551
26552         * is-a.h (safe_is_a): New.
26553
26554 2023-04-21  Richard Biener  <rguenther@suse.de>
26555
26556         * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
26557         (gphi_iterator::operator*): Likewise.
26558
26559 2023-04-21  Jan Hubicka  <hubicka@ucw.cz>
26560             Michal Jires  <michal@jires.eu>
26561
26562         * ipa-inline.cc (class inline_badness): New class.
26563         (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
26564         of sreal.
26565         (update_edge_key): Update.
26566         (lookup_recursive_calls): Likewise.
26567         (recursive_inlining): Likewise.
26568         (add_new_edges_to_heap): Likewise.
26569         (inline_small_functions): Likewise.
26570
26571 2023-04-21  Jan Hubicka  <hubicka@ucw.cz>
26572
26573         * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
26574
26575 2023-04-21  Richard Biener  <rguenther@suse.de>
26576
26577         PR tree-optimization/109573
26578         * tree-vect-loop.cc (vectorizable_live_operation): Allow
26579         unhandled SSA copy as well.  Demote assert to checking only.
26580
26581 2023-04-21  Richard Biener  <rguenther@suse.de>
26582
26583         * df-core.cc (df_analyze): Compute RPO on the reverse graph
26584         for DF_BACKWARD problems.
26585         (loop_post_order_compute): Rename to ...
26586         (loop_rev_post_order_compute): ... this, compute a RPO.
26587         (loop_inverted_post_order_compute): Rename to ...
26588         (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
26589         (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
26590         problems, RPO on the inverted graph for DF_BACKWARD.
26591
26592 2023-04-21  Richard Biener  <rguenther@suse.de>
26593
26594         * cfganal.h (inverted_rev_post_order_compute): Rename
26595         from ...
26596         (inverted_post_order_compute): ... this.  Add struct function
26597         argument, change allocation to a C array.
26598         * cfganal.cc (inverted_rev_post_order_compute): Likewise.
26599         * lcm.cc (compute_antinout_edge): Adjust.
26600         * lra-lives.cc (lra_create_live_ranges_1): Likewise.
26601         * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
26602         * tree-ssa-pre.cc (compute_antic): Likewise.
26603
26604 2023-04-21  Richard Biener  <rguenther@suse.de>
26605
26606         * df.h (df_d::postorder_inverted): Change back to int *,
26607         clarify comments.
26608         * df-core.cc (rest_of_handle_df_finish): Adjust.
26609         (df_analyze_1): Likewise.
26610         (df_analyze): For DF_FORWARD problems use RPO on the forward
26611         graph.  Adjust.
26612         (loop_inverted_post_order_compute): Adjust API.
26613         (df_analyze_loop): Adjust.
26614         (df_get_n_blocks): Likewise.
26615         (df_get_postorder): Likewise.
26616
26617 2023-04-21  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
26618
26619         PR target/108270
26620         * config/riscv/riscv-vsetvl.cc
26621         (vector_infos_manager::all_empty_predecessor_p): New function.
26622         (pass_vsetvl::backward_demand_fusion): Ditto.
26623         * config/riscv/riscv-vsetvl.h: Ditto.
26624
26625 2023-04-21  Robin Dapp  <rdapp@ventanamicro.com>
26626
26627         PR target/109582
26628         * config/riscv/generic.md: Change standard names to insn names.
26629
26630 2023-04-21  Richard Biener  <rguenther@suse.de>
26631
26632         * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
26633         (compute_laterin): Use RPO.
26634         (compute_available): Likewise.
26635
26636 2023-04-21  Peng Fan  <fanpeng@loongson.cn>
26637
26638         * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
26639
26640 2023-04-21  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
26641
26642         PR target/109547
26643         * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
26644         (vector_insn_info::skip_avl_compatible_p): Ditto.
26645         (vector_insn_info::merge): Remove default value.
26646         (pass_vsetvl::compute_local_backward_infos): Ditto.
26647         (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
26648         * config/riscv/riscv-vsetvl.h: Ditto.
26649
26650 2023-04-20  Alejandro Colomar  <alx.manpages@gmail.com>
26651
26652         * doc/extend.texi (Common Function Attributes): Remove duplicate
26653         word.
26654
26655 2023-04-20  Andrew MacLeod  <amacleod@redhat.com>
26656
26657         PR tree-optimization/109564
26658         * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
26659         UNDEFINED range names when deciding if all PHI arguments are the same,
26660
26661 2023-04-20  Jakub Jelinek  <jakub@redhat.com>
26662
26663         PR tree-optimization/109011
26664         * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
26665         .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
26666         .CTZ (X) = PREC - .POPCOUNT (X | -X).
26667
26668 2023-04-20  Vladimir N. Makarov  <vmakarov@redhat.com>
26669
26670         * lra-constraints.cc (match_reload): Exclude some hard regs for
26671         multi-reg inout reload pseudos used in asm in different mode.
26672
26673 2023-04-20  Uros Bizjak  <ubizjak@gmail.com>
26674
26675         * config/arm/arm.cc (thumb1_legitimate_address_p):
26676         Use VIRTUAL_REGISTER_P predicate.
26677         (arm_eliminable_register): Ditto.
26678         * config/avr/avr.md (push<mode>_1): Ditto.
26679         * config/bfin/predicates.md (register_no_elim_operand): Ditto.
26680         * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
26681         * config/i386/predicates.md (register_no_elim_operand): Ditto.
26682         * config/iq2000/predicates.md (call_insn_operand): Ditto.
26683         * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
26684
26685 2023-04-20  Uros Bizjak  <ubizjak@gmail.com>
26686
26687         PR target/78952
26688         * config/i386/predicates.md (extract_operator): New predicate.
26689         * config/i386/i386.md (any_extract): Remove code iterator.
26690         (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
26691         (*cmpqi_ext<mode>_1): Ditto.
26692         (*cmpqi_ext<mode>_2): Ditto.
26693         (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
26694         (*cmpqi_ext<mode>_3): Ditto.
26695         (*cmpqi_ext<mode>_4): Ditto.
26696         (*extzvqi_mem_rex64): Ditto.
26697         (*extzvqi): Ditto.
26698         (*insvqi_2): Ditto.
26699         (*extendqi<SWI24:mode>_ext_1): Ditto.
26700         (*addqi_ext<mode>_0): Ditto.
26701         (*addqi_ext<mode>_1): Ditto.
26702         (*addqi_ext<mode>_2): Ditto.
26703         (*subqi_ext<mode>_0): Ditto.
26704         (*subqi_ext<mode>_2): Ditto.
26705         (*testqi_ext<mode>_1): Ditto.
26706         (*testqi_ext<mode>_2): Ditto.
26707         (*andqi_ext<mode>_0): Ditto.
26708         (*andqi_ext<mode>_1): Ditto.
26709         (*andqi_ext<mode>_1_cc): Ditto.
26710         (*andqi_ext<mode>_2): Ditto.
26711         (*<any_or:code>qi_ext<mode>_0): Ditto.
26712         (*<any_or:code>qi_ext<mode>_1): Ditto.
26713         (*<any_or:code>qi_ext<mode>_2): Ditto.
26714         (*xorqi_ext<mode>_1_cc): Ditto.
26715         (*negqi_ext<mode>_2): Ditto.
26716         (*ashlqi_ext<mode>_2): Ditto.
26717         (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
26718
26719 2023-04-20  Raphael Zinsly  <rzinsly@ventanamicro.com>
26720
26721         PR target/108248
26722         * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
26723         <bitmanip_insn> as the type to allow for fine grained control of
26724         scheduling these insns.
26725         * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
26726         min, max.
26727         * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
26728         pcnt, signed and unsigned min/max.
26729
26730 2023-04-20  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
26731             kito-cheng  <kito.cheng@sifive.com>
26732
26733         * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
26734
26735 2023-04-20  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
26736             kito-cheng  <kito.cheng@sifive.com>
26737
26738         PR target/109535
26739         * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
26740         (pass_vsetvl::cleanup_insns): Fix bug.
26741
26742 2023-04-20  Andrew Stubbs  <ams@codesourcery.com>
26743
26744         * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
26745         (ldexp<mode>3): Delete.
26746         (ldexp<mode>3<exec>): Change "B" to "A".
26747
26748 2023-04-20  Jakub Jelinek  <jakub@redhat.com>
26749             Jonathan Wakely  <jwakely@redhat.com>
26750
26751         * tree.h (built_in_function_equal_p): New helper function.
26752         (fndecl_built_in_p): Turn into variadic template to support
26753         1 or more built_in_function arguments.
26754         * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
26755         * gimplify.cc (goa_stabilize_expr): Likewise.
26756         * cgraphclones.cc (cgraph_node::create_clone): Likewise.
26757         * ipa-fnsummary.cc (compute_fn_summary): Likewise.
26758         * omp-low.cc (setjmp_or_longjmp_p): Likewise.
26759         * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
26760         cgraph_update_edges_for_call_stmt_node,
26761         cgraph_edge::verify_corresponds_to_fndecl,
26762         cgraph_node::verify_node): Likewise.
26763         * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
26764         * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
26765         * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
26766
26767 2023-04-20  Jakub Jelinek  <jakub@redhat.com>
26768
26769         PR tree-optimization/109011
26770         * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
26771         (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
26772         call later.  Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
26773         direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
26774         for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
26775         case.
26776         (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
26777
26778 2023-04-20  Richard Biener  <rguenther@suse.de>
26779
26780         * df-core.cc (rest_of_handle_df_initialize): Remove
26781         computation of df->postorder, df->postorder_inverted and
26782         df->n_blocks.
26783
26784 2023-04-20  Haochen Jiang  <haochen.jiang@intel.com>
26785
26786         * common/config/i386/i386-common.cc
26787         (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
26788         (ix86_handle_option): Set AVX flag for VAES.
26789         * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
26790         Add OPTION_MASK_ISA2_VAES_UNSET.
26791         (def_builtin): Share builtin between AES and VAES.
26792         * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
26793         Ditto.
26794         * config/i386/i386.md (aes): New isa attribute.
26795         * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
26796         (aesenclast): Ditto.
26797         (aesdec): Ditto.
26798         (aesdeclast): Ditto.
26799         * config/i386/vaesintrin.h: Remove redundant avx target push.
26800         * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
26801         (_mm_aesdeclast_si128): Ditto.
26802         (_mm_aesenc_si128): Ditto.
26803         (_mm_aesenclast_si128): Ditto.
26804
26805 2023-04-20  Hu, Lin1  <lin1.hu@intel.com>
26806
26807         * config/i386/avx2intrin.h
26808         (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
26809         (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
26810         (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
26811         (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
26812         (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
26813         (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
26814         (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
26815         (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
26816         (_mm_reduce_add_epi16): New instrinsics.
26817         (_mm_reduce_mul_epi16): Ditto.
26818         (_mm_reduce_and_epi16): Ditto.
26819         (_mm_reduce_or_epi16): Ditto.
26820         (_mm_reduce_max_epi16): Ditto.
26821         (_mm_reduce_max_epu16): Ditto.
26822         (_mm_reduce_min_epi16): Ditto.
26823         (_mm_reduce_min_epu16): Ditto.
26824         (_mm256_reduce_add_epi16): Ditto.
26825         (_mm256_reduce_mul_epi16): Ditto.
26826         (_mm256_reduce_and_epi16): Ditto.
26827         (_mm256_reduce_or_epi16): Ditto.
26828         (_mm256_reduce_max_epi16): Ditto.
26829         (_mm256_reduce_max_epu16): Ditto.
26830         (_mm256_reduce_min_epi16): Ditto.
26831         (_mm256_reduce_min_epu16): Ditto.
26832         (_mm_reduce_add_epi8): Ditto.
26833         (_mm_reduce_mul_epi8): Ditto.
26834         (_mm_reduce_and_epi8): Ditto.
26835         (_mm_reduce_or_epi8): Ditto.
26836         (_mm_reduce_max_epi8): Ditto.
26837         (_mm_reduce_max_epu8): Ditto.
26838         (_mm_reduce_min_epi8): Ditto.
26839         (_mm_reduce_min_epu8): Ditto.
26840         (_mm256_reduce_add_epi8): Ditto.
26841         (_mm256_reduce_mul_epi8): Ditto.
26842         (_mm256_reduce_and_epi8): Ditto.
26843         (_mm256_reduce_or_epi8): Ditto.
26844         (_mm256_reduce_max_epi8): Ditto.
26845         (_mm256_reduce_max_epu8): Ditto.
26846         (_mm256_reduce_min_epi8): Ditto.
26847         (_mm256_reduce_min_epu8): Ditto.
26848         * config/i386/avx512vlbwintrin.h:
26849         (_mm_mask_reduce_add_epi16): Ditto.
26850         (_mm_mask_reduce_mul_epi16): Ditto.
26851         (_mm_mask_reduce_and_epi16): Ditto.
26852         (_mm_mask_reduce_or_epi16): Ditto.
26853         (_mm_mask_reduce_max_epi16): Ditto.
26854         (_mm_mask_reduce_max_epu16): Ditto.
26855         (_mm_mask_reduce_min_epi16): Ditto.
26856         (_mm_mask_reduce_min_epu16): Ditto.
26857         (_mm256_mask_reduce_add_epi16): Ditto.
26858         (_mm256_mask_reduce_mul_epi16): Ditto.
26859         (_mm256_mask_reduce_and_epi16): Ditto.
26860         (_mm256_mask_reduce_or_epi16): Ditto.
26861         (_mm256_mask_reduce_max_epi16): Ditto.
26862         (_mm256_mask_reduce_max_epu16): Ditto.
26863         (_mm256_mask_reduce_min_epi16): Ditto.
26864         (_mm256_mask_reduce_min_epu16): Ditto.
26865         (_mm_mask_reduce_add_epi8): Ditto.
26866         (_mm_mask_reduce_mul_epi8): Ditto.
26867         (_mm_mask_reduce_and_epi8): Ditto.
26868         (_mm_mask_reduce_or_epi8): Ditto.
26869         (_mm_mask_reduce_max_epi8): Ditto.
26870         (_mm_mask_reduce_max_epu8): Ditto.
26871         (_mm_mask_reduce_min_epi8): Ditto.
26872         (_mm_mask_reduce_min_epu8): Ditto.
26873         (_mm256_mask_reduce_add_epi8): Ditto.
26874         (_mm256_mask_reduce_mul_epi8): Ditto.
26875         (_mm256_mask_reduce_and_epi8): Ditto.
26876         (_mm256_mask_reduce_or_epi8): Ditto.
26877         (_mm256_mask_reduce_max_epi8): Ditto.
26878         (_mm256_mask_reduce_max_epu8): Ditto.
26879         (_mm256_mask_reduce_min_epi8): Ditto.
26880         (_mm256_mask_reduce_min_epu8): Ditto.
26881
26882 2023-04-20  Haochen Jiang  <haochen.jiang@intel.com>
26883
26884         * common/config/i386/i386-common.cc
26885         (OPTION_MASK_ISA_VPCLMULQDQ_SET):
26886         Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
26887         (OPTION_MASK_ISA_AVX_UNSET):
26888         Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
26889         (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
26890         * config/i386/i386.md (vpclmulqdqvl): New.
26891         * config/i386/sse.md (pclmulqdq): Add evex encoding.
26892         * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
26893         push.
26894
26895 2023-04-20  Haochen Jiang  <haochen.jiang@intel.com>
26896
26897         * config/i386/avx512vlbwintrin.h
26898         (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
26899         (_mm_mask_blend_epi8): Ditto.
26900         (_mm256_mask_blend_epi16): Ditto.
26901         (_mm256_mask_blend_epi8): Ditto.
26902         * config/i386/avx512vlintrin.h
26903         (_mm256_mask_blend_pd): Ditto.
26904         (_mm256_mask_blend_ps): Ditto.
26905         (_mm256_mask_blend_epi64): Ditto.
26906         (_mm256_mask_blend_epi32): Ditto.
26907         (_mm_mask_blend_pd): Ditto.
26908         (_mm_mask_blend_ps): Ditto.
26909         (_mm_mask_blend_epi64): Ditto.
26910         (_mm_mask_blend_epi32): Ditto.
26911         * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
26912         (VF_AVX512HFBFVL): Move it before the first usage.
26913         (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
26914         to VF_AVX512HFBFVL.
26915
26916 2023-04-20  Haochen Jiang  <haochen.jiang@intel.com>
26917
26918         * common/config/i386/i386-common.cc
26919         (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
26920         to OPTION_MASK_ISA_AVX512BW_SET.
26921         (OPTION_MASK_ISA_AVX512F_UNSET):
26922         Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
26923         (OPTION_MASK_ISA_AVX512BW_UNSET):
26924         Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
26925         * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
26926         * config/i386/avx512vbmi2vlintrin.h: Ditto.
26927         * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
26928         * config/i386/sse.md (VI12_AVX512VLBW): Removed.
26929         (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
26930         (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
26931         VI12_AVX512VL.
26932         (compressstore<mode>_mask): Ditto.
26933         (expand<mode>_mask): Ditto.
26934         (expand<mode>_maskz): Ditto.
26935         (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
26936         VI12_VI48F_AVX512VL.
26937
26938 2023-04-20  Haochen Jiang  <haochen.jiang@intel.com>
26939
26940         * common/config/i386/i386-common.cc
26941         (OPTION_MASK_ISA_AVX512BITALG_SET):
26942         Change OPTION_MASK_ISA_AVX512F_SET
26943         to OPTION_MASK_ISA_AVX512BW_SET.
26944         (OPTION_MASK_ISA_AVX512F_UNSET):
26945         Remove OPTION_MASK_ISA_AVX512BITALG_SET.
26946         (OPTION_MASK_ISA_AVX512BW_UNSET):
26947         Add OPTION_MASK_ISA_AVX512BITALG_SET.
26948         * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
26949         * config/i386/i386-builtin.def:
26950         Remove redundant OPTION_MASK_ISA_AVX512BW.
26951         * config/i386/sse.md (VI1_AVX512VLBW): Removed.
26952         (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
26953         Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
26954
26955 2023-04-20  Haochen Jiang  <haochen.jiang@intel.com>
26956
26957         * config/i386/i386-expand.cc
26958         (ix86_check_builtin_isa_match): Correct wrong comments.
26959         Add a new macro SHARE_BUILTIN and refactor the current if
26960         clauses to macro.
26961
26962 2023-04-20  Mo, Zewei  <zewei.mo@intel.com>
26963
26964         * config/i386/cpuid.h: Open a new section for Extended Features
26965         Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
26966         %ecx == 1).
26967
26968 2023-04-20  Hu, Lin1  <lin1.hu@intel.com>
26969
26970         * config/i386/sse.md: Modify insn vperm{i,f}
26971         and vshuf{i,f}.
26972
26973 2023-04-19  Max Filippov  <jcmvbkbc@gmail.com>
26974
26975         * config/xtensa/xtensa-opts.h: New header.
26976         * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
26977         xtensa_strict_align.
26978         * config/xtensa/xtensa.cc (xtensa_option_override): When
26979         -m[no-]strict-align is not specified in the command line set
26980         xtensa_strict_align to 0 if the hardware supports both unaligned
26981         loads and stores or to 1 otherwise.
26982         * config/xtensa/xtensa.opt (mstrict-align): New option.
26983         * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
26984
26985 2023-04-19  Max Filippov  <jcmvbkbc@gmail.com>
26986
26987         * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
26988         function.
26989
26990 2023-04-19  Andrew Pinski  <apinski@marvell.com>
26991
26992         * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
26993
26994 2023-04-19  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
26995
26996         * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
26997         (VECTOR_BOOL_MODE): Ditto.
26998         (ADJUST_NUNITS): Ditto.
26999         (ADJUST_ALIGNMENT): Ditto.
27000         (ADJUST_BYTESIZE): Ditto.
27001         (ADJUST_PRECISION): Ditto.
27002         (RVV_MODES): Ditto.
27003         (VECTOR_MODE_WITH_PREFIX): Ditto.
27004         * config/riscv/riscv-v.cc (ENTRY): Ditto.
27005         (get_vlmul): Ditto.
27006         (get_ratio): Ditto.
27007         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
27008         * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
27009         (vbool64_t): Ditto.
27010         (vbool32_t): Ditto.
27011         (vbool16_t): Ditto.
27012         (vbool8_t): Ditto.
27013         (vbool4_t): Ditto.
27014         (vbool2_t): Ditto.
27015         (vbool1_t): Ditto.
27016         (vint8mf8_t): Ditto.
27017         (vuint8mf8_t): Ditto.
27018         (vint8mf4_t): Ditto.
27019         (vuint8mf4_t): Ditto.
27020         (vint8mf2_t): Ditto.
27021         (vuint8mf2_t): Ditto.
27022         (vint8m1_t): Ditto.
27023         (vuint8m1_t): Ditto.
27024         (vint8m2_t): Ditto.
27025         (vuint8m2_t): Ditto.
27026         (vint8m4_t): Ditto.
27027         (vuint8m4_t): Ditto.
27028         (vint8m8_t): Ditto.
27029         (vuint8m8_t): Ditto.
27030         (vint16mf4_t): Ditto.
27031         (vuint16mf4_t): Ditto.
27032         (vint16mf2_t): Ditto.
27033         (vuint16mf2_t): Ditto.
27034         (vint16m1_t): Ditto.
27035         (vuint16m1_t): Ditto.
27036         (vint16m2_t): Ditto.
27037         (vuint16m2_t): Ditto.
27038         (vint16m4_t): Ditto.
27039         (vuint16m4_t): Ditto.
27040         (vint16m8_t): Ditto.
27041         (vuint16m8_t): Ditto.
27042         (vint32mf2_t): Ditto.
27043         (vuint32mf2_t): Ditto.
27044         (vint32m1_t): Ditto.
27045         (vuint32m1_t): Ditto.
27046         (vint32m2_t): Ditto.
27047         (vuint32m2_t): Ditto.
27048         (vint32m4_t): Ditto.
27049         (vuint32m4_t): Ditto.
27050         (vint32m8_t): Ditto.
27051         (vuint32m8_t): Ditto.
27052         (vint64m1_t): Ditto.
27053         (vuint64m1_t): Ditto.
27054         (vint64m2_t): Ditto.
27055         (vuint64m2_t): Ditto.
27056         (vint64m4_t): Ditto.
27057         (vuint64m4_t): Ditto.
27058         (vint64m8_t): Ditto.
27059         (vuint64m8_t): Ditto.
27060         (vfloat32mf2_t): Ditto.
27061         (vfloat32m1_t): Ditto.
27062         (vfloat32m2_t): Ditto.
27063         (vfloat32m4_t): Ditto.
27064         (vfloat32m8_t): Ditto.
27065         (vfloat64m1_t): Ditto.
27066         (vfloat64m2_t): Ditto.
27067         (vfloat64m4_t): Ditto.
27068         (vfloat64m8_t): Ditto.
27069         * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
27070         * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
27071         (riscv_convert_vector_bits): Ditto.
27072         * config/riscv/riscv.md:
27073         * config/riscv/vector-iterators.md:
27074         * config/riscv/vector.md
27075         (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
27076         (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
27077         (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
27078         (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
27079         (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
27080         (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
27081         (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
27082         (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
27083         (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
27084
27085 2023-04-19  Pan Li  <pan2.li@intel.com>
27086
27087         * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
27088         Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
27089
27090 2023-04-19  Uros Bizjak  <ubizjak@gmail.com>
27091
27092         PR target/78904
27093         PR target/78952
27094         * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
27095         (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
27096         for operand 0. Use any_extract code iterator.
27097         (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
27098         (*cmpqi_ext<mode>_2): Use any_extract code iterator.
27099         (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
27100         (*cmpqi_ext<mode>_1): Use general_operand predicate
27101         for operand 1. Use any_extract code iterator.
27102         (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
27103         (*cmpqi_ext<mode>_4): Use any_extract code iterator.
27104
27105 2023-04-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
27106
27107         * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
27108         (aarch64_uaddw2<mode>): Delete.
27109         (aarch64_ssubw2<mode>): Delete.
27110         (aarch64_usubw2<mode>): Delete.
27111         (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
27112
27113 2023-04-19  Richard Biener  <rguenther@suse.de>
27114
27115         * tree-ssa-structalias.cc (do_ds_constraint): Use
27116         solve_add_graph_edge.
27117
27118 2023-04-19  Richard Biener  <rguenther@suse.de>
27119
27120         * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
27121         split out from ...
27122         (do_sd_constraint): ... here.
27123
27124 2023-04-19  Richard Biener  <rguenther@suse.de>
27125
27126         * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
27127         rejecting the merge when A contains only a non-local label.
27128
27129 2023-04-19  Uros Bizjak  <ubizjak@gmail.com>
27130
27131         * rtl.h (VIRTUAL_REGISTER_P): New predicate.
27132         (VIRTUAL_REGISTER_NUM_P): Ditto.
27133         (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
27134         * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
27135         * function.cc (instantiate_decl_rtl): Ditto.
27136         * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
27137         (nonzero_address_p): Ditto.
27138         (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
27139
27140 2023-04-19  Aldy Hernandez  <aldyh@redhat.com>
27141
27142         * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
27143
27144 2023-04-19  Richard Biener  <rguenther@suse.de>
27145
27146         * system.h (auto_mpz::operator->()): New.
27147         * realmpfr.h (auto_mpfr::operator->()): New.
27148         * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
27149         * real.cc (real_from_string): Likewise.
27150         (dconst_e_ptr): Likewise.
27151         (dconst_sqrt2_ptr): Likewise.
27152         * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
27153         Use auto_mpz.
27154         (bound_difference_of_offsetted_base): Likewise.
27155         (number_of_iterations_ne): Likewise.
27156         (number_of_iterations_lt_to_ne): Likewise.
27157         * ubsan.cc: Include realmpfr.h.
27158         (ubsan_instrument_float_cast): Use auto_mpfr.
27159
27160 2023-04-19  Richard Biener  <rguenther@suse.de>
27161
27162         * tree-ssa-structalias.cc (solve_graph): Remove self-copy
27163         edges, remove edges from escaped after special-casing them.
27164
27165 2023-04-19  Richard Biener  <rguenther@suse.de>
27166
27167         * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
27168         special casing.
27169
27170 2023-04-19  Richard Biener  <rguenther@suse.de>
27171
27172         * tree-ssa-structalias.cc (do_sd_constraint): Do not write
27173         to the LHS varinfo solution member.
27174
27175 2023-04-19  Richard Biener  <rguenther@suse.de>
27176
27177         * tree-ssa-structalias.cc (topo_visit): Look at the real
27178         destination of edges.
27179
27180 2023-04-19  Richard Biener  <rguenther@suse.de>
27181
27182         PR tree-optimization/44794
27183         * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
27184         If an epilogue loop is required set its iteration upper bound.
27185
27186 2023-04-19  Xi Ruoyao  <xry111@xry111.site>
27187
27188         PR target/109465
27189         * config/loongarch/loongarch-protos.h
27190         (loongarch_expand_block_move): Add a parameter as alignment RTX.
27191         * config/loongarch/loongarch.h:
27192         (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
27193         (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
27194         (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
27195         (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
27196         (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
27197         LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
27198         * config/loongarch/loongarch.cc (loongarch_expand_block_move):
27199         Take the alignment from the parameter, but set it to
27200         UNITS_PER_WORD if !TARGET_STRICT_ALIGN.  Limit the length of
27201         straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
27202         instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
27203         (loongarch_block_move_straight): When there are left-over bytes,
27204         half the mode size instead of falling back to byte mode at once.
27205         (loongarch_block_move_loop): Limit the length of loop body with
27206         LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
27207         LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
27208         * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
27209         to loongarch_expand_block_move.
27210
27211 2023-04-19  Xi Ruoyao  <xry111@xry111.site>
27212
27213         * config/loongarch/loongarch.cc
27214         (loongarch_setup_incoming_varargs): Don't save more GARs than
27215         cfun->va_list_gpr_size / UNITS_PER_WORD.
27216
27217 2023-04-19  Richard Biener  <rguenther@suse.de>
27218
27219         * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
27220         no epilogue condition.
27221
27222 2023-04-19  Richard Biener  <rguenther@suse.de>
27223
27224         * gimple.h (gimple_assign_load): Outline...
27225         * gimple.cc (gimple_assign_load): ... here.  Avoid
27226         get_base_address and instead just strip the outermost
27227         handled component, treating a remaining handled component
27228         as load.
27229
27230 2023-04-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
27231
27232         * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
27233         definition.
27234         * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
27235
27236 2023-04-19  Jakub Jelinek  <jakub@redhat.com>
27237
27238         PR tree-optimization/109011
27239         * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
27240         (vect_recog_popcount_clz_ctz_ffs_pattern): ... this.  Handle also
27241         CLZ, CTZ and FFS.  Remove vargs variable, use
27242         gimple_build_call_internal rather than gimple_build_call_internal_vec.
27243         (vect_vect_recog_func_ptrs): Adjust popcount entry.
27244
27245 2023-04-19  Jakub Jelinek  <jakub@redhat.com>
27246
27247         PR target/109040
27248         * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
27249         REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
27250         a new REG rather than the SUBREG.
27251
27252 2023-04-19  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
27253
27254         * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
27255         New pattern.
27256
27257 2023-04-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
27258
27259         PR target/108840
27260         * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
27261         ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases.  Handle subregs in op1.
27262
27263 2023-04-19  Richard Biener  <rguenther@suse.de>
27264
27265         PR rtl-optimization/109237
27266         * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
27267         TREE_VISITED on INSN_VAR_LOCATION_DECL.
27268         (delete_trivially_dead_insns): Maintain TREE_VISITED on
27269         active debug bind INSN_VAR_LOCATION_DECL.
27270
27271 2023-04-19  Richard Biener  <rguenther@suse.de>
27272
27273         PR rtl-optimization/109237
27274         * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
27275
27276 2023-04-19  Christophe Lyon  <christophe.lyon@arm.com>
27277
27278         * doc/install.texi (enable-decimal-float): Add AArch64.
27279
27280 2023-04-19  liuhongt  <hongtao.liu@intel.com>
27281
27282         PR rtl-optimization/109351
27283         * ira.cc (setup_class_subset_and_memory_move_costs): Check
27284         hard_regno_mode_ok before setting lowest memory move cost for
27285         the mode with different reg classes.
27286
27287 2023-04-18  Jason Merrill  <jason@redhat.com>
27288
27289         * doc/invoke.texi: Remove stray @gol.
27290
27291 2023-04-18  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
27292
27293         * ifcvt.cc (cond_move_process_if_block): Consider the result of
27294         targetm.noce_conversion_profitable_p() when replacing the original
27295         sequence with the converted one.
27296
27297 2023-04-18  Mark Harmstone  <mark@harmstone.com>
27298
27299         * common.opt (gcodeview): Add new option.
27300         * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
27301         * opts.cc (command_handle_option): Similarly.
27302         * doc/invoke.texi: Add documentation for -gcodeview.
27303
27304 2023-04-18  Andrew Pinski  <apinski@marvell.com>
27305
27306         * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
27307         (make_pass_phiopt): Make execute out of line.
27308         (tree_ssa_cs_elim): Move code into ...
27309         (pass_cselim::execute): here.
27310
27311 2023-04-18  Sam James  <sam@gentoo.org>
27312
27313         * system.h: Drop unused INCLUDE_PTHREAD_H.
27314
27315 2023-04-18  Kevin Lee  <kevinl@rivosinc.com>
27316
27317         * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
27318         condition.
27319
27320 2023-04-18  Sinan Lin  <sinan.lin@linux.alibaba.com>
27321
27322         * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
27323         (bswapdi2, bswapsi2): Similarly.
27324
27325 2023-04-18  Uros Bizjak  <ubizjak@gmail.com>
27326
27327         PR target/94908
27328         * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
27329         Use CODE_FOR_sse4_1_insertps_v4sf.
27330         * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
27331         (expand_vec_perm_1): Call expand_vec_per_insertps.
27332         * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
27333         * config/i386/mmx.md (mmxscalarmode): New mode attribute.
27334         (@sse4_1_insertps_<mode>): New insn pattern.
27335         * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
27336         pattern from sse4_1_insertps using VI4F_128 mode iterator.
27337
27338 2023-04-18  Aldy Hernandez  <aldyh@redhat.com>
27339
27340         * value-range.cc (gt_ggc_mx): New.
27341         (gt_pch_nx): New.
27342         * value-range.h (class vrange): Add GTY marker.
27343         (class frange): Same.
27344         (gt_ggc_mx): Remove.
27345         (gt_pch_nx): Remove.
27346
27347 2023-04-18  Victor L. Do Nascimento  <victor.donascimento@arm.com>
27348
27349         * lra-constraints.cc (constraint_unique): New.
27350         (process_address_1): Apply constraint_unique test.
27351         * recog.cc (constrain_operands): Allow relaxed memory
27352         constaints.
27353
27354 2023-04-18  Kito Cheng  <kito.cheng@sifive.com>
27355
27356         * doc/extend.texi (Target Builtins): Add RISC-V Vector
27357         Intrinsics.
27358         (RISC-V Vector Intrinsics): Document GCC implemented which
27359         version of RISC-V vector intrinsics and its reference.
27360
27361 2023-04-18  Richard Biener  <rguenther@suse.de>
27362
27363         PR middle-end/108786
27364         * bitmap.h (bitmap_clear_first_set_bit): New.
27365         * bitmap.cc (bitmap_first_set_bit_worker): Rename from
27366         bitmap_first_set_bit and add optional clearing of the bit.
27367         (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
27368         (bitmap_clear_first_set_bit): Likewise.
27369         * df-core.cc (df_worklist_dataflow_doublequeue): Use
27370         bitmap_clear_first_set_bit.
27371         * graphite-scop-detection.cc (scop_detection::merge_sese):
27372         Likewise.
27373         * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
27374         (sanitize_asan_mark_poison): Likewise.
27375         * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
27376         * tree-into-ssa.cc (rewrite_blocks): Likewise.
27377         * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
27378         * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
27379
27380 2023-04-18  Richard Biener  <rguenther@suse.de>
27381
27382         * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
27383         (dump_sa_points_to_info): ... this function.
27384         (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
27385         and call dump_sa_stats guarded with TDF_STATS.
27386         (ipa_pta_execute): Likewise.
27387         (compute_may_aliases): Guard dump_alias_info with
27388         TDF_DETAILS|TDF_ALIAS.
27389
27390 2023-04-18  Andrew Pinski  <apinski@marvell.com>
27391
27392         * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
27393         the expression that is being tried when TDF_FOLDING
27394         is true.
27395         (phiopt_worker::match_simplify_replacement): Dump
27396         the sequence which was created by gimple_simplify_phiopt
27397         when TDF_FOLDING is true.
27398
27399 2023-04-18  Andrew Pinski  <apinski@marvell.com>
27400
27401         * tree-ssa-phiopt.cc (match_simplify_replacement):
27402         Simplify code that does the movement slightly.
27403
27404 2023-04-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
27405
27406         * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
27407         define_expand.
27408         (rev16<mode>2): Rename to...
27409         (aarch64_rev16<mode>2_alt1): ... This.
27410         (rev16<mode>2_alt): Rename to...
27411         (*aarch64_rev16<mode>2_alt2): ... This.
27412
27413 2023-04-18  Aldy Hernandez  <aldyh@redhat.com>
27414
27415         * emit-rtl.cc (init_emit_once): Initialize dconstm0.
27416         * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
27417         declaration.
27418         * range-op-float.cc (zero_range): Use dconstm0.
27419         (zero_to_inf_range): Same.
27420         * real.h (dconstm0): New.
27421         * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
27422         (frange::set_zero): Do not declare dconstm0.
27423
27424 2023-04-18  Richard Biener  <rguenther@suse.de>
27425
27426         * system.h (class auto_mpz): New,
27427         * realmpfr.h (class auto_mpfr): Likewise.
27428         * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
27429         (do_mpfr_arg2): Likewise.
27430         * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
27431
27432 2023-04-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
27433
27434         * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
27435         builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
27436
27437 2023-04-18  Aldy Hernandez  <aldyh@redhat.com>
27438
27439         * value-range.cc (frange::operator==): Adjust for NAN.
27440         (range_tests_nan): Remove some NAN tests.
27441
27442 2023-04-18  Aldy Hernandez  <aldyh@redhat.com>
27443
27444         * inchash.cc (hash::add_real_value): New.
27445         * inchash.h (class hash): Add add_real_value.
27446         * value-range.cc (add_vrange): New.
27447         * value-range.h (inchash::add_vrange): New.
27448
27449 2023-04-18  Richard Biener  <rguenther@suse.de>
27450
27451         PR tree-optimization/109539
27452         * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
27453         Re-implement pointer relatedness for PHIs.
27454
27455 2023-04-18  Andrew Stubbs  <ams@codesourcery.com>
27456
27457         * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
27458         (SV_FP): New iterator.
27459         (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
27460         (recip<mode>2): Unify the two patterns using SV_FP.
27461         (div_scale<mode><exec_vcc>): New insn.
27462         (div_fmas<mode><exec>): New insn.
27463         (div_fixup<mode><exec>): New insn.
27464         (div<mode>3): Unify the two expanders and rewrite using hardfp.
27465         * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
27466         * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
27467         and UNSPEC_DIV_FIXUP.
27468         (vccwait): New attribute.
27469
27470 2023-04-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
27471
27472         * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
27473         if the argument matches that.
27474
27475 2023-04-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
27476
27477         * config/aarch64/atomics.md
27478         (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
27479         Use SD_HSDI for destination mode iterator.
27480
27481 2023-04-18  Jin Ma  <jinma@linux.alibaba.com>
27482
27483         * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
27484         of z-extensions and s-extensions.
27485         (riscv_subset_list::parse): Likewise.
27486
27487 2023-04-18  Jakub Jelinek  <jakub@redhat.com>
27488
27489         PR tree-optimization/109240
27490         * match.pd (fneg/fadd): Rewrite such that it handles both plus as
27491         first vec_perm operand and minus as second using fneg/fadd and
27492         minus as first vec_perm operand and plus as second using fneg/fsub.
27493
27494 2023-04-18  Aldy Hernandez  <aldyh@redhat.com>
27495
27496         * data-streamer.cc (bp_pack_real_value): New.
27497         (bp_unpack_real_value): New.
27498         * data-streamer.h (bp_pack_real_value):  New.
27499         (bp_unpack_real_value): New.
27500         * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
27501         bp_unpack_real_value.
27502         * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
27503         bp_pack_real_value.
27504
27505 2023-04-18  Aldy Hernandez  <aldyh@redhat.com>
27506
27507         * wide-int.h (WIDE_INT_MAX_HWIS): New.
27508         (class fixed_wide_int_storage): Use it.
27509         (trailing_wide_ints <N>::set_precision): Use it.
27510         (trailing_wide_ints <N>::extra_size): Use it.
27511
27512 2023-04-18  Xi Ruoyao  <xry111@xry111.site>
27513
27514         * config/loongarch/loongarch-protos.h
27515         (loongarch_addu16i_imm12_operand_p): New function prototype.
27516         (loongarch_split_plus_constant): Likewise.
27517         * config/loongarch/loongarch.cc
27518         (loongarch_addu16i_imm12_operand_p): New function.
27519         (loongarch_split_plus_constant): Likewise.
27520         * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
27521         (DUAL_IMM12_OPERAND): Likewise.
27522         (DUAL_ADDU16I_OPERAND): Likewise.
27523         * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
27524         constraint.
27525         * config/loongarch/predicates.md (const_dual_imm12_operand): New
27526         predicate.
27527         (const_addu16i_operand): Likewise.
27528         (const_addu16i_imm12_di_operand): Likewise.
27529         (const_addu16i_imm12_si_operand): Likewise.
27530         (plus_di_operand): Likewise.
27531         (plus_si_operand): Likewise.
27532         (plus_si_extend_operand): Likewise.
27533         * config/loongarch/loongarch.md (add<mode>3): Convert to
27534         define_insn_and_split.  Use plus_<mode>_operand predicate
27535         instead of arith_operand.  Add alternatives for La, Lb, Lc, Ld,
27536         and Le constraints.
27537         (*addsi3_extended): Convert to define_insn_and_split.  Use
27538         plus_si_extend_operand instead of arith_operand.  Add
27539         alternatives for La and Le alternatives.
27540
27541 2023-04-18  Aldy Hernandez  <aldyh@redhat.com>
27542
27543         * value-range.h (Value_Range::Value_Range): New.
27544         (Value_Range::contains_p): New.
27545
27546 2023-04-18  Aldy Hernandez  <aldyh@redhat.com>
27547
27548         * value-range.h (class vrange): Make m_discriminator const.
27549         (class irange): Make m_max_ranges const.  Adjust constructors
27550         accordingly.
27551         (class unsupported_range): Construct vrange appropriately.
27552         (class frange): Same.
27553
27554 2023-04-18  Lulu Cheng  <chenglulu@loongson.cn>
27555
27556         * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
27557         definition.
27558
27559 2023-04-18  Lulu Cheng  <chenglulu@loongson.cn>
27560
27561         * doc/extend.texi: Add section for LoongArch Base Built-in functions.
27562
27563 2023-04-18  Fei Gao  <gaofei@eswincomputing.com>
27564
27565         * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
27566         readable.
27567         (riscv_expand_epilogue): Likewise.
27568
27569 2023-04-17  Fei Gao  <gaofei@eswincomputing.com>
27570
27571         * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
27572         stack allocation.
27573         (riscv_expand_epilogue): Consider save-restore in stack deallocation.
27574
27575 2023-04-17  Andrew Pinski  <apinski@marvell.com>
27576
27577         * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
27578         prototype.
27579
27580 2023-04-17  Aldy Hernandez  <aldyh@redhat.com>
27581
27582         * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
27583         global ranges.
27584
27585 2023-04-17  Fei Gao  <gaofei@eswincomputing.com>
27586
27587         * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
27588         parameter remaining_size.
27589         (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
27590         (riscv_expand_prologue): Likewise.
27591         (riscv_expand_epilogue): Likewise.
27592
27593 2023-04-17  Feng Wang  <wangfeng@eswincomputing.com>
27594
27595         * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
27596         roriw for constant counts.
27597         * rtl.h (reverse_rotate_by_imm_p): Add function declartion
27598         * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
27599         (simplify_context::simplify_binary_operation_1): Use it.
27600         * expmed.cc (expand_shift_1): Likewise.
27601
27602 2023-04-17  Martin Jambor  <mjambor@suse.cz>
27603
27604         PR ipa/107769
27605         PR ipa/109318
27606         * cgraph.h (symtab_node::find_reference): Add parameter use_type.
27607         * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
27608         (ipa_zap_jf_refdesc): New function.
27609         (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
27610         (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
27611         * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
27612         the new parameter of find_reference.
27613         (adjust_references_in_caller): Likewise. Make sure the constant jump
27614         function is not used to decrement a refdec counter again.  Only
27615         decrement refdesc counters when the pass_through jump function allows
27616         it.  Added a detailed dump when decrementing refdesc counters.
27617         * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
27618         (ipa_set_jf_simple_pass_through): Initialize the new flag.
27619         (ipa_set_jf_unary_pass_through): Likewise.
27620         (ipa_set_jf_arith_pass_through): Likewise.
27621         (remove_described_reference): Provide a value for the new parameter of
27622         find_reference.
27623         (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
27624         the previous pass_through had a flag mandating that we do so.
27625         (propagate_controlled_uses): Likewise.  Only decrement refdesc
27626         counters when the pass_through jump function allows it.
27627         (ipa_edge_args_sum_t::duplicate): Provide a value for the new
27628         parameter of find_reference.
27629         (ipa_write_jump_function): Assert the new flag does not have to be
27630         streamed.
27631         * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
27632         it in searching.
27633
27634 2023-04-17  Philipp Tomsich  <philipp.tomsich@vrull.eu>
27635             Di Zhao  <di.zhao@amperecomputing.com>
27636
27637         * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
27638         Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
27639         * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
27640         Check for the above tuning option when processing loads.
27641
27642 2023-04-17  Richard Biener  <rguenther@suse.de>
27643
27644         PR tree-optimization/109524
27645         * tree-vrp.cc (remove_unreachable::m_list): Change to a
27646         vector of pairs of block indices.
27647         (remove_unreachable::maybe_register_block): Adjust.
27648         (remove_unreachable::remove_and_update_globals): Likewise.
27649         Deal with removed blocks.
27650
27651 2023-04-16  Jeff Law  <jlaw@ventanamicro>
27652
27653         PR target/109508
27654         * config/riscv/riscv.cc (riscv_expand_conditional_move): For
27655         TARGET_SFB_ALU, force the true arm into a register.
27656
27657 2023-04-15  John David Anglin  <danglin@gcc.gnu.org>
27658
27659         PR target/104989
27660         * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
27661         * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
27662         size is zero.
27663         (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
27664         (pa_function_arg_size): Change return type to int.  Return zero
27665         for arguments larger than 1 GB.  Update comments.
27666
27667 2023-04-15  Jakub Jelinek  <jakub@redhat.com>
27668
27669         PR tree-optimization/109154
27670         * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
27671         args_len - 1 COND_EXPRs rather than args_len.  Formatting fix.
27672
27673 2023-04-15  Jason Merrill  <jason@redhat.com>
27674
27675         PR c++/109514
27676         * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
27677         Overhaul lhs_ref.ref analysis.
27678
27679 2023-04-14  Richard Biener  <rguenther@suse.de>
27680
27681         PR tree-optimization/109502
27682         * tree-vect-stmts.cc (vectorizable_assignment): Fix
27683         check for conversion between mask and non-mask types.
27684
27685 2023-04-14  Jeff Law  <jlaw@ventanamicro.com>
27686             Jakub Jelinek  <jakub@redhat.com>
27687
27688         PR target/108947
27689         PR target/109040
27690         * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
27691         word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
27692         smaller than word_mode.
27693         * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
27694         <case AND>: Likewise.
27695
27696 2023-04-14  Jakub Jelinek  <jakub@redhat.com>
27697
27698         * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
27699         of GEN_INT.
27700
27701 2023-04-13  Andrew MacLeod  <amacleod@redhat.com>
27702
27703         PR tree-optimization/108139
27704         PR tree-optimization/109462
27705         * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
27706         equivalency check for PHI nodes.
27707         * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
27708         does not dominate single-arg equivalency edges.
27709
27710 2023-04-13  Richard Sandiford  <richard.sandiford@arm.com>
27711
27712         PR target/108910
27713         * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
27714         not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
27715
27716 2023-04-13  Richard Biener  <rguenther@suse.de>
27717
27718         PR tree-optimization/109491
27719         * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
27720         NULL operands test.
27721
27722 2023-04-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
27723
27724         PR target/109479
27725         * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
27726         (vint16mf4_t): Ditto.
27727         (vint32mf2_t): Ditto.
27728         (vint64m1_t): Ditto.
27729         (vint64m2_t): Ditto.
27730         (vint64m4_t): Ditto.
27731         (vint64m8_t): Ditto.
27732         (vuint8mf8_t): Ditto.
27733         (vuint16mf4_t): Ditto.
27734         (vuint32mf2_t): Ditto.
27735         (vuint64m1_t): Ditto.
27736         (vuint64m2_t): Ditto.
27737         (vuint64m4_t): Ditto.
27738         (vuint64m8_t): Ditto.
27739         (vfloat32mf2_t): Ditto.
27740         (vbool64_t): Ditto.
27741         * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
27742         (register_vector_type): Ditto.
27743         (check_required_extensions): Fix condition.
27744         * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
27745         (RVV_REQUIRE_ELEN_64): New define.
27746         (RVV_REQUIRE_MIN_VLEN_64): Ditto.
27747         * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
27748         (TARGET_VECTOR_FP64): Ditto.
27749         (ENTRY): Fix predicate.
27750         * config/riscv/vector-iterators.md: Fix predicate.
27751
27752 2023-04-12  Jakub Jelinek  <jakub@redhat.com>
27753
27754         PR tree-optimization/109410
27755         * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
27756         block if first statement of the function is a call to returns_twice
27757         function.
27758
27759 2023-04-12  Jakub Jelinek  <jakub@redhat.com>
27760
27761         PR target/109458
27762         * config/i386/i386.cc: Include rtl-error.h.
27763         (ix86_print_operand): For z modifier warning, use warning_for_asm
27764         if this_is_asm_operands.  For Z modifier errors, use %c and code
27765         instead of hardcoded Z.
27766
27767 2023-04-12  Costas Argyris  <costas.argyris@gmail.com>
27768
27769         * config/i386/x-mingw32-utf8: Remove extrataneous $@
27770
27771 2023-04-12  Andrew MacLeod  <amacleod@redhat.com>
27772
27773         PR tree-optimization/109462
27774         * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
27775         check for equivalences if NAME is a phi node.
27776
27777 2023-04-12  Richard Biener  <rguenther@suse.de>
27778
27779         PR tree-optimization/109473
27780         * tree-vect-loop.cc (vect_create_epilog_for_reduction):
27781         Convert scalar result to the computation type before performing
27782         the reduction adjustment.
27783
27784 2023-04-12  Richard Biener  <rguenther@suse.de>
27785
27786         PR tree-optimization/109469
27787         * tree-vect-slp.cc (vect_slp_function): Skip region starts with
27788         a returns-twice call.
27789
27790 2023-04-12  Richard Biener  <rguenther@suse.de>
27791
27792         PR tree-optimization/109434
27793         * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
27794         handle possibly throwing calls when processing the LHS
27795         and may-defs are not OK.
27796
27797 2023-04-11  Lin Sinan  <mynameisxiaou@gmail.com>
27798
27799         * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
27800         predicate to avoid splitting arith constants.
27801
27802 2023-04-11  Yanzhang Wang  <yanzhang.wang@intel.com>
27803             Pan Li  <pan2.li@intel.com>
27804             Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
27805             Kito Cheng  <kito.cheng@sifive.com>
27806
27807         PR target/109104
27808         * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
27809         * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
27810         (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
27811         * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
27812         (riscv_zero_call_used_regs): New.
27813         (TARGET_ZERO_CALL_USED_REGS): New.
27814
27815 2023-04-11  Martin Liska  <mliska@suse.cz>
27816
27817         PR driver/108241
27818         * opts.cc (finish_options): Drop also
27819         x_flag_var_tracking_assignments.
27820
27821 2023-04-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
27822
27823         PR tree-optimization/108888
27824         * tree-if-conv.cc (predicate_statements): Fix gimple call check.
27825
27826 2023-04-11  Haochen Gui  <guihaoc@gcc.gnu.org>
27827
27828         PR target/108812
27829         * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
27830         (vsx_sign_extend_v16qi_<mode>): ... this.
27831         (vsx_sign_extend_hi_<mode>): Rename to...
27832         (vsx_sign_extend_v8hi_<mode>): ... this.
27833         (vsx_sign_extend_si_v2di): Rename to...
27834         (vsx_sign_extend_v4si_v2di): ... this.
27835         (vsignextend_qi_<mode>): Remove.
27836         (vsignextend_hi_<mode>): Remove.
27837         (vsignextend_si_v2di): Remove.
27838         (vsignextend_v2di_v1ti): Remove.
27839         (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
27840         gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
27841         with gen_vsx_sign_extend_v16qi_v4si.
27842         * config/rs6000/rs6000.md (split for DI constant generation):
27843         Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
27844         (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
27845         with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
27846         with gen_vsx_sign_extend_v16qi_si.
27847         * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
27848         Set bif-pattern to vsx_sign_extend_v16qi_v2di.
27849         (__builtin_altivec_vsignextsb2w): Set bif-pattern to
27850         vsx_sign_extend_v16qi_v4si.
27851         (__builtin_altivec_visgnextsh2d): Set bif-pattern to
27852         vsx_sign_extend_v8hi_v2di.
27853         (__builtin_altivec_vsignextsh2w): Set bif-pattern to
27854         vsx_sign_extend_v8hi_v4si.
27855         (__builtin_altivec_vsignextsw2d): Set bif-pattern to
27856         vsx_sign_extend_si_v2di.
27857         (__builtin_altivec_vsignext): Set bif-pattern to
27858         vsx_sign_extend_v2di_v1ti.
27859         * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
27860         gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
27861         gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
27862         gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
27863
27864 2023-04-10   Michael Meissner  <meissner@linux.ibm.com>
27865
27866         PR target/70243
27867         * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
27868         (vsx_nfmsv4sf4): Do not generate vnmsubfp.
27869
27870 2023-04-10  Haochen Jiang  <haochen.jiang@intel.com>
27871
27872         * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
27873
27874 2023-04-10  Haochen Jiang  <haochen.jiang@intel.com>
27875
27876         * common/config/i386/cpuinfo.h (get_available_features):
27877         Detect AMX-COMPLEX.
27878         * common/config/i386/i386-common.cc
27879         (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
27880         OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
27881         (ix86_handle_option): Handle -mamx-complex.
27882         * common/config/i386/i386-cpuinfo.h (enum processor_features):
27883         Add FEATURE_AMX_COMPLEX.
27884         * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
27885         amx-complex.
27886         * config.gcc: Add amxcomplexintrin.h.
27887         * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
27888         * config/i386/i386-c.cc (ix86_target_macros_internal): Define
27889         __AMX_COMPLEX__.
27890         * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
27891         * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
27892         Handle amx-complex.
27893         * config/i386/i386.opt: Add option -mamx-complex.
27894         * config/i386/immintrin.h: Include amxcomplexintrin.h.
27895         * doc/extend.texi: Document amx-complex.
27896         * doc/invoke.texi: Document -mamx-complex.
27897         * doc/sourcebuild.texi: Document target amx-complex.
27898         * config/i386/amxcomplexintrin.h: New file.
27899
27900 2023-04-08  Jakub Jelinek  <jakub@redhat.com>
27901
27902         PR tree-optimization/109392
27903         * tree-vect-generic.cc (tree_vec_extract): Handle failure
27904         of maybe_push_res_to_seq better.
27905
27906 2023-04-08  Jakub Jelinek  <jakub@redhat.com>
27907
27908         * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
27909         poly-int-types.h.
27910         (SYSTEM_H): Depend on $(HASHTAB_H).
27911         * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
27912         dependency on $(RTL_BASE_H), remove redundant dependency on
27913         insn-modes.h.
27914
27915 2023-04-06  Richard Earnshaw  <rearnsha@arm.com>
27916
27917         PR target/107674
27918         * config/arm/arm.cc (arm_effective_regno): New function.
27919         (mve_vector_mem_operand): Use it.
27920
27921 2023-04-06  Andrew MacLeod  <amacleod@redhat.com>
27922
27923         PR tree-optimization/109417
27924         * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
27925         dependency is in SSA_NAME_FREE_LIST.
27926
27927 2023-04-06  Andrew Pinski  <apinski@marvell.com>
27928
27929         PR tree-optimization/109427
27930         * params.opt (-param=vect-induction-float=):
27931         Fix option attribute typo for IntegerRange.
27932
27933 2023-04-05  Jeff Law  <jlaw@ventanamicro>
27934
27935         PR target/108892
27936         * combine.cc (combine_instructions): Force re-recognition when
27937         after restoring the body of an insn to its original form.
27938
27939 2023-04-05  Martin Jambor  <mjambor@suse.cz>
27940
27941         PR ipa/108959
27942         * ipa-sra.cc (zap_useless_ipcp_results): New function.
27943         (process_isra_node_results): Call it.
27944
27945 2023-04-05  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
27946
27947         * config/riscv/vector.md: Fix incorrect operand order.
27948
27949 2023-04-05  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
27950
27951         * config/riscv/riscv-vsetvl.cc
27952         (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
27953         demand fusion.
27954
27955 2023-04-05  Li Xu  <xuli1@eswincomputing.com>
27956
27957         * config/riscv/riscv-vector-builtins.def: Fix typo.
27958         * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
27959         * config/riscv/vector-iterators.md: Ditto.
27960
27961 2023-04-04  Hans-Peter Nilsson  <hp@axis.com>
27962
27963         * doc/md.texi (Including Patterns): Fix page break.
27964
27965 2023-04-04  Jakub Jelinek  <jakub@redhat.com>
27966
27967         PR tree-optimization/109386
27968         * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
27969         foperator_le::op1_range, foperator_le::op2_range,
27970         foperator_gt::op1_range, foperator_gt::op2_range,
27971         foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
27972         BRS_FALSE case even if the other op is maybe_isnan, not just
27973         known_isnan.
27974         (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
27975         foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
27976         foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
27977         foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
27978         Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
27979         not just known_isnan.
27980
27981 2023-04-04  Marek Polacek  <polacek@redhat.com>
27982
27983         PR sanitizer/109107
27984         * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
27985         when associating.
27986         * match.pd: Use TYPE_OVERFLOW_SANITIZED.
27987
27988 2023-04-04  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
27989
27990         * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
27991         (mve_vcreateq_f<mode>): Swap operands.
27992
27993 2023-04-04  Andrew Stubbs  <ams@codesourcery.com>
27994
27995         * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
27996
27997 2023-04-04  Jakub Jelinek  <jakub@redhat.com>
27998
27999         PR target/109384
28000         * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
28001         Reword diagnostics about zfinx conflict with f, formatting fixes.
28002
28003 2023-04-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
28004
28005         * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
28006
28007 2023-04-04  Richard Biener  <rguenther@suse.de>
28008
28009         PR tree-optimization/109304
28010         * tree-profile.cc (tree_profiling): Use symtab node
28011         availability to decide whether to skip adjusting calls.
28012         Do not adjust calls to internal functions.
28013
28014 2023-04-04  Kewen Lin  <linkw@linux.ibm.com>
28015
28016         PR target/108807
28017         * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
28018         function for permutation control vector by considering big endianness.
28019
28020 2023-04-04  Kewen Lin  <linkw@linux.ibm.com>
28021
28022         PR target/108699
28023         * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
28024         (rs6000_vprtyb<mode>2): ... this.
28025         * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
28026         rs6000_vprtybv2di2.
28027         (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
28028         (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
28029         * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
28030         popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
28031
28032 2023-04-04  Hans-Peter Nilsson  <hp@axis.com>
28033             Sandra Loosemore  <sandra@codesourcery.com>
28034
28035         * doc/md.texi (Insn Splitting): Tweak wording for readability.
28036
28037 2023-04-03  Martin Jambor  <mjambor@suse.cz>
28038
28039         PR ipa/109303
28040         * ipa-prop.cc (determine_known_aggregate_parts): Check that the
28041         offset + size will be representable in unsigned int.
28042
28043 2023-04-03  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
28044
28045         * configure.ac (ZSTD_LIB): Move before zstd.h check.
28046         Unset gcc_cv_header_zstd_h without libzstd.
28047         * configure: Regenerate.
28048
28049 2023-04-03  Martin Liska  <mliska@suse.cz>
28050
28051         * doc/invoke.texi: Document new param.
28052
28053 2023-04-03  Cupertino Miranda  <cupertino.miranda@oracle.com>
28054
28055         * doc/sourcebuild.texi (const_volatile_readonly_section): Document
28056         new check_effective_target function.
28057
28058 2023-04-03  Li Xu  <xuli1@eswincomputing.com>
28059
28060         * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
28061         (vfloat32m8_t): Likewise
28062
28063 2023-04-03  liuhongt  <hongtao.liu@intel.com>
28064
28065         * doc/md.texi: Document signbitm2.
28066
28067 2023-04-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
28068             kito-cheng  <kito.cheng@sifive.com>
28069
28070         * config/riscv/vector.md: Fix RA constraint.
28071
28072 2023-04-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
28073
28074         * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
28075         * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
28076         * config/riscv/vector.md: Fix scalar move bug.
28077
28078 2023-04-01  Jakub Jelinek  <jakub@redhat.com>
28079
28080         * range-op-float.cc (foperator_equal::fold_range): If at least
28081         one of the op ranges is not singleton and neither is NaN and all
28082         4 bounds are zero, return [1, 1].
28083         (foperator_not_equal::fold_range): In the same case return [0, 0].
28084
28085 2023-04-01  Jakub Jelinek  <jakub@redhat.com>
28086
28087         * range-op-float.cc (foperator_equal::fold_range): Perform the
28088         non-singleton handling regardless of maybe_isnan (op1, op2).
28089         (foperator_not_equal::fold_range): Likewise.
28090         (foperator_lt::fold_range, foperator_le::fold_range,
28091         foperator_gt::fold_range, foperator_ge::fold_range): Perform the
28092         real_* comparison check which results in range_false (type)
28093         even if maybe_isnan (op1, op2).  Simplify.
28094         (foperator_ltgt): New class.
28095         (fop_ltgt): New variable.
28096         (floating_op_table::floating_op_table): Handle LTGT_EXPR using
28097         fop_ltgt.
28098
28099 2023-04-01  Jakub Jelinek  <jakub@redhat.com>
28100
28101         PR target/109254
28102         * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
28103         returns VOIDmode, handle it like if the register isn't used for
28104         passing arguments at all.
28105         (apply_result_size): If targetm.calls.get_raw_result_mode returns
28106         VOIDmode, handle it like if the register isn't used for returning
28107         results at all.
28108         * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
28109         means to return VOIDmode.
28110         * doc/tm.texi: Regenerated.
28111         * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
28112         TARGET_SVE for P0_REGNUM.
28113         (aarch64_function_arg_regno_p): Also return true for p0-p3.
28114         (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
28115
28116 2023-03-31  Vladimir N. Makarov  <vmakarov@redhat.com>
28117
28118         * lra-constraints.cc: (combine_reload_insn): New function.
28119
28120 2023-03-31  Jakub Jelinek  <jakub@redhat.com>
28121
28122         PR tree-optimization/91645
28123         * range-op-float.cc (foperator_unordered_lt::fold_range,
28124         foperator_unordered_le::fold_range,
28125         foperator_unordered_gt::fold_range,
28126         foperator_unordered_ge::fold_range,
28127         foperator_unordered_equal::fold_range): Call the ordered
28128         fold_range on ranges with cleared NaNs.
28129         * value-query.cc (range_query::get_tree_range): Handle also
28130         COMPARISON_CLASS_P trees.
28131
28132 2023-03-31  Kito Cheng  <kito.cheng@sifive.com>
28133             Andrew Pinski  <pinskia@gmail.com>
28134
28135         PR target/109328
28136         * config/riscv/t-riscv: Add missing dependencies.
28137
28138 2023-03-31  liuhongt  <hongtao.liu@intel.com>
28139
28140         * config/i386/i386.cc (inline_memory_move_cost): Return 100
28141         for MASK_REGS when MODE_SIZE > 8.
28142
28143 2023-03-31  liuhongt  <hongtao.liu@intel.com>
28144
28145         PR target/85048
28146         * config/i386/i386-builtin.def (BDESC): Adjust icode name from
28147         ufloat/ufix to floatuns/fixuns.
28148         * config/i386/i386-expand.cc
28149         (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
28150         * config/i386/sse.md
28151         (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
28152         Renamed to ..
28153         (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
28154         (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
28155         Renamed to ..
28156         (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
28157         .. this.
28158         (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
28159         Renamed to ..
28160         (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
28161         (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
28162         (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
28163         (ufloatv2siv2df2<mask_name>): Renamed to ..
28164         (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
28165         (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
28166         Renamed to ..
28167         (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
28168         .. this.
28169         (ufix_notruncv2dfv2si2): Renamed to ..
28170         (fixuns_notruncv2dfv2si2):.. this.
28171         (ufix_notruncv2dfv2si2_mask): Renamed to ..
28172         (fixuns_notruncv2dfv2si2_mask): .. this.
28173         (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
28174         (*fixuns_notruncv2dfv2si2_mask_1): .. this.
28175         (ufix_truncv2dfv2si2): Renamed to ..
28176         (*fixuns_truncv2dfv2si2): .. this.
28177         (ufix_truncv2dfv2si2_mask): Renamed to ..
28178         (fixuns_truncv2dfv2si2_mask): .. this.
28179         (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
28180         (*fixuns_truncv2dfv2si2_mask_1): .. this.
28181         (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
28182         (fixuns_truncv4dfv4si2<mask_name>): .. this.
28183         (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
28184         Renamed to ..
28185         (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
28186         .. this.
28187         (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
28188         (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
28189         .. this.
28190
28191 2023-03-30  Andrew MacLeod  <amacleod@redhat.com>
28192
28193         PR tree-optimization/109154
28194         * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
28195         * gimple-range-gori.h (may_recompute_p): Add depth param.
28196         * params.opt (ranger-recompute-depth): New param.
28197
28198 2023-03-30  Jason Merrill  <jason@redhat.com>
28199
28200         PR c++/107897
28201         PR c++/108887
28202         * cgraph.h: Move reset() from cgraph_node to symtab_node.
28203         * cgraphunit.cc (symtab_node::reset): Adjust.  Also call
28204         remove_from_same_comdat_group.
28205
28206 2023-03-30  Richard Biener  <rguenther@suse.de>
28207
28208         PR tree-optimization/107561
28209         * gimple-ssa-warn-access.cc (get_size_range): Add flags
28210         argument and pass it on.
28211         (check_access): When querying for the size range pass
28212         SR_ALLOW_ZERO when the known destination size is zero.
28213
28214 2023-03-30  Richard Biener  <rguenther@suse.de>
28215
28216         PR tree-optimization/109342
28217         * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
28218         overload for edge.  When that edge is a backedge use
28219         dominated_by_p directly.
28220
28221 2023-03-30  liuhongt  <hongtao.liu@intel.com>
28222
28223         * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
28224         vpblendd instead of vpblendw for V4SI under avx2.
28225
28226 2023-03-29  Hans-Peter Nilsson  <hp@axis.com>
28227
28228         * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
28229         for many quick operands, for register-sized modes.
28230
28231 2023-03-29  Jiawei  <jiawei@iscas.ac.cn>
28232
28233         * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
28234         New check.
28235
28236 2023-03-29  Martin Liska  <mliska@suse.cz>
28237
28238         PR bootstrap/109310
28239         * configure.ac: Emit a warning for deprecated option
28240         --enable-link-mutex.
28241         * configure: Regenerate.
28242
28243 2023-03-29  Richard Biener  <rguenther@suse.de>
28244
28245         PR tree-optimization/109331
28246         * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
28247         discover a taken edge make sure to cleanup the CFG.
28248
28249 2023-03-29  Richard Biener  <rguenther@suse.de>
28250
28251         PR tree-optimization/109327
28252         * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
28253         already removed stmts when draining to_remove.
28254
28255 2023-03-29  Richard Biener  <rguenther@suse.de>
28256
28257         PR ipa/106124
28258         * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
28259         so we can re-create the DIE for the type if required.
28260
28261 2023-03-29  Jakub Jelinek  <jakub@redhat.com>
28262             Richard Biener  <rguenther@suse.de>
28263
28264         PR tree-optimization/109301
28265         * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
28266         properties_provided from PROP_gimple_opt_math to 0.
28267         (pass_data_expand_powcabs): Change properties_provided from 0 to
28268         PROP_gimple_opt_math.
28269
28270 2023-03-29  Richard Biener  <rguenther@suse.de>
28271
28272         PR tree-optimization/109154
28273         * tree-if-conv.cc (gen_phi_arg_condition): Handle single
28274         inverted condition specially by inverting at the caller.
28275         (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
28276
28277 2023-03-28  David Malcolm  <dmalcolm@redhat.com>
28278
28279         PR c/107002
28280         * diagnostic-show-locus.cc (column_range::column_range): Factor
28281         out assertion conditional into...
28282         (column_range::valid_p): ...this new function.
28283         (line_corrections::add_hint): Don't attempt to consolidate hints
28284         if it would lead to invalid column_range instances.
28285
28286 2023-03-28  Kito Cheng  <kito.cheng@sifive.com>
28287
28288         PR target/109312
28289         * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
28290         (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
28291         minor refactor.
28292
28293 2023-03-28  Alexander Monakov  <amonakov@ispras.ru>
28294
28295         PR rtl-optimization/109187
28296         * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
28297         subtraction in three-way comparison.
28298
28299 2023-03-28  Andrew MacLeod  <amacleod@redhat.com>
28300
28301         PR tree-optimization/109265
28302         PR tree-optimization/109274
28303         * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
28304         not create a relation record is op1 and op2 are the same symbol.
28305         (gori_compute::compute_operand1_range): Pass op1 == op2 to the
28306         handler for this stmt, but create a new record only if this statement
28307         generates a relation based on the ranges.
28308         (gori_compute::compute_operand2_range): Ditto.
28309         * value-relation.h (value_relation::set_relation): Always create the
28310         record that is requested.
28311
28312 2023-03-28  Richard Biener  <rguenther@suse.de>
28313
28314         PR tree-optimization/107087
28315         * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
28316         executable regions to avoid useless work and to better
28317         propagate degenerate PHIs.
28318
28319 2023-03-28  Costas Argyris  <costas.argyris@gmail.com>
28320
28321         * config/i386/x-mingw32-utf8: update comments.
28322
28323 2023-03-28  Richard Sandiford  <richard.sandiford@arm.com>
28324
28325         PR target/109072
28326         * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
28327         * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
28328         variable.
28329         * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
28330         New function.
28331         (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
28332         after inlining.  Record which decls are loaded from.  Fix handling
28333         of vops for loads and stores.
28334         * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
28335         (aarch64_accesses_vector_load_decl_p): Likewise.
28336         (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
28337         variable.
28338         (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
28339         that loads from a decl, treat vector stores to those decls as
28340         zero cost.
28341         (aarch64_vector_costs::finish_cost): ...and in that case,
28342         if the vector code does nothing more than a store, give the
28343         prologue a zero cost as well.
28344
28345 2023-03-28  Richard Biener  <rguenther@suse.de>
28346
28347         PR bootstrap/84402
28348         PR tree-optimization/108129
28349         * genmatch.cc (lower_for): For (match ...) delay
28350         substituting into the match operator if possible.
28351         (dt_operand::gen_gimple_expr): For user_id look at the
28352         first substitute for determining how to access operands.
28353         (dt_operand::gen_generic_expr): Likewise.
28354         (dt_node::gen_kids): Properly sort user_ids according
28355         to their substitutes.
28356         (dt_node::gen_kids_1): Code-generate user_id matching.
28357
28358 2023-03-28  Jakub Jelinek  <jakub@redhat.com>
28359             Jonathan Wakely  <jwakely@redhat.com>
28360
28361         * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
28362         Use subcommand rather than sub-command in function comments.
28363
28364 2023-03-28  Jakub Jelinek  <jakub@redhat.com>
28365
28366         PR tree-optimization/109154
28367         * value-range.h (frange::flush_denormals_to_zero): Make it public
28368         rather than private.
28369         * value-range.cc (frange::set): Don't call flush_denormals_to_zero
28370         here.
28371         * range-op-float.cc (range_operator_float::fold_range): Call
28372         flush_denormals_to_zero.
28373
28374 2023-03-28  Jakub Jelinek  <jakub@redhat.com>
28375
28376         PR middle-end/106190
28377         * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
28378         of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
28379
28380 2023-03-28  Jakub Jelinek  <jakub@redhat.com>
28381
28382         * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
28383         as 4th argument to set to avoid clear_nan and union_ calls.
28384
28385 2023-03-28  Jakub Jelinek  <jakub@redhat.com>
28386
28387         PR target/109276
28388         * config/i386/i386.cc (assign_386_stack_local): For DImode
28389         with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
28390         align 32 rather than 0 to assign_stack_local.
28391
28392 2023-03-28  Eric Botcazou  <ebotcazou@adacore.com>
28393
28394         PR target/109140
28395         * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
28396         on operand #3 to get the final condition code.  Use std::swap.
28397         * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
28398         (fucmp<gcond:code>8<P:mode>_vis): Move around.
28399         (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
28400         (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
28401
28402 2023-03-28  Eric Botcazou  <ebotcazou@adacore.com>
28403
28404         * doc/gm2.texi: Add missing Next, Previous and Top fields to most
28405         top-level sections.
28406
28407 2023-03-28  Costas Argyris  <costas.argyris@gmail.com>
28408
28409         * config.host: Pull in i386/x-mingw32-utf8 Makefile
28410         fragment and reference utf8rc-mingw32.o explicitly
28411         for mingw hosts.
28412         * config/i386/sym-mingw32.cc: prevent name mangling of
28413         stub symbol.
28414         * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
28415         depend on manifest file explicitly.
28416
28417 2023-03-28  Richard Biener  <rguenther@suse.de>
28418
28419         Revert:
28420         2023-03-27  Richard Biener  <rguenther@suse.de>
28421
28422         PR rtl-optimization/109237
28423         * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
28424
28425 2023-03-28  Richard Biener  <rguenther@suse.de>
28426
28427         * common.opt (gdwarf): Remove Negative(gdwarf-).
28428
28429 2023-03-28  Richard Biener  <rguenther@suse.de>
28430
28431         * common.opt (gdwarf): Add RejectNegative.
28432         (gdwarf-): Likewise.
28433         (ggdb): Likewise.
28434         (gvms): Likewise.
28435
28436 2023-03-28  Hans-Peter Nilsson  <hp@axis.com>
28437
28438         * config/cris/constraints.md ("T"): Correct to
28439         define_memory_constraint.
28440
28441 2023-03-28  Hans-Peter Nilsson  <hp@axis.com>
28442
28443         * config/cris/cris.md (BW2): New mode-iterator.
28444         (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
28445         peephole2s.
28446
28447 2023-03-28  Hans-Peter Nilsson  <hp@axis.com>
28448
28449         * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
28450         for possible eliminable compares.
28451
28452 2023-03-28  Hans-Peter Nilsson  <hp@axis.com>
28453
28454         * config/cris/constraints.md ("R"): Remove unused constraint.
28455
28456 2023-03-27  Jonathan Wakely  <jwakely@redhat.com>
28457
28458         PR gcov-profile/109297
28459         * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
28460         (merge_stream_usage): Likewise.
28461         (overlap_usage): Likewise.
28462
28463 2023-03-27  Christoph Müllner  <christoph.muellner@vrull.eu>
28464
28465         PR target/109296
28466         * config/riscv/thead.md: Add missing mode specifiers.
28467
28468 2023-03-27  Philipp Tomsich  <philipp.tomsich@vrull.eu>
28469             Jiangning Liu  <jiangning.liu@amperecomputing.com>
28470             Manolis Tsamis  <manolis.tsamis@vrull.eu>
28471
28472         * config/aarch64/aarch64.cc: Update vector costs for ampere1.
28473
28474 2023-03-27  Richard Biener  <rguenther@suse.de>
28475
28476         PR rtl-optimization/109237
28477         * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
28478
28479 2023-03-27  Richard Biener  <rguenther@suse.de>
28480
28481         PR lto/109263
28482         * lto-wrapper.cc (run_gcc): Parse alternate debug options
28483         as well, they always enable debug.
28484
28485 2023-03-27  Kewen Lin  <linkw@linux.ibm.com>
28486
28487         PR target/109167
28488         * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
28489         from ...
28490         (_mm_slli_si128): ... here.  Change to call _mm_bslli_si128 directly.
28491
28492 2023-03-27  Kewen Lin  <linkw@linux.ibm.com>
28493
28494         PR target/109082
28495         * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
28496         than zero when calling vec_sld.
28497         (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
28498         zero when calling vec_sld.
28499         (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
28500         than zero when calling vec_sld.
28501
28502 2023-03-27  Sandra Loosemore  <sandra@codesourcery.com>
28503
28504         * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
28505         OMP_TASKLOOP, and OMP_LOOP with OMP_FOR.  Document how collapsed
28506         loops are represented and which fields are vectors.  Add
28507         documentation for OMP_FOR_PRE_BODY field.  Document internal
28508         form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
28509         * tree.def (OMP_FOR): Make documentation consistent with the
28510         Texinfo manual, to fill some gaps and correct errors.
28511
28512 2023-03-26  Andreas Schwab  <schwab@linux-m68k.org>
28513
28514         PR target/106282
28515         * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
28516         * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
28517         (handle_move_double): Call it before handle_movsi.
28518         * config/m68k/m68k-protos.h: Declare it.
28519
28520 2023-03-26  Jakub Jelinek  <jakub@redhat.com>
28521
28522         PR tree-optimization/109230
28523         * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
28524
28525 2023-03-26  Jakub Jelinek  <jakub@redhat.com>
28526
28527         PR ipa/105685
28528         * predict.cc (compute_function_frequency): Don't call
28529         warn_function_cold if function already has cold attribute.
28530
28531 2023-03-26  Gerald Pfeifer  <gerald@pfeifer.com>
28532
28533         * doc/install.texi: Remove anachronistic note
28534         related to languages built and separate source tarballs.
28535
28536 2023-03-25  David Malcolm  <dmalcolm@redhat.com>
28537
28538         PR analyzer/109098
28539         * diagnostic-format-sarif.cc (read_until_eof): Delete.
28540         (maybe_read_file): Delete.
28541         (sarif_builder::maybe_make_artifact_content_object): Use
28542         get_source_file_content rather than maybe_read_file.
28543         Reject it if it's not valid UTF-8.
28544         * input.cc (file_cache_slot::get_full_file_content): New.
28545         (get_source_file_content): New.
28546         (selftest::check_cpp_valid_utf8_p): New.
28547         (selftest::test_cpp_valid_utf8_p): New.
28548         (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
28549         * input.h (get_source_file_content): New prototype.
28550
28551 2023-03-24  David Malcolm  <dmalcolm@redhat.com>
28552
28553         * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
28554         debugging options.
28555         (Special Functions for Debugging the Analyzer): Convert to a
28556         table, and rewrite in places.
28557         (Other Debugging Techniques): Add notes on how to compare two
28558         different exploded graphs.
28559
28560 2023-03-24  David Malcolm  <dmalcolm@redhat.com>
28561
28562         PR other/109163
28563         * json.cc: Update comments to indicate that we now preserve
28564         insertion order of keys within objects.
28565         (object::print): Traverse keys in insertion order.
28566         (object::set): Preserve insertion order of keys.
28567         (selftest::test_writing_objects): Add an additional key to verify
28568         that we preserve insertion order.
28569         * json.h (object::m_keys): New field.
28570
28571 2023-03-24  Andrew MacLeod  <amacleod@redhat.com>
28572
28573         PR tree-optimization/109238
28574         * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
28575         predecessors which this block dominates.
28576
28577 2023-03-24  Richard Biener  <rguenther@suse.de>
28578
28579         PR tree-optimization/106912
28580         * tree-profile.cc (tree_profiling): Update stmts only when
28581         profiling or testing coverage.  Make sure to update calls
28582         fntype, stripping 'const' there.
28583
28584 2023-03-24  Jakub Jelinek  <jakub@redhat.com>
28585
28586         PR middle-end/109258
28587         * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
28588         if target == const0_rtx.
28589
28590 2023-03-24  Alexandre Oliva  <oliva@adacore.com>
28591
28592         * doc/sourcebuild.texi (weak_undefined, posix_memalign):
28593         Document options and effective targets.
28594
28595 2023-03-24  Costas Argyris  <costas.argyris@gmail.com>
28596
28597         * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
28598         optional.
28599
28600 2023-03-23  Pat Haugen  <pthaugen@linux.ibm.com>
28601
28602         * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
28603         non-earlyclobber alternative.
28604
28605 2023-03-23  Andrew Pinski  <apinski@marvell.com>
28606
28607         PR c/84900
28608         * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
28609         as a lvalue.
28610
28611 2023-03-23  Richard Biener  <rguenther@suse.de>
28612
28613         PR tree-optimization/107569
28614         * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
28615         Do not push SSA names with zero uses as available leader.
28616         (process_bb): Likewise.
28617
28618 2023-03-23  Richard Biener  <rguenther@suse.de>
28619
28620         PR tree-optimization/109262
28621         * tree-ssa-forwprop.cc (pass_forwprop::execute): When
28622         combining a piecewise complex load avoid touching loads
28623         that throw internally.  Use fun, not cfun throughout.
28624
28625 2023-03-23  Jakub Jelinek  <jakub@redhat.com>
28626
28627         * value-range.cc (irange::irange_union, irange::intersect): Fix
28628         comment spelling bugs.
28629         * gimple-range-trace.cc (range_tracer::do_header): Likewise.
28630         * gimple-range-trace.h: Likewise.
28631         * gimple-range-edge.cc: Likewise.
28632         (gimple_outgoing_range_stmt_p,
28633         gimple_outgoing_range::switch_edge_range,
28634         gimple_outgoing_range::edge_range_p): Likewise.
28635         * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
28636         gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
28637         assume_query::assume_query, assume_query::calculate_phi): Likewise.
28638         * gimple-range-edge.h: Likewise.
28639         * value-range.h (Value_Range::set, Value_Range::lower_bound,
28640         Value_Range::upper_bound, frange::set_undefined): Likewise.
28641         * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
28642         gori_compute): Likewise.
28643         * gimple-range-fold.h (fold_using_range): Likewise.
28644         * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
28645         Likewise.
28646         * gimple-range-gori.cc (range_def_chain::in_chain_p,
28647         range_def_chain::dump, gori_map::calculate_gori,
28648         gori_compute::compute_operand_range_switch,
28649         gori_compute::logical_combine, gori_compute::refine_using_relation,
28650         gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
28651         Likewise.
28652         * gimple-range.h: Likewise.
28653         (enable_ranger): Likewise.
28654         * range-op.h (empty_range_varying): Likewise.
28655         * value-query.h (value_query): Likewise.
28656         * gimple-range-cache.cc (block_range_cache::set_bb_range,
28657         block_range_cache::dump, ssa_global_cache::clear_global_range,
28658         temporal_cache::temporal_value, temporal_cache::current_p,
28659         ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
28660         ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
28661         Likewise.
28662         * gimple-range-fold.cc (fur_edge::get_phi_operand,
28663         fur_stmt::get_operand, gimple_range_adjustment,
28664         fold_using_range::range_of_phi,
28665         fold_using_range::relation_fold_and_or): Likewise.
28666         * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
28667         * value-query.cc (range_query::value_of_expr,
28668         range_query::value_on_edge, range_query::query_relation): Likewise.
28669         * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
28670         intersect_range_with_nonzero_bits): Likewise.
28671         * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
28672         exit_range): Likewise.
28673         * value-relation.h: Likewise.
28674         (equiv_oracle, relation_trio::relation_trio, value_relation,
28675         value_relation::value_relation, pe_min): Likewise.
28676         * range-op-float.cc (range_operator_float::rv_fold,
28677         frange_arithmetic, foperator_unordered_equal::op1_range,
28678         foperator_div::rv_fold): Likewise.
28679         * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
28680         * value-relation.cc (equiv_oracle::query_relation,
28681         equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
28682         value_relation::apply_transitive, relation_chain_head::find_relation,
28683         dom_oracle::query_relation, dom_oracle::find_relation_block,
28684         dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
28685         * range-op.cc (range_operator::wi_fold_in_parts_equiv,
28686         create_possibly_reversed_range, adjust_op1_for_overflow,
28687         operator_mult::wi_fold, operator_exact_divide::op1_range,
28688         operator_cast::lhs_op1_relation, operator_cast::fold_pair,
28689         operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
28690         range_op_lshift_tests): Likewise.
28691
28692 2023-03-23  Andrew Stubbs  <ams@codesourcery.com>
28693
28694         * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
28695         (move_callee_saved_registers): Detect the bug condition early.
28696
28697 2023-03-23  Andrew Stubbs  <ams@codesourcery.com>
28698
28699         * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
28700         * config/gcn/gcn-valu.md (V_1REG_ALT): New.
28701         (V_2REG_ALT): New.
28702         (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
28703         (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
28704         (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
28705         * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
28706         * config/gcn/predicates.md (ascending_zero_int_parallel): New.
28707
28708 2023-03-23  Jakub Jelinek  <jakub@redhat.com>
28709
28710         PR tree-optimization/109176
28711         * tree-vect-generic.cc (expand_vector_condition): If a has
28712         vector boolean type and is a comparison, also check if both
28713         the comparison and VEC_COND_EXPR could be successfully expanded
28714         individually.
28715
28716 2023-03-23  Pan Li  <pan2.li@intel.com>
28717             Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
28718
28719         PR target/108654
28720         PR target/108185
28721         * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
28722         for vector mask modes.
28723         * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
28724         * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
28725
28726 2023-03-23  Songhe Zhu  <zhusonghe@eswincomputing.com>
28727
28728         * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
28729
28730 2023-03-23  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
28731
28732         PR target/109244
28733         * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
28734         (emit_vlmax_op): Ditto.
28735         * config/riscv/riscv-v.cc (get_sew): New function.
28736         (emit_vlmax_vsetvl): Adapt function.
28737         (emit_pred_op): Ditto.
28738         (emit_vlmax_op): Ditto.
28739         (emit_nonvlmax_op): Ditto.
28740         (legitimize_move): Fix LRA ICE.
28741         (gen_no_side_effects_vsetvl_rtx): Adapt function.
28742         * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
28743         (@mov<VB:mode><P:mode>_lra): Ditto.
28744         (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
28745         (*mov<VB:mode><P:mode>_lra): Ditto.
28746
28747 2023-03-23  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
28748
28749         PR target/109228
28750         * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
28751         __riscv_vlenb support.
28752         (BASE): Ditto.
28753         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
28754         * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
28755         * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
28756         (SHAPE): Ditto.
28757         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
28758         * config/riscv/riscv-vector-builtins.cc: Ditto.
28759
28760 2023-03-23  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
28761             kito-cheng  <kito.cheng@sifive.com>
28762
28763         * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
28764         (pass_vsetvl::compute_local_backward_infos): Fix bugs.
28765         (pass_vsetvl::need_vsetvl): Fix bugs.
28766         (pass_vsetvl::backward_demand_fusion): Fix bugs.
28767         (pass_vsetvl::demand_fusion): Fix bugs.
28768         (eliminate_insn): Fix bugs.
28769         (insert_vsetvl): Ditto.
28770         (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
28771         * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
28772         * config/riscv/vector.md: Ditto.
28773
28774 2023-03-23  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
28775             kito-cheng  <kito.cheng@sifive.com>
28776
28777         * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
28778         * config/riscv/vector-iterators.md (nmsac): Ditto.
28779         (nmsub): Ditto.
28780         (msac): Ditto.
28781         (msub): Ditto.
28782         (nmadd): Ditto.
28783         (nmacc): Ditto.
28784         * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
28785         (@pred_mul_plus<mode>): Ditto.
28786         (*pred_madd<mode>): Ditto.
28787         (*pred_macc<mode>): Ditto.
28788         (*pred_mul_plus<mode>): Ditto.
28789         (@pred_mul_plus<mode>_scalar): Ditto.
28790         (*pred_madd<mode>_scalar): Ditto.
28791         (*pred_macc<mode>_scalar): Ditto.
28792         (*pred_mul_plus<mode>_scalar): Ditto.
28793         (*pred_madd<mode>_extended_scalar): Ditto.
28794         (*pred_macc<mode>_extended_scalar): Ditto.
28795         (*pred_mul_plus<mode>_extended_scalar): Ditto.
28796         (@pred_minus_mul<mode>): Ditto.
28797         (*pred_<madd_nmsub><mode>): Ditto.
28798         (*pred_nmsub<mode>): Ditto.
28799         (*pred_<macc_nmsac><mode>): Ditto.
28800         (*pred_nmsac<mode>): Ditto.
28801         (*pred_mul_<optab><mode>): Ditto.
28802         (*pred_minus_mul<mode>): Ditto.
28803         (@pred_mul_<optab><mode>_scalar): Ditto.
28804         (@pred_minus_mul<mode>_scalar): Ditto.
28805         (*pred_<madd_nmsub><mode>_scalar): Ditto.
28806         (*pred_nmsub<mode>_scalar): Ditto.
28807         (*pred_<macc_nmsac><mode>_scalar): Ditto.
28808         (*pred_nmsac<mode>_scalar): Ditto.
28809         (*pred_mul_<optab><mode>_scalar): Ditto.
28810         (*pred_minus_mul<mode>_scalar): Ditto.
28811         (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
28812         (*pred_nmsub<mode>_extended_scalar): Ditto.
28813         (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
28814         (*pred_nmsac<mode>_extended_scalar): Ditto.
28815         (*pred_mul_<optab><mode>_extended_scalar): Ditto.
28816         (*pred_minus_mul<mode>_extended_scalar): Ditto.
28817         (*pred_<madd_msub><mode>): Ditto.
28818         (*pred_<macc_msac><mode>): Ditto.
28819         (*pred_<madd_msub><mode>_scalar): Ditto.
28820         (*pred_<macc_msac><mode>_scalar): Ditto.
28821         (@pred_neg_mul_<optab><mode>): Ditto.
28822         (@pred_mul_neg_<optab><mode>): Ditto.
28823         (*pred_<nmadd_msub><mode>): Ditto.
28824         (*pred_<nmsub_nmadd><mode>): Ditto.
28825         (*pred_<nmacc_msac><mode>): Ditto.
28826         (*pred_<nmsac_nmacc><mode>): Ditto.
28827         (*pred_neg_mul_<optab><mode>): Ditto.
28828         (*pred_mul_neg_<optab><mode>): Ditto.
28829         (@pred_neg_mul_<optab><mode>_scalar): Ditto.
28830         (@pred_mul_neg_<optab><mode>_scalar): Ditto.
28831         (*pred_<nmadd_msub><mode>_scalar): Ditto.
28832         (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
28833         (*pred_<nmacc_msac><mode>_scalar): Ditto.
28834         (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
28835         (*pred_neg_mul_<optab><mode>_scalar): Ditto.
28836         (*pred_mul_neg_<optab><mode>_scalar): Ditto.
28837         (@pred_widen_neg_mul_<optab><mode>): Ditto.
28838         (@pred_widen_mul_neg_<optab><mode>): Ditto.
28839         (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
28840         (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
28841
28842 2023-03-23  liuhongt  <hongtao.liu@intel.com>
28843
28844         * builtins.cc (builtin_memset_read_str): Replace
28845         targetm.gen_memset_scratch_rtx with gen_reg_rtx.
28846         (builtin_memset_gen_str): Ditto.
28847         * config/i386/i386-expand.cc
28848         (ix86_convert_const_wide_int_to_broadcast): Replace
28849         ix86_gen_scratch_sse_rtx with gen_reg_rtx.
28850         (ix86_expand_vector_move): Ditto.
28851         * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
28852         Removed.
28853         * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
28854         (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
28855         * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
28856         * doc/tm.texi.in: Ditto.
28857         * target.def: Ditto.
28858
28859 2023-03-22  Vladimir N. Makarov  <vmakarov@redhat.com>
28860
28861         * lra.cc (lra): Do not repeat inheritance and live range splitting
28862         when asm error is found.
28863
28864 2023-03-22  Andrew Jenner  <andrew@codesourcery.com>
28865
28866         * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
28867         (gcn_expand_dpp_distribute_even_insn)
28868         (gcn_expand_dpp_distribute_odd_insn): Declare.
28869         * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
28870         (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
28871         (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
28872         (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
28873         (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
28874         (fms<mode>4_negop2): New patterns.
28875         * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
28876         (gcn_expand_dpp_distribute_even_insn)
28877         (gcn_expand_dpp_distribute_odd_insn): New functions.
28878         * config/gcn/gcn.md: Add entries to unspec enum.
28879
28880 2023-03-22  Aldy Hernandez  <aldyh@redhat.com>
28881
28882         PR tree-optimization/109008
28883         * value-range.cc (frange::set): Add nan_state argument.
28884         * value-range.h (class nan_state): New.
28885         (frange::get_nan_state): New.
28886
28887 2023-03-22  Martin Liska  <mliska@suse.cz>
28888
28889         * configure: Regenerate.
28890
28891 2023-03-21  Joseph Myers  <joseph@codesourcery.com>
28892
28893         * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
28894         to variants.
28895
28896 2023-03-21  Andrew MacLeod  <amacleod@redhat.com>
28897
28898         PR tree-optimization/109192
28899         * gimple-range-gori.cc (gori_compute::compute_operand_range):
28900         Terminate gori calculations if a relation is not relevant.
28901         * value-relation.h (value_relation::set_relation): Allow
28902         equality between op1 and op2 if they are the same.
28903
28904 2023-03-21  Richard Biener  <rguenther@suse.de>
28905
28906         PR tree-optimization/109219
28907         * tree-vect-loop.cc (vectorizable_reduction): Check
28908         slp_node, not STMT_SLP_TYPE.
28909         * tree-vect-stmts.cc (vectorizable_condition): Likewise.
28910         * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
28911         Remove assertion on STMT_SLP_TYPE.
28912
28913 2023-03-21  Jakub Jelinek  <jakub@redhat.com>
28914
28915         PR tree-optimization/109215
28916         * tree.h (enum special_array_member): Adjust comments for int_0
28917         and trail_0.
28918         * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
28919         has zero sized element type and the array has variable number of
28920         elements or constant one or more elements.
28921         (component_ref_size): Adjust comments, formatting fix.
28922
28923 2023-03-21  Arsen Arsenović  <arsen@aarsen.me>
28924
28925         * configure.ac: Add check for the Texinfo 6.8
28926         CONTENTS_OUTPUT_LOCATION customization variable and set it if
28927         supported.
28928         * configure: Regenerate.
28929         * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable.  Set by
28930         configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
28931         CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
28932         ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
28933
28934 2023-03-21  Arsen Arsenović  <arsen@aarsen.me>
28935
28936         * doc/extend.texi: Associate use_hazard_barrier_return index
28937         entry with its attribute.
28938         * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
28939         its attribute
28940
28941 2023-03-21  Arsen Arsenović  <arsen@aarsen.me>
28942
28943         * doc/implement-c.texi: Remove usage of @gol.
28944         * doc/invoke.texi: Ditto.
28945         * doc/sourcebuild.texi: Ditto.
28946         * doc/include/gcc-common.texi: Remove @gol.  In new Makeinfo and
28947         texinfo.tex versions, the bug it was working around appears to
28948         be gone.
28949
28950 2023-03-21  Arsen Arsenović  <arsen@aarsen.me>
28951
28952         * doc/include/texinfo.tex: Update to 2023-01-17.19.
28953
28954 2023-03-21  Arsen Arsenović  <arsen@aarsen.me>
28955
28956         * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
28957         @enddefbuiltin for defining built-in functions.
28958         * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
28959         places where it should be used.
28960
28961 2023-03-21  Arsen Arsenović  <arsen@aarsen.me>
28962
28963         * doc/extend.texi (Formatted Output Function Checking): New
28964         subsection for  grouping together printf et al.
28965         (Exception handling) Fix missing @ sign before copyright
28966         header, which lead to the copyright line leaking into
28967         '(gcc)Exception handling'.
28968         * doc/gcc.texi: Set document language to en_US.
28969         (@copying): Wrap front cover texts in quotations, move in manual
28970         description text.
28971
28972 2023-03-21  Arsen Arsenović  <arsen@aarsen.me>
28973
28974         * doc/gcc.texi: Add the Indices appendix, to make texinfo
28975         generate nice indices overview page.
28976
28977 2023-03-21  Richard Biener  <rguenther@suse.de>
28978
28979         PR tree-optimization/109170
28980         * gimple-range-op.cc (cfn_pass_through_arg1): New.
28981         (gimple_range_op_handler::maybe_builtin_call): Handle
28982         __builtin_expect via cfn_pass_through_arg1.
28983
28984 2023-03-20   Michael Meissner  <meissner@linux.ibm.com>
28985
28986         PR target/109067
28987         * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
28988         (init_float128_ieee): Delete code to switch complex multiply and divide
28989         for long double.
28990         (complex_multiply_builtin_code): New helper function.
28991         (complex_divide_builtin_code): Likewise.
28992         (rs6000_mangle_decl_assembler_name): Add support for mangling the name
28993         of complex 128-bit multiply and divide built-in functions.
28994
28995 2023-03-20  Peter Bergner  <bergner@linux.ibm.com>
28996
28997         PR target/109178
28998         * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
28999
29000 2023-03-19  Jonny Grant  <jg@jguk.org>
29001
29002         * doc/extend.texi (Common Function Attributes) <nonnull>:
29003         Correct typo.
29004
29005 2023-03-18  Peter Bergner  <bergner@linux.ibm.com>
29006
29007         PR rtl-optimization/109179
29008         * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
29009         insn or note.  Move the tests earlier to guard lra_get_insn_recog_data.
29010
29011 2023-03-17  Jakub Jelinek  <jakub@redhat.com>
29012
29013         PR target/105554
29014         * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
29015         to false.
29016         * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
29017         to allocate_struct_function instead of false.
29018         * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
29019         nor DECL_RESULT here.  Pass true as ABSTRACT_P to
29020         push_struct_function.  Call targetm.target_option.relayout_function
29021         after it.
29022         (tree_function_versioning): Formatting fix.
29023
29024 2023-03-17  Vladimir N. Makarov  <vmakarov@redhat.com>
29025
29026         * lra-constraints.cc: Include hooks.h.
29027         (combine_reload_insn): New function.
29028         (lra_constraints): Call it.
29029
29030 2023-03-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
29031             kito-cheng  <kito.cheng@sifive.com>
29032
29033         * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
29034         as legitimate value.
29035         * config/riscv/riscv-vector-builtins.cc
29036         (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
29037         (function_expander::use_widen_ternop_insn): Ditto.
29038         * config/riscv/vector.md (@vundefined<mode>): New pattern.
29039         (pred_mul_<optab><mode>_undef_merge): Remove.
29040         (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
29041         (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
29042         (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
29043         (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
29044
29045 2023-03-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
29046
29047         PR target/109092
29048         * config/riscv/riscv.md: Fix subreg bug.
29049
29050 2023-03-17  Jakub Jelinek  <jakub@redhat.com>
29051
29052         PR middle-end/108685
29053         * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
29054         use its loop_father rather than BODY_BB's loop_father.
29055         (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
29056         If broken_loop with ordered > collapse and at least one of those
29057         extra loops aren't guaranteed to have at least one iteration, change
29058         l0_bb's loop_father to entry_bb's loop_father.  Set cont_bb's
29059         loop_father to l0_bb's loop_father rather than l1_bb's.
29060
29061 2023-03-17  Jakub Jelinek  <jakub@redhat.com>
29062
29063         PR plugins/108634
29064         * gdbhooks.py (TreePrinter.to_string): Wrap
29065         gdb.parse_and_eval('tree_code_type') in a try block, parse
29066         and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
29067         raises exception.  Update comments for the recent tree_code_type
29068         changes.
29069
29070 2023-03-17  Sandra Loosemore  <sandra@codesourcery.com>
29071
29072         * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
29073         issues.  Add more line breaks to example so it doesn't overflow
29074         the margins.
29075
29076 2023-03-17  Sandra Loosemore  <sandra@codesourcery.com>
29077
29078         * doc/extend.texi (Common Function Attributes) <access>: Fix bad
29079         line breaks in examples.
29080         <malloc>: Fix bad line breaks in running text, also copy-edit
29081         for consistency.
29082         (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
29083         * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
29084         @gol.
29085         (C++ Dialect Options) <-fcontracts>: Add line break in example.
29086         <-Wctad-maybe-unsupported>: Likewise.
29087         <-Winvalid-constexpr>: Likewise.
29088         (Warning Options) <-Wdangling-pointer>: Likewise.
29089         <-Winterference-size>: Likewise.
29090         <-Wvla-parameter>: Likewise.
29091         (Static Analyzer Options): Fix bad line breaks in running text,
29092         plus add some missing markup.
29093         (Optimize Options) <openacc-privatization>: Fix more bad line
29094         breaks in running text.
29095
29096 2023-03-16  Uros Bizjak  <ubizjak@gmail.com>
29097
29098         * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
29099         Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
29100         (expand_vec_perm_2perm_pblendv): Ditto.
29101
29102 2023-03-16  Martin Liska  <mliska@suse.cz>
29103
29104         PR middle-end/106133
29105         * gcc.cc (driver_handle_option): Use x_main_input_basename
29106         if x_dump_base_name is null.
29107         * opts.cc (common_handle_option): Likewise.
29108
29109 2023-03-16  Richard Biener  <rguenther@suse.de>
29110
29111         PR tree-optimization/109123
29112         * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
29113         Do not emit -Wuse-after-free late.
29114         (pass_waccess::check_call): Always check call pointer uses.
29115
29116 2023-03-16  Richard Biener  <rguenther@suse.de>
29117
29118         PR tree-optimization/109141
29119         * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
29120         * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
29121         out from ...
29122         (renumber_gimple_stmt_uids): ... here and
29123         (renumber_gimple_stmt_uids_in_blocks): ... here.
29124         * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
29125         Use renumber_gimple_stmt_uids_in_block to also assign UIDs
29126         to PHIs.
29127         (pass_waccess::check_pointer_uses): Process all PHIs.
29128
29129 2023-03-15  David Malcolm  <dmalcolm@redhat.com>
29130
29131         PR analyzer/109097
29132         * diagnostic-format-sarif.cc (class sarif_invocation): New.
29133         (class sarif_ice_notification): New.
29134         (sarif_builder::m_invocation_obj): New field.
29135         (sarif_invocation::add_notification_for_ice): New.
29136         (sarif_invocation::prepare_to_flush): New.
29137         (sarif_ice_notification::sarif_ice_notification): New.
29138         (sarif_builder::sarif_builder): Add m_invocation_obj.
29139         (sarif_builder::end_diagnostic): Special-case DK_ICE and
29140         DK_ICE_NOBT.
29141         (sarif_builder::flush_to_file): Call prepare_to_flush on
29142         m_invocation_obj.  Pass the latter to make_top_level_object.
29143         (sarif_builder::make_result_object): Move creation of "locations"
29144         array to...
29145         (sarif_builder::make_locations_arr): ...this new function.
29146         (sarif_builder::make_top_level_object): Add "invocation_obj" param
29147         and pass it to make_run_object.
29148         (sarif_builder::make_run_object): Add "invocation_obj" param and
29149         use it.
29150         (sarif_ice_handler): New callback.
29151         (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
29152         * diagnostic.cc (diagnostic_initialize): Initialize new field
29153         "ice_handler_cb".
29154         (diagnostic_action_after_output): If it is set, make one attempt
29155         to call ice_handler_cb.
29156         * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
29157
29158 2023-03-15  Uros Bizjak  <ubizjak@gmail.com>
29159
29160         * config/i386/i386-expand.cc (expand_vec_perm_blend):
29161         Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
29162         and fix V2HImode handling.
29163         (expand_vec_perm_1): Try to emit BLEND instruction
29164         before MOVSS/MOVSD.
29165         * config/i386/mmx.md (*mmx_blendps): New insn pattern.
29166
29167 2023-03-15  Tobias Burnus  <tobias@codesourcery.com>
29168
29169         * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
29170
29171 2023-03-15  Richard Biener  <rguenther@suse.de>
29172
29173         * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
29174         Do not diagnose clobbers.
29175
29176 2023-03-15  Richard Biener  <rguenther@suse.de>
29177
29178         PR tree-optimization/109139
29179         * tree-ssa-live.cc (remove_unused_locals): Look at the
29180         base address for unused decls on the LHS of .DEFERRED_INIT.
29181
29182 2023-03-15  Xi Ruoyao  <xry111@xry111.site>
29183
29184         PR other/109086
29185         * builtins.cc (inline_string_cmp): Force the character
29186         difference into "result" pseudo-register, instead of reassign
29187         the pseudo-register.
29188
29189 2023-03-15  Christoph Müllner  <christoph.muellner@vrull.eu>
29190
29191         * config.gcc: Add thead.o to RISC-V extra_objs.
29192         * config/riscv/peephole.md: Add mempair peephole passes.
29193         * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
29194         prototype.
29195         (th_mempair_operands_p): Likewise.
29196         (th_mempair_order_operands): Likewise.
29197         (th_mempair_prepare_save_restore_operands): Likewise.
29198         (th_mempair_save_restore_regs): Likewise.
29199         (th_mempair_output_move): Likewise.
29200         * config/riscv/riscv.cc (riscv_save_reg): Move code.
29201         (riscv_restore_reg): Move code.
29202         (riscv_for_each_saved_reg): Add code to emit mempair insns.
29203         * config/riscv/t-riscv: Add thead.cc.
29204         * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
29205         New insn.
29206         (*th_mempair_store_<GPR:mode>2): Likewise.
29207         (*th_mempair_load_extendsidi2): Likewise.
29208         (*th_mempair_load_zero_extendsidi2): Likewise.
29209         * config/riscv/thead.cc: New file.
29210
29211 2023-03-15  Christoph Müllner  <christoph.muellner@vrull.eu>
29212
29213         * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
29214         New constraint "th_f_fmv".
29215         (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
29216         "th_r_fmv".
29217         * config/riscv/riscv.cc (riscv_split_doubleword_move):
29218         Add split code for XTheadFmv.
29219         (riscv_secondary_memory_needed): XTheadFmv does not need
29220         secondary memory.
29221         * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
29222         UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
29223         movdf_hardfloat_rv32.
29224         * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
29225         (th_fmv_x_w): New INSN.
29226         (th_fmv_x_hw): New INSN.
29227
29228 2023-03-15  Christoph Müllner  <christoph.muellner@vrull.eu>
29229
29230         * config/riscv/riscv.md (maddhisi4): New expand.
29231         (msubhisi4): New expand.
29232         * config/riscv/thead.md (*th_mula<mode>): New pattern.
29233         (*th_mulawsi): New pattern.
29234         (*th_mulawsi2): New pattern.
29235         (*th_maddhisi4): New pattern.
29236         (*th_sextw_maddhisi4): New pattern.
29237         (*th_muls<mode>): New pattern.
29238         (*th_mulswsi): New pattern.
29239         (*th_mulswsi2): New pattern.
29240         (*th_msubhisi4): New pattern.
29241         (*th_sextw_msubhisi4): New pattern.
29242
29243 2023-03-15  Christoph Müllner  <christoph.muellner@vrull.eu>
29244
29245         * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
29246         * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
29247         Add prototype.
29248         * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
29249         XTheadCondMov.
29250         (riscv_expand_conditional_move): New function.
29251         (riscv_expand_conditional_move_onesided): New function.
29252         * config/riscv/riscv.md: Add support for XTheadCondMov.
29253         * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
29254         support for XTheadCondMov.
29255         (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
29256
29257 2023-03-15  Christoph Müllner  <christoph.muellner@vrull.eu>
29258
29259         * config/riscv/bitmanip.md (clzdi2): New expand.
29260         (clzsi2): New expand.
29261         (ctz<mode>2): New expand.
29262         (popcount<mode>2): New expand.
29263         (<bitmanip_optab>si2): Rename INSN.
29264         (*<bitmanip_optab>si2): Hide INSN name.
29265         (<bitmanip_optab>di2): Rename INSN.
29266         (*<bitmanip_optab>di2): Hide INSN name.
29267         (rotrsi3): Remove INSN.
29268         (rotr<mode>3): Add expand.
29269         (*rotrsi3): New INSN.
29270         (rotrdi3): Rename INSN.
29271         (*rotrdi3): Hide INSN name.
29272         (rotrsi3_sext): Rename INSN.
29273         (*rotrsi3_sext): Hide INSN name.
29274         (bswap<mode>2): Remove INSN.
29275         (bswapdi2): Add expand.
29276         (bswapsi2): Add expand.
29277         (*bswap<mode>2): Hide INSN name.
29278         * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
29279         extraction.
29280         * config/riscv/riscv.md (extv<mode>): New expand.
29281         (extzv<mode>): New expand.
29282         * config/riscv/thead.md (*th_srri<mode>3): New INSN.
29283         (*th_ext<mode>): New INSN.
29284         (*th_extu<mode>): New INSN.
29285         (*th_clz<mode>2): New INSN.
29286         (*th_rev<mode>2): New INSN.
29287
29288 2023-03-15  Christoph Müllner  <christoph.muellner@vrull.eu>
29289
29290         * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
29291         * config/riscv/thead.md (*th_tst<mode>3): New INSN.
29292
29293 2023-03-15  Christoph Müllner  <christoph.muellner@vrull.eu>
29294
29295         * config/riscv/riscv.md: Include thead.md
29296         * config/riscv/thead.md: New file.
29297
29298 2023-03-15  Christoph Müllner  <christoph.muellner@vrull.eu>
29299
29300         * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
29301
29302 2023-03-15  Christoph Müllner  <christoph.muellner@vrull.eu>
29303
29304         * common/config/riscv/riscv-common.cc: Add xthead* extensions.
29305         * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
29306         (MASK_XTHEADBB): New.
29307         (MASK_XTHEADBS): New.
29308         (MASK_XTHEADCMO): New.
29309         (MASK_XTHEADCONDMOV): New.
29310         (MASK_XTHEADFMEMIDX): New.
29311         (MASK_XTHEADFMV): New.
29312         (MASK_XTHEADINT): New.
29313         (MASK_XTHEADMAC): New.
29314         (MASK_XTHEADMEMIDX): New.
29315         (MASK_XTHEADMEMPAIR): New.
29316         (MASK_XTHEADSYNC): New.
29317         (TARGET_XTHEADBA): New.
29318         (TARGET_XTHEADBB): New.
29319         (TARGET_XTHEADBS): New.
29320         (TARGET_XTHEADCMO): New.
29321         (TARGET_XTHEADCONDMOV): New.
29322         (TARGET_XTHEADFMEMIDX): New.
29323         (TARGET_XTHEADFMV): New.
29324         (TARGET_XTHEADINT): New.
29325         (TARGET_XTHEADMAC): New.
29326         (TARGET_XTHEADMEMIDX): New.
29327         (TARGET_XTHEADMEMPAIR): new.
29328         (TARGET_XTHEADSYNC): New.
29329         * config/riscv/riscv.opt: Add riscv_xthead_subext.
29330
29331 2023-03-15  Hu, Lin1  <lin1.hu@intel.com>
29332
29333         PR target/109117
29334         * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
29335         __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
29336         __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
29337
29338 2023-03-14  Jakub Jelinek  <jakub@redhat.com>
29339
29340         PR target/109109
29341         * config/i386/i386-expand.cc (split_double_concat): Fix splitting
29342         when lo is equal to dhi and hi is a MEM which uses dlo register.
29343
29344 2023-03-14  Martin Jambor  <mjambor@suse.cz>
29345
29346         PR ipa/107925
29347         * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
29348         global0 instead of zeroing when it does not have as many counts as
29349         it should.
29350
29351 2023-03-14  Martin Jambor  <mjambor@suse.cz>
29352
29353         PR ipa/107925
29354         * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
29355         ipa count, remove assert, lenient_count_portion_handling, dump
29356         also orig_node_count.
29357
29358 2023-03-14  Uros Bizjak  <ubizjak@gmail.com>
29359
29360         * config/i386/i386-expand.cc (expand_vec_perm_movs):
29361         Handle V2SImode for TARGET_MMX_WITH_SSE.
29362         * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
29363         using V2FI mode iterator to handle both V2SI and V2SF modes.
29364
29365 2023-03-14  Sam James  <sam@gentoo.org>
29366
29367         * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
29368         including <sstream> earlier.
29369         * system.h: Add INCLUDE_SSTREAM.
29370
29371 2023-03-14  Richard Biener  <rguenther@suse.de>
29372
29373         * tree-ssa-live.cc (remove_unused_locals): Do not treat
29374         the .DEFERRED_INIT of a variable as use, instead remove
29375         that if it is the only use.
29376
29377 2023-03-14  Eric Botcazou  <ebotcazou@adacore.com>
29378
29379         PR rtl-optimization/107762
29380         * expr.cc (emit_group_store): Revert latest change.
29381
29382 2023-03-14  Andre Vieira  <andre.simoesdiasvieira@arm.com>
29383
29384         PR tree-optimization/109005
29385         * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
29386         aggregate type check.
29387
29388 2023-03-14  Jakub Jelinek  <jakub@redhat.com>
29389
29390         PR tree-optimization/109115
29391         * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
29392         r.upper_bound () on r.undefined_p () range.
29393
29394 2023-03-14  Jan Hubicka  <hubicka@ucw.cz>
29395
29396         PR tree-optimization/106896
29397         * profile-count.cc (profile_count::to_sreal_scale): Synchronize
29398         implementatoin with probability_in; avoid some asserts.
29399
29400 2023-03-13  Max Filippov  <jcmvbkbc@gmail.com>
29401
29402         * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
29403
29404 2023-03-13  Sean Bright  <sean@seanbright.com>
29405
29406         * doc/invoke.texi (Warning Options): Remove errant 'See'
29407         before @xref.
29408
29409 2023-03-13  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
29410
29411         * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
29412         REG_OK_FOR_BASE_P): Remove.
29413
29414 2023-03-13  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
29415
29416         * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
29417         (=vd,vd,vr,vr): Ditto.
29418         * config/riscv/vector.md: Ditto.
29419
29420 2023-03-13  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
29421
29422         * config/riscv/riscv-vector-builtins.cc
29423         (function_expander::use_compare_insn): Add operand predicate check.
29424
29425 2023-03-13  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
29426
29427         * config/riscv/vector.md: Fine tune RA constraints.
29428
29429 2023-03-13  Tobias Burnus  <tobias@codesourcery.com>
29430
29431         * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
29432         hsaco assemble/link.
29433
29434 2023-03-13  Richard Biener  <rguenther@suse.de>
29435
29436         PR tree-optimization/109046
29437         * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
29438         piecewise complex loads.
29439
29440 2023-03-12  Jakub Jelinek  <jakub@redhat.com>
29441
29442         * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
29443         (aarch64_bf16_ptr_type_node): Adjust comment.
29444         * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
29445         bfloat16_type_node rather than aarch64_bf16_type_node.
29446         (aarch64_libgcc_floating_mode_supported_p,
29447         aarch64_scalar_mode_supported_p): Also support BFmode.
29448         (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
29449         (aarch64_invalid_binary_op): Remove BFmode related rejections.
29450         (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
29451         * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
29452         (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
29453         aarch64_bf16_type_node.
29454         (aarch64_init_simd_builtin_types): Likewise.
29455         (aarch64_init_bf16_types): Likewise.  Don't create bfloat16_type_node,
29456         which is created in tree.cc already.
29457         * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
29458
29459 2023-03-12  Roger Sayle  <roger@nextmovesoftware.com>
29460
29461         PR middle-end/109031
29462         * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
29463         ensure that the type of x is as wide or wider than the type of a.
29464
29465 2023-03-12  Tamar Christina  <tamar.christina@arm.com>
29466
29467         PR target/108583
29468         * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
29469         (*bitmask_shift_plus<mode>): New.
29470         * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
29471         (@aarch64_bitmask_udiv<mode>3): Remove.
29472         * config/aarch64/aarch64.cc
29473         (aarch64_vectorize_can_special_div_by_constant,
29474         TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
29475         (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
29476         aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
29477
29478 2023-03-12  Tamar Christina  <tamar.christina@arm.com>
29479
29480         PR target/108583
29481         * target.def (preferred_div_as_shifts_over_mult): New.
29482         * doc/tm.texi.in: Document it.
29483         * doc/tm.texi: Regenerate.
29484         * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
29485         * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
29486         * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
29487
29488 2023-03-12  Tamar Christina  <tamar.christina@arm.com>
29489             Richard Sandiford  <richard.sandiford@arm.com>
29490
29491         PR target/108583
29492         * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
29493         single use.
29494
29495 2023-03-12  Tamar Christina  <tamar.christina@arm.com>
29496             Andrew MacLeod  <amacleod@redhat.com>
29497
29498         PR target/108583
29499         * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
29500         * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
29501         Use it.
29502         (gimple_range_op_handler::maybe_non_standard): New.
29503         * range-op.cc (class operator_widen_plus_signed,
29504         operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
29505         operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
29506         operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
29507         operator_widen_mult_unsigned::wi_fold,
29508         ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
29509         ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
29510         * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
29511         ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
29512
29513 2023-03-12  Tamar Christina  <tamar.christina@arm.com>
29514
29515         PR target/108583
29516         * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
29517         * doc/tm.texi.in: Likewise.
29518         * explow.cc (round_push, align_dynamic_address): Revert previous patch.
29519         * expmed.cc (expand_divmod): Likewise.
29520         * expmed.h (expand_divmod): Likewise.
29521         * expr.cc (force_operand, expand_expr_divmod): Likewise.
29522         * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
29523         * target.def (can_special_div_by_const): Remove.
29524         * target.h: Remove tree-core.h include
29525         * targhooks.cc (default_can_special_div_by_const): Remove.
29526         * targhooks.h (default_can_special_div_by_const): Remove.
29527         * tree-vect-generic.cc (expand_vector_operation): Remove hook.
29528         * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
29529         * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
29530
29531 2023-03-12  Sandra Loosemore  <sandra@codesourcery.com>
29532
29533         * doc/install.texi2html: Fix issue number typo in comment.
29534
29535 2023-03-12  Gaius Mulley  <gaiusmod2@gmail.com>
29536
29537         * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
29538         bool.
29539
29540 2023-03-12  Sandra Loosemore  <sandra@codesourcery.com>
29541
29542         * doc/invoke.texi (Optimize Options):  Add markup to
29543         description of asan-kernel-mem-intrinsic-prefix, and clarify
29544         wording slightly.
29545
29546 2023-03-11  Gerald Pfeifer  <gerald@pfeifer.com>
29547
29548         * doc/extend.texi (Named Address Spaces): Drop a redundant link
29549         to AVR-LibC.
29550
29551 2023-03-11  Jeff Law  <jlaw@ventanamicro>
29552
29553         PR web/88860
29554         * doc/extend.texi: Clarify Attribute Syntax a bit.
29555
29556 2023-03-11  Sandra Loosemore  <sandra@codesourcery.com>
29557
29558         * doc/install.texi (Prerequisites): Suggest using newer versions
29559         of Texinfo.
29560         (Final install): Clean up and modernize discussion of how to
29561         build or obtain the GCC manuals.
29562         * doc/install.texi2html: Update comment to point to the PR instead
29563         of "makeinfo 4.7 brokenness" (it's not specific to that version).
29564
29565 2023-03-10  Jakub Jelinek  <jakub@redhat.com>
29566
29567         PR target/107703
29568         * optabs.cc (expand_fix): For conversions from BFmode to integral,
29569         use shifts to convert it to SFmode first and then convert SFmode
29570         to integral.
29571
29572 2023-03-10  Andrew Pinski  <apinski@marvell.com>
29573
29574         * config/aarch64/aarch64.md: Add a new define_split
29575         to help combine.
29576
29577 2023-03-10  Richard Biener  <rguenther@suse.de>
29578
29579         * tree-ssa-structalias.cc (solve_graph): Immediately
29580         iterate self-cycles.
29581
29582 2023-03-10  Jakub Jelinek  <jakub@redhat.com>
29583
29584         PR tree-optimization/109008
29585         * range-op-float.cc (float_widen_lhs_range): If not
29586         -frounding-math and not IBM double double format, extend lhs
29587         range just by 0.5ulp rather than 1ulp in each direction.
29588
29589 2023-03-10  Jakub Jelinek  <jakub@redhat.com>
29590
29591         PR target/107998
29592         * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
29593         $tmake_file.
29594         * config/i386/t-cygwin-w64: Remove.
29595
29596 2023-03-10  Jakub Jelinek  <jakub@redhat.com>
29597
29598         PR plugins/108634
29599         * tree-core.h (tree_code_type, tree_code_length): For C++11 or
29600         C++14, don't declare as extern const arrays.
29601         (tree_code_type_tmpl, tree_code_length_tmpl): New types with
29602         static constexpr member arrays for C++11 or C++14.
29603         * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
29604         tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
29605         (TREE_CODE_LENGTH): For C++11 or C++14 use
29606         tree_code_length_tmpl <0>::tree_code_length instead of
29607         tree_code_length.
29608         * tree.cc (tree_code_type, tree_code_length): Remove.
29609
29610 2023-03-10  Jakub Jelinek  <jakub@redhat.com>
29611
29612         PR other/108464
29613         * common.opt (fcanon-prefix-map): New option.
29614         * opts.cc: Include file-prefix-map.h.
29615         (flag_canon_prefix_map): New variable.
29616         (common_handle_option): Handle OPT_fcanon_prefix_map.
29617         (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
29618         * file-prefix-map.h (flag_canon_prefix_map): Declare.
29619         * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
29620         member.
29621         (add_prefix_map): Initialize canonicalize member from
29622         flag_canon_prefix_map, and if true canonicalize it using lrealpath.
29623         (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
29624         use lrealpath result only for map->canonicalize map entries.
29625         * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
29626         * opts-global.cc (handle_common_deferred_options): Clear
29627         flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
29628         * doc/invoke.texi (-fcanon-prefix-map): Document.
29629         (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
29630         see also for -fcanon-prefix-map.
29631         * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
29632
29633 2023-03-10  Jakub Jelinek  <jakub@redhat.com>
29634
29635         PR c/108079
29636         * cgraphunit.cc (check_global_declaration): Don't warn for unused
29637         variables which have OPT_Wunused_variable warning suppressed.
29638
29639 2023-03-10  Jakub Jelinek  <jakub@redhat.com>
29640
29641         PR tree-optimization/109008
29642         * range-op-float.cc (float_widen_lhs_range): If lb is
29643         minimum representable finite number or ub is maximum
29644         representable finite number, instead of widening it to
29645         -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
29646         Temporarily clear flag_finite_math_only when canonicalizing
29647         the widened range.
29648
29649 2023-03-10  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
29650
29651         * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
29652         * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
29653         (gimple_fold_builtin):  Ditto.
29654         * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
29655         (class vleff): Ditto.
29656         (BASE): Ditto.
29657         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29658         * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
29659         (vleff): Ditto.
29660         * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
29661         (struct fault_load_def): Ditto.
29662         (SHAPE): Ditto.
29663         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
29664         * config/riscv/riscv-vector-builtins.cc
29665         (rvv_arg_type_info::get_tree_type): Add size_ptr.
29666         (gimple_folder::gimple_folder): New class.
29667         (gimple_folder::fold): Ditto.
29668         (gimple_fold_builtin): New function.
29669         (get_read_vl_instance): Ditto.
29670         (get_read_vl_decl): Ditto.
29671         * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
29672         * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
29673         (get_read_vl_instance): New function.
29674         (get_read_vl_decl):  Ditto.
29675         * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
29676         (read_vl_insn_p): Ditto.
29677         (available_occurrence_p): Ditto.
29678         (backward_propagate_worthwhile_p): Ditto.
29679         (gen_vsetvl_pat): Adapt for vleff support.
29680         (get_forward_read_vl_insn): New function.
29681         (get_backward_fault_first_load_insn): Ditto.
29682         (source_equal_p): Adapt for vleff support.
29683         (first_ratio_invalid_for_second_sew_p): Remove.
29684         (first_ratio_invalid_for_second_lmul_p): Ditto.
29685         (first_lmul_less_than_second_lmul_p): Ditto.
29686         (first_ratio_less_than_second_ratio_p): Ditto.
29687         (support_relaxed_compatible_p): New function.
29688         (vector_insn_info::operator>): Remove.
29689         (vector_insn_info::operator>=): Refine.
29690         (vector_insn_info::parse_insn): Adapt for vleff support.
29691         (vector_insn_info::compatible_p): Ditto.
29692         (vector_insn_info::update_fault_first_load_avl): New function.
29693         (pass_vsetvl::transfer_after): Adapt for vleff support.
29694         (pass_vsetvl::demand_fusion): Ditto.
29695         (pass_vsetvl::cleanup_insns): Ditto.
29696         * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
29697         redundant condtions.
29698         * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
29699         * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
29700         * config/riscv/riscv.md: Adapt for vleff support.
29701         * config/riscv/t-riscv: Ditto.
29702         * config/riscv/vector-iterators.md: New iterator.
29703         * config/riscv/vector.md (read_vlsi): New pattern.
29704         (read_vldi_zero_extend): Ditto.
29705         (@pred_fault_load<mode>): Ditto.
29706
29707 2023-03-10  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
29708
29709         * config/riscv/riscv-vector-builtins.cc
29710         (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
29711         (function_expander::use_widen_ternop_insn): Ditto.
29712         * optabs.cc (maybe_gen_insn): Extend nops handling.
29713
29714 2023-03-10  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
29715
29716         * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
29717         patterns according to RVV ISA.
29718         * config/riscv/vector-iterators.md: New iterators.
29719         * config/riscv/vector.md
29720         (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
29721         (@pred_indexed_<order>load<mode>_same_eew): New pattern.
29722         (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
29723         (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
29724         (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
29725         (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
29726         (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
29727         (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
29728         (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
29729         (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
29730         (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
29731         (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
29732         (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
29733         (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
29734
29735 2023-03-10  Michael Collison  <collison@rivosinc.com>
29736
29737         * tree-vect-loop-manip.cc (vect_do_peeling): Use
29738         result of constant_lower_bound instead of vf for the lower
29739         bound of the epilog loop trip count.
29740
29741 2023-03-09  Tamar Christina  <tamar.christina@arm.com>
29742
29743         * passes.cc (emergency_dump_function): Finish graph generation.
29744
29745 2023-03-09  Tamar Christina  <tamar.christina@arm.com>
29746
29747         * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
29748         and bottom bit only.
29749
29750 2023-03-09  Andrew Pinski  <apinski@marvell.com>
29751
29752         PR tree-optimization/108980
29753         * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
29754         Reorgnize the call to warning for not strict flexible arrays
29755         to be before the check of warned.
29756
29757 2023-03-09  Jason Merrill  <jason@redhat.com>
29758
29759         * doc/extend.texi: Comment out __is_deducible docs.
29760
29761 2023-03-09  Jason Merrill  <jason@redhat.com>
29762
29763         PR c++/105841
29764         * doc/extend.texi (Type Traits):: Document __is_deducible.
29765
29766 2023-03-09  Costas Argyris  <costas.argyris@gmail.com>
29767
29768         PR driver/108865
29769         * config.host: add object for x86_64-*-mingw*.
29770         * config/i386/sym-mingw32.cc: dummy file to attach
29771         symbol.
29772         * config/i386/utf8-mingw32.rc: windres resource file.
29773         * config/i386/winnt-utf8.manifest: XML manifest to
29774         enable UTF-8.
29775         * config/i386/x-mingw32: reference to x-mingw32-utf8.
29776         * config/i386/x-mingw32-utf8: Makefile fragment to
29777         embed UTF-8 manifest.
29778
29779 2023-03-09  Vladimir N. Makarov  <vmakarov@redhat.com>
29780
29781         * lra-constraints.cc (process_alt_operands): Use operand modes for
29782         clobbered regs instead of the biggest access mode.
29783
29784 2023-03-09  Richard Biener  <rguenther@suse.de>
29785
29786         PR middle-end/108995
29787         * fold-const.cc (extract_muldiv_1): Avoid folding
29788         (CST * b) / CST2 when sanitizing overflow and we rely on
29789         overflow being undefined.
29790
29791 2023-03-09  Jakub Jelinek  <jakub@redhat.com>
29792             Richard Biener  <rguenther@suse.de>
29793
29794         PR tree-optimization/109008
29795         * range-op-float.cc (float_widen_lhs_range): New function.
29796         (foperator_plus::op1_range, foperator_minus::op1_range,
29797         foperator_minus::op2_range, foperator_mult::op1_range,
29798         foperator_div::op1_range, foperator_div::op2_range): Use it.
29799
29800 2023-03-07  Jonathan Grant  <jg@jguk.org>
29801
29802         PR sanitizer/81649
29803         * doc/invoke.texi (Instrumentation Options):  Clarify
29804         LeakSanitizer behavior.
29805
29806 2023-03-07  Benson Muite  <benson_muite@emailplus.org>
29807
29808         * doc/install.texi (Prerequisites): Add link to gmplib.org.
29809
29810 2023-03-07  Pan Li  <pan2.li@intel.com>
29811             Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
29812
29813         PR target/108185
29814         PR target/108654
29815         * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
29816         modes.
29817         * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
29818         * config/riscv/riscv.h (riscv_v_adjust_precision): New.
29819         * genmodes.cc (adj_precision): New.
29820         (ADJUST_PRECISION): New.
29821         (emit_mode_adjustments): Handle ADJUST_PRECISION.
29822
29823 2023-03-07  Hans-Peter Nilsson  <hp@axis.com>
29824
29825         * doc/sourcebuild.texi: Document check_effective_target_tail_call.
29826
29827 2023-03-06  Paul-Antoine Arras  <pa@codesourcery.com>
29828
29829         * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
29830         {s|u}{max|min} in QI, HI and DI modes.
29831         (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
29832         (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
29833         (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
29834         * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
29835         saved in SGPRs.
29836
29837 2023-03-06  Richard Biener  <rguenther@suse.de>
29838
29839         PR tree-optimization/109025
29840         * tree-vect-loop.cc (vect_is_simple_reduction): Verify
29841         the inner LC PHI use is the inner loop PHI latch definition
29842         before classifying an outer PHI as double reduction.
29843
29844 2023-03-06  Jan Hubicka  <hubicka@ucw.cz>
29845
29846         PR target/108429
29847         * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
29848         generic.
29849         (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
29850         (X86_TUNE_USE_SCATTER): Likewise.
29851
29852 2023-03-06  Xi Ruoyao  <xry111@xry111.site>
29853
29854         PR target/109000
29855         * config/loongarch/loongarch.h (FP_RETURN): Use
29856         TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
29857         (UNITS_PER_FP_ARG): Likewise.
29858
29859 2023-03-05  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
29860
29861         * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
29862         (pass_vsetvl::backward_demand_fusion): Ditto.
29863
29864 2023-03-05  Liao Shihua  <shihua@iscas.ac.cn>
29865             SiYu Wu  <siyu@isrc.iscas.ac.cn>
29866
29867         * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
29868         instructions.
29869         (riscv_sm3p1_<mode>): New.
29870         (riscv_sm4ed_<mode>): New.
29871         (riscv_sm4ks_<mode>): New.
29872         * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
29873         * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
29874         ZKSH's built-in functions.
29875
29876 2023-03-05  Liao Shihua  <shihua@iscas.ac.cn>
29877             SiYu Wu  <siyu@isrc.iscas.ac.cn>
29878
29879         * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
29880         (riscv_sha256sig1_<mode>): New.
29881         (riscv_sha256sum0_<mode>): New.
29882         (riscv_sha256sum1_<mode>): New.
29883         (riscv_sha512sig0h): New.
29884         (riscv_sha512sig0l): New.
29885         (riscv_sha512sig1h): New.
29886         (riscv_sha512sig1l): New.
29887         (riscv_sha512sum0r): New.
29888         (riscv_sha512sum1r): New.
29889         (riscv_sha512sig0): New.
29890         (riscv_sha512sig1): New.
29891         (riscv_sha512sum0): New.
29892         (riscv_sha512sum1): New.
29893         * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
29894         * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
29895         built-in functions.
29896         (DIRECT_BUILTIN): Add new.
29897
29898 2023-03-05  Liao Shihua  <shihua@iscas.ac.cn>
29899             SiYu Wu  <siyu@isrc.iscas.ac.cn>
29900
29901         * config/riscv/constraints.md (D03): Add constants of bs and rnum.
29902         (DsA): New.
29903         * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
29904         (riscv_aes32dsmi): New.
29905         (riscv_aes64ds): New.
29906         (riscv_aes64dsm): New.
29907         (riscv_aes64im): New.
29908         (riscv_aes64ks1i): New.
29909         (riscv_aes64ks2): New.
29910         (riscv_aes32esi): New.
29911         (riscv_aes32esmi): New.
29912         (riscv_aes64es): New.
29913         (riscv_aes64esm): New.
29914         * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
29915         * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
29916         ZKNE's built-in functions.
29917
29918 2023-03-05  Liao Shihua  <shihua@iscas.ac.cn>
29919             SiYu Wu  <siyu@isrc.iscas.ac.cn>
29920
29921         * config/riscv/bitmanip.md: Add ZBKB's instructions.
29922         * config/riscv/riscv-builtins.cc (AVAIL): Add new.
29923         * config/riscv/riscv.md: Add new type for crypto instructions.
29924         * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
29925         description file.
29926         * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
29927         extension's built-in function file.
29928
29929 2023-03-05  Liao Shihua  <shihua@iscas.ac.cn>
29930             SiYu Wu  <siyu@isrc.iscas.ac.cn>
29931
29932         * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
29933         (RISCV_FTYPE_NAME3): New.
29934         (RISCV_ATYPE_QI): New.
29935         (RISCV_ATYPE_HI): New.
29936         (RISCV_FTYPE_ATYPES2): New.
29937         (RISCV_FTYPE_ATYPES3): New.
29938         * config/riscv/riscv-ftypes.def (2): New.
29939         (3): New.
29940
29941 2023-03-05  Vineet Gupta  <vineetg@rivosinc.com>
29942
29943         * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
29944         use exact_log2().
29945
29946 2023-03-05  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
29947             kito-cheng  <kito.cheng@sifive.com>
29948
29949         * config/riscv/predicates.md (vector_any_register_operand): New predicate.
29950         * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
29951         (riscv_register_pragmas): Add builtin function check call.
29952         * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
29953         (check_builtin_call): New function.
29954         * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
29955         (class vreinterpret): Ditto.
29956         (class vlmul_ext): Ditto.
29957         (class vlmul_trunc): Ditto.
29958         (class vset): Ditto.
29959         (class vget): Ditto.
29960         (BASE): Ditto.
29961         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29962         * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
29963         (vluxei16): Ditto.
29964         (vluxei32): Ditto.
29965         (vluxei64): Ditto.
29966         (vloxei8): Ditto.
29967         (vloxei16): Ditto.
29968         (vloxei32): Ditto.
29969         (vloxei64): Ditto.
29970         (vsuxei8): Ditto.
29971         (vsuxei16): Ditto.
29972         (vsuxei32): Ditto.
29973         (vsuxei64): Ditto.
29974         (vsoxei8): Ditto.
29975         (vsoxei16): Ditto.
29976         (vsoxei32): Ditto.
29977         (vsoxei64): Ditto.
29978         (vundefined): Add new intrinsic.
29979         (vreinterpret): Ditto.
29980         (vlmul_ext): Ditto.
29981         (vlmul_trunc): Ditto.
29982         (vset): Ditto.
29983         (vget): Ditto.
29984         * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
29985         (struct narrow_alu_def): Ditto.
29986         (struct reduc_alu_def): Ditto.
29987         (struct vundefined_def): Ditto.
29988         (struct misc_def): Ditto.
29989         (struct vset_def): Ditto.
29990         (struct vget_def): Ditto.
29991         (SHAPE): Ditto.
29992         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
29993         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
29994         (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
29995         (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
29996         (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
29997         (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
29998         (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
29999         (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
30000         (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
30001         (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
30002         (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
30003         (DEF_RVV_LMUL1_OPS): Ditto.
30004         (DEF_RVV_LMUL2_OPS): Ditto.
30005         (DEF_RVV_LMUL4_OPS): Ditto.
30006         (vint16mf4_t): Ditto.
30007         (vint16mf2_t): Ditto.
30008         (vint16m1_t): Ditto.
30009         (vint16m2_t): Ditto.
30010         (vint16m4_t): Ditto.
30011         (vint16m8_t): Ditto.
30012         (vint32mf2_t): Ditto.
30013         (vint32m1_t): Ditto.
30014         (vint32m2_t): Ditto.
30015         (vint32m4_t): Ditto.
30016         (vint32m8_t): Ditto.
30017         (vint64m1_t): Ditto.
30018         (vint64m2_t): Ditto.
30019         (vint64m4_t): Ditto.
30020         (vint64m8_t): Ditto.
30021         (vuint16mf4_t): Ditto.
30022         (vuint16mf2_t): Ditto.
30023         (vuint16m1_t): Ditto.
30024         (vuint16m2_t): Ditto.
30025         (vuint16m4_t): Ditto.
30026         (vuint16m8_t): Ditto.
30027         (vuint32mf2_t): Ditto.
30028         (vuint32m1_t): Ditto.
30029         (vuint32m2_t): Ditto.
30030         (vuint32m4_t): Ditto.
30031         (vuint32m8_t): Ditto.
30032         (vuint64m1_t): Ditto.
30033         (vuint64m2_t): Ditto.
30034         (vuint64m4_t): Ditto.
30035         (vuint64m8_t): Ditto.
30036         (vint8mf4_t): Ditto.
30037         (vint8mf2_t): Ditto.
30038         (vint8m1_t): Ditto.
30039         (vint8m2_t): Ditto.
30040         (vint8m4_t): Ditto.
30041         (vint8m8_t): Ditto.
30042         (vuint8mf4_t): Ditto.
30043         (vuint8mf2_t): Ditto.
30044         (vuint8m1_t): Ditto.
30045         (vuint8m2_t): Ditto.
30046         (vuint8m4_t): Ditto.
30047         (vuint8m8_t): Ditto.
30048         (vint8mf8_t): Ditto.
30049         (vuint8mf8_t): Ditto.
30050         (vfloat32mf2_t): Ditto.
30051         (vfloat32m1_t): Ditto.
30052         (vfloat32m2_t): Ditto.
30053         (vfloat32m4_t): Ditto.
30054         (vfloat64m1_t): Ditto.
30055         (vfloat64m2_t): Ditto.
30056         (vfloat64m4_t): Ditto.
30057         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
30058         (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
30059         (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
30060         (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
30061         (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
30062         (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
30063         (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
30064         (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
30065         (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
30066         (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
30067         (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
30068         (DEF_RVV_LMUL1_OPS): Ditto.
30069         (DEF_RVV_LMUL2_OPS): Ditto.
30070         (DEF_RVV_LMUL4_OPS): Ditto.
30071         (DEF_RVV_TYPE_INDEX): Ditto.
30072         (required_extensions_p): Adapt for new intrinsic support/
30073         (get_required_extensions): New function.
30074         (check_required_extensions): Ditto.
30075         (unsigned_base_type_p): Remove.
30076         (rvv_arg_type_info::get_scalar_ptr_type): New function.
30077         (get_mode_for_bitsize): Remove.
30078         (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
30079         (rvv_arg_type_info::get_base_vector_type): Ditto.
30080         (rvv_arg_type_info::get_function_type_index): Ditto.
30081         (DEF_RVV_BASE_TYPE): New def.
30082         (function_builder::apply_predication): New class.
30083         (function_expander::mask_mode): Ditto.
30084         (function_checker::function_checker): Ditto.
30085         (function_checker::report_non_ice): Ditto.
30086         (function_checker::report_out_of_range): Ditto.
30087         (function_checker::require_immediate): Ditto.
30088         (function_checker::require_immediate_range): Ditto.
30089         (function_checker::check): Ditto.
30090         (check_builtin_call): Ditto.
30091         * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
30092         (DEF_RVV_BASE_TYPE): Ditto.
30093         (DEF_RVV_TYPE_INDEX): Ditto.
30094         (vbool64_t): Ditto.
30095         (vbool32_t): Ditto.
30096         (vbool16_t): Ditto.
30097         (vbool8_t): Ditto.
30098         (vbool4_t): Ditto.
30099         (vbool2_t): Ditto.
30100         (vbool1_t): Ditto.
30101         (vuint8mf8_t): Ditto.
30102         (vuint8mf4_t): Ditto.
30103         (vuint8mf2_t): Ditto.
30104         (vuint8m1_t): Ditto.
30105         (vuint8m2_t): Ditto.
30106         (vint8m4_t): Ditto.
30107         (vuint8m4_t): Ditto.
30108         (vint8m8_t): Ditto.
30109         (vuint8m8_t): Ditto.
30110         (vint16mf4_t): Ditto.
30111         (vuint16mf2_t): Ditto.
30112         (vuint16m1_t): Ditto.
30113         (vuint16m2_t): Ditto.
30114         (vuint16m4_t): Ditto.
30115         (vuint16m8_t): Ditto.
30116         (vint32mf2_t): Ditto.
30117         (vuint32m1_t): Ditto.
30118         (vuint32m2_t): Ditto.
30119         (vuint32m4_t): Ditto.
30120         (vuint32m8_t): Ditto.
30121         (vuint64m1_t): Ditto.
30122         (vuint64m2_t): Ditto.
30123         (vuint64m4_t): Ditto.
30124         (vuint64m8_t): Ditto.
30125         (vfloat32mf2_t): Ditto.
30126         (vfloat32m1_t): Ditto.
30127         (vfloat32m2_t): Ditto.
30128         (vfloat32m4_t): Ditto.
30129         (vfloat32m8_t): Ditto.
30130         (vfloat64m1_t): Ditto.
30131         (vfloat64m4_t): Ditto.
30132         (vector): Move it def.
30133         (scalar): Ditto.
30134         (mask): Ditto.
30135         (signed_vector): Ditto.
30136         (unsigned_vector): Ditto.
30137         (unsigned_scalar): Ditto.
30138         (vector_ptr): Ditto.
30139         (scalar_ptr): Ditto.
30140         (scalar_const_ptr): Ditto.
30141         (void): Ditto.
30142         (size): Ditto.
30143         (ptrdiff): Ditto.
30144         (unsigned_long): Ditto.
30145         (long): Ditto.
30146         (eew8_index): Ditto.
30147         (eew16_index): Ditto.
30148         (eew32_index): Ditto.
30149         (eew64_index): Ditto.
30150         (shift_vector): Ditto.
30151         (double_trunc_vector): Ditto.
30152         (quad_trunc_vector): Ditto.
30153         (oct_trunc_vector): Ditto.
30154         (double_trunc_scalar): Ditto.
30155         (double_trunc_signed_vector): Ditto.
30156         (double_trunc_unsigned_vector): Ditto.
30157         (double_trunc_unsigned_scalar): Ditto.
30158         (double_trunc_float_vector): Ditto.
30159         (float_vector): Ditto.
30160         (lmul1_vector): Ditto.
30161         (widen_lmul1_vector): Ditto.
30162         (eew8_interpret): Ditto.
30163         (eew16_interpret): Ditto.
30164         (eew32_interpret): Ditto.
30165         (eew64_interpret): Ditto.
30166         (vlmul_ext_x2): Ditto.
30167         (vlmul_ext_x4): Ditto.
30168         (vlmul_ext_x8): Ditto.
30169         (vlmul_ext_x16): Ditto.
30170         (vlmul_ext_x32): Ditto.
30171         (vlmul_ext_x64): Ditto.
30172         * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
30173         (struct function_type_info): New function.
30174         (struct rvv_arg_type_info): Ditto.
30175         (class function_checker): New class.
30176         (rvv_arg_type_info::get_scalar_type): New function.
30177         (rvv_arg_type_info::get_vector_type): Ditto.
30178         (function_expander::ret_mode): New function.
30179         (function_checker::arg_mode): Ditto.
30180         (function_checker::ret_mode): Ditto.
30181         * config/riscv/t-riscv: Add generator.
30182         * config/riscv/vector-iterators.md: New iterators.
30183         * config/riscv/vector.md (vundefined<mode>): New pattern.
30184         (@vundefined<mode>): Ditto.
30185         (@vreinterpret<mode>): Ditto.
30186         (@vlmul_extx2<mode>): Ditto.
30187         (@vlmul_extx4<mode>): Ditto.
30188         (@vlmul_extx8<mode>): Ditto.
30189         (@vlmul_extx16<mode>): Ditto.
30190         (@vlmul_extx32<mode>): Ditto.
30191         (@vlmul_extx64<mode>): Ditto.
30192         (*vlmul_extx2<mode>): Ditto.
30193         (*vlmul_extx4<mode>): Ditto.
30194         (*vlmul_extx8<mode>): Ditto.
30195         (*vlmul_extx16<mode>): Ditto.
30196         (*vlmul_extx32<mode>): Ditto.
30197         (*vlmul_extx64<mode>): Ditto.
30198         * config/riscv/genrvv-type-indexer.cc: New file.
30199
30200 2023-03-05  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
30201
30202         * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
30203         (slide1_sew64_helper): New function.
30204         * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
30205         (get_unknown_min_value): Ditto.
30206         (force_vector_length_operand): Ditto.
30207         (gen_no_side_effects_vsetvl_rtx): Ditto.
30208         (get_vl_x2_rtx): Ditto.
30209         (slide1_sew64_helper): Ditto.
30210         * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
30211         (class vrgather): Ditto.
30212         (class vrgatherei16): Ditto.
30213         (class vcompress): Ditto.
30214         (BASE): Ditto.
30215         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30216         * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
30217         (vslidedown): Ditto.
30218         (vslide1up): Ditto.
30219         (vslide1down): Ditto.
30220         (vfslide1up): Ditto.
30221         (vfslide1down): Ditto.
30222         (vrgather): Ditto.
30223         (vrgatherei16): Ditto.
30224         (vcompress): Ditto.
30225         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
30226         (vint8mf8_t): Ditto.
30227         (vint8mf4_t): Ditto.
30228         (vint8mf2_t): Ditto.
30229         (vint8m1_t): Ditto.
30230         (vint8m2_t): Ditto.
30231         (vint8m4_t): Ditto.
30232         (vint16mf4_t): Ditto.
30233         (vint16mf2_t): Ditto.
30234         (vint16m1_t): Ditto.
30235         (vint16m2_t): Ditto.
30236         (vint16m4_t): Ditto.
30237         (vint16m8_t): Ditto.
30238         (vint32mf2_t): Ditto.
30239         (vint32m1_t): Ditto.
30240         (vint32m2_t): Ditto.
30241         (vint32m4_t): Ditto.
30242         (vint32m8_t): Ditto.
30243         (vint64m1_t): Ditto.
30244         (vint64m2_t): Ditto.
30245         (vint64m4_t): Ditto.
30246         (vint64m8_t): Ditto.
30247         (vuint8mf8_t): Ditto.
30248         (vuint8mf4_t): Ditto.
30249         (vuint8mf2_t): Ditto.
30250         (vuint8m1_t): Ditto.
30251         (vuint8m2_t): Ditto.
30252         (vuint8m4_t): Ditto.
30253         (vuint16mf4_t): Ditto.
30254         (vuint16mf2_t): Ditto.
30255         (vuint16m1_t): Ditto.
30256         (vuint16m2_t): Ditto.
30257         (vuint16m4_t): Ditto.
30258         (vuint16m8_t): Ditto.
30259         (vuint32mf2_t): Ditto.
30260         (vuint32m1_t): Ditto.
30261         (vuint32m2_t): Ditto.
30262         (vuint32m4_t): Ditto.
30263         (vuint32m8_t): Ditto.
30264         (vuint64m1_t): Ditto.
30265         (vuint64m2_t): Ditto.
30266         (vuint64m4_t): Ditto.
30267         (vuint64m8_t): Ditto.
30268         (vfloat32mf2_t): Ditto.
30269         (vfloat32m1_t): Ditto.
30270         (vfloat32m2_t): Ditto.
30271         (vfloat32m4_t): Ditto.
30272         (vfloat32m8_t): Ditto.
30273         (vfloat64m1_t): Ditto.
30274         (vfloat64m2_t): Ditto.
30275         (vfloat64m4_t): Ditto.
30276         (vfloat64m8_t): Ditto.
30277         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
30278         * config/riscv/riscv.md: Adjust RVV instruction types.
30279         * config/riscv/vector-iterators.md (down): New iterator.
30280         (=vd,vr): New attribute.
30281         (UNSPEC_VSLIDE1UP): New unspec.
30282         * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
30283         (*pred_slide<ud><mode>): Ditto.
30284         (*pred_slide<ud><mode>_extended): Ditto.
30285         (@pred_gather<mode>): Ditto.
30286         (@pred_gather<mode>_scalar): Ditto.
30287         (@pred_gatherei16<mode>): Ditto.
30288         (@pred_compress<mode>): Ditto.
30289
30290 2023-03-05  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
30291
30292         * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
30293
30294 2023-03-05  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
30295
30296         * config/riscv/constraints.md (Wb1): New constraint.
30297         * config/riscv/predicates.md
30298         (vector_least_significant_set_mask_operand): New predicate.
30299         (vector_broadcast_mask_operand): Ditto.
30300         * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
30301         (gen_scalar_move_mask): New function.
30302         * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
30303         * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
30304         (class vmv_s): Ditto.
30305         (BASE): Ditto.
30306         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30307         * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
30308         (vmv_s): Ditto.
30309         (vfmv_f): Ditto.
30310         (vfmv_s): Ditto.
30311         * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
30312         (SHAPE): Ditto.
30313         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
30314         * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
30315         (function_expander::use_exact_insn): New function.
30316         (function_expander::use_contiguous_load_insn): New function.
30317         (function_expander::use_contiguous_store_insn): New function.
30318         (function_expander::use_ternop_insn): New function.
30319         (function_expander::use_widen_ternop_insn): New function.
30320         (function_expander::use_scalar_move_insn): New function.
30321         * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
30322         * config/riscv/riscv-vector-builtins.h
30323         (function_expander::add_scalar_move_mask_operand): New class.
30324         * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
30325         (scalar_move_insn_p): Ditto.
30326         (has_vsetvl_killed_avl_p): Ditto.
30327         (anticipatable_occurrence_p): Ditto.
30328         (insert_vsetvl): Ditto.
30329         (get_vl_vtype_info): Ditto.
30330         (calculate_sew): Ditto.
30331         (calculate_vlmul): Ditto.
30332         (incompatible_avl_p): Ditto.
30333         (different_sew_p): Ditto.
30334         (different_lmul_p): Ditto.
30335         (different_ratio_p): Ditto.
30336         (different_tail_policy_p): Ditto.
30337         (different_mask_policy_p): Ditto.
30338         (possible_zero_avl_p): Ditto.
30339         (first_ratio_invalid_for_second_sew_p): Ditto.
30340         (first_ratio_invalid_for_second_lmul_p): Ditto.
30341         (second_ratio_invalid_for_first_sew_p): Ditto.
30342         (second_ratio_invalid_for_first_lmul_p): Ditto.
30343         (second_sew_less_than_first_sew_p): Ditto.
30344         (first_sew_less_than_second_sew_p): Ditto.
30345         (compare_lmul): Ditto.
30346         (second_lmul_less_than_first_lmul_p): Ditto.
30347         (first_lmul_less_than_second_lmul_p): Ditto.
30348         (first_ratio_less_than_second_ratio_p): Ditto.
30349         (second_ratio_less_than_first_ratio_p): Ditto.
30350         (DEF_INCOMPATIBLE_COND): Ditto.
30351         (greatest_sew): Ditto.
30352         (first_sew): Ditto.
30353         (second_sew): Ditto.
30354         (first_vlmul): Ditto.
30355         (second_vlmul): Ditto.
30356         (first_ratio): Ditto.
30357         (second_ratio): Ditto.
30358         (vlmul_for_first_sew_second_ratio): Ditto.
30359         (ratio_for_second_sew_first_vlmul): Ditto.
30360         (DEF_SEW_LMUL_FUSE_RULE): Ditto.
30361         (always_unavailable): Ditto.
30362         (avl_unavailable_p): Ditto.
30363         (sew_unavailable_p): Ditto.
30364         (lmul_unavailable_p): Ditto.
30365         (ge_sew_unavailable_p): Ditto.
30366         (ge_sew_lmul_unavailable_p): Ditto.
30367         (ge_sew_ratio_unavailable_p): Ditto.
30368         (DEF_UNAVAILABLE_COND): Ditto.
30369         (same_sew_lmul_demand_p): Ditto.
30370         (propagate_avl_across_demands_p): Ditto.
30371         (reg_available_p): Ditto.
30372         (avl_info::has_non_zero_avl): Ditto.
30373         (vl_vtype_info::has_non_zero_avl): Ditto.
30374         (vector_insn_info::operator>=): Refactor.
30375         (vector_insn_info::parse_insn): Adjust for scalar move.
30376         (vector_insn_info::demand_vl_vtype): Remove.
30377         (vector_insn_info::compatible_p): New function.
30378         (vector_insn_info::compatible_avl_p): Ditto.
30379         (vector_insn_info::compatible_vtype_p): Ditto.
30380         (vector_insn_info::available_p): Ditto.
30381         (vector_insn_info::merge): Ditto.
30382         (vector_insn_info::fuse_avl): Ditto.
30383         (vector_insn_info::fuse_sew_lmul): Ditto.
30384         (vector_insn_info::fuse_tail_policy): Ditto.
30385         (vector_insn_info::fuse_mask_policy): Ditto.
30386         (vector_insn_info::dump): Ditto.
30387         (vector_infos_manager::release): Ditto.
30388         (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
30389         (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
30390         (pass_vsetvl::hard_empty_block_p): Ditto.
30391         (pass_vsetvl::backward_demand_fusion): Ditto.
30392         (pass_vsetvl::forward_demand_fusion): Ditto.
30393         (pass_vsetvl::refine_vsetvls): Ditto.
30394         (pass_vsetvl::cleanup_vsetvls): Ditto.
30395         (pass_vsetvl::commit_vsetvls): Ditto.
30396         (pass_vsetvl::propagate_avl): Ditto.
30397         * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
30398         (struct demands_pair): Ditto.
30399         (struct demands_cond): Ditto.
30400         (struct demands_fuse_rule): Ditto.
30401         * config/riscv/vector-iterators.md: New iterator.
30402         * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
30403         (*pred_broadcast<mode>): Ditto.
30404         (*pred_broadcast<mode>_extended_scalar): Ditto.
30405         (@pred_extract_first<mode>): Ditto.
30406         (*pred_extract_first<mode>): Ditto.
30407         (@pred_extract_first_trunc<mode>): Ditto.
30408         * config/riscv/riscv-vsetvl.def: New file.
30409
30410 2023-03-05  Lin Sinan  <sinan.lin@linux.alibaba.com>
30411
30412         * config/riscv/bitmanip.md: allow 0 constant in max/min
30413         pattern.
30414
30415 2023-03-05  Lin Sinan  <sinan.lin@linux.alibaba.com>
30416
30417         * config/riscv/bitmanip.md: Fix wrong index in the check.
30418
30419 2023-03-04  Jakub Jelinek  <jakub@redhat.com>
30420
30421         PR middle-end/109006
30422         * vec.cc (test_auto_alias): Adjust comment for removal of
30423         m_vecdata.
30424         * read-rtl-function.cc (function_reader::parse_block): Likewise.
30425         * gdbhooks.py: Likewise.
30426
30427 2023-03-04  Jakub Jelinek  <jakub@redhat.com>
30428
30429         PR testsuite/108973
30430         * selftest-diagnostic.cc
30431         (test_diagnostic_context::test_diagnostic_context): Set
30432         caret_max_width to 80.
30433
30434 2023-03-03  Alexandre Oliva  <oliva@adacore.com>
30435
30436         * gimple-ssa-warn-access.cc
30437         (pass_waccess::check_dangling_stores): Skip non-stores.
30438
30439 2023-03-03  Alexandre Oliva  <oliva@adacore.com>
30440
30441         * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
30442         after vmsr and vmrs, and lower the case of P0.
30443
30444 2023-03-03  Jonathan Wakely  <jwakely@redhat.com>
30445
30446         PR middle-end/109006
30447         * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
30448
30449 2023-03-03  Jonathan Wakely  <jwakely@redhat.com>
30450
30451         PR middle-end/109006
30452         * gdbhooks.py (VecPrinter): Adjust for new vec layout.
30453
30454 2023-03-03  Jakub Jelinek  <jakub@redhat.com>
30455
30456         PR c/108986
30457         * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
30458         Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
30459         suppressed on stmt.  For [static %E] warning, print access_nelts
30460         rather than access_size.  Fix up comment wording.
30461
30462 2023-03-03  Robin Dapp  <rdapp@linux.ibm.com>
30463
30464         * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
30465         arch14 instead of z16.
30466
30467 2023-03-03  Anthony Green  <green@moxielogic.com>
30468
30469         * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
30470
30471 2023-03-03  Anthony Green  <green@moxielogic.com>
30472
30473         * config/moxie/constraints.md (A, B, W): Change
30474         define_constraint to define_memory_constraint.
30475
30476 2023-03-03  Xi Ruoyao  <xry111@xry111.site>
30477
30478         * toplev.cc (process_options): Fix the spelling of
30479         "-fstack-clash-protection".
30480
30481 2023-03-03  Richard Biener  <rguenther@suse.de>
30482
30483         PR tree-optimization/109002
30484         * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
30485         PHI-translate ANTIC_IN.
30486
30487 2023-03-03  Jakub Jelinek  <jakub@redhat.com>
30488
30489         PR tree-optimization/108988
30490         * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
30491         size_type_node before passing it as argument to fwrite.  Formatting
30492         fixes.
30493
30494 2023-03-03  Richard Biener  <rguenther@suse.de>
30495
30496         PR target/108738
30497         * config/i386/i386.opt (--param x86-stv-max-visits): New param.
30498         * doc/invoke.texi (--param x86-stv-max-visits): Document it.
30499         * config/i386/i386-features.h (scalar_chain::max_visits): New.
30500         (scalar_chain::build): Add bitmap parameter, return boolean.
30501         (scalar_chain::add_insn): Likewise.
30502         (scalar_chain::analyze_register_chain): Likewise.
30503         * config/i386/i386-features.cc (scalar_chain::scalar_chain):
30504         Initialize max_visits.
30505         (scalar_chain::analyze_register_chain): When we exhaust
30506         max_visits, abort.  Also abort when running into any
30507         disallowed insn.
30508         (scalar_chain::add_insn): Propagate abort.
30509         (scalar_chain::build): Likewise.  When aborting amend
30510         the set of disallowed insn with the insns set.
30511         (convert_scalars_to_vector): Adjust.  Do not convert aborted
30512         chains.
30513
30514 2023-03-03  Richard Biener  <rguenther@suse.de>
30515
30516         PR debug/108772
30517         * dwarf2out.cc (dwarf2out_late_global_decl): Do not
30518         generate a DIE for a function scope static.
30519
30520 2023-03-03  Alexandre Oliva  <oliva@adacore.com>
30521
30522         * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
30523
30524 2023-03-02  Jakub Jelinek  <jakub@redhat.com>
30525
30526         PR target/108883
30527         * target.h (emit_support_tinfos_callback): New typedef.
30528         * targhooks.h (default_emit_support_tinfos): Declare.
30529         * targhooks.cc (default_emit_support_tinfos): New function.
30530         * target.def (emit_support_tinfos): New target hook.
30531         * doc/tm.texi.in (emit_support_tinfos): Document it.
30532         * doc/tm.texi: Regenerated.
30533         * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
30534         (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
30535
30536 2023-03-02  Vladimir N. Makarov  <vmakarov@redhat.com>
30537
30538         * ira-costs.cc: Include print-rtl.h.
30539         (record_reg_classes, scan_one_insn): Add code to print debug info.
30540         (record_operand_costs): Find and use smaller cost for hard reg
30541         move.
30542
30543 2023-03-02  Kwok Cheung Yeung  <kcy@codesourcery.com>
30544             Paul-Antoine Arras  <pa@codesourcery.com>
30545
30546         * builtins.cc (mathfn_built_in_explicit): New.
30547         * config/gcn/gcn.cc: Include case-cfn-macros.h.
30548         (mathfn_built_in_explicit): Add prototype.
30549         (gcn_vectorize_builtin_vectorized_function): New.
30550         (gcn_libc_has_function): New.
30551         (TARGET_LIBC_HAS_FUNCTION): Define.
30552         (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
30553
30554 2023-03-02  Richard Sandiford  <richard.sandiford@arm.com>
30555
30556         PR tree-optimization/108979
30557         * tree-vect-stmts.cc (vectorizable_operation): Don't mask
30558         operations on invariants.
30559
30560 2023-03-02  Robin Dapp  <rdapp@linux.ibm.com>
30561
30562         * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
30563         * config/s390/s390.cc (s390_option_override_internal): Make
30564         partial vector usage the default from z13 on.
30565         * config/s390/vector.md (len_load_v16qi): Add.
30566         (len_store_v16qi): Add.
30567
30568 2023-03-02  Andre Vieira  <andre.simoesdiasvieira@arm.com>
30569
30570         * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
30571         of constant 0 offset.
30572
30573 2023-03-02  Robert Suchanek  <robert.suchanek@imgtec.com>
30574
30575         * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
30576         instead of long.
30577         * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
30578
30579 2023-03-02  Junxian Zhu  <zhujunxian@oss.cipunited.com>
30580
30581         * config.gcc: add -with-{no-}msa build option.
30582         * config/mips/mips.h: Likewise.
30583         * doc/install.texi: Likewise.
30584
30585 2023-03-02  Richard Sandiford  <richard.sandiford@arm.com>
30586
30587         PR tree-optimization/108603
30588         * explow.cc (convert_memory_address_addr_space_1): Only wrap
30589         the result of a recursive call in a CONST if no instructions
30590         were emitted.
30591
30592 2023-03-02  Richard Sandiford  <richard.sandiford@arm.com>
30593
30594         PR tree-optimization/108430
30595         * tree-vect-stmts.cc (vectorizable_condition): Fix handling
30596         of inverted condition.
30597
30598 2023-03-02  Jakub Jelinek  <jakub@redhat.com>
30599
30600         PR c++/108934
30601         * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
30602         comparison copy the bytes from ptr to a temporary buffer and clearing
30603         padding bits in there.
30604
30605 2023-03-01  Tobias Burnus  <tobias@codesourcery.com>
30606
30607         PR middle-end/108545
30608         * gimplify.cc (struct tree_operand_hash_no_se): New.
30609         (omp_index_mapping_groups_1, omp_index_mapping_groups,
30610         omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
30611         omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
30612         oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
30613         gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
30614         of tree_operand_hash.
30615
30616 2023-03-01  LIU Hao  <lh_mouse@126.com>
30617
30618         PR pch/14940
30619         * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
30620         Remove the size limit `pch_VA_max_size`
30621
30622 2023-03-01  Tobias Burnus  <tobias@codesourcery.com>
30623
30624         PR middle-end/108546
30625         * omp-low.cc (lower_omp_target): Remove optional handling
30626         on the receiver side, i.e. inside target (data), for
30627         use_device_ptr.
30628
30629 2023-03-01  Jakub Jelinek  <jakub@redhat.com>
30630
30631         PR debug/108967
30632         * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
30633         and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
30634
30635 2023-03-01  Richard Biener  <rguenther@suse.de>
30636
30637         PR tree-optimization/108970
30638         * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
30639         Check we can copy the BBs.
30640         (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
30641         check.
30642         (vect_do_peeling): Streamline error handling.
30643
30644 2023-03-01  Richard Biener  <rguenther@suse.de>
30645
30646         PR tree-optimization/108950
30647         * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
30648         Check oprnd0 is defined in the loop.
30649         * tree-vect-loop.cc (vectorizable_reduction): Record all
30650         operands vector types, compute that of invariants and
30651         properly update their SLP nodes.
30652
30653 2023-03-01  Kewen Lin  <linkw@linux.ibm.com>
30654
30655         PR target/108240
30656         * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
30657         implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
30658
30659 2023-02-28  Qing Zhao  <qing.zhao@oracle.com>
30660
30661         PR middle-end/107411
30662         PR middle-end/107411
30663         * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
30664         xasprintf.
30665         * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
30666         LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
30667
30668 2023-02-28  Jakub Jelinek  <jakub@redhat.com>
30669
30670         PR sanitizer/108894
30671         * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
30672         comparison rather than index > bound.
30673         * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
30674         rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
30675         * doc/invoke.texi (-fsanitize=bounds): Document that whether
30676         flexible array member-like arrays are instrumented or not depends
30677         on -fstrict-flex-arrays* options of strict_flex_array attributes.
30678         (-fsanitize=bounds-strict): Document that flexible array members
30679         are not instrumented.
30680
30681 2023-02-27  Uroš Bizjak  <ubizjak@gmail.com>
30682
30683         PR target/108922
30684         Revert:
30685         * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
30686         (fmod<mode>3): Ditto.
30687         (fpremxf4_i387): Ditto.
30688         (reminderxf3): Ditto.
30689         (reminder<mode>3): Ditto.
30690         (fprem1xf4_i387): Ditto.
30691
30692 2023-02-27  Roger Sayle  <roger@nextmovesoftware.com>
30693
30694         * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
30695         generating FFS with mismatched operand and result modes, by using
30696         an explicit SIGN_EXTEND/ZERO_EXTEND.
30697         <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
30698         <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
30699
30700 2023-02-27  Patrick Palka  <ppalka@redhat.com>
30701
30702         * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
30703         * lra-int.h (lra_change_class): Likewise.
30704         * recog.h (which_op_alt): Likewise.
30705         * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
30706         instead of static.
30707
30708 2023-02-27  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
30709
30710         * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
30711         New prototype.
30712         * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
30713         New function.
30714         * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
30715         * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
30716
30717 2023-02-27  Max Filippov  <jcmvbkbc@gmail.com>
30718
30719         * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
30720         (xtensa_get_config_v3): New functions.
30721
30722 2023-02-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
30723
30724         * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
30725
30726 2023-02-27  Lulu Cheng  <chenglulu@loongson.cn>
30727
30728         * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
30729         the macro to 0x1000000000.
30730
30731 2023-02-25  Gaius Mulley  <gaiusmod2@gmail.com>
30732
30733         PR modula2/108261
30734         * doc/gm2.texi (-fm2-pathname): New option documented.
30735         (-fm2-pathnameI): New option documented.
30736         (-fm2-prefix=): New option documented.
30737         (-fruntime-modules=): Update default module list.
30738
30739 2023-02-25  Max Filippov  <jcmvbkbc@gmail.com>
30740
30741         PR target/108919
30742         * config/xtensa/xtensa-protos.h
30743         (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
30744         * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
30745         to xtensa_expand_call.
30746         (xtensa_expand_call): Emit the call and add a clobber expression
30747         for the static chain to it in case of windowed ABI.
30748         * config/xtensa/xtensa.md (call, call_value, sibcall)
30749         (sibcall_value): Call xtensa_expand_call and complete expansion
30750         right after that call.
30751
30752 2023-02-24  Richard Biener  <rguenther@suse.de>
30753
30754         * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
30755         (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
30756         changing alignment of vec<T, A, vl_embed> and simplifying
30757         address.
30758         (vec<T, A, vl_embed>::address): Compute as this + 1.
30759         (vec<T, A, vl_embed>::embedded_size): Use sizeof the
30760         vector instead of the offset of the m_vecdata member.
30761         (auto_vec<T, N>::m_data): Turn storage into
30762         uninitialized unsigned char.
30763         (auto_vec<T, N>::auto_vec): Allow allocation of one
30764         stack member.  Initialize m_vec in a special way to
30765         avoid later stringop overflow diagnostics.
30766         * vec.cc (test_auto_alias): New.
30767         (vec_cc_tests): Call it.
30768
30769 2023-02-24  Richard Biener  <rguenther@suse.de>
30770
30771         * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
30772         take a const reference to the object, use address to
30773         access data.
30774         (vec<T, A, vl_embed>::contains): Use address to access data.
30775         (vec<T, A, vl_embed>::operator[]): Use address instead of
30776         m_vecdata to access data.
30777         (vec<T, A, vl_embed>::iterate): Likewise.
30778         (vec<T, A, vl_embed>::copy): Likewise.
30779         (vec<T, A, vl_embed>::quick_push): Likewise.
30780         (vec<T, A, vl_embed>::pop): Likewise.
30781         (vec<T, A, vl_embed>::quick_insert): Likewise.
30782         (vec<T, A, vl_embed>::ordered_remove): Likewise.
30783         (vec<T, A, vl_embed>::unordered_remove): Likewise.
30784         (vec<T, A, vl_embed>::block_remove): Likewise.
30785         (vec<T, A, vl_heap>::address): Likewise.
30786
30787 2023-02-24  Martin Liska  <mliska@suse.cz>
30788
30789         PR sanitizer/108834
30790         * asan.cc (asan_add_global): Use proper TU name for normal
30791         global variables (and aux_base_name for the artificial one).
30792
30793 2023-02-24  Jakub Jelinek  <jakub@redhat.com>
30794
30795         * config/i386/i386-builtin.def: Update description of BDESC
30796         and BDESC_FIRST in file comment to include mask2.
30797
30798 2023-02-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
30799
30800         * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
30801
30802 2023-02-24  Jakub Jelinek  <jakub@redhat.com>
30803
30804         PR middle-end/108854
30805         * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
30806         changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
30807         nodes and adjust their DECL_CONTEXT.
30808
30809 2023-02-24  Jakub Jelinek  <jakub@redhat.com>
30810
30811         PR target/108881
30812         * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
30813         __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
30814         __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
30815         __builtin_ia32_cvtne2ps2bf16_v8bf,
30816         __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
30817         __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
30818         __builtin_ia32_cvtneps2bf16_v8sf_mask,
30819         __builtin_ia32_cvtneps2bf16_v8sf_maskz,
30820         __builtin_ia32_cvtneps2bf16_v4sf_mask,
30821         __builtin_ia32_cvtneps2bf16_v4sf_maskz,
30822         __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
30823         __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
30824         __builtin_ia32_dpbf16ps_v4sf_mask,
30825         __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
30826         OPTION_MASK_ISA_AVX512VL.
30827
30828 2023-02-24  Sebastian Huber  <sebastian.huber@embedded-brains.de>
30829
30830         * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
30831         Add non-compact 32-bit multilibs.
30832
30833 2023-02-24  Junxian Zhu  <zhujunxian@oss.cipunited.com>
30834
30835         * config/mips/mips.md (*clo<mode>2): New pattern.
30836
30837 2023-02-24  Prachi Godbole  <prachi.godbole@imgtec.com>
30838
30839         * config/mips/mips.h (machine_function): New variable
30840         use_hazard_barrier_return_p.
30841         * config/mips/mips.md (UNSPEC_JRHB): New unspec.
30842         (mips_hb_return_internal): New insn pattern.
30843         * config/mips/mips.cc (mips_attribute_table): Add attribute
30844         use_hazard_barrier_return.
30845         (mips_use_hazard_barrier_return_p): New static function.
30846         (mips_function_attr_inlinable_p): Likewise.
30847         (mips_compute_frame_info): Set use_hazard_barrier_return_p.
30848         Emit error for unsupported architecture choice.
30849         (mips_function_ok_for_sibcall, mips_can_use_return_insn):
30850         Return false for use_hazard_barrier_return.
30851         (mips_expand_epilogue): Emit hazard barrier return.
30852         * doc/extend.texi: Document use_hazard_barrier_return.
30853
30854 2023-02-23  Max Filippov  <jcmvbkbc@gmail.com>
30855
30856         * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
30857         (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
30858         for the gcc-internal headers.
30859
30860 2023-02-23  Max Filippov  <jcmvbkbc@gmail.com>
30861
30862         * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
30863         and $(POSTCOMPILE) instead of manual dependency listing.
30864         * config/xtensa/xtensa-dynconfig.c: Rename to ...
30865         * config/xtensa/xtensa-dynconfig.cc: ... this.
30866
30867 2023-02-23  Arsen Arsenović  <arsen@aarsen.me>
30868
30869         * doc/cfg.texi: Reorder index entries around @items.
30870         * doc/cpp.texi: Ditto.
30871         * doc/cppenv.texi: Ditto.
30872         * doc/cppopts.texi: Ditto.
30873         * doc/generic.texi: Ditto.
30874         * doc/install.texi: Ditto.
30875         * doc/extend.texi: Ditto.
30876         * doc/invoke.texi: Ditto.
30877         * doc/md.texi: Ditto.
30878         * doc/rtl.texi: Ditto.
30879         * doc/tm.texi.in: Ditto.
30880         * doc/trouble.texi: Ditto.
30881         * doc/tm.texi: Regenerate.
30882
30883 2023-02-23  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
30884
30885         * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
30886         the occurrence of general-purpose register used only once and for
30887         transferring intermediate value.
30888
30889 2023-02-23  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
30890
30891         * config/xtensa/xtensa.cc (machine_function): Add new member
30892         'eliminated_callee_saved_bmp'.
30893         (xtensa_can_eliminate_callee_saved_reg_p): New function to
30894         determine whether the register can be eliminated or not.
30895         (xtensa_expand_prologue): Add invoking the above function and
30896         elimination the use of callee-saved register by using its stack
30897         slot through the stack pointer (or the frame pointer if needed)
30898         directly.
30899         (xtensa_expand_prologue): Modify to not emit register restoration
30900         insn from its stack slot if the register is already eliminated.
30901
30902 2023-02-23  Jakub Jelinek  <jakub@redhat.com>
30903
30904         PR translation/108890
30905         * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
30906         around fatal_error format strings.
30907
30908 2023-02-23  Richard Biener  <rguenther@suse.de>
30909
30910         * tree-ssa-structalias.cc (handle_lhs_call): Do not
30911         re-create rhsc, only truncate it.
30912
30913 2023-02-23  Jakub Jelinek  <jakub@redhat.com>
30914
30915         PR middle-end/106258
30916         * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
30917         BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
30918
30919 2023-02-23  Richard Biener  <rguenther@suse.de>
30920
30921         * tree-if-conv.cc (tree_if_conversion): Properly manage
30922         memory of refs and the contained data references.
30923
30924 2023-02-23  Richard Biener  <rguenther@suse.de>
30925
30926         PR tree-optimization/108888
30927         * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
30928         calls to predicate.
30929         (predicate_statements): Only predicate calls with PLF_2.
30930
30931 2023-02-23  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
30932
30933         * config/xtensa/xtensa.md
30934         (zero_cost_loop_start, zero_cost_loop_end, loop_end):
30935         Add missing "SI:" to PLUS RTXes.
30936
30937 2023-02-23  Max Filippov  <jcmvbkbc@gmail.com>
30938
30939         PR target/108876
30940         * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
30941         Emit (use (reg:SI A0_REG)) at the end in the sibling call
30942         (i.e. the same place as (return) in the normal call).
30943
30944 2023-02-23  Max Filippov  <jcmvbkbc@gmail.com>
30945
30946         Revert:
30947         2023-02-21  Max Filippov  <jcmvbkbc@gmail.com>
30948
30949         PR target/108876
30950         * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
30951         for A0_REG.
30952         * config/xtensa/xtensa.md (sibcall, sibcall_internal)
30953         (sibcall_value, sibcall_value_internal): Add 'use' expression
30954         for A0_REG.
30955
30956 2023-02-23  Arsen Arsenović  <arsen@aarsen.me>
30957
30958         * doc/cppdiropts.texi: Reorder @opindex commands to precede
30959         @items they relate to.
30960         * doc/cppopts.texi: Ditto.
30961         * doc/cppwarnopts.texi: Ditto.
30962         * doc/invoke.texi: Ditto.
30963         * doc/lto.texi: Ditto.
30964
30965 2023-02-22  Andrew Stubbs  <ams@codesourcery.com>
30966
30967         * internal-fn.cc (expand_MASK_CALL): New.
30968         * internal-fn.def (MASK_CALL): New.
30969         * internal-fn.h (expand_MASK_CALL): New prototype.
30970         * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
30971         for mask arguments also.
30972         * tree-if-conv.cc: Include cgraph.h.
30973         (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
30974         (predicate_statements): Convert functions to IFN_MASK_CALL.
30975         * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
30976         IFN_MASK_CALL as a SIMD function call.
30977         * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
30978         IFN_MASK_CALL as an inbranch SIMD function call.
30979         Generate the mask vector arguments.
30980
30981 2023-02-22  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
30982
30983         * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
30984         (class widen_reducop): Ditto.
30985         (class freducop): Ditto.
30986         (class widen_freducop): Ditto.
30987         (BASE): Ditto.
30988         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30989         * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
30990         (vredmaxu): Ditto.
30991         (vredmax): Ditto.
30992         (vredminu): Ditto.
30993         (vredmin): Ditto.
30994         (vredand): Ditto.
30995         (vredor): Ditto.
30996         (vredxor): Ditto.
30997         (vwredsum): Ditto.
30998         (vwredsumu): Ditto.
30999         (vfredusum): Ditto.
31000         (vfredosum): Ditto.
31001         (vfredmax): Ditto.
31002         (vfredmin): Ditto.
31003         (vfwredosum): Ditto.
31004         (vfwredusum): Ditto.
31005         * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
31006         (SHAPE): Ditto.
31007         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
31008         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
31009         (DEF_RVV_WU_OPS): Ditto.
31010         (DEF_RVV_WF_OPS): Ditto.
31011         (vint8mf8_t): Ditto.
31012         (vint8mf4_t): Ditto.
31013         (vint8mf2_t): Ditto.
31014         (vint8m1_t): Ditto.
31015         (vint8m2_t): Ditto.
31016         (vint8m4_t): Ditto.
31017         (vint8m8_t): Ditto.
31018         (vint16mf4_t): Ditto.
31019         (vint16mf2_t): Ditto.
31020         (vint16m1_t): Ditto.
31021         (vint16m2_t): Ditto.
31022         (vint16m4_t): Ditto.
31023         (vint16m8_t): Ditto.
31024         (vint32mf2_t): Ditto.
31025         (vint32m1_t): Ditto.
31026         (vint32m2_t): Ditto.
31027         (vint32m4_t): Ditto.
31028         (vint32m8_t): Ditto.
31029         (vuint8mf8_t): Ditto.
31030         (vuint8mf4_t): Ditto.
31031         (vuint8mf2_t): Ditto.
31032         (vuint8m1_t): Ditto.
31033         (vuint8m2_t): Ditto.
31034         (vuint8m4_t): Ditto.
31035         (vuint8m8_t): Ditto.
31036         (vuint16mf4_t): Ditto.
31037         (vuint16mf2_t): Ditto.
31038         (vuint16m1_t): Ditto.
31039         (vuint16m2_t): Ditto.
31040         (vuint16m4_t): Ditto.
31041         (vuint16m8_t): Ditto.
31042         (vuint32mf2_t): Ditto.
31043         (vuint32m1_t): Ditto.
31044         (vuint32m2_t): Ditto.
31045         (vuint32m4_t): Ditto.
31046         (vuint32m8_t): Ditto.
31047         (vfloat32mf2_t): Ditto.
31048         (vfloat32m1_t): Ditto.
31049         (vfloat32m2_t): Ditto.
31050         (vfloat32m4_t): Ditto.
31051         (vfloat32m8_t): Ditto.
31052         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
31053         (DEF_RVV_WU_OPS): Ditto.
31054         (DEF_RVV_WF_OPS): Ditto.
31055         (required_extensions_p): Add reduction support.
31056         (rvv_arg_type_info::get_base_vector_type): Ditto.
31057         (rvv_arg_type_info::get_tree_type): Ditto.
31058         * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
31059         * config/riscv/riscv.md: Ditto.
31060         * config/riscv/vector-iterators.md (minu): Ditto.
31061         * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
31062         (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
31063         (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
31064         (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
31065         (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
31066         (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
31067         (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
31068
31069 2023-02-22  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
31070
31071         * config/riscv/iterators.md: New iterator.
31072         * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
31073         (enum ternop_type): New enum.
31074         (class vmacc): New class.
31075         (class imac): Ditto.
31076         (class vnmsac): Ditto.
31077         (enum widen_ternop_type): New enum.
31078         (class vmadd): Ditto.
31079         (class vnmsub): Ditto.
31080         (class iwmac): Ditto.
31081         (class vwmacc): Ditto.
31082         (class vwmaccu): Ditto.
31083         (class vwmaccsu): Ditto.
31084         (class vwmaccus): Ditto.
31085         (class reverse_binop): Ditto.
31086         (class vfmacc): Ditto.
31087         (class vfnmsac): Ditto.
31088         (class vfmadd): Ditto.
31089         (class vfnmsub): Ditto.
31090         (class vfnmacc): Ditto.
31091         (class vfmsac): Ditto.
31092         (class vfnmadd): Ditto.
31093         (class vfmsub): Ditto.
31094         (class vfwmacc): Ditto.
31095         (class vfwnmacc): Ditto.
31096         (class vfwmsac): Ditto.
31097         (class vfwnmsac): Ditto.
31098         (class float_misc): Ditto.
31099         (class fcmp): Ditto.
31100         (class vfclass): Ditto.
31101         (class vfcvt_x): Ditto.
31102         (class vfcvt_rtz_x): Ditto.
31103         (class vfcvt_f): Ditto.
31104         (class vfwcvt_x): Ditto.
31105         (class vfwcvt_rtz_x): Ditto.
31106         (class vfwcvt_f): Ditto.
31107         (class vfncvt_x): Ditto.
31108         (class vfncvt_rtz_x): Ditto.
31109         (class vfncvt_f): Ditto.
31110         (class vfncvt_rod_f): Ditto.
31111         (BASE): Ditto.
31112         * config/riscv/riscv-vector-builtins-bases.h:
31113         * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
31114         (vsext): Ditto.
31115         (vfadd): Ditto.
31116         (vfsub): Ditto.
31117         (vfrsub): Ditto.
31118         (vfwadd): Ditto.
31119         (vfwsub): Ditto.
31120         (vfmul): Ditto.
31121         (vfdiv): Ditto.
31122         (vfrdiv): Ditto.
31123         (vfwmul): Ditto.
31124         (vfmacc): Ditto.
31125         (vfnmsac): Ditto.
31126         (vfmadd): Ditto.
31127         (vfnmsub): Ditto.
31128         (vfnmacc): Ditto.
31129         (vfmsac): Ditto.
31130         (vfnmadd): Ditto.
31131         (vfmsub): Ditto.
31132         (vfwmacc): Ditto.
31133         (vfwnmacc): Ditto.
31134         (vfwmsac): Ditto.
31135         (vfwnmsac): Ditto.
31136         (vfsqrt): Ditto.
31137         (vfrsqrt7): Ditto.
31138         (vfrec7): Ditto.
31139         (vfmin): Ditto.
31140         (vfmax): Ditto.
31141         (vfsgnj): Ditto.
31142         (vfsgnjn): Ditto.
31143         (vfsgnjx): Ditto.
31144         (vfneg): Ditto.
31145         (vfabs): Ditto.
31146         (vmfeq): Ditto.
31147         (vmfne): Ditto.
31148         (vmflt): Ditto.
31149         (vmfle): Ditto.
31150         (vmfgt): Ditto.
31151         (vmfge): Ditto.
31152         (vfclass): Ditto.
31153         (vfmerge): Ditto.
31154         (vfmv_v): Ditto.
31155         (vfcvt_x): Ditto.
31156         (vfcvt_xu): Ditto.
31157         (vfcvt_rtz_x): Ditto.
31158         (vfcvt_rtz_xu): Ditto.
31159         (vfcvt_f): Ditto.
31160         (vfwcvt_x): Ditto.
31161         (vfwcvt_xu): Ditto.
31162         (vfwcvt_rtz_x): Ditto.
31163         (vfwcvt_rtz_xu): Ditto.
31164         (vfwcvt_f): Ditto.
31165         (vfncvt_x): Ditto.
31166         (vfncvt_xu): Ditto.
31167         (vfncvt_rtz_x): Ditto.
31168         (vfncvt_rtz_xu): Ditto.
31169         (vfncvt_f): Ditto.
31170         (vfncvt_rod_f): Ditto.
31171         * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
31172         (struct move_def): Ditto.
31173         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
31174         (DEF_RVV_CONVERT_I_OPS): Ditto.
31175         (DEF_RVV_CONVERT_U_OPS): Ditto.
31176         (DEF_RVV_WCONVERT_I_OPS): Ditto.
31177         (DEF_RVV_WCONVERT_U_OPS): Ditto.
31178         (DEF_RVV_WCONVERT_F_OPS): Ditto.
31179         (vfloat64m1_t): Ditto.
31180         (vfloat64m2_t): Ditto.
31181         (vfloat64m4_t): Ditto.
31182         (vfloat64m8_t): Ditto.
31183         (vint32mf2_t): Ditto.
31184         (vint32m1_t): Ditto.
31185         (vint32m2_t): Ditto.
31186         (vint32m4_t): Ditto.
31187         (vint32m8_t): Ditto.
31188         (vint64m1_t): Ditto.
31189         (vint64m2_t): Ditto.
31190         (vint64m4_t): Ditto.
31191         (vint64m8_t): Ditto.
31192         (vuint32mf2_t): Ditto.
31193         (vuint32m1_t): Ditto.
31194         (vuint32m2_t): Ditto.
31195         (vuint32m4_t): Ditto.
31196         (vuint32m8_t): Ditto.
31197         (vuint64m1_t): Ditto.
31198         (vuint64m2_t): Ditto.
31199         (vuint64m4_t): Ditto.
31200         (vuint64m8_t): Ditto.
31201         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
31202         (DEF_RVV_CONVERT_U_OPS): Ditto.
31203         (DEF_RVV_WCONVERT_I_OPS): Ditto.
31204         (DEF_RVV_WCONVERT_U_OPS): Ditto.
31205         (DEF_RVV_WCONVERT_F_OPS): Ditto.
31206         (DEF_RVV_F_OPS): Ditto.
31207         (DEF_RVV_WEXTF_OPS): Ditto.
31208         (required_extensions_p): Adjust for floating-point support.
31209         (check_required_extensions): Ditto.
31210         (unsigned_base_type_p): Ditto.
31211         (get_mode_for_bitsize): Ditto.
31212         (rvv_arg_type_info::get_base_vector_type): Ditto.
31213         (rvv_arg_type_info::get_tree_type): Ditto.
31214         * config/riscv/riscv-vector-builtins.def (v_f): New define.
31215         (f): New define.
31216         (f_v): New define.
31217         (xu_v): New define.
31218         (f_w): New define.
31219         (xu_w): New define.
31220         * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
31221         (function_expander::arg_mode): New function.
31222         * config/riscv/vector-iterators.md (sof): New iterator.
31223         (vfrecp): Ditto.
31224         (copysign): Ditto.
31225         (n): Ditto.
31226         (msac): Ditto.
31227         (msub): Ditto.
31228         (fixuns_trunc): Ditto.
31229         (floatuns): Ditto.
31230         * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
31231         (@pred_<optab><mode>): Ditto.
31232         (@pred_<optab><mode>_scalar): Ditto.
31233         (@pred_<optab><mode>_reverse_scalar): Ditto.
31234         (@pred_<copysign><mode>): Ditto.
31235         (@pred_<copysign><mode>_scalar): Ditto.
31236         (@pred_mul_<optab><mode>): Ditto.
31237         (pred_mul_<optab><mode>_undef_merge): Ditto.
31238         (*pred_<madd_nmsub><mode>): Ditto.
31239         (*pred_<macc_nmsac><mode>): Ditto.
31240         (*pred_mul_<optab><mode>): Ditto.
31241         (@pred_mul_<optab><mode>_scalar): Ditto.
31242         (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
31243         (*pred_<madd_nmsub><mode>_scalar): Ditto.
31244         (*pred_<macc_nmsac><mode>_scalar): Ditto.
31245         (*pred_mul_<optab><mode>_scalar): Ditto.
31246         (@pred_neg_mul_<optab><mode>): Ditto.
31247         (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
31248         (*pred_<nmadd_msub><mode>): Ditto.
31249         (*pred_<nmacc_msac><mode>): Ditto.
31250         (*pred_neg_mul_<optab><mode>): Ditto.
31251         (@pred_neg_mul_<optab><mode>_scalar): Ditto.
31252         (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
31253         (*pred_<nmadd_msub><mode>_scalar): Ditto.
31254         (*pred_<nmacc_msac><mode>_scalar): Ditto.
31255         (*pred_neg_mul_<optab><mode>_scalar): Ditto.
31256         (@pred_<misc_op><mode>): Ditto.
31257         (@pred_class<mode>): Ditto.
31258         (@pred_dual_widen_<optab><mode>): Ditto.
31259         (@pred_dual_widen_<optab><mode>_scalar): Ditto.
31260         (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
31261         (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
31262         (@pred_widen_mul_<optab><mode>): Ditto.
31263         (@pred_widen_mul_<optab><mode>_scalar): Ditto.
31264         (@pred_widen_neg_mul_<optab><mode>): Ditto.
31265         (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
31266         (@pred_cmp<mode>): Ditto.
31267         (*pred_cmp<mode>): Ditto.
31268         (*pred_cmp<mode>_narrow): Ditto.
31269         (@pred_cmp<mode>_scalar): Ditto.
31270         (*pred_cmp<mode>_scalar): Ditto.
31271         (*pred_cmp<mode>_scalar_narrow): Ditto.
31272         (@pred_eqne<mode>_scalar): Ditto.
31273         (*pred_eqne<mode>_scalar): Ditto.
31274         (*pred_eqne<mode>_scalar_narrow): Ditto.
31275         (@pred_merge<mode>_scalar): Ditto.
31276         (@pred_fcvt_x<v_su>_f<mode>): Ditto.
31277         (@pred_<fix_cvt><mode>): Ditto.
31278         (@pred_<float_cvt><mode>): Ditto.
31279         (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
31280         (@pred_widen_<fix_cvt><mode>): Ditto.
31281         (@pred_widen_<float_cvt><mode>): Ditto.
31282         (@pred_extend<mode>): Ditto.
31283         (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
31284         (@pred_narrow_<fix_cvt><mode>): Ditto.
31285         (@pred_narrow_<float_cvt><mode>): Ditto.
31286         (@pred_trunc<mode>): Ditto.
31287         (@pred_rod_trunc<mode>): Ditto.
31288
31289 2023-02-22  Jakub Jelinek  <jakub@redhat.com>
31290
31291         PR middle-end/106258
31292         * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
31293         cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
31294         Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
31295         * cgraphclones.cc (cgraph_node::create_clone): Likewise.
31296
31297 2023-02-22  Thomas Schwinge  <thomas@codesourcery.com>
31298
31299         * common.opt (-Wcomplain-wrong-lang): New.
31300         * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
31301         * opts-common.cc (prune_options): Handle it.
31302         * opts-global.cc (complain_wrong_lang): Use it.
31303
31304 2023-02-21  David Malcolm  <dmalcolm@redhat.com>
31305
31306         PR analyzer/108830
31307         * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
31308
31309 2023-02-21  Max Filippov  <jcmvbkbc@gmail.com>
31310
31311         PR target/108876
31312         * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
31313         for A0_REG.
31314         * config/xtensa/xtensa.md (sibcall, sibcall_internal)
31315         (sibcall_value, sibcall_value_internal): Add 'use' expression
31316         for A0_REG.
31317
31318 2023-02-21  Richard Biener  <rguenther@suse.de>
31319
31320         PR tree-optimization/108691
31321         * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
31322         assert about calls_setjmp not becoming true when it was false.
31323
31324 2023-02-21  Richard Biener  <rguenther@suse.de>
31325
31326         PR tree-optimization/108793
31327         * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
31328         Use convert operands to niter_type when computing num.
31329
31330 2023-02-21  Richard Biener  <rguenther@suse.de>
31331
31332         Revert:
31333         2023-02-13  Richard Biener  <rguenther@suse.de>
31334
31335         PR tree-optimization/108691
31336         * tree-cfg.cc (notice_special_calls): When the CFG is built
31337         honor gimple_call_ctrl_altering_p.
31338         * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
31339         temporarily if the call is not control-altering.
31340         * calls.cc (emit_call_1): Do not add REG_SETJMP if
31341         cfun->calls_setjmp is not set.  Do not alter cfun->calls_setjmp.
31342
31343 2023-02-21  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
31344
31345         * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
31346         true if register A0 (return address register) when -Og is specified.
31347
31348 2023-02-20  Uroš Bizjak  <ubizjak@gmail.com>
31349
31350         * config/i386/predicates.md
31351         (general_x64constmem_operand): New predicate.
31352         * config/i386/i386.md (*cmpqi_ext<mode>_1):
31353         Use nonimm_x64constmem_operand.
31354         (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
31355         (*addqi_ext<mode>_1): Ditto.
31356         (*testqi_ext<mode>_1): Ditto.
31357         (*andqi_ext<mode>_1): Ditto.
31358         (*andqi_ext<mode>_1_cc): Ditto.
31359         (*<any_or:code>qi_ext<mode>_1): Ditto.
31360         (*xorqi_ext<mode>_1_cc): Ditto.
31361
31362 2023-02-20  Jakub Jelinek  <jakub2redhat.com>
31363
31364         PR target/108862
31365         * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
31366         gen_umadddi4_highpart{,_le}.
31367
31368 2023-02-20  Kito Cheng  <kito.cheng@sifive.com>
31369
31370         * config/riscv/riscv.md (prefetch): Use r instead of p for the
31371         address operand.
31372         (riscv_prefetchi_<mode>): Ditto.
31373
31374 2023-02-20  Richard Biener  <rguenther@suse.de>
31375
31376         PR tree-optimization/108816
31377         * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
31378         versioning condition split prerequesite, assert required
31379         invariant.
31380
31381 2023-02-20  Richard Biener  <rguenther@suse.de>
31382
31383         PR tree-optimization/108825
31384         * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
31385         loop-local verfication only verify there's no pending SSA
31386         update.
31387
31388 2023-02-20  Richard Biener  <rguenther@suse.de>
31389
31390         PR tree-optimization/108819
31391         * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
31392         we have an SSA name as iv_2 as expected.
31393
31394 2023-02-18  Jakub Jelinek  <jakub@redhat.com>
31395
31396         PR tree-optimization/108819
31397         * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
31398
31399 2023-02-18  Jakub Jelinek  <jakub@redhat.com>
31400
31401         PR target/108832
31402         * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
31403         * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
31404         function.
31405         * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
31406         with ix86_replace_reg_with_reg.
31407
31408 2023-02-18  Gerald Pfeifer  <gerald@pfeifer.com>
31409
31410         * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
31411
31412 2023-02-18  Xi Ruoyao  <xry111@xry111.site>
31413
31414         * config.gcc (triplet_abi): Set its value based on $with_abi,
31415         instead of $target.
31416         (la_canonical_triplet): Set it after $triplet_abi is set
31417         correctly.
31418         * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
31419         multiarch tuple for lp64d "loongarch64-linux-gnu" (without
31420         "f64" suffix).
31421
31422 2023-02-18  Andrew Pinski  <apinski@marvell.com>
31423
31424         * match.pd: Remove #if GIMPLE around the
31425         "1 - a" pattern
31426
31427 2023-02-18  Andrew Pinski  <apinski@marvell.com>
31428
31429         * value-query.h (get_range_query): Return the global ranges
31430         for a nullptr func.
31431
31432 2023-02-17  Siddhesh Poyarekar  <siddhesh@gotplt.org>
31433
31434         * doc/invoke.texi (@item -Wall): Fix typo in
31435         -Wuse-after-free.
31436
31437 2023-02-17  Uroš Bizjak  <ubizjak@gmail.com>
31438
31439         PR target/108831
31440         * config/i386/predicates.md
31441         (nonimm_x64constmem_operand): New predicate.
31442         * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
31443         (*subqi_ext<mode>_0): Ditto.
31444         (*andqi_ext<mode>_0): Ditto.
31445         (*<any_or:code>qi_ext<mode>_0): Ditto.
31446
31447 2023-02-17  Uroš Bizjak  <ubizjak@gmail.com>
31448
31449         PR target/108805
31450         * simplify-rtx.cc (simplify_context::simplify_subreg): Use
31451         int_outermode instead of GET_MODE (tem) to prevent
31452         VOIDmode from entering simplify_gen_subreg.
31453
31454 2023-02-17  Richard Biener  <rguenther@suse.de>
31455
31456         PR tree-optimization/108821
31457         * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
31458         move volatile accesses.
31459
31460 2023-02-17  Richard Biener  <rguenther@suse.de>
31461
31462         * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
31463         called on virtual operands.
31464         * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
31465         ssa_undefined_value_p calls.
31466         (vn_phi_insert): Likewise.
31467         (set_ssa_val_to): Likewise.
31468         (visit_phi): Avoid extra work with equivalences for
31469         virtual operand PHIs.
31470
31471 2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
31472
31473         * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
31474         class.
31475         (class mask_nlogic): Ditto.
31476         (class mask_notlogic): Ditto.
31477         (class vmmv): Ditto.
31478         (class vmclr): Ditto.
31479         (class vmset): Ditto.
31480         (class vmnot): Ditto.
31481         (class vcpop): Ditto.
31482         (class vfirst): Ditto.
31483         (class mask_misc): Ditto.
31484         (class viota): Ditto.
31485         (class vid): Ditto.
31486         (BASE): Ditto.
31487         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31488         * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
31489         (vmnand): Ditto.
31490         (vmandn): Ditto.
31491         (vmxor): Ditto.
31492         (vmor): Ditto.
31493         (vmnor): Ditto.
31494         (vmorn): Ditto.
31495         (vmxnor): Ditto.
31496         (vmmv): Ditto.
31497         (vmclr): Ditto.
31498         (vmset): Ditto.
31499         (vmnot): Ditto.
31500         (vcpop): Ditto.
31501         (vfirst): Ditto.
31502         (vmsbf): Ditto.
31503         (vmsif): Ditto.
31504         (vmsof): Ditto.
31505         (viota): Ditto.
31506         (vid): Ditto.
31507         * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
31508         (struct mask_alu_def): Ditto.
31509         (SHAPE): Ditto.
31510         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
31511         * config/riscv/riscv-vector-builtins.cc: Ditto.
31512         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
31513         for dest it scalar RVV intrinsics.
31514         * config/riscv/vector-iterators.md (sof): New iterator.
31515         * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
31516         (@pred_<optab>not<mode>): New pattern.
31517         (@pred_popcount<VB:mode><P:mode>): New pattern.
31518         (@pred_ffs<VB:mode><P:mode>): New pattern.
31519         (@pred_<misc_op><mode>): New pattern.
31520         (@pred_iota<mode>): New pattern.
31521         (@pred_series<mode>): New pattern.
31522
31523 2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
31524
31525         * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
31526         (vsbc): Ditto.
31527         (vmerge): Ditto.
31528         (vmv_v): Ditto.
31529         * config/riscv/riscv-vector-builtins.cc: Ditto.
31530
31531 2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
31532             kito-cheng  <kito.cheng@sifive.com>
31533
31534         * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
31535         * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
31536         (sew64_scalar_helper): New function.
31537         * config/riscv/vector.md: Normalization.
31538
31539 2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
31540
31541         * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
31542         (vsm): Ditto.
31543         (vsse): Ditto.
31544         (vsoxei64): Ditto.
31545         (vsub): Ditto.
31546         (vand): Ditto.
31547         (vor): Ditto.
31548         (vxor): Ditto.
31549         (vsll): Ditto.
31550         (vsra): Ditto.
31551         (vsrl): Ditto.
31552         (vmin): Ditto.
31553         (vmax): Ditto.
31554         (vminu): Ditto.
31555         (vmaxu): Ditto.
31556         (vmul): Ditto.
31557         (vmulh): Ditto.
31558         (vmulhu): Ditto.
31559         (vmulhsu): Ditto.
31560         (vdiv): Ditto.
31561         (vrem): Ditto.
31562         (vdivu): Ditto.
31563         (vremu): Ditto.
31564         (vnot): Ditto.
31565         (vsext): Ditto.
31566         (vzext): Ditto.
31567         (vwadd): Ditto.
31568         (vwsub): Ditto.
31569         (vwmul): Ditto.
31570         (vwmulu): Ditto.
31571         (vwmulsu): Ditto.
31572         (vwaddu): Ditto.
31573         (vwsubu): Ditto.
31574         (vsbc): Ditto.
31575         (vmsbc): Ditto.
31576         (vnsra): Ditto.
31577         (vmerge): Ditto.
31578         (vmv_v): Ditto.
31579         (vmsne): Ditto.
31580         (vmslt): Ditto.
31581         (vmsgt): Ditto.
31582         (vmsle): Ditto.
31583         (vmsge): Ditto.
31584         (vmsltu): Ditto.
31585         (vmsgtu): Ditto.
31586         (vmsleu): Ditto.
31587         (vmsgeu): Ditto.
31588         (vnmsac): Ditto.
31589         (vmadd): Ditto.
31590         (vnmsub): Ditto.
31591         (vwmacc): Ditto.
31592         (vsadd): Ditto.
31593         (vssub): Ditto.
31594         (vssubu): Ditto.
31595         (vaadd): Ditto.
31596         (vasub): Ditto.
31597         (vasubu): Ditto.
31598         (vsmul): Ditto.
31599         (vssra): Ditto.
31600         (vssrl): Ditto.
31601         (vnclip): Ditto.
31602
31603 2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
31604
31605         * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
31606         (@pred_<optab><mode>_scalar): Ditto.
31607         (*pred_<optab><mode>_scalar): Ditto.
31608         (*pred_<optab><mode>_extended_scalar): Ditto.
31609
31610 2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
31611
31612         * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
31613         (init_builtins): Ditto.
31614         (mangle_builtin_type): Ditto.
31615         (verify_type_context): Ditto.
31616         (handle_pragma_vector):  Ditto.
31617         (builtin_decl): Ditto.
31618         (expand_builtin): Ditto.
31619         (const_vec_all_same_in_range_p): Ditto.
31620         (legitimize_move): Ditto.
31621         (emit_vlmax_op): Ditto.
31622         (emit_nonvlmax_op): Ditto.
31623         (get_vlmul): Ditto.
31624         (get_ratio): Ditto.
31625         (get_ta): Ditto.
31626         (get_ma): Ditto.
31627         (get_avl_type): Ditto.
31628         (calculate_ratio): Ditto.
31629         (enum vlmul_type): Ditto.
31630         (simm5_p): Ditto.
31631         (neg_simm5_p): Ditto.
31632         (has_vi_variant_p): Ditto.
31633
31634 2023-02-17  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
31635
31636         * config/riscv/riscv-protos.h (simm32_p): Remove.
31637         * config/riscv/riscv-v.cc (simm32_p): Ditto.
31638         * config/riscv/vector.md: Use immediate_operand
31639         instead of riscv_vector::simm32_p.
31640
31641 2023-02-16  Gerald Pfeifer  <gerald@pfeifer.com>
31642
31643         * doc/invoke.texi (Optimize Options): Reword the explanation
31644         getting minimal, maximal and default values of a parameter.
31645
31646 2023-02-16  Patrick Palka  <ppalka@redhat.com>
31647
31648         * addresses.h: Mechanically drop 'static' from 'static inline'
31649         functions via s/^static inline/inline/g.
31650         * asan.h: Likewise.
31651         * attribs.h: Likewise.
31652         * basic-block.h: Likewise.
31653         * bitmap.h: Likewise.
31654         * cfghooks.h: Likewise.
31655         * cfgloop.h: Likewise.
31656         * cgraph.h: Likewise.
31657         * cselib.h: Likewise.
31658         * data-streamer.h: Likewise.
31659         * debug.h: Likewise.
31660         * df.h: Likewise.
31661         * diagnostic.h: Likewise.
31662         * dominance.h: Likewise.
31663         * dumpfile.h: Likewise.
31664         * emit-rtl.h: Likewise.
31665         * except.h: Likewise.
31666         * expmed.h: Likewise.
31667         * expr.h: Likewise.
31668         * fixed-value.h: Likewise.
31669         * gengtype.h: Likewise.
31670         * gimple-expr.h: Likewise.
31671         * gimple-iterator.h: Likewise.
31672         * gimple-predict.h: Likewise.
31673         * gimple-range-fold.h: Likewise.
31674         * gimple-ssa.h: Likewise.
31675         * gimple.h: Likewise.
31676         * graphite.h: Likewise.
31677         * hard-reg-set.h: Likewise.
31678         * hash-map.h: Likewise.
31679         * hash-set.h: Likewise.
31680         * hash-table.h: Likewise.
31681         * hwint.h: Likewise.
31682         * input.h: Likewise.
31683         * insn-addr.h: Likewise.
31684         * internal-fn.h: Likewise.
31685         * ipa-fnsummary.h: Likewise.
31686         * ipa-icf-gimple.h: Likewise.
31687         * ipa-inline.h: Likewise.
31688         * ipa-modref.h: Likewise.
31689         * ipa-prop.h: Likewise.
31690         * ira-int.h: Likewise.
31691         * ira.h: Likewise.
31692         * lra-int.h: Likewise.
31693         * lra.h: Likewise.
31694         * lto-streamer.h: Likewise.
31695         * memmodel.h: Likewise.
31696         * omp-general.h: Likewise.
31697         * optabs-query.h: Likewise.
31698         * optabs.h: Likewise.
31699         * plugin.h: Likewise.
31700         * pretty-print.h: Likewise.
31701         * range.h: Likewise.
31702         * read-md.h: Likewise.
31703         * recog.h: Likewise.
31704         * regs.h: Likewise.
31705         * rtl-iter.h: Likewise.
31706         * rtl.h: Likewise.
31707         * sbitmap.h: Likewise.
31708         * sched-int.h: Likewise.
31709         * sel-sched-ir.h: Likewise.
31710         * sese.h: Likewise.
31711         * sparseset.h: Likewise.
31712         * ssa-iterators.h: Likewise.
31713         * system.h: Likewise.
31714         * target-globals.h: Likewise.
31715         * target.h: Likewise.
31716         * timevar.h: Likewise.
31717         * tree-chrec.h: Likewise.
31718         * tree-data-ref.h: Likewise.
31719         * tree-iterator.h: Likewise.
31720         * tree-outof-ssa.h: Likewise.
31721         * tree-phinodes.h: Likewise.
31722         * tree-scalar-evolution.h: Likewise.
31723         * tree-sra.h: Likewise.
31724         * tree-ssa-alias.h: Likewise.
31725         * tree-ssa-live.h: Likewise.
31726         * tree-ssa-loop-manip.h: Likewise.
31727         * tree-ssa-loop.h: Likewise.
31728         * tree-ssa-operands.h: Likewise.
31729         * tree-ssa-propagate.h: Likewise.
31730         * tree-ssa-sccvn.h: Likewise.
31731         * tree-ssa.h: Likewise.
31732         * tree-ssanames.h: Likewise.
31733         * tree-streamer.h: Likewise.
31734         * tree-switch-conversion.h: Likewise.
31735         * tree-vectorizer.h: Likewise.
31736         * tree.h: Likewise.
31737         * wide-int.h: Likewise.
31738
31739 2023-02-16  Jakub Jelinek  <jakub@redhat.com>
31740
31741         PR tree-optimization/108657
31742         * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
31743         exists and is not a SSA_NAME, call ao_ref_init even if the stmt
31744         is a call to internal or builtin function.
31745
31746 2023-02-16  Jonathan Wakely  <jwakely@redhat.com>
31747
31748         * doc/invoke.texi (C++ Dialect Options): Suggest adding a
31749         using-declaration to unhide functions.
31750
31751 2023-02-16  Jakub Jelinek  <jakub@redhat.com>
31752
31753         PR tree-optimization/108783
31754         * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
31755         is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
31756         t to curr->op.  Otherwise, punt if either newop1 or newop2 are
31757         SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
31758
31759 2023-02-16  Richard Biener  <rguenther@suse.de>
31760
31761         PR tree-optimization/108791
31762         * tree-ssa-forwprop.cc (optimize_vector_load): Build
31763         the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
31764         type.
31765
31766 2023-02-15  Eric Botcazou  <ebotcazou@adacore.com>
31767
31768         PR target/90458
31769         * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
31770         effects of -fstack-clash-protection for TARGET_STACK_PROBE.
31771         (ix86_expand_prologue): Likewise.
31772
31773 2023-02-15  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
31774
31775         * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
31776
31777 2023-02-15  Uroš Bizjak  <ubizjak@gmail.com>
31778
31779         * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
31780         int248_register_operand predicate in zero_extract sub-RTX.
31781         (*cmpqi_ext<mode>_2): Ditto.
31782         (*cmpqi_ext<mode>_3): Ditto.
31783         (*cmpqi_ext<mode>_4): Ditto.
31784         (*extzvqi_mem_rex64): Ditto.
31785         (*extzvqi): Ditto.
31786         (*insvqi_1_mem_rex64): Ditto.
31787         (@insv<mode>_1): Ditto.
31788         (*insvqi_1): Ditto.
31789         (*insvqi_2): Ditto.
31790         (*insvqi_3): Ditto.
31791         (*extendqi<SWI24:mode>_ext_1): Ditto.
31792         (*addqi_ext<mode>_1): Ditto.
31793         (*addqi_ext<mode>_2): Ditto.
31794         (*subqi_ext<mode>_2): Ditto.
31795         (*testqi_ext<mode>_1): Ditto.
31796         (*testqi_ext<mode>_2): Ditto.
31797         (*andqi_ext<mode>_1): Ditto.
31798         (*andqi_ext<mode>_1_cc): Ditto.
31799         (*andqi_ext<mode>_2): Ditto.
31800         (*<any_or:code>qi_ext<mode>_1): Ditto.
31801         (*<any_or:code>qi_ext<mode>_2): Ditto.
31802         (*xorqi_ext<mode>_1_cc): Ditto.
31803         (*negqi_ext<mode>_2): Ditto.
31804         (*ashlqi_ext<mode>_2): Ditto.
31805         (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
31806
31807 2023-02-15  Uroš Bizjak  <ubizjak@gmail.com>
31808
31809         * config/i386/predicates.md (int248_register_operand):
31810         Rename from extr_register_operand.
31811         * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
31812         (*extzx<mode>): Ditto.
31813         (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
31814         (*ashl<mode>3_mask): Ditto.
31815         (*<any_shiftrt:insn><mode>3_mask): Ditto.
31816         (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
31817         (*<any_rotate:insn><mode>3_mask): Ditto.
31818         (*<btsc><mode>_mask): Ditto.
31819         (*btr<mode>_mask): Ditto.
31820         (*jcc_bt<mode>_mask_1): Ditto.
31821
31822 2023-02-15  Richard Biener  <rguenther@suse.de>
31823
31824         PR middle-end/26854
31825         * df-core.cc (df_worklist_propagate_forward): Put later
31826         blocks on worklist and only earlier blocks on pending.
31827         (df_worklist_propagate_backward): Likewise.
31828         (df_worklist_dataflow_doublequeue): Change the iteration
31829         to process new blocks in the same iteration if that
31830         maintains the iteration order.
31831
31832 2023-02-15  Marek Polacek  <polacek@redhat.com>
31833
31834         PR middle-end/106080
31835         * gimple-ssa-warn-access.cc (is_auto_decl): Remove.  Use auto_var_p
31836         instead.
31837
31838 2023-02-15  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
31839
31840         * config/riscv/predicates.md: Refine codes.
31841         * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
31842         * config/riscv/riscv-v.cc: Refine codes.
31843         * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
31844         enum.
31845         (class imac): New class.
31846         (enum widen_ternop_type): New enum.
31847         (class iwmac): New class.
31848         (BASE): New class.
31849         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31850         * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
31851         (vnmsac): Ditto.
31852         (vmadd): Ditto.
31853         (vnmsub): Ditto.
31854         (vwmacc): Ditto.
31855         (vwmaccu): Ditto.
31856         (vwmaccsu): Ditto.
31857         (vwmaccus): Ditto.
31858         * config/riscv/riscv-vector-builtins.cc
31859         (function_builder::apply_predication): Adjust for multiply-add support.
31860         (function_expander::add_vundef_operand): Refine codes.
31861         (function_expander::use_ternop_insn): New function.
31862         (function_expander::use_widen_ternop_insn): Ditto.
31863         * config/riscv/riscv-vector-builtins.h: New function.
31864         * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
31865         (pred_mul_<optab><mode>_undef_merge): Ditto.
31866         (*pred_<madd_nmsub><mode>): Ditto.
31867         (*pred_<macc_nmsac><mode>): Ditto.
31868         (*pred_mul_<optab><mode>): Ditto.
31869         (@pred_mul_<optab><mode>_scalar): Ditto.
31870         (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
31871         (*pred_<madd_nmsub><mode>_scalar): Ditto.
31872         (*pred_<macc_nmsac><mode>_scalar): Ditto.
31873         (*pred_mul_<optab><mode>_scalar): Ditto.
31874         (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
31875         (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
31876         (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
31877         (*pred_mul_<optab><mode>_extended_scalar): Ditto.
31878         (@pred_widen_mul_plus<su><mode>): Ditto.
31879         (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
31880         (@pred_widen_mul_plussu<mode>): Ditto.
31881         (@pred_widen_mul_plussu<mode>_scalar): Ditto.
31882         (@pred_widen_mul_plusus<mode>_scalar): Ditto.
31883
31884 2023-02-15  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
31885
31886         * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
31887         (vector_all_trues_mask_operand): New predicate.
31888         (vector_undef_operand): New predicate.
31889         (ltge_operator): New predicate.
31890         (comparison_except_ltge_operator): New predicate.
31891         (comparison_except_eqge_operator): New predicate.
31892         (ge_operator): New predicate.
31893         * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
31894         * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
31895         (BASE): Ditto.
31896         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31897         * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
31898         (vmsne): Ditto.
31899         (vmslt): Ditto.
31900         (vmsgt): Ditto.
31901         (vmsle): Ditto.
31902         (vmsge): Ditto.
31903         (vmsltu): Ditto.
31904         (vmsgtu): Ditto.
31905         (vmsleu): Ditto.
31906         (vmsgeu): Ditto.
31907         * config/riscv/riscv-vector-builtins-shapes.cc
31908         (struct return_mask_def): Adjust for compare support.
31909         * config/riscv/riscv-vector-builtins.cc
31910         (function_expander::use_compare_insn): New function.
31911         * config/riscv/riscv-vector-builtins.h
31912         (function_expander::add_integer_operand): Ditto.
31913         * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
31914         * config/riscv/riscv.md: Add vector min/max attributes.
31915         * config/riscv/vector-iterators.md (xnor): New iterator.
31916         * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
31917         (*pred_cmp<mode>): Ditto.
31918         (*pred_cmp<mode>_narrow): Ditto.
31919         (@pred_ltge<mode>): Ditto.
31920         (*pred_ltge<mode>): Ditto.
31921         (*pred_ltge<mode>_narrow): Ditto.
31922         (@pred_cmp<mode>_scalar): Ditto.
31923         (*pred_cmp<mode>_scalar): Ditto.
31924         (*pred_cmp<mode>_scalar_narrow): Ditto.
31925         (@pred_eqne<mode>_scalar): Ditto.
31926         (*pred_eqne<mode>_scalar): Ditto.
31927         (*pred_eqne<mode>_scalar_narrow): Ditto.
31928         (*pred_cmp<mode>_extended_scalar): Ditto.
31929         (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
31930         (*pred_eqne<mode>_extended_scalar): Ditto.
31931         (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
31932         (@pred_ge<mode>_scalar): Ditto.
31933         (@pred_<optab><mode>): Ditto.
31934         (@pred_n<optab><mode>): Ditto.
31935         (@pred_<optab>n<mode>): Ditto.
31936         (@pred_not<mode>): Ditto.
31937
31938 2023-02-15  Martin Jambor  <mjambor@suse.cz>
31939
31940         PR ipa/108679
31941         * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
31942         creation of non-scalar replacements even if IPA-CP knows their
31943         contents.
31944
31945 2023-02-15  Jakub Jelinek  <jakub@redhat.com>
31946
31947         PR target/108787
31948         PR target/103109
31949         * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
31950         expander, change operand 3 to be TImode, emit maddlddi4 and
31951         umadddi4_highpart{,_le} with its low half and finally add the high
31952         half to the result.
31953
31954 2023-02-15  Martin Liska  <mliska@suse.cz>
31955
31956         * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
31957
31958 2023-02-15  Richard Biener  <rguenther@suse.de>
31959
31960         * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
31961         for with_poison and alias worklist to it.
31962         (sanitize_asan_mark_poison): Likewise.
31963
31964 2023-02-15  Richard Biener  <rguenther@suse.de>
31965
31966         PR target/108738
31967         * config/i386/i386-features.cc (scalar_chain::add_to_queue):
31968         Combine bitmap test and set.
31969         (scalar_chain::add_insn): Likewise.
31970         (scalar_chain::analyze_register_chain): Remove redundant
31971         attempt to add to queue and instead strengthen assert.
31972         Sink common attempts to mark the def dual-mode.
31973         (scalar_chain::add_to_queue): Remove redundant insn bitmap
31974         check.
31975
31976 2023-02-15  Richard Biener  <rguenther@suse.de>
31977
31978         PR target/108738
31979         * config/i386/i386-features.cc (convert_scalars_to_vector):
31980         Switch candidates bitmaps to tree view before building the chains.
31981
31982 2023-02-15  Hans-Peter Nilsson  <hp@axis.com>
31983
31984         * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
31985         "failure trying to reload" call.
31986
31987 2023-02-15  Hans-Peter Nilsson  <hp@axis.com>
31988
31989         * gdbinit.in (phrs): New command.
31990         * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
31991         * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
31992
31993 2023-02-14  David Faust  <david.faust@oracle.com>
31994
31995         PR target/108790
31996         * config/bpf/constraints.md (q): New memory constraint.
31997         * config/bpf/bpf.md (zero_extendhidi2): Use it here.
31998         (zero_extendqidi2): Likewise.
31999         (zero_extendsidi2): Likewise.
32000         (*mov<MM:mode>): Likewise.
32001
32002 2023-02-14  Andrew Pinski  <apinski@marvell.com>
32003
32004         PR tree-optimization/108355
32005         PR tree-optimization/96921
32006         * match.pd: Add pattern for "1 - bool_val".
32007
32008 2023-02-14  Richard Biener  <rguenther@suse.de>
32009
32010         * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
32011         basic block index hashing on the availability of ->cclhs.
32012         (vn_phi_eq): Avoid re-doing sanity checks for CSE but
32013         rely on ->cclhs availability.
32014         (vn_phi_lookup): Set ->cclhs only when we are eventually
32015         going to CSE the PHI.
32016         (vn_phi_insert): Likewise.
32017
32018 2023-02-14  Eric Botcazou  <ebotcazou@adacore.com>
32019
32020         * gimplify.cc (gimplify_save_expr): Add missing guard.
32021
32022 2023-02-14  Richard Biener  <rguenther@suse.de>
32023
32024         PR tree-optimization/108782
32025         * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
32026         Make sure we're not vectorizing an inner loop.
32027
32028 2023-02-14  Jakub Jelinek  <jakub@redhat.com>
32029
32030         PR sanitizer/108777
32031         * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
32032         * asan.h (asan_memfn_rtl): Declare.
32033         * asan.cc (asan_memfn_rtls): New variable.
32034         (asan_memfn_rtl): New function.
32035         * builtins.cc (expand_builtin): If
32036         param_asan_kernel_mem_intrinsic_prefix and function is
32037         kernel-{,hw}address sanitized, emit calls to
32038         __{,hw}asan_{memcpy,memmove,memset} rather than
32039         {memcpy,memmove,memset}.  Use sanitize_flags_p (SANITIZE_ADDRESS)
32040         instead of flag_sanitize & SANITIZE_ADDRESS to check if
32041         asan_intercepted_p functions shouldn't be expanded inline.
32042
32043 2023-02-14  Richard Sandiford  <richard.sandiford@arm.com>
32044
32045         PR tree-optimization/96373
32046         * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
32047         operations on the loop mask.  Reject partial vectors if this isn't
32048         possible.
32049
32050 2023-02-13  Richard Sandiford  <richard.sandiford@arm.com>
32051
32052         PR rtl-optimization/108681
32053         * lra-spills.cc (lra_final_code_change): Extend subreg replacement
32054         code to handle bare uses and clobbers.
32055
32056 2023-02-13  Vladimir N. Makarov  <vmakarov@redhat.com>
32057
32058         * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
32059         caller_save_p flag when clearing defined_p flag.
32060         (setup_reg_equiv): Ditto.
32061         * lra-constraints.cc (lra_constraints): Ditto.
32062
32063 2023-02-13  Uroš Bizjak  <ubizjak@gmail.com>
32064
32065         PR target/108516
32066         * config/i386/predicates.md (extr_register_operand):
32067         New special predicate.
32068         * config/i386/i386.md (*extv<mode>): Use extr_register_operand
32069         as operand 1 predicate.
32070         (*exzv<mode>): Ditto.
32071         (*extendqi<SWI24:mode>_ext_1): New insn pattern.
32072
32073 2023-02-13  Richard Biener  <rguenther@suse.de>
32074
32075         PR tree-optimization/28614
32076         * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
32077         walking all edges in most cases.
32078         (vn_nary_op_insert_pieces_predicated): Avoid repeated
32079         calls to can_track_predicate_on_edge unless checking is
32080         enabled.
32081         (process_bb): Instead call it once here for each edge
32082         we register possibly multiple predicates on.
32083
32084 2023-02-13  Richard Biener  <rguenther@suse.de>
32085
32086         PR tree-optimization/108691
32087         * tree-cfg.cc (notice_special_calls): When the CFG is built
32088         honor gimple_call_ctrl_altering_p.
32089         * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
32090         temporarily if the call is not control-altering.
32091         * calls.cc (emit_call_1): Do not add REG_SETJMP if
32092         cfun->calls_setjmp is not set.  Do not alter cfun->calls_setjmp.
32093
32094 2023-02-13  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
32095
32096         PR target/108102
32097         * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
32098         (struct s390_sched_state): Initialise to zero.
32099         (s390_sched_variable_issue): For better debuggability also emit
32100         the current side.
32101         (s390_sched_init): Unconditionally reset scheduler state.
32102
32103 2023-02-13  Richard Sandiford  <richard.sandiford@arm.com>
32104
32105         * ifcvt.h (noce_if_info::cond_inverted): New field.
32106         * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
32107         values when cond_inverted is true.
32108         (noce_find_if_block): Allow the condition to be inverted when
32109         handling conditional moves.
32110
32111 2023-02-13  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
32112
32113         * config/s390/predicates.md (execute_operation): Use
32114         constrain_operands instead of extract_constrain_insn in order to
32115         determine wheter there exists a valid alternative.
32116
32117 2023-02-13  Claudiu Zissulescu  <claziss@gmail.com>
32118
32119         * common/config/arc/arc-common.cc (arc_option_optimization_table):
32120         Remove millicode from list.
32121
32122 2023-02-13  Martin Liska  <mliska@suse.cz>
32123
32124         * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
32125
32126 2023-02-13  Richard Biener  <rguenther@suse.de>
32127
32128         PR tree-optimization/106722
32129         * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
32130         whether we marked a stmt.
32131         (mark_control_dependent_edges_necessary): When
32132         mark_last_stmt_necessary didn't mark any stmt make sure
32133         to mark its control dependent edges.
32134         (propagate_necessity): Likewise.
32135
32136 2023-02-13  Kito Cheng  <kito.cheng@sifive.com>
32137
32138         * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
32139         (DWARF_FRAME_REGISTERS): New.
32140         (DWARF_REG_TO_UNWIND_COLUMN): New.
32141
32142 2023-02-12  Gerald Pfeifer  <gerald@pfeifer.com>
32143
32144         * doc/sourcebuild.texi: Remove (broken) direct reference to
32145         "The GNU configure and build system".
32146
32147 2023-02-12  Jin Ma  <jinma@linux.alibaba.com>
32148
32149         * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
32150         gen_add3_insn to gen_rtx_SET.
32151         (riscv_adjust_libcall_cfi_epilogue): Likewise.
32152
32153 2023-02-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32154
32155         * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
32156         (class vnclip): Ditto.
32157         (BASE): Ditto.
32158         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32159         * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
32160         (vasub): Ditto.
32161         (vaaddu): Ditto.
32162         (vasubu): Ditto.
32163         (vsmul): Ditto.
32164         (vssra): Ditto.
32165         (vssrl): Ditto.
32166         (vnclipu): Ditto.
32167         (vnclip): Ditto.
32168         * config/riscv/vector-iterators.md (su): Add instruction.
32169         (aadd): Ditto.
32170         (vaalu): Ditto.
32171         * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
32172         (@pred_<sat_op><mode>_scalar): Ditto.
32173         (*pred_<sat_op><mode>_scalar): Ditto.
32174         (*pred_<sat_op><mode>_extended_scalar): Ditto.
32175         (@pred_narrow_clip<v_su><mode>): Ditto.
32176         (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
32177
32178 2023-02-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32179
32180         * config/riscv/constraints.md (Wbr): Remove unused constraint.
32181         * config/riscv/predicates.md: Fix move operand predicate.
32182         * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
32183         (class vncvt_x): Ditto.
32184         (class vmerge): Ditto.
32185         (class vmv_v): Ditto.
32186         (BASE): Ditto.
32187         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32188         * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
32189         (vsrl): Ditto.
32190         (vnsrl): Ditto.
32191         (vnsra): Ditto.
32192         (vncvt_x): Ditto.
32193         (vmerge): Ditto.
32194         (vmv_v): Ditto.
32195         * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
32196         (struct move_def): Ditto.
32197         (SHAPE): Ditto.
32198         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32199         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
32200         (DEF_RVV_WEXTU_OPS): Ditto
32201         * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
32202         (v_v): Ditto.
32203         (v_x): Ditto.
32204         (x_w): Ditto.
32205         (x): Ditto.
32206         * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
32207         * config/riscv/vector-iterators.md (nmsac):New iterator.
32208         (nmsub): New iterator.
32209         * config/riscv/vector.md (@pred_merge<mode>): New pattern.
32210         (@pred_merge<mode>_scalar): New pattern.
32211         (*pred_merge<mode>_scalar): New pattern.
32212         (*pred_merge<mode>_extended_scalar): New pattern.
32213         (@pred_narrow_<optab><mode>): New pattern.
32214         (@pred_narrow_<optab><mode>_scalar): New pattern.
32215         (@pred_trunc<mode>): New pattern.
32216
32217 2023-02-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32218
32219         * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
32220         (class vmsbc): Ditto.
32221         (BASE): Define new class.
32222         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32223         * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
32224         (vmsbc): Ditto.
32225         * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
32226         New class.
32227         (SHAPE): Ditto.
32228         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32229         * config/riscv/riscv-vector-builtins.cc
32230         (function_expander::use_exact_insn): Adjust for new support
32231         * config/riscv/riscv-vector-builtins.h
32232         (function_base::has_merge_operand_p): New function.
32233         * config/riscv/vector-iterators.md: New iterator.
32234         * config/riscv/vector.md (@pred_madc<mode>): New pattern.
32235         (@pred_msbc<mode>): Ditto.
32236         (@pred_madc<mode>_scalar): Ditto.
32237         (@pred_msbc<mode>_scalar): Ditto.
32238         (*pred_madc<mode>_scalar): Ditto.
32239         (*pred_madc<mode>_extended_scalar): Ditto.
32240         (*pred_msbc<mode>_scalar): Ditto.
32241         (*pred_msbc<mode>_extended_scalar): Ditto.
32242         (@pred_madc<mode>_overflow): Ditto.
32243         (@pred_msbc<mode>_overflow): Ditto.
32244         (@pred_madc<mode>_overflow_scalar): Ditto.
32245         (@pred_msbc<mode>_overflow_scalar): Ditto.
32246         (*pred_madc<mode>_overflow_scalar): Ditto.
32247         (*pred_madc<mode>_overflow_extended_scalar): Ditto.
32248         (*pred_msbc<mode>_overflow_scalar): Ditto.
32249         (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
32250
32251 2023-02-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32252
32253         * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
32254         * config/riscv/riscv-v.cc (simm32_p): Ditto.
32255         * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
32256         (class vsbc): Ditto.
32257         (BASE): Ditto.
32258         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32259         * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
32260         (vsbc): Ditto.
32261         * config/riscv/riscv-vector-builtins-shapes.cc
32262         (struct no_mask_policy_def): Ditto.
32263         (SHAPE): Ditto.
32264         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32265         * config/riscv/riscv-vector-builtins.cc
32266         (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
32267         (rvv_arg_type_info::get_tree_type): Ditto.
32268         (function_expander::use_exact_insn): Ditto.
32269         * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
32270         (function_base::use_mask_predication_p): New function.
32271         * config/riscv/vector-iterators.md: New iterator.
32272         * config/riscv/vector.md (@pred_adc<mode>): New pattern.
32273         (@pred_sbc<mode>): Ditto.
32274         (@pred_adc<mode>_scalar): Ditto.
32275         (@pred_sbc<mode>_scalar): Ditto.
32276         (*pred_adc<mode>_scalar): Ditto.
32277         (*pred_adc<mode>_extended_scalar): Ditto.
32278         (*pred_sbc<mode>_scalar): Ditto.
32279         (*pred_sbc<mode>_extended_scalar): Ditto.
32280
32281 2023-02-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32282
32283         * config/riscv/vector.md: use "zero" reg.
32284
32285 2023-02-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32286
32287         * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
32288         class.
32289         (class vwmulsu): Ditto.
32290         (class vwcvt): Ditto.
32291         (BASE): Add integer widening support.
32292         * config/riscv/riscv-vector-builtins-bases.h: Ditto
32293         * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
32294         (vwsub): New class.
32295         (vwmul): New class.
32296         (vwmulu): New class.
32297         (vwmulsu): New class.
32298         (vwaddu): New class.
32299         (vwsubu): New class.
32300         (vwcvt_x): New class.
32301         (vwcvtu_x): New class.
32302         * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
32303         class.
32304         (struct widen_alu_def): New class.
32305         (SHAPE): New class.
32306         * config/riscv/riscv-vector-builtins-shapes.h: New class.
32307         * config/riscv/riscv-vector-builtins.cc
32308         (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
32309         (rvv_arg_type_info::get_tree_type): Ditto.
32310         * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
32311         (x_v): Ditto.
32312         * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
32313         widening support.
32314         * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
32315         * config/riscv/riscv.h (X0_REGNUM): New constant.
32316         * config/riscv/vector-iterators.md: New iterators.
32317         * config/riscv/vector.md
32318         (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
32319         pattern.
32320         (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
32321         Ditto.
32322         (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
32323         (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
32324         Ditto.
32325         (@pred_widen_mulsu<mode>): Ditto.
32326         (@pred_widen_mulsu<mode>_scalar): Ditto.
32327         (@pred_<optab><mode>): Ditto.
32328
32329 2023-02-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32330             kito-cheng  <kito.cheng@sifive.com>
32331
32332         * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
32333         * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
32334         (BASE): Ditto.
32335         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32336         * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
32337         API support.
32338         (vmulhu): Ditto.
32339         (vmulhsu): Ditto.
32340         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
32341         New macro.
32342         (DEF_RVV_FULL_V_U_OPS): Ditto.
32343         (vint8mf8_t): Ditto.
32344         (vint8mf4_t): Ditto.
32345         (vint8mf2_t): Ditto.
32346         (vint8m1_t): Ditto.
32347         (vint8m2_t): Ditto.
32348         (vint8m4_t): Ditto.
32349         (vint8m8_t): Ditto.
32350         (vint16mf4_t): Ditto.
32351         (vint16mf2_t): Ditto.
32352         (vint16m1_t): Ditto.
32353         (vint16m2_t): Ditto.
32354         (vint16m4_t): Ditto.
32355         (vint16m8_t): Ditto.
32356         (vint32mf2_t): Ditto.
32357         (vint32m1_t): Ditto.
32358         (vint32m2_t): Ditto.
32359         (vint32m4_t): Ditto.
32360         (vint32m8_t): Ditto.
32361         (vint64m1_t): Ditto.
32362         (vint64m2_t): Ditto.
32363         (vint64m4_t): Ditto.
32364         (vint64m8_t): Ditto.
32365         (vuint8mf8_t): Ditto.
32366         (vuint8mf4_t): Ditto.
32367         (vuint8mf2_t): Ditto.
32368         (vuint8m1_t): Ditto.
32369         (vuint8m2_t): Ditto.
32370         (vuint8m4_t): Ditto.
32371         (vuint8m8_t): Ditto.
32372         (vuint16mf4_t): Ditto.
32373         (vuint16mf2_t): Ditto.
32374         (vuint16m1_t): Ditto.
32375         (vuint16m2_t): Ditto.
32376         (vuint16m4_t): Ditto.
32377         (vuint16m8_t): Ditto.
32378         (vuint32mf2_t): Ditto.
32379         (vuint32m1_t): Ditto.
32380         (vuint32m2_t): Ditto.
32381         (vuint32m4_t): Ditto.
32382         (vuint32m8_t): Ditto.
32383         (vuint64m1_t): Ditto.
32384         (vuint64m2_t): Ditto.
32385         (vuint64m4_t): Ditto.
32386         (vuint64m8_t): Ditto.
32387         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
32388         (DEF_RVV_FULL_V_U_OPS): Ditto.
32389         (check_required_extensions): Add vmulh support.
32390         (rvv_arg_type_info::get_tree_type): Ditto.
32391         * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
32392         (enum rvv_base_type): Ditto.
32393         * config/riscv/riscv.opt: Add 'V' extension flag.
32394         * config/riscv/vector-iterators.md (su): New iterator.
32395         * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
32396         (@pred_mulh<v_su><mode>_scalar): Ditto.
32397         (*pred_mulh<v_su><mode>_scalar): Ditto.
32398         (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
32399
32400 2023-02-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32401
32402         * config/riscv/iterators.md: Add sign_extend/zero_extend.
32403         * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
32404         (BASE): Ditto.
32405         * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
32406         * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
32407         define.
32408         (vzext): Ditto.
32409         * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
32410         for vsext/vzext support.
32411         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
32412         macro define.
32413         (DEF_RVV_QEXTI_OPS): Ditto.
32414         (DEF_RVV_OEXTI_OPS): Ditto.
32415         (DEF_RVV_WEXTU_OPS): Ditto.
32416         (DEF_RVV_QEXTU_OPS): Ditto.
32417         (DEF_RVV_OEXTU_OPS): Ditto.
32418         (vint16mf4_t): Ditto.
32419         (vint16mf2_t): Ditto.
32420         (vint16m1_t): Ditto.
32421         (vint16m2_t): Ditto.
32422         (vint16m4_t): Ditto.
32423         (vint16m8_t): Ditto.
32424         (vint32mf2_t): Ditto.
32425         (vint32m1_t): Ditto.
32426         (vint32m2_t): Ditto.
32427         (vint32m4_t): Ditto.
32428         (vint32m8_t): Ditto.
32429         (vint64m1_t): Ditto.
32430         (vint64m2_t): Ditto.
32431         (vint64m4_t): Ditto.
32432         (vint64m8_t): Ditto.
32433         (vuint16mf4_t): Ditto.
32434         (vuint16mf2_t): Ditto.
32435         (vuint16m1_t): Ditto.
32436         (vuint16m2_t): Ditto.
32437         (vuint16m4_t): Ditto.
32438         (vuint16m8_t): Ditto.
32439         (vuint32mf2_t): Ditto.
32440         (vuint32m1_t): Ditto.
32441         (vuint32m2_t): Ditto.
32442         (vuint32m4_t): Ditto.
32443         (vuint32m8_t): Ditto.
32444         (vuint64m1_t): Ditto.
32445         (vuint64m2_t): Ditto.
32446         (vuint64m4_t): Ditto.
32447         (vuint64m8_t): Ditto.
32448         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
32449         (DEF_RVV_QEXTI_OPS): Ditto.
32450         (DEF_RVV_OEXTI_OPS): Ditto.
32451         (DEF_RVV_WEXTU_OPS): Ditto.
32452         (DEF_RVV_QEXTU_OPS): Ditto.
32453         (DEF_RVV_OEXTU_OPS): Ditto.
32454         (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
32455         support.
32456         (rvv_arg_type_info::get_tree_type): Ditto.
32457         * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
32458         * config/riscv/vector-iterators.md (z): New attribute.
32459         * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
32460         (@pred_<optab><mode>_vf4): Ditto.
32461         (@pred_<optab><mode>_vf8): Ditto.
32462
32463 2023-02-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32464
32465         * config/riscv/iterators.md: Add saturating Addition && Subtraction.
32466         * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
32467         * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
32468         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32469         * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
32470         (vssub): Ditto.
32471         (vsaddu): Ditto.
32472         (vssubu): Ditto.
32473         * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
32474         support.
32475         (sll.vv): Ditto.
32476         (%3,%v4): Ditto.
32477         (%3,%4): Ditto.
32478         * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
32479         (@pred_<optab><mode>_scalar): New pattern.
32480         (*pred_<optab><mode>_scalar): New pattern.
32481         (*pred_<optab><mode>_extended_scalar): New pattern.
32482
32483 2023-02-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32484
32485         * config/riscv/iterators.md: Add neg and not.
32486         * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
32487         (BASE): Ditto.
32488         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32489         * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
32490         into alu.
32491         (vsub): Ditto.
32492         (vand): Ditto.
32493         (vor): Ditto.
32494         (vxor): Ditto.
32495         (vsll): Ditto.
32496         (vsra): Ditto.
32497         (vsrl): Ditto.
32498         (vmin): Ditto.
32499         (vmax): Ditto.
32500         (vminu): Ditto.
32501         (vmaxu): Ditto.
32502         (vmul): Ditto.
32503         (vdiv): Ditto.
32504         (vrem): Ditto.
32505         (vdivu): Ditto.
32506         (vremu): Ditto.
32507         (vrsub): Ditto.
32508         (vneg): Ditto.
32509         (vnot): Ditto.
32510         * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
32511         (struct alu_def): Ditto.
32512         (SHAPE): Ditto.
32513         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32514         * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
32515         * config/riscv/vector-iterators.md: New iterator.
32516         * config/riscv/vector.md (@pred_<optab><mode>): New pattern
32517
32518 2023-02-12  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32519
32520         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
32521
32522 2023-02-11  Jakub Jelinek  <jakub@redhat.com>
32523
32524         PR ipa/108605
32525         * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
32526         item->offset bit position is too large to be representable as
32527         unsigned int byte position.
32528
32529 2023-02-11  Gerald Pfeifer  <gerald@pfeifer.com>
32530
32531         * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
32532
32533 2023-02-10  Vladimir N. Makarov  <vmakarov@redhat.com>
32534
32535         * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
32536         valid_combine only when ira_use_lra_p is true.
32537
32538 2023-02-10  Vladimir N. Makarov  <vmakarov@redhat.com>
32539
32540         * params.opt (ira-simple-lra-insn-threshold): Add new param.
32541         * ira.cc (ira): Use the param to switch on simple LRA.
32542
32543 2023-02-10  Andrew MacLeod  <amacleod@redhat.com>
32544
32545         PR tree-optimization/108687
32546         * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
32547         back to RFD_NONE mode for calculations.
32548         (ranger_cache::propagate_cache): Call the internal edge range API
32549         with RFD_READ_ONLY instead of changing the external routine.
32550
32551 2023-02-10  Andrew MacLeod  <amacleod@redhat.com>
32552
32553         PR tree-optimization/108520
32554         * gimple-range-infer.cc (check_assume_func): Invoke
32555         gimple_range_global directly instead using global_range_query.
32556         * value-query.cc (get_range_global): Add function context and
32557         avoid calling nonnull_arg_p if not cfun.
32558         (gimple_range_global): Add function context pointer.
32559         * value-query.h (imple_range_global): Add function context.
32560
32561 2023-02-10  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32562
32563         * config/riscv/constraints.md (Wdm): Adjust constraint.
32564         (Wbr): New constraint.
32565         * config/riscv/predicates.md (reg_or_int_operand): New predicate.
32566         * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
32567         (emit_vlmax_op): New function.
32568         (emit_nonvlmax_op): Ditto.
32569         (simm32_p): Ditto.
32570         (neg_simm5_p): Ditto.
32571         (has_vi_variant_p): Ditto.
32572         * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
32573         (emit_vlmax_op): New function.
32574         (emit_nonvlmax_op): Ditto.
32575         (expand_const_vector): Adjust function.
32576         (legitimize_move): Ditto.
32577         (simm32_p): New function.
32578         (simm5_p): Ditto.
32579         (neg_simm5_p): Ditto.
32580         (has_vi_variant_p): Ditto.
32581         * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
32582         (BASE): Ditto.
32583         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32584         * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
32585         unsigned cases.
32586         (vmax): Ditto.
32587         (vminu): Remove signed cases.
32588         (vmaxu): Ditto.
32589         (vdiv): Remove unsigned cases.
32590         (vrem): Ditto.
32591         (vdivu): Remove signed cases.
32592         (vremu): Ditto.
32593         (vadd): Adjust.
32594         (vsub): Ditto.
32595         (vrsub): New class.
32596         (vand): Adjust.
32597         (vor): Ditto.
32598         (vxor): Ditto.
32599         (vmul): Ditto.
32600         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
32601         * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
32602         * config/riscv/vector-iterators.md: New iterators.
32603         * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
32604         support.
32605         (@pred_<optab><mode>_scalar): New pattern.
32606         (@pred_sub<mode>_reverse_scalar): Ditto.
32607         (*pred_<optab><mode>_scalar): Ditto.
32608         (*pred_<optab><mode>_extended_scalar): Ditto.
32609         (*pred_sub<mode>_reverse_scalar): Ditto.
32610         (*pred_sub<mode>_extended_reverse_scalar): Ditto.
32611
32612 2023-02-10  Richard Biener  <rguenther@suse.de>
32613
32614         PR tree-optimization/108724
32615         * tree-vect-stmts.cc (vectorizable_operation): Avoid
32616         using word_mode vectors when vector lowering will
32617         decompose them to elementwise operations.
32618
32619 2023-02-10  Jakub Jelinek  <jakub@redhat.com>
32620
32621         Revert:
32622         2023-02-09  Martin Liska  <mliska@suse.cz>
32623
32624         PR target/100758
32625         * doc/extend.texi: Document that the function
32626         does not work correctly for old VIA processors.
32627
32628 2023-02-10  Andrew Pinski  <apinski@marvell.com>
32629             Andrew Macleod   <amacleod@redhat.com>
32630
32631         PR tree-optimization/108684
32632         * tree-ssa-dce.cc (simple_dce_from_worklist):
32633         Check all ssa names and not just non-vdef ones
32634         before accepting the inline-asm.
32635         Call unlink_stmt_vdef on the statement before
32636         removing it.
32637
32638 2023-02-09  Vladimir N. Makarov  <vmakarov@redhat.com>
32639
32640         * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
32641         * ira.cc (validate_equiv_mem): Check memref address variance.
32642         (no_equiv): Clear caller_save_p flag.
32643         (update_equiv_regs): Define caller save equivalence for
32644         valid_combine.
32645         (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
32646         * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
32647         call_save_p.  Use caller save equivalence depending on the arg.
32648         (split_reg): Adjust the call.
32649
32650 2023-02-09  Jakub Jelinek  <jakub@redhat.com>
32651
32652         PR target/100758
32653         * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
32654         (cpu_indicator_init): Call get_available_features for all CPUs with
32655         max_level >= 1, rather than just Intel, AMD or Zhaoxin.  Formatting
32656         fixes.
32657
32658 2023-02-09  Jakub Jelinek  <jakub@redhat.com>
32659
32660         PR tree-optimization/108688
32661         * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
32662         of BIT_INSERT_EXPR extracting exactly all inserted bits even
32663         when without mode precision.  Formatting fixes.
32664
32665 2023-02-09  Andrew Pinski  <apinski@marvell.com>
32666
32667         PR tree-optimization/108688
32668         * match.pd (bit_field_ref [bit_insert]): Avoid generating
32669         BIT_FIELD_REFs of non-mode-precision integral operands.
32670
32671 2023-02-09  Martin Liska  <mliska@suse.cz>
32672
32673         PR target/100758
32674         * doc/extend.texi: Document that the function
32675         does not work correctly for old VIA processors.
32676
32677 2023-02-09  Andreas Schwab  <schwab@suse.de>
32678
32679         * lto-wrapper.cc (merge_and_complain): Handle
32680         -funwind-tables and -fasynchronous-unwind-tables.
32681         (append_compiler_options): Likewise.
32682
32683 2023-02-09  Richard Biener  <rguenther@suse.de>
32684
32685         PR tree-optimization/26854
32686         * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
32687         view around insert_updated_phi_nodes_for.
32688         * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
32689         in tree view.
32690         (walk_aliased_vdefs_1): Likewise.
32691
32692 2023-02-08  Gerald Pfeifer  <gerald@pfeifer.com>
32693
32694         * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
32695
32696 2023-02-08  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
32697
32698         PR target/108505
32699         * config.gcc (tm_mlib_file): Define new variable.
32700
32701 2023-02-08  Jakub Jelinek  <jakub@redhat.com>
32702
32703         PR tree-optimization/108692
32704         * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
32705         widened_code which is different from code, don't call
32706         vect_look_through_possible_promotion but instead just check op is
32707         SSA_NAME with integral type for which vect_is_simple_use is true
32708         and call set_op on this_unprom.
32709
32710 2023-02-08  Andrea Corallo  <andrea.corallo@arm.com>
32711
32712         * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
32713         declaration.
32714         * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
32715         definition.
32716         * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
32717         to 'aarch_ra_sign_key'.
32718         * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
32719         declaration.
32720         * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
32721         * config/arm/arm.cc (enum aarch_key_type): Remove definition.
32722         * config/arm/arm.opt: Define.
32723
32724 2023-02-08  Richard Sandiford  <richard.sandiford@arm.com>
32725
32726         PR tree-optimization/108316
32727         * tree-vect-stmts.cc (get_load_store_type): When using
32728         internal functions for gather/scatter, make sure that the type
32729         of the offset argument is consistent with the offset vector type.
32730
32731 2023-02-08  Vladimir N. Makarov  <vmakarov@redhat.com>
32732
32733         Revert:
32734         2023-02-07  Vladimir N. Makarov  <vmakarov@redhat.com>
32735
32736         * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
32737         * ira.cc (validate_equiv_mem): Check memref address variance.
32738         (update_equiv_regs): Define caller save equivalence for
32739         valid_combine.
32740         (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
32741         * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
32742         call_save_p.  Use caller save equivalence depending on the arg.
32743         (split_reg): Adjust the call.
32744
32745 2023-02-08  Jakub Jelinek  <jakub@redhat.com>
32746
32747         * tree.def (SAD_EXPR): Remove outdated comment about missing
32748         WIDEN_MINUS_EXPR.
32749
32750 2023-02-07  Marek Polacek  <polacek@redhat.com>
32751
32752         * doc/invoke.texi: Update -fchar8_t documentation.
32753
32754 2023-02-07  Vladimir N. Makarov  <vmakarov@redhat.com>
32755
32756         * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
32757         * ira.cc (validate_equiv_mem): Check memref address variance.
32758         (update_equiv_regs): Define caller save equivalence for
32759         valid_combine.
32760         (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
32761         * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
32762         call_save_p.  Use caller save equivalence depending on the arg.
32763         (split_reg): Adjust the call.
32764
32765 2023-02-07  Richard Biener  <rguenther@suse.de>
32766
32767         PR tree-optimization/26854
32768         * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
32769         instead of immediate uses.
32770
32771 2023-02-07  Jakub Jelinek  <jakub@redhat.com>
32772
32773         PR tree-optimization/106923
32774         * ipa-split.cc (execute_split_functions): Don't split returns_twice
32775         functions.
32776
32777 2023-02-07  Jakub Jelinek  <jakub@redhat.com>
32778
32779         PR tree-optimization/106433
32780         * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
32781         (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
32782
32783 2023-02-07  Jan Hubicka  <jh@suse.cz>
32784
32785         * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
32786         for znver4.
32787
32788 2023-02-06  Andrew Stubbs  <ams@codesourcery.com>
32789
32790         * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
32791         (process_asm): Create a constructor for GCN_STACK_SIZE.
32792         (main): Parse the -mstack-size option.
32793
32794 2023-02-06  Alex Coplan  <alex.coplan@arm.com>
32795
32796         PR target/104921
32797         * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
32798         Use correct constraint for operand 3.
32799
32800 2023-02-06  Martin Jambor  <mjambor@suse.cz>
32801
32802         * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
32803
32804 2023-02-06  Xi Ruoyao  <xry111@xry111.site>
32805
32806         * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
32807         New define_int_iterator.
32808         (bytepick_d_ashift_amount): Likewise.
32809         (bytepick_imm): New define_int_attr.
32810         (bytepick_w_lshiftrt_amount): Likewise.
32811         (bytepick_d_lshiftrt_amount): Likewise.
32812         (bytepick_w_<bytepick_imm>): New define_insn template.
32813         (bytepick_w_<bytepick_imm>_extend): Likewise.
32814         (bytepick_d_<bytepick_imm>): Likewise.
32815         (bytepick_w): Remove unused define_insn.
32816         (bytepick_d): Likewise.
32817         (UNSPEC_BYTEPICK_W): Remove unused unspec.
32818         (UNSPEC_BYTEPICK_D): Likewise.
32819         * config/loongarch/predicates.md (const_0_to_3_operand):
32820         Remove unused define_predicate.
32821         (const_0_to_7_operand): Likewise.
32822
32823 2023-02-06  Jakub Jelinek  <jakub@redhat.com>
32824
32825         PR tree-optimization/108655
32826         * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
32827         or -fsanitize=unreachable -fsanitize-trap=unreachable return
32828         BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
32829
32830 2023-02-05  Gerald Pfeifer  <gerald@pfeifer.com>
32831
32832         * doc/install.texi (Specific): Remove PW32.
32833
32834 2023-02-03  Jakub Jelinek  <jakub@redhat.com>
32835
32836         PR tree-optimization/108647
32837         * range-op.cc (operator_equal::op1_range,
32838         operator_not_equal::op1_range): Don't test op2 bound
32839         equality if op2.undefined_p (), instead set_varying.
32840         (operator_lt::op1_range, operator_le::op1_range,
32841         operator_gt::op1_range, operator_ge::op1_range): Return false if
32842         op2.undefined_p ().
32843         (operator_lt::op2_range, operator_le::op2_range,
32844         operator_gt::op2_range, operator_ge::op2_range): Return false if
32845         op1.undefined_p ().
32846
32847 2023-02-03  Aldy Hernandez  <aldyh@redhat.com>
32848
32849         PR tree-optimization/108639
32850         * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
32851         widest_int.
32852         (irange::operator==): Same.
32853
32854 2023-02-03  Aldy Hernandez  <aldyh@redhat.com>
32855
32856         PR tree-optimization/108647
32857         * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
32858         (foperator_lt::op2_range): Same.
32859         (foperator_le::op1_range): Same.
32860         (foperator_le::op2_range): Same.
32861         (foperator_gt::op1_range): Same.
32862         (foperator_gt::op2_range): Same.
32863         (foperator_ge::op1_range): Same.
32864         (foperator_ge::op2_range): Same.
32865         (foperator_unordered_lt::op1_range): Same.
32866         (foperator_unordered_lt::op2_range): Same.
32867         (foperator_unordered_le::op1_range): Same.
32868         (foperator_unordered_le::op2_range): Same.
32869         (foperator_unordered_gt::op1_range): Same.
32870         (foperator_unordered_gt::op2_range): Same.
32871         (foperator_unordered_ge::op1_range): Same.
32872         (foperator_unordered_ge::op2_range): Same.
32873
32874 2023-02-03  Andrew MacLeod  <amacleod@redhat.com>
32875
32876         PR tree-optimization/107570
32877         * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
32878
32879 2023-02-03  Gaius Mulley  <gaiusmod2@gmail.com>
32880
32881         * doc/gm2.texi (Internals): Remove from menu.
32882         (Using): Comment out ifnohtml conditional.
32883         (Documentation): Use gcc url.
32884         (License): Node simplified.
32885         (Copying): New node.  Include gpl_v3_without_node.
32886         (Contributing): Node simplified.
32887         (Internals): Commented out.
32888         (Libraries): Node simplified.
32889         (Indices): Ditto.
32890         (Contents): Ditto.
32891         (Functions): Ditto.
32892
32893 2023-02-03  Christophe Lyon  <christophe.lyon@arm.com>
32894
32895         * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
32896         attribute.
32897         (mve_vqshluq_m_n_s<mode>): Likewise.
32898         (mve_vshlq_m_<supf><mode>): Likewise.
32899         (mve_vsriq_m_n_<supf><mode>): Likewise.
32900         (mve_vsubq_m_<supf><mode>): Likewise.
32901
32902 2023-02-03  Martin Jambor  <mjambor@suse.cz>
32903
32904         PR ipa/108384
32905         * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
32906         when comparing to an IPA-CP value.
32907         (dump_list_of_param_indices): New function.
32908         (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
32909         Dump removed candidates using dump_list_of_param_indices.
32910         * ipa-param-manipulation.cc
32911         (ipa_param_body_adjustments::modify_expression): Add assert checking
32912         sizes of a VIEW_CONVERT_EXPR will match.
32913         (ipa_param_body_adjustments::modify_assignment): Likewise.
32914
32915 2023-02-03  Monk Chiang  <monk.chiang@sifive.com>
32916
32917         * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
32918         * config/riscv/riscv.cc: Ditto.
32919
32920 2023-02-03  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32921
32922         * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
32923         (sll.vv): Ditto.
32924         (%3,%4): Ditto.
32925         (%3,%v4): Ditto.
32926         * config/riscv/vector.md: Ditto.
32927
32928 2023-02-03  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
32929
32930         * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
32931         * config/riscv/riscv-vector-builtins-bases.cc: New class.
32932         * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
32933         (vsra): Ditto.
32934         (vsrl): Ditto.
32935         * config/riscv/riscv-vector-builtins.cc: Ditto.
32936         * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
32937
32938 2023-02-02  Iain Sandoe  <iain@sandoe.co.uk>
32939
32940         * toplev.cc (toplev::main): Only print the version information header
32941         from toplevel main().
32942
32943 2023-02-02  Paul-Antoine Arras  <pa@codesourcery.com>
32944
32945         * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
32946         cond_{ashl|ashr|lshr}
32947
32948 2023-02-02  Richard Sandiford  <richard.sandiford@arm.com>
32949
32950         PR rtl-optimization/108086
32951         * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
32952         Adjust size-related commentary accordingly.
32953
32954 2023-02-02  Richard Sandiford  <richard.sandiford@arm.com>
32955
32956         PR rtl-optimization/108508
32957         * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
32958         the splay tree search gives the first clobber in the second group,
32959         make sure that the root of the first clobber group is updated
32960         correctly.  Enter the new clobber group into the definition splay
32961         tree.
32962
32963 2023-02-02  Jin Ma  <jinma@linux.alibaba.com>
32964
32965         * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
32966         Fix finding best match score.
32967
32968 2023-02-02  Jakub Jelinek  <jakub@redhat.com>
32969
32970         PR debug/106746
32971         PR rtl-optimization/108463
32972         PR target/108484
32973         * cselib.cc (cselib_current_insn): Move declaration earlier.
32974         (cselib_hasher::equal): For debug only locs, temporarily override
32975         cselib_current_insn to their l->setting_insn for the
32976         rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
32977         promote some debug locs.
32978         * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
32979         when using cselib call cselib_lookup_from_insn on the address but
32980         don't substitute it.
32981
32982 2023-02-02  Richard Biener  <rguenther@suse.de>
32983
32984         PR middle-end/108625
32985         * genmatch.cc (expr::gen_transform): Also disallow resimplification
32986         from pushing to lseq with force_leaf.
32987         (dt_simplify::gen_1): Likewise.
32988
32989 2023-02-02  Andrew Stubbs  <ams@codesourcery.com>
32990
32991         * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
32992         (struct kernargs): Replace the common content with kernargs_abi.
32993         (struct heap): Delete.
32994         (main): Read GCN_STACK_SIZE envvar.
32995         Allocate space for the device stacks.
32996         Write the new kernargs fields.
32997         * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
32998         (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
32999         PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
33000         (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
33001         (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
33002         Set up the stacks from the values in the kernargs, not private.
33003         (gcn_expand_builtin_1): Match the stack configuration in the prologue.
33004         (gcn_hsa_declare_function_name): Turn off the private segment.
33005         (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
33006         * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
33007         * config/gcn/gcn.opt (mstack-size): Change the description.
33008
33009 2023-02-02  Andre Vieira  <andre.simoesdiasvieira@arm.com>
33010
33011         PR target/108443
33012         * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
33013         * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
33014         addressing MVE predicate modes.
33015         (mve_bool_vec_to_const): Change to represent correct MVE predicate
33016         format.
33017         (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
33018         modes.
33019         (arm_vector_mode_supported_p): Likewise.
33020         (arm_mode_to_pred_mode): Add V2QI.
33021         * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
33022         qualifier.
33023         (UNOP_PRED_PRED_QUALIFIERS): New qualifier
33024         (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
33025         (v2qi_UP): New macro.
33026         (v4bi_UP): New macro.
33027         (v8bi_UP): New macro.
33028         (v16bi_UP): New macro.
33029         (arm_expand_builtin_args): Make it able to expand the new predicate
33030         modes.
33031         * config/arm/arm-modes.def (V2QI): New mode.
33032         * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
33033         Pred4x4_t): Remove unused predicate builtin types.
33034         * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
33035         __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
33036         __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
33037         * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
33038         vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
33039         * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
33040         of MODE_VECTOR_BOOL.
33041         * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
33042         (MVE_VPRED): Likewise.
33043         (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
33044         (MVE_vctp): New mode attribute.
33045         (mode1): Remove.
33046         (VCTPQ): Remove.
33047         (VCTPQ_M): Remove.
33048         * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
33049         (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
33050         attributes.
33051         (mve_vpnothi): Rename this...
33052         (mve_vpnotv16bi): ... to this.
33053         (mve_vctp<mode1>q_mhi): Rename this...
33054         (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
33055         (mve_vldrdq_gather_base_z_<supf>v2di,
33056         mve_vldrdq_gather_offset_z_<supf>v2di,
33057         mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
33058         mve_vstrdq_scatter_base_p_<supf>v2di,
33059         mve_vstrdq_scatter_offset_p_<supf>v2di,
33060         mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
33061         mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
33062         mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
33063         mve_vstrdq_scatter_base_wb_p_<supf>v2di,
33064         mve_vldrdq_gather_base_wb_z_<supf>v2di,
33065         mve_vldrdq_gather_base_nowb_z_<supf>v2di,
33066         mve_vldrdq_gather_base_wb_z_<supf>v2di_insn):  Use V2QI insead of HI for
33067         predicates.
33068         * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
33069         these...
33070         (VCTP): ... with this.
33071         (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
33072         (VCTP_M): ... with this.
33073         * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
33074         VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
33075
33076 2023-02-02  Andre Vieira  <andre.simoesdiasvieira@arm.com>
33077
33078         PR target/107674
33079         * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
33080         (arm_modes_tieable_p): Make MVE predicate modes tieable.
33081         * config/arm/arm.h (VALID_MVE_PRED_MODE):  New define.
33082         * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
33083         simplify_subreg to simplify subregs where the outermode is not scalar.
33084
33085 2023-02-02  Andre Vieira  <andre.simoesdiasvieira@arm.com>
33086
33087         PR target/107674
33088         * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
33089         new qualifiers parameter and use unsigned short type for MVE predicate.
33090         (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
33091         parameter.
33092         (arm_init_crypto_builtins): Likewise.
33093
33094 2023-02-02  Jakub Jelinek  <jakub@redhat.com>
33095
33096         PR ipa/107300
33097         * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
33098         * internal-fn.def (TRAP): Remove.
33099         * internal-fn.cc (expand_TRAP): Remove.
33100         * tree.cc (build_common_builtin_nodes): Define
33101         BUILT_IN_UNREACHABLE_TRAP if not yet defined.
33102         (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
33103         instead of BUILT_IN_TRAP.
33104         * gimple.cc (gimple_build_builtin_unreachable): Remove
33105         emitting internal function for BUILT_IN_TRAP.
33106         * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
33107         * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
33108         BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
33109         * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
33110         BUILT_IN_UNREACHABLE_TRAP.
33111         * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
33112         * tree-cfg.cc (verify_gimple_call,
33113         pass_warn_function_return::execute): Likewise.
33114         * attribs.cc (decl_attributes): Don't report exclusions on
33115         BUILT_IN_UNREACHABLE_TRAP either.
33116
33117 2023-02-02  liuhongt  <hongtao.liu@intel.com>
33118
33119         PR tree-optimization/108601
33120         * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
33121         * tree-vect-loop.cc
33122         (vectorizable_nonlinear_induction): Remove
33123         vect_can_peel_nonlinear_iv_p.
33124         (vect_can_peel_nonlinear_iv_p): Don't peel
33125         nonlinear iv(mult or shift) for epilog when vf is not
33126         constant and moved the defination to ..
33127         * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
33128         .. Here.
33129
33130 2023-02-02  Jakub Jelinek  <jakub@redhat.com>
33131
33132         PR middle-end/108435
33133         * tree-nested.cc (convert_nonlocal_omp_clauses)
33134         <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
33135         is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
33136         before calling declare_vars.
33137         (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
33138         with the OMP_CLAUSE_LASTPRIVATE handling except for whether
33139         seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
33140         or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
33141
33142 2023-02-01  Tamar Christina  <tamar.christina@arm.com>
33143
33144         * common/config/aarch64/aarch64-common.cc
33145         (struct aarch64_option_extension): Add native_detect and document struct
33146         a bit more.
33147         (all_extensions): Set new field native_detect.
33148         * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
33149         unused struct.
33150
33151 2023-02-01  Martin Liska  <mliska@suse.cz>
33152
33153         * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
33154         value if set.
33155
33156 2023-02-01  Andrew MacLeod  <amacleod@redhat.com>
33157
33158         PR tree-optimization/108356
33159         * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
33160         do a search of the DOM tree for a range.
33161
33162 2023-02-01  Martin Liska  <mliska@suse.cz>
33163
33164         PR ipa/108509
33165         * cgraphunit.cc (walk_polymorphic_call_targets): Insert
33166         ony non-null values.
33167         * ipa.cc (walk_polymorphic_call_targets): Likewise.
33168
33169 2023-02-01  Martin Liska  <mliska@suse.cz>
33170
33171         PR driver/108572
33172         * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
33173         -gz=zstd.
33174
33175 2023-02-01  Jakub Jelinek  <jakub@redhat.com>
33176
33177         PR debug/108573
33178         * ree.cc (combine_reaching_defs): Don't return false for paradoxical
33179         subregs in DEBUG_INSNs.
33180
33181 2023-02-01  Richard Sandiford  <richard.sandiford@arm.com>
33182
33183         * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
33184
33185 2023-02-01  Andreas Krebbel  <krebbel@linux.ibm.com>
33186
33187         * config/s390/s390.cc (s390_restore_gpr_p): New function.
33188         (s390_preserve_gpr_arg_in_range_p): New function.
33189         (s390_preserve_gpr_arg_p): New function.
33190         (s390_preserve_fpr_arg_p): New function.
33191         (s390_register_info_stdarg_fpr): Rename to ...
33192         (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
33193         (s390_register_info_stdarg_gpr): Rename to ...
33194         (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
33195         (s390_register_info): Use the renamed functions above.
33196         (s390_optimize_register_info): Likewise.
33197         (save_fpr): Generate CFI for -mpreserve-args.
33198         (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
33199         (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
33200         (s390_optimize_prologue): Likewise.
33201         * config/s390/s390.opt: New option -mpreserve-args
33202
33203 2023-02-01  Andreas Krebbel  <krebbel@linux.ibm.com>
33204
33205         * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
33206         (restore_gprs): Likewise.
33207         (s390_emit_stack_tie): Make the stack_tie to be dependent on the
33208         frame pointer if a frame-pointer is used.
33209         (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
33210         * config/s390/s390.md (stack_tie): Add a register operand and
33211         rename to ...
33212         (@stack_tie<mode>): ... this.
33213
33214 2023-02-01  Andreas Krebbel  <krebbel@linux.ibm.com>
33215
33216         * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
33217         EMIT_CFI parameter.
33218         (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
33219         * reg-notes.def (REG_CFA_NOTE): New reg note definition.
33220
33221 2023-02-01  Richard Biener  <rguenther@suse.de>
33222
33223         PR middle-end/108500
33224         * dominance.cc (assign_dfs_numbers): Replace recursive DFS
33225         with tree traversal algorithm.
33226
33227 2023-02-01  Jason Merrill  <jason@redhat.com>
33228
33229         * doc/invoke.texi: Document -Wno-changes-meaning.
33230
33231 2023-02-01  David Malcolm  <dmalcolm@redhat.com>
33232
33233         * doc/invoke.texi (Static Analyzer Options): Add notes about
33234         limitations of -fanalyzer.
33235
33236 2023-01-31  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33237
33238         * config/riscv/constraints.md (vj): New.
33239         (vk): Ditto
33240         * config/riscv/iterators.md: Add more opcode.
33241         * config/riscv/predicates.md (vector_arith_operand): New.
33242         (vector_neg_arith_operand): New.
33243         (vector_shift_operand): New.
33244         * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
33245         * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
33246         (vsub): Ditto.
33247         (vand): Ditto.
33248         (vor): Ditto.
33249         (vxor): Ditto.
33250         (vsll): Ditto.
33251         (vsra): Ditto.
33252         (vsrl): Ditto.
33253         (vmin): Ditto.
33254         (vmax): Ditto.
33255         (vminu): Ditto.
33256         (vmaxu): Ditto.
33257         (vmul): Ditto.
33258         (vdiv): Ditto.
33259         (vrem): Ditto.
33260         (vdivu): Ditto.
33261         (vremu): Ditto.
33262         * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
33263         (vsub): Ditto.
33264         (vand): Ditto.
33265         (vor): Ditto.
33266         (vxor): Ditto.
33267         (vsll): Ditto.
33268         (vsra): Ditto.
33269         (vsrl): Ditto.
33270         (vmin): Ditto.
33271         (vmax): Ditto.
33272         (vminu): Ditto.
33273         (vmaxu): Ditto.
33274         (vmul): Ditto.
33275         (vdiv): Ditto.
33276         (vrem): Ditto.
33277         (vdivu): Ditto.
33278         (vremu): Ditto.
33279         * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
33280         * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
33281         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
33282         (DEF_RVV_U_OPS): New.
33283         (rvv_arg_type_info::get_base_vector_type): Handle
33284         RVV_BASE_shift_vector.
33285         (rvv_arg_type_info::get_tree_type): Ditto.
33286         * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
33287         RVV_BASE_shift_vector.
33288         * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
33289         * config/riscv/vector-iterators.md: Handle more opcode.
33290         * config/riscv/vector.md (@pred_<optab><mode>): New.
33291
33292 2023-01-31  Philipp Tomsich  <philipp.tomsich@vrull.eu>
33293
33294         PR target/108589
33295         * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
33296         REG_P on SET_DEST.
33297
33298 2023-01-31  Richard Sandiford  <richard.sandiford@arm.com>
33299
33300         PR tree-optimization/108608
33301         * tree-vect-loop.cc (vect_transform_reduction): Handle single
33302         def-use cycles that involve function calls rather than tree codes.
33303
33304 2023-01-31  Andrew MacLeod  <amacleod@redhat.com>
33305
33306         PR tree-optimization/108385
33307         * gimple-range-gori.cc (gori_compute::compute_operand_range):
33308         Allow VARYING computations to continue if there is a relation.
33309         * range-op.cc (pointer_plus_operator::op2_range): New.
33310
33311 2023-01-31  Andrew MacLeod  <amacleod@redhat.com>
33312
33313         PR tree-optimization/108359
33314         * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
33315         (range_operator::fold_range): If op1 is equivalent to op2 then
33316         invoke new fold_in_parts_equiv to operate on sub-components.
33317         * range-op.h (wi_fold_in_parts_equiv): New prototype.
33318
33319 2023-01-31  Andrew MacLeod  <amacleod@redhat.com>
33320
33321         * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
33322         not abort calculations if there is a valid relation available.
33323         (gori_compute::refine_using_relation): Pass correct relation trio.
33324         (gori_compute::compute_operand1_range): Create trio and use it.
33325         (gori_compute::compute_operand2_range): Ditto.
33326         * range-op.cc (operator_plus::op1_range): Use correct trio member.
33327         (operator_minus::op1_range): Use correct trio member.
33328         * value-relation.cc (value_relation::create_trio): New.
33329         * value-relation.h (value_relation::create_trio): New prototype.
33330
33331 2023-01-31  Jakub Jelinek  <jakub@redhat.com>
33332
33333         PR target/108599
33334         * config/i386/i386-expand.cc
33335         (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
33336         CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
33337         equal to bitsize of mode.
33338
33339 2023-01-31  Jakub Jelinek  <jakub@redhat.com>
33340
33341         PR rtl-optimization/108596
33342         * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
33343         ends with asm goto and has a crossing fallthrough edge to the same bb
33344         that contains at least one of its labels by restoring EDGE_CROSSING
33345         flag even on possible edge from cur_bb to new_bb successor.
33346
33347 2023-01-31  Jakub Jelinek  <jakub@redhat.com>
33348
33349         PR c++/105593
33350         * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
33351         _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
33352         _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
33353         _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
33354         uninitialized automatic variable __W.
33355
33356 2023-01-31  Gerald Pfeifer  <gerald@pfeifer.com>
33357
33358         * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
33359
33360 2023-01-30  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33361
33362         * config/riscv/riscv-protos.h (get_vector_mode): New function.
33363         * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
33364         * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
33365         (class loadstore): Adjust for indexed loads/stores support.
33366         (BASE): Ditto.
33367         * config/riscv/riscv-vector-builtins-bases.h: New function declare.
33368         * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
33369         (vluxei16): Ditto.
33370         (vluxei32): Ditto.
33371         (vluxei64): Ditto.
33372         (vloxei8): Ditto.
33373         (vloxei16): Ditto.
33374         (vloxei32): Ditto.
33375         (vloxei64): Ditto.
33376         (vsuxei8): Ditto.
33377         (vsuxei16): Ditto.
33378         (vsuxei32): Ditto.
33379         (vsuxei64): Ditto.
33380         (vsoxei8): Ditto.
33381         (vsoxei16): Ditto.
33382         (vsoxei32): Ditto.
33383         (vsoxei64): Ditto.
33384         * config/riscv/riscv-vector-builtins-shapes.cc
33385         (struct indexed_loadstore_def): New class.
33386         (SHAPE): Ditto.
33387         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33388         * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
33389         for indexed loads/stores support.
33390         (check_required_extensions): Ditto.
33391         (rvv_arg_type_info::get_base_vector_type): New function.
33392         (rvv_arg_type_info::get_tree_type): Ditto.
33393         (function_builder::add_unique_function): Adjust for indexed loads/stores
33394         support.
33395         (function_expander::use_exact_insn): New function.
33396         * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
33397         indexed loads/stores support.
33398         (struct rvv_arg_type_info): Ditto.
33399         (function_expander::index_mode): New function.
33400         (function_base::apply_tail_policy_p): Ditto.
33401         (function_base::apply_mask_policy_p): Ditto.
33402         * config/riscv/vector-iterators.md (unspec): New unspec.
33403         * config/riscv/vector.md (unspec): Ditto.
33404         (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
33405         pattern.
33406         (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
33407         (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
33408         (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
33409         (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
33410         (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
33411         (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
33412         (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
33413         (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
33414         (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
33415         (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
33416         (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
33417         (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
33418         (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
33419
33420 2023-01-30  Flavio Cruz  <flaviocruz@gmail.com>
33421
33422         * config.gcc: Recognize x86_64-*-gnu* targets and include
33423         i386/gnu64.h.
33424         * config/i386/gnu64.h: Define configuration for new target
33425         including ld.so location.
33426
33427 2023-01-30  Philipp Tomsich  <philipp.tomsich@vrull.eu>
33428
33429         * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
33430         ampere1a to include SM4.
33431
33432 2023-01-30  Andrew Pinski  <apinski@marvell.com>
33433
33434         PR tree-optimization/108582
33435         * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
33436         for middlebb to have no phi nodes.
33437
33438 2023-01-30  Richard Biener  <rguenther@suse.de>
33439
33440         PR tree-optimization/108574
33441         * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
33442         sameval and def, ignore the equivalence if there's the
33443         danger of oscillating between two values.
33444
33445 2023-01-30  Andreas Schwab  <schwab@suse.de>
33446
33447         * common/config/riscv/riscv-common.cc
33448         (riscv_option_optimization_table)
33449         [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
33450         -fasynchronous-unwind-tables and -funwind-tables.
33451         * config.gcc (riscv*-*-linux*): Define
33452         TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
33453
33454 2023-01-30  YunQiang Su  <yunqiang.su@cipunited.com>
33455
33456         * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
33457         value of includedir.
33458
33459 2023-01-30  Richard Biener  <rguenther@suse.de>
33460
33461         PR ipa/108511
33462         * cgraph.cc (possibly_call_in_translation_unit_p): Relax
33463         assert.
33464
33465 2023-01-30  liuhongt  <hongtao.liu@intel.com>
33466
33467         * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
33468         * doc/invoke.texi: Ditto.
33469
33470 2023-01-29  Jan Hubicka  <hubicka@ucw.cz>
33471
33472         * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
33473         (stmt_may_terminate_function_p): If assuming return or EH
33474         volatile asm is safe.
33475         (find_always_executed_bbs): Fix handling of terminating BBS and
33476         infinite loops; add debug output.
33477         * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
33478
33479 2023-01-28  Philipp Tomsich  <philipp.tomsich@vrull.eu>
33480
33481         * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
33482         off-by-one in checking the permissible shift-amount.
33483
33484 2023-01-28  Gerald Pfeifer  <gerald@pfeifer.com>
33485
33486         * doc/extend.texi (Named Address Spaces): Update link to the
33487         AVR-Libc manual.
33488
33489 2023-01-28  Gerald Pfeifer  <gerald@pfeifer.com>
33490
33491         * doc/standards.texi (Standards): Fix markup.
33492
33493 2023-01-28  Gerald Pfeifer  <gerald@pfeifer.com>
33494
33495         * doc/standards.texi (Standards): Update link to Objective-C book.
33496
33497 2023-01-28  Gerald Pfeifer  <gerald@pfeifer.com>
33498
33499         * doc/invoke.texi (Instrumentation Options): Update reference to
33500         AddressSanitizer.
33501
33502 2023-01-28  Gerald Pfeifer  <gerald@pfeifer.com>
33503
33504         * doc/standards.texi: Update Go1 link.
33505
33506 2023-01-28  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33507
33508         * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
33509         * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
33510         Support vlse/vsse.
33511         (BASE): Ditto.
33512         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33513         * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
33514         (vsse): New class.
33515         * config/riscv/riscv-vector-builtins.cc
33516         (function_expander::use_contiguous_load_insn): Support vlse/vsse.
33517         * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
33518         (@pred_strided_store<mode>): Ditto.
33519
33520 2023-01-28  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33521
33522         * config/riscv/vector.md (tail_policy_op_idx): Remove.
33523         (mask_policy_op_idx): Remove.
33524         (avl_type_op_idx): Remove.
33525
33526 2023-01-27  Richard Sandiford  <richard.sandiford@arm.com>
33527
33528         PR tree-optimization/96373
33529         * tree.h (sign_mask_for): Declare.
33530         * tree.cc (sign_mask_for): New function.
33531         (signed_or_unsigned_type_for): For vector types, try to use the
33532         related_int_vector_mode.
33533         * genmatch.cc (commutative_op): Handle conditional internal functions.
33534         * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
33535
33536 2023-01-27  Richard Sandiford  <richard.sandiford@arm.com>
33537
33538         * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
33539         Use the likely minimum VF when bounding the denominators to
33540         the estimated number of iterations.
33541
33542 2023-01-27  Richard Biener  <rguenther@suse.de>
33543
33544         PR target/55522
33545         * doc/invoke.texi (-shared): Clarify effect on -ffast-math
33546         and -Ofast FP environment side-effects.
33547
33548 2023-01-27  Richard Biener  <rguenther@suse.de>
33549
33550         PR target/55522
33551         * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
33552         Don't add crtfastmath.o for -shared.
33553
33554 2023-01-27  Richard Biener  <rguenther@suse.de>
33555
33556         PR target/55522
33557         * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
33558         for -shared.
33559
33560 2023-01-27  Richard Biener  <rguenther@suse.de>
33561
33562         PR target/55522
33563         * config/alpha/linux.h (ENDFILE_SPEC): Don't add
33564         crtfastmath.o for -shared.
33565
33566 2023-01-27  Andrew MacLeod  <amacleod@redhat.com>
33567
33568         PR tree-optimization/108306
33569         * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
33570         varying for shifts that are always out of void range.
33571         (operator_rshift::fold_range): Return [0, 0] not
33572         varying for shifts that are always out of void range.
33573
33574 2023-01-27  Andrew MacLeod  <amacleod@redhat.com>
33575
33576         PR tree-optimization/108447
33577         * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
33578         Do not attempt to fold HONOR_NAN types.
33579
33580 2023-01-27  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33581
33582         * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
33583         Remove _m suffix for "vop_m" C++ overloaded API name.
33584
33585 2023-01-27  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33586
33587         * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
33588         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33589         * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
33590         (vsm): Ditto.
33591         * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
33592         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
33593         (vbool64_t): Ditto.
33594         (vbool32_t): Ditto.
33595         (vbool16_t): Ditto.
33596         (vbool8_t): Ditto.
33597         (vbool4_t): Ditto.
33598         (vbool2_t): Ditto.
33599         (vbool1_t): Ditto.
33600         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
33601         (rvv_arg_type_info::get_tree_type): Ditto.
33602         (function_expander::use_contiguous_load_insn): Ditto.
33603         * config/riscv/vector.md (@pred_store<mode>): Ditto.
33604
33605 2023-01-27  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33606
33607         * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
33608         (vsetvl_discard_result_insn_p): New function.
33609         (reg_killed_by_bb_p): rename to find_reg_killed_by.
33610         (find_reg_killed_by): New name.
33611         (get_vl): allow it to be called by more functions.
33612         (has_vsetvl_killed_avl_p): Add condition.
33613         (get_avl): allow it to be called by more functions.
33614         (insn_should_be_added_p): New function.
33615         (get_all_nonphi_defs): Refine function.
33616         (get_all_sets): Ditto.
33617         (get_same_bb_set): New function.
33618         (any_insn_in_bb_p): Ditto.
33619         (any_set_in_bb_p): Ditto.
33620         (get_vl_vtype_info): Add VLMAX forward optimization.
33621         (source_equal_p): Fix issues.
33622         (extract_single_source): Refine.
33623         (avl_info::multiple_source_equal_p): New function.
33624         (avl_info::operator==): Adjust for final version.
33625         (vl_vtype_info::operator==): Ditto.
33626         (vl_vtype_info::same_avl_p): Ditto.
33627         (vector_insn_info::parse_insn): Ditto.
33628         (vector_insn_info::available_p): New function.
33629         (vector_insn_info::merge): Adjust for final version.
33630         (vector_insn_info::dump): Add hard_empty.
33631         (pass_vsetvl::hard_empty_block_p): New function.
33632         (pass_vsetvl::backward_demand_fusion): Adjust for final version.
33633         (pass_vsetvl::forward_demand_fusion): Ditto.
33634         (pass_vsetvl::demand_fusion): Ditto.
33635         (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
33636         (pass_vsetvl::compute_local_properties): Adjust for final version.
33637         (pass_vsetvl::can_refine_vsetvl_p): Ditto.
33638         (pass_vsetvl::refine_vsetvls): Ditto.
33639         (pass_vsetvl::commit_vsetvls): Ditto.
33640         (pass_vsetvl::propagate_avl): New function.
33641         (pass_vsetvl::lazy_vsetvl): Adjust for new version.
33642         * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
33643
33644 2023-01-27  Jakub Jelinek  <jakub@redhat.com>
33645
33646         PR other/108560
33647         * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
33648         from size_t to int.
33649
33650 2023-01-27  Jakub Jelinek  <jakub@redhat.com>
33651
33652         PR ipa/106061
33653         * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
33654         redirection of calls to __builtin_trap in addition to redirection
33655         to __builtin_unreachable.
33656
33657 2023-01-27  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33658
33659         * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
33660
33661 2023-01-27  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33662
33663         * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
33664         (emit_vsetvl_insn): Ditto.
33665
33666 2023-01-27  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33667
33668         * config/riscv/vector.md: Fix constraints.
33669
33670 2023-01-27  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33671
33672         * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
33673
33674 2023-01-27  Patrick Palka  <ppalka@redhat.com>
33675             Jakub Jelinek  <jakub@redhat.com>
33676
33677         * tree-core.h (tree_code_type, tree_code_length): For
33678         C++17 and later, add inline keyword, otherwise don't define
33679         the arrays, but declare extern arrays.
33680         * tree.cc (tree_code_type, tree_code_length): Define these
33681         arrays for C++14 and older.
33682
33683 2023-01-27  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33684
33685         * config/riscv/riscv-vsetvl.h: Change it into public.
33686
33687 2023-01-27  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33688
33689         * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
33690         pass.
33691
33692 2023-01-27  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33693
33694         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
33695
33696 2023-01-27  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33697
33698         * config/riscv/vector.md: Fix incorrect attributes.
33699
33700 2023-01-27  Richard Biener  <rguenther@suse.de>
33701
33702         PR target/55522
33703         * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
33704         Don't add crtfastmath.o for -shared.
33705
33706 2023-01-27  Alexandre Oliva  <oliva@gnu.org>
33707
33708         * doc/options.texi (option, RejectNegative): Mention that
33709         -g-started options are also implicitly negatable.
33710
33711 2023-01-26  Kito Cheng  <kito.cheng@sifive.com>
33712
33713         * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
33714         Use get_typenode_from_name to get fixed-width integer type
33715         nodes.
33716         * config/riscv/riscv-vector-builtins.def: Update define with
33717         fixed-width integer type nodes.
33718
33719 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33720
33721         * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
33722         (real_insn_and_same_bb_p): New function.
33723         (same_bb_and_after_or_equal_p): Remove it.
33724         (before_p): New function.
33725         (reg_killed_by_bb_p): Ditto.
33726         (has_vsetvl_killed_avl_p): Ditto.
33727         (get_vl): Move location so that we can call it.
33728         (anticipatable_occurrence_p): Fix issue of AVL=REG support.
33729         (available_occurrence_p): Ditto.
33730         (dominate_probability_p): Remove it.
33731         (can_backward_propagate_p): Remove it.
33732         (get_all_nonphi_defs): New function.
33733         (get_all_predecessors): Ditto.
33734         (any_insn_in_bb_p): Ditto.
33735         (insert_vsetvl): Adjust AVL REG.
33736         (source_equal_p): New function.
33737         (extract_single_source): Ditto.
33738         (avl_info::single_source_equal_p): Ditto.
33739         (avl_info::operator==): Adjust for AVL=REG.
33740         (vl_vtype_info::same_avl_p): Ditto.
33741         (vector_insn_info::set_demand_info): Remove it.
33742         (vector_insn_info::compatible_p): Adjust for AVL=REG.
33743         (vector_insn_info::compatible_avl_p): New function.
33744         (vector_insn_info::merge): Adjust AVL=REG.
33745         (vector_insn_info::dump): Ditto.
33746         (pass_vsetvl::merge_successors): Remove it.
33747         (enum fusion_type): New enum.
33748         (pass_vsetvl::get_backward_fusion_type): New function.
33749         (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
33750         (pass_vsetvl::forward_demand_fusion): Ditto.
33751         (pass_vsetvl::demand_fusion): Ditto.
33752         (pass_vsetvl::prune_expressions): Ditto.
33753         (pass_vsetvl::compute_local_properties): Ditto.
33754         (pass_vsetvl::cleanup_vsetvls): Ditto.
33755         (pass_vsetvl::commit_vsetvls): Ditto.
33756         (pass_vsetvl::init): Ditto.
33757         * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
33758         (enum merge_type): New enum.
33759
33760 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33761
33762         * config/riscv/riscv-vsetvl.cc
33763         (vector_infos_manager::vector_infos_manager): Add probability.
33764         (vector_infos_manager::dump): Ditto.
33765         (pass_vsetvl::compute_probabilities): Ditto.
33766         * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
33767
33768 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33769
33770         * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
33771         (vector_insn_info::merge): Ditto.
33772         (vector_insn_info::dump): Ditto.
33773         (pass_vsetvl::merge_successors): Ditto.
33774         (pass_vsetvl::backward_demand_fusion): Ditto.
33775         (pass_vsetvl::forward_demand_fusion): Ditto.
33776         (pass_vsetvl::commit_vsetvls): Ditto.
33777         * config/riscv/riscv-vsetvl.h: Ditto.
33778
33779 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33780
33781         * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
33782         rinsn.
33783
33784 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33785
33786         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
33787
33788 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33789
33790         * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
33791         Add pre-check for redundant flow.
33792
33793 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33794
33795         * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
33796         (vector_infos_manager::free_bitmap_vectors): Ditto.
33797         (pass_vsetvl::pre_vsetvl): Adjust codes.
33798         * config/riscv/riscv-vsetvl.h: New function declaration.
33799
33800 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33801
33802         * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
33803         (vector_insn_info::set_demand_info): New function.
33804         (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
33805         (pass_vsetvl::merge_successors): Ditto.
33806         (pass_vsetvl::compute_global_backward_infos): Ditto.
33807         (pass_vsetvl::backward_demand_fusion): Ditto.
33808         (pass_vsetvl::forward_demand_fusion): Ditto.
33809         (pass_vsetvl::demand_fusion): New function.
33810         (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
33811         * config/riscv/riscv-vsetvl.h: New function declaration.
33812
33813 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33814
33815         * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
33816
33817 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33818
33819         * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
33820         (pass_vsetvl::compute_global_backward_infos): Simplify codes.
33821
33822 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33823
33824         * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
33825         (backward_propagate_worthwhile_p): Fix non-worthwhile.
33826
33827 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33828
33829         * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
33830
33831 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33832
33833         * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
33834         (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
33835         (pass_vsetvl::commit_vsetvls): Ditto.
33836         * config/riscv/riscv-vsetvl.h: New function declaration.
33837
33838 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33839
33840         * config/riscv/vector.md:
33841
33842 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33843
33844         * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
33845         pred_store for vse.
33846         * config/riscv/riscv-vector-builtins.cc
33847         (function_expander::add_mem_operand): Refine function.
33848         (function_expander::use_contiguous_load_insn): Adjust new
33849         implementation.
33850         (function_expander::use_contiguous_store_insn): Ditto.
33851         * config/riscv/riscv-vector-builtins.h: Refine function.
33852         * config/riscv/vector.md (@pred_store<mode>): New pattern.
33853
33854 2023-01-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
33855
33856         * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
33857
33858 2023-01-26  Marek Polacek  <polacek@redhat.com>
33859
33860         PR middle-end/108543
33861         * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
33862         if it was previously set.
33863
33864 2023-01-26  Jakub Jelinek  <jakub@redhat.com>
33865
33866         PR tree-optimization/108540
33867         * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
33868         are singletons, use range_true even if op1 != op2
33869         when one range is [-0.0, -0.0] and another [0.0, 0.0].  Similarly,
33870         even if intersection of the ranges is empty and one has
33871         zero low bound and another zero high bound, use range_true_and_false
33872         rather than range_false.
33873         (foperator_not_equal::fold_range): If both op1 and op2
33874         are singletons, use range_false even if op1 != op2
33875         when one range is [-0.0, -0.0] and another [0.0, 0.0].  Similarly,
33876         even if intersection of the ranges is empty and one has
33877         zero low bound and another zero high bound, use range_true_and_false
33878         rather than range_true.
33879
33880 2023-01-26  Jakub Jelinek  <jakub@redhat.com>
33881
33882         * value-relation.cc (kind_string): Add const.
33883         (rr_negate_table, rr_swap_table, rr_intersect_table,
33884         rr_union_table, rr_transitive_table): Add static const, change
33885         element type from relation_kind to unsigned char.
33886         (relation_negate, relation_swap, relation_intersect, relation_union,
33887         relation_transitive): Cast rr_*_table element to relation_kind.
33888         (relation_to_code): Add static const.
33889         (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
33890
33891 2023-01-26  Richard Biener  <rguenther@suse.de>
33892
33893         PR tree-optimization/108547
33894         * gimple-predicate-analysis.cc (value_sat_pred_p):
33895         Use widest_int.
33896
33897 2023-01-26  Siddhesh Poyarekar  <siddhesh@gotplt.org>
33898
33899         PR tree-optimization/108522
33900         * tree-object-size.cc (compute_object_offset): Make EXPR
33901         argument non-const.  Call component_ref_field_offset.
33902
33903 2023-01-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
33904
33905         * config/aarch64/aarch64-option-extensions.def (cssc): Specify
33906         FEATURE_STRING field.
33907
33908 2023-01-26  Gerald Pfeifer  <gerald@pfeifer.com>
33909
33910         * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
33911
33912 2023-01-25  Iain Sandoe  <iain@sandoe.co.uk>
33913
33914         PR modula2/102343
33915         PR modula2/108182
33916         * gcc.cc: Provide default specs for Modula-2 so that when the
33917         language is not built-in better diagnostics are emitted for
33918         attempts to use .mod or .m2i file extensions.
33919
33920 2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
33921
33922         * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
33923
33924 2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
33925
33926         * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
33927
33928 2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
33929
33930         * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
33931         Fix spacing.
33932
33933 2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
33934
33935         * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
33936
33937 2023-01-25  Andrea Corallo  <andrea.corallo@arm.com>
33938
33939         * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
33940
33941 2023-01-25  Richard Biener  <rguenther@suse.de>
33942
33943         PR tree-optimization/108523
33944         * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
33945         backedge value for the result when using predication to
33946         prove equivalence.
33947
33948 2023-01-25  Richard Biener  <rguenther@suse.de>
33949
33950         * doc/lto.texi (Command line options): Reword and update reference
33951         to removed lto_read_all_file_options.
33952
33953 2023-01-25  Richard Sandiford  <richard.sandiford@arm.com>
33954
33955         * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
33956         tests.
33957
33958 2023-01-25  Gerald Pfeifer  <gerald@pfeifer.com>
33959
33960         * doc/contrib.texi: Add Jose E. Marchesi.
33961
33962 2023-01-25  Jakub Jelinek  <jakub@redhat.com>
33963
33964         PR tree-optimization/108498
33965         * gimple-ssa-store-merging.cc (class store_operand_info):
33966         End coment with full stop rather than comma.
33967         (split_group): Likewise.
33968         (merged_store_group::apply_stores): Clear string_concatenation if
33969         start or end aren't on a byte boundary.
33970
33971 2023-01-25  Siddhesh Poyarekar  <siddhesh@gotplt.org>
33972             Jakub Jelinek  <jakub@redhat.com>
33973
33974         PR tree-optimization/108522
33975         * tree-object-size.cc (compute_object_offset): Use
33976         TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
33977
33978 2023-01-24  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
33979
33980         * config/xtensa/xtensa.md:
33981         Fix exit from loops detecting references before overwriting in the
33982         split pattern.
33983
33984 2023-01-24  Vladimir N. Makarov  <vmakarov@redhat.com>
33985
33986         * lra-constraints.cc (get_hard_regno): Remove final_p arg.  Always
33987         do elimination but only for hard register.
33988         (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
33989         calls of get_hard_regno.
33990
33991 2023-01-24  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
33992
33993         * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
33994         of CPU version.
33995
33996 2023-01-24  Andre Vieira  <andre.simoesdiasvieira@arm.com>
33997
33998         PR target/108177
33999         * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
34000         mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
34001         as input operand.
34002
34003 2023-01-24  Xianmiao Qu  <cooper.qu@linux.alibaba.com>
34004
34005         * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
34006         and only include 'csky/t-csky-linux' when enable multilib.
34007         * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
34008         define it when disable multilib.
34009
34010 2023-01-24  Richard Biener  <rguenther@suse.de>
34011
34012         PR tree-optimization/108500
34013         * dominance.h (calculate_dominance_info): Add parameter
34014         to indicate fast-query compute, defaulted to true.
34015         * dominance.cc (calculate_dominance_info): Honor
34016         fast-query compute parameter.
34017         * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
34018         not compute the dominator fast-query DFS numbers.
34019
34020 2023-01-24  Eric Biggers  <ebiggers@google.com>
34021
34022         PR bootstrap/90543
34023         * optc-save-gen.awk: Fix copy-and-paste error.
34024
34025 2023-01-24  Jakub Jelinek  <jakub@redhat.com>
34026
34027         PR c++/108474
34028         * cgraphbuild.cc: Include gimplify.h.
34029         (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
34030         their corresponding DECL_VALUE_EXPR expressions after unsharing.
34031
34032 2023-01-24  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
34033
34034         PR target/108505
34035         * config.gcc (tm_file): Move the variable out of loop.
34036
34037 2023-01-24  Lulu Cheng  <chenglulu@loongson.cn>
34038             Yang Yujie  <yangyujie@loongson.cn>
34039
34040         PR target/107731
34041         * config/loongarch/loongarch.cc (loongarch_classify_address):
34042         Add precessint for CONST_INT.
34043         (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
34044         (loongarch_print_operand): Increase the processing of '%c'.
34045         * doc/extend.texi: Adds documents for LoongArch operand modifiers.
34046         And port the public operand modifiers information to this document.
34047
34048 2023-01-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
34049
34050         * doc/invoke.texi (-mbranch-protection): Update documentation.
34051
34052 2023-01-23  Richard Biener  <rguenther@suse.de>
34053
34054         PR target/55522
34055         * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
34056         for -shared.
34057         * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
34058         * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
34059         * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
34060         * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
34061
34062 2023-01-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
34063
34064         * config/arm/aout.h (ra_auth_code): Add entry in enum.
34065         * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
34066         to dwarf frame expression.
34067         (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
34068         (arm_expand_prologue): Update frame related information and reg notes
34069         for pac/pacbit insn.
34070         (arm_regno_class): Check for pac pseudo reigster.
34071         (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
34072         (arm_init_machine_status): Set pacspval_needed to zero.
34073         (arm_debugger_regno): Check for PAC register.
34074         (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
34075         register.
34076         (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
34077         (arm_unwind_emit): Update REG_CFA_REGISTER case._
34078         * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
34079         (DWARF_PAC_REGNUM): Define.
34080         (IS_PAC_REGNUM): Likewise.
34081         (enum reg_class): Add PAC_REG entry.
34082         (machine_function): Add pacbti_needed state to structure.
34083         * config/arm/arm.md (RA_AUTH_CODE): Define.
34084
34085 2023-01-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
34086
34087         * config.gcc ($tm_file): Update variable.
34088         * config/arm/arm-mlib.h: Create new header file.
34089         * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
34090         multilib arch directory.
34091         (MULTILIB_REUSE): Add multilib reuse rules.
34092         (MULTILIB_MATCHES): Add multilib match rules.
34093
34094 2023-01-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
34095
34096         * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
34097         * config/arm/arm-tables.opt: Regenerate.
34098         * config/arm/arm-tune.md: Likewise.
34099         * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
34100         * (-mfix-cmse-cve-2021-35465): Likewise.
34101
34102 2023-01-23  Richard Biener  <rguenther@suse.de>
34103
34104         PR tree-optimization/108482
34105         * tree-vect-generic.cc (expand_vector_operations): Fold remaining
34106         .LOOP_DIST_ALIAS calls.
34107
34108 2023-01-23  Andrea Corallo  <andrea.corallo@arm.com>
34109
34110         * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
34111         * config/arm/arm-protos.h: Update.
34112         * config/arm/aarch-common-protos.h: Declare
34113         'aarch_bti_arch_check'.
34114         * config/arm/arm.cc (aarch_bti_enabled) Update.
34115         (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
34116         (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
34117         * config/arm/arm.md (bti_nop): New insn.
34118         * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
34119         (aarch-bti-insert.o): New target.
34120         * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
34121         * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
34122         compatibility.
34123         (gate): Make use of 'aarch_bti_arch_check'.
34124         * config/arm/arm-passes.def: New file.
34125         * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
34126
34127 2023-01-23  Andrea Corallo  <andrea.corallo@arm.com>
34128
34129         * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
34130         'aarch-bti-insert.o'.
34131         * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
34132         proto.
34133         * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
34134         (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
34135         (aarch64_output_mi_thunk)
34136         (aarch64_print_patchable_function_entry)
34137         (aarch64_file_end_indicate_exec_stack): Update renamed function
34138         calls to renamed functions.
34139         * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
34140         * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
34141         target.
34142         * config/aarch64/aarch64-bti-insert.cc: Delete.
34143         * config/arm/aarch-bti-insert.cc: New file including and
34144         generalizing code from aarch64-bti-insert.cc.
34145         * config/arm/aarch-common-protos.h: Update.
34146
34147 2023-01-23  Andrea Corallo  <andrea.corallo@arm.com>
34148
34149         * config/arm/arm.h (arm_arch8m_main): Declare it.
34150         * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
34151         Declare it.
34152         * config/arm/arm.cc (arm_arch8m_main): Define it.
34153         (arm_option_reconfigure_globals): Set arm_arch8m_main.
34154         (arm_compute_frame_layout, arm_expand_prologue)
34155         (thumb2_expand_return, arm_expand_epilogue)
34156         (arm_conditional_register_usage): Update for pac codegen.
34157         (arm_current_function_pac_enabled_p): New function.
34158         (aarch_bti_enabled) New function.
34159         (use_return_insn): Return zero when pac is enabled.
34160         * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
34161         Add new patterns.
34162         * config/arm/unspecs.md (UNSPEC_PAC_NOP)
34163         (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
34164
34165 2023-01-23  Andrea Corallo  <andrea.corallo@arm.com>
34166
34167         * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
34168         mbranch-protection.
34169
34170 2023-01-23  Andrea Corallo  <andrea.corallo@arm.com>
34171             Tejas Belagod   <tbelagod@arm.com>
34172
34173         * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
34174         Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
34175
34176 2023-01-23  Andrea Corallo  <andrea.corallo@arm.com>
34177             Tejas Belagod   <tbelagod@arm.com>
34178             Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
34179
34180         * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
34181         new pseudo register class _UVRSC_PAC.
34182
34183 2023-01-23  Andrea Corallo  <andrea.corallo@arm.com>
34184             Tejas Belagod   <tbelagod@arm.com>
34185
34186         * config/arm/arm-c.cc (arm_cpu_builtins): Define
34187         __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
34188         __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
34189
34190 2023-01-23  Andrea Corallo  <andrea.corallo@arm.com>
34191             Tejas Belagod   <tbelagod@arm.com>
34192
34193         * doc/sourcebuild.texi: Document arm_pacbti_hw.
34194
34195 2023-01-23  Andrea Corallo  <andrea.corallo@arm.com>
34196             Tejas Belagod   <tbelagod@arm.com>
34197             Richard Earnshaw  <Richard.Earnshaw@arm.com>
34198
34199         * config/arm/arm.cc (arm_configure_build_target): Parse and validate
34200         -mbranch-protection option and initialize appropriate data structures.
34201         * config/arm/arm.opt (-mbranch-protection): New option.
34202         * doc/invoke.texi (Arm Options): Document it.
34203
34204 2023-01-23  Andrea Corallo  <andrea.corallo@arm.com>
34205             Tejas Belagod   <tbelagod@arm.com>
34206
34207         * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
34208         * config/arm/arm-cpus.in (pacbti): New feature.
34209         * doc/invoke.texi (Arm Options): Document it.
34210
34211 2023-01-23  Andrea Corallo  <andrea.corallo@arm.com>
34212             Tejas Belagod   <tbelagod@arm.com>
34213
34214         * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
34215         (all_architectures): Fix comment.
34216         (aarch64_parse_extension): Rename return type, enum value names.
34217         * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
34218         factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
34219         Also rename corresponding enum values.
34220         * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
34221         out aarch64_function_type and move it to common code as
34222         aarch_function_type in aarch-common.h.
34223         * config/aarch64/aarch64-protos.h: Include common types header,
34224         move out types aarch64_parse_opt_result and aarch64_key_type to
34225         aarch-common.h
34226         * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
34227         and functions out into aarch-common.h and aarch-common.cc.  Fix up
34228         all the name changes resulting from the move.
34229         * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
34230         and enum value.
34231         * config/aarch64/aarch64.opt: Include aarch-common.h to import
34232         type move.  Fix up name changes from factoring out common code and
34233         data.
34234         * config/arm/aarch-common-protos.h: Export factored out routines to both
34235         backends.
34236         * config/arm/aarch-common.cc: Include newly factored out types.
34237         Move all mbranch-protection code and data structures from
34238         aarch64.cc.
34239         * config/arm/aarch-common.h: New header that declares types shared
34240         between aarch32 and aarch64 backends.
34241         * config/arm/arm-protos.h: Declare types and variables that are
34242         made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
34243         aarch_ra_sign_scope and aarch_enable_bti.
34244         * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
34245         (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
34246         * config/arm/arm.cc: Add missing includes.
34247
34248 2023-01-23  Tobias Burnus  <tobias@codesourcery.com>
34249
34250         * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
34251
34252 2023-01-23  Richard Biener  <rguenther@suse.de>
34253
34254         PR tree-optimization/108449
34255         * cgraphunit.cc (check_global_declaration): Do not turn
34256         undefined statics into externs.
34257
34258 2023-01-22  Dimitar Dimitrov  <dimitar@dinux.eu>
34259
34260         * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
34261         and HI input modes.
34262         * config/pru/pru.md (clz): Fix generated code for QI and HI
34263         input modes.
34264
34265 2023-01-22  Cupertino Miranda  <cupertino.miranda@oracle.com>
34266
34267         * config/v850/v850.cc (v850_select_section): Put const volatile
34268         objects into read-only sections.
34269
34270 2023-01-20  Tejas Belagod  <tejas.belagod@arm.com>
34271
34272         * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
34273         vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
34274         (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
34275
34276 2023-01-20  Jakub Jelinek  <jakub@redhat.com>
34277
34278         PR tree-optimization/108457
34279         * tree-ssa-loop-niter.cc (build_cltz_expr): Use
34280         SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
34281         argument instead of a temporary.  Formatting fixes.
34282
34283 2023-01-19  Jakub Jelinek  <jakub@redhat.com>
34284
34285         PR tree-optimization/108447
34286         * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
34287         (relation_tests): Add self-tests for relation_{intersect,union}
34288         commutativity.
34289         * selftest.h (relation_tests): Declare.
34290         * function-tests.cc (test_ranges): Call it.
34291
34292 2023-01-19  H.J. Lu  <hjl.tools@gmail.com>
34293
34294         PR target/108436
34295         * config/i386/i386-expand.cc (ix86_expand_builtin): Check
34296         invalid third argument to __builtin_ia32_prefetch.
34297
34298 2023-01-19  Jakub Jelinek  <jakub@redhat.com>
34299
34300         PR middle-end/108459
34301         * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
34302         than fold_unary for NEGATE_EXPR.
34303
34304 2023-01-19  Christophe Lyon  <christophe.lyon@arm.com>
34305
34306         PR target/108411
34307         * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
34308         comment. Move assert about alignment a bit later.
34309
34310 2023-01-19  Jakub Jelinek  <jakub@redhat.com>
34311
34312         PR tree-optimization/108440
34313         * tree-ssa-forwprop.cc: Include gimple-range.h.
34314         (simplify_rotate): For the forms with T2 wider than T and shift counts of
34315         Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
34316         to B.  For the forms with T2 wider than T and shift counts of
34317         Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
34318         range doesn't guarantee Y < B or Y = N * B.  If range doesn't guarantee
34319         Y < B, also add & (B - 1) masking for the rotate count.  Use lazily created
34320         pass specific ranger instead of get_global_range_query.
34321         (pass_forwprop::execute): Disable that ranger at the end of pass if it has
34322         been created.
34323
34324 2023-01-19  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
34325
34326         * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
34327         exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
34328         the pattern.
34329         (aarch64_simd_vec_copy_lane<mode>): Likewise.
34330         (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
34331
34332 2023-01-19  Alexandre Oliva  <oliva@adacore.com>
34333
34334         PR debug/106746
34335         * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
34336         within debug insns.
34337
34338 2023-01-18  Martin Jambor  <mjambor@suse.cz>
34339
34340         PR ipa/107944
34341         * cgraph.cc (cgraph_node::remove): Check whether nodes up the
34342         lcone_of chain also do not need the body.
34343
34344 2023-01-18  Richard Biener  <rguenther@suse.de>
34345
34346         Revert:
34347         2022-12-16  Richard Biener  <rguenther@suse.de>
34348
34349         PR middle-end/108086
34350         * tree-inline.cc (remap_ssa_name): Do not unshare the
34351         result from the decl_map.
34352
34353 2023-01-18  Murray Steele  <murray.steele@arm.com>
34354
34355         PR target/108442
34356         * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
34357         function.
34358         (__arm_vst1q_p_s8): Likewise.
34359         (__arm_vld1q_z_u8): Likewise.
34360         (__arm_vld1q_z_s8): Likewise.
34361         (__arm_vst1q_p_u16): Likewise.
34362         (__arm_vst1q_p_s16): Likewise.
34363         (__arm_vld1q_z_u16): Likewise.
34364         (__arm_vld1q_z_s16): Likewise.
34365         (__arm_vst1q_p_u32): Likewise.
34366         (__arm_vst1q_p_s32): Likewise.
34367         (__arm_vld1q_z_u32): Likewise.
34368         (__arm_vld1q_z_s32): Likewise.
34369         (__arm_vld1q_z_f16): Likewise.
34370         (__arm_vst1q_p_f16): Likewise.
34371         (__arm_vld1q_z_f32): Likewise.
34372         (__arm_vst1q_p_f32): Likewise.
34373
34374 2023-01-18  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
34375
34376         * config/xtensa/xtensa.md (xorsi3_internal):
34377         Rename from the original of "xorsi3".
34378         (xorsi3): New expansion pattern that emits addition rather than
34379         bitwise-XOR when the second source is a constant of -2147483648
34380         if TARGET_DENSITY.
34381
34382 2023-01-18  Kewen Lin  <linkw@linux.ibm.com>
34383             Andrew Pinski  <apinski@marvell.com>
34384
34385         PR target/108396
34386         * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
34387         vec_vsubcuqP with vec_vsubcuq.
34388
34389 2023-01-18  Kewen Lin  <linkw@linux.ibm.com>
34390
34391         PR target/108348
34392         * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
34393         support for invalid uses of MMA opaque type in function arguments.
34394
34395 2023-01-18  liuhongt  <hongtao.liu@intel.com>
34396
34397         PR target/55522
34398         * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
34399         whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
34400         -share or -mno-daz-ftz is specified.
34401         * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
34402         * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
34403
34404 2023-01-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
34405
34406         * config/bpf/bpf.cc (bpf_option_override): Disable
34407         -fstack-protector.
34408
34409 2023-01-17  Jakub Jelinek  <jakub@redhat.com>
34410
34411         PR tree-optimization/106523
34412         * tree-ssa-forwprop.cc (simplify_rotate): For the
34413         patterns with (-Y) & (B - 1) in one operand's shift
34414         count and Y in another, if T2 has wider precision than T,
34415         punt if Y could have a value in [B, B2 - 1] range.
34416
34417 2023-01-16  H.J. Lu  <hjl.tools@gmail.com>
34418
34419         PR target/105980
34420         * config/i386/i386.cc (x86_output_mi_thunk): Disable
34421         -mforce-indirect-call for PIC in 32-bit mode.
34422
34423 2023-01-16  Jan Hubicka  <hubicka@ucw.cz>
34424
34425         PR ipa/106077
34426         * ipa-modref.cc (modref_access_analysis::analyze): Use
34427         find_always_executed_bbs.
34428         * ipa-sra.cc (process_scan_results): Likewise.
34429         * ipa-utils.cc (stmt_may_terminate_function_p): New function.
34430         (find_always_executed_bbs): New function.
34431         * ipa-utils.h (stmt_may_terminate_function_p): Declare.
34432         (find_always_executed_bbs): Declare.
34433
34434 2023-01-16  Jan Hubicka  <jh@suse.cz>
34435
34436         * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
34437         by TARGET_USE_SCATTER.
34438         * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
34439         TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
34440         * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
34441         TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
34442         (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
34443         for znver4.  (X86_TUNE_USE_GATHER): Disable for zen4.
34444
34445 2023-01-16  Richard Biener  <rguenther@suse.de>
34446
34447         PR target/55522
34448         * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
34449
34450 2023-01-16  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
34451
34452         PR target/96795
34453         PR target/107515
34454         * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
34455         (__ARM_mve_coerce3): Likewise.
34456
34457 2023-01-16  Andrew Carlotti  <andrew.carlotti@arm.com>
34458
34459         * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
34460
34461 2023-01-16  Andrew Carlotti  <andrew.carlotti@arm.com>
34462
34463         * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
34464         (number_of_iterations_bitcount): Add call to the above.
34465         (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
34466         c[lt]z idiom recognition.
34467
34468 2023-01-16  Andrew Carlotti  <andrew.carlotti@arm.com>
34469
34470         * doc/sourcebuild.texi: Add missing target attributes.
34471
34472 2023-01-16  Andrew Carlotti  <andrew.carlotti@arm.com>
34473
34474         PR tree-optimization/94793
34475         * tree-scalar-evolution.cc (expression_expensive_p): Add checks
34476         for c[lt]z optabs.
34477         * tree-ssa-loop-niter.cc (build_cltz_expr): New.
34478         (number_of_iterations_cltz_complement): New.
34479         (number_of_iterations_bitcount): Add call to the above.
34480
34481 2023-01-16  Jonathan Wakely  <jwakely@redhat.com>
34482
34483         * doc/extend.texi (Common Function Attributes): Fix grammar.
34484
34485 2023-01-16  Jakub Jelinek  <jakub@redhat.com>
34486
34487         PR other/108413
34488         * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
34489         * config/riscv/riscv-vsetvl.cc: Likewise.
34490
34491 2023-01-16  Jakub Jelinek  <jakub@redhat.com>
34492
34493         PR c++/105593
34494         * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
34495         disable -Winit-self using pragma GCC diagnostic ignored.
34496         * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
34497         Likewise.
34498         * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
34499         _mm256_undefined_si256): Likewise.
34500         * config/i386/avx512fintrin.h (_mm512_undefined_pd,
34501         _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
34502         * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
34503         _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
34504
34505 2023-01-16  Kewen Lin  <linkw@linux.ibm.com>
34506
34507         PR target/108272
34508         * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
34509         support for invalid uses in inline asm, factor out the checking and
34510         erroring to lambda function check_and_error_invalid_use.
34511
34512 2023-01-15  Aldy Hernandez  <aldyh@redhat.com>
34513
34514         PR tree-optimization/107608
34515         * range-op-float.cc (range_operator_float::fold_range): Avoid
34516         folding into INF when flag_trapping_math.
34517         * value-range.h (frange::known_isinf): Return false for possible NANs.
34518
34519 2023-01-15  Xianmiao Qu  <cooper.qu@linux.alibaba.com>
34520
34521         * config.gcc (csky-*-*): Support --with-float=softfp.
34522
34523 2023-01-14  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
34524
34525         * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
34526         Rename to xtensa_adjust_reg_alloc_order.
34527         * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
34528         Ditto.  And also remove code to reorder register numbers for
34529         leaf functions, rename the tables, and adjust the allocation
34530         order for the call0 ABI to use register A0 more.
34531         (xtensa_leaf_regs): Remove.
34532         * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
34533         (order_regs_for_local_alloc): Rename as the above.
34534         (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
34535
34536 2023-01-14  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
34537
34538         * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
34539         Change to define_insn_and_split to fold ldr+dup to ld1rq.
34540         * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
34541
34542 2023-01-14  Alexandre Oliva  <oliva@adacore.com>
34543
34544         * hash-table.h (is_deleted): Precheck !is_empty.
34545         (mark_deleted): Postcheck !is_empty.
34546         (copy constructor): Test is_empty before is_deleted.
34547
34548 2023-01-14  Alexandre Oliva  <oliva@adacore.com>
34549
34550         PR target/40457
34551         * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
34552         moves.
34553
34554 2023-01-13  Eric Botcazou  <ebotcazou@adacore.com>
34555
34556         PR rtl-optimization/108274
34557         * function.cc (thread_prologue_and_epilogue_insns): Also update the
34558         DF information for calls in a few more cases.
34559
34560 2023-01-13  John David Anglin  <danglin@gcc.gnu.org>
34561
34562         * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
34563         * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
34564         define.
34565         * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
34566         (MAX_SYNC_LIBFUNC_SIZE): Define.
34567         (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
34568         enabled.
34569         * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
34570         libcall when sync libcalls are disabled.
34571         (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
34572         (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
34573         are disabled on 32-bit target.
34574         * config/pa/pa.opt (matomic-libcalls): New option.
34575         * doc/invoke.texi (HPPA Options): Update.
34576
34577 2023-01-13  Alexander Monakov  <amonakov@ispras.ru>
34578
34579         PR rtl-optimization/108117
34580         PR rtl-optimization/108132
34581         * sched-deps.cc (deps_analyze_insn): Do not schedule across
34582         calls before reload.
34583
34584 2023-01-13  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
34585
34586         * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
34587         options for -mlibarch.
34588         * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
34589         * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
34590
34591 2023-01-13  Qing Zhao  <qing.zhao@oracle.com>
34592
34593         * attribs.cc (strict_flex_array_level_of): Move this function to ...
34594         * attribs.h (strict_flex_array_level_of): Remove the declaration.
34595         * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
34596         replace the referece to strict_flex_array_level_of with
34597         DECL_NOT_FLEXARRAY.
34598         * tree.cc (component_ref_size): Likewise.
34599
34600 2023-01-13  Richard Biener  <rguenther@suse.de>
34601
34602         PR target/55522
34603         * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
34604         crtfastmath.o for -shared.
34605         * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
34606
34607 2023-01-13  Richard Biener  <rguenther@suse.de>
34608
34609         PR target/55522
34610         * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
34611         crtfastmath.o for -shared.
34612         * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
34613         Likewise.
34614         * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
34615         Likewise.
34616
34617 2023-01-13  Richard Sandiford  <richard.sandiford@arm.com>
34618
34619         * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
34620         function.
34621         (TARGET_DWARF_FRAME_REG_MODE): Define.
34622
34623 2023-01-13  Richard Biener  <rguenther@suse.de>
34624
34625         PR target/107209
34626         * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
34627         update EH info on the fly.
34628
34629 2023-01-13  Richard Biener  <rguenther@suse.de>
34630
34631         PR tree-optimization/108387
34632         * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
34633         value before inserting expression into the tables.
34634
34635 2023-01-12  Andrew Pinski  <apinski@marvell.com>
34636             Roger Sayle  <roger@nextmovesoftware.com>
34637
34638         PR tree-optimization/92342
34639         * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
34640         Use tcc_comparison and :c for the multiply.
34641         (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
34642
34643 2023-01-12  Christophe Lyon  <christophe.lyon@arm.com>
34644             Richard Sandiford  <richard.sandiford@arm.com>
34645
34646         PR target/105549
34647         * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
34648         Check DECL_PACKED for bitfield.
34649         (aarch64_layout_arg): Warn when parameter passing ABI changes.
34650         (aarch64_function_arg_boundary): Do not warn here.
34651         (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
34652         changes.
34653
34654 2023-01-12  Christophe Lyon  <christophe.lyon@arm.com>
34655             Richard Sandiford  <richard.sandiford@arm.com>
34656
34657         * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
34658         comment.
34659         (aarch64_layout_arg): Factorize warning conditions.
34660         (aarch64_function_arg_boundary): Fix typo.
34661         * function.cc (currently_expanding_function_start): New variable.
34662         (expand_function_start): Handle
34663         currently_expanding_function_start.
34664         * function.h (currently_expanding_function_start): Declare.
34665
34666 2023-01-12  Richard Biener  <rguenther@suse.de>
34667
34668         PR tree-optimization/99412
34669         * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
34670         (swap_ops_for_binary_stmt): Remove reduction handling.
34671         (rewrite_expr_tree_parallel): Adjust.
34672         (reassociate_bb): Likewise.
34673         * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
34674
34675 2023-01-12  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
34676
34677         * config/xtensa/xtensa.md (ctzsi2, ffssi2):
34678         Rearrange the emitting codes.
34679
34680 2023-01-12  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
34681
34682         * config/xtensa/xtensa.md (*btrue):
34683         Correct value of the attribute "length" that depends on
34684         TARGET_DENSITY and operands, and add '?' character to the register
34685         constraint of the compared operand.
34686
34687 2023-01-12  Alexandre Oliva  <oliva@adacore.com>
34688
34689         * hash-table.h (expand): Check elements and deleted counts.
34690         (verify): Likewise.
34691
34692 2023-01-11  Roger Sayle  <roger@nextmovesoftware.com>
34693
34694         PR tree-optimization/71343
34695         * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
34696         the value number of the expression X << C the same as the value
34697         number for the multiplication X * (1<<C).
34698
34699 2023-01-11  David Faust  <david.faust@oracle.com>
34700
34701         PR target/108293
34702         * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
34703         floating point modes.
34704
34705 2023-01-11  Eric Botcazou  <ebotcazou@adacore.com>
34706
34707         PR tree-optimization/108199
34708         * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
34709         for bit-field references.
34710
34711 2023-01-11  Kewen Lin  <linkw@linux.ibm.com>
34712
34713         * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
34714         OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
34715         * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
34716         OPTION_MASK_P10_FUSION.
34717
34718 2023-01-11  Richard Biener  <rguenther@suse.de>
34719
34720         PR tree-optimization/107767
34721         * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
34722         * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
34723         * tree-switch-conversion.cc (switch_conversion::collect):
34724         Count unique non-default targets accounting for later
34725         merging opportunities.
34726
34727 2023-01-11  Martin Liska  <mliska@suse.cz>
34728
34729         PR middle-end/107976
34730         * params.opt: Limit JT params.
34731         * stmt.cc (emit_case_dispatch_table): Use auto_vec.
34732
34733 2023-01-11  Richard Biener  <rguenther@suse.de>
34734
34735         PR tree-optimization/108352
34736         * tree-ssa-threadbackward.cc
34737         (back_threader_profitability::profitable_path_p): Adjust
34738         heuristic that allows non-multi-way branch threads creating
34739         irreducible loops.
34740         * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
34741         (--param fsm-scale-path-stmts): Adjust.
34742         * params.opt (--param=fsm-scale-path-blocks=): Remove.
34743         (-param=fsm-scale-path-stmts=): Adjust description.
34744
34745 2023-01-11  Richard Biener  <rguenther@suse.de>
34746
34747         PR tree-optimization/108353
34748         * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
34749         Remove.
34750         (add_ssa_edge): Simplify.
34751         (add_control_edge): Likewise.
34752         (ssa_prop_init): Likewise.
34753         (ssa_prop_fini): Likewise.
34754         (ssa_propagation_engine::ssa_propagate): Likewise.
34755
34756 2023-01-11  Andreas Krebbel  <krebbel@linux.ibm.com>
34757
34758         * config/s390/s390.md (*not<mode>): New pattern.
34759
34760 2023-01-11  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
34761
34762         * config/xtensa/xtensa.cc (xtensa_insn_cost):
34763         Let insn cost for size be obtained by applying COSTS_N_INSNS()
34764         to instruction length and then dividing by 3.
34765
34766 2023-01-10  Richard Biener  <rguenther@suse.de>
34767
34768         PR tree-optimization/106293
34769         * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
34770         process degenerate PHI defs.
34771
34772 2023-01-10  Roger Sayle  <roger@nextmovesoftware.com>
34773
34774         PR rtl-optimization/106421
34775         * cprop.cc (bypass_block): Check that DEST is local to this
34776         function (non-NULL) before calling find_edge.
34777
34778 2023-01-10  Martin Jambor  <mjambor@suse.cz>
34779
34780         PR ipa/108110
34781         * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
34782         sort_replacements, lookup_first_base_replacement and
34783         m_sorted_replacements_p.
34784         * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
34785         (ipa_param_body_adjustments::register_replacement): Set
34786         m_sorted_replacements_p to false.
34787         (compare_param_body_replacement): New function.
34788         (ipa_param_body_adjustments::sort_replacements): Likewise.
34789         (ipa_param_body_adjustments::common_initialization): Call
34790         sort_replacements.
34791         (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
34792         m_sorted_replacements_p.
34793         (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
34794         std::lower_bound.
34795         (ipa_param_body_adjustments::lookup_first_base_replacement): New
34796         function.
34797         (ipa_param_body_adjustments::modify_call_stmt): Use
34798         lookup_first_base_replacement.
34799         * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
34800         adjustments->sort_replacements.
34801
34802 2023-01-10  Richard Biener  <rguenther@suse.de>
34803
34804         PR tree-optimization/108314
34805         * tree-vect-stmts.cc (vectorizable_condition): Do not
34806         perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
34807
34808 2023-01-10  Xianmiao Qu  <cooper.qu@linux.alibaba.com>
34809
34810         * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
34811
34812 2023-01-10  Xianmiao Qu  <cooper.qu@linux.alibaba.com>
34813
34814         * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
34815
34816 2023-01-10  Xianmiao Qu  <cooper.qu@linux.alibaba.com>
34817
34818         * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
34819         defines for soft float abi.
34820
34821 2023-01-10  Xianmiao Qu  <cooper.qu@linux.alibaba.com>
34822
34823         * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
34824         (smart_bclri): Likewise.
34825         (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
34826         (fast_bclri): Likewise.
34827         (fast_cmpnesi_i): Likewise.
34828         (*fast_cmpltsi_i): Likewise.
34829         (*fast_cmpgeusi_i): Likewise.
34830
34831 2023-01-10  Xianmiao Qu  <cooper.qu@linux.alibaba.com>
34832
34833         * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
34834         flag_fp_int_builtin_inexact || !flag_trapping_math.
34835         (<frm_pattern><mode>2): Likewise.
34836
34837 2023-01-10  Andreas Krebbel  <krebbel@linux.ibm.com>
34838
34839         * config/s390/s390.cc (s390_register_info): Check call_used_regs
34840         instead of hard-coding the register numbers for call saved
34841         registers.
34842         (s390_optimize_register_info): Likewise.
34843
34844 2023-01-09  Eric Botcazou  <ebotcazou@adacore.com>
34845
34846         * doc/gm2.texi (Overview): Fix @node markers.
34847         (Using): Likewise.  Remove subsections that were moved to Overview
34848         from the menu and move others around.
34849
34850 2023-01-09  Richard Biener  <rguenther@suse.de>
34851
34852         PR middle-end/108209
34853         * genmatch.cc (commutative_op): Fix return value for
34854         user-id with non-commutative first replacement.
34855
34856 2023-01-09  Jakub Jelinek  <jakub@redhat.com>
34857
34858         PR target/107453
34859         * calls.cc (expand_call): For calls with
34860         TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
34861         Formatting fix.
34862
34863 2023-01-09  Richard Biener  <rguenther@suse.de>
34864
34865         PR middle-end/69482
34866         * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
34867         qualified accesses also force objects to memory.
34868
34869 2023-01-09  Martin Liska  <mliska@suse.cz>
34870
34871         PR lto/108330
34872         * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
34873         NULL (deleleted value) to a hash_set.
34874
34875 2023-01-08  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
34876
34877         * config/xtensa/xtensa.md (*splice_bits):
34878         New insn_and_split pattern.
34879
34880 2023-01-07  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
34881
34882         * config/xtensa/xtensa.cc
34883         (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
34884         New helper functions.
34885         (xtensa_set_return_address, xtensa_output_mi_thunk):
34886         Change to use the helper function.
34887         (xtensa_emit_adjust_stack_ptr): Ditto.
34888         And also change to try reusing the content of scratch register
34889         A9 if the register is not modified in the function body.
34890
34891 2023-01-07  LIU Hao  <lh_mouse@126.com>
34892
34893         PR middle-end/108300
34894         * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
34895         before <windows.h>.
34896         * diagnostic-color.cc: Likewise.
34897         * plugin.cc: Likewise.
34898         * prefix.cc: Likewise.
34899
34900 2023-01-06  Joseph Myers  <joseph@codesourcery.com>
34901
34902         * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
34903         for handling real integer types.
34904
34905 2023-01-06  Tamar Christina  <tamar.christina@arm.com>
34906
34907         Revert:
34908         2022-12-12  Tamar Christina  <tamar.christina@arm.com>
34909
34910         * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
34911         (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
34912         aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
34913         @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
34914         reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
34915         aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
34916         vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
34917         (aarch64_simd_dupv2hf): New.
34918         * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
34919         Add E_V2HFmode.
34920         * config/aarch64/iterators.md (VHSDF_P): New.
34921         (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
34922         Vel, q, vp): Add V2HF.
34923         * config/arm/types.md (neon_fp_reduc_add_h): New.
34924
34925 2023-01-06  Martin Liska  <mliska@suse.cz>
34926
34927         PR middle-end/107966
34928         * doc/options.texi: Fix Var documentation in internal manual.
34929
34930 2023-01-05  Roger Sayle  <roger@nextmovesoftware.com>
34931
34932         Revert:
34933         2023-01-03  Roger Sayle  <roger@nextmovesoftware.com>
34934
34935         * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
34936         RTL expansion to allow condition (mask) to be shared/reused,
34937         by avoiding overwriting pseudos and adding REG_EQUAL notes.
34938
34939 2023-01-05  Iain Sandoe  <iain@sandoe.co.uk>
34940
34941         * common.opt: Add -static-libgm2.
34942         * config/darwin.h (LINK_SPEC): Handle static-libgm2.
34943         * doc/gm2.texi: Document static-libgm2.
34944         * gcc.cc (driver_handle_option): Allow static-libgm2.
34945
34946 2023-01-05  Tejas Joshi  <TejasSanjay.Joshi@amd.com>
34947
34948         * common/config/i386/i386-common.cc (processor_alias_table):
34949         Use CPU_ZNVER4 for znver4.
34950         * config/i386/i386.md: Add znver4.md.
34951         * config/i386/znver4.md: New.
34952
34953 2023-01-04  Jakub Jelinek  <jakub@redhat.com>
34954
34955         PR tree-optimization/108253
34956         * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
34957         types.
34958
34959 2023-01-04  Jakub Jelinek  <jakub@redhat.com>
34960
34961         PR middle-end/108237
34962         * generic-match-head.cc: Include tree-pass.h.
34963         (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
34964         to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
34965         resp. PROP_gimple_lvec property set.
34966
34967 2023-01-04  Jakub Jelinek  <jakub@redhat.com>
34968
34969         PR sanitizer/108256
34970         * convert.cc (do_narrow): Punt for MULT_EXPR if original
34971         type doesn't wrap around and -fsanitize=signed-integer-overflow
34972         is on.
34973         * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
34974
34975 2023-01-04  Hu, Lin1  <lin1.hu@intel.com>
34976
34977         * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
34978         * common/config/i386/i386-common.cc: Add Emeraldrapids.
34979
34980 2023-01-04  Hu, Lin1  <lin1.hu@intel.com>
34981
34982         * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
34983         for meteorlake.
34984
34985 2023-01-03  Sandra Loosemore  <sandra@codesourcery.com>
34986
34987         * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
34988         default constructor to initialize it.
34989         * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
34990         for last and iterate to handle recursive calls.  Delete leftover
34991         candidates at the end.
34992         * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
34993         on local clones.
34994         * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
34995         gc_candidate bit when a clone is used.
34996
34997 2023-01-03  Florian Weimer  <fweimer@redhat.com>
34998
34999         Revert:
35000         2023-01-02  Florian Weimer  <fweimer@redhat.com>
35001
35002         * dwarf2cfi.cc (init_return_column_size): Remove.
35003         (init_one_dwarf_reg_size): Adjust.
35004         (generate_dwarf_reg_sizes): New function.  Extracted
35005         from expand_builtin_init_dwarf_reg_sizes.
35006         (expand_builtin_init_dwarf_reg_sizes): Call
35007         generate_dwarf_reg_sizes.
35008         * target.def (init_dwarf_reg_sizes_extra): Adjust
35009         hook signature.
35010         * config/msp430/msp430.cc
35011         (msp430_init_dwarf_reg_sizes_extra): Adjust.
35012         * config/rs6000/rs6000.cc
35013         (rs6000_init_dwarf_reg_sizes_extra): Likewise.
35014         * doc/tm.texi: Update.
35015
35016 2023-01-03  Florian Weimer  <fweimer@redhat.com>
35017
35018         Revert:
35019         2023-01-02  Florian Weimer  <fweimer@redhat.com>
35020
35021         * debug.h (dwarf_reg_sizes_constant): Declare.
35022         * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
35023
35024 2023-01-03  Siddhesh Poyarekar  <siddhesh@gotplt.org>
35025
35026         PR tree-optimization/105043
35027         * doc/extend.texi (Object Size Checking): Split out into two
35028         subsections and mention _FORTIFY_SOURCE.
35029
35030 2023-01-03  Roger Sayle  <roger@nextmovesoftware.com>
35031
35032         * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
35033         RTL expansion to allow condition (mask) to be shared/reused,
35034         by avoiding overwriting pseudos and adding REG_EQUAL notes.
35035
35036 2023-01-03  Roger Sayle  <roger@nextmovesoftware.com>
35037
35038         PR target/108229
35039         * config/i386/i386-features.cc
35040         (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
35041         the gain/cost of converting a MEM operand.
35042
35043 2023-01-03  Jakub Jelinek  <jakub@redhat.com>
35044
35045         PR middle-end/108264
35046         * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
35047         from source which doesn't have scalar integral mode first convert
35048         it to outer_mode.
35049
35050 2023-01-03  Jakub Jelinek  <jakub@redhat.com>
35051
35052         PR rtl-optimization/108263
35053         * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
35054         asm goto to EXIT.
35055
35056 2023-01-02  Alexander Monakov  <amonakov@ispras.ru>
35057
35058         PR target/87832
35059         * config/i386/lujiazui.md (lujiazui_div): New automaton.
35060         (lua_div): New unit.
35061         (lua_idiv_qi): Correct unit in the reservation.
35062         (lua_idiv_qi_load): Ditto.
35063         (lua_idiv_hi): Ditto.
35064         (lua_idiv_hi_load): Ditto.
35065         (lua_idiv_si): Ditto.
35066         (lua_idiv_si_load): Ditto.
35067         (lua_idiv_di): Ditto.
35068         (lua_idiv_di_load): Ditto.
35069         (lua_fdiv_SF): Ditto.
35070         (lua_fdiv_SF_load): Ditto.
35071         (lua_fdiv_DF): Ditto.
35072         (lua_fdiv_DF_load): Ditto.
35073         (lua_fdiv_XF): Ditto.
35074         (lua_fdiv_XF_load): Ditto.
35075         (lua_ssediv_SF): Ditto.
35076         (lua_ssediv_load_SF): Ditto.
35077         (lua_ssediv_V4SF): Ditto.
35078         (lua_ssediv_load_V4SF): Ditto.
35079         (lua_ssediv_V8SF): Ditto.
35080         (lua_ssediv_load_V8SF): Ditto.
35081         (lua_ssediv_SD): Ditto.
35082         (lua_ssediv_load_SD): Ditto.
35083         (lua_ssediv_V2DF): Ditto.
35084         (lua_ssediv_load_V2DF): Ditto.
35085         (lua_ssediv_V4DF): Ditto.
35086         (lua_ssediv_load_V4DF): Ditto.
35087
35088 2023-01-02  Florian Weimer  <fweimer@redhat.com>
35089
35090         * debug.h (dwarf_reg_sizes_constant): Declare.
35091         * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
35092
35093 2023-01-02  Florian Weimer  <fweimer@redhat.com>
35094
35095         * dwarf2cfi.cc (init_return_column_size): Remove.
35096         (init_one_dwarf_reg_size): Adjust.
35097         (generate_dwarf_reg_sizes): New function.  Extracted
35098         from expand_builtin_init_dwarf_reg_sizes.
35099         (expand_builtin_init_dwarf_reg_sizes): Call
35100         generate_dwarf_reg_sizes.
35101         * target.def (init_dwarf_reg_sizes_extra): Adjust
35102         hook signature.
35103         * config/msp430/msp430.cc
35104         (msp430_init_dwarf_reg_sizes_extra): Adjust.
35105         * config/rs6000/rs6000.cc
35106         (rs6000_init_dwarf_reg_sizes_extra): Likewise.
35107         * doc/tm.texi: Update.
35108
35109 2023-01-02  Jakub Jelinek  <jakub@redhat.com>
35110
35111         * gcc.cc (process_command): Update copyright notice dates.
35112         * gcov-dump.cc (print_version): Ditto.
35113         * gcov.cc (print_version): Ditto.
35114         * gcov-tool.cc (print_version): Ditto.
35115         * gengtype.cc (create_file): Ditto.
35116         * doc/cpp.texi: Bump @copying's copyright year.
35117         * doc/cppinternals.texi: Ditto.
35118         * doc/gcc.texi: Ditto.
35119         * doc/gccint.texi: Ditto.
35120         * doc/gcov.texi: Ditto.
35121         * doc/install.texi: Ditto.
35122         * doc/invoke.texi: Ditto.
35123
35124 2023-01-01  Roger Sayle  <roger@nextmovesoftware.com>
35125             Uroš Bizjak  <ubizjak@gmail.com>
35126
35127         * config/i386/i386.md (extendditi2): New define_insn.
35128         (define_split): Use DWIH mode iterator to treat new extendditi2
35129         identically to existing extendsidi2_1.
35130         (define_peephole2): Likewise.
35131         (define_peephole2): Likewise.
35132         (define_Split): Likewise.
35133
35134 \f
35135 Copyright (C) 2023 Free Software Foundation, Inc.
35136
35137 Copying and distribution of this file, with or without modification,
35138 are permitted in any medium without royalty provided the copyright
35139 notice and this notice are preserved.