libjava/sysdep/mips/locks.h

   1 // locks.h - Thread synchronization primitives. MIPS implementation.
   2
   3 /* Copyright (C) 2003  Free Software Foundation
   4
   5    This file is part of libgcj.
   6
   7 This software is copyrighted work licensed under the terms of the
   8 Libgcj License.  Please consult the file "LIBGCJ_LICENSE" for
   9 details.  */
  10
  11 #ifndef __SYSDEP_LOCKS_H__
  12 #define __SYSDEP_LOCKS_H__
  13
  14 /* Integer type big enough for object address.  */
  15 typedef unsigned obj_addr_t __attribute__((__mode__(__pointer__)));
  16
  17
  18 // Atomically replace *addr by new_val if it was initially equal to old.
  19 // Return true if the comparison succeeded.
  20 // Assumed to have acquire semantics, i.e. later memory operations
  21 // cannot execute before the compare_and_swap finishes.
  22 inline static bool
  23 compare_and_swap(volatile obj_addr_t *addr,
  24                  obj_addr_t old,
  25                  obj_addr_t new_val)
  26 {
  27   return __sync_bool_compare_and_swap(addr, old, new_val);
  28 }
  29
  30 // Set *addr to new_val with release semantics, i.e. making sure
  31 // that prior loads and stores complete before this
  32 // assignment.
  33 inline static void
  34 release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
  35 {
  36   __sync_synchronize();
  37   *(addr) = new_val;
  38 }
  39
  40 // Compare_and_swap with release semantics instead of acquire semantics.
  41 // On many architecture, the operation makes both guarantees, so the
  42 // implementation can be the same.
  43 inline static bool
  44 compare_and_swap_release(volatile obj_addr_t *addr,
  45                          obj_addr_t old,
  46                          obj_addr_t new_val)
  47 {
  48   return __sync_bool_compare_and_swap(addr, old, new_val);
  49 }
  50
  51 // Ensure that subsequent instructions do not execute on stale
  52 // data that was loaded from memory before the barrier.
  53 // On X86, the hardware ensures that reads are properly ordered.
  54 inline static void
  55 read_barrier()
  56 {
  57   __sync_synchronize();
  58 }
  59
  60 // Ensure that prior stores to memory are completed with respect to other
  61 // processors.
  62 inline static void
  63 write_barrier()
  64 {
  65   __sync_synchronize();
  66 }
  67
  68 #endif   // __SYSDEP_LOCKS_H__