1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
51 #include "hard-reg-set.h"
52 #include "insn-config.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
64 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
65 After rtl generation, it is 1 plus the largest register number used. */
67 int reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static int label_num
= 1;
74 /* Lowest label number in current function. */
76 static int first_label_num
;
78 /* Highest label number in current function.
79 Zero means use the value of label_num instead.
80 This is nonzero only when belatedly compiling an inline function. */
82 static int last_label_num
;
84 /* Value label_num had when set_new_first_and_last_label_number was called.
85 If label_num has not changed since then, last_label_num is valid. */
87 static int base_label_num
;
89 /* Nonzero means do not generate NOTEs for source line numbers. */
91 static int no_line_numbers
;
93 /* Commonly used rtx's, so that we only need space for one copy.
94 These are initialized once for the entire compilation.
95 All of these except perhaps the floating-point CONST_DOUBLEs
96 are unique; no other rtx-object will be equal to any of these. */
98 struct _global_rtl global_rtl
=
100 {PC
, VOIDmode
}, /* pc_rtx */
101 {CC0
, VOIDmode
}, /* cc0_rtx */
102 {REG
}, /* stack_pointer_rtx */
103 {REG
}, /* frame_pointer_rtx */
104 {REG
}, /* hard_frame_pointer_rtx */
105 {REG
}, /* arg_pointer_rtx */
106 {REG
}, /* virtual_incoming_args_rtx */
107 {REG
}, /* virtual_stack_vars_rtx */
108 {REG
}, /* virtual_stack_dynamic_rtx */
109 {REG
}, /* virtual_outgoing_args_rtx */
112 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
113 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
114 record a copy of const[012]_rtx. */
116 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
120 REAL_VALUE_TYPE dconst0
;
121 REAL_VALUE_TYPE dconst1
;
122 REAL_VALUE_TYPE dconst2
;
123 REAL_VALUE_TYPE dconstm1
;
125 /* All references to the following fixed hard registers go through
126 these unique rtl objects. On machines where the frame-pointer and
127 arg-pointer are the same register, they use the same unique object.
129 After register allocation, other rtl objects which used to be pseudo-regs
130 may be clobbered to refer to the frame-pointer register.
131 But references that were originally to the frame-pointer can be
132 distinguished from the others because they contain frame_pointer_rtx.
134 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
135 tricky: until register elimination has taken place hard_frame_pointer_rtx
136 should be used if it is being set, and frame_pointer_rtx otherwise. After
137 register elimination hard_frame_pointer_rtx should always be used.
138 On machines where the two registers are same (most) then these are the
141 In an inline procedure, the stack and frame pointer rtxs may not be
142 used for anything else. */
143 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
144 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
145 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
146 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
147 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
149 /* This is used to implement __builtin_return_address for some machines.
150 See for instance the MIPS port. */
151 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
153 /* We make one copy of (const_int C) where C is in
154 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
155 to save space during the compilation and simplify comparisons of
158 struct rtx_def const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
160 /* The ends of the doubly-linked chain of rtl for the current function.
161 Both are reset to null at the start of rtl generation for the function.
163 start_sequence saves both of these on `sequence_stack' along with
164 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
166 static rtx first_insn
= NULL
;
167 static rtx last_insn
= NULL
;
169 /* RTL_EXPR within which the current sequence will be placed. Use to
170 prevent reuse of any temporaries within the sequence until after the
171 RTL_EXPR is emitted. */
173 tree sequence_rtl_expr
= NULL
;
175 /* INSN_UID for next insn emitted.
176 Reset to 1 for each function compiled. */
178 static int cur_insn_uid
= 1;
180 /* Line number and source file of the last line-number NOTE emitted.
181 This is used to avoid generating duplicates. */
183 static int last_linenum
= 0;
184 static char *last_filename
= 0;
186 /* A vector indexed by pseudo reg number. The allocated length
187 of this vector is regno_pointer_flag_length. Since this
188 vector is needed during the expansion phase when the total
189 number of registers in the function is not yet known,
190 it is copied and made bigger when necessary. */
192 char *regno_pointer_flag
;
193 int regno_pointer_flag_length
;
195 /* Indexed by pseudo register number, if nonzero gives the known alignment
196 for that pseudo (if regno_pointer_flag is set).
197 Allocated in parallel with regno_pointer_flag. */
198 char *regno_pointer_align
;
200 /* Indexed by pseudo register number, gives the rtx for that pseudo.
201 Allocated in parallel with regno_pointer_flag. */
205 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
206 Each element describes one pending sequence.
207 The main insn-chain is saved in the last element of the chain,
208 unless the chain is empty. */
210 struct sequence_stack
*sequence_stack
;
212 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
213 shortly thrown away. We use two mechanisms to prevent this waste:
215 First, we keep a list of the expressions used to represent the sequence
216 stack in sequence_element_free_list.
218 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
219 rtvec for use by gen_sequence. One entry for each size is sufficient
220 because most cases are calls to gen_sequence followed by immediately
221 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
222 destructive on the insn in it anyway and hence can't be redone.
224 We do not bother to save this cached data over nested function calls.
225 Instead, we just reinitialize them. */
227 #define SEQUENCE_RESULT_SIZE 5
229 static struct sequence_stack
*sequence_element_free_list
;
230 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
232 /* During RTL generation, we also keep a list of free INSN rtl codes. */
233 static rtx free_insn
;
235 extern int rtx_equal_function_value_matters
;
237 /* Filename and line number of last line-number note,
238 whether we actually emitted it or not. */
239 extern char *emit_filename
;
240 extern int emit_lineno
;
242 static rtx make_jump_insn_raw
PROTO((rtx
));
243 static rtx make_call_insn_raw
PROTO((rtx
));
244 static rtx find_line_note
PROTO((rtx
));
247 gen_rtx_CONST_INT (mode
, arg
)
248 enum machine_mode mode
;
251 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
252 return &const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
254 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
255 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
256 return const_true_rtx
;
259 return gen_rtx_raw_CONST_INT (mode
, arg
);
263 gen_rtx_REG (mode
, regno
)
264 enum machine_mode mode
;
267 /* In case the MD file explicitly references the frame pointer, have
268 all such references point to the same frame pointer. This is
269 used during frame pointer elimination to distinguish the explicit
270 references to these registers from pseudos that happened to be
273 If we have eliminated the frame pointer or arg pointer, we will
274 be using it as a normal register, for example as a spill
275 register. In such cases, we might be accessing it in a mode that
276 is not Pmode and therefore cannot use the pre-allocated rtx.
278 Also don't do this when we are making new REGs in reload, since
279 we don't want to get confused with the real pointers. */
281 if (mode
== Pmode
&& !reload_in_progress
)
283 if (regno
== FRAME_POINTER_REGNUM
)
284 return frame_pointer_rtx
;
285 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
286 if (regno
== HARD_FRAME_POINTER_REGNUM
)
287 return hard_frame_pointer_rtx
;
289 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
290 if (regno
== ARG_POINTER_REGNUM
)
291 return arg_pointer_rtx
;
293 #ifdef RETURN_ADDRESS_POINTER_REGNUM
294 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
295 return return_address_pointer_rtx
;
297 if (regno
== STACK_POINTER_REGNUM
)
298 return stack_pointer_rtx
;
301 return gen_rtx_raw_REG (mode
, regno
);
305 gen_rtx_MEM (mode
, addr
)
306 enum machine_mode mode
;
309 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
311 /* This field is not cleared by the mere allocation of the rtx, so
313 MEM_ALIAS_SET (rt
) = 0;
318 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
320 ** This routine generates an RTX of the size specified by
321 ** <code>, which is an RTX code. The RTX structure is initialized
322 ** from the arguments <element1> through <elementn>, which are
323 ** interpreted according to the specific RTX type's format. The
324 ** special machine mode associated with the rtx (if any) is specified
327 ** gen_rtx can be invoked in a way which resembles the lisp-like
328 ** rtx it will generate. For example, the following rtx structure:
330 ** (plus:QI (mem:QI (reg:SI 1))
331 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
333 ** ...would be generated by the following C code:
335 ** gen_rtx (PLUS, QImode,
336 ** gen_rtx (MEM, QImode,
337 ** gen_rtx (REG, SImode, 1)),
338 ** gen_rtx (MEM, QImode,
339 ** gen_rtx (PLUS, SImode,
340 ** gen_rtx (REG, SImode, 2),
341 ** gen_rtx (REG, SImode, 3)))),
346 gen_rtx
VPROTO((enum rtx_code code
, enum machine_mode mode
, ...))
350 enum machine_mode mode
;
353 register int i
; /* Array indices... */
354 register char *fmt
; /* Current rtx's format... */
355 register rtx rt_val
; /* RTX to return to caller... */
360 code
= va_arg (p
, enum rtx_code
);
361 mode
= va_arg (p
, enum machine_mode
);
364 if (code
== CONST_INT
)
365 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
366 else if (code
== REG
)
367 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
370 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
371 rt_val
->mode
= mode
; /* Store the machine mode... */
373 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
374 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
378 case '0': /* Unused field. */
381 case 'i': /* An integer? */
382 XINT (rt_val
, i
) = va_arg (p
, int);
385 case 'w': /* A wide integer? */
386 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
389 case 's': /* A string? */
390 XSTR (rt_val
, i
) = va_arg (p
, char *);
393 case 'e': /* An expression? */
394 case 'u': /* An insn? Same except when printing. */
395 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
398 case 'E': /* An RTX vector? */
399 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
402 case 'b': /* A bitmap? */
403 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
406 case 't': /* A tree? */
407 XTREE (rt_val
, i
) = va_arg (p
, tree
);
416 return rt_val
; /* Return the new RTX... */
419 /* gen_rtvec (n, [rt1, ..., rtn])
421 ** This routine creates an rtvec and stores within it the
422 ** pointers to rtx's which are its arguments.
427 gen_rtvec
VPROTO((int n
, ...))
443 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
445 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
447 for (i
= 0; i
< n
; i
++)
448 vector
[i
] = va_arg (p
, rtx
);
451 return gen_rtvec_v (n
, vector
);
455 gen_rtvec_v (n
, argp
)
460 register rtvec rt_val
;
463 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
465 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
467 for (i
= 0; i
< n
; i
++)
468 rt_val
->elem
[i
].rtx
= *argp
++;
474 gen_rtvec_vv (n
, argp
)
479 register rtvec rt_val
;
482 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
484 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
486 for (i
= 0; i
< n
; i
++)
487 rt_val
->elem
[i
].rtx
= (argp
++)->rtx
;
492 /* Generate a REG rtx for a new pseudo register of mode MODE.
493 This pseudo is assigned the next sequential register number. */
497 enum machine_mode mode
;
501 /* Don't let anything called by or after reload create new registers
502 (actually, registers can't be created after flow, but this is a good
505 if (reload_in_progress
|| reload_completed
)
508 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
509 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
)
511 /* For complex modes, don't make a single pseudo.
512 Instead, make a CONCAT of two pseudos.
513 This allows noncontiguous allocation of the real and imaginary parts,
514 which makes much better code. Besides, allocating DCmode
515 pseudos overstrains reload on some machines like the 386. */
516 rtx realpart
, imagpart
;
517 int size
= GET_MODE_UNIT_SIZE (mode
);
518 enum machine_mode partmode
519 = mode_for_size (size
* BITS_PER_UNIT
,
520 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
521 ? MODE_FLOAT
: MODE_INT
),
524 realpart
= gen_reg_rtx (partmode
);
525 imagpart
= gen_reg_rtx (partmode
);
526 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
529 /* Make sure regno_pointer_flag and regno_reg_rtx are large
530 enough to have an element for this pseudo reg number. */
532 if (reg_rtx_no
== regno_pointer_flag_length
)
536 (char *) savealloc (regno_pointer_flag_length
* 2);
537 bcopy (regno_pointer_flag
, new, regno_pointer_flag_length
);
538 bzero (&new[regno_pointer_flag_length
], regno_pointer_flag_length
);
539 regno_pointer_flag
= new;
541 new = (char *) savealloc (regno_pointer_flag_length
* 2);
542 bcopy (regno_pointer_align
, new, regno_pointer_flag_length
);
543 bzero (&new[regno_pointer_flag_length
], regno_pointer_flag_length
);
544 regno_pointer_align
= new;
546 new1
= (rtx
*) savealloc (regno_pointer_flag_length
* 2 * sizeof (rtx
));
547 bcopy ((char *) regno_reg_rtx
, (char *) new1
,
548 regno_pointer_flag_length
* sizeof (rtx
));
549 bzero ((char *) &new1
[regno_pointer_flag_length
],
550 regno_pointer_flag_length
* sizeof (rtx
));
551 regno_reg_rtx
= new1
;
553 regno_pointer_flag_length
*= 2;
556 val
= gen_rtx_raw_REG (mode
, reg_rtx_no
);
557 regno_reg_rtx
[reg_rtx_no
++] = val
;
561 /* Identify REG (which may be a CONCAT) as a user register. */
567 if (GET_CODE (reg
) == CONCAT
)
569 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
570 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
572 else if (GET_CODE (reg
) == REG
)
573 REG_USERVAR_P (reg
) = 1;
578 /* Identify REG as a probable pointer register and show its alignment
579 as ALIGN, if nonzero. */
582 mark_reg_pointer (reg
, align
)
586 REGNO_POINTER_FLAG (REGNO (reg
)) = 1;
589 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
592 /* Return 1 plus largest pseudo reg number used in the current function. */
600 /* Return 1 + the largest label number used so far in the current function. */
605 if (last_label_num
&& label_num
== base_label_num
)
606 return last_label_num
;
610 /* Return first label number used in this function (if any were used). */
613 get_first_label_num ()
615 return first_label_num
;
618 /* Return a value representing some low-order bits of X, where the number
619 of low-order bits is given by MODE. Note that no conversion is done
620 between floating-point and fixed-point values, rather, the bit
621 representation is returned.
623 This function handles the cases in common between gen_lowpart, below,
624 and two variants in cse.c and combine.c. These are the cases that can
625 be safely handled at all points in the compilation.
627 If this is not a case we can handle, return 0. */
630 gen_lowpart_common (mode
, x
)
631 enum machine_mode mode
;
636 if (GET_MODE (x
) == mode
)
639 /* MODE must occupy no more words than the mode of X. */
640 if (GET_MODE (x
) != VOIDmode
641 && ((GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
642 > ((GET_MODE_SIZE (GET_MODE (x
)) + (UNITS_PER_WORD
- 1))
646 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
647 word
= ((GET_MODE_SIZE (GET_MODE (x
))
648 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
651 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
652 && (GET_MODE_CLASS (mode
) == MODE_INT
653 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
655 /* If we are getting the low-order part of something that has been
656 sign- or zero-extended, we can either just use the object being
657 extended or make a narrower extension. If we want an even smaller
658 piece than the size of the object being extended, call ourselves
661 This case is used mostly by combine and cse. */
663 if (GET_MODE (XEXP (x
, 0)) == mode
)
665 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
666 return gen_lowpart_common (mode
, XEXP (x
, 0));
667 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
668 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
670 else if (GET_CODE (x
) == SUBREG
671 && (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
672 || GET_MODE_SIZE (mode
) == GET_MODE_UNIT_SIZE (GET_MODE (x
))))
673 return (GET_MODE (SUBREG_REG (x
)) == mode
&& SUBREG_WORD (x
) == 0
675 : gen_rtx_SUBREG (mode
, SUBREG_REG (x
), SUBREG_WORD (x
) + word
));
676 else if (GET_CODE (x
) == REG
)
678 /* Let the backend decide how many registers to skip. This is needed
679 in particular for Sparc64 where fp regs are smaller than a word. */
680 /* ??? Note that subregs are now ambiguous, in that those against
681 pseudos are sized by the Word Size, while those against hard
682 regs are sized by the underlying register size. Better would be
683 to always interpret the subreg offset parameter as bytes or bits. */
685 if (WORDS_BIG_ENDIAN
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
686 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
687 - HARD_REGNO_NREGS (REGNO (x
), mode
));
689 /* If the register is not valid for MODE, return 0. If we don't
690 do this, there is no way to fix up the resulting REG later.
691 But we do do this if the current REG is not valid for its
692 mode. This latter is a kludge, but is required due to the
693 way that parameters are passed on some machines, most
695 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
696 && ! HARD_REGNO_MODE_OK (REGNO (x
) + word
, mode
)
697 && HARD_REGNO_MODE_OK (REGNO (x
), GET_MODE (x
)))
699 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
700 /* integrate.c can't handle parts of a return value register. */
701 && (! REG_FUNCTION_VALUE_P (x
)
702 || ! rtx_equal_function_value_matters
)
703 #ifdef CLASS_CANNOT_CHANGE_SIZE
704 && ! (GET_MODE_SIZE (mode
) != GET_MODE_SIZE (GET_MODE (x
))
705 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_INT
706 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_FLOAT
707 && (TEST_HARD_REG_BIT
708 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
711 /* We want to keep the stack, frame, and arg pointers
713 && x
!= frame_pointer_rtx
714 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
715 && x
!= arg_pointer_rtx
717 && x
!= stack_pointer_rtx
)
718 return gen_rtx_REG (mode
, REGNO (x
) + word
);
720 return gen_rtx_SUBREG (mode
, x
, word
);
722 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
723 from the low-order part of the constant. */
724 else if ((GET_MODE_CLASS (mode
) == MODE_INT
725 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
726 && GET_MODE (x
) == VOIDmode
727 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
729 /* If MODE is twice the host word size, X is already the desired
730 representation. Otherwise, if MODE is wider than a word, we can't
731 do this. If MODE is exactly a word, return just one CONST_INT.
732 If MODE is smaller than a word, clear the bits that don't belong
733 in our mode, unless they and our sign bit are all one. So we get
734 either a reasonable negative value or a reasonable unsigned value
737 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
739 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
741 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
742 return (GET_CODE (x
) == CONST_INT
? x
743 : GEN_INT (CONST_DOUBLE_LOW (x
)));
746 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
747 int width
= GET_MODE_BITSIZE (mode
);
748 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
749 : CONST_DOUBLE_LOW (x
));
751 /* Sign extend to HOST_WIDE_INT. */
752 val
= val
<< (HOST_BITS_PER_WIDE_INT
- width
) >> (HOST_BITS_PER_WIDE_INT
- width
);
754 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
759 /* If X is an integral constant but we want it in floating-point, it
760 must be the case that we have a union of an integer and a floating-point
761 value. If the machine-parameters allow it, simulate that union here
762 and return the result. The two-word and single-word cases are
765 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
766 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
767 || flag_pretend_float
)
768 && GET_MODE_CLASS (mode
) == MODE_FLOAT
769 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
770 && GET_CODE (x
) == CONST_INT
771 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
772 #ifdef REAL_ARITHMETIC
778 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
779 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
783 union {HOST_WIDE_INT i
; float d
; } u
;
786 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
789 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
790 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
791 || flag_pretend_float
)
792 && GET_MODE_CLASS (mode
) == MODE_FLOAT
793 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
794 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
795 && GET_MODE (x
) == VOIDmode
796 && (sizeof (double) * HOST_BITS_PER_CHAR
797 == 2 * HOST_BITS_PER_WIDE_INT
))
798 #ifdef REAL_ARITHMETIC
802 HOST_WIDE_INT low
, high
;
804 if (GET_CODE (x
) == CONST_INT
)
805 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
807 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
809 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
811 if (WORDS_BIG_ENDIAN
)
812 i
[0] = high
, i
[1] = low
;
814 i
[0] = low
, i
[1] = high
;
816 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
817 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
821 union {HOST_WIDE_INT i
[2]; double d
; } u
;
822 HOST_WIDE_INT low
, high
;
824 if (GET_CODE (x
) == CONST_INT
)
825 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
827 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
829 #ifdef HOST_WORDS_BIG_ENDIAN
830 u
.i
[0] = high
, u
.i
[1] = low
;
832 u
.i
[0] = low
, u
.i
[1] = high
;
835 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
839 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
840 same as sizeof (double) or when sizeof (float) is larger than the
841 size of a word on the target machine. */
842 #ifdef REAL_ARITHMETIC
843 else if (mode
== SFmode
&& GET_CODE (x
) == CONST_INT
)
849 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
850 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
854 /* Similarly, if this is converting a floating-point value into a
855 single-word integer. Only do this is the host and target parameters are
858 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
859 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
860 || flag_pretend_float
)
861 && (GET_MODE_CLASS (mode
) == MODE_INT
862 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
863 && GET_CODE (x
) == CONST_DOUBLE
864 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
865 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
866 return operand_subword (x
, word
, 0, GET_MODE (x
));
868 /* Similarly, if this is converting a floating-point value into a
869 two-word integer, we can do this one word at a time and make an
870 integer. Only do this is the host and target parameters are
873 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
874 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
875 || flag_pretend_float
)
876 && (GET_MODE_CLASS (mode
) == MODE_INT
877 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
878 && GET_CODE (x
) == CONST_DOUBLE
879 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
880 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
883 = operand_subword (x
, word
+ WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
885 = operand_subword (x
, word
+ ! WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
887 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
888 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
889 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
892 /* Otherwise, we can't do this. */
896 /* Return the real part (which has mode MODE) of a complex value X.
897 This always comes at the low address in memory. */
900 gen_realpart (mode
, x
)
901 enum machine_mode mode
;
904 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
906 else if (WORDS_BIG_ENDIAN
)
907 return gen_highpart (mode
, x
);
909 return gen_lowpart (mode
, x
);
912 /* Return the imaginary part (which has mode MODE) of a complex value X.
913 This always comes at the high address in memory. */
916 gen_imagpart (mode
, x
)
917 enum machine_mode mode
;
920 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
922 else if (WORDS_BIG_ENDIAN
)
923 return gen_lowpart (mode
, x
);
925 return gen_highpart (mode
, x
);
928 /* Return 1 iff X, assumed to be a SUBREG,
929 refers to the real part of the complex value in its containing reg.
930 Complex values are always stored with the real part in the first word,
931 regardless of WORDS_BIG_ENDIAN. */
934 subreg_realpart_p (x
)
937 if (GET_CODE (x
) != SUBREG
)
940 return SUBREG_WORD (x
) == 0;
943 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
944 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
945 least-significant part of X.
946 MODE specifies how big a part of X to return;
947 it usually should not be larger than a word.
948 If X is a MEM whose address is a QUEUED, the value may be so also. */
951 gen_lowpart (mode
, x
)
952 enum machine_mode mode
;
955 rtx result
= gen_lowpart_common (mode
, x
);
959 else if (GET_CODE (x
) == REG
)
961 /* Must be a hard reg that's not valid in MODE. */
962 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
967 else if (GET_CODE (x
) == MEM
)
969 /* The only additional case we can do is MEM. */
970 register int offset
= 0;
971 if (WORDS_BIG_ENDIAN
)
972 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
973 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
975 if (BYTES_BIG_ENDIAN
)
976 /* Adjust the address so that the address-after-the-data
978 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
979 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
981 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
983 else if (GET_CODE (x
) == ADDRESSOF
)
984 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
989 /* Like `gen_lowpart', but refer to the most significant part.
990 This is used to access the imaginary part of a complex number. */
993 gen_highpart (mode
, x
)
994 enum machine_mode mode
;
997 /* This case loses if X is a subreg. To catch bugs early,
998 complain if an invalid MODE is used even in other cases. */
999 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1000 && GET_MODE_SIZE (mode
) != GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1002 if (GET_CODE (x
) == CONST_DOUBLE
1003 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1004 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_FLOAT
1007 return GEN_INT (CONST_DOUBLE_HIGH (x
) & GET_MODE_MASK (mode
));
1008 else if (GET_CODE (x
) == CONST_INT
)
1010 if (HOST_BITS_PER_WIDE_INT
<= BITS_PER_WORD
)
1012 return GEN_INT (INTVAL (x
) >> (HOST_BITS_PER_WIDE_INT
- BITS_PER_WORD
));
1014 else if (GET_CODE (x
) == MEM
)
1016 register int offset
= 0;
1017 if (! WORDS_BIG_ENDIAN
)
1018 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1019 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1021 if (! BYTES_BIG_ENDIAN
1022 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
1023 offset
-= (GET_MODE_SIZE (mode
)
1024 - MIN (UNITS_PER_WORD
,
1025 GET_MODE_SIZE (GET_MODE (x
))));
1027 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
1029 else if (GET_CODE (x
) == SUBREG
)
1031 /* The only time this should occur is when we are looking at a
1032 multi-word item with a SUBREG whose mode is the same as that of the
1033 item. It isn't clear what we would do if it wasn't. */
1034 if (SUBREG_WORD (x
) != 0)
1036 return gen_highpart (mode
, SUBREG_REG (x
));
1038 else if (GET_CODE (x
) == REG
)
1042 /* Let the backend decide how many registers to skip. This is needed
1043 in particular for sparc64 where fp regs are smaller than a word. */
1044 /* ??? Note that subregs are now ambiguous, in that those against
1045 pseudos are sized by the word size, while those against hard
1046 regs are sized by the underlying register size. Better would be
1047 to always interpret the subreg offset parameter as bytes or bits. */
1049 if (WORDS_BIG_ENDIAN
)
1051 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1052 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
1053 - HARD_REGNO_NREGS (REGNO (x
), mode
));
1055 word
= ((GET_MODE_SIZE (GET_MODE (x
))
1056 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
1059 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
1060 /* integrate.c can't handle parts of a return value register. */
1061 && (! REG_FUNCTION_VALUE_P (x
)
1062 || ! rtx_equal_function_value_matters
)
1063 /* We want to keep the stack, frame, and arg pointers special. */
1064 && x
!= frame_pointer_rtx
1065 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1066 && x
!= arg_pointer_rtx
1068 && x
!= stack_pointer_rtx
)
1069 return gen_rtx_REG (mode
, REGNO (x
) + word
);
1071 return gen_rtx_SUBREG (mode
, x
, word
);
1077 /* Return 1 iff X, assumed to be a SUBREG,
1078 refers to the least significant part of its containing reg.
1079 If X is not a SUBREG, always return 1 (it is its own low part!). */
1082 subreg_lowpart_p (x
)
1085 if (GET_CODE (x
) != SUBREG
)
1087 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1090 if (WORDS_BIG_ENDIAN
1091 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) > UNITS_PER_WORD
)
1092 return (SUBREG_WORD (x
)
1093 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
1094 - MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
))
1097 return SUBREG_WORD (x
) == 0;
1100 /* Return subword I of operand OP.
1101 The word number, I, is interpreted as the word number starting at the
1102 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1103 otherwise it is the high-order word.
1105 If we cannot extract the required word, we return zero. Otherwise, an
1106 rtx corresponding to the requested word will be returned.
1108 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1109 reload has completed, a valid address will always be returned. After
1110 reload, if a valid address cannot be returned, we return zero.
1112 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1113 it is the responsibility of the caller.
1115 MODE is the mode of OP in case it is a CONST_INT. */
1118 operand_subword (op
, i
, validate_address
, mode
)
1121 int validate_address
;
1122 enum machine_mode mode
;
1125 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1126 int bits_per_word
= BITS_PER_WORD
;
1128 if (mode
== VOIDmode
)
1129 mode
= GET_MODE (op
);
1131 if (mode
== VOIDmode
)
1134 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1136 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
1137 || (i
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
)))
1140 /* If OP is already an integer word, return it. */
1141 if (GET_MODE_CLASS (mode
) == MODE_INT
1142 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1145 /* If OP is a REG or SUBREG, we can handle it very simply. */
1146 if (GET_CODE (op
) == REG
)
1148 /* If the register is not valid for MODE, return 0. If we don't
1149 do this, there is no way to fix up the resulting REG later. */
1150 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1151 && ! HARD_REGNO_MODE_OK (REGNO (op
) + i
, word_mode
))
1153 else if (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1154 || (REG_FUNCTION_VALUE_P (op
)
1155 && rtx_equal_function_value_matters
)
1156 /* We want to keep the stack, frame, and arg pointers
1158 || op
== frame_pointer_rtx
1159 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1160 || op
== arg_pointer_rtx
1162 || op
== stack_pointer_rtx
)
1163 return gen_rtx_SUBREG (word_mode
, op
, i
);
1165 return gen_rtx_REG (word_mode
, REGNO (op
) + i
);
1167 else if (GET_CODE (op
) == SUBREG
)
1168 return gen_rtx_SUBREG (word_mode
, SUBREG_REG (op
), i
+ SUBREG_WORD (op
));
1169 else if (GET_CODE (op
) == CONCAT
)
1171 int partwords
= GET_MODE_UNIT_SIZE (GET_MODE (op
)) / UNITS_PER_WORD
;
1173 return operand_subword (XEXP (op
, 0), i
, validate_address
, mode
);
1174 return operand_subword (XEXP (op
, 1), i
- partwords
,
1175 validate_address
, mode
);
1178 /* Form a new MEM at the requested address. */
1179 if (GET_CODE (op
) == MEM
)
1181 rtx addr
= plus_constant (XEXP (op
, 0), i
* UNITS_PER_WORD
);
1184 if (validate_address
)
1186 if (reload_completed
)
1188 if (! strict_memory_address_p (word_mode
, addr
))
1192 addr
= memory_address (word_mode
, addr
);
1195 new = gen_rtx_MEM (word_mode
, addr
);
1197 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op
);
1198 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op
);
1199 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1204 /* The only remaining cases are when OP is a constant. If the host and
1205 target floating formats are the same, handling two-word floating
1206 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1207 are defined as returning one or two 32 bit values, respectively,
1208 and not values of BITS_PER_WORD bits. */
1209 #ifdef REAL_ARITHMETIC
1210 /* The output is some bits, the width of the target machine's word.
1211 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1213 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1214 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1215 && GET_MODE_BITSIZE (mode
) == 64
1216 && GET_CODE (op
) == CONST_DOUBLE
)
1221 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1222 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1224 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1225 which the words are written depends on the word endianness.
1227 ??? This is a potential portability problem and should
1228 be fixed at some point. */
1229 if (BITS_PER_WORD
== 32)
1230 return GEN_INT ((HOST_WIDE_INT
) k
[i
]);
1231 #if HOST_BITS_PER_WIDE_INT > 32
1232 else if (BITS_PER_WORD
>= 64 && i
== 0)
1233 return GEN_INT ((((HOST_WIDE_INT
) k
[! WORDS_BIG_ENDIAN
]) << 32)
1234 | (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
]);
1236 else if (BITS_PER_WORD
== 16)
1240 if ((i
& 0x1) == !WORDS_BIG_ENDIAN
)
1243 return GEN_INT ((HOST_WIDE_INT
) value
);
1248 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1249 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1250 && GET_MODE_BITSIZE (mode
) > 64
1251 && GET_CODE (op
) == CONST_DOUBLE
)
1256 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1257 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1259 if (BITS_PER_WORD
== 32)
1260 return GEN_INT ((HOST_WIDE_INT
) k
[i
]);
1262 #else /* no REAL_ARITHMETIC */
1263 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1264 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1265 || flag_pretend_float
)
1266 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1267 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1268 && GET_CODE (op
) == CONST_DOUBLE
)
1270 /* The constant is stored in the host's word-ordering,
1271 but we want to access it in the target's word-ordering. Some
1272 compilers don't like a conditional inside macro args, so we have two
1273 copies of the return. */
1274 #ifdef HOST_WORDS_BIG_ENDIAN
1275 return GEN_INT (i
== WORDS_BIG_ENDIAN
1276 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1278 return GEN_INT (i
!= WORDS_BIG_ENDIAN
1279 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1282 #endif /* no REAL_ARITHMETIC */
1284 /* Single word float is a little harder, since single- and double-word
1285 values often do not have the same high-order bits. We have already
1286 verified that we want the only defined word of the single-word value. */
1287 #ifdef REAL_ARITHMETIC
1288 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1289 && GET_MODE_BITSIZE (mode
) == 32
1290 && GET_CODE (op
) == CONST_DOUBLE
)
1295 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1296 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1298 if (BITS_PER_WORD
== 16)
1300 if ((i
& 0x1) == !WORDS_BIG_ENDIAN
)
1304 return GEN_INT ((HOST_WIDE_INT
) l
);
1307 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1308 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1309 || flag_pretend_float
)
1310 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1311 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1312 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1313 && GET_CODE (op
) == CONST_DOUBLE
)
1316 union {float f
; HOST_WIDE_INT i
; } u
;
1318 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1321 return GEN_INT (u
.i
);
1323 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1324 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1325 || flag_pretend_float
)
1326 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1327 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1328 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1329 && GET_CODE (op
) == CONST_DOUBLE
)
1332 union {double d
; HOST_WIDE_INT i
; } u
;
1334 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1337 return GEN_INT (u
.i
);
1339 #endif /* no REAL_ARITHMETIC */
1341 /* The only remaining cases that we can handle are integers.
1342 Convert to proper endianness now since these cases need it.
1343 At this point, i == 0 means the low-order word.
1345 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1346 in general. However, if OP is (const_int 0), we can just return
1349 if (op
== const0_rtx
)
1352 if (GET_MODE_CLASS (mode
) != MODE_INT
1353 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1354 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1357 if (WORDS_BIG_ENDIAN
)
1358 i
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - i
;
1360 /* Find out which word on the host machine this value is in and get
1361 it from the constant. */
1362 val
= (i
/ size_ratio
== 0
1363 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1364 : (GET_CODE (op
) == CONST_INT
1365 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1367 /* Get the value we want into the low bits of val. */
1368 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1369 val
= ((val
>> ((i
% size_ratio
) * BITS_PER_WORD
)));
1371 /* Clear the bits that don't belong in our mode, unless they and our sign
1372 bit are all one. So we get either a reasonable negative value or a
1373 reasonable unsigned value for this mode. */
1374 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
1375 && ((val
& ((HOST_WIDE_INT
) (-1) << (bits_per_word
- 1)))
1376 != ((HOST_WIDE_INT
) (-1) << (bits_per_word
- 1))))
1377 val
&= ((HOST_WIDE_INT
) 1 << bits_per_word
) - 1;
1379 /* If this would be an entire word for the target, but is not for
1380 the host, then sign-extend on the host so that the number will look
1381 the same way on the host that it would on the target.
1383 For example, when building a 64 bit alpha hosted 32 bit sparc
1384 targeted compiler, then we want the 32 bit unsigned value -1 to be
1385 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1386 The later confuses the sparc backend. */
1388 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
1389 && (val
& ((HOST_WIDE_INT
) 1 << (bits_per_word
- 1))))
1390 val
|= ((HOST_WIDE_INT
) (-1) << bits_per_word
);
1392 return GEN_INT (val
);
1395 /* Similar to `operand_subword', but never return 0. If we can't extract
1396 the required subword, put OP into a register and try again. If that fails,
1397 abort. We always validate the address in this case. It is not valid
1398 to call this function after reload; it is mostly meant for RTL
1401 MODE is the mode of OP, in case it is CONST_INT. */
1404 operand_subword_force (op
, i
, mode
)
1407 enum machine_mode mode
;
1409 rtx result
= operand_subword (op
, i
, 1, mode
);
1414 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1416 /* If this is a register which can not be accessed by words, copy it
1417 to a pseudo register. */
1418 if (GET_CODE (op
) == REG
)
1419 op
= copy_to_reg (op
);
1421 op
= force_reg (mode
, op
);
1424 result
= operand_subword (op
, i
, 1, mode
);
1431 /* Given a compare instruction, swap the operands.
1432 A test instruction is changed into a compare of 0 against the operand. */
1435 reverse_comparison (insn
)
1438 rtx body
= PATTERN (insn
);
1441 if (GET_CODE (body
) == SET
)
1442 comp
= SET_SRC (body
);
1444 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1446 if (GET_CODE (comp
) == COMPARE
)
1448 rtx op0
= XEXP (comp
, 0);
1449 rtx op1
= XEXP (comp
, 1);
1450 XEXP (comp
, 0) = op1
;
1451 XEXP (comp
, 1) = op0
;
1455 rtx
new = gen_rtx_COMPARE (VOIDmode
, CONST0_RTX (GET_MODE (comp
)), comp
);
1456 if (GET_CODE (body
) == SET
)
1457 SET_SRC (body
) = new;
1459 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1463 /* Return a memory reference like MEMREF, but with its mode changed
1464 to MODE and its address changed to ADDR.
1465 (VOIDmode means don't change the mode.
1466 NULL for ADDR means don't change the address.) */
1469 change_address (memref
, mode
, addr
)
1471 enum machine_mode mode
;
1476 if (GET_CODE (memref
) != MEM
)
1478 if (mode
== VOIDmode
)
1479 mode
= GET_MODE (memref
);
1481 addr
= XEXP (memref
, 0);
1483 /* If reload is in progress or has completed, ADDR must be valid.
1484 Otherwise, we can call memory_address to make it valid. */
1485 if (reload_completed
|| reload_in_progress
)
1487 if (! memory_address_p (mode
, addr
))
1491 addr
= memory_address (mode
, addr
);
1493 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1496 new = gen_rtx_MEM (mode
, addr
);
1497 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref
);
1498 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref
);
1499 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref
);
1503 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1510 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
1511 NULL_RTX
, label_num
++, NULL_PTR
);
1513 LABEL_NUSES (label
) = 0;
1517 /* For procedure integration. */
1519 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1520 from a permanent obstack when the opportunity arises. */
1523 gen_inline_header_rtx (first_insn
, first_parm_insn
, first_labelno
,
1524 last_labelno
, max_parm_regnum
, max_regnum
, args_size
,
1525 pops_args
, stack_slots
, forced_labels
, function_flags
,
1526 outgoing_args_size
, original_arg_vector
,
1527 original_decl_initial
, regno_rtx
, regno_flag
,
1528 regno_align
, parm_reg_stack_loc
)
1529 rtx first_insn
, first_parm_insn
;
1530 int first_labelno
, last_labelno
, max_parm_regnum
, max_regnum
, args_size
;
1535 int outgoing_args_size
;
1536 rtvec original_arg_vector
;
1537 rtx original_decl_initial
;
1541 rtvec parm_reg_stack_loc
;
1543 rtx header
= gen_rtx_INLINE_HEADER (VOIDmode
,
1544 cur_insn_uid
++, NULL_RTX
,
1545 first_insn
, first_parm_insn
,
1546 first_labelno
, last_labelno
,
1547 max_parm_regnum
, max_regnum
, args_size
,
1548 pops_args
, stack_slots
, forced_labels
,
1549 function_flags
, outgoing_args_size
,
1550 original_arg_vector
,
1551 original_decl_initial
,
1552 regno_rtx
, regno_flag
, regno_align
,
1553 parm_reg_stack_loc
);
1557 /* Install new pointers to the first and last insns in the chain.
1558 Also, set cur_insn_uid to one higher than the last in use.
1559 Used for an inline-procedure after copying the insn chain. */
1562 set_new_first_and_last_insn (first
, last
)
1571 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1572 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1577 /* Set the range of label numbers found in the current function.
1578 This is used when belatedly compiling an inline function. */
1581 set_new_first_and_last_label_num (first
, last
)
1584 base_label_num
= label_num
;
1585 first_label_num
= first
;
1586 last_label_num
= last
;
1589 /* Save all variables describing the current status into the structure *P.
1590 This is used before starting a nested function. */
1593 save_emit_status (p
)
1596 p
->reg_rtx_no
= reg_rtx_no
;
1597 p
->first_label_num
= first_label_num
;
1598 p
->first_insn
= first_insn
;
1599 p
->last_insn
= last_insn
;
1600 p
->sequence_rtl_expr
= sequence_rtl_expr
;
1601 p
->sequence_stack
= sequence_stack
;
1602 p
->cur_insn_uid
= cur_insn_uid
;
1603 p
->last_linenum
= last_linenum
;
1604 p
->last_filename
= last_filename
;
1605 p
->regno_pointer_flag
= regno_pointer_flag
;
1606 p
->regno_pointer_align
= regno_pointer_align
;
1607 p
->regno_pointer_flag_length
= regno_pointer_flag_length
;
1608 p
->regno_reg_rtx
= regno_reg_rtx
;
1611 /* Restore all variables describing the current status from the structure *P.
1612 This is used after a nested function. */
1615 restore_emit_status (p
)
1620 reg_rtx_no
= p
->reg_rtx_no
;
1621 first_label_num
= p
->first_label_num
;
1623 first_insn
= p
->first_insn
;
1624 last_insn
= p
->last_insn
;
1625 sequence_rtl_expr
= p
->sequence_rtl_expr
;
1626 sequence_stack
= p
->sequence_stack
;
1627 cur_insn_uid
= p
->cur_insn_uid
;
1628 last_linenum
= p
->last_linenum
;
1629 last_filename
= p
->last_filename
;
1630 regno_pointer_flag
= p
->regno_pointer_flag
;
1631 regno_pointer_align
= p
->regno_pointer_align
;
1632 regno_pointer_flag_length
= p
->regno_pointer_flag_length
;
1633 regno_reg_rtx
= p
->regno_reg_rtx
;
1635 /* Clear our cache of rtx expressions for start_sequence and
1637 sequence_element_free_list
= 0;
1638 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
1639 sequence_result
[i
] = 0;
1644 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1645 It does not work to do this twice, because the mark bits set here
1646 are not cleared afterwards. */
1649 unshare_all_rtl (insn
)
1652 for (; insn
; insn
= NEXT_INSN (insn
))
1653 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
1654 || GET_CODE (insn
) == CALL_INSN
)
1656 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
1657 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
1658 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
1661 /* Make sure the addresses of stack slots found outside the insn chain
1662 (such as, in DECL_RTL of a variable) are not shared
1663 with the insn chain.
1665 This special care is necessary when the stack slot MEM does not
1666 actually appear in the insn chain. If it does appear, its address
1667 is unshared from all else at that point. */
1669 copy_rtx_if_shared (stack_slot_list
);
1672 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1673 Recursively does the same for subexpressions. */
1676 copy_rtx_if_shared (orig
)
1679 register rtx x
= orig
;
1681 register enum rtx_code code
;
1682 register char *format_ptr
;
1688 code
= GET_CODE (x
);
1690 /* These types may be freely shared. */
1703 /* SCRATCH must be shared because they represent distinct values. */
1707 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1708 a LABEL_REF, it isn't sharable. */
1709 if (GET_CODE (XEXP (x
, 0)) == PLUS
1710 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1711 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
1720 /* The chain of insns is not being copied. */
1724 /* A MEM is allowed to be shared if its address is constant
1725 or is a constant plus one of the special registers. */
1726 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
1727 || XEXP (x
, 0) == virtual_stack_vars_rtx
1728 || XEXP (x
, 0) == virtual_incoming_args_rtx
)
1731 if (GET_CODE (XEXP (x
, 0)) == PLUS
1732 && (XEXP (XEXP (x
, 0), 0) == virtual_stack_vars_rtx
1733 || XEXP (XEXP (x
, 0), 0) == virtual_incoming_args_rtx
)
1734 && CONSTANT_ADDRESS_P (XEXP (XEXP (x
, 0), 1)))
1736 /* This MEM can appear in more than one place,
1737 but its address better not be shared with anything else. */
1739 XEXP (x
, 0) = copy_rtx_if_shared (XEXP (x
, 0));
1749 /* This rtx may not be shared. If it has already been seen,
1750 replace it with a copy of itself. */
1756 copy
= rtx_alloc (code
);
1757 bcopy ((char *) x
, (char *) copy
,
1758 (sizeof (*copy
) - sizeof (copy
->fld
)
1759 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
1765 /* Now scan the subexpressions recursively.
1766 We can store any replaced subexpressions directly into X
1767 since we know X is not shared! Any vectors in X
1768 must be copied if X was copied. */
1770 format_ptr
= GET_RTX_FORMAT (code
);
1772 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1774 switch (*format_ptr
++)
1777 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
1781 if (XVEC (x
, i
) != NULL
)
1784 int len
= XVECLEN (x
, i
);
1786 if (copied
&& len
> 0)
1787 XVEC (x
, i
) = gen_rtvec_vv (len
, XVEC (x
, i
)->elem
);
1788 for (j
= 0; j
< len
; j
++)
1789 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
1797 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1798 to look for shared sub-parts. */
1801 reset_used_flags (x
)
1805 register enum rtx_code code
;
1806 register char *format_ptr
;
1811 code
= GET_CODE (x
);
1813 /* These types may be freely shared so we needn't do any resetting
1834 /* The chain of insns is not being copied. */
1843 format_ptr
= GET_RTX_FORMAT (code
);
1844 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1846 switch (*format_ptr
++)
1849 reset_used_flags (XEXP (x
, i
));
1853 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1854 reset_used_flags (XVECEXP (x
, i
, j
));
1860 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1861 Return X or the rtx for the pseudo reg the value of X was copied into.
1862 OTHER must be valid as a SET_DEST. */
1865 make_safe_from (x
, other
)
1869 switch (GET_CODE (other
))
1872 other
= SUBREG_REG (other
);
1874 case STRICT_LOW_PART
:
1877 other
= XEXP (other
, 0);
1883 if ((GET_CODE (other
) == MEM
1885 && GET_CODE (x
) != REG
1886 && GET_CODE (x
) != SUBREG
)
1887 || (GET_CODE (other
) == REG
1888 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
1889 || reg_mentioned_p (other
, x
))))
1891 rtx temp
= gen_reg_rtx (GET_MODE (x
));
1892 emit_move_insn (temp
, x
);
1898 /* Emission of insns (adding them to the doubly-linked list). */
1900 /* Return the first insn of the current sequence or current function. */
1908 /* Return the last insn emitted in current sequence or current function. */
1916 /* Specify a new insn as the last in the chain. */
1919 set_last_insn (insn
)
1922 if (NEXT_INSN (insn
) != 0)
1927 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1930 get_last_insn_anywhere ()
1932 struct sequence_stack
*stack
;
1935 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
1936 if (stack
->last
!= 0)
1941 /* Return a number larger than any instruction's uid in this function. */
1946 return cur_insn_uid
;
1949 /* Return the next insn. If it is a SEQUENCE, return the first insn
1958 insn
= NEXT_INSN (insn
);
1959 if (insn
&& GET_CODE (insn
) == INSN
1960 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1961 insn
= XVECEXP (PATTERN (insn
), 0, 0);
1967 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1971 previous_insn (insn
)
1976 insn
= PREV_INSN (insn
);
1977 if (insn
&& GET_CODE (insn
) == INSN
1978 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1979 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
1985 /* Return the next insn after INSN that is not a NOTE. This routine does not
1986 look inside SEQUENCEs. */
1989 next_nonnote_insn (insn
)
1994 insn
= NEXT_INSN (insn
);
1995 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2002 /* Return the previous insn before INSN that is not a NOTE. This routine does
2003 not look inside SEQUENCEs. */
2006 prev_nonnote_insn (insn
)
2011 insn
= PREV_INSN (insn
);
2012 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2019 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2020 or 0, if there is none. This routine does not look inside
2024 next_real_insn (insn
)
2029 insn
= NEXT_INSN (insn
);
2030 if (insn
== 0 || GET_CODE (insn
) == INSN
2031 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2038 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2039 or 0, if there is none. This routine does not look inside
2043 prev_real_insn (insn
)
2048 insn
= PREV_INSN (insn
);
2049 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2050 || GET_CODE (insn
) == JUMP_INSN
)
2057 /* Find the next insn after INSN that really does something. This routine
2058 does not look inside SEQUENCEs. Until reload has completed, this is the
2059 same as next_real_insn. */
2062 next_active_insn (insn
)
2067 insn
= NEXT_INSN (insn
);
2069 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2070 || (GET_CODE (insn
) == INSN
2071 && (! reload_completed
2072 || (GET_CODE (PATTERN (insn
)) != USE
2073 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
2080 /* Find the last insn before INSN that really does something. This routine
2081 does not look inside SEQUENCEs. Until reload has completed, this is the
2082 same as prev_real_insn. */
2085 prev_active_insn (insn
)
2090 insn
= PREV_INSN (insn
);
2092 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2093 || (GET_CODE (insn
) == INSN
2094 && (! reload_completed
2095 || (GET_CODE (PATTERN (insn
)) != USE
2096 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
2103 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2111 insn
= NEXT_INSN (insn
);
2112 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2119 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2127 insn
= PREV_INSN (insn
);
2128 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2136 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2137 and REG_CC_USER notes so we can find it. */
2140 link_cc0_insns (insn
)
2143 rtx user
= next_nonnote_insn (insn
);
2145 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2146 user
= XVECEXP (PATTERN (user
), 0, 0);
2148 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
, REG_NOTES (user
));
2149 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2152 /* Return the next insn that uses CC0 after INSN, which is assumed to
2153 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2154 applied to the result of this function should yield INSN).
2156 Normally, this is simply the next insn. However, if a REG_CC_USER note
2157 is present, it contains the insn that uses CC0.
2159 Return 0 if we can't find the insn. */
2162 next_cc0_user (insn
)
2165 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2168 return XEXP (note
, 0);
2170 insn
= next_nonnote_insn (insn
);
2171 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2172 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2174 if (insn
&& GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2175 && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2181 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2182 note, it is the previous insn. */
2185 prev_cc0_setter (insn
)
2188 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2191 return XEXP (note
, 0);
2193 insn
= prev_nonnote_insn (insn
);
2194 if (! sets_cc0_p (PATTERN (insn
)))
2201 /* Try splitting insns that can be split for better scheduling.
2202 PAT is the pattern which might split.
2203 TRIAL is the insn providing PAT.
2204 LAST is non-zero if we should return the last insn of the sequence produced.
2206 If this routine succeeds in splitting, it returns the first or last
2207 replacement insn depending on the value of LAST. Otherwise, it
2208 returns TRIAL. If the insn to be returned can be split, it will be. */
2211 try_split (pat
, trial
, last
)
2215 rtx before
= PREV_INSN (trial
);
2216 rtx after
= NEXT_INSN (trial
);
2217 rtx seq
= split_insns (pat
, trial
);
2218 int has_barrier
= 0;
2221 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2222 We may need to handle this specially. */
2223 if (after
&& GET_CODE (after
) == BARRIER
)
2226 after
= NEXT_INSN (after
);
2231 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2232 The latter case will normally arise only when being done so that
2233 it, in turn, will be split (SFmode on the 29k is an example). */
2234 if (GET_CODE (seq
) == SEQUENCE
)
2236 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2237 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2238 increment the usage count so we don't delete the label. */
2241 if (GET_CODE (trial
) == JUMP_INSN
)
2242 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2243 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2245 JUMP_LABEL (XVECEXP (seq
, 0, i
)) = JUMP_LABEL (trial
);
2247 if (JUMP_LABEL (trial
))
2248 LABEL_NUSES (JUMP_LABEL (trial
))++;
2251 tem
= emit_insn_after (seq
, before
);
2253 delete_insn (trial
);
2255 emit_barrier_after (tem
);
2257 /* Recursively call try_split for each new insn created; by the
2258 time control returns here that insn will be fully split, so
2259 set LAST and continue from the insn after the one returned.
2260 We can't use next_active_insn here since AFTER may be a note.
2261 Ignore deleted insns, which can be occur if not optimizing. */
2262 for (tem
= NEXT_INSN (before
); tem
!= after
;
2263 tem
= NEXT_INSN (tem
))
2264 if (! INSN_DELETED_P (tem
))
2265 tem
= try_split (PATTERN (tem
), tem
, 1);
2267 /* Avoid infinite loop if the result matches the original pattern. */
2268 else if (rtx_equal_p (seq
, pat
))
2272 PATTERN (trial
) = seq
;
2273 INSN_CODE (trial
) = -1;
2274 try_split (seq
, trial
, last
);
2277 /* Return either the first or the last insn, depending on which was
2279 return last
? prev_active_insn (after
) : next_active_insn (before
);
2285 /* Make and return an INSN rtx, initializing all its slots.
2286 Store PATTERN in the pattern slots. */
2289 make_insn_raw (pattern
)
2294 /* If in RTL generation phase, see if FREE_INSN can be used. */
2295 if (free_insn
!= 0 && rtx_equal_function_value_matters
)
2298 free_insn
= NEXT_INSN (free_insn
);
2299 PUT_CODE (insn
, INSN
);
2302 insn
= rtx_alloc (INSN
);
2304 INSN_UID (insn
) = cur_insn_uid
++;
2305 PATTERN (insn
) = pattern
;
2306 INSN_CODE (insn
) = -1;
2307 LOG_LINKS (insn
) = NULL
;
2308 REG_NOTES (insn
) = NULL
;
2313 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2316 make_jump_insn_raw (pattern
)
2321 insn
= rtx_alloc (JUMP_INSN
);
2322 INSN_UID (insn
) = cur_insn_uid
++;
2324 PATTERN (insn
) = pattern
;
2325 INSN_CODE (insn
) = -1;
2326 LOG_LINKS (insn
) = NULL
;
2327 REG_NOTES (insn
) = NULL
;
2328 JUMP_LABEL (insn
) = NULL
;
2333 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2336 make_call_insn_raw (pattern
)
2341 insn
= rtx_alloc (CALL_INSN
);
2342 INSN_UID (insn
) = cur_insn_uid
++;
2344 PATTERN (insn
) = pattern
;
2345 INSN_CODE (insn
) = -1;
2346 LOG_LINKS (insn
) = NULL
;
2347 REG_NOTES (insn
) = NULL
;
2348 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2353 /* Add INSN to the end of the doubly-linked list.
2354 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2360 PREV_INSN (insn
) = last_insn
;
2361 NEXT_INSN (insn
) = 0;
2363 if (NULL
!= last_insn
)
2364 NEXT_INSN (last_insn
) = insn
;
2366 if (NULL
== first_insn
)
2372 /* Add INSN into the doubly-linked list after insn AFTER. This and
2373 the next should be the only functions called to insert an insn once
2374 delay slots have been filled since only they know how to update a
2378 add_insn_after (insn
, after
)
2381 rtx next
= NEXT_INSN (after
);
2383 if (optimize
&& INSN_DELETED_P (after
))
2386 NEXT_INSN (insn
) = next
;
2387 PREV_INSN (insn
) = after
;
2391 PREV_INSN (next
) = insn
;
2392 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2393 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
2395 else if (last_insn
== after
)
2399 struct sequence_stack
*stack
= sequence_stack
;
2400 /* Scan all pending sequences too. */
2401 for (; stack
; stack
= stack
->next
)
2402 if (after
== stack
->last
)
2412 NEXT_INSN (after
) = insn
;
2413 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
2415 rtx sequence
= PATTERN (after
);
2416 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2420 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2421 the previous should be the only functions called to insert an insn once
2422 delay slots have been filled since only they know how to update a
2426 add_insn_before (insn
, before
)
2429 rtx prev
= PREV_INSN (before
);
2431 if (optimize
&& INSN_DELETED_P (before
))
2434 PREV_INSN (insn
) = prev
;
2435 NEXT_INSN (insn
) = before
;
2439 NEXT_INSN (prev
) = insn
;
2440 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2442 rtx sequence
= PATTERN (prev
);
2443 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2446 else if (first_insn
== before
)
2450 struct sequence_stack
*stack
= sequence_stack
;
2451 /* Scan all pending sequences too. */
2452 for (; stack
; stack
= stack
->next
)
2453 if (before
== stack
->first
)
2455 stack
->first
= insn
;
2463 PREV_INSN (before
) = insn
;
2464 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
2465 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
2468 /* Delete all insns made since FROM.
2469 FROM becomes the new last instruction. */
2472 delete_insns_since (from
)
2478 NEXT_INSN (from
) = 0;
2482 /* This function is deprecated, please use sequences instead.
2484 Move a consecutive bunch of insns to a different place in the chain.
2485 The insns to be moved are those between FROM and TO.
2486 They are moved to a new position after the insn AFTER.
2487 AFTER must not be FROM or TO or any insn in between.
2489 This function does not know about SEQUENCEs and hence should not be
2490 called after delay-slot filling has been done. */
2493 reorder_insns (from
, to
, after
)
2494 rtx from
, to
, after
;
2496 /* Splice this bunch out of where it is now. */
2497 if (PREV_INSN (from
))
2498 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
2500 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
2501 if (last_insn
== to
)
2502 last_insn
= PREV_INSN (from
);
2503 if (first_insn
== from
)
2504 first_insn
= NEXT_INSN (to
);
2506 /* Make the new neighbors point to it and it to them. */
2507 if (NEXT_INSN (after
))
2508 PREV_INSN (NEXT_INSN (after
)) = to
;
2510 NEXT_INSN (to
) = NEXT_INSN (after
);
2511 PREV_INSN (from
) = after
;
2512 NEXT_INSN (after
) = from
;
2513 if (after
== last_insn
)
2517 /* Return the line note insn preceding INSN. */
2520 find_line_note (insn
)
2523 if (no_line_numbers
)
2526 for (; insn
; insn
= PREV_INSN (insn
))
2527 if (GET_CODE (insn
) == NOTE
2528 && NOTE_LINE_NUMBER (insn
) >= 0)
2534 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2535 of the moved insns when debugging. This may insert a note between AFTER
2536 and FROM, and another one after TO. */
2539 reorder_insns_with_line_notes (from
, to
, after
)
2540 rtx from
, to
, after
;
2542 rtx from_line
= find_line_note (from
);
2543 rtx after_line
= find_line_note (after
);
2545 reorder_insns (from
, to
, after
);
2547 if (from_line
== after_line
)
2551 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2552 NOTE_LINE_NUMBER (from_line
),
2555 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2556 NOTE_LINE_NUMBER (after_line
),
2560 /* Emit an insn of given code and pattern
2561 at a specified place within the doubly-linked list. */
2563 /* Make an instruction with body PATTERN
2564 and output it before the instruction BEFORE. */
2567 emit_insn_before (pattern
, before
)
2568 register rtx pattern
, before
;
2570 register rtx insn
= before
;
2572 if (GET_CODE (pattern
) == SEQUENCE
)
2576 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2578 insn
= XVECEXP (pattern
, 0, i
);
2579 add_insn_before (insn
, before
);
2581 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2582 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2586 insn
= make_insn_raw (pattern
);
2587 add_insn_before (insn
, before
);
2593 /* Make an instruction with body PATTERN and code JUMP_INSN
2594 and output it before the instruction BEFORE. */
2597 emit_jump_insn_before (pattern
, before
)
2598 register rtx pattern
, before
;
2602 if (GET_CODE (pattern
) == SEQUENCE
)
2603 insn
= emit_insn_before (pattern
, before
);
2606 insn
= make_jump_insn_raw (pattern
);
2607 add_insn_before (insn
, before
);
2613 /* Make an instruction with body PATTERN and code CALL_INSN
2614 and output it before the instruction BEFORE. */
2617 emit_call_insn_before (pattern
, before
)
2618 register rtx pattern
, before
;
2622 if (GET_CODE (pattern
) == SEQUENCE
)
2623 insn
= emit_insn_before (pattern
, before
);
2626 insn
= make_call_insn_raw (pattern
);
2627 add_insn_before (insn
, before
);
2628 PUT_CODE (insn
, CALL_INSN
);
2634 /* Make an insn of code BARRIER
2635 and output it before the insn AFTER. */
2638 emit_barrier_before (before
)
2639 register rtx before
;
2641 register rtx insn
= rtx_alloc (BARRIER
);
2643 INSN_UID (insn
) = cur_insn_uid
++;
2645 add_insn_before (insn
, before
);
2649 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2652 emit_note_before (subtype
, before
)
2656 register rtx note
= rtx_alloc (NOTE
);
2657 INSN_UID (note
) = cur_insn_uid
++;
2658 NOTE_SOURCE_FILE (note
) = 0;
2659 NOTE_LINE_NUMBER (note
) = subtype
;
2661 add_insn_before (note
, before
);
2665 /* Make an insn of code INSN with body PATTERN
2666 and output it after the insn AFTER. */
2669 emit_insn_after (pattern
, after
)
2670 register rtx pattern
, after
;
2672 register rtx insn
= after
;
2674 if (GET_CODE (pattern
) == SEQUENCE
)
2678 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2680 insn
= XVECEXP (pattern
, 0, i
);
2681 add_insn_after (insn
, after
);
2684 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2685 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2689 insn
= make_insn_raw (pattern
);
2690 add_insn_after (insn
, after
);
2696 /* Similar to emit_insn_after, except that line notes are to be inserted so
2697 as to act as if this insn were at FROM. */
2700 emit_insn_after_with_line_notes (pattern
, after
, from
)
2701 rtx pattern
, after
, from
;
2703 rtx from_line
= find_line_note (from
);
2704 rtx after_line
= find_line_note (after
);
2705 rtx insn
= emit_insn_after (pattern
, after
);
2708 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2709 NOTE_LINE_NUMBER (from_line
),
2713 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2714 NOTE_LINE_NUMBER (after_line
),
2718 /* Make an insn of code JUMP_INSN with body PATTERN
2719 and output it after the insn AFTER. */
2722 emit_jump_insn_after (pattern
, after
)
2723 register rtx pattern
, after
;
2727 if (GET_CODE (pattern
) == SEQUENCE
)
2728 insn
= emit_insn_after (pattern
, after
);
2731 insn
= make_jump_insn_raw (pattern
);
2732 add_insn_after (insn
, after
);
2738 /* Make an insn of code BARRIER
2739 and output it after the insn AFTER. */
2742 emit_barrier_after (after
)
2745 register rtx insn
= rtx_alloc (BARRIER
);
2747 INSN_UID (insn
) = cur_insn_uid
++;
2749 add_insn_after (insn
, after
);
2753 /* Emit the label LABEL after the insn AFTER. */
2756 emit_label_after (label
, after
)
2759 /* This can be called twice for the same label
2760 as a result of the confusion that follows a syntax error!
2761 So make it harmless. */
2762 if (INSN_UID (label
) == 0)
2764 INSN_UID (label
) = cur_insn_uid
++;
2765 add_insn_after (label
, after
);
2771 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2774 emit_note_after (subtype
, after
)
2778 register rtx note
= rtx_alloc (NOTE
);
2779 INSN_UID (note
) = cur_insn_uid
++;
2780 NOTE_SOURCE_FILE (note
) = 0;
2781 NOTE_LINE_NUMBER (note
) = subtype
;
2782 add_insn_after (note
, after
);
2786 /* Emit a line note for FILE and LINE after the insn AFTER. */
2789 emit_line_note_after (file
, line
, after
)
2796 if (no_line_numbers
&& line
> 0)
2802 note
= rtx_alloc (NOTE
);
2803 INSN_UID (note
) = cur_insn_uid
++;
2804 NOTE_SOURCE_FILE (note
) = file
;
2805 NOTE_LINE_NUMBER (note
) = line
;
2806 add_insn_after (note
, after
);
2810 /* Make an insn of code INSN with pattern PATTERN
2811 and add it to the end of the doubly-linked list.
2812 If PATTERN is a SEQUENCE, take the elements of it
2813 and emit an insn for each element.
2815 Returns the last insn emitted. */
2821 rtx insn
= last_insn
;
2823 if (GET_CODE (pattern
) == SEQUENCE
)
2827 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2829 insn
= XVECEXP (pattern
, 0, i
);
2832 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2833 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2837 insn
= make_insn_raw (pattern
);
2844 /* Emit the insns in a chain starting with INSN.
2845 Return the last insn emitted. */
2855 rtx next
= NEXT_INSN (insn
);
2864 /* Emit the insns in a chain starting with INSN and place them in front of
2865 the insn BEFORE. Return the last insn emitted. */
2868 emit_insns_before (insn
, before
)
2876 rtx next
= NEXT_INSN (insn
);
2877 add_insn_before (insn
, before
);
2885 /* Emit the insns in a chain starting with FIRST and place them in back of
2886 the insn AFTER. Return the last insn emitted. */
2889 emit_insns_after (first
, after
)
2894 register rtx after_after
;
2902 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
2905 after_after
= NEXT_INSN (after
);
2907 NEXT_INSN (after
) = first
;
2908 PREV_INSN (first
) = after
;
2909 NEXT_INSN (last
) = after_after
;
2911 PREV_INSN (after_after
) = last
;
2913 if (after
== last_insn
)
2918 /* Make an insn of code JUMP_INSN with pattern PATTERN
2919 and add it to the end of the doubly-linked list. */
2922 emit_jump_insn (pattern
)
2925 if (GET_CODE (pattern
) == SEQUENCE
)
2926 return emit_insn (pattern
);
2929 register rtx insn
= make_jump_insn_raw (pattern
);
2935 /* Make an insn of code CALL_INSN with pattern PATTERN
2936 and add it to the end of the doubly-linked list. */
2939 emit_call_insn (pattern
)
2942 if (GET_CODE (pattern
) == SEQUENCE
)
2943 return emit_insn (pattern
);
2946 register rtx insn
= make_call_insn_raw (pattern
);
2948 PUT_CODE (insn
, CALL_INSN
);
2953 /* Add the label LABEL to the end of the doubly-linked list. */
2959 /* This can be called twice for the same label
2960 as a result of the confusion that follows a syntax error!
2961 So make it harmless. */
2962 if (INSN_UID (label
) == 0)
2964 INSN_UID (label
) = cur_insn_uid
++;
2970 /* Make an insn of code BARRIER
2971 and add it to the end of the doubly-linked list. */
2976 register rtx barrier
= rtx_alloc (BARRIER
);
2977 INSN_UID (barrier
) = cur_insn_uid
++;
2982 /* Make an insn of code NOTE
2983 with data-fields specified by FILE and LINE
2984 and add it to the end of the doubly-linked list,
2985 but only if line-numbers are desired for debugging info. */
2988 emit_line_note (file
, line
)
2992 emit_filename
= file
;
2996 if (no_line_numbers
)
3000 return emit_note (file
, line
);
3003 /* Make an insn of code NOTE
3004 with data-fields specified by FILE and LINE
3005 and add it to the end of the doubly-linked list.
3006 If it is a line-number NOTE, omit it if it matches the previous one. */
3009 emit_note (file
, line
)
3017 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
3018 && line
== last_linenum
)
3020 last_filename
= file
;
3021 last_linenum
= line
;
3024 if (no_line_numbers
&& line
> 0)
3030 note
= rtx_alloc (NOTE
);
3031 INSN_UID (note
) = cur_insn_uid
++;
3032 NOTE_SOURCE_FILE (note
) = file
;
3033 NOTE_LINE_NUMBER (note
) = line
;
3038 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
3041 emit_line_note_force (file
, line
)
3046 return emit_line_note (file
, line
);
3049 /* Cause next statement to emit a line note even if the line number
3050 has not changed. This is used at the beginning of a function. */
3053 force_next_line_note ()
3058 /* Return an indication of which type of insn should have X as a body.
3059 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3065 if (GET_CODE (x
) == CODE_LABEL
)
3067 if (GET_CODE (x
) == CALL
)
3069 if (GET_CODE (x
) == RETURN
)
3071 if (GET_CODE (x
) == SET
)
3073 if (SET_DEST (x
) == pc_rtx
)
3075 else if (GET_CODE (SET_SRC (x
)) == CALL
)
3080 if (GET_CODE (x
) == PARALLEL
)
3083 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
3084 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
3086 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3087 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
3089 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3090 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
3096 /* Emit the rtl pattern X as an appropriate kind of insn.
3097 If X is a label, it is simply added into the insn chain. */
3103 enum rtx_code code
= classify_insn (x
);
3105 if (code
== CODE_LABEL
)
3106 return emit_label (x
);
3107 else if (code
== INSN
)
3108 return emit_insn (x
);
3109 else if (code
== JUMP_INSN
)
3111 register rtx insn
= emit_jump_insn (x
);
3112 if (simplejump_p (insn
) || GET_CODE (x
) == RETURN
)
3113 return emit_barrier ();
3116 else if (code
== CALL_INSN
)
3117 return emit_call_insn (x
);
3122 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3127 struct sequence_stack
*tem
;
3129 if (sequence_element_free_list
)
3131 /* Reuse a previously-saved struct sequence_stack. */
3132 tem
= sequence_element_free_list
;
3133 sequence_element_free_list
= tem
->next
;
3136 tem
= (struct sequence_stack
*) permalloc (sizeof (struct sequence_stack
));
3138 tem
->next
= sequence_stack
;
3139 tem
->first
= first_insn
;
3140 tem
->last
= last_insn
;
3141 tem
->sequence_rtl_expr
= sequence_rtl_expr
;
3143 sequence_stack
= tem
;
3149 /* Similarly, but indicate that this sequence will be placed in
3153 start_sequence_for_rtl_expr (t
)
3158 sequence_rtl_expr
= t
;
3161 /* Set up the insn chain starting with FIRST
3162 as the current sequence, saving the previously current one. */
3165 push_to_sequence (first
)
3172 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
3178 /* Set up the outer-level insn chain
3179 as the current sequence, saving the previously current one. */
3182 push_topmost_sequence ()
3184 struct sequence_stack
*stack
, *top
= NULL
;
3188 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
3191 first_insn
= top
->first
;
3192 last_insn
= top
->last
;
3193 sequence_rtl_expr
= top
->sequence_rtl_expr
;
3196 /* After emitting to the outer-level insn chain, update the outer-level
3197 insn chain, and restore the previous saved state. */
3200 pop_topmost_sequence ()
3202 struct sequence_stack
*stack
, *top
= NULL
;
3204 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
3207 top
->first
= first_insn
;
3208 top
->last
= last_insn
;
3209 /* ??? Why don't we save sequence_rtl_expr here? */
3214 /* After emitting to a sequence, restore previous saved state.
3216 To get the contents of the sequence just made,
3217 you must call `gen_sequence' *before* calling here. */
3222 struct sequence_stack
*tem
= sequence_stack
;
3224 first_insn
= tem
->first
;
3225 last_insn
= tem
->last
;
3226 sequence_rtl_expr
= tem
->sequence_rtl_expr
;
3227 sequence_stack
= tem
->next
;
3229 tem
->next
= sequence_element_free_list
;
3230 sequence_element_free_list
= tem
;
3233 /* Return 1 if currently emitting into a sequence. */
3238 return sequence_stack
!= 0;
3241 /* Generate a SEQUENCE rtx containing the insns already emitted
3242 to the current sequence.
3244 This is how the gen_... function from a DEFINE_EXPAND
3245 constructs the SEQUENCE that it returns. */
3255 /* Count the insns in the chain. */
3257 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
3260 /* If only one insn, return its pattern rather than a SEQUENCE.
3261 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3262 the case of an empty list.) */
3264 && ! RTX_FRAME_RELATED_P (first_insn
)
3265 && (GET_CODE (first_insn
) == INSN
3266 || GET_CODE (first_insn
) == JUMP_INSN
3267 /* Don't discard the call usage field. */
3268 || (GET_CODE (first_insn
) == CALL_INSN
3269 && CALL_INSN_FUNCTION_USAGE (first_insn
) == NULL_RTX
)))
3271 NEXT_INSN (first_insn
) = free_insn
;
3272 free_insn
= first_insn
;
3273 return PATTERN (first_insn
);
3276 /* Put them in a vector. See if we already have a SEQUENCE of the
3277 appropriate length around. */
3278 if (len
< SEQUENCE_RESULT_SIZE
&& (result
= sequence_result
[len
]) != 0)
3279 sequence_result
[len
] = 0;
3282 /* Ensure that this rtl goes in saveable_obstack, since we may
3284 push_obstacks_nochange ();
3285 rtl_in_saveable_obstack ();
3286 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
3290 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
3291 XVECEXP (result
, 0, i
) = tem
;
3296 /* Initialize data structures and variables in this file
3297 before generating rtl for each function. */
3306 sequence_rtl_expr
= NULL
;
3308 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
3311 first_label_num
= label_num
;
3313 sequence_stack
= NULL
;
3315 /* Clear the start_sequence/gen_sequence cache. */
3316 sequence_element_free_list
= 0;
3317 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
3318 sequence_result
[i
] = 0;
3321 /* Init the tables that describe all the pseudo regs. */
3323 regno_pointer_flag_length
= LAST_VIRTUAL_REGISTER
+ 101;
3326 = (char *) savealloc (regno_pointer_flag_length
);
3327 bzero (regno_pointer_flag
, regno_pointer_flag_length
);
3330 = (char *) savealloc (regno_pointer_flag_length
);
3331 bzero (regno_pointer_align
, regno_pointer_flag_length
);
3334 = (rtx
*) savealloc (regno_pointer_flag_length
* sizeof (rtx
));
3335 bzero ((char *) regno_reg_rtx
, regno_pointer_flag_length
* sizeof (rtx
));
3337 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3338 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
3339 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
3340 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
3341 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
3343 /* Indicate that the virtual registers and stack locations are
3345 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM
) = 1;
3346 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM
) = 1;
3347 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM
) = 1;
3348 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM
) = 1;
3350 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM
) = 1;
3351 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM
) = 1;
3352 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM
) = 1;
3353 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM
) = 1;
3355 #ifdef STACK_BOUNDARY
3356 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3357 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3358 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
)
3359 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3360 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3362 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
)
3363 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3364 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
)
3365 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3366 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
)
3367 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3368 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
)
3369 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3372 #ifdef INIT_EXPANDERS
3377 /* Create some permanent unique rtl objects shared between all functions.
3378 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3381 init_emit_once (line_numbers
)
3385 enum machine_mode mode
;
3387 no_line_numbers
= ! line_numbers
;
3389 sequence_stack
= NULL
;
3391 /* Compute the word and byte modes. */
3393 byte_mode
= VOIDmode
;
3394 word_mode
= VOIDmode
;
3396 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3397 mode
= GET_MODE_WIDER_MODE (mode
))
3399 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
3400 && byte_mode
== VOIDmode
)
3403 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
3404 && word_mode
== VOIDmode
)
3408 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
3410 /* Create the unique rtx's for certain rtx codes and operand values. */
3412 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
3414 PUT_CODE (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
], CONST_INT
);
3415 PUT_MODE (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
], VOIDmode
);
3416 INTVAL (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
]) = i
;
3419 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
3420 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
3421 const_true_rtx
= &const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
3423 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
3425 dconst0
= REAL_VALUE_ATOF ("0", DFmode
);
3426 dconst1
= REAL_VALUE_ATOF ("1", DFmode
);
3427 dconst2
= REAL_VALUE_ATOF ("2", DFmode
);
3428 dconstm1
= REAL_VALUE_ATOF ("-1", DFmode
);
3430 for (i
= 0; i
<= 2; i
++)
3432 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
3433 mode
= GET_MODE_WIDER_MODE (mode
))
3435 rtx tem
= rtx_alloc (CONST_DOUBLE
);
3436 union real_extract u
;
3438 bzero ((char *) &u
, sizeof u
); /* Zero any holes in a structure. */
3439 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
3441 bcopy ((char *) &u
, (char *) &CONST_DOUBLE_LOW (tem
), sizeof u
);
3442 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
3443 PUT_MODE (tem
, mode
);
3445 const_tiny_rtx
[i
][(int) mode
] = tem
;
3448 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
3450 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3451 mode
= GET_MODE_WIDER_MODE (mode
))
3452 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3454 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
3456 mode
= GET_MODE_WIDER_MODE (mode
))
3457 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3460 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_CC
); mode
!= VOIDmode
;
3461 mode
= GET_MODE_WIDER_MODE (mode
))
3462 const_tiny_rtx
[0][(int) mode
] = const0_rtx
;
3465 /* Assign register numbers to the globally defined register rtx.
3466 This must be done at runtime because the register number field
3467 is in a union and some compilers can't initialize unions. */
3469 REGNO (stack_pointer_rtx
) = STACK_POINTER_REGNUM
;
3470 PUT_MODE (stack_pointer_rtx
, Pmode
);
3471 REGNO (frame_pointer_rtx
) = FRAME_POINTER_REGNUM
;
3472 PUT_MODE (frame_pointer_rtx
, Pmode
);
3473 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3474 REGNO (hard_frame_pointer_rtx
) = HARD_FRAME_POINTER_REGNUM
;
3475 PUT_MODE (hard_frame_pointer_rtx
, Pmode
);
3477 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3478 REGNO (arg_pointer_rtx
) = ARG_POINTER_REGNUM
;
3479 PUT_MODE (arg_pointer_rtx
, Pmode
);
3482 REGNO (virtual_incoming_args_rtx
) = VIRTUAL_INCOMING_ARGS_REGNUM
;
3483 PUT_MODE (virtual_incoming_args_rtx
, Pmode
);
3484 REGNO (virtual_stack_vars_rtx
) = VIRTUAL_STACK_VARS_REGNUM
;
3485 PUT_MODE (virtual_stack_vars_rtx
, Pmode
);
3486 REGNO (virtual_stack_dynamic_rtx
) = VIRTUAL_STACK_DYNAMIC_REGNUM
;
3487 PUT_MODE (virtual_stack_dynamic_rtx
, Pmode
);
3488 REGNO (virtual_outgoing_args_rtx
) = VIRTUAL_OUTGOING_ARGS_REGNUM
;
3489 PUT_MODE (virtual_outgoing_args_rtx
, Pmode
);
3491 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3492 return_address_pointer_rtx
3493 = gen_rtx_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
3497 struct_value_rtx
= STRUCT_VALUE
;
3499 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
3502 #ifdef STRUCT_VALUE_INCOMING
3503 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
3505 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3506 struct_value_incoming_rtx
3507 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
3509 struct_value_incoming_rtx
= struct_value_rtx
;
3513 #ifdef STATIC_CHAIN_REGNUM
3514 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
3516 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3517 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
3518 static_chain_incoming_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
3521 static_chain_incoming_rtx
= static_chain_rtx
;
3525 static_chain_rtx
= STATIC_CHAIN
;
3527 #ifdef STATIC_CHAIN_INCOMING
3528 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
3530 static_chain_incoming_rtx
= static_chain_rtx
;
3534 #ifdef PIC_OFFSET_TABLE_REGNUM
3535 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
3539 /* Query and clear/ restore no_line_numbers. This is used by the
3540 switch / case handling in stmt.c to give proper line numbers in
3541 warnings about unreachable code. */
3544 force_line_numbers ()
3546 int old
= no_line_numbers
;
3548 no_line_numbers
= 0;
3550 force_next_line_note ();
3555 restore_line_number_status (old_value
)
3558 no_line_numbers
= old_value
;