1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num
= 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num
;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num
;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers
;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl
[GR_MAX
];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
108 REAL_VALUE_TYPE dconst0
;
109 REAL_VALUE_TYPE dconst1
;
110 REAL_VALUE_TYPE dconst2
;
111 REAL_VALUE_TYPE dconstm1
;
113 /* All references to the following fixed hard registers go through
114 these unique rtl objects. On machines where the frame-pointer and
115 arg-pointer are the same register, they use the same unique object.
117 After register allocation, other rtl objects which used to be pseudo-regs
118 may be clobbered to refer to the frame-pointer register.
119 But references that were originally to the frame-pointer can be
120 distinguished from the others because they contain frame_pointer_rtx.
122 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
123 tricky: until register elimination has taken place hard_frame_pointer_rtx
124 should be used if it is being set, and frame_pointer_rtx otherwise. After
125 register elimination hard_frame_pointer_rtx should always be used.
126 On machines where the two registers are same (most) then these are the
129 In an inline procedure, the stack and frame pointer rtxs may not be
130 used for anything else. */
131 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
132 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
133 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
134 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
135 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
137 /* This is used to implement __builtin_return_address for some machines.
138 See for instance the MIPS port. */
139 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
141 /* We make one copy of (const_int C) where C is in
142 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
143 to save space during the compilation and simplify comparisons of
146 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
148 /* A hash table storing CONST_INTs whose absolute value is greater
149 than MAX_SAVED_CONST_INT. */
151 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
152 htab_t const_int_htab
;
154 /* A hash table storing memory attribute structures. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
156 htab_t mem_attrs_htab
;
158 /* A hash table storing all CONST_DOUBLEs. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
160 htab_t const_double_htab
;
162 #define first_insn (cfun->emit->x_first_insn)
163 #define last_insn (cfun->emit->x_last_insn)
164 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
165 #define last_linenum (cfun->emit->x_last_linenum)
166 #define last_filename (cfun->emit->x_last_filename)
167 #define first_label_num (cfun->emit->x_first_label_num)
169 static rtx make_jump_insn_raw
PARAMS ((rtx
));
170 static rtx make_call_insn_raw
PARAMS ((rtx
));
171 static rtx find_line_note
PARAMS ((rtx
));
172 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
174 static void unshare_all_rtl_1
PARAMS ((rtx
));
175 static void unshare_all_decls
PARAMS ((tree
));
176 static void reset_used_decls
PARAMS ((tree
));
177 static void mark_label_nuses
PARAMS ((rtx
));
178 static hashval_t const_int_htab_hash
PARAMS ((const void *));
179 static int const_int_htab_eq
PARAMS ((const void *,
181 static hashval_t const_double_htab_hash
PARAMS ((const void *));
182 static int const_double_htab_eq
PARAMS ((const void *,
184 static rtx lookup_const_double
PARAMS ((rtx
));
185 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
186 static int mem_attrs_htab_eq
PARAMS ((const void *,
188 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
191 static tree component_ref_for_mem_expr
PARAMS ((tree
));
192 static rtx gen_const_vector_0
PARAMS ((enum machine_mode
));
194 /* Probability of the conditional branch currently proceeded by try_split.
195 Set to -1 otherwise. */
196 int split_branch_probability
= -1;
198 /* Returns a hash code for X (which is a really a CONST_INT). */
201 const_int_htab_hash (x
)
204 return (hashval_t
) INTVAL ((struct rtx_def
*) x
);
207 /* Returns non-zero if the value represented by X (which is really a
208 CONST_INT) is the same as that given by Y (which is really a
212 const_int_htab_eq (x
, y
)
216 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
219 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
221 const_double_htab_hash (x
)
228 for (i
= 0; i
< sizeof(CONST_DOUBLE_FORMAT
)-1; i
++)
229 h
^= XWINT (value
, i
);
233 /* Returns non-zero if the value represented by X (really a ...)
234 is the same as that represented by Y (really a ...) */
236 const_double_htab_eq (x
, y
)
240 rtx a
= (rtx
)x
, b
= (rtx
)y
;
243 if (GET_MODE (a
) != GET_MODE (b
))
245 for (i
= 0; i
< sizeof(CONST_DOUBLE_FORMAT
)-1; i
++)
246 if (XWINT (a
, i
) != XWINT (b
, i
))
252 /* Returns a hash code for X (which is a really a mem_attrs *). */
255 mem_attrs_htab_hash (x
)
258 mem_attrs
*p
= (mem_attrs
*) x
;
260 return (p
->alias
^ (p
->align
* 1000)
261 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
262 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
266 /* Returns non-zero if the value represented by X (which is really a
267 mem_attrs *) is the same as that given by Y (which is also really a
271 mem_attrs_htab_eq (x
, y
)
275 mem_attrs
*p
= (mem_attrs
*) x
;
276 mem_attrs
*q
= (mem_attrs
*) y
;
278 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
279 && p
->size
== q
->size
&& p
->align
== q
->align
);
282 /* Allocate a new mem_attrs structure and insert it into the hash table if
283 one identical to it is not already in the table. We are doing this for
287 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
293 enum machine_mode mode
;
298 /* If everything is the default, we can just return zero. */
299 if (alias
== 0 && expr
== 0 && offset
== 0
301 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
302 && (align
== BITS_PER_UNIT
304 && mode
!= BLKmode
&& align
== GET_MODE_ALIGNMENT (mode
))))
309 attrs
.offset
= offset
;
313 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
316 *slot
= ggc_alloc (sizeof (mem_attrs
));
317 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
323 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
324 don't attempt to share with the various global pieces of rtl (such as
325 frame_pointer_rtx). */
328 gen_raw_REG (mode
, regno
)
329 enum machine_mode mode
;
332 rtx x
= gen_rtx_raw_REG (mode
, regno
);
333 ORIGINAL_REGNO (x
) = regno
;
337 /* There are some RTL codes that require special attention; the generation
338 functions do the raw handling. If you add to this list, modify
339 special_rtx in gengenrtl.c as well. */
342 gen_rtx_CONST_INT (mode
, arg
)
343 enum machine_mode mode ATTRIBUTE_UNUSED
;
348 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
349 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
351 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
352 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
353 return const_true_rtx
;
356 /* Look up the CONST_INT in the hash table. */
357 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
358 (hashval_t
) arg
, INSERT
);
360 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
366 gen_int_mode (c
, mode
)
368 enum machine_mode mode
;
370 return GEN_INT (trunc_int_for_mode (c
, mode
));
373 /* CONST_DOUBLEs might be created from pairs of integers, or from
374 REAL_VALUE_TYPEs. Also, their length is known only at run time,
375 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
377 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
378 hash table. If so, return its counterpart; otherwise add it
379 to the hash table and return it. */
381 lookup_const_double (real
)
384 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
391 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
392 VALUE in mode MODE. */
394 const_double_from_real_value (value
, mode
)
395 REAL_VALUE_TYPE value
;
396 enum machine_mode mode
;
398 rtx real
= rtx_alloc (CONST_DOUBLE
);
399 PUT_MODE (real
, mode
);
401 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
403 return lookup_const_double (real
);
406 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
407 of ints: I0 is the low-order word and I1 is the high-order word.
408 Do not use this routine for non-integer modes; convert to
409 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
412 immed_double_const (i0
, i1
, mode
)
413 HOST_WIDE_INT i0
, i1
;
414 enum machine_mode mode
;
419 if (mode
!= VOIDmode
)
422 if (GET_MODE_CLASS (mode
) != MODE_INT
423 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
424 /* We can get a 0 for an error mark. */
425 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
426 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
429 /* We clear out all bits that don't belong in MODE, unless they and
430 our sign bit are all one. So we get either a reasonable negative
431 value or a reasonable unsigned value for this mode. */
432 width
= GET_MODE_BITSIZE (mode
);
433 if (width
< HOST_BITS_PER_WIDE_INT
434 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
435 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
436 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
437 else if (width
== HOST_BITS_PER_WIDE_INT
438 && ! (i1
== ~0 && i0
< 0))
440 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
441 /* We cannot represent this value as a constant. */
444 /* If this would be an entire word for the target, but is not for
445 the host, then sign-extend on the host so that the number will
446 look the same way on the host that it would on the target.
448 For example, when building a 64 bit alpha hosted 32 bit sparc
449 targeted compiler, then we want the 32 bit unsigned value -1 to be
450 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
451 The latter confuses the sparc backend. */
453 if (width
< HOST_BITS_PER_WIDE_INT
454 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
455 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
457 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
460 ??? Strictly speaking, this is wrong if we create a CONST_INT for
461 a large unsigned constant with the size of MODE being
462 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
463 in a wider mode. In that case we will mis-interpret it as a
466 Unfortunately, the only alternative is to make a CONST_DOUBLE for
467 any constant in any mode if it is an unsigned constant larger
468 than the maximum signed integer in an int on the host. However,
469 doing this will break everyone that always expects to see a
470 CONST_INT for SImode and smaller.
472 We have always been making CONST_INTs in this case, so nothing
473 new is being broken. */
475 if (width
<= HOST_BITS_PER_WIDE_INT
)
476 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
479 /* If this integer fits in one word, return a CONST_INT. */
480 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
483 /* We use VOIDmode for integers. */
484 value
= rtx_alloc (CONST_DOUBLE
);
485 PUT_MODE (value
, VOIDmode
);
487 CONST_DOUBLE_LOW (value
) = i0
;
488 CONST_DOUBLE_HIGH (value
) = i1
;
490 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
491 XWINT (value
, i
) = 0;
493 return lookup_const_double (value
);
497 gen_rtx_REG (mode
, regno
)
498 enum machine_mode mode
;
501 /* In case the MD file explicitly references the frame pointer, have
502 all such references point to the same frame pointer. This is
503 used during frame pointer elimination to distinguish the explicit
504 references to these registers from pseudos that happened to be
507 If we have eliminated the frame pointer or arg pointer, we will
508 be using it as a normal register, for example as a spill
509 register. In such cases, we might be accessing it in a mode that
510 is not Pmode and therefore cannot use the pre-allocated rtx.
512 Also don't do this when we are making new REGs in reload, since
513 we don't want to get confused with the real pointers. */
515 if (mode
== Pmode
&& !reload_in_progress
)
517 if (regno
== FRAME_POINTER_REGNUM
)
518 return frame_pointer_rtx
;
519 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
520 if (regno
== HARD_FRAME_POINTER_REGNUM
)
521 return hard_frame_pointer_rtx
;
523 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
524 if (regno
== ARG_POINTER_REGNUM
)
525 return arg_pointer_rtx
;
527 #ifdef RETURN_ADDRESS_POINTER_REGNUM
528 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
529 return return_address_pointer_rtx
;
531 if (regno
== PIC_OFFSET_TABLE_REGNUM
532 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
533 return pic_offset_table_rtx
;
534 if (regno
== STACK_POINTER_REGNUM
)
535 return stack_pointer_rtx
;
539 /* If the per-function register table has been set up, try to re-use
540 an existing entry in that table to avoid useless generation of RTL.
542 This code is disabled for now until we can fix the various backends
543 which depend on having non-shared hard registers in some cases. Long
544 term we want to re-enable this code as it can significantly cut down
545 on the amount of useless RTL that gets generated. */
549 && regno
< FIRST_PSEUDO_REGISTER
550 && reg_raw_mode
[regno
] == mode
)
551 return regno_reg_rtx
[regno
];
554 return gen_raw_REG (mode
, regno
);
558 gen_rtx_MEM (mode
, addr
)
559 enum machine_mode mode
;
562 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
564 /* This field is not cleared by the mere allocation of the rtx, so
572 gen_rtx_SUBREG (mode
, reg
, offset
)
573 enum machine_mode mode
;
577 /* This is the most common failure type.
578 Catch it early so we can see who does it. */
579 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
582 /* This check isn't usable right now because combine will
583 throw arbitrary crap like a CALL into a SUBREG in
584 gen_lowpart_for_combine so we must just eat it. */
586 /* Check for this too. */
587 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
590 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
593 /* Generate a SUBREG representing the least-significant part of REG if MODE
594 is smaller than mode of REG, otherwise paradoxical SUBREG. */
597 gen_lowpart_SUBREG (mode
, reg
)
598 enum machine_mode mode
;
601 enum machine_mode inmode
;
603 inmode
= GET_MODE (reg
);
604 if (inmode
== VOIDmode
)
606 return gen_rtx_SUBREG (mode
, reg
,
607 subreg_lowpart_offset (mode
, inmode
));
610 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
612 ** This routine generates an RTX of the size specified by
613 ** <code>, which is an RTX code. The RTX structure is initialized
614 ** from the arguments <element1> through <elementn>, which are
615 ** interpreted according to the specific RTX type's format. The
616 ** special machine mode associated with the rtx (if any) is specified
619 ** gen_rtx can be invoked in a way which resembles the lisp-like
620 ** rtx it will generate. For example, the following rtx structure:
622 ** (plus:QI (mem:QI (reg:SI 1))
623 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
625 ** ...would be generated by the following C code:
627 ** gen_rtx (PLUS, QImode,
628 ** gen_rtx (MEM, QImode,
629 ** gen_rtx (REG, SImode, 1)),
630 ** gen_rtx (MEM, QImode,
631 ** gen_rtx (PLUS, SImode,
632 ** gen_rtx (REG, SImode, 2),
633 ** gen_rtx (REG, SImode, 3)))),
638 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
640 int i
; /* Array indices... */
641 const char *fmt
; /* Current rtx's format... */
642 rtx rt_val
; /* RTX to return to caller... */
645 VA_FIXEDARG (p
, enum rtx_code
, code
);
646 VA_FIXEDARG (p
, enum machine_mode
, mode
);
651 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
656 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
657 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
659 rt_val
= immed_double_const (arg0
, arg1
, mode
);
664 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
668 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
672 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
673 rt_val
->mode
= mode
; /* Store the machine mode... */
675 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
676 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
680 case '0': /* Unused field. */
683 case 'i': /* An integer? */
684 XINT (rt_val
, i
) = va_arg (p
, int);
687 case 'w': /* A wide integer? */
688 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
691 case 's': /* A string? */
692 XSTR (rt_val
, i
) = va_arg (p
, char *);
695 case 'e': /* An expression? */
696 case 'u': /* An insn? Same except when printing. */
697 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
700 case 'E': /* An RTX vector? */
701 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
704 case 'b': /* A bitmap? */
705 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
708 case 't': /* A tree? */
709 XTREE (rt_val
, i
) = va_arg (p
, tree
);
723 /* gen_rtvec (n, [rt1, ..., rtn])
725 ** This routine creates an rtvec and stores within it the
726 ** pointers to rtx's which are its arguments.
731 gen_rtvec
VPARAMS ((int n
, ...))
737 VA_FIXEDARG (p
, int, n
);
740 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
742 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
744 for (i
= 0; i
< n
; i
++)
745 vector
[i
] = va_arg (p
, rtx
);
747 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
751 return gen_rtvec_v (save_n
, vector
);
755 gen_rtvec_v (n
, argp
)
763 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
765 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
767 for (i
= 0; i
< n
; i
++)
768 rt_val
->elem
[i
] = *argp
++;
773 /* Generate a REG rtx for a new pseudo register of mode MODE.
774 This pseudo is assigned the next sequential register number. */
778 enum machine_mode mode
;
780 struct function
*f
= cfun
;
783 /* Don't let anything called after initial flow analysis create new
788 if (generating_concat_p
789 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
790 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
792 /* For complex modes, don't make a single pseudo.
793 Instead, make a CONCAT of two pseudos.
794 This allows noncontiguous allocation of the real and imaginary parts,
795 which makes much better code. Besides, allocating DCmode
796 pseudos overstrains reload on some machines like the 386. */
797 rtx realpart
, imagpart
;
798 int size
= GET_MODE_UNIT_SIZE (mode
);
799 enum machine_mode partmode
800 = mode_for_size (size
* BITS_PER_UNIT
,
801 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
802 ? MODE_FLOAT
: MODE_INT
),
805 realpart
= gen_reg_rtx (partmode
);
806 imagpart
= gen_reg_rtx (partmode
);
807 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
810 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
811 enough to have an element for this pseudo reg number. */
813 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
815 int old_size
= f
->emit
->regno_pointer_align_length
;
820 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
821 memset (new + old_size
, 0, old_size
);
822 f
->emit
->regno_pointer_align
= (unsigned char *) new;
824 new1
= (rtx
*) ggc_realloc (f
->emit
->x_regno_reg_rtx
,
825 old_size
* 2 * sizeof (rtx
));
826 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
827 regno_reg_rtx
= new1
;
829 new2
= (tree
*) ggc_realloc (f
->emit
->regno_decl
,
830 old_size
* 2 * sizeof (tree
));
831 memset (new2
+ old_size
, 0, old_size
* sizeof (tree
));
832 f
->emit
->regno_decl
= new2
;
834 f
->emit
->regno_pointer_align_length
= old_size
* 2;
837 val
= gen_raw_REG (mode
, reg_rtx_no
);
838 regno_reg_rtx
[reg_rtx_no
++] = val
;
842 /* Identify REG (which may be a CONCAT) as a user register. */
848 if (GET_CODE (reg
) == CONCAT
)
850 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
851 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
853 else if (GET_CODE (reg
) == REG
)
854 REG_USERVAR_P (reg
) = 1;
859 /* Identify REG as a probable pointer register and show its alignment
860 as ALIGN, if nonzero. */
863 mark_reg_pointer (reg
, align
)
867 if (! REG_POINTER (reg
))
869 REG_POINTER (reg
) = 1;
872 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
874 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
875 /* We can no-longer be sure just how aligned this pointer is */
876 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
879 /* Return 1 plus largest pseudo reg number used in the current function. */
887 /* Return 1 + the largest label number used so far in the current function. */
892 if (last_label_num
&& label_num
== base_label_num
)
893 return last_label_num
;
897 /* Return first label number used in this function (if any were used). */
900 get_first_label_num ()
902 return first_label_num
;
905 /* Return the final regno of X, which is a SUBREG of a hard
908 subreg_hard_regno (x
, check_mode
)
912 enum machine_mode mode
= GET_MODE (x
);
913 unsigned int byte_offset
, base_regno
, final_regno
;
914 rtx reg
= SUBREG_REG (x
);
916 /* This is where we attempt to catch illegal subregs
917 created by the compiler. */
918 if (GET_CODE (x
) != SUBREG
919 || GET_CODE (reg
) != REG
)
921 base_regno
= REGNO (reg
);
922 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
924 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
927 /* Catch non-congruent offsets too. */
928 byte_offset
= SUBREG_BYTE (x
);
929 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
932 final_regno
= subreg_regno (x
);
937 /* Return a value representing some low-order bits of X, where the number
938 of low-order bits is given by MODE. Note that no conversion is done
939 between floating-point and fixed-point values, rather, the bit
940 representation is returned.
942 This function handles the cases in common between gen_lowpart, below,
943 and two variants in cse.c and combine.c. These are the cases that can
944 be safely handled at all points in the compilation.
946 If this is not a case we can handle, return 0. */
949 gen_lowpart_common (mode
, x
)
950 enum machine_mode mode
;
953 int msize
= GET_MODE_SIZE (mode
);
954 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
957 if (GET_MODE (x
) == mode
)
960 /* MODE must occupy no more words than the mode of X. */
961 if (GET_MODE (x
) != VOIDmode
962 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
963 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
966 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
967 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
968 && GET_MODE (x
) != VOIDmode
&& msize
> xsize
)
971 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
973 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
974 && (GET_MODE_CLASS (mode
) == MODE_INT
975 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
977 /* If we are getting the low-order part of something that has been
978 sign- or zero-extended, we can either just use the object being
979 extended or make a narrower extension. If we want an even smaller
980 piece than the size of the object being extended, call ourselves
983 This case is used mostly by combine and cse. */
985 if (GET_MODE (XEXP (x
, 0)) == mode
)
987 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
988 return gen_lowpart_common (mode
, XEXP (x
, 0));
989 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
990 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
992 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
993 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
)
994 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
995 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
996 from the low-order part of the constant. */
997 else if ((GET_MODE_CLASS (mode
) == MODE_INT
998 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
999 && GET_MODE (x
) == VOIDmode
1000 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
1002 /* If MODE is twice the host word size, X is already the desired
1003 representation. Otherwise, if MODE is wider than a word, we can't
1004 do this. If MODE is exactly a word, return just one CONST_INT. */
1006 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
1008 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
1010 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
1011 return (GET_CODE (x
) == CONST_INT
? x
1012 : GEN_INT (CONST_DOUBLE_LOW (x
)));
1015 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1016 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
1017 : CONST_DOUBLE_LOW (x
));
1019 /* Sign extend to HOST_WIDE_INT. */
1020 val
= trunc_int_for_mode (val
, mode
);
1022 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
1027 /* The floating-point emulator can handle all conversions between
1028 FP and integer operands. This simplifies reload because it
1029 doesn't have to deal with constructs like (subreg:DI
1030 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1031 /* Single-precision floats are always 32-bits and double-precision
1032 floats are always 64-bits. */
1034 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1035 && GET_MODE_BITSIZE (mode
) == 32
1036 && GET_CODE (x
) == CONST_INT
)
1042 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
1043 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1045 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1046 && GET_MODE_BITSIZE (mode
) == 64
1047 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
1048 && GET_MODE (x
) == VOIDmode
)
1052 HOST_WIDE_INT low
, high
;
1054 if (GET_CODE (x
) == CONST_INT
)
1057 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1061 low
= CONST_DOUBLE_LOW (x
);
1062 high
= CONST_DOUBLE_HIGH (x
);
1065 #if HOST_BITS_PER_WIDE_INT == 32
1066 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1068 if (WORDS_BIG_ENDIAN
)
1069 i
[0] = high
, i
[1] = low
;
1071 i
[0] = low
, i
[1] = high
;
1076 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
1077 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1079 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1080 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1081 && GET_CODE (x
) == CONST_DOUBLE
1082 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1085 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1086 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1088 /* Convert 'r' into an array of four 32-bit words in target word
1090 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1091 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1094 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
1097 i
[3 - 3 * endian
] = 0;
1100 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
1101 i
[2 - 2 * endian
] = 0;
1102 i
[3 - 2 * endian
] = 0;
1105 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1106 i
[3 - 3 * endian
] = 0;
1109 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1114 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1116 #if HOST_BITS_PER_WIDE_INT == 32
1117 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
1119 if (HOST_BITS_PER_WIDE_INT
!= 64)
1122 return immed_double_const ((((unsigned long) i
[3 * endian
])
1123 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
1124 (((unsigned long) i
[2 - endian
])
1125 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1130 /* Otherwise, we can't do this. */
1134 /* Return the real part (which has mode MODE) of a complex value X.
1135 This always comes at the low address in memory. */
1138 gen_realpart (mode
, x
)
1139 enum machine_mode mode
;
1142 if (WORDS_BIG_ENDIAN
1143 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1145 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1147 ("can't access real part of complex value in hard register");
1148 else if (WORDS_BIG_ENDIAN
)
1149 return gen_highpart (mode
, x
);
1151 return gen_lowpart (mode
, x
);
1154 /* Return the imaginary part (which has mode MODE) of a complex value X.
1155 This always comes at the high address in memory. */
1158 gen_imagpart (mode
, x
)
1159 enum machine_mode mode
;
1162 if (WORDS_BIG_ENDIAN
)
1163 return gen_lowpart (mode
, x
);
1164 else if (! WORDS_BIG_ENDIAN
1165 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1167 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1169 ("can't access imaginary part of complex value in hard register");
1171 return gen_highpart (mode
, x
);
1174 /* Return 1 iff X, assumed to be a SUBREG,
1175 refers to the real part of the complex value in its containing reg.
1176 Complex values are always stored with the real part in the first word,
1177 regardless of WORDS_BIG_ENDIAN. */
1180 subreg_realpart_p (x
)
1183 if (GET_CODE (x
) != SUBREG
)
1186 return ((unsigned int) SUBREG_BYTE (x
)
1187 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1190 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1191 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1192 least-significant part of X.
1193 MODE specifies how big a part of X to return;
1194 it usually should not be larger than a word.
1195 If X is a MEM whose address is a QUEUED, the value may be so also. */
1198 gen_lowpart (mode
, x
)
1199 enum machine_mode mode
;
1202 rtx result
= gen_lowpart_common (mode
, x
);
1206 else if (GET_CODE (x
) == REG
)
1208 /* Must be a hard reg that's not valid in MODE. */
1209 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1214 else if (GET_CODE (x
) == MEM
)
1216 /* The only additional case we can do is MEM. */
1218 if (WORDS_BIG_ENDIAN
)
1219 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1220 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1222 if (BYTES_BIG_ENDIAN
)
1223 /* Adjust the address so that the address-after-the-data
1225 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1226 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1228 return adjust_address (x
, mode
, offset
);
1230 else if (GET_CODE (x
) == ADDRESSOF
)
1231 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1236 /* Like `gen_lowpart', but refer to the most significant part.
1237 This is used to access the imaginary part of a complex number. */
1240 gen_highpart (mode
, x
)
1241 enum machine_mode mode
;
1244 unsigned int msize
= GET_MODE_SIZE (mode
);
1247 /* This case loses if X is a subreg. To catch bugs early,
1248 complain if an invalid MODE is used even in other cases. */
1249 if (msize
> UNITS_PER_WORD
1250 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1253 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1254 subreg_highpart_offset (mode
, GET_MODE (x
)));
1256 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1257 the target if we have a MEM. gen_highpart must return a valid operand,
1258 emitting code if necessary to do so. */
1259 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1260 result
= validize_mem (result
);
1267 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1268 be VOIDmode constant. */
1270 gen_highpart_mode (outermode
, innermode
, exp
)
1271 enum machine_mode outermode
, innermode
;
1274 if (GET_MODE (exp
) != VOIDmode
)
1276 if (GET_MODE (exp
) != innermode
)
1278 return gen_highpart (outermode
, exp
);
1280 return simplify_gen_subreg (outermode
, exp
, innermode
,
1281 subreg_highpart_offset (outermode
, innermode
));
1284 /* Return offset in bytes to get OUTERMODE low part
1285 of the value in mode INNERMODE stored in memory in target format. */
1288 subreg_lowpart_offset (outermode
, innermode
)
1289 enum machine_mode outermode
, innermode
;
1291 unsigned int offset
= 0;
1292 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1296 if (WORDS_BIG_ENDIAN
)
1297 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1298 if (BYTES_BIG_ENDIAN
)
1299 offset
+= difference
% UNITS_PER_WORD
;
1305 /* Return offset in bytes to get OUTERMODE high part
1306 of the value in mode INNERMODE stored in memory in target format. */
1308 subreg_highpart_offset (outermode
, innermode
)
1309 enum machine_mode outermode
, innermode
;
1311 unsigned int offset
= 0;
1312 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1314 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1319 if (! WORDS_BIG_ENDIAN
)
1320 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1321 if (! BYTES_BIG_ENDIAN
)
1322 offset
+= difference
% UNITS_PER_WORD
;
1328 /* Return 1 iff X, assumed to be a SUBREG,
1329 refers to the least significant part of its containing reg.
1330 If X is not a SUBREG, always return 1 (it is its own low part!). */
1333 subreg_lowpart_p (x
)
1336 if (GET_CODE (x
) != SUBREG
)
1338 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1341 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1342 == SUBREG_BYTE (x
));
1346 /* Helper routine for all the constant cases of operand_subword.
1347 Some places invoke this directly. */
1350 constant_subword (op
, offset
, mode
)
1353 enum machine_mode mode
;
1355 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1358 /* If OP is already an integer word, return it. */
1359 if (GET_MODE_CLASS (mode
) == MODE_INT
1360 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1363 /* The output is some bits, the width of the target machine's word.
1364 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1366 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1367 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1368 && GET_MODE_BITSIZE (mode
) == 64
1369 && GET_CODE (op
) == CONST_DOUBLE
)
1374 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1375 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1377 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1378 which the words are written depends on the word endianness.
1379 ??? This is a potential portability problem and should
1380 be fixed at some point.
1382 We must exercise caution with the sign bit. By definition there
1383 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1384 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1385 So we explicitly mask and sign-extend as necessary. */
1386 if (BITS_PER_WORD
== 32)
1389 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1390 return GEN_INT (val
);
1392 #if HOST_BITS_PER_WIDE_INT >= 64
1393 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1395 val
= k
[! WORDS_BIG_ENDIAN
];
1396 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1397 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1398 return GEN_INT (val
);
1401 else if (BITS_PER_WORD
== 16)
1403 val
= k
[offset
>> 1];
1404 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1406 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1407 return GEN_INT (val
);
1412 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1413 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1414 && GET_MODE_BITSIZE (mode
) > 64
1415 && GET_CODE (op
) == CONST_DOUBLE
)
1420 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1421 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1423 if (BITS_PER_WORD
== 32)
1426 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1427 return GEN_INT (val
);
1429 #if HOST_BITS_PER_WIDE_INT >= 64
1430 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1432 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1433 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1434 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1435 return GEN_INT (val
);
1442 /* Single word float is a little harder, since single- and double-word
1443 values often do not have the same high-order bits. We have already
1444 verified that we want the only defined word of the single-word value. */
1445 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1446 && GET_MODE_BITSIZE (mode
) == 32
1447 && GET_CODE (op
) == CONST_DOUBLE
)
1452 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1453 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1455 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1457 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1459 if (BITS_PER_WORD
== 16)
1461 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1463 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1466 return GEN_INT (val
);
1469 /* The only remaining cases that we can handle are integers.
1470 Convert to proper endianness now since these cases need it.
1471 At this point, offset == 0 means the low-order word.
1473 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1474 in general. However, if OP is (const_int 0), we can just return
1477 if (op
== const0_rtx
)
1480 if (GET_MODE_CLASS (mode
) != MODE_INT
1481 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1482 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1485 if (WORDS_BIG_ENDIAN
)
1486 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1488 /* Find out which word on the host machine this value is in and get
1489 it from the constant. */
1490 val
= (offset
/ size_ratio
== 0
1491 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1492 : (GET_CODE (op
) == CONST_INT
1493 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1495 /* Get the value we want into the low bits of val. */
1496 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1497 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1499 val
= trunc_int_for_mode (val
, word_mode
);
1501 return GEN_INT (val
);
1504 /* Return subword OFFSET of operand OP.
1505 The word number, OFFSET, is interpreted as the word number starting
1506 at the low-order address. OFFSET 0 is the low-order word if not
1507 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1509 If we cannot extract the required word, we return zero. Otherwise,
1510 an rtx corresponding to the requested word will be returned.
1512 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1513 reload has completed, a valid address will always be returned. After
1514 reload, if a valid address cannot be returned, we return zero.
1516 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1517 it is the responsibility of the caller.
1519 MODE is the mode of OP in case it is a CONST_INT.
1521 ??? This is still rather broken for some cases. The problem for the
1522 moment is that all callers of this thing provide no 'goal mode' to
1523 tell us to work with. This exists because all callers were written
1524 in a word based SUBREG world.
1525 Now use of this function can be deprecated by simplify_subreg in most
1530 operand_subword (op
, offset
, validate_address
, mode
)
1532 unsigned int offset
;
1533 int validate_address
;
1534 enum machine_mode mode
;
1536 if (mode
== VOIDmode
)
1537 mode
= GET_MODE (op
);
1539 if (mode
== VOIDmode
)
1542 /* If OP is narrower than a word, fail. */
1544 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1547 /* If we want a word outside OP, return zero. */
1549 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1552 /* Form a new MEM at the requested address. */
1553 if (GET_CODE (op
) == MEM
)
1555 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1557 if (! validate_address
)
1560 else if (reload_completed
)
1562 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1566 return replace_equiv_address (new, XEXP (new, 0));
1569 /* Rest can be handled by simplify_subreg. */
1570 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1573 /* Similar to `operand_subword', but never return 0. If we can't extract
1574 the required subword, put OP into a register and try again. If that fails,
1575 abort. We always validate the address in this case.
1577 MODE is the mode of OP, in case it is CONST_INT. */
1580 operand_subword_force (op
, offset
, mode
)
1582 unsigned int offset
;
1583 enum machine_mode mode
;
1585 rtx result
= operand_subword (op
, offset
, 1, mode
);
1590 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1592 /* If this is a register which can not be accessed by words, copy it
1593 to a pseudo register. */
1594 if (GET_CODE (op
) == REG
)
1595 op
= copy_to_reg (op
);
1597 op
= force_reg (mode
, op
);
1600 result
= operand_subword (op
, offset
, 1, mode
);
1607 /* Given a compare instruction, swap the operands.
1608 A test instruction is changed into a compare of 0 against the operand. */
1611 reverse_comparison (insn
)
1614 rtx body
= PATTERN (insn
);
1617 if (GET_CODE (body
) == SET
)
1618 comp
= SET_SRC (body
);
1620 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1622 if (GET_CODE (comp
) == COMPARE
)
1624 rtx op0
= XEXP (comp
, 0);
1625 rtx op1
= XEXP (comp
, 1);
1626 XEXP (comp
, 0) = op1
;
1627 XEXP (comp
, 1) = op0
;
1631 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1632 CONST0_RTX (GET_MODE (comp
)), comp
);
1633 if (GET_CODE (body
) == SET
)
1634 SET_SRC (body
) = new;
1636 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1640 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1641 or (2) a component ref of something variable. Represent the later with
1642 a NULL expression. */
1645 component_ref_for_mem_expr (ref
)
1648 tree inner
= TREE_OPERAND (ref
, 0);
1650 if (TREE_CODE (inner
) == COMPONENT_REF
)
1651 inner
= component_ref_for_mem_expr (inner
);
1654 tree placeholder_ptr
= 0;
1656 /* Now remove any conversions: they don't change what the underlying
1657 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1658 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1659 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1660 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1661 || TREE_CODE (inner
) == SAVE_EXPR
1662 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1663 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1664 inner
= find_placeholder (inner
, &placeholder_ptr
);
1666 inner
= TREE_OPERAND (inner
, 0);
1668 if (! DECL_P (inner
))
1672 if (inner
== TREE_OPERAND (ref
, 0))
1675 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1676 TREE_OPERAND (ref
, 1));
1679 /* Given REF, a MEM, and T, either the type of X or the expression
1680 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1681 if we are making a new object of this type. BITPOS is nonzero if
1682 there is an offset outstanding on T that will be applied later. */
1685 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, bitpos
)
1689 HOST_WIDE_INT bitpos
;
1691 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1692 tree expr
= MEM_EXPR (ref
);
1693 rtx offset
= MEM_OFFSET (ref
);
1694 rtx size
= MEM_SIZE (ref
);
1695 unsigned int align
= MEM_ALIGN (ref
);
1696 HOST_WIDE_INT apply_bitpos
= 0;
1699 /* It can happen that type_for_mode was given a mode for which there
1700 is no language-level type. In which case it returns NULL, which
1705 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1707 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1708 wrong answer, as it assumes that DECL_RTL already has the right alias
1709 info. Callers should not set DECL_RTL until after the call to
1710 set_mem_attributes. */
1711 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1714 /* Get the alias set from the expression or type (perhaps using a
1715 front-end routine) and use it. */
1716 alias
= get_alias_set (t
);
1718 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1719 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1720 RTX_UNCHANGING_P (ref
)
1721 |= ((lang_hooks
.honor_readonly
1722 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1723 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1725 /* If we are making an object of this type, or if this is a DECL, we know
1726 that it is a scalar if the type is not an aggregate. */
1727 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1728 MEM_SCALAR_P (ref
) = 1;
1730 /* We can set the alignment from the type if we are making an object,
1731 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1732 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1733 align
= MAX (align
, TYPE_ALIGN (type
));
1735 /* If the size is known, we can set that. */
1736 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1737 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1739 /* If T is not a type, we may be able to deduce some more information about
1743 maybe_set_unchanging (ref
, t
);
1744 if (TREE_THIS_VOLATILE (t
))
1745 MEM_VOLATILE_P (ref
) = 1;
1747 /* Now remove any conversions: they don't change what the underlying
1748 object is. Likewise for SAVE_EXPR. */
1749 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1750 || TREE_CODE (t
) == NON_LVALUE_EXPR
1751 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1752 || TREE_CODE (t
) == SAVE_EXPR
)
1753 t
= TREE_OPERAND (t
, 0);
1755 /* If this expression can't be addressed (e.g., it contains a reference
1756 to a non-addressable field), show we don't change its alias set. */
1757 if (! can_address_p (t
))
1758 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1760 /* If this is a decl, set the attributes of the MEM from it. */
1764 offset
= const0_rtx
;
1765 apply_bitpos
= bitpos
;
1766 size
= (DECL_SIZE_UNIT (t
)
1767 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1768 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1769 align
= DECL_ALIGN (t
);
1772 /* If this is a constant, we know the alignment. */
1773 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1775 align
= TYPE_ALIGN (type
);
1776 #ifdef CONSTANT_ALIGNMENT
1777 align
= CONSTANT_ALIGNMENT (t
, align
);
1781 /* If this is a field reference and not a bit-field, record it. */
1782 /* ??? There is some information that can be gleened from bit-fields,
1783 such as the word offset in the structure that might be modified.
1784 But skip it for now. */
1785 else if (TREE_CODE (t
) == COMPONENT_REF
1786 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1788 expr
= component_ref_for_mem_expr (t
);
1789 offset
= const0_rtx
;
1790 apply_bitpos
= bitpos
;
1791 /* ??? Any reason the field size would be different than
1792 the size we got from the type? */
1795 /* If this is an array reference, look for an outer field reference. */
1796 else if (TREE_CODE (t
) == ARRAY_REF
)
1798 tree off_tree
= size_zero_node
;
1803 = fold (build (PLUS_EXPR
, sizetype
,
1804 fold (build (MULT_EXPR
, sizetype
,
1805 TREE_OPERAND (t
, 1),
1806 TYPE_SIZE_UNIT (TREE_TYPE (t
)))),
1808 t
= TREE_OPERAND (t
, 0);
1810 while (TREE_CODE (t
) == ARRAY_REF
);
1816 if (host_integerp (off_tree
, 1))
1818 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1819 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1820 align
= DECL_ALIGN (t
);
1821 if (aoff
&& aoff
< align
)
1823 offset
= GEN_INT (ioff
);
1824 apply_bitpos
= bitpos
;
1827 else if (TREE_CODE (t
) == COMPONENT_REF
)
1829 expr
= component_ref_for_mem_expr (t
);
1830 if (host_integerp (off_tree
, 1))
1832 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1833 apply_bitpos
= bitpos
;
1835 /* ??? Any reason the field size would be different than
1836 the size we got from the type? */
1838 else if (flag_argument_noalias
> 1
1839 && TREE_CODE (t
) == INDIRECT_REF
1840 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1847 /* If this is a Fortran indirect argument reference, record the
1849 else if (flag_argument_noalias
> 1
1850 && TREE_CODE (t
) == INDIRECT_REF
1851 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1858 /* If we modified OFFSET based on T, then subtract the outstanding
1859 bit position offset. */
1861 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1863 /* Now set the attributes we computed above. */
1865 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1867 /* If this is already known to be a scalar or aggregate, we are done. */
1868 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1871 /* If it is a reference into an aggregate, this is part of an aggregate.
1872 Otherwise we don't know. */
1873 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1874 || TREE_CODE (t
) == ARRAY_RANGE_REF
1875 || TREE_CODE (t
) == BIT_FIELD_REF
)
1876 MEM_IN_STRUCT_P (ref
) = 1;
1880 set_mem_attributes (ref
, t
, objectp
)
1885 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1888 /* Set the alias set of MEM to SET. */
1891 set_mem_alias_set (mem
, set
)
1895 #ifdef ENABLE_CHECKING
1896 /* If the new and old alias sets don't conflict, something is wrong. */
1897 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1901 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1902 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1906 /* Set the alignment of MEM to ALIGN bits. */
1909 set_mem_align (mem
, align
)
1913 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1914 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1918 /* Set the expr for MEM to EXPR. */
1921 set_mem_expr (mem
, expr
)
1926 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1927 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1930 /* Set the offset of MEM to OFFSET. */
1933 set_mem_offset (mem
, offset
)
1936 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1937 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1941 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1942 and its address changed to ADDR. (VOIDmode means don't change the mode.
1943 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1944 returned memory location is required to be valid. The memory
1945 attributes are not changed. */
1948 change_address_1 (memref
, mode
, addr
, validate
)
1950 enum machine_mode mode
;
1956 if (GET_CODE (memref
) != MEM
)
1958 if (mode
== VOIDmode
)
1959 mode
= GET_MODE (memref
);
1961 addr
= XEXP (memref
, 0);
1965 if (reload_in_progress
|| reload_completed
)
1967 if (! memory_address_p (mode
, addr
))
1971 addr
= memory_address (mode
, addr
);
1974 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1977 new = gen_rtx_MEM (mode
, addr
);
1978 MEM_COPY_ATTRIBUTES (new, memref
);
1982 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1983 way we are changing MEMREF, so we only preserve the alias set. */
1986 change_address (memref
, mode
, addr
)
1988 enum machine_mode mode
;
1991 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
1992 enum machine_mode mmode
= GET_MODE (new);
1995 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
1996 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
1997 (mmode
== BLKmode
? BITS_PER_UNIT
1998 : GET_MODE_ALIGNMENT (mmode
)),
2004 /* Return a memory reference like MEMREF, but with its mode changed
2005 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2006 nonzero, the memory address is forced to be valid.
2007 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2008 and caller is responsible for adjusting MEMREF base register. */
2011 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
2013 enum machine_mode mode
;
2014 HOST_WIDE_INT offset
;
2015 int validate
, adjust
;
2017 rtx addr
= XEXP (memref
, 0);
2019 rtx memoffset
= MEM_OFFSET (memref
);
2021 unsigned int memalign
= MEM_ALIGN (memref
);
2023 /* ??? Prefer to create garbage instead of creating shared rtl.
2024 This may happen even if offset is non-zero -- consider
2025 (plus (plus reg reg) const_int) -- so do this always. */
2026 addr
= copy_rtx (addr
);
2030 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2031 object, we can merge it into the LO_SUM. */
2032 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2034 && (unsigned HOST_WIDE_INT
) offset
2035 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2036 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
2037 plus_constant (XEXP (addr
, 1), offset
));
2039 addr
= plus_constant (addr
, offset
);
2042 new = change_address_1 (memref
, mode
, addr
, validate
);
2044 /* Compute the new values of the memory attributes due to this adjustment.
2045 We add the offsets and update the alignment. */
2047 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2049 /* Compute the new alignment by taking the MIN of the alignment and the
2050 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2055 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2057 /* We can compute the size in a number of ways. */
2058 if (GET_MODE (new) != BLKmode
)
2059 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2060 else if (MEM_SIZE (memref
))
2061 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2063 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2064 memoffset
, size
, memalign
, GET_MODE (new));
2066 /* At some point, we should validate that this offset is within the object,
2067 if all the appropriate values are known. */
2071 /* Return a memory reference like MEMREF, but with its mode changed
2072 to MODE and its address changed to ADDR, which is assumed to be
2073 MEMREF offseted by OFFSET bytes. If VALIDATE is
2074 nonzero, the memory address is forced to be valid. */
2077 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
2079 enum machine_mode mode
;
2081 HOST_WIDE_INT offset
;
2084 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2085 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2088 /* Return a memory reference like MEMREF, but whose address is changed by
2089 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2090 known to be in OFFSET (possibly 1). */
2093 offset_address (memref
, offset
, pow2
)
2098 rtx
new, addr
= XEXP (memref
, 0);
2100 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2102 /* At this point we don't know _why_ the address is invalid. It
2103 could have secondary memory refereces, multiplies or anything.
2105 However, if we did go and rearrange things, we can wind up not
2106 being able to recognize the magic around pic_offset_table_rtx.
2107 This stuff is fragile, and is yet another example of why it is
2108 bad to expose PIC machinery too early. */
2109 if (! memory_address_p (GET_MODE (memref
), new)
2110 && GET_CODE (addr
) == PLUS
2111 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2113 addr
= force_reg (GET_MODE (addr
), addr
);
2114 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2117 update_temp_slot_address (XEXP (memref
, 0), new);
2118 new = change_address_1 (memref
, VOIDmode
, new, 1);
2120 /* Update the alignment to reflect the offset. Reset the offset, which
2123 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2124 MIN (MEM_ALIGN (memref
),
2125 (unsigned HOST_WIDE_INT
) pow2
* BITS_PER_UNIT
),
2130 /* Return a memory reference like MEMREF, but with its address changed to
2131 ADDR. The caller is asserting that the actual piece of memory pointed
2132 to is the same, just the form of the address is being changed, such as
2133 by putting something into a register. */
2136 replace_equiv_address (memref
, addr
)
2140 /* change_address_1 copies the memory attribute structure without change
2141 and that's exactly what we want here. */
2142 update_temp_slot_address (XEXP (memref
, 0), addr
);
2143 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2146 /* Likewise, but the reference is not required to be valid. */
2149 replace_equiv_address_nv (memref
, addr
)
2153 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2156 /* Return a memory reference like MEMREF, but with its mode widened to
2157 MODE and offset by OFFSET. This would be used by targets that e.g.
2158 cannot issue QImode memory operations and have to use SImode memory
2159 operations plus masking logic. */
2162 widen_memory_access (memref
, mode
, offset
)
2164 enum machine_mode mode
;
2165 HOST_WIDE_INT offset
;
2167 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2168 tree expr
= MEM_EXPR (new);
2169 rtx memoffset
= MEM_OFFSET (new);
2170 unsigned int size
= GET_MODE_SIZE (mode
);
2172 /* If we don't know what offset we were at within the expression, then
2173 we can't know if we've overstepped the bounds. */
2179 if (TREE_CODE (expr
) == COMPONENT_REF
)
2181 tree field
= TREE_OPERAND (expr
, 1);
2183 if (! DECL_SIZE_UNIT (field
))
2189 /* Is the field at least as large as the access? If so, ok,
2190 otherwise strip back to the containing structure. */
2191 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2192 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2193 && INTVAL (memoffset
) >= 0)
2196 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2202 expr
= TREE_OPERAND (expr
, 0);
2203 memoffset
= (GEN_INT (INTVAL (memoffset
)
2204 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2205 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2208 /* Similarly for the decl. */
2209 else if (DECL_P (expr
)
2210 && DECL_SIZE_UNIT (expr
)
2211 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2212 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2213 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2217 /* The widened memory access overflows the expression, which means
2218 that it could alias another expression. Zap it. */
2225 memoffset
= NULL_RTX
;
2227 /* The widened memory may alias other stuff, so zap the alias set. */
2228 /* ??? Maybe use get_alias_set on any remaining expression. */
2230 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2231 MEM_ALIGN (new), mode
);
2236 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2241 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2242 NULL
, label_num
++, NULL
);
2245 /* For procedure integration. */
2247 /* Install new pointers to the first and last insns in the chain.
2248 Also, set cur_insn_uid to one higher than the last in use.
2249 Used for an inline-procedure after copying the insn chain. */
2252 set_new_first_and_last_insn (first
, last
)
2261 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2262 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2267 /* Set the range of label numbers found in the current function.
2268 This is used when belatedly compiling an inline function. */
2271 set_new_first_and_last_label_num (first
, last
)
2274 base_label_num
= label_num
;
2275 first_label_num
= first
;
2276 last_label_num
= last
;
2279 /* Set the last label number found in the current function.
2280 This is used when belatedly compiling an inline function. */
2283 set_new_last_label_num (last
)
2286 base_label_num
= label_num
;
2287 last_label_num
= last
;
2290 /* Restore all variables describing the current status from the structure *P.
2291 This is used after a nested function. */
2294 restore_emit_status (p
)
2295 struct function
*p ATTRIBUTE_UNUSED
;
2300 /* Go through all the RTL insn bodies and copy any invalid shared
2301 structure. This routine should only be called once. */
2304 unshare_all_rtl (fndecl
, insn
)
2310 /* Make sure that virtual parameters are not shared. */
2311 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2312 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2314 /* Make sure that virtual stack slots are not shared. */
2315 unshare_all_decls (DECL_INITIAL (fndecl
));
2317 /* Unshare just about everything else. */
2318 unshare_all_rtl_1 (insn
);
2320 /* Make sure the addresses of stack slots found outside the insn chain
2321 (such as, in DECL_RTL of a variable) are not shared
2322 with the insn chain.
2324 This special care is necessary when the stack slot MEM does not
2325 actually appear in the insn chain. If it does appear, its address
2326 is unshared from all else at that point. */
2327 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2330 /* Go through all the RTL insn bodies and copy any invalid shared
2331 structure, again. This is a fairly expensive thing to do so it
2332 should be done sparingly. */
2335 unshare_all_rtl_again (insn
)
2341 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2344 reset_used_flags (PATTERN (p
));
2345 reset_used_flags (REG_NOTES (p
));
2346 reset_used_flags (LOG_LINKS (p
));
2349 /* Make sure that virtual stack slots are not shared. */
2350 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2352 /* Make sure that virtual parameters are not shared. */
2353 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2354 reset_used_flags (DECL_RTL (decl
));
2356 reset_used_flags (stack_slot_list
);
2358 unshare_all_rtl (cfun
->decl
, insn
);
2361 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2362 Assumes the mark bits are cleared at entry. */
2365 unshare_all_rtl_1 (insn
)
2368 for (; insn
; insn
= NEXT_INSN (insn
))
2371 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2372 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2373 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2377 /* Go through all virtual stack slots of a function and copy any
2378 shared structure. */
2380 unshare_all_decls (blk
)
2385 /* Copy shared decls. */
2386 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2387 if (DECL_RTL_SET_P (t
))
2388 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2390 /* Now process sub-blocks. */
2391 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2392 unshare_all_decls (t
);
2395 /* Go through all virtual stack slots of a function and mark them as
2398 reset_used_decls (blk
)
2404 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2405 if (DECL_RTL_SET_P (t
))
2406 reset_used_flags (DECL_RTL (t
));
2408 /* Now process sub-blocks. */
2409 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2410 reset_used_decls (t
);
2413 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2414 placed in the result directly, rather than being copied. MAY_SHARE is
2415 either a MEM of an EXPR_LIST of MEMs. */
2418 copy_most_rtx (orig
, may_share
)
2425 const char *format_ptr
;
2427 if (orig
== may_share
2428 || (GET_CODE (may_share
) == EXPR_LIST
2429 && in_expr_list_p (may_share
, orig
)))
2432 code
= GET_CODE (orig
);
2450 copy
= rtx_alloc (code
);
2451 PUT_MODE (copy
, GET_MODE (orig
));
2452 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2453 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2454 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2455 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2456 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2458 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2460 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2462 switch (*format_ptr
++)
2465 XEXP (copy
, i
) = XEXP (orig
, i
);
2466 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2467 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2471 XEXP (copy
, i
) = XEXP (orig
, i
);
2476 XVEC (copy
, i
) = XVEC (orig
, i
);
2477 if (XVEC (orig
, i
) != NULL
)
2479 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2480 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2481 XVECEXP (copy
, i
, j
)
2482 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2487 XWINT (copy
, i
) = XWINT (orig
, i
);
2492 XINT (copy
, i
) = XINT (orig
, i
);
2496 XTREE (copy
, i
) = XTREE (orig
, i
);
2501 XSTR (copy
, i
) = XSTR (orig
, i
);
2505 /* Copy this through the wide int field; that's safest. */
2506 X0WINT (copy
, i
) = X0WINT (orig
, i
);
2516 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2517 Recursively does the same for subexpressions. */
2520 copy_rtx_if_shared (orig
)
2526 const char *format_ptr
;
2532 code
= GET_CODE (x
);
2534 /* These types may be freely shared. */
2548 /* SCRATCH must be shared because they represent distinct values. */
2552 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2553 a LABEL_REF, it isn't sharable. */
2554 if (GET_CODE (XEXP (x
, 0)) == PLUS
2555 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2556 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2565 /* The chain of insns is not being copied. */
2569 /* A MEM is allowed to be shared if its address is constant.
2571 We used to allow sharing of MEMs which referenced
2572 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2573 that can lose. instantiate_virtual_regs will not unshare
2574 the MEMs, and combine may change the structure of the address
2575 because it looks safe and profitable in one context, but
2576 in some other context it creates unrecognizable RTL. */
2577 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2586 /* This rtx may not be shared. If it has already been seen,
2587 replace it with a copy of itself. */
2589 if (RTX_FLAG (x
, used
))
2593 copy
= rtx_alloc (code
);
2595 (sizeof (*copy
) - sizeof (copy
->fld
)
2596 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2600 RTX_FLAG (x
, used
) = 1;
2602 /* Now scan the subexpressions recursively.
2603 We can store any replaced subexpressions directly into X
2604 since we know X is not shared! Any vectors in X
2605 must be copied if X was copied. */
2607 format_ptr
= GET_RTX_FORMAT (code
);
2609 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2611 switch (*format_ptr
++)
2614 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2618 if (XVEC (x
, i
) != NULL
)
2621 int len
= XVECLEN (x
, i
);
2623 if (copied
&& len
> 0)
2624 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2625 for (j
= 0; j
< len
; j
++)
2626 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2634 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2635 to look for shared sub-parts. */
2638 reset_used_flags (x
)
2643 const char *format_ptr
;
2648 code
= GET_CODE (x
);
2650 /* These types may be freely shared so we needn't do any resetting
2672 /* The chain of insns is not being copied. */
2679 RTX_FLAG (x
, used
) = 0;
2681 format_ptr
= GET_RTX_FORMAT (code
);
2682 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2684 switch (*format_ptr
++)
2687 reset_used_flags (XEXP (x
, i
));
2691 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2692 reset_used_flags (XVECEXP (x
, i
, j
));
2698 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2699 Return X or the rtx for the pseudo reg the value of X was copied into.
2700 OTHER must be valid as a SET_DEST. */
2703 make_safe_from (x
, other
)
2707 switch (GET_CODE (other
))
2710 other
= SUBREG_REG (other
);
2712 case STRICT_LOW_PART
:
2715 other
= XEXP (other
, 0);
2721 if ((GET_CODE (other
) == MEM
2723 && GET_CODE (x
) != REG
2724 && GET_CODE (x
) != SUBREG
)
2725 || (GET_CODE (other
) == REG
2726 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2727 || reg_mentioned_p (other
, x
))))
2729 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2730 emit_move_insn (temp
, x
);
2736 /* Emission of insns (adding them to the doubly-linked list). */
2738 /* Return the first insn of the current sequence or current function. */
2746 /* Specify a new insn as the first in the chain. */
2749 set_first_insn (insn
)
2752 if (PREV_INSN (insn
) != 0)
2757 /* Return the last insn emitted in current sequence or current function. */
2765 /* Specify a new insn as the last in the chain. */
2768 set_last_insn (insn
)
2771 if (NEXT_INSN (insn
) != 0)
2776 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2779 get_last_insn_anywhere ()
2781 struct sequence_stack
*stack
;
2784 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2785 if (stack
->last
!= 0)
2790 /* Return the first nonnote insn emitted in current sequence or current
2791 function. This routine looks inside SEQUENCEs. */
2794 get_first_nonnote_insn ()
2796 rtx insn
= first_insn
;
2800 insn
= next_insn (insn
);
2801 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2808 /* Return the last nonnote insn emitted in current sequence or current
2809 function. This routine looks inside SEQUENCEs. */
2812 get_last_nonnote_insn ()
2814 rtx insn
= last_insn
;
2818 insn
= previous_insn (insn
);
2819 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2826 /* Return a number larger than any instruction's uid in this function. */
2831 return cur_insn_uid
;
2834 /* Renumber instructions so that no instruction UIDs are wasted. */
2837 renumber_insns (stream
)
2842 /* If we're not supposed to renumber instructions, don't. */
2843 if (!flag_renumber_insns
)
2846 /* If there aren't that many instructions, then it's not really
2847 worth renumbering them. */
2848 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2853 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2856 fprintf (stream
, "Renumbering insn %d to %d\n",
2857 INSN_UID (insn
), cur_insn_uid
);
2858 INSN_UID (insn
) = cur_insn_uid
++;
2862 /* Return the next insn. If it is a SEQUENCE, return the first insn
2871 insn
= NEXT_INSN (insn
);
2872 if (insn
&& GET_CODE (insn
) == INSN
2873 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2874 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2880 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2884 previous_insn (insn
)
2889 insn
= PREV_INSN (insn
);
2890 if (insn
&& GET_CODE (insn
) == INSN
2891 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2892 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2898 /* Return the next insn after INSN that is not a NOTE. This routine does not
2899 look inside SEQUENCEs. */
2902 next_nonnote_insn (insn
)
2907 insn
= NEXT_INSN (insn
);
2908 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2915 /* Return the previous insn before INSN that is not a NOTE. This routine does
2916 not look inside SEQUENCEs. */
2919 prev_nonnote_insn (insn
)
2924 insn
= PREV_INSN (insn
);
2925 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2932 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2933 or 0, if there is none. This routine does not look inside
2937 next_real_insn (insn
)
2942 insn
= NEXT_INSN (insn
);
2943 if (insn
== 0 || GET_CODE (insn
) == INSN
2944 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2951 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2952 or 0, if there is none. This routine does not look inside
2956 prev_real_insn (insn
)
2961 insn
= PREV_INSN (insn
);
2962 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2963 || GET_CODE (insn
) == JUMP_INSN
)
2970 /* Find the next insn after INSN that really does something. This routine
2971 does not look inside SEQUENCEs. Until reload has completed, this is the
2972 same as next_real_insn. */
2975 active_insn_p (insn
)
2978 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2979 || (GET_CODE (insn
) == INSN
2980 && (! reload_completed
2981 || (GET_CODE (PATTERN (insn
)) != USE
2982 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2986 next_active_insn (insn
)
2991 insn
= NEXT_INSN (insn
);
2992 if (insn
== 0 || active_insn_p (insn
))
2999 /* Find the last insn before INSN that really does something. This routine
3000 does not look inside SEQUENCEs. Until reload has completed, this is the
3001 same as prev_real_insn. */
3004 prev_active_insn (insn
)
3009 insn
= PREV_INSN (insn
);
3010 if (insn
== 0 || active_insn_p (insn
))
3017 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3025 insn
= NEXT_INSN (insn
);
3026 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3033 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3041 insn
= PREV_INSN (insn
);
3042 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3050 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3051 and REG_CC_USER notes so we can find it. */
3054 link_cc0_insns (insn
)
3057 rtx user
= next_nonnote_insn (insn
);
3059 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3060 user
= XVECEXP (PATTERN (user
), 0, 0);
3062 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3064 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3067 /* Return the next insn that uses CC0 after INSN, which is assumed to
3068 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3069 applied to the result of this function should yield INSN).
3071 Normally, this is simply the next insn. However, if a REG_CC_USER note
3072 is present, it contains the insn that uses CC0.
3074 Return 0 if we can't find the insn. */
3077 next_cc0_user (insn
)
3080 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3083 return XEXP (note
, 0);
3085 insn
= next_nonnote_insn (insn
);
3086 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3087 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3089 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3095 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3096 note, it is the previous insn. */
3099 prev_cc0_setter (insn
)
3102 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3105 return XEXP (note
, 0);
3107 insn
= prev_nonnote_insn (insn
);
3108 if (! sets_cc0_p (PATTERN (insn
)))
3115 /* Increment the label uses for all labels present in rtx. */
3118 mark_label_nuses (x
)
3125 code
= GET_CODE (x
);
3126 if (code
== LABEL_REF
)
3127 LABEL_NUSES (XEXP (x
, 0))++;
3129 fmt
= GET_RTX_FORMAT (code
);
3130 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3133 mark_label_nuses (XEXP (x
, i
));
3134 else if (fmt
[i
] == 'E')
3135 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3136 mark_label_nuses (XVECEXP (x
, i
, j
));
3141 /* Try splitting insns that can be split for better scheduling.
3142 PAT is the pattern which might split.
3143 TRIAL is the insn providing PAT.
3144 LAST is non-zero if we should return the last insn of the sequence produced.
3146 If this routine succeeds in splitting, it returns the first or last
3147 replacement insn depending on the value of LAST. Otherwise, it
3148 returns TRIAL. If the insn to be returned can be split, it will be. */
3151 try_split (pat
, trial
, last
)
3155 rtx before
= PREV_INSN (trial
);
3156 rtx after
= NEXT_INSN (trial
);
3157 int has_barrier
= 0;
3162 if (any_condjump_p (trial
)
3163 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3164 split_branch_probability
= INTVAL (XEXP (note
, 0));
3165 probability
= split_branch_probability
;
3167 seq
= split_insns (pat
, trial
);
3169 split_branch_probability
= -1;
3171 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3172 We may need to handle this specially. */
3173 if (after
&& GET_CODE (after
) == BARRIER
)
3176 after
= NEXT_INSN (after
);
3181 /* Sometimes there will be only one insn in that list, this case will
3182 normally arise only when we want it in turn to be split (SFmode on
3183 the 29k is an example). */
3184 if (NEXT_INSN (seq
) != NULL_RTX
)
3186 rtx insn_last
, insn
;
3189 /* Avoid infinite loop if any insn of the result matches
3190 the original pattern. */
3194 if (INSN_P (insn_last
)
3195 && rtx_equal_p (PATTERN (insn_last
), pat
))
3197 if (NEXT_INSN (insn_last
) == NULL_RTX
)
3199 insn_last
= NEXT_INSN (insn_last
);
3204 while (insn
!= NULL_RTX
)
3206 if (GET_CODE (insn
) == JUMP_INSN
)
3208 mark_jump_label (PATTERN (insn
), insn
, 0);
3210 if (probability
!= -1
3211 && any_condjump_p (insn
)
3212 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3214 /* We can preserve the REG_BR_PROB notes only if exactly
3215 one jump is created, otherwise the machine description
3216 is responsible for this step using
3217 split_branch_probability variable. */
3221 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3222 GEN_INT (probability
),
3227 insn
= PREV_INSN (insn
);
3230 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3231 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3232 if (GET_CODE (trial
) == CALL_INSN
)
3235 while (insn
!= NULL_RTX
)
3237 if (GET_CODE (insn
) == CALL_INSN
)
3238 CALL_INSN_FUNCTION_USAGE (insn
)
3239 = CALL_INSN_FUNCTION_USAGE (trial
);
3241 insn
= PREV_INSN (insn
);
3245 /* Copy notes, particularly those related to the CFG. */
3246 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3248 switch (REG_NOTE_KIND (note
))
3252 while (insn
!= NULL_RTX
)
3254 if (GET_CODE (insn
) == CALL_INSN
3255 || (flag_non_call_exceptions
3256 && may_trap_p (PATTERN (insn
))))
3258 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3261 insn
= PREV_INSN (insn
);
3267 case REG_ALWAYS_RETURN
:
3269 while (insn
!= NULL_RTX
)
3271 if (GET_CODE (insn
) == CALL_INSN
)
3273 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3276 insn
= PREV_INSN (insn
);
3280 case REG_NON_LOCAL_GOTO
:
3282 while (insn
!= NULL_RTX
)
3284 if (GET_CODE (insn
) == JUMP_INSN
)
3286 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3289 insn
= PREV_INSN (insn
);
3298 /* If there are LABELS inside the split insns increment the
3299 usage count so we don't delete the label. */
3300 if (GET_CODE (trial
) == INSN
)
3303 while (insn
!= NULL_RTX
)
3305 if (GET_CODE (insn
) == INSN
)
3306 mark_label_nuses (PATTERN (insn
));
3308 insn
= PREV_INSN (insn
);
3312 tem
= emit_insn_after_scope (seq
, trial
, INSN_SCOPE (trial
));
3314 delete_insn (trial
);
3316 emit_barrier_after (tem
);
3318 /* Recursively call try_split for each new insn created; by the
3319 time control returns here that insn will be fully split, so
3320 set LAST and continue from the insn after the one returned.
3321 We can't use next_active_insn here since AFTER may be a note.
3322 Ignore deleted insns, which can be occur if not optimizing. */
3323 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3324 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3325 tem
= try_split (PATTERN (tem
), tem
, 1);
3327 /* Avoid infinite loop if the result matches the original pattern. */
3328 else if (rtx_equal_p (PATTERN (seq
), pat
))
3332 PATTERN (trial
) = PATTERN (seq
);
3333 INSN_CODE (trial
) = -1;
3334 try_split (PATTERN (trial
), trial
, last
);
3337 /* Return either the first or the last insn, depending on which was
3340 ? (after
? PREV_INSN (after
) : last_insn
)
3341 : NEXT_INSN (before
);
3347 /* Make and return an INSN rtx, initializing all its slots.
3348 Store PATTERN in the pattern slots. */
3351 make_insn_raw (pattern
)
3356 insn
= rtx_alloc (INSN
);
3358 INSN_UID (insn
) = cur_insn_uid
++;
3359 PATTERN (insn
) = pattern
;
3360 INSN_CODE (insn
) = -1;
3361 LOG_LINKS (insn
) = NULL
;
3362 REG_NOTES (insn
) = NULL
;
3363 INSN_SCOPE (insn
) = NULL
;
3364 BLOCK_FOR_INSN (insn
) = NULL
;
3366 #ifdef ENABLE_RTL_CHECKING
3369 && (returnjump_p (insn
)
3370 || (GET_CODE (insn
) == SET
3371 && SET_DEST (insn
) == pc_rtx
)))
3373 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3381 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3384 make_jump_insn_raw (pattern
)
3389 insn
= rtx_alloc (JUMP_INSN
);
3390 INSN_UID (insn
) = cur_insn_uid
++;
3392 PATTERN (insn
) = pattern
;
3393 INSN_CODE (insn
) = -1;
3394 LOG_LINKS (insn
) = NULL
;
3395 REG_NOTES (insn
) = NULL
;
3396 JUMP_LABEL (insn
) = NULL
;
3397 INSN_SCOPE (insn
) = NULL
;
3398 BLOCK_FOR_INSN (insn
) = NULL
;
3403 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3406 make_call_insn_raw (pattern
)
3411 insn
= rtx_alloc (CALL_INSN
);
3412 INSN_UID (insn
) = cur_insn_uid
++;
3414 PATTERN (insn
) = pattern
;
3415 INSN_CODE (insn
) = -1;
3416 LOG_LINKS (insn
) = NULL
;
3417 REG_NOTES (insn
) = NULL
;
3418 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3419 INSN_SCOPE (insn
) = NULL
;
3420 BLOCK_FOR_INSN (insn
) = NULL
;
3425 /* Add INSN to the end of the doubly-linked list.
3426 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3432 PREV_INSN (insn
) = last_insn
;
3433 NEXT_INSN (insn
) = 0;
3435 if (NULL
!= last_insn
)
3436 NEXT_INSN (last_insn
) = insn
;
3438 if (NULL
== first_insn
)
3444 /* Add INSN into the doubly-linked list after insn AFTER. This and
3445 the next should be the only functions called to insert an insn once
3446 delay slots have been filled since only they know how to update a
3450 add_insn_after (insn
, after
)
3453 rtx next
= NEXT_INSN (after
);
3456 if (optimize
&& INSN_DELETED_P (after
))
3459 NEXT_INSN (insn
) = next
;
3460 PREV_INSN (insn
) = after
;
3464 PREV_INSN (next
) = insn
;
3465 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3466 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3468 else if (last_insn
== after
)
3472 struct sequence_stack
*stack
= seq_stack
;
3473 /* Scan all pending sequences too. */
3474 for (; stack
; stack
= stack
->next
)
3475 if (after
== stack
->last
)
3485 if (GET_CODE (after
) != BARRIER
3486 && GET_CODE (insn
) != BARRIER
3487 && (bb
= BLOCK_FOR_INSN (after
)))
3489 set_block_for_insn (insn
, bb
);
3491 bb
->flags
|= BB_DIRTY
;
3492 /* Should not happen as first in the BB is always
3493 either NOTE or LABEL. */
3494 if (bb
->end
== after
3495 /* Avoid clobbering of structure when creating new BB. */
3496 && GET_CODE (insn
) != BARRIER
3497 && (GET_CODE (insn
) != NOTE
3498 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3502 NEXT_INSN (after
) = insn
;
3503 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3505 rtx sequence
= PATTERN (after
);
3506 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3510 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3511 the previous should be the only functions called to insert an insn once
3512 delay slots have been filled since only they know how to update a
3516 add_insn_before (insn
, before
)
3519 rtx prev
= PREV_INSN (before
);
3522 if (optimize
&& INSN_DELETED_P (before
))
3525 PREV_INSN (insn
) = prev
;
3526 NEXT_INSN (insn
) = before
;
3530 NEXT_INSN (prev
) = insn
;
3531 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3533 rtx sequence
= PATTERN (prev
);
3534 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3537 else if (first_insn
== before
)
3541 struct sequence_stack
*stack
= seq_stack
;
3542 /* Scan all pending sequences too. */
3543 for (; stack
; stack
= stack
->next
)
3544 if (before
== stack
->first
)
3546 stack
->first
= insn
;
3554 if (GET_CODE (before
) != BARRIER
3555 && GET_CODE (insn
) != BARRIER
3556 && (bb
= BLOCK_FOR_INSN (before
)))
3558 set_block_for_insn (insn
, bb
);
3560 bb
->flags
|= BB_DIRTY
;
3561 /* Should not happen as first in the BB is always
3562 either NOTE or LABEl. */
3563 if (bb
->head
== insn
3564 /* Avoid clobbering of structure when creating new BB. */
3565 && GET_CODE (insn
) != BARRIER
3566 && (GET_CODE (insn
) != NOTE
3567 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3571 PREV_INSN (before
) = insn
;
3572 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3573 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3576 /* Remove an insn from its doubly-linked list. This function knows how
3577 to handle sequences. */
3582 rtx next
= NEXT_INSN (insn
);
3583 rtx prev
= PREV_INSN (insn
);
3588 NEXT_INSN (prev
) = next
;
3589 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3591 rtx sequence
= PATTERN (prev
);
3592 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3595 else if (first_insn
== insn
)
3599 struct sequence_stack
*stack
= seq_stack
;
3600 /* Scan all pending sequences too. */
3601 for (; stack
; stack
= stack
->next
)
3602 if (insn
== stack
->first
)
3604 stack
->first
= next
;
3614 PREV_INSN (next
) = prev
;
3615 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3616 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3618 else if (last_insn
== insn
)
3622 struct sequence_stack
*stack
= seq_stack
;
3623 /* Scan all pending sequences too. */
3624 for (; stack
; stack
= stack
->next
)
3625 if (insn
== stack
->last
)
3634 if (GET_CODE (insn
) != BARRIER
3635 && (bb
= BLOCK_FOR_INSN (insn
)))
3638 bb
->flags
|= BB_DIRTY
;
3639 if (bb
->head
== insn
)
3641 /* Never ever delete the basic block note without deleting whole
3643 if (GET_CODE (insn
) == NOTE
)
3647 if (bb
->end
== insn
)
3652 /* Delete all insns made since FROM.
3653 FROM becomes the new last instruction. */
3656 delete_insns_since (from
)
3662 NEXT_INSN (from
) = 0;
3666 /* This function is deprecated, please use sequences instead.
3668 Move a consecutive bunch of insns to a different place in the chain.
3669 The insns to be moved are those between FROM and TO.
3670 They are moved to a new position after the insn AFTER.
3671 AFTER must not be FROM or TO or any insn in between.
3673 This function does not know about SEQUENCEs and hence should not be
3674 called after delay-slot filling has been done. */
3677 reorder_insns_nobb (from
, to
, after
)
3678 rtx from
, to
, after
;
3680 /* Splice this bunch out of where it is now. */
3681 if (PREV_INSN (from
))
3682 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3684 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3685 if (last_insn
== to
)
3686 last_insn
= PREV_INSN (from
);
3687 if (first_insn
== from
)
3688 first_insn
= NEXT_INSN (to
);
3690 /* Make the new neighbors point to it and it to them. */
3691 if (NEXT_INSN (after
))
3692 PREV_INSN (NEXT_INSN (after
)) = to
;
3694 NEXT_INSN (to
) = NEXT_INSN (after
);
3695 PREV_INSN (from
) = after
;
3696 NEXT_INSN (after
) = from
;
3697 if (after
== last_insn
)
3701 /* Same as function above, but take care to update BB boundaries. */
3703 reorder_insns (from
, to
, after
)
3704 rtx from
, to
, after
;
3706 rtx prev
= PREV_INSN (from
);
3707 basic_block bb
, bb2
;
3709 reorder_insns_nobb (from
, to
, after
);
3711 if (GET_CODE (after
) != BARRIER
3712 && (bb
= BLOCK_FOR_INSN (after
)))
3715 bb
->flags
|= BB_DIRTY
;
3717 if (GET_CODE (from
) != BARRIER
3718 && (bb2
= BLOCK_FOR_INSN (from
)))
3722 bb2
->flags
|= BB_DIRTY
;
3725 if (bb
->end
== after
)
3728 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3729 set_block_for_insn (x
, bb
);
3733 /* Return the line note insn preceding INSN. */
3736 find_line_note (insn
)
3739 if (no_line_numbers
)
3742 for (; insn
; insn
= PREV_INSN (insn
))
3743 if (GET_CODE (insn
) == NOTE
3744 && NOTE_LINE_NUMBER (insn
) >= 0)
3750 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3751 of the moved insns when debugging. This may insert a note between AFTER
3752 and FROM, and another one after TO. */
3755 reorder_insns_with_line_notes (from
, to
, after
)
3756 rtx from
, to
, after
;
3758 rtx from_line
= find_line_note (from
);
3759 rtx after_line
= find_line_note (after
);
3761 reorder_insns (from
, to
, after
);
3763 if (from_line
== after_line
)
3767 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3768 NOTE_LINE_NUMBER (from_line
),
3771 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3772 NOTE_LINE_NUMBER (after_line
),
3776 /* Remove unnecessary notes from the instruction stream. */
3779 remove_unnecessary_notes ()
3781 rtx block_stack
= NULL_RTX
;
3782 rtx eh_stack
= NULL_RTX
;
3787 /* We must not remove the first instruction in the function because
3788 the compiler depends on the first instruction being a note. */
3789 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3791 /* Remember what's next. */
3792 next
= NEXT_INSN (insn
);
3794 /* We're only interested in notes. */
3795 if (GET_CODE (insn
) != NOTE
)
3798 switch (NOTE_LINE_NUMBER (insn
))
3800 case NOTE_INSN_DELETED
:
3801 case NOTE_INSN_LOOP_END_TOP_COND
:
3805 case NOTE_INSN_EH_REGION_BEG
:
3806 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3809 case NOTE_INSN_EH_REGION_END
:
3810 /* Too many end notes. */
3811 if (eh_stack
== NULL_RTX
)
3813 /* Mismatched nesting. */
3814 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3817 eh_stack
= XEXP (eh_stack
, 1);
3818 free_INSN_LIST_node (tmp
);
3821 case NOTE_INSN_BLOCK_BEG
:
3822 /* By now, all notes indicating lexical blocks should have
3823 NOTE_BLOCK filled in. */
3824 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3826 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3829 case NOTE_INSN_BLOCK_END
:
3830 /* Too many end notes. */
3831 if (block_stack
== NULL_RTX
)
3833 /* Mismatched nesting. */
3834 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3837 block_stack
= XEXP (block_stack
, 1);
3838 free_INSN_LIST_node (tmp
);
3840 /* Scan back to see if there are any non-note instructions
3841 between INSN and the beginning of this block. If not,
3842 then there is no PC range in the generated code that will
3843 actually be in this block, so there's no point in
3844 remembering the existence of the block. */
3845 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3847 /* This block contains a real instruction. Note that we
3848 don't include labels; if the only thing in the block
3849 is a label, then there are still no PC values that
3850 lie within the block. */
3854 /* We're only interested in NOTEs. */
3855 if (GET_CODE (tmp
) != NOTE
)
3858 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3860 /* We just verified that this BLOCK matches us with
3861 the block_stack check above. Never delete the
3862 BLOCK for the outermost scope of the function; we
3863 can refer to names from that scope even if the
3864 block notes are messed up. */
3865 if (! is_body_block (NOTE_BLOCK (insn
))
3866 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3873 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3874 /* There's a nested block. We need to leave the
3875 current block in place since otherwise the debugger
3876 wouldn't be able to show symbols from our block in
3877 the nested block. */
3883 /* Too many begin notes. */
3884 if (block_stack
|| eh_stack
)
3889 /* Emit insn(s) of given code and pattern
3890 at a specified place within the doubly-linked list.
3892 All of the emit_foo global entry points accept an object
3893 X which is either an insn list or a PATTERN of a single
3896 There are thus a few canonical ways to generate code and
3897 emit it at a specific place in the instruction stream. For
3898 example, consider the instruction named SPOT and the fact that
3899 we would like to emit some instructions before SPOT. We might
3903 ... emit the new instructions ...
3904 insns_head = get_insns ();
3907 emit_insn_before (insns_head, SPOT);
3909 It used to be common to generate SEQUENCE rtl instead, but that
3910 is a relic of the past which no longer occurs. The reason is that
3911 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3912 generated would almost certainly die right after it was created. */
3914 /* Make X be output before the instruction BEFORE. */
3917 emit_insn_before (x
, before
)
3923 #ifdef ENABLE_RTL_CHECKING
3924 if (before
== NULL_RTX
)
3931 switch (GET_CODE (x
))
3942 rtx next
= NEXT_INSN (insn
);
3943 add_insn_before (insn
, before
);
3949 #ifdef ENABLE_RTL_CHECKING
3956 last
= make_insn_raw (x
);
3957 add_insn_before (last
, before
);
3964 /* Make an instruction with body X and code JUMP_INSN
3965 and output it before the instruction BEFORE. */
3968 emit_jump_insn_before (x
, before
)
3973 #ifdef ENABLE_RTL_CHECKING
3974 if (before
== NULL_RTX
)
3978 switch (GET_CODE (x
))
3989 rtx next
= NEXT_INSN (insn
);
3990 add_insn_before (insn
, before
);
3996 #ifdef ENABLE_RTL_CHECKING
4003 last
= make_jump_insn_raw (x
);
4004 add_insn_before (last
, before
);
4011 /* Make an instruction with body X and code CALL_INSN
4012 and output it before the instruction BEFORE. */
4015 emit_call_insn_before (x
, before
)
4020 #ifdef ENABLE_RTL_CHECKING
4021 if (before
== NULL_RTX
)
4025 switch (GET_CODE (x
))
4036 rtx next
= NEXT_INSN (insn
);
4037 add_insn_before (insn
, before
);
4043 #ifdef ENABLE_RTL_CHECKING
4050 last
= make_call_insn_raw (x
);
4051 add_insn_before (last
, before
);
4058 /* Make an insn of code BARRIER
4059 and output it before the insn BEFORE. */
4062 emit_barrier_before (before
)
4065 rtx insn
= rtx_alloc (BARRIER
);
4067 INSN_UID (insn
) = cur_insn_uid
++;
4069 add_insn_before (insn
, before
);
4073 /* Emit the label LABEL before the insn BEFORE. */
4076 emit_label_before (label
, before
)
4079 /* This can be called twice for the same label as a result of the
4080 confusion that follows a syntax error! So make it harmless. */
4081 if (INSN_UID (label
) == 0)
4083 INSN_UID (label
) = cur_insn_uid
++;
4084 add_insn_before (label
, before
);
4090 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4093 emit_note_before (subtype
, before
)
4097 rtx note
= rtx_alloc (NOTE
);
4098 INSN_UID (note
) = cur_insn_uid
++;
4099 NOTE_SOURCE_FILE (note
) = 0;
4100 NOTE_LINE_NUMBER (note
) = subtype
;
4101 BLOCK_FOR_INSN (note
) = NULL
;
4103 add_insn_before (note
, before
);
4107 /* Helper for emit_insn_after, handles lists of instructions
4110 static rtx emit_insn_after_1
PARAMS ((rtx
, rtx
));
4113 emit_insn_after_1 (first
, after
)
4120 if (GET_CODE (after
) != BARRIER
4121 && (bb
= BLOCK_FOR_INSN (after
)))
4123 bb
->flags
|= BB_DIRTY
;
4124 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4125 if (GET_CODE (last
) != BARRIER
)
4126 set_block_for_insn (last
, bb
);
4127 if (GET_CODE (last
) != BARRIER
)
4128 set_block_for_insn (last
, bb
);
4129 if (bb
->end
== after
)
4133 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4136 after_after
= NEXT_INSN (after
);
4138 NEXT_INSN (after
) = first
;
4139 PREV_INSN (first
) = after
;
4140 NEXT_INSN (last
) = after_after
;
4142 PREV_INSN (after_after
) = last
;
4144 if (after
== last_insn
)
4149 /* Make X be output after the insn AFTER. */
4152 emit_insn_after (x
, after
)
4157 #ifdef ENABLE_RTL_CHECKING
4158 if (after
== NULL_RTX
)
4165 switch (GET_CODE (x
))
4173 last
= emit_insn_after_1 (x
, after
);
4176 #ifdef ENABLE_RTL_CHECKING
4183 last
= make_insn_raw (x
);
4184 add_insn_after (last
, after
);
4191 /* Similar to emit_insn_after, except that line notes are to be inserted so
4192 as to act as if this insn were at FROM. */
4195 emit_insn_after_with_line_notes (x
, after
, from
)
4198 rtx from_line
= find_line_note (from
);
4199 rtx after_line
= find_line_note (after
);
4200 rtx insn
= emit_insn_after (x
, after
);
4203 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4204 NOTE_LINE_NUMBER (from_line
),
4208 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4209 NOTE_LINE_NUMBER (after_line
),
4213 /* Make an insn of code JUMP_INSN with body X
4214 and output it after the insn AFTER. */
4217 emit_jump_insn_after (x
, after
)
4222 #ifdef ENABLE_RTL_CHECKING
4223 if (after
== NULL_RTX
)
4227 switch (GET_CODE (x
))
4235 last
= emit_insn_after_1 (x
, after
);
4238 #ifdef ENABLE_RTL_CHECKING
4245 last
= make_jump_insn_raw (x
);
4246 add_insn_after (last
, after
);
4253 /* Make an instruction with body X and code CALL_INSN
4254 and output it after the instruction AFTER. */
4257 emit_call_insn_after (x
, after
)
4262 #ifdef ENABLE_RTL_CHECKING
4263 if (after
== NULL_RTX
)
4267 switch (GET_CODE (x
))
4275 last
= emit_insn_after_1 (x
, after
);
4278 #ifdef ENABLE_RTL_CHECKING
4285 last
= make_call_insn_raw (x
);
4286 add_insn_after (last
, after
);
4293 /* Make an insn of code BARRIER
4294 and output it after the insn AFTER. */
4297 emit_barrier_after (after
)
4300 rtx insn
= rtx_alloc (BARRIER
);
4302 INSN_UID (insn
) = cur_insn_uid
++;
4304 add_insn_after (insn
, after
);
4308 /* Emit the label LABEL after the insn AFTER. */
4311 emit_label_after (label
, after
)
4314 /* This can be called twice for the same label
4315 as a result of the confusion that follows a syntax error!
4316 So make it harmless. */
4317 if (INSN_UID (label
) == 0)
4319 INSN_UID (label
) = cur_insn_uid
++;
4320 add_insn_after (label
, after
);
4326 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4329 emit_note_after (subtype
, after
)
4333 rtx note
= rtx_alloc (NOTE
);
4334 INSN_UID (note
) = cur_insn_uid
++;
4335 NOTE_SOURCE_FILE (note
) = 0;
4336 NOTE_LINE_NUMBER (note
) = subtype
;
4337 BLOCK_FOR_INSN (note
) = NULL
;
4338 add_insn_after (note
, after
);
4342 /* Emit a line note for FILE and LINE after the insn AFTER. */
4345 emit_line_note_after (file
, line
, after
)
4352 if (no_line_numbers
&& line
> 0)
4358 note
= rtx_alloc (NOTE
);
4359 INSN_UID (note
) = cur_insn_uid
++;
4360 NOTE_SOURCE_FILE (note
) = file
;
4361 NOTE_LINE_NUMBER (note
) = line
;
4362 BLOCK_FOR_INSN (note
) = NULL
;
4363 add_insn_after (note
, after
);
4367 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4369 emit_insn_after_scope (pattern
, after
, scope
)
4373 rtx last
= emit_insn_after (pattern
, after
);
4375 after
= NEXT_INSN (after
);
4378 if (active_insn_p (after
))
4379 INSN_SCOPE (after
) = scope
;
4382 after
= NEXT_INSN (after
);
4387 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4389 emit_jump_insn_after_scope (pattern
, after
, scope
)
4393 rtx last
= emit_jump_insn_after (pattern
, after
);
4395 after
= NEXT_INSN (after
);
4398 if (active_insn_p (after
))
4399 INSN_SCOPE (after
) = scope
;
4402 after
= NEXT_INSN (after
);
4407 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4409 emit_call_insn_after_scope (pattern
, after
, scope
)
4413 rtx last
= emit_call_insn_after (pattern
, after
);
4415 after
= NEXT_INSN (after
);
4418 if (active_insn_p (after
))
4419 INSN_SCOPE (after
) = scope
;
4422 after
= NEXT_INSN (after
);
4427 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4429 emit_insn_before_scope (pattern
, before
, scope
)
4430 rtx pattern
, before
;
4433 rtx first
= PREV_INSN (before
);
4434 rtx last
= emit_insn_before (pattern
, before
);
4436 first
= NEXT_INSN (first
);
4439 if (active_insn_p (first
))
4440 INSN_SCOPE (first
) = scope
;
4443 first
= NEXT_INSN (first
);
4448 /* Take X and emit it at the end of the doubly-linked
4451 Returns the last insn emitted. */
4457 rtx last
= last_insn
;
4463 switch (GET_CODE (x
))
4474 rtx next
= NEXT_INSN (insn
);
4481 #ifdef ENABLE_RTL_CHECKING
4488 last
= make_insn_raw (x
);
4496 /* Make an insn of code JUMP_INSN with pattern X
4497 and add it to the end of the doubly-linked list. */
4505 switch (GET_CODE (x
))
4516 rtx next
= NEXT_INSN (insn
);
4523 #ifdef ENABLE_RTL_CHECKING
4530 last
= make_jump_insn_raw (x
);
4538 /* Make an insn of code CALL_INSN with pattern X
4539 and add it to the end of the doubly-linked list. */
4547 switch (GET_CODE (x
))
4555 insn
= emit_insn (x
);
4558 #ifdef ENABLE_RTL_CHECKING
4565 insn
= make_call_insn_raw (x
);
4573 /* Add the label LABEL to the end of the doubly-linked list. */
4579 /* This can be called twice for the same label
4580 as a result of the confusion that follows a syntax error!
4581 So make it harmless. */
4582 if (INSN_UID (label
) == 0)
4584 INSN_UID (label
) = cur_insn_uid
++;
4590 /* Make an insn of code BARRIER
4591 and add it to the end of the doubly-linked list. */
4596 rtx barrier
= rtx_alloc (BARRIER
);
4597 INSN_UID (barrier
) = cur_insn_uid
++;
4602 /* Make an insn of code NOTE
4603 with data-fields specified by FILE and LINE
4604 and add it to the end of the doubly-linked list,
4605 but only if line-numbers are desired for debugging info. */
4608 emit_line_note (file
, line
)
4612 set_file_and_line_for_stmt (file
, line
);
4615 if (no_line_numbers
)
4619 return emit_note (file
, line
);
4622 /* Make an insn of code NOTE
4623 with data-fields specified by FILE and LINE
4624 and add it to the end of the doubly-linked list.
4625 If it is a line-number NOTE, omit it if it matches the previous one. */
4628 emit_note (file
, line
)
4636 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
4637 && line
== last_linenum
)
4639 last_filename
= file
;
4640 last_linenum
= line
;
4643 if (no_line_numbers
&& line
> 0)
4649 note
= rtx_alloc (NOTE
);
4650 INSN_UID (note
) = cur_insn_uid
++;
4651 NOTE_SOURCE_FILE (note
) = file
;
4652 NOTE_LINE_NUMBER (note
) = line
;
4653 BLOCK_FOR_INSN (note
) = NULL
;
4658 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4661 emit_line_note_force (file
, line
)
4666 return emit_line_note (file
, line
);
4669 /* Cause next statement to emit a line note even if the line number
4670 has not changed. This is used at the beginning of a function. */
4673 force_next_line_note ()
4678 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4679 note of this type already exists, remove it first. */
4682 set_unique_reg_note (insn
, kind
, datum
)
4687 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4693 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4694 has multiple sets (some callers assume single_set
4695 means the insn only has one set, when in fact it
4696 means the insn only has one * useful * set). */
4697 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4704 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4705 It serves no useful purpose and breaks eliminate_regs. */
4706 if (GET_CODE (datum
) == ASM_OPERANDS
)
4716 XEXP (note
, 0) = datum
;
4720 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4721 return REG_NOTES (insn
);
4724 /* Return an indication of which type of insn should have X as a body.
4725 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4731 if (GET_CODE (x
) == CODE_LABEL
)
4733 if (GET_CODE (x
) == CALL
)
4735 if (GET_CODE (x
) == RETURN
)
4737 if (GET_CODE (x
) == SET
)
4739 if (SET_DEST (x
) == pc_rtx
)
4741 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4746 if (GET_CODE (x
) == PARALLEL
)
4749 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4750 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4752 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4753 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4755 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4756 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4762 /* Emit the rtl pattern X as an appropriate kind of insn.
4763 If X is a label, it is simply added into the insn chain. */
4769 enum rtx_code code
= classify_insn (x
);
4771 if (code
== CODE_LABEL
)
4772 return emit_label (x
);
4773 else if (code
== INSN
)
4774 return emit_insn (x
);
4775 else if (code
== JUMP_INSN
)
4777 rtx insn
= emit_jump_insn (x
);
4778 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4779 return emit_barrier ();
4782 else if (code
== CALL_INSN
)
4783 return emit_call_insn (x
);
4788 /* Space for free sequence stack entries. */
4789 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4791 /* Begin emitting insns to a sequence which can be packaged in an
4792 RTL_EXPR. If this sequence will contain something that might cause
4793 the compiler to pop arguments to function calls (because those
4794 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4795 details), use do_pending_stack_adjust before calling this function.
4796 That will ensure that the deferred pops are not accidentally
4797 emitted in the middle of this sequence. */
4802 struct sequence_stack
*tem
;
4804 if (free_sequence_stack
!= NULL
)
4806 tem
= free_sequence_stack
;
4807 free_sequence_stack
= tem
->next
;
4810 tem
= (struct sequence_stack
*) ggc_alloc (sizeof (struct sequence_stack
));
4812 tem
->next
= seq_stack
;
4813 tem
->first
= first_insn
;
4814 tem
->last
= last_insn
;
4815 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4823 /* Similarly, but indicate that this sequence will be placed in T, an
4824 RTL_EXPR. See the documentation for start_sequence for more
4825 information about how to use this function. */
4828 start_sequence_for_rtl_expr (t
)
4836 /* Set up the insn chain starting with FIRST as the current sequence,
4837 saving the previously current one. See the documentation for
4838 start_sequence for more information about how to use this function. */
4841 push_to_sequence (first
)
4848 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4854 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4857 push_to_full_sequence (first
, last
)
4863 /* We really should have the end of the insn chain here. */
4864 if (last
&& NEXT_INSN (last
))
4868 /* Set up the outer-level insn chain
4869 as the current sequence, saving the previously current one. */
4872 push_topmost_sequence ()
4874 struct sequence_stack
*stack
, *top
= NULL
;
4878 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4881 first_insn
= top
->first
;
4882 last_insn
= top
->last
;
4883 seq_rtl_expr
= top
->sequence_rtl_expr
;
4886 /* After emitting to the outer-level insn chain, update the outer-level
4887 insn chain, and restore the previous saved state. */
4890 pop_topmost_sequence ()
4892 struct sequence_stack
*stack
, *top
= NULL
;
4894 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4897 top
->first
= first_insn
;
4898 top
->last
= last_insn
;
4899 /* ??? Why don't we save seq_rtl_expr here? */
4904 /* After emitting to a sequence, restore previous saved state.
4906 To get the contents of the sequence just made, you must call
4907 `get_insns' *before* calling here.
4909 If the compiler might have deferred popping arguments while
4910 generating this sequence, and this sequence will not be immediately
4911 inserted into the instruction stream, use do_pending_stack_adjust
4912 before calling get_insns. That will ensure that the deferred
4913 pops are inserted into this sequence, and not into some random
4914 location in the instruction stream. See INHIBIT_DEFER_POP for more
4915 information about deferred popping of arguments. */
4920 struct sequence_stack
*tem
= seq_stack
;
4922 first_insn
= tem
->first
;
4923 last_insn
= tem
->last
;
4924 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4925 seq_stack
= tem
->next
;
4927 memset (tem
, 0, sizeof (*tem
));
4928 tem
->next
= free_sequence_stack
;
4929 free_sequence_stack
= tem
;
4932 /* This works like end_sequence, but records the old sequence in FIRST
4936 end_full_sequence (first
, last
)
4939 *first
= first_insn
;
4944 /* Return 1 if currently emitting into a sequence. */
4949 return seq_stack
!= 0;
4952 /* Put the various virtual registers into REGNO_REG_RTX. */
4955 init_virtual_regs (es
)
4956 struct emit_status
*es
;
4958 rtx
*ptr
= es
->x_regno_reg_rtx
;
4959 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4960 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4961 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4962 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4963 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4967 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4968 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4969 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4970 static int copy_insn_n_scratches
;
4972 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4973 copied an ASM_OPERANDS.
4974 In that case, it is the original input-operand vector. */
4975 static rtvec orig_asm_operands_vector
;
4977 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4978 copied an ASM_OPERANDS.
4979 In that case, it is the copied input-operand vector. */
4980 static rtvec copy_asm_operands_vector
;
4982 /* Likewise for the constraints vector. */
4983 static rtvec orig_asm_constraints_vector
;
4984 static rtvec copy_asm_constraints_vector
;
4986 /* Recursively create a new copy of an rtx for copy_insn.
4987 This function differs from copy_rtx in that it handles SCRATCHes and
4988 ASM_OPERANDs properly.
4989 Normally, this function is not used directly; use copy_insn as front end.
4990 However, you could first copy an insn pattern with copy_insn and then use
4991 this function afterwards to properly copy any REG_NOTEs containing
5001 const char *format_ptr
;
5003 code
= GET_CODE (orig
);
5020 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5021 if (copy_insn_scratch_in
[i
] == orig
)
5022 return copy_insn_scratch_out
[i
];
5026 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5027 a LABEL_REF, it isn't sharable. */
5028 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5029 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5030 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5034 /* A MEM with a constant address is not sharable. The problem is that
5035 the constant address may need to be reloaded. If the mem is shared,
5036 then reloading one copy of this mem will cause all copies to appear
5037 to have been reloaded. */
5043 copy
= rtx_alloc (code
);
5045 /* Copy the various flags, and other information. We assume that
5046 all fields need copying, and then clear the fields that should
5047 not be copied. That is the sensible default behavior, and forces
5048 us to explicitly document why we are *not* copying a flag. */
5049 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
5051 /* We do not copy the USED flag, which is used as a mark bit during
5052 walks over the RTL. */
5053 RTX_FLAG (copy
, used
) = 0;
5055 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5056 if (GET_RTX_CLASS (code
) == 'i')
5058 RTX_FLAG (copy
, jump
) = 0;
5059 RTX_FLAG (copy
, call
) = 0;
5060 RTX_FLAG (copy
, frame_related
) = 0;
5063 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5065 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5067 copy
->fld
[i
] = orig
->fld
[i
];
5068 switch (*format_ptr
++)
5071 if (XEXP (orig
, i
) != NULL
)
5072 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5077 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5078 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5079 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5080 XVEC (copy
, i
) = copy_asm_operands_vector
;
5081 else if (XVEC (orig
, i
) != NULL
)
5083 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5084 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5085 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5096 /* These are left unchanged. */
5104 if (code
== SCRATCH
)
5106 i
= copy_insn_n_scratches
++;
5107 if (i
>= MAX_RECOG_OPERANDS
)
5109 copy_insn_scratch_in
[i
] = orig
;
5110 copy_insn_scratch_out
[i
] = copy
;
5112 else if (code
== ASM_OPERANDS
)
5114 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5115 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5116 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5117 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5123 /* Create a new copy of an rtx.
5124 This function differs from copy_rtx in that it handles SCRATCHes and
5125 ASM_OPERANDs properly.
5126 INSN doesn't really have to be a full INSN; it could be just the
5132 copy_insn_n_scratches
= 0;
5133 orig_asm_operands_vector
= 0;
5134 orig_asm_constraints_vector
= 0;
5135 copy_asm_operands_vector
= 0;
5136 copy_asm_constraints_vector
= 0;
5137 return copy_insn_1 (insn
);
5140 /* Initialize data structures and variables in this file
5141 before generating rtl for each function. */
5146 struct function
*f
= cfun
;
5148 f
->emit
= (struct emit_status
*) ggc_alloc (sizeof (struct emit_status
));
5151 seq_rtl_expr
= NULL
;
5153 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5156 first_label_num
= label_num
;
5160 /* Init the tables that describe all the pseudo regs. */
5162 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5164 f
->emit
->regno_pointer_align
5165 = (unsigned char *) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5166 * sizeof (unsigned char));
5169 = (rtx
*) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5173 = (tree
*) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5176 /* Put copies of all the hard registers into regno_reg_rtx. */
5177 memcpy (regno_reg_rtx
,
5178 static_regno_reg_rtx
,
5179 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5181 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5182 init_virtual_regs (f
->emit
);
5184 /* Indicate that the virtual registers and stack locations are
5186 REG_POINTER (stack_pointer_rtx
) = 1;
5187 REG_POINTER (frame_pointer_rtx
) = 1;
5188 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5189 REG_POINTER (arg_pointer_rtx
) = 1;
5191 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5192 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5193 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5194 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5195 REG_POINTER (virtual_cfa_rtx
) = 1;
5197 #ifdef STACK_BOUNDARY
5198 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5199 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5200 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5201 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5203 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5204 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5205 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5206 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5207 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5210 #ifdef INIT_EXPANDERS
5215 /* Generate the constant 0. */
5218 gen_const_vector_0 (mode
)
5219 enum machine_mode mode
;
5224 enum machine_mode inner
;
5226 units
= GET_MODE_NUNITS (mode
);
5227 inner
= GET_MODE_INNER (mode
);
5229 v
= rtvec_alloc (units
);
5231 /* We need to call this function after we to set CONST0_RTX first. */
5232 if (!CONST0_RTX (inner
))
5235 for (i
= 0; i
< units
; ++i
)
5236 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5238 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5242 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5243 all elements are zero. */
5245 gen_rtx_CONST_VECTOR (mode
, v
)
5246 enum machine_mode mode
;
5249 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5252 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5253 if (RTVEC_ELT (v
, i
) != inner_zero
)
5254 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5255 return CONST0_RTX (mode
);
5258 /* Create some permanent unique rtl objects shared between all functions.
5259 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5262 init_emit_once (line_numbers
)
5266 enum machine_mode mode
;
5267 enum machine_mode double_mode
;
5269 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5271 const_int_htab
= htab_create (37, const_int_htab_hash
,
5272 const_int_htab_eq
, NULL
);
5274 const_double_htab
= htab_create (37, const_double_htab_hash
,
5275 const_double_htab_eq
, NULL
);
5277 mem_attrs_htab
= htab_create (37, mem_attrs_htab_hash
,
5278 mem_attrs_htab_eq
, NULL
);
5280 no_line_numbers
= ! line_numbers
;
5282 /* Compute the word and byte modes. */
5284 byte_mode
= VOIDmode
;
5285 word_mode
= VOIDmode
;
5286 double_mode
= VOIDmode
;
5288 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5289 mode
= GET_MODE_WIDER_MODE (mode
))
5291 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5292 && byte_mode
== VOIDmode
)
5295 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5296 && word_mode
== VOIDmode
)
5300 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5301 mode
= GET_MODE_WIDER_MODE (mode
))
5303 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5304 && double_mode
== VOIDmode
)
5308 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5310 /* Assign register numbers to the globally defined register rtx.
5311 This must be done at runtime because the register number field
5312 is in a union and some compilers can't initialize unions. */
5314 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5315 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5316 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5317 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5318 if (hard_frame_pointer_rtx
== 0)
5319 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5320 HARD_FRAME_POINTER_REGNUM
);
5321 if (arg_pointer_rtx
== 0)
5322 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5323 virtual_incoming_args_rtx
=
5324 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5325 virtual_stack_vars_rtx
=
5326 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5327 virtual_stack_dynamic_rtx
=
5328 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5329 virtual_outgoing_args_rtx
=
5330 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5331 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5333 /* Initialize RTL for commonly used hard registers. These are
5334 copied into regno_reg_rtx as we begin to compile each function. */
5335 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5336 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5338 #ifdef INIT_EXPANDERS
5339 /* This is to initialize {init|mark|free}_machine_status before the first
5340 call to push_function_context_to. This is needed by the Chill front
5341 end which calls push_function_context_to before the first call to
5342 init_function_start. */
5346 /* Create the unique rtx's for certain rtx codes and operand values. */
5348 /* Don't use gen_rtx here since gen_rtx in this case
5349 tries to use these variables. */
5350 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5351 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5352 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5354 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5355 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5356 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5358 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5360 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5361 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5362 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5363 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5365 for (i
= 0; i
<= 2; i
++)
5367 REAL_VALUE_TYPE
*r
=
5368 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5370 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5371 mode
= GET_MODE_WIDER_MODE (mode
))
5372 const_tiny_rtx
[i
][(int) mode
] =
5373 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5375 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5377 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5378 mode
= GET_MODE_WIDER_MODE (mode
))
5379 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5381 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5383 mode
= GET_MODE_WIDER_MODE (mode
))
5384 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5387 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5389 mode
= GET_MODE_WIDER_MODE (mode
))
5390 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5392 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5394 mode
= GET_MODE_WIDER_MODE (mode
))
5395 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5397 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5398 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5399 const_tiny_rtx
[0][i
] = const0_rtx
;
5401 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5402 if (STORE_FLAG_VALUE
== 1)
5403 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5405 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5406 return_address_pointer_rtx
5407 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5411 struct_value_rtx
= STRUCT_VALUE
;
5413 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
5416 #ifdef STRUCT_VALUE_INCOMING
5417 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
5419 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5420 struct_value_incoming_rtx
5421 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
5423 struct_value_incoming_rtx
= struct_value_rtx
;
5427 #ifdef STATIC_CHAIN_REGNUM
5428 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5430 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5431 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5432 static_chain_incoming_rtx
5433 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5436 static_chain_incoming_rtx
= static_chain_rtx
;
5440 static_chain_rtx
= STATIC_CHAIN
;
5442 #ifdef STATIC_CHAIN_INCOMING
5443 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5445 static_chain_incoming_rtx
= static_chain_rtx
;
5449 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5450 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5453 /* Query and clear/ restore no_line_numbers. This is used by the
5454 switch / case handling in stmt.c to give proper line numbers in
5455 warnings about unreachable code. */
5458 force_line_numbers ()
5460 int old
= no_line_numbers
;
5462 no_line_numbers
= 0;
5464 force_next_line_note ();
5469 restore_line_number_status (old_value
)
5472 no_line_numbers
= old_value
;
5475 /* Produce exact duplicate of insn INSN after AFTER.
5476 Care updating of libcall regions if present. */
5479 emit_copy_of_insn_after (insn
, after
)
5483 rtx note1
, note2
, link
;
5485 switch (GET_CODE (insn
))
5488 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5492 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5496 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5497 if (CALL_INSN_FUNCTION_USAGE (insn
))
5498 CALL_INSN_FUNCTION_USAGE (new)
5499 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5500 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5501 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5508 /* Update LABEL_NUSES. */
5509 mark_jump_label (PATTERN (new), new, 0);
5511 INSN_SCOPE (new) = INSN_SCOPE (insn
);
5513 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5515 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5516 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5518 if (GET_CODE (link
) == EXPR_LIST
)
5520 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5525 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5530 /* Fix the libcall sequences. */
5531 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5534 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5536 XEXP (note1
, 0) = p
;
5537 XEXP (note2
, 0) = new;
5542 #include "gt-emit-rtl.h"