Daily bump.
[official-gcc.git] / gcc / final.c
blobbf5771aebfb2aa029a940d60f10075b8f4007bb1
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
47 #include "config.h"
48 #include "system.h"
49 #include "coretypes.h"
50 #include "tm.h"
52 #include "tree.h"
53 #include "rtl.h"
54 #include "tm_p.h"
55 #include "regs.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
58 #include "recog.h"
59 #include "conditions.h"
60 #include "flags.h"
61 #include "real.h"
62 #include "hard-reg-set.h"
63 #include "output.h"
64 #include "except.h"
65 #include "function.h"
66 #include "toplev.h"
67 #include "reload.h"
68 #include "intl.h"
69 #include "basic-block.h"
70 #include "target.h"
71 #include "debug.h"
72 #include "expr.h"
73 #include "cfglayout.h"
75 #ifdef XCOFF_DEBUGGING_INFO
76 #include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
78 #endif
80 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81 #include "dwarf2out.h"
82 #endif
84 #ifdef DBX_DEBUGGING_INFO
85 #include "dbxout.h"
86 #endif
88 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90 #ifndef CC_STATUS_INIT
91 #define CC_STATUS_INIT
92 #endif
94 /* How to start an assembler comment. */
95 #ifndef ASM_COMMENT_START
96 #define ASM_COMMENT_START ";#"
97 #endif
99 /* Is the given character a logical line separator for the assembler? */
100 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
101 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
102 #endif
104 #ifndef JUMP_TABLES_IN_TEXT_SECTION
105 #define JUMP_TABLES_IN_TEXT_SECTION 0
106 #endif
108 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109 #define HAVE_READONLY_DATA_SECTION 1
110 #else
111 #define HAVE_READONLY_DATA_SECTION 0
112 #endif
114 /* Bitflags used by final_scan_insn. */
115 #define SEEN_BB 1
116 #define SEEN_NOTE 2
117 #define SEEN_EMITTED 4
119 /* Last insn processed by final_scan_insn. */
120 static rtx debug_insn;
121 rtx current_output_insn;
123 /* Line number of last NOTE. */
124 static int last_linenum;
126 /* Highest line number in current block. */
127 static int high_block_linenum;
129 /* Likewise for function. */
130 static int high_function_linenum;
132 /* Filename of last NOTE. */
133 static const char *last_filename;
135 extern int length_unit_log; /* This is defined in insn-attrtab.c. */
137 /* Nonzero while outputting an `asm' with operands.
138 This means that inconsistencies are the user's fault, so don't abort.
139 The precise value is the insn being output, to pass to error_for_asm. */
140 rtx this_is_asm_operands;
142 /* Number of operands of this insn, for an `asm' with operands. */
143 static unsigned int insn_noperands;
145 /* Compare optimization flag. */
147 static rtx last_ignored_compare = 0;
149 /* Assign a unique number to each insn that is output.
150 This can be used to generate unique local labels. */
152 static int insn_counter = 0;
154 #ifdef HAVE_cc0
155 /* This variable contains machine-dependent flags (defined in tm.h)
156 set and examined by output routines
157 that describe how to interpret the condition codes properly. */
159 CC_STATUS cc_status;
161 /* During output of an insn, this contains a copy of cc_status
162 from before the insn. */
164 CC_STATUS cc_prev_status;
165 #endif
167 /* Indexed by hardware reg number, is 1 if that register is ever
168 used in the current function.
170 In life_analysis, or in stupid_life_analysis, this is set
171 up to record the hard regs used explicitly. Reload adds
172 in the hard regs used for holding pseudo regs. Final uses
173 it to generate the code in the function prologue and epilogue
174 to save and restore registers as needed. */
176 char regs_ever_live[FIRST_PSEUDO_REGISTER];
178 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
179 Unlike regs_ever_live, elements of this array corresponding to
180 eliminable regs like the frame pointer are set if an asm sets them. */
182 char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
184 /* Nonzero means current function must be given a frame pointer.
185 Initialized in function.c to 0. Set only in reload1.c as per
186 the needs of the function. */
188 int frame_pointer_needed;
190 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
192 static int block_depth;
194 /* Nonzero if have enabled APP processing of our assembler output. */
196 static int app_on;
198 /* If we are outputting an insn sequence, this contains the sequence rtx.
199 Zero otherwise. */
201 rtx final_sequence;
203 #ifdef ASSEMBLER_DIALECT
205 /* Number of the assembler dialect to use, starting at 0. */
206 static int dialect_number;
207 #endif
209 #ifdef HAVE_conditional_execution
210 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
211 rtx current_insn_predicate;
212 #endif
214 #ifdef HAVE_ATTR_length
215 static int asm_insn_count (rtx);
216 #endif
217 static void profile_function (FILE *);
218 static void profile_after_prologue (FILE *);
219 static bool notice_source_line (rtx);
220 static rtx walk_alter_subreg (rtx *);
221 static void output_asm_name (void);
222 static void output_alternate_entry_point (FILE *, rtx);
223 static tree get_mem_expr_from_op (rtx, int *);
224 static void output_asm_operand_names (rtx *, int *, int);
225 static void output_operand (rtx, int);
226 #ifdef LEAF_REGISTERS
227 static void leaf_renumber_regs (rtx);
228 #endif
229 #ifdef HAVE_cc0
230 static int alter_cond (rtx);
231 #endif
232 #ifndef ADDR_VEC_ALIGN
233 static int final_addr_vec_align (rtx);
234 #endif
235 #ifdef HAVE_ATTR_length
236 static int align_fuzz (rtx, rtx, int, unsigned);
237 #endif
239 /* Initialize data in final at the beginning of a compilation. */
241 void
242 init_final (const char *filename ATTRIBUTE_UNUSED)
244 app_on = 0;
245 final_sequence = 0;
247 #ifdef ASSEMBLER_DIALECT
248 dialect_number = ASSEMBLER_DIALECT;
249 #endif
252 /* Default target function prologue and epilogue assembler output.
254 If not overridden for epilogue code, then the function body itself
255 contains return instructions wherever needed. */
256 void
257 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
258 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
262 /* Default target hook that outputs nothing to a stream. */
263 void
264 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
268 /* Enable APP processing of subsequent output.
269 Used before the output from an `asm' statement. */
271 void
272 app_enable (void)
274 if (! app_on)
276 fputs (ASM_APP_ON, asm_out_file);
277 app_on = 1;
281 /* Disable APP processing of subsequent output.
282 Called from varasm.c before most kinds of output. */
284 void
285 app_disable (void)
287 if (app_on)
289 fputs (ASM_APP_OFF, asm_out_file);
290 app_on = 0;
294 /* Return the number of slots filled in the current
295 delayed branch sequence (we don't count the insn needing the
296 delay slot). Zero if not in a delayed branch sequence. */
298 #ifdef DELAY_SLOTS
300 dbr_sequence_length (void)
302 if (final_sequence != 0)
303 return XVECLEN (final_sequence, 0) - 1;
304 else
305 return 0;
307 #endif
309 /* The next two pages contain routines used to compute the length of an insn
310 and to shorten branches. */
312 /* Arrays for insn lengths, and addresses. The latter is referenced by
313 `insn_current_length'. */
315 static int *insn_lengths;
317 varray_type insn_addresses_;
319 /* Max uid for which the above arrays are valid. */
320 static int insn_lengths_max_uid;
322 /* Address of insn being processed. Used by `insn_current_length'. */
323 int insn_current_address;
325 /* Address of insn being processed in previous iteration. */
326 int insn_last_address;
328 /* known invariant alignment of insn being processed. */
329 int insn_current_align;
331 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
332 gives the next following alignment insn that increases the known
333 alignment, or NULL_RTX if there is no such insn.
334 For any alignment obtained this way, we can again index uid_align with
335 its uid to obtain the next following align that in turn increases the
336 alignment, till we reach NULL_RTX; the sequence obtained this way
337 for each insn we'll call the alignment chain of this insn in the following
338 comments. */
340 struct label_alignment
342 short alignment;
343 short max_skip;
346 static rtx *uid_align;
347 static int *uid_shuid;
348 static struct label_alignment *label_align;
350 /* Indicate that branch shortening hasn't yet been done. */
352 void
353 init_insn_lengths (void)
355 if (uid_shuid)
357 free (uid_shuid);
358 uid_shuid = 0;
360 if (insn_lengths)
362 free (insn_lengths);
363 insn_lengths = 0;
364 insn_lengths_max_uid = 0;
366 #ifdef HAVE_ATTR_length
367 INSN_ADDRESSES_FREE ();
368 #endif
369 if (uid_align)
371 free (uid_align);
372 uid_align = 0;
376 /* Obtain the current length of an insn. If branch shortening has been done,
377 get its actual length. Otherwise, get its maximum length. */
380 get_attr_length (rtx insn ATTRIBUTE_UNUSED)
382 #ifdef HAVE_ATTR_length
383 rtx body;
384 int i;
385 int length = 0;
387 if (insn_lengths_max_uid > INSN_UID (insn))
388 return insn_lengths[INSN_UID (insn)];
389 else
390 switch (GET_CODE (insn))
392 case NOTE:
393 case BARRIER:
394 case CODE_LABEL:
395 return 0;
397 case CALL_INSN:
398 length = insn_default_length (insn);
399 break;
401 case JUMP_INSN:
402 body = PATTERN (insn);
403 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
405 /* Alignment is machine-dependent and should be handled by
406 ADDR_VEC_ALIGN. */
408 else
409 length = insn_default_length (insn);
410 break;
412 case INSN:
413 body = PATTERN (insn);
414 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
415 return 0;
417 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
418 length = asm_insn_count (body) * insn_default_length (insn);
419 else if (GET_CODE (body) == SEQUENCE)
420 for (i = 0; i < XVECLEN (body, 0); i++)
421 length += get_attr_length (XVECEXP (body, 0, i));
422 else
423 length = insn_default_length (insn);
424 break;
426 default:
427 break;
430 #ifdef ADJUST_INSN_LENGTH
431 ADJUST_INSN_LENGTH (insn, length);
432 #endif
433 return length;
434 #else /* not HAVE_ATTR_length */
435 return 0;
436 #endif /* not HAVE_ATTR_length */
439 /* Code to handle alignment inside shorten_branches. */
441 /* Here is an explanation how the algorithm in align_fuzz can give
442 proper results:
444 Call a sequence of instructions beginning with alignment point X
445 and continuing until the next alignment point `block X'. When `X'
446 is used in an expression, it means the alignment value of the
447 alignment point.
449 Call the distance between the start of the first insn of block X, and
450 the end of the last insn of block X `IX', for the `inner size of X'.
451 This is clearly the sum of the instruction lengths.
453 Likewise with the next alignment-delimited block following X, which we
454 shall call block Y.
456 Call the distance between the start of the first insn of block X, and
457 the start of the first insn of block Y `OX', for the `outer size of X'.
459 The estimated padding is then OX - IX.
461 OX can be safely estimated as
463 if (X >= Y)
464 OX = round_up(IX, Y)
465 else
466 OX = round_up(IX, X) + Y - X
468 Clearly est(IX) >= real(IX), because that only depends on the
469 instruction lengths, and those being overestimated is a given.
471 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
472 we needn't worry about that when thinking about OX.
474 When X >= Y, the alignment provided by Y adds no uncertainty factor
475 for branch ranges starting before X, so we can just round what we have.
476 But when X < Y, we don't know anything about the, so to speak,
477 `middle bits', so we have to assume the worst when aligning up from an
478 address mod X to one mod Y, which is Y - X. */
480 #ifndef LABEL_ALIGN
481 #define LABEL_ALIGN(LABEL) align_labels_log
482 #endif
484 #ifndef LABEL_ALIGN_MAX_SKIP
485 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
486 #endif
488 #ifndef LOOP_ALIGN
489 #define LOOP_ALIGN(LABEL) align_loops_log
490 #endif
492 #ifndef LOOP_ALIGN_MAX_SKIP
493 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
494 #endif
496 #ifndef LABEL_ALIGN_AFTER_BARRIER
497 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
498 #endif
500 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
501 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
502 #endif
504 #ifndef JUMP_ALIGN
505 #define JUMP_ALIGN(LABEL) align_jumps_log
506 #endif
508 #ifndef JUMP_ALIGN_MAX_SKIP
509 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
510 #endif
512 #ifndef ADDR_VEC_ALIGN
513 static int
514 final_addr_vec_align (rtx addr_vec)
516 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
518 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
519 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
520 return exact_log2 (align);
524 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
525 #endif
527 #ifndef INSN_LENGTH_ALIGNMENT
528 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
529 #endif
531 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
533 static int min_labelno, max_labelno;
535 #define LABEL_TO_ALIGNMENT(LABEL) \
536 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
538 #define LABEL_TO_MAX_SKIP(LABEL) \
539 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
541 /* For the benefit of port specific code do this also as a function. */
544 label_to_alignment (rtx label)
546 return LABEL_TO_ALIGNMENT (label);
549 #ifdef HAVE_ATTR_length
550 /* The differences in addresses
551 between a branch and its target might grow or shrink depending on
552 the alignment the start insn of the range (the branch for a forward
553 branch or the label for a backward branch) starts out on; if these
554 differences are used naively, they can even oscillate infinitely.
555 We therefore want to compute a 'worst case' address difference that
556 is independent of the alignment the start insn of the range end
557 up on, and that is at least as large as the actual difference.
558 The function align_fuzz calculates the amount we have to add to the
559 naively computed difference, by traversing the part of the alignment
560 chain of the start insn of the range that is in front of the end insn
561 of the range, and considering for each alignment the maximum amount
562 that it might contribute to a size increase.
564 For casesi tables, we also want to know worst case minimum amounts of
565 address difference, in case a machine description wants to introduce
566 some common offset that is added to all offsets in a table.
567 For this purpose, align_fuzz with a growth argument of 0 computes the
568 appropriate adjustment. */
570 /* Compute the maximum delta by which the difference of the addresses of
571 START and END might grow / shrink due to a different address for start
572 which changes the size of alignment insns between START and END.
573 KNOWN_ALIGN_LOG is the alignment known for START.
574 GROWTH should be ~0 if the objective is to compute potential code size
575 increase, and 0 if the objective is to compute potential shrink.
576 The return value is undefined for any other value of GROWTH. */
578 static int
579 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
581 int uid = INSN_UID (start);
582 rtx align_label;
583 int known_align = 1 << known_align_log;
584 int end_shuid = INSN_SHUID (end);
585 int fuzz = 0;
587 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
589 int align_addr, new_align;
591 uid = INSN_UID (align_label);
592 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
593 if (uid_shuid[uid] > end_shuid)
594 break;
595 known_align_log = LABEL_TO_ALIGNMENT (align_label);
596 new_align = 1 << known_align_log;
597 if (new_align < known_align)
598 continue;
599 fuzz += (-align_addr ^ growth) & (new_align - known_align);
600 known_align = new_align;
602 return fuzz;
605 /* Compute a worst-case reference address of a branch so that it
606 can be safely used in the presence of aligned labels. Since the
607 size of the branch itself is unknown, the size of the branch is
608 not included in the range. I.e. for a forward branch, the reference
609 address is the end address of the branch as known from the previous
610 branch shortening pass, minus a value to account for possible size
611 increase due to alignment. For a backward branch, it is the start
612 address of the branch as known from the current pass, plus a value
613 to account for possible size increase due to alignment.
614 NB.: Therefore, the maximum offset allowed for backward branches needs
615 to exclude the branch size. */
618 insn_current_reference_address (rtx branch)
620 rtx dest, seq;
621 int seq_uid;
623 if (! INSN_ADDRESSES_SET_P ())
624 return 0;
626 seq = NEXT_INSN (PREV_INSN (branch));
627 seq_uid = INSN_UID (seq);
628 if (!JUMP_P (branch))
629 /* This can happen for example on the PA; the objective is to know the
630 offset to address something in front of the start of the function.
631 Thus, we can treat it like a backward branch.
632 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
633 any alignment we'd encounter, so we skip the call to align_fuzz. */
634 return insn_current_address;
635 dest = JUMP_LABEL (branch);
637 /* BRANCH has no proper alignment chain set, so use SEQ.
638 BRANCH also has no INSN_SHUID. */
639 if (INSN_SHUID (seq) < INSN_SHUID (dest))
641 /* Forward branch. */
642 return (insn_last_address + insn_lengths[seq_uid]
643 - align_fuzz (seq, dest, length_unit_log, ~0));
645 else
647 /* Backward branch. */
648 return (insn_current_address
649 + align_fuzz (dest, seq, length_unit_log, ~0));
652 #endif /* HAVE_ATTR_length */
654 void
655 compute_alignments (void)
657 int log, max_skip, max_log;
658 basic_block bb;
660 if (label_align)
662 free (label_align);
663 label_align = 0;
666 max_labelno = max_label_num ();
667 min_labelno = get_first_label_num ();
668 label_align = xcalloc (max_labelno - min_labelno + 1,
669 sizeof (struct label_alignment));
671 /* If not optimizing or optimizing for size, don't assign any alignments. */
672 if (! optimize || optimize_size)
673 return;
675 FOR_EACH_BB (bb)
677 rtx label = BB_HEAD (bb);
678 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
679 edge e;
680 edge_iterator ei;
682 if (!LABEL_P (label)
683 || probably_never_executed_bb_p (bb))
684 continue;
685 max_log = LABEL_ALIGN (label);
686 max_skip = LABEL_ALIGN_MAX_SKIP;
688 FOR_EACH_EDGE (e, ei, bb->preds)
690 if (e->flags & EDGE_FALLTHRU)
691 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
692 else
693 branch_frequency += EDGE_FREQUENCY (e);
696 /* There are two purposes to align block with no fallthru incoming edge:
697 1) to avoid fetch stalls when branch destination is near cache boundary
698 2) to improve cache efficiency in case the previous block is not executed
699 (so it does not need to be in the cache).
701 We to catch first case, we align frequently executed blocks.
702 To catch the second, we align blocks that are executed more frequently
703 than the predecessor and the predecessor is likely to not be executed
704 when function is called. */
706 if (!has_fallthru
707 && (branch_frequency > BB_FREQ_MAX / 10
708 || (bb->frequency > bb->prev_bb->frequency * 10
709 && (bb->prev_bb->frequency
710 <= ENTRY_BLOCK_PTR->frequency / 2))))
712 log = JUMP_ALIGN (label);
713 if (max_log < log)
715 max_log = log;
716 max_skip = JUMP_ALIGN_MAX_SKIP;
719 /* In case block is frequent and reached mostly by non-fallthru edge,
720 align it. It is most likely a first block of loop. */
721 if (has_fallthru
722 && maybe_hot_bb_p (bb)
723 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
724 && branch_frequency > fallthru_frequency * 2)
726 log = LOOP_ALIGN (label);
727 if (max_log < log)
729 max_log = log;
730 max_skip = LOOP_ALIGN_MAX_SKIP;
733 LABEL_TO_ALIGNMENT (label) = max_log;
734 LABEL_TO_MAX_SKIP (label) = max_skip;
738 /* Make a pass over all insns and compute their actual lengths by shortening
739 any branches of variable length if possible. */
741 /* shorten_branches might be called multiple times: for example, the SH
742 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
743 In order to do this, it needs proper length information, which it obtains
744 by calling shorten_branches. This cannot be collapsed with
745 shorten_branches itself into a single pass unless we also want to integrate
746 reorg.c, since the branch splitting exposes new instructions with delay
747 slots. */
749 void
750 shorten_branches (rtx first ATTRIBUTE_UNUSED)
752 rtx insn;
753 int max_uid;
754 int i;
755 int max_log;
756 int max_skip;
757 #ifdef HAVE_ATTR_length
758 #define MAX_CODE_ALIGN 16
759 rtx seq;
760 int something_changed = 1;
761 char *varying_length;
762 rtx body;
763 int uid;
764 rtx align_tab[MAX_CODE_ALIGN];
766 #endif
768 /* Compute maximum UID and allocate label_align / uid_shuid. */
769 max_uid = get_max_uid ();
771 /* Free uid_shuid before reallocating it. */
772 free (uid_shuid);
774 uid_shuid = xmalloc (max_uid * sizeof *uid_shuid);
776 if (max_labelno != max_label_num ())
778 int old = max_labelno;
779 int n_labels;
780 int n_old_labels;
782 max_labelno = max_label_num ();
784 n_labels = max_labelno - min_labelno + 1;
785 n_old_labels = old - min_labelno + 1;
787 label_align = xrealloc (label_align,
788 n_labels * sizeof (struct label_alignment));
790 /* Range of labels grows monotonically in the function. Abort here
791 means that the initialization of array got lost. */
792 gcc_assert (n_old_labels <= n_labels);
794 memset (label_align + n_old_labels, 0,
795 (n_labels - n_old_labels) * sizeof (struct label_alignment));
798 /* Initialize label_align and set up uid_shuid to be strictly
799 monotonically rising with insn order. */
800 /* We use max_log here to keep track of the maximum alignment we want to
801 impose on the next CODE_LABEL (or the current one if we are processing
802 the CODE_LABEL itself). */
804 max_log = 0;
805 max_skip = 0;
807 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
809 int log;
811 INSN_SHUID (insn) = i++;
812 if (INSN_P (insn))
814 /* reorg might make the first insn of a loop being run once only,
815 and delete the label in front of it. Then we want to apply
816 the loop alignment to the new label created by reorg, which
817 is separated by the former loop start insn from the
818 NOTE_INSN_LOOP_BEG. */
820 else if (LABEL_P (insn))
822 rtx next;
824 /* Merge in alignments computed by compute_alignments. */
825 log = LABEL_TO_ALIGNMENT (insn);
826 if (max_log < log)
828 max_log = log;
829 max_skip = LABEL_TO_MAX_SKIP (insn);
832 log = LABEL_ALIGN (insn);
833 if (max_log < log)
835 max_log = log;
836 max_skip = LABEL_ALIGN_MAX_SKIP;
838 next = NEXT_INSN (insn);
839 /* ADDR_VECs only take room if read-only data goes into the text
840 section. */
841 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
842 if (next && JUMP_P (next))
844 rtx nextbody = PATTERN (next);
845 if (GET_CODE (nextbody) == ADDR_VEC
846 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
848 log = ADDR_VEC_ALIGN (next);
849 if (max_log < log)
851 max_log = log;
852 max_skip = LABEL_ALIGN_MAX_SKIP;
856 LABEL_TO_ALIGNMENT (insn) = max_log;
857 LABEL_TO_MAX_SKIP (insn) = max_skip;
858 max_log = 0;
859 max_skip = 0;
861 else if (BARRIER_P (insn))
863 rtx label;
865 for (label = insn; label && ! INSN_P (label);
866 label = NEXT_INSN (label))
867 if (LABEL_P (label))
869 log = LABEL_ALIGN_AFTER_BARRIER (insn);
870 if (max_log < log)
872 max_log = log;
873 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
875 break;
879 #ifdef HAVE_ATTR_length
881 /* Allocate the rest of the arrays. */
882 insn_lengths = xmalloc (max_uid * sizeof (*insn_lengths));
883 insn_lengths_max_uid = max_uid;
884 /* Syntax errors can lead to labels being outside of the main insn stream.
885 Initialize insn_addresses, so that we get reproducible results. */
886 INSN_ADDRESSES_ALLOC (max_uid);
888 varying_length = xcalloc (max_uid, sizeof (char));
890 /* Initialize uid_align. We scan instructions
891 from end to start, and keep in align_tab[n] the last seen insn
892 that does an alignment of at least n+1, i.e. the successor
893 in the alignment chain for an insn that does / has a known
894 alignment of n. */
895 uid_align = xcalloc (max_uid, sizeof *uid_align);
897 for (i = MAX_CODE_ALIGN; --i >= 0;)
898 align_tab[i] = NULL_RTX;
899 seq = get_last_insn ();
900 for (; seq; seq = PREV_INSN (seq))
902 int uid = INSN_UID (seq);
903 int log;
904 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
905 uid_align[uid] = align_tab[0];
906 if (log)
908 /* Found an alignment label. */
909 uid_align[uid] = align_tab[log];
910 for (i = log - 1; i >= 0; i--)
911 align_tab[i] = seq;
914 #ifdef CASE_VECTOR_SHORTEN_MODE
915 if (optimize)
917 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
918 label fields. */
920 int min_shuid = INSN_SHUID (get_insns ()) - 1;
921 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
922 int rel;
924 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
926 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
927 int len, i, min, max, insn_shuid;
928 int min_align;
929 addr_diff_vec_flags flags;
931 if (!JUMP_P (insn)
932 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
933 continue;
934 pat = PATTERN (insn);
935 len = XVECLEN (pat, 1);
936 gcc_assert (len > 0);
937 min_align = MAX_CODE_ALIGN;
938 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
940 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
941 int shuid = INSN_SHUID (lab);
942 if (shuid < min)
944 min = shuid;
945 min_lab = lab;
947 if (shuid > max)
949 max = shuid;
950 max_lab = lab;
952 if (min_align > LABEL_TO_ALIGNMENT (lab))
953 min_align = LABEL_TO_ALIGNMENT (lab);
955 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
956 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
957 insn_shuid = INSN_SHUID (insn);
958 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
959 memset (&flags, 0, sizeof (flags));
960 flags.min_align = min_align;
961 flags.base_after_vec = rel > insn_shuid;
962 flags.min_after_vec = min > insn_shuid;
963 flags.max_after_vec = max > insn_shuid;
964 flags.min_after_base = min > rel;
965 flags.max_after_base = max > rel;
966 ADDR_DIFF_VEC_FLAGS (pat) = flags;
969 #endif /* CASE_VECTOR_SHORTEN_MODE */
971 /* Compute initial lengths, addresses, and varying flags for each insn. */
972 for (insn_current_address = 0, insn = first;
973 insn != 0;
974 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
976 uid = INSN_UID (insn);
978 insn_lengths[uid] = 0;
980 if (LABEL_P (insn))
982 int log = LABEL_TO_ALIGNMENT (insn);
983 if (log)
985 int align = 1 << log;
986 int new_address = (insn_current_address + align - 1) & -align;
987 insn_lengths[uid] = new_address - insn_current_address;
991 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
993 if (NOTE_P (insn) || BARRIER_P (insn)
994 || LABEL_P (insn))
995 continue;
996 if (INSN_DELETED_P (insn))
997 continue;
999 body = PATTERN (insn);
1000 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1002 /* This only takes room if read-only data goes into the text
1003 section. */
1004 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
1005 insn_lengths[uid] = (XVECLEN (body,
1006 GET_CODE (body) == ADDR_DIFF_VEC)
1007 * GET_MODE_SIZE (GET_MODE (body)));
1008 /* Alignment is handled by ADDR_VEC_ALIGN. */
1010 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1011 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1012 else if (GET_CODE (body) == SEQUENCE)
1014 int i;
1015 int const_delay_slots;
1016 #ifdef DELAY_SLOTS
1017 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1018 #else
1019 const_delay_slots = 0;
1020 #endif
1021 /* Inside a delay slot sequence, we do not do any branch shortening
1022 if the shortening could change the number of delay slots
1023 of the branch. */
1024 for (i = 0; i < XVECLEN (body, 0); i++)
1026 rtx inner_insn = XVECEXP (body, 0, i);
1027 int inner_uid = INSN_UID (inner_insn);
1028 int inner_length;
1030 if (GET_CODE (body) == ASM_INPUT
1031 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1032 inner_length = (asm_insn_count (PATTERN (inner_insn))
1033 * insn_default_length (inner_insn));
1034 else
1035 inner_length = insn_default_length (inner_insn);
1037 insn_lengths[inner_uid] = inner_length;
1038 if (const_delay_slots)
1040 if ((varying_length[inner_uid]
1041 = insn_variable_length_p (inner_insn)) != 0)
1042 varying_length[uid] = 1;
1043 INSN_ADDRESSES (inner_uid) = (insn_current_address
1044 + insn_lengths[uid]);
1046 else
1047 varying_length[inner_uid] = 0;
1048 insn_lengths[uid] += inner_length;
1051 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1053 insn_lengths[uid] = insn_default_length (insn);
1054 varying_length[uid] = insn_variable_length_p (insn);
1057 /* If needed, do any adjustment. */
1058 #ifdef ADJUST_INSN_LENGTH
1059 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1060 if (insn_lengths[uid] < 0)
1061 fatal_insn ("negative insn length", insn);
1062 #endif
1065 /* Now loop over all the insns finding varying length insns. For each,
1066 get the current insn length. If it has changed, reflect the change.
1067 When nothing changes for a full pass, we are done. */
1069 while (something_changed)
1071 something_changed = 0;
1072 insn_current_align = MAX_CODE_ALIGN - 1;
1073 for (insn_current_address = 0, insn = first;
1074 insn != 0;
1075 insn = NEXT_INSN (insn))
1077 int new_length;
1078 #ifdef ADJUST_INSN_LENGTH
1079 int tmp_length;
1080 #endif
1081 int length_align;
1083 uid = INSN_UID (insn);
1085 if (LABEL_P (insn))
1087 int log = LABEL_TO_ALIGNMENT (insn);
1088 if (log > insn_current_align)
1090 int align = 1 << log;
1091 int new_address= (insn_current_address + align - 1) & -align;
1092 insn_lengths[uid] = new_address - insn_current_address;
1093 insn_current_align = log;
1094 insn_current_address = new_address;
1096 else
1097 insn_lengths[uid] = 0;
1098 INSN_ADDRESSES (uid) = insn_current_address;
1099 continue;
1102 length_align = INSN_LENGTH_ALIGNMENT (insn);
1103 if (length_align < insn_current_align)
1104 insn_current_align = length_align;
1106 insn_last_address = INSN_ADDRESSES (uid);
1107 INSN_ADDRESSES (uid) = insn_current_address;
1109 #ifdef CASE_VECTOR_SHORTEN_MODE
1110 if (optimize && JUMP_P (insn)
1111 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1113 rtx body = PATTERN (insn);
1114 int old_length = insn_lengths[uid];
1115 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1116 rtx min_lab = XEXP (XEXP (body, 2), 0);
1117 rtx max_lab = XEXP (XEXP (body, 3), 0);
1118 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1119 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1120 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1121 rtx prev;
1122 int rel_align = 0;
1123 addr_diff_vec_flags flags;
1125 /* Avoid automatic aggregate initialization. */
1126 flags = ADDR_DIFF_VEC_FLAGS (body);
1128 /* Try to find a known alignment for rel_lab. */
1129 for (prev = rel_lab;
1130 prev
1131 && ! insn_lengths[INSN_UID (prev)]
1132 && ! (varying_length[INSN_UID (prev)] & 1);
1133 prev = PREV_INSN (prev))
1134 if (varying_length[INSN_UID (prev)] & 2)
1136 rel_align = LABEL_TO_ALIGNMENT (prev);
1137 break;
1140 /* See the comment on addr_diff_vec_flags in rtl.h for the
1141 meaning of the flags values. base: REL_LAB vec: INSN */
1142 /* Anything after INSN has still addresses from the last
1143 pass; adjust these so that they reflect our current
1144 estimate for this pass. */
1145 if (flags.base_after_vec)
1146 rel_addr += insn_current_address - insn_last_address;
1147 if (flags.min_after_vec)
1148 min_addr += insn_current_address - insn_last_address;
1149 if (flags.max_after_vec)
1150 max_addr += insn_current_address - insn_last_address;
1151 /* We want to know the worst case, i.e. lowest possible value
1152 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1153 its offset is positive, and we have to be wary of code shrink;
1154 otherwise, it is negative, and we have to be vary of code
1155 size increase. */
1156 if (flags.min_after_base)
1158 /* If INSN is between REL_LAB and MIN_LAB, the size
1159 changes we are about to make can change the alignment
1160 within the observed offset, therefore we have to break
1161 it up into two parts that are independent. */
1162 if (! flags.base_after_vec && flags.min_after_vec)
1164 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1165 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1167 else
1168 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1170 else
1172 if (flags.base_after_vec && ! flags.min_after_vec)
1174 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1175 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1177 else
1178 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1180 /* Likewise, determine the highest lowest possible value
1181 for the offset of MAX_LAB. */
1182 if (flags.max_after_base)
1184 if (! flags.base_after_vec && flags.max_after_vec)
1186 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1187 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1189 else
1190 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1192 else
1194 if (flags.base_after_vec && ! flags.max_after_vec)
1196 max_addr += align_fuzz (max_lab, insn, 0, 0);
1197 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1199 else
1200 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1202 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1203 max_addr - rel_addr,
1204 body));
1205 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
1207 insn_lengths[uid]
1208 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1209 insn_current_address += insn_lengths[uid];
1210 if (insn_lengths[uid] != old_length)
1211 something_changed = 1;
1214 continue;
1216 #endif /* CASE_VECTOR_SHORTEN_MODE */
1218 if (! (varying_length[uid]))
1220 if (NONJUMP_INSN_P (insn)
1221 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1223 int i;
1225 body = PATTERN (insn);
1226 for (i = 0; i < XVECLEN (body, 0); i++)
1228 rtx inner_insn = XVECEXP (body, 0, i);
1229 int inner_uid = INSN_UID (inner_insn);
1231 INSN_ADDRESSES (inner_uid) = insn_current_address;
1233 insn_current_address += insn_lengths[inner_uid];
1236 else
1237 insn_current_address += insn_lengths[uid];
1239 continue;
1242 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1244 int i;
1246 body = PATTERN (insn);
1247 new_length = 0;
1248 for (i = 0; i < XVECLEN (body, 0); i++)
1250 rtx inner_insn = XVECEXP (body, 0, i);
1251 int inner_uid = INSN_UID (inner_insn);
1252 int inner_length;
1254 INSN_ADDRESSES (inner_uid) = insn_current_address;
1256 /* insn_current_length returns 0 for insns with a
1257 non-varying length. */
1258 if (! varying_length[inner_uid])
1259 inner_length = insn_lengths[inner_uid];
1260 else
1261 inner_length = insn_current_length (inner_insn);
1263 if (inner_length != insn_lengths[inner_uid])
1265 insn_lengths[inner_uid] = inner_length;
1266 something_changed = 1;
1268 insn_current_address += insn_lengths[inner_uid];
1269 new_length += inner_length;
1272 else
1274 new_length = insn_current_length (insn);
1275 insn_current_address += new_length;
1278 #ifdef ADJUST_INSN_LENGTH
1279 /* If needed, do any adjustment. */
1280 tmp_length = new_length;
1281 ADJUST_INSN_LENGTH (insn, new_length);
1282 insn_current_address += (new_length - tmp_length);
1283 #endif
1285 if (new_length != insn_lengths[uid])
1287 insn_lengths[uid] = new_length;
1288 something_changed = 1;
1291 /* For a non-optimizing compile, do only a single pass. */
1292 if (!optimize)
1293 break;
1296 free (varying_length);
1298 #endif /* HAVE_ATTR_length */
1301 #ifdef HAVE_ATTR_length
1302 /* Given the body of an INSN known to be generated by an ASM statement, return
1303 the number of machine instructions likely to be generated for this insn.
1304 This is used to compute its length. */
1306 static int
1307 asm_insn_count (rtx body)
1309 const char *template;
1310 int count = 1;
1312 if (GET_CODE (body) == ASM_INPUT)
1313 template = XSTR (body, 0);
1314 else
1315 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1317 for (; *template; template++)
1318 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1319 count++;
1321 return count;
1323 #endif
1325 /* Output assembler code for the start of a function,
1326 and initialize some of the variables in this file
1327 for the new function. The label for the function and associated
1328 assembler pseudo-ops have already been output in `assemble_start_function'.
1330 FIRST is the first insn of the rtl for the function being compiled.
1331 FILE is the file to write assembler code to.
1332 OPTIMIZE is nonzero if we should eliminate redundant
1333 test and compare insns. */
1335 void
1336 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1337 int optimize ATTRIBUTE_UNUSED)
1339 block_depth = 0;
1341 this_is_asm_operands = 0;
1343 last_filename = locator_file (prologue_locator);
1344 last_linenum = locator_line (prologue_locator);
1346 high_block_linenum = high_function_linenum = last_linenum;
1348 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1350 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1351 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1352 dwarf2out_begin_prologue (0, NULL);
1353 #endif
1355 #ifdef LEAF_REG_REMAP
1356 if (current_function_uses_only_leaf_regs)
1357 leaf_renumber_regs (first);
1358 #endif
1360 /* The Sun386i and perhaps other machines don't work right
1361 if the profiling code comes after the prologue. */
1362 #ifdef PROFILE_BEFORE_PROLOGUE
1363 if (current_function_profile)
1364 profile_function (file);
1365 #endif /* PROFILE_BEFORE_PROLOGUE */
1367 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1368 if (dwarf2out_do_frame ())
1369 dwarf2out_frame_debug (NULL_RTX, false);
1370 #endif
1372 /* If debugging, assign block numbers to all of the blocks in this
1373 function. */
1374 if (write_symbols)
1376 remove_unnecessary_notes ();
1377 reemit_insn_block_notes ();
1378 number_blocks (current_function_decl);
1379 /* We never actually put out begin/end notes for the top-level
1380 block in the function. But, conceptually, that block is
1381 always needed. */
1382 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1385 /* First output the function prologue: code to set up the stack frame. */
1386 targetm.asm_out.function_prologue (file, get_frame_size ());
1388 /* If the machine represents the prologue as RTL, the profiling code must
1389 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1390 #ifdef HAVE_prologue
1391 if (! HAVE_prologue)
1392 #endif
1393 profile_after_prologue (file);
1396 static void
1397 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1399 #ifndef PROFILE_BEFORE_PROLOGUE
1400 if (current_function_profile)
1401 profile_function (file);
1402 #endif /* not PROFILE_BEFORE_PROLOGUE */
1405 static void
1406 profile_function (FILE *file ATTRIBUTE_UNUSED)
1408 #ifndef NO_PROFILE_COUNTERS
1409 # define NO_PROFILE_COUNTERS 0
1410 #endif
1411 #if defined(ASM_OUTPUT_REG_PUSH)
1412 int sval = current_function_returns_struct;
1413 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1414 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1415 int cxt = cfun->static_chain_decl != NULL;
1416 #endif
1417 #endif /* ASM_OUTPUT_REG_PUSH */
1419 if (! NO_PROFILE_COUNTERS)
1421 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1422 data_section ();
1423 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1424 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1425 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1428 function_section (current_function_decl);
1430 #if defined(ASM_OUTPUT_REG_PUSH)
1431 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1432 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1433 #endif
1435 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1436 if (cxt)
1437 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1438 #else
1439 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1440 if (cxt)
1442 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1444 #endif
1445 #endif
1447 FUNCTION_PROFILER (file, current_function_funcdef_no);
1449 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1450 if (cxt)
1451 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1452 #else
1453 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1454 if (cxt)
1456 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1458 #endif
1459 #endif
1461 #if defined(ASM_OUTPUT_REG_PUSH)
1462 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1463 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1464 #endif
1467 /* Output assembler code for the end of a function.
1468 For clarity, args are same as those of `final_start_function'
1469 even though not all of them are needed. */
1471 void
1472 final_end_function (void)
1474 app_disable ();
1476 (*debug_hooks->end_function) (high_function_linenum);
1478 /* Finally, output the function epilogue:
1479 code to restore the stack frame and return to the caller. */
1480 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1482 /* And debug output. */
1483 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1485 #if defined (DWARF2_UNWIND_INFO)
1486 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1487 && dwarf2out_do_frame ())
1488 dwarf2out_end_epilogue (last_linenum, last_filename);
1489 #endif
1492 /* Output assembler code for some insns: all or part of a function.
1493 For description of args, see `final_start_function', above.
1495 PRESCAN is 1 if we are not really outputting,
1496 just scanning as if we were outputting.
1497 Prescanning deletes and rearranges insns just like ordinary output.
1498 PRESCAN is -2 if we are outputting after having prescanned.
1499 In this case, don't try to delete or rearrange insns
1500 because that has already been done.
1501 Prescanning is done only on certain machines. */
1503 void
1504 final (rtx first, FILE *file, int optimize, int prescan)
1506 rtx insn;
1507 int max_uid = 0;
1508 int seen = 0;
1510 last_ignored_compare = 0;
1512 #ifdef SDB_DEBUGGING_INFO
1513 /* When producing SDB debugging info, delete troublesome line number
1514 notes from inlined functions in other files as well as duplicate
1515 line number notes. */
1516 if (write_symbols == SDB_DEBUG)
1518 rtx last = 0;
1519 for (insn = first; insn; insn = NEXT_INSN (insn))
1520 if (NOTE_P (insn) && NOTE_LINE_NUMBER (insn) > 0)
1522 if (last != 0
1523 #ifdef USE_MAPPED_LOCATION
1524 && NOTE_SOURCE_LOCATION (insn) == NOTE_SOURCE_LOCATION (last)
1525 #else
1526 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1527 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)
1528 #endif
1531 delete_insn (insn); /* Use delete_note. */
1532 continue;
1534 last = insn;
1537 #endif
1539 for (insn = first; insn; insn = NEXT_INSN (insn))
1541 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1542 max_uid = INSN_UID (insn);
1543 #ifdef HAVE_cc0
1544 /* If CC tracking across branches is enabled, record the insn which
1545 jumps to each branch only reached from one place. */
1546 if (optimize && JUMP_P (insn))
1548 rtx lab = JUMP_LABEL (insn);
1549 if (lab && LABEL_NUSES (lab) == 1)
1551 LABEL_REFS (lab) = insn;
1554 #endif
1557 init_recog ();
1559 CC_STATUS_INIT;
1561 /* Output the insns. */
1562 for (insn = NEXT_INSN (first); insn;)
1564 #ifdef HAVE_ATTR_length
1565 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1567 /* This can be triggered by bugs elsewhere in the compiler if
1568 new insns are created after init_insn_lengths is called. */
1569 gcc_assert (NOTE_P (insn));
1570 insn_current_address = -1;
1572 else
1573 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1574 #endif /* HAVE_ATTR_length */
1576 insn = final_scan_insn (insn, file, optimize, prescan, 0, &seen);
1580 const char *
1581 get_insn_template (int code, rtx insn)
1583 switch (insn_data[code].output_format)
1585 case INSN_OUTPUT_FORMAT_SINGLE:
1586 return insn_data[code].output.single;
1587 case INSN_OUTPUT_FORMAT_MULTI:
1588 return insn_data[code].output.multi[which_alternative];
1589 case INSN_OUTPUT_FORMAT_FUNCTION:
1590 gcc_assert (insn);
1591 return (*insn_data[code].output.function) (recog_data.operand, insn);
1593 default:
1594 gcc_unreachable ();
1598 /* Emit the appropriate declaration for an alternate-entry-point
1599 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1600 LABEL_KIND != LABEL_NORMAL.
1602 The case fall-through in this function is intentional. */
1603 static void
1604 output_alternate_entry_point (FILE *file, rtx insn)
1606 const char *name = LABEL_NAME (insn);
1608 switch (LABEL_KIND (insn))
1610 case LABEL_WEAK_ENTRY:
1611 #ifdef ASM_WEAKEN_LABEL
1612 ASM_WEAKEN_LABEL (file, name);
1613 #endif
1614 case LABEL_GLOBAL_ENTRY:
1615 targetm.asm_out.globalize_label (file, name);
1616 case LABEL_STATIC_ENTRY:
1617 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1618 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1619 #endif
1620 ASM_OUTPUT_LABEL (file, name);
1621 break;
1623 case LABEL_NORMAL:
1624 default:
1625 gcc_unreachable ();
1629 /* Return boolean indicating if there is a NOTE_INSN_UNLIKELY_EXECUTED_CODE
1630 note in the instruction chain (going forward) between the current
1631 instruction, and the next 'executable' instruction. */
1633 bool
1634 scan_ahead_for_unlikely_executed_note (rtx insn)
1636 rtx temp;
1637 int bb_note_count = 0;
1639 for (temp = insn; temp; temp = NEXT_INSN (temp))
1641 if (NOTE_P (temp)
1642 && NOTE_LINE_NUMBER (temp) == NOTE_INSN_UNLIKELY_EXECUTED_CODE)
1643 return true;
1644 if (NOTE_P (temp)
1645 && NOTE_LINE_NUMBER (temp) == NOTE_INSN_BASIC_BLOCK)
1647 bb_note_count++;
1648 if (bb_note_count > 1)
1649 return false;
1651 if (INSN_P (temp))
1652 return false;
1655 return false;
1658 /* The final scan for one insn, INSN.
1659 Args are same as in `final', except that INSN
1660 is the insn being scanned.
1661 Value returned is the next insn to be scanned.
1663 NOPEEPHOLES is the flag to disallow peephole processing (currently
1664 used for within delayed branch sequence output).
1666 SEEN is used to track the end of the prologue, for emitting
1667 debug information. We force the emission of a line note after
1668 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1669 at the beginning of the second basic block, whichever comes
1670 first. */
1673 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1674 int prescan, int nopeepholes ATTRIBUTE_UNUSED,
1675 int *seen)
1677 #ifdef HAVE_cc0
1678 rtx set;
1679 #endif
1681 insn_counter++;
1683 /* Ignore deleted insns. These can occur when we split insns (due to a
1684 template of "#") while not optimizing. */
1685 if (INSN_DELETED_P (insn))
1686 return NEXT_INSN (insn);
1688 switch (GET_CODE (insn))
1690 case NOTE:
1691 if (prescan > 0)
1692 break;
1694 switch (NOTE_LINE_NUMBER (insn))
1696 case NOTE_INSN_DELETED:
1697 case NOTE_INSN_LOOP_BEG:
1698 case NOTE_INSN_LOOP_END:
1699 case NOTE_INSN_FUNCTION_END:
1700 case NOTE_INSN_REPEATED_LINE_NUMBER:
1701 case NOTE_INSN_EXPECTED_VALUE:
1702 break;
1704 case NOTE_INSN_UNLIKELY_EXECUTED_CODE:
1706 /* The presence of this note indicates that this basic block
1707 belongs in the "cold" section of the .o file. If we are
1708 not already writing to the cold section we need to change
1709 to it. */
1711 unlikely_text_section ();
1712 break;
1714 case NOTE_INSN_BASIC_BLOCK:
1716 /* If we are performing the optimization that partitions
1717 basic blocks into hot & cold sections of the .o file,
1718 then at the start of each new basic block, before
1719 beginning to write code for the basic block, we need to
1720 check to see whether the basic block belongs in the hot
1721 or cold section of the .o file, and change the section we
1722 are writing to appropriately. */
1724 if (flag_reorder_blocks_and_partition
1725 && !scan_ahead_for_unlikely_executed_note (insn))
1726 function_section (current_function_decl);
1728 #ifdef TARGET_UNWIND_INFO
1729 targetm.asm_out.unwind_emit (asm_out_file, insn);
1730 #endif
1732 if (flag_debug_asm)
1733 fprintf (asm_out_file, "\t%s basic block %d\n",
1734 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1736 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1738 *seen |= SEEN_EMITTED;
1739 last_filename = NULL;
1741 else
1742 *seen |= SEEN_BB;
1744 break;
1746 case NOTE_INSN_EH_REGION_BEG:
1747 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1748 NOTE_EH_HANDLER (insn));
1749 break;
1751 case NOTE_INSN_EH_REGION_END:
1752 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1753 NOTE_EH_HANDLER (insn));
1754 break;
1756 case NOTE_INSN_PROLOGUE_END:
1757 targetm.asm_out.function_end_prologue (file);
1758 profile_after_prologue (file);
1760 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1762 *seen |= SEEN_EMITTED;
1763 last_filename = NULL;
1765 else
1766 *seen |= SEEN_NOTE;
1768 break;
1770 case NOTE_INSN_EPILOGUE_BEG:
1771 targetm.asm_out.function_begin_epilogue (file);
1772 break;
1774 case NOTE_INSN_FUNCTION_BEG:
1775 app_disable ();
1776 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1778 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1780 *seen |= SEEN_EMITTED;
1781 last_filename = NULL;
1783 else
1784 *seen |= SEEN_NOTE;
1786 break;
1788 case NOTE_INSN_BLOCK_BEG:
1789 if (debug_info_level == DINFO_LEVEL_NORMAL
1790 || debug_info_level == DINFO_LEVEL_VERBOSE
1791 || write_symbols == DWARF2_DEBUG
1792 || write_symbols == VMS_AND_DWARF2_DEBUG
1793 || write_symbols == VMS_DEBUG)
1795 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1797 app_disable ();
1798 ++block_depth;
1799 high_block_linenum = last_linenum;
1801 /* Output debugging info about the symbol-block beginning. */
1802 (*debug_hooks->begin_block) (last_linenum, n);
1804 /* Mark this block as output. */
1805 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1807 break;
1809 case NOTE_INSN_BLOCK_END:
1810 if (debug_info_level == DINFO_LEVEL_NORMAL
1811 || debug_info_level == DINFO_LEVEL_VERBOSE
1812 || write_symbols == DWARF2_DEBUG
1813 || write_symbols == VMS_AND_DWARF2_DEBUG
1814 || write_symbols == VMS_DEBUG)
1816 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1818 app_disable ();
1820 /* End of a symbol-block. */
1821 --block_depth;
1822 gcc_assert (block_depth >= 0);
1824 (*debug_hooks->end_block) (high_block_linenum, n);
1826 break;
1828 case NOTE_INSN_DELETED_LABEL:
1829 /* Emit the label. We may have deleted the CODE_LABEL because
1830 the label could be proved to be unreachable, though still
1831 referenced (in the form of having its address taken. */
1832 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1833 break;
1835 case NOTE_INSN_VAR_LOCATION:
1836 (*debug_hooks->var_location) (insn);
1837 break;
1839 case 0:
1840 break;
1842 default:
1843 gcc_assert (NOTE_LINE_NUMBER (insn) > 0);
1844 break;
1846 break;
1848 case BARRIER:
1849 #if defined (DWARF2_UNWIND_INFO)
1850 if (dwarf2out_do_frame ())
1851 dwarf2out_frame_debug (insn, false);
1852 #endif
1853 break;
1855 case CODE_LABEL:
1856 /* The target port might emit labels in the output function for
1857 some insn, e.g. sh.c output_branchy_insn. */
1858 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
1860 int align = LABEL_TO_ALIGNMENT (insn);
1861 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1862 int max_skip = LABEL_TO_MAX_SKIP (insn);
1863 #endif
1865 if (align && NEXT_INSN (insn))
1867 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1868 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
1869 #else
1870 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1871 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
1872 #else
1873 ASM_OUTPUT_ALIGN (file, align);
1874 #endif
1875 #endif
1878 #ifdef HAVE_cc0
1879 CC_STATUS_INIT;
1880 /* If this label is reached from only one place, set the condition
1881 codes from the instruction just before the branch. */
1883 /* Disabled because some insns set cc_status in the C output code
1884 and NOTICE_UPDATE_CC alone can set incorrect status. */
1885 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1887 rtx jump = LABEL_REFS (insn);
1888 rtx barrier = prev_nonnote_insn (insn);
1889 rtx prev;
1890 /* If the LABEL_REFS field of this label has been set to point
1891 at a branch, the predecessor of the branch is a regular
1892 insn, and that branch is the only way to reach this label,
1893 set the condition codes based on the branch and its
1894 predecessor. */
1895 if (barrier && BARRIER_P (barrier)
1896 && jump && JUMP_P (jump)
1897 && (prev = prev_nonnote_insn (jump))
1898 && NONJUMP_INSN_P (prev))
1900 NOTICE_UPDATE_CC (PATTERN (prev), prev);
1901 NOTICE_UPDATE_CC (PATTERN (jump), jump);
1904 #endif
1905 if (prescan > 0)
1906 break;
1908 if (LABEL_NAME (insn))
1909 (*debug_hooks->label) (insn);
1911 /* If we are doing the optimization that partitions hot & cold
1912 basic blocks into separate sections of the .o file, we need
1913 to ensure the jump table ends up in the correct section... */
1915 if (flag_reorder_blocks_and_partition
1916 && targetm.have_named_sections)
1918 rtx tmp_table, tmp_label;
1919 if (LABEL_P (insn)
1920 && tablejump_p (NEXT_INSN (insn), &tmp_label, &tmp_table))
1922 /* Do nothing; Do NOT change the current section. */
1924 else if (scan_ahead_for_unlikely_executed_note (insn))
1925 unlikely_text_section ();
1926 else if (in_unlikely_text_section ())
1927 function_section (current_function_decl);
1930 if (app_on)
1932 fputs (ASM_APP_OFF, file);
1933 app_on = 0;
1935 if (NEXT_INSN (insn) != 0
1936 && JUMP_P (NEXT_INSN (insn)))
1938 rtx nextbody = PATTERN (NEXT_INSN (insn));
1940 /* If this label is followed by a jump-table,
1941 make sure we put the label in the read-only section. Also
1942 possibly write the label and jump table together. */
1944 if (GET_CODE (nextbody) == ADDR_VEC
1945 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1947 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1948 /* In this case, the case vector is being moved by the
1949 target, so don't output the label at all. Leave that
1950 to the back end macros. */
1951 #else
1952 if (! JUMP_TABLES_IN_TEXT_SECTION)
1954 int log_align;
1956 targetm.asm_out.function_rodata_section (current_function_decl);
1958 #ifdef ADDR_VEC_ALIGN
1959 log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn));
1960 #else
1961 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
1962 #endif
1963 ASM_OUTPUT_ALIGN (file, log_align);
1965 else
1966 function_section (current_function_decl);
1968 #ifdef ASM_OUTPUT_CASE_LABEL
1969 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
1970 NEXT_INSN (insn));
1971 #else
1972 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1973 #endif
1974 #endif
1975 break;
1978 if (LABEL_ALT_ENTRY_P (insn))
1979 output_alternate_entry_point (file, insn);
1980 else
1981 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1982 break;
1984 default:
1986 rtx body = PATTERN (insn);
1987 int insn_code_number;
1988 const char *template;
1990 /* An INSN, JUMP_INSN or CALL_INSN.
1991 First check for special kinds that recog doesn't recognize. */
1993 if (GET_CODE (body) == USE /* These are just declarations. */
1994 || GET_CODE (body) == CLOBBER)
1995 break;
1997 #ifdef HAVE_cc0
1999 /* If there is a REG_CC_SETTER note on this insn, it means that
2000 the setting of the condition code was done in the delay slot
2001 of the insn that branched here. So recover the cc status
2002 from the insn that set it. */
2004 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2005 if (note)
2007 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2008 cc_prev_status = cc_status;
2011 #endif
2013 /* Detect insns that are really jump-tables
2014 and output them as such. */
2016 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2018 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2019 int vlen, idx;
2020 #endif
2022 if (prescan > 0)
2023 break;
2025 if (app_on)
2027 fputs (ASM_APP_OFF, file);
2028 app_on = 0;
2031 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2032 if (GET_CODE (body) == ADDR_VEC)
2034 #ifdef ASM_OUTPUT_ADDR_VEC
2035 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2036 #else
2037 gcc_unreachable ();
2038 #endif
2040 else
2042 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2043 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2044 #else
2045 gcc_unreachable ();
2046 #endif
2048 #else
2049 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2050 for (idx = 0; idx < vlen; idx++)
2052 if (GET_CODE (body) == ADDR_VEC)
2054 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2055 ASM_OUTPUT_ADDR_VEC_ELT
2056 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2057 #else
2058 gcc_unreachable ();
2059 #endif
2061 else
2063 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2064 ASM_OUTPUT_ADDR_DIFF_ELT
2065 (file,
2066 body,
2067 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2068 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2069 #else
2070 gcc_unreachable ();
2071 #endif
2074 #ifdef ASM_OUTPUT_CASE_END
2075 ASM_OUTPUT_CASE_END (file,
2076 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2077 insn);
2078 #endif
2079 #endif
2081 function_section (current_function_decl);
2083 break;
2085 /* Output this line note if it is the first or the last line
2086 note in a row. */
2087 if (notice_source_line (insn))
2089 (*debug_hooks->source_line) (last_linenum, last_filename);
2092 if (GET_CODE (body) == ASM_INPUT)
2094 const char *string = XSTR (body, 0);
2096 /* There's no telling what that did to the condition codes. */
2097 CC_STATUS_INIT;
2098 if (prescan > 0)
2099 break;
2101 if (string[0])
2103 if (! app_on)
2105 fputs (ASM_APP_ON, file);
2106 app_on = 1;
2108 fprintf (asm_out_file, "\t%s\n", string);
2110 break;
2113 /* Detect `asm' construct with operands. */
2114 if (asm_noperands (body) >= 0)
2116 unsigned int noperands = asm_noperands (body);
2117 rtx *ops = alloca (noperands * sizeof (rtx));
2118 const char *string;
2120 /* There's no telling what that did to the condition codes. */
2121 CC_STATUS_INIT;
2122 if (prescan > 0)
2123 break;
2125 /* Get out the operand values. */
2126 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2127 /* Inhibit aborts on what would otherwise be compiler bugs. */
2128 insn_noperands = noperands;
2129 this_is_asm_operands = insn;
2131 #ifdef FINAL_PRESCAN_INSN
2132 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2133 #endif
2135 /* Output the insn using them. */
2136 if (string[0])
2138 if (! app_on)
2140 fputs (ASM_APP_ON, file);
2141 app_on = 1;
2143 output_asm_insn (string, ops);
2146 this_is_asm_operands = 0;
2147 break;
2150 if (prescan <= 0 && app_on)
2152 fputs (ASM_APP_OFF, file);
2153 app_on = 0;
2156 if (GET_CODE (body) == SEQUENCE)
2158 /* A delayed-branch sequence */
2159 int i;
2160 rtx next;
2162 if (prescan > 0)
2163 break;
2164 final_sequence = body;
2166 /* Record the delay slots' frame information before the branch.
2167 This is needed for delayed calls: see execute_cfa_program(). */
2168 #if defined (DWARF2_UNWIND_INFO)
2169 if (dwarf2out_do_frame ())
2170 for (i = 1; i < XVECLEN (body, 0); i++)
2171 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
2172 #endif
2174 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2175 force the restoration of a comparison that was previously
2176 thought unnecessary. If that happens, cancel this sequence
2177 and cause that insn to be restored. */
2179 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1, seen);
2180 if (next != XVECEXP (body, 0, 1))
2182 final_sequence = 0;
2183 return next;
2186 for (i = 1; i < XVECLEN (body, 0); i++)
2188 rtx insn = XVECEXP (body, 0, i);
2189 rtx next = NEXT_INSN (insn);
2190 /* We loop in case any instruction in a delay slot gets
2191 split. */
2193 insn = final_scan_insn (insn, file, 0, prescan, 1, seen);
2194 while (insn != next);
2196 #ifdef DBR_OUTPUT_SEQEND
2197 DBR_OUTPUT_SEQEND (file);
2198 #endif
2199 final_sequence = 0;
2201 /* If the insn requiring the delay slot was a CALL_INSN, the
2202 insns in the delay slot are actually executed before the
2203 called function. Hence we don't preserve any CC-setting
2204 actions in these insns and the CC must be marked as being
2205 clobbered by the function. */
2206 if (CALL_P (XVECEXP (body, 0, 0)))
2208 CC_STATUS_INIT;
2210 break;
2213 /* We have a real machine instruction as rtl. */
2215 body = PATTERN (insn);
2217 #ifdef HAVE_cc0
2218 set = single_set (insn);
2220 /* Check for redundant test and compare instructions
2221 (when the condition codes are already set up as desired).
2222 This is done only when optimizing; if not optimizing,
2223 it should be possible for the user to alter a variable
2224 with the debugger in between statements
2225 and the next statement should reexamine the variable
2226 to compute the condition codes. */
2228 if (optimize)
2230 if (set
2231 && GET_CODE (SET_DEST (set)) == CC0
2232 && insn != last_ignored_compare)
2234 if (GET_CODE (SET_SRC (set)) == SUBREG)
2235 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2236 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2238 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2239 XEXP (SET_SRC (set), 0)
2240 = alter_subreg (&XEXP (SET_SRC (set), 0));
2241 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2242 XEXP (SET_SRC (set), 1)
2243 = alter_subreg (&XEXP (SET_SRC (set), 1));
2245 if ((cc_status.value1 != 0
2246 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2247 || (cc_status.value2 != 0
2248 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2250 /* Don't delete insn if it has an addressing side-effect. */
2251 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2252 /* or if anything in it is volatile. */
2253 && ! volatile_refs_p (PATTERN (insn)))
2255 /* We don't really delete the insn; just ignore it. */
2256 last_ignored_compare = insn;
2257 break;
2262 #endif
2264 #ifndef STACK_REGS
2265 /* Don't bother outputting obvious no-ops, even without -O.
2266 This optimization is fast and doesn't interfere with debugging.
2267 Don't do this if the insn is in a delay slot, since this
2268 will cause an improper number of delay insns to be written. */
2269 if (final_sequence == 0
2270 && prescan >= 0
2271 && NONJUMP_INSN_P (insn) && GET_CODE (body) == SET
2272 && REG_P (SET_SRC (body))
2273 && REG_P (SET_DEST (body))
2274 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2275 break;
2276 #endif
2278 #ifdef HAVE_cc0
2279 /* If this is a conditional branch, maybe modify it
2280 if the cc's are in a nonstandard state
2281 so that it accomplishes the same thing that it would
2282 do straightforwardly if the cc's were set up normally. */
2284 if (cc_status.flags != 0
2285 && JUMP_P (insn)
2286 && GET_CODE (body) == SET
2287 && SET_DEST (body) == pc_rtx
2288 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2289 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2290 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2291 /* This is done during prescan; it is not done again
2292 in final scan when prescan has been done. */
2293 && prescan >= 0)
2295 /* This function may alter the contents of its argument
2296 and clear some of the cc_status.flags bits.
2297 It may also return 1 meaning condition now always true
2298 or -1 meaning condition now always false
2299 or 2 meaning condition nontrivial but altered. */
2300 int result = alter_cond (XEXP (SET_SRC (body), 0));
2301 /* If condition now has fixed value, replace the IF_THEN_ELSE
2302 with its then-operand or its else-operand. */
2303 if (result == 1)
2304 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2305 if (result == -1)
2306 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2308 /* The jump is now either unconditional or a no-op.
2309 If it has become a no-op, don't try to output it.
2310 (It would not be recognized.) */
2311 if (SET_SRC (body) == pc_rtx)
2313 delete_insn (insn);
2314 break;
2316 else if (GET_CODE (SET_SRC (body)) == RETURN)
2317 /* Replace (set (pc) (return)) with (return). */
2318 PATTERN (insn) = body = SET_SRC (body);
2320 /* Rerecognize the instruction if it has changed. */
2321 if (result != 0)
2322 INSN_CODE (insn) = -1;
2325 /* Make same adjustments to instructions that examine the
2326 condition codes without jumping and instructions that
2327 handle conditional moves (if this machine has either one). */
2329 if (cc_status.flags != 0
2330 && set != 0)
2332 rtx cond_rtx, then_rtx, else_rtx;
2334 if (!JUMP_P (insn)
2335 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2337 cond_rtx = XEXP (SET_SRC (set), 0);
2338 then_rtx = XEXP (SET_SRC (set), 1);
2339 else_rtx = XEXP (SET_SRC (set), 2);
2341 else
2343 cond_rtx = SET_SRC (set);
2344 then_rtx = const_true_rtx;
2345 else_rtx = const0_rtx;
2348 switch (GET_CODE (cond_rtx))
2350 case GTU:
2351 case GT:
2352 case LTU:
2353 case LT:
2354 case GEU:
2355 case GE:
2356 case LEU:
2357 case LE:
2358 case EQ:
2359 case NE:
2361 int result;
2362 if (XEXP (cond_rtx, 0) != cc0_rtx)
2363 break;
2364 result = alter_cond (cond_rtx);
2365 if (result == 1)
2366 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2367 else if (result == -1)
2368 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2369 else if (result == 2)
2370 INSN_CODE (insn) = -1;
2371 if (SET_DEST (set) == SET_SRC (set))
2372 delete_insn (insn);
2374 break;
2376 default:
2377 break;
2381 #endif
2383 #ifdef HAVE_peephole
2384 /* Do machine-specific peephole optimizations if desired. */
2386 if (optimize && !flag_no_peephole && !nopeepholes)
2388 rtx next = peephole (insn);
2389 /* When peepholing, if there were notes within the peephole,
2390 emit them before the peephole. */
2391 if (next != 0 && next != NEXT_INSN (insn))
2393 rtx note, prev = PREV_INSN (insn);
2395 for (note = NEXT_INSN (insn); note != next;
2396 note = NEXT_INSN (note))
2397 final_scan_insn (note, file, optimize, prescan, nopeepholes, seen);
2399 /* In case this is prescan, put the notes
2400 in proper position for later rescan. */
2401 note = NEXT_INSN (insn);
2402 PREV_INSN (note) = prev;
2403 NEXT_INSN (prev) = note;
2404 NEXT_INSN (PREV_INSN (next)) = insn;
2405 PREV_INSN (insn) = PREV_INSN (next);
2406 NEXT_INSN (insn) = next;
2407 PREV_INSN (next) = insn;
2410 /* PEEPHOLE might have changed this. */
2411 body = PATTERN (insn);
2413 #endif
2415 /* Try to recognize the instruction.
2416 If successful, verify that the operands satisfy the
2417 constraints for the instruction. Crash if they don't,
2418 since `reload' should have changed them so that they do. */
2420 insn_code_number = recog_memoized (insn);
2421 cleanup_subreg_operands (insn);
2423 /* Dump the insn in the assembly for debugging. */
2424 if (flag_dump_rtl_in_asm)
2426 print_rtx_head = ASM_COMMENT_START;
2427 print_rtl_single (asm_out_file, insn);
2428 print_rtx_head = "";
2431 if (! constrain_operands_cached (1))
2432 fatal_insn_not_found (insn);
2434 /* Some target machines need to prescan each insn before
2435 it is output. */
2437 #ifdef FINAL_PRESCAN_INSN
2438 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2439 #endif
2441 #ifdef HAVE_conditional_execution
2442 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2443 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2444 else
2445 current_insn_predicate = NULL_RTX;
2446 #endif
2448 #ifdef HAVE_cc0
2449 cc_prev_status = cc_status;
2451 /* Update `cc_status' for this instruction.
2452 The instruction's output routine may change it further.
2453 If the output routine for a jump insn needs to depend
2454 on the cc status, it should look at cc_prev_status. */
2456 NOTICE_UPDATE_CC (body, insn);
2457 #endif
2459 current_output_insn = debug_insn = insn;
2461 #if defined (DWARF2_UNWIND_INFO)
2462 if (CALL_P (insn) && dwarf2out_do_frame ())
2463 dwarf2out_frame_debug (insn, false);
2464 #endif
2466 /* Find the proper template for this insn. */
2467 template = get_insn_template (insn_code_number, insn);
2469 /* If the C code returns 0, it means that it is a jump insn
2470 which follows a deleted test insn, and that test insn
2471 needs to be reinserted. */
2472 if (template == 0)
2474 rtx prev;
2476 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2478 /* We have already processed the notes between the setter and
2479 the user. Make sure we don't process them again, this is
2480 particularly important if one of the notes is a block
2481 scope note or an EH note. */
2482 for (prev = insn;
2483 prev != last_ignored_compare;
2484 prev = PREV_INSN (prev))
2486 if (NOTE_P (prev))
2487 delete_insn (prev); /* Use delete_note. */
2490 return prev;
2493 /* If the template is the string "#", it means that this insn must
2494 be split. */
2495 if (template[0] == '#' && template[1] == '\0')
2497 rtx new = try_split (body, insn, 0);
2499 /* If we didn't split the insn, go away. */
2500 if (new == insn && PATTERN (new) == body)
2501 fatal_insn ("could not split insn", insn);
2503 #ifdef HAVE_ATTR_length
2504 /* This instruction should have been split in shorten_branches,
2505 to ensure that we would have valid length info for the
2506 splitees. */
2507 gcc_unreachable ();
2508 #endif
2510 return new;
2513 if (prescan > 0)
2514 break;
2516 #ifdef TARGET_UNWIND_INFO
2517 /* ??? This will put the directives in the wrong place if
2518 get_insn_template outputs assembly directly. However calling it
2519 before get_insn_template breaks if the insns is split. */
2520 targetm.asm_out.unwind_emit (asm_out_file, insn);
2521 #endif
2523 /* Output assembler code from the template. */
2524 output_asm_insn (template, recog_data.operand);
2526 /* If necessary, report the effect that the instruction has on
2527 the unwind info. We've already done this for delay slots
2528 and call instructions. */
2529 #if defined (DWARF2_UNWIND_INFO)
2530 if (final_sequence == 0
2531 #if !defined (HAVE_prologue)
2532 && !ACCUMULATE_OUTGOING_ARGS
2533 #endif
2534 && dwarf2out_do_frame ())
2535 dwarf2out_frame_debug (insn, true);
2536 #endif
2538 current_output_insn = debug_insn = 0;
2541 return NEXT_INSN (insn);
2544 /* Output debugging info to the assembler file FILE
2545 based on the NOTE-insn INSN, assumed to be a line number. */
2547 static bool
2548 notice_source_line (rtx insn)
2550 const char *filename = insn_file (insn);
2551 int linenum = insn_line (insn);
2553 if (filename && (filename != last_filename || last_linenum != linenum))
2555 last_filename = filename;
2556 last_linenum = linenum;
2557 high_block_linenum = MAX (last_linenum, high_block_linenum);
2558 high_function_linenum = MAX (last_linenum, high_function_linenum);
2559 return true;
2561 return false;
2564 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2565 directly to the desired hard register. */
2567 void
2568 cleanup_subreg_operands (rtx insn)
2570 int i;
2571 extract_insn_cached (insn);
2572 for (i = 0; i < recog_data.n_operands; i++)
2574 /* The following test cannot use recog_data.operand when testing
2575 for a SUBREG: the underlying object might have been changed
2576 already if we are inside a match_operator expression that
2577 matches the else clause. Instead we test the underlying
2578 expression directly. */
2579 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2580 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2581 else if (GET_CODE (recog_data.operand[i]) == PLUS
2582 || GET_CODE (recog_data.operand[i]) == MULT
2583 || MEM_P (recog_data.operand[i]))
2584 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2587 for (i = 0; i < recog_data.n_dups; i++)
2589 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2590 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2591 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2592 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2593 || MEM_P (*recog_data.dup_loc[i]))
2594 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2598 /* If X is a SUBREG, replace it with a REG or a MEM,
2599 based on the thing it is a subreg of. */
2602 alter_subreg (rtx *xp)
2604 rtx x = *xp;
2605 rtx y = SUBREG_REG (x);
2607 /* simplify_subreg does not remove subreg from volatile references.
2608 We are required to. */
2609 if (MEM_P (y))
2611 int offset = SUBREG_BYTE (x);
2613 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2614 contains 0 instead of the proper offset. See simplify_subreg. */
2615 if (offset == 0
2616 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2618 int difference = GET_MODE_SIZE (GET_MODE (y))
2619 - GET_MODE_SIZE (GET_MODE (x));
2620 if (WORDS_BIG_ENDIAN)
2621 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2622 if (BYTES_BIG_ENDIAN)
2623 offset += difference % UNITS_PER_WORD;
2626 *xp = adjust_address (y, GET_MODE (x), offset);
2628 else
2630 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2631 SUBREG_BYTE (x));
2633 if (new != 0)
2634 *xp = new;
2635 else
2637 /* Simplify_subreg can't handle some REG cases, but we have to. */
2638 unsigned int regno = subreg_regno (x);
2639 gcc_assert (REG_P (y));
2640 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x));
2644 return *xp;
2647 /* Do alter_subreg on all the SUBREGs contained in X. */
2649 static rtx
2650 walk_alter_subreg (rtx *xp)
2652 rtx x = *xp;
2653 switch (GET_CODE (x))
2655 case PLUS:
2656 case MULT:
2657 case AND:
2658 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2659 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2660 break;
2662 case MEM:
2663 case ZERO_EXTEND:
2664 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2665 break;
2667 case SUBREG:
2668 return alter_subreg (xp);
2670 default:
2671 break;
2674 return *xp;
2677 #ifdef HAVE_cc0
2679 /* Given BODY, the body of a jump instruction, alter the jump condition
2680 as required by the bits that are set in cc_status.flags.
2681 Not all of the bits there can be handled at this level in all cases.
2683 The value is normally 0.
2684 1 means that the condition has become always true.
2685 -1 means that the condition has become always false.
2686 2 means that COND has been altered. */
2688 static int
2689 alter_cond (rtx cond)
2691 int value = 0;
2693 if (cc_status.flags & CC_REVERSED)
2695 value = 2;
2696 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2699 if (cc_status.flags & CC_INVERTED)
2701 value = 2;
2702 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2705 if (cc_status.flags & CC_NOT_POSITIVE)
2706 switch (GET_CODE (cond))
2708 case LE:
2709 case LEU:
2710 case GEU:
2711 /* Jump becomes unconditional. */
2712 return 1;
2714 case GT:
2715 case GTU:
2716 case LTU:
2717 /* Jump becomes no-op. */
2718 return -1;
2720 case GE:
2721 PUT_CODE (cond, EQ);
2722 value = 2;
2723 break;
2725 case LT:
2726 PUT_CODE (cond, NE);
2727 value = 2;
2728 break;
2730 default:
2731 break;
2734 if (cc_status.flags & CC_NOT_NEGATIVE)
2735 switch (GET_CODE (cond))
2737 case GE:
2738 case GEU:
2739 /* Jump becomes unconditional. */
2740 return 1;
2742 case LT:
2743 case LTU:
2744 /* Jump becomes no-op. */
2745 return -1;
2747 case LE:
2748 case LEU:
2749 PUT_CODE (cond, EQ);
2750 value = 2;
2751 break;
2753 case GT:
2754 case GTU:
2755 PUT_CODE (cond, NE);
2756 value = 2;
2757 break;
2759 default:
2760 break;
2763 if (cc_status.flags & CC_NO_OVERFLOW)
2764 switch (GET_CODE (cond))
2766 case GEU:
2767 /* Jump becomes unconditional. */
2768 return 1;
2770 case LEU:
2771 PUT_CODE (cond, EQ);
2772 value = 2;
2773 break;
2775 case GTU:
2776 PUT_CODE (cond, NE);
2777 value = 2;
2778 break;
2780 case LTU:
2781 /* Jump becomes no-op. */
2782 return -1;
2784 default:
2785 break;
2788 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2789 switch (GET_CODE (cond))
2791 default:
2792 gcc_unreachable ();
2794 case NE:
2795 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2796 value = 2;
2797 break;
2799 case EQ:
2800 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2801 value = 2;
2802 break;
2805 if (cc_status.flags & CC_NOT_SIGNED)
2806 /* The flags are valid if signed condition operators are converted
2807 to unsigned. */
2808 switch (GET_CODE (cond))
2810 case LE:
2811 PUT_CODE (cond, LEU);
2812 value = 2;
2813 break;
2815 case LT:
2816 PUT_CODE (cond, LTU);
2817 value = 2;
2818 break;
2820 case GT:
2821 PUT_CODE (cond, GTU);
2822 value = 2;
2823 break;
2825 case GE:
2826 PUT_CODE (cond, GEU);
2827 value = 2;
2828 break;
2830 default:
2831 break;
2834 return value;
2836 #endif
2838 /* Report inconsistency between the assembler template and the operands.
2839 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2841 void
2842 output_operand_lossage (const char *msgid, ...)
2844 char *fmt_string;
2845 char *new_message;
2846 const char *pfx_str;
2847 va_list ap;
2849 va_start (ap, msgid);
2851 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
2852 asprintf (&fmt_string, "%s%s", pfx_str, _(msgid));
2853 vasprintf (&new_message, fmt_string, ap);
2855 if (this_is_asm_operands)
2856 error_for_asm (this_is_asm_operands, "%s", new_message);
2857 else
2858 internal_error ("%s", new_message);
2860 free (fmt_string);
2861 free (new_message);
2862 va_end (ap);
2865 /* Output of assembler code from a template, and its subroutines. */
2867 /* Annotate the assembly with a comment describing the pattern and
2868 alternative used. */
2870 static void
2871 output_asm_name (void)
2873 if (debug_insn)
2875 int num = INSN_CODE (debug_insn);
2876 fprintf (asm_out_file, "\t%s %d\t%s",
2877 ASM_COMMENT_START, INSN_UID (debug_insn),
2878 insn_data[num].name);
2879 if (insn_data[num].n_alternatives > 1)
2880 fprintf (asm_out_file, "/%d", which_alternative + 1);
2881 #ifdef HAVE_ATTR_length
2882 fprintf (asm_out_file, "\t[length = %d]",
2883 get_attr_length (debug_insn));
2884 #endif
2885 /* Clear this so only the first assembler insn
2886 of any rtl insn will get the special comment for -dp. */
2887 debug_insn = 0;
2891 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2892 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2893 corresponds to the address of the object and 0 if to the object. */
2895 static tree
2896 get_mem_expr_from_op (rtx op, int *paddressp)
2898 tree expr;
2899 int inner_addressp;
2901 *paddressp = 0;
2903 if (REG_P (op))
2904 return REG_EXPR (op);
2905 else if (!MEM_P (op))
2906 return 0;
2908 if (MEM_EXPR (op) != 0)
2909 return MEM_EXPR (op);
2911 /* Otherwise we have an address, so indicate it and look at the address. */
2912 *paddressp = 1;
2913 op = XEXP (op, 0);
2915 /* First check if we have a decl for the address, then look at the right side
2916 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2917 But don't allow the address to itself be indirect. */
2918 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
2919 return expr;
2920 else if (GET_CODE (op) == PLUS
2921 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
2922 return expr;
2924 while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY
2925 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
2926 op = XEXP (op, 0);
2928 expr = get_mem_expr_from_op (op, &inner_addressp);
2929 return inner_addressp ? 0 : expr;
2932 /* Output operand names for assembler instructions. OPERANDS is the
2933 operand vector, OPORDER is the order to write the operands, and NOPS
2934 is the number of operands to write. */
2936 static void
2937 output_asm_operand_names (rtx *operands, int *oporder, int nops)
2939 int wrote = 0;
2940 int i;
2942 for (i = 0; i < nops; i++)
2944 int addressp;
2945 rtx op = operands[oporder[i]];
2946 tree expr = get_mem_expr_from_op (op, &addressp);
2948 fprintf (asm_out_file, "%c%s",
2949 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
2950 wrote = 1;
2951 if (expr)
2953 fprintf (asm_out_file, "%s",
2954 addressp ? "*" : "");
2955 print_mem_expr (asm_out_file, expr);
2956 wrote = 1;
2958 else if (REG_P (op) && ORIGINAL_REGNO (op)
2959 && ORIGINAL_REGNO (op) != REGNO (op))
2960 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
2964 /* Output text from TEMPLATE to the assembler output file,
2965 obeying %-directions to substitute operands taken from
2966 the vector OPERANDS.
2968 %N (for N a digit) means print operand N in usual manner.
2969 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2970 and print the label name with no punctuation.
2971 %cN means require operand N to be a constant
2972 and print the constant expression with no punctuation.
2973 %aN means expect operand N to be a memory address
2974 (not a memory reference!) and print a reference
2975 to that address.
2976 %nN means expect operand N to be a constant
2977 and print a constant expression for minus the value
2978 of the operand, with no other punctuation. */
2980 void
2981 output_asm_insn (const char *template, rtx *operands)
2983 const char *p;
2984 int c;
2985 #ifdef ASSEMBLER_DIALECT
2986 int dialect = 0;
2987 #endif
2988 int oporder[MAX_RECOG_OPERANDS];
2989 char opoutput[MAX_RECOG_OPERANDS];
2990 int ops = 0;
2992 /* An insn may return a null string template
2993 in a case where no assembler code is needed. */
2994 if (*template == 0)
2995 return;
2997 memset (opoutput, 0, sizeof opoutput);
2998 p = template;
2999 putc ('\t', asm_out_file);
3001 #ifdef ASM_OUTPUT_OPCODE
3002 ASM_OUTPUT_OPCODE (asm_out_file, p);
3003 #endif
3005 while ((c = *p++))
3006 switch (c)
3008 case '\n':
3009 if (flag_verbose_asm)
3010 output_asm_operand_names (operands, oporder, ops);
3011 if (flag_print_asm_name)
3012 output_asm_name ();
3014 ops = 0;
3015 memset (opoutput, 0, sizeof opoutput);
3017 putc (c, asm_out_file);
3018 #ifdef ASM_OUTPUT_OPCODE
3019 while ((c = *p) == '\t')
3021 putc (c, asm_out_file);
3022 p++;
3024 ASM_OUTPUT_OPCODE (asm_out_file, p);
3025 #endif
3026 break;
3028 #ifdef ASSEMBLER_DIALECT
3029 case '{':
3031 int i;
3033 if (dialect)
3034 output_operand_lossage ("nested assembly dialect alternatives");
3035 else
3036 dialect = 1;
3038 /* If we want the first dialect, do nothing. Otherwise, skip
3039 DIALECT_NUMBER of strings ending with '|'. */
3040 for (i = 0; i < dialect_number; i++)
3042 while (*p && *p != '}' && *p++ != '|')
3044 if (*p == '}')
3045 break;
3046 if (*p == '|')
3047 p++;
3050 if (*p == '\0')
3051 output_operand_lossage ("unterminated assembly dialect alternative");
3053 break;
3055 case '|':
3056 if (dialect)
3058 /* Skip to close brace. */
3061 if (*p == '\0')
3063 output_operand_lossage ("unterminated assembly dialect alternative");
3064 break;
3067 while (*p++ != '}');
3068 dialect = 0;
3070 else
3071 putc (c, asm_out_file);
3072 break;
3074 case '}':
3075 if (! dialect)
3076 putc (c, asm_out_file);
3077 dialect = 0;
3078 break;
3079 #endif
3081 case '%':
3082 /* %% outputs a single %. */
3083 if (*p == '%')
3085 p++;
3086 putc (c, asm_out_file);
3088 /* %= outputs a number which is unique to each insn in the entire
3089 compilation. This is useful for making local labels that are
3090 referred to more than once in a given insn. */
3091 else if (*p == '=')
3093 p++;
3094 fprintf (asm_out_file, "%d", insn_counter);
3096 /* % followed by a letter and some digits
3097 outputs an operand in a special way depending on the letter.
3098 Letters `acln' are implemented directly.
3099 Other letters are passed to `output_operand' so that
3100 the PRINT_OPERAND macro can define them. */
3101 else if (ISALPHA (*p))
3103 int letter = *p++;
3104 unsigned long opnum;
3105 char *endptr;
3107 opnum = strtoul (p, &endptr, 10);
3109 if (endptr == p)
3110 output_operand_lossage ("operand number missing "
3111 "after %%-letter");
3112 else if (this_is_asm_operands && opnum >= insn_noperands)
3113 output_operand_lossage ("operand number out of range");
3114 else if (letter == 'l')
3115 output_asm_label (operands[opnum]);
3116 else if (letter == 'a')
3117 output_address (operands[opnum]);
3118 else if (letter == 'c')
3120 if (CONSTANT_ADDRESS_P (operands[opnum]))
3121 output_addr_const (asm_out_file, operands[opnum]);
3122 else
3123 output_operand (operands[opnum], 'c');
3125 else if (letter == 'n')
3127 if (GET_CODE (operands[opnum]) == CONST_INT)
3128 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3129 - INTVAL (operands[opnum]));
3130 else
3132 putc ('-', asm_out_file);
3133 output_addr_const (asm_out_file, operands[opnum]);
3136 else
3137 output_operand (operands[opnum], letter);
3139 if (!opoutput[opnum])
3140 oporder[ops++] = opnum;
3141 opoutput[opnum] = 1;
3143 p = endptr;
3144 c = *p;
3146 /* % followed by a digit outputs an operand the default way. */
3147 else if (ISDIGIT (*p))
3149 unsigned long opnum;
3150 char *endptr;
3152 opnum = strtoul (p, &endptr, 10);
3153 if (this_is_asm_operands && opnum >= insn_noperands)
3154 output_operand_lossage ("operand number out of range");
3155 else
3156 output_operand (operands[opnum], 0);
3158 if (!opoutput[opnum])
3159 oporder[ops++] = opnum;
3160 opoutput[opnum] = 1;
3162 p = endptr;
3163 c = *p;
3165 /* % followed by punctuation: output something for that
3166 punctuation character alone, with no operand.
3167 The PRINT_OPERAND macro decides what is actually done. */
3168 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3169 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3170 output_operand (NULL_RTX, *p++);
3171 #endif
3172 else
3173 output_operand_lossage ("invalid %%-code");
3174 break;
3176 default:
3177 putc (c, asm_out_file);
3180 /* Write out the variable names for operands, if we know them. */
3181 if (flag_verbose_asm)
3182 output_asm_operand_names (operands, oporder, ops);
3183 if (flag_print_asm_name)
3184 output_asm_name ();
3186 putc ('\n', asm_out_file);
3189 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3191 void
3192 output_asm_label (rtx x)
3194 char buf[256];
3196 if (GET_CODE (x) == LABEL_REF)
3197 x = XEXP (x, 0);
3198 if (LABEL_P (x)
3199 || (NOTE_P (x)
3200 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3201 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3202 else
3203 output_operand_lossage ("'%%l' operand isn't a label");
3205 assemble_name (asm_out_file, buf);
3208 /* Print operand X using machine-dependent assembler syntax.
3209 The macro PRINT_OPERAND is defined just to control this function.
3210 CODE is a non-digit that preceded the operand-number in the % spec,
3211 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3212 between the % and the digits.
3213 When CODE is a non-letter, X is 0.
3215 The meanings of the letters are machine-dependent and controlled
3216 by PRINT_OPERAND. */
3218 static void
3219 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3221 if (x && GET_CODE (x) == SUBREG)
3222 x = alter_subreg (&x);
3224 /* If X is a pseudo-register, abort now rather than writing trash to the
3225 assembler file. */
3226 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3228 PRINT_OPERAND (asm_out_file, x, code);
3231 /* Print a memory reference operand for address X
3232 using machine-dependent assembler syntax.
3233 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3235 void
3236 output_address (rtx x)
3238 walk_alter_subreg (&x);
3239 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3242 /* Print an integer constant expression in assembler syntax.
3243 Addition and subtraction are the only arithmetic
3244 that may appear in these expressions. */
3246 void
3247 output_addr_const (FILE *file, rtx x)
3249 char buf[256];
3251 restart:
3252 switch (GET_CODE (x))
3254 case PC:
3255 putc ('.', file);
3256 break;
3258 case SYMBOL_REF:
3259 if (SYMBOL_REF_DECL (x))
3260 mark_decl_referenced (SYMBOL_REF_DECL (x));
3261 #ifdef ASM_OUTPUT_SYMBOL_REF
3262 ASM_OUTPUT_SYMBOL_REF (file, x);
3263 #else
3264 assemble_name (file, XSTR (x, 0));
3265 #endif
3266 break;
3268 case LABEL_REF:
3269 x = XEXP (x, 0);
3270 /* Fall through. */
3271 case CODE_LABEL:
3272 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3273 #ifdef ASM_OUTPUT_LABEL_REF
3274 ASM_OUTPUT_LABEL_REF (file, buf);
3275 #else
3276 assemble_name (file, buf);
3277 #endif
3278 break;
3280 case CONST_INT:
3281 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3282 break;
3284 case CONST:
3285 /* This used to output parentheses around the expression,
3286 but that does not work on the 386 (either ATT or BSD assembler). */
3287 output_addr_const (file, XEXP (x, 0));
3288 break;
3290 case CONST_DOUBLE:
3291 if (GET_MODE (x) == VOIDmode)
3293 /* We can use %d if the number is one word and positive. */
3294 if (CONST_DOUBLE_HIGH (x))
3295 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3296 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3297 else if (CONST_DOUBLE_LOW (x) < 0)
3298 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3299 else
3300 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3302 else
3303 /* We can't handle floating point constants;
3304 PRINT_OPERAND must handle them. */
3305 output_operand_lossage ("floating constant misused");
3306 break;
3308 case PLUS:
3309 /* Some assemblers need integer constants to appear last (eg masm). */
3310 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3312 output_addr_const (file, XEXP (x, 1));
3313 if (INTVAL (XEXP (x, 0)) >= 0)
3314 fprintf (file, "+");
3315 output_addr_const (file, XEXP (x, 0));
3317 else
3319 output_addr_const (file, XEXP (x, 0));
3320 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3321 || INTVAL (XEXP (x, 1)) >= 0)
3322 fprintf (file, "+");
3323 output_addr_const (file, XEXP (x, 1));
3325 break;
3327 case MINUS:
3328 /* Avoid outputting things like x-x or x+5-x,
3329 since some assemblers can't handle that. */
3330 x = simplify_subtraction (x);
3331 if (GET_CODE (x) != MINUS)
3332 goto restart;
3334 output_addr_const (file, XEXP (x, 0));
3335 fprintf (file, "-");
3336 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3337 || GET_CODE (XEXP (x, 1)) == PC
3338 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3339 output_addr_const (file, XEXP (x, 1));
3340 else
3342 fputs (targetm.asm_out.open_paren, file);
3343 output_addr_const (file, XEXP (x, 1));
3344 fputs (targetm.asm_out.close_paren, file);
3346 break;
3348 case ZERO_EXTEND:
3349 case SIGN_EXTEND:
3350 case SUBREG:
3351 output_addr_const (file, XEXP (x, 0));
3352 break;
3354 default:
3355 #ifdef OUTPUT_ADDR_CONST_EXTRA
3356 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3357 break;
3359 fail:
3360 #endif
3361 output_operand_lossage ("invalid expression as operand");
3365 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3366 %R prints the value of REGISTER_PREFIX.
3367 %L prints the value of LOCAL_LABEL_PREFIX.
3368 %U prints the value of USER_LABEL_PREFIX.
3369 %I prints the value of IMMEDIATE_PREFIX.
3370 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3371 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3373 We handle alternate assembler dialects here, just like output_asm_insn. */
3375 void
3376 asm_fprintf (FILE *file, const char *p, ...)
3378 char buf[10];
3379 char *q, c;
3380 va_list argptr;
3382 va_start (argptr, p);
3384 buf[0] = '%';
3386 while ((c = *p++))
3387 switch (c)
3389 #ifdef ASSEMBLER_DIALECT
3390 case '{':
3392 int i;
3394 /* If we want the first dialect, do nothing. Otherwise, skip
3395 DIALECT_NUMBER of strings ending with '|'. */
3396 for (i = 0; i < dialect_number; i++)
3398 while (*p && *p++ != '|')
3401 if (*p == '|')
3402 p++;
3405 break;
3407 case '|':
3408 /* Skip to close brace. */
3409 while (*p && *p++ != '}')
3411 break;
3413 case '}':
3414 break;
3415 #endif
3417 case '%':
3418 c = *p++;
3419 q = &buf[1];
3420 while (strchr ("-+ #0", c))
3422 *q++ = c;
3423 c = *p++;
3425 while (ISDIGIT (c) || c == '.')
3427 *q++ = c;
3428 c = *p++;
3430 switch (c)
3432 case '%':
3433 putc ('%', file);
3434 break;
3436 case 'd': case 'i': case 'u':
3437 case 'x': case 'X': case 'o':
3438 case 'c':
3439 *q++ = c;
3440 *q = 0;
3441 fprintf (file, buf, va_arg (argptr, int));
3442 break;
3444 case 'w':
3445 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3446 'o' cases, but we do not check for those cases. It
3447 means that the value is a HOST_WIDE_INT, which may be
3448 either `long' or `long long'. */
3449 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3450 q += strlen (HOST_WIDE_INT_PRINT);
3451 *q++ = *p++;
3452 *q = 0;
3453 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3454 break;
3456 case 'l':
3457 *q++ = c;
3458 #ifdef HAVE_LONG_LONG
3459 if (*p == 'l')
3461 *q++ = *p++;
3462 *q++ = *p++;
3463 *q = 0;
3464 fprintf (file, buf, va_arg (argptr, long long));
3466 else
3467 #endif
3469 *q++ = *p++;
3470 *q = 0;
3471 fprintf (file, buf, va_arg (argptr, long));
3474 break;
3476 case 's':
3477 *q++ = c;
3478 *q = 0;
3479 fprintf (file, buf, va_arg (argptr, char *));
3480 break;
3482 case 'O':
3483 #ifdef ASM_OUTPUT_OPCODE
3484 ASM_OUTPUT_OPCODE (asm_out_file, p);
3485 #endif
3486 break;
3488 case 'R':
3489 #ifdef REGISTER_PREFIX
3490 fprintf (file, "%s", REGISTER_PREFIX);
3491 #endif
3492 break;
3494 case 'I':
3495 #ifdef IMMEDIATE_PREFIX
3496 fprintf (file, "%s", IMMEDIATE_PREFIX);
3497 #endif
3498 break;
3500 case 'L':
3501 #ifdef LOCAL_LABEL_PREFIX
3502 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3503 #endif
3504 break;
3506 case 'U':
3507 fputs (user_label_prefix, file);
3508 break;
3510 #ifdef ASM_FPRINTF_EXTENSIONS
3511 /* Uppercase letters are reserved for general use by asm_fprintf
3512 and so are not available to target specific code. In order to
3513 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3514 they are defined here. As they get turned into real extensions
3515 to asm_fprintf they should be removed from this list. */
3516 case 'A': case 'B': case 'C': case 'D': case 'E':
3517 case 'F': case 'G': case 'H': case 'J': case 'K':
3518 case 'M': case 'N': case 'P': case 'Q': case 'S':
3519 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3520 break;
3522 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3523 #endif
3524 default:
3525 gcc_unreachable ();
3527 break;
3529 default:
3530 putc (c, file);
3532 va_end (argptr);
3535 /* Split up a CONST_DOUBLE or integer constant rtx
3536 into two rtx's for single words,
3537 storing in *FIRST the word that comes first in memory in the target
3538 and in *SECOND the other. */
3540 void
3541 split_double (rtx value, rtx *first, rtx *second)
3543 if (GET_CODE (value) == CONST_INT)
3545 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3547 /* In this case the CONST_INT holds both target words.
3548 Extract the bits from it into two word-sized pieces.
3549 Sign extend each half to HOST_WIDE_INT. */
3550 unsigned HOST_WIDE_INT low, high;
3551 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3553 /* Set sign_bit to the most significant bit of a word. */
3554 sign_bit = 1;
3555 sign_bit <<= BITS_PER_WORD - 1;
3557 /* Set mask so that all bits of the word are set. We could
3558 have used 1 << BITS_PER_WORD instead of basing the
3559 calculation on sign_bit. However, on machines where
3560 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3561 compiler warning, even though the code would never be
3562 executed. */
3563 mask = sign_bit << 1;
3564 mask--;
3566 /* Set sign_extend as any remaining bits. */
3567 sign_extend = ~mask;
3569 /* Pick the lower word and sign-extend it. */
3570 low = INTVAL (value);
3571 low &= mask;
3572 if (low & sign_bit)
3573 low |= sign_extend;
3575 /* Pick the higher word, shifted to the least significant
3576 bits, and sign-extend it. */
3577 high = INTVAL (value);
3578 high >>= BITS_PER_WORD - 1;
3579 high >>= 1;
3580 high &= mask;
3581 if (high & sign_bit)
3582 high |= sign_extend;
3584 /* Store the words in the target machine order. */
3585 if (WORDS_BIG_ENDIAN)
3587 *first = GEN_INT (high);
3588 *second = GEN_INT (low);
3590 else
3592 *first = GEN_INT (low);
3593 *second = GEN_INT (high);
3596 else
3598 /* The rule for using CONST_INT for a wider mode
3599 is that we regard the value as signed.
3600 So sign-extend it. */
3601 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3602 if (WORDS_BIG_ENDIAN)
3604 *first = high;
3605 *second = value;
3607 else
3609 *first = value;
3610 *second = high;
3614 else if (GET_CODE (value) != CONST_DOUBLE)
3616 if (WORDS_BIG_ENDIAN)
3618 *first = const0_rtx;
3619 *second = value;
3621 else
3623 *first = value;
3624 *second = const0_rtx;
3627 else if (GET_MODE (value) == VOIDmode
3628 /* This is the old way we did CONST_DOUBLE integers. */
3629 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3631 /* In an integer, the words are defined as most and least significant.
3632 So order them by the target's convention. */
3633 if (WORDS_BIG_ENDIAN)
3635 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3636 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3638 else
3640 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3641 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3644 else
3646 REAL_VALUE_TYPE r;
3647 long l[2];
3648 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3650 /* Note, this converts the REAL_VALUE_TYPE to the target's
3651 format, splits up the floating point double and outputs
3652 exactly 32 bits of it into each of l[0] and l[1] --
3653 not necessarily BITS_PER_WORD bits. */
3654 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3656 /* If 32 bits is an entire word for the target, but not for the host,
3657 then sign-extend on the host so that the number will look the same
3658 way on the host that it would on the target. See for instance
3659 simplify_unary_operation. The #if is needed to avoid compiler
3660 warnings. */
3662 #if HOST_BITS_PER_LONG > 32
3663 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3665 if (l[0] & ((long) 1 << 31))
3666 l[0] |= ((long) (-1) << 32);
3667 if (l[1] & ((long) 1 << 31))
3668 l[1] |= ((long) (-1) << 32);
3670 #endif
3672 *first = GEN_INT (l[0]);
3673 *second = GEN_INT (l[1]);
3677 /* Return nonzero if this function has no function calls. */
3680 leaf_function_p (void)
3682 rtx insn;
3683 rtx link;
3685 if (current_function_profile || profile_arc_flag)
3686 return 0;
3688 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3690 if (CALL_P (insn)
3691 && ! SIBLING_CALL_P (insn))
3692 return 0;
3693 if (NONJUMP_INSN_P (insn)
3694 && GET_CODE (PATTERN (insn)) == SEQUENCE
3695 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3696 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3697 return 0;
3699 for (link = current_function_epilogue_delay_list;
3700 link;
3701 link = XEXP (link, 1))
3703 insn = XEXP (link, 0);
3705 if (CALL_P (insn)
3706 && ! SIBLING_CALL_P (insn))
3707 return 0;
3708 if (NONJUMP_INSN_P (insn)
3709 && GET_CODE (PATTERN (insn)) == SEQUENCE
3710 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3711 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3712 return 0;
3715 return 1;
3718 /* Return 1 if branch is a forward branch.
3719 Uses insn_shuid array, so it works only in the final pass. May be used by
3720 output templates to customary add branch prediction hints.
3723 final_forward_branch_p (rtx insn)
3725 int insn_id, label_id;
3727 gcc_assert (uid_shuid);
3728 insn_id = INSN_SHUID (insn);
3729 label_id = INSN_SHUID (JUMP_LABEL (insn));
3730 /* We've hit some insns that does not have id information available. */
3731 gcc_assert (insn_id && label_id);
3732 return insn_id < label_id;
3735 /* On some machines, a function with no call insns
3736 can run faster if it doesn't create its own register window.
3737 When output, the leaf function should use only the "output"
3738 registers. Ordinarily, the function would be compiled to use
3739 the "input" registers to find its arguments; it is a candidate
3740 for leaf treatment if it uses only the "input" registers.
3741 Leaf function treatment means renumbering so the function
3742 uses the "output" registers instead. */
3744 #ifdef LEAF_REGISTERS
3746 /* Return 1 if this function uses only the registers that can be
3747 safely renumbered. */
3750 only_leaf_regs_used (void)
3752 int i;
3753 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3755 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3756 if ((regs_ever_live[i] || global_regs[i])
3757 && ! permitted_reg_in_leaf_functions[i])
3758 return 0;
3760 if (current_function_uses_pic_offset_table
3761 && pic_offset_table_rtx != 0
3762 && REG_P (pic_offset_table_rtx)
3763 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3764 return 0;
3766 return 1;
3769 /* Scan all instructions and renumber all registers into those
3770 available in leaf functions. */
3772 static void
3773 leaf_renumber_regs (rtx first)
3775 rtx insn;
3777 /* Renumber only the actual patterns.
3778 The reg-notes can contain frame pointer refs,
3779 and renumbering them could crash, and should not be needed. */
3780 for (insn = first; insn; insn = NEXT_INSN (insn))
3781 if (INSN_P (insn))
3782 leaf_renumber_regs_insn (PATTERN (insn));
3783 for (insn = current_function_epilogue_delay_list;
3784 insn;
3785 insn = XEXP (insn, 1))
3786 if (INSN_P (XEXP (insn, 0)))
3787 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3790 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3791 available in leaf functions. */
3793 void
3794 leaf_renumber_regs_insn (rtx in_rtx)
3796 int i, j;
3797 const char *format_ptr;
3799 if (in_rtx == 0)
3800 return;
3802 /* Renumber all input-registers into output-registers.
3803 renumbered_regs would be 1 for an output-register;
3804 they */
3806 if (REG_P (in_rtx))
3808 int newreg;
3810 /* Don't renumber the same reg twice. */
3811 if (in_rtx->used)
3812 return;
3814 newreg = REGNO (in_rtx);
3815 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3816 to reach here as part of a REG_NOTE. */
3817 if (newreg >= FIRST_PSEUDO_REGISTER)
3819 in_rtx->used = 1;
3820 return;
3822 newreg = LEAF_REG_REMAP (newreg);
3823 gcc_assert (newreg >= 0);
3824 regs_ever_live[REGNO (in_rtx)] = 0;
3825 regs_ever_live[newreg] = 1;
3826 REGNO (in_rtx) = newreg;
3827 in_rtx->used = 1;
3830 if (INSN_P (in_rtx))
3832 /* Inside a SEQUENCE, we find insns.
3833 Renumber just the patterns of these insns,
3834 just as we do for the top-level insns. */
3835 leaf_renumber_regs_insn (PATTERN (in_rtx));
3836 return;
3839 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3841 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3842 switch (*format_ptr++)
3844 case 'e':
3845 leaf_renumber_regs_insn (XEXP (in_rtx, i));
3846 break;
3848 case 'E':
3849 if (NULL != XVEC (in_rtx, i))
3851 for (j = 0; j < XVECLEN (in_rtx, i); j++)
3852 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
3854 break;
3856 case 'S':
3857 case 's':
3858 case '0':
3859 case 'i':
3860 case 'w':
3861 case 'n':
3862 case 'u':
3863 break;
3865 default:
3866 gcc_unreachable ();
3869 #endif
3872 /* When -gused is used, emit debug info for only used symbols. But in
3873 addition to the standard intercepted debug_hooks there are some direct
3874 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3875 Those routines may also be called from a higher level intercepted routine. So
3876 to prevent recording data for an inner call to one of these for an intercept,
3877 we maintain an intercept nesting counter (debug_nesting). We only save the
3878 intercepted arguments if the nesting is 1. */
3879 int debug_nesting = 0;
3881 static tree *symbol_queue;
3882 int symbol_queue_index = 0;
3883 static int symbol_queue_size = 0;
3885 /* Generate the symbols for any queued up type symbols we encountered
3886 while generating the type info for some originally used symbol.
3887 This might generate additional entries in the queue. Only when
3888 the nesting depth goes to 0 is this routine called. */
3890 void
3891 debug_flush_symbol_queue (void)
3893 int i;
3895 /* Make sure that additionally queued items are not flushed
3896 prematurely. */
3898 ++debug_nesting;
3900 for (i = 0; i < symbol_queue_index; ++i)
3902 /* If we pushed queued symbols then such symbols are must be
3903 output no matter what anyone else says. Specifically,
3904 we need to make sure dbxout_symbol() thinks the symbol was
3905 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3906 which may be set for outside reasons. */
3907 int saved_tree_used = TREE_USED (symbol_queue[i]);
3908 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
3909 TREE_USED (symbol_queue[i]) = 1;
3910 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
3912 #ifdef DBX_DEBUGGING_INFO
3913 dbxout_symbol (symbol_queue[i], 0);
3914 #endif
3916 TREE_USED (symbol_queue[i]) = saved_tree_used;
3917 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
3920 symbol_queue_index = 0;
3921 --debug_nesting;
3924 /* Queue a type symbol needed as part of the definition of a decl
3925 symbol. These symbols are generated when debug_flush_symbol_queue()
3926 is called. */
3928 void
3929 debug_queue_symbol (tree decl)
3931 if (symbol_queue_index >= symbol_queue_size)
3933 symbol_queue_size += 10;
3934 symbol_queue = xrealloc (symbol_queue,
3935 symbol_queue_size * sizeof (tree));
3938 symbol_queue[symbol_queue_index++] = decl;
3941 /* Free symbol queue. */
3942 void
3943 debug_free_queue (void)
3945 if (symbol_queue)
3947 free (symbol_queue);
3948 symbol_queue = NULL;
3949 symbol_queue_size = 0;