1 /* Definitions of target machine for GNU compiler
, for ARM.
2 Copyright (C
) 2002, 2004, 2007 Free Software Foundation
, Inc.
3 Contributed by Pieter `Tiggr
' Schoenmakers (rcpieter@win.tue.nl)
4 and Martin Simmons (@harleqn.co.uk).
5 More major hacks by Richard Earnshaw (rearnsha@arm.com)
6 Minor hacks by Nick Clifton (nickc@cygnus.com)
8 This file is part of GCC.
10 GCC is free software; you can redistribute it and/or modify it
11 under the terms of the GNU General Public License as published
12 by the Free Software Foundation; either version 3, or (at your
13 option) any later version.
15 GCC is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING3. If not see
22 <http://www.gnu.org/licenses/>. */
24 /* Extended precision floating point.
25 FIXME What format is this? */
26 FLOAT_MODE (XF, 12, 0);
28 /* CCFPEmode should be used with floating inequalities,
29 CCFPmode should be used with floating equalities.
30 CC_NOOVmode should be used with SImode integer equalities.
31 CC_Zmode should be used if only the Z flag is set correctly
32 CC_Nmode should be used if only the N (sign) flag is set correctly
33 CCmode should be used otherwise. */
54 VECTOR_MODES (INT, 4); /* V4QI V2HI */
55 VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */
56 VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */
57 VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */
58 VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */
60 /* Opaque integer modes for 3, 4, 6 or 8 Neon double registers (2 is
65 /* ??? This should actually have 512 bits but the precision only has 9
67 FRACTIONAL_INT_MODE (XI, 511, 64);