1 # Copyright
(C
) 1999-2014 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 if { [llength $
args] > 0 } {
45 set options
[list
"additional_flags=[lindex $args 0]"]
49 switch -glob
-- $contents
{
50 "*! Fortran*" { set src ${basename}[pid].f90 }
51 "*// C++*" { set src ${basename}[pid].cc }
52 "*// ObjC++*" { set src ${basename}[pid].mm }
53 "*/* ObjC*" { set src ${basename}[pid].m }
54 "*// Go*" { set src ${basename}[pid].go }
57 "objc" { set src ${basename}[pid].m }
58 "obj-c++" { set src ${basename}[pid].mm }
59 default
{ set src $
{basename
}[pid
].c
}
64 set compile_type $type
66 assembly
{ set output $
{basename
}[pid
].s
}
67 object
{ set output $
{basename
}[pid
].o
}
68 executable
{ set output $
{basename
}[pid
].exe
}
70 set output $
{basename
}[pid
].s
71 lappend options
"additional_flags=-fdump-$type"
72 set compile_type assembly
78 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
81 set scan_output $output
82 # Don
't try folding this into the switch above; calling "glob" before the
83 # file is created won't work.
84 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
85 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
89 return [list $lines $scan_output
]
92 proc current_target_name
{ } {
94 if [info exists target_info
(target
,name)] {
95 set answer $target_info
(target
,name)
102 # Implement an effective
-target check
for property PROP by invoking
103 # the Tcl command
ARGS and seeing
if it returns true.
105 proc check_cached_effective_target
{ prop
args } {
108 set target
[current_target_name
]
109 if {![info exists et_cache
($prop
,target
)]
110 || $et_cache
($prop
,target
) != $target
} {
111 verbose
"check_cached_effective_target $prop: checking $target" 2
112 set et_cache
($prop
,target
) $target
113 set et_cache
($prop
,value
) [uplevel eval $
args]
115 set value $et_cache
($prop
,value
)
116 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
120 # Like check_compile
, but
delete the output file and
return true
if the
121 # compiler printed no messages.
122 proc check_no_compiler_messages_nocache
{args} {
123 set result
[eval check_compile $
args]
124 set lines
[lindex $result
0]
125 set output
[lindex $result
1]
126 remote_file build
delete $output
127 return [string match
"" $lines]
130 # Like check_no_compiler_messages_nocache
, but
cache the result.
131 # PROP is the
property we
're checking, and doubles as a prefix for
132 # temporary filenames.
133 proc check_no_compiler_messages {prop args} {
134 return [check_cached_effective_target $prop {
135 eval [list check_no_compiler_messages_nocache $prop] $args
139 # Like check_compile, but return true if the compiler printed no
140 # messages and if the contents of the output file satisfy PATTERN.
141 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
142 # don't match regular expression REGEXP
, otherwise they satisfy it
143 #
if they
do match regular expression PATTERN.
(PATTERN can start
144 # with something like
"[!]" if the regular expression needs to match
145 #
"!" as the first character.)
147 #
Delete the output file before returning. The other arguments are
148 # as
for check_compile.
149 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
152 set result
[eval
[list check_compile $basename
] $
args]
153 set lines
[lindex $result
0]
154 set output
[lindex $result
1]
157 if { [string match
"" $lines] } {
158 set chan
[open
"$output"]
159 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
160 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
164 remote_file build
delete $output
168 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
169 # PROP is the
property we
're checking, and doubles as a prefix for
170 # temporary filenames.
171 proc check_no_messages_and_pattern {prop pattern args} {
172 return [check_cached_effective_target $prop {
173 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
177 # Try to compile and run an executable from code CONTENTS. Return true
178 # if the compiler reports no messages and if execution "passes" in the
179 # usual DejaGNU sense. The arguments are as for check_compile, with
180 # TYPE implicitly being "executable".
181 proc check_runtime_nocache {basename contents args} {
184 set result [eval [list check_compile $basename executable $contents] $args]
185 set lines [lindex $result 0]
186 set output [lindex $result 1]
189 if { [string match "" $lines] } {
190 # No error messages, everything is OK.
191 set result [remote_load target "./$output" "" ""]
192 set status [lindex $result 0]
193 verbose "check_runtime_nocache $basename: status is <$status>" 2
194 if { $status == "pass" } {
198 remote_file build delete $output
202 # Like check_runtime_nocache, but cache the result. PROP is the
203 # property we're checking
, and doubles as a prefix
for temporary
205 proc check_runtime
{prop
args} {
208 return [check_cached_effective_target $prop
{
209 eval
[list check_runtime_nocache $prop
] $
args
213 ###############################
214 # proc check_weak_available
{ }
215 ###############################
217 # weak symbols are only supported in some configs
/object formats
218 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
220 proc check_weak_available
{ } {
223 # All mips targets should support it
225 if { [ string first
"mips" $target_cpu ] >= 0 } {
229 # All AIX targets should support it
231 if { [istarget
*-*-aix
*] } {
235 # All solaris2 targets should support it
237 if { [istarget
*-*-solaris2
*] } {
241 # Windows targets Cygwin and MingW32 support it
243 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
247 # HP
-UX
10.X doesn
't support it
249 if { [istarget hppa*-*-hpux10*] } {
253 # ELF and ECOFF support it. a.out does with gas/gld but may also with
254 # other linkers, so we should try it
256 set objformat [gcc_target_object_format]
264 unknown { return -1 }
269 ###############################
270 # proc check_weak_override_available { }
271 ###############################
273 # Like check_weak_available, but return 0 if weak symbol definitions
274 # cannot be overridden.
276 proc check_weak_override_available { } {
277 if { [istarget *-*-mingw*] } {
280 return [check_weak_available]
283 ###############################
284 # proc check_visibility_available { what_kind }
285 ###############################
287 # The visibility attribute is only support in some object formats
288 # This proc returns 1 if it is supported, 0 if not.
289 # The argument is the kind of visibility, default/protected/hidden/internal.
291 proc check_visibility_available { what_kind } {
292 if [string match "" $what_kind] { set what_kind "hidden" }
294 return [check_no_compiler_messages visibility_available_$what_kind object "
295 void f() __attribute__((visibility(\"$what_kind\")));
300 ###############################
301 # proc check_alias_available { }
302 ###############################
304 # Determine if the target toolchain supports the alias attribute.
306 # Returns 2 if the target supports aliases. Returns 1 if the target
307 # only supports weak aliased. Returns 0 if the target does not
308 # support aliases at all. Returns -1 if support for aliases could not
311 proc check_alias_available { } {
312 global alias_available_saved
315 if [info exists alias_available_saved] {
316 verbose "check_alias_available returning saved $alias_available_saved" 2
320 verbose "check_alias_available compiling testfile $src" 2
321 set f [open $src "w"]
322 # Compile a small test program. The definition of "g" is
323 # necessary to keep the Solaris assembler from complaining
325 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
326 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
328 set lines [${tool}_target_compile $src $obj object ""]
330 remote_file build delete $obj
332 if [string match "" $lines] then {
333 # No error messages, everything is OK.
334 set alias_available_saved 2
336 if [regexp "alias definitions not supported" $lines] {
337 verbose "check_alias_available target does not support aliases" 2
339 set objformat [gcc_target_object_format]
341 if { $objformat == "elf" } {
342 verbose "check_alias_available but target uses ELF format, so it ought to" 2
343 set alias_available_saved -1
345 set alias_available_saved 0
348 if [regexp "only weak aliases are supported" $lines] {
349 verbose "check_alias_available target supports only weak aliases" 2
350 set alias_available_saved 1
352 set alias_available_saved -1
357 verbose "check_alias_available returning $alias_available_saved" 2
360 return $alias_available_saved
363 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
365 proc check_effective_target_alias { } {
366 if { [check_alias_available] < 2 } {
373 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
375 proc check_ifunc_available { } {
376 return [check_no_compiler_messages ifunc_available object {
381 void f() __attribute__((ifunc("g")));
385 # Returns true if tool chain supports "e" section attribute.
387 proc check_section_exclude_available { } {
388 return [check_runtime_nocache section_exclude_available {
389 asm(".section \".gnu.callgraph.text.main\", \"e\"");
397 # If this target uses a linker that supports plugins and can load
398 # the function reordering linker plugin.
400 proc check_linker_function_reordering_plugin_supported {} {
401 return [check_runtime_nocache function_reordering_plugin_supported {
406 } "-freorder-functions=callgraph"]
409 # Returns true if --gc-sections is supported on the target.
411 proc check_gc_sections_available { } {
412 global gc_sections_available_saved
415 if {![info exists gc_sections_available_saved]} {
416 # Some targets don't support gc
-sections despite whatever
's
417 # advertised by ld's options.
418 if { [istarget alpha
*-*-*]
419 ||
[istarget ia64
-*-*] } {
420 set gc_sections_available_saved
0
424 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
426 if { [board_info target
exists ldflags
]
427 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
428 set gc_sections_available_saved
0
432 # VxWorks kernel modules are relocatable objects linked with
-r
,
433 #
while RTP executables are linked with
-q
(--emit
-relocs
).
434 # Both of these options are incompatible with
--gc
-sections.
435 if { [istarget
*-*-vxworks
*] } {
436 set gc_sections_available_saved
0
440 # Check
if the
ld used by gcc supports
--gc
-sections.
441 set gcc_spec
[$
{tool
}_target_compile
"-dumpspecs" "" "none" ""]
442 regsub
".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
443 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=$linker" "" "none" ""] 0]
444 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
445 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
446 set gc_sections_available_saved
1
448 set gc_sections_available_saved
0
451 return $gc_sections_available_saved
454 #
Return 1 if according to target_info struct and explicit target list
455 # target is supposed to support trampolines.
457 proc check_effective_target_trampolines
{ } {
458 if [target_info
exists no_trampolines
] {
461 if { [istarget avr
-*-*]
462 ||
[istarget msp430
-*-*]
463 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
464 ||
[istarget hppa64
-hp
-hpux11.23
] } {
470 #
Return 1 if according to target_info struct and explicit target list
471 # target is supposed to keep null pointer checks. This could be due to
472 # use of option fno
-delete-null
-pointer
-checks or hardwired in target.
474 proc check_effective_target_keeps_null_pointer_checks
{ } {
475 if [target_info
exists keeps_null_pointer_checks
] {
478 if { [istarget avr
-*-*] } {
484 #
Return true
if profiling is supported
on the target.
486 proc check_profiling_available
{ test_what
} {
487 global profiling_available_saved
489 verbose
"Profiling argument is <$test_what>" 1
491 # These conditions depend
on the
argument so examine them before
492 # looking at the
cache variable.
494 # Tree profiling requires TLS runtime support.
495 if { $test_what
== "-fprofile-generate" } {
496 if { ![check_effective_target_tls_runtime
] } {
501 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
502 # vendor compiler. We cannot reliably predict the directory where the
503 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
504 # necessarily find mcrt1.o even if we have it.
505 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
509 # We don't yet support profiling
for MIPS16.
510 if { [istarget mips
*-*-*]
511 && ![check_effective_target_nomips16
]
512 && ($test_what
== "-p" || $test_what == "-pg") } {
516 # MinGW does not support
-p.
517 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
521 # cygwin does not support
-p.
522 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
526 # uClibc does not have gcrt1.o.
527 if { [check_effective_target_uclibc
]
528 && ($test_what
== "-p" || $test_what == "-pg") } {
532 # Now examine the
cache variable.
533 if {![info exists profiling_available_saved
]} {
534 # Some targets don
't have any implementation of __bb_init_func or are
535 # missing other needed machinery.
536 if { [istarget aarch64*-*-elf]
537 || [istarget am3*-*-linux*]
538 || [istarget arm*-*-eabi*]
539 || [istarget arm*-*-elf]
540 || [istarget arm*-*-symbianelf*]
541 || [istarget avr-*-*]
542 || [istarget bfin-*-*]
543 || [istarget cris-*-*]
544 || [istarget crisv32-*-*]
545 || [istarget fido-*-elf]
546 || [istarget h8300-*-*]
547 || [istarget lm32-*-*]
548 || [istarget m32c-*-elf]
549 || [istarget m68k-*-elf]
550 || [istarget m68k-*-uclinux*]
551 || [istarget mep-*-elf]
552 || [istarget mips*-*-elf*]
553 || [istarget mmix-*-*]
554 || [istarget mn10300-*-elf*]
555 || [istarget moxie-*-elf*]
556 || [istarget msp430-*-*]
557 || [istarget nds32*-*-elf]
558 || [istarget nios2-*-elf]
559 || [istarget picochip-*-*]
560 || [istarget powerpc-*-eabi*]
561 || [istarget powerpc-*-elf]
563 || [istarget tic6x-*-elf]
564 || [istarget xstormy16-*]
565 || [istarget xtensa*-*-elf]
566 || [istarget *-*-rtems*]
567 || [istarget *-*-vxworks*] } {
568 set profiling_available_saved 0
570 set profiling_available_saved 1
574 return $profiling_available_saved
577 # Check to see if a target is "freestanding". This is as per the definition
578 # in Section 4 of C99 standard. Effectively, it is a target which supports no
579 # extra headers or libraries other than what is considered essential.
580 proc check_effective_target_freestanding { } {
581 if { [istarget picochip-*-*] } then {
588 # Return 1 if target has packed layout of structure members by
589 # default, 0 otherwise. Note that this is slightly different than
590 # whether the target has "natural alignment": both attributes may be
593 proc check_effective_target_default_packed { } {
594 return [check_no_compiler_messages default_packed assembly {
595 struct x { char a; long b; } c;
596 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
600 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
601 # documentation, where the test also comes from.
603 proc check_effective_target_pcc_bitfield_type_matters { } {
604 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
605 # bitfields
, but let
's stick to the example code from the docs.
606 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
607 struct foo1 { char x; char :0; char y; };
608 struct foo2 { char x; int :0; char y; };
609 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
613 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
615 proc add_options_for_tls { flags } {
616 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
617 # libthread, so always pass -pthread for native TLS. Same for AIX.
618 # Need to duplicate native TLS check from
619 # check_effective_target_tls_native to avoid recursion.
620 if { ([istarget *-*-solaris2.9*] || [istarget powerpc-ibm-aix*]) &&
621 [check_no_messages_and_pattern tls_native "!emutls" assembly {
623 int f (void) { return i; }
624 void g (int j) { i = j; }
626 return "$flags -pthread"
631 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
633 proc check_effective_target_tls {} {
634 return [check_no_compiler_messages tls assembly {
636 int f (void) { return i; }
637 void g (int j) { i = j; }
641 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
643 proc check_effective_target_tls_native {} {
644 # VxWorks uses emulated TLS machinery, but with non-standard helper
645 # functions, so we fail to automatically detect it.
646 if { [istarget *-*-vxworks*] } {
650 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
652 int f (void) { return i; }
653 void g (int j) { i = j; }
657 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
659 proc check_effective_target_tls_emulated {} {
660 # VxWorks uses emulated TLS machinery, but with non-standard helper
661 # functions, so we fail to automatically detect it.
662 if { [istarget *-*-vxworks*] } {
666 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
668 int f (void) { return i; }
669 void g (int j) { i = j; }
673 # Return 1 if TLS executables can run correctly, 0 otherwise.
675 proc check_effective_target_tls_runtime {} {
676 # MSP430 runtime does not have TLS support, but just
677 # running the test below is insufficient to show this.
678 if { [istarget msp430-*-*] } {
681 return [check_runtime tls_runtime {
682 __thread int thr = 0;
683 int main (void) { return thr; }
684 } [add_options_for_tls ""]]
687 # Return 1 if atomic compare-and-swap is supported on 'int'
689 proc check_effective_target_cas_char {} {
690 return [check_no_compiler_messages cas_char assembly {
691 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
697 proc check_effective_target_cas_int {} {
698 return [check_no_compiler_messages cas_int assembly {
699 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
701 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
709 # Return 1 if -ffunction-sections is supported, 0 otherwise.
711 proc check_effective_target_function_sections {} {
712 # Darwin has its own scheme and silently accepts -ffunction-sections.
713 if { [istarget *-*-darwin*] } {
717 return [check_no_compiler_messages functionsections assembly {
719 } "-ffunction-sections"]
722 # Return 1 if instruction scheduling is available, 0 otherwise.
724 proc check_effective_target_scheduling {} {
725 return [check_no_compiler_messages scheduling object {
727 } "-fschedule-insns"]
730 # Return 1 if trapping arithmetic is available, 0 otherwise.
732 proc check_effective_target_trapping {} {
733 return [check_no_compiler_messages scheduling object {
734 add (int a, int b) { return a + b; }
738 # Return 1 if compilation with -fgraphite is error-free for trivial
741 proc check_effective_target_fgraphite {} {
742 return [check_no_compiler_messages fgraphite object {
747 # Return 1 if compilation with -fopenmp is error-free for trivial
750 proc check_effective_target_fopenmp {} {
751 return [check_no_compiler_messages fopenmp object {
756 # Return 1 if compilation with -fgnu-tm is error-free for trivial
759 proc check_effective_target_fgnu_tm {} {
760 return [check_no_compiler_messages fgnu_tm object {
765 # Return 1 if the target supports mmap, 0 otherwise.
767 proc check_effective_target_mmap {} {
768 return [check_function_available "mmap"]
771 # Return 1 if the target supports dlopen, 0 otherwise.
772 proc check_effective_target_dlopen {} {
773 return [check_no_compiler_messages dlopen executable {
775 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
776 } [add_options_for_dlopen ""]]
779 proc add_options_for_dlopen { flags } {
783 # Return 1 if the target supports clone, 0 otherwise.
784 proc check_effective_target_clone {} {
785 return [check_function_available "clone"]
788 # Return 1 if the target supports setrlimit, 0 otherwise.
789 proc check_effective_target_setrlimit {} {
790 # Darwin has non-posix compliant RLIMIT_AS
791 if { [istarget *-*-darwin*] } {
794 return [check_function_available "setrlimit"]
797 # Return 1 if the target supports swapcontext, 0 otherwise.
798 proc check_effective_target_swapcontext {} {
799 return [check_no_compiler_messages swapcontext executable {
800 #include <ucontext.h>
803 ucontext_t orig_context,child_context;
804 if (swapcontext(&child_context, &orig_context) < 0) { }
809 # Return 1 if compilation with -pthread is error-free for trivial
812 proc check_effective_target_pthread {} {
813 return [check_no_compiler_messages pthread object {
818 # Return 1 if compilation with -mpe-aligned-commons is error-free
819 # for trivial code, 0 otherwise.
821 proc check_effective_target_pe_aligned_commons {} {
822 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
823 return [check_no_compiler_messages pe_aligned_commons object {
825 } "-mpe-aligned-commons"]
830 # Return 1 if the target supports -static
831 proc check_effective_target_static {} {
832 return [check_no_compiler_messages static executable {
833 int main (void) { return 0; }
837 # Return 1 if the target supports -fstack-protector
838 proc check_effective_target_fstack_protector {} {
839 return [check_runtime fstack_protector {
840 int main (void) { return 0; }
841 } "-fstack-protector"]
844 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
845 # for trivial code, 0 otherwise.
847 proc check_effective_target_freorder {} {
848 return [check_no_compiler_messages freorder object {
850 } "-freorder-blocks-and-partition"]
853 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
854 # emitted, 0 otherwise. Whether a shared library can actually be built is
855 # out of scope for this test.
857 proc check_effective_target_fpic { } {
858 # Note that M68K has a multilib that supports -fpic but not
859 # -fPIC, so we need to check both. We test with a program that
860 # requires GOT references.
861 foreach arg {fpic fPIC} {
862 if [check_no_compiler_messages $arg object {
863 extern int foo (void); extern int bar;
864 int baz (void) { return foo () + bar; }
872 # Return 1 if -shared is supported, as in no warnings or errors
873 # emitted, 0 otherwise.
875 proc check_effective_target_shared { } {
876 # Note that M68K has a multilib that supports -fpic but not
877 # -fPIC, so we need to check both. We test with a program that
878 # requires GOT references.
879 return [check_no_compiler_messages shared executable {
880 extern int foo (void); extern int bar;
881 int baz (void) { return foo () + bar; }
885 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
887 proc check_effective_target_pie { } {
888 if { [istarget *-*-darwin\[912\]*]
889 || [istarget *-*-linux*]
890 || [istarget *-*-gnu*] } {
896 # Return true if the target supports -mpaired-single (as used on MIPS).
898 proc check_effective_target_mpaired_single { } {
899 return [check_no_compiler_messages mpaired_single object {
904 # Return true if the target has access to FPU instructions.
906 proc check_effective_target_hard_float { } {
907 if { [istarget mips*-*-*] } {
908 return [check_no_compiler_messages hard_float assembly {
909 #if (defined __mips_soft_float || defined __mips16)
915 # This proc is actually checking the availabilty of FPU
916 # support for doubles, so on the RX we must fail if the
917 # 64-bit double multilib has been selected.
918 if { [istarget rx-*-*] } {
920 # return [check_no_compiler_messages hard_float assembly {
921 #if defined __RX_64_BIT_DOUBLES__
927 # The generic test equates hard_float with "no call for adding doubles".
928 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
929 double a (double b, double c) { return b + c; }
933 # Return true if the target is a 64-bit MIPS target.
935 proc check_effective_target_mips64 { } {
936 return [check_no_compiler_messages mips64 assembly {
943 # Return true if the target is a MIPS target that does not produce
946 proc check_effective_target_nomips16 { } {
947 return [check_no_compiler_messages nomips16 object {
951 /* A cheap way of testing for -mflip-mips16. */
952 void foo (void) { asm ("addiu $20,$20,1"); }
953 void bar (void) { asm ("addiu $20,$20,1"); }
958 # Return true if the target is a MIPS target that does not produce
961 proc check_effective_target_nomicromips { } {
962 return [check_no_compiler_messages nomicromips object {
963 #ifdef __mips_micromips
969 # Add the options needed for MIPS16 function attributes. At the moment,
970 # we don't support MIPS16 PIC.
972 proc add_options_for_mips16_attribute
{ flags
} {
973 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
976 #
Return true
if we can force a
mode that allows MIPS16 code generation.
977 # We don
't support MIPS16 PIC, and only support MIPS16 -mhard-float
980 proc check_effective_target_mips16_attribute { } {
981 return [check_no_compiler_messages mips16_attribute assembly {
985 #if defined __mips_hard_float \
986 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
987 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
990 } [add_options_for_mips16_attribute ""]]
993 # Return 1 if the target supports long double larger than double when
994 # using the new ABI, 0 otherwise.
996 proc check_effective_target_mips_newabi_large_long_double { } {
997 return [check_no_compiler_messages mips_newabi_large_long_double object {
998 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1002 # Return true if the target is a MIPS target that has access
1003 # to the LL and SC instructions.
1005 proc check_effective_target_mips_llsc { } {
1006 if { ![istarget mips*-*-*] } {
1009 # Assume that these instructions are always implemented for
1010 # non-elf* targets, via emulation if necessary.
1011 if { ![istarget *-*-elf*] } {
1014 # Otherwise assume LL/SC support for everything but MIPS I.
1015 return [check_no_compiler_messages mips_llsc assembly {
1022 # Return true if the target is a MIPS target that uses in-place relocations.
1024 proc check_effective_target_mips_rel { } {
1025 if { ![istarget mips*-*-*] } {
1028 return [check_no_compiler_messages mips_rel object {
1029 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1030 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1036 # Return true if the target is a MIPS target that uses the EABI.
1038 proc check_effective_target_mips_eabi { } {
1039 if { ![istarget mips*-*-*] } {
1042 return [check_no_compiler_messages mips_eabi object {
1049 # Return 1 if the current multilib does not generate PIC by default.
1051 proc check_effective_target_nonpic { } {
1052 return [check_no_compiler_messages nonpic assembly {
1059 # Return 1 if the target does not use a status wrapper.
1061 proc check_effective_target_unwrapped { } {
1062 if { [target_info needs_status_wrapper] != "" \
1063 && [target_info needs_status_wrapper] != "0" } {
1069 # Return true if iconv is supported on the target. In particular IBM1047.
1071 proc check_iconv_available { test_what } {
1074 # If the tool configuration file has not set libiconv, try "-liconv"
1075 if { ![info exists libiconv] } {
1076 set libiconv "-liconv"
1078 set test_what [lindex $test_what 1]
1079 return [check_runtime_nocache $test_what [subst {
1085 cd = iconv_open ("$test_what", "UTF-8");
1086 if (cd == (iconv_t) -1)
1093 # Return true if Cilk Library is supported on the target.
1094 proc check_libcilkrts_available { } {
1095 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1099 int __cilkrts_set_param (const char *, const char *);
1101 int x = __cilkrts_set_param ("nworkers", "0");
1104 } "-fcilkplus -lcilkrts" ]
1107 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1109 proc check_ascii_locale_available { } {
1113 # Return true if named sections are supported on this target.
1115 proc check_named_sections_available { } {
1116 return [check_no_compiler_messages named_sections assembly {
1117 int __attribute__ ((section("whatever"))) foo;
1121 # Return true if the "naked" function attribute is supported on this target.
1123 proc check_effective_target_naked_functions { } {
1124 return [check_no_compiler_messages naked_functions assembly {
1125 void f() __attribute__((naked));
1129 # Return 1 if the target supports Fortran real kinds larger than real(8),
1132 # When the target name changes, replace the cached result.
1134 proc check_effective_target_fortran_large_real { } {
1135 return [check_no_compiler_messages fortran_large_real executable {
1137 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1144 # Return 1 if the target supports Fortran real kind real(16),
1145 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1146 # this checks for Real(16) only; the other returned real(10) if
1147 # both real(10) and real(16) are available.
1149 # When the target name changes, replace the cached result.
1151 proc check_effective_target_fortran_real_16 { } {
1152 return [check_no_compiler_messages fortran_real_16 executable {
1161 # Return 1 if the target supports SQRT for the largest floating-point
1162 # type. (Some targets lack the libm support for this FP type.)
1163 # On most targets, this check effectively checks either whether sqrtl is
1164 # available or on __float128 systems whether libquadmath is installed,
1165 # which provides sqrtq.
1167 # When the target name changes, replace the cached result.
1169 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1170 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1172 use iso_fortran_env, only: real_kinds
1173 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1174 real(kind=maxFP), volatile :: x
1182 # Return 1 if the target supports Fortran integer kinds larger than
1183 # integer(8), 0 otherwise.
1185 # When the target name changes, replace the cached result.
1187 proc check_effective_target_fortran_large_int { } {
1188 return [check_no_compiler_messages fortran_large_int executable {
1190 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1191 integer(kind=k) :: i
1196 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1198 # When the target name changes, replace the cached result.
1200 proc check_effective_target_fortran_integer_16 { } {
1201 return [check_no_compiler_messages fortran_integer_16 executable {
1208 # Return 1 if we can statically link libgfortran, 0 otherwise.
1210 # When the target name changes, replace the cached result.
1212 proc check_effective_target_static_libgfortran { } {
1213 return [check_no_compiler_messages static_libgfortran executable {
1220 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1222 proc check_effective_target_cilkplus { } {
1223 # Skip cilk-plus tests on int16 and size16 targets for now.
1224 # The cilk-plus tests are not generic enough to cover these
1225 # cases and would throw hundreds of FAILs.
1226 if { [check_effective_target_int16]
1227 || ![check_effective_target_size32plus] } {
1231 # Skip AVR, its RAM is too small and too many tests would fail.
1232 if { [istarget avr-*-*] } {
1238 proc check_linker_plugin_available { } {
1239 return [check_no_compiler_messages_nocache linker_plugin executable {
1240 int main() { return 0; }
1241 } "-flto -fuse-linker-plugin"]
1244 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1245 # otherwise. Cache the result.
1247 proc check_750cl_hw_available { } {
1248 return [check_cached_effective_target 750cl_hw_available {
1249 # If this is not the right target then we can skip the test.
1250 if { ![istarget powerpc-*paired*] } {
1253 check_runtime_nocache 750cl_hw_available {
1257 asm volatile ("ps_mul v0,v0,v0");
1259 asm volatile ("ps_mul 0,0,0");
1268 # Return 1 if the target OS supports running SSE executables, 0
1269 # otherwise. Cache the result.
1271 proc check_sse_os_support_available { } {
1272 return [check_cached_effective_target sse_os_support_available {
1273 # If this is not the right target then we can skip the test.
1274 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1276 } elseif { [istarget i?86-*-solaris2*] } {
1277 # The Solaris 2 kernel doesn't save and restore SSE registers
1278 # before Solaris
9 4/04. Before that
, executables die with SIGILL.
1279 check_runtime_nocache sse_os_support_available
{
1282 asm volatile
("movaps %xmm0,%xmm0");
1292 #
Return 1 if the target OS supports running AVX executables
, 0
1293 # otherwise.
Cache the result.
1295 proc check_avx_os_support_available
{ } {
1296 return [check_cached_effective_target avx_os_support_available
{
1297 #
If this is not the right target
then we can skip the test.
1298 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1301 # Check that OS has AVX and SSE saving enabled.
1302 check_runtime_nocache avx_os_support_available
{
1305 unsigned
int eax
, edx
;
1307 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1308 return (eax
& 6) != 6;
1315 #
Return 1 if the target supports executing SSE instructions
, 0
1316 # otherwise.
Cache the result.
1318 proc check_sse_hw_available
{ } {
1319 return [check_cached_effective_target sse_hw_available
{
1320 #
If this is not the right target
then we can skip the test.
1321 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1324 check_runtime_nocache sse_hw_available
{
1328 unsigned
int eax
, ebx
, ecx
, edx
;
1329 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1330 return !(edx
& bit_SSE
);
1338 #
Return 1 if the target supports executing MSA instructions
, 0
1339 # otherwise.
Cache the result.
1341 proc check_msa_hw_available
{ } {
1342 return [check_cached_effective_target msa_hw_available
{
1343 #
If this is not the right target
then we can skip the test.
1344 if { !([istarget mips
*-*-*]) } {
1347 check_runtime_nocache msa_hw_available
{
1348 #
if !defined
(__mips_msa
)
1349 #error
"MSA NOT AVAIL"
1351 #
if !(((__mips
== 64) ||
(__mips
== 32)) && (__mips_isa_rev
>= 2))
1352 #error
"MSA NOT AVAIL FOR ISA REV < 2"
1354 #
if !defined
(__mips_hard_float
)
1355 #error
"MSA HARD_FLOAT REQUIRED"
1357 #
if __mips_fpr
!= 64
1358 #error
"MSA 64 FPR REQUIRED"
1364 v8i16 v
= __builtin_msa_ldi_h
(0);
1374 #
Return 1 if the target supports executing SSE2 instructions
, 0
1375 # otherwise.
Cache the result.
1377 proc check_sse2_hw_available
{ } {
1378 return [check_cached_effective_target sse2_hw_available
{
1379 #
If this is not the right target
then we can skip the test.
1380 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1383 check_runtime_nocache sse2_hw_available
{
1387 unsigned
int eax
, ebx
, ecx
, edx
;
1388 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1389 return !(edx
& bit_SSE2
);
1397 #
Return 1 if the target supports executing AVX instructions
, 0
1398 # otherwise.
Cache the result.
1400 proc check_avx_hw_available
{ } {
1401 return [check_cached_effective_target avx_hw_available
{
1402 #
If this is not the right target
then we can skip the test.
1403 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1406 check_runtime_nocache avx_hw_available
{
1410 unsigned
int eax
, ebx
, ecx
, edx
;
1411 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1412 return ((ecx
& (bit_AVX | bit_OSXSAVE
))
1413 != (bit_AVX | bit_OSXSAVE
));
1421 #
Return 1 if the target supports running SSE executables
, 0 otherwise.
1423 proc check_effective_target_sse_runtime
{ } {
1424 if { [check_effective_target_sse
]
1425 && [check_sse_hw_available
]
1426 && [check_sse_os_support_available
] } {
1432 #
Return 1 if the target supports running SSE2 executables
, 0 otherwise.
1434 proc check_effective_target_sse2_runtime
{ } {
1435 if { [check_effective_target_sse2
]
1436 && [check_sse2_hw_available
]
1437 && [check_sse_os_support_available
] } {
1443 #
Return 1 if the target supports running SSE2 executables
, 0 otherwise.
1445 proc check_effective_target_msa_runtime
{ } {
1446 if { [check_effective_target_mips_msa
]
1447 && [check_msa_hw_available
] } {
1453 #
Return 1 if msa and not mips16 and not micropmips
1455 proc check_effective_target_mips_msa_nomips16_nomicromips
{ } {
1456 return [check_effective_target_mips_msa
]
1457 && [check_effective_target_nomip16
]
1458 && [check_eefective_target_nomicromips
]
1461 #
Return 1 if the target supports running AVX executables
, 0 otherwise.
1463 proc check_effective_target_avx_runtime
{ } {
1464 if { [check_effective_target_avx
]
1465 && [check_avx_hw_available
]
1466 && [check_avx_os_support_available
] } {
1472 #
Return 1 if the target supports executing power8 vector instructions
, 0
1473 # otherwise.
Cache the result.
1475 proc check_p8vector_hw_available
{ } {
1476 return [check_cached_effective_target p8vector_hw_available
{
1477 # Some simulators are known to not support VSX
/power8 instructions.
1478 #
For now
, disable
on Darwin
1479 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
1482 set options
"-mpower8-vector"
1483 check_runtime_nocache p8vector_hw_available
{
1487 asm volatile
("xxlorc vs0,vs0,vs0");
1489 asm volatile
("xxlorc 0,0,0");
1498 #
Return 1 if the target supports executing VSX instructions
, 0
1499 # otherwise.
Cache the result.
1501 proc check_vsx_hw_available
{ } {
1502 return [check_cached_effective_target vsx_hw_available
{
1503 # Some simulators are known to not support VSX instructions.
1504 #
For now
, disable
on Darwin
1505 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
1509 check_runtime_nocache vsx_hw_available
{
1513 asm volatile
("xxlor vs0,vs0,vs0");
1515 asm volatile
("xxlor 0,0,0");
1524 #
Return 1 if the target supports executing AltiVec instructions
, 0
1525 # otherwise.
Cache the result.
1527 proc check_vmx_hw_available
{ } {
1528 return [check_cached_effective_target vmx_hw_available
{
1529 # Some simulators are known to not support VMX instructions.
1530 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] } {
1533 # Most targets don
't require special flags for this test case, but
1534 # Darwin does. Just to be sure, make sure VSX is not enabled for
1535 # the altivec tests.
1536 if { [istarget *-*-darwin*]
1537 || [istarget *-*-aix*] } {
1538 set options "-maltivec -mno-vsx"
1540 set options "-mno-vsx"
1542 check_runtime_nocache vmx_hw_available {
1546 asm volatile ("vor v0,v0,v0");
1548 asm volatile ("vor 0,0,0");
1557 proc check_ppc_recip_hw_available { } {
1558 return [check_cached_effective_target ppc_recip_hw_available {
1559 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1560 # For now, disable on Darwin
1561 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1564 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1565 check_runtime_nocache ppc_recip_hw_available {
1566 volatile double d_recip, d_rsqrt, d_four = 4.0;
1567 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1570 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1571 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1572 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1573 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1581 # Return 1 if the target supports executing AltiVec and Cell PPU
1582 # instructions, 0 otherwise. Cache the result.
1584 proc check_effective_target_cell_hw { } {
1585 return [check_cached_effective_target cell_hw_available {
1586 # Some simulators are known to not support VMX and PPU instructions.
1587 if { [istarget powerpc-*-eabi*] } {
1590 # Most targets don't require special flags
for this test
1591 # case
, but Darwin and AIX
do.
1592 if { [istarget
*-*-darwin
*]
1593 ||
[istarget
*-*-aix
*] } {
1594 set options
"-maltivec -mcpu=cell"
1596 set options
"-mcpu=cell"
1598 check_runtime_nocache cell_hw_available
{
1602 asm volatile
("vor v0,v0,v0");
1603 asm volatile
("lvlx v0,r0,r0");
1605 asm volatile
("vor 0,0,0");
1606 asm volatile
("lvlx 0,0,0");
1615 #
Return 1 if the target supports executing
64-bit instructions
, 0
1616 # otherwise.
Cache the result.
1618 proc check_effective_target_powerpc64
{ } {
1619 global powerpc64_available_saved
1622 if [info exists powerpc64_available_saved
] {
1623 verbose
"check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1625 set powerpc64_available_saved
0
1627 # Some simulators are known to not support powerpc64 instructions.
1628 if { [istarget powerpc
-*-eabi
*] ||
[istarget powerpc
-ibm
-aix
*] } {
1629 verbose
"check_effective_target_powerpc64 returning 0" 2
1630 return $powerpc64_available_saved
1633 #
Set up
, compile, and
execute a test
program containing a
64-bit
1634 # instruction.
Include the current process ID in the file
1635 # names to prevent conflicts with invocations
for multiple
1640 set f
[open $src
"w"]
1641 puts $f
"int main() {"
1642 puts $f
"#ifdef __MACH__"
1643 puts $f
" asm volatile (\"extsw r0,r0\");"
1645 puts $f
" asm volatile (\"extsw 0,0\");"
1647 puts $f
" return 0; }"
1650 set opts
"additional_flags=-mcpu=G5"
1652 verbose
"check_effective_target_powerpc64 compiling testfile $src" 2
1653 set lines
[$
{tool
}_target_compile $src $exe executable
"$opts"]
1656 if [string match
"" $lines] then {
1657 # No error message
, compilation succeeded.
1658 set result
[$
{tool
}_load
"./$exe" "" ""]
1659 set status [lindex $result
0]
1660 remote_file build
delete $exe
1661 verbose
"check_effective_target_powerpc64 testfile status is <$status>" 2
1663 if { $
status == "pass" } then {
1664 set powerpc64_available_saved
1
1667 verbose
"check_effective_target_powerpc64 testfile compilation failed" 2
1671 return $powerpc64_available_saved
1674 # GCC
3.4.0 for powerpc64
-*-linux
* included an ABI fix
for passing
1675 # complex float arguments. This affects gfortran tests that
call cabsf
1676 # in libm built by an earlier compiler.
Return 1 if libm uses the same
1677 #
argument passing as the compiler under test
, 0 otherwise.
1679 # When the target
name changes
, replace the cached result.
1681 proc check_effective_target_broken_cplxf_arg
{ } {
1682 return [check_cached_effective_target broken_cplxf_arg
{
1683 # Skip the work
for targets known not to be affected.
1684 if { ![istarget powerpc64
-*-linux
*] } {
1686 } elseif
{ ![is
-effective
-target lp64
] } {
1689 check_runtime_nocache broken_cplxf_arg
{
1690 #
include <complex.h
>
1691 extern void abort
(void
);
1692 float fabsf
(float
);
1693 float cabsf
(_Complex float
);
1700 if (fabsf
(f
- 5.0) > 0.0001)
1709 #
Return 1 is this is a TI C6X target supporting C67X instructions
1710 proc check_effective_target_ti_c67x
{ } {
1711 return [check_no_compiler_messages ti_c67x assembly
{
1712 #
if !defined
(_TMS320C6700
)
1718 #
Return 1 is this is a TI C6X target supporting C64X
+ instructions
1719 proc check_effective_target_ti_c64xp
{ } {
1720 return [check_no_compiler_messages ti_c64xp assembly
{
1721 #
if !defined
(_TMS320C6400_PLUS
)
1728 proc check_alpha_max_hw_available
{ } {
1729 return [check_runtime alpha_max_hw_available
{
1730 int main
() { return __builtin_alpha_amask
(1<<8) != 0; }
1734 # Returns true iff the FUNCTION is available
on the target
system.
1735 #
(This is essentially a Tcl implementation of Autoconf
's
1738 proc check_function_available { function } {
1739 return [check_no_compiler_messages ${function}_available \
1745 int main () { $function (); }
1749 # Returns true iff "fork" is available on the target system.
1751 proc check_fork_available {} {
1752 return [check_function_available "fork"]
1755 # Returns true iff "mkfifo" is available on the target system.
1757 proc check_mkfifo_available {} {
1758 if { [istarget *-*-cygwin*] } {
1759 # Cygwin has mkfifo, but support is incomplete.
1763 return [check_function_available "mkfifo"]
1766 # Returns true iff "__cxa_atexit" is used on the target system.
1768 proc check_cxa_atexit_available { } {
1769 return [check_cached_effective_target cxa_atexit_available {
1770 if { [istarget hppa*-*-hpux10*] } {
1771 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
1773 } elseif
{ [istarget
*-*-vxworks
] } {
1774 # vxworks doesn
't have __cxa_atexit but subsequent test passes.
1777 check_runtime_nocache cxa_atexit_available {
1780 static unsigned int count;
1797 Y() { f(); count = 2; }
1806 int main() { return 0; }
1812 proc check_effective_target_objc2 { } {
1813 return [check_no_compiler_messages objc2 object {
1822 proc check_effective_target_next_runtime { } {
1823 return [check_no_compiler_messages objc2 object {
1824 #ifdef __NEXT_RUNTIME__
1832 # Return 1 if we're generating
32-bit code using default options
, 0
1835 proc check_effective_target_ilp32
{ } {
1836 return [check_no_compiler_messages ilp32 object
{
1837 int dummy
[sizeof
(int) == 4
1838 && sizeof
(void
*) == 4
1839 && sizeof
(long
) == 4 ?
1 : -1];
1843 #
Return 1 if we
're generating ia32 code using default options, 0
1846 proc check_effective_target_ia32 { } {
1847 return [check_no_compiler_messages ia32 object {
1848 int dummy[sizeof (int) == 4
1849 && sizeof (void *) == 4
1850 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
1854 # Return 1 if we're generating x32 code using default options
, 0
1857 proc check_effective_target_x32
{ } {
1858 return [check_no_compiler_messages x32 object
{
1859 int dummy
[sizeof
(int) == 4
1860 && sizeof
(void
*) == 4
1861 && sizeof
(long
) == 4 ?
1 : -1] = { __x86_64__
};
1865 #
Return 1 if we
're generating 32-bit integers using default
1866 # options, 0 otherwise.
1868 proc check_effective_target_int32 { } {
1869 return [check_no_compiler_messages int32 object {
1870 int dummy[sizeof (int) == 4 ? 1 : -1];
1874 # Return 1 if we're generating
32-bit or larger integers using default
1875 # options
, 0 otherwise.
1877 proc check_effective_target_int32plus
{ } {
1878 return [check_no_compiler_messages int32plus object
{
1879 int dummy
[sizeof
(int) >= 4 ?
1 : -1];
1883 #
Return 1 if we
're generating 32-bit or larger pointers using default
1884 # options, 0 otherwise.
1886 proc check_effective_target_ptr32plus { } {
1887 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
1888 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
1889 # cannot really hold a 32-bit address, so we always return false here.
1890 if { [istarget msp430-*-*] } {
1894 return [check_no_compiler_messages ptr32plus object {
1895 int dummy[sizeof (void *) >= 4 ? 1 : -1];
1899 # Return 1 if we support 32-bit or larger array and structure sizes
1900 # using default options, 0 otherwise.
1902 proc check_effective_target_size32plus { } {
1903 return [check_no_compiler_messages size32plus object {
1908 # Returns 1 if we're generating
16-bit or smaller integers with the
1909 # default options
, 0 otherwise.
1911 proc check_effective_target_int16
{ } {
1912 return [check_no_compiler_messages int16 object
{
1913 int dummy
[sizeof
(int) < 4 ?
1 : -1];
1917 #
Return 1 if we
're generating 64-bit code using default options, 0
1920 proc check_effective_target_lp64 { } {
1921 return [check_no_compiler_messages lp64 object {
1922 int dummy[sizeof (int) == 4
1923 && sizeof (void *) == 8
1924 && sizeof (long) == 8 ? 1 : -1];
1928 # Return 1 if we're generating
64-bit code using default llp64 options
,
1931 proc check_effective_target_llp64
{ } {
1932 return [check_no_compiler_messages llp64 object
{
1933 int dummy
[sizeof
(int) == 4
1934 && sizeof
(void
*) == 8
1935 && sizeof
(long long
) == 8
1936 && sizeof
(long
) == 4 ?
1 : -1];
1940 #
Return 1 if long and
int have different sizes
,
1943 proc check_effective_target_long_neq_int
{ } {
1944 return [check_no_compiler_messages long_ne_int object
{
1945 int dummy
[sizeof
(int) != sizeof
(long
) ?
1 : -1];
1949 #
Return 1 if the target supports long double larger than double
,
1952 proc check_effective_target_large_long_double
{ } {
1953 return [check_no_compiler_messages large_long_double object
{
1954 int dummy
[sizeof
(long double
) > sizeof
(double
) ?
1 : -1];
1958 #
Return 1 if the target supports double larger than float
,
1961 proc check_effective_target_large_double
{ } {
1962 return [check_no_compiler_messages large_double object
{
1963 int dummy
[sizeof
(double
) > sizeof
(float
) ?
1 : -1];
1967 #
Return 1 if the target supports long double of
128 bits
,
1970 proc check_effective_target_longdouble128
{ } {
1971 return [check_no_compiler_messages longdouble128 object
{
1972 int dummy
[sizeof
(long double
) == 16 ?
1 : -1];
1976 #
Return 1 if the target supports double of
64 bits
,
1979 proc check_effective_target_double64
{ } {
1980 return [check_no_compiler_messages double64 object
{
1981 int dummy
[sizeof
(double
) == 8 ?
1 : -1];
1985 #
Return 1 if the target supports double of at least
64 bits
,
1988 proc check_effective_target_double64plus
{ } {
1989 return [check_no_compiler_messages double64plus object
{
1990 int dummy
[sizeof
(double
) >= 8 ?
1 : -1];
1994 #
Return 1 if the target supports
'w' suffix
on floating constant
1997 proc check_effective_target_has_w_floating_suffix
{ } {
1999 if [check_effective_target_c
++] {
2000 append opts
"-std=gnu++03"
2002 return [check_no_compiler_messages w_fp_suffix object
{
2007 #
Return 1 if the target supports
'q' suffix
on floating constant
2010 proc check_effective_target_has_q_floating_suffix
{ } {
2012 if [check_effective_target_c
++] {
2013 append opts
"-std=gnu++03"
2015 return [check_no_compiler_messages q_fp_suffix object
{
2019 #
Return 1 if the target supports compiling fixed
-point
,
2022 proc check_effective_target_fixed_point
{ } {
2023 return [check_no_compiler_messages fixed_point object
{
2024 _Sat _Fract x
; _Sat _Accum y
;
2028 #
Return 1 if the target supports compiling decimal floating point
,
2031 proc check_effective_target_dfp_nocache
{ } {
2032 verbose
"check_effective_target_dfp_nocache: compiling source" 2
2033 set ret
[check_no_compiler_messages_nocache dfp object
{
2034 float x __attribute__
((mode(DD
)));
2036 verbose
"check_effective_target_dfp_nocache: returning $ret" 2
2040 proc check_effective_target_dfprt_nocache
{ } {
2041 return [check_runtime_nocache dfprt
{
2042 typedef float d64 __attribute__
((mode(DD
)));
2043 d64 x
= 1.2df
, y
= 2.3dd
, z
;
2044 int main
() { z
= x
+ y
; return 0; }
2048 #
Return 1 if the target supports compiling Decimal Floating Point
,
2051 # This won
't change for different subtargets so cache the result.
2053 proc check_effective_target_dfp { } {
2054 return [check_cached_effective_target dfp {
2055 check_effective_target_dfp_nocache
2059 # Return 1 if the target supports linking and executing Decimal Floating
2060 # Point, 0 otherwise.
2062 # This won't change
for different subtargets so
cache the result.
2064 proc check_effective_target_dfprt
{ } {
2065 return [check_cached_effective_target dfprt
{
2066 check_effective_target_dfprt_nocache
2070 #
Return 1 if the target supports executing DFP hardware instructions
,
2071 #
0 otherwise.
Cache the result.
2073 proc check_dfp_hw_available
{ } {
2074 return [check_cached_effective_target dfp_hw_available
{
2075 #
For now
, disable
on Darwin
2076 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
2079 check_runtime_nocache dfp_hw_available
{
2080 volatile _Decimal64 r
;
2081 volatile _Decimal64 a
= 4.0DD
;
2082 volatile _Decimal64 b
= 2.0DD
;
2085 asm volatile
("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2086 asm volatile
("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2087 asm volatile
("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2088 asm volatile
("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2091 } "-mcpu=power6 -mhard-float"
2096 #
Return 1 if the target supports compiling and assembling UCN
, 0 otherwise.
2098 proc check_effective_target_ucn_nocache
{ } {
2099 #
-std
=c99 is only valid
for C
2100 if [check_effective_target_c
] {
2101 set ucnopts
"-std=c99"
2103 append ucnopts
" -fextended-identifiers"
2104 verbose
"check_effective_target_ucn_nocache: compiling source" 2
2105 set ret
[check_no_compiler_messages_nocache ucn object
{
2108 verbose
"check_effective_target_ucn_nocache: returning $ret" 2
2112 #
Return 1 if the target supports compiling and assembling UCN
, 0 otherwise.
2114 # This won
't change for different subtargets, so cache the result.
2116 proc check_effective_target_ucn { } {
2117 return [check_cached_effective_target ucn {
2118 check_effective_target_ucn_nocache
2122 # Return 1 if the target needs a command line argument to enable a SIMD
2125 proc check_effective_target_vect_cmdline_needed { } {
2126 global et_vect_cmdline_needed_saved
2127 global et_vect_cmdline_needed_target_name
2129 if { ![info exists et_vect_cmdline_needed_target_name] } {
2130 set et_vect_cmdline_needed_target_name ""
2133 # If the target has changed since we set the cached value, clear it.
2134 set current_target [current_target_name]
2135 if { $current_target != $et_vect_cmdline_needed_target_name } {
2136 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target
'" 2
2137 set et_vect_cmdline_needed_target_name $current_target
2138 if { [info exists et_vect_cmdline_needed_saved] } {
2139 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2140 unset et_vect_cmdline_needed_saved
2144 if [info exists et_vect_cmdline_needed_saved] {
2145 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2147 set et_vect_cmdline_needed_saved 1
2148 if { [istarget alpha*-*-*]
2149 || [istarget ia64-*-*]
2150 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2151 && ([check_effective_target_x32]
2152 || [check_effective_target_lp64]))
2153 || ([istarget powerpc*-*-*]
2154 && ([check_effective_target_powerpc_spe]
2155 || [check_effective_target_powerpc_altivec]))
2156 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2157 || [istarget spu-*-*]
2158 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2159 || [istarget aarch64*-*-*] } {
2160 set et_vect_cmdline_needed_saved 0
2164 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2165 return $et_vect_cmdline_needed_saved
2168 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2170 # This won't change
for different subtargets so
cache the result.
2172 proc check_effective_target_vect_int
{ } {
2173 global et_vect_int_saved
2175 if [info exists et_vect_int_saved
] {
2176 verbose
"check_effective_target_vect_int: using cached result" 2
2178 set et_vect_int_saved
0
2179 if { [istarget i?
86-*-*]
2180 ||
([istarget powerpc
*-*-*]
2181 && ![istarget powerpc
-*-linux
*paired
*])
2182 ||
[istarget spu
-*-*]
2183 ||
[istarget x86_64
-*-*]
2184 ||
[istarget sparc
*-*-*]
2185 ||
[istarget alpha
*-*-*]
2186 ||
[istarget ia64
-*-*]
2187 ||
[istarget aarch64
*-*-*]
2188 ||
[check_effective_target_arm32
]
2189 ||
([istarget mips
*-*-*]
2190 && ([check_effective_target_mips_msa_nomips16_nomicromips
]
2191 ||
[check_effective_target_mips_loongson
])) } {
2192 set et_vect_int_saved
1
2196 verbose
"check_effective_target_vect_int: returning $et_vect_int_saved" 2
2197 return $et_vect_int_saved
2200 #
Return 1 if the target supports signed
int->float conversion
2203 proc check_effective_target_vect_intfloat_cvt
{ } {
2204 global et_vect_intfloat_cvt_saved
2206 if [info exists et_vect_intfloat_cvt_saved
] {
2207 verbose
"check_effective_target_vect_intfloat_cvt: using cached result" 2
2209 set et_vect_intfloat_cvt_saved
0
2210 if { [istarget i?
86-*-*]
2211 ||
([istarget powerpc
*-*-*]
2212 && ![istarget powerpc
-*-linux
*paired
*])
2213 ||
[istarget x86_64
-*-*]
2214 ||
([istarget arm
*-*-*]
2215 && [check_effective_target_arm_neon_ok
])
2216 ||
([istarget mips
*-*-*]
2217 && [check_effective_target_mips_msa_nomips16_nomicromips
]) } {
2218 set et_vect_intfloat_cvt_saved
1
2222 verbose
"check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2223 return $et_vect_intfloat_cvt_saved
2226 #
Return 1 if we
're supporting __int128 for target, 0 otherwise.
2228 proc check_effective_target_int128 { } {
2229 return [check_no_compiler_messages int128 object {
2231 #ifndef __SIZEOF_INT128__
2240 # Return 1 if the target supports unsigned int->float conversion
2243 proc check_effective_target_vect_uintfloat_cvt { } {
2244 global et_vect_uintfloat_cvt_saved
2246 if [info exists et_vect_uintfloat_cvt_saved] {
2247 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2249 set et_vect_uintfloat_cvt_saved 0
2250 if { [istarget i?86-*-*]
2251 || ([istarget powerpc*-*-*]
2252 && ![istarget powerpc-*-linux*paired*])
2253 || [istarget x86_64-*-*]
2254 || [istarget aarch64*-*-*]
2255 || ([istarget arm*-*-*]
2256 && [check_effective_target_arm_neon_ok])
2257 || ([istarget mips*-*-*]
2258 && [check_effective_target_mips_msa_nomips16_nomicromips]) } {
2259 set et_vect_uintfloat_cvt_saved 1
2263 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2264 return $et_vect_uintfloat_cvt_saved
2268 # Return 1 if the target supports signed float->int conversion
2271 proc check_effective_target_vect_floatint_cvt { } {
2272 global et_vect_floatint_cvt_saved
2274 if [info exists et_vect_floatint_cvt_saved] {
2275 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2277 set et_vect_floatint_cvt_saved 0
2278 if { [istarget i?86-*-*]
2279 || ([istarget powerpc*-*-*]
2280 && ![istarget powerpc-*-linux*paired*])
2281 || [istarget x86_64-*-*]
2282 || ([istarget arm*-*-*]
2283 && [check_effective_target_arm_neon_ok])
2284 || ([istarget mips*-*-*]
2285 && [check_effective_target_mips_msa_nomips16_nomicromips]) } {
2286 set et_vect_floatint_cvt_saved 1
2290 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2291 return $et_vect_floatint_cvt_saved
2294 # Return 1 if the target supports unsigned float->int conversion
2297 proc check_effective_target_vect_floatuint_cvt { } {
2298 global et_vect_floatuint_cvt_saved
2300 if [info exists et_vect_floatuint_cvt_saved] {
2301 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2303 set et_vect_floatuint_cvt_saved 0
2304 if { ([istarget powerpc*-*-*]
2305 && ![istarget powerpc-*-linux*paired*])
2306 || ([istarget arm*-*-*]
2307 && [check_effective_target_arm_neon_ok])
2308 || ([istarget mips*-*-*]
2309 && [check_effective_target_mips_msa_nomips16_nomicromips]) } {
2310 set et_vect_floatuint_cvt_saved 1
2314 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2315 return $et_vect_floatuint_cvt_saved
2318 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2320 # This won't change
for different subtargets so
cache the result.
2322 proc check_effective_target_vect_simd_clones
{ } {
2323 global et_vect_simd_clones_saved
2325 if [info exists et_vect_simd_clones_saved
] {
2326 verbose
"check_effective_target_vect_simd_clones: using cached result" 2
2328 set et_vect_simd_clones_saved
0
2329 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
2330 #
On i?
86/x86_64 #pragma omp declare simd builds a sse2
, avx and
2331 # avx2 clone. Only the right clone
for the specified arch will be
2332 # chosen
, but still we need to at least be able to assemble
2334 if { [check_effective_target_avx2
] } {
2335 set et_vect_simd_clones_saved
1
2340 verbose
"check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2341 return $et_vect_simd_clones_saved
2344 #
Return 1 if this is a AArch64 target supporting big endian
2345 proc check_effective_target_aarch64_big_endian
{ } {
2346 return [check_no_compiler_messages aarch64_big_endian assembly
{
2347 #
if !defined
(__aarch64__
) ||
!defined
(__AARCH64EB__
)
2353 #
Return 1 if this is a AArch64 target supporting little endian
2354 proc check_effective_target_aarch64_little_endian
{ } {
2355 return [check_no_compiler_messages aarch64_little_endian assembly
{
2356 #
if !defined
(__aarch64__
) || defined
(__AARCH64EB__
)
2362 #
Return 1 is this is an arm target using
32-bit instructions
2363 proc check_effective_target_arm32
{ } {
2364 return [check_no_compiler_messages arm32 assembly
{
2365 #
if !defined
(__arm__
) ||
(defined
(__thumb__
) && !defined
(__thumb2__
))
2371 #
Return 1 is this is an arm target not using Thumb
2372 proc check_effective_target_arm_nothumb
{ } {
2373 return [check_no_compiler_messages arm_nothumb assembly
{
2374 #
if (defined
(__thumb__
) || defined
(__thumb2__
))
2380 #
Return 1 if this is a little
-endian ARM target
2381 proc check_effective_target_arm_little_endian
{ } {
2382 return [check_no_compiler_messages arm_little_endian assembly
{
2383 #
if !defined
(__arm__
) ||
!defined
(__ARMEL__
)
2389 #
Return 1 if this is an ARM target that only supports aligned vector accesses
2390 proc check_effective_target_arm_vect_no_misalign
{ } {
2391 return [check_no_compiler_messages arm_vect_no_misalign assembly
{
2392 #
if !defined
(__arm__
) \
2393 ||
(defined
(__ARMEL__
) \
2394 && (!defined
(__thumb__
) || defined
(__thumb2__
)))
2401 #
Return 1 if this is an ARM target supporting
-mfpu
=vfp
2402 #
-mfloat
-abi
=softfp. Some multilibs may be incompatible with these
2405 proc check_effective_target_arm_vfp_ok
{ } {
2406 if { [check_effective_target_arm32
] } {
2407 return [check_no_compiler_messages arm_vfp_ok object
{
2409 } "-mfpu=vfp -mfloat-abi=softfp"]
2415 #
Return 1 if this is an ARM target supporting
-mfpu
=vfp3
2416 #
-mfloat
-abi
=softfp.
2418 proc check_effective_target_arm_vfp3_ok
{ } {
2419 if { [check_effective_target_arm32
] } {
2420 return [check_no_compiler_messages arm_vfp3_ok object
{
2422 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2428 #
Return 1 if this is an ARM target supporting
-mfpu
=fp
-armv8
2429 #
-mfloat
-abi
=softfp.
2430 proc check_effective_target_arm_v8_vfp_ok
{} {
2431 if { [check_effective_target_arm32
] } {
2432 return [check_no_compiler_messages arm_v8_vfp_ok object
{
2435 __asm__ volatile
("vrinta.f32.f32 s0, s0");
2438 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2444 #
Return 1 if this is an ARM target supporting
-mfpu
=vfp
2445 #
-mfloat
-abi
=hard. Some multilibs may be incompatible with these
2448 proc check_effective_target_arm_hard_vfp_ok
{ } {
2449 if { [check_effective_target_arm32
]
2450 && ! [check
-flags
[list
"" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2451 return [check_no_compiler_messages arm_hard_vfp_ok executable
{
2452 int main
() { return 0;}
2453 } "-mfpu=vfp -mfloat-abi=hard"]
2459 #
Return 1 if this is an ARM target that supports DSP multiply with
2460 # current multilib flags.
2462 proc check_effective_target_arm_dsp
{ } {
2463 return [check_no_compiler_messages arm_dsp assembly
{
2464 #ifndef __ARM_FEATURE_DSP
2471 #
Return 1 if this is an ARM target that supports unaligned word
/halfword
2472 #
load/store instructions.
2474 proc check_effective_target_arm_unaligned
{ } {
2475 return [check_no_compiler_messages arm_unaligned assembly
{
2476 #ifndef __ARM_FEATURE_UNALIGNED
2477 #error no unaligned support
2483 #
Return 1 if this is an ARM target supporting
-mfpu
=crypto
-neon
-fp
-armv8
2484 #
-mfloat
-abi
=softfp or equivalent options. Some multilibs may be
2485 # incompatible with these options. Also
set et_arm_crypto_flags to the
2486 # best options to add.
2488 proc check_effective_target_arm_crypto_ok_nocache
{ } {
2489 global et_arm_crypto_flags
2490 set et_arm_crypto_flags
""
2491 if { [check_effective_target_arm32
] } {
2492 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2493 if { [check_no_compiler_messages_nocache arm_crypto_ok object
{
2494 #
include "arm_neon.h"
2496 foo
(uint8x16_t a
, uint8x16_t b
)
2498 return vaeseq_u8
(a
, b
);
2501 set et_arm_crypto_flags $flags
2510 #
Return 1 if this is an ARM target supporting
-mfpu
=crypto
-neon
-fp
-armv8
2512 proc check_effective_target_arm_crypto_ok
{ } {
2513 return [check_cached_effective_target arm_crypto_ok \
2514 check_effective_target_arm_crypto_ok_nocache
]
2517 # Add options
for crypto extensions.
2518 proc add_options_for_arm_crypto
{ flags
} {
2519 if { ! [check_effective_target_arm_crypto_ok
] } {
2522 global et_arm_crypto_flags
2523 return "$flags $et_arm_crypto_flags"
2526 # Add the options needed
for NEON. We need either
-mfloat
-abi
=softfp
2527 # or
-mfloat
-abi
=hard
, but
if one is already specified by the
2528 # multilib
, use it. Similarly
, if a
-mfpu option already enables
2529 # NEON
, do not add
-mfpu
=neon.
2531 proc add_options_for_arm_neon
{ flags
} {
2532 if { ! [check_effective_target_arm_neon_ok
] } {
2535 global et_arm_neon_flags
2536 return "$flags $et_arm_neon_flags"
2539 proc add_options_for_arm_v8_vfp
{ flags
} {
2540 if { ! [check_effective_target_arm_v8_vfp_ok
] } {
2543 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2546 proc add_options_for_arm_v8_neon
{ flags
} {
2547 if { ! [check_effective_target_arm_v8_neon_ok
] } {
2550 global et_arm_v8_neon_flags
2551 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2554 proc add_options_for_arm_crc
{ flags
} {
2555 if { ! [check_effective_target_arm_crc_ok
] } {
2558 global et_arm_crc_flags
2559 return "$flags $et_arm_crc_flags"
2562 # Add the options needed
for NEON. We need either
-mfloat
-abi
=softfp
2563 # or
-mfloat
-abi
=hard
, but
if one is already specified by the
2564 # multilib
, use it. Similarly
, if a
-mfpu option already enables
2565 # NEON
, do not add
-mfpu
=neon.
2567 proc add_options_for_arm_neonv2
{ flags
} {
2568 if { ! [check_effective_target_arm_neonv2_ok
] } {
2571 global et_arm_neonv2_flags
2572 return "$flags $et_arm_neonv2_flags"
2575 # Add the options needed
for vfp3.
2576 proc add_options_for_arm_vfp3
{ flags
} {
2577 if { ! [check_effective_target_arm_vfp3_ok
] } {
2580 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2583 #
Return 1 if this is an ARM target supporting
-mfpu
=neon
2584 #
-mfloat
-abi
=softfp or equivalent options. Some multilibs may be
2585 # incompatible with these options. Also
set et_arm_neon_flags to the
2586 # best options to add.
2588 proc check_effective_target_arm_neon_ok_nocache
{ } {
2589 global et_arm_neon_flags
2590 set et_arm_neon_flags
""
2591 if { [check_effective_target_arm32
] } {
2592 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2593 if { [check_no_compiler_messages_nocache arm_neon_ok object
{
2594 #
include "arm_neon.h"
2597 set et_arm_neon_flags $flags
2606 proc check_effective_target_arm_neon_ok
{ } {
2607 return [check_cached_effective_target arm_neon_ok \
2608 check_effective_target_arm_neon_ok_nocache
]
2611 proc check_effective_target_arm_crc_ok_nocache
{ } {
2612 global et_arm_crc_flags
2613 set et_arm_crc_flags
"-march=armv8-a+crc"
2614 return [check_no_compiler_messages_nocache arm_crc_ok object
{
2615 #
if !defined
(__ARM_FEATURE_CRC32
)
2618 } "$et_arm_crc_flags"]
2621 proc check_effective_target_arm_crc_ok
{ } {
2622 return [check_cached_effective_target arm_crc_ok \
2623 check_effective_target_arm_crc_ok_nocache
]
2626 #
Return 1 if this is an ARM target supporting
-mfpu
=neon
-fp16
2627 #
-mfloat
-abi
=softfp or equivalent options. Some multilibs may be
2628 # incompatible with these options. Also
set et_arm_neon_flags to the
2629 # best options to add.
2631 proc check_effective_target_arm_neon_fp16_ok_nocache
{ } {
2632 global et_arm_neon_fp16_flags
2633 set et_arm_neon_fp16_flags
""
2634 if { [check_effective_target_arm32
] } {
2635 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2636 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
2637 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object
{
2638 #
include "arm_neon.h"
2640 foo
(float32x4_t
arg)
2642 return vcvt_f16_f32
(arg);
2645 set et_arm_neon_fp16_flags $flags
2654 proc check_effective_target_arm_neon_fp16_ok
{ } {
2655 return [check_cached_effective_target arm_neon_fp16_ok \
2656 check_effective_target_arm_neon_fp16_ok_nocache
]
2659 proc add_options_for_arm_neon_fp16
{ flags
} {
2660 if { ! [check_effective_target_arm_neon_fp16_ok
] } {
2663 global et_arm_neon_fp16_flags
2664 return "$flags $et_arm_neon_fp16_flags"
2667 #
Return 1 if this is an ARM target supporting
-mfpu
=neon
-fp
-armv8
2668 #
-mfloat
-abi
=softfp or equivalent options. Some multilibs may be
2669 # incompatible with these options. Also
set et_arm_v8_neon_flags to the
2670 # best options to add.
2672 proc check_effective_target_arm_v8_neon_ok_nocache
{ } {
2673 global et_arm_v8_neon_flags
2674 set et_arm_v8_neon_flags
""
2675 if { [check_effective_target_arm32
] } {
2676 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2677 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object
{
2679 #error not armv8 or later
2681 #
include "arm_neon.h"
2685 __asm__ volatile
("vrintn.f32 q0, q0");
2687 } "$flags -march=armv8-a"] } {
2688 set et_arm_v8_neon_flags $flags
2697 proc check_effective_target_arm_v8_neon_ok
{ } {
2698 return [check_cached_effective_target arm_v8_neon_ok \
2699 check_effective_target_arm_v8_neon_ok_nocache
]
2702 #
Return 1 if this is an ARM target supporting
-mfpu
=neon
-vfpv4
2703 #
-mfloat
-abi
=softfp or equivalent options. Some multilibs may be
2704 # incompatible with these options. Also
set et_arm_neonv2_flags to the
2705 # best options to add.
2707 proc check_effective_target_arm_neonv2_ok_nocache
{ } {
2708 global et_arm_neonv2_flags
2709 set et_arm_neonv2_flags
""
2710 if { [check_effective_target_arm32
] } {
2711 foreach flags
{"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
2712 if { [check_no_compiler_messages_nocache arm_neonv2_ok object
{
2713 #
include "arm_neon.h"
2715 foo
(float32x2_t a
, float32x2_t b
, float32x2_t c
)
2717 return vfma_f32
(a
, b
, c
);
2720 set et_arm_neonv2_flags $flags
2729 proc check_effective_target_arm_neonv2_ok
{ } {
2730 return [check_cached_effective_target arm_neonv2_ok \
2731 check_effective_target_arm_neonv2_ok_nocache
]
2734 # Add the options needed
for NEON. We need either
-mfloat
-abi
=softfp
2735 # or
-mfloat
-abi
=hard
, but
if one is already specified by the
2738 proc add_options_for_arm_fp16
{ flags
} {
2739 if { ! [check_effective_target_arm_fp16_ok
] } {
2742 global et_arm_fp16_flags
2743 return "$flags $et_arm_fp16_flags"
2746 #
Return 1 if this is an ARM target that can support a VFP fp16 variant.
2747 # Skip multilibs that are incompatible with these options and
set
2748 # et_arm_fp16_flags to the best options to add.
2750 proc check_effective_target_arm_fp16_ok_nocache
{ } {
2751 global et_arm_fp16_flags
2752 set et_arm_fp16_flags
""
2753 if { ! [check_effective_target_arm32
] } {
2756 if [check
-flags
[list
"" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2757 # Multilib flags would override
-mfpu.
2760 if [check
-flags
[list
"" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2761 # Must generate floating
-point instructions.
2764 if [check_effective_target_arm_hf_eabi
] {
2765 # Use existing float
-abi and force an fpu which supports fp16
2766 set et_arm_fp16_flags
"-mfpu=vfpv4"
2769 if [check
-flags
[list
"" { *-*-* } { "-mfpu=*" } { "" } ]] {
2770 # The existing
-mfpu value is OK
; use it
, but add softfp.
2771 set et_arm_fp16_flags
"-mfloat-abi=softfp"
2774 # Add
-mfpu
for a VFP fp16 variant since there is no preprocessor
2775 # macro to check
for this support.
2776 set flags
"-mfpu=vfpv4 -mfloat-abi=softfp"
2777 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly
{
2780 set et_arm_fp16_flags
"$flags"
2787 proc check_effective_target_arm_fp16_ok
{ } {
2788 return [check_cached_effective_target arm_fp16_ok \
2789 check_effective_target_arm_fp16_ok_nocache
]
2792 # Creates a series of routines that
return 1 if the given architecture
2793 # can be selected and a routine to give the flags to select that architecture
2794 # Note
: Extra flags may be added to disable options from newer compilers
2795 #
(Thumb in particular
- but others may be added in the future
)
2796 # Usage
: /* { dg
-require
-effective
-target arm_arch_v5_ok
} */
2797 #
/* { dg
-add
-options arm_arch_v5
} */
2798 #
/* { dg
-require
-effective
-target arm_arch_v5_multilib
} */
2799 foreach
{ armfunc armflag armdef
} { v4
"-march=armv4 -marm" __ARM_ARCH_4__
2800 v4t
"-march=armv4t" __ARM_ARCH_4T__
2801 v5
"-march=armv5 -marm" __ARM_ARCH_5__
2802 v5t
"-march=armv5t" __ARM_ARCH_5T__
2803 v5te
"-march=armv5te" __ARM_ARCH_5TE__
2804 v6
"-march=armv6" __ARM_ARCH_6__
2805 v6k
"-march=armv6k" __ARM_ARCH_6K__
2806 v6t2
"-march=armv6t2" __ARM_ARCH_6T2__
2807 v6z
"-march=armv6z" __ARM_ARCH_6Z__
2808 v6m
"-march=armv6-m -mthumb" __ARM_ARCH_6M__
2809 v7a
"-march=armv7-a" __ARM_ARCH_7A__
2810 v7ve
"-march=armv7ve" __ARM_ARCH_7A__
2811 v7r
"-march=armv7-r" __ARM_ARCH_7R__
2812 v7m
"-march=armv7-m -mthumb" __ARM_ARCH_7M__
2813 v7em
"-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
2814 v8a
"-march=armv8-a" __ARM_ARCH_8A__ } {
2815 eval
[string map
[list FUNC $armfunc FLAG $armflag DEF $armdef
] {
2816 proc check_effective_target_arm_arch_FUNC_ok
{ } {
2817 if { [ string match
"*-marm*" "FLAG" ] &&
2818 ![check_effective_target_arm_arm_ok
] } {
2821 return [check_no_compiler_messages arm_arch_FUNC_ok assembly
{
2828 proc add_options_for_arm_arch_FUNC
{ flags
} {
2829 return "$flags FLAG"
2832 proc check_effective_target_arm_arch_FUNC_multilib
{ } {
2833 return [check_runtime arm_arch_FUNC_multilib
{
2839 } [add_options_for_arm_arch_FUNC
""]]
2844 #
Return 1 if this is an ARM target where
-marm causes ARM to be
2847 proc check_effective_target_arm_arm_ok
{ } {
2848 return [check_no_compiler_messages arm_arm_ok assembly
{
2849 #
if !defined
(__arm__
) || defined
(__thumb__
) || defined
(__thumb2__
)
2856 #
Return 1 is this is an ARM target where
-mthumb causes Thumb
-1 to be
2859 proc check_effective_target_arm_thumb1_ok
{ } {
2860 return [check_no_compiler_messages arm_thumb1_ok assembly
{
2861 #
if !defined
(__arm__
) ||
!defined
(__thumb__
) || defined
(__thumb2__
)
2864 int foo
(int i
) { return i
; }
2868 #
Return 1 is this is an ARM target where
-mthumb causes Thumb
-2 to be
2871 proc check_effective_target_arm_thumb2_ok
{ } {
2872 return [check_no_compiler_messages arm_thumb2_ok assembly
{
2873 #
if !defined
(__thumb2__
)
2876 int foo
(int i
) { return i
; }
2880 #
Return 1 if this is an ARM target where Thumb
-1 is used without options
2881 # added by the test.
2883 proc check_effective_target_arm_thumb1
{ } {
2884 return [check_no_compiler_messages arm_thumb1 assembly
{
2885 #
if !defined
(__arm__
) ||
!defined
(__thumb__
) || defined
(__thumb2__
)
2892 #
Return 1 if this is an ARM target where Thumb
-2 is used without options
2893 # added by the test.
2895 proc check_effective_target_arm_thumb2
{ } {
2896 return [check_no_compiler_messages arm_thumb2 assembly
{
2897 #
if !defined
(__thumb2__
)
2904 #
Return 1 if this is an ARM target where conditional execution is available.
2906 proc check_effective_target_arm_cond_exec
{ } {
2907 return [check_no_compiler_messages arm_cond_exec assembly
{
2908 #
if defined
(__arm__
) && defined
(__thumb__
) && !defined
(__thumb2__
)
2915 #
Return 1 if this is an ARM cortex
-M profile cpu
2917 proc check_effective_target_arm_cortex_m
{ } {
2918 return [check_no_compiler_messages arm_cortex_m assembly
{
2919 #
if !defined
(__ARM_ARCH_7M__
) \
2920 && !defined
(__ARM_ARCH_7EM__
) \
2921 && !defined
(__ARM_ARCH_6M__
)
2928 #
Return 1 if the target supports executing NEON instructions
, 0
2929 # otherwise.
Cache the result.
2931 proc check_effective_target_arm_neon_hw
{ } {
2932 return [check_runtime arm_neon_hw_available
{
2936 long long a
= 0, b
= 1;
2937 asm
("vorr %P0, %P1, %P2"
2939 : "0" (a), "w" (b));
2942 } [add_options_for_arm_neon
""]]
2945 proc check_effective_target_arm_neonv2_hw
{ } {
2946 return [check_runtime arm_neon_hwv2_available
{
2947 #
include "arm_neon.h"
2951 float32x2_t a
, b
, c
;
2952 asm
("vfma.f32 %P0, %P1, %P2"
2954 : "w" (b), "w" (c));
2957 } [add_options_for_arm_neonv2
""]]
2960 #
Return 1 if the target supports executing ARMv8 NEON instructions
, 0
2963 proc check_effective_target_arm_v8_neon_hw
{ } {
2964 return [check_runtime arm_v8_neon_hw_available
{
2965 #
include "arm_neon.h"
2970 asm
("vrinta.f32 %P0, %P1"
2975 } [add_options_for_arm_v8_neon
""]]
2978 #
Return 1 if this is a ARM target with NEON enabled.
2980 proc check_effective_target_arm_neon
{ } {
2981 if { [check_effective_target_arm32
] } {
2982 return [check_no_compiler_messages arm_neon object
{
2983 #ifndef __ARM_NEON__
2994 proc check_effective_target_arm_neonv2
{ } {
2995 if { [check_effective_target_arm32
] } {
2996 return [check_no_compiler_messages arm_neon object
{
2997 #ifndef __ARM_NEON__
3000 #ifndef __ARM_FEATURE_FMA
3012 #
Return 1 if this a Loongson
-2E or
-2F target using an ABI that supports
3013 # the Loongson vector modes.
3015 proc check_effective_target_mips_loongson
{ } {
3016 return [check_no_compiler_messages loongson assembly
{
3017 #
if !defined
(__mips_loongson_vector_rev
)
3023 #
Return 1 if a msa
program can be compiled to object
3024 proc check_effective_target_mips_msa
{ } {
3025 return [check_no_compiler_messages msa object
{
3026 #
if !defined
(__mips_msa
)
3027 #error
"MSA NOT AVAIL"
3029 #
if !(((__mips
== 64) ||
(__mips
== 32)) && (__mips_isa_rev
>= 2))
3030 #error
"MSA NOT AVAIL FOR ISA REV < 2"
3032 #
if !defined
(__mips_hard_float
)
3033 #error
"MSA HARD_FLOAT REQUIRED"
3035 #
if __mips_fpr
!= 64
3036 #error
"MSA 64 FPR REQUIRED"
3042 v8i16 v
= __builtin_msa_ldi_h
(1);
3050 #
Return 1 if this is an ARM target that adheres to the ABI
for the ARM
3053 proc check_effective_target_arm_eabi
{ } {
3054 return [check_no_compiler_messages arm_eabi object
{
3055 #ifndef __ARM_EABI__
3063 #
Return 1 if this is an ARM target that adheres to the hard
-float variant of
3064 # the ABI
for the ARM Architecture
(e.g.
-mfloat
-abi
=hard
).
3066 proc check_effective_target_arm_hf_eabi
{ } {
3067 return [check_no_compiler_messages arm_hf_eabi object
{
3068 #
if !defined
(__ARM_EABI__
) ||
!defined
(__ARM_PCS_VFP
)
3069 #error not hard
-float EABI
3076 #
Return 1 if this is an ARM target supporting
-mcpu
=iwmmxt.
3077 # Some multilibs may be incompatible with this option.
3079 proc check_effective_target_arm_iwmmxt_ok
{ } {
3080 if { [check_effective_target_arm32
] } {
3081 return [check_no_compiler_messages arm_iwmmxt_ok object
{
3089 #
Return true
if LDRD
/STRD instructions are prefered over LDM
/STM instructions
3090 #
for an ARM target.
3091 proc check_effective_target_arm_prefer_ldrd_strd
{ } {
3092 if { ![check_effective_target_arm32
] } {
3096 return [check_no_messages_and_pattern arm_prefer_ldrd_strd
"strd\tr" assembly {
3097 void foo
(int *p
) { p
[0] = 1; p
[1] = 0;}
3101 #
Return 1 if this is a PowerPC target supporting
-meabi.
3103 proc check_effective_target_powerpc_eabi_ok
{ } {
3104 if { [istarget powerpc
*-*-*] } {
3105 return [check_no_compiler_messages powerpc_eabi_ok object
{
3113 #
Return 1 if this is a PowerPC target with floating
-point registers.
3115 proc check_effective_target_powerpc_fprs
{ } {
3116 if { [istarget powerpc
*-*-*]
3117 ||
[istarget rs6000
-*-*] } {
3118 return [check_no_compiler_messages powerpc_fprs object
{
3130 #
Return 1 if this is a PowerPC target with hardware double
-precision
3133 proc check_effective_target_powerpc_hard_double
{ } {
3134 if { [istarget powerpc
*-*-*]
3135 ||
[istarget rs6000
-*-*] } {
3136 return [check_no_compiler_messages powerpc_hard_double object
{
3148 #
Return 1 if this is a PowerPC target supporting
-maltivec.
3150 proc check_effective_target_powerpc_altivec_ok
{ } {
3151 if { ([istarget powerpc
*-*-*]
3152 && ![istarget powerpc
-*-linux
*paired
*])
3153 ||
[istarget rs6000
-*-*] } {
3154 # AltiVec is not supported
on AIX before
5.3.
3155 if { [istarget powerpc
*-*-aix4
*]
3156 ||
[istarget powerpc
*-*-aix5.1
*]
3157 ||
[istarget powerpc
*-*-aix5.2
*] } {
3160 return [check_no_compiler_messages powerpc_altivec_ok object
{
3168 #
Return 1 if this is a PowerPC target supporting
-mpower8
-vector
3170 proc check_effective_target_powerpc_p8vector_ok
{ } {
3171 if { ([istarget powerpc
*-*-*]
3172 && ![istarget powerpc
-*-linux
*paired
*])
3173 ||
[istarget rs6000
-*-*] } {
3174 # AltiVec is not supported
on AIX before
5.3.
3175 if { [istarget powerpc
*-*-aix4
*]
3176 ||
[istarget powerpc
*-*-aix5.1
*]
3177 ||
[istarget powerpc
*-*-aix5.2
*] } {
3180 return [check_no_compiler_messages powerpc_p8vector_ok object
{
3183 asm volatile
("xxlorc vs0,vs0,vs0");
3185 asm volatile
("xxlorc 0,0,0");
3189 } "-mpower8-vector"]
3195 #
Return 1 if this is a PowerPC target supporting
-mvsx
3197 proc check_effective_target_powerpc_vsx_ok
{ } {
3198 if { ([istarget powerpc
*-*-*]
3199 && ![istarget powerpc
-*-linux
*paired
*])
3200 ||
[istarget rs6000
-*-*] } {
3201 # VSX is not supported
on AIX before
7.1.
3202 if { [istarget powerpc
*-*-aix4
*]
3203 ||
[istarget powerpc
*-*-aix5
*]
3204 ||
[istarget powerpc
*-*-aix6
*] } {
3207 return [check_no_compiler_messages powerpc_vsx_ok object
{
3210 asm volatile
("xxlor vs0,vs0,vs0");
3212 asm volatile
("xxlor 0,0,0");
3222 #
Return 1 if this is a PowerPC target supporting
-mhtm
3224 proc check_effective_target_powerpc_htm_ok
{ } {
3225 if { ([istarget powerpc
*-*-*]
3226 && ![istarget powerpc
-*-linux
*paired
*])
3227 ||
[istarget rs6000
-*-*] } {
3228 # HTM is not supported
on AIX yet.
3229 if { [istarget powerpc
*-*-aix
*] } {
3232 return [check_no_compiler_messages powerpc_htm_ok object
{
3234 asm volatile
("tbegin. 0");
3243 #
Return 1 if this is a PowerPC target supporting
-mcpu
=cell.
3245 proc check_effective_target_powerpc_ppu_ok
{ } {
3246 if [check_effective_target_powerpc_altivec_ok
] {
3247 return [check_no_compiler_messages cell_asm_available object
{
3250 asm volatile
("lvlx v0,v0,v0");
3252 asm volatile
("lvlx 0,0,0");
3262 #
Return 1 if this is a PowerPC target that supports SPU.
3264 proc check_effective_target_powerpc_spu
{ } {
3265 if { [istarget powerpc
*-*-linux
*] } {
3266 return [check_effective_target_powerpc_altivec_ok
]
3272 #
Return 1 if this is a PowerPC SPE target. The check includes options
3273 # specified by dg
-options
for this test
, so don
't cache the result.
3275 proc check_effective_target_powerpc_spe_nocache { } {
3276 if { [istarget powerpc*-*-*] } {
3277 return [check_no_compiler_messages_nocache powerpc_spe object {
3283 } [current_compiler_flags]]
3289 # Return 1 if this is a PowerPC target with SPE enabled.
3291 proc check_effective_target_powerpc_spe { } {
3292 if { [istarget powerpc*-*-*] } {
3293 return [check_no_compiler_messages powerpc_spe object {
3305 # Return 1 if this is a PowerPC target with Altivec enabled.
3307 proc check_effective_target_powerpc_altivec { } {
3308 if { [istarget powerpc*-*-*] } {
3309 return [check_no_compiler_messages powerpc_altivec object {
3321 # Return 1 if this is a PowerPC 405 target. The check includes options
3322 # specified by dg-options for this test, so don't
cache the result.
3324 proc check_effective_target_powerpc_405_nocache
{ } {
3325 if { [istarget powerpc
*-*-*] ||
[istarget rs6000
-*-*] } {
3326 return [check_no_compiler_messages_nocache powerpc_405 object
{
3332 } [current_compiler_flags
]]
3338 #
Return 1 if this is a PowerPC target using the ELFv2 ABI.
3340 proc check_effective_target_powerpc_elfv2
{ } {
3341 if { [istarget powerpc
*-*-*] } {
3342 return [check_no_compiler_messages powerpc_elfv2 object
{
3344 #error not ELF v2 ABI
3354 #
Return 1 if this is a SPU target with a toolchain that
3355 # supports automatic overlay generation.
3357 proc check_effective_target_spu_auto_overlay
{ } {
3358 if { [istarget spu
*-*-elf
*] } {
3359 return [check_no_compiler_messages spu_auto_overlay executable
{
3361 } "-Wl,--auto-overlay" ]
3367 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3368 # chokes
on EM_SPARC32PLUS or EM_SPARCV9 executables.
Return 1 if the
3369 # test environment appears to run executables
on such a simulator.
3371 proc check_effective_target_ultrasparc_hw
{ } {
3372 return [check_runtime ultrasparc_hw
{
3373 int main
() { return 0; }
3374 } "-mcpu=ultrasparc"]
3377 #
Return 1 if the test environment supports executing UltraSPARC VIS2
3378 # instructions. We check this by attempting
: "bmask %g0, %g0, %g0"
3380 proc check_effective_target_ultrasparc_vis2_hw
{ } {
3381 return [check_runtime ultrasparc_vis2_hw
{
3382 int main
() { __asm__
(".word 0x81b00320"); return 0; }
3383 } "-mcpu=ultrasparc3"]
3386 #
Return 1 if the test environment supports executing UltraSPARC VIS3
3387 # instructions. We check this by attempting
: "addxc %g0, %g0, %g0"
3389 proc check_effective_target_ultrasparc_vis3_hw
{ } {
3390 return [check_runtime ultrasparc_vis3_hw
{
3391 int main
() { __asm__
(".word 0x81b00220"); return 0; }
3395 #
Return 1 if this is a SPARC
-V9 target.
3397 proc check_effective_target_sparc_v9
{ } {
3398 if { [istarget sparc
*-*-*] } {
3399 return [check_no_compiler_messages sparc_v9 object
{
3401 asm volatile
("return %i7+8");
3410 #
Return 1 if this is a SPARC target with VIS enabled.
3412 proc check_effective_target_sparc_vis
{ } {
3413 if { [istarget sparc
*-*-*] } {
3414 return [check_no_compiler_messages sparc_vis object
{
3426 #
Return 1 if the target supports hardware vector shift operation.
3428 proc check_effective_target_vect_shift
{ } {
3429 global et_vect_shift_saved
3431 if [info exists et_vect_shift_saved
] {
3432 verbose
"check_effective_target_vect_shift: using cached result" 2
3434 set et_vect_shift_saved
0
3435 if { ([istarget powerpc
*-*-*]
3436 && ![istarget powerpc
-*-linux
*paired
*])
3437 ||
[istarget ia64
-*-*]
3438 ||
[istarget i?
86-*-*]
3439 ||
[istarget x86_64
-*-*]
3440 ||
[istarget aarch64
*-*-*]
3441 ||
[check_effective_target_arm32
]
3442 ||
([istarget mips
*-*-*]
3443 && ([check_effective_target_mips_msa_nomips16_nomicromips
]
3444 ||
[check_effective_target_mips_loongson
])) } {
3445 set et_vect_shift_saved
1
3449 verbose
"check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3450 return $et_vect_shift_saved
3453 #
Return 1 if the target supports hardware vector shift operation
for char.
3455 proc check_effective_target_vect_shift_char
{ } {
3456 global et_vect_shift_char_saved
3458 if [info exists et_vect_shift_char_saved
] {
3459 verbose
"check_effective_target_vect_shift_char: using cached result" 2
3461 set et_vect_shift_char_saved
0
3462 if { ([istarget powerpc
*-*-*]
3463 && ![istarget powerpc
-*-linux
*paired
*])
3464 ||
[check_effective_target_arm32
]
3465 ||
([istarget mips
*-*-*]
3466 && [check_effective_target_mips_msa_nomips16_nomicromips
]) } {
3467 set et_vect_shift_char_saved
1
3471 verbose
"check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3472 return $et_vect_shift_char_saved
3475 #
Return 1 if the target supports hardware vectors of long
, 0 otherwise.
3477 # This can change
for different subtargets so
do not
cache the result.
3479 proc check_effective_target_vect_long
{ } {
3480 if { [istarget i?
86-*-*]
3481 ||
(([istarget powerpc
*-*-*]
3482 && ![istarget powerpc
-*-linux
*paired
*])
3483 && [check_effective_target_ilp32
])
3484 ||
[istarget x86_64
-*-*]
3485 ||
[check_effective_target_arm32
]
3486 ||
([istarget sparc
*-*-*] && [check_effective_target_ilp32
])
3487 ||
([istarget mips
*-*-*]
3488 && [check_effective_target_mips_msa_nomips16_nomicromips
]) } {
3494 verbose
"check_effective_target_vect_long: returning $answer" 2
3498 #
Return 1 if the target supports hardware vectors of float
, 0 otherwise.
3500 # This won
't change for different subtargets so cache the result.
3502 proc check_effective_target_vect_float { } {
3503 global et_vect_float_saved
3505 if [info exists et_vect_float_saved] {
3506 verbose "check_effective_target_vect_float: using cached result" 2
3508 set et_vect_float_saved 0
3509 if { [istarget i?86-*-*]
3510 || [istarget powerpc*-*-*]
3511 || [istarget spu-*-*]
3512 || [istarget mips-sde-elf]
3513 || [istarget mipsisa64*-*-*]
3514 || [istarget x86_64-*-*]
3515 || [istarget ia64-*-*]
3516 || [istarget aarch64*-*-*]
3517 || ([istarget mips*-*-*]
3518 && [check_effective_target_mips_msa_nomips16_nomicromips])
3519 || [check_effective_target_arm32] } {
3520 set et_vect_float_saved 1
3524 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
3525 return $et_vect_float_saved
3528 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
3530 # This won't change
for different subtargets so
cache the result.
3532 proc check_effective_target_vect_double
{ } {
3533 global et_vect_double_saved
3535 if [info exists et_vect_double_saved
] {
3536 verbose
"check_effective_target_vect_double: using cached result" 2
3538 set et_vect_double_saved
0
3539 if { [istarget i?
86-*-*]
3540 ||
[istarget aarch64
*-*-*]
3541 ||
[istarget x86_64
-*-*] } {
3542 if { [check_no_compiler_messages vect_double assembly
{
3543 #ifdef __tune_atom__
3544 # error No double vectorizer support.
3547 set et_vect_double_saved
1
3549 set et_vect_double_saved
0
3551 } elseif
{ [istarget spu
-*-*] } {
3552 set et_vect_double_saved
1
3553 } elseif
{ [istarget mips
*-*-*]
3554 && [check_effective_target_mips_msa_nomips16_nomicromips
] } {
3555 set et_vect_double_saved
1
3559 verbose
"check_effective_target_vect_double: returning $et_vect_double_saved" 2
3560 return $et_vect_double_saved
3563 #
Return 1 if the target supports hardware vectors of long long
, 0 otherwise.
3565 # This won
't change for different subtargets so cache the result.
3567 proc check_effective_target_vect_long_long { } {
3568 global et_vect_long_long_saved
3570 if [info exists et_vect_long_long_saved] {
3571 verbose "check_effective_target_vect_long_long: using cached result" 2
3573 set et_vect_long_long_saved 0
3574 if { [istarget i?86-*-*]
3575 || [istarget x86_64-*-*]
3576 || ([istarget mips*-*-*]
3577 && [check_effective_target_mips_msa_nomips16_nomicromips]) } {
3578 set et_vect_long_long_saved 1
3582 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
3583 return $et_vect_long_long_saved
3587 # Return 1 if the target plus current options does not support a vector
3588 # max instruction on "int", 0 otherwise.
3590 # This won't change
for different subtargets so
cache the result.
3592 proc check_effective_target_vect_no_int_max
{ } {
3593 global et_vect_no_int_max_saved
3595 if [info exists et_vect_no_int_max_saved
] {
3596 verbose
"check_effective_target_vect_no_int_max: using cached result" 2
3598 set et_vect_no_int_max_saved
0
3599 if { [istarget sparc
*-*-*]
3600 ||
[istarget spu
-*-*]
3601 ||
[istarget alpha
*-*-*]
3602 ||
([istarget mips
*-*-*]
3603 && (![check_effective_target_mips_msa_nomips16_nomicromips
])
3604 && [check_effective_target_mips_loongson
]) } {
3605 set et_vect_no_int_max_saved
1
3608 verbose
"check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
3609 return $et_vect_no_int_max_saved
3612 #
Return 1 if the target plus current options does not support a vector
3613 # add instruction
on "int", 0 otherwise.
3615 # This won
't change for different subtargets so cache the result.
3617 proc check_effective_target_vect_no_int_add { } {
3618 global et_vect_no_int_add_saved
3620 if [info exists et_vect_no_int_add_saved] {
3621 verbose "check_effective_target_vect_no_int_add: using cached result" 2
3623 set et_vect_no_int_add_saved 0
3624 # Alpha only supports vector add on V8QI and V4HI.
3625 if { [istarget alpha*-*-*] } {
3626 set et_vect_no_int_add_saved 1
3629 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
3630 return $et_vect_no_int_add_saved
3633 # Return 1 if the target plus current options does not support vector
3634 # bitwise instructions, 0 otherwise.
3636 # This won't change
for different subtargets so
cache the result.
3638 proc check_effective_target_vect_no_bitwise
{ } {
3639 global et_vect_no_bitwise_saved
3641 if [info exists et_vect_no_bitwise_saved
] {
3642 verbose
"check_effective_target_vect_no_bitwise: using cached result" 2
3644 set et_vect_no_bitwise_saved
0
3646 verbose
"check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
3647 return $et_vect_no_bitwise_saved
3650 #
Return 1 if the target plus current options supports vector permutation
,
3653 # This won
't change for different subtargets so cache the result.
3655 proc check_effective_target_vect_perm { } {
3658 if [info exists et_vect_perm_saved] {
3659 verbose "check_effective_target_vect_perm: using cached result" 2
3661 set et_vect_perm_saved 0
3662 if { [is-effective-target arm_neon_ok]
3663 || ([istarget aarch64*-*-*]
3664 && [is-effective-target aarch64_little_endian])
3665 || [istarget powerpc*-*-*]
3666 || [istarget spu-*-*]
3667 || [istarget i?86-*-*]
3668 || [istarget x86_64-*-*]
3669 || ([istarget mips*-*-*]
3670 && ([check_effective_target_mips_msa_nomips16_nomicromips]
3671 || [check_effective_target_mpaired_single])) } {
3672 set et_vect_perm_saved 1
3675 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
3676 return $et_vect_perm_saved
3679 # Return 1 if the target plus current options supports vector permutation
3680 # on byte-sized elements, 0 otherwise.
3682 # This won't change
for different subtargets so
cache the result.
3684 proc check_effective_target_vect_perm_byte
{ } {
3685 global et_vect_perm_byte
3687 if [info exists et_vect_perm_byte_saved
] {
3688 verbose
"check_effective_target_vect_perm_byte: using cached result" 2
3690 set et_vect_perm_byte_saved
0
3691 if { ([is
-effective
-target arm_neon_ok
]
3692 && [is
-effective
-target arm_little_endian
])
3693 ||
([istarget aarch64
*-*-*]
3694 && [is
-effective
-target aarch64_little_endian
])
3695 ||
[istarget powerpc
*-*-*]
3696 ||
[istarget spu
-*-*]
3697 ||
([istarget mips
-*.
*]
3698 && [check_effective_target_mips_msa_nomips16_nomicromips
]) } {
3699 set et_vect_perm_byte_saved
1
3702 verbose
"check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
3703 return $et_vect_perm_byte_saved
3706 #
Return 1 if the target plus current options supports vector permutation
3707 #
on short
-sized elements
, 0 otherwise.
3709 # This won
't change for different subtargets so cache the result.
3711 proc check_effective_target_vect_perm_short { } {
3712 global et_vect_perm_short
3714 if [info exists et_vect_perm_short_saved] {
3715 verbose "check_effective_target_vect_perm_short: using cached result" 2
3717 set et_vect_perm_short_saved 0
3718 if { ([is-effective-target arm_neon_ok]
3719 && [is-effective-target arm_little_endian])
3720 || ([istarget aarch64*-*-*]
3721 && [is-effective-target aarch64_little_endian])
3722 || [istarget powerpc*-*-*]
3723 || [istarget spu-*-*]
3724 || ([istarget mips*-*-*]
3725 && [check_effective_target_mips_msa_nomips16_nomicromips]) } {
3726 set et_vect_perm_short_saved 1
3729 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
3730 return $et_vect_perm_short_saved
3733 # Return 1 if the target plus current options supports a vector
3734 # widening summation of *short* args into *int* result, 0 otherwise.
3736 # This won't change
for different subtargets so
cache the result.
3738 proc check_effective_target_vect_widen_sum_hi_to_si_pattern
{ } {
3739 global et_vect_widen_sum_hi_to_si_pattern
3741 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved
] {
3742 verbose
"check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
3744 set et_vect_widen_sum_hi_to_si_pattern_saved
0
3745 if { [istarget powerpc
*-*-*]
3746 ||
[istarget ia64
-*-*] } {
3747 set et_vect_widen_sum_hi_to_si_pattern_saved
1
3750 verbose
"check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
3751 return $et_vect_widen_sum_hi_to_si_pattern_saved
3754 #
Return 1 if the target plus current options supports a vector
3755 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
3756 # A target can also support this widening summation
if it can support
3757 # promotion
(unpacking
) from shorts to ints.
3759 # This won
't change for different subtargets so cache the result.
3761 proc check_effective_target_vect_widen_sum_hi_to_si { } {
3762 global et_vect_widen_sum_hi_to_si
3764 if [info exists et_vect_widen_sum_hi_to_si_saved] {
3765 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
3767 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
3768 if { [istarget powerpc*-*-*]
3769 || [istarget ia64-*-*] } {
3770 set et_vect_widen_sum_hi_to_si_saved 1
3773 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
3774 return $et_vect_widen_sum_hi_to_si_saved
3777 # Return 1 if the target plus current options supports a vector
3778 # widening summation of *char* args into *short* result, 0 otherwise.
3779 # A target can also support this widening summation if it can support
3780 # promotion (unpacking) from chars to shorts.
3782 # This won't change
for different subtargets so
cache the result.
3784 proc check_effective_target_vect_widen_sum_qi_to_hi
{ } {
3785 global et_vect_widen_sum_qi_to_hi
3787 if [info exists et_vect_widen_sum_qi_to_hi_saved
] {
3788 verbose
"check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
3790 set et_vect_widen_sum_qi_to_hi_saved
0
3791 if { [check_effective_target_vect_unpack
]
3792 ||
[check_effective_target_arm_neon_ok
]
3793 ||
[istarget ia64
-*-*] } {
3794 set et_vect_widen_sum_qi_to_hi_saved
1
3797 verbose
"check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
3798 return $et_vect_widen_sum_qi_to_hi_saved
3801 #
Return 1 if the target plus current options supports a vector
3802 # widening summation of
*char
* args into
*int* result
, 0 otherwise.
3804 # This won
't change for different subtargets so cache the result.
3806 proc check_effective_target_vect_widen_sum_qi_to_si { } {
3807 global et_vect_widen_sum_qi_to_si
3809 if [info exists et_vect_widen_sum_qi_to_si_saved] {
3810 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
3812 set et_vect_widen_sum_qi_to_si_saved 0
3813 if { [istarget powerpc*-*-*] } {
3814 set et_vect_widen_sum_qi_to_si_saved 1
3817 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
3818 return $et_vect_widen_sum_qi_to_si_saved
3821 # Return 1 if the target plus current options supports a vector
3822 # widening multiplication of *char* args into *short* result, 0 otherwise.
3823 # A target can also support this widening multplication if it can support
3824 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
3825 # multiplication of shorts).
3827 # This won't change
for different subtargets so
cache the result.
3830 proc check_effective_target_vect_widen_mult_qi_to_hi
{ } {
3831 global et_vect_widen_mult_qi_to_hi
3833 if [info exists et_vect_widen_mult_qi_to_hi_saved
] {
3834 verbose
"check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
3836 if { [check_effective_target_vect_unpack
]
3837 && [check_effective_target_vect_short_mult
] } {
3838 set et_vect_widen_mult_qi_to_hi_saved
1
3840 set et_vect_widen_mult_qi_to_hi_saved
0
3842 if { [istarget powerpc
*-*-*]
3843 ||
[istarget aarch64
*-*-*]
3844 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
3845 set et_vect_widen_mult_qi_to_hi_saved
1
3848 verbose
"check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
3849 return $et_vect_widen_mult_qi_to_hi_saved
3852 #
Return 1 if the target plus current options supports a vector
3853 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
3854 # A target can also support this widening multplication
if it can support
3855 # promotion
(unpacking
) from shorts to ints
, and vect_int_mult
(non
-widening
3856 # multiplication of ints
).
3858 # This won
't change for different subtargets so cache the result.
3861 proc check_effective_target_vect_widen_mult_hi_to_si { } {
3862 global et_vect_widen_mult_hi_to_si
3864 if [info exists et_vect_widen_mult_hi_to_si_saved] {
3865 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
3867 if { [check_effective_target_vect_unpack]
3868 && [check_effective_target_vect_int_mult] } {
3869 set et_vect_widen_mult_hi_to_si_saved 1
3871 set et_vect_widen_mult_hi_to_si_saved 0
3873 if { [istarget powerpc*-*-*]
3874 || [istarget spu-*-*]
3875 || [istarget ia64-*-*]
3876 || [istarget aarch64*-*-*]
3877 || [istarget i?86-*-*]
3878 || [istarget x86_64-*-*]
3879 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3880 set et_vect_widen_mult_hi_to_si_saved 1
3883 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
3884 return $et_vect_widen_mult_hi_to_si_saved
3887 # Return 1 if the target plus current options supports a vector
3888 # widening multiplication of *char* args into *short* result, 0 otherwise.
3890 # This won't change
for different subtargets so
cache the result.
3892 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern
{ } {
3893 global et_vect_widen_mult_qi_to_hi_pattern
3895 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved
] {
3896 verbose
"check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
3898 set et_vect_widen_mult_qi_to_hi_pattern_saved
0
3899 if { [istarget powerpc
*-*-*]
3900 ||
([istarget arm
*-*-*]
3901 && [check_effective_target_arm_neon_ok
]
3902 && [check_effective_target_arm_little_endian
]) } {
3903 set et_vect_widen_mult_qi_to_hi_pattern_saved
1
3906 verbose
"check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
3907 return $et_vect_widen_mult_qi_to_hi_pattern_saved
3910 #
Return 1 if the target plus current options supports a vector
3911 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
3913 # This won
't change for different subtargets so cache the result.
3915 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
3916 global et_vect_widen_mult_hi_to_si_pattern
3918 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
3919 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
3921 set et_vect_widen_mult_hi_to_si_pattern_saved 0
3922 if { [istarget powerpc*-*-*]
3923 || [istarget spu-*-*]
3924 || [istarget ia64-*-*]
3925 || [istarget i?86-*-*]
3926 || [istarget x86_64-*-*]
3927 || ([istarget arm*-*-*]
3928 && [check_effective_target_arm_neon_ok]
3929 && [check_effective_target_arm_little_endian]) } {
3930 set et_vect_widen_mult_hi_to_si_pattern_saved 1
3933 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
3934 return $et_vect_widen_mult_hi_to_si_pattern_saved
3937 # Return 1 if the target plus current options supports a vector
3938 # widening multiplication of *int* args into *long* result, 0 otherwise.
3940 # This won't change
for different subtargets so
cache the result.
3942 proc check_effective_target_vect_widen_mult_si_to_di_pattern
{ } {
3943 global et_vect_widen_mult_si_to_di_pattern
3945 if [info exists et_vect_widen_mult_si_to_di_pattern_saved
] {
3946 verbose
"check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
3948 set et_vect_widen_mult_si_to_di_pattern_saved
0
3949 if {[istarget ia64
-*-*]
3950 ||
[istarget i?
86-*-*]
3951 ||
[istarget x86_64
-*-*] } {
3952 set et_vect_widen_mult_si_to_di_pattern_saved
1
3955 verbose
"check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
3956 return $et_vect_widen_mult_si_to_di_pattern_saved
3959 #
Return 1 if the target plus current options supports a vector
3960 # widening shift
, 0 otherwise.
3962 # This won
't change for different subtargets so cache the result.
3964 proc check_effective_target_vect_widen_shift { } {
3965 global et_vect_widen_shift_saved
3967 if [info exists et_vect_shift_saved] {
3968 verbose "check_effective_target_vect_widen_shift: using cached result" 2
3970 set et_vect_widen_shift_saved 0
3971 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3972 set et_vect_widen_shift_saved 1
3975 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
3976 return $et_vect_widen_shift_saved
3979 # Return 1 if the target plus current options supports a vector
3980 # dot-product of signed chars, 0 otherwise.
3982 # This won't change
for different subtargets so
cache the result.
3984 proc check_effective_target_vect_sdot_qi
{ } {
3985 global et_vect_sdot_qi
3987 if [info exists et_vect_sdot_qi_saved
] {
3988 verbose
"check_effective_target_vect_sdot_qi: using cached result" 2
3990 set et_vect_sdot_qi_saved
0
3991 if { [istarget ia64
-*-*] } {
3992 set et_vect_udot_qi_saved
1
3995 verbose
"check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
3996 return $et_vect_sdot_qi_saved
3999 #
Return 1 if the target plus current options supports a vector
4000 # dot
-product of unsigned chars
, 0 otherwise.
4002 # This won
't change for different subtargets so cache the result.
4004 proc check_effective_target_vect_udot_qi { } {
4005 global et_vect_udot_qi
4007 if [info exists et_vect_udot_qi_saved] {
4008 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4010 set et_vect_udot_qi_saved 0
4011 if { [istarget powerpc*-*-*]
4012 || [istarget ia64-*-*] } {
4013 set et_vect_udot_qi_saved 1
4016 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4017 return $et_vect_udot_qi_saved
4020 # Return 1 if the target plus current options supports a vector
4021 # dot-product of signed shorts, 0 otherwise.
4023 # This won't change
for different subtargets so
cache the result.
4025 proc check_effective_target_vect_sdot_hi
{ } {
4026 global et_vect_sdot_hi
4028 if [info exists et_vect_sdot_hi_saved
] {
4029 verbose
"check_effective_target_vect_sdot_hi: using cached result" 2
4031 set et_vect_sdot_hi_saved
0
4032 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
4033 ||
[istarget ia64
-*-*]
4034 ||
[istarget i?
86-*-*]
4035 ||
[istarget x86_64
-*-*] } {
4036 set et_vect_sdot_hi_saved
1
4039 verbose
"check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4040 return $et_vect_sdot_hi_saved
4043 #
Return 1 if the target plus current options supports a vector
4044 # dot
-product of unsigned shorts
, 0 otherwise.
4046 # This won
't change for different subtargets so cache the result.
4048 proc check_effective_target_vect_udot_hi { } {
4049 global et_vect_udot_hi
4051 if [info exists et_vect_udot_hi_saved] {
4052 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4054 set et_vect_udot_hi_saved 0
4055 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4056 set et_vect_udot_hi_saved 1
4059 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4060 return $et_vect_udot_hi_saved
4063 # Return 1 if the target plus current options supports a vector
4064 # sad operation of unsigned chars, 0 otherwise.
4066 # This won't change
for different subtargets so
cache the result.
4068 proc check_effective_target_vect_usad_char
{ } {
4069 global et_vect_usad_char
4071 if [info exists et_vect_usad_char_saved
] {
4072 verbose
"check_effective_target_vect_usad_char: using cached result" 2
4074 set et_vect_usad_char_saved
0
4075 if { ([istarget i?
86-*-*]
4076 ||
[istarget x86_64
-*-*]) } {
4077 set et_vect_usad_char_saved
1
4080 verbose
"check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4081 return $et_vect_usad_char_saved
4084 #
Return 1 if the target plus current options supports a vector
4085 # demotion
(packing
) of shorts
(to chars
) and ints
(to shorts
)
4086 # using modulo arithmetic
, 0 otherwise.
4088 # This won
't change for different subtargets so cache the result.
4090 proc check_effective_target_vect_pack_trunc { } {
4091 global et_vect_pack_trunc
4093 if [info exists et_vect_pack_trunc_saved] {
4094 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4096 set et_vect_pack_trunc_saved 0
4097 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4098 || [istarget i?86-*-*]
4099 || [istarget x86_64-*-*]
4100 || [istarget aarch64*-*-*]
4101 || [istarget spu-*-*]
4102 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4103 && [check_effective_target_arm_little_endian])
4104 || ([istarget mips*-*-*]
4105 && [check_effective_target_mips_msa]) } {
4106 set et_vect_pack_trunc_saved 1
4109 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4110 return $et_vect_pack_trunc_saved
4113 # Return 1 if the target plus current options supports a vector
4114 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4116 # This won't change
for different subtargets so
cache the result.
4118 proc check_effective_target_vect_unpack
{ } {
4119 global et_vect_unpack
4121 if [info exists et_vect_unpack_saved
] {
4122 verbose
"check_effective_target_vect_unpack: using cached result" 2
4124 set et_vect_unpack_saved
0
4125 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*paired
*])
4126 ||
[istarget i?
86-*-*]
4127 ||
[istarget x86_64
-*-*]
4128 ||
[istarget spu
-*-*]
4129 ||
[istarget ia64
-*-*]
4130 ||
[istarget aarch64
*-*-*]
4131 ||
([istarget mips
*-*-*]
4132 && [check_effective_target_mips_msa_nomips16_nomicromips
])
4133 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
4134 && [check_effective_target_arm_little_endian
]) } {
4135 set et_vect_unpack_saved
1
4138 verbose
"check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4139 return $et_vect_unpack_saved
4142 #
Return 1 if the target plus current options does not guarantee
4143 # that its STACK_BOUNDARY is
>= the reguired vector alignment.
4145 # This won
't change for different subtargets so cache the result.
4147 proc check_effective_target_unaligned_stack { } {
4148 global et_unaligned_stack_saved
4150 if [info exists et_unaligned_stack_saved] {
4151 verbose "check_effective_target_unaligned_stack: using cached result" 2
4153 set et_unaligned_stack_saved 0
4155 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4156 return $et_unaligned_stack_saved
4159 # Return 1 if the target plus current options does not support a vector
4160 # alignment mechanism, 0 otherwise.
4162 # This won't change
for different subtargets so
cache the result.
4164 proc check_effective_target_vect_no_align
{ } {
4165 global et_vect_no_align_saved
4167 if [info exists et_vect_no_align_saved
] {
4168 verbose
"check_effective_target_vect_no_align: using cached result" 2
4170 set et_vect_no_align_saved
0
4171 if { [istarget mipsisa64
*-*-*]
4172 ||
[istarget mips
-sde
-elf
]
4173 ||
[istarget sparc
*-*-*]
4174 ||
[istarget ia64
-*-*]
4175 ||
[check_effective_target_arm_vect_no_misalign
]
4176 ||
([istarget mips
*-*-*]
4177 && ![check_effective_target_mips_msa
]
4178 && [check_effective_target_mips_loongson
]) } {
4179 set et_vect_no_align_saved
1
4182 verbose
"check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4183 return $et_vect_no_align_saved
4186 #
Return 1 if the target supports a vector misalign access
, 0 otherwise.
4188 # This won
't change for different subtargets so cache the result.
4190 proc check_effective_target_vect_hw_misalign { } {
4191 global et_vect_hw_misalign_saved
4193 if [info exists et_vect_hw_misalign_saved] {
4194 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4196 set et_vect_hw_misalign_saved 0
4197 if { ([istarget x86_64-*-*]
4198 || [istarget aarch64*-*-*]
4199 || [istarget i?86-*-*])
4200 || ([istarget mips*-*-*] && [check_effective_target_mips_msa_nomips16_nomicromips]) } {
4201 set et_vect_hw_misalign_saved 1
4204 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4205 return $et_vect_hw_misalign_saved
4209 # Return 1 if arrays are aligned to the vector alignment
4210 # boundary, 0 otherwise.
4212 # This won't change
for different subtargets so
cache the result.
4214 proc check_effective_target_vect_aligned_arrays
{ } {
4215 global et_vect_aligned_arrays
4217 if [info exists et_vect_aligned_arrays_saved
] {
4218 verbose
"check_effective_target_vect_aligned_arrays: using cached result" 2
4220 set et_vect_aligned_arrays_saved
0
4221 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
4222 if { ([is
-effective
-target lp64
]
4223 && ( ![check_avx_available
]
4224 ||
[check_prefer_avx128
])) } {
4225 set et_vect_aligned_arrays_saved
1
4228 if [istarget spu
-*-*] {
4229 set et_vect_aligned_arrays_saved
1
4232 verbose
"check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4233 return $et_vect_aligned_arrays_saved
4236 #
Return 1 if types of size
32 bit or less are naturally aligned
4237 #
(aligned to their type
-size
), 0 otherwise.
4239 # This won
't change for different subtargets so cache the result.
4241 proc check_effective_target_natural_alignment_32 { } {
4242 global et_natural_alignment_32
4244 if [info exists et_natural_alignment_32_saved] {
4245 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4247 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4248 set et_natural_alignment_32_saved 1
4249 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4250 set et_natural_alignment_32_saved 0
4253 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4254 return $et_natural_alignment_32_saved
4257 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4258 # type-size), 0 otherwise.
4260 # This won't change
for different subtargets so
cache the result.
4262 proc check_effective_target_natural_alignment_64
{ } {
4263 global et_natural_alignment_64
4265 if [info exists et_natural_alignment_64_saved
] {
4266 verbose
"check_effective_target_natural_alignment_64: using cached result" 2
4268 set et_natural_alignment_64_saved
0
4269 if { ([is
-effective
-target lp64
] && ![istarget
*-*-darwin
*])
4270 ||
[istarget spu
-*-*] } {
4271 set et_natural_alignment_64_saved
1
4274 verbose
"check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4275 return $et_natural_alignment_64_saved
4278 #
Return 1 if all vector types are naturally aligned
(aligned to their
4279 # type
-size
), 0 otherwise.
4281 # This won
't change for different subtargets so cache the result.
4283 proc check_effective_target_vect_natural_alignment { } {
4284 global et_vect_natural_alignment
4286 if [info exists et_vect_natural_alignment_saved] {
4287 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4289 set et_vect_natural_alignment_saved 1
4290 if { [check_effective_target_arm_eabi] } {
4291 set et_vect_natural_alignment_saved 0
4294 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4295 return $et_vect_natural_alignment_saved
4298 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4300 # This won't change
for different subtargets so
cache the result.
4302 proc check_effective_target_vector_alignment_reachable
{ } {
4303 global et_vector_alignment_reachable
4305 if [info exists et_vector_alignment_reachable_saved
] {
4306 verbose
"check_effective_target_vector_alignment_reachable: using cached result" 2
4308 if { [check_effective_target_vect_aligned_arrays
]
4309 ||
[check_effective_target_natural_alignment_32
] } {
4310 set et_vector_alignment_reachable_saved
1
4312 set et_vector_alignment_reachable_saved
0
4315 verbose
"check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4316 return $et_vector_alignment_reachable_saved
4319 #
Return 1 if vector alignment
for 64 bit is reachable
, 0 otherwise.
4321 # This won
't change for different subtargets so cache the result.
4323 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4324 global et_vector_alignment_reachable_for_64bit
4326 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4327 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4329 if { [check_effective_target_vect_aligned_arrays]
4330 || [check_effective_target_natural_alignment_64] } {
4331 set et_vector_alignment_reachable_for_64bit_saved 1
4333 set et_vector_alignment_reachable_for_64bit_saved 0
4336 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4337 return $et_vector_alignment_reachable_for_64bit_saved
4340 # Return 1 if the target only requires element alignment for vector accesses
4342 proc check_effective_target_vect_element_align { } {
4343 global et_vect_element_align
4345 if [info exists et_vect_element_align] {
4346 verbose "check_effective_target_vect_element_align: using cached result" 2
4348 set et_vect_element_align 0
4349 if { ([istarget arm*-*-*]
4350 && ![check_effective_target_arm_vect_no_misalign])
4351 || [check_effective_target_vect_hw_misalign] } {
4352 set et_vect_element_align 1
4356 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4357 return $et_vect_element_align
4360 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4362 proc check_effective_target_vect_condition { } {
4363 global et_vect_cond_saved
4365 if [info exists et_vect_cond_saved] {
4366 verbose "check_effective_target_vect_cond: using cached result" 2
4368 set et_vect_cond_saved 0
4369 if { [istarget aarch64*-*-*]
4370 || [istarget powerpc*-*-*]
4371 || [istarget ia64-*-*]
4372 || [istarget i?86-*-*]
4373 || [istarget spu-*-*]
4374 || [istarget x86_64-*-*]
4375 || [istarget mips*-*-*]
4376 && [check_effective_target_mips_msa_nomips16_nomicromips]
4377 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4378 set et_vect_cond_saved 1
4382 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4383 return $et_vect_cond_saved
4386 # Return 1 if the target supports vector conditional operations where
4387 # the comparison has different type from the lhs, 0 otherwise.
4389 proc check_effective_target_vect_cond_mixed { } {
4390 global et_vect_cond_mixed_saved
4392 if [info exists et_vect_cond_mixed_saved] {
4393 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
4395 set et_vect_cond_mixed_saved 0
4396 if { [istarget i?86-*-*]
4397 || [istarget x86_64-*-*]
4398 || [istarget powerpc*-*-*]
4399 || [istarget mips*-*-*]
4400 && [check_effective_target_mips_msa_nomips16_nomicromips] } {
4401 set et_vect_cond_mixed_saved 1
4405 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4406 return $et_vect_cond_mixed_saved
4409 # Return 1 if the target supports vector char multiplication, 0 otherwise.
4411 proc check_effective_target_vect_char_mult { } {
4412 global et_vect_char_mult_saved
4414 if [info exists et_vect_char_mult_saved] {
4415 verbose "check_effective_target_vect_char_mult: using cached result" 2
4417 set et_vect_char_mult_saved 0
4418 if { [istarget aarch64*-*-*]
4419 || [istarget ia64-*-*]
4420 || [istarget i?86-*-*]
4421 || [istarget x86_64-*-*]
4422 || [check_effective_target_arm32] } {
4423 set et_vect_char_mult_saved 1
4427 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4428 return $et_vect_char_mult_saved
4431 # Return 1 if the target supports vector short multiplication, 0 otherwise.
4433 proc check_effective_target_vect_short_mult { } {
4434 global et_vect_short_mult_saved
4436 if [info exists et_vect_short_mult_saved] {
4437 verbose "check_effective_target_vect_short_mult: using cached result" 2
4439 set et_vect_short_mult_saved 0
4440 if { [istarget ia64-*-*]
4441 || [istarget spu-*-*]
4442 || [istarget i?86-*-*]
4443 || [istarget x86_64-*-*]
4444 || [istarget powerpc*-*-*]
4445 || [istarget aarch64*-*-*]
4446 || [check_effective_target_arm32]
4447 || ([istarget mips*-*-*]
4448 && ([check_effective_target_mips_msa_nomips16_nomicromips]
4449 || [check_effective_target_mips_loongson])) } {
4450 set et_vect_short_mult_saved 1
4454 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4455 return $et_vect_short_mult_saved
4458 # Return 1 if the target supports vector int multiplication, 0 otherwise.
4460 proc check_effective_target_vect_int_mult { } {
4461 global et_vect_int_mult_saved
4463 if [info exists et_vect_int_mult_saved] {
4464 verbose "check_effective_target_vect_int_mult: using cached result" 2
4466 set et_vect_int_mult_saved 0
4467 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4468 || [istarget spu-*-*]
4469 || [istarget i?86-*-*]
4470 || [istarget x86_64-*-*]
4471 || [istarget ia64-*-*]
4472 || [istarget aarch64*-*-*]
4473 || ([istarget mips*-*-*]
4474 && [check_effective_target_mips_msa_nomips16_nomicromips])
4475 || [check_effective_target_arm32] } {
4476 set et_vect_int_mult_saved 1
4480 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4481 return $et_vect_int_mult_saved
4484 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
4486 proc check_effective_target_vect_extract_even_odd { } {
4487 global et_vect_extract_even_odd_saved
4489 if [info exists et_vect_extract_even_odd_saved] {
4490 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
4492 set et_vect_extract_even_odd_saved 0
4493 if { [istarget aarch64*-*-*]
4494 || [istarget powerpc*-*-*]
4495 || [is-effective-target arm_neon_ok]
4496 || [istarget i?86-*-*]
4497 || [istarget x86_64-*-*]
4498 || [istarget ia64-*-*]
4499 || [istarget spu-*-*]
4500 || ([istarget mips*-*-*]
4501 && ([check_effective_target_mips_msa_nomips16_nomicromips]
4502 || [check_effective_target_mpaired_single])) } {
4503 set et_vect_extract_even_odd_saved 1
4507 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4508 return $et_vect_extract_even_odd_saved
4511 # Return 1 if the target supports vector interleaving, 0 otherwise.
4513 proc check_effective_target_vect_interleave { } {
4514 global et_vect_interleave_saved
4516 if [info exists et_vect_interleave_saved] {
4517 verbose "check_effective_target_vect_interleave: using cached result" 2
4519 set et_vect_interleave_saved 0
4520 if { [istarget aarch64*-*-*]
4521 || [istarget powerpc*-*-*]
4522 || [is-effective-target arm_neon_ok]
4523 || [istarget i?86-*-*]
4524 || [istarget x86_64-*-*]
4525 || [istarget ia64-*-*]
4526 || [istarget spu-*-*]
4527 || ([istarget mips*-*-*]
4528 && ([check_effective_target_mips_msa_nomips16_nomicromips]
4529 || [check_effective_target_mpaired_single])) } {
4530 set et_vect_interleave_saved 1
4534 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4535 return $et_vect_interleave_saved
4538 foreach N {2 3 4 8} {
4539 eval [string map [list N $N] {
4540 # Return 1 if the target supports 2-vector interleaving
4541 proc check_effective_target_vect_stridedN { } {
4542 global et_vect_stridedN_saved
4544 if [info exists et_vect_stridedN_saved] {
4545 verbose "check_effective_target_vect_stridedN: using cached result" 2
4547 set et_vect_stridedN_saved 0
4549 && [check_effective_target_vect_interleave]
4550 && [check_effective_target_vect_extract_even_odd] } {
4551 set et_vect_stridedN_saved 1
4553 if { ([istarget arm*-*-*]
4554 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
4555 set et_vect_stridedN_saved 1
4559 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4560 return $et_vect_stridedN_saved
4565 # Return 1 if the target supports multiple vector sizes
4567 proc check_effective_target_vect_multiple_sizes { } {
4568 global et_vect_multiple_sizes_saved
4570 set et_vect_multiple_sizes_saved 0
4571 if { ([istarget aarch64*-*-*]
4572 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
4573 set et_vect_multiple_sizes_saved 1
4575 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4576 if { ([check_avx_available] && ![check_prefer_avx128]) } {
4577 set et_vect_multiple_sizes_saved 1
4581 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4582 return $et_vect_multiple_sizes_saved
4585 # Return 1 if the target supports vectors of 64 bits.
4587 proc check_effective_target_vect64 { } {
4588 global et_vect64_saved
4590 if [info exists et_vect64_saved] {
4591 verbose "check_effective_target_vect64: using cached result" 2
4593 set et_vect64_saved 0
4594 if { ([istarget arm*-*-*]
4595 && [check_effective_target_arm_neon_ok]
4596 && [check_effective_target_arm_little_endian]) } {
4597 set et_vect64_saved 1
4601 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
4602 return $et_vect64_saved
4605 # Return 1 if the target supports vector copysignf calls.
4607 proc check_effective_target_vect_call_copysignf { } {
4608 global et_vect_call_copysignf_saved
4610 if [info exists et_vect_call_copysignf_saved] {
4611 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
4613 set et_vect_call_copysignf_saved 0
4614 if { [istarget i?86-*-*]
4615 || [istarget x86_64-*-*]
4616 || [istarget powerpc*-*-*] } {
4617 set et_vect_call_copysignf_saved 1
4621 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
4622 return $et_vect_call_copysignf_saved
4625 # Return 1 if the target supports vector sqrtf calls.
4627 proc check_effective_target_vect_call_sqrtf { } {
4628 global et_vect_call_sqrtf_saved
4630 if [info exists et_vect_call_sqrtf_saved] {
4631 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
4633 set et_vect_call_sqrtf_saved 0
4634 if { [istarget aarch64*-*-*]
4635 || [istarget i?86-*-*]
4636 || [istarget x86_64-*-*]
4637 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
4638 set et_vect_call_sqrtf_saved 1
4642 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
4643 return $et_vect_call_sqrtf_saved
4646 # Return 1 if the target supports vector lrint calls.
4648 proc check_effective_target_vect_call_lrint { } {
4649 set et_vect_call_lrint 0
4650 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) && [check_effective_target_ilp32] } {
4651 set et_vect_call_lrint 1
4654 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
4655 return $et_vect_call_lrint
4658 # Return 1 if the target supports vector btrunc calls.
4660 proc check_effective_target_vect_call_btrunc { } {
4661 global et_vect_call_btrunc_saved
4663 if [info exists et_vect_call_btrunc_saved] {
4664 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
4666 set et_vect_call_btrunc_saved 0
4667 if { [istarget aarch64*-*-*] } {
4668 set et_vect_call_btrunc_saved 1
4672 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
4673 return $et_vect_call_btrunc_saved
4676 # Return 1 if the target supports vector btruncf calls.
4678 proc check_effective_target_vect_call_btruncf { } {
4679 global et_vect_call_btruncf_saved
4681 if [info exists et_vect_call_btruncf_saved] {
4682 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
4684 set et_vect_call_btruncf_saved 0
4685 if { [istarget aarch64*-*-*] } {
4686 set et_vect_call_btruncf_saved 1
4690 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
4691 return $et_vect_call_btruncf_saved
4694 # Return 1 if the target supports vector ceil calls.
4696 proc check_effective_target_vect_call_ceil { } {
4697 global et_vect_call_ceil_saved
4699 if [info exists et_vect_call_ceil_saved] {
4700 verbose "check_effective_target_vect_call_ceil: using cached result" 2
4702 set et_vect_call_ceil_saved 0
4703 if { [istarget aarch64*-*-*] } {
4704 set et_vect_call_ceil_saved 1
4708 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
4709 return $et_vect_call_ceil_saved
4712 # Return 1 if the target supports vector ceilf calls.
4714 proc check_effective_target_vect_call_ceilf { } {
4715 global et_vect_call_ceilf_saved
4717 if [info exists et_vect_call_ceilf_saved] {
4718 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
4720 set et_vect_call_ceilf_saved 0
4721 if { [istarget aarch64*-*-*] } {
4722 set et_vect_call_ceilf_saved 1
4726 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
4727 return $et_vect_call_ceilf_saved
4730 # Return 1 if the target supports vector floor calls.
4732 proc check_effective_target_vect_call_floor { } {
4733 global et_vect_call_floor_saved
4735 if [info exists et_vect_call_floor_saved] {
4736 verbose "check_effective_target_vect_call_floor: using cached result" 2
4738 set et_vect_call_floor_saved 0
4739 if { [istarget aarch64*-*-*] } {
4740 set et_vect_call_floor_saved 1
4744 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
4745 return $et_vect_call_floor_saved
4748 # Return 1 if the target supports vector floorf calls.
4750 proc check_effective_target_vect_call_floorf { } {
4751 global et_vect_call_floorf_saved
4753 if [info exists et_vect_call_floorf_saved] {
4754 verbose "check_effective_target_vect_call_floorf: using cached result" 2
4756 set et_vect_call_floorf_saved 0
4757 if { [istarget aarch64*-*-*] } {
4758 set et_vect_call_floorf_saved 1
4762 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
4763 return $et_vect_call_floorf_saved
4766 # Return 1 if the target supports vector lceil calls.
4768 proc check_effective_target_vect_call_lceil { } {
4769 global et_vect_call_lceil_saved
4771 if [info exists et_vect_call_lceil_saved] {
4772 verbose "check_effective_target_vect_call_lceil: using cached result" 2
4774 set et_vect_call_lceil_saved 0
4775 if { [istarget aarch64*-*-*] } {
4776 set et_vect_call_lceil_saved 1
4780 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
4781 return $et_vect_call_lceil_saved
4784 # Return 1 if the target supports vector lfloor calls.
4786 proc check_effective_target_vect_call_lfloor { } {
4787 global et_vect_call_lfloor_saved
4789 if [info exists et_vect_call_lfloor_saved] {
4790 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
4792 set et_vect_call_lfloor_saved 0
4793 if { [istarget aarch64*-*-*] } {
4794 set et_vect_call_lfloor_saved 1
4798 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
4799 return $et_vect_call_lfloor_saved
4802 # Return 1 if the target supports vector nearbyint calls.
4804 proc check_effective_target_vect_call_nearbyint { } {
4805 global et_vect_call_nearbyint_saved
4807 if [info exists et_vect_call_nearbyint_saved] {
4808 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
4810 set et_vect_call_nearbyint_saved 0
4811 if { [istarget aarch64*-*-*] } {
4812 set et_vect_call_nearbyint_saved 1
4816 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
4817 return $et_vect_call_nearbyint_saved
4820 # Return 1 if the target supports vector nearbyintf calls.
4822 proc check_effective_target_vect_call_nearbyintf { } {
4823 global et_vect_call_nearbyintf_saved
4825 if [info exists et_vect_call_nearbyintf_saved] {
4826 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
4828 set et_vect_call_nearbyintf_saved 0
4829 if { [istarget aarch64*-*-*] } {
4830 set et_vect_call_nearbyintf_saved 1
4834 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
4835 return $et_vect_call_nearbyintf_saved
4838 # Return 1 if the target supports vector round calls.
4840 proc check_effective_target_vect_call_round { } {
4841 global et_vect_call_round_saved
4843 if [info exists et_vect_call_round_saved] {
4844 verbose "check_effective_target_vect_call_round: using cached result" 2
4846 set et_vect_call_round_saved 0
4847 if { [istarget aarch64*-*-*] } {
4848 set et_vect_call_round_saved 1
4852 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
4853 return $et_vect_call_round_saved
4856 # Return 1 if the target supports vector roundf calls.
4858 proc check_effective_target_vect_call_roundf { } {
4859 global et_vect_call_roundf_saved
4861 if [info exists et_vect_call_roundf_saved] {
4862 verbose "check_effective_target_vect_call_roundf: using cached result" 2
4864 set et_vect_call_roundf_saved 0
4865 if { [istarget aarch64*-*-*] } {
4866 set et_vect_call_roundf_saved 1
4870 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
4871 return $et_vect_call_roundf_saved
4874 # Return 1 if the target supports section-anchors
4876 proc check_effective_target_section_anchors { } {
4877 global et_section_anchors_saved
4879 if [info exists et_section_anchors_saved] {
4880 verbose "check_effective_target_section_anchors: using cached result" 2
4882 set et_section_anchors_saved 0
4883 if { [istarget powerpc*-*-*]
4884 || [istarget arm*-*-*] } {
4885 set et_section_anchors_saved 1
4889 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
4890 return $et_section_anchors_saved
4893 # Return 1 if the target supports atomic operations on "int_128" values.
4895 proc check_effective_target_sync_int_128 { } {
4896 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
4897 && ![is-effective-target ia32] } {
4904 # Return 1 if the target supports atomic operations on "int_128" values
4905 # and can execute them.
4907 proc check_effective_target_sync_int_128_runtime { } {
4908 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
4909 && ![is-effective-target ia32] } {
4910 return [check_cached_effective_target sync_int_128_available {
4911 check_runtime_nocache sync_int_128_available {
4915 unsigned int eax, ebx, ecx, edx;
4916 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
4917 return !(ecx & bit_CMPXCHG16B);
4927 # Return 1 if the target supports atomic operations on "long long".
4929 # Note: 32bit x86 targets require -march=pentium in dg-options.
4931 proc check_effective_target_sync_long_long { } {
4932 if { [istarget x86_64-*-*]
4933 || [istarget i?86-*-*])
4934 || [istarget aarch64*-*-*]
4935 || [istarget arm*-*-*]
4936 || [istarget alpha*-*-*]
4937 || ([istarget sparc*-*-*] && [check_effective_target_lp64]) } {
4944 # Return 1 if the target supports atomic operations on "long long"
4945 # and can execute them.
4947 # Note: 32bit x86 targets require -march=pentium in dg-options.
4949 proc check_effective_target_sync_long_long_runtime { } {
4950 if { [istarget x86_64-*-*]
4951 || [istarget i?86-*-*] } {
4952 return [check_cached_effective_target sync_long_long_available {
4953 check_runtime_nocache sync_long_long_available {
4957 unsigned int eax, ebx, ecx, edx;
4958 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
4959 return !(edx & bit_CMPXCHG8B);
4964 } elseif { [istarget aarch64*-*-*] } {
4966 } elseif { [istarget arm*-*-linux-*] } {
4967 return [check_runtime sync_longlong_runtime {
4973 if (sizeof (long long) != 8)
4976 /* Just check for native; checking for kernel fallback is tricky. */
4977 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
4982 } elseif { [istarget alpha*-*-*] } {
4984 } elseif { ([istarget sparc*-*-*]
4985 && [check_effective_target_lp64]
4986 && [check_effective_target_ultrasparc_hw]) } {
4988 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
4995 # Return 1 if the target supports atomic operations on "int" and "long".
4997 proc check_effective_target_sync_int_long { } {
4998 global et_sync_int_long_saved
5000 if [info exists et_sync_int_long_saved] {
5001 verbose "check_effective_target_sync_int_long: using cached result" 2
5003 set et_sync_int_long_saved 0
5004 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5005 #
load-reserved/store
-conditional instructions.
5006 if { [istarget ia64
-*-*]
5007 ||
[istarget i?
86-*-*]
5008 ||
[istarget x86_64
-*-*]
5009 ||
[istarget aarch64
*-*-*]
5010 ||
[istarget alpha
*-*-*]
5011 ||
[istarget arm
*-*-linux
-*]
5012 ||
[istarget bfin
*-*linux
*]
5013 ||
[istarget hppa
*-*linux
*]
5014 ||
[istarget s390
*-*-*]
5015 ||
[istarget powerpc
*-*-*]
5016 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
5017 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
5018 ||
[check_effective_target_mips_llsc
] } {
5019 set et_sync_int_long_saved
1
5023 verbose
"check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5024 return $et_sync_int_long_saved
5027 #
Return 1 if the target supports atomic operations
on "char" and "short".
5029 proc check_effective_target_sync_char_short
{ } {
5030 global et_sync_char_short_saved
5032 if [info exists et_sync_char_short_saved
] {
5033 verbose
"check_effective_target_sync_char_short: using cached result" 2
5035 set et_sync_char_short_saved
0
5036 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
5037 # load-reserved/store-conditional instructions.
5038 if { [istarget aarch64*-*-*]
5039 || [istarget ia64-*-*]
5040 || [istarget i?86-*-*]
5041 || [istarget x86_64-*-*]
5042 || [istarget alpha*-*-*]
5043 || [istarget arm*-*-linux-*]
5044 || [istarget hppa*-*linux*]
5045 || [istarget s390*-*-*]
5046 || [istarget powerpc*-*-*]
5047 || [istarget crisv32-*-*] || [istarget cris-*-*]
5048 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5049 || [check_effective_target_mips_llsc] } {
5050 set et_sync_char_short_saved 1
5054 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5055 return $et_sync_char_short_saved
5058 # Return 1 if the target uses a ColdFire FPU.
5060 proc check_effective_target_coldfire_fpu { } {
5061 return [check_no_compiler_messages coldfire_fpu assembly {
5068 # Return true if this is a uClibc target.
5070 proc check_effective_target_uclibc {} {
5071 return [check_no_compiler_messages uclibc object {
5072 #include <features.h>
5073 #if !defined (__UCLIBC__)
5079 # Return true if this is a uclibc target and if the uclibc feature
5080 # described by __$feature__ is not present.
5082 proc check_missing_uclibc_feature {feature} {
5083 return [check_no_compiler_messages $feature object "
5084 #include <features.h>
5085 #if !defined (__UCLIBC) || defined (__${feature}__)
5091 # Return true if this is a Newlib target.
5093 proc check_effective_target_newlib {} {
5094 return [check_no_compiler_messages newlib object {
5099 # Return true if this is NOT a Bionic target.
5101 proc check_effective_target_non_bionic {} {
5102 return [check_no_compiler_messages non_bionic object {
5104 #if defined (__BIONIC__)
5111 # (a) an error of a few ULP is expected in string to floating-point
5112 # conversion functions; and
5113 # (b) overflow is not always detected correctly by those functions.
5115 proc check_effective_target_lax_strtofp {} {
5116 # By default, assume that all uClibc targets suffer from this.
5117 return [check_effective_target_uclibc]
5120 # Return 1 if this is a target for which wcsftime is a dummy
5121 # function that always returns 0.
5123 proc check_effective_target_dummy_wcsftime {} {
5124 # By default, assume that all uClibc targets suffer from this.
5125 return [check_effective_target_uclibc]
5128 # Return 1 if constructors with initialization priority arguments are
5129 # supposed on this target.
5131 proc check_effective_target_init_priority {} {
5132 return [check_no_compiler_messages init_priority assembly "
5133 void f() __attribute__((constructor (1000)));
5138 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5139 # This can be used with any check_* proc that takes no argument and
5140 # returns only 1 or 0. It could be used with check_* procs that take
5141 # arguments with keywords that pass particular arguments.
5143 proc is-effective-target { arg } {
5145 if { [info procs check_effective_target_${arg}] != [list] } {
5146 set selected [check_effective_target_${arg}]
5149 "vmx_hw" { set selected [check_vmx_hw_available] }
5150 "vsx_hw" { set selected [check_vsx_hw_available] }
5151 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5152 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5153 "dfp_hw" { set selected [check_dfp_hw_available] }
5154 "named_sections" { set selected [check_named_sections_available] }
5155 "gc_sections" { set selected [check_gc_sections_available] }
5156 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5157 default { error "unknown effective target keyword `$arg'" }
5160 verbose
"is-effective-target: $arg $selected" 2
5164 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
5166 proc is
-effective
-target
-keyword
{ arg } {
5167 if { [info procs check_effective_target_$
{arg}] != [list
] } {
5170 # These have different names
for their check_
* procs.
5172 "vmx_hw" { return 1 }
5173 "vsx_hw" { return 1 }
5174 "p8vector_hw" { return 1 }
5175 "ppc_recip_hw" { return 1 }
5176 "dfp_hw" { return 1 }
5177 "named_sections" { return 1 }
5178 "gc_sections" { return 1 }
5179 "cxa_atexit" { return 1 }
5180 default
{ return 0 }
5185 #
Return 1 if target default to short enums
5187 proc check_effective_target_short_enums
{ } {
5188 return [check_no_compiler_messages short_enums assembly
{
5190 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
5194 #
Return 1 if target supports merging string constants at link time.
5196 proc check_effective_target_string_merging
{ } {
5197 return [check_no_messages_and_pattern string_merging \
5198 "rodata\\.str" assembly {
5199 const char
*var
= "String";
5203 #
Return 1 if target has the basic signed and unsigned types in
5204 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
5205 # working
<stdint.h
> for all targets.
5207 proc check_effective_target_stdint_types
{ } {
5208 return [check_no_compiler_messages stdint_types assembly
{
5210 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
5211 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
5215 #
Return 1 if target has the basic signed and unsigned types in
5216 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
5217 # these types agree with those in the header, as some systems have
5218 # only <inttypes.h>.
5220 proc check_effective_target_inttypes_types { } {
5221 return [check_no_compiler_messages inttypes_types assembly {
5222 #include <inttypes.h>
5223 int8_t a; int16_t b; int32_t c; int64_t d;
5224 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5228 # Return 1 if programs are intended to be run on a simulator
5229 # (i.e. slowly) rather than hardware (i.e. fast).
5231 proc check_effective_target_simulator { } {
5233 # All "src/sim" simulators set this one.
5234 if [board_info target exists is_simulator] {
5235 return [board_info target is_simulator]
5238 # The "sid" simulators don't
set that one
, but at least they
set
5240 if [board_info target
exists slow_simulator
] {
5241 return [board_info target slow_simulator
]
5247 #
Return 1 if programs are intended to be run
on hardware rather than
5250 proc check_effective_target_hw
{ } {
5252 # All
"src/sim" simulators set this one.
5253 if [board_info target
exists is_simulator
] {
5254 if [board_info target is_simulator
] {
5261 # The
"sid" simulators don't set that one, but at least they set
5263 if [board_info target
exists slow_simulator
] {
5264 if [board_info target slow_simulator
] {
5274 #
Return 1 if the target is a VxWorks kernel.
5276 proc check_effective_target_vxworks_kernel
{ } {
5277 return [check_no_compiler_messages vxworks_kernel assembly
{
5278 #
if !defined __vxworks || defined __RTP__
5284 #
Return 1 if the target is a VxWorks RTP.
5286 proc check_effective_target_vxworks_rtp
{ } {
5287 return [check_no_compiler_messages vxworks_rtp assembly
{
5288 #
if !defined __vxworks ||
!defined __RTP__
5294 #
Return 1 if the target is expected to provide wide character support.
5296 proc check_effective_target_wchar
{ } {
5297 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
5300 return [check_no_compiler_messages wchar assembly
{
5305 #
Return 1 if the target has
<pthread.h
>.
5307 proc check_effective_target_pthread_h
{ } {
5308 return [check_no_compiler_messages pthread_h assembly
{
5309 #
include <pthread.h
>
5313 #
Return 1 if the target can truncate a file from a file
-descriptor
,
5314 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
5315 # chsize. We test
for a trivially functional truncation
; no stubs.
5316 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
5317 # different function to be used.
5319 proc check_effective_target_fd_truncate { } {
5321 #define _FILE_OFFSET_BITS 64
5327 FILE *f = fopen ("tst.tmp", "wb");
5329 const char t[] = "test writing more than ten characters";
5333 write (fd, t, sizeof (t) - 1);
5335 if (ftruncate (fd, 10) != 0)
5344 f = fopen ("tst.tmp", "rb");
5345 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5353 if { [check_runtime ftruncate $prog] } {
5357 regsub "ftruncate" $prog "chsize" prog
5358 return [check_runtime chsize $prog]
5361 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5363 proc add_options_for_c99_runtime { flags } {
5364 if { [istarget *-*-solaris2*] } {
5365 return "$flags -std=c99"
5367 if { [istarget powerpc-*-darwin*] } {
5368 return "$flags -mmacosx-version-min=10.3"
5373 # Add to FLAGS all the target-specific flags needed to enable
5374 # full IEEE compliance mode.
5376 proc add_options_for_ieee { flags } {
5377 if { [istarget alpha*-*-*]
5378 || [istarget sh*-*-*] } {
5379 return "$flags -mieee"
5381 if { [istarget rx-*-*] } {
5382 return "$flags -mnofpu"
5387 # Add to FLAGS the flags needed to enable functions to bind locally
5388 # when using pic/PIC passes in the testsuite.
5390 proc add_options_for_bind_pic_locally { flags } {
5391 if {[check_no_compiler_messages using_pic2 assembly {
5396 return "$flags -fPIE"
5398 if {[check_no_compiler_messages using_pic1 assembly {
5403 return "$flags -fpie"
5409 # Add to FLAGS the flags needed to enable 64-bit vectors.
5411 proc add_options_for_double_vectors { flags } {
5412 if [is-effective-target arm_neon_ok] {
5413 return "$flags -mvectorize-with-neon-double"
5419 # Return 1 if the target provides a full C99 runtime.
5421 proc check_effective_target_c99_runtime { } {
5422 return [check_cached_effective_target c99_runtime {
5425 set file [open "$srcdir/gcc.dg/builtins-config.h"]
5426 set contents [read $file]
5429 #ifndef HAVE_C99_RUNTIME
5433 check_no_compiler_messages_nocache c99_runtime assembly \
5434 $contents [add_options_for_c99_runtime ""]
5438 # Return 1 if target wchar_t is at least 4 bytes.
5440 proc check_effective_target_4byte_wchar_t { } {
5441 return [check_no_compiler_messages 4byte_wchar_t object {
5442 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
5446 # Return 1 if the target supports automatic stack alignment.
5448 proc check_effective_target_automatic_stack_alignment { } {
5449 # Ordinarily x86 supports automatic stack alignment ...
5450 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
5451 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
5452 # ... except Win64 SEH doesn't. Succeed
for Win32 though.
5453 return [check_effective_target_ilp32
];
5460 #
Return true
if we are compiling
for AVX target.
5462 proc check_avx_available
{ } {
5463 if { [check_no_compiler_messages avx_available assembly
{
5473 #
Return true
if 32- and
16-bytes vectors are available.
5475 proc check_effective_target_vect_sizes_32B_16B
{ } {
5476 return [check_avx_available
];
5479 #
Return true
if 128-bits vectors are preferred even
if 256-bits vectors
5482 proc check_prefer_avx128
{ } {
5483 if ![check_avx_available
] {
5486 return [check_no_messages_and_pattern avx_explicit
"xmm" assembly {
5487 float a
[1024],b
[1024],c
[1024];
5488 void foo
(void
) { int i
; for (i
= 0; i
< 1024; i
++) a
[i
]=b
[i
]+c
[i
];}
5489 } "-O2 -ftree-vectorize"]
5493 #
Return 1 if avx512f instructions can be compiled.
5495 proc check_effective_target_avx512f
{ } {
5496 return [check_no_compiler_messages avx512f object
{
5497 typedef double __m512d __attribute__
((__vector_size__
(64)));
5499 __m512d _mm512_add
(__m512d a
)
5501 return __builtin_ia32_addpd512_mask
(a
, a
, a
, 1, 4);
5506 #
Return 1 if avx instructions can be compiled.
5508 proc check_effective_target_avx
{ } {
5509 return [check_no_compiler_messages avx object
{
5510 void _mm256_zeroall
(void
)
5512 __builtin_ia32_vzeroall
();
5517 #
Return 1 if avx2 instructions can be compiled.
5518 proc check_effective_target_avx2
{ } {
5519 return [check_no_compiler_messages avx2 object
{
5520 typedef long long __v4di __attribute__
((__vector_size__
(32)));
5522 mm256_is32_andnotsi256
(__v4di __X
, __v4di __Y
)
5524 return __builtin_ia32_andnotsi256
(__X
, __Y
);
5529 #
Return 1 if sse instructions can be compiled.
5530 proc check_effective_target_sse
{ } {
5531 return [check_no_compiler_messages sse object
{
5534 __builtin_ia32_stmxcsr
();
5540 #
Return 1 if sse2 instructions can be compiled.
5541 proc check_effective_target_sse2
{ } {
5542 return [check_no_compiler_messages sse2 object
{
5543 typedef long long __m128i __attribute__
((__vector_size__
(16)));
5545 __m128i _mm_srli_si128
(__m128i __A
, int __N
)
5547 return (__m128i
)__builtin_ia32_psrldqi128
(__A
, 8);
5552 #
Return 1 if F16C instructions can be compiled.
5554 proc check_effective_target_f16c
{ } {
5555 return [check_no_compiler_messages f16c object
{
5556 #
include "immintrin.h"
5558 foo
(unsigned short val
)
5560 return _cvtsh_ss
(val
);
5565 #
Return 1 if C wchar_t type is compatible with char16_t.
5567 proc check_effective_target_wchar_t_char16_t_compatible
{ } {
5568 return [check_no_compiler_messages wchar_t_char16_t object
{
5570 __CHAR16_TYPE__
*p16
= &wc
;
5571 char t
[(((__CHAR16_TYPE__
) -1) < 0 == ((__WCHAR_TYPE__
) -1) < 0) ?
1 : -1];
5575 #
Return 1 if C wchar_t type is compatible with char32_t.
5577 proc check_effective_target_wchar_t_char32_t_compatible
{ } {
5578 return [check_no_compiler_messages wchar_t_char32_t object
{
5580 __CHAR32_TYPE__
*p32
= &wc
;
5581 char t
[(((__CHAR32_TYPE__
) -1) < 0 == ((__WCHAR_TYPE__
) -1) < 0) ?
1 : -1];
5585 #
Return 1 if pow10 function
exists.
5587 proc check_effective_target_pow10
{ } {
5588 return [check_runtime pow10
{
5598 #
Return 1 if current options generate DFP instructions
, 0 otherwise.
5600 proc check_effective_target_hard_dfp
{} {
5601 return [check_no_messages_and_pattern hard_dfp
"!adddd3" assembly {
5602 typedef float d64 __attribute__
((mode(DD
)));
5604 void foo
(void
) { z
= x
+ y
; }
5608 #
Return 1 if string.h and wchar.h headers provide C
++ requires overloads
5609 #
for strchr etc. functions.
5611 proc check_effective_target_correct_iso_cpp_string_wchar_protos
{ } {
5612 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly
{
5615 #
if !defined
(__cplusplus
) \
5616 ||
!defined
(__CORRECT_ISO_CPP_STRING_H_PROTO
) \
5617 ||
!defined
(__CORRECT_ISO_CPP_WCHAR_H_PROTO
)
5618 ISO C
++ correct string.h and wchar.h protos not supported.
5625 #
Return 1 if GNU as is used.
5627 proc check_effective_target_gas
{ } {
5628 global use_gas_saved
5631 if {![info exists use_gas_saved
]} {
5632 # Check
if the as used by gcc is GNU as.
5633 set gcc_as
[lindex
[$
{tool
}_target_compile
"-print-prog-name=as" "" "none" ""] 0]
5634 # Provide
/dev
/null as input
, otherwise gas times out reading from
5636 set status [remote_exec host
"$gcc_as" "-v /dev/null"]
5637 set as_output
[lindex $
status 1]
5638 if { [ string first
"GNU" $as_output ] >= 0 } {
5644 return $use_gas_saved
5647 #
Return 1 if GNU
ld is used.
5649 proc check_effective_target_gld
{ } {
5650 global use_gld_saved
5653 if {![info exists use_gld_saved
]} {
5654 # Check
if the
ld used by gcc is GNU
ld.
5655 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=ld" "" "none" ""] 0]
5656 set status [remote_exec host
"$gcc_ld" "--version"]
5657 set ld_output
[lindex $
status 1]
5658 if { [ string first
"GNU" $ld_output ] >= 0 } {
5664 return $use_gld_saved
5667 #
Return 1 if the compiler has been configure with link
-time optimization
5670 proc check_effective_target_lto
{ } {
5672 return [info exists ENABLE_LTO
]
5675 #
Return 1 if -mx32
-maddress
-mode=short can
compile, 0 otherwise.
5677 proc check_effective_target_maybe_x32
{ } {
5678 return [check_no_compiler_messages maybe_x32 object
{
5680 } "-mx32 -maddress-mode=short"]
5683 #
Return 1 if this target supports the
-fsplit
-stack option
, 0
5686 proc check_effective_target_split_stack
{} {
5687 return [check_no_compiler_messages split_stack object
{
5692 #
Return 1 if this target supports the
-masm
=intel option
, 0
5695 proc check_effective_target_masm_intel
{} {
5696 return [check_no_compiler_messages masm_intel object
{
5697 extern void abort
(void
);
5701 #
Return 1 if the language
for the compiler under test is C.
5703 proc check_effective_target_c
{ } {
5705 if [string match $tool
"gcc"] {
5711 #
Return 1 if the language
for the compiler under test is C
++.
5713 proc check_effective_target_c
++ { } {
5715 if [string match $tool
"g++"] {
5721 # Check whether the current active language standard supports the features
5722 # of C
++11/C
++1y by checking
for the presence of one of the
-std
5723 # flags. This assumes that the default
for the compiler is C
++98, and that
5724 # there will never be multiple
-std
= arguments
on the command line.
5725 proc check_effective_target_c
++11_only
{ } {
5726 if ![check_effective_target_c
++] {
5729 return [check
-flags
{ { } { } { -std
=c
++0x
-std
=gnu
++0x
-std
=c
++11 -std
=gnu
++11 } }]
5731 proc check_effective_target_c
++11 { } {
5732 if [check_effective_target_c
++11_only
] {
5735 return [check_effective_target_c
++1y
]
5737 proc check_effective_target_c
++11_down
{ } {
5738 if ![check_effective_target_c
++] {
5741 return ![check_effective_target_c
++1y
]
5744 proc check_effective_target_c
++1y_only
{ } {
5745 if ![check_effective_target_c
++] {
5748 return [check
-flags
{ { } { } { -std
=c
++1y
-std
=gnu
++1y
-std
=c
++14 -std
=gnu
++14 } }]
5750 proc check_effective_target_c
++1y
{ } {
5751 return [check_effective_target_c
++1y_only
]
5754 proc check_effective_target_c
++98_only
{ } {
5755 if ![check_effective_target_c
++] {
5758 return ![check_effective_target_c
++11]
5761 #
Return 1 if expensive testcases should be run.
5763 proc check_effective_target_run_expensive_tests
{ } {
5764 if { [getenv GCC_TEST_RUN_EXPENSIVE
] != "" } {
5770 # Returns
1 if "mempcpy" is available on the target system.
5772 proc check_effective_target_mempcpy
{} {
5773 return [check_function_available
"mempcpy"]
5776 # Check whether the vectorizer tests are supported by the target and
5777 # append additional target
-dependent
compile flags to DEFAULT_VECTCFLAGS.
5778 #
Set dg
-do-what
-default to either
compile or run
, depending
on target
5779 # capabilities.
Return 1 if vectorizer tests are supported by
5780 # target
, 0 otherwise.
5782 proc check_vect_support_and_set_flags
{ } {
5783 global DEFAULT_VECTCFLAGS
5784 global MULTI_VECTCFLAGS
5785 global dg
-do-what
-default
5787 if [istarget powerpc
-*paired
*] {
5788 lappend DEFAULT_VECTCFLAGS
"-mpaired"
5789 if [check_750cl_hw_available
] {
5790 set dg
-do-what
-default run
5792 set dg
-do-what
-default
compile
5794 } elseif
[istarget powerpc
*-*-*] {
5795 # Skip targets not supporting
-maltivec.
5796 if ![is
-effective
-target powerpc_altivec_ok
] {
5800 lappend DEFAULT_VECTCFLAGS
"-maltivec"
5801 if [check_p8vector_hw_available
] {
5802 lappend DEFAULT_VECTCFLAGS
"-mpower8-vector" "-mno-allow-movmisalign"
5803 } elseif
[check_vsx_hw_available
] {
5804 lappend DEFAULT_VECTCFLAGS
"-mvsx" "-mno-allow-movmisalign"
5807 if [check_vmx_hw_available
] {
5808 set dg
-do-what
-default run
5810 if [is
-effective
-target ilp32
] {
5811 # Specify a cpu that supports VMX
for compile-only tests.
5812 lappend DEFAULT_VECTCFLAGS
"-mcpu=970"
5814 set dg
-do-what
-default
compile
5816 } elseif
{ [istarget spu
-*-*] } {
5817 set dg
-do-what
-default run
5818 } elseif
{ [istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
5819 lappend DEFAULT_VECTCFLAGS
"-msse2"
5820 if { [check_effective_target_sse2_runtime
] } {
5821 set dg
-do-what
-default run
5823 set dg
-do-what
-default
compile
5825 } elseif
{ [istarget mips
*-*-*] } {
5826 if { 0 && ([check_effective_target_mpaired_single
]
5827 ||
[check_effective_target_mips_loongson
])
5828 && [check_effective_target_nomips16
]
5829 && [check_effective_target_mpaired_single
] } {
5830 lappend MULTI_VECTCFLAGS
"-mpaired-single"
5831 set dg
-do-what
-default run
5833 if { ([check_effective_target_mips_msa_nomips16_nomicromips
]) } {
5834 lappend MULTI_VECTCFLAGS
"-mmsa"
5836 if { [check_effective_target_msa_runtime
] } {
5837 set dg
-do-what
-default run
5839 set dg
-do-what
-default
compile
5844 } elseif
[istarget sparc
*-*-*] {
5845 lappend DEFAULT_VECTCFLAGS
"-mcpu=ultrasparc" "-mvis"
5846 if [check_effective_target_ultrasparc_hw
] {
5847 set dg
-do-what
-default run
5849 set dg
-do-what
-default
compile
5851 } elseif
[istarget alpha
*-*-*] {
5852 # Alpha
's vectorization capabilities are extremely limited.
5853 # It's more effort than its worth disabling all of the tests
5854 # that it cannot pass. But
if you actually want to see what
5855 # does work
, command out the
return.
5858 lappend DEFAULT_VECTCFLAGS
"-mmax"
5859 if [check_alpha_max_hw_available
] {
5860 set dg
-do-what
-default run
5862 set dg
-do-what
-default
compile
5864 } elseif
[istarget ia64
-*-*] {
5865 set dg
-do-what
-default run
5866 } elseif
[is
-effective
-target arm_neon_ok
] {
5867 eval lappend DEFAULT_VECTCFLAGS
[add_options_for_arm_neon
""]
5868 # NEON does not support denormals
, so is not used
for vectorization by
5869 # default to avoid loss of precision. We must pass
-ffast
-math to test
5870 # vectorization of float operations.
5871 lappend DEFAULT_VECTCFLAGS
"-ffast-math"
5872 if [is
-effective
-target arm_neon_hw
] {
5873 set dg
-do-what
-default run
5875 set dg
-do-what
-default
compile
5877 } elseif
[istarget
"aarch64*-*-*"] {
5878 set dg
-do-what
-default run
5886 proc check_effective_target_non_strict_align
{} {
5887 return [check_no_compiler_messages non_strict_align assembly
{
5889 typedef char __attribute__
((__aligned__
(__BIGGEST_ALIGNMENT__
))) c
;
5891 void foo
(void
) { z
= (c
*) y
; }
5895 #
Return 1 if the target has
<ucontext.h
>.
5897 proc check_effective_target_ucontext_h
{ } {
5898 return [check_no_compiler_messages ucontext_h assembly
{
5899 #
include <ucontext.h
>
5903 proc check_effective_target_aarch64_tiny
{ } {
5904 if { [istarget aarch64
*-*-*] } {
5905 return [check_no_compiler_messages aarch64_tiny object
{
5906 #ifdef __AARCH64_CMODEL_TINY__
5909 #error target not AArch64 tiny code
model
5917 proc check_effective_target_aarch64_small
{ } {
5918 if { [istarget aarch64
*-*-*] } {
5919 return [check_no_compiler_messages aarch64_small object
{
5920 #ifdef __AARCH64_CMODEL_SMALL__
5923 #error target not AArch64 small code
model
5931 proc check_effective_target_aarch64_large
{ } {
5932 if { [istarget aarch64
*-*-*] } {
5933 return [check_no_compiler_messages aarch64_large object
{
5934 #ifdef __AARCH64_CMODEL_LARGE__
5937 #error target not AArch64 large code
model
5945 #
Return 1 if <fenv.h
> is available with all the standard IEEE
5946 # exceptions and floating
-point exceptions are raised by arithmetic
5947 # operations.
(If the target requires special options
for "inexact"
5948 # exceptions
, those need to be specified in the testcases.
)
5950 proc check_effective_target_fenv_exceptions
{} {
5951 return [check_runtime fenv_exceptions
{
5954 #ifndef FE_DIVBYZERO
5955 # error Missing FE_DIVBYZERO
5958 # error Missing FE_INEXACT
5961 # error Missing FE_INVALID
5964 # error Missing FE_OVERFLOW
5966 #ifndef FE_UNDERFLOW
5967 # error Missing FE_UNDERFLOW
5969 volatile float a
= 0.0f
, r
;
5974 if (fetestexcept
(FE_INVALID
))
5982 #
Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is
set to
0 for the current target.
5984 proc check_effective_target_logical_op_short_circuit
{} {
5985 if { [istarget mips
*-*-*]
5986 ||
[istarget arc
*-*-*]
5987 ||
[istarget avr
*-*-*]
5988 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
5989 ||
[istarget s390
*-*-*]
5990 ||
[check_effective_target_arm_cortex_m
] } {
5996 # Record that dg
-final test TEST requires convential compilation.
5998 proc force_conventional_output_for
{ test
} {
5999 if { [info proc $test
] == "" } {
6000 perror
"$test does not exist"
6003 proc $
{test
}_required_options
{} {
6004 global gcc_force_conventional_output
6005 return $gcc_force_conventional_output
6009 #
Return 1 if the x86
-64 target supports PIE with copy reloc
, 0
6010 # otherwise.
Cache the result.
6012 proc check_effective_target_pie_copyreloc
{ } {
6013 global pie_copyreloc_available_saved
6015 global GCC_UNDER_TEST
6017 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
6021 # Need auto
-host.h to check linker support.
6022 if { ![file
exists ..
/..
/auto
-host.h
] } {
6026 if [info exists pie_copyreloc_available_saved
] {
6027 verbose
"check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
6029 #
Set up and
compile to see
if linker supports PIE with copy
6030 # reloc.
Include the current process ID in the file names to
6031 # prevent conflicts with invocations
for multiple testsuites.
6036 set f
[open $src
"w"]
6037 puts $f
"#include \"../../auto-host.h\""
6038 puts $f
"#if HAVE_LD_PIE_COPYRELOC == 0"
6039 puts $f
"# error Linker does not support PIE with copy reloc."
6043 verbose
"check_effective_target_pie_copyreloc compiling testfile $src" 2
6044 set lines
[$
{tool
}_target_compile $src $
obj object
""]
6049 if [string match
"" $lines] then {
6050 verbose
"check_effective_target_pie_copyreloc testfile compilation passed" 2
6051 set pie_copyreloc_available_saved
1
6053 verbose
"check_effective_target_pie_copyreloc testfile compilation failed" 2
6054 set pie_copyreloc_available_saved
0
6058 return $pie_copyreloc_available_saved