gcc-4_9/gcc/testsuite/gcc.target/mips/mips32-dsp.c

   1 /* Test MIPS32 DSP instructions */
   2 /* { dg-do compile } */
   3 /* { dg-options "-mgp32 -mdsp" } */
   4 /* { dg-final { scan-assembler "\taddq.ph\t" } } */
   5 /* { dg-final { scan-assembler "\taddq_s.ph\t" } } */
   6 /* { dg-final { scan-assembler "\taddq_s.w\t" } } */
   7 /* { dg-final { scan-assembler "\taddu.qb\t" } } */
   8 /* { dg-final { scan-assembler "\taddu_s.qb\t" } } */
   9 /* { dg-final { scan-assembler "\tsubq.ph\t" } } */
  10 /* { dg-final { scan-assembler "\tsubq_s.ph\t" } } */
  11 /* { dg-final { scan-assembler "\tsubq_s.w\t" } } */
  12 /* { dg-final { scan-assembler "\tsubu.qb\t" } } */
  13 /* { dg-final { scan-assembler "\tsubu_s.qb\t" } } */
  14 /* { dg-final { scan-assembler "\taddsc\t" } } */
  15 /* { dg-final { scan-assembler "\taddwc\t" } } */
  16 /* { dg-final { scan-assembler "\tmodsub\t" } } */
  17 /* { dg-final { scan-assembler "\traddu.w.qb\t" } } */
  18 /* { dg-final { scan-assembler "\tabsq_s.ph\t" } } */
  19 /* { dg-final { scan-assembler "\tabsq_s.w\t" } } */
  20 /* { dg-final { scan-assembler "\tprecrq.qb.ph\t" } } */
  21 /* { dg-final { scan-assembler "\tprecrq.ph.w\t" } } */
  22 /* { dg-final { scan-assembler "\tprecrq_rs.ph.w\t" } } */
  23 /* { dg-final { scan-assembler "\tprecrqu_s.qb.ph\t" } } */
  24 /* { dg-final { scan-assembler "\tpreceq.w.phl\t" } } */
  25 /* { dg-final { scan-assembler "\tpreceq.w.phr\t" } } */
  26 /* { dg-final { scan-assembler "\tprecequ.ph.qbl\t" } } */
  27 /* { dg-final { scan-assembler "\tprecequ.ph.qbr\t" } } */
  28 /* { dg-final { scan-assembler "\tprecequ.ph.qbla\t" } } */
  29 /* { dg-final { scan-assembler "\tprecequ.ph.qbra\t" } } */
  30 /* { dg-final { scan-assembler "\tpreceu.ph.qbl\t" } } */
  31 /* { dg-final { scan-assembler "\tpreceu.ph.qbr\t" } } */
  32 /* { dg-final { scan-assembler "\tpreceu.ph.qbla\t" } } */
  33 /* { dg-final { scan-assembler "\tpreceu.ph.qbra\t" } } */
  34 /* { dg-final { scan-assembler "\tshllv?.qb\t" } } */
  35 /* { dg-final { scan-assembler "\tshllv?.ph\t" } } */
  36 /* { dg-final { scan-assembler "\tshllv?_s.ph\t" } } */
  37 /* { dg-final { scan-assembler "\tshllv?_s.w\t" } } */
  38 /* { dg-final { scan-assembler "\tshrlv?.qb\t" } } */
  39 /* { dg-final { scan-assembler "\tshrav?.ph\t" } } */
  40 /* { dg-final { scan-assembler "\tshrav?_r.ph\t" } } */
  41 /* { dg-final { scan-assembler "\tshrav?_r.w\t" } } */
  42 /* { dg-final { scan-assembler "\tmuleu_s.ph.qbl\t" } } */
  43 /* { dg-final { scan-assembler "\tmuleu_s.ph.qbr\t" } } */
  44 /* { dg-final { scan-assembler "\tmulq_rs.ph\t" } } */
  45 /* { dg-final { scan-assembler "\tmuleq_s.w.phl\t" } } */
  46 /* { dg-final { scan-assembler "\tmuleq_s.w.phr\t" } } */
  47 /* { dg-final { scan-assembler "\tdpau.h.qbl\t" } } */
  48 /* { dg-final { scan-assembler "\tdpau.h.qbr\t" } } */
  49 /* { dg-final { scan-assembler "\tdpsu.h.qbl\t" } } */
  50 /* { dg-final { scan-assembler "\tdpsu.h.qbr\t" } } */
  51 /* { dg-final { scan-assembler "\tdpaq_s.w.ph\t" } } */
  52 /* { dg-final { scan-assembler "\tdpsq_s.w.ph\t" } } */
  53 /* { dg-final { scan-assembler "\tmulsaq_s.w.ph\t" } } */
  54 /* { dg-final { scan-assembler "\tdpaq_sa.l.w\t" } } */
  55 /* { dg-final { scan-assembler "\tdpsq_sa.l.w\t" } } */
  56 /* { dg-final { scan-assembler "\tmaq_s.w.phl\t" } } */
  57 /* { dg-final { scan-assembler "\tmaq_s.w.phr\t" } } */
  58 /* { dg-final { scan-assembler "\tmaq_sa.w.phl\t" } } */
  59 /* { dg-final { scan-assembler "\tmaq_sa.w.phr\t" } } */
  60 /* { dg-final { scan-assembler "\tbitrev\t" } } */
  61 /* { dg-final { scan-assembler "\tinsv\t" } } */
  62 /* { dg-final { scan-assembler "\treplv?.qb\t" } } */
  63 /* { dg-final { scan-assembler "\trepl.ph\t" } } */
  64 /* { dg-final { scan-assembler "\treplv.ph\t" } } */
  65 /* { dg-final { scan-assembler "\tcmpu.eq.qb\t" } } */
  66 /* { dg-final { scan-assembler "\tcmpu.lt.qb\t" } } */
  67 /* { dg-final { scan-assembler "\tcmpu.le.qb\t" } } */
  68 /* { dg-final { scan-assembler "\tcmpgu.eq.qb\t" } } */
  69 /* { dg-final { scan-assembler "\tcmpgu.lt.qb\t" } } */
  70 /* { dg-final { scan-assembler "\tcmpgu.le.qb\t" } } */
  71 /* { dg-final { scan-assembler "\tcmp.eq.ph\t" } } */
  72 /* { dg-final { scan-assembler "\tcmp.lt.ph\t" } } */
  73 /* { dg-final { scan-assembler "\tcmp.le.ph\t" } } */
  74 /* { dg-final { scan-assembler "\tpick.qb\t" } } */
  75 /* { dg-final { scan-assembler "\tpick.ph\t" } } */
  76 /* { dg-final { scan-assembler "\tpackrl.ph\t" } } */
  77 /* { dg-final { scan-assembler "\textrv?.w\t" } } */
  78 /* { dg-final { scan-assembler "\textrv?_s.h\t" } } */
  79 /* { dg-final { scan-assembler "\textrv?_r.w\t" } } */
  80 /* { dg-final { scan-assembler "\textrv?_rs.w\t" } } */
  81 /* { dg-final { scan-assembler "\textpv?\t" } } */
  82 /* { dg-final { scan-assembler "\textpdpv?\t" } } */
  83 /* { dg-final { scan-assembler "\tshilov?\t" } } */
  84 /* { dg-final { scan-assembler "\tmthlip\t" } } */
  85 /* { dg-final { scan-assembler "\tmfhi\t" } } */
  86 /* { dg-final { scan-assembler "\tmflo\t" } } */
  87 /* { dg-final { scan-assembler "\tmthi\t" } } */
  88 /* { dg-final { scan-assembler "\tmtlo\t" } } */
  89 /* { dg-final { scan-assembler "\twrdsp\t" } } */
  90 /* { dg-final { scan-assembler "\trddsp\t" } } */
  91 /* { dg-final { scan-assembler "\tlbux?\t" } } */
  92 /* { dg-final { scan-assembler "\tlhx?\t" } } */
  93 /* { dg-final { scan-assembler "\tlwx?\t" } } */
  94 /* { dg-final { scan-assembler "\tbposge32\t" } } */
  95 /* { dg-final { scan-assembler "\tmadd\t" } } */
  96 /* { dg-final { scan-assembler "\tmaddu\t" } } */
  97 /* { dg-final { scan-assembler "\tmsub\t" } } */
  98 /* { dg-final { scan-assembler "\tmsubu\t" } } */
  99 /* { dg-final { scan-assembler "\tmult\t" } } */
 100 /* { dg-final { scan-assembler "\tmultu\t" } } */
 101
 102 #include <stdlib.h>
 103 #include <stdio.h>
 104
 105 typedef signed char v4i8 __attribute__ ((vector_size(4)));
 106 typedef short v2q15 __attribute__ ((vector_size(4)));
 107
 108 typedef int q31;
 109 typedef int i32;
 110 typedef unsigned int ui32;
 111 typedef long long a64;
 112
 113 NOMIPS16 void test_MIPS_DSP (void);
 114
 115 char array[100];
 116 int little_endian;
 117
 118 int main ()
 119 {
 120   int i;
 121
 122   union { long long ll; int i[2]; } endianness_test;
 123   endianness_test.ll = 1;
 124   little_endian = endianness_test.i[0];
 125
 126   for (i = 0; i < 100; i++)
 127     array[i] = i;
 128
 129   test_MIPS_DSP ();
 130
 131   exit (0);
 132 }
 133
 134 NOMIPS16 v2q15 add_v2q15 (v2q15 a, v2q15 b)
 135 {
 136   return __builtin_mips_addq_ph (a, b);
 137 }
 138
 139 NOMIPS16 v4i8 add_v4i8 (v4i8 a, v4i8 b)
 140 {
 141   return __builtin_mips_addu_qb (a, b);
 142 }
 143
 144 NOMIPS16 v2q15 sub_v2q15 (v2q15 a, v2q15 b)
 145 {
 146   return __builtin_mips_subq_ph (a, b);
 147 }
 148
 149 NOMIPS16 v4i8 sub_v4i8 (v4i8 a, v4i8 b)
 150 {
 151   return __builtin_mips_subu_qb (a, b);
 152 }
 153
 154 NOMIPS16 void test_MIPS_DSP ()
 155 {
 156   v4i8 v4i8_a,v4i8_b,v4i8_c,v4i8_r,v4i8_s;
 157   v2q15 v2q15_a,v2q15_b,v2q15_c,v2q15_r,v2q15_s;
 158   q31 q31_a,q31_b,q31_c,q31_r,q31_s;
 159   /* To protect the multiplication-related tests from being optimized
 160      at compile time.  */
 161   volatile i32 i32_a,i32_b,i32_c,i32_r,i32_s;
 162   volatile ui32 ui32_a,ui32_b,ui32_c;
 163   a64 a64_a,a64_b,a64_c,a64_r,a64_s;
 164
 165   void *ptr_a;
 166   int r,s;
 167   long long lr,ls;
 168
 169   v2q15_a = (v2q15) {0x1234, 0x5678};
 170   v2q15_b = (v2q15) {0x6f89, 0x1111};
 171   v2q15_s = (v2q15) {0x81bd, 0x6789};
 172   v2q15_r = add_v2q15 (v2q15_a, v2q15_b);
 173   r = (int) v2q15_r;
 174   s = (int) v2q15_s;
 175   if (r != s)
 176     abort ();
 177
 178   v2q15_a = (v2q15) {0x1234, 0x5678};
 179   v2q15_b = (v2q15) {0x6f89, 0x1111};
 180   v2q15_s = (v2q15) {0x7fff, 0x6789};
 181   v2q15_r = __builtin_mips_addq_s_ph (v2q15_a, v2q15_b);
 182   r = (int) v2q15_r;
 183   s = (int) v2q15_s;
 184   if (r != s)
 185     abort ();
 186
 187   q31_a = 0x70000000;
 188   q31_b = 0x71234567;
 189   q31_s = 0x7fffffff;
 190   q31_r = __builtin_mips_addq_s_w (q31_a, q31_b);
 191   if (q31_r != q31_s)
 192     abort ();
 193
 194   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 195   v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
 196   v4i8_s = (v4i8) {0xf1, 0xbd, 0x67, 0x89};
 197   v4i8_r = add_v4i8 (v4i8_a, v4i8_b);
 198   r = (int) v4i8_r;
 199   s = (int) v4i8_s;
 200   if (r != s)
 201     abort ();
 202
 203   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 204   v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
 205   v4i8_s = (v4i8) {0xff, 0xbd, 0x67, 0x89};
 206   v4i8_r = __builtin_mips_addu_s_qb (v4i8_a, v4i8_b);
 207   r = (int) v4i8_r;
 208   s = (int) v4i8_s;
 209   if (r != s)
 210     abort ();
 211
 212   v2q15_a = (v2q15) {0x1234, 0x5678};
 213   v2q15_b = (v2q15) {0x6f89, 0x1111};
 214   v2q15_s = (v2q15) {0xa2ab, 0x4567};
 215   v2q15_r = sub_v2q15 (v2q15_a, v2q15_b);
 216   r = (int) v2q15_r;
 217   s = (int) v2q15_s;
 218   if (r != s)
 219     abort ();
 220
 221   v2q15_a = (v2q15) {0x8000, 0x5678};
 222   v2q15_b = (v2q15) {0x6f89, 0x1111};
 223   v2q15_s = (v2q15) {0x8000, 0x4567};
 224   v2q15_r = __builtin_mips_subq_s_ph (v2q15_a, v2q15_b);
 225   r = (int) v2q15_r;
 226   s = (int) v2q15_s;
 227   if (r != s)
 228     abort ();
 229
 230   q31_a = 0x70000000;
 231   q31_b = 0x71234567;
 232   q31_s = 0xfedcba99;
 233   q31_r = __builtin_mips_subq_s_w (q31_a, q31_b);
 234   if (q31_r != q31_s)
 235     abort ();
 236
 237   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 238   v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
 239   v4i8_s = (v4i8) {0xf3, 0xab, 0x45, 0x67};
 240   v4i8_r = sub_v4i8 (v4i8_a, v4i8_b);
 241   r = (int) v4i8_r;
 242   s = (int) v4i8_s;
 243   if (r != s)
 244     abort ();
 245
 246   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 247   v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
 248   v4i8_s = (v4i8) {0x0, 0x0, 0x45, 0x67};
 249   v4i8_r = __builtin_mips_subu_s_qb (v4i8_a, v4i8_b);
 250   r = (int) v4i8_r;
 251   s = (int) v4i8_s;
 252   if (r != s)
 253     abort ();
 254
 255   i32_a = 0xf5678900;
 256   i32_b = 0x7abcdef0;
 257   i32_s = 0x702467f0;
 258   i32_r = __builtin_mips_addsc (i32_a, i32_b);
 259   if (i32_r != i32_s)
 260     abort ();
 261
 262   i32_a = 0x75678900;
 263   i32_b = 0x7abcdef0;
 264   i32_s = 0xf02467f1;
 265   i32_r = __builtin_mips_addwc (i32_a, i32_b);
 266   if (i32_r != i32_s)
 267     abort ();
 268
 269   i32_a = 0;
 270   i32_b = 0x00000901;
 271   i32_s = 9;
 272   i32_r = __builtin_mips_modsub (i32_a, i32_b);
 273   if (i32_r != i32_s)
 274     abort ();
 275
 276   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 277   i32_s = 0x1f4;
 278   i32_r = __builtin_mips_raddu_w_qb (v4i8_a);
 279   if (i32_r != i32_s)
 280     abort ();
 281
 282   v2q15_a = (v2q15) {0x8000, 0x8134};
 283   v2q15_s = (v2q15) {0x7fff, 0x7ecc};
 284   v2q15_r = __builtin_mips_absq_s_ph (v2q15_a);
 285   r = (int) v2q15_r;
 286   s = (int) v2q15_s;
 287   if (r != s)
 288     abort ();
 289
 290   q31_a = (q31) 0x80000000;
 291   q31_s = (q31) 0x7fffffff;
 292   q31_r = __builtin_mips_absq_s_w (q31_a);
 293   if (q31_r != q31_s)
 294     abort ();
 295
 296   v2q15_a = (v2q15) {0x9999, 0x5612};
 297   v2q15_b = (v2q15) {0x5612, 0x3333};
 298   if (little_endian)
 299     v4i8_s = (v4i8) {0x56, 0x33, 0x99, 0x56};
 300   else
 301     v4i8_s = (v4i8) {0x99, 0x56, 0x56, 0x33};
 302   v4i8_r = __builtin_mips_precrq_qb_ph (v2q15_a, v2q15_b);
 303   r = (int) v4i8_r;
 304   s = (int) v4i8_s;
 305   if (r != s)
 306     abort ();
 307
 308   q31_a = 0x12348678;
 309   q31_b = 0x44445555;
 310   if (little_endian)
 311     v2q15_s = (v2q15) {0x4444, 0x1234};
 312   else
 313     v2q15_s = (v2q15) {0x1234, 0x4444};
 314   v2q15_r = __builtin_mips_precrq_ph_w (q31_a, q31_b);
 315   r = (int) v2q15_r;
 316   s = (int) v2q15_s;
 317   if (r != s)
 318     abort ();
 319
 320   q31_a = 0x12348678;
 321   q31_b = 0x44445555;
 322   if (little_endian)
 323     v2q15_s = (v2q15) {0x4444, 0x1235};
 324   else
 325     v2q15_s = (v2q15) {0x1235, 0x4444};
 326   v2q15_r = __builtin_mips_precrq_rs_ph_w (q31_a, q31_b);
 327   r = (int) v2q15_r;
 328   s = (int) v2q15_s;
 329   if (r != s)
 330     abort ();
 331
 332   v2q15_a = (v2q15) {0x9999, 0x5612};
 333   v2q15_b = (v2q15) {0x5612, 0x3333};
 334   if (little_endian)
 335     v4i8_s = (v4i8) {0xac, 0x66, 0x00, 0xac};
 336   else
 337     v4i8_s = (v4i8) {0x00, 0xac, 0xac, 0x66};
 338   v4i8_r = __builtin_mips_precrqu_s_qb_ph (v2q15_a, v2q15_b);
 339   r = (int) v4i8_r;
 340   s = (int) v4i8_s;
 341   if (r != s)
 342     abort ();
 343
 344   v2q15_a = (v2q15) {0x3589, 0x4444};
 345   if (little_endian)
 346     q31_s = 0x44440000;
 347   else
 348     q31_s = 0x35890000;
 349   q31_r = __builtin_mips_preceq_w_phl (v2q15_a);
 350   if (q31_r != q31_s)
 351     abort ();
 352
 353   v2q15_a = (v2q15) {0x3589, 0x4444};
 354   if (little_endian)
 355     q31_s = 0x35890000;
 356   else
 357     q31_s = 0x44440000;
 358   q31_r = __builtin_mips_preceq_w_phr (v2q15_a);
 359   if (q31_r != q31_s)
 360     abort ();
 361
 362   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 363   if (little_endian)
 364     v2q15_s = (v2q15) {0x2b00, 0x1980};
 365   else
 366     v2q15_s = (v2q15) {0x0900, 0x2b00};
 367   v2q15_r = __builtin_mips_precequ_ph_qbl (v4i8_a);
 368   r = (int) v2q15_r;
 369   s = (int) v2q15_s;
 370   if (r != s)
 371     abort ();
 372
 373   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 374   if (little_endian)
 375     v2q15_s = (v2q15) {0x0900, 0x2b00};
 376   else
 377     v2q15_s = (v2q15) {0x2b00, 0x1980};
 378   v2q15_r = __builtin_mips_precequ_ph_qbr (v4i8_a);
 379   r = (int) v2q15_r;
 380   s = (int) v2q15_s;
 381   if (r != s)
 382     abort ();
 383
 384   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 385   if (little_endian)
 386     v2q15_s = (v2q15) {0x2b00, 0x1980};
 387   else
 388     v2q15_s = (v2q15) {0x0900, 0x2b00};
 389   v2q15_r = __builtin_mips_precequ_ph_qbla (v4i8_a);
 390   r = (int) v2q15_r;
 391   s = (int) v2q15_s;
 392   if (r != s)
 393     abort ();
 394
 395   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 396   if (little_endian)
 397     v2q15_s = (v2q15) {0x0900, 0x2b00};
 398   else
 399     v2q15_s = (v2q15) {0x2b00, 0x1980};
 400   v2q15_r = __builtin_mips_precequ_ph_qbra (v4i8_a);
 401   r = (int) v2q15_r;
 402   s = (int) v2q15_s;
 403   if (r != s)
 404     abort ();
 405
 406   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 407   if (little_endian)
 408     v2q15_s = (v2q15) {0x56, 0x33};
 409   else
 410     v2q15_s = (v2q15) {0x12, 0x56};
 411   v2q15_r = __builtin_mips_preceu_ph_qbl (v4i8_a);
 412   r = (int) v2q15_r;
 413   s = (int) v2q15_s;
 414   if (r != s)
 415     abort ();
 416
 417   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 418   if (little_endian)
 419     v2q15_s = (v2q15) {0x12, 0x56};
 420   else
 421     v2q15_s = (v2q15) {0x56, 0x33};
 422   v2q15_r = __builtin_mips_preceu_ph_qbr (v4i8_a);
 423   r = (int) v2q15_r;
 424   s = (int) v2q15_s;
 425   if (r != s)
 426     abort ();
 427
 428   v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
 429   if (little_endian)
 430     v2q15_s = (v2q15) {0x99, 0x33};
 431   else
 432     v2q15_s = (v2q15) {0x12, 0x56};
 433   v2q15_r = __builtin_mips_preceu_ph_qbla (v4i8_a);
 434   r = (int) v2q15_r;
 435   s = (int) v2q15_s;
 436   if (r != s)
 437     abort ();
 438
 439   v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
 440   if (little_endian)
 441     v2q15_s = (v2q15) {0x12, 0x56};
 442   else
 443     v2q15_s = (v2q15) {0x99, 0x33};
 444   v2q15_r = __builtin_mips_preceu_ph_qbra (v4i8_a);
 445   r = (int) v2q15_r;
 446   s = (int) v2q15_s;
 447   if (r != s)
 448     abort ();
 449
 450   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 451   v4i8_s = (v4i8) {0xc8, 0xd0, 0x58, 0xe0};
 452   v4i8_r = __builtin_mips_shll_qb (v4i8_a, 2);
 453   r = (int) v4i8_r;
 454   s = (int) v4i8_s;
 455   if (r != s)
 456     abort ();
 457
 458   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 459   i32_b = 1;
 460   v4i8_s = (v4i8) {0xe4, 0x68, 0xac, 0xf0};
 461   v4i8_r = __builtin_mips_shll_qb (v4i8_a, i32_b);
 462   r = (int) v4i8_r;
 463   s = (int) v4i8_s;
 464   if (r != s)
 465     abort ();
 466
 467   v2q15_a = (v2q15) {0x1234, 0x5678};
 468   v2q15_s = (v2q15) {0x48d0, 0x59e0};
 469   v2q15_r = __builtin_mips_shll_ph (v2q15_a, 2);
 470   r = (int) v2q15_r;
 471   s = (int) v2q15_s;
 472   if (r != s)
 473     abort ();
 474
 475   v2q15_a = (v2q15) {0x1234, 0x5678};
 476   i32_b = 1;
 477   v2q15_s = (v2q15) {0x2468, 0xacf0};
 478   v2q15_r = __builtin_mips_shll_ph (v2q15_a, i32_b);
 479   r = (int) v2q15_r;
 480   s = (int) v2q15_s;
 481   if (r != s)
 482     abort ();
 483
 484   v2q15_a = (v2q15) {0x1234, 0x5678};
 485   v2q15_s = (v2q15) {0x48d0, 0x7fff};
 486   v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, 2);
 487   r = (int) v2q15_r;
 488   s = (int) v2q15_s;
 489   if (r != s)
 490     abort ();
 491
 492   v2q15_a = (v2q15) {0x1234, 0x5678};
 493   i32_b = 1;
 494   v2q15_s = (v2q15) {0x2468, 0x7fff};
 495   v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, i32_b);
 496   r = (int) v2q15_r;
 497   s = (int) v2q15_s;
 498   if (r != s)
 499     abort ();
 500
 501   q31_a = 0x70000000;
 502   q31_s = 0x7fffffff;
 503   q31_r = __builtin_mips_shll_s_w (q31_a, 2);
 504   if (q31_r != q31_s)
 505     abort ();
 506
 507   q31_a = 0x70000000;
 508   i32_b = 1;
 509   q31_s = 0x7fffffff;
 510   q31_r = __builtin_mips_shll_s_w (q31_a, i32_b);
 511   if (q31_r != q31_s)
 512     abort ();
 513
 514   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 515   v4i8_s = (v4i8) {0x3c, 0xd, 0x15, 0x1e};
 516   v4i8_r = __builtin_mips_shrl_qb (v4i8_a, 2);
 517   r = (int) v4i8_r;
 518   s = (int) v4i8_s;
 519   if (r != s)
 520     abort ();
 521
 522   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 523   i32_b = 1;
 524   v4i8_s = (v4i8) {0x79, 0x1a, 0x2b, 0x3c};
 525   v4i8_r = __builtin_mips_shrl_qb (v4i8_a, i32_b);
 526   r = (int) v4i8_r;
 527   s = (int) v4i8_s;
 528   if (r != s)
 529     abort ();
 530
 531   v2q15_a = (v2q15) {0x1234, 0x5678};
 532   v2q15_s = (v2q15) {0x48d, 0x159e};
 533   v2q15_r = __builtin_mips_shra_ph (v2q15_a, 2);
 534   r = (int) v2q15_r;
 535   s = (int) v2q15_s;
 536   if (r != s)
 537     abort ();
 538
 539   v2q15_a = (v2q15) {0x1234, 0x5678};
 540   i32_b = 1;
 541   v2q15_s = (v2q15) {0x91a, 0x2b3c};
 542   v2q15_r = __builtin_mips_shra_ph (v2q15_a, i32_b);
 543   r = (int) v2q15_r;
 544   s = (int) v2q15_s;
 545   if (r != s)
 546     abort ();
 547
 548   v2q15_a = (v2q15) {0x1234, 0x5678};
 549   v2q15_s = (v2q15) {0x48d, 0x159e};
 550   v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, 2);
 551   r = (int) v2q15_r;
 552   s = (int) v2q15_s;
 553   if (r != s)
 554     abort ();
 555
 556   v2q15_a = (v2q15) {0x1234, 0x5678};
 557   i32_b = 3;
 558   v2q15_s = (v2q15) {0x247, 0xacf};
 559   v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, i32_b);
 560   r = (int) v2q15_r;
 561   s = (int) v2q15_s;
 562   if (r != s)
 563     abort ();
 564
 565   q31_a = 0x70000000;
 566   q31_s = 0x1c000000;
 567   q31_r = __builtin_mips_shra_r_w (q31_a, 2);
 568   if (q31_r != q31_s)
 569     abort ();
 570
 571   q31_a = 0x70000004;
 572   i32_b = 3;
 573   q31_s = 0x0e000001;
 574   q31_r = __builtin_mips_shra_r_w (q31_a, i32_b);
 575   if (q31_r != q31_s)
 576     abort ();
 577
 578   v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
 579   v2q15_b = (v2q15) {0x6f89, 0x1111};
 580   if (little_endian)
 581     v2q15_s = (v2q15) {0xffff, 0x4444};
 582   else
 583     v2q15_s = (v2q15) {0x6f89, 0x2222};
 584   v2q15_r = __builtin_mips_muleu_s_ph_qbl (v4i8_a, v2q15_b);
 585   r = (int) v2q15_r;
 586   s = (int) v2q15_s;
 587   if (r != s)
 588     abort ();
 589
 590   v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
 591   v2q15_b = (v2q15) {0x6f89, 0x1111};
 592   if (little_endian)
 593     v2q15_s = (v2q15) {0x6f89, 0x2222};
 594   else
 595     v2q15_s = (v2q15) {0xffff, 0x4444};
 596   v2q15_r = __builtin_mips_muleu_s_ph_qbr (v4i8_a, v2q15_b);
 597   r = (int) v2q15_r;
 598   s = (int) v2q15_s;
 599   if (r != s)
 600     abort ();
 601
 602   v2q15_a = (v2q15) {0x1234, 0x5678};
 603   v2q15_b = (v2q15) {0x6f89, 0x1111};
 604   v2q15_s = (v2q15) {0x0fdd, 0x0b87};
 605   v2q15_r = __builtin_mips_mulq_rs_ph (v2q15_a, v2q15_b);
 606   r = (int) v2q15_r;
 607   s = (int) v2q15_s;
 608   if (r != s)
 609     abort ();
 610
 611   v2q15_a = (v2q15) {0x8000, 0x8000};
 612   v2q15_b = (v2q15) {0x8000, 0x8000};
 613   q31_s = 0x7fffffff;
 614   q31_r = __builtin_mips_muleq_s_w_phl (v2q15_a, v2q15_b);
 615   if (q31_r != q31_s)
 616     abort ();
 617
 618   v2q15_a = (v2q15) {0x8000, 0x8000};
 619   v2q15_b = (v2q15) {0x8000, 0x8000};
 620   q31_s = 0x7fffffff;
 621   q31_r = __builtin_mips_muleq_s_w_phr (v2q15_a, v2q15_b);
 622   if (q31_r != q31_s)
 623     abort ();
 624
 625 #ifndef __mips64
 626   a64_a = 0x22221111;
 627   v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
 628   v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
 629   if (little_endian)
 630     a64_s = 0x22222f27;
 631   else
 632     a64_s = 0x222238d9;
 633   a64_r = __builtin_mips_dpau_h_qbl (a64_a, v4i8_b, v4i8_c);
 634   if (a64_r != a64_s)
 635     abort ();
 636
 637   a64_a = 0x22221111;
 638   v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
 639   v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
 640   if (little_endian)
 641     a64_s = 0x222238d9;
 642   else
 643     a64_s = 0x22222f27;
 644   a64_r = __builtin_mips_dpau_h_qbr (a64_a, v4i8_b, v4i8_c);
 645   if (a64_r != a64_s)
 646     abort ();
 647
 648   a64_a = 0x22221111;
 649   v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
 650   v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
 651   if (little_endian)
 652     a64_s = 0x2221f2fb;
 653   else
 654     a64_s = 0x2221e949;
 655   a64_r = __builtin_mips_dpsu_h_qbl (a64_a, v4i8_b, v4i8_c);
 656   if (a64_r != a64_s)
 657     abort ();
 658
 659   a64_a = 0x22221111;
 660   v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
 661   v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
 662   if (little_endian)
 663     a64_s = 0x2221e949;
 664   else
 665     a64_s = 0x2221f2fb;
 666   a64_r = __builtin_mips_dpsu_h_qbr (a64_a, v4i8_b, v4i8_c);
 667   if (a64_r != a64_s)
 668     abort ();
 669
 670   a64_a = 0x00001111;
 671   v2q15_b = (v2q15) {0x8000, 0x5678};
 672   v2q15_c = (v2q15) {0x8000, 0x1111};
 673   a64_s = 0x8b877d00;
 674   a64_r = __builtin_mips_dpaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
 675   if (a64_r != a64_s)
 676     abort ();
 677
 678   a64_a = 0x00001111;
 679   v2q15_b = (v2q15) {0x8000, 0x5678};
 680   v2q15_c = (v2q15) {0x8000, 0x1111};
 681   a64_s = 0xffffffff7478a522LL;
 682   a64_r = __builtin_mips_dpsq_s_w_ph (a64_a, v2q15_b, v2q15_c);
 683   if (a64_r != a64_s)
 684     abort ();
 685
 686   a64_a = 0x00001111;
 687   v2q15_b = (v2q15) {0x8000, 0x5678};
 688   v2q15_c = (v2q15) {0x8000, 0x1111};
 689   if (little_endian)
 690     a64_s = 0xffffffff8b877d02LL;
 691   else
 692     a64_s = 0x7478a520;
 693   a64_r = __builtin_mips_mulsaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
 694   if (a64_r != a64_s)
 695     abort ();
 696
 697   a64_a = 0x00001111;
 698   q31_b = 0x80000000;
 699   q31_c = 0x80000000;
 700   a64_s = 0x7fffffffffffffffLL;
 701   a64_r = __builtin_mips_dpaq_sa_l_w (a64_a, q31_b, q31_c);
 702   if (a64_r != a64_s)
 703     abort ();
 704
 705   a64_a = 0x00001111;
 706   q31_b = 0x80000000;
 707   q31_c = 0x80000000;
 708   a64_s = 0x8000000000001112LL;
 709   a64_r = __builtin_mips_dpsq_sa_l_w (a64_a, q31_b, q31_c);
 710   if (a64_r != a64_s)
 711     abort ();
 712
 713   a64_a = 0x00001111;
 714   v2q15_b = (v2q15) {0x8000, 0x1};
 715   v2q15_c = (v2q15) {0x8000, 0x2};
 716   if (little_endian)
 717     a64_s = 0x1115;
 718   else
 719     a64_s = 0x80001110;
 720   a64_r = __builtin_mips_maq_s_w_phl (a64_a, v2q15_b, v2q15_c);
 721   if (a64_r != a64_s)
 722     abort ();
 723
 724   a64_a = 0x00001111;
 725   v2q15_b = (v2q15) {0x8000, 0x1};
 726   v2q15_c = (v2q15) {0x8000, 0x2};
 727   if (little_endian)
 728     a64_s = 0x80001110;
 729   else
 730     a64_s = 0x1115;
 731   a64_r = __builtin_mips_maq_s_w_phr (a64_a, v2q15_b, v2q15_c);
 732   if (a64_r != a64_s)
 733     abort ();
 734
 735   a64_a = 0x00001111;
 736   v2q15_b = (v2q15) {0x8000, 0x1};
 737   v2q15_c = (v2q15) {0x8000, 0x2};
 738   if (little_endian)
 739     a64_s = 0x1115;
 740   else
 741     a64_s = 0x7fffffff;
 742   a64_r = __builtin_mips_maq_sa_w_phl (a64_a, v2q15_b, v2q15_c);
 743   if (a64_r != a64_s)
 744     abort ();
 745
 746   a64_a = 0x00001111;
 747   v2q15_b = (v2q15) {0x8000, 0x1};
 748   v2q15_c = (v2q15) {0x8000, 0x2};
 749   if (little_endian)
 750     a64_s = 0x7fffffff;
 751   else
 752     a64_s = 0x1115;
 753   a64_r = __builtin_mips_maq_sa_w_phr (a64_a, v2q15_b, v2q15_c);
 754   if (a64_r != a64_s)
 755     abort ();
 756 #endif
 757
 758   i32_a = 0x12345678;
 759   i32_s = 0x00001e6a;
 760   i32_r = __builtin_mips_bitrev (i32_a);
 761   if (i32_r != i32_s)
 762     abort ();
 763
 764   i32_a = 0x00000208; // pos is 8, size is 4
 765   __builtin_mips_wrdsp (i32_a, 31);
 766   i32_a = 0x12345678;
 767   i32_b = 0x87654321;
 768   i32_s = 0x12345178;
 769   i32_r = __builtin_mips_insv (i32_a, i32_b);
 770   if (i32_r != i32_s)
 771     abort ();
 772
 773   v4i8_s = (v4i8) {1, 1, 1, 1};
 774   v4i8_r = __builtin_mips_repl_qb (1);
 775   r = (int) v4i8_r;
 776   s = (int) v4i8_s;
 777   if (r != s)
 778     abort ();
 779
 780   i32_a = 99;
 781   v4i8_s = (v4i8) {99, 99, 99, 99};
 782   v4i8_r = __builtin_mips_repl_qb (i32_a);
 783   r = (int) v4i8_r;
 784   s = (int) v4i8_s;
 785   if (r != s)
 786     abort ();
 787
 788   v2q15_s = (v2q15) {30, 30};
 789   v2q15_r = __builtin_mips_repl_ph (30);
 790   r = (int) v2q15_r;
 791   s = (int) v2q15_s;
 792   if (r != s)
 793     abort ();
 794
 795   i32_a = 0x5612;
 796   v2q15_s = (v2q15) {0x5612, 0x5612};
 797   v2q15_r = __builtin_mips_repl_ph (i32_a);
 798   r = (int) v2q15_r;
 799   s = (int) v2q15_s;
 800   if (r != s)
 801     abort ();
 802
 803   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 804   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 805   if (little_endian)
 806     i32_s = 0x03000000;
 807   else
 808     i32_s = 0x0c000000;
 809   __builtin_mips_cmpu_eq_qb (v4i8_a, v4i8_b);
 810   i32_r = __builtin_mips_rddsp (16);
 811   if (i32_r != i32_s)
 812     abort ();
 813
 814   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 815   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 816   if (little_endian)
 817     i32_s = 0x04000000;
 818   else
 819     i32_s = 0x02000000;
 820   __builtin_mips_cmpu_lt_qb (v4i8_a, v4i8_b);
 821   i32_r = __builtin_mips_rddsp (16);
 822   if (i32_r != i32_s)
 823     abort ();
 824
 825   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 826   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 827   if (little_endian)
 828     i32_s = 0x07000000;
 829   else
 830     i32_s = 0x0e000000;
 831   __builtin_mips_cmpu_le_qb (v4i8_a, v4i8_b);
 832   i32_r = __builtin_mips_rddsp (16);
 833   if (i32_r != i32_s)
 834     abort ();
 835
 836   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 837   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 838   if (little_endian)
 839     i32_s = 0x3;
 840   else
 841     i32_s = 0xc;
 842   i32_r=__builtin_mips_cmpgu_eq_qb (v4i8_a, v4i8_b);
 843   if (i32_r != i32_s)
 844     abort ();
 845
 846   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 847   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 848   if (little_endian)
 849     i32_s = 0x4;
 850   else
 851     i32_s = 0x2;
 852   i32_r = __builtin_mips_cmpgu_lt_qb (v4i8_a, v4i8_b);
 853   if (i32_r != i32_s)
 854     abort ();
 855
 856   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 857   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 858   if (little_endian)
 859     i32_s = 0x7;
 860   else
 861     i32_s = 0xe;
 862   i32_r = __builtin_mips_cmpgu_le_qb (v4i8_a, v4i8_b);
 863   if (i32_r != i32_s)
 864     abort ();
 865
 866   __builtin_mips_wrdsp (0,31); // Clear all condition code bits.
 867   v2q15_a = (v2q15) {0x1234, 0x5678};
 868   v2q15_b = (v2q15) {0x1234, 0x7856};
 869   if (little_endian)
 870     i32_s = 0x01000000;
 871   else
 872     i32_s = 0x02000000;
 873   __builtin_mips_cmp_eq_ph (v2q15_a, v2q15_b);
 874   i32_r = __builtin_mips_rddsp (16);
 875   if (i32_r != i32_s)
 876     abort ();
 877
 878   v2q15_a = (v2q15) {0x1234, 0x5678};
 879   v2q15_b = (v2q15) {0x1234, 0x7856};
 880   if (little_endian)
 881     i32_s = 0x02000000;
 882   else
 883     i32_s = 0x01000000;
 884   __builtin_mips_cmp_lt_ph (v2q15_a, v2q15_b);
 885   i32_r = __builtin_mips_rddsp (16);
 886   if (i32_r != i32_s)
 887     abort ();
 888
 889   v2q15_a = (v2q15) {0x1234, 0x5678};
 890   v2q15_b = (v2q15) {0x1234, 0x7856};
 891   i32_s = 0x03000000;
 892   __builtin_mips_cmp_le_ph (v2q15_a, v2q15_b);
 893   i32_r = __builtin_mips_rddsp (16);
 894   if (i32_r != i32_s)
 895     abort ();
 896
 897   i32_a = 0x0a000000; // cc: 0000 1010
 898   __builtin_mips_wrdsp (i32_a, 31);
 899   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 900   v4i8_b = (v4i8) {0x21, 0x43, 0x65, 0x87};
 901   if (little_endian)
 902     v4i8_s = (v4i8) {0x21, 0x34, 0x65, 0x78};
 903   else
 904     v4i8_s = (v4i8) {0x12, 0x43, 0x56, 0x87};
 905   v4i8_r = __builtin_mips_pick_qb (v4i8_a, v4i8_b);
 906   r = (int) v4i8_r;
 907   s = (int) v4i8_s;
 908   if (r != s)
 909     abort ();
 910
 911   i32_a = 0x02000000; // cc: 0000 0010
 912   __builtin_mips_wrdsp (i32_a, 31);
 913   v2q15_a = (v2q15) {0x1234, 0x5678};
 914   v2q15_b = (v2q15) {0x2143, 0x6587};
 915   if (little_endian)
 916     v2q15_s = (v2q15) {0x2143, 0x5678};
 917   else
 918     v2q15_s = (v2q15) {0x1234, 0x6587};
 919   v2q15_r = __builtin_mips_pick_ph (v2q15_a, v2q15_b);
 920   r = (int) v2q15_r;
 921   s = (int) v2q15_s;
 922   if (r != s)
 923     abort ();
 924
 925   v2q15_a = (v2q15) {0x1234, 0x5678};
 926   v2q15_b = (v2q15) {0x1234, 0x7856};
 927   if (little_endian)
 928     v2q15_s = (v2q15) {0x7856, 0x1234};
 929   else
 930     v2q15_s = (v2q15) {0x5678, 0x1234};
 931   v2q15_r = __builtin_mips_packrl_ph (v2q15_a, v2q15_b);
 932   r = (int) v2q15_r;
 933   s = (int) v2q15_s;
 934   if (r != s)
 935     abort ();
 936
 937 #ifndef __mips64
 938   a64_a = 0x1234567887654321LL;
 939   i32_s = 0x88765432;
 940   i32_r = __builtin_mips_extr_w (a64_a, 4);
 941   if (i32_r != i32_s)
 942     abort ();
 943
 944   a64_a = 0x1234567887658321LL;
 945   i32_s = 0x56788766;
 946   i32_r = __builtin_mips_extr_r_w (a64_a, 16);
 947   if (i32_r != i32_s)
 948     abort ();
 949
 950   a64_a = 0x12345677fffffff8LL;
 951   i32_s = 0x7fffffff;
 952   i32_r = __builtin_mips_extr_rs_w (a64_a, 4);
 953   if (i32_r != i32_s)
 954     abort ();
 955
 956   a64_a = 0x1234567887658321LL;
 957   i32_s = 0x7fff;
 958   i32_r = __builtin_mips_extr_s_h (a64_a, 16);
 959   if (i32_r != i32_s)
 960     abort ();
 961
 962   a64_a = 0x0000007887658321LL;
 963   i32_b = 24;
 964   i32_s = 0x7887;
 965   i32_r = __builtin_mips_extr_s_h (a64_a, i32_b);
 966   if (i32_r != i32_s)
 967     abort ();
 968
 969   a64_a = 0x1234567887654321LL;
 970   i32_b = 4;
 971   i32_s = 0x88765432;
 972   i32_r = __builtin_mips_extr_w (a64_a, i32_b);
 973   if (i32_r != i32_s)
 974     abort ();
 975
 976   a64_a = 0x1234567887658321LL;
 977   i32_b = 16;
 978   i32_s = 0x56788766;
 979   i32_r = __builtin_mips_extr_r_w (a64_a, i32_b);
 980   if (i32_r != i32_s)
 981     abort ();
 982
 983   a64_a = 0x12345677fffffff8LL;
 984   i32_b = 4;
 985   i32_s = 0x7fffffff;
 986   i32_r = __builtin_mips_extr_rs_w (a64_a, i32_b);
 987   if (i32_r != i32_s)
 988     abort ();
 989
 990   i32_a = 0x0000021f; // pos is 31
 991   __builtin_mips_wrdsp (i32_a, 31);
 992   a64_a = 0x1234567887654321LL;
 993   i32_s = 8;
 994   i32_r = __builtin_mips_extp (a64_a, 3); // extract 4 bits
 995   if (i32_r != i32_s)
 996     abort ();
 997
 998   i32_a = 0x0000021f; // pos is 31
 999   __builtin_mips_wrdsp (i32_a, 31);
1000   a64_a = 0x1234567887654321LL;
1001   i32_b = 7; // size is 8. NOTE!! we should use 7
1002   i32_s = 0x87;
1003   i32_r = __builtin_mips_extp (a64_a, i32_b);
1004   if (i32_r != i32_s)
1005     abort ();
1006
1007   i32_a = 0x0000021f; // pos is 31
1008   __builtin_mips_wrdsp (i32_a, 31);
1009   a64_a = 0x1234567887654321LL;
1010   i32_s = 8;
1011   i32_r = __builtin_mips_extpdp (a64_a, 3); // extract 4 bits
1012   if (i32_r != i32_s)
1013     abort ();
1014
1015   i32_s = 0x0000021b; // pos is 27
1016   i32_r = __builtin_mips_rddsp (31);
1017   if (i32_r != i32_s)
1018     abort ();
1019
1020   i32_a = 0x0000021f; // pos is 31
1021   __builtin_mips_wrdsp (i32_a, 31);
1022   a64_a = 0x1234567887654321LL;
1023   i32_b = 11; // size is 12. NOTE!!! We should use 11
1024   i32_s = 0x876;
1025   i32_r = __builtin_mips_extpdp (a64_a, i32_b);
1026   if (i32_r != i32_s)
1027     abort ();
1028
1029   i32_s = 0x00000213; // pos is 19
1030   i32_r = __builtin_mips_rddsp (31);
1031   if (i32_r != i32_s)
1032     abort ();
1033
1034   a64_a = 0x1234567887654321LL;
1035   a64_s = 0x0012345678876543LL;
1036   a64_r = __builtin_mips_shilo (a64_a, 8);
1037   if (a64_r != a64_s)
1038     abort ();
1039
1040   a64_a = 0x1234567887654321LL;
1041   i32_b = -16;
1042   a64_s = 0x5678876543210000LL;
1043   a64_r = __builtin_mips_shilo (a64_a, i32_b);
1044   if (a64_r != a64_s)
1045     abort ();
1046
1047   i32_a = 0x0;
1048   __builtin_mips_wrdsp (i32_a, 31);
1049   a64_a = 0x1234567887654321LL;
1050   i32_b = 0x11112222;
1051   a64_s = 0x8765432111112222LL;
1052   a64_r = __builtin_mips_mthlip (a64_a, i32_b);
1053   if (a64_r != a64_s)
1054     abort ();
1055   i32_s = 32;
1056   i32_r = __builtin_mips_rddsp (31);
1057   if (i32_r != i32_s)
1058     abort ();
1059 #endif
1060
1061   i32_a = 0x1357a468;
1062   __builtin_mips_wrdsp (i32_a, 63);
1063   i32_s = 0x03572428;
1064   i32_r = __builtin_mips_rddsp (63);
1065   if (i32_r != i32_s)
1066     abort ();
1067
1068   ptr_a = &array;
1069   i32_b = 37;
1070   i32_s = 37;
1071   i32_r = __builtin_mips_lbux (ptr_a, i32_b);
1072   if (i32_r != i32_s)
1073     abort ();
1074
1075   ptr_a = &array;
1076   i32_b = 38;
1077   if (little_endian)
1078     i32_s = 0x2726;
1079   else
1080     i32_s = 0x2627;
1081   i32_r = __builtin_mips_lhx (ptr_a, i32_b);
1082   if (i32_r != i32_s)
1083     abort ();
1084
1085   ptr_a = &array;
1086   i32_b = 40;
1087   if (little_endian)
1088     i32_s = 0x2b2a2928;
1089   else
1090     i32_s = 0x28292a2b;
1091   i32_r = __builtin_mips_lwx (ptr_a, i32_b);
1092   if (i32_r != i32_s)
1093     abort ();
1094
1095   i32_a = 0x00000220; // pos is 32, size is 4
1096   __builtin_mips_wrdsp (i32_a, 63);
1097   i32_s = 1;
1098   i32_r = __builtin_mips_bposge32 ();
1099   if (i32_r != i32_s)
1100     abort ();
1101
1102 #ifndef __mips64
1103   a64_a = 0x12345678;
1104   i32_b = 0x80000000;
1105   i32_c = 0x11112222;
1106   a64_s = 0xF7776EEF12345678LL;
1107   a64_r = __builtin_mips_madd (a64_a, i32_b, i32_c);
1108   if (a64_r != a64_s)
1109     abort ();
1110 #endif
1111
1112 #ifndef __mips64
1113   a64_a = 0x12345678;
1114   ui32_b = 0x80000000;
1115   ui32_c = 0x11112222;
1116   a64_s = 0x0888911112345678LL;
1117   a64_r = __builtin_mips_maddu (a64_a, ui32_b, ui32_c);
1118   if (a64_r != a64_s)
1119     abort ();
1120 #endif
1121
1122 #ifndef __mips64
1123   a64_a = 0x12345678;
1124   i32_b = 0x80000000;
1125   i32_c = 0x11112222;
1126   a64_s = 0x0888911112345678LL;
1127   a64_r = __builtin_mips_msub (a64_a, i32_b, i32_c);
1128   if (a64_r != a64_s)
1129     abort ();
1130 #endif
1131
1132 #ifndef __mips64
1133   a64_a = 0x12345678;
1134   ui32_b = 0x80000000;
1135   ui32_c = 0x11112222;
1136   a64_s = 0xF7776EEF12345678LL;
1137   a64_r = __builtin_mips_msubu (a64_a, ui32_b, ui32_c);
1138   if (a64_r != a64_s)
1139     abort ();
1140 #endif
1141
1142 #ifndef __mips64
1143   i32_a = 0x80000000;
1144   i32_b = 0x11112222;
1145   a64_s = 0xF7776EEF00000000LL;
1146   a64_r = __builtin_mips_mult (i32_a, i32_b);
1147   if (a64_r != a64_s)
1148     abort ();
1149 #endif
1150
1151 #ifndef __mips64
1152   ui32_a = 0x80000000;
1153   ui32_b = 0x11112222;
1154   a64_s = 0x888911100000000LL;
1155   a64_r = __builtin_mips_multu (ui32_a, ui32_b);
1156   if (a64_r != a64_s)
1157     abort ();
1158 #endif
1159 }
1160