gcc-4_9/gcc/testsuite/gcc.target/mips/mips32-dsp-run.c

   1 /* Test MIPS32 DSP instructions */
   2 /* { dg-do run } */
   3 /* { dg-options "-mdsp" } */
   4
   5 #include <stdlib.h>
   6 #include <stdio.h>
   7
   8 typedef signed char v4i8 __attribute__ ((vector_size(4)));
   9 typedef short v2q15 __attribute__ ((vector_size(4)));
  10
  11 typedef int q31;
  12 typedef int i32;
  13 typedef unsigned int ui32;
  14 typedef long long a64;
  15
  16 NOMIPS16 void test_MIPS_DSP (void);
  17
  18 char array[100];
  19 int little_endian;
  20
  21 int main ()
  22 {
  23   int i;
  24
  25   union { long long ll; int i[2]; } endianness_test;
  26   endianness_test.ll = 1;
  27   little_endian = endianness_test.i[0];
  28
  29   for (i = 0; i < 100; i++)
  30     array[i] = i;
  31
  32   test_MIPS_DSP ();
  33
  34   exit (0);
  35 }
  36
  37 NOMIPS16 v2q15 add_v2q15 (v2q15 a, v2q15 b)
  38 {
  39   return __builtin_mips_addq_ph (a, b);
  40 }
  41
  42 NOMIPS16 v4i8 add_v4i8 (v4i8 a, v4i8 b)
  43 {
  44   return __builtin_mips_addu_qb (a, b);
  45 }
  46
  47 NOMIPS16 v2q15 sub_v2q15 (v2q15 a, v2q15 b)
  48 {
  49   return __builtin_mips_subq_ph (a, b);
  50 }
  51
  52 NOMIPS16 v4i8 sub_v4i8 (v4i8 a, v4i8 b)
  53 {
  54   return __builtin_mips_subu_qb (a, b);
  55 }
  56
  57 NOMIPS16 void test_MIPS_DSP ()
  58 {
  59   v4i8 v4i8_a,v4i8_b,v4i8_c,v4i8_r,v4i8_s;
  60   v2q15 v2q15_a,v2q15_b,v2q15_c,v2q15_r,v2q15_s;
  61   q31 q31_a,q31_b,q31_c,q31_r,q31_s;
  62   /* To protect the multiplication-related tests from being optimized
  63      at compile time.  */
  64   volatile i32 i32_a,i32_b,i32_c,i32_r,i32_s;
  65   volatile ui32 ui32_a,ui32_b,ui32_c;
  66   a64 a64_a,a64_b,a64_c,a64_r,a64_s;
  67
  68   void *ptr_a;
  69   int r,s;
  70   long long lr,ls;
  71
  72   v2q15_a = (v2q15) {0x1234, 0x5678};
  73   v2q15_b = (v2q15) {0x6f89, 0x1111};
  74   v2q15_s = (v2q15) {0x81bd, 0x6789};
  75   v2q15_r = add_v2q15 (v2q15_a, v2q15_b);
  76   r = (int) v2q15_r;
  77   s = (int) v2q15_s;
  78   if (r != s)
  79     abort ();
  80
  81   v2q15_a = (v2q15) {0x1234, 0x5678};
  82   v2q15_b = (v2q15) {0x6f89, 0x1111};
  83   v2q15_s = (v2q15) {0x7fff, 0x6789};
  84   v2q15_r = __builtin_mips_addq_s_ph (v2q15_a, v2q15_b);
  85   r = (int) v2q15_r;
  86   s = (int) v2q15_s;
  87   if (r != s)
  88     abort ();
  89
  90   q31_a = 0x70000000;
  91   q31_b = 0x71234567;
  92   q31_s = 0x7fffffff;
  93   q31_r = __builtin_mips_addq_s_w (q31_a, q31_b);
  94   if (q31_r != q31_s)
  95     abort ();
  96
  97   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
  98   v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
  99   v4i8_s = (v4i8) {0xf1, 0xbd, 0x67, 0x89};
 100   v4i8_r = add_v4i8 (v4i8_a, v4i8_b);
 101   r = (int) v4i8_r;
 102   s = (int) v4i8_s;
 103   if (r != s)
 104     abort ();
 105
 106   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 107   v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
 108   v4i8_s = (v4i8) {0xff, 0xbd, 0x67, 0x89};
 109   v4i8_r = __builtin_mips_addu_s_qb (v4i8_a, v4i8_b);
 110   r = (int) v4i8_r;
 111   s = (int) v4i8_s;
 112   if (r != s)
 113     abort ();
 114
 115   v2q15_a = (v2q15) {0x1234, 0x5678};
 116   v2q15_b = (v2q15) {0x6f89, 0x1111};
 117   v2q15_s = (v2q15) {0xa2ab, 0x4567};
 118   v2q15_r = sub_v2q15 (v2q15_a, v2q15_b);
 119   r = (int) v2q15_r;
 120   s = (int) v2q15_s;
 121   if (r != s)
 122     abort ();
 123
 124   v2q15_a = (v2q15) {0x8000, 0x5678};
 125   v2q15_b = (v2q15) {0x6f89, 0x1111};
 126   v2q15_s = (v2q15) {0x8000, 0x4567};
 127   v2q15_r = __builtin_mips_subq_s_ph (v2q15_a, v2q15_b);
 128   r = (int) v2q15_r;
 129   s = (int) v2q15_s;
 130   if (r != s)
 131     abort ();
 132
 133   q31_a = 0x70000000;
 134   q31_b = 0x71234567;
 135   q31_s = 0xfedcba99;
 136   q31_r = __builtin_mips_subq_s_w (q31_a, q31_b);
 137   if (q31_r != q31_s)
 138     abort ();
 139
 140   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 141   v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
 142   v4i8_s = (v4i8) {0xf3, 0xab, 0x45, 0x67};
 143   v4i8_r = sub_v4i8 (v4i8_a, v4i8_b);
 144   r = (int) v4i8_r;
 145   s = (int) v4i8_s;
 146   if (r != s)
 147     abort ();
 148
 149   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 150   v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
 151   v4i8_s = (v4i8) {0x0, 0x0, 0x45, 0x67};
 152   v4i8_r = __builtin_mips_subu_s_qb (v4i8_a, v4i8_b);
 153   r = (int) v4i8_r;
 154   s = (int) v4i8_s;
 155   if (r != s)
 156     abort ();
 157
 158   i32_a = 0xf5678900;
 159   i32_b = 0x7abcdef0;
 160   i32_s = 0x702467f0;
 161   i32_r = __builtin_mips_addsc (i32_a, i32_b);
 162   if (i32_r != i32_s)
 163     abort ();
 164
 165   i32_a = 0x75678900;
 166   i32_b = 0x7abcdef0;
 167   i32_s = 0xf02467f1;
 168   i32_r = __builtin_mips_addwc (i32_a, i32_b);
 169   if (i32_r != i32_s)
 170     abort ();
 171
 172   i32_a = 0;
 173   i32_b = 0x00000901;
 174   i32_s = 9;
 175   i32_r = __builtin_mips_modsub (i32_a, i32_b);
 176   if (i32_r != i32_s)
 177     abort ();
 178
 179   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 180   i32_s = 0x1f4;
 181   i32_r = __builtin_mips_raddu_w_qb (v4i8_a);
 182   if (i32_r != i32_s)
 183     abort ();
 184
 185   v2q15_a = (v2q15) {0x8000, 0x8134};
 186   v2q15_s = (v2q15) {0x7fff, 0x7ecc};
 187   v2q15_r = __builtin_mips_absq_s_ph (v2q15_a);
 188   r = (int) v2q15_r;
 189   s = (int) v2q15_s;
 190   if (r != s)
 191     abort ();
 192
 193   q31_a = (q31) 0x80000000;
 194   q31_s = (q31) 0x7fffffff;
 195   q31_r = __builtin_mips_absq_s_w (q31_a);
 196   if (q31_r != q31_s)
 197     abort ();
 198
 199   v2q15_a = (v2q15) {0x9999, 0x5612};
 200   v2q15_b = (v2q15) {0x5612, 0x3333};
 201   if (little_endian)
 202     v4i8_s = (v4i8) {0x56, 0x33, 0x99, 0x56};
 203   else
 204     v4i8_s = (v4i8) {0x99, 0x56, 0x56, 0x33};
 205   v4i8_r = __builtin_mips_precrq_qb_ph (v2q15_a, v2q15_b);
 206   r = (int) v4i8_r;
 207   s = (int) v4i8_s;
 208   if (r != s)
 209     abort ();
 210
 211   q31_a = 0x12348678;
 212   q31_b = 0x44445555;
 213   if (little_endian)
 214     v2q15_s = (v2q15) {0x4444, 0x1234};
 215   else
 216     v2q15_s = (v2q15) {0x1234, 0x4444};
 217   v2q15_r = __builtin_mips_precrq_ph_w (q31_a, q31_b);
 218   r = (int) v2q15_r;
 219   s = (int) v2q15_s;
 220   if (r != s)
 221     abort ();
 222
 223   q31_a = 0x12348678;
 224   q31_b = 0x44445555;
 225   if (little_endian)
 226     v2q15_s = (v2q15) {0x4444, 0x1235};
 227   else
 228     v2q15_s = (v2q15) {0x1235, 0x4444};
 229   v2q15_r = __builtin_mips_precrq_rs_ph_w (q31_a, q31_b);
 230   r = (int) v2q15_r;
 231   s = (int) v2q15_s;
 232   if (r != s)
 233     abort ();
 234
 235   v2q15_a = (v2q15) {0x9999, 0x5612};
 236   v2q15_b = (v2q15) {0x5612, 0x3333};
 237   if (little_endian)
 238     v4i8_s = (v4i8) {0xac, 0x66, 0x00, 0xac};
 239   else
 240     v4i8_s = (v4i8) {0x00, 0xac, 0xac, 0x66};
 241   v4i8_r = __builtin_mips_precrqu_s_qb_ph (v2q15_a, v2q15_b);
 242   r = (int) v4i8_r;
 243   s = (int) v4i8_s;
 244   if (r != s)
 245     abort ();
 246
 247   v2q15_a = (v2q15) {0x3589, 0x4444};
 248   if (little_endian)
 249     q31_s = 0x44440000;
 250   else
 251     q31_s = 0x35890000;
 252   q31_r = __builtin_mips_preceq_w_phl (v2q15_a);
 253   if (q31_r != q31_s)
 254     abort ();
 255
 256   v2q15_a = (v2q15) {0x3589, 0x4444};
 257   if (little_endian)
 258     q31_s = 0x35890000;
 259   else
 260     q31_s = 0x44440000;
 261   q31_r = __builtin_mips_preceq_w_phr (v2q15_a);
 262   if (q31_r != q31_s)
 263     abort ();
 264
 265   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 266   if (little_endian)
 267     v2q15_s = (v2q15) {0x2b00, 0x1980};
 268   else
 269     v2q15_s = (v2q15) {0x0900, 0x2b00};
 270   v2q15_r = __builtin_mips_precequ_ph_qbl (v4i8_a);
 271   r = (int) v2q15_r;
 272   s = (int) v2q15_s;
 273   if (r != s)
 274     abort ();
 275
 276   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 277   if (little_endian)
 278     v2q15_s = (v2q15) {0x0900, 0x2b00};
 279   else
 280     v2q15_s = (v2q15) {0x2b00, 0x1980};
 281   v2q15_r = __builtin_mips_precequ_ph_qbr (v4i8_a);
 282   r = (int) v2q15_r;
 283   s = (int) v2q15_s;
 284   if (r != s)
 285     abort ();
 286
 287   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 288   if (little_endian)
 289     v2q15_s = (v2q15) {0x2b00, 0x1980};
 290   else
 291     v2q15_s = (v2q15) {0x0900, 0x2b00};
 292   v2q15_r = __builtin_mips_precequ_ph_qbla (v4i8_a);
 293   r = (int) v2q15_r;
 294   s = (int) v2q15_s;
 295   if (r != s)
 296     abort ();
 297
 298   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 299   if (little_endian)
 300     v2q15_s = (v2q15) {0x0900, 0x2b00};
 301   else
 302     v2q15_s = (v2q15) {0x2b00, 0x1980};
 303   v2q15_r = __builtin_mips_precequ_ph_qbra (v4i8_a);
 304   r = (int) v2q15_r;
 305   s = (int) v2q15_s;
 306   if (r != s)
 307     abort ();
 308
 309   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 310   if (little_endian)
 311     v2q15_s = (v2q15) {0x56, 0x33};
 312   else
 313     v2q15_s = (v2q15) {0x12, 0x56};
 314   v2q15_r = __builtin_mips_preceu_ph_qbl (v4i8_a);
 315   r = (int) v2q15_r;
 316   s = (int) v2q15_s;
 317   if (r != s)
 318     abort ();
 319
 320   v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
 321   if (little_endian)
 322     v2q15_s = (v2q15) {0x12, 0x56};
 323   else
 324     v2q15_s = (v2q15) {0x56, 0x33};
 325   v2q15_r = __builtin_mips_preceu_ph_qbr (v4i8_a);
 326   r = (int) v2q15_r;
 327   s = (int) v2q15_s;
 328   if (r != s)
 329     abort ();
 330
 331   v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
 332   if (little_endian)
 333     v2q15_s = (v2q15) {0x99, 0x33};
 334   else
 335     v2q15_s = (v2q15) {0x12, 0x56};
 336   v2q15_r = __builtin_mips_preceu_ph_qbla (v4i8_a);
 337   r = (int) v2q15_r;
 338   s = (int) v2q15_s;
 339   if (r != s)
 340     abort ();
 341
 342   v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
 343   if (little_endian)
 344     v2q15_s = (v2q15) {0x12, 0x56};
 345   else
 346     v2q15_s = (v2q15) {0x99, 0x33};
 347   v2q15_r = __builtin_mips_preceu_ph_qbra (v4i8_a);
 348   r = (int) v2q15_r;
 349   s = (int) v2q15_s;
 350   if (r != s)
 351     abort ();
 352
 353   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 354   v4i8_s = (v4i8) {0xc8, 0xd0, 0x58, 0xe0};
 355   v4i8_r = __builtin_mips_shll_qb (v4i8_a, 2);
 356   r = (int) v4i8_r;
 357   s = (int) v4i8_s;
 358   if (r != s)
 359     abort ();
 360
 361   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 362   i32_b = 1;
 363   v4i8_s = (v4i8) {0xe4, 0x68, 0xac, 0xf0};
 364   v4i8_r = __builtin_mips_shll_qb (v4i8_a, i32_b);
 365   r = (int) v4i8_r;
 366   s = (int) v4i8_s;
 367   if (r != s)
 368     abort ();
 369
 370   v2q15_a = (v2q15) {0x1234, 0x5678};
 371   v2q15_s = (v2q15) {0x48d0, 0x59e0};
 372   v2q15_r = __builtin_mips_shll_ph (v2q15_a, 2);
 373   r = (int) v2q15_r;
 374   s = (int) v2q15_s;
 375   if (r != s)
 376     abort ();
 377
 378   v2q15_a = (v2q15) {0x1234, 0x5678};
 379   i32_b = 1;
 380   v2q15_s = (v2q15) {0x2468, 0xacf0};
 381   v2q15_r = __builtin_mips_shll_ph (v2q15_a, i32_b);
 382   r = (int) v2q15_r;
 383   s = (int) v2q15_s;
 384   if (r != s)
 385     abort ();
 386
 387   v2q15_a = (v2q15) {0x1234, 0x5678};
 388   v2q15_s = (v2q15) {0x48d0, 0x7fff};
 389   v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, 2);
 390   r = (int) v2q15_r;
 391   s = (int) v2q15_s;
 392   if (r != s)
 393     abort ();
 394
 395   v2q15_a = (v2q15) {0x1234, 0x5678};
 396   i32_b = 1;
 397   v2q15_s = (v2q15) {0x2468, 0x7fff};
 398   v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, i32_b);
 399   r = (int) v2q15_r;
 400   s = (int) v2q15_s;
 401   if (r != s)
 402     abort ();
 403
 404   q31_a = 0x70000000;
 405   q31_s = 0x7fffffff;
 406   q31_r = __builtin_mips_shll_s_w (q31_a, 2);
 407   if (q31_r != q31_s)
 408     abort ();
 409
 410   q31_a = 0x70000000;
 411   i32_b = 1;
 412   q31_s = 0x7fffffff;
 413   q31_r = __builtin_mips_shll_s_w (q31_a, i32_b);
 414   if (q31_r != q31_s)
 415     abort ();
 416
 417   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 418   v4i8_s = (v4i8) {0x3c, 0xd, 0x15, 0x1e};
 419   v4i8_r = __builtin_mips_shrl_qb (v4i8_a, 2);
 420   r = (int) v4i8_r;
 421   s = (int) v4i8_s;
 422   if (r != s)
 423     abort ();
 424
 425   v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
 426   i32_b = 1;
 427   v4i8_s = (v4i8) {0x79, 0x1a, 0x2b, 0x3c};
 428   v4i8_r = __builtin_mips_shrl_qb (v4i8_a, i32_b);
 429   r = (int) v4i8_r;
 430   s = (int) v4i8_s;
 431   if (r != s)
 432     abort ();
 433
 434   v2q15_a = (v2q15) {0x1234, 0x5678};
 435   v2q15_s = (v2q15) {0x48d, 0x159e};
 436   v2q15_r = __builtin_mips_shra_ph (v2q15_a, 2);
 437   r = (int) v2q15_r;
 438   s = (int) v2q15_s;
 439   if (r != s)
 440     abort ();
 441
 442   v2q15_a = (v2q15) {0x1234, 0x5678};
 443   i32_b = 1;
 444   v2q15_s = (v2q15) {0x91a, 0x2b3c};
 445   v2q15_r = __builtin_mips_shra_ph (v2q15_a, i32_b);
 446   r = (int) v2q15_r;
 447   s = (int) v2q15_s;
 448   if (r != s)
 449     abort ();
 450
 451   v2q15_a = (v2q15) {0x1234, 0x5678};
 452   v2q15_s = (v2q15) {0x48d, 0x159e};
 453   v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, 2);
 454   r = (int) v2q15_r;
 455   s = (int) v2q15_s;
 456   if (r != s)
 457     abort ();
 458
 459   v2q15_a = (v2q15) {0x1234, 0x5678};
 460   i32_b = 3;
 461   v2q15_s = (v2q15) {0x247, 0xacf};
 462   v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, i32_b);
 463   r = (int) v2q15_r;
 464   s = (int) v2q15_s;
 465   if (r != s)
 466     abort ();
 467
 468   q31_a = 0x70000000;
 469   q31_s = 0x1c000000;
 470   q31_r = __builtin_mips_shra_r_w (q31_a, 2);
 471   if (q31_r != q31_s)
 472     abort ();
 473
 474   q31_a = 0x70000004;
 475   i32_b = 3;
 476   q31_s = 0x0e000001;
 477   q31_r = __builtin_mips_shra_r_w (q31_a, i32_b);
 478   if (q31_r != q31_s)
 479     abort ();
 480
 481   v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
 482   v2q15_b = (v2q15) {0x6f89, 0x1111};
 483   if (little_endian)
 484     v2q15_s = (v2q15) {0xffff, 0x4444};
 485   else
 486     v2q15_s = (v2q15) {0x6f89, 0x2222};
 487   v2q15_r = __builtin_mips_muleu_s_ph_qbl (v4i8_a, v2q15_b);
 488   r = (int) v2q15_r;
 489   s = (int) v2q15_s;
 490   if (r != s)
 491     abort ();
 492
 493   v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
 494   v2q15_b = (v2q15) {0x6f89, 0x1111};
 495   if (little_endian)
 496     v2q15_s = (v2q15) {0x6f89, 0x2222};
 497   else
 498     v2q15_s = (v2q15) {0xffff, 0x4444};
 499   v2q15_r = __builtin_mips_muleu_s_ph_qbr (v4i8_a, v2q15_b);
 500   r = (int) v2q15_r;
 501   s = (int) v2q15_s;
 502   if (r != s)
 503     abort ();
 504
 505   v2q15_a = (v2q15) {0x1234, 0x5678};
 506   v2q15_b = (v2q15) {0x6f89, 0x1111};
 507   v2q15_s = (v2q15) {0x0fdd, 0x0b87};
 508   v2q15_r = __builtin_mips_mulq_rs_ph (v2q15_a, v2q15_b);
 509   r = (int) v2q15_r;
 510   s = (int) v2q15_s;
 511   if (r != s)
 512     abort ();
 513
 514   v2q15_a = (v2q15) {0x8000, 0x8000};
 515   v2q15_b = (v2q15) {0x8000, 0x8000};
 516   q31_s = 0x7fffffff;
 517   q31_r = __builtin_mips_muleq_s_w_phl (v2q15_a, v2q15_b);
 518   if (q31_r != q31_s)
 519     abort ();
 520
 521   v2q15_a = (v2q15) {0x8000, 0x8000};
 522   v2q15_b = (v2q15) {0x8000, 0x8000};
 523   q31_s = 0x7fffffff;
 524   q31_r = __builtin_mips_muleq_s_w_phr (v2q15_a, v2q15_b);
 525   if (q31_r != q31_s)
 526     abort ();
 527
 528 #ifndef __mips64
 529   a64_a = 0x22221111;
 530   v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
 531   v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
 532   if (little_endian)
 533     a64_s = 0x22222f27;
 534   else
 535     a64_s = 0x222238d9;
 536   a64_r = __builtin_mips_dpau_h_qbl (a64_a, v4i8_b, v4i8_c);
 537   if (a64_r != a64_s)
 538     abort ();
 539
 540   a64_a = 0x22221111;
 541   v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
 542   v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
 543   if (little_endian)
 544     a64_s = 0x222238d9;
 545   else
 546     a64_s = 0x22222f27;
 547   a64_r = __builtin_mips_dpau_h_qbr (a64_a, v4i8_b, v4i8_c);
 548   if (a64_r != a64_s)
 549     abort ();
 550
 551   a64_a = 0x22221111;
 552   v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
 553   v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
 554   if (little_endian)
 555     a64_s = 0x2221f2fb;
 556   else
 557     a64_s = 0x2221e949;
 558   a64_r = __builtin_mips_dpsu_h_qbl (a64_a, v4i8_b, v4i8_c);
 559   if (a64_r != a64_s)
 560     abort ();
 561
 562   a64_a = 0x22221111;
 563   v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
 564   v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
 565   if (little_endian)
 566     a64_s = 0x2221e949;
 567   else
 568     a64_s = 0x2221f2fb;
 569   a64_r = __builtin_mips_dpsu_h_qbr (a64_a, v4i8_b, v4i8_c);
 570   if (a64_r != a64_s)
 571     abort ();
 572
 573   a64_a = 0x00001111;
 574   v2q15_b = (v2q15) {0x8000, 0x5678};
 575   v2q15_c = (v2q15) {0x8000, 0x1111};
 576   a64_s = 0x8b877d00;
 577   a64_r = __builtin_mips_dpaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
 578   if (a64_r != a64_s)
 579     abort ();
 580
 581   a64_a = 0x00001111;
 582   v2q15_b = (v2q15) {0x8000, 0x5678};
 583   v2q15_c = (v2q15) {0x8000, 0x1111};
 584   a64_s = 0xffffffff7478a522LL;
 585   a64_r = __builtin_mips_dpsq_s_w_ph (a64_a, v2q15_b, v2q15_c);
 586   if (a64_r != a64_s)
 587     abort ();
 588
 589   a64_a = 0x00001111;
 590   v2q15_b = (v2q15) {0x8000, 0x5678};
 591   v2q15_c = (v2q15) {0x8000, 0x1111};
 592   if (little_endian)
 593     a64_s = 0xffffffff8b877d02LL;
 594   else
 595     a64_s = 0x7478a520;
 596   a64_r = __builtin_mips_mulsaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
 597   if (a64_r != a64_s)
 598     abort ();
 599
 600   a64_a = 0x00001111;
 601   q31_b = 0x80000000;
 602   q31_c = 0x80000000;
 603   a64_s = 0x7fffffffffffffffLL;
 604   a64_r = __builtin_mips_dpaq_sa_l_w (a64_a, q31_b, q31_c);
 605   if (a64_r != a64_s)
 606     abort ();
 607
 608   a64_a = 0x00001111;
 609   q31_b = 0x80000000;
 610   q31_c = 0x80000000;
 611   a64_s = 0x8000000000001112LL;
 612   a64_r = __builtin_mips_dpsq_sa_l_w (a64_a, q31_b, q31_c);
 613   if (a64_r != a64_s)
 614     abort ();
 615
 616   a64_a = 0x00001111;
 617   v2q15_b = (v2q15) {0x8000, 0x1};
 618   v2q15_c = (v2q15) {0x8000, 0x2};
 619   if (little_endian)
 620     a64_s = 0x1115;
 621   else
 622     a64_s = 0x80001110;
 623   a64_r = __builtin_mips_maq_s_w_phl (a64_a, v2q15_b, v2q15_c);
 624   if (a64_r != a64_s)
 625     abort ();
 626
 627   a64_a = 0x00001111;
 628   v2q15_b = (v2q15) {0x8000, 0x1};
 629   v2q15_c = (v2q15) {0x8000, 0x2};
 630   if (little_endian)
 631     a64_s = 0x80001110;
 632   else
 633     a64_s = 0x1115;
 634   a64_r = __builtin_mips_maq_s_w_phr (a64_a, v2q15_b, v2q15_c);
 635   if (a64_r != a64_s)
 636     abort ();
 637
 638   a64_a = 0x00001111;
 639   v2q15_b = (v2q15) {0x8000, 0x1};
 640   v2q15_c = (v2q15) {0x8000, 0x2};
 641   if (little_endian)
 642     a64_s = 0x1115;
 643   else
 644     a64_s = 0x7fffffff;
 645   a64_r = __builtin_mips_maq_sa_w_phl (a64_a, v2q15_b, v2q15_c);
 646   if (a64_r != a64_s)
 647     abort ();
 648
 649   a64_a = 0x00001111;
 650   v2q15_b = (v2q15) {0x8000, 0x1};
 651   v2q15_c = (v2q15) {0x8000, 0x2};
 652   if (little_endian)
 653     a64_s = 0x7fffffff;
 654   else
 655     a64_s = 0x1115;
 656   a64_r = __builtin_mips_maq_sa_w_phr (a64_a, v2q15_b, v2q15_c);
 657   if (a64_r != a64_s)
 658     abort ();
 659 #endif
 660
 661   i32_a = 0x12345678;
 662   i32_s = 0x00001e6a;
 663   i32_r = __builtin_mips_bitrev (i32_a);
 664   if (i32_r != i32_s)
 665     abort ();
 666
 667   i32_a = 0x00000208; // pos is 8, size is 4
 668   __builtin_mips_wrdsp (i32_a, 31);
 669   i32_a = 0x12345678;
 670   i32_b = 0x87654321;
 671   i32_s = 0x12345178;
 672   i32_r = __builtin_mips_insv (i32_a, i32_b);
 673   if (i32_r != i32_s)
 674     abort ();
 675
 676   v4i8_s = (v4i8) {1, 1, 1, 1};
 677   v4i8_r = __builtin_mips_repl_qb (1);
 678   r = (int) v4i8_r;
 679   s = (int) v4i8_s;
 680   if (r != s)
 681     abort ();
 682
 683   i32_a = 99;
 684   v4i8_s = (v4i8) {99, 99, 99, 99};
 685   v4i8_r = __builtin_mips_repl_qb (i32_a);
 686   r = (int) v4i8_r;
 687   s = (int) v4i8_s;
 688   if (r != s)
 689     abort ();
 690
 691   v2q15_s = (v2q15) {30, 30};
 692   v2q15_r = __builtin_mips_repl_ph (30);
 693   r = (int) v2q15_r;
 694   s = (int) v2q15_s;
 695   if (r != s)
 696     abort ();
 697
 698   i32_a = 0x5612;
 699   v2q15_s = (v2q15) {0x5612, 0x5612};
 700   v2q15_r = __builtin_mips_repl_ph (i32_a);
 701   r = (int) v2q15_r;
 702   s = (int) v2q15_s;
 703   if (r != s)
 704     abort ();
 705
 706   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 707   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 708   if (little_endian)
 709     i32_s = 0x03000000;
 710   else
 711     i32_s = 0x0c000000;
 712   __builtin_mips_cmpu_eq_qb (v4i8_a, v4i8_b);
 713   i32_r = __builtin_mips_rddsp (16);
 714   if (i32_r != i32_s)
 715     abort ();
 716
 717   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 718   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 719   if (little_endian)
 720     i32_s = 0x04000000;
 721   else
 722     i32_s = 0x02000000;
 723   __builtin_mips_cmpu_lt_qb (v4i8_a, v4i8_b);
 724   i32_r = __builtin_mips_rddsp (16);
 725   if (i32_r != i32_s)
 726     abort ();
 727
 728   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 729   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 730   if (little_endian)
 731     i32_s = 0x07000000;
 732   else
 733     i32_s = 0x0e000000;
 734   __builtin_mips_cmpu_le_qb (v4i8_a, v4i8_b);
 735   i32_r = __builtin_mips_rddsp (16);
 736   if (i32_r != i32_s)
 737     abort ();
 738
 739   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 740   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 741   if (little_endian)
 742     i32_s = 0x3;
 743   else
 744     i32_s = 0xc;
 745   i32_r=__builtin_mips_cmpgu_eq_qb (v4i8_a, v4i8_b);
 746   if (i32_r != i32_s)
 747     abort ();
 748
 749   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 750   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 751   if (little_endian)
 752     i32_s = 0x4;
 753   else
 754     i32_s = 0x2;
 755   i32_r = __builtin_mips_cmpgu_lt_qb (v4i8_a, v4i8_b);
 756   if (i32_r != i32_s)
 757     abort ();
 758
 759   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 760   v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
 761   if (little_endian)
 762     i32_s = 0x7;
 763   else
 764     i32_s = 0xe;
 765   i32_r = __builtin_mips_cmpgu_le_qb (v4i8_a, v4i8_b);
 766   if (i32_r != i32_s)
 767     abort ();
 768
 769   __builtin_mips_wrdsp (0,31); // Clear all condition code bits.
 770   v2q15_a = (v2q15) {0x1234, 0x5678};
 771   v2q15_b = (v2q15) {0x1234, 0x7856};
 772   if (little_endian)
 773     i32_s = 0x01000000;
 774   else
 775     i32_s = 0x02000000;
 776   __builtin_mips_cmp_eq_ph (v2q15_a, v2q15_b);
 777   i32_r = __builtin_mips_rddsp (16);
 778   if (i32_r != i32_s)
 779     abort ();
 780
 781   v2q15_a = (v2q15) {0x1234, 0x5678};
 782   v2q15_b = (v2q15) {0x1234, 0x7856};
 783   if (little_endian)
 784     i32_s = 0x02000000;
 785   else
 786     i32_s = 0x01000000;
 787   __builtin_mips_cmp_lt_ph (v2q15_a, v2q15_b);
 788   i32_r = __builtin_mips_rddsp (16);
 789   if (i32_r != i32_s)
 790     abort ();
 791
 792   v2q15_a = (v2q15) {0x1234, 0x5678};
 793   v2q15_b = (v2q15) {0x1234, 0x7856};
 794   i32_s = 0x03000000;
 795   __builtin_mips_cmp_le_ph (v2q15_a, v2q15_b);
 796   i32_r = __builtin_mips_rddsp (16);
 797   if (i32_r != i32_s)
 798     abort ();
 799
 800   i32_a = 0x0a000000; // cc: 0000 1010
 801   __builtin_mips_wrdsp (i32_a, 31);
 802   v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
 803   v4i8_b = (v4i8) {0x21, 0x43, 0x65, 0x87};
 804   if (little_endian)
 805     v4i8_s = (v4i8) {0x21, 0x34, 0x65, 0x78};
 806   else
 807     v4i8_s = (v4i8) {0x12, 0x43, 0x56, 0x87};
 808   v4i8_r = __builtin_mips_pick_qb (v4i8_a, v4i8_b);
 809   r = (int) v4i8_r;
 810   s = (int) v4i8_s;
 811   if (r != s)
 812     abort ();
 813
 814   i32_a = 0x02000000; // cc: 0000 0010
 815   __builtin_mips_wrdsp (i32_a, 31);
 816   v2q15_a = (v2q15) {0x1234, 0x5678};
 817   v2q15_b = (v2q15) {0x2143, 0x6587};
 818   if (little_endian)
 819     v2q15_s = (v2q15) {0x2143, 0x5678};
 820   else
 821     v2q15_s = (v2q15) {0x1234, 0x6587};
 822   v2q15_r = __builtin_mips_pick_ph (v2q15_a, v2q15_b);
 823   r = (int) v2q15_r;
 824   s = (int) v2q15_s;
 825   if (r != s)
 826     abort ();
 827
 828   v2q15_a = (v2q15) {0x1234, 0x5678};
 829   v2q15_b = (v2q15) {0x1234, 0x7856};
 830   if (little_endian)
 831     v2q15_s = (v2q15) {0x7856, 0x1234};
 832   else
 833     v2q15_s = (v2q15) {0x5678, 0x1234};
 834   v2q15_r = __builtin_mips_packrl_ph (v2q15_a, v2q15_b);
 835   r = (int) v2q15_r;
 836   s = (int) v2q15_s;
 837   if (r != s)
 838     abort ();
 839
 840 #ifndef __mips64
 841   a64_a = 0x1234567887654321LL;
 842   i32_s = 0x88765432;
 843   i32_r = __builtin_mips_extr_w (a64_a, 4);
 844   if (i32_r != i32_s)
 845     abort ();
 846
 847   a64_a = 0x1234567887658321LL;
 848   i32_s = 0x56788766;
 849   i32_r = __builtin_mips_extr_r_w (a64_a, 16);
 850   if (i32_r != i32_s)
 851     abort ();
 852
 853   a64_a = 0x12345677fffffff8LL;
 854   i32_s = 0x7fffffff;
 855   i32_r = __builtin_mips_extr_rs_w (a64_a, 4);
 856   if (i32_r != i32_s)
 857     abort ();
 858
 859   a64_a = 0x1234567887658321LL;
 860   i32_s = 0x7fff;
 861   i32_r = __builtin_mips_extr_s_h (a64_a, 16);
 862   if (i32_r != i32_s)
 863     abort ();
 864
 865   a64_a = 0x0000007887658321LL;
 866   i32_b = 24;
 867   i32_s = 0x7887;
 868   i32_r = __builtin_mips_extr_s_h (a64_a, i32_b);
 869   if (i32_r != i32_s)
 870     abort ();
 871
 872   a64_a = 0x1234567887654321LL;
 873   i32_b = 4;
 874   i32_s = 0x88765432;
 875   i32_r = __builtin_mips_extr_w (a64_a, i32_b);
 876   if (i32_r != i32_s)
 877     abort ();
 878
 879   a64_a = 0x1234567887658321LL;
 880   i32_b = 16;
 881   i32_s = 0x56788766;
 882   i32_r = __builtin_mips_extr_r_w (a64_a, i32_b);
 883   if (i32_r != i32_s)
 884     abort ();
 885
 886   a64_a = 0x12345677fffffff8LL;
 887   i32_b = 4;
 888   i32_s = 0x7fffffff;
 889   i32_r = __builtin_mips_extr_rs_w (a64_a, i32_b);
 890   if (i32_r != i32_s)
 891     abort ();
 892
 893   i32_a = 0x0000021f; // pos is 31
 894   __builtin_mips_wrdsp (i32_a, 31);
 895   a64_a = 0x1234567887654321LL;
 896   i32_s = 8;
 897   i32_r = __builtin_mips_extp (a64_a, 3); // extract 4 bits
 898   if (i32_r != i32_s)
 899     abort ();
 900
 901   i32_a = 0x0000021f; // pos is 31
 902   __builtin_mips_wrdsp (i32_a, 31);
 903   a64_a = 0x1234567887654321LL;
 904   i32_b = 7; // size is 8. NOTE!! we should use 7
 905   i32_s = 0x87;
 906   i32_r = __builtin_mips_extp (a64_a, i32_b);
 907   if (i32_r != i32_s)
 908     abort ();
 909
 910   i32_a = 0x0000021f; // pos is 31
 911   __builtin_mips_wrdsp (i32_a, 31);
 912   a64_a = 0x1234567887654321LL;
 913   i32_s = 8;
 914   i32_r = __builtin_mips_extpdp (a64_a, 3); // extract 4 bits
 915   if (i32_r != i32_s)
 916     abort ();
 917
 918   i32_s = 0x0000021b; // pos is 27
 919   i32_r = __builtin_mips_rddsp (31);
 920   if (i32_r != i32_s)
 921     abort ();
 922
 923   i32_a = 0x0000021f; // pos is 31
 924   __builtin_mips_wrdsp (i32_a, 31);
 925   a64_a = 0x1234567887654321LL;
 926   i32_b = 11; // size is 12. NOTE!!! We should use 11
 927   i32_s = 0x876;
 928   i32_r = __builtin_mips_extpdp (a64_a, i32_b);
 929   if (i32_r != i32_s)
 930     abort ();
 931
 932   i32_s = 0x00000213; // pos is 19
 933   i32_r = __builtin_mips_rddsp (31);
 934   if (i32_r != i32_s)
 935     abort ();
 936
 937   a64_a = 0x1234567887654321LL;
 938   a64_s = 0x0012345678876543LL;
 939   a64_r = __builtin_mips_shilo (a64_a, 8);
 940   if (a64_r != a64_s)
 941     abort ();
 942
 943   a64_a = 0x1234567887654321LL;
 944   i32_b = -16;
 945   a64_s = 0x5678876543210000LL;
 946   a64_r = __builtin_mips_shilo (a64_a, i32_b);
 947   if (a64_r != a64_s)
 948     abort ();
 949
 950   i32_a = 0x0;
 951   __builtin_mips_wrdsp (i32_a, 31);
 952   a64_a = 0x1234567887654321LL;
 953   i32_b = 0x11112222;
 954   a64_s = 0x8765432111112222LL;
 955   a64_r = __builtin_mips_mthlip (a64_a, i32_b);
 956   if (a64_r != a64_s)
 957     abort ();
 958   i32_s = 32;
 959   i32_r = __builtin_mips_rddsp (31);
 960   if (i32_r != i32_s)
 961     abort ();
 962 #endif
 963
 964   i32_a = 0x1357a468;
 965   __builtin_mips_wrdsp (i32_a, 63);
 966   i32_s = 0x03572428;
 967   i32_r = __builtin_mips_rddsp (63);
 968   if (i32_r != i32_s)
 969     abort ();
 970
 971   ptr_a = &array;
 972   i32_b = 37;
 973   i32_s = 37;
 974   i32_r = __builtin_mips_lbux (ptr_a, i32_b);
 975   if (i32_r != i32_s)
 976     abort ();
 977
 978   ptr_a = &array;
 979   i32_b = 38;
 980   if (little_endian)
 981     i32_s = 0x2726;
 982   else
 983     i32_s = 0x2627;
 984   i32_r = __builtin_mips_lhx (ptr_a, i32_b);
 985   if (i32_r != i32_s)
 986     abort ();
 987
 988   ptr_a = &array;
 989   i32_b = 40;
 990   if (little_endian)
 991     i32_s = 0x2b2a2928;
 992   else
 993     i32_s = 0x28292a2b;
 994   i32_r = __builtin_mips_lwx (ptr_a, i32_b);
 995   if (i32_r != i32_s)
 996     abort ();
 997
 998   i32_a = 0x00000220; // pos is 32, size is 4
 999   __builtin_mips_wrdsp (i32_a, 63);
1000   i32_s = 1;
1001   i32_r = __builtin_mips_bposge32 ();
1002   if (i32_r != i32_s)
1003     abort ();
1004
1005 #ifndef __mips64
1006   a64_a = 0x12345678;
1007   i32_b = 0x80000000;
1008   i32_c = 0x11112222;
1009   a64_s = 0xF7776EEF12345678LL;
1010   a64_r = __builtin_mips_madd (a64_a, i32_b, i32_c);
1011   if (a64_r != a64_s)
1012     abort ();
1013 #endif
1014
1015 #ifndef __mips64
1016   a64_a = 0x12345678;
1017   ui32_b = 0x80000000;
1018   ui32_c = 0x11112222;
1019   a64_s = 0x0888911112345678LL;
1020   a64_r = __builtin_mips_maddu (a64_a, ui32_b, ui32_c);
1021   if (a64_r != a64_s)
1022     abort ();
1023 #endif
1024
1025 #ifndef __mips64
1026   a64_a = 0x12345678;
1027   i32_b = 0x80000000;
1028   i32_c = 0x11112222;
1029   a64_s = 0x0888911112345678LL;
1030   a64_r = __builtin_mips_msub (a64_a, i32_b, i32_c);
1031   if (a64_r != a64_s)
1032     abort ();
1033 #endif
1034
1035 #ifndef __mips64
1036   a64_a = 0x12345678;
1037   ui32_b = 0x80000000;
1038   ui32_c = 0x11112222;
1039   a64_s = 0xF7776EEF12345678LL;
1040   a64_r = __builtin_mips_msubu (a64_a, ui32_b, ui32_c);
1041   if (a64_r != a64_s)
1042     abort ();
1043 #endif
1044
1045 #ifndef __mips64
1046   i32_a = 0x80000000;
1047   i32_b = 0x11112222;
1048   a64_s = 0xF7776EEF00000000LL;
1049   a64_r = __builtin_mips_mult (i32_a, i32_b);
1050   if (a64_r != a64_s)
1051     abort ();
1052 #endif
1053
1054 #ifndef __mips64
1055   ui32_a = 0x80000000;
1056   ui32_b = 0x11112222;
1057   a64_s = 0x888911100000000LL;
1058   a64_r = __builtin_mips_multu (ui32_a, ui32_b);
1059   if (a64_r != a64_s)
1060     abort ();
1061 #endif
1062 }
1063