gcc-4_8/gcc/regs.h

   1 /* Define per-register tables for data flow info and register allocation.
   2    Copyright (C) 1987-2013 Free Software Foundation, Inc.
   3
   4 This file is part of GCC.
   5
   6 GCC is free software; you can redistribute it and/or modify it under
   7 the terms of the GNU General Public License as published by the Free
   8 Software Foundation; either version 3, or (at your option) any later
   9 version.
  10
  11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14 for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with GCC; see the file COPYING3.  If not see
  18 <http://www.gnu.org/licenses/>.  */
  19
  20 #ifndef GCC_REGS_H
  21 #define GCC_REGS_H
  22
  23 #include "machmode.h"
  24 #include "hard-reg-set.h"
  25 #include "rtl.h"
  26
  27 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
  28
  29 /* When you only have the mode of a pseudo register before it has a hard
  30    register chosen for it, this reports the size of each hard register
  31    a pseudo in such a mode would get allocated to.  A target may
  32    override this.  */
  33
  34 #ifndef REGMODE_NATURAL_SIZE
  35 #define REGMODE_NATURAL_SIZE(MODE)      UNITS_PER_WORD
  36 #endif
  37
  38 /* Maximum register number used in this function, plus one.  */
  39
  40 extern int max_regno;
  41
  42 /* REG_N_REFS and REG_N_SETS are initialized by a call to
  43    regstat_init_n_sets_and_refs from the current values of
  44    DF_REG_DEF_COUNT and DF_REG_USE_COUNT.  REG_N_REFS and REG_N_SETS
  45    should only be used if a pass need to change these values in some
  46    magical way or the pass needs to have accurate values for these
  47    and is not using incremental df scanning.
  48
  49    At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
  50    should be made to regstat_free_n_sets_and_refs.
  51
  52    Local alloc seems to play pretty loose with these values.
  53    REG_N_REFS is set to 0 if the register is used in an asm.
  54    Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
  55    REG_N_SETS for three address insns.  Other passes seem to have
  56    other special values.  */
  57
  58
  59
  60 /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
  61
  62 struct regstat_n_sets_and_refs_t
  63 {
  64   int sets;                     /* # of times (REG n) is set */
  65   int refs;                     /* # of times (REG n) is used or set */
  66 };
  67
  68 extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
  69
  70 /* Indexed by n, gives number of times (REG n) is used or set.  */
  71 static inline int
  72 REG_N_REFS(int regno)
  73 {
  74   return regstat_n_sets_and_refs[regno].refs;
  75 }
  76
  77 /* Indexed by n, gives number of times (REG n) is used or set.  */
  78 #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
  79 #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
  80
  81 /* Indexed by n, gives number of times (REG n) is set.  */
  82 static inline int
  83 REG_N_SETS (int regno)
  84 {
  85   return regstat_n_sets_and_refs[regno].sets;
  86 }
  87
  88 /* Indexed by n, gives number of times (REG n) is set.  */
  89 #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
  90 #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
  91
  92 /* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise.  */
  93 extern bool reg_is_parm_p (rtx);
  94
  95 /* Functions defined in regstat.c.  */
  96 extern void regstat_init_n_sets_and_refs (void);
  97 extern void regstat_free_n_sets_and_refs (void);
  98 extern void regstat_compute_ri (void);
  99 extern void regstat_free_ri (void);
 100 extern bitmap regstat_get_setjmp_crosses (void);
 101 extern void regstat_compute_calls_crossed (void);
 102 extern void regstat_free_calls_crossed (void);
 103 extern void dump_reg_info (FILE *);
 104
 105 /* Register information indexed by register number.  This structure is
 106    initialized by calling regstat_compute_ri and is destroyed by
 107    calling regstat_free_ri.  */
 108 struct reg_info_t
 109 {
 110   int freq;                     /* # estimated frequency (REG n) is used or set */
 111   int deaths;                   /* # of times (REG n) dies */
 112   int live_length;              /* # of instructions (REG n) is live */
 113   int calls_crossed;            /* # of calls (REG n) is live across */
 114   int freq_calls_crossed;       /* # estimated frequency (REG n) crosses call */
 115   int throw_calls_crossed;      /* # of calls that may throw (REG n) is live across */
 116   int basic_block;              /* # of basic blocks (REG n) is used in */
 117 };
 118
 119 extern struct reg_info_t *reg_info_p;
 120
 121 /* The number allocated elements of reg_info_p.  */
 122 extern size_t reg_info_p_size;
 123
 124 /* Estimate frequency of references to register N.  */
 125
 126 #define REG_FREQ(N) (reg_info_p[N].freq)
 127
 128 /* The weights for each insn varies from 0 to REG_FREQ_BASE.
 129    This constant does not need to be high, as in infrequently executed
 130    regions we want to count instructions equivalently to optimize for
 131    size instead of speed.  */
 132 #define REG_FREQ_MAX 1000
 133
 134 /* Compute register frequency from the BB frequency.  When optimizing for size,
 135    or profile driven feedback is available and the function is never executed,
 136    frequency is always equivalent.  Otherwise rescale the basic block
 137    frequency.  */
 138 #define REG_FREQ_FROM_BB(bb) (optimize_size                                   \
 139                               || (flag_branch_probabilities                   \
 140                                   && !flag_auto_profile                       \
 141                                   && !ENTRY_BLOCK_PTR->count)                 \
 142                               ? REG_FREQ_MAX                                  \
 143                               : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
 144                               ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
 145                               : 1)
 146
 147 /* Indexed by N, gives number of insns in which register N dies.
 148    Note that if register N is live around loops, it can die
 149    in transitions between basic blocks, and that is not counted here.
 150    So this is only a reliable indicator of how many regions of life there are
 151    for registers that are contained in one basic block.  */
 152
 153 #define REG_N_DEATHS(N) (reg_info_p[N].deaths)
 154
 155 /* Get the number of consecutive words required to hold pseudo-reg N.  */
 156
 157 #define PSEUDO_REGNO_SIZE(N) \
 158   ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1)         \
 159    / UNITS_PER_WORD)
 160
 161 /* Get the number of bytes required to hold pseudo-reg N.  */
 162
 163 #define PSEUDO_REGNO_BYTES(N) \
 164   GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
 165
 166 /* Get the machine mode of pseudo-reg N.  */
 167
 168 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
 169
 170 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live.  */
 171
 172 #define REG_N_CALLS_CROSSED(N)  (reg_info_p[N].calls_crossed)
 173 #define REG_FREQ_CALLS_CROSSED(N)  (reg_info_p[N].freq_calls_crossed)
 174
 175 /* Indexed by N, gives number of CALL_INSNS that may throw, across which
 176    (REG n) is live.  */
 177
 178 #define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed)
 179
 180 /* Total number of instructions at which (REG n) is live.
 181
 182    This is set in regstat.c whenever register info is requested and
 183    remains valid for the rest of the compilation of the function; it is
 184    used to control register allocation.  The larger this is, the less
 185    priority (REG n) gets for allocation in a hard register (in IRA in
 186    priority-coloring mode).
 187
 188    Negative values are special: -1 is used to mark a pseudo reg that
 189    should not be allocated to a hard register, because it crosses a
 190    setjmp call.  */
 191
 192 #define REG_LIVE_LENGTH(N)  (reg_info_p[N].live_length)
 193
 194 /* Indexed by n, gives number of basic block that  (REG n) is used in.
 195    If the value is REG_BLOCK_GLOBAL (-1),
 196    it means (REG n) is used in more than one basic block.
 197    REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
 198    This information remains valid for the rest of the compilation
 199    of the current function; it is used to control register allocation.  */
 200
 201 #define REG_BLOCK_UNKNOWN 0
 202 #define REG_BLOCK_GLOBAL -1
 203
 204 #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
 205
 206 /* Vector of substitutions of register numbers,
 207    used to map pseudo regs into hardware regs.
 208
 209    This can't be folded into reg_n_info without changing all of the
 210    machine dependent directories, since the reload functions
 211    in the machine dependent files access it.  */
 212
 213 extern short *reg_renumber;
 214
 215 /* Flag set by local-alloc or global-alloc if they decide to allocate
 216    something in a call-clobbered register.  */
 217
 218 extern int caller_save_needed;
 219
 220 /* Predicate to decide whether to give a hard reg to a pseudo which
 221    is referenced REFS times and would need to be saved and restored
 222    around a call CALLS times.  */
 223
 224 #ifndef CALLER_SAVE_PROFITABLE
 225 #define CALLER_SAVE_PROFITABLE(REFS, CALLS)  (4 * (CALLS) < (REFS))
 226 #endif
 227
 228 /* Select a register mode required for caller save of hard regno REGNO.  */
 229 #ifndef HARD_REGNO_CALLER_SAVE_MODE
 230 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
 231   choose_hard_reg_mode (REGNO, NREGS, false)
 232 #endif
 233
 234 /* Registers that get partially clobbered by a call in a given mode.
 235    These must not be call used registers.  */
 236 #ifndef HARD_REGNO_CALL_PART_CLOBBERED
 237 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
 238 #endif
 239
 240 /* Target-dependent globals.  */
 241 struct target_regs {
 242   /* For each starting hard register, the number of consecutive hard
 243      registers that a given machine mode occupies.  */
 244   unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
 245
 246   /* For each hard register, the widest mode object that it can contain.
 247      This will be a MODE_INT mode if the register can hold integers.  Otherwise
 248      it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
 249      register.  */
 250   enum machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];
 251
 252   /* Vector indexed by machine mode saying whether there are regs of
 253      that mode.  */
 254   bool x_have_regs_of_mode[MAX_MACHINE_MODE];
 255
 256   /* 1 if the corresponding class contains a register of the given mode.  */
 257   char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
 258
 259   /* Record for each mode whether we can move a register directly to or
 260      from an object of that mode in memory.  If we can't, we won't try
 261      to use that mode directly when accessing a field of that mode.  */
 262   char x_direct_load[NUM_MACHINE_MODES];
 263   char x_direct_store[NUM_MACHINE_MODES];
 264
 265   /* Record for each mode whether we can float-extend from memory.  */
 266   bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
 267 };
 268
 269 extern struct target_regs default_target_regs;
 270 #if SWITCHABLE_TARGET
 271 extern struct target_regs *this_target_regs;
 272 #else
 273 #define this_target_regs (&default_target_regs)
 274 #endif
 275
 276 #define hard_regno_nregs \
 277   (this_target_regs->x_hard_regno_nregs)
 278 #define reg_raw_mode \
 279   (this_target_regs->x_reg_raw_mode)
 280 #define have_regs_of_mode \
 281   (this_target_regs->x_have_regs_of_mode)
 282 #define contains_reg_of_mode \
 283   (this_target_regs->x_contains_reg_of_mode)
 284 #define direct_load \
 285   (this_target_regs->x_direct_load)
 286 #define direct_store \
 287   (this_target_regs->x_direct_store)
 288 #define float_extend_from_mem \
 289   (this_target_regs->x_float_extend_from_mem)
 290
 291 /* Return an exclusive upper bound on the registers occupied by hard
 292    register (reg:MODE REGNO).  */
 293
 294 static inline unsigned int
 295 end_hard_regno (enum machine_mode mode, unsigned int regno)
 296 {
 297   return regno + hard_regno_nregs[regno][(int) mode];
 298 }
 299
 300 /* Likewise for hard register X.  */
 301
 302 #define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X))
 303
 304 /* Likewise for hard or pseudo register X.  */
 305
 306 #define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1)
 307
 308 /* Add to REGS all the registers required to store a value of mode MODE
 309    in register REGNO.  */
 310
 311 static inline void
 312 add_to_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
 313                      unsigned int regno)
 314 {
 315   unsigned int end_regno;
 316
 317   end_regno = end_hard_regno (mode, regno);
 318   do
 319     SET_HARD_REG_BIT (*regs, regno);
 320   while (++regno < end_regno);
 321 }
 322
 323 /* Likewise, but remove the registers.  */
 324
 325 static inline void
 326 remove_from_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
 327                           unsigned int regno)
 328 {
 329   unsigned int end_regno;
 330
 331   end_regno = end_hard_regno (mode, regno);
 332   do
 333     CLEAR_HARD_REG_BIT (*regs, regno);
 334   while (++regno < end_regno);
 335 }
 336
 337 /* Return true if REGS contains the whole of (reg:MODE REGNO).  */
 338
 339 static inline bool
 340 in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
 341                    unsigned int regno)
 342 {
 343   unsigned int end_regno;
 344
 345   gcc_assert (HARD_REGISTER_NUM_P (regno));
 346
 347   if (!TEST_HARD_REG_BIT (regs, regno))
 348     return false;
 349
 350   end_regno = end_hard_regno (mode, regno);
 351
 352   if (!HARD_REGISTER_NUM_P (end_regno - 1))
 353     return false;
 354
 355   while (++regno < end_regno)
 356     if (!TEST_HARD_REG_BIT (regs, regno))
 357       return false;
 358
 359   return true;
 360 }
 361
 362 /* Return true if (reg:MODE REGNO) includes an element of REGS.  */
 363
 364 static inline bool
 365 overlaps_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
 366                          unsigned int regno)
 367 {
 368   unsigned int end_regno;
 369
 370   if (TEST_HARD_REG_BIT (regs, regno))
 371     return true;
 372
 373   end_regno = end_hard_regno (mode, regno);
 374   while (++regno < end_regno)
 375     if (TEST_HARD_REG_BIT (regs, regno))
 376       return true;
 377
 378   return false;
 379 }
 380
 381 /* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
 382    REGNO and MODE.  */
 383
 384 static inline void
 385 add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
 386                            int nregs)
 387 {
 388   while (nregs-- > 0)
 389     SET_HARD_REG_BIT (*regs, regno + nregs);
 390 }
 391
 392 /* Likewise, but remove the registers.  */
 393
 394 static inline void
 395 remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
 396                                 int nregs)
 397 {
 398   while (nregs-- > 0)
 399     CLEAR_HARD_REG_BIT (*regs, regno + nregs);
 400 }
 401
 402 /* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
 403    REGNO and MODE.  */
 404 static inline bool
 405 range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
 406                                int nregs)
 407 {
 408   while (nregs-- > 0)
 409     if (TEST_HARD_REG_BIT (set, regno + nregs))
 410       return true;
 411   return false;
 412 }
 413
 414 /* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
 415    REGNO and MODE.  */
 416 static inline bool
 417 range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
 418 {
 419   while (nregs-- > 0)
 420     if (!TEST_HARD_REG_BIT (set, regno + nregs))
 421       return false;
 422   return true;
 423 }
 424
 425 #endif /* GCC_REGS_H */