/
[official-gcc.git] / gcc / reginfo.c
blob83ac4499b517ae59be6e237c7bac533eaaebe678
1 /* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009, 2010 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This file contains regscan pass of the compiler and passes for
24 dealing with info about modes of pseudo-registers inside
25 subregisters. It also defines some tables of information about the
26 hardware registers, function init_reg_sets to initialize the
27 tables, and other auxiliary functions to deal with info about
28 registers and their classes. */
30 #include "config.h"
31 #include "system.h"
32 #include "coretypes.h"
33 #include "tm.h"
34 #include "hard-reg-set.h"
35 #include "rtl.h"
36 #include "expr.h"
37 #include "tm_p.h"
38 #include "flags.h"
39 #include "basic-block.h"
40 #include "regs.h"
41 #include "addresses.h"
42 #include "function.h"
43 #include "insn-config.h"
44 #include "recog.h"
45 #include "reload.h"
46 #include "diagnostic-core.h"
47 #include "output.h"
48 #include "timevar.h"
49 #include "hashtab.h"
50 #include "target.h"
51 #include "tree-pass.h"
52 #include "df.h"
53 #include "ira.h"
55 /* Maximum register number used in this function, plus one. */
57 int max_regno;
60 struct target_hard_regs default_target_hard_regs;
61 struct target_regs default_target_regs;
62 #if SWITCHABLE_TARGET
63 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
64 struct target_regs *this_target_regs = &default_target_regs;
65 #endif
67 /* Data for initializing fixed_regs. */
68 static const char initial_fixed_regs[] = FIXED_REGISTERS;
70 /* Data for initializing call_used_regs. */
71 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
73 #ifdef CALL_REALLY_USED_REGISTERS
74 /* Data for initializing call_really_used_regs. */
75 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
76 #endif
78 #ifdef CALL_REALLY_USED_REGISTERS
79 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
80 #else
81 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
82 #endif
84 /* Indexed by hard register number, contains 1 for registers
85 that are being used for global register decls.
86 These must be exempt from ordinary flow analysis
87 and are also considered fixed. */
88 char global_regs[FIRST_PSEUDO_REGISTER];
90 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
91 in dataflow more conveniently. */
92 regset regs_invalidated_by_call_regset;
94 /* The bitmap_obstack is used to hold some static variables that
95 should not be reset after each function is compiled. */
96 static bitmap_obstack persistent_obstack;
98 /* Used to initialize reg_alloc_order. */
99 #ifdef REG_ALLOC_ORDER
100 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
101 #endif
103 /* The same information, but as an array of unsigned ints. We copy from
104 these unsigned ints to the table above. We do this so the tm.h files
105 do not have to be aware of the wordsize for machines with <= 64 regs.
106 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
107 #define N_REG_INTS \
108 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
110 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
111 = REG_CLASS_CONTENTS;
113 /* Array containing all of the register names. */
114 static const char *const initial_reg_names[] = REGISTER_NAMES;
116 /* Array containing all of the register class names. */
117 const char * reg_class_names[] = REG_CLASS_NAMES;
119 #define last_mode_for_init_move_cost \
120 (this_target_regs->x_last_mode_for_init_move_cost)
122 /* No more global register variables may be declared; true once
123 reginfo has been initialized. */
124 static int no_global_reg_vars = 0;
126 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
127 correspond to the hard registers, if any, set in that map. This
128 could be done far more efficiently by having all sorts of special-cases
129 with moving single words, but probably isn't worth the trouble. */
130 void
131 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
133 unsigned i;
134 bitmap_iterator bi;
136 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
138 if (i >= FIRST_PSEUDO_REGISTER)
139 return;
140 SET_HARD_REG_BIT (*to, i);
144 /* Function called only once per target_globals to initialize the
145 target_hard_regs structure. Once this is done, various switches
146 may override. */
147 void
148 init_reg_sets (void)
150 int i, j;
152 /* First copy the register information from the initial int form into
153 the regsets. */
155 for (i = 0; i < N_REG_CLASSES; i++)
157 CLEAR_HARD_REG_SET (reg_class_contents[i]);
159 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
160 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
161 if (int_reg_class_contents[i][j / 32]
162 & ((unsigned) 1 << (j % 32)))
163 SET_HARD_REG_BIT (reg_class_contents[i], j);
166 /* Sanity check: make sure the target macros FIXED_REGISTERS and
167 CALL_USED_REGISTERS had the right number of initializers. */
168 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
169 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
170 #ifdef CALL_REALLY_USED_REGISTERS
171 gcc_assert (sizeof call_really_used_regs
172 == sizeof initial_call_really_used_regs);
173 #endif
174 #ifdef REG_ALLOC_ORDER
175 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
176 #endif
177 gcc_assert (sizeof reg_names == sizeof initial_reg_names);
179 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
180 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
181 #ifdef CALL_REALLY_USED_REGISTERS
182 memcpy (call_really_used_regs, initial_call_really_used_regs,
183 sizeof call_really_used_regs);
184 #endif
185 #ifdef REG_ALLOC_ORDER
186 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
187 #endif
188 memcpy (reg_names, initial_reg_names, sizeof reg_names);
191 /* Initialize may_move_cost and friends for mode M. */
192 void
193 init_move_cost (enum machine_mode m)
195 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
196 bool all_match = true;
197 unsigned int i, j;
199 gcc_assert (have_regs_of_mode[m]);
200 for (i = 0; i < N_REG_CLASSES; i++)
201 if (contains_reg_of_mode[i][m])
202 for (j = 0; j < N_REG_CLASSES; j++)
204 int cost;
205 if (!contains_reg_of_mode[j][m])
206 cost = 65535;
207 else
209 cost = register_move_cost (m, (enum reg_class) i,
210 (enum reg_class) j);
211 gcc_assert (cost < 65535);
213 all_match &= (last_move_cost[i][j] == cost);
214 last_move_cost[i][j] = cost;
216 if (all_match && last_mode_for_init_move_cost != -1)
218 move_cost[m] = move_cost[last_mode_for_init_move_cost];
219 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
220 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
221 return;
223 last_mode_for_init_move_cost = m;
224 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
225 * N_REG_CLASSES);
226 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
227 * N_REG_CLASSES);
228 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
229 * N_REG_CLASSES);
230 for (i = 0; i < N_REG_CLASSES; i++)
231 if (contains_reg_of_mode[i][m])
232 for (j = 0; j < N_REG_CLASSES; j++)
234 int cost;
235 enum reg_class *p1, *p2;
237 if (last_move_cost[i][j] == 65535)
239 move_cost[m][i][j] = 65535;
240 may_move_in_cost[m][i][j] = 65535;
241 may_move_out_cost[m][i][j] = 65535;
243 else
245 cost = last_move_cost[i][j];
247 for (p2 = &reg_class_subclasses[j][0];
248 *p2 != LIM_REG_CLASSES; p2++)
249 if (*p2 != i && contains_reg_of_mode[*p2][m])
250 cost = MAX (cost, move_cost[m][i][*p2]);
252 for (p1 = &reg_class_subclasses[i][0];
253 *p1 != LIM_REG_CLASSES; p1++)
254 if (*p1 != j && contains_reg_of_mode[*p1][m])
255 cost = MAX (cost, move_cost[m][*p1][j]);
257 gcc_assert (cost <= 65535);
258 move_cost[m][i][j] = cost;
260 if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
261 may_move_in_cost[m][i][j] = 0;
262 else
263 may_move_in_cost[m][i][j] = cost;
265 if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
266 may_move_out_cost[m][i][j] = 0;
267 else
268 may_move_out_cost[m][i][j] = cost;
271 else
272 for (j = 0; j < N_REG_CLASSES; j++)
274 move_cost[m][i][j] = 65535;
275 may_move_in_cost[m][i][j] = 65535;
276 may_move_out_cost[m][i][j] = 65535;
280 /* We need to save copies of some of the register information which
281 can be munged by command-line switches so we can restore it during
282 subsequent back-end reinitialization. */
283 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
284 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
285 #ifdef CALL_REALLY_USED_REGISTERS
286 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
287 #endif
288 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
290 /* Save the register information. */
291 void
292 save_register_info (void)
294 /* Sanity check: make sure the target macros FIXED_REGISTERS and
295 CALL_USED_REGISTERS had the right number of initializers. */
296 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
297 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
298 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
299 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
301 /* Likewise for call_really_used_regs. */
302 #ifdef CALL_REALLY_USED_REGISTERS
303 gcc_assert (sizeof call_really_used_regs
304 == sizeof saved_call_really_used_regs);
305 memcpy (saved_call_really_used_regs, call_really_used_regs,
306 sizeof call_really_used_regs);
307 #endif
309 /* And similarly for reg_names. */
310 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
311 memcpy (saved_reg_names, reg_names, sizeof reg_names);
314 /* Restore the register information. */
315 static void
316 restore_register_info (void)
318 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
319 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
321 #ifdef CALL_REALLY_USED_REGISTERS
322 memcpy (call_really_used_regs, saved_call_really_used_regs,
323 sizeof call_really_used_regs);
324 #endif
326 memcpy (reg_names, saved_reg_names, sizeof reg_names);
329 /* After switches have been processed, which perhaps alter
330 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
331 static void
332 init_reg_sets_1 (void)
334 unsigned int i, j;
335 unsigned int /* enum machine_mode */ m;
337 restore_register_info ();
339 #ifdef REG_ALLOC_ORDER
340 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
341 inv_reg_alloc_order[reg_alloc_order[i]] = i;
342 #endif
344 /* Let the target tweak things if necessary. */
346 targetm.conditional_register_usage ();
348 /* Compute number of hard regs in each class. */
350 memset (reg_class_size, 0, sizeof reg_class_size);
351 for (i = 0; i < N_REG_CLASSES; i++)
353 bool any_nonfixed = false;
354 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
355 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
357 reg_class_size[i]++;
358 if (!fixed_regs[j])
359 any_nonfixed = true;
361 class_only_fixed_regs[i] = !any_nonfixed;
364 /* Initialize the table of subunions.
365 reg_class_subunion[I][J] gets the largest-numbered reg-class
366 that is contained in the union of classes I and J. */
368 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
369 for (i = 0; i < N_REG_CLASSES; i++)
371 for (j = 0; j < N_REG_CLASSES; j++)
373 HARD_REG_SET c;
374 int k;
376 COPY_HARD_REG_SET (c, reg_class_contents[i]);
377 IOR_HARD_REG_SET (c, reg_class_contents[j]);
378 for (k = 0; k < N_REG_CLASSES; k++)
379 if (hard_reg_set_subset_p (reg_class_contents[k], c)
380 && !hard_reg_set_subset_p (reg_class_contents[k],
381 reg_class_contents
382 [(int) reg_class_subunion[i][j]]))
383 reg_class_subunion[i][j] = (enum reg_class) k;
387 /* Initialize the table of superunions.
388 reg_class_superunion[I][J] gets the smallest-numbered reg-class
389 containing the union of classes I and J. */
391 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
392 for (i = 0; i < N_REG_CLASSES; i++)
394 for (j = 0; j < N_REG_CLASSES; j++)
396 HARD_REG_SET c;
397 int k;
399 COPY_HARD_REG_SET (c, reg_class_contents[i]);
400 IOR_HARD_REG_SET (c, reg_class_contents[j]);
401 for (k = 0; k < N_REG_CLASSES; k++)
402 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
403 break;
405 reg_class_superunion[i][j] = (enum reg_class) k;
409 /* Initialize the tables of subclasses and superclasses of each reg class.
410 First clear the whole table, then add the elements as they are found. */
412 for (i = 0; i < N_REG_CLASSES; i++)
414 for (j = 0; j < N_REG_CLASSES; j++)
415 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
418 for (i = 0; i < N_REG_CLASSES; i++)
420 if (i == (int) NO_REGS)
421 continue;
423 for (j = i + 1; j < N_REG_CLASSES; j++)
424 if (hard_reg_set_subset_p (reg_class_contents[i],
425 reg_class_contents[j]))
427 /* Reg class I is a subclass of J.
428 Add J to the table of superclasses of I. */
429 enum reg_class *p;
431 /* Add I to the table of superclasses of J. */
432 p = &reg_class_subclasses[j][0];
433 while (*p != LIM_REG_CLASSES) p++;
434 *p = (enum reg_class) i;
438 /* Initialize "constant" tables. */
440 CLEAR_HARD_REG_SET (fixed_reg_set);
441 CLEAR_HARD_REG_SET (call_used_reg_set);
442 CLEAR_HARD_REG_SET (call_fixed_reg_set);
443 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
444 if (!regs_invalidated_by_call_regset)
446 bitmap_obstack_initialize (&persistent_obstack);
447 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
449 else
450 CLEAR_REG_SET (regs_invalidated_by_call_regset);
452 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
454 /* call_used_regs must include fixed_regs. */
455 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
456 #ifdef CALL_REALLY_USED_REGISTERS
457 /* call_used_regs must include call_really_used_regs. */
458 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
459 #endif
461 if (fixed_regs[i])
462 SET_HARD_REG_BIT (fixed_reg_set, i);
464 if (call_used_regs[i])
465 SET_HARD_REG_BIT (call_used_reg_set, i);
467 /* There are a couple of fixed registers that we know are safe to
468 exclude from being clobbered by calls:
470 The frame pointer is always preserved across calls. The arg
471 pointer is if it is fixed. The stack pointer usually is,
472 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
473 CLOBBER will be present. If we are generating PIC code, the
474 PIC offset table register is preserved across calls, though the
475 target can override that. */
477 if (i == STACK_POINTER_REGNUM)
479 else if (global_regs[i])
481 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
482 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
484 else if (i == FRAME_POINTER_REGNUM)
486 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
487 else if (i == HARD_FRAME_POINTER_REGNUM)
489 #endif
490 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
491 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
493 #endif
494 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
495 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
497 else if (CALL_REALLY_USED_REGNO_P (i))
499 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
500 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
504 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
506 /* Preserve global registers if called more than once. */
507 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
509 if (global_regs[i])
511 fixed_regs[i] = call_used_regs[i] = 1;
512 SET_HARD_REG_BIT (fixed_reg_set, i);
513 SET_HARD_REG_BIT (call_used_reg_set, i);
514 SET_HARD_REG_BIT (call_fixed_reg_set, i);
518 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
519 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
520 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
522 HARD_REG_SET ok_regs;
523 CLEAR_HARD_REG_SET (ok_regs);
524 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
525 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
526 SET_HARD_REG_BIT (ok_regs, j);
528 for (i = 0; i < N_REG_CLASSES; i++)
529 if (((unsigned) CLASS_MAX_NREGS ((enum reg_class) i,
530 (enum machine_mode) m)
531 <= reg_class_size[i])
532 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
534 contains_reg_of_mode [i][m] = 1;
535 have_regs_of_mode [m] = 1;
539 /* Reset move_cost and friends, making sure we only free shared
540 table entries once. */
541 for (i = 0; i < MAX_MACHINE_MODE; i++)
542 if (move_cost[i])
544 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
546 if (i == j)
548 free (move_cost[i]);
549 free (may_move_in_cost[i]);
550 free (may_move_out_cost[i]);
553 memset (move_cost, 0, sizeof move_cost);
554 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
555 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
556 last_mode_for_init_move_cost = -1;
559 /* Compute the table of register modes.
560 These values are used to record death information for individual registers
561 (as opposed to a multi-register mode).
562 This function might be invoked more than once, if the target has support
563 for changing register usage conventions on a per-function basis.
565 void
566 init_reg_modes_target (void)
568 int i, j;
570 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
571 for (j = 0; j < MAX_MACHINE_MODE; j++)
572 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
574 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
576 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
578 /* If we couldn't find a valid mode, just use the previous mode.
579 ??? One situation in which we need to do this is on the mips where
580 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
581 to use DF mode for the even registers and VOIDmode for the odd
582 (for the cpu models where the odd ones are inaccessible). */
583 if (reg_raw_mode[i] == VOIDmode)
584 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
588 /* Finish initializing the register sets and initialize the register modes.
589 This function might be invoked more than once, if the target has support
590 for changing register usage conventions on a per-function basis.
592 void
593 init_regs (void)
595 /* This finishes what was started by init_reg_sets, but couldn't be done
596 until after register usage was specified. */
597 init_reg_sets_1 ();
600 /* The same as previous function plus initializing IRA. */
601 void
602 reinit_regs (void)
604 init_regs ();
605 /* caller_save needs to be re-initialized. */
606 caller_save_initialized_p = false;
607 ira_init ();
610 /* Initialize some fake stack-frame MEM references for use in
611 memory_move_secondary_cost. */
612 void
613 init_fake_stack_mems (void)
615 int i;
617 for (i = 0; i < MAX_MACHINE_MODE; i++)
618 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
622 /* Compute cost of moving data from a register of class FROM to one of
623 TO, using MODE. */
626 register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to)
628 return targetm.register_move_cost (mode, from, to);
631 /* Compute cost of moving registers to/from memory. */
633 memory_move_cost (enum machine_mode mode, enum reg_class rclass, bool in)
635 return targetm.memory_move_cost (mode, rclass, in);
638 /* Compute extra cost of moving registers to/from memory due to reloads.
639 Only needed if secondary reloads are required for memory moves. */
641 memory_move_secondary_cost (enum machine_mode mode, reg_class_t rclass,
642 bool in)
644 reg_class_t altclass;
645 int partial_cost = 0;
646 /* We need a memory reference to feed to SECONDARY... macros. */
647 /* mem may be unused even if the SECONDARY_ macros are defined. */
648 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
650 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
652 if (altclass == NO_REGS)
653 return 0;
655 if (in)
656 partial_cost = register_move_cost (mode, altclass, rclass);
657 else
658 partial_cost = register_move_cost (mode, rclass, altclass);
660 if (rclass == altclass)
661 /* This isn't simply a copy-to-temporary situation. Can't guess
662 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
663 calling here in that case.
665 I'm tempted to put in an assert here, but returning this will
666 probably only give poor estimates, which is what we would've
667 had before this code anyways. */
668 return partial_cost;
670 /* Check if the secondary reload register will also need a
671 secondary reload. */
672 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
675 /* Return a machine mode that is legitimate for hard reg REGNO and large
676 enough to save nregs. If we can't find one, return VOIDmode.
677 If CALL_SAVED is true, only consider modes that are call saved. */
678 enum machine_mode
679 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
680 unsigned int nregs, bool call_saved)
682 unsigned int /* enum machine_mode */ m;
683 enum machine_mode found_mode = VOIDmode, mode;
685 /* We first look for the largest integer mode that can be validly
686 held in REGNO. If none, we look for the largest floating-point mode.
687 If we still didn't find a valid mode, try CCmode. */
689 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
690 mode != VOIDmode;
691 mode = GET_MODE_WIDER_MODE (mode))
692 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
693 && HARD_REGNO_MODE_OK (regno, mode)
694 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
695 found_mode = mode;
697 if (found_mode != VOIDmode)
698 return found_mode;
700 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
701 mode != VOIDmode;
702 mode = GET_MODE_WIDER_MODE (mode))
703 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
704 && HARD_REGNO_MODE_OK (regno, mode)
705 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
706 found_mode = mode;
708 if (found_mode != VOIDmode)
709 return found_mode;
711 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
712 mode != VOIDmode;
713 mode = GET_MODE_WIDER_MODE (mode))
714 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
715 && HARD_REGNO_MODE_OK (regno, mode)
716 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
717 found_mode = mode;
719 if (found_mode != VOIDmode)
720 return found_mode;
722 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
723 mode != VOIDmode;
724 mode = GET_MODE_WIDER_MODE (mode))
725 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
726 && HARD_REGNO_MODE_OK (regno, mode)
727 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
728 found_mode = mode;
730 if (found_mode != VOIDmode)
731 return found_mode;
733 /* Iterate over all of the CCmodes. */
734 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
736 mode = (enum machine_mode) m;
737 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
738 && HARD_REGNO_MODE_OK (regno, mode)
739 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
740 return mode;
743 /* We can't find a mode valid for this register. */
744 return VOIDmode;
747 /* Specify the usage characteristics of the register named NAME.
748 It should be a fixed register if FIXED and a
749 call-used register if CALL_USED. */
750 void
751 fix_register (const char *name, int fixed, int call_used)
753 int i;
754 int reg, nregs;
756 /* Decode the name and update the primary form of
757 the register info. */
759 if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
761 gcc_assert (nregs >= 1);
762 for (i = reg; i < reg + nregs; i++)
764 if ((i == STACK_POINTER_REGNUM
765 #ifdef HARD_FRAME_POINTER_REGNUM
766 || i == HARD_FRAME_POINTER_REGNUM
767 #else
768 || i == FRAME_POINTER_REGNUM
769 #endif
771 && (fixed == 0 || call_used == 0))
773 switch (fixed)
775 case 0:
776 switch (call_used)
778 case 0:
779 error ("can%'t use %qs as a call-saved register", name);
780 break;
782 case 1:
783 error ("can%'t use %qs as a call-used register", name);
784 break;
786 default:
787 gcc_unreachable ();
789 break;
791 case 1:
792 switch (call_used)
794 case 1:
795 error ("can%'t use %qs as a fixed register", name);
796 break;
798 case 0:
799 default:
800 gcc_unreachable ();
802 break;
804 default:
805 gcc_unreachable ();
808 else
810 fixed_regs[i] = fixed;
811 call_used_regs[i] = call_used;
812 #ifdef CALL_REALLY_USED_REGISTERS
813 if (fixed == 0)
814 call_really_used_regs[i] = call_used;
815 #endif
819 else
821 warning (0, "unknown register name: %s", name);
825 /* Mark register number I as global. */
826 void
827 globalize_reg (int i)
829 #ifdef STACK_REGS
830 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
832 error ("stack register used for global register variable");
833 return;
835 #endif
837 if (fixed_regs[i] == 0 && no_global_reg_vars)
838 error ("global register variable follows a function definition");
840 if (global_regs[i])
842 warning (0, "register used for two global register variables");
843 return;
846 if (call_used_regs[i] && ! fixed_regs[i])
847 warning (0, "call-clobbered register used for global register variable");
849 global_regs[i] = 1;
851 /* If we're globalizing the frame pointer, we need to set the
852 appropriate regs_invalidated_by_call bit, even if it's already
853 set in fixed_regs. */
854 if (i != STACK_POINTER_REGNUM)
856 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
857 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
860 /* If already fixed, nothing else to do. */
861 if (fixed_regs[i])
862 return;
864 fixed_regs[i] = call_used_regs[i] = 1;
865 #ifdef CALL_REALLY_USED_REGISTERS
866 call_really_used_regs[i] = 1;
867 #endif
869 SET_HARD_REG_BIT (fixed_reg_set, i);
870 SET_HARD_REG_BIT (call_used_reg_set, i);
871 SET_HARD_REG_BIT (call_fixed_reg_set, i);
873 reinit_regs ();
877 /* Structure used to record preferences of given pseudo. */
878 struct reg_pref
880 /* (enum reg_class) prefclass is the preferred class. May be
881 NO_REGS if no class is better than memory. */
882 char prefclass;
884 /* altclass is a register class that we should use for allocating
885 pseudo if no register in the preferred class is available.
886 If no register in this class is available, memory is preferred.
888 It might appear to be more general to have a bitmask of classes here,
889 but since it is recommended that there be a class corresponding to the
890 union of most major pair of classes, that generality is not required. */
891 char altclass;
893 /* coverclass is a register class that IRA uses for allocating
894 the pseudo. */
895 char coverclass;
898 /* Record preferences of each pseudo. This is available after RA is
899 run. */
900 static struct reg_pref *reg_pref;
902 /* Current size of reg_info. */
903 static int reg_info_size;
905 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
906 This function is sometimes called before the info has been computed.
907 When that happens, just return GENERAL_REGS, which is innocuous. */
908 enum reg_class
909 reg_preferred_class (int regno)
911 if (reg_pref == 0)
912 return GENERAL_REGS;
914 return (enum reg_class) reg_pref[regno].prefclass;
917 enum reg_class
918 reg_alternate_class (int regno)
920 if (reg_pref == 0)
921 return ALL_REGS;
923 return (enum reg_class) reg_pref[regno].altclass;
926 /* Return the reg_class which is used by IRA for its allocation. */
927 enum reg_class
928 reg_cover_class (int regno)
930 if (reg_pref == 0)
931 return NO_REGS;
933 return (enum reg_class) reg_pref[regno].coverclass;
938 /* Allocate space for reg info. */
939 static void
940 allocate_reg_info (void)
942 reg_info_size = max_reg_num ();
943 gcc_assert (! reg_pref && ! reg_renumber);
944 reg_renumber = XNEWVEC (short, reg_info_size);
945 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
946 memset (reg_renumber, -1, reg_info_size * sizeof (short));
950 /* Resize reg info. The new elements will be uninitialized. Return
951 TRUE if new elements (for new pseudos) were added. */
952 bool
953 resize_reg_info (void)
955 int old;
957 if (reg_pref == NULL)
959 allocate_reg_info ();
960 return true;
962 if (reg_info_size == max_reg_num ())
963 return false;
964 old = reg_info_size;
965 reg_info_size = max_reg_num ();
966 gcc_assert (reg_pref && reg_renumber);
967 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
968 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
969 memset (reg_pref + old, -1,
970 (reg_info_size - old) * sizeof (struct reg_pref));
971 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
972 return true;
976 /* Free up the space allocated by allocate_reg_info. */
977 void
978 free_reg_info (void)
980 if (reg_pref)
982 free (reg_pref);
983 reg_pref = NULL;
986 if (reg_renumber)
988 free (reg_renumber);
989 reg_renumber = NULL;
993 /* Initialize some global data for this pass. */
994 static unsigned int
995 reginfo_init (void)
997 if (df)
998 df_compute_regs_ever_live (true);
1000 /* This prevents dump_flow_info from losing if called
1001 before reginfo is run. */
1002 reg_pref = NULL;
1003 /* No more global register variables may be declared. */
1004 no_global_reg_vars = 1;
1005 return 1;
1008 struct rtl_opt_pass pass_reginfo_init =
1011 RTL_PASS,
1012 "reginfo", /* name */
1013 NULL, /* gate */
1014 reginfo_init, /* execute */
1015 NULL, /* sub */
1016 NULL, /* next */
1017 0, /* static_pass_number */
1018 TV_NONE, /* tv_id */
1019 0, /* properties_required */
1020 0, /* properties_provided */
1021 0, /* properties_destroyed */
1022 0, /* todo_flags_start */
1023 0 /* todo_flags_finish */
1029 /* Set up preferred, alternate, and cover classes for REGNO as
1030 PREFCLASS, ALTCLASS, and COVERCLASS. */
1031 void
1032 setup_reg_classes (int regno,
1033 enum reg_class prefclass, enum reg_class altclass,
1034 enum reg_class coverclass)
1036 if (reg_pref == NULL)
1037 return;
1038 gcc_assert (reg_info_size == max_reg_num ());
1039 reg_pref[regno].prefclass = prefclass;
1040 reg_pref[regno].altclass = altclass;
1041 reg_pref[regno].coverclass = coverclass;
1045 /* This is the `regscan' pass of the compiler, run just before cse and
1046 again just before loop. It finds the first and last use of each
1047 pseudo-register. */
1049 static void reg_scan_mark_refs (rtx, rtx);
1051 void
1052 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1054 rtx insn;
1056 timevar_push (TV_REG_SCAN);
1058 for (insn = f; insn; insn = NEXT_INSN (insn))
1059 if (INSN_P (insn))
1061 reg_scan_mark_refs (PATTERN (insn), insn);
1062 if (REG_NOTES (insn))
1063 reg_scan_mark_refs (REG_NOTES (insn), insn);
1066 timevar_pop (TV_REG_SCAN);
1070 /* X is the expression to scan. INSN is the insn it appears in.
1071 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1072 We should only record information for REGs with numbers
1073 greater than or equal to MIN_REGNO. */
1074 static void
1075 reg_scan_mark_refs (rtx x, rtx insn)
1077 enum rtx_code code;
1078 rtx dest;
1079 rtx note;
1081 if (!x)
1082 return;
1083 code = GET_CODE (x);
1084 switch (code)
1086 case CONST:
1087 case CONST_INT:
1088 case CONST_DOUBLE:
1089 case CONST_FIXED:
1090 case CONST_VECTOR:
1091 case CC0:
1092 case PC:
1093 case SYMBOL_REF:
1094 case LABEL_REF:
1095 case ADDR_VEC:
1096 case ADDR_DIFF_VEC:
1097 case REG:
1098 return;
1100 case EXPR_LIST:
1101 if (XEXP (x, 0))
1102 reg_scan_mark_refs (XEXP (x, 0), insn);
1103 if (XEXP (x, 1))
1104 reg_scan_mark_refs (XEXP (x, 1), insn);
1105 break;
1107 case INSN_LIST:
1108 if (XEXP (x, 1))
1109 reg_scan_mark_refs (XEXP (x, 1), insn);
1110 break;
1112 case CLOBBER:
1113 if (MEM_P (XEXP (x, 0)))
1114 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1115 break;
1117 case SET:
1118 /* Count a set of the destination if it is a register. */
1119 for (dest = SET_DEST (x);
1120 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1121 || GET_CODE (dest) == ZERO_EXTEND;
1122 dest = XEXP (dest, 0))
1125 /* If this is setting a pseudo from another pseudo or the sum of a
1126 pseudo and a constant integer and the other pseudo is known to be
1127 a pointer, set the destination to be a pointer as well.
1129 Likewise if it is setting the destination from an address or from a
1130 value equivalent to an address or to the sum of an address and
1131 something else.
1133 But don't do any of this if the pseudo corresponds to a user
1134 variable since it should have already been set as a pointer based
1135 on the type. */
1137 if (REG_P (SET_DEST (x))
1138 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1139 /* If the destination pseudo is set more than once, then other
1140 sets might not be to a pointer value (consider access to a
1141 union in two threads of control in the presence of global
1142 optimizations). So only set REG_POINTER on the destination
1143 pseudo if this is the only set of that pseudo. */
1144 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1145 && ! REG_USERVAR_P (SET_DEST (x))
1146 && ! REG_POINTER (SET_DEST (x))
1147 && ((REG_P (SET_SRC (x))
1148 && REG_POINTER (SET_SRC (x)))
1149 || ((GET_CODE (SET_SRC (x)) == PLUS
1150 || GET_CODE (SET_SRC (x)) == LO_SUM)
1151 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1152 && REG_P (XEXP (SET_SRC (x), 0))
1153 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1154 || GET_CODE (SET_SRC (x)) == CONST
1155 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1156 || GET_CODE (SET_SRC (x)) == LABEL_REF
1157 || (GET_CODE (SET_SRC (x)) == HIGH
1158 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1159 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1160 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1161 || ((GET_CODE (SET_SRC (x)) == PLUS
1162 || GET_CODE (SET_SRC (x)) == LO_SUM)
1163 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1164 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1165 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1166 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1167 && (GET_CODE (XEXP (note, 0)) == CONST
1168 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1169 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1170 REG_POINTER (SET_DEST (x)) = 1;
1172 /* If this is setting a register from a register or from a simple
1173 conversion of a register, propagate REG_EXPR. */
1174 if (REG_P (dest) && !REG_ATTRS (dest))
1176 rtx src = SET_SRC (x);
1178 while (GET_CODE (src) == SIGN_EXTEND
1179 || GET_CODE (src) == ZERO_EXTEND
1180 || GET_CODE (src) == TRUNCATE
1181 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1182 src = XEXP (src, 0);
1184 set_reg_attrs_from_value (dest, src);
1187 /* ... fall through ... */
1189 default:
1191 const char *fmt = GET_RTX_FORMAT (code);
1192 int i;
1193 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1195 if (fmt[i] == 'e')
1196 reg_scan_mark_refs (XEXP (x, i), insn);
1197 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1199 int j;
1200 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1201 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1209 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1210 is also in C2. */
1212 reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1214 return (c1 == c2
1215 || c2 == ALL_REGS
1216 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1217 reg_class_contents[(int) c2]));
1220 /* Return nonzero if there is a register that is in both C1 and C2. */
1222 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1224 return (c1 == c2
1225 || c1 == ALL_REGS
1226 || c2 == ALL_REGS
1227 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1228 reg_class_contents[(int) c2]));
1233 /* Passes for keeping and updating info about modes of registers
1234 inside subregisters. */
1236 #ifdef CANNOT_CHANGE_MODE_CLASS
1238 static bitmap invalid_mode_changes;
1240 static void
1241 record_subregs_of_mode (rtx subreg, bitmap subregs_of_mode)
1243 enum machine_mode mode;
1244 unsigned int regno;
1246 if (!REG_P (SUBREG_REG (subreg)))
1247 return;
1249 regno = REGNO (SUBREG_REG (subreg));
1250 mode = GET_MODE (subreg);
1252 if (regno < FIRST_PSEUDO_REGISTER)
1253 return;
1255 if (bitmap_set_bit (subregs_of_mode,
1256 regno * NUM_MACHINE_MODES + (unsigned int) mode))
1258 unsigned int rclass;
1259 for (rclass = 0; rclass < N_REG_CLASSES; rclass++)
1260 if (!bitmap_bit_p (invalid_mode_changes,
1261 regno * N_REG_CLASSES + rclass)
1262 && CANNOT_CHANGE_MODE_CLASS (PSEUDO_REGNO_MODE (regno),
1263 mode, (enum reg_class) rclass))
1264 bitmap_set_bit (invalid_mode_changes,
1265 regno * N_REG_CLASSES + rclass);
1269 /* Call record_subregs_of_mode for all the subregs in X. */
1270 static void
1271 find_subregs_of_mode (rtx x, bitmap subregs_of_mode)
1273 enum rtx_code code = GET_CODE (x);
1274 const char * const fmt = GET_RTX_FORMAT (code);
1275 int i;
1277 if (code == SUBREG)
1278 record_subregs_of_mode (x, subregs_of_mode);
1280 /* Time for some deep diving. */
1281 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1283 if (fmt[i] == 'e')
1284 find_subregs_of_mode (XEXP (x, i), subregs_of_mode);
1285 else if (fmt[i] == 'E')
1287 int j;
1288 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1289 find_subregs_of_mode (XVECEXP (x, i, j), subregs_of_mode);
1294 void
1295 init_subregs_of_mode (void)
1297 basic_block bb;
1298 rtx insn;
1299 bitmap_obstack srom_obstack;
1300 bitmap subregs_of_mode;
1302 gcc_assert (invalid_mode_changes == NULL);
1303 invalid_mode_changes = BITMAP_ALLOC (NULL);
1304 bitmap_obstack_initialize (&srom_obstack);
1305 subregs_of_mode = BITMAP_ALLOC (&srom_obstack);
1307 FOR_EACH_BB (bb)
1308 FOR_BB_INSNS (bb, insn)
1309 if (NONDEBUG_INSN_P (insn))
1310 find_subregs_of_mode (PATTERN (insn), subregs_of_mode);
1312 BITMAP_FREE (subregs_of_mode);
1313 bitmap_obstack_release (&srom_obstack);
1316 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1317 mode. */
1318 bool
1319 invalid_mode_change_p (unsigned int regno,
1320 enum reg_class rclass)
1322 return bitmap_bit_p (invalid_mode_changes,
1323 regno * N_REG_CLASSES + (unsigned) rclass);
1326 void
1327 finish_subregs_of_mode (void)
1329 BITMAP_FREE (invalid_mode_changes);
1331 #else
1332 void
1333 init_subregs_of_mode (void)
1336 void
1337 finish_subregs_of_mode (void)
1341 #endif /* CANNOT_CHANGE_MODE_CLASS */