1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
61 #include "hard-reg-set.h"
65 #include "rtl-error.h"
66 #include "toplev.h" /* exact_log2, floor_log2 */
69 #include "basic-block.h"
71 #include "targhooks.h"
74 #include "cfglayout.h"
75 #include "tree-pass.h"
76 #include "tree-flow.h"
86 #ifdef XCOFF_DEBUGGING_INFO
87 #include "xcoffout.h" /* Needed for external data
88 declarations for e.g. AIX 4.x. */
91 #include "dwarf2out.h"
93 #ifdef DBX_DEBUGGING_INFO
97 #ifdef SDB_DEBUGGING_INFO
101 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
102 So define a null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
107 /* How to start an assembler comment. */
108 #ifndef ASM_COMMENT_START
109 #define ASM_COMMENT_START ";#"
112 /* Is the given character a logical line separator for the assembler? */
113 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
114 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
117 #ifndef JUMP_TABLES_IN_TEXT_SECTION
118 #define JUMP_TABLES_IN_TEXT_SECTION 0
121 /* Bitflags used by final_scan_insn. */
124 #define SEEN_EMITTED 4
126 /* Last insn processed by final_scan_insn. */
127 static rtx debug_insn
;
128 rtx current_output_insn
;
130 /* Line number of last NOTE. */
131 static int last_linenum
;
133 /* Last discriminator written to assembly. */
134 static int last_discriminator
;
136 /* Discriminator of current block. */
137 static int discriminator
;
139 /* Highest line number in current block. */
140 static int high_block_linenum
;
142 /* Likewise for function. */
143 static int high_function_linenum
;
145 /* Filename of last NOTE. */
146 static const char *last_filename
;
148 /* Override filename and line number. */
149 static const char *override_filename
;
150 static int override_linenum
;
152 /* Whether to force emission of a line note before the next insn. */
153 static bool force_source_line
= false;
155 extern const int length_unit_log
; /* This is defined in insn-attrtab.c. */
157 /* Nonzero while outputting an `asm' with operands.
158 This means that inconsistencies are the user's fault, so don't die.
159 The precise value is the insn being output, to pass to error_for_asm. */
160 rtx this_is_asm_operands
;
162 /* Number of operands of this insn, for an `asm' with operands. */
163 static unsigned int insn_noperands
;
165 /* Compare optimization flag. */
167 static rtx last_ignored_compare
= 0;
169 /* Assign a unique number to each insn that is output.
170 This can be used to generate unique local labels. */
172 static int insn_counter
= 0;
175 /* This variable contains machine-dependent flags (defined in tm.h)
176 set and examined by output routines
177 that describe how to interpret the condition codes properly. */
181 /* During output of an insn, this contains a copy of cc_status
182 from before the insn. */
184 CC_STATUS cc_prev_status
;
187 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
189 static int block_depth
;
191 /* Nonzero if have enabled APP processing of our assembler output. */
195 /* If we are outputting an insn sequence, this contains the sequence rtx.
200 #ifdef ASSEMBLER_DIALECT
202 /* Number of the assembler dialect to use, starting at 0. */
203 static int dialect_number
;
206 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
207 rtx current_insn_predicate
;
209 /* True if printing into -fdump-final-insns= dump. */
210 bool final_insns_dump_p
;
212 #ifdef HAVE_ATTR_length
213 static int asm_insn_count (rtx
);
215 static void profile_function (FILE *);
216 static void profile_after_prologue (FILE *);
217 static bool notice_source_line (rtx
, bool *);
218 static rtx
walk_alter_subreg (rtx
*, bool *);
219 static void output_asm_name (void);
220 static void output_alternate_entry_point (FILE *, rtx
);
221 static tree
get_mem_expr_from_op (rtx
, int *);
222 static void output_asm_operand_names (rtx
*, int *, int);
223 #ifdef LEAF_REGISTERS
224 static void leaf_renumber_regs (rtx
);
227 static int alter_cond (rtx
);
229 #ifndef ADDR_VEC_ALIGN
230 static int final_addr_vec_align (rtx
);
232 #ifdef HAVE_ATTR_length
233 static int align_fuzz (rtx
, rtx
, int, unsigned);
236 /* Initialize data in final at the beginning of a compilation. */
239 init_final (const char *filename ATTRIBUTE_UNUSED
)
244 #ifdef ASSEMBLER_DIALECT
245 dialect_number
= ASSEMBLER_DIALECT
;
249 /* Default target function prologue and epilogue assembler output.
251 If not overridden for epilogue code, then the function body itself
252 contains return instructions wherever needed. */
254 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
255 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
260 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED
,
261 tree decl ATTRIBUTE_UNUSED
,
262 bool new_is_cold ATTRIBUTE_UNUSED
)
266 /* Default target hook that outputs nothing to a stream. */
268 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
272 /* Enable APP processing of subsequent output.
273 Used before the output from an `asm' statement. */
280 fputs (ASM_APP_ON
, asm_out_file
);
285 /* Disable APP processing of subsequent output.
286 Called from varasm.c before most kinds of output. */
293 fputs (ASM_APP_OFF
, asm_out_file
);
298 /* Return the number of slots filled in the current
299 delayed branch sequence (we don't count the insn needing the
300 delay slot). Zero if not in a delayed branch sequence. */
304 dbr_sequence_length (void)
306 if (final_sequence
!= 0)
307 return XVECLEN (final_sequence
, 0) - 1;
313 /* The next two pages contain routines used to compute the length of an insn
314 and to shorten branches. */
316 /* Arrays for insn lengths, and addresses. The latter is referenced by
317 `insn_current_length'. */
319 static int *insn_lengths
;
321 VEC(int,heap
) *insn_addresses_
;
323 /* Max uid for which the above arrays are valid. */
324 static int insn_lengths_max_uid
;
326 /* Address of insn being processed. Used by `insn_current_length'. */
327 int insn_current_address
;
329 /* Address of insn being processed in previous iteration. */
330 int insn_last_address
;
332 /* known invariant alignment of insn being processed. */
333 int insn_current_align
;
335 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
336 gives the next following alignment insn that increases the known
337 alignment, or NULL_RTX if there is no such insn.
338 For any alignment obtained this way, we can again index uid_align with
339 its uid to obtain the next following align that in turn increases the
340 alignment, till we reach NULL_RTX; the sequence obtained this way
341 for each insn we'll call the alignment chain of this insn in the following
344 struct label_alignment
350 static rtx
*uid_align
;
351 static int *uid_shuid
;
352 static struct label_alignment
*label_align
;
354 /* Indicate that branch shortening hasn't yet been done. */
357 init_insn_lengths (void)
368 insn_lengths_max_uid
= 0;
370 #ifdef HAVE_ATTR_length
371 INSN_ADDRESSES_FREE ();
380 /* Obtain the current length of an insn. If branch shortening has been done,
381 get its actual length. Otherwise, use FALLBACK_FN to calculate the
384 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED
,
385 int (*fallback_fn
) (rtx
) ATTRIBUTE_UNUSED
)
387 #ifdef HAVE_ATTR_length
392 if (insn_lengths_max_uid
> INSN_UID (insn
))
393 return insn_lengths
[INSN_UID (insn
)];
395 switch (GET_CODE (insn
))
404 length
= fallback_fn (insn
);
408 body
= PATTERN (insn
);
409 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
411 /* Alignment is machine-dependent and should be handled by
415 length
= fallback_fn (insn
);
419 body
= PATTERN (insn
);
420 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
423 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
424 length
= asm_insn_count (body
) * fallback_fn (insn
);
425 else if (GET_CODE (body
) == SEQUENCE
)
426 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
427 length
+= get_attr_length_1 (XVECEXP (body
, 0, i
), fallback_fn
);
429 length
= fallback_fn (insn
);
436 #ifdef ADJUST_INSN_LENGTH
437 ADJUST_INSN_LENGTH (insn
, length
);
440 #else /* not HAVE_ATTR_length */
442 #define insn_default_length 0
443 #define insn_min_length 0
444 #endif /* not HAVE_ATTR_length */
447 /* Obtain the current length of an insn. If branch shortening has been done,
448 get its actual length. Otherwise, get its maximum length. */
450 get_attr_length (rtx insn
)
452 return get_attr_length_1 (insn
, insn_default_length
);
455 /* Obtain the current length of an insn. If branch shortening has been done,
456 get its actual length. Otherwise, get its minimum length. */
458 get_attr_min_length (rtx insn
)
460 return get_attr_length_1 (insn
, insn_min_length
);
463 /* Code to handle alignment inside shorten_branches. */
465 /* Here is an explanation how the algorithm in align_fuzz can give
468 Call a sequence of instructions beginning with alignment point X
469 and continuing until the next alignment point `block X'. When `X'
470 is used in an expression, it means the alignment value of the
473 Call the distance between the start of the first insn of block X, and
474 the end of the last insn of block X `IX', for the `inner size of X'.
475 This is clearly the sum of the instruction lengths.
477 Likewise with the next alignment-delimited block following X, which we
480 Call the distance between the start of the first insn of block X, and
481 the start of the first insn of block Y `OX', for the `outer size of X'.
483 The estimated padding is then OX - IX.
485 OX can be safely estimated as
490 OX = round_up(IX, X) + Y - X
492 Clearly est(IX) >= real(IX), because that only depends on the
493 instruction lengths, and those being overestimated is a given.
495 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
496 we needn't worry about that when thinking about OX.
498 When X >= Y, the alignment provided by Y adds no uncertainty factor
499 for branch ranges starting before X, so we can just round what we have.
500 But when X < Y, we don't know anything about the, so to speak,
501 `middle bits', so we have to assume the worst when aligning up from an
502 address mod X to one mod Y, which is Y - X. */
505 #define LABEL_ALIGN(LABEL) align_labels_log
509 #define LOOP_ALIGN(LABEL) align_loops_log
512 #ifndef LABEL_ALIGN_AFTER_BARRIER
513 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
517 #define JUMP_ALIGN(LABEL) align_jumps_log
521 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED
)
527 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED
)
529 return align_loops_max_skip
;
533 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED
)
535 return align_labels_max_skip
;
539 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED
)
541 return align_jumps_max_skip
;
544 #ifndef ADDR_VEC_ALIGN
546 final_addr_vec_align (rtx addr_vec
)
548 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
550 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
551 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
552 return exact_log2 (align
);
556 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
559 #ifndef INSN_LENGTH_ALIGNMENT
560 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
563 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
565 static int min_labelno
, max_labelno
;
567 #define LABEL_TO_ALIGNMENT(LABEL) \
568 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
570 #define LABEL_TO_MAX_SKIP(LABEL) \
571 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
573 /* For the benefit of port specific code do this also as a function. */
576 label_to_alignment (rtx label
)
578 if (CODE_LABEL_NUMBER (label
) <= max_labelno
)
579 return LABEL_TO_ALIGNMENT (label
);
584 label_to_max_skip (rtx label
)
586 if (CODE_LABEL_NUMBER (label
) <= max_labelno
)
587 return LABEL_TO_MAX_SKIP (label
);
591 #ifdef HAVE_ATTR_length
592 /* The differences in addresses
593 between a branch and its target might grow or shrink depending on
594 the alignment the start insn of the range (the branch for a forward
595 branch or the label for a backward branch) starts out on; if these
596 differences are used naively, they can even oscillate infinitely.
597 We therefore want to compute a 'worst case' address difference that
598 is independent of the alignment the start insn of the range end
599 up on, and that is at least as large as the actual difference.
600 The function align_fuzz calculates the amount we have to add to the
601 naively computed difference, by traversing the part of the alignment
602 chain of the start insn of the range that is in front of the end insn
603 of the range, and considering for each alignment the maximum amount
604 that it might contribute to a size increase.
606 For casesi tables, we also want to know worst case minimum amounts of
607 address difference, in case a machine description wants to introduce
608 some common offset that is added to all offsets in a table.
609 For this purpose, align_fuzz with a growth argument of 0 computes the
610 appropriate adjustment. */
612 /* Compute the maximum delta by which the difference of the addresses of
613 START and END might grow / shrink due to a different address for start
614 which changes the size of alignment insns between START and END.
615 KNOWN_ALIGN_LOG is the alignment known for START.
616 GROWTH should be ~0 if the objective is to compute potential code size
617 increase, and 0 if the objective is to compute potential shrink.
618 The return value is undefined for any other value of GROWTH. */
621 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
623 int uid
= INSN_UID (start
);
625 int known_align
= 1 << known_align_log
;
626 int end_shuid
= INSN_SHUID (end
);
629 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
631 int align_addr
, new_align
;
633 uid
= INSN_UID (align_label
);
634 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
635 if (uid_shuid
[uid
] > end_shuid
)
637 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
638 new_align
= 1 << known_align_log
;
639 if (new_align
< known_align
)
641 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
642 known_align
= new_align
;
647 /* Compute a worst-case reference address of a branch so that it
648 can be safely used in the presence of aligned labels. Since the
649 size of the branch itself is unknown, the size of the branch is
650 not included in the range. I.e. for a forward branch, the reference
651 address is the end address of the branch as known from the previous
652 branch shortening pass, minus a value to account for possible size
653 increase due to alignment. For a backward branch, it is the start
654 address of the branch as known from the current pass, plus a value
655 to account for possible size increase due to alignment.
656 NB.: Therefore, the maximum offset allowed for backward branches needs
657 to exclude the branch size. */
660 insn_current_reference_address (rtx branch
)
665 if (! INSN_ADDRESSES_SET_P ())
668 seq
= NEXT_INSN (PREV_INSN (branch
));
669 seq_uid
= INSN_UID (seq
);
670 if (!JUMP_P (branch
))
671 /* This can happen for example on the PA; the objective is to know the
672 offset to address something in front of the start of the function.
673 Thus, we can treat it like a backward branch.
674 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
675 any alignment we'd encounter, so we skip the call to align_fuzz. */
676 return insn_current_address
;
677 dest
= JUMP_LABEL (branch
);
679 /* BRANCH has no proper alignment chain set, so use SEQ.
680 BRANCH also has no INSN_SHUID. */
681 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
683 /* Forward branch. */
684 return (insn_last_address
+ insn_lengths
[seq_uid
]
685 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
689 /* Backward branch. */
690 return (insn_current_address
691 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
694 #endif /* HAVE_ATTR_length */
696 /* Compute branch alignments based on frequency information in the
700 compute_alignments (void)
702 int log
, max_skip
, max_log
;
705 int freq_threshold
= 0;
713 max_labelno
= max_label_num ();
714 min_labelno
= get_first_label_num ();
715 label_align
= XCNEWVEC (struct label_alignment
, max_labelno
- min_labelno
+ 1);
717 /* If not optimizing or optimizing for size, don't assign any alignments. */
718 if (! optimize
|| optimize_function_for_size_p (cfun
))
723 dump_flow_info (dump_file
, TDF_DETAILS
);
724 flow_loops_dump (dump_file
, NULL
, 1);
726 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
728 if (bb
->frequency
> freq_max
)
729 freq_max
= bb
->frequency
;
730 freq_threshold
= freq_max
/ PARAM_VALUE (PARAM_ALIGN_THRESHOLD
);
733 fprintf(dump_file
, "freq_max: %i\n",freq_max
);
736 rtx label
= BB_HEAD (bb
);
737 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
742 || optimize_bb_for_size_p (bb
))
745 fprintf(dump_file
, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
746 bb
->index
, bb
->frequency
, bb
->loop_father
->num
, bb
->loop_depth
);
749 max_log
= LABEL_ALIGN (label
);
750 max_skip
= targetm
.asm_out
.label_align_max_skip (label
);
752 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
754 if (e
->flags
& EDGE_FALLTHRU
)
755 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
757 branch_frequency
+= EDGE_FREQUENCY (e
);
761 fprintf(dump_file
, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
762 bb
->index
, bb
->frequency
, bb
->loop_father
->num
,
764 fallthru_frequency
, branch_frequency
);
765 if (!bb
->loop_father
->inner
&& bb
->loop_father
->num
)
766 fprintf (dump_file
, " inner_loop");
767 if (bb
->loop_father
->header
== bb
)
768 fprintf (dump_file
, " loop_header");
769 fprintf (dump_file
, "\n");
772 /* There are two purposes to align block with no fallthru incoming edge:
773 1) to avoid fetch stalls when branch destination is near cache boundary
774 2) to improve cache efficiency in case the previous block is not executed
775 (so it does not need to be in the cache).
777 We to catch first case, we align frequently executed blocks.
778 To catch the second, we align blocks that are executed more frequently
779 than the predecessor and the predecessor is likely to not be executed
780 when function is called. */
783 && (branch_frequency
> freq_threshold
784 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
785 && (bb
->prev_bb
->frequency
786 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
788 log
= JUMP_ALIGN (label
);
790 fprintf(dump_file
, " jump alignment added.\n");
794 max_skip
= targetm
.asm_out
.jump_align_max_skip (label
);
797 /* In case block is frequent and reached mostly by non-fallthru edge,
798 align it. It is most likely a first block of loop. */
800 && optimize_bb_for_speed_p (bb
)
801 && branch_frequency
+ fallthru_frequency
> freq_threshold
803 > fallthru_frequency
* PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS
)))
805 log
= LOOP_ALIGN (label
);
807 fprintf(dump_file
, " internal loop alignment added.\n");
811 max_skip
= targetm
.asm_out
.loop_align_max_skip (label
);
814 LABEL_TO_ALIGNMENT (label
) = max_log
;
815 LABEL_TO_MAX_SKIP (label
) = max_skip
;
818 loop_optimizer_finalize ();
819 free_dominance_info (CDI_DOMINATORS
);
823 struct rtl_opt_pass pass_compute_alignments
=
827 "alignments", /* name */
829 compute_alignments
, /* execute */
832 0, /* static_pass_number */
834 0, /* properties_required */
835 0, /* properties_provided */
836 0, /* properties_destroyed */
837 0, /* todo_flags_start */
838 TODO_dump_func
| TODO_verify_rtl_sharing
839 | TODO_ggc_collect
/* todo_flags_finish */
844 /* Make a pass over all insns and compute their actual lengths by shortening
845 any branches of variable length if possible. */
847 /* shorten_branches might be called multiple times: for example, the SH
848 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
849 In order to do this, it needs proper length information, which it obtains
850 by calling shorten_branches. This cannot be collapsed with
851 shorten_branches itself into a single pass unless we also want to integrate
852 reorg.c, since the branch splitting exposes new instructions with delay
856 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
863 #ifdef HAVE_ATTR_length
864 #define MAX_CODE_ALIGN 16
866 int something_changed
= 1;
867 char *varying_length
;
870 rtx align_tab
[MAX_CODE_ALIGN
];
874 /* Compute maximum UID and allocate label_align / uid_shuid. */
875 max_uid
= get_max_uid ();
877 /* Free uid_shuid before reallocating it. */
880 uid_shuid
= XNEWVEC (int, max_uid
);
882 if (max_labelno
!= max_label_num ())
884 int old
= max_labelno
;
888 max_labelno
= max_label_num ();
890 n_labels
= max_labelno
- min_labelno
+ 1;
891 n_old_labels
= old
- min_labelno
+ 1;
893 label_align
= XRESIZEVEC (struct label_alignment
, label_align
, n_labels
);
895 /* Range of labels grows monotonically in the function. Failing here
896 means that the initialization of array got lost. */
897 gcc_assert (n_old_labels
<= n_labels
);
899 memset (label_align
+ n_old_labels
, 0,
900 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
903 /* Initialize label_align and set up uid_shuid to be strictly
904 monotonically rising with insn order. */
905 /* We use max_log here to keep track of the maximum alignment we want to
906 impose on the next CODE_LABEL (or the current one if we are processing
907 the CODE_LABEL itself). */
912 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
916 INSN_SHUID (insn
) = i
++;
923 bool next_is_jumptable
;
925 /* Merge in alignments computed by compute_alignments. */
926 log
= LABEL_TO_ALIGNMENT (insn
);
930 max_skip
= LABEL_TO_MAX_SKIP (insn
);
933 next
= next_nonnote_insn (insn
);
934 next_is_jumptable
= next
&& JUMP_TABLE_DATA_P (next
);
935 if (!next_is_jumptable
)
937 log
= LABEL_ALIGN (insn
);
941 max_skip
= targetm
.asm_out
.label_align_max_skip (insn
);
944 /* ADDR_VECs only take room if read-only data goes into the text
946 if ((JUMP_TABLES_IN_TEXT_SECTION
947 || readonly_data_section
== text_section
)
948 && next_is_jumptable
)
950 log
= ADDR_VEC_ALIGN (next
);
954 max_skip
= targetm
.asm_out
.label_align_max_skip (insn
);
957 LABEL_TO_ALIGNMENT (insn
) = max_log
;
958 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
962 else if (BARRIER_P (insn
))
966 for (label
= insn
; label
&& ! INSN_P (label
);
967 label
= NEXT_INSN (label
))
970 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
974 max_skip
= targetm
.asm_out
.label_align_after_barrier_max_skip (label
);
980 #ifdef HAVE_ATTR_length
982 /* Allocate the rest of the arrays. */
983 insn_lengths
= XNEWVEC (int, max_uid
);
984 insn_lengths_max_uid
= max_uid
;
985 /* Syntax errors can lead to labels being outside of the main insn stream.
986 Initialize insn_addresses, so that we get reproducible results. */
987 INSN_ADDRESSES_ALLOC (max_uid
);
989 varying_length
= XCNEWVEC (char, max_uid
);
991 /* Initialize uid_align. We scan instructions
992 from end to start, and keep in align_tab[n] the last seen insn
993 that does an alignment of at least n+1, i.e. the successor
994 in the alignment chain for an insn that does / has a known
996 uid_align
= XCNEWVEC (rtx
, max_uid
);
998 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
999 align_tab
[i
] = NULL_RTX
;
1000 seq
= get_last_insn ();
1001 for (; seq
; seq
= PREV_INSN (seq
))
1003 int uid
= INSN_UID (seq
);
1005 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
1006 uid_align
[uid
] = align_tab
[0];
1009 /* Found an alignment label. */
1010 uid_align
[uid
] = align_tab
[log
];
1011 for (i
= log
- 1; i
>= 0; i
--)
1015 #ifdef CASE_VECTOR_SHORTEN_MODE
1018 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1021 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
1022 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
1025 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
1027 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
1028 int len
, i
, min
, max
, insn_shuid
;
1030 addr_diff_vec_flags flags
;
1033 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1035 pat
= PATTERN (insn
);
1036 len
= XVECLEN (pat
, 1);
1037 gcc_assert (len
> 0);
1038 min_align
= MAX_CODE_ALIGN
;
1039 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1041 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1042 int shuid
= INSN_SHUID (lab
);
1053 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1054 min_align
= LABEL_TO_ALIGNMENT (lab
);
1056 XEXP (pat
, 2) = gen_rtx_LABEL_REF (Pmode
, min_lab
);
1057 XEXP (pat
, 3) = gen_rtx_LABEL_REF (Pmode
, max_lab
);
1058 insn_shuid
= INSN_SHUID (insn
);
1059 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1060 memset (&flags
, 0, sizeof (flags
));
1061 flags
.min_align
= min_align
;
1062 flags
.base_after_vec
= rel
> insn_shuid
;
1063 flags
.min_after_vec
= min
> insn_shuid
;
1064 flags
.max_after_vec
= max
> insn_shuid
;
1065 flags
.min_after_base
= min
> rel
;
1066 flags
.max_after_base
= max
> rel
;
1067 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1070 #endif /* CASE_VECTOR_SHORTEN_MODE */
1072 /* Compute initial lengths, addresses, and varying flags for each insn. */
1073 for (insn_current_address
= 0, insn
= first
;
1075 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1077 uid
= INSN_UID (insn
);
1079 insn_lengths
[uid
] = 0;
1083 int log
= LABEL_TO_ALIGNMENT (insn
);
1086 int align
= 1 << log
;
1087 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1088 insn_lengths
[uid
] = new_address
- insn_current_address
;
1092 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
1094 if (NOTE_P (insn
) || BARRIER_P (insn
)
1095 || LABEL_P (insn
) || DEBUG_INSN_P(insn
))
1097 if (INSN_DELETED_P (insn
))
1100 body
= PATTERN (insn
);
1101 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1103 /* This only takes room if read-only data goes into the text
1105 if (JUMP_TABLES_IN_TEXT_SECTION
1106 || readonly_data_section
== text_section
)
1107 insn_lengths
[uid
] = (XVECLEN (body
,
1108 GET_CODE (body
) == ADDR_DIFF_VEC
)
1109 * GET_MODE_SIZE (GET_MODE (body
)));
1110 /* Alignment is handled by ADDR_VEC_ALIGN. */
1112 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1113 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1114 else if (GET_CODE (body
) == SEQUENCE
)
1117 int const_delay_slots
;
1119 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1121 const_delay_slots
= 0;
1123 /* Inside a delay slot sequence, we do not do any branch shortening
1124 if the shortening could change the number of delay slots
1126 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1128 rtx inner_insn
= XVECEXP (body
, 0, i
);
1129 int inner_uid
= INSN_UID (inner_insn
);
1132 if (GET_CODE (body
) == ASM_INPUT
1133 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1134 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1135 * insn_default_length (inner_insn
));
1137 inner_length
= insn_default_length (inner_insn
);
1139 insn_lengths
[inner_uid
] = inner_length
;
1140 if (const_delay_slots
)
1142 if ((varying_length
[inner_uid
]
1143 = insn_variable_length_p (inner_insn
)) != 0)
1144 varying_length
[uid
] = 1;
1145 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1146 + insn_lengths
[uid
]);
1149 varying_length
[inner_uid
] = 0;
1150 insn_lengths
[uid
] += inner_length
;
1153 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1155 insn_lengths
[uid
] = insn_default_length (insn
);
1156 varying_length
[uid
] = insn_variable_length_p (insn
);
1159 /* If needed, do any adjustment. */
1160 #ifdef ADJUST_INSN_LENGTH
1161 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1162 if (insn_lengths
[uid
] < 0)
1163 fatal_insn ("negative insn length", insn
);
1167 /* Now loop over all the insns finding varying length insns. For each,
1168 get the current insn length. If it has changed, reflect the change.
1169 When nothing changes for a full pass, we are done. */
1171 while (something_changed
)
1173 something_changed
= 0;
1174 insn_current_align
= MAX_CODE_ALIGN
- 1;
1175 for (insn_current_address
= 0, insn
= first
;
1177 insn
= NEXT_INSN (insn
))
1180 #ifdef ADJUST_INSN_LENGTH
1185 uid
= INSN_UID (insn
);
1189 int log
= LABEL_TO_ALIGNMENT (insn
);
1190 if (log
> insn_current_align
)
1192 int align
= 1 << log
;
1193 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1194 insn_lengths
[uid
] = new_address
- insn_current_address
;
1195 insn_current_align
= log
;
1196 insn_current_address
= new_address
;
1199 insn_lengths
[uid
] = 0;
1200 INSN_ADDRESSES (uid
) = insn_current_address
;
1204 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1205 if (length_align
< insn_current_align
)
1206 insn_current_align
= length_align
;
1208 insn_last_address
= INSN_ADDRESSES (uid
);
1209 INSN_ADDRESSES (uid
) = insn_current_address
;
1211 #ifdef CASE_VECTOR_SHORTEN_MODE
1212 if (optimize
&& JUMP_P (insn
)
1213 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1215 rtx body
= PATTERN (insn
);
1216 int old_length
= insn_lengths
[uid
];
1217 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1218 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1219 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1220 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1221 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1222 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1225 addr_diff_vec_flags flags
;
1227 /* Avoid automatic aggregate initialization. */
1228 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1230 /* Try to find a known alignment for rel_lab. */
1231 for (prev
= rel_lab
;
1233 && ! insn_lengths
[INSN_UID (prev
)]
1234 && ! (varying_length
[INSN_UID (prev
)] & 1);
1235 prev
= PREV_INSN (prev
))
1236 if (varying_length
[INSN_UID (prev
)] & 2)
1238 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1242 /* See the comment on addr_diff_vec_flags in rtl.h for the
1243 meaning of the flags values. base: REL_LAB vec: INSN */
1244 /* Anything after INSN has still addresses from the last
1245 pass; adjust these so that they reflect our current
1246 estimate for this pass. */
1247 if (flags
.base_after_vec
)
1248 rel_addr
+= insn_current_address
- insn_last_address
;
1249 if (flags
.min_after_vec
)
1250 min_addr
+= insn_current_address
- insn_last_address
;
1251 if (flags
.max_after_vec
)
1252 max_addr
+= insn_current_address
- insn_last_address
;
1253 /* We want to know the worst case, i.e. lowest possible value
1254 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1255 its offset is positive, and we have to be wary of code shrink;
1256 otherwise, it is negative, and we have to be vary of code
1258 if (flags
.min_after_base
)
1260 /* If INSN is between REL_LAB and MIN_LAB, the size
1261 changes we are about to make can change the alignment
1262 within the observed offset, therefore we have to break
1263 it up into two parts that are independent. */
1264 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1266 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1267 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1270 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1274 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1276 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1277 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1280 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1282 /* Likewise, determine the highest lowest possible value
1283 for the offset of MAX_LAB. */
1284 if (flags
.max_after_base
)
1286 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1288 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1289 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1292 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1296 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1298 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1299 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1302 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1304 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1305 max_addr
- rel_addr
,
1307 if (JUMP_TABLES_IN_TEXT_SECTION
1308 || readonly_data_section
== text_section
)
1311 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1312 insn_current_address
+= insn_lengths
[uid
];
1313 if (insn_lengths
[uid
] != old_length
)
1314 something_changed
= 1;
1319 #endif /* CASE_VECTOR_SHORTEN_MODE */
1321 if (! (varying_length
[uid
]))
1323 if (NONJUMP_INSN_P (insn
)
1324 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1328 body
= PATTERN (insn
);
1329 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1331 rtx inner_insn
= XVECEXP (body
, 0, i
);
1332 int inner_uid
= INSN_UID (inner_insn
);
1334 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1336 insn_current_address
+= insn_lengths
[inner_uid
];
1340 insn_current_address
+= insn_lengths
[uid
];
1345 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1349 body
= PATTERN (insn
);
1351 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1353 rtx inner_insn
= XVECEXP (body
, 0, i
);
1354 int inner_uid
= INSN_UID (inner_insn
);
1357 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1359 /* insn_current_length returns 0 for insns with a
1360 non-varying length. */
1361 if (! varying_length
[inner_uid
])
1362 inner_length
= insn_lengths
[inner_uid
];
1364 inner_length
= insn_current_length (inner_insn
);
1366 if (inner_length
!= insn_lengths
[inner_uid
])
1368 insn_lengths
[inner_uid
] = inner_length
;
1369 something_changed
= 1;
1371 insn_current_address
+= insn_lengths
[inner_uid
];
1372 new_length
+= inner_length
;
1377 new_length
= insn_current_length (insn
);
1378 insn_current_address
+= new_length
;
1381 #ifdef ADJUST_INSN_LENGTH
1382 /* If needed, do any adjustment. */
1383 tmp_length
= new_length
;
1384 ADJUST_INSN_LENGTH (insn
, new_length
);
1385 insn_current_address
+= (new_length
- tmp_length
);
1388 if (new_length
!= insn_lengths
[uid
])
1390 insn_lengths
[uid
] = new_length
;
1391 something_changed
= 1;
1394 /* For a non-optimizing compile, do only a single pass. */
1399 free (varying_length
);
1401 #endif /* HAVE_ATTR_length */
1404 #ifdef HAVE_ATTR_length
1405 /* Given the body of an INSN known to be generated by an ASM statement, return
1406 the number of machine instructions likely to be generated for this insn.
1407 This is used to compute its length. */
1410 asm_insn_count (rtx body
)
1414 if (GET_CODE (body
) == ASM_INPUT
)
1415 templ
= XSTR (body
, 0);
1417 templ
= decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
, NULL
);
1419 return asm_str_count (templ
);
1423 /* Return the number of machine instructions likely to be generated for the
1424 inline-asm template. */
1426 asm_str_count (const char *templ
)
1433 for (; *templ
; templ
++)
1434 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ
, templ
)
1441 /* ??? This is probably the wrong place for these. */
1442 /* Structure recording the mapping from source file and directory
1443 names at compile time to those to be embedded in debug
1445 typedef struct debug_prefix_map
1447 const char *old_prefix
;
1448 const char *new_prefix
;
1451 struct debug_prefix_map
*next
;
1454 /* Linked list of such structures. */
1455 debug_prefix_map
*debug_prefix_maps
;
1458 /* Record a debug file prefix mapping. ARG is the argument to
1459 -fdebug-prefix-map and must be of the form OLD=NEW. */
1462 add_debug_prefix_map (const char *arg
)
1464 debug_prefix_map
*map
;
1467 p
= strchr (arg
, '=');
1470 error ("invalid argument %qs to -fdebug-prefix-map", arg
);
1473 map
= XNEW (debug_prefix_map
);
1474 map
->old_prefix
= xstrndup (arg
, p
- arg
);
1475 map
->old_len
= p
- arg
;
1477 map
->new_prefix
= xstrdup (p
);
1478 map
->new_len
= strlen (p
);
1479 map
->next
= debug_prefix_maps
;
1480 debug_prefix_maps
= map
;
1483 /* Perform user-specified mapping of debug filename prefixes. Return
1484 the new name corresponding to FILENAME. */
1487 remap_debug_filename (const char *filename
)
1489 debug_prefix_map
*map
;
1494 for (map
= debug_prefix_maps
; map
; map
= map
->next
)
1495 if (strncmp (filename
, map
->old_prefix
, map
->old_len
) == 0)
1499 name
= filename
+ map
->old_len
;
1500 name_len
= strlen (name
) + 1;
1501 s
= (char *) alloca (name_len
+ map
->new_len
);
1502 memcpy (s
, map
->new_prefix
, map
->new_len
);
1503 memcpy (s
+ map
->new_len
, name
, name_len
);
1504 return ggc_strdup (s
);
1507 /* Return true if DWARF2 debug info can be emitted for DECL. */
1510 dwarf2_debug_info_emitted_p (tree decl
)
1512 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1515 if (DECL_IGNORED_P (decl
))
1521 /* Output assembler code for the start of a function,
1522 and initialize some of the variables in this file
1523 for the new function. The label for the function and associated
1524 assembler pseudo-ops have already been output in `assemble_start_function'.
1526 FIRST is the first insn of the rtl for the function being compiled.
1527 FILE is the file to write assembler code to.
1528 OPTIMIZE_P is nonzero if we should eliminate redundant
1529 test and compare insns. */
1532 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1533 int optimize_p ATTRIBUTE_UNUSED
)
1537 this_is_asm_operands
= 0;
1539 last_filename
= locator_file (prologue_locator
);
1540 last_linenum
= locator_line (prologue_locator
);
1541 last_discriminator
= discriminator
= 0;
1543 high_block_linenum
= high_function_linenum
= last_linenum
;
1545 if (!DECL_IGNORED_P (current_function_decl
))
1546 debug_hooks
->begin_prologue (last_linenum
, last_filename
);
1548 if (!dwarf2_debug_info_emitted_p (current_function_decl
))
1549 dwarf2out_begin_prologue (0, NULL
);
1551 #ifdef LEAF_REG_REMAP
1552 if (current_function_uses_only_leaf_regs
)
1553 leaf_renumber_regs (first
);
1556 /* The Sun386i and perhaps other machines don't work right
1557 if the profiling code comes after the prologue. */
1558 if (targetm
.profile_before_prologue () && crtl
->profile
)
1559 profile_function (file
);
1561 #if defined (HAVE_prologue)
1562 if (dwarf2out_do_frame ())
1563 dwarf2out_frame_debug (NULL_RTX
, false);
1566 /* If debugging, assign block numbers to all of the blocks in this
1570 reemit_insn_block_notes ();
1571 number_blocks (current_function_decl
);
1572 /* We never actually put out begin/end notes for the top-level
1573 block in the function. But, conceptually, that block is
1575 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1578 if (warn_frame_larger_than
1579 && get_frame_size () > frame_larger_than_size
)
1581 /* Issue a warning */
1582 warning (OPT_Wframe_larger_than_
,
1583 "the frame size of %wd bytes is larger than %wd bytes",
1584 get_frame_size (), frame_larger_than_size
);
1587 /* First output the function prologue: code to set up the stack frame. */
1588 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1590 /* If the machine represents the prologue as RTL, the profiling code must
1591 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1592 #ifdef HAVE_prologue
1593 if (! HAVE_prologue
)
1595 profile_after_prologue (file
);
1599 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1601 if (!targetm
.profile_before_prologue () && crtl
->profile
)
1602 profile_function (file
);
1606 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1608 #ifndef NO_PROFILE_COUNTERS
1609 # define NO_PROFILE_COUNTERS 0
1611 #ifdef ASM_OUTPUT_REG_PUSH
1612 rtx sval
= NULL
, chain
= NULL
;
1614 if (cfun
->returns_struct
)
1615 sval
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
),
1617 if (cfun
->static_chain_decl
)
1618 chain
= targetm
.calls
.static_chain (current_function_decl
, true);
1619 #endif /* ASM_OUTPUT_REG_PUSH */
1621 if (! NO_PROFILE_COUNTERS
)
1623 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1624 switch_to_section (data_section
);
1625 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1626 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1627 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1630 switch_to_section (current_function_section ());
1632 #ifdef ASM_OUTPUT_REG_PUSH
1633 if (sval
&& REG_P (sval
))
1634 ASM_OUTPUT_REG_PUSH (file
, REGNO (sval
));
1635 if (chain
&& REG_P (chain
))
1636 ASM_OUTPUT_REG_PUSH (file
, REGNO (chain
));
1639 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1641 #ifdef ASM_OUTPUT_REG_PUSH
1642 if (chain
&& REG_P (chain
))
1643 ASM_OUTPUT_REG_POP (file
, REGNO (chain
));
1644 if (sval
&& REG_P (sval
))
1645 ASM_OUTPUT_REG_POP (file
, REGNO (sval
));
1649 /* Output assembler code for the end of a function.
1650 For clarity, args are same as those of `final_start_function'
1651 even though not all of them are needed. */
1654 final_end_function (void)
1658 if (!DECL_IGNORED_P (current_function_decl
))
1659 debug_hooks
->end_function (high_function_linenum
);
1661 /* Finally, output the function epilogue:
1662 code to restore the stack frame and return to the caller. */
1663 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1665 /* And debug output. */
1666 if (!DECL_IGNORED_P (current_function_decl
))
1667 debug_hooks
->end_epilogue (last_linenum
, last_filename
);
1669 if (!dwarf2_debug_info_emitted_p (current_function_decl
)
1670 && dwarf2out_do_frame ())
1671 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1674 /* Output assembler code for some insns: all or part of a function.
1675 For description of args, see `final_start_function', above. */
1678 final (rtx first
, FILE *file
, int optimize_p
)
1684 last_ignored_compare
= 0;
1686 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1688 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1689 max_uid
= INSN_UID (insn
);
1691 /* If CC tracking across branches is enabled, record the insn which
1692 jumps to each branch only reached from one place. */
1693 if (optimize_p
&& JUMP_P (insn
))
1695 rtx lab
= JUMP_LABEL (insn
);
1696 if (lab
&& LABEL_NUSES (lab
) == 1)
1698 LABEL_REFS (lab
) = insn
;
1708 /* Output the insns. */
1709 for (insn
= first
; insn
;)
1711 #ifdef HAVE_ATTR_length
1712 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1714 /* This can be triggered by bugs elsewhere in the compiler if
1715 new insns are created after init_insn_lengths is called. */
1716 gcc_assert (NOTE_P (insn
));
1717 insn_current_address
= -1;
1720 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1721 #endif /* HAVE_ATTR_length */
1723 insn
= final_scan_insn (insn
, file
, optimize_p
, 0, &seen
);
1728 get_insn_template (int code
, rtx insn
)
1730 switch (insn_data
[code
].output_format
)
1732 case INSN_OUTPUT_FORMAT_SINGLE
:
1733 return insn_data
[code
].output
.single
;
1734 case INSN_OUTPUT_FORMAT_MULTI
:
1735 return insn_data
[code
].output
.multi
[which_alternative
];
1736 case INSN_OUTPUT_FORMAT_FUNCTION
:
1738 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1745 /* Emit the appropriate declaration for an alternate-entry-point
1746 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1747 LABEL_KIND != LABEL_NORMAL.
1749 The case fall-through in this function is intentional. */
1751 output_alternate_entry_point (FILE *file
, rtx insn
)
1753 const char *name
= LABEL_NAME (insn
);
1755 switch (LABEL_KIND (insn
))
1757 case LABEL_WEAK_ENTRY
:
1758 #ifdef ASM_WEAKEN_LABEL
1759 ASM_WEAKEN_LABEL (file
, name
);
1761 case LABEL_GLOBAL_ENTRY
:
1762 targetm
.asm_out
.globalize_label (file
, name
);
1763 case LABEL_STATIC_ENTRY
:
1764 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1765 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1767 ASM_OUTPUT_LABEL (file
, name
);
1776 /* Given a CALL_INSN, find and return the nested CALL. */
1778 call_from_call_insn (rtx insn
)
1781 gcc_assert (CALL_P (insn
));
1784 while (GET_CODE (x
) != CALL
)
1786 switch (GET_CODE (x
))
1791 x
= COND_EXEC_CODE (x
);
1794 x
= XVECEXP (x
, 0, 0);
1804 /* The final scan for one insn, INSN.
1805 Args are same as in `final', except that INSN
1806 is the insn being scanned.
1807 Value returned is the next insn to be scanned.
1809 NOPEEPHOLES is the flag to disallow peephole processing (currently
1810 used for within delayed branch sequence output).
1812 SEEN is used to track the end of the prologue, for emitting
1813 debug information. We force the emission of a line note after
1814 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1815 at the beginning of the second basic block, whichever comes
1819 final_scan_insn (rtx insn
, FILE *file
, int optimize_p ATTRIBUTE_UNUSED
,
1820 int nopeepholes ATTRIBUTE_UNUSED
, int *seen
)
1829 /* Ignore deleted insns. These can occur when we split insns (due to a
1830 template of "#") while not optimizing. */
1831 if (INSN_DELETED_P (insn
))
1832 return NEXT_INSN (insn
);
1834 switch (GET_CODE (insn
))
1837 switch (NOTE_KIND (insn
))
1839 case NOTE_INSN_DELETED
:
1842 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
1843 in_cold_section_p
= !in_cold_section_p
;
1845 if (dwarf2out_do_frame ())
1846 dwarf2out_switch_text_section ();
1847 else if (!DECL_IGNORED_P (current_function_decl
))
1848 debug_hooks
->switch_text_section ();
1850 switch_to_section (current_function_section ());
1851 targetm
.asm_out
.function_switched_text_sections (asm_out_file
,
1852 current_function_decl
,
1856 case NOTE_INSN_BASIC_BLOCK
:
1857 if (targetm
.asm_out
.unwind_emit
)
1858 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1861 fprintf (asm_out_file
, "\t%s basic block %d\n",
1862 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1864 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1866 *seen
|= SEEN_EMITTED
;
1867 force_source_line
= true;
1872 discriminator
= NOTE_BASIC_BLOCK (insn
)->discriminator
;
1876 case NOTE_INSN_EH_REGION_BEG
:
1877 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1878 NOTE_EH_HANDLER (insn
));
1881 case NOTE_INSN_EH_REGION_END
:
1882 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1883 NOTE_EH_HANDLER (insn
));
1886 case NOTE_INSN_PROLOGUE_END
:
1887 targetm
.asm_out
.function_end_prologue (file
);
1888 profile_after_prologue (file
);
1890 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1892 *seen
|= SEEN_EMITTED
;
1893 force_source_line
= true;
1900 case NOTE_INSN_EPILOGUE_BEG
:
1901 #if defined (HAVE_epilogue)
1902 if (dwarf2out_do_frame ())
1903 dwarf2out_cfi_begin_epilogue (insn
);
1905 (*debug_hooks
->begin_epilogue
) (last_linenum
, last_filename
);
1906 targetm
.asm_out
.function_begin_epilogue (file
);
1909 case NOTE_INSN_CFA_RESTORE_STATE
:
1910 dwarf2out_frame_debug_restore_state ();
1913 case NOTE_INSN_FUNCTION_BEG
:
1915 if (!DECL_IGNORED_P (current_function_decl
))
1916 debug_hooks
->end_prologue (last_linenum
, last_filename
);
1918 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1920 *seen
|= SEEN_EMITTED
;
1921 force_source_line
= true;
1928 case NOTE_INSN_BLOCK_BEG
:
1929 if (debug_info_level
== DINFO_LEVEL_NORMAL
1930 || debug_info_level
== DINFO_LEVEL_VERBOSE
1931 || write_symbols
== DWARF2_DEBUG
1932 || write_symbols
== VMS_AND_DWARF2_DEBUG
1933 || write_symbols
== VMS_DEBUG
)
1935 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1939 high_block_linenum
= last_linenum
;
1941 /* Output debugging info about the symbol-block beginning. */
1942 if (!DECL_IGNORED_P (current_function_decl
))
1943 debug_hooks
->begin_block (last_linenum
, n
);
1945 /* Mark this block as output. */
1946 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1948 if (write_symbols
== DBX_DEBUG
1949 || write_symbols
== SDB_DEBUG
)
1951 location_t
*locus_ptr
1952 = block_nonartificial_location (NOTE_BLOCK (insn
));
1954 if (locus_ptr
!= NULL
)
1956 override_filename
= LOCATION_FILE (*locus_ptr
);
1957 override_linenum
= LOCATION_LINE (*locus_ptr
);
1962 case NOTE_INSN_BLOCK_END
:
1963 if (debug_info_level
== DINFO_LEVEL_NORMAL
1964 || debug_info_level
== DINFO_LEVEL_VERBOSE
1965 || write_symbols
== DWARF2_DEBUG
1966 || write_symbols
== VMS_AND_DWARF2_DEBUG
1967 || write_symbols
== VMS_DEBUG
)
1969 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1973 /* End of a symbol-block. */
1975 gcc_assert (block_depth
>= 0);
1977 if (!DECL_IGNORED_P (current_function_decl
))
1978 debug_hooks
->end_block (high_block_linenum
, n
);
1980 if (write_symbols
== DBX_DEBUG
1981 || write_symbols
== SDB_DEBUG
)
1983 tree outer_block
= BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn
));
1984 location_t
*locus_ptr
1985 = block_nonartificial_location (outer_block
);
1987 if (locus_ptr
!= NULL
)
1989 override_filename
= LOCATION_FILE (*locus_ptr
);
1990 override_linenum
= LOCATION_LINE (*locus_ptr
);
1994 override_filename
= NULL
;
1995 override_linenum
= 0;
2000 case NOTE_INSN_DELETED_LABEL
:
2001 /* Emit the label. We may have deleted the CODE_LABEL because
2002 the label could be proved to be unreachable, though still
2003 referenced (in the form of having its address taken. */
2004 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2007 case NOTE_INSN_VAR_LOCATION
:
2008 if (!DECL_IGNORED_P (current_function_decl
))
2009 debug_hooks
->var_location (insn
);
2019 if (dwarf2out_do_frame ())
2020 dwarf2out_frame_debug (insn
, false);
2024 /* The target port might emit labels in the output function for
2025 some insn, e.g. sh.c output_branchy_insn. */
2026 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
2028 int align
= LABEL_TO_ALIGNMENT (insn
);
2029 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2030 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
2033 if (align
&& NEXT_INSN (insn
))
2035 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2036 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
2038 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2039 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
2041 ASM_OUTPUT_ALIGN (file
, align
);
2048 if (!DECL_IGNORED_P (current_function_decl
) && LABEL_NAME (insn
))
2049 debug_hooks
->label (insn
);
2053 next
= next_nonnote_insn (insn
);
2054 /* If this label is followed by a jump-table, make sure we put
2055 the label in the read-only section. Also possibly write the
2056 label and jump table together. */
2057 if (next
!= 0 && JUMP_TABLE_DATA_P (next
))
2059 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2060 /* In this case, the case vector is being moved by the
2061 target, so don't output the label at all. Leave that
2062 to the back end macros. */
2064 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2068 switch_to_section (targetm
.asm_out
.function_rodata_section
2069 (current_function_decl
));
2071 #ifdef ADDR_VEC_ALIGN
2072 log_align
= ADDR_VEC_ALIGN (next
);
2074 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2076 ASM_OUTPUT_ALIGN (file
, log_align
);
2079 switch_to_section (current_function_section ());
2081 #ifdef ASM_OUTPUT_CASE_LABEL
2082 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2085 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
2090 if (LABEL_ALT_ENTRY_P (insn
))
2091 output_alternate_entry_point (file
, insn
);
2093 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
2098 rtx body
= PATTERN (insn
);
2099 int insn_code_number
;
2103 /* Reset this early so it is correct for ASM statements. */
2104 current_insn_predicate
= NULL_RTX
;
2106 /* An INSN, JUMP_INSN or CALL_INSN.
2107 First check for special kinds that recog doesn't recognize. */
2109 if (GET_CODE (body
) == USE
/* These are just declarations. */
2110 || GET_CODE (body
) == CLOBBER
)
2115 /* If there is a REG_CC_SETTER note on this insn, it means that
2116 the setting of the condition code was done in the delay slot
2117 of the insn that branched here. So recover the cc status
2118 from the insn that set it. */
2120 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2123 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2124 cc_prev_status
= cc_status
;
2129 /* Detect insns that are really jump-tables
2130 and output them as such. */
2132 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2134 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2138 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2139 switch_to_section (targetm
.asm_out
.function_rodata_section
2140 (current_function_decl
));
2142 switch_to_section (current_function_section ());
2146 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2147 if (GET_CODE (body
) == ADDR_VEC
)
2149 #ifdef ASM_OUTPUT_ADDR_VEC
2150 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2157 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2158 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2164 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2165 for (idx
= 0; idx
< vlen
; idx
++)
2167 if (GET_CODE (body
) == ADDR_VEC
)
2169 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2170 ASM_OUTPUT_ADDR_VEC_ELT
2171 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2178 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2179 ASM_OUTPUT_ADDR_DIFF_ELT
2182 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2183 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2189 #ifdef ASM_OUTPUT_CASE_END
2190 ASM_OUTPUT_CASE_END (file
,
2191 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2196 switch_to_section (current_function_section ());
2200 /* Output this line note if it is the first or the last line
2202 if (!DECL_IGNORED_P (current_function_decl
)
2203 && notice_source_line (insn
, &is_stmt
))
2204 (*debug_hooks
->source_line
) (last_linenum
, last_filename
,
2205 last_discriminator
, is_stmt
);
2207 if (GET_CODE (body
) == ASM_INPUT
)
2209 const char *string
= XSTR (body
, 0);
2211 /* There's no telling what that did to the condition codes. */
2216 expanded_location loc
;
2219 loc
= expand_location (ASM_INPUT_SOURCE_LOCATION (body
));
2220 if (*loc
.file
&& loc
.line
)
2221 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2222 ASM_COMMENT_START
, loc
.line
, loc
.file
);
2223 fprintf (asm_out_file
, "\t%s\n", string
);
2224 #if HAVE_AS_LINE_ZERO
2225 if (*loc
.file
&& loc
.line
)
2226 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2232 /* Detect `asm' construct with operands. */
2233 if (asm_noperands (body
) >= 0)
2235 unsigned int noperands
= asm_noperands (body
);
2236 rtx
*ops
= XALLOCAVEC (rtx
, noperands
);
2239 expanded_location expanded
;
2241 /* There's no telling what that did to the condition codes. */
2244 /* Get out the operand values. */
2245 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
, &loc
);
2246 /* Inhibit dying on what would otherwise be compiler bugs. */
2247 insn_noperands
= noperands
;
2248 this_is_asm_operands
= insn
;
2249 expanded
= expand_location (loc
);
2251 #ifdef FINAL_PRESCAN_INSN
2252 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2255 /* Output the insn using them. */
2259 if (expanded
.file
&& expanded
.line
)
2260 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2261 ASM_COMMENT_START
, expanded
.line
, expanded
.file
);
2262 output_asm_insn (string
, ops
);
2263 #if HAVE_AS_LINE_ZERO
2264 if (expanded
.file
&& expanded
.line
)
2265 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2269 if (targetm
.asm_out
.final_postscan_insn
)
2270 targetm
.asm_out
.final_postscan_insn (file
, insn
, ops
,
2273 this_is_asm_operands
= 0;
2279 if (GET_CODE (body
) == SEQUENCE
)
2281 /* A delayed-branch sequence */
2284 final_sequence
= body
;
2286 /* Record the delay slots' frame information before the branch.
2287 This is needed for delayed calls: see execute_cfa_program(). */
2288 if (dwarf2out_do_frame ())
2289 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2290 dwarf2out_frame_debug (XVECEXP (body
, 0, i
), false);
2292 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2293 force the restoration of a comparison that was previously
2294 thought unnecessary. If that happens, cancel this sequence
2295 and cause that insn to be restored. */
2297 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, 1, seen
);
2298 if (next
!= XVECEXP (body
, 0, 1))
2304 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2306 rtx insn
= XVECEXP (body
, 0, i
);
2307 rtx next
= NEXT_INSN (insn
);
2308 /* We loop in case any instruction in a delay slot gets
2311 insn
= final_scan_insn (insn
, file
, 0, 1, seen
);
2312 while (insn
!= next
);
2314 #ifdef DBR_OUTPUT_SEQEND
2315 DBR_OUTPUT_SEQEND (file
);
2319 /* If the insn requiring the delay slot was a CALL_INSN, the
2320 insns in the delay slot are actually executed before the
2321 called function. Hence we don't preserve any CC-setting
2322 actions in these insns and the CC must be marked as being
2323 clobbered by the function. */
2324 if (CALL_P (XVECEXP (body
, 0, 0)))
2331 /* We have a real machine instruction as rtl. */
2333 body
= PATTERN (insn
);
2336 set
= single_set (insn
);
2338 /* Check for redundant test and compare instructions
2339 (when the condition codes are already set up as desired).
2340 This is done only when optimizing; if not optimizing,
2341 it should be possible for the user to alter a variable
2342 with the debugger in between statements
2343 and the next statement should reexamine the variable
2344 to compute the condition codes. */
2349 && GET_CODE (SET_DEST (set
)) == CC0
2350 && insn
!= last_ignored_compare
)
2353 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2354 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2356 src1
= SET_SRC (set
);
2358 if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2360 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2361 XEXP (SET_SRC (set
), 0)
2362 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2363 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2364 XEXP (SET_SRC (set
), 1)
2365 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2366 if (XEXP (SET_SRC (set
), 1)
2367 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set
), 0))))
2368 src2
= XEXP (SET_SRC (set
), 0);
2370 if ((cc_status
.value1
!= 0
2371 && rtx_equal_p (src1
, cc_status
.value1
))
2372 || (cc_status
.value2
!= 0
2373 && rtx_equal_p (src1
, cc_status
.value2
))
2374 || (src2
!= 0 && cc_status
.value1
!= 0
2375 && rtx_equal_p (src2
, cc_status
.value1
))
2376 || (src2
!= 0 && cc_status
.value2
!= 0
2377 && rtx_equal_p (src2
, cc_status
.value2
)))
2379 /* Don't delete insn if it has an addressing side-effect. */
2380 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2381 /* or if anything in it is volatile. */
2382 && ! volatile_refs_p (PATTERN (insn
)))
2384 /* We don't really delete the insn; just ignore it. */
2385 last_ignored_compare
= insn
;
2392 /* If this is a conditional branch, maybe modify it
2393 if the cc's are in a nonstandard state
2394 so that it accomplishes the same thing that it would
2395 do straightforwardly if the cc's were set up normally. */
2397 if (cc_status
.flags
!= 0
2399 && GET_CODE (body
) == SET
2400 && SET_DEST (body
) == pc_rtx
2401 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2402 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2403 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
)
2405 /* This function may alter the contents of its argument
2406 and clear some of the cc_status.flags bits.
2407 It may also return 1 meaning condition now always true
2408 or -1 meaning condition now always false
2409 or 2 meaning condition nontrivial but altered. */
2410 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2411 /* If condition now has fixed value, replace the IF_THEN_ELSE
2412 with its then-operand or its else-operand. */
2414 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2416 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2418 /* The jump is now either unconditional or a no-op.
2419 If it has become a no-op, don't try to output it.
2420 (It would not be recognized.) */
2421 if (SET_SRC (body
) == pc_rtx
)
2426 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2427 /* Replace (set (pc) (return)) with (return). */
2428 PATTERN (insn
) = body
= SET_SRC (body
);
2430 /* Rerecognize the instruction if it has changed. */
2432 INSN_CODE (insn
) = -1;
2435 /* If this is a conditional trap, maybe modify it if the cc's
2436 are in a nonstandard state so that it accomplishes the same
2437 thing that it would do straightforwardly if the cc's were
2439 if (cc_status
.flags
!= 0
2440 && NONJUMP_INSN_P (insn
)
2441 && GET_CODE (body
) == TRAP_IF
2442 && COMPARISON_P (TRAP_CONDITION (body
))
2443 && XEXP (TRAP_CONDITION (body
), 0) == cc0_rtx
)
2445 /* This function may alter the contents of its argument
2446 and clear some of the cc_status.flags bits.
2447 It may also return 1 meaning condition now always true
2448 or -1 meaning condition now always false
2449 or 2 meaning condition nontrivial but altered. */
2450 int result
= alter_cond (TRAP_CONDITION (body
));
2452 /* If TRAP_CONDITION has become always false, delete the
2460 /* If TRAP_CONDITION has become always true, replace
2461 TRAP_CONDITION with const_true_rtx. */
2463 TRAP_CONDITION (body
) = const_true_rtx
;
2465 /* Rerecognize the instruction if it has changed. */
2467 INSN_CODE (insn
) = -1;
2470 /* Make same adjustments to instructions that examine the
2471 condition codes without jumping and instructions that
2472 handle conditional moves (if this machine has either one). */
2474 if (cc_status
.flags
!= 0
2477 rtx cond_rtx
, then_rtx
, else_rtx
;
2480 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2482 cond_rtx
= XEXP (SET_SRC (set
), 0);
2483 then_rtx
= XEXP (SET_SRC (set
), 1);
2484 else_rtx
= XEXP (SET_SRC (set
), 2);
2488 cond_rtx
= SET_SRC (set
);
2489 then_rtx
= const_true_rtx
;
2490 else_rtx
= const0_rtx
;
2493 switch (GET_CODE (cond_rtx
))
2507 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2509 result
= alter_cond (cond_rtx
);
2511 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2512 else if (result
== -1)
2513 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2514 else if (result
== 2)
2515 INSN_CODE (insn
) = -1;
2516 if (SET_DEST (set
) == SET_SRC (set
))
2528 #ifdef HAVE_peephole
2529 /* Do machine-specific peephole optimizations if desired. */
2531 if (optimize_p
&& !flag_no_peephole
&& !nopeepholes
)
2533 rtx next
= peephole (insn
);
2534 /* When peepholing, if there were notes within the peephole,
2535 emit them before the peephole. */
2536 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2538 rtx note
, prev
= PREV_INSN (insn
);
2540 for (note
= NEXT_INSN (insn
); note
!= next
;
2541 note
= NEXT_INSN (note
))
2542 final_scan_insn (note
, file
, optimize_p
, nopeepholes
, seen
);
2544 /* Put the notes in the proper position for a later
2545 rescan. For example, the SH target can do this
2546 when generating a far jump in a delayed branch
2548 note
= NEXT_INSN (insn
);
2549 PREV_INSN (note
) = prev
;
2550 NEXT_INSN (prev
) = note
;
2551 NEXT_INSN (PREV_INSN (next
)) = insn
;
2552 PREV_INSN (insn
) = PREV_INSN (next
);
2553 NEXT_INSN (insn
) = next
;
2554 PREV_INSN (next
) = insn
;
2557 /* PEEPHOLE might have changed this. */
2558 body
= PATTERN (insn
);
2562 /* Try to recognize the instruction.
2563 If successful, verify that the operands satisfy the
2564 constraints for the instruction. Crash if they don't,
2565 since `reload' should have changed them so that they do. */
2567 insn_code_number
= recog_memoized (insn
);
2568 cleanup_subreg_operands (insn
);
2570 /* Dump the insn in the assembly for debugging. */
2571 if (flag_dump_rtl_in_asm
)
2573 print_rtx_head
= ASM_COMMENT_START
;
2574 print_rtl_single (asm_out_file
, insn
);
2575 print_rtx_head
= "";
2578 if (! constrain_operands_cached (1))
2579 fatal_insn_not_found (insn
);
2581 /* Some target machines need to prescan each insn before
2584 #ifdef FINAL_PRESCAN_INSN
2585 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2588 if (targetm
.have_conditional_execution ()
2589 && GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2590 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2593 cc_prev_status
= cc_status
;
2595 /* Update `cc_status' for this instruction.
2596 The instruction's output routine may change it further.
2597 If the output routine for a jump insn needs to depend
2598 on the cc status, it should look at cc_prev_status. */
2600 NOTICE_UPDATE_CC (body
, insn
);
2603 current_output_insn
= debug_insn
= insn
;
2605 if (CALL_P (insn
) && dwarf2out_do_frame ())
2606 dwarf2out_frame_debug (insn
, false);
2608 /* Find the proper template for this insn. */
2609 templ
= get_insn_template (insn_code_number
, insn
);
2611 /* If the C code returns 0, it means that it is a jump insn
2612 which follows a deleted test insn, and that test insn
2613 needs to be reinserted. */
2618 gcc_assert (prev_nonnote_insn (insn
) == last_ignored_compare
);
2620 /* We have already processed the notes between the setter and
2621 the user. Make sure we don't process them again, this is
2622 particularly important if one of the notes is a block
2623 scope note or an EH note. */
2625 prev
!= last_ignored_compare
;
2626 prev
= PREV_INSN (prev
))
2629 delete_insn (prev
); /* Use delete_note. */
2635 /* If the template is the string "#", it means that this insn must
2637 if (templ
[0] == '#' && templ
[1] == '\0')
2639 rtx new_rtx
= try_split (body
, insn
, 0);
2641 /* If we didn't split the insn, go away. */
2642 if (new_rtx
== insn
&& PATTERN (new_rtx
) == body
)
2643 fatal_insn ("could not split insn", insn
);
2645 #ifdef HAVE_ATTR_length
2646 /* This instruction should have been split in shorten_branches,
2647 to ensure that we would have valid length info for the
2655 /* ??? This will put the directives in the wrong place if
2656 get_insn_template outputs assembly directly. However calling it
2657 before get_insn_template breaks if the insns is split. */
2658 if (targetm
.asm_out
.unwind_emit_before_insn
2659 && targetm
.asm_out
.unwind_emit
)
2660 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2664 rtx x
= call_from_call_insn (insn
);
2666 if (x
&& MEM_P (x
) && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
2670 t
= SYMBOL_REF_DECL (x
);
2672 assemble_external (t
);
2676 /* Output assembler code from the template. */
2677 output_asm_insn (templ
, recog_data
.operand
);
2679 /* Record point-of-call information for ICF debugging. */
2680 if (flag_enable_icf_debug
&& CALL_P (insn
))
2682 rtx x
= call_from_call_insn (insn
);
2686 if (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
2690 t
= SYMBOL_REF_DECL (x
);
2692 (*debug_hooks
->direct_call
) (t
);
2695 (*debug_hooks
->virtual_call
) (INSN_UID (insn
));
2699 /* Some target machines need to postscan each insn after
2701 if (targetm
.asm_out
.final_postscan_insn
)
2702 targetm
.asm_out
.final_postscan_insn (file
, insn
, recog_data
.operand
,
2703 recog_data
.n_operands
);
2705 /* If necessary, report the effect that the instruction has on
2706 the unwind info. We've already done this for delay slots
2707 and call instructions. */
2708 if (final_sequence
== 0
2709 #if !defined (HAVE_prologue)
2710 && !ACCUMULATE_OUTGOING_ARGS
2712 && dwarf2out_do_frame ())
2713 dwarf2out_frame_debug (insn
, true);
2715 if (!targetm
.asm_out
.unwind_emit_before_insn
2716 && targetm
.asm_out
.unwind_emit
)
2717 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2719 current_output_insn
= debug_insn
= 0;
2722 return NEXT_INSN (insn
);
2725 /* Return whether a source line note needs to be emitted before INSN.
2726 Sets IS_STMT to TRUE if the line should be marked as a possible
2727 breakpoint location. */
2730 notice_source_line (rtx insn
, bool *is_stmt
)
2732 const char *filename
;
2735 if (override_filename
)
2737 filename
= override_filename
;
2738 linenum
= override_linenum
;
2742 filename
= insn_file (insn
);
2743 linenum
= insn_line (insn
);
2746 if (filename
== NULL
)
2749 if (force_source_line
2750 || filename
!= last_filename
2751 || last_linenum
!= linenum
)
2753 force_source_line
= false;
2754 last_filename
= filename
;
2755 last_linenum
= linenum
;
2756 last_discriminator
= discriminator
;
2758 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2759 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2763 if (SUPPORTS_DISCRIMINATOR
&& last_discriminator
!= discriminator
)
2765 /* If the discriminator changed, but the line number did not,
2766 output the line table entry with is_stmt false so the
2767 debugger does not treat this as a breakpoint location. */
2768 last_discriminator
= discriminator
;
2776 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2777 directly to the desired hard register. */
2780 cleanup_subreg_operands (rtx insn
)
2783 bool changed
= false;
2784 extract_insn_cached (insn
);
2785 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2787 /* The following test cannot use recog_data.operand when testing
2788 for a SUBREG: the underlying object might have been changed
2789 already if we are inside a match_operator expression that
2790 matches the else clause. Instead we test the underlying
2791 expression directly. */
2792 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2794 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2797 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2798 || GET_CODE (recog_data
.operand
[i
]) == MULT
2799 || MEM_P (recog_data
.operand
[i
]))
2800 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
], &changed
);
2803 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2805 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2807 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2810 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2811 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2812 || MEM_P (*recog_data
.dup_loc
[i
]))
2813 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
], &changed
);
2816 df_insn_rescan (insn
);
2819 /* If X is a SUBREG, replace it with a REG or a MEM,
2820 based on the thing it is a subreg of. */
2823 alter_subreg (rtx
*xp
)
2826 rtx y
= SUBREG_REG (x
);
2828 /* simplify_subreg does not remove subreg from volatile references.
2829 We are required to. */
2832 int offset
= SUBREG_BYTE (x
);
2834 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2835 contains 0 instead of the proper offset. See simplify_subreg. */
2837 && GET_MODE_SIZE (GET_MODE (y
)) < GET_MODE_SIZE (GET_MODE (x
)))
2839 int difference
= GET_MODE_SIZE (GET_MODE (y
))
2840 - GET_MODE_SIZE (GET_MODE (x
));
2841 if (WORDS_BIG_ENDIAN
)
2842 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
2843 if (BYTES_BIG_ENDIAN
)
2844 offset
+= difference
% UNITS_PER_WORD
;
2847 *xp
= adjust_address (y
, GET_MODE (x
), offset
);
2851 rtx new_rtx
= simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2858 /* Simplify_subreg can't handle some REG cases, but we have to. */
2860 HOST_WIDE_INT offset
;
2862 regno
= subreg_regno (x
);
2863 if (subreg_lowpart_p (x
))
2864 offset
= byte_lowpart_offset (GET_MODE (x
), GET_MODE (y
));
2866 offset
= SUBREG_BYTE (x
);
2867 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, offset
);
2874 /* Do alter_subreg on all the SUBREGs contained in X. */
2877 walk_alter_subreg (rtx
*xp
, bool *changed
)
2880 switch (GET_CODE (x
))
2885 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2886 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1), changed
);
2891 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2896 return alter_subreg (xp
);
2907 /* Given BODY, the body of a jump instruction, alter the jump condition
2908 as required by the bits that are set in cc_status.flags.
2909 Not all of the bits there can be handled at this level in all cases.
2911 The value is normally 0.
2912 1 means that the condition has become always true.
2913 -1 means that the condition has become always false.
2914 2 means that COND has been altered. */
2917 alter_cond (rtx cond
)
2921 if (cc_status
.flags
& CC_REVERSED
)
2924 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2927 if (cc_status
.flags
& CC_INVERTED
)
2930 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2933 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2934 switch (GET_CODE (cond
))
2939 /* Jump becomes unconditional. */
2945 /* Jump becomes no-op. */
2949 PUT_CODE (cond
, EQ
);
2954 PUT_CODE (cond
, NE
);
2962 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2963 switch (GET_CODE (cond
))
2967 /* Jump becomes unconditional. */
2972 /* Jump becomes no-op. */
2977 PUT_CODE (cond
, EQ
);
2983 PUT_CODE (cond
, NE
);
2991 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2992 switch (GET_CODE (cond
))
2995 /* Jump becomes unconditional. */
2999 PUT_CODE (cond
, EQ
);
3004 PUT_CODE (cond
, NE
);
3009 /* Jump becomes no-op. */
3016 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
3017 switch (GET_CODE (cond
))
3023 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
3028 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
3033 if (cc_status
.flags
& CC_NOT_SIGNED
)
3034 /* The flags are valid if signed condition operators are converted
3036 switch (GET_CODE (cond
))
3039 PUT_CODE (cond
, LEU
);
3044 PUT_CODE (cond
, LTU
);
3049 PUT_CODE (cond
, GTU
);
3054 PUT_CODE (cond
, GEU
);
3066 /* Report inconsistency between the assembler template and the operands.
3067 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3070 output_operand_lossage (const char *cmsgid
, ...)
3074 const char *pfx_str
;
3077 va_start (ap
, cmsgid
);
3079 pfx_str
= this_is_asm_operands
? _("invalid 'asm': ") : "output_operand: ";
3080 asprintf (&fmt_string
, "%s%s", pfx_str
, _(cmsgid
));
3081 vasprintf (&new_message
, fmt_string
, ap
);
3083 if (this_is_asm_operands
)
3084 error_for_asm (this_is_asm_operands
, "%s", new_message
);
3086 internal_error ("%s", new_message
);
3093 /* Output of assembler code from a template, and its subroutines. */
3095 /* Annotate the assembly with a comment describing the pattern and
3096 alternative used. */
3099 output_asm_name (void)
3103 int num
= INSN_CODE (debug_insn
);
3104 fprintf (asm_out_file
, "\t%s %d\t%s",
3105 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3106 insn_data
[num
].name
);
3107 if (insn_data
[num
].n_alternatives
> 1)
3108 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3109 #ifdef HAVE_ATTR_length
3110 fprintf (asm_out_file
, "\t[length = %d]",
3111 get_attr_length (debug_insn
));
3113 /* Clear this so only the first assembler insn
3114 of any rtl insn will get the special comment for -dp. */
3119 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3120 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3121 corresponds to the address of the object and 0 if to the object. */
3124 get_mem_expr_from_op (rtx op
, int *paddressp
)
3132 return REG_EXPR (op
);
3133 else if (!MEM_P (op
))
3136 if (MEM_EXPR (op
) != 0)
3137 return MEM_EXPR (op
);
3139 /* Otherwise we have an address, so indicate it and look at the address. */
3143 /* First check if we have a decl for the address, then look at the right side
3144 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3145 But don't allow the address to itself be indirect. */
3146 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3148 else if (GET_CODE (op
) == PLUS
3149 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3153 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
3156 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3157 return inner_addressp
? 0 : expr
;
3160 /* Output operand names for assembler instructions. OPERANDS is the
3161 operand vector, OPORDER is the order to write the operands, and NOPS
3162 is the number of operands to write. */
3165 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
3170 for (i
= 0; i
< nops
; i
++)
3173 rtx op
= operands
[oporder
[i
]];
3174 tree expr
= get_mem_expr_from_op (op
, &addressp
);
3176 fprintf (asm_out_file
, "%c%s",
3177 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
3181 fprintf (asm_out_file
, "%s",
3182 addressp
? "*" : "");
3183 print_mem_expr (asm_out_file
, expr
);
3186 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
3187 && ORIGINAL_REGNO (op
) != REGNO (op
))
3188 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
3192 /* Output text from TEMPLATE to the assembler output file,
3193 obeying %-directions to substitute operands taken from
3194 the vector OPERANDS.
3196 %N (for N a digit) means print operand N in usual manner.
3197 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3198 and print the label name with no punctuation.
3199 %cN means require operand N to be a constant
3200 and print the constant expression with no punctuation.
3201 %aN means expect operand N to be a memory address
3202 (not a memory reference!) and print a reference
3204 %nN means expect operand N to be a constant
3205 and print a constant expression for minus the value
3206 of the operand, with no other punctuation. */
3209 output_asm_insn (const char *templ
, rtx
*operands
)
3213 #ifdef ASSEMBLER_DIALECT
3216 int oporder
[MAX_RECOG_OPERANDS
];
3217 char opoutput
[MAX_RECOG_OPERANDS
];
3220 /* An insn may return a null string template
3221 in a case where no assembler code is needed. */
3225 memset (opoutput
, 0, sizeof opoutput
);
3227 putc ('\t', asm_out_file
);
3229 #ifdef ASM_OUTPUT_OPCODE
3230 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3237 if (flag_verbose_asm
)
3238 output_asm_operand_names (operands
, oporder
, ops
);
3239 if (flag_print_asm_name
)
3243 memset (opoutput
, 0, sizeof opoutput
);
3245 putc (c
, asm_out_file
);
3246 #ifdef ASM_OUTPUT_OPCODE
3247 while ((c
= *p
) == '\t')
3249 putc (c
, asm_out_file
);
3252 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3256 #ifdef ASSEMBLER_DIALECT
3262 output_operand_lossage ("nested assembly dialect alternatives");
3266 /* If we want the first dialect, do nothing. Otherwise, skip
3267 DIALECT_NUMBER of strings ending with '|'. */
3268 for (i
= 0; i
< dialect_number
; i
++)
3270 while (*p
&& *p
!= '}' && *p
++ != '|')
3279 output_operand_lossage ("unterminated assembly dialect alternative");
3286 /* Skip to close brace. */
3291 output_operand_lossage ("unterminated assembly dialect alternative");
3295 while (*p
++ != '}');
3299 putc (c
, asm_out_file
);
3304 putc (c
, asm_out_file
);
3310 /* %% outputs a single %. */
3314 putc (c
, asm_out_file
);
3316 /* %= outputs a number which is unique to each insn in the entire
3317 compilation. This is useful for making local labels that are
3318 referred to more than once in a given insn. */
3322 fprintf (asm_out_file
, "%d", insn_counter
);
3324 /* % followed by a letter and some digits
3325 outputs an operand in a special way depending on the letter.
3326 Letters `acln' are implemented directly.
3327 Other letters are passed to `output_operand' so that
3328 the TARGET_PRINT_OPERAND hook can define them. */
3329 else if (ISALPHA (*p
))
3332 unsigned long opnum
;
3335 opnum
= strtoul (p
, &endptr
, 10);
3338 output_operand_lossage ("operand number missing "
3340 else if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3341 output_operand_lossage ("operand number out of range");
3342 else if (letter
== 'l')
3343 output_asm_label (operands
[opnum
]);
3344 else if (letter
== 'a')
3345 output_address (operands
[opnum
]);
3346 else if (letter
== 'c')
3348 if (CONSTANT_ADDRESS_P (operands
[opnum
]))
3349 output_addr_const (asm_out_file
, operands
[opnum
]);
3351 output_operand (operands
[opnum
], 'c');
3353 else if (letter
== 'n')
3355 if (CONST_INT_P (operands
[opnum
]))
3356 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3357 - INTVAL (operands
[opnum
]));
3360 putc ('-', asm_out_file
);
3361 output_addr_const (asm_out_file
, operands
[opnum
]);
3365 output_operand (operands
[opnum
], letter
);
3367 if (!opoutput
[opnum
])
3368 oporder
[ops
++] = opnum
;
3369 opoutput
[opnum
] = 1;
3374 /* % followed by a digit outputs an operand the default way. */
3375 else if (ISDIGIT (*p
))
3377 unsigned long opnum
;
3380 opnum
= strtoul (p
, &endptr
, 10);
3381 if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3382 output_operand_lossage ("operand number out of range");
3384 output_operand (operands
[opnum
], 0);
3386 if (!opoutput
[opnum
])
3387 oporder
[ops
++] = opnum
;
3388 opoutput
[opnum
] = 1;
3393 /* % followed by punctuation: output something for that
3394 punctuation character alone, with no operand. The
3395 TARGET_PRINT_OPERAND hook decides what is actually done. */
3396 else if (targetm
.asm_out
.print_operand_punct_valid_p ((unsigned char) *p
))
3397 output_operand (NULL_RTX
, *p
++);
3399 output_operand_lossage ("invalid %%-code");
3403 putc (c
, asm_out_file
);
3406 /* Write out the variable names for operands, if we know them. */
3407 if (flag_verbose_asm
)
3408 output_asm_operand_names (operands
, oporder
, ops
);
3409 if (flag_print_asm_name
)
3412 putc ('\n', asm_out_file
);
3415 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3418 output_asm_label (rtx x
)
3422 if (GET_CODE (x
) == LABEL_REF
)
3426 && NOTE_KIND (x
) == NOTE_INSN_DELETED_LABEL
))
3427 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3429 output_operand_lossage ("'%%l' operand isn't a label");
3431 assemble_name (asm_out_file
, buf
);
3434 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3435 output_operand. Marks SYMBOL_REFs as referenced through use of
3436 assemble_external. */
3439 mark_symbol_ref_as_used (rtx
*xp
, void *dummy ATTRIBUTE_UNUSED
)
3443 /* If we have a used symbol, we may have to emit assembly
3444 annotations corresponding to whether the symbol is external, weak
3445 or has non-default visibility. */
3446 if (GET_CODE (x
) == SYMBOL_REF
)
3450 t
= SYMBOL_REF_DECL (x
);
3452 assemble_external (t
);
3460 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3463 mark_symbol_refs_as_used (rtx x
)
3465 for_each_rtx (&x
, mark_symbol_ref_as_used
, NULL
);
3468 /* Print operand X using machine-dependent assembler syntax.
3469 CODE is a non-digit that preceded the operand-number in the % spec,
3470 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3471 between the % and the digits.
3472 When CODE is a non-letter, X is 0.
3474 The meanings of the letters are machine-dependent and controlled
3475 by TARGET_PRINT_OPERAND. */
3478 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3480 if (x
&& GET_CODE (x
) == SUBREG
)
3481 x
= alter_subreg (&x
);
3483 /* X must not be a pseudo reg. */
3484 gcc_assert (!x
|| !REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
);
3486 targetm
.asm_out
.print_operand (asm_out_file
, x
, code
);
3491 for_each_rtx (&x
, mark_symbol_ref_as_used
, NULL
);
3494 /* Print a memory reference operand for address X using
3495 machine-dependent assembler syntax. */
3498 output_address (rtx x
)
3500 bool changed
= false;
3501 walk_alter_subreg (&x
, &changed
);
3502 targetm
.asm_out
.print_operand_address (asm_out_file
, x
);
3505 /* Print an integer constant expression in assembler syntax.
3506 Addition and subtraction are the only arithmetic
3507 that may appear in these expressions. */
3510 output_addr_const (FILE *file
, rtx x
)
3515 switch (GET_CODE (x
))
3522 if (SYMBOL_REF_DECL (x
))
3523 assemble_external (SYMBOL_REF_DECL (x
));
3524 #ifdef ASM_OUTPUT_SYMBOL_REF
3525 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3527 assemble_name (file
, XSTR (x
, 0));
3535 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3536 #ifdef ASM_OUTPUT_LABEL_REF
3537 ASM_OUTPUT_LABEL_REF (file
, buf
);
3539 assemble_name (file
, buf
);
3544 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3548 /* This used to output parentheses around the expression,
3549 but that does not work on the 386 (either ATT or BSD assembler). */
3550 output_addr_const (file
, XEXP (x
, 0));
3554 if (GET_MODE (x
) == VOIDmode
)
3556 /* We can use %d if the number is one word and positive. */
3557 if (CONST_DOUBLE_HIGH (x
))
3558 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3559 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_HIGH (x
),
3560 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (x
));
3561 else if (CONST_DOUBLE_LOW (x
) < 0)
3562 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
3563 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (x
));
3565 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3568 /* We can't handle floating point constants;
3569 PRINT_OPERAND must handle them. */
3570 output_operand_lossage ("floating constant misused");
3574 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
3575 (unsigned HOST_WIDE_INT
) CONST_FIXED_VALUE_LOW (x
));
3579 /* Some assemblers need integer constants to appear last (eg masm). */
3580 if (CONST_INT_P (XEXP (x
, 0)))
3582 output_addr_const (file
, XEXP (x
, 1));
3583 if (INTVAL (XEXP (x
, 0)) >= 0)
3584 fprintf (file
, "+");
3585 output_addr_const (file
, XEXP (x
, 0));
3589 output_addr_const (file
, XEXP (x
, 0));
3590 if (!CONST_INT_P (XEXP (x
, 1))
3591 || INTVAL (XEXP (x
, 1)) >= 0)
3592 fprintf (file
, "+");
3593 output_addr_const (file
, XEXP (x
, 1));
3598 /* Avoid outputting things like x-x or x+5-x,
3599 since some assemblers can't handle that. */
3600 x
= simplify_subtraction (x
);
3601 if (GET_CODE (x
) != MINUS
)
3604 output_addr_const (file
, XEXP (x
, 0));
3605 fprintf (file
, "-");
3606 if ((CONST_INT_P (XEXP (x
, 1)) && INTVAL (XEXP (x
, 1)) >= 0)
3607 || GET_CODE (XEXP (x
, 1)) == PC
3608 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3609 output_addr_const (file
, XEXP (x
, 1));
3612 fputs (targetm
.asm_out
.open_paren
, file
);
3613 output_addr_const (file
, XEXP (x
, 1));
3614 fputs (targetm
.asm_out
.close_paren
, file
);
3622 output_addr_const (file
, XEXP (x
, 0));
3626 if (targetm
.asm_out
.output_addr_const_extra (file
, x
))
3629 output_operand_lossage ("invalid expression as operand");
3633 /* Output a quoted string. */
3636 output_quoted_string (FILE *asm_file
, const char *string
)
3638 #ifdef OUTPUT_QUOTED_STRING
3639 OUTPUT_QUOTED_STRING (asm_file
, string
);
3643 putc ('\"', asm_file
);
3644 while ((c
= *string
++) != 0)
3648 if (c
== '\"' || c
== '\\')
3649 putc ('\\', asm_file
);
3653 fprintf (asm_file
, "\\%03o", (unsigned char) c
);
3655 putc ('\"', asm_file
);
3659 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3660 %R prints the value of REGISTER_PREFIX.
3661 %L prints the value of LOCAL_LABEL_PREFIX.
3662 %U prints the value of USER_LABEL_PREFIX.
3663 %I prints the value of IMMEDIATE_PREFIX.
3664 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3665 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3667 We handle alternate assembler dialects here, just like output_asm_insn. */
3670 asm_fprintf (FILE *file
, const char *p
, ...)
3676 va_start (argptr
, p
);
3683 #ifdef ASSEMBLER_DIALECT
3688 /* If we want the first dialect, do nothing. Otherwise, skip
3689 DIALECT_NUMBER of strings ending with '|'. */
3690 for (i
= 0; i
< dialect_number
; i
++)
3692 while (*p
&& *p
++ != '|')
3702 /* Skip to close brace. */
3703 while (*p
&& *p
++ != '}')
3714 while (strchr ("-+ #0", c
))
3719 while (ISDIGIT (c
) || c
== '.')
3730 case 'd': case 'i': case 'u':
3731 case 'x': case 'X': case 'o':
3735 fprintf (file
, buf
, va_arg (argptr
, int));
3739 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3740 'o' cases, but we do not check for those cases. It
3741 means that the value is a HOST_WIDE_INT, which may be
3742 either `long' or `long long'. */
3743 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3744 q
+= strlen (HOST_WIDE_INT_PRINT
);
3747 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3752 #ifdef HAVE_LONG_LONG
3758 fprintf (file
, buf
, va_arg (argptr
, long long));
3765 fprintf (file
, buf
, va_arg (argptr
, long));
3773 fprintf (file
, buf
, va_arg (argptr
, char *));
3777 #ifdef ASM_OUTPUT_OPCODE
3778 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3783 #ifdef REGISTER_PREFIX
3784 fprintf (file
, "%s", REGISTER_PREFIX
);
3789 #ifdef IMMEDIATE_PREFIX
3790 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3795 #ifdef LOCAL_LABEL_PREFIX
3796 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3801 fputs (user_label_prefix
, file
);
3804 #ifdef ASM_FPRINTF_EXTENSIONS
3805 /* Uppercase letters are reserved for general use by asm_fprintf
3806 and so are not available to target specific code. In order to
3807 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3808 they are defined here. As they get turned into real extensions
3809 to asm_fprintf they should be removed from this list. */
3810 case 'A': case 'B': case 'C': case 'D': case 'E':
3811 case 'F': case 'G': case 'H': case 'J': case 'K':
3812 case 'M': case 'N': case 'P': case 'Q': case 'S':
3813 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3816 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3829 /* Split up a CONST_DOUBLE or integer constant rtx
3830 into two rtx's for single words,
3831 storing in *FIRST the word that comes first in memory in the target
3832 and in *SECOND the other. */
3835 split_double (rtx value
, rtx
*first
, rtx
*second
)
3837 if (CONST_INT_P (value
))
3839 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3841 /* In this case the CONST_INT holds both target words.
3842 Extract the bits from it into two word-sized pieces.
3843 Sign extend each half to HOST_WIDE_INT. */
3844 unsigned HOST_WIDE_INT low
, high
;
3845 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3846 unsigned bits_per_word
= BITS_PER_WORD
;
3848 /* Set sign_bit to the most significant bit of a word. */
3850 sign_bit
<<= bits_per_word
- 1;
3852 /* Set mask so that all bits of the word are set. We could
3853 have used 1 << BITS_PER_WORD instead of basing the
3854 calculation on sign_bit. However, on machines where
3855 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3856 compiler warning, even though the code would never be
3858 mask
= sign_bit
<< 1;
3861 /* Set sign_extend as any remaining bits. */
3862 sign_extend
= ~mask
;
3864 /* Pick the lower word and sign-extend it. */
3865 low
= INTVAL (value
);
3870 /* Pick the higher word, shifted to the least significant
3871 bits, and sign-extend it. */
3872 high
= INTVAL (value
);
3873 high
>>= bits_per_word
- 1;
3876 if (high
& sign_bit
)
3877 high
|= sign_extend
;
3879 /* Store the words in the target machine order. */
3880 if (WORDS_BIG_ENDIAN
)
3882 *first
= GEN_INT (high
);
3883 *second
= GEN_INT (low
);
3887 *first
= GEN_INT (low
);
3888 *second
= GEN_INT (high
);
3893 /* The rule for using CONST_INT for a wider mode
3894 is that we regard the value as signed.
3895 So sign-extend it. */
3896 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3897 if (WORDS_BIG_ENDIAN
)
3909 else if (GET_CODE (value
) != CONST_DOUBLE
)
3911 if (WORDS_BIG_ENDIAN
)
3913 *first
= const0_rtx
;
3919 *second
= const0_rtx
;
3922 else if (GET_MODE (value
) == VOIDmode
3923 /* This is the old way we did CONST_DOUBLE integers. */
3924 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3926 /* In an integer, the words are defined as most and least significant.
3927 So order them by the target's convention. */
3928 if (WORDS_BIG_ENDIAN
)
3930 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3931 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3935 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3936 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3943 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3945 /* Note, this converts the REAL_VALUE_TYPE to the target's
3946 format, splits up the floating point double and outputs
3947 exactly 32 bits of it into each of l[0] and l[1] --
3948 not necessarily BITS_PER_WORD bits. */
3949 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3951 /* If 32 bits is an entire word for the target, but not for the host,
3952 then sign-extend on the host so that the number will look the same
3953 way on the host that it would on the target. See for instance
3954 simplify_unary_operation. The #if is needed to avoid compiler
3957 #if HOST_BITS_PER_LONG > 32
3958 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3960 if (l
[0] & ((long) 1 << 31))
3961 l
[0] |= ((long) (-1) << 32);
3962 if (l
[1] & ((long) 1 << 31))
3963 l
[1] |= ((long) (-1) << 32);
3967 *first
= GEN_INT (l
[0]);
3968 *second
= GEN_INT (l
[1]);
3972 /* Return nonzero if this function has no function calls. */
3975 leaf_function_p (void)
3980 if (crtl
->profile
|| profile_arc_flag
)
3983 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3986 && ! SIBLING_CALL_P (insn
))
3988 if (NONJUMP_INSN_P (insn
)
3989 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3990 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3991 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3994 for (link
= crtl
->epilogue_delay_list
;
3996 link
= XEXP (link
, 1))
3998 insn
= XEXP (link
, 0);
4001 && ! SIBLING_CALL_P (insn
))
4003 if (NONJUMP_INSN_P (insn
)
4004 && GET_CODE (PATTERN (insn
)) == SEQUENCE
4005 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
4006 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
4013 /* Return 1 if branch is a forward branch.
4014 Uses insn_shuid array, so it works only in the final pass. May be used by
4015 output templates to customary add branch prediction hints.
4018 final_forward_branch_p (rtx insn
)
4020 int insn_id
, label_id
;
4022 gcc_assert (uid_shuid
);
4023 insn_id
= INSN_SHUID (insn
);
4024 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
4025 /* We've hit some insns that does not have id information available. */
4026 gcc_assert (insn_id
&& label_id
);
4027 return insn_id
< label_id
;
4030 /* On some machines, a function with no call insns
4031 can run faster if it doesn't create its own register window.
4032 When output, the leaf function should use only the "output"
4033 registers. Ordinarily, the function would be compiled to use
4034 the "input" registers to find its arguments; it is a candidate
4035 for leaf treatment if it uses only the "input" registers.
4036 Leaf function treatment means renumbering so the function
4037 uses the "output" registers instead. */
4039 #ifdef LEAF_REGISTERS
4041 /* Return 1 if this function uses only the registers that can be
4042 safely renumbered. */
4045 only_leaf_regs_used (void)
4048 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
4050 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4051 if ((df_regs_ever_live_p (i
) || global_regs
[i
])
4052 && ! permitted_reg_in_leaf_functions
[i
])
4055 if (crtl
->uses_pic_offset_table
4056 && pic_offset_table_rtx
!= 0
4057 && REG_P (pic_offset_table_rtx
)
4058 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
4064 /* Scan all instructions and renumber all registers into those
4065 available in leaf functions. */
4068 leaf_renumber_regs (rtx first
)
4072 /* Renumber only the actual patterns.
4073 The reg-notes can contain frame pointer refs,
4074 and renumbering them could crash, and should not be needed. */
4075 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
4077 leaf_renumber_regs_insn (PATTERN (insn
));
4078 for (insn
= crtl
->epilogue_delay_list
;
4080 insn
= XEXP (insn
, 1))
4081 if (INSN_P (XEXP (insn
, 0)))
4082 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
4085 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4086 available in leaf functions. */
4089 leaf_renumber_regs_insn (rtx in_rtx
)
4092 const char *format_ptr
;
4097 /* Renumber all input-registers into output-registers.
4098 renumbered_regs would be 1 for an output-register;
4105 /* Don't renumber the same reg twice. */
4109 newreg
= REGNO (in_rtx
);
4110 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4111 to reach here as part of a REG_NOTE. */
4112 if (newreg
>= FIRST_PSEUDO_REGISTER
)
4117 newreg
= LEAF_REG_REMAP (newreg
);
4118 gcc_assert (newreg
>= 0);
4119 df_set_regs_ever_live (REGNO (in_rtx
), false);
4120 df_set_regs_ever_live (newreg
, true);
4121 SET_REGNO (in_rtx
, newreg
);
4125 if (INSN_P (in_rtx
))
4127 /* Inside a SEQUENCE, we find insns.
4128 Renumber just the patterns of these insns,
4129 just as we do for the top-level insns. */
4130 leaf_renumber_regs_insn (PATTERN (in_rtx
));
4134 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
4136 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
4137 switch (*format_ptr
++)
4140 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
4144 if (NULL
!= XVEC (in_rtx
, i
))
4146 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
4147 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
4167 /* When -gused is used, emit debug info for only used symbols. But in
4168 addition to the standard intercepted debug_hooks there are some direct
4169 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
4170 Those routines may also be called from a higher level intercepted routine. So
4171 to prevent recording data for an inner call to one of these for an intercept,
4172 we maintain an intercept nesting counter (debug_nesting). We only save the
4173 intercepted arguments if the nesting is 1. */
4174 int debug_nesting
= 0;
4176 static tree
*symbol_queue
;
4177 int symbol_queue_index
= 0;
4178 static int symbol_queue_size
= 0;
4180 /* Generate the symbols for any queued up type symbols we encountered
4181 while generating the type info for some originally used symbol.
4182 This might generate additional entries in the queue. Only when
4183 the nesting depth goes to 0 is this routine called. */
4186 debug_flush_symbol_queue (void)
4190 /* Make sure that additionally queued items are not flushed
4195 for (i
= 0; i
< symbol_queue_index
; ++i
)
4197 /* If we pushed queued symbols then such symbols must be
4198 output no matter what anyone else says. Specifically,
4199 we need to make sure dbxout_symbol() thinks the symbol was
4200 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
4201 which may be set for outside reasons. */
4202 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
4203 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
4204 TREE_USED (symbol_queue
[i
]) = 1;
4205 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
4207 #ifdef DBX_DEBUGGING_INFO
4208 dbxout_symbol (symbol_queue
[i
], 0);
4211 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
4212 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
4215 symbol_queue_index
= 0;
4219 /* Queue a type symbol needed as part of the definition of a decl
4220 symbol. These symbols are generated when debug_flush_symbol_queue()
4224 debug_queue_symbol (tree decl
)
4226 if (symbol_queue_index
>= symbol_queue_size
)
4228 symbol_queue_size
+= 10;
4229 symbol_queue
= XRESIZEVEC (tree
, symbol_queue
, symbol_queue_size
);
4232 symbol_queue
[symbol_queue_index
++] = decl
;
4235 /* Free symbol queue. */
4237 debug_free_queue (void)
4241 free (symbol_queue
);
4242 symbol_queue
= NULL
;
4243 symbol_queue_size
= 0;
4247 /* Turn the RTL into assembly. */
4249 rest_of_handle_final (void)
4254 /* Get the function's name, as described by its RTL. This may be
4255 different from the DECL_NAME name used in the source file. */
4257 x
= DECL_RTL (current_function_decl
);
4258 gcc_assert (MEM_P (x
));
4260 gcc_assert (GET_CODE (x
) == SYMBOL_REF
);
4261 fnname
= XSTR (x
, 0);
4263 assemble_start_function (current_function_decl
, fnname
);
4264 final_start_function (get_insns (), asm_out_file
, optimize
);
4265 final (get_insns (), asm_out_file
, optimize
);
4266 final_end_function ();
4268 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4269 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4270 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4271 output_function_exception_table (fnname
);
4273 assemble_end_function (current_function_decl
, fnname
);
4275 user_defined_section_attribute
= false;
4277 /* Free up reg info memory. */
4281 fflush (asm_out_file
);
4283 /* Write DBX symbols if requested. */
4285 /* Note that for those inline functions where we don't initially
4286 know for certain that we will be generating an out-of-line copy,
4287 the first invocation of this routine (rest_of_compilation) will
4288 skip over this code by doing a `goto exit_rest_of_compilation;'.
4289 Later on, wrapup_global_declarations will (indirectly) call
4290 rest_of_compilation again for those inline functions that need
4291 to have out-of-line copies generated. During that call, we
4292 *will* be routed past here. */
4294 timevar_push (TV_SYMOUT
);
4295 if (!DECL_IGNORED_P (current_function_decl
))
4296 debug_hooks
->function_decl (current_function_decl
);
4297 timevar_pop (TV_SYMOUT
);
4299 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4300 DECL_INITIAL (current_function_decl
) = error_mark_node
;
4302 if (DECL_STATIC_CONSTRUCTOR (current_function_decl
)
4303 && targetm
.have_ctors_dtors
)
4304 targetm
.asm_out
.constructor (XEXP (DECL_RTL (current_function_decl
), 0),
4305 decl_init_priority_lookup
4306 (current_function_decl
));
4307 if (DECL_STATIC_DESTRUCTOR (current_function_decl
)
4308 && targetm
.have_ctors_dtors
)
4309 targetm
.asm_out
.destructor (XEXP (DECL_RTL (current_function_decl
), 0),
4310 decl_fini_priority_lookup
4311 (current_function_decl
));
4315 struct rtl_opt_pass pass_final
=
4321 rest_of_handle_final
, /* execute */
4324 0, /* static_pass_number */
4325 TV_FINAL
, /* tv_id */
4326 0, /* properties_required */
4327 0, /* properties_provided */
4328 0, /* properties_destroyed */
4329 0, /* todo_flags_start */
4330 TODO_ggc_collect
/* todo_flags_finish */
4336 rest_of_handle_shorten_branches (void)
4338 /* Shorten branches. */
4339 shorten_branches (get_insns ());
4343 struct rtl_opt_pass pass_shorten_branches
=
4347 "shorten", /* name */
4349 rest_of_handle_shorten_branches
, /* execute */
4352 0, /* static_pass_number */
4353 TV_FINAL
, /* tv_id */
4354 0, /* properties_required */
4355 0, /* properties_provided */
4356 0, /* properties_destroyed */
4357 0, /* todo_flags_start */
4358 TODO_dump_func
/* todo_flags_finish */
4364 rest_of_clean_state (void)
4367 FILE *final_output
= NULL
;
4368 int save_unnumbered
= flag_dump_unnumbered
;
4369 int save_noaddr
= flag_dump_noaddr
;
4371 if (flag_dump_final_insns
)
4373 final_output
= fopen (flag_dump_final_insns
, "a");
4376 error ("could not open final insn dump file %qs: %m",
4377 flag_dump_final_insns
);
4378 flag_dump_final_insns
= NULL
;
4383 struct cgraph_node
*node
= cgraph_node (current_function_decl
);
4385 aname
= (IDENTIFIER_POINTER
4386 (DECL_ASSEMBLER_NAME (current_function_decl
)));
4387 fprintf (final_output
, "\n;; Function (%s) %s\n\n", aname
,
4388 node
->frequency
== NODE_FREQUENCY_HOT
4390 : node
->frequency
== NODE_FREQUENCY_UNLIKELY_EXECUTED
4391 ? " (unlikely executed)"
4392 : node
->frequency
== NODE_FREQUENCY_EXECUTED_ONCE
4393 ? " (executed once)"
4396 flag_dump_noaddr
= flag_dump_unnumbered
= 1;
4397 if (flag_compare_debug_opt
|| flag_compare_debug
)
4398 dump_flags
|= TDF_NOUID
;
4399 final_insns_dump_p
= true;
4401 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
4403 INSN_UID (insn
) = CODE_LABEL_NUMBER (insn
);
4405 INSN_UID (insn
) = 0;
4409 /* It is very important to decompose the RTL instruction chain here:
4410 debug information keeps pointing into CODE_LABEL insns inside the function
4411 body. If these remain pointing to the other insns, we end up preserving
4412 whole RTL chain and attached detailed debug info in memory. */
4413 for (insn
= get_insns (); insn
; insn
= next
)
4415 next
= NEXT_INSN (insn
);
4416 NEXT_INSN (insn
) = NULL
;
4417 PREV_INSN (insn
) = NULL
;
4420 && (!NOTE_P (insn
) ||
4421 (NOTE_KIND (insn
) != NOTE_INSN_VAR_LOCATION
4422 && NOTE_KIND (insn
) != NOTE_INSN_BLOCK_BEG
4423 && NOTE_KIND (insn
) != NOTE_INSN_BLOCK_END
4424 && NOTE_KIND (insn
) != NOTE_INSN_CFA_RESTORE_STATE
)))
4425 print_rtl_single (final_output
, insn
);
4431 flag_dump_noaddr
= save_noaddr
;
4432 flag_dump_unnumbered
= save_unnumbered
;
4433 final_insns_dump_p
= false;
4435 if (fclose (final_output
))
4437 error ("could not close final insn dump file %qs: %m",
4438 flag_dump_final_insns
);
4439 flag_dump_final_insns
= NULL
;
4443 /* In case the function was not output,
4444 don't leave any temporary anonymous types
4445 queued up for sdb output. */
4446 #ifdef SDB_DEBUGGING_INFO
4447 if (write_symbols
== SDB_DEBUG
)
4448 sdbout_types (NULL_TREE
);
4451 flag_rerun_cse_after_global_opts
= 0;
4452 reload_completed
= 0;
4453 epilogue_completed
= 0;
4455 regstack_completed
= 0;
4458 /* Clear out the insn_length contents now that they are no
4460 init_insn_lengths ();
4462 /* Show no temporary slots allocated. */
4465 free_bb_for_insn ();
4469 /* We can reduce stack alignment on call site only when we are sure that
4470 the function body just produced will be actually used in the final
4472 if (decl_binds_to_current_def_p (current_function_decl
))
4474 unsigned int pref
= crtl
->preferred_stack_boundary
;
4475 if (crtl
->stack_alignment_needed
> crtl
->preferred_stack_boundary
)
4476 pref
= crtl
->stack_alignment_needed
;
4477 cgraph_rtl_info (current_function_decl
)->preferred_incoming_stack_boundary
4481 /* Make sure volatile mem refs aren't considered valid operands for
4482 arithmetic insns. We must call this here if this is a nested inline
4483 function, since the above code leaves us in the init_recog state,
4484 and the function context push/pop code does not save/restore volatile_ok.
4486 ??? Maybe it isn't necessary for expand_start_function to call this
4487 anymore if we do it here? */
4489 init_recog_no_volatile ();
4491 /* We're done with this function. Free up memory if we can. */
4492 free_after_parsing (cfun
);
4493 free_after_compilation (cfun
);
4497 struct rtl_opt_pass pass_clean_state
=
4501 "*clean_state", /* name */
4503 rest_of_clean_state
, /* execute */
4506 0, /* static_pass_number */
4507 TV_FINAL
, /* tv_id */
4508 0, /* properties_required */
4509 0, /* properties_provided */
4510 PROP_rtl
, /* properties_destroyed */
4511 0, /* todo_flags_start */
4512 0 /* todo_flags_finish */