Add mi_thunk support for vcalls on hppa.
[official-gcc.git] / gcc / ChangeLog
blobcadcc1f1374f126cadbeb155f113c83350f123d7
1 2021-02-21  Uros Bizjak  <ubizjak@gmail.com>
3         Revert:
4         2020-12-09  Uroš Bizjak  <ubizjak@gmail.com>
6         * config/i386/i386.h (REG_ALLOC_ORDER): Remove
8 2021-02-20  Ilya Leoshkevich  <iii@linux.ibm.com>
10         PR target/99134
11         * config/s390/vector.md (trunctf<DFP_ALL:mode>2_vr): New
12         pattern.
13         (trunctf<DFP_ALL:mode>2): Likewise.
14         (trunctdtf2_vr): Likewise.
15         (trunctdtf2): Likewise.
16         (extend<DFP_ALL:mode>tf2_vr): Likewise.
17         (extend<DFP_ALL:mode>tf2): Likewise.
18         (extendtftd2_vr): Likewise.
19         (extendtftd2): Likewise.
21 2021-02-20  Ilya Leoshkevich  <iii@linux.ibm.com>
23         * config/s390/vector.md (*fprx2_to_tf): Rename to fprx2_to_tf,
24         add memory alternative.
25         (tf_to_fprx2): New pattern.
27 2021-02-19  Martin Sebor  <msebor@redhat.com>
29         PR c/97172
30         * attribs.c (init_attr_rdwr_indices): Guard vblist use.
31         (attr_access::free_lang_data): Remove a spurious test.
33 2021-02-19  Nathan Sidwell  <nathan@acm.org>
35         * doc/invoke.texi (flang-info-module-read): Document.
37 2021-02-19  Martin Liska  <mliska@suse.cz>
39         PR translation/99167
40         * params.opt: Fix typo.
42 2021-02-19  Richard Biener  <rguenther@suse.de>
44         PR middle-end/99122
45         * tree-inline.c (inline_forbidden_p): Do not inline functions
46         with VLA arguments or return value.
48 2021-02-19  Jakub Jelinek  <jakub@redhat.com>
50         PR target/98998
51         * config/arm/arm.md (*stack_protect_combined_set_insn,
52         *stack_protect_combined_test_insn): If force_const_mem result
53         is not valid general operand, force its address into the destination
54         register first.
56 2021-02-19  Jakub Jelinek  <jakub@redhat.com>
58         PR ipa/99034
59         * tree-cfg.c (gimple_merge_blocks): If bb a starts with eh landing
60         pad or non-local label, put FORCED_LABELs from bb b after that label
61         rather than before it.
63 2021-02-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
65         PR target/98657
66         * config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3): Use
67         expand_vector_broadcast' to emit the vec_duplicate operand.
69 2021-02-18  Vladimir N. Makarov  <vmakarov@redhat.com>
71         PR rtl-optimization/96264
72         * lra-remat.c (reg_overlap_for_remat_p): Check also output insn
73         hard regs.
75 2021-02-18  H.J. Lu  <hjl.tools@gmail.com>
77         PR target/99113
78         * varasm.c (get_section): Replace SUPPORTS_SHF_GNU_RETAIN with
79         looking up the retain attribute.
80         (resolve_unique_section): Likewise.
81         (get_variable_section): Likewise.
82         (switch_to_section): Likewise.  Warn when a symbol without the
83         retain attribute and a symbol with the retain attribute are
84         placed in the section with the same name, instead of the used
85         attribute.
86         * doc/extend.texi: Document the "retain" attribute.
88 2021-02-18  Nathan Sidwell  <nathan@acm.org>
90         PR c++/99023
91         * doc/invoke.texi (flang-info-include-translate): Document header
92         lookup behaviour.
94 2021-02-18  Richard Biener  <rguenther@suse.de>
96         PR middle-end/99122
97         * ipa-fnsummary.c (analyze_function_body): Set
98         CIF_FUNCTION_NOT_INLINABLE for VLA parameter calls.
99         * tree-inline.c (insert_init_debug_bind): Pass NULL for
100         error_mark_node values.
101         (force_value_to_type): Do not build V_C_Es for WITH_SIZE_EXPR
102         values.
103         (setup_one_parameter): Delay force_value_to_type until when
104         it's needed.
106 2021-02-18  Hans-Peter Nilsson  <hp@axis.com>
108         PR tree-optimization/99142
109         * match.pd (clz cmp 0): Gate replacement on single_use of clz result.
111 2021-02-18  Jakub Jelinek  <jakub@redhat.com>
113         * wide-int-bitmask.h (wide_int_bitmask::wide_int_bitmask (),
114         wide_int_bitmask::wide_int_bitmask (uint64_t),
115         wide_int_bitmask::wide_int_bitmask (uint64_t, uint64_t),
116         wide_int_bitmask::operator ~ () const,
117         wide_int_bitmask::operator | (wide_int_bitmask) const,
118         wide_int_bitmask::operator & (wide_int_bitmask) const): Use constexpr
119         instead of inline.
120         * config/i386/i386.h (PTA_3DNOW, PTA_3DNOW_A, PTA_64BIT, PTA_ABM,
121         PTA_AES, PTA_AVX, PTA_BMI, PTA_CX16, PTA_F16C, PTA_FMA, PTA_FMA4,
122         PTA_FSGSBASE, PTA_LWP, PTA_LZCNT, PTA_MMX, PTA_MOVBE, PTA_NO_SAHF,
123         PTA_PCLMUL, PTA_POPCNT, PTA_PREFETCH_SSE, PTA_RDRND, PTA_SSE, PTA_SSE2,
124         PTA_SSE3, PTA_SSE4_1, PTA_SSE4_2, PTA_SSE4A, PTA_SSSE3, PTA_TBM,
125         PTA_XOP, PTA_AVX2, PTA_BMI2, PTA_RTM, PTA_HLE, PTA_PRFCHW, PTA_RDSEED,
126         PTA_ADX, PTA_FXSR, PTA_XSAVE, PTA_XSAVEOPT, PTA_AVX512F, PTA_AVX512ER,
127         PTA_AVX512PF, PTA_AVX512CD, PTA_NO_TUNE, PTA_SHA, PTA_PREFETCHWT1,
128         PTA_CLFLUSHOPT, PTA_XSAVEC, PTA_XSAVES, PTA_AVX512DQ, PTA_AVX512BW,
129         PTA_AVX512VL, PTA_AVX512IFMA, PTA_AVX512VBMI, PTA_CLWB, PTA_MWAITX,
130         PTA_CLZERO, PTA_NO_80387, PTA_PKU, PTA_AVX5124VNNIW, PTA_AVX5124FMAPS,
131         PTA_AVX512VPOPCNTDQ, PTA_SGX, PTA_AVX512VNNI, PTA_GFNI, PTA_VAES,
132         PTA_AVX512VBMI2, PTA_VPCLMULQDQ, PTA_AVX512BITALG, PTA_RDPID,
133         PTA_PCONFIG, PTA_WBNOINVD, PTA_AVX512VP2INTERSECT, PTA_PTWRITE,
134         PTA_AVX512BF16, PTA_WAITPKG, PTA_MOVDIRI, PTA_MOVDIR64B, PTA_ENQCMD,
135         PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK, PTA_AMX_TILE, PTA_AMX_INT8,
136         PTA_AMX_BF16, PTA_UINTR, PTA_HRESET, PTA_KL, PTA_WIDEKL, PTA_AVXVNNI,
137         PTA_X86_64_BASELINE, PTA_X86_64_V2, PTA_X86_64_V3, PTA_X86_64_V4,
138         PTA_CORE2, PTA_NEHALEM, PTA_WESTMERE, PTA_SANDYBRIDGE, PTA_IVYBRIDGE,
139         PTA_HASWELL, PTA_BROADWELL, PTA_SKYLAKE, PTA_SKYLAKE_AVX512,
140         PTA_CASCADELAKE, PTA_COOPERLAKE, PTA_CANNONLAKE, PTA_ICELAKE_CLIENT,
141         PTA_ICELAKE_SERVER, PTA_TIGERLAKE, PTA_SAPPHIRERAPIDS, PTA_ALDERLAKE,
142         PTA_KNL, PTA_BONNELL, PTA_SILVERMONT, PTA_GOLDMONT, PTA_GOLDMONT_PLUS,
143         PTA_TREMONT, PTA_KNM): Use constexpr instead of const.
145 2021-02-18  Jakub Jelinek  <jakub@redhat.com>
147         PR middle-end/99109
148         * gimple-array-bounds.cc (build_zero_elt_array_type): Rename to ...
149         (build_printable_array_type): ... this.  Add nelts argument.  For
150         overaligned eltype, use TYPE_MAIN_VARIANT (eltype) instead.  If
151         nelts, call build_array_type_nelts.
152         (array_bounds_checker::check_mem_ref): Use build_printable_array_type
153         instead of build_zero_elt_array_type and build_array_type_nelts.
155 2021-02-18  Jakub Jelinek  <jakub@redhat.com>
157         PR target/99104
158         * config/i386/i386.c (distance_non_agu_define): Don't call
159         extract_insn_cached here.
160         (ix86_lea_outperforms): Save and restore recog_data around call
161         to distance_non_agu_define and distance_agu_use.
162         (ix86_ok_to_clobber_flags): Remove.
163         (ix86_avoid_lea_for_add): Don't call ix86_ok_to_clobber_flags.
164         (ix86_avoid_lea_for_addr): Likewise.  Adjust function comment.
165         * config/i386/i386.md (*lea<mode>): Change from define_insn_and_split
166         into define_insn.  Move the splitting to define_peephole2 and
167         check there using peep2_regno_dead_p if FLAGS_REG is dead.
169 2021-02-17  Julian Brown  <julian@codesourcery.com>
171         * gimplify.c (gimplify_scan_omp_clauses): Handle ATTACH_DETACH
172         for non-decls.
174 2021-02-17  Xi Ruoyao  <xry111@mengyan1223.wang>
176         PR target/98491
177         * config/mips/mips.c (mips_symbol_insns): Do not use
178         MSA_SUPPORTED_MODE_P if mode is MAX_MACHINE_MODE.
180 2021-02-16  Vladimir N. Makarov  <vmakarov@redhat.com>
182         PR inline-asm/98096
183         * stmt.c (resolve_operand_name_1): Take inout operands into account
184         for access to labels by names.
185         * doc/extend.texi: Describe counting operands for accessing labels.
187 2021-02-16  Richard Biener  <rguenther@suse.de>
189         PR tree-optimization/38474
190         * tree-ssa-structalias.c (variable_info::address_taken): New.
191         (new_var_info): Initialize address_taken.
192         (process_constraint): Set address_taken.
193         (solve_constraints): Use the new address_taken flag rather
194         than is_reg_var for sorting variables.
195         (dump_constraint): Dump the variable number if the name
196         is just NULL.
198 2021-02-16  Jakub Jelinek  <jakub@redhat.com>
200         PR target/99100
201         * tree-vect-stmts.c (vectorizable_simd_clone_call): For num_calls != 1
202         multiply by 4096 and for inbranch by 8192.
203         * config/i386/i386.c (ix86_simd_clone_usable): For TARGET_AVX512F,
204         return 3, 2 or 1 for mangle letters 'b', 'c' or 'd'.
206 2021-02-15  Maya Rashish  <coypu@sdf.org>
208         * config/aarch64/aarch64.c (aarch64_init_builtins):
209         Call SUBTARGET_INIT_BUILTINS.
211 2021-02-15  Peter Bergner  <bergner@linux.ibm.com>
213         PR rtl-optimization/98872
214         * init-regs.c (initialize_uninitialized_regs): Skip initialization
215         if CONST0_RTX is NULL.
217 2021-02-15  Richard Sandiford  <richard.sandiford@arm.com>
219         PR rtl-optimization/98863
220         * rtl-ssa/functions.h (function_info::bb_live_out_info): Delete.
221         (function_info::build_info): Turn into a declaration, moving the
222         definition to internals.h.
223         (function_info::bb_walker): Declare.
224         (function_info::create_reg_use): Likewise.
225         (function_info::calculate_potential_phi_regs): Take a build_info
226         parameter.
227         (function_info::place_phis, function_info::create_ebbs): Declare.
228         (function_info::calculate_ebb_live_in_for_debug): Likewise.
229         (function_info::populate_backedge_phis): Delete.
230         (function_info::start_block, function_info::end_block): Declare.
231         (function_info::populate_phi_inputs): Delete.
232         (function_info::m_potential_phi_regs): Move information to build_info.
233         * rtl-ssa/internals.h: New file.
234         (function_info::bb_phi_info): New class.
235         (function_info::build_info): Moved from functions.h.
236         Add a constructor and destructor.
237         (function_info::build_info::ebb_use): Delete.
238         (function_info::build_info::ebb_def): Likewise.
239         (function_info::build_info::bb_live_out): Likewise.
240         (function_info::build_info::tmp_ebb_live_in_for_debug): New variable.
241         (function_info::build_info::potential_phi_regs): Likewise.
242         (function_info::build_info::potential_phi_regs_for_debug): Likewise.
243         (function_info::build_info::ebb_def_regs): Likewise.
244         (function_info::build_info::bb_phis): Likewise.
245         (function_info::build_info::bb_mem_live_out): Likewise.
246         (function_info::build_info::bb_to_rpo): Likewise.
247         (function_info::build_info::def_stack): Likewise.
248         (function_info::build_info::old_def_stack_limit): Likewise.
249         * rtl-ssa/internals.inl (function_info::build_info::record_reg_def):
250         Remove the regno argument.  Push the previous definition onto the
251         definition stack where necessary.
252         * rtl-ssa/accesses.cc: Include internals.h.
253         * rtl-ssa/changes.cc: Likewise.
254         * rtl-ssa/blocks.cc: Likewise.
255         (function_info::build_info::build_info): Define.
256         (function_info::build_info::~build_info): Likewise.
257         (function_info::bb_walker): New class.
258         (function_info::bb_walker::bb_walker): Define.
259         (function_info::add_live_out_use): Convert a logarithmic-complexity
260         test into a linear one.  Allow the same definition to be passed
261         multiple times.
262         (function_info::calculate_potential_phi_regs): Moved from
263         functions.cc.  Take a build_info parameter and store the
264         information there instead.
265         (function_info::place_phis): New function.
266         (function_info::add_entry_block_defs): Update call to record_reg_def.
267         (function_info::calculate_ebb_live_in_for_debug): New function.
268         (function_info::add_phi_nodes): Use bb_phis to decide which
269         registers need phi nodes and initialize ebb_def_regs accordingly.
270         Do not add degenerate phis here.
271         (function_info::add_artificial_accesses): Use create_reg_use.
272         Assert that all definitions are listed in the DF LR sets.
273         Update call to record_reg_def.
274         (function_info::record_block_live_out): Record live-out register
275         values in the phis of successor blocks.  Use the live-out set
276         when processing the last block in an EBB, instead of always
277         using the live-in sets of successor blocks.  AND the live sets
278         with the set of registers that have been defined in the EBB,
279         rather than with all potential phi registers.  Cope correctly
280         with branches back to the start of the current EBB.
281         (function_info::start_block): New function.
282         (function_info::end_block): Likewise.
283         (function_info::populate_phi_inputs): Likewise.
284         (function_info::create_ebbs): Likewise.
285         (function_info::process_all_blocks): Rewrite into a multi-phase
286         process.
287         * rtl-ssa/functions.cc: Include internals.h.
288         (function_info::calculate_potential_phi_regs): Move to blocks.cc.
289         (function_info::init_function_data): Remove caller.
290         * rtl-ssa/insns.cc: Include internals.h
291         (function_info::create_reg_use): New function.  Lazily any
292         degenerate phis needed by the linear RPO view.
293         (function_info::record_use): Use create_reg_use.  When processing
294         debug uses, use potential_phi_regs and test it before checking
295         whether the register is live on entry to the current EBB.  Lazily
296         calculate ebb_live_in_for_debug.
297         (function_info::record_call_clobbers): Update call to record_reg_def.
298         (function_info::record_def): Likewise.
300 2021-02-15  Martin Liska  <mliska@suse.cz>
302         * toplev.c (init_asm_output): Free output of
303         gen_command_line_string function.
304         (process_options): Likewise.
306 2021-02-15  Martin Liska  <mliska@suse.cz>
308         * params.opt: Add 2 missing Param keywords.
310 2021-02-15  Eric Botcazou  <ebotcazou@adacore.com>
312         * df-core.c (df_worklist_dataflow_doublequeue): Use proper cast.
314 2021-02-15  Jakub Jelinek  <jakub@redhat.com>
316         PR tree-optimization/99079
317         * match.pd (A % (pow2pcst << N) -> A & ((pow2pcst << N) - 1)): Remove
318         useless tree_nop_conversion_p (type, TREE_TYPE (@3)) check.  Instead
319         require both type and TREE_TYPE (@1) to be integral types and either
320         type having smaller or equal precision, or TREE_TYPE (@1) being
321         unsigned type, or type being signed type.  If TREE_TYPE (@1)
322         doesn't have wrapping overflow, perform the subtraction of one in
323         unsigned type.
325 2021-02-14  Jan Hubicka  <hubicka@ucw.cz>
326             Richard Biener  <rguether@suse.de>
328         PR ipa/97346
329         * ipa-reference.c (ipa_init): Only conditinally initialize
330         reference_vars_to_consider.
331         (propagate): Conditionally deninitialize reference_vars_to_consider.
332         (ipa_reference_write_optimization_summary): Sanity check that
333         reference_vars_to_consider is not allocated.
335 2021-02-13  Levy Hsu  <admin@levyhsu.com>
337         PR target/97417
338         * config/riscv/riscv-shorten-memrefs.c (pass_shorten_memrefs): Add
339         extend parameter to get_si_mem_base_reg declaration.
340         (get_si_mem_base_reg): Add extend parameter.  Set it.
341         (analyze): Pass extend arg to get_si_mem_base_reg.
342         (transform): Likewise.  Use it when rewriting mems.
343         * config/riscv/riscv.c (riscv_legitimize_move): Check for subword
344         loads and emit sign/zero extending load followed by subreg move.
346 2021-02-13  Jim Wilson  <jimw@sifive.com>
348         PR target/97417
349         * config/riscv/riscv.c (riscv_compressed_lw_address_p): Drop early
350         exit when !reload_completed.  Only perform check for compressed reg
351         if reload_completed.
352         (riscv_rtx_costs): In MEM case, when optimizing for size and
353         shorten memrefs, if not compressible, then increase cost.
355 2021-02-13  Jakub Jelinek  <jakub@redhat.com>
357         PR rtl-optimization/98439
358         * recog.c (pass_split_before_regstack::gate): Enable even when
359         pass_split_before_sched2 is enabled if -fselective-scheduling2 is
360         on.
362 2021-02-13  Jakub Jelinek  <jakub@redhat.com>
364         PR target/96166
365         * config/i386/mmx.md (*mmx_pshufd_1): Add a combine splitter for
366         swap of V2SImode elements in memory into DImode memory rotate by 32.
368 2021-02-12  Martin Sebor  <msebor@redhat.com>
370         * tree-pretty-print.c (print_generic_expr_to_str): Update comment.
372 2021-02-12  Richard Sandiford  <richard.sandiford@arm.com>
374         * rtl-ssa/accesses.cc (function_info::make_use_available): Use
375         m_temp_obstack rather than m_obstack to allocate the temporary use.
377 2021-02-12  Richard Sandiford  <richard.sandiford@arm.com>
379         * df-problems.c (df_lr_bb_local_compute): Treat partial definitions
380         as read-modify operations.
382 2021-02-12  Richard Biener  <rguenther@suse.de>
384         PR middle-end/38474
385         * ipa-fnsummary.c (unmodified_parm_1): Only walk when
386         fbi->aa_walk_budget is bigger than zero.  Update
387         fbi->aa_walk_budget.
388         (param_change_prob): Likewise.
389         * ipa-prop.c (detect_type_change_from_memory_writes):
390         Properly account walk_aliased_vdefs.
391         (parm_preserved_before_stmt_p): Canonicalize updates.
392         (parm_ref_data_preserved_p): Likewise.
393         (parm_ref_data_pass_through_p): Likewise.
394         (determine_known_aggregate_parts): Account own alias queries.
396 2021-02-12  Martin Liska  <mliska@suse.cz>
398         * opts-common.c (decode_cmdline_option): Release werror_arg.
399         * opts.c (gen_producer_string): Release output of
400         gen_command_line_string.
402 2021-02-12  Richard Biener  <rguenther@suse.de>
404         PR tree-optimization/38474
405         * params.opt (-param=max-store-chains-to-track=): New param.
406         (-param=max-stores-to-track=): Likewise.
407         * doc/invoke.texi (max-store-chains-to-track): Document.
408         (max-stores-to-track): Likewise.
409         * gimple-ssa-store-merging.c (pass_store_merging::m_n_chains):
410         New.
411         (pass_store_merging::m_n_stores): Likewise.
412         (pass_store_merging::terminate_and_process_chain): Update
413         m_n_stores and m_n_chains.
414         (pass_store_merging::process_store): Likewise.   Terminate
415         oldest chains if the number of stores or chains get too large.
416         (imm_store_chain_info::terminate_and_process_chain): Dump
417         chain length.
419 2021-02-11  Eric Botcazou  <ebotcazou@adacore.com>
421         * config/i386/winnt.c (i386_pe_seh_unwind_emit): When switching to
422         the cold section, emit a nop before the directive if the previous
423         active instruction can throw.
425 2021-02-11  Peter Bergner  <bergner@linux.ibm.com>
427         PR target/99041
428         * config/rs6000/predicates.md (mma_assemble_input_operand): Restrict
429         memory addresses that are legal for quad word accesses.
431 2021-02-11  Andrea Corallo  <andrea.corallo@arm.com>
433         PR target/98931
434         * config/arm/thumb2.md (*doloop_end_internal): Generate
435         alternative sequence to handle long range branches.
437 2021-02-11  Joel Hutton  <joel.hutton@arm.com>
439         PR tree-optimization/98772
440         * optabs-tree.c (supportable_half_widening_operation): New function
441         to check for supportable V8QI->V8HI widening patterns.
442         * optabs-tree.h (supportable_half_widening_operation): New function.
443         * tree-vect-stmts.c (vect_create_half_widening_stmts): New function
444         to create promotion stmts for V8QI->V8HI widening patterns.
445         (vectorizable_conversion): Add case for V8QI->V8HI.
447 2021-02-11  Richard Biener  <rguenther@suse.de>
449         * sparseset.h (SPARSESET_ELT_BITS): Remove.
450         (SPARSESET_ELT_TYPE): Use unsigned int.
451         * fwprop.c: Do not include sparseset.h.
453 2021-02-10  Jakub Jelinek  <jakub@redhat.com>
455         PR c++/99035
456         * varasm.c (declare_weak): For -fsyntax-only, allow even
457         TREE_ASM_WRITTEN function decls.
459 2021-02-10  Jakub Jelinek  <jakub@redhat.com>
461         PR target/99025
462         * config/i386/sse.md (fix<fixunssuffix>_truncv2sfv2di2,
463         <insn>v8qiv8hi2, <insn>v8qiv8si2, <insn>v4qiv4si2, <insn>v4hiv4si2,
464         <insn>v8qiv8di2, <insn>v4qiv4di2, <insn>v2qiv2di2, <insn>v4hiv4di2,
465         <insn>v2hiv2di2, <insn>v2siv2di2): Force operands[1] into REG before
466         calling simplify_gen_subreg on it.
468 2021-02-10  Martin Liska  <mliska@suse.cz>
470         * config/nvptx/nvptx.c (nvptx_option_override): Use
471         flag_patchable_function_entry instead of the removed
472         function_entry_patch_area_size.
474 2021-02-10  Martin Liska  <mliska@suse.cz>
476         PR tree-optimization/99002
477         PR tree-optimization/99026
478         * gimple-if-to-switch.cc (if_chain::is_beneficial): Fix memory
479         leak when adjacent cases are merged.
480         * tree-switch-conversion.c (switch_decision_tree::analyze_switch_statement): Use
481         release_clusters.
482         (make_pass_lower_switch): Remove trailing whitespace.
483         * tree-switch-conversion.h (release_clusters): New.
485 2021-02-10  Richard Biener  <rguenther@suse.de>
487         PR rtl-optimization/99054
488         * cfgrtl.c (rtl-optimization/99054): Return an auto_vec.
489         (fixup_partitions): Adjust.
490         (rtl_verify_edges): Likewise.
492 2021-02-10  Jakub Jelinek  <jakub@redhat.com>
494         PR middle-end/99007
495         * gimplify.c (gimplify_scan_omp_clauses): For MEM_REF on reductions,
496         temporarily disable gimplify_ctxp->into_ssa around gimplify_expr
497         calls.
499 2021-02-10  Richard Biener  <rguenther@suse.de>
501         PR ipa/99029
502         * ipa-pure-const.c (propagate_malloc): Use an auto_vec<>
503         for callees.
505 2021-02-10  Richard Biener  <rguenther@suse.de>
507         PR tree-optimization/99024
508         * tree-vect-loop.c (_loop_vec_info::~_loop_vec_info): Only
509         clear loop->aux if it is associated with the destroyed loop_vinfo.
511 2021-02-10  Martin Liska  <mliska@suse.cz>
513         PR tree-optimization/99002
514         * gimple-if-to-switch.cc (find_conditions): Fix memory leak
515         in the function.
517 2021-02-10  Martin Liska  <mliska@suse.cz>
519         PR ipa/99003
520         * ipa-icf.c (sem_item::add_reference): Fix memory leak when
521         a reference exists.
523 2021-02-10  Jakub Jelinek  <jakub@redhat.com>
525         PR debug/98755
526         * dwarf2out.c (prune_unused_types_walk): Mark DW_TAG_variable DIEs
527         at class scope for DWARF5+.
529 2021-02-09  Eric Botcazou  <ebotcazou@adacore.com>
531         PR rtl-optimization/96015
532         * reorg.c (skip_consecutive_labels): Minor comment tweaks.
533         (relax_delay_slots): When deleting a jump to the next active
534         instruction over a barrier, first delete the barrier if the
535         jump is the only way to reach the target label.
537 2021-02-09  Andre Vieira  <andre.simoesdiasvieira@arm.com>
539         * config/aarch64/aarch64-cost-tables.h: Add entries for vect.mul.
540         * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Use vect.mul for
541         vector multiplies and vect.alu for SSRA.
542         * config/arm/aarch-common-protos.h (struct vector_cost_table): Define
543         vect.mul cost field.
544         * config/arm/aarch-cost-tables.h: Add entries for vect.mul.
545         * config/arm/arm.c: Likewise.
547 2021-02-09  Richard Biener  <rguenther@suse.de>
549         PR tree-optimization/98863
550         * tree-ssa-sccvn.h (vn_avail::next_undo): Add.
551         * tree-ssa-sccvn.c (last_pushed_avail): New global.
552         (rpo_elim::eliminate_push_avail): Chain pushed avails.
553         (unwind_state::avail_top): Add.
554         (do_unwind): Rewrite unwinding of avail entries.
555         (do_rpo_vn): Initialize last_pushed_avail and
556         avail_top of the undo state.
558 2021-02-09  Jakub Jelinek  <jakub@redhat.com>
560         PR middle-end/99004
561         * calls.c (maybe_warn_rdwr_sizes): Change s0 and s1 type from
562         const char * to char * and free those pointers after use.
564 2021-02-09  Richard Biener  <rguenther@suse.de>
566         PR tree-optimization/99017
567         * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Allow
568         zero vector cost entries.
570 2021-02-08  Andre Vieira  <andre.simoesdiasvieira@arm.com>
572         PR middle-end/98974
573         * tree-vect-stmts.c (vectorizable_condition): Remove shadow vec_num
574         parameter in vectorizable_condition.
576 2021-02-08  Richard Biener  <rguenther@suse.de>
578         PR lto/96591
579         * tree.c (walk_tree_1): Walk VECTOR_CST elements.
581 2021-02-08  Martin Liska  <mliska@suse.cz>
583         PR lto/98971
584         * cfgexpand.c (pass_expand::execute): Parse per-function option
585         flag_patchable_function_entry and use it.
586         * common.opt: Remove function_entry_patch_area_size and
587         function_entry_patch_area_start global variables.
588         * opts.c (parse_and_check_patch_area): New function.
589         (common_handle_option): Use it.
590         * opts.h (parse_and_check_patch_area): New function.
591         * toplev.c (process_options): Parse and use
592         function_entry_patch_area_size.
594 2021-02-08  Martin Sebor  <msebor@redhat.com>
596         * doc/extend.texi (attribute malloc): Correct typos.
598 2021-02-05  Nathan Sidwell  <nathan@acm.org>
600         PR driver/98943
601         * gcc.c (driver::maybe_run_linker): Check for input file
602         accessibility if not linking.
604 2021-02-05  Richard Biener  <rguenther@suse.de>
606         PR tree-optimization/98855
607         * tree-vectorizer.h (add_stmt_cost): New overload.
608         * tree-vect-slp.c (li_cost_vec_cmp): New.
609         (vect_bb_slp_scalar_cost): Cost individual loop regions
610         separately.  Account for the scalar instance root stmt.
612 2021-02-05  Tom de Vries  <tdevries@suse.de>
614         PR debug/98656
615         * tree-switch-conversion.c (jump_table_cluster::emit): Add loc
616         argument.
617         (bit_test_cluster::emit): Reuse location_t for newly created
618         gswitch statement.
619         (switch_decision_tree::try_switch_expansion): Preserve
620         location_t.
621         * tree-switch-conversion.h: Change function signatures.
623 2021-02-05  Jakub Jelinek  <jakub@redhat.com>
625         PR target/98957
626         * config/i386/i386-options.c (m_NONE, m_ALL): Define.
627         * config/i386/x86-tune.def (X86_TUNE_BRANCH_PREDICTION_HINTS,
628         X86_TUNE_PROMOTE_QI_REGS): Use m_NONE instead of 0U.
629         (X86_TUNE_QIMODE_MATH): Use m_ALL instead of ~0U.
631 2021-02-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
633         * config/aarch64/aarch64-simd-builtins.def (get_high): Define builtin.
634         * config/aarch64/aarch64-simd.md (aarch64_get_high<mode>): Define.
635         * config/aarch64/arm_neon.h (__GET_HIGH): Delete.
636         (vget_high_f16): Reimplement using new builtin.
637         (vget_high_f32): Likewise.
638         (vget_high_f64): Likewise.
639         (vget_high_p8): Likewise.
640         (vget_high_p16): Likewise.
641         (vget_high_p64): Likewise.
642         (vget_high_s8): Likewise.
643         (vget_high_s16): Likewise.
644         (vget_high_s32): Likewise.
645         (vget_high_s64): Likewise.
646         (vget_high_u8): Likewise.
647         (vget_high_u16): Likewise.
648         (vget_high_u32): Likewise.
649         (vget_high_u64): Likewise.
651 2021-02-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
653         * config/aarch64/aarch64-simd-builtins.def (get_low): Define builtin.
654         * config/aarch64/aarch64-simd.md (aarch64_get_low<mode>): Define.
655         * config/aarch64/arm_neon.h (__GET_LOW): Delete.
656         (vget_low_f16): Reimplement using new builtin.
657         (vget_low_f32): Likewise.
658         (vget_low_f64): Likewise.
659         (vget_low_p8): Likewise.
660         (vget_low_p16): Likewise.
661         (vget_low_p64): Likewise.
662         (vget_low_s8): Likewise.
663         (vget_low_s16): Likewise.
664         (vget_low_s32): Likewise.
665         (vget_low_s64): Likewise.
666         (vget_low_u8): Likewise.
667         (vget_low_u16): Likewise.
668         (vget_low_u32): Likewise.
669         (vget_low_u64): Likewise.
671 2021-02-05  Kito Cheng  <kito.cheng@sifive.com>
673         * gcc.c (print_multilib_info): Check all required argument is provided
674         by default arg.
676 2021-02-05  liuhongt  <hongtao.liu@intel.com>
678         PR target/98537
679         * config/i386/i386-expand.c (ix86_expand_sse_cmp): Don't
680         generate integer mask comparison for 128/256-bits vector when
681         op_true/op_false is NULL_RTX or CONSTM1_RTX/CONST0_RTX. Also
682         delete redundant !maskcmp condition.
683         (ix86_expand_int_vec_cmp): Ditto but no redundant deletion
684         here.
685         (ix86_expand_sse_movcc): Delete definition of maskcmp, add the
686         condition directly to if (maskcmp), add extra check for
687         cmpmode, it should be MODE_INT.
688         (ix86_expand_fp_vec_cmp): Pass NULL to ix86_expand_sse_cmp's
689         parameters op_true/op_false.
690         (ix86_use_mask_cmp_p): New.
692 2021-02-05  liuhongt  <hongtao.liu@intel.com>
694         PR target/98172
695         * config/i386/x86-tune.def (X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL):
696         Remove m_GENERIC from ~list.
697         (X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL): Ditto.
699 2021-02-04  David Malcolm  <dmalcolm@redhat.com>
701         PR c/97932
702         * diagnostic-show-locus.c (compatible_locations_p): Require
703         locations in the same macro map to be either both from the
704         macro definition, or both from the macro arguments.
706 2021-02-04  Jonathan Wright  <jonathan.wright@arm.com>
708         * config/aarch64/aarch64-simd-builtins.def: Add
709         [su]mull_hi_lane[q] builtin generator macros.
710         * config/aarch64/aarch64-simd.md
711         (aarch64_<su>mull_hi_lane<mode>_insn): Define.
712         (aarch64_<su>mull_hi_lane<mode>): Define.
713         (aarch64_<su>mull_hi_laneq<mode>_insn): Define.
714         (aarch64_<su>mull_hi_laneq<mode>): Define.
715         * config/aarch64/arm_neon.h (vmull_high_lane_s16): Use RTL
716         builtin instead of inline asm.
717         (vmull_high_lane_s32): Likewise.
718         (vmull_high_lane_u16): Likewise.
719         (vmull_high_lane_u32): Likewise.
720         (vmull_high_laneq_s16): Likewise.
721         (vmull_high_laneq_s32): Likewise.
722         (vmull_high_laneq_u16): Likewise.
723         (vmull_high_laneq_u32): Liekwise.
725 2021-02-04  Jonathan Wright  <jonathan.wright@arm.com>
727         * config/aarch64/aarch64-simd-builtins.def: Add [su]mull_hi_n
728         builtin generator macros.
729         * config/aarch64/aarch64-simd.md
730         (aarch64_<su>mull_hi_n<mode>_insn): Define.
731         (aarch64_<su>mull_hi_n<mode>): Define.
732         * config/aarch64/arm_neon.h (vmull_high_n_s16): Use RTL builtin
733         instead of inline asm.
734         (vmull_high_n_s32): Likewise.
735         (vmull_high_n_u16): Likewise.
736         (vmull_high_n_u32): Likewise.
738 2021-02-04  Richard Biener  <rguenther@suse.de>
740         PR tree-optimization/98855
741         * tree-vect-loop.c (vectorizable_phi): Do not cost
742         single-argument PHIs.
743         * tree-vect-slp.c (vect_bb_slp_scalar_cost): Likewise.
744         * tree-vect-stmts.c (vectorizable_bswap): Also perform
745         costing for SLP operation.
747 2021-02-04  Martin Liska  <mliska@suse.cz>
749         * doc/extend.texi: Mention -mprefer-vector-width in target
750         attributes.
752 2021-02-03  Martin Sebor  <msebor@redhat.com>
754         PR tree-optimization/98937
755         * tree-ssa-strlen.c (strlen_dom_walker::~strlen_dom_walker): Define.
756         Flush pointer_query cache.
758 2021-02-03  Aaron Sawdey  <acsawdey@linux.ibm.com>
760         * config/rs6000/genfusion.pl (gen_2logical): Add missing
761         fixes based on patch review.
762         * config/rs6000/fusion.md: Regenerate file.
764 2021-02-03  Aaron Sawdey  <acsawdey@linux.ibm.com>
766         * config/rs6000/t-rs6000: Comment out auto generation of
767         fusion.md for now.
769 2021-02-03  Andrew Stubbs  <ams@codesourcery.com>
771         * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX908.
772         * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Add gfx908.
773         (output_file_start): Add gfx908.
774         * config/gcn/gcn.opt (gpu_type): Add gfx908.
775         * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Add march=gfx908.
776         (MULTILIB_DIRNAMES): Add gfx908.
777         * config/gcn/mkoffload.c (EF_AMDGPU_MACH_AMDGCN_GFX908): New define.
778         (main): Recognize gfx908.
779         * config/gcn/t-omp-device: Add gfx908.
781 2021-02-03  Jonathan Wright  <jonathan.wright@arm.com>
783         * config/aarch64/aarch64-simd-builtins.def: Add
784         [su]mlsl_hi_lane[q] builtin macro generators.
785         * config/aarch64/aarch64-simd.md
786         (aarch64_<su>mlsl_hi_lane<mode>_insn): Define.
787         (aarch64_<su>mlsl_hi_lane<mode>): Define.
788         (aarch64_<su>mlsl_hi_laneq<mode>_insn): Define.
789         (aarch64_<su>mlsl_hi_laneq<mode>): Define.
790         * config/aarch64/arm_neon.h (vmlsl_high_lane_s16): Use RTL
791         builtin instead of inline asm.
792         (vmlsl_high_lane_s32): Likewise.
793         (vmlsl_high_lane_u16): Likewise.
794         (vmlsl_high_lane_u32): Likewise.
795         (vmlsl_high_laneq_s16): Likewise.
796         (vmlsl_high_laneq_s32): Likewise.
797         (vmlsl_high_laneq_u16): Likewise.
798         (vmlsl_high_laneq_u32): Likewise.
799         (vmlal_high_laneq_u32): Likewise.
801 2021-02-03  Jonathan Wright  <jonathan.wright@arm.com>
803         * config/aarch64/aarch64-simd-builtins.def: Add
804         [su]mlal_hi_lane[q] builtin generator macros.
805         * config/aarch64/aarch64-simd.md
806         (aarch64_<su>mlal_hi_lane<mode>_insn): Define.
807         (aarch64_<su>mlal_hi_lane<mode>): Define.
808         (aarch64_<su>mlal_hi_laneq<mode>_insn): Define.
809         (aarch64_<su>mlal_hi_laneq<mode>): Define.
810         * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Use RTL
811         builtin instead of inline asm.
812         (vmlal_high_lane_s32): Likewise.
813         (vmlal_high_lane_u16): Likewise.
814         (vmlal_high_lane_u32): Likewise.
815         (vmlal_high_laneq_s16): Likewise.
816         (vmlal_high_laneq_s32): Likewise.
817         (vmlal_high_laneq_u16): Likewise.
818         (vmlal_high_laneq_u32): Likewise.
820 2021-02-03  Jonathan Wright  <jonathan.wright@arm.com>
822         * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_hi_n
823         builtin generator macros.
824         * config/aarch64/aarch64-simd.md (aarch64_<su>mlsl_hi_n<mode>_insn):
825         Define.
826         (aarch64_<su>mlsl_hi_n<mode>): Define.
827         * config/aarch64/arm_neon.h (vmlsl_high_n_s16): Use RTL builtin
828         instead of inline asm.
829         (vmlsl_high_n_s32): Likewise.
830         (vmlsl_high_n_u16): Likewise.
831         (vmlsl_high_n_u32): Likewise.
833 2021-02-03  Jonathan Wright  <jonathan.wright@arm.com>
835         * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal_hi_n
836         builtin generator macros.
837         * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_hi_n<mode>_insn):
838         Define.
839         (aarch64_<su>mlal_hi_n<mode>): Define.
840         * config/aarch64/arm_neon.h (vmlal_high_n_s16): Use RTL builtin
841         instead of inline asm.
842         (vmlal_high_n_s32): Likewise.
843         (vmlal_high_n_u16): Likewise.
844         (vmlal_high_n_u32): Likewise.
846 2021-02-03  Jonathan Wright  <jonathan.wright@arm.com>
848         * config/aarch64/aarch64-simd-builtins.def: Add RTL builtin
849         generator macros.
850         * config/aarch64/aarch64-simd.md (*aarch64_<su>mlal_hi<mode>):
851         Rename to...
852         (aarch64_<su>mlal_hi<mode>_insn): This.
853         (aarch64_<su>mlal_hi<mode>): Define.
854         * config/aarch64/arm_neon.h (vmlal_high_s8): Use RTL builtin
855         instead of inline asm.
856         (vmlal_high_s16): Likewise.
857         (vmlal_high_s32): Likewise.
858         (vmlal_high_u8): Likewise.
859         (vmlal_high_u16): Likewise.
860         (vmlal_high_u32): Likewise.
862 2021-02-03  Ilya Leoshkevich  <iii@linux.ibm.com>
864         * lra-spills.c (remove_pseudos): Call lra_update_insn_recog_data()
865         after calling alter_subreg() on a (mem).
867 2021-02-03  Martin Liska  <mliska@suse.cz>
869         PR lto/98912
870         * lto-streamer-out.c (produce_lto_section): Fill up missing
871         padding.
872         * lto-streamer.h (struct lto_section): Add _padding field.
874 2021-02-03  Richard Biener  <rguenther@suse.de>
876         * lto-streamer.c (lto_get_section_name): Free temporary
877         buffer.
878         * tree-loop-distribution.c
879         (loop_distribution::merge_dep_scc_partitions): Free edge data.
881 2021-02-03  Jakub Jelinek  <jakub@redhat.com>
883         PR middle-end/97487
884         * ifcvt.c (noce_can_force_operand): New function.
885         (noce_emit_move_insn): Use it.
886         (noce_try_sign_mask): Likewise.  Formatting fix.
888 2021-02-03  Jakub Jelinek  <jakub@redhat.com>
890         PR middle-end/97971
891         * lra-constraints.c (process_alt_operands): For inline asm, don't call
892         fatal_insn, but instead return false.
894 2021-02-03  Jakub Jelinek  <jakub@redhat.com>
896         PR tree-optimization/98287
897         * config/i386/mmx.md (<insn><mode>3): For shifts don't enable expander
898         for V1DImode.
900 2021-02-03  Tamar Christina  <tamar.christina@arm.com>
902         PR tree-optimization/98928
903         * tree-vect-loop.c (vect_analyze_loop_2): Change
904         STMT_VINFO_SLP_VECT_ONLY to STMT_VINFO_SLP_VECT_ONLY_PATTERN.
905         * tree-vect-slp-patterns.c (complex_pattern::build): Likewise.
906         * tree-vectorizer.h (STMT_VINFO_SLP_VECT_ONLY_PATTERN): New.
907         (class _stmt_vec_info): Add slp_vect_pattern_only_p.
909 2021-02-02  Richard Biener  <rguenther@suse.de>
911         * gimple-loop-interchange.cc (prepare_data_references):
912         Release vectors.
913         * gimple-loop-jam.c (tree_loop_unroll_and_jam): Likewise.
914         * tree-ssa-loop-im.c (hoist_memory_references): Likewise.
915         * tree-vect-stmts.c (vectorizable_condition): Do not
916         allocate vectors.
917         (vectorizable_comparison): Likewise.
919 2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
921         * config/aarch64/aarch64-simd-builtins.def (ursqrte): Define builtin.
922         * config/aarch64/aarch64-simd.md (aarch64_ursqrte<mode>): New pattern.
923         * config/aarch64/arm_neon.h (vrsqrte_u32): Reimplement using builtin.
924         (vrsqrteq_u32): Likewise.
926 2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
928         * config/aarch64/aarch64-simd-builtins.def (sqxtun2): Define builtin.
929         * config/aarch64/aarch64-simd.md (aarch64_sqxtun2<mode>_le): Define.
930         (aarch64_sqxtun2<mode>_be): Likewise.
931         (aarch64_sqxtun2<mode>): Likewise.
932         * config/aarch64/arm_neon.h (vqmovun_high_s16): Reimplement using builtin.
933         (vqmovun_high_s32): Likewise.
934         (vqmovun_high_s64): Likewise.
935         * config/aarch64/iterators.md (UNSPEC_SQXTUN2): Define.
937 2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
939         * config/aarch64/aarch64-simd-builtins.def (bfdot_lane, bfdot_laneq): Use
940         AUTO_FP flags.
941         (bfmlalb_lane, bfmlalt_lane, bfmlalb_lane_q, bfmlalt_lane_q): Use FP flags.
943 2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
945         * config/aarch64/aarch64-simd-builtins.def (fcmla_lane0, fcmla_lane90,
946         fcmla_lane180, fcmla_lane270, fcmlaq_lane0, fcmlaq_lane90, fcmlaq_lane180,
947         fcmlaq_lane270, scvtf, ucvtf, fcvtzs, fcvtzu, scvtfsi, scvtfdi, ucvtfsi,
948         ucvtfdi, fcvtzshf, fcvtzuhf, fmlal_lane_low, fmlsl_lane_low,
949         fmlal_laneq_low, fmlsl_laneq_low, fmlalq_lane_low, fmlslq_lane_low,
950         fmlalq_laneq_low, fmlslq_laneq_low, fmlal_lane_high, fmlsl_lane_high,
951         fmlal_laneq_high, fmlsl_laneq_high, fmlalq_lane_high, fmlslq_lane_high,
952         fmlalq_laneq_high, fmlslq_laneq_high): Use FP flags.
954 2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
956         * config/aarch64/aarch64-builtins.c (FLAG_LOAD): Define.
957         * config/aarch64/aarch64-simd-builtins.def (ld1x2, ld2, ld3, ld4, ld2r,
958         ld3r, ld4r, ld1, ld1x3, ld1x4): Use LOAD flags.
960 2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
962         * config/aarch64/aarch64-simd-builtins.def (combine, zip1, zip2,
963         uzp1, uzp2, trn1, trn2, simd_bsl): Use AUTO_FP flags.
965 2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
967         * config/aarch64/aarch64-simd-builtins.def (clrsb, clz, ctz, popcount,
968         vec_smult_lane_, vec_smlal_lane_, vec_smult_laneq_, vec_smlal_laneq_,
969         vec_umult_lane_, vec_umlal_lane_, vec_umult_laneq_, vec_umlal_laneq_,
970         ashl, sshl, ushl, srshl, urshl, sdot_lane, udot_lane, sdot_laneq,
971         udot_laneq, usdot_lane, usdot_laneq, sudot_lane, sudot_laneq, ashr,
972         ashr_simd, lshr, lshr_simd, srshr_n, urshr_n, ssra_n, usra_n, srsra_n,
973         ursra_n, sshll_n, ushll_n, sshll2_n, ushll2_n, ssri_n, usri_n, ssli_n,
974         ssli_n, usli_n, bswap, rbit, simd_bsl, eor3q, rax1q, xarq, bcaxq): Use
975         NONE builtin flags.
977 2021-02-02  Jakub Jelinek  <jakub@redhat.com>
979         PR tree-optimization/98848
980         * tree-vect-patterns.c (vect_recog_over_widening_pattern): Punt if
981         STMT_VINFO_DEF_TYPE (last_stmt_info) is vect_reduction_def.
983 2021-02-02  Kito Cheng  <kito.cheng@sifive.com>
985         PR target/98743
986         * expr.c: Check mode before calling store_expr.
988 2021-02-02  Christophe Lyon  <christophe.lyon@linaro.org>
990         * config/arm/iterators.md (supf): Remove VORNQ_S and VORNQ_U.
991         (VORNQ): Remove.
992         * config/arm/mve.md (mve_vornq_s<mode>): New entry for vorn
993         instruction using expression ior.
994         (mve_vornq_u<mode>): New expander.
995         (mve_vornq_f<mode>): Use ior code instead of unspec.
996         * config/arm/unspecs.md (VORNQ_S, VORNQ_U, VORNQ_F): Remove.
998 2021-02-02  Alexandre Oliva  <oliva@adacore.com>
1000         * tree-nested.c (convert_nonlocal_reference_op): Move
1001         current_function_decl restore after re-gimplification.
1002         (convert_local_reference_op): Likewise.
1004 2021-02-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1006         * config/aarch64/aarch64-simd-builtins.def (rshrn, rshrn2):
1007         Define builtins.
1008         * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le):
1009         Define.
1010         (aarch64_rshrn<mode>_insn_be): Likewise.
1011         (aarch64_rshrn<mode>): Likewise.
1012         (aarch64_rshrn2<mode>_insn_le): Likewise.
1013         (aarch64_rshrn2<mode>_insn_be): Likewise.
1014         (aarch64_rshrn2<mode>): Likewise.
1015         * config/aarch64/aarch64.md (unspec): Add UNSPEC_RSHRN.
1016         * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Reimplement
1017         using builtin.
1018         (vrshrn_high_n_s32): Likewise.
1019         (vrshrn_high_n_s64): Likewise.
1020         (vrshrn_high_n_u16): Likewise.
1021         (vrshrn_high_n_u32): Likewise.
1022         (vrshrn_high_n_u64): Likewise.
1023         (vrshrn_n_s16): Likewise.
1024         (vrshrn_n_s32): Likewise.
1025         (vrshrn_n_s64): Likewise.
1026         (vrshrn_n_u16): Likewise.
1027         (vrshrn_n_u32): Likewise.
1028         (vrshrn_n_u64): Likewise.
1030 2021-02-01  Sergei Trofimovich  <siarheit@google.com>
1032         PR tree-optimization/98499
1033         * ipa-modref.c (analyze_ssa_name_flags): treat RVO
1034         conservatively and assume all possible side-effects.
1036 2021-02-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1038         * config/aarch64/aarch64-simd-builtins.def (vec_unpacks_hi,
1039         vec_unpacku_hi_): Define builtins.
1040         * config/aarch64/arm_neon.h (vmovl_high_s8): Reimplement using
1041         builtin.
1042         (vmovl_high_s16): Likewise.
1043         (vmovl_high_s32): Likewise.
1044         (vmovl_high_u8): Likewise.
1045         (vmovl_high_u16): Likewise.
1046         (vmovl_high_u32): Likewise.
1048 2021-02-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1050         * config/aarch64/aarch64-simd-builtins.def (sabdl, uabdl):
1051         Define builtins.
1052         * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): New
1053         pattern.
1054         * config/aarch64/aarch64.md (unspec): Define UNSPEC_SABDL,
1055         UNSPEC_UABDL.
1056         * config/aarch64/arm_neon.h (vabdl_s8): Reimplemet using
1057         builtin.
1058         (vabdl_s16): Likewise.
1059         (vabdl_s32): Likewise.
1060         (vabdl_u8): Likewise.
1061         (vabdl_u16): Likewise.
1062         (vabdl_u32): Likewise.
1063         * config/aarch64/iterators.md (ABDL): New int iterator.
1064         (sur): Handle UNSPEC_SABDL, UNSPEC_UABDL.
1066 2021-02-01  Martin Sebor  <msebor@redhat.com>
1068         * tree.h (BLOCK_VARS): Add comment.
1069         (BLOCK_SUBBLOCKS): Same.
1070         (BLOCK_SUPERCONTEXT): Same.
1071         (BLOCK_ABSTRACT_ORIGIN): Same.
1072         (inlined_function_outer_scope_p): Same.
1074 2021-02-01  Martin Sebor  <msebor@redhat.com>
1076         PR middle-end/97172
1077         * attribs.c (attr_access::free_lang_data): Define new function.
1078         * attribs.h (attr_access::free_lang_data): Declare new function.
1080 2021-02-01  Richard Biener  <rguenther@suse.de>
1082         * vec.h (auto_vec::auto_vec): Add memory stat parameters
1083         and pass them on.
1084         * bitmap.h (auto_bitmap::auto_bitmap): Likewise.
1086 2021-02-01  Tamar Christina  <tamar.christina@arm.com>
1088         * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_n<mode>,
1089         aarch64_<su>mlsl<mode>, aarch64_<su>mlsl_n<mode>): Flip mult operands.
1091 2021-02-01  Richard Biener  <rguenther@suse.de>
1093         PR rtl-optimization/98863
1094         * config/i386/i386-features.c (convert_scalars_to_vector):
1095         Set DF_RD_PRUNE_DEAD_DEFS.
1097 2021-01-31  Eric Botcazou  <ebotcazou@adacore.com>
1099         * system.h (SIZE_MAX): Define if not already defined.
1101 2021-01-30  Aaron Sawdey  <acsawdey@linux.ibm.com>
1103         * config/rs6000/genfusion.pl (gen_2logical): New function to
1104         generate patterns for logical-logical fusion.
1105         * config/rs6000/fusion.md: Regenerated patterns.
1106         * config/rs6000/rs6000-cpus.def: Add
1107         OPTION_MASK_P10_FUSION_2LOGICAL.
1108         * config/rs6000/rs6000.c (rs6000_option_override_internal):
1109         Enable logical-logical fusion for p10.
1110         * config/rs6000/rs6000.opt: Add -mpower10-fusion-2logical.
1112 2021-01-30  David Edelsohn  <dje.gcc@gmail.com>
1114         * config/rs6000/rs6000.opt: Add periods to new AIX options.
1116 2021-01-30  David Edelsohn  <dje.gcc@gmail.com>
1118         * config/rs6000/rs6000.opt (mabi=vec-extabi): New.
1119         (mabi=vec-default): New.
1120         * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
1121         __EXTABI__ for AIX Vector extended ABI.
1122         * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print AIX Vector
1123         extabi info.
1124         (conditional_register_usage): If AIX vec_extabi enabled, vs20-vs31
1125         are non-volatile.
1126         * doc/invoke.texi (PowerPC mabi): Add AIX vec-extabi and vec-default.
1128 2021-01-30  Jakub Jelinek  <jakub@redhat.com>
1130         * config/i386/i386-features.c (remove_partial_avx_dependency): Clear
1131         DF_DEFER_INSN_RESCAN after calling df_process_deferred_rescans.
1133 2021-01-29  Vladimir N. Makarov  <vmakarov@redhat.com>
1135         PR target/97701
1136         * lra-constraints.c (in_class_p): Don't narrow class only for REG
1137         or MEM.
1139 2021-01-29  Will Schmidt  <will_schmidt@vnet.ibm.com>
1141         * config/rs6000/rs6000-call.c (rs6000_expand_binup_builtin): Add
1142         clauses for CODE_FOR_vsx_xvcvuxddp_scale and
1143         CODE_FOR_vsx_xvcvsxddp_scale to the parameter checking code.
1145 2021-01-29  Andrew MacLeod  <amacleod@redhat.com>
1147         PR tree-optimization/98866
1148         * gimple-range-gori.h (gori_compute:set_range_invariant): New.
1149         * gimple-range-gori.cc (gori_map::set_range_invariant): New.
1150         (gori_map::m_maybe_invariant): Rename from all_outgoing.
1151         (gori_map::gori_map): Rename all_outgoing to m_maybe_invariant.
1152         (gori_map::is_export_p): Ditto.
1153         (gori_map::calculate_gori): Ditto.
1154         (gori_compute::set_range_invariant): New.
1155         * gimple-range.cc (gimple_ranger::range_of_stmt): Set range
1156         invariant for pointers evaluating to [1, +INF].
1158 2021-01-29  Richard Biener  <rguenther@suse.de>
1160         PR rtl-optimization/98863
1161         * config/i386/i386-features.c (remove_partial_avx_dependency):
1162         Do not perform DF analysis.
1163         (pass_data_remove_partial_avx_dependency): Remove
1164         TODO_df_finish.
1166 2021-01-29  Jonathan Wright  <jonathan.wright@arm.com>
1168         * config/aarch64/aarch64-simd-builtins.def: Add [su]mull_n
1169         builtin generator macros.
1170         * config/aarch64/aarch64-simd.md (aarch64_<su>mull_n<mode>):
1171         Define.
1172         * config/aarch64/arm_neon.h (vmull_n_s16): Use RTL builtin
1173         instead of inline asm.
1174         (vmull_n_s32): Likewise.
1175         (vmull_n_u16): Likewise.
1176         (vmull_n_u32): Likewise.
1178 2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1180         * config/aarch64/aarch64-simd-builtins.def (sabdl2, uabdl2):
1181         Define builtins.
1182         * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>_3):
1183         Rename to...
1184         (aarch64_<sur>abdl2<mode>): ... This.
1185         (<sur>sadv16qi): Adjust use of above.
1186         * config/aarch64/arm_neon.h (vabdl_high_s8): Reimplement using
1187         builtin.
1188         (vabdl_high_s16): Likewise.
1189         (vabdl_high_s32): Likewise.
1190         (vabdl_high_u8): Likewise.
1191         (vabdl_high_u16): Likewise.
1192         (vabdl_high_u32): Likewise.
1194 2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1196         * config/aarch64/aarch64-simd-builtins.def (sabal2): Define
1197         builtin.
1198         (uabal2): Likewise.
1199         * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): New
1200         pattern.
1201         * config/aarch64/aarch64.md (unspec): Add UNSPEC_SABAL2 and
1202         UNSPEC_UABAL2.
1203         * config/aarch64/arm_neon.h (vabal_high_s8): Reimplement using
1204         builtin.
1205         (vabal_high_s16): Likewise.
1206         (vabal_high_s32): Likewise.
1207         (vabal_high_u8): Likewise.
1208         (vabal_high_u16): Likewise.
1209         (vabal_high_u32): Likewise.
1210         * config/aarch64/iterators.md (ABAL2): New mode iterator.
1211         (sur): Handle UNSPEC_SABAL2, UNSPEC_UABAL2.
1213 2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1215         * config/aarch64/aarch64-simd-builtins.def (sabal): Define
1216         builtin.
1217         (uabal): Likewise.
1218         * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>_4):
1219         Rename to...
1220         (aarch64_<sur>abal<mode>): ... This
1221         (<sur>sadv16qi): Adust use of the above.
1222         * config/aarch64/arm_neon.h (vabal_s8): Reimplement using
1223         builtin.
1224         (vabal_s16): Likewise.
1225         (vabal_s32): Likewise.
1226         (vabal_u8): Likewise.
1227         (vabal_u16): Likewise.
1228         (vabal_u32): Likewise.
1230 2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1232         * config/aarch64/aarch64-simd-builtins.def (saddlv, uaddlv):
1233         Define builtins.
1234         * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
1235         Define.
1236         * config/aarch64/arm_neon.h (vaddlv_s8): Reimplement using
1237         builtin.
1238         (vaddlv_s16): Likewise.
1239         (vaddlv_u8): Likewise.
1240         (vaddlv_u16): Likewise.
1241         (vaddlvq_s8): Likewise.
1242         (vaddlvq_s16): Likewise.
1243         (vaddlvq_s32): Likewise.
1244         (vaddlvq_u8): Likewise.
1245         (vaddlvq_u16): Likewise.
1246         (vaddlvq_u32): Likewise.
1247         (vaddlv_s32): Likewise.
1248         (vaddlv_u32): Likewise.
1249         * config/aarch64/iterators.md (VDQV_L): New mode iterator.
1250         (unspec): Add UNSPEC_SADDLV, UNSPEC_UADDLV.
1251         (Vwstype): New mode attribute.
1252         (Vwsuf): Likewise.
1253         (VWIDE_S): Likewise.
1254         (USADDLV): New int iterator.
1255         (su): Handle UNSPEC_SADDLV, UNSPEC_UADDLV.
1257 2021-01-29  Jonathan Wright  <jonathan.wright@arm.com>
1259         * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_lane[q]
1260         builtin generator macros.
1261         * config/aarch64/aarch64-simd.md (aarch64_vec_<su>mlsl_lane<Qlane>):
1262         Define.
1263         * config/aarch64/arm_neon.h (vmlsl_lane_s16): Use RTL builtin
1264         instead of inline asm.
1265         (vmlsl_lane_s32): Likewise.
1266         (vmlsl_lane_u16): Likewise.
1267         (vmlsl_lane_u32): Likewise.
1268         (vmlsl_laneq_s16): Likewise.
1269         (vmlsl_laneq_s32): Likewise.
1270         (vmlsl_laneq_u16): Likewise.
1271         (vmlsl_laneq_u32): Likewise.
1273 2021-01-29  Richard Biener  <rguenther@suse.de>
1275         * doc/invoke.texi (--param max-gcse-memory): Document unit
1276         of size.
1277         * gcse.c (gcse_or_cprop_is_too_expensive): Adjust.
1278         * params.opt (--param max-gcse-memory): Adjust default and
1279         document unit of size.
1281 2021-01-29  Richard Biener  <rguenther@suse.de>
1283         PR rtl-optimization/98863
1284         * gcse.c (gcse_or_cprop_is_too_expensive): Use unsigned
1285         HOST_WIDE_INT for the memory estimate.
1287 2021-01-29  Bin Cheng  <bin.cheng@linux.alibaba.com>
1288             Richard Biener  <rguenther@suse.de>
1290         PR tree-optimization/97627
1291         * tree-ssa-loop-niter.c (number_of_iterations_exit_assumptions):
1292         Do not analyze fake edges.
1294 2021-01-29  Richard Biener  <rguenther@suse.de>
1296         PR rtl-optimization/98144
1297         * df.h (df_mir_bb_info): Add con_visited member.
1298         * df-problems.c (df_mir_alloc): Initialize con_visited,
1299         do not fully populate IN and OUT.
1300         (df_mir_reset): Likewise.
1301         (df_mir_confluence_0): Set con_visited.
1302         (df_mir_confluence_n): Properly handle implicitely
1303         fully populated IN and OUT as designated by con_visited
1304         and update con_visited accordingly.
1306 2021-01-29  Jakub Jelinek  <jakub@redhat.com>
1308         PR target/98849
1309         * config/arm/vec-common.md (mve_vshlq_<supf><mode>,
1310         vashl<mode>3, vashr<mode>3, vlshr<mode>3): Add
1311         && !TARGET_REALLY_IWMMXT to conditions.
1313 2021-01-29  Jakub Jelinek  <jakub@redhat.com>
1315         PR debug/98331
1316         * cfgbuild.c (find_bb_boundaries): Reset debug_insn when seeing
1317         a BARRIER.
1319 2021-01-28  Marek Polacek  <polacek@redhat.com>
1321         PR c++/94775
1322         * stor-layout.c (finalize_type_size): If we reset TYPE_USER_ALIGN in
1323         the main variant, maybe reset it in its variants too.
1324         * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
1325         (check_aligned_type): Check if TYPE_USER_ALIGN match.
1327 2021-01-28  Christophe Lyon  <christophe.lyon@linaro.org>
1329         PR target/98730
1330         * config/arm/arm.c (arm_rtx_costs_internal): Adjust cost of vector
1331         of constant zero for comparisons.
1333 2021-01-28  Michael Meissner  <meissner@linux.ibm.com>
1335         * config/rs6000/rs6000.c (rs6000_mangle_decl_assembler_name): Add
1336         support for mapping built-in function names for long double
1337         built-in functions if long double is IEEE 128-bit.
1339 2021-01-28  Jonathan Wright  <jonathan.wright@arm.com>
1341         * config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_n
1342         builtin generator macros.
1343         * config/aarch64/aarch64-simd.md (aarch64_<su>mlsl_n<mode>):
1344         Define.
1345         * config/aarch64/arm_neon.h (vmlsl_n_s16): Use RTL builtin
1346         instead of inline asm.
1347         (vmlsl_n_s32): Likewise.
1348         (vmlsl_n_u16): Likewise.
1349         (vmlsl_n_u32): Likewise.
1351 2021-01-28  Jonathan Wright  <jonathan.wright@arm.com>
1353         * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal_n
1354         builtin generator macros.
1355         * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_n<mode>):
1356         Define.
1357         * config/aarch64/arm_neon.h (vmlal_n_s16): Use RTL builtin
1358         instead of inline asm.
1359         (vmlal_n_s32): Likewise.
1360         (vmlal_n_u16): Likewise.
1361         (vmlal_n_u32): Likewise.
1363 2021-01-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1365         * config/aarch64/aarch64-simd-builtins.def (shrn2): Define
1366         builtin.
1367         * config/aarch64/aarch64-simd.md (aarch64_shrn2<mode>_insn_le):
1368         Define.
1369         (aarch64_shrn2<mode>_insn_be): Likewise.
1370         (aarch64_shrn2<mode>): Likewise.
1371         * config/aarch64/arm_neon.h (vshrn_high_n_s16): Reimlplement
1372         using builtins.
1373         (vshrn_high_n_s32): Likewise.
1374         (vshrn_high_n_s64): Likewise.
1375         (vshrn_high_n_u16): Likewise.
1376         (vshrn_high_n_u32): Likewise.
1377         (vshrn_high_n_u64): Likewise.
1379 2021-01-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1381         * config/aarch64/aarch64-simd-builtins.def (shrn): Define
1382         builtin.
1383         * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le):
1384         Define.
1385         (aarch64_shrn<mode>_insn_be): Likewise.
1386         (aarch64_shrn<mode>): Likewise.
1387         * config/aarch64/arm_neon.h (vshrn_n_s16): Reimplement using
1388         builtins.
1389         (vshrn_n_s32): Likewise.
1390         (vshrn_n_s64): Likewise.
1391         (vshrn_n_u16): Likewise.
1392         (vshrn_n_u32): Likewise.
1393         (vshrn_n_u64): Likewise.
1394         * config/aarch64/iterators.md (vn_mode): New mode attribute.
1396 2021-01-28  Richard Biener  <rguenther@suse.de>
1398         PR rtl-optimization/80960
1399         * dse.c (check_mem_read_rtx): Call get_addr on the
1400         offsetted address.
1402 2021-01-28  Xionghu Luo  <luoxhu@linux.ibm.com>
1403             David Edelsohn  <dje.gcc@gmail.com>
1405         PR target/98799
1406         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1407         Don't generate VIEW_CONVERT_EXPR for fcode ALTIVEC_BUILTIN_VEC_INSERT
1408         when -m32.
1409         * config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var):
1410         Delete.
1411         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Remove the
1412         wrapper call rs6000_expand_vector_set_var for cleanup.  Call
1413         rs6000_expand_vector_set_var_p9 and rs6000_expand_vector_set_var_p8
1414         directly.
1415         (rs6000_expand_vector_set_var): Delete.
1416         (rs6000_expand_vector_set_var_p9): Make static.
1417         (rs6000_expand_vector_set_var_p8): Make static.
1419 2021-01-28  Xing GUO  <higuoxing@gmail.com>
1421         * common/config/riscv/riscv-common.c
1422         (riscv_subset_list::parsing_subset_version): Fix -march option parsing
1423         when `p` extension exists.
1425 2021-01-27  Vladimir N. Makarov  <vmakarov@redhat.com>
1427         PR rtl-optimization/97684
1428         * ira.c (ira): Call ira_set_pseudo_classes before
1429         update_equiv_regs when it is necessary.
1431 2021-01-27  Jakub Jelinek  <jakub@redhat.com>
1433         PR target/98853
1434         * config/aarch64/aarch64.md (*aarch64_bfxilsi_uxtw): Use
1435         %w0, %w1 and %2 instead of %0, %1 and %2.
1437 2021-01-27  Aaron Sawdey  <acsawdey@linux.ibm.com>
1439         * config/rs6000/genfusion.pl: New script to generate
1440         define_insn_and_split patterns so combine can arrange fused
1441         instructions next to each other.
1442         * config/rs6000/fusion.md: New file, generated fused instruction
1443         patterns for combine.
1444         * config/rs6000/predicates.md (const_m1_to_1_operand): New predicate.
1445         (non_update_memory_operand): New predicate.
1446         * config/rs6000/rs6000-cpus.def: Add OPTION_MASK_P10_FUSION and
1447         OPTION_MASK_P10_FUSION_LD_CMPI to ISA_3_1_MASKS_SERVER and
1448         POWERPC_MASKS.
1449         * config/rs6000/rs6000-protos.h (address_is_non_pfx_d_or_x): Add
1450         prototype.
1451         * config/rs6000/rs6000.c (rs6000_option_override_internal):
1452         Automatically set OPTION_MASK_P10_FUSION and
1453         OPTION_MASK_P10_FUSION_LD_CMPI if target is power10.
1454         (rs600_opt_masks): Allow -mpower10-fusion
1455         in function attributes.
1456         (address_is_non_pfx_d_or_x): New function.
1457         * config/rs6000/rs6000.h: Add MASK_P10_FUSION.
1458         * config/rs6000/rs6000.md: Include fusion.md.
1459         * config/rs6000/rs6000.opt: Add -mpower10-fusion
1460         and -mpower10-fusion-ld-cmpi.
1461         * config/rs6000/t-rs6000: Add dependencies involving fusion.md.
1463 2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>
1465         * config/aarch64/aarch64-simd-builtins.def: Add [su]mlal
1466         builtin generator macros.
1467         * config/aarch64/aarch64-simd.md (*aarch64_<su>mlal<mode>):
1468         Rename to...
1469         (aarch64_<su>mlal<mode>): This.
1470         * config/aarch64/arm_neon.h (vmlal_s8): Use RTL builtin
1471         instead of inline asm.
1472         (vmlal_s16): Likewise.
1473         (vmlal_s32): Likewise.
1474         (vmlal_u8): Likewise.
1475         (vmlal_u16): Likewise.
1476         (vmlal_u32): Likewise.
1478 2021-01-27  Richard Biener  <rguenther@suse.de>
1480         PR tree-optimization/98854
1481         * tree-vect-slp.c (vect_build_slp_tree_2): Also build
1482         PHIs from scalars when the number of CTORs matches the
1483         number of children.
1485 2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>
1487         * config/aarch64/aarch64-simd-builtins.def: Add mls_n builtin
1488         generator macro.
1489         * config/aarch64/aarch64-simd.md (*aarch64_mls_elt_merge<mode>):
1490         Rename to...
1491         (aarch64_mls_n<mode>): This.
1492         * config/aarch64/arm_neon.h (vmls_n_s16): Use RTL builtin
1493         instead of asm.
1494         (vmls_n_s32): Likewise.
1495         (vmls_n_u16): Likewise.
1496         (vmls_n_u32): Likewise.
1497         (vmlsq_n_s16): Likewise.
1498         (vmlsq_n_s32): Likewise.
1499         (vmlsq_n_u16): Likewise.
1500         (vmlsq_n_u32): Likewise.
1502 2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>
1504         * config/aarch64/aarch64-simd-builtins.def: Add mls builtin
1505         generator macro.
1506         * config/aarch64/arm_neon.h (vmls_s8): Use RTL builtin rather
1507         than asm.
1508         (vmls_s16): Likewise.
1509         (vmls_s32): Likewise.
1510         (vmls_u8): Likewise.
1511         (vmls_u16): Likewise.
1512         (vmls_u32): Likewise.
1513         (vmlsq_s8): Likewise.
1514         (vmlsq_s16): Likewise.
1515         (vmlsq_s32): Likewise.
1516         (vmlsq_u8): Likewise.
1517         (vmlsq_u16): Likewise.
1518         (vmlsq_u32): Likewise.
1520 2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>
1522         * config/aarch64/aarch64-simd-builtins.def: Add mla_n builtin
1523         generator macro.
1524         * config/aarch64/aarch64-simd.md (*aarch64_mla_elt_merge<mode>):
1525         Rename to...
1526         (aarch64_mla_n<mode>): This.
1527         * config/aarch64/arm_neon.h (vmla_n_s16): Use RTL builtin
1528         instead of asm.
1529         (vmla_n_s32): Likewise.
1530         (vmla_n_u16): Likewise.
1531         (vmla_n_u32): Likewise.
1532         (vmlaq_n_s16): Likewise.
1533         (vmlaq_n_s32): Likewise.
1534         (vmlaq_n_u16): Likewise.
1535         (vmlaq_n_u32): Likewise.
1537 2021-01-27  liuhongt  <hongtao.liu@intel.com>
1539         PR target/98833
1540         * config/i386/sse.md (sse2_gt<mode>3): Drop !TARGET_XOP in condition.
1541         (*sse2_eq<mode>3): Ditto.
1543 2021-01-27  Jakub Jelinek  <jakub@redhat.com>
1545         * tree-pass.h (PROP_trees): Rename to ...
1546         (PROP_gimple): ... this.
1547         * cfgexpand.c (pass_data_expand): Replace PROP_trees with PROP_gimple.
1548         * passes.c (execute_function_dump, execute_function_todo,
1549         execute_one_ipa_transform_pass, execute_one_pass): Likewise.
1550         * varpool.c (ctor_for_folding): Likewise.
1552 2021-01-27  Jakub Jelinek  <jakub@redhat.com>
1554         PR tree-optimization/97260
1555         * varpool.c: Include tree-pass.h.
1556         (ctor_for_folding): In GENERIC return DECL_INITIAL for TREE_READONLY
1557         non-TREE_SIDE_EFFECTS automatic variables.
1559 2021-01-26  Paul Fee  <paul.f.fee@gmail.com>
1561         * doc/cpp.texi (__cplusplus): Document value for -std=c++23
1562         or -std=gnu++23.
1563         * doc/invoke.texi: Document -std=c++23 and -std=gnu++23.
1564         * dwarf2out.c (highest_c_language): Recognise C++20 and C++23.
1565         (gen_compile_unit_die): Recognise C++23.
1567 2021-01-26  Jakub Jelinek  <jakub@redhat.com>
1569         PR bootstrap/98839
1570         * dwarf2asm.c (dw2_assemble_integer): Cast DWARF2_ADDR_SIZE to int
1571         in comparison.
1573 2021-01-26  Jakub Jelinek  <jakub@redhat.com>
1575         PR target/98681
1576         * config/aarch64/aarch64.c (aarch64_mask_and_shift_for_ubfiz_p):
1577         Use UINTVAL (shft_amnt) and UINTVAL (mask) instead of INTVAL (shft_amnt)
1578         and INTVAL (mask).  Add && INTVAL (mask) > 0 condition.
1580 2021-01-26  Richard Biener  <rguenther@suse.de>
1582         * gimple-pretty-print.c (dump_binary_rhs): Handle
1583         VEC_WIDEN_{PLUS,MINUS}_{LO,HI}_EXPR.
1585 2021-01-26  Richard Biener  <rguenther@suse.de>
1587         PR middle-end/98726
1588         * tree.h (vector_cst_int_elt): Remove.
1589         * tree.c (vector_cst_int_elt): Use poly_wide_int for computations,
1590         make static.
1592 2021-01-26  Andrew Stubbs  <ams@codesourcery.com>
1594         * config/gcn/gcn.c (gcn_expand_reduc_scalar): Use move instructions
1595         for V64DFmode min/max reductions.
1597 2021-01-26  Jakub Jelinek  <jakub@redhat.com>
1599         * dwarf2asm.c (dw2_assemble_integer): Handle size twice as large
1600         as DWARF2_ADDR_SIZE if x is not a scalar int by emitting it as
1601         two halves, one with x and the other with const0_rtx, ordered
1602         depending on endianity.
1604 2021-01-26  Alexandre Oliva  <oliva@adacore.com>
1606         * gimplify.c (gimplify_decl_expr): Skip asan marking calls for
1607         temporaries not seen in binding block, and not about to be
1608         added as gimple variables.
1610 2021-01-25  Martin Sebor  <msebor@redhat.com>
1612         PR c++/98646
1613         * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Adjust warning text.
1615 2021-01-25  Martin Liska  <mliska@suse.cz>
1617         * value-prof.c (get_nth_most_common_value): Use %s instead
1618         of %qs string.
1620 2021-01-25  Jakub Jelinek  <jakub@redhat.com>
1622         PR debug/98811
1623         * configure.ac (HAVE_AS_GDWARF_5_DEBUG_FLAG): Only define if
1624         readelf -wi is able to read the emitted .debug_info back.
1625         * configure: Regenerated.
1627 2021-01-25  Martin Liska  <mliska@suse.cz>
1629         PR gcov-profile/98739
1630         * common.opt: Add missing sign symbol.
1631         * value-prof.c (get_nth_most_common_value): Restore handling
1632         of PROFILE_REPRODUCIBILITY_PARALLEL_RUNS and
1633         PROFILE_REPRODUCIBILITY_MULTITHREADED.
1635 2021-01-25  Richard Biener  <rguenther@suse.de>
1637         PR middle-end/98807
1638         * tree.c (vector_element_bits): Always use precision of
1639         the element type for boolean vectors.
1641 2021-01-25  Sebastian Huber  <sebastian.huber@embedded-brains.de>
1643         * config/rtems.h (STARTFILE_SPEC): Remove qnolinkcmds.
1644         (ENDFILE_SPEC): Evaluate qnolinkcmds.
1646 2021-01-25  Sebastian Huber  <sebastian.huber@embedded-brains.de>
1648         * config/rtems.h (STARTFILE_SPEC): Remove nostdlib and
1649         nostartfiles handling since this is already done by
1650         LINK_COMMAND_SPEC.  Evaluate qnolinkcmds.
1651         (ENDFILE_SPEC): Remove nostdlib and nostartfiles handling since this
1652         is already done by LINK_COMMAND_SPEC.
1653         (LIB_SPECS): Remove nostdlib and nodefaultlibs handling since
1654         this is already done by LINK_COMMAND_SPEC.  Remove qnolinkcmds
1655         evaluation.
1657 2021-01-25  Jakub Jelinek  <jakub@redhat.com>
1659         PR testsuite/98771
1660         * fold-const-call.c (host_size_t_cst_p): Renamed to ...
1661         (size_t_cst_p): ... this.  Check and store unsigned HOST_WIDE_INT
1662         value rather than host size_t.
1663         (fold_const_call): Change type of s2 from size_t to
1664         unsigned HOST_WIDE_INT.  Use size_t_cst_p instead of
1665         host_size_t_cst_p.  For strncmp calls, pass MIN (s2, SIZE_MAX)
1666         instead of s2 as last argument.
1668 2021-01-25  Tamar Christina  <tamar.christina@arm.com>
1670         * config/arm/iterators.md (rotsplit1, rotsplit2, conj_op, fcmac1,
1671         VCMLA_OP, VCMUL_OP): New.
1672         * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Support vec_dup 0.
1673         * config/arm/neon.md (cmul<conj_op><mode>3): New.
1674         * config/arm/unspecs.md (UNSPEC_VCMLA_CONJ, UNSPEC_VCMLA180_CONJ,
1675         UNSPEC_VCMUL_CONJ): New.
1676         * config/arm/vec-common.md (cmul<conj_op><mode>3, arm_vcmla<rot><mode>,
1677         cml<fcmac1><conj_op><mode>4): New.
1679 2021-01-23  Jakub Jelinek  <jakub@redhat.com>
1681         PR testsuite/97301
1682         * config/rs6000/mmintrin.h (__m64): Add __may_alias__ attribute.
1684 2021-01-22  Jonathan Wright  <jonathan.wright@arm.com>
1686         * config/aarch64/aarch64-simd-builtins.def: Add mla builtin
1687         generator macro.
1688         * config/aarch64/arm_neon.h (vmla_s8): Use RTL builtin rather
1689         than asm.
1690         (vmla_s16): Likewise.
1691         (vmla_s32): Likewise.
1692         (vmla_u8): Likewise.
1693         (vmla_u16): Likewise.
1694         (vmla_u32): Likewise.
1695         (vmlaq_s8): Likewise.
1696         (vmlaq_s16): Likewise.
1697         (vmlaq_s32): Likewise.
1698         (vmlaq_u8): Likewise.
1699         (vmlaq_u16): Likewise.
1700         (vmlaq_u32): Likewise.
1702 2021-01-22  David Malcolm  <dmalcolm@redhat.com>
1704         * doc/invoke.texi (GCC_EXTRA_DIAGNOSTIC_OUTPUT): Add @findex
1705         directive.
1707 2021-01-22  Jakub Jelinek  <jakub@redhat.com>
1709         PR debug/98796
1710         * dwarf2out.c (output_file_names): For -gdwarf-5, if there are no
1711         filenames to emit, still emit the required 0 index directory and
1712         filename entries that match DW_AT_comp_dir and DW_AT_name of the
1713         compilation unit.
1715 2021-01-22  Marek Polacek  <polacek@redhat.com>
1717         PR c++/98545
1718         * doc/invoke.texi: Update C++ ABI Version 15 description.
1720 2021-01-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1722         PR tree-optimization/98766
1723         * tree-ssa-math-opts.c (convert_mult_to_fma): Use maybe_le when
1724         comparing against type size with param_avoid_fma_max_bits.
1726 2021-01-22  Richard Biener  <rguenther@suse.de>
1728         PR middle-end/98793
1729         * tree.c (vector_element_bits): Key single-bit bool vector on
1730         integer mode rather than not vector mode.
1732 2021-01-22  Xionghu Luo  <luoxhu@linux.ibm.com>
1734         PR target/98093
1735         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1736         Generate ARRAY_REF(VIEW_CONVERT_EXPR) for P8 and later
1737         platforms.
1738         * config/rs6000/rs6000.c (rs6000_expand_vector_set_var): Update
1739         to call different path for P8 and P9.
1740         (rs6000_expand_vector_set_var_p9): New function.
1741         (rs6000_expand_vector_set_var_p8): New function.
1743 2021-01-22  Xionghu Luo  <luoxhu@linux.ibm.com>
1745         PR target/79251
1746         PR target/98065
1747         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1748         Ajdust variable index vec_insert from address dereference to
1749         ARRAY_REF(VIEW_CONVERT_EXPR) tree expression.
1750         * config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var):
1751         New declaration.
1752         * config/rs6000/rs6000.c (rs6000_expand_vector_set_var): New function.
1754 2021-01-22  Martin Liska  <mliska@suse.cz>
1756         PR gcov-profile/98739
1757         * profile.c (compute_value_histograms): Drop time profile for
1758         -fprofile-reproducible=multithreaded.
1760 2021-01-22  Nathan Sidwell  <nathan@acm.org>
1762         * gcc.c (process_command): Don't check OPT_SPECIAL_input_file
1763         existence here.
1765 2021-01-22  Richard Biener  <rguenther@suse.de>
1767         PR middle-end/98773
1768         * tree-data-ref.c (initalize_matrix_A): Revert previous
1769         change, retaining failing on HOST_WIDE_INT_MIN CHREC_RIGHT.
1771 2021-01-22  Jakub Jelinek  <jakub@redhat.com>
1773         PR tree-optimization/90248
1774         * match.pd (X cmp 0.0 ? 1.0 : -1.0 -> copysign(1, +-X),
1775         X cmp 0.0 ? -1.0 : +1.0 -> copysign(1, -+X)): Remove
1776         simplifications.
1777         (X * (X cmp 0.0 ? 1.0 : -1.0) -> +-abs(X),
1778         X * (X cmp 0.0 ? -1.0 : 1.0) -> +-abs(X)): New simplifications.
1780 2021-01-22  Jakub Jelinek  <jakub@redhat.com>
1782         PR tree-optimization/98255
1783         * tree-dfa.c (get_ref_base_and_extent): For ARRAY_REFs, sign
1784         extend index - low_bound from sizetype's precision rather than index
1785         precision.
1786         (get_addr_base_and_unit_offset_1): Likewise.
1787         * tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Likewise.
1788         * gimple-fold.c (fold_const_aggregate_ref_1): Likewise.
1790 2021-01-22  Richard Biener  <rguenther@suse.de>
1792         PR tree-optimization/98786
1793         * tree-ssa-phiopt.c (factor_out_conditional_conversion): Avoid
1794         adding new uses of abnormals.  Verify we deal with a conditional
1795         conversion.
1797 2021-01-22  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
1799         PR target/98636
1800         * optc-save-gen.awk: Add arm_fp16_format to checked_options.
1802 2021-01-22  liuhongt  <hongtao.liu@intel.com>
1804         PR target/96891
1805         PR target/98348
1806         * config/i386/sse.md (VI_128_256): New mode iterator.
1807         (*avx_cmp<mode>3_1, *avx_cmp<mode>3_2, *avx_cmp<mode>3_3,
1808          *avx_cmp<mode>3_4, *avx2_eq<mode>3, *avx2_pcmp<mode>3_1,
1809          *avx2_pcmp<mode>3_2, *avx2_gt<mode>3): New
1810         define_insn_and_split to lower avx512 vector comparison to avx
1811         version when dest is vector.
1812         (*<avx512>_cmp<mode>3,*<avx512>_cmp<mode>3,*<avx512>_ucmp<mode>3):
1813         define_insn_and_split for negating the comparison result.
1814         * config/i386/predicates.md (float_vector_all_ones_operand):
1815         New predicate.
1816         * config/i386/i386-expand.c (ix86_expand_sse_movcc): Use
1817         general NOT operator without UNSPEC_MASKOP.
1819 2021-01-21  Vladimir N. Makarov  <vmakarov@redhat.com>
1821         PR rtl-optimization/98777
1822         * lra-int.h (lra_pmode_pseudo): New extern.
1823         * lra.c (lra_pmode_pseudo): New global.
1824         (lra): Set it up.
1825         * lra-eliminations.c (eliminate_regs_in_insn): Use it.
1827 2021-01-21  Ilya Leoshkevich  <iii@linux.ibm.com>
1829         * fwprop.c (fwprop_propagation::classify_result): Allow
1830         (subreg (mem)) simplifications.
1832 2021-01-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1834         * config/aarch64/aarch64-simd.md (aarch64_sqdml<SBINQOPS:as>l<mode>):
1835         Split into...
1836         (aarch64_sqdmlal<mode>): ... This...
1837         (aarch64_sqdmlsl<mode>): ... And this.
1838         (aarch64_sqdml<SBINQOPS:as>l_lane<mode>): Split into...
1839         (aarch64_sqdmlal_lane<mode>): ... This...
1840         (aarch64_sqdmlsl_lane<mode>): ... And this.
1841         (aarch64_sqdml<SBINQOPS:as>l_laneq<mode>): Split into...
1842         (aarch64_sqdmlsl_laneq<mode>): ... This...
1843         (aarch64_sqdmlal_laneq<mode>):  ... And this.
1844         (aarch64_sqdml<SBINQOPS:as>l_n<mode>): Split into...
1845         (aarch64_sqdmlsl_n<mode>): ... This...
1846         (aarch64_sqdmlal_n<mode>): ... And this.
1847         (aarch64_sqdml<SBINQOPS:as>l2<mode>_internal): Split into...
1848         (aarch64_sqdmlal2<mode>_internal): ... This...
1849         (aarch64_sqdmlsl2<mode>_internal): ... And this.
1851 2021-01-21  Christophe Lyon  <christophe.lyon@linaro.org>
1853         * config/arm/arm_mve.h (__arm_vcmpneq_s8): Fix return type.
1855 2021-01-21  Andrea Corallo  <andrea.corallo@arm.com>
1857         PR target/96372
1858         * doc/sourcebuild.texi (arm_thumb2_no_arm_v8_1_lob): Document.
1860 2021-01-21  liuhongt  <hongtao.liu@intel.com>
1862         PR rtl-optimization/98694
1863         * regcprop.c (copy_value): If SRC had been assigned a mode
1864         narrower than the copy, we can't link DEST into the chain even
1865         they have same hard_regno_nregs(i.e. HImode/SImode in i386
1866         backend).
1868 2021-01-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1870         * config/aarch64/aarch64-simd.md (aarch64_get_lane<mode>):
1871         Convert to define_insn_and_split.  Split into simple move when moving
1872         bottom element.
1874 2021-01-20  Segher Boessenkool  <segher@kernel.crashing.org>
1876         * config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Change assert.
1877         Adjust comment.  Simplify code.
1879 2021-01-20  Jakub Jelinek  <jakub@redhat.com>
1881         PR debug/98765
1882         * dwarf2out.c (reset_indirect_string): Also reset indirect strings
1883         with DW_FORM_line_strp form.
1884         (prune_unused_types_update_strings): Don't add into debug_str_hash
1885         indirect strings with DW_FORM_line_strp form.
1886         (adjust_name_comp_dir): New function.
1887         (dwarf2out_finish): Call it on CU DIEs after resetting
1888         debug_line_str_hash.
1890 2021-01-20  Vladimir N. Makarov  <vmakarov@redhat.com>
1892         PR rtl-optimization/98722
1893         * lra-eliminations.c (eliminate_regs_in_insn): Check that target
1894         has no 3-op add insn to transform insns containing two pluses.
1896 2021-01-20  Richard Biener  <rguenther@suse.de>
1898         * hwint.h (add_hwi): New function.
1899         (mul_hwi): Likewise.
1900         * tree-data-ref.c (initialize_matrix_A): Properly translate
1901         tree constants and avoid HOST_WIDE_INT_MIN.
1902         (lambda_matrix_row_add): Avoid undefined integer overflow
1903         and return true on such overflow.
1904         (lambda_matrix_right_hermite): Handle overflow from
1905         lambda_matrix_row_add gracefully.  Simplify previous fix.
1906         (analyze_subscript_affine_affine): Likewise.
1908 2021-01-20  Eugene Rozenfeld  <erozen@microsoft.com>
1910         PR tree-optimization/96674
1911         * match.pd: New patterns: x < y || y == XXX_MIN --> x <= y - 1
1912         x >= y && y != XXX_MIN --> x > y - 1
1914 2021-01-20  Richard Sandiford  <richard.sandiford@arm.com>
1916         PR tree-optimization/98535
1917         * tree-vect-slp.c (duplicate_and_interleave): Use quick_grow_cleared.
1918         If the high and low permutes are the same, remove the high permutes
1919         from the working set and only continue with the low ones.
1921 2021-01-20  Jakub Jelinek  <jakub@redhat.com>
1923         PR tree-optimization/98721
1924         * builtins.c (access_ref::inform_access): Don't assume
1925         SSA_NAME_IDENTIFIER must be non-NULL.  Print messages about
1926         object whenever allocfn is NULL, rather than only when DECL_P
1927         is true.  Use %qE instead of %qD for that.  Formatting fixes.
1929 2021-01-20  Richard Biener  <rguenther@suse.de>
1931         PR tree-optimization/98758
1932         * tree-data-ref.c (int_divides_p): Use lambda_int arguments.
1933         (lambda_matrix_right_hermite): Avoid undefinedness with
1934         signed integer abs and multiplication.
1935         (analyze_subscript_affine_affine): Use lambda_int.
1937 2021-01-20  David Malcolm  <dmalcolm@redhat.com>
1939         PR debug/98751
1940         * dwarf2out.c (output_line_info): Rename static variable
1941         "generation", moving it out of the function to...
1942         (output_line_info_generation): New.
1943         (init_sections_and_labels): Likewise, renaming the variable to...
1944         (init_sections_and_labels_generation): New.
1945         (dwarf2out_c_finalize): Reset the new variables.
1947 2021-01-19  Martin Sebor  <msebor@redhat.com>
1949         PR middle-end/98664
1950         * tree-ssa-live.c (remove_unused_scope_block_p): Keep scopes for
1951         all functions, even if they're not declared artificial or inline.
1952         * tree.c (tree_inlined_location): Use macro expansion location
1953         only if scope traversal fails to expose one.
1955 2021-01-19  Richard Sandiford  <richard.sandiford@arm.com>
1957         PR rtl-optimization/92294
1958         * alias.c (compare_base_symbol_refs): Take an extra parameter
1959         and add the distance between two symbols to it.  Enshrine in
1960         comments that -1 means "either 0 or 1, but we can't tell
1961         which at compile time".
1962         (memrefs_conflict_p): Update call accordingly.
1963         (rtx_equal_for_memref_p): Likewise.  Take the distance between symbols
1964         into account.
1966 2021-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1968         * config/aarch64/aarch64-simd-builtins.def (sqshl, uqshl,
1969         sqrshl, uqrshl, sqadd, uqadd, sqsub, uqsub, suqadd, usqadd, sqmovn,
1970         uqmovn, sqxtn2, uqxtn2, sqabs, sqneg, sqdmlal, sqdmlsl, sqdmlal_lane,
1971         sqdmlsl_lane, sqdmlal_laneq, sqdmlsl_laneq, sqdmlal_n, sqdmlsl_n,
1972         sqdmlal2, sqdmlsl2, sqdmlal2_lane, sqdmlsl2_lane, sqdmlal2_laneq,
1973         sqdmlsl2_laneq, sqdmlal2_n, sqdmlsl2_n, sqdmull, sqdmull_lane,
1974         sqdmull_laneq, sqdmull_n, sqdmull2, sqdmull2_lane, sqdmull2_laneq,
1975         sqdmull2_n, sqdmulh, sqrdmulh, sqdmulh_lane, sqdmulh_laneq,
1976         sqrdmulh_lane, sqrdmulh_laneq, sqshrun_n, sqrshrun_n, sqshrn_n,
1977         uqshrn_n, sqrshrn_n, uqrshrn_n, sqshlu_n, sqshl_n, uqshl_n, sqrdmlah,
1978         sqrdmlsh, sqrdmlah_lane, sqrdmlsh_lane, sqrdmlah_laneq, sqrdmlsh_laneq,
1979         sqmovun): Use NONE flags.
1981 2021-01-19  Richard Biener  <rguenther@suse.de>
1983         PR ipa/98330
1984         * ipa-modref.c (analyze_stmt): Only record a summary for a
1985         direct call.
1987 2021-01-19  Richard Biener  <rguenther@suse.de>
1989         PR middle-end/98638
1990         * tree-ssanames.c (fini_ssanames): Zero SSA_NAME_DEF_STMT.
1992 2021-01-19  Daniel Hellstrom  <daniel@gaisler.com>
1994         * config/sparc/rtemself.h (TARGET_OS_CPP_BUILTINS): Add
1995         built-in define __FIX_LEON3FT_TN0018.
1997 2021-01-19  Richard Biener  <rguenther@suse.de>
1999         PR ipa/97673
2000         * tree-inline.c (tree_function_versioning): Set input_location
2001         to UNKNOWN_LOCATION throughout the function.
2003 2021-01-19  Tobias Burnus  <tobias@codesourcery.com>
2005         PR fortran/98476
2006         * omp-low.c (lower_omp_target): Handle nonpointer is_device_ptr.
2008 2021-01-19  Martin Jambor  <mjambor@suse.cz>
2010         PR ipa/98690
2011         * ipa-sra.c (ssa_name_only_returned_p): New parameter fun.  Check
2012         whether non-call exceptions allow removal of a statement.
2013         (isra_analyze_call): Pass the appropriate function to
2014         ssa_name_only_returned_p.
2016 2021-01-19  Geng Qi  <gengqi@linux.alibaba.com>
2018         * config/riscv/arch-canonicalize (longext_sort): New function for
2019          sorting 'multi-letter'.
2020         * config/riscv/multilib-generator: Adjusting the loop of 'alt' in
2021         'alts'. The 'arch' may not be the first of 'alts'.
2022         (_expand_combination): Add underline for the 'ext' without '*'.
2023         This is because, a single-letter extension can always be treated well
2024         with a '_' prefix, but it cannot be separated out if it is appended
2025         to a multi-letter.
2027 2021-01-18  Vladimir N. Makarov  <vmakarov@redhat.com>
2029         PR target/97847
2030         * ira.c (ira): Skip abnormal critical edge splitting.
2032 2021-01-18  Jakub Jelinek  <jakub@redhat.com>
2034         PR tree-optimization/98727
2035         * tree-ssa-math-opts.c (match_arith_overflow): Fix up computation of
2036         second .MUL_OVERFLOW operand for signed multiplication with overflow
2037         checking if the second operand of multiplication is not constant.
2039 2021-01-18  David Edelsohn  <dje.gcc@gmail.com>
2041         * doc/invoke.texi (-gdwarf): TPF defaults to version 2 and AIX
2042         defaults to version 4.
2044 2021-01-18  David Malcolm  <dmalcolm@redhat.com>
2046         * attribs.h (fndecl_dealloc_argno): New decl.
2047         * builtins.c (call_dealloc_argno): Split out second half of
2048         function into...
2049         (fndecl_dealloc_argno): New.
2050         * doc/extend.texi (Common Function Attributes): Document the
2051         interaction between the analyzer and the malloc attribute.
2052         * doc/invoke.texi (Static Analyzer Options): Likewise.
2054 2021-01-17  David Edelsohn  <dje.gcc@gmail.com>
2056         * config/rs6000/aix71.h (SUBTARGET_OVERRIDE_OPTIONS): Override
2057         dwarf_version to 4.
2058         * config/rs6000/aix72.h (SUBTARGET_OVERRIDE_OPTIONS): Same.
2060 2021-01-17  Martin Jambor  <mjambor@suse.cz>
2062         PR ipa/98222
2063         * cgraph.c (clone_of_p): Check also former_clone_of as we climb
2064         the clone tree.
2066 2021-01-17  Mark Wielaard  <mark@klomp.org>
2068         * common.opt (gdwarf-): Init(5).
2069         * doc/invoke.texi (-gdwarf): Document default to 5.
2071 2021-01-16  Kwok Cheung Yeung  <kcy@codesourcery.com>
2073         * builtin-types.def
2074         (BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT): Rename
2075         to...
2076         (BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR):
2077         ...this.  Add extra argument.
2078         * gimplify.c (omp_default_clause): Ensure that event handle is
2079         firstprivate in a task region.
2080         (gimplify_scan_omp_clauses): Handle OMP_CLAUSE_DETACH.
2081         (gimplify_adjust_omp_clauses): Likewise.
2082         * omp-builtins.def (BUILT_IN_GOMP_TASK): Change function type to
2083         BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR.
2084         * omp-expand.c (expand_task_call): Add GOMP_TASK_FLAG_DETACH to flags
2085         if detach clause specified.  Add detach argument when generating
2086         call to GOMP_task.
2087         * omp-low.c (scan_sharing_clauses): Setup data environment for detach
2088         clause.
2089         (finish_taskreg_scan): Move field for variable containing the event
2090         handle to the front of the struct.
2091         * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_DETACH.  Fix
2092         ordering.
2093         * tree-nested.c (convert_nonlocal_omp_clauses): Handle
2094         OMP_CLAUSE_DETACH clause.
2095         (convert_local_omp_clauses): Handle OMP_CLAUSE_DETACH clause.
2096         * tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE_DETACH.
2097         * tree.c (omp_clause_num_ops): Add entry for OMP_CLAUSE_DETACH.
2098         Fix ordering.
2099         (omp_clause_code_name): Add entry for OMP_CLAUSE_DETACH.  Fix
2100         ordering.
2101         (walk_tree_1): Handle OMP_CLAUSE_DETACH.
2103 2021-01-16  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2105         * config/nios2/t-rtems: Reset all MULTILIB_* variables.  Shorten
2106         multilib directory names.  Use MULTILIB_REQUIRED instead of
2107         MULTILIB_EXCEPTIONS.  Add -mhw-mul -mhw-mulx -mhw-div
2108         -mcustom-fpu-cfg=fph2 multilib.
2110 2021-01-16  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2112         * config/nios2/nios2.c (NIOS2_FPU_CONFIG_NUM): Adjust value.
2113         (nios2_init_fpu_configs): Provide register values for new
2114         -mcustom-fpu-cfg=fph2 option variant.
2115         * doc/invoke.texi (-mcustom-fpu-cfg=fph2): Document new option
2116         variant.
2118 2021-01-16  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2120         * config/nios2/nios2.c (nios2_custom_check_insns): Remove
2121         custom instruction warnings.
2123 2021-01-16  Jakub Jelinek  <jakub@redhat.com>
2125         PR tree-optimization/96669
2126         * match.pd ((CST << x) & 1 -> x == 0): New simplification.
2128 2021-01-16  Jakub Jelinek  <jakub@redhat.com>
2130         PR tree-optimization/96271
2131         * passes.def: Pass false argument to first two pass_cd_dce
2132         instances and true to last instance.  Add comment that
2133         last instance rewrites no longer addressed locals.
2134         * tree-ssa-dce.c (pass_cd_dce): Add update_address_taken_p member and
2135         initialize it.
2136         (pass_cd_dce::set_pass_param): New method.
2137         (pass_cd_dce::execute): Return TODO_update_address_taken from
2138         last cd_dce instance.
2140 2021-01-15  Carl Love  <cel@us.ibm.com>
2142         * config/rs6000/altivec.h (vec_mulh, vec_div, vec_dive, vec_mod):
2143         New defines.
2144         * config/rs6000/altivec.md (VIlong): Move define to file vsx.md.
2145         * config/rs6000/rs6000-builtin.def (DIVES_V4SI, DIVES_V2DI,
2146         DIVEU_V4SI, DIVEU_V2DI, DIVS_V4SI, DIVS_V2DI, DIVU_V4SI,
2147         DIVU_V2DI, MODS_V2DI, MODS_V4SI, MODU_V2DI, MODU_V4SI,
2148         MULHS_V2DI, MULHS_V4SI, MULHU_V2DI, MULHU_V4SI, MULLD_V2DI):
2149         Add builtin define.
2150         (MULH, DIVE, MOD):  Add new BU_P10_OVERLOAD_2 definitions.
2151         * config/rs6000/rs6000-call.c (VSX_BUILTIN_VEC_DIV,
2152         VSX_BUILTIN_VEC_DIVE, P10_BUILTIN_VEC_MOD, P10_BUILTIN_VEC_MULH):
2153         New overloaded definitions.
2154         (builtin_function_type) [P10V_BUILTIN_DIVEU_V4SI,
2155         P10V_BUILTIN_DIVEU_V2DI, P10V_BUILTIN_DIVU_V4SI,
2156         P10V_BUILTIN_DIVU_V2DI, P10V_BUILTIN_MODU_V2DI,
2157         P10V_BUILTIN_MODU_V4SI, P10V_BUILTIN_MULHU_V2DI,
2158         P10V_BUILTIN_MULHU_V4SI]: Add case
2159         statement for builtins.
2160         * config/rs6000/rs6000.md (bits): Add new attribute sizes V4SI, V2DI.
2161         * config/rs6000/vsx.md (VIlong): Moved from config/rs6000/altivec.md.
2162         (UNSPEC_VDIVES, UNSPEC_VDIVEU): New unspec definitions.
2163         (vsx_mul_v2di): Add if TARGET_POWER10 statement.
2164         (vsx_udiv_v2di): Add if TARGET_POWER10 statement.
2165         (dives_<mode>, diveu_<mode>, div<mode>3, uvdiv<mode>3,
2166         mods_<mode>, modu_<mode>, mulhs_<mode>, mulhu_<mode>, mulv2di3):
2167         Add define_insn, mode is VIlong.
2168         * doc/extend.texi (vec_mulh, vec_mul, vec_div, vec_dive, vec_mod):
2169         Add builtin descriptions.
2171 2021-01-15  Eric Botcazou  <ebotcazou@adacore.com>
2173         * final.c (final_start_function_1): Reset force_source_line.
2175 2021-01-15  Jakub Jelinek  <jakub@redhat.com>
2177         PR tree-optimization/96669
2178         * match.pd (((1 << A) & 1) != 0 -> A == 0,
2179         ((1 << A) & 1) == 0 -> A != 0): Generalize for 1s replaced by
2180         possibly different power of two constants and to right shift too.
2182 2021-01-15  Jakub Jelinek  <jakub@redhat.com>
2184         PR tree-optimization/96681
2185         * match.pd ((x < 0) ^ (y < 0) to (x ^ y) < 0): New simplification.
2186         ((x >= 0) ^ (y >= 0) to (x ^ y) < 0): Likewise.
2187         ((x < 0) ^ (y >= 0) to (x ^ y) >= 0): Likewise.
2188         ((x >= 0) ^ (y < 0) to (x ^ y) >= 0): Likewise.
2190 2021-01-15  Alexandre Oliva  <oliva@adacore.com>
2192         * opts.c (gen_command_line_string): Exclude -dumpbase-ext.
2194 2021-01-15  Tamar Christina  <tamar.christina@arm.com>
2196         * config/aarch64/aarch64-simd.md (cml<fcmac1><conj_op><mode>4,
2197         cmul<conj_op><mode>3): New.
2198         * config/aarch64/iterators.md (UNSPEC_FCMUL,
2199         UNSPEC_FCMUL180, UNSPEC_FCMLA_CONJ, UNSPEC_FCMLA180_CONJ,
2200         UNSPEC_CMLA_CONJ, UNSPEC_CMLA180_CONJ, UNSPEC_CMUL, UNSPEC_CMUL180,
2201         FCMLA_OP, FCMUL_OP, conj_op, rotsplit1, rotsplit2, fcmac1, sve_rot1,
2202         sve_rot2, SVE2_INT_CMLA_OP, SVE2_INT_CMUL_OP, SVE2_INT_CADD_OP): New.
2203         (rot): Add UNSPEC_FCMUL, UNSPEC_FCMUL180.
2204         (rot_op): Renamed to conj_op.
2205         * config/aarch64/aarch64-sve.md (cml<fcmac1><conj_op><mode>4,
2206         cmul<conj_op><mode>3): New.
2207         * config/aarch64/aarch64-sve2.md (cml<fcmac1><conj_op><mode>4,
2208         cmul<conj_op><mode>3): New.
2210 2021-01-15  David Malcolm  <dmalcolm@redhat.com>
2212         PR bootstrap/98696
2213         * diagnostic.c
2214         (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
2215         Escape the tempfile name when constructing the expected output.
2217 2021-01-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2219         * config/aarch64/aarch64-simd.md (*aarch64_<su>mlsl_hi<mode>):
2220         Rename to...
2221         (aarch64_<su>mlsl_hi<mode>): ... This.
2222         (aarch64_<su>mlsl_hi<mode>): Define.
2223         (*aarch64_<su>mlsl<mode): Rename to...
2224         (aarch64_<su>mlsl<mode): ... This.
2225         * config/aarch64/aarch64-simd-builtins.def (smlsl, umlsl,
2226         smlsl_hi, umlsl_hi): Define builtins.
2227         * config/aarch64/arm_neon.h (vmlsl_high_s8, vmlsl_high_s16,
2228         vmlsl_high_s32, vmlsl_high_u8, vmlsl_high_u16, vmlsl_high_u32,
2229         vmlsl_s8, vmlsl_s16, vmlsl_s32, vmlsl_u8,
2230         vmlsl_u16, vmlsl_u32): Reimplement with builtins.
2232 2021-01-15  Uroš Bizjak  <ubizjak@gmail.com>
2234         * config/i386/i386-c.c (ix86_target_macros):
2235         Use cpp_define_formatted for __SIZEOF_FLOAT80__ definition.
2237 2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>
2239         PR target/88836
2240         * config.gcc (aarch64*-*-*): Add aarch64-cc-fusion.o to extra_objs.
2241         * Makefile.in (RTL_SSA_H): New variable.
2242         * config/aarch64/t-aarch64 (aarch64-cc-fusion.o): New rule.
2243         * config/aarch64/aarch64-protos.h (make_pass_cc_fusion): Declare.
2244         * config/aarch64/aarch64-passes.def: Add pass_cc_fusion after
2245         pass_combine.
2246         * config/aarch64/aarch64-cc-fusion.cc: New file.
2248 2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>
2250         * recog.h (insn_change_watermark::~insn_change_watermark): Avoid
2251         calling cancel_changes for changes that no longer exist.
2253 2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>
2255         * rtl-ssa/functions.h (function_info::ref_defs): Rename to...
2256         (function_info::reg_defs): ...this.
2257         * rtl-ssa/member-fns.inl (function_info::ref_defs): Rename to...
2258         (function_info::reg_defs): ...this.
2260 2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
2262         PR target/71233
2263         * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
2265 2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
2267         Revert:
2268         2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
2270         PR target/71233
2271         * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
2273 2021-01-15  Richard Biener  <rguenther@suse.de>
2275         PR tree-optimization/96376
2276         * tree-vect-stmts.c (get_load_store_type): Disregard alignment
2277         for VMAT_INVARIANT.
2279 2021-01-15  Martin Liska  <mliska@suse.cz>
2281         * doc/install.texi: Document that some tests need pytest module.
2282         * doc/sourcebuild.texi: Likewise.
2284 2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
2286         PR target/71233
2287         * config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
2289 2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
2291         * config/arm/mve.md (mve_vshrq_n_s<mode>_imm): New entry.
2292         (mve_vshrq_n_u<mode>_imm): Likewise.
2293         * config/arm/neon.md (vashr<mode>3, vlshr<mode>3): Move to ...
2294         * config/arm/vec-common.md: ... here.
2296 2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
2298         * config/arm/mve.md (mve_vshlq_<supf><mode>): Move to
2299         vec-commond.md.
2300         * config/arm/neon.md (vashl<mode>3): Delete.
2301         * config/arm/vec-common.md (mve_vshlq_<supf><mode>): New.
2302         (vasl<mode>3): New expander.
2304 2021-01-15  Richard Biener  <rguenther@suse.de>
2306         PR tree-optimization/98685
2307         * tree-vect-slp.c (vect_schedule_slp_node): Refactor handling
2308         of vector extern defs.
2310 2021-01-14  David Malcolm  <dmalcolm@redhat.com>
2312         PR jit/98586
2313         * diagnostic.c (diagnostic_kind_text): Break out this array
2314         from...
2315         (diagnostic_build_prefix): ...here.
2316         (fancy_abort): Detect when diagnostic_initialize has not yet been
2317         called and fall back to a minimal implementation of printing the
2318         ICE, rather than segfaulting in internal_error.
2320 2021-01-14  David Malcolm  <dmalcolm@redhat.com>
2322         * diagnostic.c (diagnostic_initialize): Eliminate
2323         parseable_fixits_p in favor of initializing extra_output_kind from
2324         GCC_EXTRA_DIAGNOSTIC_OUTPUT.
2325         (convert_column_unit): New function, split out from...
2326         (diagnostic_converted_column): ...this.
2327         (print_parseable_fixits): Add "column_unit" and "tabstop" params.
2328         Use them to call convert_column_unit on the column values.
2329         (diagnostic_report_diagnostic): Eliminate conditional on
2330         parseable_fixits_p in favor of a switch statement on
2331         extra_output_kind, passing the appropriate values to the new
2332         params of print_parseable_fixits.
2333         (selftest::test_print_parseable_fixits_none): Update for new
2334         params of print_parseable_fixits.
2335         (selftest::test_print_parseable_fixits_insert): Likewise.
2336         (selftest::test_print_parseable_fixits_remove): Likewise.
2337         (selftest::test_print_parseable_fixits_replace): Likewise.
2338         (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
2339         New.
2340         (selftest::diagnostic_c_tests): Call it.
2341         * diagnostic.h (enum diagnostics_extra_output_kind): New.
2342         (diagnostic_context::parseable_fixits_p): Delete field in favor
2343         of...
2344         (diagnostic_context::extra_output_kind): ...this new field.
2345         * doc/invoke.texi (Environment Variables): Add
2346         GCC_EXTRA_DIAGNOSTIC_OUTPUT.
2347         * opts.c (common_handle_option): Update handling of
2348         OPT_fdiagnostics_parseable_fixits for change to diagnostic_context
2349         fields.
2351 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
2353         * tree-vect-slp-patterns.c (class complex_operations_pattern,
2354         complex_operations_pattern::matches,
2355         complex_operations_pattern::recognize,
2356         complex_operations_pattern::build): New.
2357         (slp_patterns): Use it.
2359 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
2361         * internal-fn.def (COMPLEX_FMS, COMPLEX_FMS_CONJ): New.
2362         * optabs.def (cmls_optab, cmls_conj_optab): New.
2363         * doc/md.texi: Document them.
2364         * tree-vect-slp-patterns.c (class complex_fms_pattern,
2365         complex_fms_pattern::matches, complex_fms_pattern::recognize,
2366         complex_fms_pattern::build): New.
2368 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
2370         * internal-fn.def (COMPLEX_FMA, COMPLEX_FMA_CONJ): New.
2371         * optabs.def (cmla_optab, cmla_conj_optab): New.
2372         * doc/md.texi: Document them.
2373         * tree-vect-slp-patterns.c (vect_match_call_p,
2374         class complex_fma_pattern, vect_slp_reset_pattern,
2375         complex_fma_pattern::matches, complex_fma_pattern::recognize,
2376         complex_fma_pattern::build): New.
2378 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
2380         * internal-fn.def (COMPLEX_MUL, COMPLEX_MUL_CONJ): New.
2381         * optabs.def (cmul_optab, cmul_conj_optab): New.
2382         * doc/md.texi: Document them.
2383         * tree-vect-slp-patterns.c (vect_match_call_complex_mla,
2384         vect_normalize_conj_loc, is_eq_or_top, vect_validate_multiplication,
2385         vect_build_combine_node, class complex_mul_pattern,
2386         complex_mul_pattern::matches, complex_mul_pattern::recognize,
2387         complex_mul_pattern::build): New.
2389 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
2391         * tree-vect-slp.c (optimize_load_redistribution_1): New.
2392         (optimize_load_redistribution, vect_is_slp_load_node): New.
2393         (vect_match_slp_patterns): Use it.
2395 2021-01-14  Tamar Christina  <tamar.christina@arm.com>
2397         * tree-vect-slp-patterns.c (complex_add_pattern::build):
2398         Elide nodes.
2400 2021-01-14  Thomas Schwinge  <thomas@codesourcery.com>
2402         * config/gcn/mkoffload.c (main): Create an offload image only in
2403         64-bit configurations.
2405 2021-01-14  H.J. Lu  <hjl.tools@gmail.com>
2407         PR target/98667
2408         * config/i386/i386-options.c (ix86_option_override_internal):
2409         Issue an error for -fcf-protection with CF_BRANCH when compiling
2410         for 32-bit non-TARGET_CMOV targets.
2412 2021-01-14  Uroš Bizjak  <ubizjak@gmail.com>
2414         PR target/98671
2415         * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
2416         Remove declaration and initialization of shadow variable "ret".
2417         (ix86_option_override_internal): Remove delcaration of
2418         shadow variable "i".  Redeclare shadowed variable to unsigned.
2419         * common/config/i386/i386-common.c (pta_size): Redeclare to unsigned.
2420         * config/i386/i386-builtins.c (get_builtin_code_for_version):
2421         Update for redeclaration.
2422         * config/i386/i386.h (pta_size): Ditto.
2424 2021-01-14  Richard Biener  <rguenther@suse.de>
2426         PR tree-optimization/98674
2427         * tree-data-ref.c (base_supports_access_fn_components_p): New.
2428         (initialize_data_dependence_relation): For two bases without
2429         possible access fns resort to type size equality when determining
2430         shape compatibility.
2432 2021-01-14  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
2434         PR target/66791
2435         * config/arm/arm_neon.h: Replace calls to __builtin_vcge* by
2436         <=, >= operators in vcle and vcge intrinsics respectively.
2437         * config/arm/arm_neon_builtins.def: Remove entry for
2438         vcge and vcgeu.
2440 2021-01-14  Uroš Bizjak  <ubizjak@gmail.com>
2442         PR target/98671
2443         * config/i386/i386-options.c (ix86_function_specific_save):
2444         Remove redundant assignment to opts->x_ix86_branch_cost.
2445         * config/i386/i386.c (ix86_prefetch_sse):
2446         Rename from x86_prefetch_sse.  Update all uses.
2447         * config/i386/i386.h: Update for rename.
2448         * config/i386/i386-options.h: Ditto.
2450 2021-01-14  Jakub Jelinek  <jakub@redhat.com>
2452         PR target/98670
2453         * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3,
2454         *sse4_1_zero_extendv4hiv4si2_3, *sse4_1_zero_extendv2siv2di2_3):
2455         Use Bm instead of m for non-avx.  Add isa attribute.
2457 2021-01-14  Jakub Jelinek  <jakub@redhat.com>
2459         PR tree-optimization/96688
2460         * match.pd (~(X >> Y) -> ~X >> Y): New simplification if
2461         ~X can be simplified.
2463 2021-01-14  Richard Sandiford  <richard.sandiford@arm.com>
2465         * tree-vect-stmts.c (vect_model_load_cost): Account for unused
2466         IFN_LOAD_LANES results.
2468 2021-01-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2470         * config/aarch64/aarch64-simd.md (aarch64_<su>xtl<mode>):
2471         Define.
2472         (aarch64_xtn<mode>): Likewise.
2473         * config/aarch64/aarch64-simd-builtins.def (sxtl, uxtl, xtn):
2474         Define
2475         builtins.
2476         * config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
2477         builtin.
2478         (vmovl_s16): Likewise.
2479         (vmovl_s32): Likewise.
2480         (vmovl_u8): Likewise.
2481         (vmovl_u16): Likewise.
2482         (vmovl_u32): Likewise.
2483         (vmovn_s16): Likewise.
2484         (vmovn_s32): Likewise.
2485         (vmovn_s64): Likewise.
2486         (vmovn_u16): Likewise.
2487         (vmovn_u32): Likewise.
2488         (vmovn_u64): Likewise.
2490 2021-01-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2492         * config/aarch64/aarch64-simd.md (aarch64_<su>qxtn2<mode>_le):
2493         Define.
2494         (aarch64_<su>qxtn2<mode>_be): Likewise.
2495         (aarch64_<su>qxtn2<mode>): Likewise.
2496         * config/aarch64/aarch64-simd-builtins.def (sqxtn2, uqxtn2):
2497         Define builtins.
2498         * config/aarch64/iterators.md (SAT_TRUNC): Define code_iterator.
2499         (su): Handle ss_truncate and us_truncate.
2500         * config/aarch64/arm_neon.h (vqmovn_high_s16): Reimplement using
2501         builtin.
2502         (vqmovn_high_s32): Likewise.
2503         (vqmovn_high_s64): Likewise.
2504         (vqmovn_high_u16): Likewise.
2505         (vqmovn_high_u32): Likewise.
2506         (vqmovn_high_u64): Likewise.
2508 2021-01-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2510         * config/aarch64/aarch64-simd.md (aarch64_xtn2<mode>_le):
2511         Define.
2512         (aarch64_xtn2<mode>_be): Likewise.
2513         (aarch64_xtn2<mode>): Likewise.
2514         * config/aarch64/aarch64-simd-builtins.def (xtn2): Define
2515         builtins.
2516         * config/aarch64/arm_neon.h (vmovn_high_s16): Reimplement using
2517         builtins.
2518         (vmovn_high_s32): Likewise.
2519         (vmovn_high_s64): Likewise.
2520         (vmovn_high_u16): Likewise.
2521         (vmovn_high_u32): Likewise.
2522         (vmovn_high_u64): Likewise.
2524 2021-01-13  Stafford Horne  <shorne@gmail.com>
2526         * config/or1k/or1k.h (ASM_PREFERRED_EH_DATA_FORMAT): New macro.
2528 2021-01-13  Stafford Horne  <shorne@gmail.com>
2530         * config/or1k/linux.h (TARGET_ASM_FILE_END): Define macro.
2532 2021-01-13  Stafford Horne  <shorne@gmail.com>
2534         * config/or1k/or1k.h (TARGET_CPU_CPP_BUILTINS): Add builtin
2535           define for __or1k_hard_float__.
2537 2021-01-13  Stafford Horne  <shorne@gmail.com>
2539         * config/or1k/or1k.h (NO_PROFILE_COUNTERS): Define as 1.
2540         (PROFILE_HOOK): Define to call _mcount.
2541         (FUNCTION_PROFILER): Change from abort to no-op.
2543 2021-01-13  Jakub Jelinek  <jakub@redhat.com>
2545         PR tree-optimization/96691
2546         * match.pd ((~X | C) ^ D -> (X | C) ^ (~D ^ C),
2547         (~X & C) ^ D -> (X & C) ^ (D ^ C)): New simplifications if
2548         (~D ^ C) or (D ^ C) can be simplified.
2550 2021-01-13  Richard Biener  <rguenther@suse.de>
2552         PR tree-optimization/92645
2553         * match.pd (BIT_FIELD_REF to conversion): Delay canonicalization
2554         until after vector lowering.
2556 2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>
2558         * config/aarch64/aarch64-sve.md (fnma<mode>4): Extend from SVE_FULL_I
2559         to SVE_I.
2560         (@aarch64_pred_fnma<mode>, cond_fnma<mode>, *cond_fnma<mode>_2)
2561         (*cond_fnma<mode>_4, *cond_fnma<mode>_any): Likewise.
2563 2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>
2565         * config/aarch64/aarch64-sve.md (fma<mode>4): Extend from SVE_FULL_I
2566         to SVE_I.
2567         (@aarch64_pred_fma<mode>, cond_fma<mode>, *cond_fma<mode>_2)
2568         (*cond_fma<mode>_4, *cond_fma<mode>_any): Likewise.
2570 2021-01-13  Richard Biener  <rguenther@suse.de>
2572         PR tree-optimization/92645
2573         * tree-vect-slp.c (vect_build_slp_tree_1): Relax supported
2574         BIT_FIELD_REF argument.
2575         (vect_build_slp_tree_2): Record the desired vector type
2576         on the external vector def.
2577         (vectorizable_slp_permutation): Handle required punning
2578         of existing vector defs.
2580 2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>
2582         * rtl-ssa/accesses.h (def_lookup): Fix order of comparison results.
2584 2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>
2586         * config/sh/sh.md (movsf_ie): Remove operands[2] test.
2588 2021-01-13  Samuel Thibault  <samuel.thibault@ens-lyon.org>
2590         * config.gcc [$target == *-*-gnu*]: Enable
2591         'default_gnu_indirect_function'.
2593 2021-01-13  Jakub Jelinek  <jakub@redhat.com>
2595         PR target/95905
2596         * optabs.c (expand_vec_perm_const): Don't force v0 and v1 into
2597         registers before calling targetm.vectorize.vec_perm_const, only after
2598         that.
2599         * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const): Handle
2600         two argument permutation when one operand is zero vector and only
2601         after that force operands into registers.
2602         * config/i386/sse.md (*avx2_zero_extendv16qiv16hi2_1): New
2603         define_insn_and_split pattern.
2604         (*avx512bw_zero_extendv32qiv32hi2_1): Likewise.
2605         (*avx512f_zero_extendv16hiv16si2_1): Likewise.
2606         (*avx2_zero_extendv8hiv8si2_1): Likewise.
2607         (*avx512f_zero_extendv8siv8di2_1): Likewise.
2608         (*avx2_zero_extendv4siv4di2_1): Likewise.
2609         * config/mips/mips.c (mips_vectorize_vec_perm_const): Force operands
2610         into registers.
2611         * config/arm/arm.c (arm_vectorize_vec_perm_const): Likewise.
2612         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Likewise.
2613         * config/ia64/ia64.c (ia64_vectorize_vec_perm_const): Likewise.
2614         * config/aarch64/aarch64.c (aarch64_vectorize_vec_perm_const): Likewise.
2615         * config/rs6000/rs6000.c (rs6000_vectorize_vec_perm_const): Likewise.
2616         * config/gcn/gcn.c (gcn_vectorize_vec_perm_const): Likewise.  Use std::swap.
2618 2021-01-13  Martin Liska  <mliska@suse.cz>
2620         PR tree-optimization/98455
2621         * gimple-if-to-switch.cc (condition_info::record_phi_mapping):
2622         Record also virtual PHIs.
2623         (pass_if_to_switch::execute): Return TODO_cleanup_cfg only
2624         conditionally.
2626 2021-01-13  Jonathan Wakely  <jwakely@redhat.com>
2628         * doc/invoke.texi (C++ Modules): Fix typos.
2630 2021-01-13  Richard Biener  <rguenther@suse.de>
2632         PR tree-optimization/98640
2633         * tree-ssa-sccvn.c (visit_nary_op): Do not try to
2634         handle plus or minus from a truncated operand to be
2635         sign-extended.
2637 2021-01-13  Jakub Jelinek  <jakub@redhat.com>
2639         PR target/96938
2640         * config/i386/i386.md (*btr<mode>_1, *btr<mode>_2): New
2641         define_insn_and_split patterns.
2642         (splitter after *btr<mode>_2): New splitter.
2644 2021-01-13  Martin Liska  <mliska@suse.cz>
2646         PR ipa/98652
2647         * cgraphunit.c (analyze_functions): Remove dead code.
2649 2021-01-13  Qian Jianhua  <qianjh@cn.fujitsu.com>
2651         * config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
2652         * config/aarch64/aarch64.c (a64fx_addrcost_table): New.
2653         (a64fx_regmove_cost, a64fx_vector_cost): New.
2654         (a64fx_tunings): Use the new added cost tables.
2656 2021-01-13  Jakub Jelinek  <jakub@redhat.com>
2658         PR target/95905
2659         * config/i386/predicates.md (pmovzx_parallel): New predicate.
2660         * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): New
2661         define_insn_and_split pattern.
2662         (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
2663         (*sse4_1_zero_extendv2siv2di2_3): Likewise.
2665 2021-01-13  Julian Brown  <julian@codesourcery.com>
2667         * config/gcn/gcn.c (gcn_conditional_register_usage): Remove dead code
2668         to fix v0 register.
2670 2021-01-13  Julian Brown  <julian@codesourcery.com>
2672         * config/gcn/gcn.c (gcn_md_reorg): Fix case where EXEC reg is live
2673         on entry to a BB.
2675 2021-01-13  Julian Brown  <julian@codesourcery.com>
2677         * config/gcn/gcn-valu.md (recip<mode>2<exec>, recip<mode>2): Use unspec
2678         for reciprocal-approximation instructions.
2679         (div<mode>3): Use fused multiply-accumulate operations for reciprocal
2680         refinement and division result.
2681         * config/gcn/gcn.md (UNSPEC_RCP): New unspec constant.
2683 2021-01-13  Julian Brown  <julian@codesourcery.com>
2685         * config/gcn/gcn-valu.md (subdf): Rename to...
2686         (subdf3): This.
2688 2021-01-12  Martin Liska  <mliska@suse.cz>
2690         * gcov.c (source_info::debug): Fix printf format for 32-bit hosts.
2692 2021-01-12  Andrea Corallo  <andrea.corallo@arm.com>
2694         * function-abi.h: Fix typo.
2696 2021-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
2698         PR target/97875
2699         PR target/97875
2700         * config/arm/arm.h (ARM_HAVE_NEON_V8QI_LDST): New macro.
2701         (ARM_HAVE_NEON_V16QI_LDST, ARM_HAVE_NEON_V4HI_LDST): Likewise.
2702         (ARM_HAVE_NEON_V8HI_LDST, ARM_HAVE_NEON_V2SI_LDST): Likewise.
2703         (ARM_HAVE_NEON_V4SI_LDST, ARM_HAVE_NEON_V4HF_LDST): Likewise.
2704         (ARM_HAVE_NEON_V8HF_LDST, ARM_HAVE_NEON_V4BF_LDST): Likewise.
2705         (ARM_HAVE_NEON_V8BF_LDST, ARM_HAVE_NEON_V2SF_LDST): Likewise.
2706         (ARM_HAVE_NEON_V4SF_LDST, ARM_HAVE_NEON_DI_LDST): Likewise.
2707         (ARM_HAVE_NEON_V2DI_LDST): Likewise.
2708         (ARM_HAVE_V8QI_LDST, ARM_HAVE_V16QI_LDST): Likewise.
2709         (ARM_HAVE_V4HI_LDST, ARM_HAVE_V8HI_LDST): Likewise.
2710         (ARM_HAVE_V2SI_LDST, ARM_HAVE_V4SI_LDST, ARM_HAVE_V4HF_LDST): Likewise.
2711         (ARM_HAVE_V8HF_LDST, ARM_HAVE_V4BF_LDST, ARM_HAVE_V8BF_LDST): Likewise.
2712         (ARM_HAVE_V2SF_LDST, ARM_HAVE_V4SF_LDST, ARM_HAVE_DI_LDST): Likewise.
2713         (ARM_HAVE_V2DI_LDST): Likewise.
2714         * config/arm/mve.md (*movmisalign<mode>_mve_store): New pattern.
2715         (*movmisalign<mode>_mve_load): New pattern.
2716         * config/arm/neon.md (movmisalign<mode>): Move to ...
2717         * config/arm/vec-common.md: ... here.
2719 2021-01-12  Vladimir N. Makarov  <vmakarov@redhat.com>
2721         PR target/97969
2722         * lra-eliminations.c (eliminate_regs_in_insn): Add transformation
2723         of pattern 'plus (plus (hard reg, const), pseudo)'.
2725 2021-01-12  Richard Biener  <rguenther@suse.de>
2727         PR tree-optimization/98550
2728         * tree-vect-slp.c (vect_record_max_nunits): Check whether
2729         the group size is a multiple of the vector element count.
2730         (vect_build_slp_tree_1): When we need to fail because
2731         the vector type choosen causes unrolling do so lazily
2732         without affecting matches only at the end to guide group splitting.
2734 2021-01-12  Martin Liska  <mliska@suse.cz>
2736         PR c++/97284
2737         * optc-save-gen.awk: Compare also n_target_save vars with
2738         strcmp.
2740 2021-01-12  Martin Liska  <mliska@suse.cz>
2742         * gcov.c (source_info::debug): New.
2743         (print_usage): Add --debug (-D) option.
2744         (process_args): Likewise.
2745         (generate_results): Call src->debug after
2746         accumulate_line_counts.
2747         (read_graph_file): Properly assign id for EXIT_BLOCK.
2748         * profile.c (branch_prob): Dump function body before it is
2749         instrumented.
2751 2021-01-12  Jakub Jelinek  <jakub@redhat.com>
2753         PR tree-optimization/98629
2754         * tree-ssa-math-opts.c (arith_overflow_check_p): Don't update use_stmt
2755         unless returning non-zero.
2757 2021-01-12  Jakub Jelinek  <jakub@redhat.com>
2759         PR tree-optimization/95731
2760         * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Also optimize
2761         x < 0 && y < 0 && z < 0 into (x | y | z) < 0 for signed x, y, z.
2762         (optimize_range_tests): Call optimize_range_tests_cmp_bitwise
2763         only after optimize_range_tests_var_bound.
2765 2021-01-12  Jakub Jelinek  <jakub@redhat.com>
2767         * configure.ac: Ensure c/Make-lang.in comes first in @all_lang_makefrags@.
2768         * configure: Regenerated.
2770 2021-01-12  liuhongt  <hongtao.liu@intel.com>
2772         PR target/98612
2773         * config/i386/i386-builtins.h (BUILTIN_DESC_SWAP_OPERANDS):
2774         Deleted.
2775         * config/i386/i386-expand.c (ix86_expand_sse_comi): Delete
2776         dead code.
2778 2021-01-12  Alexandre Oliva  <oliva@adacore.com>
2780         * ssa-iterators.h (end_imm_use_stmt_traverse): Forward
2781         declare.
2782         (auto_end_imm_use_stmt_traverse): New struct.
2783         (FOR_EACH_IMM_USE_STMT): Use it.
2784         (BREAK_FROM_IMM_USE_STMT, RETURN_FROM_IMM_USE_STMT): Remove,
2785         along with uses...
2786         * gimple-ssa-strength-reduction.c: ... here, ...
2787         * graphite-scop-detection.c: ... here, ...
2788         * ipa-modref.c, ipa-pure-const.c, ipa-sra.c: ... here, ...
2789         * tree-predcom.c, tree-ssa-ccp.c: ... here, ...
2790         * tree-ssa-dce.c, tree-ssa-dse.c: ... here, ...
2791         * tree-ssa-loop-ivopts.c, tree-ssa-math-opts.c: ... here, ...
2792         * tree-ssa-phiprop.c, tree-ssa.c: ... here, ...
2793         * tree-vect-slp.c: ... and here, ...
2794         * doc/tree-ssa.texi: ... and the example here.
2796 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
2798         * config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3): Extend from
2799         SVE_FULL_I to SVE_I.  Generate an UNSPEC_PRED_X.
2800         (*sdiv_pow2<mode>3): New pattern.
2801         (@cond_<sve_int_op><mode>): Extend from SVE_FULL_I to SVE_I.
2802         Wrap the ASRD in an UNSPEC_PRED_X.
2803         (*cond_<sve_int_op><mode>_2): Likewise.  Replace the UNSPEC_PRED_X
2804         predicate with a constant PTRUE, if it isn't already.
2805         (*cond_<sve_int_op><mode>_z): Replace with...
2806         (*cond_<sve_int_op><mode>_any): ...this new pattern.
2808 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
2810         * config/aarch64/aarch64-sve.md (*cond_bic<mode>_2): Extend from
2811         SVE_FULL_I to SVE_I.
2812         (*cond_bic<mode>_any): Likewise.
2814 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
2816         * config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart)
2817         (@aarch64_pred_<MUL_HIGHPART:optab><mode>): Extend from SVE_FULL_I
2818         to SVE_I.
2820 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
2822         * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Extend from
2823         SVE_FULL_I to SVE_I.
2824         (*aarch64_cond_<su>abd<mode>_2): Likewise.
2825         (*aarch64_cond_<su>abd<mode>_any): Likewise.
2826         (@aarch64_pred_<su>abd<mode>): Likewise.  Use UNSPEC_PRED_X
2827         for the max and min but not for the minus.
2828         (*aarch64_cond_<su>abd<mode>_3): New pattern.
2830 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
2832         * config/aarch64/iterators.md (SVE_24I): New iterator.
2833         * config/aarch64/aarch64-sve.md (*aarch64_adr<mode>_shift): Extend from
2834         SVE_FULL_SDI to SVE_24I.  Use containers rather than elements.
2836 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
2838         * config/aarch64/aarch64-sve.md (@cond_<SVE_INT_BINARY:optab><mode>)
2839         (*cond_<SVE_INT_BINARY:optab><mode>_2): Extend from SVE_FULL_I
2840         to SVE_I.
2841         (*cond_<SVE_INT_BINARY:optab><mode>_3): Likewise.
2842         (*cond_<SVE_INT_BINARY:optab><mode>_any): Likewise.
2843         (*cond_<SVE_INT_BINARY:optab><mode>_2_const): Likewise.
2844         (*cond_<SVE_INT_BINARY:optab><mode>_any_const): Likewise.
2846 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
2848         * config/aarch64/aarch64-sve.md (<SVE_INT_BINARY_IMM:optab><mode>3)
2849         (@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>)
2850         (*post_ra_<SVE_INT_BINARY_IMM:optab><mode>3): Extend from SVE_FULL_I
2851         to SVE_I.
2853 2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>
2855         * config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3)
2856         (v<ASHIFT:optab><mode>3, @aarch64_pred_<optab><mode>)
2857         (*post_ra_v<ASHIFT:optab><mode>3): Extend from SVE_FULL_I to SVE_I.
2859 2021-01-11  Martin Liska  <mliska@suse.cz>
2861         PR jit/98615
2862         * symtab-clones.h (clone_info::release): Release
2863         symtab::m_clones with ggc_delete as it's a GGC memory.
2865 2021-01-11  Matthias Klose  <doko@ubuntu.com>
2867         * Makefile.in (LINK_PROGRESS): Show the link target.
2869 2021-01-11  Richard Biener  <rguenther@suse.de>
2871         PR tree-optimization/91403
2872         * tree-vect-data-refs.c (vect_analyze_group_access_1): Cap
2873         single-element interleaving group size at 4096 elements.
2875 2021-01-11  Richard Biener  <rguenther@suse.de>
2877         PR tree-optimization/98526
2878         * tree-vect-loop.c (vect_model_reduction_cost): Remove costing
2879         of the actual reduction op for the regular case.
2880         (vectorizable_reduction): Cost the stmts
2881         vect_transform_reduction produces here.
2883 2021-01-11  Andreas Krebbel  <krebbel@linux.ibm.com>
2885         * tree-ssa-forwprop.c (simplify_vector_constructor): For
2886         big-endian, use UNPACK[_FLOAT]_HI.
2888 2021-01-11  Tamar Christina  <tamar.christina@arm.com>
2890         * tree-vect-slp-patterns.c (class complex_pattern,
2891         class complex_add_pattern): Add parameters to matches.
2892         (complex_add_pattern::build): Free memory.
2893         (complex_add_pattern::matches): Move validation end of match.
2894         (complex_add_pattern::recognize): Likewise.
2896 2021-01-11  Tamar Christina  <tamar.christina@arm.com>
2898         * tree-vect-slp-patterns.c (linear_loads_p): Fix externals.
2900 2021-01-11  Tamar Christina  <tamar.christina@arm.com>
2902         * tree-vect-slp-patterns.c (is_linear_load_p): Fix ambiguity.
2904 2021-01-11  Jakub Jelinek  <jakub@redhat.com>
2906         PR tree-optimization/95867
2907         * tree-ssa-math-opts.h: New header.
2908         * tree-ssa-math-opts.c: Include tree-ssa-math-opts.h.
2909         (powi_as_mults): No longer static.  Use build_one_cst instead of
2910         build_real.  Formatting fix.
2911         * tree-ssa-reassoc.c: Include tree-ssa-math-opts.h.
2912         (attempt_builtin_powi): Handle multiplication reassociation without
2913         powi_fndecl using powi_as_mults.
2914         (reassociate_bb): For integral types don't require
2915         -funsafe-math-optimizations to call attempt_builtin_powi.
2917 2021-01-11  Jakub Jelinek  <jakub@redhat.com>
2919         PR tree-optimization/95852
2920         * tree-ssa-math-opts.c (maybe_optimize_guarding_check): Change
2921         mul_stmts parameter type to vec<gimple *> &.  Before cond_stmt
2922         allow in the bb any of the stmts in that vector, div_stmt and
2923         up to 3 cast stmts.
2924         (arith_cast_equal_p): New function.
2925         (arith_overflow_check_p): Add cast_stmt argument, handle signed
2926         multiply overflow checks.
2927         (match_arith_overflow): Adjust caller.  Handle signed multiply
2928         overflow checks.
2930 2021-01-11  Jakub Jelinek  <jakub@redhat.com>
2932         PR tree-optimization/95852
2933         * tree-ssa-math-opts.c (maybe_optimize_guarding_check): New function.
2934         (uaddsub_overflow_check_p): Renamed to ...
2935         (arith_overflow_check_p): ... this.  Handle also multiplication
2936         with overflow check.
2937         (match_uaddsub_overflow): Renamed to ...
2938         (match_arith_overflow): ... this.  Add cfg_changed argument.  Handle
2939         also multiplication with overflow check.  Adjust function comment.
2940         (math_opts_dom_walker::after_dom_children): Adjust callers.  Call
2941         match_arith_overflow also for MULT_EXPR.
2943 2021-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2945         * config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
2946         __builtin_convertvector.
2947         (vmovl_s16): Likewise.
2948         (vmovl_s32): Likewise.
2949         (vmovl_u8): Likewise.
2950         (vmovl_u16): Likewise.
2951         (vmovl_u32): Likewise.
2952         (vmovn_s16): Likewise.
2953         (vmovn_s32): Likewise.
2954         (vmovn_s64): Likewise.
2955         (vmovn_u16): Likewise.
2956         (vmovn_u32): Likewise.
2957         (vmovn_u64): Likewise.
2959 2021-01-11  Martin Liska  <mliska@suse.cz>
2961         * gimple-if-to-switch.cc (struct condition_info): Use auto_var.
2962         (if_chain::is_beneficial): Delete clusters
2963         (find_conditions): Make second argument of conditions_in_bbs a
2964         pointer so that we control over it's lifetime.
2965         (pass_if_to_switch::execute): Delete them.
2967 2021-01-11  Kewen Lin  <linkw@linux.ibm.com>
2969         * ira.c (move_unallocated_pseudos): Check other_reg and skip if
2970         it isn't set.
2972 2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>
2974         * config/vax/vax.md (cc): Remove mode attribute.
2975         (subst_<cc>, subst_f<cc>): Rename to...
2976         (subst_<mode>, subst_f<VAXccnz:mode>): ... these respectively.
2977         (*cbranch<VAXint:mode>4_<VAXcc:mode>): Update for `cc' removal.
2978         (*cbranch<VAXfp:mode>4_<VAXccnz:mode>): Likewise.
2979         (*branch_<mode>, *branch_<mode>_reversed): Likewise.
2981 2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>
2983         * config/vax/vax.md (subst_f<cc>): Add mode to operands and
2984         `const_double_zero'.
2986 2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>
2988         * config/pdp11/pdp11.md (PDPfp): New mode iterator.
2989         (fcc_cc, fcc_ccnz): Use it.  Add mode to `const_double_zero' and
2990         operands.
2992 2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>
2994         * genemit.c (gen_exp) <CONST_DOUBLE>: Handle `const_double_zero'
2995         rtx.
2996         * read-rtl.c (rtx_reader::read_rtx_code): Handle machine mode
2997         with `const_double_zero'.
2998         * doc/rtl.texi (Constant Expression Types): Document it.
3000 2021-01-09  Jakub Jelinek  <jakub@redhat.com>
3002         PR c++/98556
3003         * tree-cfg.c (verify_gimple_assign_binary): Allow lhs of
3004         POINTER_DIFF_EXPR to be any integral type.
3006 2021-01-09  Jakub Jelinek  <jakub@redhat.com>
3008         PR rtl-optimization/98603
3009         * function.c (instantiate_virtual_regs_in_insn): For asm goto
3010         with impossible constraints, drop all SETs, CLOBBERs, drop PARALLEL
3011         if any, set ASM_OPERANDS mode to VOIDmode and change
3012         ASM_OPERANDS_OUTPUT_CONSTRAINT and ASM_OPERANDS_OUTPUT_IDX.
3014 2021-01-09  Alexandre Oliva  <oliva@gnu.org>
3016         PR debug/97714
3017         * final.c (notice_source_line): Narrow down the condition to
3018         skip a line-0 marker.
3020 2021-01-08  Sergei Trofimovich  <siarheit@google.com>
3022         * ipa-modref.c (merge_call_side_effects): Fix
3023         linebreak split by reordering two print calls.
3025 2021-01-08  Ilya Leoshkevich  <iii@linux.ibm.com>
3027         * config/s390/vector.md (*tf_to_fprx2_0): Rename from
3028         "*mov_tf_to_fprx2_0" for consistency, fix constraint.
3029         (*tf_to_fprx2_1): Rename from "*mov_tf_to_fprx2_1" for
3030         consistency, fix constraint.
3032 2021-01-08  Ilya Leoshkevich  <iii@linux.ibm.com>
3034         * config/s390/s390-c.c (s390_def_or_undef_macro): Accept
3035         callables instead of mask values.
3036         (struct target_flag_set_p): New predicate.
3037         (s390_cpu_cpp_builtins_internal): Define or undefine
3038         __LONG_DOUBLE_VX__ macro.
3040 2021-01-08  H.J. Lu  <hjl.tools@gmail.com>
3042         PR target/98482
3043         * config/i386/i386.c (x86_function_profiler): Use R10 and R11
3044         to call mcount in large model with PIC for NO_PROFILE_COUNTERS
3045         targets.
3047 2021-01-08  Richard Biener  <rguenther@suse.de>
3049         * tree-ssa-sccvn.c (pass_fre::execute): Reset the SCEV hash table.
3051 2021-01-08  Richard Biener  <rguenther@suse.de>
3053         * tree-vect-slp.c (scalar_stmts_to_slp_tree_map_t): Fix.
3054         (vect_build_slp_tree): On cache hit release the matched
3055         scalar stmts vector.
3056         * tree-vect-stmts.c (vectorizable_store): Properly free
3057         vec_oprnds before possibly gathering them again.
3059 2021-01-08  Richard Biener  <rguenther@suse.de>
3061         PR tree-optimization/98544
3062         * tree-vect-slp.c (vect_optimize_slp): Always materialize
3063         permutes at a permute node.
3065 2021-01-08  H.J. Lu  <hjl.tools@gmail.com>
3067         PR target/98482
3068         * config/i386/i386.c (x86_function_profiler): Use R10 to call
3069         mcount in large model.  Sorry for large model with PIC.
3071 2021-01-08  Jakub Jelinek  <jakub@redhat.com>
3073         PR target/98585
3074         * config/i386/i386.opt (ix86_cmodel, ix86_incoming_stack_boundary_arg,
3075         ix86_pmode, ix86_preferred_stack_boundary_arg, ix86_regparm,
3076         ix86_veclibabi_type): Remove x_ prefix, use TargetVariable instead of
3077         TargetSave and initialize for variables with enum types.
3078         (mfentry, mstack-protector-guard-reg=, mstack-protector-guard-offset=,
3079         mstack-protector-guard-symbol=): Add Save.
3080         * config/i386/i386-options.c (ix86_function_specific_save,
3081         ix86_function_specific_restore): Don't save or restore x_ix86_cmodel,
3082         x_ix86_incoming_stack_boundary_arg, x_ix86_pmode,
3083         x_ix86_preferred_stack_boundary_arg, x_ix86_regparm,
3084         x_ix86_veclibabi_type.
3086 2021-01-08  Richard Sandiford  <richard.sandiford@arm.com>
3088         * config/aarch64/aarch64-sve.md (*cnot<mode>): Extend from
3089         SVE_FULL_I to SVE_I.
3090         (*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise.
3092 2021-01-08  Richard Sandiford  <richard.sandiford@arm.com>
3094         * config/aarch64/aarch64-sve.md (*cond_uxt<mode>_2): Extend from
3095         SVE_FULL_I to SVE_I.
3096         (*cond_uxt<mode>_any): Likewise.
3098 2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3100         * config/aarch64/iterators.md (Vwhalf): New iterator.
3101         * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>_3):
3102         Rename to...
3103         (aarch64_<sur>adalp<mode>): ... This.  Make more
3104         builtin-friendly.
3105         (<sur>sadv16qi): Adjust callsite of the above.
3106         * config/aarch64/aarch64-simd-builtins.def (sadalp, uadalp): New
3107         builtins.
3108         * config/aarch64/arm_neon.h (vpadal_s8): Reimplement using
3109         builtins.
3110         (vpadal_s16): Likewise.
3111         (vpadal_u8): Likewise.
3112         (vpadal_u16): Likewise.
3113         (vpadalq_s8): Likewise.
3114         (vpadalq_s16): Likewise.
3115         (vpadalq_s32): Likewise.
3116         (vpadalq_u8): Likewise.
3117         (vpadalq_u16): Likewise.
3118         (vpadalq_u32): Likewise.
3120 2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3122         * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>_3):
3123         Rename to...
3124         (aarch64_<su>abd<mode>): ... This.
3125         (<sur>sadv16qi): Adjust callsite of the above.
3126         * config/aarch64/aarch64-simd-builtins.def (sabd, uabd): Define
3127         builtins.
3128         * config/aarch64/arm_neon.h (vabd_s8): Reimplement using
3129         builtin.
3130         (vabd_s16): Likewise.
3131         (vabd_s32): Likewise.
3132         (vabd_u8): Likewise.
3133         (vabd_u16): Likewise.
3134         (vabd_u32): Likewise.
3135         (vabdq_s8): Likewise.
3136         (vabdq_s16): Likewise.
3137         (vabdq_s32): Likewise.
3138         (vabdq_u8): Likewise.
3139         (vabdq_u16): Likewise.
3140         (vabdq_u32): Likewise.
3142 2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3144         * config/aarch64/aarch64-simd-builtins.def (saba, uaba): Define
3145         builtins.
3146         * config/aarch64/arm_neon.h (vaba_s8): Implement using builtin.
3147         (vaba_s16): Likewise.
3148         (vaba_s32): Likewise.
3149         (vaba_u8): Likewise.
3150         (vaba_u16): Likewise.
3151         (vaba_u32): Likewise.
3152         (vabaq_s8): Likewise.
3153         (vabaq_s16): Likewise.
3154         (vabaq_s32): Likewise.
3155         (vabaq_u8): Likewise.
3156         (vabaq_u16): Likewise.
3157         (vabaq_u32): Likewise.
3159 2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
3161         * config/aarch64/aarch64-simd.md (aba<mode>_3): Rename to...
3162         (aarch64_<su>aba<mode>): ... This.  Handle uaba as well.
3163         Change RTL pattern to match.
3165 2021-01-08  Kito Cheng  <kito.cheng@sifive.com>
3167         * common/config/riscv/riscv-common.c (riscv_current_subset_list): New.
3168         * config/riscv/riscv-c.c (riscv-subset.h): New.
3169         (INCLUDE_STRING): Define.
3170         (riscv_cpu_cpp_builtins): Add new style architecture extension
3171         test macros.
3172         * config/riscv/riscv-subset.h (riscv_subset_list::begin): New.
3173         (riscv_subset_list::end): New.
3174         (riscv_current_subset_list): New.
3176 2021-01-08  Kito Cheng  <kito.cheng@sifive.com>
3178         * common/config/riscv/riscv-common.c (RISCV_DONT_CARE_VERSION):
3179         Move to riscv-subset.h.
3180         (struct riscv_subset_t): Ditto.
3181         (class riscv_subset_list): Ditto.
3182         * config/riscv/riscv-subset.h (RISCV_DONT_CARE_VERSION): Move
3183         from riscv-common.c.
3184         (struct riscv_subset_t): Ditto.
3185         (class riscv_subset_list): Ditto.
3186         * config/riscv/t-riscv ($(common_out_file)): Add file
3187         dependency.
3189 2021-01-07  Jakub Jelinek  <jakub@redhat.com>
3191         PR target/98567
3192         * config/i386/i386.md (*bmi_blsi_<mode>_cmp, *bmi_blsi_<mode>_ccno):
3193         New define_insn patterns.
3195 2021-01-07  Richard Sandiford  <richard.sandiford@arm.com>
3197         * config/aarch64/aarch64-sve.md (@cond_<SVE_INT_UNARY:optab><mode>)
3198         (*cond_<SVE_INT_UNARY:optab><mode>_2): Extend from SVE_FULL_I to SVE_I.
3199         (*cond_<SVE_INT_UNARY:optab><mode>_any): Likewise.
3201 2021-01-07  Richard Sandiford  <richard.sandiford@arm.com>
3203         PR tree-optimization/98560
3204         * internal-fn.def (IFN_VCONDU, IFN_VCONDEQ): Use type vec_cond.
3205         * internal-fn.c (vec_cond_mask_direct): Get the data mode from
3206         argument 1.
3207         (vec_cond_direct): Likewise argument 2.
3208         (vec_condu_direct, vec_condeq_direct): Delete.
3209         (expand_vect_cond_optab_fn): Rename to...
3210         (expand_vec_cond_optab_fn): ...this, replacing old macro.
3211         (expand_vec_condu_optab_fn, expand_vec_condeq_optab_fn): Delete.
3212         (expand_vect_cond_mask_optab_fn): Rename to...
3213         (expand_vec_cond_mask_optab_fn): ...this, replacing old macro.
3214         (direct_vec_cond_mask_optab_supported_p): Treat the optab as a
3215         convert optab.
3216         (direct_vec_cond_optab_supported_p): Likewise.
3217         (direct_vec_condu_optab_supported_p): Delete.
3218         (direct_vec_condeq_optab_supported_p): Delete.
3219         * gimple-isel.cc: Include internal-fn.h.
3220         (gimple_expand_vec_cond_expr): Check that IFN_VCONDEQ is supported
3221         before using it.
3223 2021-01-07  Richard Sandiford  <richard.sandiford@arm.com>
3225         PR tree-optimization/98560
3226         * gimple-isel.cc (gimple_expand_vec_cond_expr): If we fail to use
3227         IFN_VCOND{,U,EQ}, fall back on IFN_VCOND_MASK.
3229 2021-01-07  Uroš Bizjak  <ubizjak@gmail.com>
3231         * config/i386/i386.md (insn): Merge from plusminus_insn, shift_insn,
3232         rotate_insn and optab code attributes.
3233         Update all uses to merged code attribute.
3234         * config/i386/sse.md: Update all uses to merged code attribute.
3235         * config/i386/mmx.md: Update all uses to merged code attribute.
3237 2021-01-07  Jakub Jelinek  <jakub@redhat.com>
3239         PR tree-optimization/98568
3240         * gimple-ssa-store-merging.c (bswap_view_convert): New function.
3241         (bswap_replace): Use it.
3243 2021-01-06  Vladimir N. Makarov  <vmakarov@redhat.com>
3245         PR rtl-optimization/97978
3246         * lra-int.h (lra_hard_reg_split_p): New external.
3247         * lra.c (lra_hard_reg_split_p): New global.
3248         (lra): Set up lra_hard_reg_split_p after splitting a hard reg.
3249         * lra-assigns.c (lra_assign): Don't check allocation correctness
3250         after hard reg splitting.
3252 2021-01-06  Martin Sebor  <msebor@redhat.com>
3254         PR c++/98305
3255         * builtins.c (new_delete_mismatch_p): New overload.
3256         (new_delete_mismatch_p (tree, tree)): Call it.
3258 2021-01-06  Alexandre Oliva  <oliva@adacore.com>
3260         * Makefile.in (T_GLIMITS_H): New.
3261         (stmp-int-hdrs): Depend on it, use it.
3262         * config/t-vxworks (T_GLIMITS_H): Override it.
3263         (vxw-glimits.h): New.
3265 2021-01-06  Richard Biener  <rguenther@suse.de>
3267         PR tree-optimization/98513
3268         * value-range.cc (intersect_ranges): Compare the upper bounds
3269         for the expected relation.
3271 2021-01-06  Gerald Pfeifer  <gerald@pfeifer.com>
3273         Revert:
3274         2020-12-28  Gerald Pfeifer  <gerald@pfeifer.com>
3276         * doc/standards.texi (HSAIL): Remove section.
3278 2021-01-05  Samuel Thibault  <samuel.thibault@ens-lyon.org>
3280         * configure: Re-generate.
3282 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
3284         * doc/invoke.texi (-std=c++20): Adjust for the publication of
3285         ISO 14882:2020 standard.
3286         * doc/standards.texi: Likewise.
3288 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
3290         PR tree-optimization/94802
3291         * expr.h (maybe_optimize_sub_cmp_0): Declare.
3292         * expr.c: Include tree-pretty-print.h and flags.h.
3293         (maybe_optimize_sub_cmp_0): New function.
3294         (do_store_flag): Use it.
3295         * cfgexpand.c (expand_gimple_cond): Likewise.
3297 2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>
3299         * mux-utils.h (pointer_mux::m_ptr): Tweak description of contents.
3300         * rtlanal.c (simple_regno_set): Tweak description to clarify the
3301         RMW condition.
3303 2021-01-05  Richard Biener  <rguenther@suse.de>
3305         PR tree-optimization/98516
3306         * tree-vect-slp.c (vect_optimize_slp): Permute the incoming
3307         lanes when materializing on a VEC_PERM node.
3308         (vectorizable_slp_permutation): Dump the permute properly.
3310 2021-01-05  Richard Biener  <rguenther@suse.de>
3312         * tree-vect-slp.c (vect_slp_region): Move debug counter
3313         to cover individual subgraphs.
3315 2021-01-05  Richard Biener  <rguenther@suse.de>
3317         PR tree-optimization/98428
3318         * tree-vect-slp.c (vect_build_slp_tree_1): Properly reject
3319         vector lane extracts for loop vectorization.
3321 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
3323         PR tree-optimization/98514
3324         * tree-ssa-reassoc.c (bb_rank): Change type from long * to
3325         int64_t *.
3326         (operand_rank): Change type from hash_map<tree, long> to
3327         hash_map<tree, int64_t>.
3328         (phi_rank): Change return type from long to int64_t.
3329         (loop_carried_phi): Change block_rank variable type from long to
3330         int64_t.
3331         (propagate_rank): Change return type, rank parameter type and
3332         op_rank variable type from long to int64_t.
3333         (find_operand_rank): Change return type from long to int64_t
3334         and change slot variable type from long * to int64_t *.
3335         (insert_operand_rank): Change rank parameter type from long to
3336         int64_t.
3337         (get_rank): Change return type and rank variable type from long to
3338         int64_t.  Use PRId64 instead of ld to print the rank.
3339         (init_reassoc): Change rank variable type from long to int64_t
3340         and adjust correspondingly bb_rank and operand_rank initialization.
3342 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
3344         PR tree-optimization/96928
3345         * tree-ssa-phiopt.c (xor_replacement): New function.
3346         (tree_ssa_phiopt_worker): Call it.
3348 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
3350         PR tree-optimization/96930
3351         * match.pd ((A / (1 << B)) -> (A >> B)): If A is extended
3352         from narrower value which has the same type as 1 << B, perform
3353         the right shift on the narrower value followed by extension.
3355 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
3357         PR tree-optimization/96239
3358         * gimple-ssa-store-merging.c (maybe_optimize_vector_constructor): New
3359         function.
3360         (get_status_for_store_merging): Don't return BB_INVALID for blocks
3361         with potential bswap optimizable CONSTRUCTORs.
3362         (pass_store_merging::execute): Optimize vector CONSTRUCTORs with bswap
3363         if possible.
3365 2021-01-05  Richard Biener  <rguenther@suse.de>
3367         PR tree-optimization/98381
3368         * tree.c (vector_element_bits): Properly compute bool vector
3369         element size.
3370         * tree-vect-loop.c (vectorizable_live_operation): Properly
3371         compute the last lane bit offset.
3373 2021-01-05  Uroš Bizjak  <ubizjak@gmail.com>
3375         PR target/98522
3376         * config/i386/sse.md (sse_cvtps2pi): Redefine as define_insn_and_split.
3377         Clear the top 64 bytes of the input XMM register.
3378         (sse_cvttps2pi): Ditto.
3380 2021-01-05  Uroš Bizjak  <ubizjak@gmail.com>
3382         PR target/98521
3383         * config/i386/xopintrin.h (_mm256_cmov_si256): New.
3385 2021-01-05  H.J. Lu  <hjl.tools@gmail.com>
3387         PR target/98495
3388         * config/i386/xmmintrin.h (_mm_extract_pi16): Cast to unsigned
3389         short first.
3391 2021-01-05  Claudiu Zissulescu  <claziss@synopsys.com>
3393         * config/arc/arc.md (maddsidi4_split): Use ACC_REG_FIRST.
3394         (umaddsidi4_split): Likewise.
3396 2021-01-05  liuhongt  <hongtao.liu@intel.com>
3398         PR target/98461
3399         * config/i386/sse.md (*sse2_pmovskb_zexthisi): New
3400         define_insn_and_split for zero_extend of subreg HI of pmovskb
3401         result.
3402         (*sse2_pmovskb_zexthisi): Add new combine splitters for
3403         zero_extend of not of subreg HI of pmovskb result.
3405 2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>
3407         PR target/97269
3408         * explow.c (convert_memory_address_addr_space_1): Handle UNSPECs
3409         nested in CONSTs.
3410         * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Use
3411         convert_memory_address to convert symbolic immediates to ptr_mode
3412         before forcing them to memory.
3414 2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>
3416         PR rtl-optimization/97144
3417         * recog.c (constrain_operands): Initialize matching_operand
3418         for each alternative, rather than only doing it once.
3420 2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>
3422         PR rtl-optimization/98403
3423         * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Explain
3424         why we don't remove call clobbers.
3425         (function_info::apply_changes_to_insn): Don't attempt to add
3426         call clobbers here.
3428 2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>
3430         PR tree-optimization/98371
3431         * tree-vect-loop.c (vect_reanalyze_as_main_loop): New function.
3432         (vect_analyze_loop): If an epilogue loop appears to be cheaper
3433         than the main loop, re-analyze it as a main loop before adopting
3434         it as a main loop.
3436 2021-01-05  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
3438         PR c++/98316
3439         * configure.ac (NETLIBS): Determine using AX_LIB_SOCKET_NSL.
3440         * aclocal.m4, configure: Regenerate.
3441         * Makefile.in (NETLIBS): Define.
3442         (BACKEND): Remove $(CODYLIB).
3444 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
3446         PR rtl-optimization/98334
3447         * simplify-rtx.c (simplify_context::simplify_binary_operation_1):
3448         Optimize (X - 1) * Y + Y to X * Y or (X + 1) * Y - Y to X * Y.
3450 2021-01-05  Bernd Edlinger  <bernd.edlinger@hotmail.de>
3452         * tree-inline.c (expand_call_inline): Restore input_location.
3453         Return result from recursive call.
3455 2021-01-04  Richard Sandiford  <richard.sandiford@arm.com>
3457         PR tree-optimization/95401
3458         * config/aarch64/aarch64-sve-builtins.cc
3459         (gimple_folder::load_store_cookie): Use bits rather than bytes
3460         for the alignment argument to IFN_MASK_LOAD and IFN_MASK_STORE.
3461         * gimple-fold.c (gimple_fold_mask_load_store_mem_ref): Likewise.
3462         * tree-vect-stmts.c (vectorizable_store): Likewise.
3463         (vectorizable_load): Likewise.
3465 2021-01-04  Richard Biener  <rguenther@suse.de>
3467         PR tree-optimization/98308
3468         * tree-vect-stmts.c (vectorizable_load): Set invariant mask
3469         SLP vectype.
3471 2021-01-04  Jakub Jelinek  <jakub@redhat.com>
3473         PR tree-optimization/95771
3474         * tree-ssa-loop-niter.c (number_of_iterations_popcount): Handle types
3475         with precision smaller than int's precision and types with precision
3476         twice as large as long long.  Formatting fixes.
3478 2021-01-04  Richard Biener  <rguenther@suse.de>
3480         PR tree-optimization/98464
3481         * tree-ssa-sccvn.c (vn_valueize_for_srt): Rename from ...
3482         (vn_valueize_wrapper): ... this.  Temporarily adjust vn_context_bb.
3483         (process_bb): Adjust.
3485 2021-01-04  Matthew Malcomson  <matthew.malcomson@arm.com>
3487         PR other/98437
3488         * doc/invoke.texi (-fsanitize=address): Fix wording describing
3489         clash with -fsanitize=hwaddress.
3491 2021-01-04  Richard Biener  <rguenther@suse.de>
3493         PR tree-optimization/98282
3494         * tree-ssa-sccvn.c (vn_get_stmt_kind): Classify tcc_reference on
3495         invariants as VN_NARY.
3497 2021-01-04  Richard Sandiford  <richard.sandiford@arm.com>
3499         PR target/89057
3500         * config/aarch64/aarch64-simd.md (aarch64_combine<mode>): Accept
3501         aarch64_simd_reg_or_zero for operand 2.  Use the combinez patterns
3502         to handle zero operands.
3504 2021-01-04  Richard Sandiford  <richard.sandiford@arm.com>
3506         * config/aarch64/aarch64.c (offset_6bit_signed_scaled_p): New function.
3507         (offset_6bit_unsigned_scaled_p): Fix typo in comment.
3508         (aarch64_sve_prefetch_operand_p): Accept MUL VLs in the range
3509         [-32, 31].
3511 2021-01-04  Richard Biener  <rguenther@suse.de>
3513         PR tree-optimization/98393
3514         * tree-vect-slp.c (vect_build_slp_tree): Properly zero matches
3515         when hitting the limit.
3517 2021-01-04  Richard Biener  <rguenther@suse.de>
3519         PR tree-optimization/98291
3520         * tree-vect-loop.c (vectorizable_reduction): Bypass
3521         associativity check for SLP reductions with VF 1.
3523 2021-01-04  Jakub Jelinek  <jakub@redhat.com>
3525         PR tree-optimization/96782
3526         * match.pd (x == ~x -> false, x != ~x -> true): New simplifications.
3528 2021-01-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>
3530         * collect-utils.c (collect_execute): Check dumppfx.
3531         * collect2.c (maybe_run_lto_and_relink, do_link): Pass atsuffix
3532         to collect_execute.
3533         (do_link): Add new parameter atsuffix.
3534         (main): Handle -dumpdir option.  Skip one argument for
3535         -o, -isystem and -B options.
3536         * gcc.c (make_at_file): New helper function.
3537         (close_at_file): Use it.
3539 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
3541         * config/darwin.h (MIN_LD64_NO_COAL_SECTS): Adjust.
3542         Amend handling for LD64_VERSION fallback defaults.
3544 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
3546         * config.gcc: Compute default version information
3547         from the configured target.  Likewise defaults for
3548         ld64.
3549         * config/darwin10.h: Removed.
3550         * config/darwin12.h: Removed.
3551         * config/darwin9.h: Removed.
3552         * config/rs6000/darwin8.h: Removed.
3554 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
3556         * config/darwin9.h (ASM_OUTPUT_ALIGNED_COMMON): Delete.
3558 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
3560         * config/darwin9.h (STACK_CHECK_STATIC_BUILTIN): Move from here..
3561         * config/darwin.h (STACK_CHECK_STATIC_BUILTIN): .. to here.
3563 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
3565         * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move from
3566         here...
3567         * config/darwin.h (LINK_GCC_C_SEQUENCE_SPEC): ... to here.
3569 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
3571         * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move the spec
3572         for the Darwin10 unwinder stub from here ...
3573         * config/darwin.h (LINK_COMMAND_SPEC_A): ... to here.
3575 2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>
3577         * config/darwin.h (DSYMUTIL_SPEC): Default to DWARF
3578         (ASM_DEBUG_SPEC):Only define if the assembler supports
3579         stabs.
3580         (PREFERRED_DEBUGGING_TYPE): Default to DWARF.
3581         (DARWIN_PREFER_DWARF): Define.
3582         * config/darwin9.h (PREFERRED_DEBUGGING_TYPE): Remove.
3583         (DARWIN_PREFER_DWARF): Likewise
3584         (DSYMUTIL_SPEC): Likewise.
3585         (COLLECT_RUN_DSYMUTIL): Likewise.
3586         (ASM_DEBUG_SPEC): Likewise.
3587         (ASM_DEBUG_OPTION_SPEC): Likewise.
3589 2021-01-02  Jan Hubicka  <jh@suse.cz>
3591         * cfg.c (free_block): ggc_free bb.
3593 2021-01-01  Jakub Jelinek  <jakub@redhat.com>
3595         * gcc.c (process_command): Update copyright notice dates.
3596         * gcov-dump.c (print_version): Ditto.
3597         * gcov.c (print_version): Ditto.
3598         * gcov-tool.c (print_version): Ditto.
3599         * gengtype.c (create_file): Ditto.
3600         * doc/cpp.texi: Bump @copying's copyright year.
3601         * doc/cppinternals.texi: Ditto.
3602         * doc/gcc.texi: Ditto.
3603         * doc/gccint.texi: Ditto.
3604         * doc/gcov.texi: Ditto.
3605         * doc/install.texi: Ditto.
3606         * doc/invoke.texi: Ditto.
3608 2021-01-01  Jakub Jelinek  <jakub@redhat.com>
3610         * ChangeLog-2020: Rotate ChangeLog.  New file.
3613 Copyright (C) 2021 Free Software Foundation, Inc.
3615 Copying and distribution of this file, with or without modification,
3616 are permitted in any medium without royalty provided the copyright
3617 notice and this notice are preserved.