1 /* Subroutines used by or related to instruction recognition.
2 Copyright (C) 1987, 1988, 91-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 #include "insn-config.h"
26 #include "insn-attr.h"
27 #include "insn-flags.h"
28 #include "insn-codes.h"
31 #include "hard-reg-set.h"
35 #ifndef STACK_PUSH_CODE
36 #ifdef STACK_GROWS_DOWNWARD
37 #define STACK_PUSH_CODE PRE_DEC
39 #define STACK_PUSH_CODE PRE_INC
43 /* Import from final.c: */
44 extern rtx
alter_subreg ();
46 static rtx
*find_single_use_1
PROTO((rtx
, rtx
*));
48 /* Nonzero means allow operands to be volatile.
49 This should be 0 if you are generating rtl, such as if you are calling
50 the functions in optabs.c and expmed.c (most of the time).
51 This should be 1 if all valid insns need to be recognized,
52 such as in regclass.c and final.c and reload.c.
54 init_recog and init_recog_no_volatile are responsible for setting this. */
58 /* On return from `constrain_operands', indicate which alternative
61 int which_alternative
;
63 /* Nonzero after end of reload pass.
64 Set to 1 or 0 by toplev.c.
65 Controls the significance of (SUBREG (MEM)). */
69 /* Initialize data used by the function `recog'.
70 This must be called once in the compilation of a function
71 before any insn recognition may be done in the function. */
74 init_recog_no_volatile ()
85 /* Try recognizing the instruction INSN,
86 and return the code number that results.
87 Remember the code so that repeated calls do not
88 need to spend the time for actual rerecognition.
90 This function is the normal interface to instruction recognition.
91 The automatically-generated function `recog' is normally called
92 through this one. (The only exception is in combine.c.) */
98 if (INSN_CODE (insn
) < 0)
99 INSN_CODE (insn
) = recog (PATTERN (insn
), insn
, NULL_PTR
);
100 return INSN_CODE (insn
);
103 /* Check that X is an insn-body for an `asm' with operands
104 and that the operands mentioned in it are legitimate. */
107 check_asm_operands (x
)
110 int noperands
= asm_noperands (x
);
119 operands
= (rtx
*) alloca (noperands
* sizeof (rtx
));
120 decode_asm_operands (x
, operands
, NULL_PTR
, NULL_PTR
, NULL_PTR
);
122 for (i
= 0; i
< noperands
; i
++)
123 if (!general_operand (operands
[i
], VOIDmode
))
129 /* Static data for the next two routines.
131 The maximum number of changes supported is defined as the maximum
132 number of operands times 5. This allows for repeated substitutions
133 inside complex indexed address, or, alternatively, changes in up
136 #define MAX_CHANGE_LOCS (MAX_RECOG_OPERANDS * 5)
138 static rtx change_objects
[MAX_CHANGE_LOCS
];
139 static int change_old_codes
[MAX_CHANGE_LOCS
];
140 static rtx
*change_locs
[MAX_CHANGE_LOCS
];
141 static rtx change_olds
[MAX_CHANGE_LOCS
];
143 static int num_changes
= 0;
145 /* Validate a proposed change to OBJECT. LOC is the location in the rtl for
146 at which NEW will be placed. If OBJECT is zero, no validation is done,
147 the change is simply made.
149 Two types of objects are supported: If OBJECT is a MEM, memory_address_p
150 will be called with the address and mode as parameters. If OBJECT is
151 an INSN, CALL_INSN, or JUMP_INSN, the insn will be re-recognized with
154 IN_GROUP is non-zero if this is part of a group of changes that must be
155 performed as a group. In that case, the changes will be stored. The
156 function `apply_change_group' will validate and apply the changes.
158 If IN_GROUP is zero, this is a single change. Try to recognize the insn
159 or validate the memory reference with the change applied. If the result
160 is not valid for the machine, suppress the change and return zero.
161 Otherwise, perform the change and return 1. */
164 validate_change (object
, loc
, new, in_group
)
172 if (old
== new || rtx_equal_p (old
, new))
175 if (num_changes
>= MAX_CHANGE_LOCS
176 || (in_group
== 0 && num_changes
!= 0))
181 /* Save the information describing this change. */
182 change_objects
[num_changes
] = object
;
183 change_locs
[num_changes
] = loc
;
184 change_olds
[num_changes
] = old
;
186 if (object
&& GET_CODE (object
) != MEM
)
188 /* Set INSN_CODE to force rerecognition of insn. Save old code in
190 change_old_codes
[num_changes
] = INSN_CODE (object
);
191 INSN_CODE (object
) = -1;
196 /* If we are making a group of changes, return 1. Otherwise, validate the
197 change group we made. */
202 return apply_change_group ();
205 /* Apply a group of changes previously issued with `validate_change'.
206 Return 1 if all changes are valid, zero otherwise. */
209 apply_change_group ()
213 /* The changes have been applied and all INSN_CODEs have been reset to force
216 The changes are valid if we aren't given an object, or if we are
217 given a MEM and it still is a valid address, or if this is in insn
218 and it is recognized. In the latter case, if reload has completed,
219 we also require that the operands meet the constraints for
220 the insn. We do not allow modifying an ASM_OPERANDS after reload
221 has completed because verifying the constraints is too difficult. */
223 for (i
= 0; i
< num_changes
; i
++)
225 rtx object
= change_objects
[i
];
230 if (GET_CODE (object
) == MEM
)
232 if (! memory_address_p (GET_MODE (object
), XEXP (object
, 0)))
235 else if ((recog_memoized (object
) < 0
236 && (asm_noperands (PATTERN (object
)) < 0
237 || ! check_asm_operands (PATTERN (object
))
238 || reload_completed
))
240 && (insn_extract (object
),
241 ! constrain_operands (INSN_CODE (object
), 1))))
243 rtx pat
= PATTERN (object
);
245 /* Perhaps we couldn't recognize the insn because there were
246 extra CLOBBERs at the end. If so, try to re-recognize
247 without the last CLOBBER (later iterations will cause each of
248 them to be eliminated, in turn). But don't do this if we
249 have an ASM_OPERAND. */
250 if (GET_CODE (pat
) == PARALLEL
251 && GET_CODE (XVECEXP (pat
, 0, XVECLEN (pat
, 0) - 1)) == CLOBBER
252 && asm_noperands (PATTERN (object
)) < 0)
256 if (XVECLEN (pat
, 0) == 2)
257 newpat
= XVECEXP (pat
, 0, 0);
262 newpat
= gen_rtx (PARALLEL
, VOIDmode
,
263 gen_rtvec (XVECLEN (pat
, 0) - 1));
264 for (j
= 0; j
< XVECLEN (newpat
, 0); j
++)
265 XVECEXP (newpat
, 0, j
) = XVECEXP (pat
, 0, j
);
268 /* Add a new change to this group to replace the pattern
269 with this new pattern. Then consider this change
270 as having succeeded. The change we added will
271 cause the entire call to fail if things remain invalid.
273 Note that this can lose if a later change than the one
274 we are processing specified &XVECEXP (PATTERN (object), 0, X)
275 but this shouldn't occur. */
277 validate_change (object
, &PATTERN (object
), newpat
, 1);
279 else if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
280 /* If this insn is a CLOBBER or USE, it is always valid, but is
288 if (i
== num_changes
)
300 /* Return the number of changes so far in the current group. */
303 num_validated_changes ()
308 /* Retract the changes numbered NUM and up. */
316 /* Back out all the changes. Do this in the opposite order in which
318 for (i
= num_changes
- 1; i
>= num
; i
--)
320 *change_locs
[i
] = change_olds
[i
];
321 if (change_objects
[i
] && GET_CODE (change_objects
[i
]) != MEM
)
322 INSN_CODE (change_objects
[i
]) = change_old_codes
[i
];
327 /* Replace every occurrence of FROM in X with TO. Mark each change with
328 validate_change passing OBJECT. */
331 validate_replace_rtx_1 (loc
, from
, to
, object
)
333 rtx from
, to
, object
;
337 register rtx x
= *loc
;
338 enum rtx_code code
= GET_CODE (x
);
340 /* X matches FROM if it is the same rtx or they are both referring to the
341 same register in the same mode. Avoid calling rtx_equal_p unless the
342 operands look similar. */
345 || (GET_CODE (x
) == REG
&& GET_CODE (from
) == REG
346 && GET_MODE (x
) == GET_MODE (from
)
347 && REGNO (x
) == REGNO (from
))
348 || (GET_CODE (x
) == GET_CODE (from
) && GET_MODE (x
) == GET_MODE (from
)
349 && rtx_equal_p (x
, from
)))
351 validate_change (object
, loc
, to
, 1);
355 /* For commutative or comparison operations, try replacing each argument
356 separately and seeing if we made any changes. If so, put a constant
358 if (GET_RTX_CLASS (code
) == '<' || GET_RTX_CLASS (code
) == 'c')
360 int prev_changes
= num_changes
;
362 validate_replace_rtx_1 (&XEXP (x
, 0), from
, to
, object
);
363 validate_replace_rtx_1 (&XEXP (x
, 1), from
, to
, object
);
364 if (prev_changes
!= num_changes
&& CONSTANT_P (XEXP (x
, 0)))
366 validate_change (object
, loc
,
367 gen_rtx (GET_RTX_CLASS (code
) == 'c' ? code
368 : swap_condition (code
),
369 GET_MODE (x
), XEXP (x
, 1), XEXP (x
, 0)),
376 /* Note that if CODE's RTX_CLASS is "c" or "<" we will have already
377 done the substitution, otherwise we won't. */
382 /* If we have have a PLUS whose second operand is now a CONST_INT, use
383 plus_constant to try to simplify it. */
384 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
&& XEXP (x
, 1) == to
)
385 validate_change (object
, loc
, plus_constant (XEXP (x
, 0), INTVAL (to
)),
390 if (GET_CODE (to
) == CONST_INT
&& XEXP (x
, 1) == from
)
392 validate_change (object
, loc
,
393 plus_constant (XEXP (x
, 0), - INTVAL (to
)),
401 /* In these cases, the operation to be performed depends on the mode
402 of the operand. If we are replacing the operand with a VOIDmode
403 constant, we lose the information. So try to simplify the operation
404 in that case. If it fails, substitute in something that we know
405 won't be recognized. */
406 if (GET_MODE (to
) == VOIDmode
407 && (XEXP (x
, 0) == from
408 || (GET_CODE (XEXP (x
, 0)) == REG
&& GET_CODE (from
) == REG
409 && GET_MODE (XEXP (x
, 0)) == GET_MODE (from
)
410 && REGNO (XEXP (x
, 0)) == REGNO (from
))))
412 rtx
new = simplify_unary_operation (code
, GET_MODE (x
), to
,
415 new = gen_rtx (CLOBBER
, GET_MODE (x
), const0_rtx
);
417 validate_change (object
, loc
, new, 1);
423 /* If we have a SUBREG of a register that we are replacing and we are
424 replacing it with a MEM, make a new MEM and try replacing the
425 SUBREG with it. Don't do this if the MEM has a mode-dependent address
426 or if we would be widening it. */
428 if (SUBREG_REG (x
) == from
429 && GET_CODE (from
) == REG
430 && GET_CODE (to
) == MEM
431 && ! mode_dependent_address_p (XEXP (to
, 0))
432 && ! MEM_VOLATILE_P (to
)
433 && GET_MODE_SIZE (GET_MODE (x
)) <= GET_MODE_SIZE (GET_MODE (to
)))
435 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
436 enum machine_mode mode
= GET_MODE (x
);
439 if (BYTES_BIG_ENDIAN
)
440 offset
+= (MIN (UNITS_PER_WORD
,
441 GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
442 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
)));
444 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (to
, 0), offset
));
445 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (to
);
446 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (to
);
447 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (to
);
448 validate_change (object
, loc
, new, 1);
455 /* If we are replacing a register with memory, try to change the memory
456 to be the mode required for memory in extract operations (this isn't
457 likely to be an insertion operation; if it was, nothing bad will
458 happen, we might just fail in some cases). */
460 if (XEXP (x
, 0) == from
&& GET_CODE (from
) == REG
&& GET_CODE (to
) == MEM
461 && GET_CODE (XEXP (x
, 1)) == CONST_INT
462 && GET_CODE (XEXP (x
, 2)) == CONST_INT
463 && ! mode_dependent_address_p (XEXP (to
, 0))
464 && ! MEM_VOLATILE_P (to
))
466 enum machine_mode wanted_mode
= VOIDmode
;
467 enum machine_mode is_mode
= GET_MODE (to
);
468 int width
= INTVAL (XEXP (x
, 1));
469 int pos
= INTVAL (XEXP (x
, 2));
472 if (code
== ZERO_EXTRACT
)
473 wanted_mode
= insn_operand_mode
[(int) CODE_FOR_extzv
][1];
476 if (code
== SIGN_EXTRACT
)
477 wanted_mode
= insn_operand_mode
[(int) CODE_FOR_extv
][1];
480 /* If we have a narrower mode, we can do something. */
481 if (wanted_mode
!= VOIDmode
482 && GET_MODE_SIZE (wanted_mode
) < GET_MODE_SIZE (is_mode
))
484 int offset
= pos
/ BITS_PER_UNIT
;
487 /* If the bytes and bits are counted differently, we
488 must adjust the offset. */
489 if (BYTES_BIG_ENDIAN
!= BITS_BIG_ENDIAN
)
490 offset
= (GET_MODE_SIZE (is_mode
) - GET_MODE_SIZE (wanted_mode
)
493 pos
%= GET_MODE_BITSIZE (wanted_mode
);
495 newmem
= gen_rtx (MEM
, wanted_mode
,
496 plus_constant (XEXP (to
, 0), offset
));
497 RTX_UNCHANGING_P (newmem
) = RTX_UNCHANGING_P (to
);
498 MEM_VOLATILE_P (newmem
) = MEM_VOLATILE_P (to
);
499 MEM_IN_STRUCT_P (newmem
) = MEM_IN_STRUCT_P (to
);
501 validate_change (object
, &XEXP (x
, 2), GEN_INT (pos
), 1);
502 validate_change (object
, &XEXP (x
, 0), newmem
, 1);
512 fmt
= GET_RTX_FORMAT (code
);
513 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
516 validate_replace_rtx_1 (&XEXP (x
, i
), from
, to
, object
);
517 else if (fmt
[i
] == 'E')
518 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
519 validate_replace_rtx_1 (&XVECEXP (x
, i
, j
), from
, to
, object
);
523 /* Try replacing every occurrence of FROM in INSN with TO. After all
524 changes have been made, validate by seeing if INSN is still valid. */
527 validate_replace_rtx (from
, to
, insn
)
530 validate_replace_rtx_1 (&PATTERN (insn
), from
, to
, insn
);
531 return apply_change_group ();
535 /* Return 1 if the insn using CC0 set by INSN does not contain
536 any ordered tests applied to the condition codes.
537 EQ and NE tests do not count. */
540 next_insn_tests_no_inequality (insn
)
543 register rtx next
= next_cc0_user (insn
);
545 /* If there is no next insn, we have to take the conservative choice. */
549 return ((GET_CODE (next
) == JUMP_INSN
550 || GET_CODE (next
) == INSN
551 || GET_CODE (next
) == CALL_INSN
)
552 && ! inequality_comparisons_p (PATTERN (next
)));
555 #if 0 /* This is useless since the insn that sets the cc's
556 must be followed immediately by the use of them. */
557 /* Return 1 if the CC value set up by INSN is not used. */
560 next_insns_test_no_inequality (insn
)
563 register rtx next
= NEXT_INSN (insn
);
565 for (; next
!= 0; next
= NEXT_INSN (next
))
567 if (GET_CODE (next
) == CODE_LABEL
568 || GET_CODE (next
) == BARRIER
)
570 if (GET_CODE (next
) == NOTE
)
572 if (inequality_comparisons_p (PATTERN (next
)))
574 if (sets_cc0_p (PATTERN (next
)) == 1)
576 if (! reg_mentioned_p (cc0_rtx
, PATTERN (next
)))
584 /* This is used by find_single_use to locate an rtx that contains exactly one
585 use of DEST, which is typically either a REG or CC0. It returns a
586 pointer to the innermost rtx expression containing DEST. Appearances of
587 DEST that are being used to totally replace it are not counted. */
590 find_single_use_1 (dest
, loc
)
595 enum rtx_code code
= GET_CODE (x
);
612 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
613 of a REG that occupies all of the REG, the insn uses DEST if
614 it is mentioned in the destination or the source. Otherwise, we
615 need just check the source. */
616 if (GET_CODE (SET_DEST (x
)) != CC0
617 && GET_CODE (SET_DEST (x
)) != PC
618 && GET_CODE (SET_DEST (x
)) != REG
619 && ! (GET_CODE (SET_DEST (x
)) == SUBREG
620 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
621 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (x
))))
622 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
623 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (x
)))
624 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
627 return find_single_use_1 (dest
, &SET_SRC (x
));
631 return find_single_use_1 (dest
, &XEXP (x
, 0));
637 /* If it wasn't one of the common cases above, check each expression and
638 vector of this code. Look for a unique usage of DEST. */
640 fmt
= GET_RTX_FORMAT (code
);
641 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
645 if (dest
== XEXP (x
, i
)
646 || (GET_CODE (dest
) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
647 && REGNO (dest
) == REGNO (XEXP (x
, i
))))
650 this_result
= find_single_use_1 (dest
, &XEXP (x
, i
));
653 result
= this_result
;
654 else if (this_result
)
655 /* Duplicate usage. */
658 else if (fmt
[i
] == 'E')
662 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
664 if (XVECEXP (x
, i
, j
) == dest
665 || (GET_CODE (dest
) == REG
666 && GET_CODE (XVECEXP (x
, i
, j
)) == REG
667 && REGNO (XVECEXP (x
, i
, j
)) == REGNO (dest
)))
670 this_result
= find_single_use_1 (dest
, &XVECEXP (x
, i
, j
));
673 result
= this_result
;
674 else if (this_result
)
683 /* See if DEST, produced in INSN, is used only a single time in the
684 sequel. If so, return a pointer to the innermost rtx expression in which
687 If PLOC is non-zero, *PLOC is set to the insn containing the single use.
689 This routine will return usually zero either before flow is called (because
690 there will be no LOG_LINKS notes) or after reload (because the REG_DEAD
691 note can't be trusted).
693 If DEST is cc0_rtx, we look only at the next insn. In that case, we don't
694 care about REG_DEAD notes or LOG_LINKS.
696 Otherwise, we find the single use by finding an insn that has a
697 LOG_LINKS pointing at INSN and has a REG_DEAD note for DEST. If DEST is
698 only referenced once in that insn, we know that it must be the first
699 and last insn referencing DEST. */
702 find_single_use (dest
, insn
, ploc
)
714 next
= NEXT_INSN (insn
);
716 || (GET_CODE (next
) != INSN
&& GET_CODE (next
) != JUMP_INSN
))
719 result
= find_single_use_1 (dest
, &PATTERN (next
));
726 if (reload_completed
|| reload_in_progress
|| GET_CODE (dest
) != REG
)
729 for (next
= next_nonnote_insn (insn
);
730 next
!= 0 && GET_CODE (next
) != CODE_LABEL
;
731 next
= next_nonnote_insn (next
))
732 if (GET_RTX_CLASS (GET_CODE (next
)) == 'i' && dead_or_set_p (next
, dest
))
734 for (link
= LOG_LINKS (next
); link
; link
= XEXP (link
, 1))
735 if (XEXP (link
, 0) == insn
)
740 result
= find_single_use_1 (dest
, &PATTERN (next
));
750 /* Return 1 if OP is a valid general operand for machine mode MODE.
751 This is either a register reference, a memory reference,
752 or a constant. In the case of a memory reference, the address
753 is checked for general validity for the target machine.
755 Register and memory references must have mode MODE in order to be valid,
756 but some constants have no machine mode and are valid for any mode.
758 If MODE is VOIDmode, OP is checked for validity for whatever mode
761 The main use of this function is as a predicate in match_operand
762 expressions in the machine description.
764 For an explanation of this function's behavior for registers of
765 class NO_REGS, see the comment for `register_operand'. */
768 general_operand (op
, mode
)
770 enum machine_mode mode
;
772 register enum rtx_code code
= GET_CODE (op
);
773 int mode_altering_drug
= 0;
775 if (mode
== VOIDmode
)
776 mode
= GET_MODE (op
);
778 /* Don't accept CONST_INT or anything similar
779 if the caller wants something floating. */
780 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
781 && GET_MODE_CLASS (mode
) != MODE_INT
782 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
786 return ((GET_MODE (op
) == VOIDmode
|| GET_MODE (op
) == mode
)
787 #ifdef LEGITIMATE_PIC_OPERAND_P
788 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))
790 && LEGITIMATE_CONSTANT_P (op
));
792 /* Except for certain constants with VOIDmode, already checked for,
793 OP's mode must match MODE if MODE specifies a mode. */
795 if (GET_MODE (op
) != mode
)
800 #ifdef INSN_SCHEDULING
801 /* On machines that have insn scheduling, we want all memory
802 reference to be explicit, so outlaw paradoxical SUBREGs. */
803 if (GET_CODE (SUBREG_REG (op
)) == MEM
804 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
))))
808 op
= SUBREG_REG (op
);
809 code
= GET_CODE (op
);
811 /* No longer needed, since (SUBREG (MEM...))
812 will load the MEM into a reload reg in the MEM's own mode. */
813 mode_altering_drug
= 1;
818 /* A register whose class is NO_REGS is not a general operand. */
819 return (REGNO (op
) >= FIRST_PSEUDO_REGISTER
820 || REGNO_REG_CLASS (REGNO (op
)) != NO_REGS
);
824 register rtx y
= XEXP (op
, 0);
825 if (! volatile_ok
&& MEM_VOLATILE_P (op
))
827 if (GET_CODE (y
) == ADDRESSOF
)
829 /* Use the mem's mode, since it will be reloaded thus. */
830 mode
= GET_MODE (op
);
831 GO_IF_LEGITIMATE_ADDRESS (mode
, y
, win
);
834 /* Pretend this is an operand for now; we'll run force_operand
835 on its replacement in fixup_var_refs_1. */
836 if (code
== ADDRESSOF
)
842 if (mode_altering_drug
)
843 return ! mode_dependent_address_p (XEXP (op
, 0));
847 /* Return 1 if OP is a valid memory address for a memory reference
850 The main use of this function is as a predicate in match_operand
851 expressions in the machine description. */
854 address_operand (op
, mode
)
856 enum machine_mode mode
;
858 return memory_address_p (mode
, op
);
861 /* Return 1 if OP is a register reference of mode MODE.
862 If MODE is VOIDmode, accept a register in any mode.
864 The main use of this function is as a predicate in match_operand
865 expressions in the machine description.
867 As a special exception, registers whose class is NO_REGS are
868 not accepted by `register_operand'. The reason for this change
869 is to allow the representation of special architecture artifacts
870 (such as a condition code register) without extending the rtl
871 definitions. Since registers of class NO_REGS cannot be used
872 as registers in any case where register classes are examined,
873 it is most consistent to keep this function from accepting them. */
876 register_operand (op
, mode
)
878 enum machine_mode mode
;
880 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
883 if (GET_CODE (op
) == SUBREG
)
885 /* Before reload, we can allow (SUBREG (MEM...)) as a register operand
886 because it is guaranteed to be reloaded into one.
887 Just make sure the MEM is valid in itself.
888 (Ideally, (SUBREG (MEM)...) should not exist after reload,
889 but currently it does result from (SUBREG (REG)...) where the
890 reg went on the stack.) */
891 if (! reload_completed
&& GET_CODE (SUBREG_REG (op
)) == MEM
)
892 return general_operand (op
, mode
);
894 #ifdef CLASS_CANNOT_CHANGE_SIZE
895 if (GET_CODE (SUBREG_REG (op
)) == REG
896 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
897 && TEST_HARD_REG_BIT (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
898 REGNO (SUBREG_REG (op
)))
899 && (GET_MODE_SIZE (mode
)
900 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
))))
901 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (op
))) != MODE_COMPLEX_INT
902 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (op
))) != MODE_COMPLEX_FLOAT
)
906 op
= SUBREG_REG (op
);
909 /* We don't consider registers whose class is NO_REGS
910 to be a register operand. */
911 return (GET_CODE (op
) == REG
912 && (REGNO (op
) >= FIRST_PSEUDO_REGISTER
913 || REGNO_REG_CLASS (REGNO (op
)) != NO_REGS
));
916 /* Return 1 if OP should match a MATCH_SCRATCH, i.e., if it is a SCRATCH
917 or a hard register. */
920 scratch_operand (op
, mode
)
922 enum machine_mode mode
;
924 return (GET_MODE (op
) == mode
925 && (GET_CODE (op
) == SCRATCH
926 || (GET_CODE (op
) == REG
927 && REGNO (op
) < FIRST_PSEUDO_REGISTER
)));
930 /* Return 1 if OP is a valid immediate operand for mode MODE.
932 The main use of this function is as a predicate in match_operand
933 expressions in the machine description. */
936 immediate_operand (op
, mode
)
938 enum machine_mode mode
;
940 /* Don't accept CONST_INT or anything similar
941 if the caller wants something floating. */
942 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
943 && GET_MODE_CLASS (mode
) != MODE_INT
944 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
947 return (CONSTANT_P (op
)
948 && (GET_MODE (op
) == mode
|| mode
== VOIDmode
949 || GET_MODE (op
) == VOIDmode
)
950 #ifdef LEGITIMATE_PIC_OPERAND_P
951 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))
953 && LEGITIMATE_CONSTANT_P (op
));
956 /* Returns 1 if OP is an operand that is a CONST_INT. */
959 const_int_operand (op
, mode
)
961 enum machine_mode mode
;
963 return GET_CODE (op
) == CONST_INT
;
966 /* Returns 1 if OP is an operand that is a constant integer or constant
967 floating-point number. */
970 const_double_operand (op
, mode
)
972 enum machine_mode mode
;
974 /* Don't accept CONST_INT or anything similar
975 if the caller wants something floating. */
976 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
977 && GET_MODE_CLASS (mode
) != MODE_INT
978 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
981 return ((GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
)
982 && (mode
== VOIDmode
|| GET_MODE (op
) == mode
983 || GET_MODE (op
) == VOIDmode
));
986 /* Return 1 if OP is a general operand that is not an immediate operand. */
989 nonimmediate_operand (op
, mode
)
991 enum machine_mode mode
;
993 return (general_operand (op
, mode
) && ! CONSTANT_P (op
));
996 /* Return 1 if OP is a register reference or immediate value of mode MODE. */
999 nonmemory_operand (op
, mode
)
1001 enum machine_mode mode
;
1003 if (CONSTANT_P (op
))
1005 /* Don't accept CONST_INT or anything similar
1006 if the caller wants something floating. */
1007 if (GET_MODE (op
) == VOIDmode
&& mode
!= VOIDmode
1008 && GET_MODE_CLASS (mode
) != MODE_INT
1009 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
1012 return ((GET_MODE (op
) == VOIDmode
|| GET_MODE (op
) == mode
)
1013 #ifdef LEGITIMATE_PIC_OPERAND_P
1014 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))
1016 && LEGITIMATE_CONSTANT_P (op
));
1019 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1022 if (GET_CODE (op
) == SUBREG
)
1024 /* Before reload, we can allow (SUBREG (MEM...)) as a register operand
1025 because it is guaranteed to be reloaded into one.
1026 Just make sure the MEM is valid in itself.
1027 (Ideally, (SUBREG (MEM)...) should not exist after reload,
1028 but currently it does result from (SUBREG (REG)...) where the
1029 reg went on the stack.) */
1030 if (! reload_completed
&& GET_CODE (SUBREG_REG (op
)) == MEM
)
1031 return general_operand (op
, mode
);
1032 op
= SUBREG_REG (op
);
1035 /* We don't consider registers whose class is NO_REGS
1036 to be a register operand. */
1037 return (GET_CODE (op
) == REG
1038 && (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1039 || REGNO_REG_CLASS (REGNO (op
)) != NO_REGS
));
1042 /* Return 1 if OP is a valid operand that stands for pushing a
1043 value of mode MODE onto the stack.
1045 The main use of this function is as a predicate in match_operand
1046 expressions in the machine description. */
1049 push_operand (op
, mode
)
1051 enum machine_mode mode
;
1053 if (GET_CODE (op
) != MEM
)
1056 if (GET_MODE (op
) != mode
)
1061 if (GET_CODE (op
) != STACK_PUSH_CODE
)
1064 return XEXP (op
, 0) == stack_pointer_rtx
;
1067 /* Return 1 if ADDR is a valid memory address for mode MODE. */
1070 memory_address_p (mode
, addr
)
1071 enum machine_mode mode
;
1074 if (GET_CODE (addr
) == ADDRESSOF
)
1077 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1084 /* Return 1 if OP is a valid memory reference with mode MODE,
1085 including a valid address.
1087 The main use of this function is as a predicate in match_operand
1088 expressions in the machine description. */
1091 memory_operand (op
, mode
)
1093 enum machine_mode mode
;
1097 if (! reload_completed
)
1098 /* Note that no SUBREG is a memory operand before end of reload pass,
1099 because (SUBREG (MEM...)) forces reloading into a register. */
1100 return GET_CODE (op
) == MEM
&& general_operand (op
, mode
);
1102 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1106 if (GET_CODE (inner
) == SUBREG
)
1107 inner
= SUBREG_REG (inner
);
1109 return (GET_CODE (inner
) == MEM
&& general_operand (op
, mode
));
1112 /* Return 1 if OP is a valid indirect memory reference with mode MODE;
1113 that is, a memory reference whose address is a general_operand. */
1116 indirect_operand (op
, mode
)
1118 enum machine_mode mode
;
1120 /* Before reload, a SUBREG isn't in memory (see memory_operand, above). */
1121 if (! reload_completed
1122 && GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == MEM
)
1124 register int offset
= SUBREG_WORD (op
) * UNITS_PER_WORD
;
1125 rtx inner
= SUBREG_REG (op
);
1127 if (BYTES_BIG_ENDIAN
)
1128 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (op
)))
1129 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (inner
))));
1131 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1134 /* The only way that we can have a general_operand as the resulting
1135 address is if OFFSET is zero and the address already is an operand
1136 or if the address is (plus Y (const_int -OFFSET)) and Y is an
1139 return ((offset
== 0 && general_operand (XEXP (inner
, 0), Pmode
))
1140 || (GET_CODE (XEXP (inner
, 0)) == PLUS
1141 && GET_CODE (XEXP (XEXP (inner
, 0), 1)) == CONST_INT
1142 && INTVAL (XEXP (XEXP (inner
, 0), 1)) == -offset
1143 && general_operand (XEXP (XEXP (inner
, 0), 0), Pmode
)));
1146 return (GET_CODE (op
) == MEM
1147 && memory_operand (op
, mode
)
1148 && general_operand (XEXP (op
, 0), Pmode
));
1151 /* Return 1 if this is a comparison operator. This allows the use of
1152 MATCH_OPERATOR to recognize all the branch insns. */
1155 comparison_operator (op
, mode
)
1157 enum machine_mode mode
;
1159 return ((mode
== VOIDmode
|| GET_MODE (op
) == mode
)
1160 && GET_RTX_CLASS (GET_CODE (op
)) == '<');
1163 /* If BODY is an insn body that uses ASM_OPERANDS,
1164 return the number of operands (both input and output) in the insn.
1165 Otherwise return -1. */
1168 asm_noperands (body
)
1171 if (GET_CODE (body
) == ASM_OPERANDS
)
1172 /* No output operands: return number of input operands. */
1173 return ASM_OPERANDS_INPUT_LENGTH (body
);
1174 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1175 /* Single output operand: BODY is (set OUTPUT (asm_operands ...)). */
1176 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
)) + 1;
1177 else if (GET_CODE (body
) == PARALLEL
1178 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
1179 && GET_CODE (SET_SRC (XVECEXP (body
, 0, 0))) == ASM_OPERANDS
)
1181 /* Multiple output operands, or 1 output plus some clobbers:
1182 body is [(set OUTPUT (asm_operands ...))... (clobber (reg ...))...]. */
1186 /* Count backwards through CLOBBERs to determine number of SETs. */
1187 for (i
= XVECLEN (body
, 0); i
> 0; i
--)
1189 if (GET_CODE (XVECEXP (body
, 0, i
- 1)) == SET
)
1191 if (GET_CODE (XVECEXP (body
, 0, i
- 1)) != CLOBBER
)
1195 /* N_SETS is now number of output operands. */
1198 /* Verify that all the SETs we have
1199 came from a single original asm_operands insn
1200 (so that invalid combinations are blocked). */
1201 for (i
= 0; i
< n_sets
; i
++)
1203 rtx elt
= XVECEXP (body
, 0, i
);
1204 if (GET_CODE (elt
) != SET
)
1206 if (GET_CODE (SET_SRC (elt
)) != ASM_OPERANDS
)
1208 /* If these ASM_OPERANDS rtx's came from different original insns
1209 then they aren't allowed together. */
1210 if (ASM_OPERANDS_INPUT_VEC (SET_SRC (elt
))
1211 != ASM_OPERANDS_INPUT_VEC (SET_SRC (XVECEXP (body
, 0, 0))))
1214 return (ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)))
1217 else if (GET_CODE (body
) == PARALLEL
1218 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1220 /* 0 outputs, but some clobbers:
1221 body is [(asm_operands ...) (clobber (reg ...))...]. */
1224 /* Make sure all the other parallel things really are clobbers. */
1225 for (i
= XVECLEN (body
, 0) - 1; i
> 0; i
--)
1226 if (GET_CODE (XVECEXP (body
, 0, i
)) != CLOBBER
)
1229 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
1235 /* Assuming BODY is an insn body that uses ASM_OPERANDS,
1236 copy its operands (both input and output) into the vector OPERANDS,
1237 the locations of the operands within the insn into the vector OPERAND_LOCS,
1238 and the constraints for the operands into CONSTRAINTS.
1239 Write the modes of the operands into MODES.
1240 Return the assembler-template.
1242 If MODES, OPERAND_LOCS, CONSTRAINTS or OPERANDS is 0,
1243 we don't store that info. */
1246 decode_asm_operands (body
, operands
, operand_locs
, constraints
, modes
)
1251 enum machine_mode
*modes
;
1257 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1259 rtx asmop
= SET_SRC (body
);
1260 /* Single output operand: BODY is (set OUTPUT (asm_operands ....)). */
1262 noperands
= ASM_OPERANDS_INPUT_LENGTH (asmop
) + 1;
1264 for (i
= 1; i
< noperands
; i
++)
1267 operand_locs
[i
] = &ASM_OPERANDS_INPUT (asmop
, i
- 1);
1269 operands
[i
] = ASM_OPERANDS_INPUT (asmop
, i
- 1);
1271 constraints
[i
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
- 1);
1273 modes
[i
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
- 1);
1276 /* The output is in the SET.
1277 Its constraint is in the ASM_OPERANDS itself. */
1279 operands
[0] = SET_DEST (body
);
1281 operand_locs
[0] = &SET_DEST (body
);
1283 constraints
[0] = ASM_OPERANDS_OUTPUT_CONSTRAINT (asmop
);
1285 modes
[0] = GET_MODE (SET_DEST (body
));
1286 template = ASM_OPERANDS_TEMPLATE (asmop
);
1288 else if (GET_CODE (body
) == ASM_OPERANDS
)
1291 /* No output operands: BODY is (asm_operands ....). */
1293 noperands
= ASM_OPERANDS_INPUT_LENGTH (asmop
);
1295 /* The input operands are found in the 1st element vector. */
1296 /* Constraints for inputs are in the 2nd element vector. */
1297 for (i
= 0; i
< noperands
; i
++)
1300 operand_locs
[i
] = &ASM_OPERANDS_INPUT (asmop
, i
);
1302 operands
[i
] = ASM_OPERANDS_INPUT (asmop
, i
);
1304 constraints
[i
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
);
1306 modes
[i
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
);
1308 template = ASM_OPERANDS_TEMPLATE (asmop
);
1310 else if (GET_CODE (body
) == PARALLEL
1311 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
1313 rtx asmop
= SET_SRC (XVECEXP (body
, 0, 0));
1314 int nparallel
= XVECLEN (body
, 0); /* Includes CLOBBERs. */
1315 int nin
= ASM_OPERANDS_INPUT_LENGTH (asmop
);
1316 int nout
= 0; /* Does not include CLOBBERs. */
1318 /* At least one output, plus some CLOBBERs. */
1320 /* The outputs are in the SETs.
1321 Their constraints are in the ASM_OPERANDS itself. */
1322 for (i
= 0; i
< nparallel
; i
++)
1324 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
1325 break; /* Past last SET */
1328 operands
[i
] = SET_DEST (XVECEXP (body
, 0, i
));
1330 operand_locs
[i
] = &SET_DEST (XVECEXP (body
, 0, i
));
1332 constraints
[i
] = XSTR (SET_SRC (XVECEXP (body
, 0, i
)), 1);
1334 modes
[i
] = GET_MODE (SET_DEST (XVECEXP (body
, 0, i
)));
1338 for (i
= 0; i
< nin
; i
++)
1341 operand_locs
[i
+ nout
] = &ASM_OPERANDS_INPUT (asmop
, i
);
1343 operands
[i
+ nout
] = ASM_OPERANDS_INPUT (asmop
, i
);
1345 constraints
[i
+ nout
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
);
1347 modes
[i
+ nout
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
);
1350 template = ASM_OPERANDS_TEMPLATE (asmop
);
1352 else if (GET_CODE (body
) == PARALLEL
1353 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1355 /* No outputs, but some CLOBBERs. */
1357 rtx asmop
= XVECEXP (body
, 0, 0);
1358 int nin
= ASM_OPERANDS_INPUT_LENGTH (asmop
);
1360 for (i
= 0; i
< nin
; i
++)
1363 operand_locs
[i
] = &ASM_OPERANDS_INPUT (asmop
, i
);
1365 operands
[i
] = ASM_OPERANDS_INPUT (asmop
, i
);
1367 constraints
[i
] = ASM_OPERANDS_INPUT_CONSTRAINT (asmop
, i
);
1369 modes
[i
] = ASM_OPERANDS_INPUT_MODE (asmop
, i
);
1372 template = ASM_OPERANDS_TEMPLATE (asmop
);
1378 /* Given an rtx *P, if it is a sum containing an integer constant term,
1379 return the location (type rtx *) of the pointer to that constant term.
1380 Otherwise, return a null pointer. */
1383 find_constant_term_loc (p
)
1387 register enum rtx_code code
= GET_CODE (*p
);
1389 /* If *P IS such a constant term, P is its location. */
1391 if (code
== CONST_INT
|| code
== SYMBOL_REF
|| code
== LABEL_REF
1395 /* Otherwise, if not a sum, it has no constant term. */
1397 if (GET_CODE (*p
) != PLUS
)
1400 /* If one of the summands is constant, return its location. */
1402 if (XEXP (*p
, 0) && CONSTANT_P (XEXP (*p
, 0))
1403 && XEXP (*p
, 1) && CONSTANT_P (XEXP (*p
, 1)))
1406 /* Otherwise, check each summand for containing a constant term. */
1408 if (XEXP (*p
, 0) != 0)
1410 tem
= find_constant_term_loc (&XEXP (*p
, 0));
1415 if (XEXP (*p
, 1) != 0)
1417 tem
= find_constant_term_loc (&XEXP (*p
, 1));
1425 /* Return 1 if OP is a memory reference
1426 whose address contains no side effects
1427 and remains valid after the addition
1428 of a positive integer less than the
1429 size of the object being referenced.
1431 We assume that the original address is valid and do not check it.
1433 This uses strict_memory_address_p as a subroutine, so
1434 don't use it before reload. */
1437 offsettable_memref_p (op
)
1440 return ((GET_CODE (op
) == MEM
)
1441 && offsettable_address_p (1, GET_MODE (op
), XEXP (op
, 0)));
1444 /* Similar, but don't require a strictly valid mem ref:
1445 consider pseudo-regs valid as index or base regs. */
1448 offsettable_nonstrict_memref_p (op
)
1451 return ((GET_CODE (op
) == MEM
)
1452 && offsettable_address_p (0, GET_MODE (op
), XEXP (op
, 0)));
1455 /* Return 1 if Y is a memory address which contains no side effects
1456 and would remain valid after the addition of a positive integer
1457 less than the size of that mode.
1459 We assume that the original address is valid and do not check it.
1460 We do check that it is valid for narrower modes.
1462 If STRICTP is nonzero, we require a strictly valid address,
1463 for the sake of use in reload.c. */
1466 offsettable_address_p (strictp
, mode
, y
)
1468 enum machine_mode mode
;
1471 register enum rtx_code ycode
= GET_CODE (y
);
1475 int (*addressp
) () = (strictp
? strict_memory_address_p
: memory_address_p
);
1477 if (CONSTANT_ADDRESS_P (y
))
1480 /* Adjusting an offsettable address involves changing to a narrower mode.
1481 Make sure that's OK. */
1483 if (mode_dependent_address_p (y
))
1486 /* If the expression contains a constant term,
1487 see if it remains valid when max possible offset is added. */
1489 if ((ycode
== PLUS
) && (y2
= find_constant_term_loc (&y1
)))
1494 *y2
= plus_constant (*y2
, GET_MODE_SIZE (mode
) - 1);
1495 /* Use QImode because an odd displacement may be automatically invalid
1496 for any wider mode. But it should be valid for a single byte. */
1497 good
= (*addressp
) (QImode
, y
);
1499 /* In any case, restore old contents of memory. */
1504 if (ycode
== PRE_DEC
|| ycode
== PRE_INC
1505 || ycode
== POST_DEC
|| ycode
== POST_INC
)
1508 /* The offset added here is chosen as the maximum offset that
1509 any instruction could need to add when operating on something
1510 of the specified mode. We assume that if Y and Y+c are
1511 valid addresses then so is Y+d for all 0<d<c. */
1513 z
= plus_constant_for_output (y
, GET_MODE_SIZE (mode
) - 1);
1515 /* Use QImode because an odd displacement may be automatically invalid
1516 for any wider mode. But it should be valid for a single byte. */
1517 return (*addressp
) (QImode
, z
);
1520 /* Return 1 if ADDR is an address-expression whose effect depends
1521 on the mode of the memory reference it is used in.
1523 Autoincrement addressing is a typical example of mode-dependence
1524 because the amount of the increment depends on the mode. */
1527 mode_dependent_address_p (addr
)
1530 GO_IF_MODE_DEPENDENT_ADDRESS (addr
, win
);
1536 /* Return 1 if OP is a general operand
1537 other than a memory ref with a mode dependent address. */
1540 mode_independent_operand (op
, mode
)
1541 enum machine_mode mode
;
1546 if (! general_operand (op
, mode
))
1549 if (GET_CODE (op
) != MEM
)
1552 addr
= XEXP (op
, 0);
1553 GO_IF_MODE_DEPENDENT_ADDRESS (addr
, lose
);
1559 /* Given an operand OP that is a valid memory reference
1560 which satisfies offsettable_memref_p,
1561 return a new memory reference whose address has been adjusted by OFFSET.
1562 OFFSET should be positive and less than the size of the object referenced.
1566 adj_offsettable_operand (op
, offset
)
1570 register enum rtx_code code
= GET_CODE (op
);
1574 register rtx y
= XEXP (op
, 0);
1577 if (CONSTANT_ADDRESS_P (y
))
1579 new = gen_rtx (MEM
, GET_MODE (op
), plus_constant_for_output (y
, offset
));
1580 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1584 if (GET_CODE (y
) == PLUS
)
1587 register rtx
*const_loc
;
1591 const_loc
= find_constant_term_loc (&z
);
1594 *const_loc
= plus_constant_for_output (*const_loc
, offset
);
1599 new = gen_rtx (MEM
, GET_MODE (op
), plus_constant_for_output (y
, offset
));
1600 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1606 #ifdef REGISTER_CONSTRAINTS
1608 /* Check the operands of an insn (found in recog_operands)
1609 against the insn's operand constraints (found via INSN_CODE_NUM)
1610 and return 1 if they are valid.
1612 WHICH_ALTERNATIVE is set to a number which indicates which
1613 alternative of constraints was matched: 0 for the first alternative,
1614 1 for the next, etc.
1616 In addition, when two operands are match
1617 and it happens that the output operand is (reg) while the
1618 input operand is --(reg) or ++(reg) (a pre-inc or pre-dec),
1619 make the output operand look like the input.
1620 This is because the output operand is the one the template will print.
1622 This is used in final, just before printing the assembler code and by
1623 the routines that determine an insn's attribute.
1625 If STRICT is a positive non-zero value, it means that we have been
1626 called after reload has been completed. In that case, we must
1627 do all checks strictly. If it is zero, it means that we have been called
1628 before reload has completed. In that case, we first try to see if we can
1629 find an alternative that matches strictly. If not, we try again, this
1630 time assuming that reload will fix up the insn. This provides a "best
1631 guess" for the alternative and is used to compute attributes of insns prior
1632 to reload. A negative value of STRICT is used for this internal call. */
1640 constrain_operands (insn_code_num
, strict
)
1644 char *constraints
[MAX_RECOG_OPERANDS
];
1645 int matching_operands
[MAX_RECOG_OPERANDS
];
1646 enum op_type
{OP_IN
, OP_OUT
, OP_INOUT
} op_types
[MAX_RECOG_OPERANDS
];
1647 int earlyclobber
[MAX_RECOG_OPERANDS
];
1649 int noperands
= insn_n_operands
[insn_code_num
];
1651 struct funny_match funny_match
[MAX_RECOG_OPERANDS
];
1652 int funny_match_index
;
1653 int nalternatives
= insn_n_alternatives
[insn_code_num
];
1655 if (noperands
== 0 || nalternatives
== 0)
1658 for (c
= 0; c
< noperands
; c
++)
1660 constraints
[c
] = insn_operand_constraint
[insn_code_num
][c
];
1661 matching_operands
[c
] = -1;
1662 op_types
[c
] = OP_IN
;
1665 which_alternative
= 0;
1667 while (which_alternative
< nalternatives
)
1671 funny_match_index
= 0;
1673 for (opno
= 0; opno
< noperands
; opno
++)
1675 register rtx op
= recog_operand
[opno
];
1676 enum machine_mode mode
= GET_MODE (op
);
1677 register char *p
= constraints
[opno
];
1682 earlyclobber
[opno
] = 0;
1684 /* A unary operator may be accepted by the predicate, but it
1685 is irrelevant for matching constraints. */
1686 if (GET_RTX_CLASS (GET_CODE (op
)) == '1')
1689 if (GET_CODE (op
) == SUBREG
)
1691 if (GET_CODE (SUBREG_REG (op
)) == REG
1692 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
)
1693 offset
= SUBREG_WORD (op
);
1694 op
= SUBREG_REG (op
);
1697 /* An empty constraint or empty alternative
1698 allows anything which matched the pattern. */
1699 if (*p
== 0 || *p
== ',')
1702 while (*p
&& (c
= *p
++) != ',')
1712 /* Ignore rest of this alternative as far as
1713 constraint checking is concerned. */
1714 while (*p
&& *p
!= ',')
1719 op_types
[opno
] = OP_OUT
;
1723 op_types
[opno
] = OP_INOUT
;
1727 earlyclobber
[opno
] = 1;
1735 /* This operand must be the same as a previous one.
1736 This kind of constraint is used for instructions such
1737 as add when they take only two operands.
1739 Note that the lower-numbered operand is passed first.
1741 If we are not testing strictly, assume that this constraint
1742 will be satisfied. */
1746 val
= operands_match_p (recog_operand
[c
- '0'],
1747 recog_operand
[opno
]);
1749 matching_operands
[opno
] = c
- '0';
1750 matching_operands
[c
- '0'] = opno
;
1754 /* If output is *x and input is *--x,
1755 arrange later to change the output to *--x as well,
1756 since the output op is the one that will be printed. */
1757 if (val
== 2 && strict
> 0)
1759 funny_match
[funny_match_index
].this = opno
;
1760 funny_match
[funny_match_index
++].other
= c
- '0';
1765 /* p is used for address_operands. When we are called by
1766 gen_reload, no one will have checked that the address is
1767 strictly valid, i.e., that all pseudos requiring hard regs
1768 have gotten them. */
1770 || (strict_memory_address_p
1771 (insn_operand_mode
[insn_code_num
][opno
], op
)))
1775 /* No need to check general_operand again;
1776 it was done in insn-recog.c. */
1778 /* Anything goes unless it is a REG and really has a hard reg
1779 but the hard reg is not in the class GENERAL_REGS. */
1781 || GENERAL_REGS
== ALL_REGS
1782 || GET_CODE (op
) != REG
1783 || (reload_in_progress
1784 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
1785 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
))
1792 && GET_CODE (op
) == REG
1793 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
1794 || (strict
== 0 && GET_CODE (op
) == SCRATCH
)
1795 || (GET_CODE (op
) == REG
1796 && ((GENERAL_REGS
== ALL_REGS
1797 && REGNO (op
) < FIRST_PSEUDO_REGISTER
)
1798 || reg_fits_class_p (op
, GENERAL_REGS
,
1804 /* This is used for a MATCH_SCRATCH in the cases when
1805 we don't actually need anything. So anything goes
1811 if (GET_CODE (op
) == MEM
1812 /* Before reload, accept what reload can turn into mem. */
1813 || (strict
< 0 && CONSTANT_P (op
))
1814 /* During reload, accept a pseudo */
1815 || (reload_in_progress
&& GET_CODE (op
) == REG
1816 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
))
1821 if (GET_CODE (op
) == MEM
1822 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
1823 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
1828 if (GET_CODE (op
) == MEM
1829 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
1830 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
1835 #ifndef REAL_ARITHMETIC
1836 /* Match any CONST_DOUBLE, but only if
1837 we can examine the bits of it reliably. */
1838 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
1839 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
1840 && GET_MODE (op
) != VOIDmode
&& ! flag_pretend_float
)
1843 if (GET_CODE (op
) == CONST_DOUBLE
)
1848 if (GET_CODE (op
) == CONST_DOUBLE
)
1854 if (GET_CODE (op
) == CONST_DOUBLE
1855 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, c
))
1860 if (GET_CODE (op
) == CONST_INT
1861 || (GET_CODE (op
) == CONST_DOUBLE
1862 && GET_MODE (op
) == VOIDmode
))
1865 if (CONSTANT_P (op
))
1870 if (GET_CODE (op
) == CONST_INT
1871 || (GET_CODE (op
) == CONST_DOUBLE
1872 && GET_MODE (op
) == VOIDmode
))
1884 if (GET_CODE (op
) == CONST_INT
1885 && CONST_OK_FOR_LETTER_P (INTVAL (op
), c
))
1889 #ifdef EXTRA_CONSTRAINT
1895 if (EXTRA_CONSTRAINT (op
, c
))
1901 if (GET_CODE (op
) == MEM
1902 && ((strict
> 0 && ! offsettable_memref_p (op
))
1904 && !(CONSTANT_P (op
) || GET_CODE (op
) == MEM
))
1905 || (reload_in_progress
1906 && !(GET_CODE (op
) == REG
1907 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
))))
1912 if ((strict
> 0 && offsettable_memref_p (op
))
1913 || (strict
== 0 && offsettable_nonstrict_memref_p (op
))
1914 /* Before reload, accept what reload can handle. */
1916 && (CONSTANT_P (op
) || GET_CODE (op
) == MEM
))
1917 /* During reload, accept a pseudo */
1918 || (reload_in_progress
&& GET_CODE (op
) == REG
1919 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
))
1926 && GET_CODE (op
) == REG
1927 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
1928 || (strict
== 0 && GET_CODE (op
) == SCRATCH
)
1929 || (GET_CODE (op
) == REG
1930 && reg_fits_class_p (op
, REG_CLASS_FROM_LETTER (c
),
1935 constraints
[opno
] = p
;
1936 /* If this operand did not win somehow,
1937 this alternative loses. */
1941 /* This alternative won; the operands are ok.
1942 Change whichever operands this alternative says to change. */
1947 /* See if any earlyclobber operand conflicts with some other
1951 for (eopno
= 0; eopno
< noperands
; eopno
++)
1952 /* Ignore earlyclobber operands now in memory,
1953 because we would often report failure when we have
1954 two memory operands, one of which was formerly a REG. */
1955 if (earlyclobber
[eopno
]
1956 && GET_CODE (recog_operand
[eopno
]) == REG
)
1957 for (opno
= 0; opno
< noperands
; opno
++)
1958 if ((GET_CODE (recog_operand
[opno
]) == MEM
1959 || op_types
[opno
] != OP_OUT
)
1961 /* Ignore things like match_operator operands. */
1962 && *insn_operand_constraint
[insn_code_num
][opno
] != 0
1963 && ! (matching_operands
[opno
] == eopno
1964 && operands_match_p (recog_operand
[opno
],
1965 recog_operand
[eopno
]))
1966 && ! safe_from_earlyclobber (recog_operand
[opno
],
1967 recog_operand
[eopno
]))
1972 while (--funny_match_index
>= 0)
1974 recog_operand
[funny_match
[funny_match_index
].other
]
1975 = recog_operand
[funny_match
[funny_match_index
].this];
1982 which_alternative
++;
1985 /* If we are about to reject this, but we are not to test strictly,
1986 try a very loose test. Only return failure if it fails also. */
1988 return constrain_operands (insn_code_num
, -1);
1993 /* Return 1 iff OPERAND (assumed to be a REG rtx)
1994 is a hard reg in class CLASS when its regno is offset by OFFSET
1995 and changed to mode MODE.
1996 If REG occupies multiple hard regs, all of them must be in CLASS. */
1999 reg_fits_class_p (operand
, class, offset
, mode
)
2001 register enum reg_class
class;
2003 enum machine_mode mode
;
2005 register int regno
= REGNO (operand
);
2006 if (regno
< FIRST_PSEUDO_REGISTER
2007 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
2012 for (sr
= HARD_REGNO_NREGS (regno
, mode
) - 1;
2014 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
2023 #endif /* REGISTER_CONSTRAINTS */