1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 93-99, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* This pass converts stack-like registers from the "flat register
22 file" model that gcc uses, to a stack convention that the 387 uses.
24 * The form of the input:
26 On input, the function consists of insn that have had their
27 registers fully allocated to a set of "virtual" registers. Note that
28 the word "virtual" is used differently here than elsewhere in gcc: for
29 each virtual stack reg, there is a hard reg, but the mapping between
30 them is not known until this pass is run. On output, hard register
31 numbers have been substituted, and various pop and exchange insns have
32 been emitted. The hard register numbers and the virtual register
33 numbers completely overlap - before this pass, all stack register
34 numbers are virtual, and afterward they are all hard.
36 The virtual registers can be manipulated normally by gcc, and their
37 semantics are the same as for normal registers. After the hard
38 register numbers are substituted, the semantics of an insn containing
39 stack-like regs are not the same as for an insn with normal regs: for
40 instance, it is not safe to delete an insn that appears to be a no-op
41 move. In general, no insn containing hard regs should be changed
42 after this pass is done.
44 * The form of the output:
46 After this pass, hard register numbers represent the distance from
47 the current top of stack to the desired register. A reference to
48 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49 represents the register just below that, and so forth. Also, REG_DEAD
50 notes indicate whether or not a stack register should be popped.
52 A "swap" insn looks like a parallel of two patterns, where each
53 pattern is a SET: one sets A to B, the other B to A.
55 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
57 will replace the existing stack top, not push a new value.
59 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60 SET_SRC is REG or MEM.
62 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63 appears ambiguous. As a special case, the presence of a REG_DEAD note
64 for FIRST_STACK_REG differentiates between a load insn and a pop.
66 If a REG_DEAD is present, the insn represents a "pop" that discards
67 the top of the register stack. If there is no REG_DEAD note, then the
68 insn represents a "dup" or a push of the current top of stack onto the
73 Existing REG_DEAD and REG_UNUSED notes for stack registers are
74 deleted and recreated from scratch. REG_DEAD is never created for a
75 SET_DEST, only REG_UNUSED.
79 There are several rules on the usage of stack-like regs in
80 asm_operands insns. These rules apply only to the operands that are
83 1. Given a set of input regs that die in an asm_operands, it is
84 necessary to know which are implicitly popped by the asm, and
85 which must be explicitly popped by gcc.
87 An input reg that is implicitly popped by the asm must be
88 explicitly clobbered, unless it is constrained to match an
91 2. For any input reg that is implicitly popped by an asm, it is
92 necessary to know how to adjust the stack to compensate for the pop.
93 If any non-popped input is closer to the top of the reg-stack than
94 the implicitly popped reg, it would not be possible to know what the
95 stack looked like - it's not clear how the rest of the stack "slides
98 All implicitly popped input regs must be closer to the top of
99 the reg-stack than any input that is not implicitly popped.
101 3. It is possible that if an input dies in an insn, reload might
102 use the input reg for an output reload. Consider this example:
104 asm ("foo" : "=t" (a) : "f" (b));
106 This asm says that input B is not popped by the asm, and that
107 the asm pushes a result onto the reg-stack, ie, the stack is one
108 deeper after the asm than it was before. But, it is possible that
109 reload will think that it can use the same reg for both the input and
110 the output, if input B dies in this insn.
112 If any input operand uses the "f" constraint, all output reg
113 constraints must use the "&" earlyclobber.
115 The asm above would be written as
117 asm ("foo" : "=&t" (a) : "f" (b));
119 4. Some operands need to be in particular places on the stack. All
120 output operands fall in this category - there is no other way to
121 know which regs the outputs appear in unless the user indicates
122 this in the constraints.
124 Output operands must specifically indicate which reg an output
125 appears in after an asm. "=f" is not allowed: the operand
126 constraints must select a class with a single reg.
128 5. Output operands may not be "inserted" between existing stack regs.
129 Since no 387 opcode uses a read/write operand, all output operands
130 are dead before the asm_operands, and are pushed by the asm_operands.
131 It makes no sense to push anywhere but the top of the reg-stack.
133 Output operands must start at the top of the reg-stack: output
134 operands may not "skip" a reg.
136 6. Some asm statements may need extra stack space for internal
137 calculations. This can be guaranteed by clobbering stack registers
138 unrelated to the inputs and outputs.
140 Here are a couple of reasonable asms to want to write. This asm
141 takes one input, which is internally popped, and produces two outputs.
143 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
145 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
146 and replaces them with one output. The user must code the "st(1)"
147 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
149 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
158 #include "function.h"
159 #include "insn-config.h"
161 #include "hard-reg-set.h"
163 #include "insn-flags.h"
167 #include "basic-block.h"
172 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
174 /* This is the basic stack record. TOP is an index into REG[] such
175 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177 If TOP is -2, REG[] is not yet initialized. Stack initialization
178 consists of placing each live reg in array `reg' and setting `top'
181 REG_SET indicates which registers are live. */
183 typedef struct stack_def
185 int top
; /* index to top stack element */
186 HARD_REG_SET reg_set
; /* set of live registers */
187 char reg
[REG_STACK_SIZE
]; /* register - stack mapping */
190 /* This is used to carry information about basic blocks. It is
191 attached to the AUX field of the standard CFG block. */
193 typedef struct block_info_def
195 struct stack_def stack_in
; /* Input stack configuration. */
196 HARD_REG_SET out_reg_set
; /* Stack regs live on output. */
197 int done
; /* True if block already converted. */
200 #define BLOCK_INFO(B) ((block_info) (B)->aux)
202 /* Passed to change_stack to indicate where to emit insns. */
209 /* We use this array to cache info about insns, because otherwise we
210 spend too much time in stack_regs_mentioned_p.
212 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
213 the insn uses stack registers, two indicates the insn does not use
215 static varray_type stack_regs_mentioned_data
;
217 /* The block we're currently working on. */
218 static basic_block current_block
;
220 /* This is the register file for all register after conversion */
222 FP_mode_reg
[LAST_STACK_REG
+1-FIRST_STACK_REG
][(int) MAX_MACHINE_MODE
];
224 #define FP_MODE_REG(regno,mode) \
225 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
227 /* Used to initialize uninitialized registers. */
230 /* Forward declarations */
232 static int stack_regs_mentioned_p
PARAMS ((rtx pat
));
233 static void straighten_stack
PARAMS ((rtx
, stack
));
234 static void pop_stack
PARAMS ((stack
, int));
235 static rtx
*get_true_reg
PARAMS ((rtx
*));
237 static int check_asm_stack_operands
PARAMS ((rtx
));
238 static int get_asm_operand_n_inputs
PARAMS ((rtx
));
239 static rtx stack_result
PARAMS ((tree
));
240 static void replace_reg
PARAMS ((rtx
*, int));
241 static void remove_regno_note
PARAMS ((rtx
, enum reg_note
, int));
242 static int get_hard_regnum
PARAMS ((stack
, rtx
));
243 static void delete_insn_for_stacker
PARAMS ((rtx
));
244 static rtx emit_pop_insn
PARAMS ((rtx
, stack
, rtx
,
246 static void emit_swap_insn
PARAMS ((rtx
, stack
, rtx
));
247 static void move_for_stack_reg
PARAMS ((rtx
, stack
, rtx
));
248 static int swap_rtx_condition_1
PARAMS ((rtx
));
249 static int swap_rtx_condition
PARAMS ((rtx
));
250 static void compare_for_stack_reg
PARAMS ((rtx
, stack
, rtx
));
251 static void subst_stack_regs_pat
PARAMS ((rtx
, stack
, rtx
));
252 static void subst_asm_stack_regs
PARAMS ((rtx
, stack
));
253 static void subst_stack_regs
PARAMS ((rtx
, stack
));
254 static void change_stack
PARAMS ((rtx
, stack
, stack
,
256 static int convert_regs_entry
PARAMS ((void));
257 static void convert_regs_exit
PARAMS ((void));
258 static int convert_regs_1
PARAMS ((FILE *, basic_block
));
259 static int convert_regs_2
PARAMS ((FILE *, basic_block
));
260 static int convert_regs
PARAMS ((FILE *));
261 static void print_stack
PARAMS ((FILE *, stack
));
262 static rtx next_flags_user
PARAMS ((rtx
));
263 static void record_label_references
PARAMS ((rtx
, rtx
));
265 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
268 stack_regs_mentioned_p (pat
)
271 register const char *fmt
;
274 if (STACK_REG_P (pat
))
277 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
278 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
284 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
285 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
288 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
295 /* Return nonzero if INSN mentions stacked registers, else return zero. */
298 stack_regs_mentioned (insn
)
301 unsigned int uid
, max
;
304 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
307 uid
= INSN_UID (insn
);
308 max
= VARRAY_SIZE (stack_regs_mentioned_data
);
311 /* Allocate some extra size to avoid too many reallocs, but
312 do not grow too quickly. */
313 max
= uid
+ uid
/ 20;
314 VARRAY_GROW (stack_regs_mentioned_data
, max
);
317 test
= VARRAY_CHAR (stack_regs_mentioned_data
, uid
);
320 /* This insn has yet to be examined. Do so now. */
321 test
= stack_regs_mentioned_p (PATTERN (insn
)) ? 1 : 2;
322 VARRAY_CHAR (stack_regs_mentioned_data
, uid
) = test
;
328 static rtx ix86_flags_rtx
;
331 next_flags_user (insn
)
334 /* Search forward looking for the first use of this value.
335 Stop at block boundaries. */
336 /* ??? This really cries for BLOCK_END! */
340 insn
= NEXT_INSN (insn
);
344 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
345 && reg_mentioned_p (ix86_flags_rtx
, PATTERN (insn
)))
348 if (GET_CODE (insn
) == JUMP_INSN
349 || GET_CODE (insn
) == CODE_LABEL
350 || GET_CODE (insn
) == CALL_INSN
)
355 /* Reorganise the stack into ascending numbers,
359 straighten_stack (insn
, regstack
)
363 struct stack_def temp_stack
;
366 /* If there is only a single register on the stack, then the stack is
367 already in increasing order and no reorganization is needed.
369 Similarly if the stack is empty. */
370 if (regstack
->top
<= 0)
373 COPY_HARD_REG_SET (temp_stack
.reg_set
, regstack
->reg_set
);
375 for (top
= temp_stack
.top
= regstack
->top
; top
>= 0; top
--)
376 temp_stack
.reg
[top
] = FIRST_STACK_REG
+ temp_stack
.top
- top
;
378 change_stack (insn
, regstack
, &temp_stack
, EMIT_AFTER
);
381 /* Pop a register from the stack */
384 pop_stack (regstack
, regno
)
388 int top
= regstack
->top
;
390 CLEAR_HARD_REG_BIT (regstack
->reg_set
, regno
);
392 /* If regno was not at the top of stack then adjust stack */
393 if (regstack
->reg
[top
] != regno
)
396 for (i
= regstack
->top
; i
>= 0; i
--)
397 if (regstack
->reg
[i
] == regno
)
400 for (j
= i
; j
< top
; j
++)
401 regstack
->reg
[j
] = regstack
->reg
[j
+ 1];
407 /* Convert register usage from "flat" register file usage to a "stack
408 register file. FIRST is the first insn in the function, FILE is the
411 Construct a CFG and run life analysis. Then convert each insn one
412 by one. Run a last jump_optimize pass, if optimizing, to eliminate
413 code duplication created when the converter inserts pop insns on
417 reg_to_stack (first
, file
)
425 /* See if there is something to do. Flow analysis is quite
426 expensive so we might save some compilation time. */
427 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
428 if (regs_ever_live
[i
])
430 if (i
> LAST_STACK_REG
)
433 /* Ok, floating point instructions exist. If not optimizing,
434 build the CFG and run life analysis. */
435 find_basic_blocks (first
, max_reg_num (), file
);
436 count_or_remove_death_notes (NULL
, 1);
437 life_analysis (first
, max_reg_num (), file
, 0);
439 /* Set up block info for each basic block. */
440 bi
= (block_info
) xcalloc ((n_basic_blocks
+ 1), sizeof (*bi
));
441 for (i
= n_basic_blocks
- 1; i
>= 0; --i
)
442 BASIC_BLOCK (i
)->aux
= bi
+ i
;
443 EXIT_BLOCK_PTR
->aux
= bi
+ n_basic_blocks
;
445 /* Create the replacement registers up front. */
446 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
448 enum machine_mode mode
;
449 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
451 mode
= GET_MODE_WIDER_MODE (mode
))
452 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
453 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
455 mode
= GET_MODE_WIDER_MODE (mode
))
456 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
459 ix86_flags_rtx
= gen_rtx_REG (CCmode
, FLAGS_REG
);
461 /* A QNaN for initializing uninitialized variables.
463 ??? We can't load from constant memory in PIC mode, because
464 we're insertting these instructions before the prologue and
465 the PIC register hasn't been set up. In that case, fall back
466 on zero, which we can get from `ldz'. */
469 nan
= CONST0_RTX (SFmode
);
472 nan
= gen_lowpart (SFmode
, GEN_INT (0x7fc00000));
473 nan
= force_const_mem (SFmode
, nan
);
476 /* Allocate a cache for stack_regs_mentioned. */
477 max_uid
= get_max_uid ();
478 VARRAY_CHAR_INIT (stack_regs_mentioned_data
, max_uid
+ 1,
479 "stack_regs_mentioned cache");
481 if (convert_regs (file
) && optimize
)
483 jump_optimize (first
, JUMP_CROSS_JUMP_DEATH_MATTERS
,
484 !JUMP_NOOP_MOVES
, !JUMP_AFTER_REGSCAN
);
488 VARRAY_FREE (stack_regs_mentioned_data
);
492 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
493 label's chain of references, and note which insn contains each
497 record_label_references (insn
, pat
)
500 register enum rtx_code code
= GET_CODE (pat
);
502 register const char *fmt
;
504 if (code
== LABEL_REF
)
506 register rtx label
= XEXP (pat
, 0);
509 if (GET_CODE (label
) != CODE_LABEL
)
512 /* If this is an undefined label, LABEL_REFS (label) contains
514 if (INSN_UID (label
) == 0)
517 /* Don't make a duplicate in the code_label's chain. */
519 for (ref
= LABEL_REFS (label
);
521 ref
= LABEL_NEXTREF (ref
))
522 if (CONTAINING_INSN (ref
) == insn
)
525 CONTAINING_INSN (pat
) = insn
;
526 LABEL_NEXTREF (pat
) = LABEL_REFS (label
);
527 LABEL_REFS (label
) = pat
;
532 fmt
= GET_RTX_FORMAT (code
);
533 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
536 record_label_references (insn
, XEXP (pat
, i
));
540 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
541 record_label_references (insn
, XVECEXP (pat
, i
, j
));
546 /* Return a pointer to the REG expression within PAT. If PAT is not a
547 REG, possible enclosed by a conversion rtx, return the inner part of
548 PAT that stopped the search. */
555 switch (GET_CODE (*pat
))
558 /* Eliminate FP subregister accesses in favour of the
559 actual FP register in use. */
562 if (FP_REG_P (subreg
= SUBREG_REG (*pat
)))
564 *pat
= FP_MODE_REG (REGNO (subreg
) + SUBREG_WORD (*pat
),
573 pat
= & XEXP (*pat
, 0);
577 /* There are many rules that an asm statement for stack-like regs must
578 follow. Those rules are explained at the top of this file: the rule
579 numbers below refer to that explanation. */
582 check_asm_stack_operands (insn
)
587 int malformed_asm
= 0;
588 rtx body
= PATTERN (insn
);
590 char reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
591 char implicitly_dies
[FIRST_PSEUDO_REGISTER
];
594 rtx
*clobber_reg
= 0;
595 int n_inputs
, n_outputs
;
597 /* Find out what the constraints require. If no constraint
598 alternative matches, this asm is malformed. */
600 constrain_operands (1);
601 alt
= which_alternative
;
603 preprocess_constraints ();
605 n_inputs
= get_asm_operand_n_inputs (body
);
606 n_outputs
= recog_data
.n_operands
- n_inputs
;
611 /* Avoid further trouble with this insn. */
612 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
616 /* Strip SUBREGs here to make the following code simpler. */
617 for (i
= 0; i
< recog_data
.n_operands
; i
++)
618 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
619 && GET_CODE (SUBREG_REG (recog_data
.operand
[i
])) == REG
)
620 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
622 /* Set up CLOBBER_REG. */
626 if (GET_CODE (body
) == PARALLEL
)
628 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
));
630 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
631 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
633 rtx clobber
= XVECEXP (body
, 0, i
);
634 rtx reg
= XEXP (clobber
, 0);
636 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
637 reg
= SUBREG_REG (reg
);
639 if (STACK_REG_P (reg
))
641 clobber_reg
[n_clobbers
] = reg
;
647 /* Enforce rule #4: Output operands must specifically indicate which
648 reg an output appears in after an asm. "=f" is not allowed: the
649 operand constraints must select a class with a single reg.
651 Also enforce rule #5: Output operands must start at the top of
652 the reg-stack: output operands may not "skip" a reg. */
654 memset (reg_used_as_output
, 0, sizeof (reg_used_as_output
));
655 for (i
= 0; i
< n_outputs
; i
++)
656 if (STACK_REG_P (recog_data
.operand
[i
]))
658 if (reg_class_size
[(int) recog_op_alt
[i
][alt
].class] != 1)
660 error_for_asm (insn
, "Output constraint %d must specify a single register", i
);
664 reg_used_as_output
[REGNO (recog_data
.operand
[i
])] = 1;
668 /* Search for first non-popped reg. */
669 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
670 if (! reg_used_as_output
[i
])
673 /* If there are any other popped regs, that's an error. */
674 for (; i
< LAST_STACK_REG
+ 1; i
++)
675 if (reg_used_as_output
[i
])
678 if (i
!= LAST_STACK_REG
+ 1)
680 error_for_asm (insn
, "Output regs must be grouped at top of stack");
684 /* Enforce rule #2: All implicitly popped input regs must be closer
685 to the top of the reg-stack than any input that is not implicitly
688 memset (implicitly_dies
, 0, sizeof (implicitly_dies
));
689 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
690 if (STACK_REG_P (recog_data
.operand
[i
]))
692 /* An input reg is implicitly popped if it is tied to an
693 output, or if there is a CLOBBER for it. */
696 for (j
= 0; j
< n_clobbers
; j
++)
697 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
700 if (j
< n_clobbers
|| recog_op_alt
[i
][alt
].matches
>= 0)
701 implicitly_dies
[REGNO (recog_data
.operand
[i
])] = 1;
704 /* Search for first non-popped reg. */
705 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
706 if (! implicitly_dies
[i
])
709 /* If there are any other popped regs, that's an error. */
710 for (; i
< LAST_STACK_REG
+ 1; i
++)
711 if (implicitly_dies
[i
])
714 if (i
!= LAST_STACK_REG
+ 1)
717 "Implicitly popped regs must be grouped at top of stack");
721 /* Enfore rule #3: If any input operand uses the "f" constraint, all
722 output constraints must use the "&" earlyclobber.
724 ??? Detect this more deterministically by having constrain_asm_operands
725 record any earlyclobber. */
727 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
728 if (recog_op_alt
[i
][alt
].matches
== -1)
732 for (j
= 0; j
< n_outputs
; j
++)
733 if (operands_match_p (recog_data
.operand
[j
], recog_data
.operand
[i
]))
736 "Output operand %d must use `&' constraint", j
);
743 /* Avoid further trouble with this insn. */
744 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
751 /* Calculate the number of inputs and outputs in BODY, an
752 asm_operands. N_OPERANDS is the total number of operands, and
753 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
757 get_asm_operand_n_inputs (body
)
760 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
761 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
763 else if (GET_CODE (body
) == ASM_OPERANDS
)
764 return ASM_OPERANDS_INPUT_LENGTH (body
);
766 else if (GET_CODE (body
) == PARALLEL
767 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
768 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)));
770 else if (GET_CODE (body
) == PARALLEL
771 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
772 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
777 /* If current function returns its result in an fp stack register,
778 return the REG. Otherwise, return 0. */
786 /* If the value is supposed to be returned in memory, then clearly
787 it is not returned in a stack register. */
788 if (aggregate_value_p (DECL_RESULT (decl
)))
791 result
= DECL_RTL (DECL_RESULT (decl
));
792 /* ?!? What is this code supposed to do? Can this code actually
793 trigger if we kick out aggregates above? */
795 && ! (GET_CODE (result
) == REG
796 && REGNO (result
) < FIRST_PSEUDO_REGISTER
))
798 #ifdef FUNCTION_OUTGOING_VALUE
800 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
802 result
= FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
806 return result
!= 0 && STACK_REG_P (result
) ? result
: 0;
811 * This section deals with stack register substitution, and forms the second
815 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
816 the desired hard REGNO. */
819 replace_reg (reg
, regno
)
823 if (regno
< FIRST_STACK_REG
|| regno
> LAST_STACK_REG
824 || ! STACK_REG_P (*reg
))
827 switch (GET_MODE_CLASS (GET_MODE (*reg
)))
831 case MODE_COMPLEX_FLOAT
:;
834 *reg
= FP_MODE_REG (regno
, GET_MODE (*reg
));
837 /* Remove a note of type NOTE, which must be found, for register
838 number REGNO from INSN. Remove only one such note. */
841 remove_regno_note (insn
, note
, regno
)
846 register rtx
*note_link
, this;
848 note_link
= ®_NOTES(insn
);
849 for (this = *note_link
; this; this = XEXP (this, 1))
850 if (REG_NOTE_KIND (this) == note
851 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
853 *note_link
= XEXP (this, 1);
857 note_link
= &XEXP (this, 1);
862 /* Find the hard register number of virtual register REG in REGSTACK.
863 The hard register number is relative to the top of the stack. -1 is
864 returned if the register is not found. */
867 get_hard_regnum (regstack
, reg
)
873 if (! STACK_REG_P (reg
))
876 for (i
= regstack
->top
; i
>= 0; i
--)
877 if (regstack
->reg
[i
] == REGNO (reg
))
880 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
883 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
884 the chain of insns. Doing so could confuse block_begin and block_end
885 if this were the only insn in the block. */
888 delete_insn_for_stacker (insn
)
891 PUT_CODE (insn
, NOTE
);
892 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
893 NOTE_SOURCE_FILE (insn
) = 0;
896 /* Emit an insn to pop virtual register REG before or after INSN.
897 REGSTACK is the stack state after INSN and is updated to reflect this
898 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
899 is represented as a SET whose destination is the register to be popped
900 and source is the top of stack. A death note for the top of stack
901 cases the movdf pattern to pop. */
904 emit_pop_insn (insn
, regstack
, reg
, where
)
908 enum emit_where where
;
910 rtx pop_insn
, pop_rtx
;
913 hard_regno
= get_hard_regnum (regstack
, reg
);
915 if (hard_regno
< FIRST_STACK_REG
)
918 pop_rtx
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (hard_regno
, DFmode
),
919 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
921 if (where
== EMIT_AFTER
)
922 pop_insn
= emit_block_insn_after (pop_rtx
, insn
, current_block
);
924 pop_insn
= emit_block_insn_before (pop_rtx
, insn
, current_block
);
927 = gen_rtx_EXPR_LIST (REG_DEAD
, FP_MODE_REG (FIRST_STACK_REG
, DFmode
),
928 REG_NOTES (pop_insn
));
930 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
931 = regstack
->reg
[regstack
->top
];
933 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
938 /* Emit an insn before or after INSN to swap virtual register REG with
939 the top of stack. REGSTACK is the stack state before the swap, and
940 is updated to reflect the swap. A swap insn is represented as a
941 PARALLEL of two patterns: each pattern moves one reg to the other.
943 If REG is already at the top of the stack, no insn is emitted. */
946 emit_swap_insn (insn
, regstack
, reg
)
953 int tmp
, other_reg
; /* swap regno temps */
954 rtx i1
; /* the stack-reg insn prior to INSN */
955 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
957 hard_regno
= get_hard_regnum (regstack
, reg
);
959 if (hard_regno
< FIRST_STACK_REG
)
961 if (hard_regno
== FIRST_STACK_REG
)
964 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
966 tmp
= regstack
->reg
[other_reg
];
967 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
968 regstack
->reg
[regstack
->top
] = tmp
;
970 /* Find the previous insn involving stack regs, but don't pass a
973 if (current_block
&& insn
!= current_block
->head
)
975 rtx tmp
= PREV_INSN (insn
);
976 rtx limit
= PREV_INSN (current_block
->head
);
979 if (GET_CODE (tmp
) == CODE_LABEL
980 || (GET_CODE (tmp
) == NOTE
981 && NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BASIC_BLOCK
)
982 || (GET_CODE (tmp
) == INSN
983 && stack_regs_mentioned (tmp
)))
988 tmp
= PREV_INSN (tmp
);
993 && (i1set
= single_set (i1
)) != NULL_RTX
)
995 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
996 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
998 /* If the previous register stack push was from the reg we are to
999 swap with, omit the swap. */
1001 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == FIRST_STACK_REG
1002 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == hard_regno
- 1
1003 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1006 /* If the previous insn wrote to the reg we are to swap with,
1009 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == hard_regno
1010 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == FIRST_STACK_REG
1011 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1015 swap_rtx
= gen_swapxf (FP_MODE_REG (hard_regno
, XFmode
),
1016 FP_MODE_REG (FIRST_STACK_REG
, XFmode
));
1019 emit_block_insn_after (swap_rtx
, i1
, current_block
);
1020 else if (current_block
)
1021 emit_block_insn_before (swap_rtx
, current_block
->head
, current_block
);
1023 emit_insn_before (swap_rtx
, insn
);
1026 /* Handle a move to or from a stack register in PAT, which is in INSN.
1027 REGSTACK is the current stack. */
1030 move_for_stack_reg (insn
, regstack
, pat
)
1035 rtx
*psrc
= get_true_reg (&SET_SRC (pat
));
1036 rtx
*pdest
= get_true_reg (&SET_DEST (pat
));
1040 src
= *psrc
; dest
= *pdest
;
1042 if (STACK_REG_P (src
) && STACK_REG_P (dest
))
1044 /* Write from one stack reg to another. If SRC dies here, then
1045 just change the register mapping and delete the insn. */
1047 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1052 /* If this is a no-op move, there must not be a REG_DEAD note. */
1053 if (REGNO (src
) == REGNO (dest
))
1056 for (i
= regstack
->top
; i
>= 0; i
--)
1057 if (regstack
->reg
[i
] == REGNO (src
))
1060 /* The source must be live, and the dest must be dead. */
1061 if (i
< 0 || get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1064 /* It is possible that the dest is unused after this insn.
1065 If so, just pop the src. */
1067 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1069 emit_pop_insn (insn
, regstack
, src
, EMIT_AFTER
);
1071 delete_insn_for_stacker (insn
);
1075 regstack
->reg
[i
] = REGNO (dest
);
1077 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1078 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1080 delete_insn_for_stacker (insn
);
1085 /* The source reg does not die. */
1087 /* If this appears to be a no-op move, delete it, or else it
1088 will confuse the machine description output patterns. But if
1089 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1090 for REG_UNUSED will not work for deleted insns. */
1092 if (REGNO (src
) == REGNO (dest
))
1094 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1095 emit_pop_insn (insn
, regstack
, dest
, EMIT_AFTER
);
1097 delete_insn_for_stacker (insn
);
1101 /* The destination ought to be dead */
1102 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1105 replace_reg (psrc
, get_hard_regnum (regstack
, src
));
1107 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1108 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1109 replace_reg (pdest
, FIRST_STACK_REG
);
1111 else if (STACK_REG_P (src
))
1113 /* Save from a stack reg to MEM, or possibly integer reg. Since
1114 only top of stack may be saved, emit an exchange first if
1117 emit_swap_insn (insn
, regstack
, src
);
1119 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1122 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1124 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1126 else if (GET_MODE (src
) == XFmode
&& regstack
->top
< REG_STACK_SIZE
- 1)
1128 /* A 387 cannot write an XFmode value to a MEM without
1129 clobbering the source reg. The output code can handle
1130 this by reading back the value from the MEM.
1131 But it is more efficient to use a temp register if one is
1132 available. Push the source value here if the register
1133 stack is not full, and then write the value to memory via
1135 rtx push_rtx
, push_insn
;
1136 rtx top_stack_reg
= FP_MODE_REG (FIRST_STACK_REG
, XFmode
);
1138 push_rtx
= gen_movxf (top_stack_reg
, top_stack_reg
);
1139 push_insn
= emit_insn_before (push_rtx
, insn
);
1140 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_DEAD
, top_stack_reg
,
1144 replace_reg (psrc
, FIRST_STACK_REG
);
1146 else if (STACK_REG_P (dest
))
1148 /* Load from MEM, or possibly integer REG or constant, into the
1149 stack regs. The actual target is always the top of the
1150 stack. The stack mapping is changed to reflect that DEST is
1151 now at top of stack. */
1153 /* The destination ought to be dead */
1154 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1157 if (regstack
->top
>= REG_STACK_SIZE
)
1160 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1161 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1162 replace_reg (pdest
, FIRST_STACK_REG
);
1168 /* Swap the condition on a branch, if there is one. Return true if we
1169 found a condition to swap. False if the condition was not used as
1173 swap_rtx_condition_1 (pat
)
1176 register const char *fmt
;
1177 register int i
, r
= 0;
1179 if (GET_RTX_CLASS (GET_CODE (pat
)) == '<')
1181 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1186 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1187 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1193 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1194 r
|= swap_rtx_condition_1 (XVECEXP (pat
, i
, j
));
1196 else if (fmt
[i
] == 'e')
1197 r
|= swap_rtx_condition_1 (XEXP (pat
, i
));
1205 swap_rtx_condition (insn
)
1208 rtx pat
= PATTERN (insn
);
1210 /* We're looking for a single set to cc0 or an HImode temporary. */
1212 if (GET_CODE (pat
) == SET
1213 && GET_CODE (SET_DEST (pat
)) == REG
1214 && REGNO (SET_DEST (pat
)) == FLAGS_REG
)
1216 insn
= next_flags_user (insn
);
1217 if (insn
== NULL_RTX
)
1219 pat
= PATTERN (insn
);
1222 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1223 not doing anything with the cc value right now. We may be able to
1224 search for one though. */
1226 if (GET_CODE (pat
) == SET
1227 && GET_CODE (SET_SRC (pat
)) == UNSPEC
1228 && XINT (SET_SRC (pat
), 1) == 9)
1230 rtx dest
= SET_DEST (pat
);
1232 /* Search forward looking for the first use of this value.
1233 Stop at block boundaries. */
1234 /* ??? This really cries for BLOCK_END! */
1237 insn
= NEXT_INSN (insn
);
1238 if (insn
== NULL_RTX
)
1240 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
1241 && reg_mentioned_p (dest
, insn
))
1243 if (GET_CODE (insn
) == JUMP_INSN
)
1245 if (GET_CODE (insn
) == CODE_LABEL
)
1249 /* So we've found the insn using this value. If it is anything
1250 other than sahf, aka unspec 10, or the value does not die
1251 (meaning we'd have to search further), then we must give up. */
1252 pat
= PATTERN (insn
);
1253 if (GET_CODE (pat
) != SET
1254 || GET_CODE (SET_SRC (pat
)) != UNSPEC
1255 || XINT (SET_SRC (pat
), 1) != 10
1256 || ! dead_or_set_p (insn
, dest
))
1259 /* Now we are prepared to handle this as a normal cc0 setter. */
1260 insn
= next_flags_user (insn
);
1261 if (insn
== NULL_RTX
)
1263 pat
= PATTERN (insn
);
1266 return swap_rtx_condition_1 (pat
);
1269 /* Handle a comparison. Special care needs to be taken to avoid
1270 causing comparisons that a 387 cannot do correctly, such as EQ.
1272 Also, a pop insn may need to be emitted. The 387 does have an
1273 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1274 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1278 compare_for_stack_reg (insn
, regstack
, pat_src
)
1284 rtx src1_note
, src2_note
;
1287 src1
= get_true_reg (&XEXP (pat_src
, 0));
1288 src2
= get_true_reg (&XEXP (pat_src
, 1));
1289 flags_user
= next_flags_user (insn
);
1291 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1292 registers that die in this insn - move those to stack top first. */
1293 if ((! STACK_REG_P (*src1
)
1294 || (STACK_REG_P (*src2
)
1295 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
1296 && swap_rtx_condition (insn
))
1299 temp
= XEXP (pat_src
, 0);
1300 XEXP (pat_src
, 0) = XEXP (pat_src
, 1);
1301 XEXP (pat_src
, 1) = temp
;
1303 src1
= get_true_reg (&XEXP (pat_src
, 0));
1304 src2
= get_true_reg (&XEXP (pat_src
, 1));
1306 INSN_CODE (insn
) = -1;
1309 /* We will fix any death note later. */
1311 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1313 if (STACK_REG_P (*src2
))
1314 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1316 src2_note
= NULL_RTX
;
1318 emit_swap_insn (insn
, regstack
, *src1
);
1320 replace_reg (src1
, FIRST_STACK_REG
);
1322 if (STACK_REG_P (*src2
))
1323 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1327 pop_stack (regstack
, REGNO (XEXP (src1_note
, 0)));
1328 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1331 /* If the second operand dies, handle that. But if the operands are
1332 the same stack register, don't bother, because only one death is
1333 needed, and it was just handled. */
1336 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
1337 && REGNO (*src1
) == REGNO (*src2
)))
1339 /* As a special case, two regs may die in this insn if src2 is
1340 next to top of stack and the top of stack also dies. Since
1341 we have already popped src1, "next to top of stack" is really
1342 at top (FIRST_STACK_REG) now. */
1344 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
1347 pop_stack (regstack
, REGNO (XEXP (src2_note
, 0)));
1348 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1352 /* The 386 can only represent death of the first operand in
1353 the case handled above. In all other cases, emit a separate
1354 pop and remove the death note from here. */
1356 /* link_cc0_insns (insn); */
1358 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
1360 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
1366 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1367 is the current register layout. */
1370 subst_stack_regs_pat (insn
, regstack
, pat
)
1377 switch (GET_CODE (pat
))
1380 /* Deaths in USE insns can happen in non optimizing compilation.
1381 Handle them by popping the dying register. */
1382 src
= get_true_reg (&XEXP (pat
, 0));
1383 if (STACK_REG_P (*src
)
1384 && find_regno_note (insn
, REG_DEAD
, REGNO (*src
)))
1386 emit_pop_insn (insn
, regstack
, *src
, EMIT_AFTER
);
1389 /* ??? Uninitialized USE should not happen. */
1390 else if (get_hard_regnum (regstack
, *src
) == -1)
1398 dest
= get_true_reg (&XEXP (pat
, 0));
1399 if (STACK_REG_P (*dest
))
1401 note
= find_reg_note (insn
, REG_DEAD
, *dest
);
1403 if (pat
!= PATTERN (insn
))
1405 /* The fix_truncdi_1 pattern wants to be able to allocate
1406 it's own scratch register. It does this by clobbering
1407 an fp reg so that it is assured of an empty reg-stack
1408 register. If the register is live, kill it now.
1409 Remove the DEAD/UNUSED note so we don't try to kill it
1413 emit_pop_insn (insn
, regstack
, *dest
, EMIT_BEFORE
);
1416 note
= find_reg_note (insn
, REG_UNUSED
, *dest
);
1420 remove_note (insn
, note
);
1421 replace_reg (dest
, LAST_STACK_REG
);
1425 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1426 indicates an uninitialized value. Because reload removed
1427 all other clobbers, this must be due to a function
1428 returning without a value. Load up a NaN. */
1431 && get_hard_regnum (regstack
, *dest
) == -1)
1433 pat
= gen_rtx_SET (VOIDmode
,
1434 FP_MODE_REG (REGNO (*dest
), SFmode
),
1436 PATTERN (insn
) = pat
;
1437 move_for_stack_reg (insn
, regstack
, pat
);
1446 rtx
*src1
= (rtx
*) NULL_PTR
, *src2
;
1447 rtx src1_note
, src2_note
;
1450 dest
= get_true_reg (&SET_DEST (pat
));
1451 src
= get_true_reg (&SET_SRC (pat
));
1452 pat_src
= SET_SRC (pat
);
1454 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1455 if (STACK_REG_P (*src
)
1456 || (STACK_REG_P (*dest
)
1457 && (GET_CODE (*src
) == REG
|| GET_CODE (*src
) == MEM
1458 || GET_CODE (*src
) == CONST_DOUBLE
)))
1460 move_for_stack_reg (insn
, regstack
, pat
);
1464 switch (GET_CODE (pat_src
))
1467 compare_for_stack_reg (insn
, regstack
, pat_src
);
1473 for (count
= HARD_REGNO_NREGS (REGNO (*dest
), GET_MODE (*dest
));
1476 regstack
->reg
[++regstack
->top
] = REGNO (*dest
) + count
;
1477 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
) + count
);
1480 replace_reg (dest
, FIRST_STACK_REG
);
1484 /* This is a `tstM2' case. */
1485 if (*dest
!= cc0_rtx
)
1491 case FLOAT_TRUNCATE
:
1495 /* These insns only operate on the top of the stack. DEST might
1496 be cc0_rtx if we're processing a tstM pattern. Also, it's
1497 possible that the tstM case results in a REG_DEAD note on the
1501 src1
= get_true_reg (&XEXP (pat_src
, 0));
1503 emit_swap_insn (insn
, regstack
, *src1
);
1505 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1507 if (STACK_REG_P (*dest
))
1508 replace_reg (dest
, FIRST_STACK_REG
);
1512 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1514 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1517 replace_reg (src1
, FIRST_STACK_REG
);
1522 /* On i386, reversed forms of subM3 and divM3 exist for
1523 MODE_FLOAT, so the same code that works for addM3 and mulM3
1527 /* These insns can accept the top of stack as a destination
1528 from a stack reg or mem, or can use the top of stack as a
1529 source and some other stack register (possibly top of stack)
1530 as a destination. */
1532 src1
= get_true_reg (&XEXP (pat_src
, 0));
1533 src2
= get_true_reg (&XEXP (pat_src
, 1));
1535 /* We will fix any death note later. */
1537 if (STACK_REG_P (*src1
))
1538 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1540 src1_note
= NULL_RTX
;
1541 if (STACK_REG_P (*src2
))
1542 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1544 src2_note
= NULL_RTX
;
1546 /* If either operand is not a stack register, then the dest
1547 must be top of stack. */
1549 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
1550 emit_swap_insn (insn
, regstack
, *dest
);
1553 /* Both operands are REG. If neither operand is already
1554 at the top of stack, choose to make the one that is the dest
1555 the new top of stack. */
1557 int src1_hard_regnum
, src2_hard_regnum
;
1559 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
1560 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
1561 if (src1_hard_regnum
== -1 || src2_hard_regnum
== -1)
1564 if (src1_hard_regnum
!= FIRST_STACK_REG
1565 && src2_hard_regnum
!= FIRST_STACK_REG
)
1566 emit_swap_insn (insn
, regstack
, *dest
);
1569 if (STACK_REG_P (*src1
))
1570 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1571 if (STACK_REG_P (*src2
))
1572 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1576 rtx src1_reg
= XEXP (src1_note
, 0);
1578 /* If the register that dies is at the top of stack, then
1579 the destination is somewhere else - merely substitute it.
1580 But if the reg that dies is not at top of stack, then
1581 move the top of stack to the dead reg, as though we had
1582 done the insn and then a store-with-pop. */
1584 if (REGNO (src1_reg
) == regstack
->reg
[regstack
->top
])
1586 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1587 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1591 int regno
= get_hard_regnum (regstack
, src1_reg
);
1593 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1594 replace_reg (dest
, regno
);
1596 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1597 = regstack
->reg
[regstack
->top
];
1600 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1601 REGNO (XEXP (src1_note
, 0)));
1602 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1607 rtx src2_reg
= XEXP (src2_note
, 0);
1608 if (REGNO (src2_reg
) == regstack
->reg
[regstack
->top
])
1610 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1611 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1615 int regno
= get_hard_regnum (regstack
, src2_reg
);
1617 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1618 replace_reg (dest
, regno
);
1620 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1621 = regstack
->reg
[regstack
->top
];
1624 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1625 REGNO (XEXP (src2_note
, 0)));
1626 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
1631 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1632 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1635 /* Keep operand 1 maching with destination. */
1636 if (GET_RTX_CLASS (GET_CODE (pat_src
)) == 'c'
1637 && REG_P (*src1
) && REG_P (*src2
)
1638 && REGNO (*src1
) != REGNO (*dest
))
1647 switch (XINT (pat_src
, 1))
1651 /* These insns only operate on the top of the stack. */
1653 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1655 emit_swap_insn (insn
, regstack
, *src1
);
1657 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1659 if (STACK_REG_P (*dest
))
1660 replace_reg (dest
, FIRST_STACK_REG
);
1664 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1666 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1669 replace_reg (src1
, FIRST_STACK_REG
);
1673 /* (unspec [(unspec [(compare ..)] 9)] 10)
1674 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1675 matches the PPRO fcomi instruction. */
1677 pat_src
= XVECEXP (pat_src
, 0, 0);
1678 if (GET_CODE (pat_src
) != UNSPEC
1679 || XINT (pat_src
, 1) != 9)
1684 /* (unspec [(compare ..)] 9) */
1685 /* Combined fcomp+fnstsw generated for doing well with
1686 CSE. When optimizing this would have been broken
1689 pat_src
= XVECEXP (pat_src
, 0, 0);
1690 if (GET_CODE (pat_src
) != COMPARE
)
1693 compare_for_stack_reg (insn
, regstack
, pat_src
);
1702 /* This insn requires the top of stack to be the destination. */
1704 /* If the comparison operator is an FP comparison operator,
1705 it is handled correctly by compare_for_stack_reg () who
1706 will move the destination to the top of stack. But if the
1707 comparison operator is not an FP comparison operator, we
1708 have to handle it here. */
1709 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
1710 && REGNO (*dest
) != regstack
->reg
[regstack
->top
])
1711 emit_swap_insn (insn
, regstack
, *dest
);
1713 src1
= get_true_reg (&XEXP (pat_src
, 1));
1714 src2
= get_true_reg (&XEXP (pat_src
, 2));
1716 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1717 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1724 src_note
[1] = src1_note
;
1725 src_note
[2] = src2_note
;
1727 if (STACK_REG_P (*src1
))
1728 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1729 if (STACK_REG_P (*src2
))
1730 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1732 for (i
= 1; i
<= 2; i
++)
1735 int regno
= REGNO (XEXP (src_note
[i
], 0));
1737 /* If the register that dies is not at the top of
1738 stack, then move the top of stack to the dead reg */
1739 if (regno
!= regstack
->reg
[regstack
->top
])
1741 remove_regno_note (insn
, REG_DEAD
, regno
);
1742 emit_pop_insn (insn
, regstack
, XEXP (src_note
[i
], 0),
1747 CLEAR_HARD_REG_BIT (regstack
->reg_set
, regno
);
1748 replace_reg (&XEXP (src_note
[i
], 0), FIRST_STACK_REG
);
1754 /* Make dest the top of stack. Add dest to regstack if
1756 if (get_hard_regnum (regstack
, *dest
) < FIRST_STACK_REG
)
1757 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1758 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1759 replace_reg (dest
, FIRST_STACK_REG
);
1773 /* Substitute hard regnums for any stack regs in INSN, which has
1774 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1775 before the insn, and is updated with changes made here.
1777 There are several requirements and assumptions about the use of
1778 stack-like regs in asm statements. These rules are enforced by
1779 record_asm_stack_regs; see comments there for details. Any
1780 asm_operands left in the RTL at this point may be assume to meet the
1781 requirements, since record_asm_stack_regs removes any problem asm. */
1784 subst_asm_stack_regs (insn
, regstack
)
1788 rtx body
= PATTERN (insn
);
1791 rtx
*note_reg
; /* Array of note contents */
1792 rtx
**note_loc
; /* Address of REG field of each note */
1793 enum reg_note
*note_kind
; /* The type of each note */
1795 rtx
*clobber_reg
= 0;
1796 rtx
**clobber_loc
= 0;
1798 struct stack_def temp_stack
;
1803 int n_inputs
, n_outputs
;
1805 if (! check_asm_stack_operands (insn
))
1808 /* Find out what the constraints required. If no constraint
1809 alternative matches, that is a compiler bug: we should have caught
1810 such an insn in check_asm_stack_operands. */
1811 extract_insn (insn
);
1812 constrain_operands (1);
1813 alt
= which_alternative
;
1815 preprocess_constraints ();
1817 n_inputs
= get_asm_operand_n_inputs (body
);
1818 n_outputs
= recog_data
.n_operands
- n_inputs
;
1823 /* Strip SUBREGs here to make the following code simpler. */
1824 for (i
= 0; i
< recog_data
.n_operands
; i
++)
1825 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
1826 && GET_CODE (SUBREG_REG (recog_data
.operand
[i
])) == REG
)
1828 recog_data
.operand_loc
[i
] = & SUBREG_REG (recog_data
.operand
[i
]);
1829 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
1832 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1834 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1837 note_reg
= (rtx
*) alloca (i
* sizeof (rtx
));
1838 note_loc
= (rtx
**) alloca (i
* sizeof (rtx
*));
1839 note_kind
= (enum reg_note
*) alloca (i
* sizeof (enum reg_note
));
1842 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1844 rtx reg
= XEXP (note
, 0);
1845 rtx
*loc
= & XEXP (note
, 0);
1847 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
1849 loc
= & SUBREG_REG (reg
);
1850 reg
= SUBREG_REG (reg
);
1853 if (STACK_REG_P (reg
)
1854 && (REG_NOTE_KIND (note
) == REG_DEAD
1855 || REG_NOTE_KIND (note
) == REG_UNUSED
))
1857 note_reg
[n_notes
] = reg
;
1858 note_loc
[n_notes
] = loc
;
1859 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
1864 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1868 if (GET_CODE (body
) == PARALLEL
)
1870 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
));
1871 clobber_loc
= (rtx
**) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
1873 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1874 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
1876 rtx clobber
= XVECEXP (body
, 0, i
);
1877 rtx reg
= XEXP (clobber
, 0);
1878 rtx
*loc
= & XEXP (clobber
, 0);
1880 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
1882 loc
= & SUBREG_REG (reg
);
1883 reg
= SUBREG_REG (reg
);
1886 if (STACK_REG_P (reg
))
1888 clobber_reg
[n_clobbers
] = reg
;
1889 clobber_loc
[n_clobbers
] = loc
;
1895 temp_stack
= *regstack
;
1897 /* Put the input regs into the desired place in TEMP_STACK. */
1899 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
1900 if (STACK_REG_P (recog_data
.operand
[i
])
1901 && reg_class_subset_p (recog_op_alt
[i
][alt
].class,
1903 && recog_op_alt
[i
][alt
].class != FLOAT_REGS
)
1905 /* If an operand needs to be in a particular reg in
1906 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1907 these constraints are for single register classes, and
1908 reload guaranteed that operand[i] is already in that class,
1909 we can just use REGNO (recog_data.operand[i]) to know which
1910 actual reg this operand needs to be in. */
1912 int regno
= get_hard_regnum (&temp_stack
, recog_data
.operand
[i
]);
1917 if (regno
!= REGNO (recog_data
.operand
[i
]))
1919 /* recog_data.operand[i] is not in the right place. Find
1920 it and swap it with whatever is already in I's place.
1921 K is where recog_data.operand[i] is now. J is where it
1925 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
1927 - (REGNO (recog_data
.operand
[i
]) - FIRST_STACK_REG
));
1929 temp
= temp_stack
.reg
[k
];
1930 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
1931 temp_stack
.reg
[j
] = temp
;
1935 /* Emit insns before INSN to make sure the reg-stack is in the right
1938 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
1940 /* Make the needed input register substitutions. Do death notes and
1941 clobbers too, because these are for inputs, not outputs. */
1943 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
1944 if (STACK_REG_P (recog_data
.operand
[i
]))
1946 int regnum
= get_hard_regnum (regstack
, recog_data
.operand
[i
]);
1951 replace_reg (recog_data
.operand_loc
[i
], regnum
);
1954 for (i
= 0; i
< n_notes
; i
++)
1955 if (note_kind
[i
] == REG_DEAD
)
1957 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
1962 replace_reg (note_loc
[i
], regnum
);
1965 for (i
= 0; i
< n_clobbers
; i
++)
1967 /* It's OK for a CLOBBER to reference a reg that is not live.
1968 Don't try to replace it in that case. */
1969 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
1973 /* Sigh - clobbers always have QImode. But replace_reg knows
1974 that these regs can't be MODE_INT and will abort. Just put
1975 the right reg there without calling replace_reg. */
1977 *clobber_loc
[i
] = FP_MODE_REG (regnum
, DFmode
);
1981 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
1983 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
1984 if (STACK_REG_P (recog_data
.operand
[i
]))
1986 /* An input reg is implicitly popped if it is tied to an
1987 output, or if there is a CLOBBER for it. */
1990 for (j
= 0; j
< n_clobbers
; j
++)
1991 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
1994 if (j
< n_clobbers
|| recog_op_alt
[i
][alt
].matches
>= 0)
1996 /* recog_data.operand[i] might not be at the top of stack.
1997 But that's OK, because all we need to do is pop the
1998 right number of regs off of the top of the reg-stack.
1999 record_asm_stack_regs guaranteed that all implicitly
2000 popped regs were grouped at the top of the reg-stack. */
2002 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2003 regstack
->reg
[regstack
->top
]);
2008 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2009 Note that there isn't any need to substitute register numbers.
2010 ??? Explain why this is true. */
2012 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2014 /* See if there is an output for this hard reg. */
2017 for (j
= 0; j
< n_outputs
; j
++)
2018 if (STACK_REG_P (recog_data
.operand
[j
])
2019 && REGNO (recog_data
.operand
[j
]) == i
)
2021 regstack
->reg
[++regstack
->top
] = i
;
2022 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2027 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2028 input that the asm didn't implicitly pop. If the asm didn't
2029 implicitly pop an input reg, that reg will still be live.
2031 Note that we can't use find_regno_note here: the register numbers
2032 in the death notes have already been substituted. */
2034 for (i
= 0; i
< n_outputs
; i
++)
2035 if (STACK_REG_P (recog_data
.operand
[i
]))
2039 for (j
= 0; j
< n_notes
; j
++)
2040 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2041 && note_kind
[j
] == REG_UNUSED
)
2043 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2049 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2050 if (STACK_REG_P (recog_data
.operand
[i
]))
2054 for (j
= 0; j
< n_notes
; j
++)
2055 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2056 && note_kind
[j
] == REG_DEAD
2057 && TEST_HARD_REG_BIT (regstack
->reg_set
,
2058 REGNO (recog_data
.operand
[i
])))
2060 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2067 /* Substitute stack hard reg numbers for stack virtual registers in
2068 INSN. Non-stack register numbers are not changed. REGSTACK is the
2069 current stack content. Insns may be emitted as needed to arrange the
2070 stack for the 387 based on the contents of the insn. */
2073 subst_stack_regs (insn
, regstack
)
2077 register rtx
*note_link
, note
;
2080 if (GET_CODE (insn
) == CALL_INSN
)
2082 int top
= regstack
->top
;
2084 /* If there are any floating point parameters to be passed in
2085 registers for this call, make sure they are in the right
2090 straighten_stack (PREV_INSN (insn
), regstack
);
2092 /* Now mark the arguments as dead after the call. */
2094 while (regstack
->top
>= 0)
2096 CLEAR_HARD_REG_BIT (regstack
->reg_set
, FIRST_STACK_REG
+ regstack
->top
);
2102 /* Do the actual substitution if any stack regs are mentioned.
2103 Since we only record whether entire insn mentions stack regs, and
2104 subst_stack_regs_pat only works for patterns that contain stack regs,
2105 we must check each pattern in a parallel here. A call_value_pop could
2108 if (stack_regs_mentioned (insn
))
2110 int n_operands
= asm_noperands (PATTERN (insn
));
2111 if (n_operands
>= 0)
2113 /* This insn is an `asm' with operands. Decode the operands,
2114 decide how many are inputs, and do register substitution.
2115 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2117 subst_asm_stack_regs (insn
, regstack
);
2121 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2122 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2124 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2125 subst_stack_regs_pat (insn
, regstack
,
2126 XVECEXP (PATTERN (insn
), 0, i
));
2129 subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2132 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2133 REG_UNUSED will already have been dealt with, so just return. */
2135 if (GET_CODE (insn
) == NOTE
)
2138 /* If there is a REG_UNUSED note on a stack register on this insn,
2139 the indicated reg must be popped. The REG_UNUSED note is removed,
2140 since the form of the newly emitted pop insn references the reg,
2141 making it no longer `unset'. */
2143 note_link
= ®_NOTES(insn
);
2144 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2145 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2147 *note_link
= XEXP (note
, 1);
2148 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), EMIT_AFTER
);
2151 note_link
= &XEXP (note
, 1);
2154 /* Change the organization of the stack so that it fits a new basic
2155 block. Some registers might have to be popped, but there can never be
2156 a register live in the new block that is not now live.
2158 Insert any needed insns before or after INSN, as indicated by
2159 WHERE. OLD is the original stack layout, and NEW is the desired
2160 form. OLD is updated to reflect the code emitted, ie, it will be
2161 the same as NEW upon return.
2163 This function will not preserve block_end[]. But that information
2164 is no longer needed once this has executed. */
2167 change_stack (insn
, old
, new, where
)
2171 enum emit_where where
;
2176 /* We will be inserting new insns "backwards". If we are to insert
2177 after INSN, find the next insn, and insert before it. */
2179 if (where
== EMIT_AFTER
)
2181 if (current_block
&& current_block
->end
== insn
)
2183 insn
= NEXT_INSN (insn
);
2186 /* Pop any registers that are not needed in the new block. */
2188 for (reg
= old
->top
; reg
>= 0; reg
--)
2189 if (! TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2190 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[reg
], DFmode
),
2195 /* If the new block has never been processed, then it can inherit
2196 the old stack order. */
2198 new->top
= old
->top
;
2199 memcpy (new->reg
, old
->reg
, sizeof (new->reg
));
2203 /* This block has been entered before, and we must match the
2204 previously selected stack order. */
2206 /* By now, the only difference should be the order of the stack,
2207 not their depth or liveliness. */
2209 GO_IF_HARD_REG_EQUAL (old
->reg_set
, new->reg_set
, win
);
2212 if (old
->top
!= new->top
)
2215 /* If the stack is not empty (new->top != -1), loop here emitting
2216 swaps until the stack is correct.
2218 The worst case number of swaps emitted is N + 2, where N is the
2219 depth of the stack. In some cases, the reg at the top of
2220 stack may be correct, but swapped anyway in order to fix
2221 other regs. But since we never swap any other reg away from
2222 its correct slot, this algorithm will converge. */
2227 /* Swap the reg at top of stack into the position it is
2228 supposed to be in, until the correct top of stack appears. */
2230 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2232 for (reg
= new->top
; reg
>= 0; reg
--)
2233 if (new->reg
[reg
] == old
->reg
[old
->top
])
2239 emit_swap_insn (insn
, old
,
2240 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2243 /* See if any regs remain incorrect. If so, bring an
2244 incorrect reg to the top of stack, and let the while loop
2247 for (reg
= new->top
; reg
>= 0; reg
--)
2248 if (new->reg
[reg
] != old
->reg
[reg
])
2250 emit_swap_insn (insn
, old
,
2251 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2256 /* At this point there must be no differences. */
2258 for (reg
= old
->top
; reg
>= 0; reg
--)
2259 if (old
->reg
[reg
] != new->reg
[reg
])
2264 current_block
->end
= PREV_INSN (insn
);
2267 /* Print stack configuration. */
2270 print_stack (file
, s
)
2278 fprintf (file
, "uninitialized\n");
2279 else if (s
->top
== -1)
2280 fprintf (file
, "empty\n");
2285 for (i
= 0; i
<= s
->top
; ++i
)
2286 fprintf (file
, "%d ", s
->reg
[i
]);
2287 fputs ("]\n", file
);
2291 /* This function was doing life analysis. We now let the regular live
2292 code do it's job, so we only need to check some extra invariants
2293 that reg-stack expects. Primary among these being that all registers
2294 are initialized before use.
2296 The function returns true when code was emitted to CFG edges and
2297 commit_edge_insertions needs to be called. */
2300 convert_regs_entry ()
2302 int inserted
= 0, i
;
2305 for (i
= n_basic_blocks
- 1; i
>= 0; --i
)
2307 basic_block block
= BASIC_BLOCK (i
);
2308 block_info bi
= BLOCK_INFO (block
);
2311 /* Set current register status at last instruction `uninitialized'. */
2312 bi
->stack_in
.top
= -2;
2314 /* Copy live_at_end and live_at_start into temporaries. */
2315 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; reg
++)
2317 if (REGNO_REG_SET_P (block
->global_live_at_end
, reg
))
2318 SET_HARD_REG_BIT (bi
->out_reg_set
, reg
);
2319 if (REGNO_REG_SET_P (block
->global_live_at_start
, reg
))
2320 SET_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
);
2324 /* Load something into each stack register live at function entry.
2325 Such live registers can be caused by uninitialized variables or
2326 functions not returning values on all paths. In order to keep
2327 the push/pop code happy, and to not scrog the register stack, we
2328 must put something in these registers. Use a QNaN.
2330 Note that we are insertting converted code here. This code is
2331 never seen by the convert_regs pass. */
2333 for (e
= ENTRY_BLOCK_PTR
->succ
; e
; e
= e
->succ_next
)
2335 basic_block block
= e
->dest
;
2336 block_info bi
= BLOCK_INFO (block
);
2339 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
2340 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
2344 bi
->stack_in
.reg
[++top
] = reg
;
2346 init
= gen_rtx_SET (VOIDmode
,
2347 FP_MODE_REG (FIRST_STACK_REG
, SFmode
),
2349 insert_insn_on_edge (init
, e
);
2353 bi
->stack_in
.top
= top
;
2359 /* Construct the desired stack for function exit. This will either
2360 be `empty', or the function return value at top-of-stack. */
2363 convert_regs_exit ()
2365 int value_reg_low
, value_reg_high
;
2369 retvalue
= stack_result (current_function_decl
);
2370 value_reg_low
= value_reg_high
= -1;
2373 value_reg_low
= REGNO (retvalue
);
2374 value_reg_high
= value_reg_low
2375 + HARD_REGNO_NREGS (value_reg_low
, GET_MODE (retvalue
)) - 1;
2378 output_stack
= &BLOCK_INFO (EXIT_BLOCK_PTR
)->stack_in
;
2379 if (value_reg_low
== -1)
2380 output_stack
->top
= -1;
2385 output_stack
->top
= value_reg_high
- value_reg_low
;
2386 for (reg
= value_reg_low
; reg
<= value_reg_high
; ++reg
)
2388 output_stack
->reg
[reg
- value_reg_low
] = reg
;
2389 SET_HARD_REG_BIT (output_stack
->reg_set
, reg
);
2394 /* Convert stack register references in one block. */
2397 convert_regs_1 (file
, block
)
2401 struct stack_def regstack
, tmpstack
;
2402 block_info bi
= BLOCK_INFO (block
);
2407 current_block
= block
;
2411 fprintf (file
, "\nBasic block %d\nInput stack: ", block
->index
);
2412 print_stack (file
, &bi
->stack_in
);
2415 /* Process all insns in this block. Keep track of NEXT so that we
2416 don't process insns emitted while substituting in INSN. */
2418 regstack
= bi
->stack_in
;
2422 next
= NEXT_INSN (insn
);
2424 /* Ensure we have not missed a block boundary. */
2427 if (insn
== block
->end
)
2430 /* Don't bother processing unless there is a stack reg
2431 mentioned or if it's a CALL_INSN. */
2432 if (stack_regs_mentioned (insn
)
2433 || GET_CODE (insn
) == CALL_INSN
)
2437 fprintf (file
, " insn %d input stack: ",
2439 print_stack (file
, ®stack
);
2441 subst_stack_regs (insn
, ®stack
);
2448 fprintf (file
, "Expected live registers [");
2449 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
2450 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
))
2451 fprintf (file
, " %d", reg
);
2452 fprintf (file
, " ]\nOutput stack: ");
2453 print_stack (file
, ®stack
);
2457 if (GET_CODE (insn
) == JUMP_INSN
)
2458 insn
= PREV_INSN (insn
);
2460 /* If the function is declared to return a value, but it returns one
2461 in only some cases, some registers might come live here. Emit
2462 necessary moves for them. */
2464 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
2466 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
)
2467 && ! TEST_HARD_REG_BIT (regstack
.reg_set
, reg
))
2473 fprintf (file
, "Emitting insn initializing reg %d\n",
2477 set
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (reg
, SFmode
),
2479 insn
= emit_block_insn_after (set
, insn
, block
);
2480 subst_stack_regs (insn
, ®stack
);
2484 /* Something failed if the stack lives don't match. */
2485 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, bi
->out_reg_set
, win
);
2489 /* Adjust the stack of this block on exit to match the stack of the
2490 target block, or copy stack info into the stack of the successor
2491 of the successor hasn't been processed yet. */
2493 for (e
= block
->succ
; e
; e
= e
->succ_next
)
2495 basic_block target
= e
->dest
;
2496 stack target_stack
= &BLOCK_INFO (target
)->stack_in
;
2499 fprintf (file
, "Edge to block %d: ", target
->index
);
2501 if (target_stack
->top
== -2)
2503 /* The target block hasn't had a stack order selected.
2504 We need merely ensure that no pops are needed. */
2505 for (reg
= regstack
.top
; reg
>= 0; --reg
)
2506 if (! TEST_HARD_REG_BIT (target_stack
->reg_set
,
2513 fprintf (file
, "new block; copying stack position\n");
2515 /* change_stack kills values in regstack. */
2516 tmpstack
= regstack
;
2518 change_stack (block
->end
, &tmpstack
,
2519 target_stack
, EMIT_AFTER
);
2524 fprintf (file
, "new block; pops needed\n");
2528 if (target_stack
->top
== regstack
.top
)
2530 for (reg
= target_stack
->top
; reg
>= 0; --reg
)
2531 if (target_stack
->reg
[reg
] != regstack
.reg
[reg
])
2537 fprintf (file
, "no changes needed\n");
2544 fprintf (file
, "correcting stack to ");
2545 print_stack (file
, target_stack
);
2549 /* Care for EH edges specially. The normal return path may return
2550 a value in st(0), but the EH path will not, and there's no need
2551 to add popping code to the edge. */
2552 if (e
->flags
& EDGE_EH
)
2554 /* Assert that the lifetimes are as we expect -- one value
2555 live at st(0) on the end of the source block, and no
2556 values live at the beginning of the destination block. */
2559 CLEAR_HARD_REG_SET (tmp
);
2560 GO_IF_HARD_REG_EQUAL (target_stack
->reg_set
, tmp
, eh1
);
2564 SET_HARD_REG_BIT (tmp
, FIRST_STACK_REG
);
2565 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, tmp
, eh2
);
2569 target_stack
->top
= -1;
2572 /* It is better to output directly to the end of the block
2573 instead of to the edge, because emit_swap can do minimal
2574 insn scheduling. We can do this when there is only one
2575 edge out, and it is not abnormal. */
2576 else if (block
->succ
->succ_next
== NULL
2577 && ! (e
->flags
& EDGE_ABNORMAL
))
2579 /* change_stack kills values in regstack. */
2580 tmpstack
= regstack
;
2582 change_stack (block
->end
, &tmpstack
, target_stack
,
2583 (GET_CODE (block
->end
) == JUMP_INSN
2584 ? EMIT_BEFORE
: EMIT_AFTER
));
2590 /* We don't support abnormal edges. Global takes care to
2591 avoid any live register across them, so we should never
2592 have to insert instructions on such edges. */
2593 if (e
->flags
& EDGE_ABNORMAL
)
2596 current_block
= NULL
;
2599 /* ??? change_stack needs some point to emit insns after.
2600 Also needed to keep gen_sequence from returning a
2601 pattern as opposed to a sequence, which would lose
2603 after
= emit_note (NULL
, NOTE_INSN_DELETED
);
2605 tmpstack
= regstack
;
2606 change_stack (after
, &tmpstack
, target_stack
, EMIT_BEFORE
);
2608 seq
= gen_sequence ();
2611 insert_insn_on_edge (seq
, e
);
2613 current_block
= block
;
2620 /* Convert registers in all blocks reachable from BLOCK. */
2623 convert_regs_2 (file
, block
)
2627 basic_block
*stack
, *sp
;
2630 stack
= (basic_block
*) xmalloc (sizeof (*stack
) * n_basic_blocks
);
2634 BLOCK_INFO (block
)->done
= 1;
2642 inserted
|= convert_regs_1 (file
, block
);
2644 for (e
= block
->succ
; e
; e
= e
->succ_next
)
2645 if (! BLOCK_INFO (e
->dest
)->done
)
2648 BLOCK_INFO (e
->dest
)->done
= 1;
2651 while (sp
!= stack
);
2656 /* Traverse all basic blocks in a function, converting the register
2657 references in each insn from the "flat" register file that gcc uses,
2658 to the stack-like registers the 387 uses. */
2667 /* Initialize uninitialized registers on function entry. */
2668 inserted
= convert_regs_entry ();
2670 /* Construct the desired stack for function exit. */
2671 convert_regs_exit ();
2672 BLOCK_INFO (EXIT_BLOCK_PTR
)->done
= 1;
2674 /* ??? Future: process inner loops first, and give them arbitrary
2675 initial stacks which emit_swap_insn can modify. This ought to
2676 prevent double fxch that aften appears at the head of a loop. */
2678 /* Process all blocks reachable from all entry points. */
2679 for (e
= ENTRY_BLOCK_PTR
->succ
; e
; e
= e
->succ_next
)
2680 inserted
|= convert_regs_2 (file
, e
->dest
);
2682 /* ??? Process all unreachable blocks. Though there's no excuse
2683 for keeping these even when not optimizing. */
2684 for (i
= 0; i
< n_basic_blocks
; ++i
)
2686 basic_block b
= BASIC_BLOCK (i
);
2687 block_info bi
= BLOCK_INFO (b
);
2693 /* Create an arbitrary input stack. */
2694 bi
->stack_in
.top
= -1;
2695 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
2696 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
2697 bi
->stack_in
.reg
[++bi
->stack_in
.top
] = reg
;
2699 inserted
|= convert_regs_2 (file
, b
);
2704 commit_edge_insertions ();
2711 #endif /* STACK_REGS */