RISC-V: Error if function declared with different interrupt modes.
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / zero-extend-2.c
blob9d30ae2936714f7e0ff594f24794a9ff3f33726f
1 /* { dg-do compile { target { riscv64*-*-* } } } */
2 /* { dg-options "-march=rv64gc -mabi=lp64 -O2" } */
3 void
4 sub (unsigned int wc, unsigned long step, unsigned char *start)
6 do
8 start[--step] = wc;
9 wc >>= 6;
11 while (step > 1);
13 /* { dg-final { scan-assembler-times "sext.w" 0 } } */