RISC-V: Error if function declared with different interrupt modes.
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / shift-shift-2.c
blob3f07e7776e73ce53a68398b86cba35705077b434
1 /* { dg-do compile } */
2 /* { dg-options "-march=rv64gc -mabi=lp64 -O" } */
4 /* Test for lshrsi3_zero_extend_3+1 pattern that uses p2m1_shift_operand. */
5 unsigned int
6 sub1 (unsigned int i)
8 return (i << 1) >> 1;
11 unsigned int
12 sub2 (unsigned int i)
14 return (i << 20) >> 20;
17 unsigned long
18 sub3 (unsigned long i)
20 return (i << 1) >> 1;
23 unsigned long
24 sub4 (unsigned long i)
26 return (i << 52) >> 52;
28 /* { dg-final { scan-assembler-times "slli" 4 } } */
29 /* { dg-final { scan-assembler-times "srli" 4 } } */